mimxrt/boards: Add support for GPIO control of SNVS pins.
Signed-off-by: "Kwabena W. Agyeman" <kwagyeman@live.com>
This commit is contained in:
Kwabena W. Agyeman
Damien George
parent
afe2ca1a0a
commit
cb7e133dbe
@ -123,3 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT,
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GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5
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GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5
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GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5
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WAKEUP,,,,,,GPIO5_IO00,,NMI,,,,,ALT5
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PMIC_ON_REQ,SNVS_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0
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PMIC_STBY_REQ,CCM_PMIC_STBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0
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@ -80,16 +80,16 @@ GPIO_EMC_B2_17,SEMC_DM03,XBAR1_INOUT15,ENET_1G_RX_EN,SAI3_MCLK,FLEXSPI2_A_DATA04
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GPIO_EMC_B2_18,SEMC_DQS4,XBAR1_INOUT16,ENET_1G_RX_ER,EWM_OUT_B,FLEXSPI2_A_DATA05,GPIO2_IO28,FLEXSPI1_A_DQS,,WDOG1_B,TMR3_TIMER1,GPIO8_IO28,,,
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GPIO_EMC_B2_19,SEMC_CLKX00,ENET_MDC,ENET_1G_MDC,ENET_1G_REF_CLK,FLEXSPI2_A_DATA06,GPIO2_IO29,,,ENET_QOS_MDC,TMR3_TIMER2,GPIO8_IO29,,,
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GPIO_EMC_B2_20,SEMC_CLKX01,ENET_MDIO,ENET_1G_MDIO,ENET_QOS_REF_CLK,FLEXSPI2_A_DATA07,GPIO2_IO30,,,ENET_QOS_MDIO,TMR3_TIMER3,GPIO8_IO30,,,
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GPIO_SNVS_00,SNVS_TAMPER0,,,,,GPIO13_IO03,,,,,,,,
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GPIO_SNVS_01,SNVS_TAMPER1,,,,,GPIO13_IO04,,,,,,,,
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GPIO_SNVS_02,SNVS_TAMPER2,,,,,GPIO13_IO05,,,,,,,,
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GPIO_SNVS_03,SNVS_TAMPER3,,,,,GPIO13_IO06,,,,,,,,
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GPIO_SNVS_04,SNVS_TAMPER4,,,,,GPIO13_IO07,,,,,,,,
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GPIO_SNVS_05,SNVS_TAMPER5,,,,,GPIO13_IO08,,,,,,,,
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GPIO_SNVS_06,SNVS_TAMPER6,,,,,GPIO13_IO09,,,,,,,,
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GPIO_SNVS_07,SNVS_TAMPER7,,,,,GPIO13_IO10,,,,,,,,
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GPIO_SNVS_08,SNVS_TAMPER8,,,,,GPIO13_IO11,,,,,,,,
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GPIO_SNVS_09,SNVS_TAMPER9,,,,,GPIO13_IO12,,,,,,,,
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GPIO_SNVS_00_DIG,SNVS_TAMPER0,,,,,GPIO13_IO03,,,,,,,,
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GPIO_SNVS_01_DIG,SNVS_TAMPER1,,,,,GPIO13_IO04,,,,,,,,
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GPIO_SNVS_02_DIG,SNVS_TAMPER2,,,,,GPIO13_IO05,,,,,,,,
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GPIO_SNVS_03_DIG,SNVS_TAMPER3,,,,,GPIO13_IO06,,,,,,,,
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GPIO_SNVS_04_DIG,SNVS_TAMPER4,,,,,GPIO13_IO07,,,,,,,,
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GPIO_SNVS_05_DIG,SNVS_TAMPER5,,,,,GPIO13_IO08,,,,,,,,
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GPIO_SNVS_06_DIG,SNVS_TAMPER6,,,,,GPIO13_IO09,,,,,,,,
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GPIO_SNVS_07_DIG,SNVS_TAMPER7,,,,,GPIO13_IO10,,,,,,,,
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GPIO_SNVS_08_DIG,SNVS_TAMPER8,,,,,GPIO13_IO11,,,,,,,,
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GPIO_SNVS_09_DIG,SNVS_TAMPER9,,,,,GPIO13_IO12,,,,,,,,
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GPIO_LPSR_00,FLEXCAN3_TX,MIC_CLK,MQS_RIGHT,ARM_CM4_EVENTO,,GPIO6_IO00,LPUART12_TXD,SAI4_MCLK,,,GPIO12_IO00,,,
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GPIO_LPSR_01,FLEXCAN3_RX,MIC_BITSTREAM0,MQS_LEFT,ARM_CM4_EVENTI,,GPIO6_IO01,LPUART12_RXD,,,,GPIO12_IO01,,,
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GPIO_LPSR_02,SRC_BOOT_MODE00,LPSPI5_SCK,SAI4_TX_DATA,MQS_RIGHT,,GPIO6_IO02,,,,,GPIO12_IO02,,,
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@ -24,6 +24,10 @@ regexes = [
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r"IOMUXC_(?P<pin>GPIO_EMC_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_DISP_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_LPSR_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_[SNVS_]*(?P<pin>WAKEUP[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_SNVS_(?P<pin>PMIC_ON_REQ)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_SNVS_(?P<pin>PMIC_STBY_REQ)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_SNVS_\d\d_DIG)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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]
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@ -118,10 +122,43 @@ class Pin(object):
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self.print_pin_af()
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self.print_pin_adc()
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options = {
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"GPIO_LPSR_00": "PIN_LPSR",
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"GPIO_LPSR_01": "PIN_LPSR",
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"GPIO_LPSR_02": "PIN_LPSR",
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"GPIO_LPSR_03": "PIN_LPSR",
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"GPIO_LPSR_04": "PIN_LPSR",
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"GPIO_LPSR_05": "PIN_LPSR",
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"GPIO_LPSR_06": "PIN_LPSR",
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"GPIO_LPSR_07": "PIN_LPSR",
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"GPIO_LPSR_08": "PIN_LPSR",
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"GPIO_LPSR_09": "PIN_LPSR",
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"GPIO_LPSR_10": "PIN_LPSR",
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"GPIO_LPSR_11": "PIN_LPSR",
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"GPIO_LPSR_12": "PIN_LPSR",
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"GPIO_LPSR_13": "PIN_LPSR",
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"GPIO_LPSR_14": "PIN_LPSR",
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"GPIO_LPSR_15": "PIN_LPSR",
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"GPIO_SNVS_00_DIG": "PIN_SNVS",
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"GPIO_SNVS_01_DIG": "PIN_SNVS",
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"GPIO_SNVS_02_DIG": "PIN_SNVS",
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"GPIO_SNVS_03_DIG": "PIN_SNVS",
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"GPIO_SNVS_04_DIG": "PIN_SNVS",
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"GPIO_SNVS_05_DIG": "PIN_SNVS",
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"GPIO_SNVS_06_DIG": "PIN_SNVS",
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"GPIO_SNVS_07_DIG": "PIN_SNVS",
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"GPIO_SNVS_08_DIG": "PIN_SNVS",
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"GPIO_SNVS_09_DIG": "PIN_SNVS",
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"WAKEUP": "PIN_SNVS",
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"WAKEUP_DIG": "PIN_SNVS",
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"PMIC_ON_REQ": "PIN_SNVS",
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"PMIC_STBY_REQ": "PIN_SNVS",
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}
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print(
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"const machine_pin_obj_t pin_{0} = {1}({0}, {2}, {3}, pin_{0}_af, {4}, {5});\n".format(
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self.name,
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"PIN_LPSR" if "LPSR" in self.name else "PIN",
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options.get(self.name, "PIN"),
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self.gpio,
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int(self.pin),
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len(self.adc_fns),
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@ -233,9 +270,6 @@ class Pins(object):
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pin_number = pin.lstrip("IO")
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pin = Pin(pad, gpio, pin_number, idx=idx)
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if any(s in pad for s in ("SNVS", "WAKEUP")):
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continue
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# Parse alternate functions
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af_idx = 0
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for af_idx, af in enumerate(row[(pad_col + 1) : adc_col]):
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@ -49,3 +49,17 @@
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.adc_list = (_adc_list), \
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} \
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#define PIN_SNVS(_name, _gpio, _pin, _af_list, _adc_list_len, _adc_list) \
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{ \
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.base = { &machine_pin_type }, \
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.name = MP_QSTR_##_name, \
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.gpio = (_gpio), \
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.pin = (uint32_t)(_pin), \
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.muxRegister = (uint32_t)&(IOMUXC_SNVS->SW_MUX_CTL_PAD_##_name), \
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.configRegister = (uint32_t)&(IOMUXC_SNVS->SW_PAD_CTL_PAD_##_name), \
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.af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
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.adc_list_len = (_adc_list_len), \
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.af_list = (_af_list), \
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.adc_list = (_adc_list), \
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} \
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