From 35ef6c687fdd27a01e4e3a31731eeb622becc2fb Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Wed, 11 Nov 2020 23:11:12 +0530
Subject: [PATCH 01/16] nvm implementation for esp32s2

---
 locale/circuitpython.pot                      | 10 ++-
 ports/esp32s2/Makefile                        |  2 +
 .../common-hal/microcontroller/__init__.c     | 12 +++
 ports/esp32s2/common-hal/nvm/ByteArray.c      | 80 +++++++++++++++++++
 ports/esp32s2/common-hal/nvm/ByteArray.h      | 38 +++++++++
 ports/esp32s2/common-hal/nvm/__init__.c       |  1 +
 ports/esp32s2/mpconfigport.h                  |  7 +-
 ports/esp32s2/mpconfigport.mk                 |  2 +-
 8 files changed, 147 insertions(+), 5 deletions(-)
 create mode 100644 ports/esp32s2/common-hal/nvm/ByteArray.c
 create mode 100644 ports/esp32s2/common-hal/nvm/ByteArray.h
 create mode 100644 ports/esp32s2/common-hal/nvm/__init__.c

diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot
index b4445abfbf..2bb02b2c9d 100644
--- a/locale/circuitpython.pot
+++ b/locale/circuitpython.pot
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-11-04 21:18+0530\n"
+"POT-Creation-Date: 2020-11-11 16:30+0530\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
@@ -296,7 +296,8 @@ msgstr ""
 msgid "All I2C peripherals are in use"
 msgstr ""
 
-#: ports/esp32s2/peripherals/pcnt_handler.c
+#: ports/esp32s2/common-hal/countio/Counter.c
+#: ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.c
 msgid "All PCNT units in use"
 msgstr ""
 
@@ -1248,6 +1249,10 @@ msgstr ""
 msgid "Must use a multiple of 6 rgb pins, not %d"
 msgstr ""
 
+#: ports/esp32s2/common-hal/nvm/ByteArray.c
+msgid "NVS Error"
+msgstr ""
+
 #: py/parse.c
 msgid "Name too long"
 msgstr ""
@@ -3201,6 +3206,7 @@ msgstr ""
 msgid "pow() with 3 arguments requires integers"
 msgstr ""
 
+#: ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h
 #: ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h
 #: ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h
 #: ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
index 55d6e91d44..ec389e9feb 100644
--- a/ports/esp32s2/Makefile
+++ b/ports/esp32s2/Makefile
@@ -104,6 +104,8 @@ INC += -isystem esp-idf/components/soc/soc/include
 INC += -isystem esp-idf/components/soc/soc/esp32s2/include
 INC += -isystem esp-idf/components/heap/include
 INC += -isystem esp-idf/components/esp_system/include
+INC += -isystem esp-idf/components/spi_flash/include
+INC += -isystem esp-idf/components/nvs_flash/include
 INC += -I$(BUILD)/esp-idf/config
 
 CFLAGS += -DHAVE_CONFIG_H \
diff --git a/ports/esp32s2/common-hal/microcontroller/__init__.c b/ports/esp32s2/common-hal/microcontroller/__init__.c
index 6b2e18673d..dc4d2c095e 100644
--- a/ports/esp32s2/common-hal/microcontroller/__init__.c
+++ b/ports/esp32s2/common-hal/microcontroller/__init__.c
@@ -35,6 +35,7 @@
 #include "shared-bindings/microcontroller/__init__.h"
 #include "shared-bindings/microcontroller/Pin.h"
 #include "shared-bindings/microcontroller/Processor.h"
+#include "shared-bindings/nvm/ByteArray.h"
 
 #include "supervisor/filesystem.h"
 #include "supervisor/shared/safe_mode.h"
@@ -85,6 +86,17 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = {
     },
 };
 
+#if CIRCUITPY_INTERNAL_NVM_SIZE > 0
+// The singleton nvm.ByteArray object.
+const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = {
+    .base = {
+        .type = &nvm_bytearray_type,
+    },
+    .start_address = (uint8_t*) CIRCUITPY_INTERNAL_NVM_START_ADDR,
+    .len = CIRCUITPY_INTERNAL_NVM_SIZE,
+};
+#endif
+
 // This maps MCU pin names to pin objects.
 STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) },
diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c
new file mode 100644
index 0000000000..30051df1ef
--- /dev/null
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/nvm/ByteArray.h"
+
+#include "py/runtime.h"
+
+#include "nvs_flash.h"
+
+uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) {
+    return self->len;
+}
+
+static nvs_handle get_nvs_handle(void) {
+    // Initialize NVS
+    esp_err_t err = nvs_flash_init();
+    if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
+        // NVS partition was truncated and needs to be erased
+        // Retry nvs_flash_init
+        ESP_ERROR_CHECK(nvs_flash_erase());
+        err = nvs_flash_init();
+    }
+    ESP_ERROR_CHECK(err);
+
+    // Open NVS handle
+    nvs_handle nvs_handle;
+    if (nvs_open("CPY", NVS_READWRITE, &nvs_handle) != ESP_OK) {
+        mp_raise_RuntimeError(translate("NVS Error"));
+    }
+    return nvs_handle;
+}
+
+bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
+        uint32_t start_index, uint8_t* values, uint32_t len) {
+    char index[9];
+    sprintf(index, "%i", start_index);
+    // start nvs
+    nvs_handle handle = get_nvs_handle();
+    bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK));
+    // close nvs
+    nvs_close(handle);
+    return status;
+}
+
+// NVM memory is memory mapped so reading it is easy.
+void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
+        uint32_t start_index, uint32_t len, uint8_t* values) {
+    char index[9];
+    sprintf(index, "%i", start_index);
+    // start nvs
+    nvs_handle handle = get_nvs_handle();
+    if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) {
+        mp_raise_RuntimeError(translate("NVS Error"));
+    }
+    // close nvs
+    nvs_close(handle);
+}
diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.h b/ports/esp32s2/common-hal/nvm/ByteArray.h
new file mode 100644
index 0000000000..44b63d7241
--- /dev/null
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H
+
+#include "py/obj.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    uint8_t* start_address;
+    uint32_t len;
+} nvm_bytearray_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H
diff --git a/ports/esp32s2/common-hal/nvm/__init__.c b/ports/esp32s2/common-hal/nvm/__init__.c
new file mode 100644
index 0000000000..1b702a1584
--- /dev/null
+++ b/ports/esp32s2/common-hal/nvm/__init__.c
@@ -0,0 +1 @@
+// No nvm module functions.
diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h
index cec8dd35df..11ea5f6382 100644
--- a/ports/esp32s2/mpconfigport.h
+++ b/ports/esp32s2/mpconfigport.h
@@ -28,7 +28,6 @@
 #ifndef ESP32S2_MPCONFIGPORT_H__
 #define ESP32S2_MPCONFIGPORT_H__
 
-#define CIRCUITPY_INTERNAL_NVM_SIZE         (0)
 #define MICROPY_NLR_THUMB                   (0)
 
 #define MICROPY_PY_UJSON                    (1)
@@ -36,11 +35,15 @@
 
 #include "py/circuitpy_mpconfig.h"
 
-
 #define MICROPY_PORT_ROOT_POINTERS \
 	CIRCUITPY_COMMON_ROOT_POINTERS
 #define MICROPY_NLR_SETJMP                  (1)
 #define CIRCUITPY_DEFAULT_STACK_SIZE        0x6000
 
+#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x9000)
+
+#ifndef CIRCUITPY_INTERNAL_NVM_SIZE
+#define CIRCUITPY_INTERNAL_NVM_SIZE (20000)
+#endif
 
 #endif  // __INCLUDED_ESP32S2_MPCONFIGPORT_H
diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk
index 4579b95ab6..7f3b4241a0 100644
--- a/ports/esp32s2/mpconfigport.mk
+++ b/ports/esp32s2/mpconfigport.mk
@@ -21,7 +21,7 @@ CIRCUITPY_COUNTIO = 1
 CIRCUITPY_FREQUENCYIO = 0
 CIRCUITPY_I2CPERIPHERAL = 0
 CIRCUITPY_ROTARYIO = 1
-CIRCUITPY_NVM = 0
+CIRCUITPY_NVM = 1
 # We don't have enough endpoints to include MIDI.
 CIRCUITPY_USB_MIDI = 0
 CIRCUITPY_WIFI = 1

From 0686cde2263a50e2074f741417d169a1c1ea752e Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Tue, 17 Nov 2020 01:19:12 +0530
Subject: [PATCH 02/16] update internal nvm size

---
 ports/esp32s2/common-hal/nvm/ByteArray.c | 4 ++--
 ports/esp32s2/mpconfigport.h             | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c
index 30051df1ef..d90f7fbdc2 100644
--- a/ports/esp32s2/common-hal/nvm/ByteArray.c
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.c
@@ -56,7 +56,7 @@ static nvs_handle get_nvs_handle(void) {
 bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint8_t* values, uint32_t len) {
     char index[9];
-    sprintf(index, "%i", start_index);
+    sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR);
     // start nvs
     nvs_handle handle = get_nvs_handle();
     bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK));
@@ -69,7 +69,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
 void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint32_t len, uint8_t* values) {
     char index[9];
-    sprintf(index, "%i", start_index);
+    sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR);
     // start nvs
     nvs_handle handle = get_nvs_handle();
     if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) {
diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h
index 11ea5f6382..db7393d8ef 100644
--- a/ports/esp32s2/mpconfigport.h
+++ b/ports/esp32s2/mpconfigport.h
@@ -43,7 +43,7 @@
 #define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x9000)
 
 #ifndef CIRCUITPY_INTERNAL_NVM_SIZE
-#define CIRCUITPY_INTERNAL_NVM_SIZE (20000)
+#define CIRCUITPY_INTERNAL_NVM_SIZE (20 * 1024)
 #endif
 
 #endif  // __INCLUDED_ESP32S2_MPCONFIGPORT_H

From bab41afce759916af15ab57645691336ea2bdd06 Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Wed, 18 Nov 2020 12:34:56 +0530
Subject: [PATCH 03/16] ps2io implementation for esp32s2

---
 ports/esp32s2/common-hal/ps2io/Ps2.c      | 393 ++++++++++++++++++++++
 ports/esp32s2/common-hal/ps2io/Ps2.h      |  60 ++++
 ports/esp32s2/common-hal/ps2io/__init__.c |   1 +
 ports/esp32s2/mpconfigport.mk             |   4 +
 4 files changed, 458 insertions(+)
 create mode 100644 ports/esp32s2/common-hal/ps2io/Ps2.c
 create mode 100644 ports/esp32s2/common-hal/ps2io/Ps2.h
 create mode 100644 ports/esp32s2/common-hal/ps2io/__init__.c

diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c
new file mode 100644
index 0000000000..2156a42479
--- /dev/null
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.c
@@ -0,0 +1,393 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/ps2io/Ps2.h"
+
+#include "py/runtime.h"
+#include "supervisor/port.h"
+#include "shared-bindings/ps2io/Ps2.h"
+#include "shared-bindings/microcontroller/__init__.h"
+
+#define STATE_IDLE 0
+#define STATE_RECV 1
+#define STATE_RECV_PARITY 2
+#define STATE_RECV_STOP 3
+#define STATE_RECV_ERR 10
+
+#define ERROR_STARTBIT 0x01
+#define ERROR_TIMEOUT 0x02
+#define ERROR_PARITY 0x04
+#define ERROR_STOPBIT 0x08
+#define ERROR_BUFFER 0x10
+
+#define ERROR_TX_CLKLO 0x100
+#define ERROR_TX_CLKHI 0x200
+#define ERROR_TX_ACKDATA 0x400
+#define ERROR_TX_ACKCLK 0x800
+#define ERROR_TX_RTS 0x1000
+#define ERROR_TX_NORESP 0x2000
+
+static void IRAM_ATTR ps2_interrupt_handler(void *self_in);
+
+static void ps2_set_config(ps2io_ps2_obj_t* self) {
+    // turn on falling edge interrupt
+    gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE);
+    gpio_isr_register(ps2_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle);
+    gpio_intr_enable(self->clk_pin);
+}
+
+static void disable_interrupt(ps2io_ps2_obj_t* self) {
+    // turn off fallling edge interrupt
+    gpio_intr_disable(self->clk_pin);
+}
+
+static void resume_interrupt(ps2io_ps2_obj_t* self) {
+    self->state = STATE_IDLE;
+    gpio_intr_enable(self->clk_pin);
+}
+
+static void clk_hi(ps2io_ps2_obj_t* self) {
+    // external pull-up
+    gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT);
+    gpio_pullup_dis(self->clk_pin);
+}
+
+static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) {
+    clk_hi(self);
+    common_hal_mcu_delay_us(1);
+    while (gpio_get_level(self->clk_pin) && us) {
+        --us;
+        common_hal_mcu_delay_us(1);
+    }
+    return us;
+}
+
+static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) {
+    clk_hi(self);
+    common_hal_mcu_delay_us(1);
+    while (!gpio_get_level(self->clk_pin) && us) {
+        --us;
+        common_hal_mcu_delay_us(1);
+    }
+    return us;
+}
+
+static void clk_lo(ps2io_ps2_obj_t* self) {
+    gpio_pullup_dis(self->clk_pin);
+    gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT);
+    gpio_set_level(self->clk_pin, 0);
+}
+
+static void data_hi(ps2io_ps2_obj_t* self) {
+    // external pull-up
+    gpio_set_direction(self->data_pin, GPIO_MODE_INPUT);
+    gpio_pullup_dis(self->data_pin);
+}
+
+static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) {
+    data_hi(self);
+    common_hal_mcu_delay_us(1);
+    while (gpio_get_level(self->data_pin) && us) {
+        --us;
+        common_hal_mcu_delay_us(1);
+    }
+    return us;
+}
+
+static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) {
+    data_hi(self);
+    common_hal_mcu_delay_us(1);
+    while (!gpio_get_level(self->data_pin) && us) {
+        --us;
+        common_hal_mcu_delay_us(1);
+    }
+    return us;
+}
+
+static void data_lo(ps2io_ps2_obj_t* self) {
+    gpio_pullup_dis(self->data_pin);
+    gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT);
+    gpio_set_level(self->data_pin, 0);
+}
+
+static void idle(ps2io_ps2_obj_t* self) {
+    clk_hi(self);
+    data_hi(self);
+}
+
+static void inhibit(ps2io_ps2_obj_t* self) {
+    clk_lo(self);
+    data_hi(self);
+}
+
+static void delay_us(uint32_t t) {
+    common_hal_mcu_delay_us(t);
+}
+
+static void IRAM_ATTR ps2_interrupt_handler(void *self_in) {
+    // Grab the current time first.
+    uint64_t current_tick = port_get_raw_ticks(NULL);
+
+    ps2io_ps2_obj_t * self = self_in;
+    int data_bit = gpio_get_level(self->data_pin) ? 1 : 0;
+
+    // test for timeout
+    if (self->state != STATE_IDLE) {
+        int64_t diff_ms = current_tick - self->last_raw_ticks;
+        if (diff_ms > 1) { // a.k.a. > 1.001ms
+            self->last_errors |= ERROR_TIMEOUT;
+            self->state = STATE_IDLE;
+        }
+    }
+
+    self->last_raw_ticks = current_tick;
+
+    if (self->state == STATE_IDLE) {
+        self->bits = 0;
+        self->parity = false;
+        self->bitcount = 0;
+        self->state = STATE_RECV;
+        if (data_bit) {
+            // start bit should be 0
+            self->last_errors |= ERROR_STARTBIT;
+            self->state = STATE_RECV_ERR;
+                } else {
+            self->state = STATE_RECV;
+        }
+
+    } else if (self->state == STATE_RECV) {
+        if (data_bit) {
+            self->bits |= data_bit << self->bitcount;
+            self->parity = !self->parity;
+        }
+        ++self->bitcount;
+        if (self->bitcount >= 8) {
+            self->state = STATE_RECV_PARITY;
+        }
+
+    } else if (self->state == STATE_RECV_PARITY) {
+        ++self->bitcount;
+        if (data_bit) {
+            self->parity = !self->parity;
+        }
+        if (!self->parity) {
+            self->last_errors |= ERROR_PARITY;
+            self->state = STATE_RECV_ERR;
+        } else {
+            self->state = STATE_RECV_STOP;
+        }
+
+    } else if (self->state == STATE_RECV_STOP) {
+        ++self->bitcount;
+        if (! data_bit) {
+            self->last_errors |= ERROR_STOPBIT;
+        } else if (self->waiting_cmd_response) {
+            self->cmd_response = self->bits;
+            self->waiting_cmd_response = false;
+        } else if (self->bufcount >= sizeof(self->buffer)) {
+            self->last_errors |= ERROR_BUFFER;
+        } else {
+            self->buffer[self->bufposw] = self->bits;
+            self->bufposw = (self->bufposw + 1) % sizeof(self->buffer);
+            self->bufcount++;
+        }
+        self->state = STATE_IDLE;
+
+    } else if (self->state == STATE_RECV_ERR) {
+        // just count the bits until idle
+        if (++self->bitcount >= 10) {
+            self->state = STATE_IDLE;
+        }
+    }
+}
+
+void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self,
+        const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) {
+    clk_hi(self);
+    data_hi(self);
+
+    self->clk_pin = (gpio_num_t)clk_pin->number;
+    self->data_pin = (gpio_num_t)data_pin->number;
+    self->state = STATE_IDLE;
+    self->bufcount = 0;
+    self->bufposr = 0;
+    self->bufposw = 0;
+    self->waiting_cmd_response = false;
+
+    claim_pin(clk_pin);
+    claim_pin(data_pin);
+
+    // set config will enable the interrupt.
+    ps2_set_config(self);
+}
+
+bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) {
+    return self->clk_pin == GPIO_NUM_MAX;
+}
+
+void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) {
+    if (common_hal_ps2io_ps2_deinited(self)) {
+        return;
+    }
+    if (self->handle) {
+        esp_intr_free(self->handle);
+        self->handle = NULL;
+    }
+    reset_pin_number(self->clk_pin);
+    reset_pin_number(self->data_pin);
+    self->clk_pin = GPIO_NUM_MAX;
+    self->data_pin = GPIO_NUM_MAX;
+}
+
+uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) {
+    return self->bufcount;
+}
+
+int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self) {
+    common_hal_mcu_disable_interrupts();
+    if (self->bufcount <= 0) {
+        common_hal_mcu_enable_interrupts();
+        return -1;
+    }
+    uint8_t b = self->buffer[self->bufposr];
+    self->bufposr = (self->bufposr + 1) % sizeof(self->buffer);
+    self->bufcount -= 1;
+    common_hal_mcu_enable_interrupts();
+    return b;
+}
+
+uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) {
+    common_hal_mcu_disable_interrupts();
+    uint16_t errors = self->last_errors;
+    self->last_errors = 0;
+    common_hal_mcu_enable_interrupts();
+    return errors;
+}
+
+// Based upon TMK implementation of PS/2 protocol
+// https://github.com/tmk/tmk_keyboard/blob/master/tmk_core/protocol/ps2_interrupt.c
+
+int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) {
+    disable_interrupt(self);
+    inhibit(self);
+    delay_us(100);
+
+    /* RTS and start bit */
+    data_lo(self);
+    clk_hi(self);
+    if (!wait_clk_lo(self, 10000)) {
+        self->last_errors |= ERROR_TX_RTS;
+        goto ERROR;
+    }
+
+    bool parity = true;
+    for (uint8_t i = 0; i < 8; i++) {
+        delay_us(15);
+        if (b & (1 << i)) {
+            parity = !parity;
+            data_hi(self);
+        } else {
+            data_lo(self);
+        }
+        if (!wait_clk_hi(self, 50)) {
+            self->last_errors |= ERROR_TX_CLKHI;
+            goto ERROR;
+        }
+        if (!wait_clk_lo(self, 50)) {
+            self->last_errors |= ERROR_TX_CLKLO;
+            goto ERROR;
+        }
+    }
+
+    delay_us(15);
+    if (parity) {
+        data_hi(self);
+    } else {
+        data_lo(self);
+    }
+    if (!wait_clk_hi(self, 50)) {
+        self->last_errors |= ERROR_TX_CLKHI;
+        goto ERROR;
+    }
+    if (!wait_clk_lo(self, 50)) {
+        self->last_errors |= ERROR_TX_CLKLO;
+        goto ERROR;
+    }
+
+    /* Stop bit */
+    delay_us(15);
+    data_hi(self);
+
+    /* Ack */
+    if (!wait_data_lo(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKDATA;
+        goto ERROR;
+    }
+    if (!wait_clk_lo(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKCLK;
+        goto ERROR;
+    }
+
+    /* wait for idle state */
+    if (!wait_clk_hi(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKCLK;
+        goto ERROR;
+    }
+    if (!wait_data_hi(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKDATA;
+        goto ERROR;
+    }
+
+    /* Wait for response byte */
+    self->waiting_cmd_response = true;
+    idle(self);
+    resume_interrupt(self);
+
+    for (int i = 0; i < 25; ++i) {
+        delay_us(1000);
+        common_hal_mcu_disable_interrupts();
+        bool has_response = !self->waiting_cmd_response;
+        uint8_t response = self->cmd_response;
+        common_hal_mcu_enable_interrupts();
+
+        if (has_response) {
+            return response;
+        }
+    }
+
+    /* No response */
+    common_hal_mcu_disable_interrupts();
+    self->waiting_cmd_response = false;
+    self->last_errors |= ERROR_TX_NORESP;
+    common_hal_mcu_enable_interrupts();
+    return -1;
+
+    /* Other errors */
+ERROR:
+    idle(self);
+    resume_interrupt(self);
+    return -1;
+}
diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h
new file mode 100644
index 0000000000..51ebde4487
--- /dev/null
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.h
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/obj.h"
+#include "driver/gpio.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    gpio_num_t clk_pin;
+    gpio_num_t data_pin;
+
+    uint8_t state;
+    uint64_t last_raw_ticks;
+
+    uint16_t bits;
+    bool parity;
+    uint8_t bitcount;
+
+    uint8_t buffer[16];
+    uint8_t bufcount;
+    uint8_t bufposr;
+    uint8_t bufposw;
+
+    uint16_t last_errors;
+
+    bool waiting_cmd_response;
+    uint8_t cmd_response;
+
+    intr_handle_t handle;
+} ps2io_ps2_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
diff --git a/ports/esp32s2/common-hal/ps2io/__init__.c b/ports/esp32s2/common-hal/ps2io/__init__.c
new file mode 100644
index 0000000000..ba4b4249f7
--- /dev/null
+++ b/ports/esp32s2/common-hal/ps2io/__init__.c
@@ -0,0 +1 @@
+// No ps2io module functions.
diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk
index 335d2caf72..26bb516114 100644
--- a/ports/esp32s2/mpconfigport.mk
+++ b/ports/esp32s2/mpconfigport.mk
@@ -28,6 +28,10 @@ CIRCUITPY_WIFI = 1
 CIRCUITPY_WATCHDOG ?= 1
 CIRCUITPY_ESPIDF = 1
 
+ifndef CIRCUITPY_PS2IO
+CIRCUITPY_PS2IO = 1
+endif
+
 ifndef CIRCUITPY_TOUCHIO_USE_NATIVE
 CIRCUITPY_TOUCHIO_USE_NATIVE = 1
 endif

From 0d3e81f969adc6d8744e8e720ec4b01848a8fa6c Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Wed, 18 Nov 2020 22:22:42 +0530
Subject: [PATCH 04/16] update interrupt handling

---
 ports/esp32s2/common-hal/ps2io/Ps2.c | 13 +++++--------
 ports/esp32s2/common-hal/ps2io/Ps2.h |  2 --
 2 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c
index 2156a42479..9c19ea950e 100644
--- a/ports/esp32s2/common-hal/ps2io/Ps2.c
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.c
@@ -55,18 +55,18 @@ static void IRAM_ATTR ps2_interrupt_handler(void *self_in);
 static void ps2_set_config(ps2io_ps2_obj_t* self) {
     // turn on falling edge interrupt
     gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE);
-    gpio_isr_register(ps2_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle);
-    gpio_intr_enable(self->clk_pin);
+    gpio_install_isr_service(ESP_INTR_FLAG_IRAM);
+    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
 }
 
 static void disable_interrupt(ps2io_ps2_obj_t* self) {
     // turn off fallling edge interrupt
-    gpio_intr_disable(self->clk_pin);
+    gpio_isr_handler_remove(self->clk_pin);
 }
 
 static void resume_interrupt(ps2io_ps2_obj_t* self) {
     self->state = STATE_IDLE;
-    gpio_intr_enable(self->clk_pin);
+    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
 }
 
 static void clk_hi(ps2io_ps2_obj_t* self) {
@@ -252,10 +252,7 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) {
     if (common_hal_ps2io_ps2_deinited(self)) {
         return;
     }
-    if (self->handle) {
-        esp_intr_free(self->handle);
-        self->handle = NULL;
-    }
+    gpio_uninstall_isr_service();
     reset_pin_number(self->clk_pin);
     reset_pin_number(self->data_pin);
     self->clk_pin = GPIO_NUM_MAX;
diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h
index 51ebde4487..eb93829b46 100644
--- a/ports/esp32s2/common-hal/ps2io/Ps2.h
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.h
@@ -53,8 +53,6 @@ typedef struct {
 
     bool waiting_cmd_response;
     uint8_t cmd_response;
-
-    intr_handle_t handle;
 } ps2io_ps2_obj_t;
 
 #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H

From b56645808c88cca22a42cb66ed7b3ddc8383436a Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Thu, 19 Nov 2020 11:44:22 +0530
Subject: [PATCH 05/16] fix crash on user code exit

---
 ports/esp32s2/common-hal/ps2io/Ps2.c | 6 ++++--
 ports/esp32s2/common-hal/ps2io/Ps2.h | 2 ++
 ports/esp32s2/supervisor/port.c      | 5 +++++
 shared-bindings/ps2io/Ps2.c          | 5 +++--
 4 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c
index 9c19ea950e..56199f4cbf 100644
--- a/ports/esp32s2/common-hal/ps2io/Ps2.c
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.c
@@ -26,9 +26,7 @@
 
 #include "common-hal/ps2io/Ps2.h"
 
-#include "py/runtime.h"
 #include "supervisor/port.h"
-#include "shared-bindings/ps2io/Ps2.h"
 #include "shared-bindings/microcontroller/__init__.h"
 
 #define STATE_IDLE 0
@@ -259,6 +257,10 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) {
     self->data_pin = GPIO_NUM_MAX;
 }
 
+void ps2_reset(void) {
+    gpio_uninstall_isr_service();
+}
+
 uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) {
     return self->bufcount;
 }
diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h
index eb93829b46..497952b250 100644
--- a/ports/esp32s2/common-hal/ps2io/Ps2.h
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.h
@@ -55,4 +55,6 @@ typedef struct {
     uint8_t cmd_response;
 } ps2io_ps2_obj_t;
 
+void ps2_reset(void);
+
 #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c
index 47d0c7f463..f66a8511ad 100644
--- a/ports/esp32s2/supervisor/port.c
+++ b/ports/esp32s2/supervisor/port.c
@@ -41,6 +41,7 @@
 #include "common-hal/busio/I2C.h"
 #include "common-hal/busio/SPI.h"
 #include "common-hal/busio/UART.h"
+#include "common-hal/ps2io/Ps2.h"
 #include "common-hal/pulseio/PulseIn.h"
 #include "common-hal/pwmio/PWMOut.h"
 #include "common-hal/watchdog/WatchDogTimer.h"
@@ -104,6 +105,10 @@ void reset_port(void) {
     analogout_reset();
 #endif
 
+#if CIRCUITPY_PS2IO
+    ps2_reset();
+#endif
+
 #if CIRCUITPY_PULSEIO
     esp32s2_peripherals_rmt_reset();
     pulsein_reset();
diff --git a/shared-bindings/ps2io/Ps2.c b/shared-bindings/ps2io/Ps2.c
index 0977e08ff7..07fa5cebb9 100644
--- a/shared-bindings/ps2io/Ps2.c
+++ b/shared-bindings/ps2io/Ps2.c
@@ -116,8 +116,9 @@ STATIC void check_for_deinit(ps2io_ps2_obj_t *self) {
 //|         ...
 //|
 STATIC mp_obj_t ps2io_ps2_obj___exit__(size_t n_args, const mp_obj_t *args) {
-    (void)n_args;
-    common_hal_ps2io_ps2_deinit(args[0]);
+    mp_check_self(MP_OBJ_IS_TYPE(args[0], &ps2io_ps2_type));
+    ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+    common_hal_ps2io_ps2_deinit(self);
     return mp_const_none;
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(ps2io_ps2___exit___obj, 4, 4, ps2io_ps2_obj___exit__);

From 040eaa044344562ec1f9905d67b612ea2ec12949 Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Thu, 19 Nov 2020 15:30:15 +0530
Subject: [PATCH 06/16] re-organize and clean-up

---
 ports/esp32s2/common-hal/ps2io/Ps2.c | 200 +++++++++++++--------------
 1 file changed, 100 insertions(+), 100 deletions(-)

diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c
index 56199f4cbf..003f0d827e 100644
--- a/ports/esp32s2/common-hal/ps2io/Ps2.c
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.c
@@ -48,103 +48,16 @@
 #define ERROR_TX_RTS 0x1000
 #define ERROR_TX_NORESP 0x2000
 
-static void IRAM_ATTR ps2_interrupt_handler(void *self_in);
-
-static void ps2_set_config(ps2io_ps2_obj_t* self) {
-    // turn on falling edge interrupt
-    gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE);
-    gpio_install_isr_service(ESP_INTR_FLAG_IRAM);
-    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
-}
-
-static void disable_interrupt(ps2io_ps2_obj_t* self) {
-    // turn off fallling edge interrupt
-    gpio_isr_handler_remove(self->clk_pin);
-}
-
-static void resume_interrupt(ps2io_ps2_obj_t* self) {
-    self->state = STATE_IDLE;
-    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
-}
-
-static void clk_hi(ps2io_ps2_obj_t* self) {
-    // external pull-up
-    gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT);
-    gpio_pullup_dis(self->clk_pin);
-}
-
-static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) {
-    clk_hi(self);
-    common_hal_mcu_delay_us(1);
-    while (gpio_get_level(self->clk_pin) && us) {
-        --us;
-        common_hal_mcu_delay_us(1);
-    }
-    return us;
-}
-
-static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) {
-    clk_hi(self);
-    common_hal_mcu_delay_us(1);
-    while (!gpio_get_level(self->clk_pin) && us) {
-        --us;
-        common_hal_mcu_delay_us(1);
-    }
-    return us;
-}
-
-static void clk_lo(ps2io_ps2_obj_t* self) {
-    gpio_pullup_dis(self->clk_pin);
-    gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT);
-    gpio_set_level(self->clk_pin, 0);
-}
-
-static void data_hi(ps2io_ps2_obj_t* self) {
-    // external pull-up
-    gpio_set_direction(self->data_pin, GPIO_MODE_INPUT);
-    gpio_pullup_dis(self->data_pin);
-}
-
-static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) {
-    data_hi(self);
-    common_hal_mcu_delay_us(1);
-    while (gpio_get_level(self->data_pin) && us) {
-        --us;
-        common_hal_mcu_delay_us(1);
-    }
-    return us;
-}
-
-static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) {
-    data_hi(self);
-    common_hal_mcu_delay_us(1);
-    while (!gpio_get_level(self->data_pin) && us) {
-        --us;
-        common_hal_mcu_delay_us(1);
-    }
-    return us;
-}
-
-static void data_lo(ps2io_ps2_obj_t* self) {
-    gpio_pullup_dis(self->data_pin);
-    gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT);
-    gpio_set_level(self->data_pin, 0);
-}
-
-static void idle(ps2io_ps2_obj_t* self) {
-    clk_hi(self);
-    data_hi(self);
-}
-
-static void inhibit(ps2io_ps2_obj_t* self) {
-    clk_lo(self);
-    data_hi(self);
+void ps2_reset(void) {
+    gpio_uninstall_isr_service();
 }
 
 static void delay_us(uint32_t t) {
     common_hal_mcu_delay_us(t);
 }
 
+/* interrupt handling */
+
 static void IRAM_ATTR ps2_interrupt_handler(void *self_in) {
     // Grab the current time first.
     uint64_t current_tick = port_get_raw_ticks(NULL);
@@ -222,11 +135,99 @@ static void IRAM_ATTR ps2_interrupt_handler(void *self_in) {
     }
 }
 
-void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self,
-        const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) {
+static void enable_interrupt(ps2io_ps2_obj_t* self) {
+    // turn on falling edge interrupt
+    gpio_install_isr_service(ESP_INTR_FLAG_IRAM);
+    gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE);
+    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
+}
+
+static void disable_interrupt(ps2io_ps2_obj_t* self) {
+    // turn off fallling edge interrupt
+    gpio_isr_handler_remove(self->clk_pin);
+}
+
+static void resume_interrupt(ps2io_ps2_obj_t* self) {
+    self->state = STATE_IDLE;
+    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
+}
+
+/* gpio handling */
+
+static void clk_hi(ps2io_ps2_obj_t* self) {
+    // external pull-up
+    gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT);
+}
+
+static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) {
+    clk_hi(self);
+    delay_us(1);
+    while (gpio_get_level(self->clk_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) {
+    clk_hi(self);
+    delay_us(1);
+    while (!gpio_get_level(self->clk_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static void clk_lo(ps2io_ps2_obj_t* self) {
+    gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT);
+    gpio_set_level(self->clk_pin, 0);
+}
+
+static void data_hi(ps2io_ps2_obj_t* self) {
+    // external pull-up
+    gpio_set_direction(self->data_pin, GPIO_MODE_INPUT);
+}
+
+static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) {
+    data_hi(self);
+    delay_us(1);
+    while (gpio_get_level(self->data_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) {
+    data_hi(self);
+    delay_us(1);
+    while (!gpio_get_level(self->data_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static void data_lo(ps2io_ps2_obj_t* self) {
+    gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT);
+    gpio_set_level(self->data_pin, 0);
+}
+
+static void idle(ps2io_ps2_obj_t* self) {
     clk_hi(self);
     data_hi(self);
+}
 
+static void inhibit(ps2io_ps2_obj_t* self) {
+    clk_lo(self);
+    data_hi(self);
+}
+
+/* ps2io module functions */
+
+void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self,
+        const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) {
     self->clk_pin = (gpio_num_t)clk_pin->number;
     self->data_pin = (gpio_num_t)data_pin->number;
     self->state = STATE_IDLE;
@@ -235,11 +236,11 @@ void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self,
     self->bufposw = 0;
     self->waiting_cmd_response = false;
 
+    idle(self);
+    enable_interrupt(self);
+
     claim_pin(clk_pin);
     claim_pin(data_pin);
-
-    // set config will enable the interrupt.
-    ps2_set_config(self);
 }
 
 bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) {
@@ -257,10 +258,6 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) {
     self->data_pin = GPIO_NUM_MAX;
 }
 
-void ps2_reset(void) {
-    gpio_uninstall_isr_service();
-}
-
 uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) {
     return self->bufcount;
 }
@@ -291,6 +288,8 @@ uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) {
 
 int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) {
     disable_interrupt(self);
+
+    /* terminate a transmission if we have */
     inhibit(self);
     delay_us(100);
 
@@ -321,6 +320,7 @@ int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) {
         }
     }
 
+    /* Parity bit */
     delay_us(15);
     if (parity) {
         data_hi(self);

From bc9036f35370fcd0e4806c42dd47a8c6bb42a085 Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Fri, 20 Nov 2020 00:15:30 +0530
Subject: [PATCH 07/16] use pointer to get nvs handle

---
 ports/esp32s2/common-hal/nvm/ByteArray.c | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c
index d90f7fbdc2..9f8ced3ec5 100644
--- a/ports/esp32s2/common-hal/nvm/ByteArray.c
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.c
@@ -27,14 +27,13 @@
 #include "common-hal/nvm/ByteArray.h"
 
 #include "py/runtime.h"
-
 #include "nvs_flash.h"
 
 uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) {
     return self->len;
 }
 
-static nvs_handle get_nvs_handle(void) {
+static void get_nvs_handle(nvs_handle_t * nvs_handle) {
     // Initialize NVS
     esp_err_t err = nvs_flash_init();
     if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
@@ -46,32 +45,31 @@ static nvs_handle get_nvs_handle(void) {
     ESP_ERROR_CHECK(err);
 
     // Open NVS handle
-    nvs_handle nvs_handle;
-    if (nvs_open("CPY", NVS_READWRITE, &nvs_handle) != ESP_OK) {
+    if (nvs_open("CPY", NVS_READWRITE, nvs_handle) != ESP_OK) {
         mp_raise_RuntimeError(translate("NVS Error"));
     }
-    return nvs_handle;
 }
 
 bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint8_t* values, uint32_t len) {
     char index[9];
-    sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR);
+    sprintf(index, "%i", start_index);
     // start nvs
-    nvs_handle handle = get_nvs_handle();
+    nvs_handle_t handle;
+    get_nvs_handle(&handle);
     bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK));
     // close nvs
     nvs_close(handle);
     return status;
 }
 
-// NVM memory is memory mapped so reading it is easy.
 void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint32_t len, uint8_t* values) {
     char index[9];
-    sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR);
+    sprintf(index, "%i", start_index);
     // start nvs
-    nvs_handle handle = get_nvs_handle();
+    nvs_handle_t handle;
+    get_nvs_handle(&handle);
     if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) {
         mp_raise_RuntimeError(translate("NVS Error"));
     }

From a25b27520d077424219832d764e9e59da6759562 Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Fri, 20 Nov 2020 00:22:00 +0530
Subject: [PATCH 08/16] update nvm implementation

---
 ports/esp32s2/common-hal/nvm/ByteArray.c | 40 ++++++++++++++++++++----
 1 file changed, 34 insertions(+), 6 deletions(-)

diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c
index 9f8ced3ec5..e304dd8302 100644
--- a/ports/esp32s2/common-hal/nvm/ByteArray.c
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.c
@@ -26,6 +26,8 @@
 
 #include "common-hal/nvm/ByteArray.h"
 
+#include <string.h>
+
 #include "py/runtime.h"
 #include "nvs_flash.h"
 
@@ -53,26 +55,52 @@ static void get_nvs_handle(nvs_handle_t * nvs_handle) {
 bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint8_t* values, uint32_t len) {
     char index[9];
-    sprintf(index, "%i", start_index);
+
+    uint8_t buffer[len];
+    memcpy(buffer, values, len);
+
     // start nvs
     nvs_handle_t handle;
     get_nvs_handle(&handle);
-    bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK));
+
+    // stage flash changes
+    for (uint32_t i = 0; i < len; i++) {
+        sprintf(index, "%i", start_index + i);
+        if (nvs_set_u8(handle, (const char *)index, buffer[i]) != ESP_OK) {
+            return false;
+        }
+    }
+
+    // commit flash changes
+    if (nvs_commit(handle) != ESP_OK) {
+        return false;
+    }
+
     // close nvs
     nvs_close(handle);
-    return status;
+    return true;
 }
 
 void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint32_t len, uint8_t* values) {
     char index[9];
-    sprintf(index, "%i", start_index);
+    uint8_t buffer[len];
+
     // start nvs
     nvs_handle_t handle;
     get_nvs_handle(&handle);
-    if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) {
-        mp_raise_RuntimeError(translate("NVS Error"));
+
+    // get from flash
+    for (uint32_t i = 0; i < len; i++) {
+        sprintf(index, "%i", start_index + i);
+        if (nvs_get_u8(handle, (const char *)index, &buffer[i]) != ESP_OK) {
+            mp_raise_RuntimeError(translate("NVS Error"));
+        }
     }
+
+    // set into values
+    memcpy(values, buffer, len);
+
     // close nvs
     nvs_close(handle);
 }

From 5351a93c70fcacc50a154edac0a6d6d1028296e0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 23 Nov 2020 13:39:14 +0700
Subject: [PATCH 09/16] update tinyusb to fix cdc connection race

issue is fixed in https://github.com/hathach/tinyusb/pull/557
---
 lib/tinyusb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/tinyusb b/lib/tinyusb
index 8b2c822557..b870d932e5 160000
--- a/lib/tinyusb
+++ b/lib/tinyusb
@@ -1 +1 @@
-Subproject commit 8b2c82255750488232eae72f3d5dcbacfd6227f3
+Subproject commit b870d932e5e1c6ece4227a5d49cc71e53a744149

From 2635132ce590a44e79dbee8230fe92dbba8e3667 Mon Sep 17 00:00:00 2001
From: Seth Kerr <skerr@aggies.ncat.edu>
Date: Mon, 23 Nov 2020 19:21:12 -0500
Subject: [PATCH 10/16] adding 'haxpress' kind of build for CP Sapling for use
 with SPI Flash

---
 .../boards/cp_sapling_m0_spiflash/board.c     | 40 ++++++++++++
 .../cp_sapling_m0_spiflash/mpconfigboard.h    | 62 +++++++++++++++++++
 .../cp_sapling_m0_spiflash/mpconfigboard.mk   | 33 ++++++++++
 .../boards/cp_sapling_m0_spiflash/pins.c      | 38 ++++++++++++
 .../atmel-samd/boards/icy-tree-sof-m0/board.c | 44 +++++++++++++
 .../boards/icy-tree-sof-m0/mpconfigboard.h    | 55 ++++++++++++++++
 .../boards/icy-tree-sof-m0/mpconfigboard.mk   | 24 +++++++
 .../atmel-samd/boards/icy-tree-sof-m0/pins.c  | 49 +++++++++++++++
 8 files changed, 345 insertions(+)
 create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c
 create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
 create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
 create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c
 create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/board.c
 create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h
 create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk
 create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/pins.c

diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c
new file mode 100644
index 0000000000..ce56366762
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "supervisor/shared/board.h"
+#include "hal/include/hal_gpio.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
new file mode 100644
index 0000000000..a129566d2d
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
@@ -0,0 +1,62 @@
+#define MICROPY_HW_BOARD_NAME "CP Sapling M0"
+#define MICROPY_HW_MCU_NAME "samd21e18"
+
+#define MICROPY_HW_NEOPIXEL (&pin_PA15)
+
+#define MICROPY_PORT_A        (0)
+#define MICROPY_PORT_B        (0)
+#define MICROPY_PORT_C        (0)
+
+#define SPI_FLASH_MOSI_PIN          &pin_PA18
+#define SPI_FLASH_MISO_PIN          &pin_PA17
+#define SPI_FLASH_SCK_PIN           &pin_PA19
+#define SPI_FLASH_CS_PIN            &pin_PA22
+
+#define IGNORE_PIN_PA02	    1
+#define IGNORE_PIN_PA03	    1
+#define IGNORE_PIN_PA04	    1
+#define IGNORE_PIN_PA05	    1
+#define IGNORE_PIN_PA06	    1
+#define IGNORE_PIN_PA07	    1
+#define IGNORE_PIN_PA12     1
+#define IGNORE_PIN_PA13     1
+#define IGNORE_PIN_PA14	    1
+#define IGNORE_PIN_PA20     1
+#define IGNORE_PIN_PA21     1
+// USB is always used internally so skip the pin objects for it.
+#define IGNORE_PIN_PA24     1
+#define IGNORE_PIN_PA25     1
+#define IGNORE_PIN_PA27     1
+#define IGNORE_PIN_PA28     1
+#define IGNORE_PIN_PA30     1
+#define IGNORE_PIN_PA31     1
+#define IGNORE_PIN_PB01     1
+#define IGNORE_PIN_PB02     1
+#define IGNORE_PIN_PB03     1
+#define IGNORE_PIN_PB04     1
+#define IGNORE_PIN_PB05     1
+#define IGNORE_PIN_PB06     1
+#define IGNORE_PIN_PB07     1
+#define IGNORE_PIN_PB08     1
+#define IGNORE_PIN_PB09     1
+#define IGNORE_PIN_PB10     1
+#define IGNORE_PIN_PB11     1
+#define IGNORE_PIN_PB12     1
+#define IGNORE_PIN_PB13     1
+#define IGNORE_PIN_PB14     1
+#define IGNORE_PIN_PB15     1
+#define IGNORE_PIN_PB16     1
+#define IGNORE_PIN_PB17     1
+#define IGNORE_PIN_PB22     1
+#define IGNORE_PIN_PB23     1
+#define IGNORE_PIN_PB30     1
+#define IGNORE_PIN_PB31     1
+#define IGNORE_PIN_PB00     1
+
+#define DEFAULT_I2C_BUS_SCL (&pin_PA09)
+#define DEFAULT_I2C_BUS_SDA (&pin_PA08)
+
+#define DEFAULT_SPI_BUS_SS (&pin_PA22)
+#define DEFAULT_SPI_BUS_SCK (&pin_PA19)
+#define DEFAULT_SPI_BUS_MOSI (&pin_PA18)
+#define DEFAULT_SPI_BUS_MISO (&pin_PA17)
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
new file mode 100644
index 0000000000..c81209db3b
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
@@ -0,0 +1,33 @@
+USB_VID = 0x1209
+USB_PID = 0x4DDD
+USB_PRODUCT = "CP Sapling"
+USB_MANUFACTURER = "Oak Development Technologies"
+
+CHIP_VARIANT = SAMD21E18A
+CHIP_FAMILY = samd21
+
+INTERNAL_FLASH_FILESYSTEM = 0
+LONGINT_IMPL = MPZ
+SPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = AT25DF081A
+
+CIRCUITPY_AUDIOIO = 0
+CIRCUITPY_AUDIOBUSIO = 0
+CIRCUITPY_BITBANGIO = 0
+CIRCUITPY_COUNTIO = 0
+CIRCUITPY_FREQUENCYIO = 0
+CIRCUITPY_I2CPERIPHERAL = 0
+
+SUPEROPT_GC = 0
+
+CFLAGS_BOARD = --param max-inline-insns-auto=15
+ifeq ($(TRANSLATION), zh_Latn_pinyin)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+endif
+ifeq ($(TRANSLATION), de_DE)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+SUPEROPT_VM = 0
+endif
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c
new file mode 100644
index 0000000000..d527aaddcb
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c
@@ -0,0 +1,38 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) },
+
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) },
+
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) },
+
+    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) },
+
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) },
+
+    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) },
+
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) },
+
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/board.c b/ports/atmel-samd/boards/icy-tree-sof-m0/board.c
new file mode 100644
index 0000000000..1a65a561f7
--- /dev/null
+++ b/ports/atmel-samd/boards/icy-tree-sof-m0/board.c
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "supervisor/shared/board.h"
+#include "hal/include/hal_gpio.h"
+
+void board_init(void) {
+    gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF);
+    gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT);
+    gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default
+    never_reset_pin_number(PIN_PA15);
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h
new file mode 100644
index 0000000000..713d2c03eb
--- /dev/null
+++ b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h
@@ -0,0 +1,55 @@
+#define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0"
+#define MICROPY_HW_MCU_NAME "samd21e18"
+
+#define MICROPY_HW_NEOPIXEL (&pin_PA18)
+
+#define MICROPY_PORT_A        (0)
+#define MICROPY_PORT_B        (0)
+#define MICROPY_PORT_C        (0)
+
+#define IGNORE_PIN_PA00     1
+#define IGNORE_PIN_PA01     1
+#define IGNORE_PIN_PA12     1
+#define IGNORE_PIN_PA13     1
+#define IGNORE_PIN_PA14     1
+#define IGNORE_PIN_PA20     1
+#define IGNORE_PIN_PA21     1
+// USB is always used internally so skip the pin objects for it.
+#define IGNORE_PIN_PA24     1
+#define IGNORE_PIN_PA25     1
+#define IGNORE_PIN_PA27     1
+#define IGNORE_PIN_PA28     1
+#define IGNORE_PIN_PA30     1
+#define IGNORE_PIN_PA31     1
+#define IGNORE_PIN_PB01     1
+#define IGNORE_PIN_PB02     1
+#define IGNORE_PIN_PB03     1
+#define IGNORE_PIN_PB04     1
+#define IGNORE_PIN_PB05     1
+#define IGNORE_PIN_PB06     1
+#define IGNORE_PIN_PB07     1
+#define IGNORE_PIN_PB08     1
+#define IGNORE_PIN_PB09     1
+#define IGNORE_PIN_PB10     1
+#define IGNORE_PIN_PB11     1
+#define IGNORE_PIN_PB12     1
+#define IGNORE_PIN_PB13     1
+#define IGNORE_PIN_PB14     1
+#define IGNORE_PIN_PB15     1
+#define IGNORE_PIN_PB16     1
+#define IGNORE_PIN_PB17     1
+#define IGNORE_PIN_PB22     1
+#define IGNORE_PIN_PB23     1
+#define IGNORE_PIN_PB30     1
+#define IGNORE_PIN_PB31     1
+#define IGNORE_PIN_PB00     1
+
+#define DEFAULT_I2C_BUS_SCL (&pin_PA17)
+#define DEFAULT_I2C_BUS_SDA (&pin_PA16)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_PA11)
+#define DEFAULT_SPI_BUS_MOSI (&pin_PA10)
+#define DEFAULT_SPI_BUS_MISO (&pin_PA09)
+
+#define DEFAULT_UART_BUS_RX (&pin_PA07)
+#define DEFAULT_UART_BUS_TX (&pin_PA06)
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk
new file mode 100644
index 0000000000..964cbe643a
--- /dev/null
+++ b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk
@@ -0,0 +1,24 @@
+USB_VID = 0x239A
+USB_PID = 0x80CC
+USB_PRODUCT = "QT Py M0"
+USB_MANUFACTURER = "Adafruit Industries LLC"
+
+CHIP_VARIANT = SAMD21E18A
+CHIP_FAMILY = samd21
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = NONE
+CIRCUITPY_FULL_BUILD = 0
+
+SUPEROPT_GC = 0
+
+CFLAGS_BOARD = --param max-inline-insns-auto=15
+ifeq ($(TRANSLATION), zh_Latn_pinyin)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+endif
+ifeq ($(TRANSLATION), de_DE)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+SUPEROPT_VM = 0
+endif
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c b/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c
new file mode 100644
index 0000000000..636c48bffc
--- /dev/null
+++ b/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c
@@ -0,0 +1,49 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) },
+
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA03) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) },
+
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA04) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) },
+
+    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) },
+
+    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA16) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) },
+
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) },
+
+    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) },
+
+    { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) },
+
+    { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA11) },
+    { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) },
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) },
+
+    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) },
+
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA10) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA15) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

From 0e628caa6f0697ee8747df50c6ad3bfd9a76e4f6 Mon Sep 17 00:00:00 2001
From: Seth Kerr <skerr@aggies.ncat.edu>
Date: Mon, 23 Nov 2020 19:23:22 -0500
Subject: [PATCH 11/16] forgot the build.yml files

---
 .github/workflows/build.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 8e72a40219..06cc49923d 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -199,6 +199,7 @@ jobs:
         - "clue_nrf52840_express"
         - "cp32-m4"
         - "cp_sapling_m0"
+        - "cp_sapling_m0_spiflash"
         - "datalore_ip_m4"
         - "datum_distance"
         - "datum_imu"

From e5cee989771f6c79b91e8c3a039d167bf7022fa4 Mon Sep 17 00:00:00 2001
From: Seth Kerr <skerr@aggies.ncat.edu>
Date: Mon, 23 Nov 2020 19:31:06 -0500
Subject: [PATCH 12/16] removing icy tree files/directory

---
 .../atmel-samd/boards/icy-tree-sof-m0/board.c | 44 ---------------
 .../boards/icy-tree-sof-m0/mpconfigboard.h    | 55 -------------------
 .../boards/icy-tree-sof-m0/mpconfigboard.mk   | 24 --------
 .../atmel-samd/boards/icy-tree-sof-m0/pins.c  | 49 -----------------
 4 files changed, 172 deletions(-)
 delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/board.c
 delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h
 delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk
 delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/pins.c

diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/board.c b/ports/atmel-samd/boards/icy-tree-sof-m0/board.c
deleted file mode 100644
index 1a65a561f7..0000000000
--- a/ports/atmel-samd/boards/icy-tree-sof-m0/board.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "boards/board.h"
-#include "common-hal/microcontroller/Pin.h"
-#include "supervisor/shared/board.h"
-#include "hal/include/hal_gpio.h"
-
-void board_init(void) {
-    gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF);
-    gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT);
-    gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default
-    never_reset_pin_number(PIN_PA15);
-}
-
-bool board_requests_safe_mode(void) {
-    return false;
-}
-
-void reset_board(void) {
-}
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h
deleted file mode 100644
index 713d2c03eb..0000000000
--- a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h
+++ /dev/null
@@ -1,55 +0,0 @@
-#define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0"
-#define MICROPY_HW_MCU_NAME "samd21e18"
-
-#define MICROPY_HW_NEOPIXEL (&pin_PA18)
-
-#define MICROPY_PORT_A        (0)
-#define MICROPY_PORT_B        (0)
-#define MICROPY_PORT_C        (0)
-
-#define IGNORE_PIN_PA00     1
-#define IGNORE_PIN_PA01     1
-#define IGNORE_PIN_PA12     1
-#define IGNORE_PIN_PA13     1
-#define IGNORE_PIN_PA14     1
-#define IGNORE_PIN_PA20     1
-#define IGNORE_PIN_PA21     1
-// USB is always used internally so skip the pin objects for it.
-#define IGNORE_PIN_PA24     1
-#define IGNORE_PIN_PA25     1
-#define IGNORE_PIN_PA27     1
-#define IGNORE_PIN_PA28     1
-#define IGNORE_PIN_PA30     1
-#define IGNORE_PIN_PA31     1
-#define IGNORE_PIN_PB01     1
-#define IGNORE_PIN_PB02     1
-#define IGNORE_PIN_PB03     1
-#define IGNORE_PIN_PB04     1
-#define IGNORE_PIN_PB05     1
-#define IGNORE_PIN_PB06     1
-#define IGNORE_PIN_PB07     1
-#define IGNORE_PIN_PB08     1
-#define IGNORE_PIN_PB09     1
-#define IGNORE_PIN_PB10     1
-#define IGNORE_PIN_PB11     1
-#define IGNORE_PIN_PB12     1
-#define IGNORE_PIN_PB13     1
-#define IGNORE_PIN_PB14     1
-#define IGNORE_PIN_PB15     1
-#define IGNORE_PIN_PB16     1
-#define IGNORE_PIN_PB17     1
-#define IGNORE_PIN_PB22     1
-#define IGNORE_PIN_PB23     1
-#define IGNORE_PIN_PB30     1
-#define IGNORE_PIN_PB31     1
-#define IGNORE_PIN_PB00     1
-
-#define DEFAULT_I2C_BUS_SCL (&pin_PA17)
-#define DEFAULT_I2C_BUS_SDA (&pin_PA16)
-
-#define DEFAULT_SPI_BUS_SCK (&pin_PA11)
-#define DEFAULT_SPI_BUS_MOSI (&pin_PA10)
-#define DEFAULT_SPI_BUS_MISO (&pin_PA09)
-
-#define DEFAULT_UART_BUS_RX (&pin_PA07)
-#define DEFAULT_UART_BUS_TX (&pin_PA06)
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk
deleted file mode 100644
index 964cbe643a..0000000000
--- a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-USB_VID = 0x239A
-USB_PID = 0x80CC
-USB_PRODUCT = "QT Py M0"
-USB_MANUFACTURER = "Adafruit Industries LLC"
-
-CHIP_VARIANT = SAMD21E18A
-CHIP_FAMILY = samd21
-
-INTERNAL_FLASH_FILESYSTEM = 1
-LONGINT_IMPL = NONE
-CIRCUITPY_FULL_BUILD = 0
-
-SUPEROPT_GC = 0
-
-CFLAGS_BOARD = --param max-inline-insns-auto=15
-ifeq ($(TRANSLATION), zh_Latn_pinyin)
-RELEASE_NEEDS_CLEAN_BUILD = 1
-CFLAGS_INLINE_LIMIT = 35
-endif
-ifeq ($(TRANSLATION), de_DE)
-RELEASE_NEEDS_CLEAN_BUILD = 1
-CFLAGS_INLINE_LIMIT = 35
-SUPEROPT_VM = 0
-endif
diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c b/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c
deleted file mode 100644
index 636c48bffc..0000000000
--- a/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c
+++ /dev/null
@@ -1,49 +0,0 @@
-#include "shared-bindings/board/__init__.h"
-
-STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) },
-    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) },
-
-    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA03) },
-    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) },
-
-    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA04) },
-    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) },
-
-    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) },
-    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) },
-
-    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA16) },
-    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) },
-
-    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA17) },
-    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) },
-
-    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) },
-    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) },
-    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) },
-
-    { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) },
-    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) },
-    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) },
-
-    { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA11) },
-    { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) },
-    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) },
-
-    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) },
-    { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) },
-    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) },
-
-    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA10) },
-    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) },
-    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA10) },
-
-    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA18) },
-    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA15) },
-
-    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
-};
-MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

From 6ff24410ebe9e75456b9d5d64f37fbe019caf42c Mon Sep 17 00:00:00 2001
From: microDev <70126934+microDev1@users.noreply.github.com>
Date: Tue, 24 Nov 2020 11:44:11 +0530
Subject: [PATCH 13/16] use values pointer directly

---
 ports/esp32s2/common-hal/nvm/ByteArray.c | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c
index e304dd8302..71321e7e65 100644
--- a/ports/esp32s2/common-hal/nvm/ByteArray.c
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.c
@@ -26,8 +26,6 @@
 
 #include "common-hal/nvm/ByteArray.h"
 
-#include <string.h>
-
 #include "py/runtime.h"
 #include "nvs_flash.h"
 
@@ -56,9 +54,6 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint8_t* values, uint32_t len) {
     char index[9];
 
-    uint8_t buffer[len];
-    memcpy(buffer, values, len);
-
     // start nvs
     nvs_handle_t handle;
     get_nvs_handle(&handle);
@@ -66,7 +61,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
     // stage flash changes
     for (uint32_t i = 0; i < len; i++) {
         sprintf(index, "%i", start_index + i);
-        if (nvs_set_u8(handle, (const char *)index, buffer[i]) != ESP_OK) {
+        if (nvs_set_u8(handle, (const char *)index, values[i]) != ESP_OK) {
             return false;
         }
     }
@@ -84,7 +79,6 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
 void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
         uint32_t start_index, uint32_t len, uint8_t* values) {
     char index[9];
-    uint8_t buffer[len];
 
     // start nvs
     nvs_handle_t handle;
@@ -93,14 +87,11 @@ void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
     // get from flash
     for (uint32_t i = 0; i < len; i++) {
         sprintf(index, "%i", start_index + i);
-        if (nvs_get_u8(handle, (const char *)index, &buffer[i]) != ESP_OK) {
+        if (nvs_get_u8(handle, (const char *)index, &values[i]) != ESP_OK) {
             mp_raise_RuntimeError(translate("NVS Error"));
         }
     }
 
-    // set into values
-    memcpy(values, buffer, len);
-
     // close nvs
     nvs_close(handle);
 }

From 686edcef3f392ce96ae86bd66e91b6c93f2f986f Mon Sep 17 00:00:00 2001
From: Seth Kerr <skerr@aggies.ncat.edu>
Date: Tue, 24 Nov 2020 07:41:32 -0500
Subject: [PATCH 14/16] fixing PID issues with CI Test (whoops)

---
 .../atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h  | 2 +-
 .../atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
index a129566d2d..9c69c48026 100644
--- a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
@@ -1,4 +1,4 @@
-#define MICROPY_HW_BOARD_NAME "CP Sapling M0"
+#define MICROPY_HW_BOARD_NAME "CP Sapling M0 w/ SPI Flash"
 #define MICROPY_HW_MCU_NAME "samd21e18"
 
 #define MICROPY_HW_NEOPIXEL (&pin_PA15)
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
index c81209db3b..99e13f7910 100644
--- a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
@@ -1,6 +1,6 @@
 USB_VID = 0x1209
-USB_PID = 0x4DDD
-USB_PRODUCT = "CP Sapling"
+USB_PID = 0x4DDE
+USB_PRODUCT = "CP Sapling M0 w/ SPI Flash"
 USB_MANUFACTURER = "Oak Development Technologies"
 
 CHIP_VARIANT = SAMD21E18A

From bafa0501d17eb55726a8decfe19d6f055190d6b1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 24 Nov 2020 22:06:59 +0700
Subject: [PATCH 15/16] update to have tud_connected()

---
 lib/tinyusb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/tinyusb b/lib/tinyusb
index b870d932e5..218b80e63a 160000
--- a/lib/tinyusb
+++ b/lib/tinyusb
@@ -1 +1 @@
-Subproject commit b870d932e5e1c6ece4227a5d49cc71e53a744149
+Subproject commit 218b80e63ab6ff87c1851e403f08b3d716d68f5e

From c451b22255706989f58cfd88be486e5117979a28 Mon Sep 17 00:00:00 2001
From: Jeff Epler <jepler@gmail.com>
Date: Tue, 24 Nov 2020 10:26:47 -0600
Subject: [PATCH 16/16] Disable 3-arg pow() function on m0 boards

`pow(a, b, c)` can compute `(a ** b) % c` efficiently (in time and memory).
This can be useful for extremely specific applications, like implementing
the RSA cryptosystem.  For typical uses of CircuitPython, this is not an
important feature.  A survey of the bundle and learn system didn't find
any uses.

Disable it on M0 builds so that we can fit in needed upgrades to the USB
stack.
---
 ports/atmel-samd/mpconfigport.mk | 4 ++++
 py/circuitpy_mpconfig.h          | 2 +-
 py/circuitpy_mpconfig.mk         | 3 +++
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk
index 1929e146d3..17e3995bf5 100644
--- a/ports/atmel-samd/mpconfigport.mk
+++ b/ports/atmel-samd/mpconfigport.mk
@@ -29,6 +29,10 @@ ifndef CIRCUITPY_AUDIOMP3
 CIRCUITPY_AUDIOMP3 = 0
 endif
 
+ifndef CIRCUITPY_BUILTINS_POW3
+CIRCUITPY_BUILTINS_POW3 = 0
+endif
+
 ifndef CIRCUITPY_FREQUENCYIO
 CIRCUITPY_FREQUENCYIO = 0
 endif
diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h
index 85e152670a..28fd4095c4 100644
--- a/py/circuitpy_mpconfig.h
+++ b/py/circuitpy_mpconfig.h
@@ -184,7 +184,7 @@ typedef long mp_off_t;
 // Turning off FULL_BUILD removes some functionality to reduce flash size on tiny SAMD21s
 #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (CIRCUITPY_FULL_BUILD)
 #define MICROPY_CPYTHON_COMPAT                (CIRCUITPY_FULL_BUILD)
-#define MICROPY_PY_BUILTINS_POW3              (CIRCUITPY_FULL_BUILD)
+#define MICROPY_PY_BUILTINS_POW3              (CIRCUITPY_BUILTINS_POW3)
 #define MICROPY_COMP_FSTRING_LITERAL          (MICROPY_CPYTHON_COMPAT)
 #define MICROPY_MODULE_WEAK_LINKS             (0)
 #define MICROPY_PY_ALL_SPECIAL_METHODS        (CIRCUITPY_FULL_BUILD)
diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk
index a6aabec33d..08e7737180 100644
--- a/py/circuitpy_mpconfig.mk
+++ b/py/circuitpy_mpconfig.mk
@@ -90,6 +90,9 @@ CFLAGS += -DCIRCUITPY_BLEIO=$(CIRCUITPY_BLEIO)
 CIRCUITPY_BOARD ?= 1
 CFLAGS += -DCIRCUITPY_BOARD=$(CIRCUITPY_BOARD)
 
+CIRCUITPY_BUILTINS_POW3 ?= $(CIRCUITPY_FULL_BUILD)
+CFLAGS += -DCIRCUITPY_BUILTINS_POW3=$(CIRCUITPY_BUILTINS_POW3)
+
 CIRCUITPY_BUSIO ?= 1
 CFLAGS += -DCIRCUITPY_BUSIO=$(CIRCUITPY_BUSIO)