m4 pulseout works

main.c

@@ -146,6 +146,7 @@ bool start_mp(safe_mode_t safe_mode) {
         const char *supported_filenames[] = STRING_LIST("code.txt", "code.py", "main.py", "main.txt");
         const char *double_extension_filenames[] = STRING_LIST("code.txt.py", "code.py.txt", "code.txt.txt","code.py.py",
                                                     "main.txt.py", "main.py.txt", "main.txt.txt","main.py.py");
+        reset_mp();
         found_main = maybe_run_list(supported_filenames, &result);
         if (!found_main){
             found_main = maybe_run_list(double_extension_filenames, &result);
@@ -156,7 +157,6 @@ bool start_mp(safe_mode_t safe_mode) {
 
         reset_port();
         reset_board();
-        reset_mp();
         reset_status_led();
 
         if (result.return_code & PYEXEC_FORCED_EXIT) {
@@ -300,6 +300,7 @@ int __attribute__((used)) main(void) {
     bool first_run = true;
     for (;;) {
         if (!skip_repl) {
+            reset_mp();
             autoreload_suspend();
             new_status_color(REPL_RUNNING);
             if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) {
@@ -310,7 +311,6 @@ int __attribute__((used)) main(void) {
             autoreload_resume();
             reset_port();
             reset_board();
-            reset_mp();
         }
         if (exit_code == PYEXEC_FORCED_EXIT) {
             if (!first_run) {

ports/atmel-samd/Makefile

@@ -95,7 +95,7 @@ endif
 ifeq ($(DEBUG), 1)
   # Turn on Python modules useful for debugging (e.g. uheap, ustack).
   CFLAGS += -ggdb
-  CFLAGS += -flto
+  #CFLAGS += -flto
   ifeq ($(CHIP_FAMILY), samd21)
     CFLAGS += -DENABLE_MICRO_TRACE_BUFFER
   endif

ports/atmel-samd/common-hal/pulseio/PWMOut.c

@@ -293,7 +293,11 @@ extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self,
         #ifdef SAMD51
         Tc* tc = tc_insts[t->index];
         while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {
-            // Wait for a previous value to be written.
+            // Wait for a previous value to be written. This can wait up to one period so we do
+            // other stuff in the meantime.
+            #ifdef MICROPY_VM_HOOK_LOOP
+                MICROPY_VM_HOOK_LOOP
+            #endif
         }
         tc->COUNT16.CCBUF[1].reg = adjusted_duty;
         #endif
@@ -302,7 +306,11 @@ extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self,
         uint8_t channel = tcc_channel(t);
         Tcc* tcc = tcc_insts[t->index];
         while ((tcc->SYNCBUSY.vec.CC & (1 << channel)) != 0) {
-            // Wait for a previous value to be written.
+            // Wait for a previous value to be written. This can wait up to one period so we do
+            // other stuff in the meantime.
+            #ifdef MICROPY_VM_HOOK_LOOP
+                MICROPY_VM_HOOK_LOOP
+            #endif
         }
         #ifdef SAMD21
         tcc->CCB[channel].reg = adjusted_duty;

ports/atmel-samd/common-hal/pulseio/PulseOut.c

@@ -185,6 +185,8 @@ void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pu
     Tc* tc = tc_insts[pulseout_tc_index];
     tc->COUNT16.CC[0].reg = current_compare;
 
+    // Clear our interrupt in case it was set earlier
+    tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0;
     tc->COUNT16.INTENSET.reg = TC_INTENSET_MC0;
     tc_enable_interrupts(pulseout_tc_index);
     turn_on(active_pincfg);

ports/atmel-samd/timers.c

@@ -35,6 +35,10 @@
 #include "hpl/gclk/hpl_gclk_base.h"
 #endif
 
+#ifdef SAMD51
+#include "hri/hri_gclk_d51.h"
+#endif
+
 // This bitmask keeps track of which channels of a TCC are currently claimed.
 #ifdef SAMD21
 const uint8_t tcc_cc_num[3] = {4, 2, 2};
@@ -51,7 +55,7 @@ const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC3_GCLK_ID,
 const uint8_t tcc_gclk_ids[3] = {TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID};
 #endif
 #ifdef SAMD51
-static const uint8_t tcc_cc_num[5] = {6, 4, 3, 2, 2};
+const uint8_t tcc_cc_num[5] = {6, 4, 3, 2, 2};
 const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC0_GCLK_ID,
                                           TC1_GCLK_ID,
                                           TC2_GCLK_ID,
@@ -228,6 +232,13 @@ void shared_timer_handler(bool is_tc, uint8_t index) {
     }
 }
 
+#ifdef SAMD51
+#define TC_OFFSET 0
+#endif
+#ifdef SAMD21
+#define TC_OFFSET 0
+#endif
+
 void TCC0_Handler(void) {
     shared_timer_handler(false, 0);
 }
@@ -237,22 +248,38 @@ void TCC1_Handler(void) {
 void TCC2_Handler(void) {
     shared_timer_handler(false, 2);
 }
-void TC3_Handler(void) {
+// TC0 - TC2 only exist on the SAMD51
+#ifdef TC0
+void TC0_Handler(void) {
     shared_timer_handler(true, 0);
 }
-void TC4_Handler(void) {
+#endif
+#ifdef TC1
+void TC1_Handler(void) {
     shared_timer_handler(true, 1);
 }
-void TC5_Handler(void) {
+#endif
+#ifdef TC2
+void TC2_Handler(void) {
     shared_timer_handler(true, 2);
 }
+#endif
+void TC3_Handler(void) {
+    shared_timer_handler(true, 3 - TC_OFFSET);
+}
+void TC4_Handler(void) {
+    shared_timer_handler(true, 4 - TC_OFFSET);
+}
+void TC5_Handler(void) {
+    shared_timer_handler(true, 5 - TC_OFFSET);
+}
 #ifdef TC6
 void TC6_Handler(void) {
-    shared_timer_handler(true, 3);
+    shared_timer_handler(true, 6 - TC_OFFSET);
 }
 #endif
 #ifdef TC7
 void TC7_Handler(void) {
-    shared_timer_handler(true, 4);
+    shared_timer_handler(true, 7 - TC_OFFSET);
 }
 #endif

ports/atmel-samd/timers.h

@@ -34,7 +34,7 @@ const uint8_t tc_gclk_ids[TC_INST_NUM];
 const uint8_t tcc_gclk_ids[3];
 #endif
 #ifdef SAMD51
-static const uint8_t tcc_cc_num[5];
+const uint8_t tcc_cc_num[5];
 const uint8_t tc_gclk_ids[TC_INST_NUM];
 const uint8_t tcc_gclk_ids[5];
 #endif