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Merge pull request #3099 from hierophect/stm32-timer-allocator

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STM32: Add timer allocator, PulseIO adjustments
This commit is contained in:
hierophect 2020-07-24 11:16:39 -04:00 committed by GitHub
commit c735dceed5
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GPG Key ID: 4AEE18F83AFDEB23
27 changed files with 1021 additions and 898 deletions
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2
lib/protomatter

@ -1 +1 @@
Subproject commit 9f71088d2c32206c6f0495704ae0c040426d5764
Subproject commit 761d6437e8cd6a131d51de96974337121a9c7164

13
locale/circuitpython.pot
View File

@ -316,7 +316,7 @@ msgstr ""
#: ports/cxd56/common-hal/pulseio/PulseOut.c
#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c
#: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c
#: shared-bindings/pulseio/PWMOut.c
#: ports/stm/peripherals/timers.c shared-bindings/pulseio/PWMOut.c
msgid "All timers in use"
msgstr ""
@ -1332,11 +1332,7 @@ msgstr ""
msgid "Pull not used when direction is output."
msgstr ""
#: ports/stm/common-hal/pulseio/PulseIn.c
msgid "PulseIn not supported on this chip"
msgstr ""
#: ports/stm/common-hal/pulseio/PulseOut.c
#: ports/stm/ref/pulseout-pre-timeralloc.c
msgid "PulseOut not supported on this chip"
msgstr ""
@ -1545,6 +1541,11 @@ msgstr ""
msgid "Timeout is too long: Maximum timeout length is %d seconds"
msgstr ""
#: ports/stm/common-hal/pulseio/PWMOut.c
msgid ""
"Timer was reserved for internal use - declare PWM pins earlier in the program"
msgstr ""
#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c
msgid "Too many channels in sample."
msgstr ""

1
ports/stm/Makefile
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@ -207,6 +207,7 @@ SRC_C += \
mphalport.c \
boards/$(BOARD)/board.c \
boards/$(BOARD)/pins.c \
peripherals/timers.c \
peripherals/stm32$(MCU_SERIES_LOWER)/clocks.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/pins.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/gpio.c \

4
ports/stm/common-hal/analogio/AnalogIn.c
View File

@ -29,7 +29,7 @@
#include "py/runtime.h"
#include "supervisor/shared/translate.h"
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "stm32f4xx_hal.h"
#include "stm32f4xx_ll_gpio.h"
@ -57,7 +57,7 @@ void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self,
} else {
mp_raise_ValueError(translate("Invalid ADC Unit value"));
}
claim_pin(pin);
common_hal_mcu_pin_claim(pin);
self->pin = pin;
}

2
ports/stm/common-hal/analogio/AnalogOut.c
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@ -86,7 +86,7 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self,
dac_on[self->dac_index] = true;
self->pin = pin;
claim_pin(pin);
common_hal_mcu_pin_claim(pin);
#endif
}

6
ports/stm/common-hal/busio/I2C.c
View File

@ -32,7 +32,7 @@
#include "shared-bindings/microcontroller/__init__.h"
#include "supervisor/shared/translate.h"
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Pin.h"
// I2C timing specs for the H7 and F7
// Configured for maximum possible clock settings for the family
@ -161,8 +161,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
if (HAL_I2C_Init(&(self->handle)) != HAL_OK) {
mp_raise_RuntimeError(translate("I2C Init Error"));
}
claim_pin(sda);
claim_pin(scl);
common_hal_mcu_pin_claim(sda);
common_hal_mcu_pin_claim(scl);
}
void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) {

8
ports/stm/common-hal/busio/SPI.c
View File

@ -33,7 +33,7 @@
#include "shared-bindings/microcontroller/__init__.h"
#include "boards/board.h"
#include "supervisor/shared/translate.h"
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Pin.h"
// Note that any bugs introduced in this file can cause crashes at startup
// for chips using external SPI flash.
@ -233,12 +233,12 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
self->phase = 0;
self->bits = 8;
claim_pin(sck);
common_hal_mcu_pin_claim(sck);
if (self->mosi != NULL) {
claim_pin(mosi);
common_hal_mcu_pin_claim(mosi);
}
if (self->miso != NULL) {
claim_pin(miso);
common_hal_mcu_pin_claim(miso);
}
}

5
ports/stm/common-hal/busio/UART.c
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@ -25,6 +25,7 @@
*/
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/busio/UART.h"
#include "mpconfigport.h"
@ -224,10 +225,10 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
mp_raise_ValueError(translate("UART Buffer allocation error"));
}
}
claim_pin(rx);
common_hal_mcu_pin_claim(rx);
}
if (self->tx != NULL) {
claim_pin(tx);
common_hal_mcu_pin_claim(tx);
}
self->baudrate = baudrate;
self->timeout_ms = timeout * 1000;

3
ports/stm/common-hal/digitalio/DigitalInOut.c
View File

@ -26,6 +26,7 @@
*/
#include "shared-bindings/digitalio/DigitalInOut.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "py/runtime.h"
#include "supervisor/shared/translate.h"
@ -46,7 +47,7 @@ void common_hal_digitalio_digitalinout_never_reset(
digitalinout_result_t common_hal_digitalio_digitalinout_construct(
digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) {
claim_pin(pin);
common_hal_mcu_pin_claim(pin);
self->pin = pin;
GPIO_InitTypeDef GPIO_InitStruct = {0};

19
ports/stm/common-hal/microcontroller/Pin.c
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@ -89,6 +89,8 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) {
void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number) {
never_reset_pins[pin_port] |= 1<<pin_number;
// Make sure never reset pins are also always claimed
claimed_pins[pin_port] |= 1<<pin_number;
}
void common_hal_never_reset_pin(const mcu_pin_obj_t* pin) {
@ -99,15 +101,9 @@ void common_hal_reset_pin(const mcu_pin_obj_t* pin) {
reset_pin_number(pin->port, pin->number);
}
void claim_pin(const mcu_pin_obj_t* pin) {
void claim_pin(uint8_t pin_port, uint8_t pin_number) {
// Set bit in claimed_pins bitmask.
claimed_pins[pin->port] |= 1<<pin->number;
#ifdef MICROPY_HW_NEOPIXEL
if (pin == MICROPY_HW_NEOPIXEL) {
neopixel_in_use = true;
}
#endif
claimed_pins[pin_port] |= 1<<pin_number;
}
bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number) {
@ -137,7 +133,12 @@ uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t* pin) {
}
void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) {
claim_pin(pin);
claim_pin(pin->port, pin->number);
#ifdef MICROPY_HW_NEOPIXEL
if (pin == MICROPY_HW_NEOPIXEL) {
neopixel_in_use = true;
}
#endif
}
void common_hal_mcu_pin_reset_number(uint8_t pin_no) {

2
ports/stm/common-hal/microcontroller/Pin.h
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@ -43,7 +43,7 @@ void reset_all_pins(void);
// reset_pin_number takes the pin number instead of the pointer so that objects don't
// need to store a full pointer.
void reset_pin_number(uint8_t pin_port, uint8_t pin_number);
void claim_pin(const mcu_pin_obj_t* pin);
void claim_pin(uint8_t pin_port, uint8_t pin_number);
bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number);
void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number);
GPIO_TypeDef * pin_port(uint8_t pin_port);

180
ports/stm/common-hal/pulseio/PWMOut.c
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@ -33,7 +33,9 @@
#include "shared-bindings/microcontroller/__init__.h"
#include STM32_HAL_H
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "timers.h"
#define ALL_CLOCKS 0xFFFF
@ -41,32 +43,6 @@ STATIC uint8_t reserved_tim[TIM_BANK_ARRAY_LEN];
STATIC uint32_t tim_frequencies[TIM_BANK_ARRAY_LEN];
STATIC bool never_reset_tim[TIM_BANK_ARRAY_LEN];
STATIC void tim_clock_enable(uint16_t mask);
STATIC void tim_clock_disable(uint16_t mask);
// Get the frequency (in Hz) of the source clock for the given timer.
// On STM32F405/407/415/417 there are 2 cases for how the clock freq is set.
// If the APB prescaler is 1, then the timer clock is equal to its respective
// APB clock. Otherwise (APB prescaler > 1) the timer clock is twice its
// respective APB clock. See DM00031020 Rev 4, page 115.
STATIC uint32_t timer_get_source_freq(uint32_t tim_id) {
uint32_t source, clk_div;
if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) {
// TIM{1,8,9,10,11} are on APB2
source = HAL_RCC_GetPCLK2Freq();
clk_div = RCC->CFGR & RCC_CFGR_PPRE2;
} else {
// TIM{2,3,4,5,6,7,12,13,14} are on APB1
source = HAL_RCC_GetPCLK1Freq();
clk_div = RCC->CFGR & RCC_CFGR_PPRE1;
}
if (clk_div != 0) {
// APB prescaler for this timer is > 1
source *= 2;
}
return source;
}
STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) {
//duty cycle is duty/0xFFFF fraction x (number of pulses per period)
return (duty*period) / ((1 << 16) - 1);
@ -97,7 +73,6 @@ void pwmout_reset(void) {
never_reset_mask |= 1 << i;
}
}
tim_clock_disable(ALL_CLOCKS & ~(never_reset_mask));
}
pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
@ -107,6 +82,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
bool variable_frequency) {
TIM_TypeDef * TIMx;
uint8_t tim_num = MP_ARRAY_SIZE(mcu_tim_pin_list);
bool tim_taken_internal = false;
bool tim_chan_taken = false;
bool tim_taken_f_mismatch = false;
bool var_freq_mismatch = false;
@ -119,8 +95,13 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
//if pin is same
if (l_tim->pin == pin) {
//check if the timer has a channel active
//check if the timer has a channel active, or is reserved by main timer system
if (reserved_tim[l_tim_index] != 0) {
// Timer has already been reserved by an internal module
if (stm_peripherals_timer_is_reserved(mcu_tim_banks[l_tim_index])) {
tim_taken_internal = true;
continue; //keep looking
}
//is it the same channel? (or all channels reserved by a var-freq)
if (reserved_tim[l_tim_index] & 1 << (l_tim_channel)) {
tim_chan_taken = true;
@ -155,9 +136,12 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
reserved_tim[self->tim->tim_index - 1] |= 1 << (self->tim->channel_index - 1);
}
tim_frequencies[self->tim->tim_index - 1] = frequency;
stm_peripherals_timer_reserve(TIMx);
} else { //no match found
if (tim_chan_taken) {
mp_raise_ValueError(translate("No more timers available on this pin."));
} else if (tim_taken_internal) {
mp_raise_ValueError(translate("Timer was reserved for internal use - declare PWM pins earlier in the program"));
} else if (tim_taken_f_mismatch) {
mp_raise_ValueError(translate("Frequency must match existing PWMOut using this timer"));
} else if (var_freq_mismatch) {
@ -182,8 +166,8 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
uint32_t prescaler = 0; //prescaler is 15 bit
uint32_t period = 0; //period is 16 bit
timer_get_optimal_divisors(&period, &prescaler, frequency,
timer_get_source_freq(self->tim->tim_index));
uint32_t source_freq = stm_peripherals_timer_get_source_freq(TIMx);
timer_get_optimal_divisors(&period, &prescaler, frequency, source_freq);
//Timer init
self->handle.Instance = TIMx;
@ -260,7 +244,7 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) {
//if reserved timer has no active channels, we can disable it
if (!reserved_tim[self->tim->tim_index - 1]) {
tim_frequencies[self->tim->tim_index - 1] = 0x00;
tim_clock_disable(1 << (self->tim->tim_index - 1));
stm_peripherals_timer_free(self->handle.Instance);
}
}
@ -282,8 +266,8 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_
uint32_t prescaler = 0;
uint32_t period = 0;
timer_get_optimal_divisors(&period, &prescaler, frequency,
timer_get_source_freq(self->tim->tim_index));
uint32_t source_freq = stm_peripherals_timer_get_source_freq(self->handle.Instance);
timer_get_optimal_divisors(&period, &prescaler, frequency, source_freq);
//shut down
HAL_TIM_PWM_Stop(&self->handle, self->channel);
@ -318,131 +302,3 @@ uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) {
bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) {
return self->variable_frequency;
}
STATIC void tim_clock_enable(uint16_t mask) {
#ifdef TIM1
if (mask & (1 << 0)) {
__HAL_RCC_TIM1_CLK_ENABLE();
}
#endif
#ifdef TIM2
if (mask & (1 << 1)) {
__HAL_RCC_TIM2_CLK_ENABLE();
}
#endif
#ifdef TIM3
if (mask & (1 << 2)) {
__HAL_RCC_TIM3_CLK_ENABLE();
}
#endif
#ifdef TIM4
if (mask & (1 << 3)) {
__HAL_RCC_TIM4_CLK_ENABLE();
}
#endif
#ifdef TIM5
if (mask & (1 << 4)) {
__HAL_RCC_TIM5_CLK_ENABLE();
}
#endif
//6 and 7 are reserved ADC timers
#ifdef TIM8
if (mask & (1 << 7)) {
__HAL_RCC_TIM8_CLK_ENABLE();
}
#endif
#ifdef TIM9
if (mask & (1 << 8)) {
__HAL_RCC_TIM9_CLK_ENABLE();
}
#endif
#ifdef TIM10
if (mask & (1 << 9)) {
__HAL_RCC_TIM10_CLK_ENABLE();
}
#endif
#ifdef TIM11
if (mask & (1 << 10)) {
__HAL_RCC_TIM11_CLK_ENABLE();
}
#endif
#ifdef TIM12
if (mask & (1 << 11)) {
__HAL_RCC_TIM12_CLK_ENABLE();
}
#endif
#ifdef TIM13
if (mask & (1 << 12)) {
__HAL_RCC_TIM13_CLK_ENABLE();
}
#endif
#ifdef TIM14
if (mask & (1 << 13)) {
__HAL_RCC_TIM14_CLK_ENABLE();
}
#endif
}
STATIC void tim_clock_disable(uint16_t mask) {
#ifdef TIM1
if (mask & (1 << 0)) {
__HAL_RCC_TIM1_CLK_DISABLE();
}
#endif
#ifdef TIM2
if (mask & (1 << 1)) {
__HAL_RCC_TIM2_CLK_DISABLE();
}
#endif
#ifdef TIM3
if (mask & (1 << 2)) {
__HAL_RCC_TIM3_CLK_DISABLE();
}
#endif
#ifdef TIM4
if (mask & (1 << 3)) {
__HAL_RCC_TIM4_CLK_DISABLE();
}
#endif
#ifdef TIM5
if (mask & (1 << 4)) {
__HAL_RCC_TIM5_CLK_DISABLE();
}
#endif
//6 and 7 are reserved ADC timers
#ifdef TIM8
if (mask & (1 << 7)) {
__HAL_RCC_TIM8_CLK_DISABLE();
}
#endif
#ifdef TIM9
if (mask & (1 << 8)) {
__HAL_RCC_TIM9_CLK_DISABLE();
}
#endif
#ifdef TIM10
if (mask & (1 << 9)) {
__HAL_RCC_TIM10_CLK_DISABLE();
}
#endif
#ifdef TIM11
if (mask & (1 << 10)) {
__HAL_RCC_TIM11_CLK_DISABLE();
}
#endif
#ifdef TIM12
if (mask & (1 << 11)) {
__HAL_RCC_TIM12_CLK_DISABLE();
}
#endif
#ifdef TIM13
if (mask & (1 << 12)) {
__HAL_RCC_TIM13_CLK_DISABLE();
}
#endif
#ifdef TIM14
if (mask & (1 << 13)) {
__HAL_RCC_TIM14_CLK_DISABLE();
}
#endif
}

84
ports/stm/common-hal/pulseio/PulseIn.c
View File

@ -31,40 +31,38 @@
#include "py/gc.h"
#include "py/runtime.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/pulseio/PulseIn.h"
#include "timers.h"
#include STM32_HAL_H
#define STM32_GPIO_PORT_SIZE 16
static pulseio_pulsein_obj_t* _objs[STM32_GPIO_PORT_SIZE];
STATIC TIM_HandleTypeDef t6_handle;
STATIC TIM_HandleTypeDef tim_handle;
static uint32_t overflow_count = 0;
STATIC uint8_t refcount = 0;
static void assign_EXTI_Interrupt(pulseio_pulsein_obj_t* self, uint8_t num);
void TIM6_IRQHandler(void)
void pulsein_timer_event_handler(void)
{
// Detect TIM Update event
if (__HAL_TIM_GET_FLAG(&t6_handle, TIM_FLAG_UPDATE) != RESET)
if (__HAL_TIM_GET_FLAG(&tim_handle, TIM_FLAG_UPDATE) != RESET)
{
if (__HAL_TIM_GET_IT_SOURCE(&t6_handle, TIM_IT_UPDATE) != RESET)
if (__HAL_TIM_GET_IT_SOURCE(&tim_handle, TIM_IT_UPDATE) != RESET)
{
__HAL_TIM_CLEAR_IT(&t6_handle, TIM_IT_UPDATE);
__HAL_TIM_CLEAR_IT(&tim_handle, TIM_IT_UPDATE);
overflow_count++;
}
}
}
static void pulsein_handler(uint8_t num) {
static void pulsein_exti_event_handler(uint8_t num) {
// Grab the current time first.
uint32_t current_overflow = overflow_count;
uint32_t current_count = 0;
#if HAS_BASIC_TIM
current_count = TIM6->CNT;
#endif
uint32_t current_count = tim_handle.Instance->CNT;
// Interrupt register must be cleared manually
EXTI->PR = 1 << num;
@ -105,17 +103,14 @@ void pulsein_reset(void) {
}
memset(_objs, 0, sizeof(_objs));
#if HAS_BASIC_TIM
__HAL_RCC_TIM6_CLK_DISABLE();
HAL_TIM_Base_DeInit(&tim_handle);
tim_clock_disable(stm_peripherals_timer_get_index(tim_handle.Instance));
memset(&tim_handle, 0, sizeof(tim_handle));
refcount = 0;
#endif
}
void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu_pin_obj_t* pin,
uint16_t maxlen, bool idle_state) {
#if !(HAS_BASIC_TIM)
mp_raise_NotImplementedError(translate("PulseIn not supported on this chip"));
#else
// STM32 has one shared EXTI for each pin number, 0-15
uint8_t p_num = pin->number;
if(_objs[p_num]) {
@ -141,24 +136,34 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu
self->last_count = 0;
self->last_overflow = 0;
if (HAL_TIM_Base_GetState(&t6_handle) == HAL_TIM_STATE_RESET) {
// Set the new period
t6_handle.Instance = TIM6;
t6_handle.Init.Prescaler = 168; // HCLK is 168 mhz so divide down to 1mhz
t6_handle.Init.Period = 0xffff;
HAL_TIM_Base_Init(&t6_handle);
if (HAL_TIM_Base_GetState(&tim_handle) == HAL_TIM_STATE_RESET) {
// Find a suitable timer
TIM_TypeDef * tim_instance = stm_peripherals_find_timer();
stm_peripherals_timer_reserve(tim_instance);
// TIM6 has limited HAL support, set registers manually
t6_handle.Instance->SR = 0; // Prevent the SR from triggering an interrupt
t6_handle.Instance->CR1 |= TIM_CR1_CEN; // Resume timer
t6_handle.Instance->CR1 |= TIM_CR1_URS; // Disable non-overflow interrupts
__HAL_TIM_ENABLE_IT(&t6_handle, TIM_IT_UPDATE);
// Set ticks to 1us
uint32_t source = stm_peripherals_timer_get_source_freq(tim_instance);
uint32_t prescaler = source/1000000;
// Enable clocks and IRQ, set callback
stm_peripherals_timer_preinit(tim_instance, 4, pulsein_timer_event_handler);
// Set the new period
tim_handle.Instance = tim_instance;
tim_handle.Init.Prescaler = prescaler - 1;
tim_handle.Init.Period = 0x10000 - 1; //65 ms period (maximum)
HAL_TIM_Base_Init(&tim_handle);
// Set registers manually
tim_handle.Instance->SR = 0; // Prevent the SR from triggering an interrupt
tim_handle.Instance->CR1 |= TIM_CR1_CEN; // Resume timer
tim_handle.Instance->CR1 |= TIM_CR1_URS; // Disable non-overflow interrupts
__HAL_TIM_ENABLE_IT(&tim_handle, TIM_IT_UPDATE);
overflow_count = 0;
}
// Add to active PulseIns
refcount++;
#endif
// EXTI pins can also be read as an input
GPIO_InitTypeDef GPIO_InitStruct = {0};
@ -170,7 +175,7 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu
// Interrupt starts immediately
assign_EXTI_Interrupt(self, pin->number);
HAL_NVIC_EnableIRQ(self->irq);
claim_pin(pin);
common_hal_mcu_pin_claim(pin);
}
bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) {
@ -182,16 +187,13 @@ void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) {
return;
}
//Remove pulsein slot from shared array
HAL_NVIC_DisableIRQ(self->irq);
_objs[self->pin->number] = NULL;
reset_pin_number(self->pin->port, self->pin->number);
self->pin = NULL;
refcount--;
if (refcount == 0) {
#if HAS_BASIC_TIM
__HAL_RCC_TIM6_CLK_DISABLE();
#endif
stm_peripherals_timer_free(tim_handle.Instance);
}
}
@ -299,23 +301,23 @@ static void assign_EXTI_Interrupt(pulseio_pulsein_obj_t* self, uint8_t num) {
void EXTI0_IRQHandler(void)
{
pulsein_handler(0);
pulsein_exti_event_handler(0);
}
void EXTI1_IRQHandler(void)
{
pulsein_handler(1);
pulsein_exti_event_handler(1);
}
void EXTI2_IRQHandler(void)
{
pulsein_handler(2);
pulsein_exti_event_handler(2);
}
void EXTI3_IRQHandler(void)
{
pulsein_handler(3);
pulsein_exti_event_handler(3);
}
void EXTI4_IRQHandler(void)
{
pulsein_handler(4);
pulsein_exti_event_handler(4);
}
void EXTI9_5_IRQHandler(void)
@ -323,7 +325,7 @@ void EXTI9_5_IRQHandler(void)
uint32_t pending = EXTI->PR;
for (uint i = 5; i <= 9; i++) {
if(pending & (1 << i)) {
pulsein_handler(i);
pulsein_exti_event_handler(i);
}
}
}
@ -333,7 +335,7 @@ void EXTI15_10_IRQHandler(void)
uint32_t pending = EXTI->PR;
for (uint i = 10; i <= 15; i++) {
if(pending & (1 << i)) {
pulsein_handler(i);
pulsein_exti_event_handler(i);
}
}
}

138
ports/stm/common-hal/pulseio/PulseOut.c
View File

@ -36,20 +36,20 @@
#include "supervisor/shared/translate.h"
#include STM32_HAL_H
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "timers.h"
// A single timer is shared amongst all PulseOut objects under the assumption that
// the code is single threaded.
STATIC uint8_t refcount = 0;
STATIC uint16_t *pulse_array = NULL;
STATIC volatile uint16_t pulse_array_index = 0;
STATIC uint16_t pulse_array_length;
//Timer is shared, must be accessible by interrupt
STATIC TIM_HandleTypeDef t7_handle;
STATIC TIM_HandleTypeDef tim_handle;
pulseio_pulseout_obj_t *curr_pulseout = NULL;
STATIC void turn_on(pulseio_pulseout_obj_t *pulseout) {
// Turn on PWM
HAL_TIM_PWM_Start(&(pulseout->pwmout->handle), pulseout->pwmout->channel);
@ -65,91 +65,78 @@ STATIC void turn_off(pulseio_pulseout_obj_t *pulseout) {
STATIC void start_timer(void) {
// Set the new period
t7_handle.Init.Period = pulse_array[pulse_array_index] - 1;
HAL_TIM_Base_Init(&t7_handle);
tim_handle.Init.Period = pulse_array[pulse_array_index] - 1;
HAL_TIM_Base_Init(&tim_handle);
// TIM7 has limited HAL support, set registers manually
t7_handle.Instance->SR = 0; // Prevent the SR from triggering an interrupt
t7_handle.Instance->CR1 |= TIM_CR1_CEN; // Resume timer
t7_handle.Instance->CR1 |= TIM_CR1_URS; // Disable non-overflow interrupts
__HAL_TIM_ENABLE_IT(&t7_handle, TIM_IT_UPDATE);
tim_handle.Instance->SR = 0; // Prevent the SR from triggering an interrupt
tim_handle.Instance->CR1 |= TIM_CR1_CEN; // Resume timer
tim_handle.Instance->CR1 |= TIM_CR1_URS; // Disable non-overflow interrupts
__HAL_TIM_ENABLE_IT(&tim_handle, TIM_IT_UPDATE);
}
STATIC void pulseout_event_handler(void) {
if (curr_pulseout->pwmout == NULL) {
return; //invalid interrupt
// Detect TIM Update event
if (__HAL_TIM_GET_FLAG(&tim_handle, TIM_FLAG_UPDATE) != RESET)
{
if (__HAL_TIM_GET_IT_SOURCE(&tim_handle, TIM_IT_UPDATE) != RESET)
{
__HAL_TIM_CLEAR_IT(&tim_handle, TIM_IT_UPDATE);
if (curr_pulseout->pwmout == NULL) {
return; //invalid interrupt
}
pulse_array_index++;
// No more pulses. Turn off output and don't restart.
if (pulse_array_index >= pulse_array_length) {
turn_off(curr_pulseout);
return;
}
// Alternate on and off, starting with on.
if (pulse_array_index % 2 == 0) {
turn_on(curr_pulseout);
} else {
turn_off(curr_pulseout);
}
// Count up to the next given value.
start_timer();
}
}
HAL_GPIO_WritePin(pin_port(2),pin_mask(6), 1);
HAL_GPIO_WritePin(pin_port(2),pin_mask(6), 0);
pulse_array_index++;
// No more pulses. Turn off output and don't restart.
if (pulse_array_index >= pulse_array_length) {
turn_off(curr_pulseout);
return;
}
// Alternate on and off, starting with on.
if (pulse_array_index % 2 == 0) {
turn_on(curr_pulseout);
} else {
turn_off(curr_pulseout);
}
// Count up to the next given value.
start_timer();
}
void pulseout_reset() {
#if HAS_BASIC_TIM
__HAL_RCC_TIM7_CLK_DISABLE();
stm_peripherals_timer_free(tim_handle.Instance);
refcount = 0;
#endif
}
void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self,
const pulseio_pwmout_obj_t* carrier) {
#if !(HAS_BASIC_TIM)
mp_raise_NotImplementedError(translate("PulseOut not supported on this chip"));
#else
// Add to active PulseOuts
refcount++;
TIM_TypeDef * tim_instance = stm_peripherals_find_timer();
stm_peripherals_timer_reserve(tim_instance);
// Calculate a 1 ms period
uint32_t source, clk_div;
source = HAL_RCC_GetPCLK1Freq(); // TIM7 is on APB1
clk_div = RCC->CFGR & RCC_CFGR_PPRE1;
// APB quirk, see See DM00031020 Rev 4, page 115.
if (clk_div != 0) {
// APB prescaler for this timer is > 1
source *= 2;
}
//calculate a 1ms period
uint32_t source = stm_peripherals_timer_get_source_freq(tim_instance);
uint32_t prescaler = source/1000000; //1us intervals
__HAL_RCC_TIM7_CLK_ENABLE();
HAL_NVIC_SetPriority(TIM7_IRQn, 4, 0);
HAL_NVIC_EnableIRQ(TIM7_IRQn);
stm_peripherals_timer_preinit(tim_instance, 4, pulseout_event_handler);
tim_handle.Instance = tim_instance;
tim_handle.Init.Period = 100; //immediately replaced.
tim_handle.Init.Prescaler = prescaler - 1;
tim_handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
tim_handle.Init.CounterMode = TIM_COUNTERMODE_UP;
tim_handle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
// Timers 6 and 7 have no pins, so using them doesn't affect PWM availability
t7_handle.Instance = TIM7;
t7_handle.Init.Period = 100; //immediately replaced.
t7_handle.Init.Prescaler = prescaler - 1;
t7_handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
t7_handle.Init.CounterMode = TIM_COUNTERMODE_UP;
t7_handle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
HAL_TIM_Base_Init(&t7_handle);
t7_handle.Instance->SR = 0;
HAL_TIM_Base_Init(&tim_handle);
tim_handle.Instance->SR = 0;
// The HAL can't work with const, recast required.
self->pwmout = (pulseio_pwmout_obj_t*)carrier;
turn_off(self);
#endif
}
bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) {
@ -165,9 +152,7 @@ void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) {
refcount--;
if (refcount == 0) {
#if HAS_BASIC_TIM
__HAL_RCC_TIM7_CLK_DISABLE();
#endif
stm_peripherals_timer_free(tim_handle.Instance);
}
}
@ -190,24 +175,11 @@ void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pu
// signal.
RUN_BACKGROUND_TASKS;
// Use when debugging, or issues are irrecoverable
// // Use when debugging, or issues are irrecoverable
// if ((supervisor_ticks_ms64() - starttime ) > timeout ) {
// mp_raise_RuntimeError(translate("Error: Send Timeout"));
// }
}
//turn off timer counter.
t7_handle.Instance->CR1 &= ~TIM_CR1_CEN;
}
void TIM7_IRQHandler(void)
{
// Detect TIM Update event
if (__HAL_TIM_GET_FLAG(&t7_handle, TIM_FLAG_UPDATE) != RESET)
{
if (__HAL_TIM_GET_IT_SOURCE(&t7_handle, TIM_IT_UPDATE) != RESET)
{
__HAL_TIM_CLEAR_IT(&t7_handle, TIM_IT_UPDATE);
pulseout_event_handler();
}
}
tim_handle.Instance->CR1 &= ~TIM_CR1_CEN;
}

14
ports/stm/common-hal/rgbmatrix/RGBMatrix.c
View File

@ -27,28 +27,30 @@
#include <stddef.h>
#include "common-hal/rgbmatrix/RGBMatrix.h"
#include "timers.h"
#include STM32_HAL_H
extern void _PM_IRQ_HANDLER(void);
void *common_hal_rgbmatrix_timer_allocate() {
// TODO(jepler) properly handle resource allocation including never-reset
return TIM6;
TIM_TypeDef * timer = stm_peripherals_find_timer();
stm_peripherals_timer_reserve(timer);
return timer;
}
void common_hal_rgbmatrix_timer_enable(void* ptr) {
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
TIM_TypeDef *tim = (TIM_TypeDef*)ptr;
HAL_NVIC_EnableIRQ(stm_peripherals_timer_get_irqnum(tim));
}
void common_hal_rgbmatrix_timer_disable(void* ptr) {
TIM_TypeDef *tim = (TIM_TypeDef*)ptr;
tim->DIER &= ~TIM_DIER_UIE;
HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn);
}
void common_hal_rgbmatrix_timer_free(void* ptr) {
TIM_TypeDef *tim = (TIM_TypeDef*)ptr;
stm_peripherals_timer_free(tim);
common_hal_rgbmatrix_timer_disable(ptr);
// TODO(jepler) properly handle resource allocation including never-reset
}

182
ports/stm/peripherals/stm32f4/stm32f405xx/periph.c
View File

@ -29,55 +29,57 @@
#include "peripherals/pins.h"
#include "peripherals/periph.h"
// I2C
I2C_TypeDef * mcu_i2c_banks[I2C_BANK_ARRAY_LEN] = {I2C1, I2C2, I2C3};
I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3};
const mcu_periph_obj_t mcu_i2c_sda_list[4] = {
const mcu_periph_obj_t mcu_i2c_sda_list[I2C_SDA_ARRAY_LEN] = {
PERIPH(1, 4, &pin_PB07),
PERIPH(1, 4, &pin_PB09),
PERIPH(2, 4, &pin_PB11),
PERIPH(3, 4, &pin_PC09),
PERIPH(2, 4, &pin_PF00),
PERIPH(2, 4, &pin_PH05),
PERIPH(3, 4, &pin_PH08),
};
const mcu_periph_obj_t mcu_i2c_scl_list[4] = {
const mcu_periph_obj_t mcu_i2c_scl_list[I2C_SCL_ARRAY_LEN] = {
PERIPH(3, 4, &pin_PA08),
PERIPH(1, 4, &pin_PB06),
PERIPH(1, 4, &pin_PB08),
PERIPH(2, 4, &pin_PB10),
PERIPH(3, 4, &pin_PA08)
PERIPH(2, 4, &pin_PF01),
PERIPH(2, 4, &pin_PH04),
PERIPH(3, 4, &pin_PH07),
};
SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3};
SPI_TypeDef * mcu_spi_banks[SPI_BANK_ARRAY_LEN] = {SPI1, SPI2, SPI3};
const mcu_periph_obj_t mcu_spi_sck_list[7] = {
const mcu_periph_obj_t mcu_spi_sck_list[SPI_SCK_ARRAY_LEN] = {
PERIPH(1, 5, &pin_PA05),
PERIPH(1, 5, &pin_PB03),
PERIPH(3, 6, &pin_PB03),
PERIPH(2, 5, &pin_PB10),
PERIPH(2, 5, &pin_PB13),
PERIPH(2, 5, &pin_PC07),
PERIPH(3, 6, &pin_PB03),
PERIPH(3, 6, &pin_PC10),
PERIPH(2, 5, &pin_PI01),
};
const mcu_periph_obj_t mcu_spi_mosi_list[6] = {
const mcu_periph_obj_t mcu_spi_mosi_list[SPI_MOSI_ARRAY_LEN] = {
PERIPH(1, 5, &pin_PA07),
PERIPH(1, 5, &pin_PB05),
PERIPH(3, 6, &pin_PB05),
PERIPH(2, 5, &pin_PB15),
PERIPH(2, 5, &pin_PC03),
PERIPH(3, 6, &pin_PB05),
PERIPH(3, 6, &pin_PC12),
PERIPH(2, 5, &pin_PI03),
};
const mcu_periph_obj_t mcu_spi_miso_list[6] = {
const mcu_periph_obj_t mcu_spi_miso_list[SPI_MISO_ARRAY_LEN] = {
PERIPH(1, 5, &pin_PA06),
PERIPH(1, 5, &pin_PB04),
PERIPH(3, 6, &pin_PB04),
PERIPH(2, 5, &pin_PB14),
PERIPH(2, 5, &pin_PC02),
PERIPH(3, 6, &pin_PB04),
PERIPH(3, 6, &pin_PC11),
PERIPH(2, 5, &pin_PI02),
};
const mcu_periph_obj_t mcu_spi_nss_list[6] = {
const mcu_periph_obj_t mcu_spi_nss_list[SPI_NSS_ARRAY_LEN] = {
PERIPH(1, 5, &pin_PA04),
PERIPH(1, 5, &pin_PA15),
PERIPH(2, 5, &pin_PB09),
@ -89,7 +91,7 @@ const mcu_periph_obj_t mcu_spi_nss_list[6] = {
USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6};
bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true};
const mcu_periph_obj_t mcu_uart_tx_list[12] = {
const mcu_periph_obj_t mcu_uart_tx_list[UART_TX_ARRAY_LEN] = {
PERIPH(4, 8, &pin_PA00),
PERIPH(2, 7, &pin_PA02),
PERIPH(1, 7, &pin_PA09),
@ -103,8 +105,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[12] = {
PERIPH(3, 7, &pin_PD08),
PERIPH(6, 8, &pin_PG14),
};
const mcu_periph_obj_t mcu_uart_rx_list[12] = {
const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN] = {
PERIPH(4, 8, &pin_PA01),
PERIPH(2, 7, &pin_PA03),
PERIPH(1, 7, &pin_PA10),
@ -121,74 +122,75 @@ const mcu_periph_obj_t mcu_uart_rx_list[12] = {
//Timers
//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins
TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10,
TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10,
TIM11, TIM12, TIM13, TIM14};
const mcu_tim_pin_obj_t mcu_tim_pin_list[56] = {
TIM(2,1,1,&pin_PA00),
TIM(5,2,1,&pin_PA00),
TIM(2,1,2,&pin_PA01),
TIM(5,2,2,&pin_PA01),
TIM(2,1,3,&pin_PA02),
TIM(5,2,3,&pin_PA02),
TIM(2,1,4,&pin_PA03),
TIM(5,2,4,&pin_PA03),
TIM(9,3,1,&pin_PA02),
TIM(9,3,2,&pin_PA03),
TIM(3,2,1,&pin_PA06),
TIM(13,9,1,&pin_PA06),
TIM(3,2,2,&pin_PA07),
TIM(14,9,1,&pin_PA07),
TIM(1,1,1,&pin_PA08),
TIM(1,1,2,&pin_PA09),
TIM(1,1,3,&pin_PA10),
TIM(1,1,4,&pin_PA11),
TIM(2,1,1,&pin_PA15),
TIM(3,2,3,&pin_PB00),
TIM(3,2,4,&pin_PB01),
TIM(2,1,2,&pin_PB03),
TIM(3,2,1,&pin_PB04),
TIM(3,2,2,&pin_PB05),
TIM(4,2,1,&pin_PB06),
TIM(4,2,2,&pin_PB07),
TIM(4,2,3,&pin_PB08),
TIM(10,2,1,&pin_PB08),
TIM(4,2,4,&pin_PB09),
TIM(11,2,1,&pin_PB09),
TIM(2,1,3,&pin_PB10),
TIM(2,1,4,&pin_PB11),
TIM(12,9,1,&pin_PB14),
TIM(12,9,2,&pin_PB15),
TIM(3,2,1,&pin_PC06),
TIM(3,2,2,&pin_PC07),
TIM(3,2,3,&pin_PC08),
TIM(3,2,4,&pin_PC09),
TIM(8,3,1,&pin_PC06),
TIM(8,3,2,&pin_PC07),
TIM(8,3,3,&pin_PC08),
TIM(8,3,4,&pin_PC09),
TIM(4,2,1,&pin_PD12),
TIM(4,2,2,&pin_PD13),
TIM(4,2,3,&pin_PD14),
TIM(4,2,4,&pin_PD15),
TIM(9,3,1,&pin_PE05),
TIM(9,3,2,&pin_PE06),
TIM(1,1,1,&pin_PE09),
TIM(1,1,2,&pin_PE11),
TIM(1,1,3,&pin_PE13),
TIM(1,1,4,&pin_PE14),
TIM(10,3,1,&pin_PF06),
TIM(11,3,1,&pin_PF07),
TIM(13,9,1,&pin_PF08),
TIM(14,9,1,&pin_PF09),
// TIM(12,9,1,&pin_PH06), //TODO: include these when pin map is expanded
// TIM(12,9,2,&pin_PH09),
// TIM(5,2,1,&pin_PH10),
// TIM(5,2,2,&pin_PH11),
// TIM(5,2,3,&pin_PH12),
// TIM(5,2,4,&pin_PI00),
// TIM(8,3,4,&pin_PI02),
// TIM(8,3,1,&pin_PI05),
// TIM(8,3,2,&pin_PI06),
// TIM(8,3,3,&pin_PI07),
const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN] = {
TIM(2, 1, 1, &pin_PA00),
TIM(5, 2, 1, &pin_PA00),
TIM(2, 1, 2, &pin_PA01),
TIM(5, 2, 2, &pin_PA01),
TIM(2, 1, 3, &pin_PA02),
TIM(5, 2, 3, &pin_PA02),
TIM(9, 3, 1, &pin_PA02),
TIM(2, 1, 4, &pin_PA03),
TIM(5, 2, 4, &pin_PA03),
TIM(9, 3, 2, &pin_PA03),
TIM(2, 1, 1, &pin_PA05),
TIM(3, 2, 1, &pin_PA06),
TIM(13, 9, 1, &pin_PA06),
TIM(3, 2, 2, &pin_PA07),
TIM(14, 9, 1, &pin_PA07),
TIM(1, 1, 1, &pin_PA08),
TIM(1, 1, 2, &pin_PA09),
TIM(1, 1, 3, &pin_PA10),
TIM(1, 1, 4, &pin_PA11),
TIM(2, 1, 1, &pin_PA15),
TIM(3, 2, 3, &pin_PB00),
TIM(3, 2, 4, &pin_PB01),
TIM(2, 1, 2, &pin_PB03),
TIM(3, 2, 1, &pin_PB04),
TIM(3, 2, 2, &pin_PB05),
TIM(4, 2, 1, &pin_PB06),
TIM(4, 2, 2, &pin_PB07),
TIM(4, 2, 3, &pin_PB08),
TIM(10, 3, 1, &pin_PB08),
TIM(4, 2, 4, &pin_PB09),
TIM(11, 3, 1, &pin_PB09),
TIM(2, 1, 3, &pin_PB10),
TIM(2, 1, 4, &pin_PB11),
TIM(12, 9, 1, &pin_PB14),
TIM(12, 9, 2, &pin_PB15),
TIM(3, 2, 1, &pin_PC06),
TIM(8, 3, 1, &pin_PC06),
TIM(3, 2, 2, &pin_PC07),
TIM(8, 3, 2, &pin_PC07),
TIM(3, 2, 3, &pin_PC08),
TIM(8, 3, 3, &pin_PC08),
TIM(3, 2, 4, &pin_PC09),
TIM(8, 3, 4, &pin_PC09),
TIM(4, 2, 1, &pin_PD12),
TIM(4, 2, 2, &pin_PD13),
TIM(4, 2, 3, &pin_PD14),
TIM(4, 2, 4, &pin_PD15),
TIM(9, 3, 1, &pin_PE05),
TIM(9, 3, 2, &pin_PE06),
TIM(1, 1, 1, &pin_PE09),
TIM(1, 1, 2, &pin_PE11),
TIM(1, 1, 3, &pin_PE13),
TIM(1, 1, 4, &pin_PE14),
TIM(10, 3, 1, &pin_PF06),
TIM(11, 3, 1, &pin_PF07),
TIM(13, 9, 1, &pin_PF08),
TIM(14, 9, 1, &pin_PF09),
TIM(12, 9, 1, &pin_PH06),
TIM(12, 9, 2, &pin_PH09),
TIM(5, 2, 1, &pin_PH10),
TIM(5, 2, 2, &pin_PH11),
TIM(5, 2, 3, &pin_PH12),
TIM(5, 2, 4, &pin_PI00),
TIM(8, 3, 4, &pin_PI02),
TIM(8, 3, 1, &pin_PI05),
TIM(8, 3, 2, &pin_PI06),
TIM(8, 3, 3, &pin_PI07),
};

35
ports/stm/peripherals/stm32f4/stm32f405xx/periph.h
View File

@ -28,29 +28,36 @@
#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H
//I2C
extern I2C_TypeDef * mcu_i2c_banks[3];
extern const mcu_periph_obj_t mcu_i2c_sda_list[4];
extern const mcu_periph_obj_t mcu_i2c_scl_list[4];
#define I2C_BANK_ARRAY_LEN 3
#define I2C_SDA_ARRAY_LEN 7
#define I2C_SCL_ARRAY_LEN 7
extern I2C_TypeDef * mcu_i2c_banks[I2C_BANK_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_i2c_sda_list[I2C_SDA_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_i2c_scl_list[I2C_SCL_ARRAY_LEN];
//SPI
extern SPI_TypeDef * mcu_spi_banks[3];
extern const mcu_periph_obj_t mcu_spi_sck_list[7];
extern const mcu_periph_obj_t mcu_spi_mosi_list[6];
extern const mcu_periph_obj_t mcu_spi_miso_list[6];
extern const mcu_periph_obj_t mcu_spi_nss_list[6];
#define SPI_BANK_ARRAY_LEN 3
#define SPI_SCK_ARRAY_LEN 7
#define SPI_MOSI_ARRAY_LEN 7
#define SPI_MISO_ARRAY_LEN 7
#define SPI_NSS_ARRAY_LEN 6
extern SPI_TypeDef * mcu_spi_banks[SPI_BANK_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_spi_sck_list[SPI_SCK_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_spi_mosi_list[SPI_MOSI_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_spi_miso_list[SPI_MISO_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_spi_nss_list[SPI_NSS_ARRAY_LEN];
//UART
#define UART_TX_ARRAY_LEN 12
#define UART_RX_ARRAY_LEN 12
extern USART_TypeDef * mcu_uart_banks[MAX_UART];
extern bool mcu_uart_has_usart[MAX_UART];
extern const mcu_periph_obj_t mcu_uart_tx_list[12];
extern const mcu_periph_obj_t mcu_uart_rx_list[12];
extern const mcu_periph_obj_t mcu_uart_tx_list[UART_TX_ARRAY_LEN];
extern const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN];
//Timers
#define TIM_BANK_ARRAY_LEN 14
#define TIM_PIN_ARRAY_LEN 56
#define TIM_PIN_ARRAY_LEN 67
TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN];
const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN];

233
ports/stm/peripherals/stm32f4/stm32f405xx/pins.c
View File

@ -28,33 +28,6 @@
#include "py/mphal.h"
#include "peripherals/pins.h"
const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC);
const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC);
const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC);
const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC);
const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC);
const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp
const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN
const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT
const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only
const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only
const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only
const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only
const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only
const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only
const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only
const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only
const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10));
const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11));
const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12));
const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13));
const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_123,0));
const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_123,1));
const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_123,2));
@ -63,23 +36,69 @@ const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_12,4));
const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_12,5));
const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_12,6));
const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_12,7));
const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14));
const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15));
const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC);
const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC);
const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC);
const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC);
const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC);
const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC);
const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC);
const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC);
const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8));
const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9));
const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1
const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC);
const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC);
const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC);
const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC);
const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC);
const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC);
const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC);
const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC);
const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC);
const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC);
const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC);
const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC);
const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC);
const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC);
const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10));
const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11));
const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12));
const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13));
const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14));
const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15));
const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC);
const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC);
const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC);
const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC);
const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC);
const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC);
const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC);
const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC);
const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC);
const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC);
const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC);
const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC);
const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC);
const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC);
const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC);
const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC);
const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC);
const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC);
const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC);
const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC);
const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC);
const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC);
const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC);
const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC);
const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC);
const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC);
const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC);
const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC);
const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC);
const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC);
const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC);
const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC);
const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC);
const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC);
const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC);
const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC);
@ -89,73 +108,63 @@ const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC);
const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC);
const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC);
const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC);
const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC);
const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC);
const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC);
const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC);
const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC);
const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC);
const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC);
const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC);
const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC);
const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC);
const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC);
const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC);
const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC);
const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC);
const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC);
const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC);
const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC);
const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC);
const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC);
const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC);
const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC);
const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC);
const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC);
const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC);
const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC);
const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC);
const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC);
const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC);
const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC);
const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC);
const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC);
const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC);
const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC);
const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC);
const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC);
const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC);
const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC);
const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); // 144 only
const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC);
const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC);
const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC);
const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC);
const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC);
const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC);
const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC);
const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC);
const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC);
const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC);
const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC);
const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC);
const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9));
const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14));
const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15));
const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4));
const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5));
const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6));
const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7));
const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8));
const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC);
const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC);
const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC);
const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC);
const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC);
const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC);
const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC);
const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC);
const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC);
const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC);
const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC);
const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC);
const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC);
const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC);
const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC);
const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC);
const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC);
const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC);
const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC);
const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC);
const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC);
const mcu_pin_obj_t pin_PH00 = PIN(7, 0, NO_ADC);
const mcu_pin_obj_t pin_PH01 = PIN(7, 1, NO_ADC);
const mcu_pin_obj_t pin_PH02 = PIN(7, 2, NO_ADC);
const mcu_pin_obj_t pin_PH03 = PIN(7, 3, NO_ADC);
const mcu_pin_obj_t pin_PH04 = PIN(7, 4, NO_ADC);
const mcu_pin_obj_t pin_PH05 = PIN(7, 5, NO_ADC);
const mcu_pin_obj_t pin_PH06 = PIN(7, 6, NO_ADC);
const mcu_pin_obj_t pin_PH07 = PIN(7, 7, NO_ADC);
const mcu_pin_obj_t pin_PH08 = PIN(7, 8, NO_ADC);
const mcu_pin_obj_t pin_PH09 = PIN(7, 9, NO_ADC);
const mcu_pin_obj_t pin_PH10 = PIN(7, 10, NO_ADC);
const mcu_pin_obj_t pin_PH11 = PIN(7, 11, NO_ADC);
const mcu_pin_obj_t pin_PH12 = PIN(7, 12, NO_ADC);
const mcu_pin_obj_t pin_PH13 = PIN(7, 13, NO_ADC);
const mcu_pin_obj_t pin_PH14 = PIN(7, 14, NO_ADC);
const mcu_pin_obj_t pin_PH15 = PIN(7, 15, NO_ADC);
const mcu_pin_obj_t pin_PI00 = PIN(8, 0, NO_ADC);
const mcu_pin_obj_t pin_PI01 = PIN(8, 1, NO_ADC);
const mcu_pin_obj_t pin_PI02 = PIN(8, 2, NO_ADC);
const mcu_pin_obj_t pin_PI03 = PIN(8, 3, NO_ADC);
const mcu_pin_obj_t pin_PI04 = PIN(8, 4, NO_ADC);
const mcu_pin_obj_t pin_PI05 = PIN(8, 5, NO_ADC);
const mcu_pin_obj_t pin_PI06 = PIN(8, 6, NO_ADC);
const mcu_pin_obj_t pin_PI07 = PIN(8, 7, NO_ADC);
const mcu_pin_obj_t pin_PI08 = PIN(8, 8, NO_ADC);
const mcu_pin_obj_t pin_PI09 = PIN(8, 9, NO_ADC);
const mcu_pin_obj_t pin_PI10 = PIN(8, 10, NO_ADC);
const mcu_pin_obj_t pin_PI11 = PIN(8, 11, NO_ADC);

209
ports/stm/peripherals/stm32f4/stm32f405xx/pins.h
View File

@ -27,107 +27,54 @@
#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PINS_H
#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PINS_H
//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only
//pg 50
extern const mcu_pin_obj_t pin_PE02;
extern const mcu_pin_obj_t pin_PE03;
extern const mcu_pin_obj_t pin_PE04;
extern const mcu_pin_obj_t pin_PE05;
extern const mcu_pin_obj_t pin_PE06;
extern const mcu_pin_obj_t pin_PC13;
extern const mcu_pin_obj_t pin_PC14;
//pg 51
extern const mcu_pin_obj_t pin_PC15;
extern const mcu_pin_obj_t pin_PF00; // 144 only
extern const mcu_pin_obj_t pin_PF01; // 144 only
extern const mcu_pin_obj_t pin_PF02; // 144 only
extern const mcu_pin_obj_t pin_PF03; // 144 only
extern const mcu_pin_obj_t pin_PF04; // 144 only
extern const mcu_pin_obj_t pin_PF05; // 144 only
extern const mcu_pin_obj_t pin_PF06; // 144 only
extern const mcu_pin_obj_t pin_PF07; // 144 only
extern const mcu_pin_obj_t pin_PF08; // 144 only
extern const mcu_pin_obj_t pin_PF09; // 144 only
extern const mcu_pin_obj_t pin_PF10; // 144 only
//pg 52
extern const mcu_pin_obj_t pin_PC00;
extern const mcu_pin_obj_t pin_PC01;
extern const mcu_pin_obj_t pin_PC02;
extern const mcu_pin_obj_t pin_PC03;
extern const mcu_pin_obj_t pin_PA00;
extern const mcu_pin_obj_t pin_PA01;
extern const mcu_pin_obj_t pin_PA02;
//pg 53
extern const mcu_pin_obj_t pin_PA03;
extern const mcu_pin_obj_t pin_PA04;
extern const mcu_pin_obj_t pin_PA05;
extern const mcu_pin_obj_t pin_PA06;
extern const mcu_pin_obj_t pin_PA07;
extern const mcu_pin_obj_t pin_PC04;
//pg 54
extern const mcu_pin_obj_t pin_PC05;
extern const mcu_pin_obj_t pin_PB00;
extern const mcu_pin_obj_t pin_PB01;
extern const mcu_pin_obj_t pin_PB02;
extern const mcu_pin_obj_t pin_PF11; // 144 only
extern const mcu_pin_obj_t pin_PF12; // 144 only
extern const mcu_pin_obj_t pin_PF13; // 144 only
extern const mcu_pin_obj_t pin_PF14; // 144 only
extern const mcu_pin_obj_t pin_PF15; // 144 only
extern const mcu_pin_obj_t pin_PG00; // 144 only
extern const mcu_pin_obj_t pin_PG01; // 144 only
//pg 55
extern const mcu_pin_obj_t pin_PE07;
extern const mcu_pin_obj_t pin_PE08;
extern const mcu_pin_obj_t pin_PE09;
extern const mcu_pin_obj_t pin_PE10;
extern const mcu_pin_obj_t pin_PE11;
extern const mcu_pin_obj_t pin_PE12;
extern const mcu_pin_obj_t pin_PE13;
extern const mcu_pin_obj_t pin_PE14;
//pg 56
extern const mcu_pin_obj_t pin_PE15;
extern const mcu_pin_obj_t pin_PB10;
extern const mcu_pin_obj_t pin_PB11; // 144 only
extern const mcu_pin_obj_t pin_PB12;
extern const mcu_pin_obj_t pin_PB13;
//pg 57
extern const mcu_pin_obj_t pin_PB14;
extern const mcu_pin_obj_t pin_PB15;
extern const mcu_pin_obj_t pin_PD08;
extern const mcu_pin_obj_t pin_PD09;
extern const mcu_pin_obj_t pin_PD10;
extern const mcu_pin_obj_t pin_PD11;
extern const mcu_pin_obj_t pin_PD12;
//pg 58
extern const mcu_pin_obj_t pin_PD13;
extern const mcu_pin_obj_t pin_PD14;
extern const mcu_pin_obj_t pin_PD15;
extern const mcu_pin_obj_t pin_PG02; // 144 only
extern const mcu_pin_obj_t pin_PG03; // 144 only
extern const mcu_pin_obj_t pin_PG04; // 144 only
extern const mcu_pin_obj_t pin_PG05; // 144 only
extern const mcu_pin_obj_t pin_PG06; // 144 only
extern const mcu_pin_obj_t pin_PG07; // 144 only
extern const mcu_pin_obj_t pin_PG08; // 144 only
//pg 59
extern const mcu_pin_obj_t pin_PC06;
extern const mcu_pin_obj_t pin_PC07;
extern const mcu_pin_obj_t pin_PC08;
extern const mcu_pin_obj_t pin_PC09;
extern const mcu_pin_obj_t pin_PA08;
extern const mcu_pin_obj_t pin_PA09;
extern const mcu_pin_obj_t pin_PA10;
//pg 60
extern const mcu_pin_obj_t pin_PA11;
extern const mcu_pin_obj_t pin_PA12;
extern const mcu_pin_obj_t pin_PA13;
extern const mcu_pin_obj_t pin_PA14;
extern const mcu_pin_obj_t pin_PA15;
extern const mcu_pin_obj_t pin_PB00;
extern const mcu_pin_obj_t pin_PB01;
extern const mcu_pin_obj_t pin_PB02;
extern const mcu_pin_obj_t pin_PB03;
extern const mcu_pin_obj_t pin_PB04;
extern const mcu_pin_obj_t pin_PB05;
extern const mcu_pin_obj_t pin_PB06;
extern const mcu_pin_obj_t pin_PB07;
extern const mcu_pin_obj_t pin_PB08;
extern const mcu_pin_obj_t pin_PB09;
extern const mcu_pin_obj_t pin_PB10;
extern const mcu_pin_obj_t pin_PB11;
extern const mcu_pin_obj_t pin_PB12;
extern const mcu_pin_obj_t pin_PB13;
extern const mcu_pin_obj_t pin_PB14;
extern const mcu_pin_obj_t pin_PB15;
extern const mcu_pin_obj_t pin_PC00;
extern const mcu_pin_obj_t pin_PC01;
extern const mcu_pin_obj_t pin_PC02;
extern const mcu_pin_obj_t pin_PC03;
extern const mcu_pin_obj_t pin_PC04;
extern const mcu_pin_obj_t pin_PC05;
extern const mcu_pin_obj_t pin_PC06;
extern const mcu_pin_obj_t pin_PC07;
extern const mcu_pin_obj_t pin_PC08;
extern const mcu_pin_obj_t pin_PC09;
extern const mcu_pin_obj_t pin_PC10;
extern const mcu_pin_obj_t pin_PC11;
//pg 61
extern const mcu_pin_obj_t pin_PC12;
extern const mcu_pin_obj_t pin_PC13;
extern const mcu_pin_obj_t pin_PC14;
extern const mcu_pin_obj_t pin_PC15;
extern const mcu_pin_obj_t pin_PD00;
extern const mcu_pin_obj_t pin_PD01;
extern const mcu_pin_obj_t pin_PD02;
@ -136,23 +83,89 @@ extern const mcu_pin_obj_t pin_PD04;
extern const mcu_pin_obj_t pin_PD05;
extern const mcu_pin_obj_t pin_PD06;
extern const mcu_pin_obj_t pin_PD07;
//pg 62
extern const mcu_pin_obj_t pin_PG09; // 144 only
extern const mcu_pin_obj_t pin_PG10; // 144 only
extern const mcu_pin_obj_t pin_PG11; // 144 only
extern const mcu_pin_obj_t pin_PG12; // 144 only
extern const mcu_pin_obj_t pin_PG13; // 144 only
extern const mcu_pin_obj_t pin_PG14; // 144 only
extern const mcu_pin_obj_t pin_PG15; // 144 only
extern const mcu_pin_obj_t pin_PB03;
extern const mcu_pin_obj_t pin_PB04;
//pg 63
extern const mcu_pin_obj_t pin_PB05;
extern const mcu_pin_obj_t pin_PB06;
extern const mcu_pin_obj_t pin_PB07;
extern const mcu_pin_obj_t pin_PB08;
extern const mcu_pin_obj_t pin_PB09;
extern const mcu_pin_obj_t pin_PD08;
extern const mcu_pin_obj_t pin_PD09;
extern const mcu_pin_obj_t pin_PD10;
extern const mcu_pin_obj_t pin_PD11;
extern const mcu_pin_obj_t pin_PD12;
extern const mcu_pin_obj_t pin_PD13;
extern const mcu_pin_obj_t pin_PD14;
extern const mcu_pin_obj_t pin_PD15;
extern const mcu_pin_obj_t pin_PE00;
extern const mcu_pin_obj_t pin_PE01;
extern const mcu_pin_obj_t pin_PE02;
extern const mcu_pin_obj_t pin_PE03;
extern const mcu_pin_obj_t pin_PE04;
extern const mcu_pin_obj_t pin_PE05;
extern const mcu_pin_obj_t pin_PE06;
extern const mcu_pin_obj_t pin_PE07;
extern const mcu_pin_obj_t pin_PE08;
extern const mcu_pin_obj_t pin_PE09;
extern const mcu_pin_obj_t pin_PE10;
extern const mcu_pin_obj_t pin_PE11;
extern const mcu_pin_obj_t pin_PE12;
extern const mcu_pin_obj_t pin_PE13;
extern const mcu_pin_obj_t pin_PE14;
extern const mcu_pin_obj_t pin_PE15;
extern const mcu_pin_obj_t pin_PF00;
extern const mcu_pin_obj_t pin_PF01;
extern const mcu_pin_obj_t pin_PF02;
extern const mcu_pin_obj_t pin_PF03;
extern const mcu_pin_obj_t pin_PF04;
extern const mcu_pin_obj_t pin_PF05;
extern const mcu_pin_obj_t pin_PF06;
extern const mcu_pin_obj_t pin_PF07;
extern const mcu_pin_obj_t pin_PF08;
extern const mcu_pin_obj_t pin_PF09;
extern const mcu_pin_obj_t pin_PF10;
extern const mcu_pin_obj_t pin_PF11;
extern const mcu_pin_obj_t pin_PF12;
extern const mcu_pin_obj_t pin_PF13;
extern const mcu_pin_obj_t pin_PF14;
extern const mcu_pin_obj_t pin_PF15;
extern const mcu_pin_obj_t pin_PG00;
extern const mcu_pin_obj_t pin_PG01;
extern const mcu_pin_obj_t pin_PG02;
extern const mcu_pin_obj_t pin_PG03;
extern const mcu_pin_obj_t pin_PG04;
extern const mcu_pin_obj_t pin_PG05;
extern const mcu_pin_obj_t pin_PG06;
extern const mcu_pin_obj_t pin_PG07;
extern const mcu_pin_obj_t pin_PG08;
extern const mcu_pin_obj_t pin_PG09;
extern const mcu_pin_obj_t pin_PG10;
extern const mcu_pin_obj_t pin_PG11;
extern const mcu_pin_obj_t pin_PG12;
extern const mcu_pin_obj_t pin_PG13;
extern const mcu_pin_obj_t pin_PG14;
extern const mcu_pin_obj_t pin_PG15;
extern const mcu_pin_obj_t pin_PH00;
extern const mcu_pin_obj_t pin_PH01;
extern const mcu_pin_obj_t pin_PH02;
extern const mcu_pin_obj_t pin_PH03;
extern const mcu_pin_obj_t pin_PH04;
extern const mcu_pin_obj_t pin_PH05;
extern const mcu_pin_obj_t pin_PH06;
extern const mcu_pin_obj_t pin_PH07;
extern const mcu_pin_obj_t pin_PH08;
extern const mcu_pin_obj_t pin_PH09;
extern const mcu_pin_obj_t pin_PH10;
extern const mcu_pin_obj_t pin_PH11;
extern const mcu_pin_obj_t pin_PH12;
extern const mcu_pin_obj_t pin_PH13;
extern const mcu_pin_obj_t pin_PH14;
extern const mcu_pin_obj_t pin_PH15;
extern const mcu_pin_obj_t pin_PI00;
extern const mcu_pin_obj_t pin_PI01;
extern const mcu_pin_obj_t pin_PI02;
extern const mcu_pin_obj_t pin_PI03;
extern const mcu_pin_obj_t pin_PI04;
extern const mcu_pin_obj_t pin_PI05;
extern const mcu_pin_obj_t pin_PI06;
extern const mcu_pin_obj_t pin_PI07;
extern const mcu_pin_obj_t pin_PI08;
extern const mcu_pin_obj_t pin_PI09;
extern const mcu_pin_obj_t pin_PI10;
extern const mcu_pin_obj_t pin_PI11;
#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PINS_H

460
ports/stm/peripherals/timers.c Normal file
View File

@ -0,0 +1,460 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 Lucian Copeland for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "timers.h"
#include "py/mpconfig.h"
#include "py/gc.h"
#include "py/obj.h"
#include "py/runtime.h"
#include "supervisor/shared/translate.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/microcontroller/Pin.h"
#if !(CPY_STM32H7)
#define ALL_CLOCKS 0xFFFF
#define NULL_IRQ 0xFF
static bool stm_timer_reserved[MP_ARRAY_SIZE(mcu_tim_banks)];
static bool stm_timer_never_reset[MP_ARRAY_SIZE(mcu_tim_banks)];
static void (*stm_timer_callback[MP_ARRAY_SIZE(mcu_tim_banks)])(void);
static size_t irq_map[] = {
#ifdef TIM1
TIM1_CC_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM2
TIM2_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM3
TIM3_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM4
TIM4_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM5
TIM5_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM6
#if !defined(DAC_BASE) && !defined(DAC1_BASE)
TIM6_IRQn,
#else
TIM6_DAC_IRQn,
#endif
#else
NULL_IRQ,
#endif
#ifdef TIM7
TIM7_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM8
TIM8_CC_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM9
TIM1_BRK_TIM9_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM10
TIM1_UP_TIM10_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM11
TIM1_TRG_COM_TIM11_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM12
TIM8_BRK_TIM12_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM13
TIM8_UP_TIM13_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM14
TIM8_TRG_COM_TIM14_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM15
TIM15_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM16
TIM16_IRQn,
#else
NULL_IRQ,
#endif
#ifdef TIM17
TIM17_IRQn,
#else
NULL_IRQ,
#endif
};
// Get the frequency (in Hz) of the source clock for the given timer.
// On STM32F405/407/415/417 there are 2 cases for how the clock freq is set.
// If the APB prescaler is 1, then the timer clock is equal to its respective
// APB clock. Otherwise (APB prescaler > 1) the timer clock is twice its
// respective APB clock. See DM00031020 Rev 4, page 115.
uint32_t stm_peripherals_timer_get_source_freq(TIM_TypeDef * timer) {
size_t tim_id = stm_peripherals_timer_get_index(timer);
uint32_t source, clk_div;
if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) {
// TIM{1,8,9,10,11} are on APB2
source = HAL_RCC_GetPCLK2Freq();
clk_div = RCC->CFGR & RCC_CFGR_PPRE2;
} else {
// TIM{2,3,4,5,6,7,12,13,14} are on APB1
source = HAL_RCC_GetPCLK1Freq();
clk_div = RCC->CFGR & RCC_CFGR_PPRE1;
}
if (clk_div != 0) {
// APB prescaler for this timer is > 1
source *= 2;
}
return source;
}
size_t stm_peripherals_timer_get_irqnum(TIM_TypeDef * instance) {
size_t tim_id = stm_peripherals_timer_get_index(instance);
return irq_map[tim_id];
}
void timers_reset(void) {
uint16_t never_reset_mask = 0x00;
for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_tim_banks); i++) {
if (!stm_timer_never_reset[i]) {
stm_timer_reserved[i] = false;
} else {
never_reset_mask |= 1 << i;
}
}
tim_clock_disable(ALL_CLOCKS & ~(never_reset_mask));
}
TIM_TypeDef * stm_peripherals_find_timer(void) {
// Check for timers on pins outside the package size
for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_tim_banks); i++) {
bool timer_in_package = false;
// Find each timer instance on the given bank
for (size_t j = 0; j < MP_ARRAY_SIZE(mcu_tim_pin_list); j++) {
// If a pin is claimed, we skip it
if ( (mcu_tim_pin_list[j].tim_index == i + 1)
&& (common_hal_mcu_pin_is_free(mcu_tim_pin_list[j].pin) == true) ) {
// Search whether any pins in the package array match it
for (size_t k = 0; k < mcu_pin_globals.map.alloc; k++) {
if ( (mcu_tim_pin_list[j].pin == (mcu_pin_obj_t*)(mcu_pin_globals.map.table[k].value)) ) {
timer_in_package = true;
}
}
}
}
// If no results are found, no unclaimed pins with this timer are in this package,
// and it is safe to pick
if (timer_in_package == false && mcu_tim_banks[i] != NULL) {
// DEBUG: print the timer
return mcu_tim_banks[i];
mp_printf(&mp_plat_print, "Timer: %d\n",i);
}
}
//TODO: secondary search for timers outside the pins in the board profile
// Work backwards - higher index timers have fewer pin allocations
for (size_t i = (MP_ARRAY_SIZE(mcu_tim_banks) - 1); i >= 0; i--) {
if ((!stm_timer_reserved[i]) && (mcu_tim_banks[i] != NULL)) {
// DEBUG: print the timer
mp_printf(&mp_plat_print, "Timer: %d\n",i);
return mcu_tim_banks[i];
}
}
mp_raise_RuntimeError(translate("All timers in use"));
return NULL;
}
void stm_peripherals_timer_preinit(TIM_TypeDef * instance, uint8_t prio, void (*callback)(void)) {
size_t tim_idx = stm_peripherals_timer_get_index(instance);
stm_timer_callback[tim_idx] = callback;
tim_clock_enable(1 << tim_idx);
HAL_NVIC_SetPriority(irq_map[tim_idx], prio, 0);
HAL_NVIC_EnableIRQ(irq_map[tim_idx]);
}
void stm_peripherals_timer_reserve(TIM_TypeDef * instance) {
size_t tim_idx = stm_peripherals_timer_get_index(instance);
stm_timer_reserved[tim_idx] = true;
}
void stm_peripherals_timer_set_callback(void(*callback)(void), TIM_TypeDef * timer) {
stm_timer_callback[stm_peripherals_timer_get_index(timer)] = callback;
}
void stm_peripherals_timer_free(TIM_TypeDef * instance) {
size_t tim_idx = stm_peripherals_timer_get_index(instance);
HAL_NVIC_DisableIRQ(irq_map[tim_idx]);
stm_timer_callback[tim_idx] = NULL;
tim_clock_disable(1 << tim_idx);
stm_timer_reserved[tim_idx] = false;
stm_timer_never_reset[tim_idx] = false;
}
void stm_peripherals_timer_never_reset(TIM_TypeDef * instance) {
size_t tim_idx = stm_peripherals_timer_get_index(instance);
stm_timer_never_reset[tim_idx] = true;
}
void stm_peripherals_timer_reset_ok(TIM_TypeDef * instance) {
size_t tim_idx = stm_peripherals_timer_get_index(instance);
stm_timer_never_reset[tim_idx] = false;
}
bool stm_peripherals_timer_is_never_reset(TIM_TypeDef * instance){
size_t tim_idx = stm_peripherals_timer_get_index(instance);
return stm_timer_never_reset[tim_idx];
}
bool stm_peripherals_timer_is_reserved(TIM_TypeDef * instance) {
size_t tim_idx = stm_peripherals_timer_get_index(instance);
return stm_timer_reserved[tim_idx];
}
size_t stm_peripherals_timer_get_index(TIM_TypeDef * instance) {
for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_tim_banks); i++) {
if (instance == mcu_tim_banks[i]) {
return i;
}
}
return ~(size_t)0;
}
void tim_clock_enable(uint16_t mask) {
#ifdef TIM1
if (mask & (1 << 0)) {
__HAL_RCC_TIM1_CLK_ENABLE();
}
#endif
#ifdef TIM2
if (mask & (1 << 1)) {
__HAL_RCC_TIM2_CLK_ENABLE();
}
#endif
#ifdef TIM3
if (mask & (1 << 2)) {
__HAL_RCC_TIM3_CLK_ENABLE();
}
#endif
#ifdef TIM4
if (mask & (1 << 3)) {
__HAL_RCC_TIM4_CLK_ENABLE();
}
#endif
#ifdef TIM5
if (mask & (1 << 4)) {
__HAL_RCC_TIM5_CLK_ENABLE();
}
#endif
//6 and 7 are reserved ADC timers
#ifdef TIM8
if (mask & (1 << 7)) {
__HAL_RCC_TIM8_CLK_ENABLE();
}
#endif
#ifdef TIM9
if (mask & (1 << 8)) {
__HAL_RCC_TIM9_CLK_ENABLE();
}
#endif
#ifdef TIM10
if (mask & (1 << 9)) {
__HAL_RCC_TIM10_CLK_ENABLE();
}
#endif
#ifdef TIM11
if (mask & (1 << 10)) {
__HAL_RCC_TIM11_CLK_ENABLE();
}
#endif
#ifdef TIM12
if (mask & (1 << 11)) {
__HAL_RCC_TIM12_CLK_ENABLE();
}
#endif
#ifdef TIM13
if (mask & (1 << 12)) {
__HAL_RCC_TIM13_CLK_ENABLE();
}
#endif
#ifdef TIM14
if (mask & (1 << 13)) {
__HAL_RCC_TIM14_CLK_ENABLE();
}
#endif
}
void tim_clock_disable(uint16_t mask) {
#ifdef TIM1
if (mask & (1 << 0)) {
__HAL_RCC_TIM1_CLK_DISABLE();
}
#endif
#ifdef TIM2
if (mask & (1 << 1)) {
__HAL_RCC_TIM2_CLK_DISABLE();
}
#endif
#ifdef TIM3
if (mask & (1 << 2)) {
__HAL_RCC_TIM3_CLK_DISABLE();
}
#endif
#ifdef TIM4
if (mask & (1 << 3)) {
__HAL_RCC_TIM4_CLK_DISABLE();
}
#endif
#ifdef TIM5
if (mask & (1 << 4)) {
__HAL_RCC_TIM5_CLK_DISABLE();
}
#endif
//6 and 7 are reserved ADC timers
#ifdef TIM8
if (mask & (1 << 7)) {
__HAL_RCC_TIM8_CLK_DISABLE();
}
#endif
#ifdef TIM9
if (mask & (1 << 8)) {
__HAL_RCC_TIM9_CLK_DISABLE();
}
#endif
#ifdef TIM10
if (mask & (1 << 9)) {
__HAL_RCC_TIM10_CLK_DISABLE();
}
#endif
#ifdef TIM11
if (mask & (1 << 10)) {
__HAL_RCC_TIM11_CLK_DISABLE();
}
#endif
#ifdef TIM12
if (mask & (1 << 11)) {
__HAL_RCC_TIM12_CLK_DISABLE();
}
#endif
#ifdef TIM13
if (mask & (1 << 12)) {
__HAL_RCC_TIM13_CLK_DISABLE();
}
#endif
#ifdef TIM14
if (mask & (1 << 13)) {
__HAL_RCC_TIM14_CLK_DISABLE();
}
#endif
}
STATIC void callback_router(size_t index) {
if (stm_timer_callback[index - 1]) {
(*stm_timer_callback[index - 1])();
}
}
void TIM1_CC_IRQHandler(void) { // Advanced timer
callback_router(1);
}
void TIM2_IRQHandler(void) {
callback_router(2);
}
void TIM3_IRQHandler(void) {
callback_router(3);
}
void TIM4_IRQHandler(void) {
callback_router(4);
}
void TIM5_IRQHandler(void) {
callback_router(5);
}
void TIM6_DAC_IRQHandler(void) { // Basic timer (DAC)
callback_router(6);
}
void TIM7_IRQHandler(void) { // Basic timer
callback_router(7);
}
void TIM8_CC_IRQHandler(void) { // Advanced timer
callback_router(8);
}
// Advanced timer interrupts are currently unused.
void TIM1_BRK_TIM9_IRQHandler(void) {
callback_router(9);
}
void TIM1_UP_TIM10_IRQHandler(void) {
callback_router(10);
}
void TIM1_TRG_COM_TIM11_IRQHandler(void) {
callback_router(11);
}
void TIM8_BRK_TIM12_IRQHandler(void) {
callback_router(12);
}
void TIM8_UP_TIM13_IRQHandler(void) {
callback_router(13);
}
void TIM8_TRG_COM_TIM14_IRQHandler(void) {
callback_router(14);
}
#if (CPY_STM32H7)
void TIM15_IRQHandler(void) {
callback_router(15);
}
void TIM16_IRQHandler(void) {
callback_router(16);
}
void TIM17_IRQHandler(void) {
callback_router(17);
}
#endif
#endif

46
ports/stm/peripherals/timers.h Normal file
View File

@ -0,0 +1,46 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 Lucian Copeland for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdint.h>
#include "py/mphal.h"
#include "peripherals/periph.h"
#include STM32_HAL_H
void tim_clock_enable(uint16_t mask);
void tim_clock_disable(uint16_t mask);
uint32_t stm_peripherals_timer_get_source_freq(TIM_TypeDef * timer);
size_t stm_peripherals_timer_get_irqnum(TIM_TypeDef * instance);
void timers_reset(void);
TIM_TypeDef * stm_peripherals_find_timer(void);
void stm_peripherals_timer_preinit(TIM_TypeDef * instance, uint8_t prio, void (*callback)(void));
void stm_peripherals_timer_reserve(TIM_TypeDef * instance);
void stm_peripherals_timer_free(TIM_TypeDef * instance);
void stm_peripherals_timer_never_reset(TIM_TypeDef * instance);
void stm_peripherals_timer_reset_ok(TIM_TypeDef * instance);
bool stm_peripherals_timer_is_never_reset(TIM_TypeDef * instance);
bool stm_peripherals_timer_is_reserved(TIM_TypeDef * instance);
size_t stm_peripherals_timer_get_index(TIM_TypeDef * instance);

2
ports/stm/supervisor/port.c
View File

@ -41,6 +41,7 @@
#include "common-hal/pulseio/PWMOut.h"
#include "common-hal/pulseio/PulseOut.h"
#include "common-hal/pulseio/PulseIn.h"
#include "timers.h"
#endif
#include "clocks.h"
@ -224,6 +225,7 @@ void reset_port(void) {
uart_reset();
#endif
#if CIRCUITPY_PULSEIO
timers_reset();
pwmout_reset();
pulseout_reset();
pulsein_reset();

5
ports/stm/supervisor/usb.c
View File

@ -86,6 +86,8 @@ void init_usb_hardware(void) {
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
never_reset_pin_number(0, 11);
never_reset_pin_number(0, 12);
claim_pin(0, 11);
claim_pin(0, 12);
/* Configure VBUS Pin */
#if !(BOARD_NO_VBUS_SENSE)
@ -94,6 +96,7 @@ void init_usb_hardware(void) {
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
never_reset_pin_number(0, 9);
claim_pin(0, 9);
#endif
/* This for ID line debug */
@ -108,6 +111,7 @@ void init_usb_hardware(void) {
#endif
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
never_reset_pin_number(0, 10);
claim_pin(0, 10);
#ifdef STM32F412Zx
/* Configure POWER_SWITCH IO pin (F412 ONLY)*/
@ -116,6 +120,7 @@ void init_usb_hardware(void) {
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
never_reset_pin_number(0, 8);
claim_pin(0, 8);
#endif
#if CPY_STM32H7

2
ports/stm/tools/parse_af_csv.py
View File

@ -52,6 +52,8 @@ def evaluate_tim(inper, inlist, altfn, pin):
if inper[:3] == "TIM" and inper[5:7] == "CH" and inper[-1:] != 'N':
inlist.append([inper[3:4],altfn,inper[-1:],pin])
elif inper[:3] == "TIM" and inper[6:8] == "CH" and inper[-1:] != 'N':
inlist.append([inper[3:5],altfn,inper[-1:],pin])
# Open target file
with open(sys.argv[1]) as csv_file:

93
ports/stm/tools/pins.csv
View File

@ -1,93 +0,0 @@
A0,PA3
A1,PC0
A2,PC3
A3,PB1
A4,PC2
A5,PF10
A6,PF4
A7,PF5
A8,PF6
D0,PB7
D1,PB6
D2,PG14
D3,PE13
D4,PE14
D5,PE11
D6,PE9
D7,PG12
D8,PF3
D9,PD15
D10,PD14
D11,PB5
D12,PA6
D13,PA5
D14,PB9
D15,PB8
D16,PC6
D17,PB15
D18,PB13
D19,PB12
D20,PA15
D21,PC7
D22,PB5
D23,PB3
D24,PA4
D25,PB4
D26,PG6
D27,PB2
D28,PD13
D29,PD12
D30,PD11
D31,PE2
D32,PA0
D33,PB0
D34,PE0
D35,PB11
D36,PB10
D37,PE15
D38,PE6
D39,PE12
D40,PE10
D41,PE7
D42,PE8
D43,PC8
D44,PC9
D45,PC10
D46,PC11
D47,PC12
D48,PD2
D49,PG2
D50,PG3
D51,PD7
D52,PD6
D53,PD5
D54,PD4
D55,PD3
D56,PE2
D57,PE4
D58,PE5
D59,PE6
D60,PE3
D61,PF8
D62,PF7
D63,PF9
D64,PG1
D65,PG0
D66,PD1
D67,PD0
D68,PF0
D69,PF1
D70,PF2
D71,PE0
D72,PB2
SDA,PB9
SCL,PB8
MOSI,PB5
MISO,PA6
SCK,PA5
RX,PB7
TX,PB6
LED1,PB00
LED2,PE01
LED3,PB14
SW,PC13
1 A0 PA3
2 A1 PC0
3 A2 PC3
4 A3 PB1
5 A4 PC2
6 A5 PF10
7 A6 PF4
8 A7 PF5
9 A8 PF6
10 D0 PB7
11 D1 PB6
12 D2 PG14
13 D3 PE13
14 D4 PE14
15 D5 PE11
16 D6 PE9
17 D7 PG12
18 D8 PF3
19 D9 PD15
20 D10 PD14
21 D11 PB5
22 D12 PA6
23 D13 PA5
24 D14 PB9
25 D15 PB8
26 D16 PC6
27 D17 PB15
28 D18 PB13
29 D19 PB12
30 D20 PA15
31 D21 PC7
32 D22 PB5
33 D23 PB3
34 D24 PA4
35 D25 PB4
36 D26 PG6
37 D27 PB2
38 D28 PD13
39 D29 PD12
40 D30 PD11
41 D31 PE2
42 D32 PA0
43 D33 PB0
44 D34 PE0
45 D35 PB11
46 D36 PB10
47 D37 PE15
48 D38 PE6
49 D39 PE12
50 D40 PE10
51 D41 PE7
52 D42 PE8
53 D43 PC8
54 D44 PC9
55 D45 PC10
56 D46 PC11
57 D47 PC12
58 D48 PD2
59 D49 PG2
60 D50 PG3
61 D51 PD7
62 D52 PD6
63 D53 PD5
64 D54 PD4
65 D55 PD3
66 D56 PE2
67 D57 PE4
68 D58 PE5
69 D59 PE6
70 D60 PE3
71 D61 PF8
72 D62 PF7
73 D63 PF9
74 D64 PG1
75 D65 PG0
76 D66 PD1
77 D67 PD0
78 D68 PF0
79 D69 PF1
80 D70 PF2
81 D71 PE0
82 D72 PB2
83 SDA PB9
84 SCL PB8
85 MOSI PB5
86 MISO PA6
87 SCK PA5
88 RX PB7
89 TX PB6
90 LED1 PB00
91 LED2 PE01
92 LED3 PB14
93 SW PC13

168
ports/stm/tools/stm32f767_af.csv
View File

@ -1,168 +0,0 @@
PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0
PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT,ADC123_IN1
PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,MDIOS_MDIO,,LCD_R1,EVENTOUT,ADC123_IN2
PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT,ADC12_IN5
PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,SPI6_MISO,TIM13_CH1,,,MDIOS_MDC,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,SPI6_MOSI,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT,ADC12_IN7
PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,CAN3_RX,UART7_RX,LCD_B3,LCD_R6,EVENTOUT,
PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,LCD_R5,EVENTOUT,
PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,LCD_B4,OTG_FS_ID,,MDIOS_MDIO,DCMI_D1,LCD_B1,EVENTOUT,
PortA,PA11,,TIM1_CH4,,,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
PortA,PA12,,TIM1_ETR,,,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT,
PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,
PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS,UART4_RTS,,,CAN3_TX,UART7_TX,,,EVENTOUT,
PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,DFSDM1_CKOUT,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT,ADC12_IN8
PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATAIN1,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT,ADC12_IN9
PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,DFSDM1_CKIN1,,,,,EVENTOUT,
PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,SPI6_SCK,,SDMMC2_D2,CAN3_RX,UART7_RX,,,EVENTOUT,
PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,SPI6_MISO,,SDMMC2_D3,CAN3_TX,UART7_TX,,,EVENTOUT,
PortB,PB5,,UART5_RX,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,SPI6_MOSI,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,LCD_G7,EVENTOUT,
PortB,PB6,,UART5_TX,TIM4_CH1,HDMI_CEC,I2C1_SCL,,DFSDM1_DATAIN5,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,I2C4_SCL,FMC_SDNE1,DCMI_D5,,EVENTOUT,
PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,DFSDM1_CKIN5,USART1_RX,,,,I2C4_SDA,FMC_NL,DCMI_VSYNC,,EVENTOUT,
PortB,PB8,,I2C4_SCL,TIM4_CH3,TIM10_CH1,I2C1_SCL,,DFSDM1_CKIN7,UART5_RX,,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT,
PortB,PB9,,I2C4_SDA,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,DFSDM1_DATAIN7,UART5_TX,,CAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT,
PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,DFSDM1_DATAIN7,USART3_TX,,QUADSPI_BK1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DSI_TE,LCD_G5,EVENTOUT,
PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,DFSDM1_DATAIN1,USART3_CK,UART5_RX,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,DFSDM1_CKIN1,USART3_CTS,UART5_TX,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,USART1_TX,SPI2_MISO,DFSDM1_DATAIN2,USART3_RTS,UART4_RTS,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT,
PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SD,DFSDM1_CKIN2,,UART4_CTS,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT,
PortC,PC0,,,,DFSDM1_CKIN0,,,DFSDM1_DATAIN4,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_IN10
PortC,PC1,TRACED0,,,DFSDM1_DATAIN0,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,DFSDM1_CKIN4,ETH_MDC,MDIOS_MDC,,,EVENTOUT,ADC123_IN11
PortC,PC2,,,,DFSDM1_CKIN1,,SPI2_MISO,DFSDM1_CKOUT,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
PortC,PC3,,,,DFSDM1_DATAIN1,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
PortC,PC4,,,,DFSDM1_CKIN2,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_IN14
PortC,PC5,,,,DFSDM1_DATAIN2,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15
PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,DFSDM1_CKIN3,USART6_TX,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,DFSDM1_DATAIN3,USART6_RX,FMC_NE1,SDMMC2_D7,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT,
PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,FMC_NE2/FMC_NCE,,,SDMMC1_D0,DCMI_D2,,EVENTOUT,
PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,LCD_G3,,SDMMC1_D1,DCMI_D3,LCD_B2,EVENTOUT,
PortC,PC10,,,,DFSDM1_CKIN5,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT,
PortC,PC11,,,,DFSDM1_DATAIN5,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT,
PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT,
PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
PortD,PD0,,,,DFSDM1_CKIN6,,,DFSDM1_DATAIN7,,UART4_RX,CAN1_RX,,,FMC_D2,,,EVENTOUT,
PortD,PD1,,,,DFSDM1_DATAIN6,,,DFSDM1_CKIN7,,UART4_TX,CAN1_TX,,,FMC_D3,,,EVENTOUT,
PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT,
PortD,PD3,,,,DFSDM1_CKOUT,,SPI2_SCK/I2S2_CK,DFSDM1_DATAIN0,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
PortD,PD4,,,,,,,DFSDM1_CKIN0,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
PortD,PD6,,,,DFSDM1_CKIN4,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,DFSDM1_DATAIN1,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
PortD,PD7,,,,DFSDM1_DATAIN4,,SPI1_MOSI/I2S1_SD,DFSDM1_CKIN1,USART2_CK,SPDIFRX_IN0,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT,
PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT,
PortD,PD9,,,,DFSDM1_DATAIN3,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
PortD,PD10,,,,DFSDM1_CKOUT,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT,
PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT,
PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT,
PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT,
PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT,
PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT,
PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,DFSDM1_DATAIN3,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,DFSDM1_CKIN3,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATAIN2,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT,
PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT,
PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT,
PortE,PE10,,TIM1_CH2N,,,,,DFSDM1_DATAIN4,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT,
PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,DFSDM1_CKIN4,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT,
PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,DFSDM1_DATAIN5,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT,
PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,DFSDM1_CKIN5,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT,
PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT,
PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4
PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5
PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6
PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7
PortF,PF10,,,,,,,,,,QUADSPI_CLK,,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
PortF,PF13,,,,,I2C4_SMBA,,DFSDM1_DATAIN6,,,,,,FMC_A7,,,EVENTOUT,
PortF,PF14,,,,,I2C4_SCL,,DFSDM1_CKIN6,,,,,,FMC_A8,,,EVENTOUT,
PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,
PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
PortG,PG6,,,,,,,,,,,,,FMC_NE3,DCMI_D12,LCD_R7,EVENTOUT,
PortG,PG7,,,,,,,SAI1_MCLK_A,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT,
PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT,
PortG,PG9,,,,,,SPI1_MISO,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT,
PortG,PG10,,,,,,SPI1_NSS/I2S1_WS,,,,LCD_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
PortG,PG11,,,,,,SPI1_SCK/I2S1_CK,,SPDIFRX_IN0,,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT,
PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,SDMMC2_D3,FMC_NE4,,LCD_B1,EVENTOUT,
PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT,
PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT,
PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
PortH,PH4,,,,,I2C2_SCL,,,,,LCD_G5,OTG_HS_ULPI_NXT,,,,LCD_G4,EVENTOUT,
PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT,
PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT,
PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
PortI,PI11,,,,,,,,,,LCD_G6,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
PortI,PI15,,,,,,,,,,LCD_G2,,,,,LCD_R0,EVENTOUT,
PortJ,PJ0,,,,,,,,,,LCD_R7,,,,,LCD_R1,EVENTOUT,
PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
PortJ,PJ2,,,,,,,,,,,,,,DSI_TE,LCD_R3,EVENTOUT,
PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT,
PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT,
PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT,
PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT,
PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT,
PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT,
PortJ,PJ12,,,,,,,,,,LCD_G3,,,,,LCD_B0,EVENTOUT,
PortJ,PJ13,,,,,,,,,,LCD_G4,,,,,LCD_B1,EVENTOUT,
PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT,
PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT,
PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT,
PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
1 PortA PA0 TIM2_CH1/TIM2_ETR TIM5_CH1 TIM8_ETR USART2_CTS UART4_TX SAI2_SD_B ETH_MII_CRS EVENTOUT ADC123_IN0
2 PortA PA1 TIM2_CH2 TIM5_CH2 USART2_RTS UART4_RX QUADSPI_BK1_IO3 SAI2_MCK_B ETH_MII_RX_CLK/ETH_RMII_REF_CLK LCD_R2 EVENTOUT ADC123_IN1
3 PortA PA2 TIM2_CH3 TIM5_CH3 TIM9_CH1 USART2_TX SAI2_SCK_B ETH_MDIO MDIOS_MDIO LCD_R1 EVENTOUT ADC123_IN2
4 PortA PA3 TIM2_CH4 TIM5_CH4 TIM9_CH2 USART2_RX LCD_B2 OTG_HS_ULPI_D0 ETH_MII_COL LCD_B5 EVENTOUT ADC123_IN3
5 PortA PA4 SPI1_NSS/I2S1_WS SPI3_NSS/I2S3_WS USART2_CK SPI6_NSS OTG_HS_SOF DCMI_HSYNC LCD_VSYNC EVENTOUT ADC12_IN4
6 PortA PA5 TIM2_CH1/TIM2_ETR TIM8_CH1N SPI1_SCK/I2S1_CK SPI6_SCK OTG_HS_ULPI_CK LCD_R4 EVENTOUT ADC12_IN5
7 PortA PA6 TIM1_BKIN TIM3_CH1 TIM8_BKIN SPI1_MISO SPI6_MISO TIM13_CH1 MDIOS_MDC DCMI_PIXCLK LCD_G2 EVENTOUT ADC12_IN6
8 PortA PA7 TIM1_CH1N TIM3_CH2 TIM8_CH1N SPI1_MOSI/I2S1_SD SPI6_MOSI TIM14_CH1 ETH_MII_RX_DV/ETH_RMII_CRS_DV FMC_SDNWE EVENTOUT ADC12_IN7
9 PortA PA8 MCO1 TIM1_CH1 TIM8_BKIN2 I2C3_SCL USART1_CK OTG_FS_SOF CAN3_RX UART7_RX LCD_B3 LCD_R6 EVENTOUT
10 PortA PA9 TIM1_CH2 I2C3_SMBA SPI2_SCK/I2S2_CK USART1_TX DCMI_D0 LCD_R5 EVENTOUT
11 PortA PA10 TIM1_CH3 USART1_RX LCD_B4 OTG_FS_ID MDIOS_MDIO DCMI_D1 LCD_B1 EVENTOUT
12 PortA PA11 TIM1_CH4 SPI2_NSS/I2S2_WS UART4_RX USART1_CTS CAN1_RX OTG_FS_DM LCD_R4 EVENTOUT
13 PortA PA12 TIM1_ETR SPI2_SCK/I2S2_CK UART4_TX USART1_RTS SAI2_FS_B CAN1_TX OTG_FS_DP LCD_R5 EVENTOUT
14 PortA PA13 JTMS/SWDIO EVENTOUT
15 PortA PA14 JTCK/SWCLK EVENTOUT
16 PortA PA15 JTDI TIM2_CH1/TIM2_ETR HDMI_CEC SPI1_NSS/I2S1_WS SPI3_NSS/I2S3_WS SPI6_NSS UART4_RTS CAN3_TX UART7_TX EVENTOUT
17 PortB PB0 TIM1_CH2N TIM3_CH3 TIM8_CH2N DFSDM1_CKOUT UART4_CTS LCD_R3 OTG_HS_ULPI_D1 ETH_MII_RXD2 LCD_G1 EVENTOUT ADC12_IN8
18 PortB PB1 TIM1_CH3N TIM3_CH4 TIM8_CH3N DFSDM1_DATAIN1 LCD_R6 OTG_HS_ULPI_D2 ETH_MII_RXD3 LCD_G0 EVENTOUT ADC12_IN9
19 PortB PB2 SAI1_SD_A SPI3_MOSI/I2S3_SD QUADSPI_CLK DFSDM1_CKIN1 EVENTOUT
20 PortB PB3 JTDO/TRACESWO TIM2_CH2 SPI1_SCK/I2S1_CK SPI3_SCK/I2S3_CK SPI6_SCK SDMMC2_D2 CAN3_RX UART7_RX EVENTOUT
21 PortB PB4 NJTRST TIM3_CH1 SPI1_MISO SPI3_MISO SPI2_NSS/I2S2_WS SPI6_MISO SDMMC2_D3 CAN3_TX UART7_TX EVENTOUT
22 PortB PB5 UART5_RX TIM3_CH2 I2C1_SMBA SPI1_MOSI/I2S1_SD SPI3_MOSI/I2S3_SD SPI6_MOSI CAN2_RX OTG_HS_ULPI_D7 ETH_PPS_OUT FMC_SDCKE1 DCMI_D10 LCD_G7 EVENTOUT
23 PortB PB6 UART5_TX TIM4_CH1 HDMI_CEC I2C1_SCL DFSDM1_DATAIN5 USART1_TX CAN2_TX QUADSPI_BK1_NCS I2C4_SCL FMC_SDNE1 DCMI_D5 EVENTOUT
24 PortB PB7 TIM4_CH2 I2C1_SDA DFSDM1_CKIN5 USART1_RX I2C4_SDA FMC_NL DCMI_VSYNC EVENTOUT
25 PortB PB8 I2C4_SCL TIM4_CH3 TIM10_CH1 I2C1_SCL DFSDM1_CKIN7 UART5_RX CAN1_RX SDMMC2_D4 ETH_MII_TXD3 SDMMC1_D4 DCMI_D6 LCD_B6 EVENTOUT
26 PortB PB9 I2C4_SDA TIM4_CH4 TIM11_CH1 I2C1_SDA SPI2_NSS/I2S2_WS DFSDM1_DATAIN7 UART5_TX CAN1_TX SDMMC2_D5 I2C4_SMBA SDMMC1_D5 DCMI_D7 LCD_B7 EVENTOUT
27 PortB PB10 TIM2_CH3 I2C2_SCL SPI2_SCK/I2S2_CK DFSDM1_DATAIN7 USART3_TX QUADSPI_BK1_NCS OTG_HS_ULPI_D3 ETH_MII_RX_ER LCD_G4 EVENTOUT
28 PortB PB11 TIM2_CH4 I2C2_SDA DFSDM1_CKIN7 USART3_RX OTG_HS_ULPI_D4 ETH_MII_TX_EN/ETH_RMII_TX_EN DSI_TE LCD_G5 EVENTOUT
29 PortB PB12 TIM1_BKIN I2C2_SMBA SPI2_NSS/I2S2_WS DFSDM1_DATAIN1 USART3_CK UART5_RX CAN2_RX OTG_HS_ULPI_D5 ETH_MII_TXD0/ETH_RMII_TXD0 OTG_HS_ID EVENTOUT
30 PortB PB13 TIM1_CH1N SPI2_SCK/I2S2_CK DFSDM1_CKIN1 USART3_CTS UART5_TX CAN2_TX OTG_HS_ULPI_D6 ETH_MII_TXD1/ETH_RMII_TXD1 EVENTOUT
31 PortB PB14 TIM1_CH2N TIM8_CH2N USART1_TX SPI2_MISO DFSDM1_DATAIN2 USART3_RTS UART4_RTS TIM12_CH1 SDMMC2_D0 OTG_HS_DM EVENTOUT
32 PortB PB15 RTC_REFIN TIM1_CH3N TIM8_CH3N USART1_RX SPI2_MOSI/I2S2_SD DFSDM1_CKIN2 UART4_CTS TIM12_CH2 SDMMC2_D1 OTG_HS_DP EVENTOUT
33 PortC PC0 DFSDM1_CKIN0 DFSDM1_DATAIN4 SAI2_FS_B OTG_HS_ULPI_STP FMC_SDNWE LCD_R5 EVENTOUT ADC123_IN10
34 PortC PC1 TRACED0 DFSDM1_DATAIN0 SPI2_MOSI/I2S2_SD SAI1_SD_A DFSDM1_CKIN4 ETH_MDC MDIOS_MDC EVENTOUT ADC123_IN11
35 PortC PC2 DFSDM1_CKIN1 SPI2_MISO DFSDM1_CKOUT OTG_HS_ULPI_DIR ETH_MII_TXD2 FMC_SDNE0 EVENTOUT ADC123_IN12
36 PortC PC3 DFSDM1_DATAIN1 SPI2_MOSI/I2S2_SD OTG_HS_ULPI_NXT ETH_MII_TX_CLK FMC_SDCKE0 EVENTOUT ADC123_IN13
37 PortC PC4 DFSDM1_CKIN2 I2S1_MCK SPDIFRX_IN2 ETH_MII_RXD0/ETH_RMII_RXD0 FMC_SDNE0 EVENTOUT ADC12_IN14
38 PortC PC5 DFSDM1_DATAIN2 SPDIFRX_IN3 ETH_MII_RXD1/ETH_RMII_RXD1 FMC_SDCKE0 EVENTOUT ADC12_IN15
39 PortC PC6 TIM3_CH1 TIM8_CH1 I2S2_MCK DFSDM1_CKIN3 USART6_TX FMC_NWAIT SDMMC2_D6 SDMMC1_D6 DCMI_D0 LCD_HSYNC EVENTOUT
40 PortC PC7 TIM3_CH2 TIM8_CH2 I2S3_MCK DFSDM1_DATAIN3 USART6_RX FMC_NE1 SDMMC2_D7 SDMMC1_D7 DCMI_D1 LCD_G6 EVENTOUT
41 PortC PC8 TRACED1 TIM3_CH3 TIM8_CH3 UART5_RTS USART6_CK FMC_NE2/FMC_NCE SDMMC1_D0 DCMI_D2 EVENTOUT
42 PortC PC9 MCO2 TIM3_CH4 TIM8_CH4 I2C3_SDA I2S_CKIN UART5_CTS QUADSPI_BK1_IO0 LCD_G3 SDMMC1_D1 DCMI_D3 LCD_B2 EVENTOUT
43 PortC PC10 DFSDM1_CKIN5 SPI3_SCK/I2S3_CK USART3_TX UART4_TX QUADSPI_BK1_IO1 SDMMC1_D2 DCMI_D8 LCD_R2 EVENTOUT
44 PortC PC11 DFSDM1_DATAIN5 SPI3_MISO USART3_RX UART4_RX QUADSPI_BK2_NCS SDMMC1_D3 DCMI_D4 EVENTOUT
45 PortC PC12 TRACED3 SPI3_MOSI/I2S3_SD USART3_CK UART5_TX SDMMC1_CK DCMI_D9 EVENTOUT
46 PortC PC13 EVENTOUT
47 PortC PC14 EVENTOUT
48 PortC PC15 EVENTOUT
49 PortD PD0 DFSDM1_CKIN6 DFSDM1_DATAIN7 UART4_RX CAN1_RX FMC_D2 EVENTOUT
50 PortD PD1 DFSDM1_DATAIN6 DFSDM1_CKIN7 UART4_TX CAN1_TX FMC_D3 EVENTOUT
51 PortD PD2 TRACED2 TIM3_ETR UART5_RX SDMMC1_CMD DCMI_D11 EVENTOUT
52 PortD PD3 DFSDM1_CKOUT SPI2_SCK/I2S2_CK DFSDM1_DATAIN0 USART2_CTS FMC_CLK DCMI_D5 LCD_G7 EVENTOUT
53 PortD PD4 DFSDM1_CKIN0 USART2_RTS FMC_NOE EVENTOUT
54 PortD PD5 USART2_TX FMC_NWE EVENTOUT
55 PortD PD6 DFSDM1_CKIN4 SPI3_MOSI/I2S3_SD SAI1_SD_A USART2_RX DFSDM1_DATAIN1 SDMMC2_CK FMC_NWAIT DCMI_D10 LCD_B2 EVENTOUT
56 PortD PD7 DFSDM1_DATAIN4 SPI1_MOSI/I2S1_SD DFSDM1_CKIN1 USART2_CK SPDIFRX_IN0 SDMMC2_CMD FMC_NE1 EVENTOUT
57 PortD PD8 DFSDM1_CKIN3 USART3_TX SPDIFRX_IN1 FMC_D13 EVENTOUT
58 PortD PD9 DFSDM1_DATAIN3 USART3_RX FMC_D14 EVENTOUT
59 PortD PD10 DFSDM1_CKOUT USART3_CK FMC_D15 LCD_B3 EVENTOUT
60 PortD PD11 I2C4_SMBA USART3_CTS QUADSPI_BK1_IO0 SAI2_SD_A FMC_A16/FMC_CLE EVENTOUT
61 PortD PD12 TIM4_CH1 LPTIM1_IN1 I2C4_SCL USART3_RTS QUADSPI_BK1_IO1 SAI2_FS_A FMC_A17/FMC_ALE EVENTOUT
62 PortD PD13 TIM4_CH2 LPTIM1_OUT I2C4_SDA QUADSPI_BK1_IO3 SAI2_SCK_A FMC_A18 EVENTOUT
63 PortD PD14 TIM4_CH3 UART8_CTS FMC_D0 EVENTOUT
64 PortD PD15 TIM4_CH4 UART8_RTS FMC_D1 EVENTOUT
65 PortE PE0 TIM4_ETR LPTIM1_ETR UART8_RX SAI2_MCK_A FMC_NBL0 DCMI_D2 EVENTOUT
66 PortE PE1 LPTIM1_IN2 UART8_TX FMC_NBL1 DCMI_D3 EVENTOUT
67 PortE PE2 TRACECLK SPI4_SCK SAI1_MCLK_A QUADSPI_BK1_IO2 ETH_MII_TXD3 FMC_A23 EVENTOUT
68 PortE PE3 TRACED0 SAI1_SD_B FMC_A19 EVENTOUT
69 PortE PE4 TRACED1 SPI4_NSS SAI1_FS_A DFSDM1_DATAIN3 FMC_A20 DCMI_D4 LCD_B0 EVENTOUT
70 PortE PE5 TRACED2 TIM9_CH1 SPI4_MISO SAI1_SCK_A DFSDM1_CKIN3 FMC_A21 DCMI_D6 LCD_G0 EVENTOUT
71 PortE PE6 TRACED3 TIM1_BKIN2 TIM9_CH2 SPI4_MOSI SAI1_SD_A SAI2_MCK_B FMC_A22 DCMI_D7 LCD_G1 EVENTOUT
72 PortE PE7 TIM1_ETR DFSDM1_DATAIN2 UART7_RX QUADSPI_BK2_IO0 FMC_D4 EVENTOUT
73 PortE PE8 TIM1_CH1N DFSDM1_CKIN2 UART7_TX QUADSPI_BK2_IO1 FMC_D5 EVENTOUT
74 PortE PE9 TIM1_CH1 DFSDM1_CKOUT UART7_RTS QUADSPI_BK2_IO2 FMC_D6 EVENTOUT
75 PortE PE10 TIM1_CH2N DFSDM1_DATAIN4 UART7_CTS QUADSPI_BK2_IO3 FMC_D7 EVENTOUT
76 PortE PE11 TIM1_CH2 SPI4_NSS DFSDM1_CKIN4 SAI2_SD_B FMC_D8 LCD_G3 EVENTOUT
77 PortE PE12 TIM1_CH3N SPI4_SCK DFSDM1_DATAIN5 SAI2_SCK_B FMC_D9 LCD_B4 EVENTOUT
78 PortE PE13 TIM1_CH3 SPI4_MISO DFSDM1_CKIN5 SAI2_FS_B FMC_D10 LCD_DE EVENTOUT
79 PortE PE14 TIM1_CH4 SPI4_MOSI SAI2_MCK_B FMC_D11 LCD_CLK EVENTOUT
80 PortE PE15 TIM1_BKIN FMC_D12 LCD_R7 EVENTOUT
81 PortF PF0 I2C2_SDA FMC_A0 EVENTOUT
82 PortF PF1 I2C2_SCL FMC_A1 EVENTOUT
83 PortF PF2 I2C2_SMBA FMC_A2 EVENTOUT
84 PortF PF3 FMC_A3 EVENTOUT ADC3_IN9
85 PortF PF4 FMC_A4 EVENTOUT ADC3_IN14
86 PortF PF5 FMC_A5 EVENTOUT ADC3_IN15
87 PortF PF6 TIM10_CH1 SPI5_NSS SAI1_SD_B UART7_RX QUADSPI_BK1_IO3 EVENTOUT ADC3_IN4
88 PortF PF7 TIM11_CH1 SPI5_SCK SAI1_MCLK_B UART7_TX QUADSPI_BK1_IO2 EVENTOUT ADC3_IN5
89 PortF PF8 SPI5_MISO SAI1_SCK_B UART7_RTS TIM13_CH1 QUADSPI_BK1_IO0 EVENTOUT ADC3_IN6
90 PortF PF9 SPI5_MOSI SAI1_FS_B UART7_CTS TIM14_CH1 QUADSPI_BK1_IO1 EVENTOUT ADC3_IN7
91 PortF PF10 QUADSPI_CLK DCMI_D11 LCD_DE EVENTOUT ADC3_IN8
92 PortF PF11 SPI5_MOSI SAI2_SD_B FMC_SDNRAS DCMI_D12 EVENTOUT
93 PortF PF12 FMC_A6 EVENTOUT
94 PortF PF13 I2C4_SMBA DFSDM1_DATAIN6 FMC_A7 EVENTOUT
95 PortF PF14 I2C4_SCL DFSDM1_CKIN6 FMC_A8 EVENTOUT
96 PortF PF15 I2C4_SDA FMC_A9 EVENTOUT
97 PortG PG0 FMC_A10 EVENTOUT
98 PortG PG1 FMC_A11 EVENTOUT
99 PortG PG2 FMC_A12 EVENTOUT
100 PortG PG3 FMC_A13 EVENTOUT
101 PortG PG4 FMC_A14/FMC_BA0 EVENTOUT
102 PortG PG5 FMC_A15/FMC_BA1 EVENTOUT
103 PortG PG6 FMC_NE3 DCMI_D12 LCD_R7 EVENTOUT
104 PortG PG7 SAI1_MCLK_A USART6_CK FMC_INT DCMI_D13 LCD_CLK EVENTOUT
105 PortG PG8 SPI6_NSS SPDIFRX_IN2 USART6_RTS ETH_PPS_OUT FMC_SDCLK LCD_G7 EVENTOUT
106 PortG PG9 SPI1_MISO SPDIFRX_IN3 USART6_RX QUADSPI_BK2_IO2 SAI2_FS_B SDMMC2_D0 FMC_NE2/FMC_NCE DCMI_VSYNC EVENTOUT
107 PortG PG10 SPI1_NSS/I2S1_WS LCD_G3 SAI2_SD_B SDMMC2_D1 FMC_NE3 DCMI_D2 LCD_B2 EVENTOUT
108 PortG PG11 SPI1_SCK/I2S1_CK SPDIFRX_IN0 SDMMC2_D2 ETH_MII_TX_EN/ETH_RMII_TX_EN DCMI_D3 LCD_B3 EVENTOUT
109 PortG PG12 LPTIM1_IN1 SPI6_MISO SPDIFRX_IN1 USART6_RTS LCD_B4 SDMMC2_D3 FMC_NE4 LCD_B1 EVENTOUT
110 PortG PG13 TRACED0 LPTIM1_OUT SPI6_SCK USART6_CTS ETH_MII_TXD0/ETH_RMII_TXD0 FMC_A24 LCD_R0 EVENTOUT
111 PortG PG14 TRACED1 LPTIM1_ETR SPI6_MOSI USART6_TX QUADSPI_BK2_IO3 ETH_MII_TXD1/ETH_RMII_TXD1 FMC_A25 LCD_B0 EVENTOUT
112 PortG PG15 USART6_CTS FMC_SDNCAS DCMI_D13 EVENTOUT
113 PortH PH0 EVENTOUT
114 PortH PH1 EVENTOUT
115 PortH PH2 LPTIM1_IN2 QUADSPI_BK2_IO0 SAI2_SCK_B ETH_MII_CRS FMC_SDCKE0 LCD_R0 EVENTOUT
116 PortH PH3 QUADSPI_BK2_IO1 SAI2_MCK_B ETH_MII_COL FMC_SDNE0 LCD_R1 EVENTOUT
117 PortH PH4 I2C2_SCL LCD_G5 OTG_HS_ULPI_NXT LCD_G4 EVENTOUT
118 PortH PH5 I2C2_SDA SPI5_NSS FMC_SDNWE EVENTOUT
119 PortH PH6 I2C2_SMBA SPI5_SCK TIM12_CH1 ETH_MII_RXD2 FMC_SDNE1 DCMI_D8 EVENTOUT
120 PortH PH7 I2C3_SCL SPI5_MISO ETH_MII_RXD3 FMC_SDCKE1 DCMI_D9 EVENTOUT
121 PortH PH8 I2C3_SDA FMC_D16 DCMI_HSYNC LCD_R2 EVENTOUT
122 PortH PH9 I2C3_SMBA TIM12_CH2 FMC_D17 DCMI_D0 LCD_R3 EVENTOUT
123 PortH PH10 TIM5_CH1 I2C4_SMBA FMC_D18 DCMI_D1 LCD_R4 EVENTOUT
124 PortH PH11 TIM5_CH2 I2C4_SCL FMC_D19 DCMI_D2 LCD_R5 EVENTOUT
125 PortH PH12 TIM5_CH3 I2C4_SDA FMC_D20 DCMI_D3 LCD_R6 EVENTOUT
126 PortH PH13 TIM8_CH1N UART4_TX CAN1_TX FMC_D21 LCD_G2 EVENTOUT
127 PortH PH14 TIM8_CH2N UART4_RX CAN1_RX FMC_D22 DCMI_D4 LCD_G3 EVENTOUT
128 PortH PH15 TIM8_CH3N FMC_D23 DCMI_D11 LCD_G4 EVENTOUT
129 PortI PI0 TIM5_CH4 SPI2_NSS/I2S2_WS FMC_D24 DCMI_D13 LCD_G5 EVENTOUT
130 PortI PI1 TIM8_BKIN2 SPI2_SCK/I2S2_CK FMC_D25 DCMI_D8 LCD_G6 EVENTOUT
131 PortI PI2 TIM8_CH4 SPI2_MISO FMC_D26 DCMI_D9 LCD_G7 EVENTOUT
132 PortI PI3 TIM8_ETR SPI2_MOSI/I2S2_SD FMC_D27 DCMI_D10 EVENTOUT
133 PortI PI4 TIM8_BKIN SAI2_MCK_A FMC_NBL2 DCMI_D5 LCD_B4 EVENTOUT
134 PortI PI5 TIM8_CH1 SAI2_SCK_A FMC_NBL3 DCMI_VSYNC LCD_B5 EVENTOUT
135 PortI PI6 TIM8_CH2 SAI2_SD_A FMC_D28 DCMI_D6 LCD_B6 EVENTOUT
136 PortI PI7 TIM8_CH3 SAI2_FS_A FMC_D29 DCMI_D7 LCD_B7 EVENTOUT
137 PortI PI8 EVENTOUT
138 PortI PI9 UART4_RX CAN1_RX FMC_D30 LCD_VSYNC EVENTOUT
139 PortI PI10 ETH_MII_RX_ER FMC_D31 LCD_HSYNC EVENTOUT
140 PortI PI11 LCD_G6 OTG_HS_ULPI_DIR EVENTOUT
141 PortI PI12 LCD_HSYNC EVENTOUT
142 PortI PI13 LCD_VSYNC EVENTOUT
143 PortI PI14 LCD_CLK EVENTOUT
144 PortI PI15 LCD_G2 LCD_R0 EVENTOUT
145 PortJ PJ0 LCD_R7 LCD_R1 EVENTOUT
146 PortJ PJ1 LCD_R2 EVENTOUT
147 PortJ PJ2 DSI_TE LCD_R3 EVENTOUT
148 PortJ PJ3 LCD_R4 EVENTOUT
149 PortJ PJ4 LCD_R5 EVENTOUT
150 PortJ PJ5 LCD_R6 EVENTOUT
151 PortJ PJ6 LCD_R7 EVENTOUT
152 PortJ PJ7 LCD_G0 EVENTOUT
153 PortJ PJ8 LCD_G1 EVENTOUT
154 PortJ PJ9 LCD_G2 EVENTOUT
155 PortJ PJ10 LCD_G3 EVENTOUT
156 PortJ PJ11 LCD_G4 EVENTOUT
157 PortJ PJ12 LCD_G3 LCD_B0 EVENTOUT
158 PortJ PJ13 LCD_G4 LCD_B1 EVENTOUT
159 PortJ PJ14 LCD_B2 EVENTOUT
160 PortJ PJ15 LCD_B3 EVENTOUT
161 PortK PK0 LCD_G5 EVENTOUT
162 PortK PK1 LCD_G6 EVENTOUT
163 PortK PK2 LCD_G7 EVENTOUT
164 PortK PK3 LCD_B4 EVENTOUT
165 PortK PK4 LCD_B5 EVENTOUT
166 PortK PK5 LCD_B6 EVENTOUT
167 PortK PK6 LCD_B7 EVENTOUT
168 PortK PK7 LCD_DE EVENTOUT

3
shared-module/touchio/TouchIn.c
View File

@ -31,6 +31,7 @@
#include "py/runtime.h"
#include "py/mphal.h"
#include "shared-bindings/touchio/TouchIn.h"
#include "shared-bindings/microcontroller/Pin.h"
// This is a capacitive touch sensing routine using a single digital
// pin. The pin should be connected to the sensing pad, and to ground
@ -67,7 +68,7 @@ static uint16_t get_raw_reading(touchio_touchin_obj_t *self) {
}
void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, const mcu_pin_obj_t *pin) {
claim_pin(pin);
common_hal_mcu_pin_claim(pin);
self->digitalinout = m_new_obj(digitalio_digitalinout_obj_t);
self->digitalinout->base.type = &digitalio_digitalinout_type;