create F407 specific files
This commit is contained in:
parent
cdd1622350
commit
c4436910c3
108
ports/stm32f4/boards/STM32F407_fs.ld
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108
ports/stm32f4/boards/STM32F407_fs.ld
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@ -0,0 +1,108 @@
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/*
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GNU linker script for STM32F405 via Micropython
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*/
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
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FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
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FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
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FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */
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CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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/* Define tho top end of the stack. The stack is full descending so begins just
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above last byte of RAM. Note that EABI requires the stack to be 8-byte
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aligned for a call. */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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ENTRY(Reset_Handler)
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/* define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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/* This first flash block is 16K annd the isr vectors only take up
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about 400 bytes. Micropython pads this with files, but this didn't
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work with the size of Circuitpython's ff object. */
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. = ALIGN(4);
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} >FLASH_ISR
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text*) /* .text* sections (code) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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/* *(.glue_7) */ /* glue arm to thumb code */
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/* *(.glue_7t) */ /* glue thumb to arm code */
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. = ALIGN(4);
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_etext = .; /* define a global symbol at end of code */
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} >FLASH_TEXT
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* This is the initialized data section
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The program executes knowing that the data is in the RAM
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but the loader puts the initial values in the FLASH (inidata).
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It is one task of the startup to copy the initial values from FLASH to RAM. */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
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} >RAM AT> FLASH_TEXT
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .; /* define a global symbol at bss start; used by startup code */
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
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} >RAM
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/* this is to define the start of the heap, and make sure we have a minimum size */
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.heap :
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{
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. = ALIGN(4);
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. = . + _minimum_heap_size;
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. = ALIGN(4);
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} >RAM
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/* this just checks there is enough RAM for the stack */
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.stack :
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{
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. = ALIGN(4);
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. = . + _minimum_stack_size;
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. = ALIGN(4);
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} >RAM
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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516
ports/stm32f4/boards/startup_stm32f407xx.s
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516
ports/stm32f4/boards/startup_stm32f407xx.s
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@ -0,0 +1,516 @@
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/**
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******************************************************************************
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* @file startup_stm32f405xx.s
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* @author MCD Application Team
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* @brief STM32F405xx Devices vector table for GCC based toolchains.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M4 processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval : None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr sp, =_estack /* set stack pointer */
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the clock system intitialization function.*/
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bl SystemInit
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/* Call static constructors */
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/* bl __libc_init_array */
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/* Call the application's entry point.*/
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bl main
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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* @param None
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* @retval None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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*******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word WWDG_IRQHandler /* Window WatchDog */
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.word PVD_IRQHandler /* PVD through EXTI Line detection */
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.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
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.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
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.word FLASH_IRQHandler /* FLASH */
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.word RCC_IRQHandler /* RCC */
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.word EXTI0_IRQHandler /* EXTI Line0 */
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.word EXTI1_IRQHandler /* EXTI Line1 */
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.word EXTI2_IRQHandler /* EXTI Line2 */
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.word EXTI3_IRQHandler /* EXTI Line3 */
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.word EXTI4_IRQHandler /* EXTI Line4 */
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.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
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.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
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.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
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.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
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.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
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.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
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.word CAN1_TX_IRQHandler /* CAN1 TX */
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.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
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.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.word CAN1_SCE_IRQHandler /* CAN1 SCE */
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.word EXTI9_5_IRQHandler /* External Line[9:5]s */
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.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
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.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
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.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
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.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.word TIM2_IRQHandler /* TIM2 */
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.word TIM3_IRQHandler /* TIM3 */
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.word TIM4_IRQHandler /* TIM4 */
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.word I2C1_EV_IRQHandler /* I2C1 Event */
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.word I2C1_ER_IRQHandler /* I2C1 Error */
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.word I2C2_EV_IRQHandler /* I2C2 Event */
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.word I2C2_ER_IRQHandler /* I2C2 Error */
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.word SPI1_IRQHandler /* SPI1 */
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.word SPI2_IRQHandler /* SPI2 */
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.word USART1_IRQHandler /* USART1 */
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.word USART2_IRQHandler /* USART2 */
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.word USART3_IRQHandler /* USART3 */
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.word EXTI15_10_IRQHandler /* External Line[15:10]s */
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.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
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.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
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.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
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.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
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.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
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.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
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.word FSMC_IRQHandler /* FSMC */
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.word SDIO_IRQHandler /* SDIO */
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.word TIM5_IRQHandler /* TIM5 */
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.word SPI3_IRQHandler /* SPI3 */
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.word UART4_IRQHandler /* UART4 */
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.word UART5_IRQHandler /* UART5 */
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.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
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.word TIM7_IRQHandler /* TIM7 */
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.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
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.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
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.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
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.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
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.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word CAN2_TX_IRQHandler /* CAN2 TX */
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.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
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.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
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.word CAN2_SCE_IRQHandler /* CAN2 SCE */
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.word OTG_FS_IRQHandler /* USB OTG FS */
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.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
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.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
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.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
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.word USART6_IRQHandler /* USART6 */
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.word I2C3_EV_IRQHandler /* I2C3 event */
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.word I2C3_ER_IRQHandler /* I2C3 error */
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.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
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.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
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.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
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.word OTG_HS_IRQHandler /* USB OTG HS */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word HASH_RNG_IRQHandler /* Hash and Rng */
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.word FPU_IRQHandler /* FPU */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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|
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler,Default_Handler
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|
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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|
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
|
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|
||||
.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
|
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|
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.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
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.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
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|
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.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
@ -11,8 +11,8 @@ LONGINT_IMPL = NONE
|
||||
# other than the camera and ethernet, which aren't supported.
|
||||
MCU_SERIES = m4
|
||||
MCU_VARIANT = stm32f4
|
||||
MCU_SUB_VARIANT = stm32f405xx
|
||||
MCU_SUB_VARIANT = stm32f407xx
|
||||
MCU_PACKAGE = 100
|
||||
CMSIS_MCU = STM32F405xx
|
||||
LD_FILE = boards/STM32F405_fs.ld
|
||||
CMSIS_MCU = STM32F407xx
|
||||
LD_FILE = boards/STM32F407_fs.ld
|
||||
|
||||
|
@ -166,4 +166,10 @@ typedef struct {
|
||||
#include "stm32f405xx/periph.h"
|
||||
#endif
|
||||
|
||||
#ifdef STM32F407xx
|
||||
#define HAS_DAC 1
|
||||
#define HAS_TRNG 1
|
||||
#include "stm32f407xx/periph.h"
|
||||
#endif
|
||||
|
||||
#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__
|
||||
|
@ -89,5 +89,8 @@ extern const mp_obj_type_t mcu_pin_type;
|
||||
#ifdef STM32F405xx
|
||||
#include "stm32f405xx/pins.h"
|
||||
#endif
|
||||
#ifdef STM32F407xx
|
||||
#include "stm32f407xx/pins.h"
|
||||
#endif
|
||||
|
||||
#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__
|
||||
|
64
ports/stm32f4/peripherals/stm32f4/stm32f407xx/clocks.c
Normal file
64
ports/stm32f4/peripherals/stm32f4/stm32f407xx/clocks.c
Normal file
@ -0,0 +1,64 @@
|
||||
|
||||
/*
|
||||
* This file is part of the Micro Python project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
#include "py/mpconfig.h"
|
||||
|
||||
void stm32f4_peripherals_clocks_init(void) {
|
||||
//TODO: All parameters must be moved to board level, due to relationship with HSE Osc.
|
||||
|
||||
//System clock init
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Enable Power Control clock */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||
clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
|
||||
}
|
56
ports/stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c
Normal file
56
ports/stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c
Normal file
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* This file is part of the Micro Python project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "stm32f4xx_hal.h"
|
||||
#include "stm32f4/gpio.h"
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
|
||||
void stm32f4_peripherals_gpio_init(void) {
|
||||
//Enable all GPIO for now
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
|
||||
//Never reset pins
|
||||
never_reset_pin_number(2,13); //PC13 anti tamp
|
||||
never_reset_pin_number(2,14); //PC14 OSC32_IN
|
||||
never_reset_pin_number(2,15); //PC15 OSC32_OUT
|
||||
never_reset_pin_number(0,13); //PA13 SWDIO
|
||||
never_reset_pin_number(0,14); //PA14 SWCLK
|
||||
// never_reset_pin_number(0,15); //PA15 JTDI
|
||||
// never_reset_pin_number(1,3); //PB3 JTDO
|
||||
// never_reset_pin_number(1,4); //PB4 JTRST
|
||||
|
||||
// Port H is not included in GPIO port array
|
||||
// never_reset_pin_number(5,0); //PH0 JTDO
|
||||
// never_reset_pin_number(5,1); //PH1 JTRST
|
||||
}
|
||||
|
||||
void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) {
|
||||
|
||||
}
|
||||
|
||||
|
194
ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.c
Normal file
194
ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.c
Normal file
@ -0,0 +1,194 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "py/obj.h"
|
||||
#include "py/mphal.h"
|
||||
#include "stm32f4/pins.h"
|
||||
#include "stm32f4/periph.h"
|
||||
|
||||
// I2C
|
||||
|
||||
I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3};
|
||||
|
||||
const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = {
|
||||
I2C_SDA(1, 4, &pin_PB07),
|
||||
I2C_SDA(1, 4, &pin_PB09),
|
||||
I2C_SDA(2, 4, &pin_PB11),
|
||||
I2C_SDA(3, 4, &pin_PC09),
|
||||
};
|
||||
|
||||
const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = {
|
||||
I2C_SCL(1, 4, &pin_PB06),
|
||||
I2C_SCL(1, 4, &pin_PB08),
|
||||
I2C_SCL(2, 4, &pin_PB10),
|
||||
I2C_SCL(3, 4, &pin_PA08)
|
||||
};
|
||||
|
||||
SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3};
|
||||
|
||||
const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = {
|
||||
SPI(1, 5, &pin_PA05),
|
||||
SPI(1, 5, &pin_PB03),
|
||||
SPI(2, 5, &pin_PB10),
|
||||
SPI(2, 5, &pin_PB13),
|
||||
SPI(2, 5, &pin_PC07),
|
||||
SPI(3, 6, &pin_PB03),
|
||||
SPI(3, 6, &pin_PC10),
|
||||
};
|
||||
|
||||
const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = {
|
||||
SPI(1, 5, &pin_PA07),
|
||||
SPI(1, 5, &pin_PB05),
|
||||
SPI(2, 5, &pin_PB15),
|
||||
SPI(2, 5, &pin_PC03),
|
||||
SPI(3, 6, &pin_PB05),
|
||||
SPI(3, 6, &pin_PC12),
|
||||
};
|
||||
|
||||
const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = {
|
||||
SPI(1, 5, &pin_PA06),
|
||||
SPI(1, 5, &pin_PB04),
|
||||
SPI(2, 5, &pin_PB14),
|
||||
SPI(2, 5, &pin_PC02),
|
||||
SPI(3, 6, &pin_PB04),
|
||||
SPI(3, 6, &pin_PC11),
|
||||
};
|
||||
|
||||
const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = {
|
||||
SPI(1, 5, &pin_PA04),
|
||||
SPI(1, 5, &pin_PA15),
|
||||
SPI(2, 5, &pin_PB09),
|
||||
SPI(2, 5, &pin_PB12),
|
||||
SPI(3, 6, &pin_PA04),
|
||||
SPI(3, 6, &pin_PA15),
|
||||
};
|
||||
|
||||
USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6};
|
||||
bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true};
|
||||
|
||||
const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = {
|
||||
UART(4, 8, &pin_PA00),
|
||||
UART(2, 7, &pin_PA02),
|
||||
UART(1, 7, &pin_PA09),
|
||||
UART(1, 7, &pin_PB06),
|
||||
UART(3, 7, &pin_PB10),
|
||||
UART(6, 8, &pin_PC06),
|
||||
UART(3, 7, &pin_PC10),
|
||||
UART(4, 8, &pin_PC10),
|
||||
UART(5, 8, &pin_PC12),
|
||||
UART(2, 7, &pin_PD05),
|
||||
UART(3, 7, &pin_PD08),
|
||||
UART(6, 8, &pin_PG14),
|
||||
};
|
||||
|
||||
const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = {
|
||||
UART(4, 8, &pin_PA01),
|
||||
UART(2, 7, &pin_PA03),
|
||||
UART(1, 7, &pin_PA10),
|
||||
UART(1, 7, &pin_PB07),
|
||||
UART(3, 7, &pin_PB11),
|
||||
UART(6, 8, &pin_PC07),
|
||||
UART(3, 7, &pin_PC11),
|
||||
UART(4, 8, &pin_PC11),
|
||||
UART(5, 8, &pin_PD02),
|
||||
UART(2, 7, &pin_PD06),
|
||||
UART(3, 7, &pin_PD09),
|
||||
UART(6, 8, &pin_PG09),
|
||||
};
|
||||
|
||||
//Timers
|
||||
//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins
|
||||
TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10,
|
||||
TIM11, TIM12, TIM13, TIM14};
|
||||
|
||||
const mcu_tim_pin_obj_t mcu_tim_pin_list[56] = {
|
||||
TIM(2,1,1,&pin_PA00),
|
||||
TIM(5,2,1,&pin_PA00),
|
||||
TIM(2,1,2,&pin_PA01),
|
||||
TIM(5,2,2,&pin_PA01),
|
||||
TIM(2,1,3,&pin_PA02),
|
||||
TIM(5,2,3,&pin_PA02),
|
||||
TIM(2,1,4,&pin_PA03),
|
||||
TIM(5,2,4,&pin_PA03),
|
||||
TIM(9,3,1,&pin_PA02),
|
||||
TIM(9,3,2,&pin_PA03),
|
||||
TIM(3,2,1,&pin_PA06),
|
||||
TIM(13,9,1,&pin_PA06),
|
||||
TIM(3,2,2,&pin_PA07),
|
||||
TIM(14,9,1,&pin_PA07),
|
||||
TIM(1,1,1,&pin_PA08),
|
||||
TIM(1,1,2,&pin_PA09),
|
||||
TIM(1,1,3,&pin_PA10),
|
||||
TIM(1,1,4,&pin_PA11),
|
||||
TIM(2,1,1,&pin_PA15),
|
||||
TIM(3,2,3,&pin_PB00),
|
||||
TIM(3,2,4,&pin_PB01),
|
||||
TIM(2,1,2,&pin_PB03),
|
||||
TIM(3,2,1,&pin_PB04),
|
||||
TIM(3,2,2,&pin_PB05),
|
||||
TIM(4,2,1,&pin_PB06),
|
||||
TIM(4,2,2,&pin_PB07),
|
||||
TIM(4,2,3,&pin_PB08),
|
||||
TIM(10,2,1,&pin_PB08),
|
||||
TIM(4,2,4,&pin_PB09),
|
||||
TIM(11,2,1,&pin_PB09),
|
||||
TIM(2,1,3,&pin_PB10),
|
||||
TIM(2,1,4,&pin_PB11),
|
||||
TIM(12,9,1,&pin_PB14),
|
||||
TIM(12,9,2,&pin_PB15),
|
||||
TIM(3,2,1,&pin_PC06),
|
||||
TIM(3,2,2,&pin_PC07),
|
||||
TIM(3,2,3,&pin_PC08),
|
||||
TIM(3,2,4,&pin_PC09),
|
||||
TIM(8,3,1,&pin_PC06),
|
||||
TIM(8,3,2,&pin_PC07),
|
||||
TIM(8,3,3,&pin_PC08),
|
||||
TIM(8,3,4,&pin_PC09),
|
||||
TIM(4,2,1,&pin_PD12),
|
||||
TIM(4,2,2,&pin_PD13),
|
||||
TIM(4,2,3,&pin_PD14),
|
||||
TIM(4,2,4,&pin_PD15),
|
||||
TIM(9,3,1,&pin_PE05),
|
||||
TIM(9,3,2,&pin_PE06),
|
||||
TIM(1,1,1,&pin_PE09),
|
||||
TIM(1,1,2,&pin_PE11),
|
||||
TIM(1,1,3,&pin_PE13),
|
||||
TIM(1,1,4,&pin_PE14),
|
||||
TIM(10,3,1,&pin_PF06),
|
||||
TIM(11,3,1,&pin_PF07),
|
||||
TIM(13,9,1,&pin_PF08),
|
||||
TIM(14,9,1,&pin_PF09),
|
||||
// TIM(12,9,1,&pin_PH06), //TODO: include these when pin map is expanded
|
||||
// TIM(12,9,2,&pin_PH09),
|
||||
// TIM(5,2,1,&pin_PH10),
|
||||
// TIM(5,2,2,&pin_PH11),
|
||||
// TIM(5,2,3,&pin_PH12),
|
||||
// TIM(5,2,4,&pin_PI00),
|
||||
// TIM(8,3,4,&pin_PI02),
|
||||
// TIM(8,3,1,&pin_PI05),
|
||||
// TIM(8,3,2,&pin_PI06),
|
||||
// TIM(8,3,3,&pin_PI07),
|
||||
};
|
57
ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.h
Normal file
57
ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.h
Normal file
@ -0,0 +1,57 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H
|
||||
#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H
|
||||
|
||||
//I2C
|
||||
extern I2C_TypeDef * mcu_i2c_banks[3];
|
||||
|
||||
extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4];
|
||||
extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4];
|
||||
|
||||
//SPI
|
||||
extern SPI_TypeDef * mcu_spi_banks[3];
|
||||
|
||||
extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7];
|
||||
extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6];
|
||||
extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6];
|
||||
extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6];
|
||||
|
||||
//UART
|
||||
extern USART_TypeDef * mcu_uart_banks[MAX_UART];
|
||||
extern bool mcu_uart_has_usart[MAX_UART];
|
||||
|
||||
extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12];
|
||||
extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12];
|
||||
|
||||
//Timers
|
||||
#define TIM_BANK_ARRAY_LEN 14
|
||||
#define TIM_PIN_ARRAY_LEN 56
|
||||
TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN];
|
||||
const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN];
|
||||
|
||||
#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H
|
161
ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.c
Normal file
161
ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.c
Normal file
@ -0,0 +1,161 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "py/obj.h"
|
||||
#include "py/mphal.h"
|
||||
#include "stm32f4/pins.h"
|
||||
|
||||
const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp
|
||||
const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN
|
||||
const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT
|
||||
|
||||
const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only
|
||||
|
||||
const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10));
|
||||
const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11));
|
||||
const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12));
|
||||
const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13));
|
||||
|
||||
const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_123,0));
|
||||
const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_123,1));
|
||||
const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_123,2));
|
||||
const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_123,3));
|
||||
const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_12,4));
|
||||
const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_12,5));
|
||||
const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_12,6));
|
||||
const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_12,7));
|
||||
|
||||
const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14));
|
||||
const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15));
|
||||
|
||||
const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8));
|
||||
const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9));
|
||||
const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1
|
||||
|
||||
const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only
|
||||
|
||||
const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only
|
||||
|
||||
const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); // 144 only
|
||||
|
||||
const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); // 144 only
|
||||
|
||||
const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC);
|
158
ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.h
Normal file
158
ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.h
Normal file
@ -0,0 +1,158 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H
|
||||
#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H
|
||||
|
||||
//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only
|
||||
//pg 50
|
||||
extern const mcu_pin_obj_t pin_PE02;
|
||||
extern const mcu_pin_obj_t pin_PE03;
|
||||
extern const mcu_pin_obj_t pin_PE04;
|
||||
extern const mcu_pin_obj_t pin_PE05;
|
||||
extern const mcu_pin_obj_t pin_PE06;
|
||||
extern const mcu_pin_obj_t pin_PC13;
|
||||
extern const mcu_pin_obj_t pin_PC14;
|
||||
//pg 51
|
||||
extern const mcu_pin_obj_t pin_PC15;
|
||||
extern const mcu_pin_obj_t pin_PF00; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF01; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF02; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF03; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF04; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF05; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF06; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF07; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF08; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF09; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF10; // 144 only
|
||||
//pg 52
|
||||
extern const mcu_pin_obj_t pin_PC00;
|
||||
extern const mcu_pin_obj_t pin_PC01;
|
||||
extern const mcu_pin_obj_t pin_PC02;
|
||||
extern const mcu_pin_obj_t pin_PC03;
|
||||
extern const mcu_pin_obj_t pin_PA00;
|
||||
extern const mcu_pin_obj_t pin_PA01;
|
||||
extern const mcu_pin_obj_t pin_PA02;
|
||||
//pg 53
|
||||
extern const mcu_pin_obj_t pin_PA03;
|
||||
extern const mcu_pin_obj_t pin_PA04;
|
||||
extern const mcu_pin_obj_t pin_PA05;
|
||||
extern const mcu_pin_obj_t pin_PA06;
|
||||
extern const mcu_pin_obj_t pin_PA07;
|
||||
extern const mcu_pin_obj_t pin_PC04;
|
||||
//pg 54
|
||||
extern const mcu_pin_obj_t pin_PC05;
|
||||
extern const mcu_pin_obj_t pin_PB00;
|
||||
extern const mcu_pin_obj_t pin_PB01;
|
||||
extern const mcu_pin_obj_t pin_PB02;
|
||||
extern const mcu_pin_obj_t pin_PF11; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF12; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF13; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF14; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PF15; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG00; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG01; // 144 only
|
||||
//pg 55
|
||||
extern const mcu_pin_obj_t pin_PE07;
|
||||
extern const mcu_pin_obj_t pin_PE08;
|
||||
extern const mcu_pin_obj_t pin_PE09;
|
||||
extern const mcu_pin_obj_t pin_PE10;
|
||||
extern const mcu_pin_obj_t pin_PE11;
|
||||
extern const mcu_pin_obj_t pin_PE12;
|
||||
extern const mcu_pin_obj_t pin_PE13;
|
||||
extern const mcu_pin_obj_t pin_PE14;
|
||||
//pg 56
|
||||
extern const mcu_pin_obj_t pin_PE15;
|
||||
extern const mcu_pin_obj_t pin_PB10;
|
||||
extern const mcu_pin_obj_t pin_PB11; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PB12;
|
||||
extern const mcu_pin_obj_t pin_PB13;
|
||||
//pg 57
|
||||
extern const mcu_pin_obj_t pin_PB14;
|
||||
extern const mcu_pin_obj_t pin_PB15;
|
||||
extern const mcu_pin_obj_t pin_PD08;
|
||||
extern const mcu_pin_obj_t pin_PD09;
|
||||
extern const mcu_pin_obj_t pin_PD10;
|
||||
extern const mcu_pin_obj_t pin_PD11;
|
||||
extern const mcu_pin_obj_t pin_PD12;
|
||||
//pg 58
|
||||
extern const mcu_pin_obj_t pin_PD13;
|
||||
extern const mcu_pin_obj_t pin_PD14;
|
||||
extern const mcu_pin_obj_t pin_PD15;
|
||||
extern const mcu_pin_obj_t pin_PG02; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG03; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG04; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG05; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG06; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG07; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG08; // 144 only
|
||||
//pg 59
|
||||
extern const mcu_pin_obj_t pin_PC06;
|
||||
extern const mcu_pin_obj_t pin_PC07;
|
||||
extern const mcu_pin_obj_t pin_PC08;
|
||||
extern const mcu_pin_obj_t pin_PC09;
|
||||
extern const mcu_pin_obj_t pin_PA08;
|
||||
extern const mcu_pin_obj_t pin_PA09;
|
||||
extern const mcu_pin_obj_t pin_PA10;
|
||||
//pg 60
|
||||
extern const mcu_pin_obj_t pin_PA11;
|
||||
extern const mcu_pin_obj_t pin_PA12;
|
||||
extern const mcu_pin_obj_t pin_PA13;
|
||||
extern const mcu_pin_obj_t pin_PA14;
|
||||
extern const mcu_pin_obj_t pin_PA15;
|
||||
extern const mcu_pin_obj_t pin_PC10;
|
||||
extern const mcu_pin_obj_t pin_PC11;
|
||||
//pg 61
|
||||
extern const mcu_pin_obj_t pin_PC12;
|
||||
extern const mcu_pin_obj_t pin_PD00;
|
||||
extern const mcu_pin_obj_t pin_PD01;
|
||||
extern const mcu_pin_obj_t pin_PD02;
|
||||
extern const mcu_pin_obj_t pin_PD03;
|
||||
extern const mcu_pin_obj_t pin_PD04;
|
||||
extern const mcu_pin_obj_t pin_PD05;
|
||||
extern const mcu_pin_obj_t pin_PD06;
|
||||
extern const mcu_pin_obj_t pin_PD07;
|
||||
//pg 62
|
||||
extern const mcu_pin_obj_t pin_PG09; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG10; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG11; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG12; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG13; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG14; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PG15; // 144 only
|
||||
extern const mcu_pin_obj_t pin_PB03;
|
||||
extern const mcu_pin_obj_t pin_PB04;
|
||||
//pg 63
|
||||
extern const mcu_pin_obj_t pin_PB05;
|
||||
extern const mcu_pin_obj_t pin_PB06;
|
||||
extern const mcu_pin_obj_t pin_PB07;
|
||||
extern const mcu_pin_obj_t pin_PB08;
|
||||
extern const mcu_pin_obj_t pin_PB09;
|
||||
extern const mcu_pin_obj_t pin_PE00;
|
||||
extern const mcu_pin_obj_t pin_PE01;
|
||||
|
||||
#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H
|
@ -52,6 +52,11 @@
|
||||
#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
|
||||
#endif
|
||||
|
||||
#ifdef STM32F407xx
|
||||
#define STM32_FLASH_SIZE 0x100000 //1MB
|
||||
#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
|
||||
#endif
|
||||
|
||||
#define STM32_FLASH_OFFSET 0x8000000 //All STM32 chips map to this flash location
|
||||
|
||||
#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000
|
||||
|
Loading…
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Reference in New Issue
Block a user