From 555bf7cc12dd4f6b3d990b6a918aa3461e1f3123 Mon Sep 17 00:00:00 2001 From: Michael Himing Date: Tue, 26 Jul 2022 21:07:55 +1000 Subject: [PATCH] Add board: seeed_xiao_esp32c3 --- .../boards/seeed_xiao_esp32c3/board.c | 26 +++++++++++ .../boards/seeed_xiao_esp32c3/mpconfigboard.h | 14 ++++++ .../seeed_xiao_esp32c3/mpconfigboard.mk | 10 +++++ .../boards/seeed_xiao_esp32c3/pins.c | 43 +++++++++++++++++++ .../boards/seeed_xiao_esp32c3/sdkconfig | 5 +++ 5 files changed, 98 insertions(+) create mode 100644 ports/espressif/boards/seeed_xiao_esp32c3/board.c create mode 100644 ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.h create mode 100644 ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.mk create mode 100644 ports/espressif/boards/seeed_xiao_esp32c3/pins.c create mode 100644 ports/espressif/boards/seeed_xiao_esp32c3/sdkconfig diff --git a/ports/espressif/boards/seeed_xiao_esp32c3/board.c b/ports/espressif/boards/seeed_xiao_esp32c3/board.c new file mode 100644 index 0000000000..f5fd5702c3 --- /dev/null +++ b/ports/espressif/boards/seeed_xiao_esp32c3/board.c @@ -0,0 +1,26 @@ +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/board.h" + +#include "components/driver/include/driver/gpio.h" + +void board_init(void) { + // Debug UART + #ifdef DEBUG + common_hal_never_reset_pin(&pin_GPIO20); + common_hal_never_reset_pin(&pin_GPIO21); + #endif +} + +bool board_requests_safe_mode(void) { + return false; +} + +bool espressif_board_reset_pin_number(gpio_num_t pin_number) { + return false; +} + +void reset_board(void) { +} + +void board_deinit(void) { +} diff --git a/ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.h b/ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.h new file mode 100644 index 0000000000..638be9d197 --- /dev/null +++ b/ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.h @@ -0,0 +1,14 @@ +#define MICROPY_HW_BOARD_NAME "Seeed Studio XIAO ESP32C3" +#define MICROPY_HW_MCU_NAME "ESP32-C3FN4" + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO7) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO6) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO8) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO10) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO9) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO20) +#define DEFAULT_UART_BUS_TX (&pin_GPIO21) + +#define CIRCUITPY_ESP_USB_SERIAL_JTAG (1) diff --git a/ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.mk b/ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.mk new file mode 100644 index 0000000000..9e14c9ac7f --- /dev/null +++ b/ports/espressif/boards/seeed_xiao_esp32c3/mpconfigboard.mk @@ -0,0 +1,10 @@ +CIRCUITPY_CREATOR_ID = 0x000C2886 +CIRCUITPY_CREATION_ID = 0x00C30001 + +IDF_TARGET = esp32c3 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_ESP_FLASH_MODE = qio +CIRCUITPY_ESP_FLASH_FREQ = 80m +CIRCUITPY_ESP_FLASH_SIZE = 4MB diff --git a/ports/espressif/boards/seeed_xiao_esp32c3/pins.c b/ports/espressif/boards/seeed_xiao_esp32c3/pins.c new file mode 100644 index 0000000000..5fc475d564 --- /dev/null +++ b/ports/espressif/boards/seeed_xiao_esp32c3/pins.c @@ -0,0 +1,43 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO2) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO3) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO4) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO5) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO6) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO7) }, + + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO20) }, + + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO8) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO9) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO10) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/espressif/boards/seeed_xiao_esp32c3/sdkconfig b/ports/espressif/boards/seeed_xiao_esp32c3/sdkconfig new file mode 100644 index 0000000000..b2c9bc0fe6 --- /dev/null +++ b/ports/espressif/boards/seeed_xiao_esp32c3/sdkconfig @@ -0,0 +1,5 @@ +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="seeed-xiao-esp32c3" +# end of LWIP