stm32/rtc: Check RTCEN=1 when testing if RTC is already running on boot.
It can be that LSEON and LSERDY are set yet the RTC is not enabled (this can happen for example when coming out of the ST DFU mode on an F405 with the RTC not previously initialised). In such a case the RTC is never started because the code thinks it's already running. This patch fixes this case by always checking if RTCEN is set when booting up (and also testing for a valid RTCSEL value in the case of using an LSE).
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@ -124,7 +124,9 @@ void rtc_init_start(bool force_init) {
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rtc_need_init_finalise = false;
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rtc_need_init_finalise = false;
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if (!force_init) {
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if (!force_init) {
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if ((RCC->BDCR & (RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) == (RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) {
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uint32_t bdcr = RCC->BDCR;
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if ((bdcr & (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL | RCC_BDCR_LSEON | RCC_BDCR_LSERDY))
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== (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL_0 | RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) {
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// LSE is enabled & ready --> no need to (re-)init RTC
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// LSE is enabled & ready --> no need to (re-)init RTC
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// remove Backup Domain write protection
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// remove Backup Domain write protection
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HAL_PWR_EnableBkUpAccess();
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HAL_PWR_EnableBkUpAccess();
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@ -133,7 +135,8 @@ void rtc_init_start(bool force_init) {
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// provide some status information
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// provide some status information
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rtc_info |= 0x40000 | (RCC->BDCR & 7) | (RCC->CSR & 3) << 8;
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rtc_info |= 0x40000 | (RCC->BDCR & 7) | (RCC->CSR & 3) << 8;
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return;
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return;
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} else if ((RCC->BDCR & RCC_BDCR_RTCSEL) == RCC_BDCR_RTCSEL_1) {
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} else if ((bdcr & (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL))
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== (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL_1)) {
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// LSI configured as the RTC clock source --> no need to (re-)init RTC
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// LSI configured as the RTC clock source --> no need to (re-)init RTC
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// remove Backup Domain write protection
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// remove Backup Domain write protection
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HAL_PWR_EnableBkUpAccess();
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HAL_PWR_EnableBkUpAccess();
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