Merge branch 'stm32-loader-linkers' into stm32-f407-disco
This commit is contained in:
commit
c1cf80180d
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@ -90,9 +90,6 @@ else
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### CFLAGS += -flto
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### CFLAGS += -flto
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endif
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endif
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ifndef BOOTLOADER_OFFSET
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BOOTLOADER_OFFSET := 0x8000000
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endif
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C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
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C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
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@ -115,6 +112,22 @@ CFLAGS += \
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# TODO: check this
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# TODO: check this
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CFLAGS += -D__START=main
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CFLAGS += -D__START=main
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#need both command and valid file to use uf2 bootloader
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ifndef LD_FILE
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ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),)
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LD_FILE = $(LD_BOOT)
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BOOTLOADER_OFFSET = $(UF2_OFFSET)
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CFLAGS += -DUF2_BOOTLOADER_ENABLED
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else
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LD_FILE = $(LD_FS)
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endif
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endif
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# Add bootloader specific items
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ifndef BOOTLOADER_OFFSET
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BOOTLOADER_OFFSET := 0x8000000
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endif
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LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
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LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
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LIBS := -lgcc -lc
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LIBS := -lgcc -lc
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@ -5,9 +5,9 @@
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/* Specify the memory areas */
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/* Specify the memory areas */
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MEMORY
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MEMORY
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{
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{
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */
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FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */
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FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */
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RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
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RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
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}
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}
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@ -1,39 +1,30 @@
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/*
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/*
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GNU linker script for STM32F401 with bootloader (from Meowbit Micropython)
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GNU linker script for STM32F405 with bootloader
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Doesn't work:
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Based on Micropython
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Traceback (most recent call last):
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File "../../tools/build_memory_info.py", line 64, in <module>
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regions[region] = int(eval(space))
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File "<string>", line 1, in <module>
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NameError: name 'FLASH_ISR' is not defined
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*/
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*/
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/* Specify the memory areas */
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/* Specify the memory areas */
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/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */
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/* sectors 5 128K */
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MEMORY
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MEMORY
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{
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{
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 1024K - 64K /* entire flash, sans bootloader region */
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 0 */
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FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */
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FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K /* sectors 5+ */
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RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
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CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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}
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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_minimum_heap_size = 16K;
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/* Define the stack. The stack is full descending so begins just above last byte
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/* Define tho top end of the stack. The stack is full descending so begins just
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of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
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above last byte of RAM. Note that EABI requires the stack to be 8-byte
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_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
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aligned for a call. */
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_sstack = _estack - 16K; /* tunable */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* RAM extents for the garbage collector */
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = _sstack;
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ENTRY(Reset_Handler)
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ENTRY(Reset_Handler)
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@ -47,25 +38,8 @@ SECTIONS
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KEEP(*(.isr_vector)) /* Startup code */
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KEEP(*(.isr_vector)) /* Startup code */
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/* This first flash block is 16K annd the isr vectors only take up
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/* This first flash block is 16K annd the isr vectors only take up
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about 400 bytes. So we pull in a couple of object files to pad it
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about 400 bytes. Micropython pads this with files, but this didn't
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out. */
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work with the size of Circuitpython's ff object. */
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. = ALIGN(4);
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/* NOTE: If you update the list of files contained in .isr_vector,
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then be sure to also update smhal/Makefile where it forcibly
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builds each of these files with -Os */
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*/ff.o(.text*)
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*/vfs_fat_*.o(.text*)
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*/py/formatfloat.o(.text*)
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*/py/parsenum.o(.text*)
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*/py/mpprint.o(.text*)
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*/py/compile.o(.text*)
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*/py/objset.o(.text*)
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*/py/mpz.o(.text*)
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*/py/vm.o(.text*)
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. = ALIGN(4);
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. = ALIGN(4);
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} >FLASH_ISR
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} >FLASH_ISR
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@ -130,3 +104,5 @@ SECTIONS
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.ARM.attributes 0 : { *(.ARM.attributes) }
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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}
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@ -40,6 +40,11 @@
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#define SPI_FLASH_SCK_PIN (&pin_PB03)
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#define SPI_FLASH_SCK_PIN (&pin_PB03)
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#define SPI_FLASH_CS_PIN (&pin_PA15)
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#define SPI_FLASH_CS_PIN (&pin_PA15)
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// Bootloader only
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#ifdef UF2_BOOTLOADER_ENABLED
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#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader
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#endif
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#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
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#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
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#define DEFAULT_I2C_BUS_SDA (&pin_PB07)
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#define DEFAULT_I2C_BUS_SDA (&pin_PB07)
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@ -14,6 +14,8 @@ MCU_VARIANT = stm32f4
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MCU_SUB_VARIANT = stm32f405xx
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MCU_SUB_VARIANT = stm32f405xx
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MCU_PACKAGE = 64
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MCU_PACKAGE = 64
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CMSIS_MCU = STM32F405xx
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CMSIS_MCU = STM32F405xx
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LD_FILE = boards/STM32F405.ld
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TEXT0_ADDR = 0x08000000
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LD_FS = boards/STM32F405_fs.ld # Default to internal FS
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TEXT1_ADDR = 0x08010000
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LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
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UF2_OFFSET = 0x8010000
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@ -20,4 +20,5 @@ MCU_SUB_VARIANT = stm32f401xe
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MCU_PACKAGE = 64
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MCU_PACKAGE = 64
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CMSIS_MCU = STM32F401xE
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CMSIS_MCU = STM32F401xE
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LD_FILE = boards/STM32F401_boot.ld
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LD_FILE = boards/STM32F401_boot.ld
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# LD_FILE = boards/STM32F401_fs.ld #use for internal flash
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# LD_FILE = boards/STM32F401_fs.ld # use for internal flash
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@ -15,5 +15,4 @@ MCU_SUB_VARIANT = stm32f411xe
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MCU_PACKAGE = 48
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MCU_PACKAGE = 48
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CMSIS_MCU = STM32F411xE
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CMSIS_MCU = STM32F411xE
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LD_FILE = boards/STM32F411VETx_FLASH.ld
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LD_FILE = boards/STM32F411VETx_FLASH.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08020000
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MCU_PACKAGE = 64
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MCU_PACKAGE = 64
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CMSIS_MCU = STM32F405xx
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CMSIS_MCU = STM32F405xx
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LD_FILE = boards/STM32F405.ld
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LD_FILE = boards/STM32F405.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08010000
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@ -18,5 +18,4 @@ MCU_SUB_VARIANT = stm32f411xe
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MCU_PACKAGE = 48
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MCU_PACKAGE = 48
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CMSIS_MCU = STM32F411xE
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CMSIS_MCU = STM32F411xE
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LD_FILE = boards/STM32F411VETx_FLASH.ld
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LD_FILE = boards/STM32F411VETx_FLASH.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08020000
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MCU_PACKAGE = 100
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MCU_PACKAGE = 100
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CMSIS_MCU = STM32F411xE
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CMSIS_MCU = STM32F411xE
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LD_FILE = boards/STM32F411VETx_FLASH.ld
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LD_FILE = boards/STM32F411VETx_FLASH.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08020000
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@ -18,6 +18,5 @@ MCU_SUB_VARIANT = stm32f412zx
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MCU_PACKAGE = 144
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MCU_PACKAGE = 144
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CMSIS_MCU = STM32F412Zx
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CMSIS_MCU = STM32F412Zx
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LD_FILE = boards/STM32F412ZGTx_FLASH.ld
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LD_FILE = boards/STM32F412ZGTx_FLASH.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08020000
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