Merge branch 'stm32-loader-linkers' into stm32-f407-disco

This commit is contained in:
Lucian Copeland 2020-01-31 14:10:21 -05:00
commit c1cf80180d
12 changed files with 66 additions and 74 deletions

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@ -90,9 +90,6 @@ else
### CFLAGS += -flto ### CFLAGS += -flto
endif endif
ifndef BOOTLOADER_OFFSET
BOOTLOADER_OFFSET := 0x8000000
endif
C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU) C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
@ -115,6 +112,22 @@ CFLAGS += \
# TODO: check this # TODO: check this
CFLAGS += -D__START=main CFLAGS += -D__START=main
#need both command and valid file to use uf2 bootloader
ifndef LD_FILE
ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),)
LD_FILE = $(LD_BOOT)
BOOTLOADER_OFFSET = $(UF2_OFFSET)
CFLAGS += -DUF2_BOOTLOADER_ENABLED
else
LD_FILE = $(LD_FS)
endif
endif
# Add bootloader specific items
ifndef BOOTLOADER_OFFSET
BOOTLOADER_OFFSET := 0x8000000
endif
LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
LIBS := -lgcc -lc LIBS := -lgcc -lc

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@ -5,9 +5,9 @@
/* Specify the memory areas */ /* Specify the memory areas */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */
FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
} }

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@ -1,39 +1,30 @@
/* /*
GNU linker script for STM32F401 with bootloader (from Meowbit Micropython) GNU linker script for STM32F405 with bootloader
Doesn't work: Based on Micropython
Traceback (most recent call last):
File "../../tools/build_memory_info.py", line 64, in <module>
regions[region] = int(eval(space))
File "<string>", line 1, in <module>
NameError: name 'FLASH_ISR' is not defined
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */
/* sectors 5 128K */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 1024K - 64K /* entire flash, sans bootloader region */
FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */ FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 0 */
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */ FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K /* sectors 5+ */
RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
} }
/* produce a link error if there is not this amount of RAM for these sections */ /* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K; _minimum_stack_size = 2K;
_minimum_heap_size = 16K; _minimum_heap_size = 16K;
/* Define the stack. The stack is full descending so begins just above last byte /* Define tho top end of the stack. The stack is full descending so begins just
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ above last byte of RAM. Note that EABI requires the stack to be 8-byte
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve; aligned for a call. */
_sstack = _estack - 16K; /* tunable */ _estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */ /* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
@ -47,25 +38,8 @@ SECTIONS
KEEP(*(.isr_vector)) /* Startup code */ KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up /* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. So we pull in a couple of object files to pad it about 400 bytes. Micropython pads this with files, but this didn't
out. */ work with the size of Circuitpython's ff object. */
. = ALIGN(4);
/* NOTE: If you update the list of files contained in .isr_vector,
then be sure to also update smhal/Makefile where it forcibly
builds each of these files with -Os */
*/ff.o(.text*)
*/vfs_fat_*.o(.text*)
*/py/formatfloat.o(.text*)
*/py/parsenum.o(.text*)
*/py/mpprint.o(.text*)
*/py/compile.o(.text*)
*/py/objset.o(.text*)
*/py/mpz.o(.text*)
*/py/vm.o(.text*)
. = ALIGN(4); . = ALIGN(4);
} >FLASH_ISR } >FLASH_ISR
@ -130,3 +104,5 @@ SECTIONS
.ARM.attributes 0 : { *(.ARM.attributes) } .ARM.attributes 0 : { *(.ARM.attributes) }
} }

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@ -40,6 +40,11 @@
#define SPI_FLASH_SCK_PIN (&pin_PB03) #define SPI_FLASH_SCK_PIN (&pin_PB03)
#define SPI_FLASH_CS_PIN (&pin_PA15) #define SPI_FLASH_CS_PIN (&pin_PA15)
// Bootloader only
#ifdef UF2_BOOTLOADER_ENABLED
#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader
#endif
#define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SCL (&pin_PB06)
#define DEFAULT_I2C_BUS_SDA (&pin_PB07) #define DEFAULT_I2C_BUS_SDA (&pin_PB07)

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@ -14,6 +14,8 @@ MCU_VARIANT = stm32f4
MCU_SUB_VARIANT = stm32f405xx MCU_SUB_VARIANT = stm32f405xx
MCU_PACKAGE = 64 MCU_PACKAGE = 64
CMSIS_MCU = STM32F405xx CMSIS_MCU = STM32F405xx
LD_FILE = boards/STM32F405.ld
TEXT0_ADDR = 0x08000000 LD_FS = boards/STM32F405_fs.ld # Default to internal FS
TEXT1_ADDR = 0x08010000 LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
UF2_OFFSET = 0x8010000

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@ -20,4 +20,5 @@ MCU_SUB_VARIANT = stm32f401xe
MCU_PACKAGE = 64 MCU_PACKAGE = 64
CMSIS_MCU = STM32F401xE CMSIS_MCU = STM32F401xE
LD_FILE = boards/STM32F401_boot.ld LD_FILE = boards/STM32F401_boot.ld
# LD_FILE = boards/STM32F401_fs.ld #use for internal flash # LD_FILE = boards/STM32F401_fs.ld # use for internal flash

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@ -15,5 +15,4 @@ MCU_SUB_VARIANT = stm32f411xe
MCU_PACKAGE = 48 MCU_PACKAGE = 48
CMSIS_MCU = STM32F411xE CMSIS_MCU = STM32F411xE
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_FILE = boards/STM32F411VETx_FLASH.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000

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@ -13,5 +13,4 @@ MCU_SUB_VARIANT = stm32f405xx
MCU_PACKAGE = 64 MCU_PACKAGE = 64
CMSIS_MCU = STM32F405xx CMSIS_MCU = STM32F405xx
LD_FILE = boards/STM32F405.ld LD_FILE = boards/STM32F405.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08010000

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@ -18,5 +18,4 @@ MCU_SUB_VARIANT = stm32f411xe
MCU_PACKAGE = 48 MCU_PACKAGE = 48
CMSIS_MCU = STM32F411xE CMSIS_MCU = STM32F411xE
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_FILE = boards/STM32F411VETx_FLASH.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000

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@ -13,5 +13,4 @@ MCU_SUB_VARIANT = stm32f411xe
MCU_PACKAGE = 100 MCU_PACKAGE = 100
CMSIS_MCU = STM32F411xE CMSIS_MCU = STM32F411xE
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_FILE = boards/STM32F411VETx_FLASH.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000

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@ -18,6 +18,5 @@ MCU_SUB_VARIANT = stm32f412zx
MCU_PACKAGE = 144 MCU_PACKAGE = 144
CMSIS_MCU = STM32F412Zx CMSIS_MCU = STM32F412Zx
LD_FILE = boards/STM32F412ZGTx_FLASH.ld LD_FILE = boards/STM32F412ZGTx_FLASH.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000