From c137a1612133e06d2b7bec06b325695c9a60c4b9 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 24 Aug 2020 14:49:06 -0400 Subject: [PATCH] Remove Meowbit LSE flag, harsher failure for LSE issues --- ports/stm/boards/meowbit_v121/mpconfigboard.h | 3 +-- ports/stm/peripherals/stm32f4/clocks.c | 17 +++-------------- ports/stm/peripherals/stm32f7/clocks.c | 17 +++-------------- ports/stm/peripherals/stm32h7/clocks.c | 17 +++-------------- 4 files changed, 10 insertions(+), 44 deletions(-) diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.h b/ports/stm/boards/meowbit_v121/mpconfigboard.h index 106f25b15c..be9f2a75fb 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.h @@ -36,8 +36,7 @@ #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) #define HSE_VALUE ((uint32_t)12000000U) -#define LSE_VALUE ((uint32_t)32000U) -#define BOARD_HAS_LOW_SPEED_CRYSTAL (1) +#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) #define BOARD_NO_VBUS_SENSE (1) #define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader diff --git a/ports/stm/peripherals/stm32f4/clocks.c b/ports/stm/peripherals/stm32f4/clocks.c index 7a16812b36..c2d0a452a0 100644 --- a/ports/stm/peripherals/stm32f4/clocks.c +++ b/ports/stm/peripherals/stm32f4/clocks.c @@ -49,7 +49,6 @@ void stm32_peripherals_clocks_init(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - bool lse_failure = false; // Set voltage scaling in accordance with system clock speed __HAL_RCC_PWR_CLK_ENABLE(); @@ -76,15 +75,9 @@ void stm32_peripherals_clocks_init(void) { #endif if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - // Failure likely means a LSE issue - attempt to swap to LSI, and set to crash - RCC_OscInitStruct.LSEState = RCC_LSE_OFF; - RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - // No HSE means no USB, so just fail forever - while(1); - } - lse_failure = true; + // Clock issues are too problematic to even attempt recovery. + // If you end up here, check whether your LSE settings match your board. + while(1); } // Configure bus clock sources and divisors @@ -113,8 +106,4 @@ void stm32_peripherals_clocks_init(void) { #endif HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - - if (lse_failure) { - reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT? - } } diff --git a/ports/stm/peripherals/stm32f7/clocks.c b/ports/stm/peripherals/stm32f7/clocks.c index 93016f6828..f130887822 100644 --- a/ports/stm/peripherals/stm32f7/clocks.c +++ b/ports/stm/peripherals/stm32f7/clocks.c @@ -40,7 +40,6 @@ void stm32_peripherals_clocks_init(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - bool lse_failure = false; // Configure LSE Drive HAL_PWR_EnableBkUpAccess(); @@ -68,15 +67,9 @@ void stm32_peripherals_clocks_init(void) { RCC_OscInitStruct.PLL.PLLQ = CPY_CLK_PLLQ; if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - // Failure likely means a LSE issue - attempt to swap to LSI, and set to crash - RCC_OscInitStruct.LSEState = RCC_LSE_OFF; - RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - // No HSE means no USB, so just fail forever - while(1); - } - lse_failure = true; + // Clock issues are too problematic to even attempt recovery. + // If you end up here, check whether your LSE settings match your board. + while(1); } /* Activate the OverDrive to reach the 216 MHz Frequency */ @@ -111,8 +104,4 @@ void stm32_peripherals_clocks_init(void) { #endif HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - - if (lse_failure) { - reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT? - } } diff --git a/ports/stm/peripherals/stm32h7/clocks.c b/ports/stm/peripherals/stm32h7/clocks.c index 0e4e79f9f7..a088f78bf2 100644 --- a/ports/stm/peripherals/stm32h7/clocks.c +++ b/ports/stm/peripherals/stm32h7/clocks.c @@ -37,7 +37,6 @@ void stm32_peripherals_clocks_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - bool lse_failure = false; // Set voltage scaling in accordance with system clock speed HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); @@ -73,15 +72,9 @@ void stm32_peripherals_clocks_init(void) { RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - // Failure likely means a LSE issue - attempt to swap to LSI, and set to crash - RCC_OscInitStruct.LSEState = RCC_LSE_OFF; - RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - // No HSE means no USB, so just fail forever - while(1); - } - lse_failure = true; + // Clock issues are too problematic to even attempt recovery. + // If you end up here, check whether your LSE settings match your board. + while(1); } // Configure bus clock sources and divisors @@ -116,8 +109,4 @@ void stm32_peripherals_clocks_init(void) { // Enable USB Voltage detector HAL_PWREx_EnableUSBVoltageDetector(); - - if (lse_failure) { - reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT? - } }