From bc7822d8e95c40a9d5e403fd22c82b1bbad53b8b Mon Sep 17 00:00:00 2001 From: Mike Causer Date: Thu, 17 Jun 2021 12:49:14 +1000 Subject: [PATCH] drivers/display/ssd1306.py: Add support for 72x40 displays. The 72x40 OLED requires selecting the internal IREF, as opposed to the default external IREF. This is an undocumented feature in the SSD1306 datasheet, but is present in the SSD1315 datasheet. It's possible the 72x40 OLED is actually using the newer SSD1315 controller. Sending the IREF select command to SSD1306 displays has no effect on them, so it's added to the init_display() instead of wrapping in an "if width = 72". Also tested on a 128x64 OLED using the SSD1315 controller (smaller ribbon cable) and the proposed change has no effect on the display, as the module comes with the correct current limiting resistor. Internal and external IREF work the same. Fixes issue #7281. --- drivers/display/ssd1306.py | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/display/ssd1306.py b/drivers/display/ssd1306.py index 85e2bf0cb5..a504cdadcc 100644 --- a/drivers/display/ssd1306.py +++ b/drivers/display/ssd1306.py @@ -15,6 +15,7 @@ SET_PAGE_ADDR = const(0x22) SET_DISP_START_LINE = const(0x40) SET_SEG_REMAP = const(0xA0) SET_MUX_RATIO = const(0xA8) +SET_IREF_SELECT = const(0xAD) SET_COM_OUT_DIR = const(0xC0) SET_DISP_OFFSET = const(0xD3) SET_COM_PIN_CFG = const(0xDA) @@ -63,6 +64,8 @@ class SSD1306(framebuf.FrameBuffer): 0xFF, # maximum SET_ENTIRE_ON, # output follows RAM contents SET_NORM_INV, # not inverted + SET_IREF_SELECT, + 0x30, # enable internal IREF during display on # charge pump SET_CHARGE_PUMP, 0x10 if self.external_vcc else 0x14, @@ -92,10 +95,11 @@ class SSD1306(framebuf.FrameBuffer): def show(self): x0 = 0 x1 = self.width - 1 - if self.width == 64: - # displays with width of 64 pixels are shifted by 32 - x0 += 32 - x1 += 32 + if self.width != 128: + # narrow displays use centred columns + col_offset = (128 - self.width) // 2 + x0 += col_offset + x1 += col_offset self.write_cmd(SET_COL_ADDR) self.write_cmd(x0) self.write_cmd(x1)