From b0dd645e27219f8a593f7c5af1339cebffeebfe8 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Tue, 7 Aug 2018 16:58:37 -0700
Subject: [PATCH 01/14] Retune neopixel timings on SAMD51. They were too slow.

Fixes #1083
---
 ports/atmel-samd/common-hal/neopixel_write/__init__.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c
index 5530d04085..31de2c207a 100644
--- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c
+++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c
@@ -111,14 +111,14 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
         #ifdef SAMD51
         delay_cycles(3);
         #endif
-        if(p & bitMask) {
+        if((p & bitMask) != 0) {
             // This is the high delay unique to a one bit.
             // For the SK6812 its 0.3us
             #ifdef SAMD21
             asm("nop; nop; nop; nop; nop; nop; nop;");
             #endif
             #ifdef SAMD51
-            delay_cycles(11);
+            delay_cycles(3);
             #endif
             *clr = pinMask;
         } else {
@@ -140,7 +140,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
             asm("nop; nop; nop; nop; nop;");
             #endif
             #ifdef SAMD51
-            delay_cycles(20);
+            delay_cycles(4);
             #endif
         } else {
             if(ptr >= end) break;
@@ -151,7 +151,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
             // above operations take.
             // For the SK6812 its 0.6us +- 0.15us
             #ifdef SAMD51
-            delay_cycles(15);
+            delay_cycles(3);
             #endif
         }
     }

From e1b4e9b7c7cdd7a022a5ab113b68c8fa6be2c74d Mon Sep 17 00:00:00 2001
From: Jeff Epler <jepler@gmail.com>
Date: Mon, 30 Jul 2018 20:49:20 -0500
Subject: [PATCH 02/14] UART: Always allocate UART objects in the long-lived
 pool

Particularly when they have buffers that are written via IRQ or DMA,
UART objects do not relocate gracefully.  If such an object is
relocated to the long-lived pool after its original creation, the
IRQ or DMA will write to an unexpected location within the Python
heap, leading to a variety of symptoms.  The most frequent symptom
is inability to read from the UART.

Consider the particular case of atmel-samd: usart_uart_obj_t
contains a usart_async_descriptor contains a _usart_async_device.
In _sercom_init_irq_param the address of this contained
_usart_async_device is assigned to a global array
sercom_to_sercom_dev which is later used from the interrupt context
_sercom_usart_interrupt_handler to store the received data in the
right ring buffer.

When the UART object is relocated to the long-lived heap, there's no
mechanism to re-point these internal pointers, so instead take the
cowardly way and allocate the UART object as long-lived.

Happily, almost all UART objects are likely to be long-lived, so
this is unlikely to have a negative effect on memory usage or heap
fragmentation.

Closes: #1056
---
 shared-bindings/busio/UART.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c
index 1b63d8d0e0..9bad2468e5 100644
--- a/shared-bindings/busio/UART.c
+++ b/shared-bindings/busio/UART.c
@@ -66,7 +66,11 @@ extern const busio_uart_parity_obj_t busio_uart_parity_odd_obj;
 
 STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) {
     mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true);
-    busio_uart_obj_t *self = m_new_obj(busio_uart_obj_t);
+    // Always initially allocate the UART object within the long-lived heap.
+    // This is needed to avoid crashes with certain UART implementations which
+    // cannot accomodate being moved after creation. (See
+    // https://github.com/adafruit/circuitpython/issues/1056)
+    busio_uart_obj_t *self = m_new_ll_obj(busio_uart_obj_t);
     self->base.type = &busio_uart_type;
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args);

From b0e33f6a116ac75c6a26216224182529db78e0a3 Mon Sep 17 00:00:00 2001
From: Jeff Epler <jepler@unpythonic.net>
Date: Wed, 1 Aug 2018 20:21:20 -0500
Subject: [PATCH 03/14] atmel-samd: UART: allocate rx buffer in long-lived
 region

This is not strictly needed in order for #1056 to be resolved,
because the "make long-lived" machinery is unaware of this pointer.

However, as UARTs are assumed to be long-lived, this change is
beneficial because it moves the long-lived buffer into the upper
memory area with other long-lived objects, instead of remaining in
the low heap.
---
 ports/atmel-samd/common-hal/busio/UART.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c
index bcdeae7b53..20e662ec62 100644
--- a/ports/atmel-samd/common-hal/busio/UART.c
+++ b/ports/atmel-samd/common-hal/busio/UART.c
@@ -132,7 +132,13 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
 
     if (rx && receiver_buffer_size > 0) {
         self->buffer_length = receiver_buffer_size;
-        self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, false);
+        // Initially allocate the UART's buffer in the long-lived part of the
+        // heap.  UARTs are generally long-lived objects, but the "make long-
+        // lived" machinery is incapable of moving internal pointers like
+        // self->buffer, so do it manually.  (However, as long as internal
+        // pointers like this are NOT moved, allocating the buffer
+        // in the long-lived pool is not strictly necessary)
+        self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, true);
         if (self->buffer == NULL) {
             common_hal_busio_uart_deinit(self);
             mp_raise_msg(&mp_type_MemoryError, "Failed to allocate RX buffer");

From 1768057e874fdcfad7949f53ea5be4837e49a3a6 Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Sat, 28 Jul 2018 20:50:35 -0400
Subject: [PATCH 04/14] add HalloWing

---
 .travis.yml                                   |  1 +
 .../boards/hallowing_m0_express/board.c       | 38 +++++++++++
 .../hallowing_m0_express/mpconfigboard.h      | 63 +++++++++++++++++++
 .../hallowing_m0_express/mpconfigboard.mk     | 17 +++++
 .../boards/hallowing_m0_express/pins.c        | 60 ++++++++++++++++++
 ports/atmel-samd/external_flash/devices.h     | 34 ++++++++++
 tools/build_adafruit_bins.sh                  |  2 +-
 7 files changed, 214 insertions(+), 1 deletion(-)
 create mode 100644 ports/atmel-samd/boards/hallowing_m0_express/board.c
 create mode 100644 ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
 create mode 100644 ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk
 create mode 100644 ports/atmel-samd/boards/hallowing_m0_express/pins.c

diff --git a/.travis.yml b/.travis.yml
index a5829896f5..2968a7d386 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -22,6 +22,7 @@ env:
   - TRAVIS_BOARD=pirkey_m0
   - TRAVIS_BOARD=trinket_m0
   - TRAVIS_BOARD=gemma_m0
+  - TRAVIS_BOARD=hallowing_m0_express
   - TRAVIS_BOARD=feather52832
   - TRAVIS_BOARD=pca10056
   - TRAVIS_TEST=qemu
diff --git a/ports/atmel-samd/boards/hallowing_m0_express/board.c b/ports/atmel-samd/boards/hallowing_m0_express/board.c
new file mode 100644
index 0000000000..c8e20206a1
--- /dev/null
+++ b/ports/atmel-samd/boards/hallowing_m0_express/board.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+
+void board_init(void)
+{
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
new file mode 100644
index 0000000000..618fbfbe97
--- /dev/null
+++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
@@ -0,0 +1,63 @@
+#define MICROPY_HW_BOARD_NAME "HalloWing M0 Express"
+#define MICROPY_HW_MCU_NAME "samd21g18"
+
+#define MICROPY_HW_NEOPIXEL (&pin_PA12)
+
+// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz.
+#define SPI_FLASH_BAUDRATE  (8000000)
+
+#define SPI_FLASH_MOSI_PIN          PIN_PB10
+#define SPI_FLASH_MISO_PIN          PIN_PA13
+#define SPI_FLASH_SCK_PIN           PIN_PB11
+#define SPI_FLASH_CS_PIN            PIN_PA07
+#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PB10D_SERCOM4_PAD2
+#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PA13D_SERCOM4_PAD1
+#define SPI_FLASH_SCK_PIN_FUNCTION  PINMUX_PB11D_SERCOM4_PAD3
+#define SPI_FLASH_SERCOM            SERCOM4
+#define SPI_FLASH_SERCOM_INDEX      4
+#define SPI_FLASH_MOSI_PAD          2
+#define SPI_FLASH_MISO_PAD          1
+#define SPI_FLASH_SCK_PAD           3
+// <o> Transmit Data Pinout
+// <0x0=>PAD[0,1]_DO_SCK
+// <0x1=>PAD[2,3]_DO_SCK
+// <0x2=>PAD[3,1]_DO_SCK
+// <0x3=>PAD[0,3]_DO_SCK
+#define SPI_FLASH_DOPO              0x1
+#define SPI_FLASH_DIPO              1   // same as MISO pad
+
+// These are pins not to reset.
+#define MICROPY_PORT_A        (PORT_PA07 | PORT_PA12 | PORT_PA13 | PORT_PA24 | PORT_PA25)
+#define MICROPY_PORT_B        ( PORT_PB10 | PORT_PB11 )
+#define MICROPY_PORT_C        ( 0 )
+
+#include "external_flash/external_flash.h"
+
+// If you change this, then make sure to update the linker scripts as well to
+// make sure you don't overwrite code.
+#define CIRCUITPY_INTERNAL_NVM_SIZE 256
+
+#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE)
+
+#include "external_flash/devices.h"
+
+#define EXTERNAL_FLASH_DEVICE_COUNT 2
+
+#define EXTERNAL_FLASH_DEVICES W25Q64JV_IM, \
+                               GD25Q64C
+
+#include "external_flash/external_flash.h"
+
+#define DEFAULT_I2C_BUS_SCL (&pin_PA17)
+#define DEFAULT_I2C_BUS_SDA (&pin_PA16)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_PB23)
+#define DEFAULT_SPI_BUS_MOSI (&pin_PB22)
+#define DEFAULT_SPI_BUS_MISO (&pin_PB03)
+
+#define DEFAULT_UART_BUS_RX (&pin_PA09)
+#define DEFAULT_UART_BUS_TX (&pin_PA10)
+
+// USB is always used internally so skip the pin objects for it.
+#define IGNORE_PIN_PA24     1
+#define IGNORE_PIN_PA25     1
diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk
new file mode 100644
index 0000000000..817d93943e
--- /dev/null
+++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk
@@ -0,0 +1,17 @@
+LD_FILE = boards/samd21x18-bootloader-external-flash.ld
+USB_VID = 0x239A
+USB_PID = 0xD1ED
+USB_PRODUCT = "HalloWing M0 Express"
+USB_MANUFACTURER = "Adafruit Industries LLC"
+
+SPI_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+CHIP_VARIANT = SAMD21G18A
+CHIP_FAMILY = samd21
+
+# Include these Python libraries in firmware.
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
diff --git a/ports/atmel-samd/boards/hallowing_m0_express/pins.c b/ports/atmel-samd/boards/hallowing_m0_express/pins.c
new file mode 100644
index 0000000000..8d6f9431e4
--- /dev/null
+++ b/ports/atmel-samd/boards/hallowing_m0_express/pins.c
@@ -0,0 +1,60 @@
+#include "shared-bindings/board/__init__.h"
+
+#include "board_busses.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) },
+
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) },
+    { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB08) },
+
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) },
+    { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_PB09) },
+
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) },
+    { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_PA04) },
+
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_PA05) },
+
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_PA06) },
+
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB23) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB22) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB03) },
+
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) },
+
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) },
+
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) },
+    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) },
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) },
+    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) },
+
+    { MP_ROM_QSTR(MP_QSTR_EXTERNAL_NEOPIXEL), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_SENSE), MP_ROM_PTR(&pin_PA11) },
+
+    { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PA28) },
+    { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_PA27) },
+
+    { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB02) },
+    { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PA14) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/atmel-samd/external_flash/devices.h b/ports/atmel-samd/external_flash/devices.h
index d8baf5aca0..330d3e3b60 100644
--- a/ports/atmel-samd/external_flash/devices.h
+++ b/ports/atmel-samd/external_flash/devices.h
@@ -89,6 +89,22 @@ typedef struct {
     .supports_qspi_writes = true, \
 }
 
+// Settings for the Gigadevice GD25Q64C 8MiB SPI flash.
+// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q64/gd25q64.pdf
+#define GD25Q64C {\
+    .total_size = (1 << 23), /* 8 MiB */ \
+    .start_up_time_us = 5000, \
+    .manufacturer_id = 0xc8, \
+    .memory_type = 0x40, \
+    .capacity = 0x17, \
+    .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
+    .has_sector_protection = false, \
+    .supports_fast_read = true, \
+    .supports_qspi = true, \
+    .has_quad_enable = true, \
+    .supports_qspi_writes = true, \
+}
+
 // Settings for the Cypress (was Spansion) S25FL064L 8MiB SPI flash.
 // Datasheet: http://www.cypress.com/file/316661/download
 #define S25FL064L {\
@@ -185,6 +201,22 @@ typedef struct {
     .supports_qspi_writes = false, \
 }
 
+// Settings for the Winbond W25Q64JV-IM 8MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40)
+// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf
+#define W25Q64JV_IM {\
+    .total_size = (1 << 23), /* 8 MiB */ \
+    .start_up_time_us = 5000, \
+    .manufacturer_id = 0xef, \
+    .memory_type = 0x70, \
+    .capacity = 0x17, \
+    .max_clock_speed_mhz = 133, \
+    .has_sector_protection = false, \
+    .supports_fast_read = true, \
+    .supports_qspi = true, \
+    .has_quad_enable = true, \
+    .supports_qspi_writes = true, \
+}
+
 // Settings for the Winbond W25Q80DL 1MiB SPI flash.
 // Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf
 #define W25Q80DL {\
@@ -201,4 +233,6 @@ typedef struct {
     .supports_qspi_writes = false, \
 }
 
+
+
 #endif  // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H
diff --git a/tools/build_adafruit_bins.sh b/tools/build_adafruit_bins.sh
index 4111a7b1b5..29ee35c6ad 100755
--- a/tools/build_adafruit_bins.sh
+++ b/tools/build_adafruit_bins.sh
@@ -2,7 +2,7 @@ rm -rf ports/atmel-samd/build*
 rm -rf ports/esp8266/build*
 rm -rf ports/nrf/build*
 
-ATMEL_BOARDS="arduino_zero circuitplayground_express circuitplayground_express_crickit feather_m0_basic feather_m0_adalogger itsybitsy_m0_express itsybitsy_m4_express feather_m0_rfm69 feather_m0_rfm9x feather_m0_express feather_m0_express_crickit feather_m4_express metro_m0_express metro_m4_express pirkey_m0 trinket_m0 gemma_m0 feather52832 feather_huzzah pca10056"
+ATMEL_BOARDS="arduino_zero circuitplayground_express circuitplayground_express_crickit feather_m0_basic feather_m0_adalogger itsybitsy_m0_express itsybitsy_m4_express feather_m0_rfm69 feather_m0_rfm9x feather_m0_express feather_m0_express_crickit feather_m4_express metro_m0_express metro_m4_express pirkey_m0 trinket_m0 gemma_m0 feather52832 feather_huzzah pca10056 hallowing_m0_express"
 ROSIE_SETUPS="rosie-ci"
 
 PARALLEL="-j 5"

From aeeb40e02c7f970fdbb7a04c89e02f5aee01b7c7 Mon Sep 17 00:00:00 2001
From: ladyada <limor@ladyada.net>
Date: Tue, 14 Aug 2018 13:04:33 -0400
Subject: [PATCH 05/14] Change hallowing to shipping flash type W25Q64JV-IQ.
 tested!

---
 .../boards/hallowing_m0_express/mpconfigboard.h  |  2 +-
 ports/atmel-samd/external_flash/devices.h        | 16 ++++++++++++++++
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
index 618fbfbe97..34e9ac3279 100644
--- a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
@@ -43,7 +43,7 @@
 
 #define EXTERNAL_FLASH_DEVICE_COUNT 2
 
-#define EXTERNAL_FLASH_DEVICES W25Q64JV_IM, \
+#define EXTERNAL_FLASH_DEVICES W25Q64JV_IQ, \
                                GD25Q64C
 
 #include "external_flash/external_flash.h"
diff --git a/ports/atmel-samd/external_flash/devices.h b/ports/atmel-samd/external_flash/devices.h
index 330d3e3b60..87df836766 100644
--- a/ports/atmel-samd/external_flash/devices.h
+++ b/ports/atmel-samd/external_flash/devices.h
@@ -217,6 +217,22 @@ typedef struct {
     .supports_qspi_writes = true, \
 }
 
+// Settings for the Winbond W25Q64JV-IQ 8MiB SPI flash. Note that JV-IM has a different .memory_type (0x70)
+// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf
+#define W25Q64JV_IQ {\
+    .total_size = (1 << 23), /* 8 MiB */ \
+    .start_up_time_us = 5000, \
+    .manufacturer_id = 0xef, \
+    .memory_type = 0x40, \
+    .capacity = 0x17, \
+    .max_clock_speed_mhz = 133, \
+    .has_sector_protection = false, \
+    .supports_fast_read = true, \
+    .supports_qspi = true, \
+    .has_quad_enable = true, \
+    .supports_qspi_writes = true, \
+}
+
 // Settings for the Winbond W25Q80DL 1MiB SPI flash.
 // Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf
 #define W25Q80DL {\

From 44de3d49a8d25f51b98aef8643dc500c32df2cf2 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Mon, 20 Aug 2018 17:04:46 -0700
Subject: [PATCH 06/14] Speed up zero neopixel pulses.

SK6812 on 5v is pickier than WS2812 on 5v.

Hopefully fixes #1083.
---
 ports/atmel-samd/common-hal/neopixel_write/__init__.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c
index 31de2c207a..4b4aebe90f 100644
--- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c
+++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c
@@ -109,7 +109,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
         asm("nop; nop;");
         #endif
         #ifdef SAMD51
-        delay_cycles(3);
+        delay_cycles(1);
         #endif
         if((p & bitMask) != 0) {
             // This is the high delay unique to a one bit.
@@ -129,7 +129,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
             asm("nop; nop;");
             #endif
             #ifdef SAMD51
-            delay_cycles(3);
+            delay_cycles(1);
             #endif
         }
         if((bitMask >>= 1) != 0) {

From 2b6b0ffcd249e2aaa2b5bef03d8bb67f0ba42245 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Mon, 20 Aug 2018 18:04:35 -0700
Subject: [PATCH 07/14] Remove HID from hallowing so we have more room for
 other stuff.

---
 ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk
index 817d93943e..da107a733f 100644
--- a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk
@@ -12,6 +12,5 @@ CHIP_FAMILY = samd21
 
 # Include these Python libraries in firmware.
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice
-FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel

From e8b94d0024ed105f08b7c072a795cde54331c3aa Mon Sep 17 00:00:00 2001
From: Jerry Needell <jerryneedell@gmail.com>
Date: Fri, 24 Aug 2018 07:01:50 -0400
Subject: [PATCH 08/14]  adjust SAMD51 neopixel_write timing

---
 ports/atmel-samd/common-hal/neopixel_write/__init__.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c
index 4b4aebe90f..7b527dea3a 100644
--- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c
+++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c
@@ -109,7 +109,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
         asm("nop; nop;");
         #endif
         #ifdef SAMD51
-        delay_cycles(1);
+        delay_cycles(2);
         #endif
         if((p & bitMask) != 0) {
             // This is the high delay unique to a one bit.
@@ -129,7 +129,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout,
             asm("nop; nop;");
             #endif
             #ifdef SAMD51
-            delay_cycles(1);
+            delay_cycles(2);
             #endif
         }
         if((bitMask >>= 1) != 0) {

From c3918bae575665895da0dc86d4c430a22a25bf67 Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Tue, 11 Sep 2018 19:45:22 -0400
Subject: [PATCH 09/14] PWMOut was not claming channels on shared TCCs

---
 ports/atmel-samd/common-hal/pulseio/PWMOut.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/ports/atmel-samd/common-hal/pulseio/PWMOut.c b/ports/atmel-samd/common-hal/pulseio/PWMOut.c
index 9c04f91fae..a7a0574fef 100644
--- a/ports/atmel-samd/common-hal/pulseio/PWMOut.c
+++ b/ports/atmel-samd/common-hal/pulseio/PWMOut.c
@@ -51,10 +51,10 @@ uint8_t tcc_refcount[TCC_INST_NUM];
 
 // This bitmask keeps track of which channels of a TCC are currently claimed.
 #ifdef SAMD21
-uint8_t tcc_channels[3] = {0xf0, 0xfc, 0xfc};
+uint8_t tcc_channels[3];   // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially.
 #endif
 #ifdef SAMD51
-uint8_t tcc_channels[5] = {0xc0, 0xf0, 0xf8, 0xfc, 0xfc};
+uint8_t tcc_channels[5];   // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially.
 #endif
 
 void pwmout_reset(void) {
@@ -75,7 +75,7 @@ void pwmout_reset(void) {
         for (uint8_t j = 0; j < tcc_cc_num[i]; j++) {
             mask <<= 1;
         }
-        tcc_channels[i] = 0xf0;
+        tcc_channels[i] = mask;
         tccs[i]->CTRLA.bit.SWRST = 1;
     }
     Tc *tcs[TC_INST_NUM] = TC_INSTS;
@@ -122,7 +122,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
     // Figure out which timer we are using.
 
     // First see if a tcc is already going with the frequency we want and our
-    // channel is unused. tc's don't have neough channels to share.
+    // channel is unused. tc's don't have enough channels to share.
     const pin_timer_t* timer = NULL;
     uint8_t mux_position = 0;
     if (!variable_frequency) {
@@ -139,6 +139,9 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
                 if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) {
                     timer = t;
                     mux_position = j;
+                    // Claim channel.
+                    tcc_channels[timer->index] |= (1 << tcc_channel(timer));
+
                 }
             }
         }

From f289863088972c923111bd19ed2df2d4e7c64b6d Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Tue, 11 Sep 2018 21:26:58 -0400
Subject: [PATCH 10/14] bump gcc-arm-embedded to 7-2018q2 to save flash space

---
 .travis.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.travis.yml b/.travis.yml
index 2968a7d386..c1a4849cf5 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -53,8 +53,8 @@ before_script:
     sudo apt-get install -y python3 gcc-multilib pkg-config libffi-dev libffi-dev:i386 qemu-system
 
   - ([[ -z "$TRAVIS_TEST" ]] || sudo apt-get install -y qemu-system)
-  - ([[ -z "$TRAVIS_BOARD" ]] || (wget https://s3.amazonaws.com/adafruit-circuit-python/gcc-arm-embedded_7-2017q4-1~trusty3_amd64.deb && sudo dpkg -i gcc-arm-embedded*_amd64.deb))
-  - ([[ $TRAVIS_TEST != "qemu" ]] || (wget https://s3.amazonaws.com/adafruit-circuit-python/gcc-arm-embedded_7-2017q4-1~trusty3_amd64.deb && sudo dpkg -i gcc-arm-embedded*_amd64.deb))
+  - ([[ -z "$TRAVIS_BOARD" ]] || (wget https://s3.amazonaws.com/adafruit-circuit-python/gcc-arm-embedded_7-2018q2-1~trusty1_amd64.deb && sudo dpkg -i gcc-arm-embedded*_amd64.deb))
+  - ([[ $TRAVIS_TEST != "qemu" ]] || (wget https://s3.amazonaws.com/adafruit-circuit-python/gcc-arm-embedded_7-2018q2-1~trusty1_amd64.deb && sudo dpkg -i gcc-arm-embedded*_amd64.deb))
 
   # For teensy build
   - sudo apt-get install realpath

From 02b3f62460df879b83018a32a4a47aa68d81af58 Mon Sep 17 00:00:00 2001
From: Paul Kierstead <paulkierstead@gmail.com>
Date: Sat, 1 Sep 2018 17:07:30 +0000
Subject: [PATCH 11/14] When UART timeout of zero is given, make read() return
 data already available

---
 ports/atmel-samd/common-hal/busio/UART.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c
index 20e662ec62..fbed1d506b 100644
--- a/ports/atmel-samd/common-hal/busio/UART.c
+++ b/ports/atmel-samd/common-hal/busio/UART.c
@@ -254,7 +254,7 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
     uint64_t start_ticks = ticks_ms;
 
     // Busy-wait until timeout or until we've read enough chars.
-    while (ticks_ms - start_ticks < self->timeout_ms) {
+    while (ticks_ms - start_ticks <= self->timeout_ms) {
         // Read as many chars as we can right now, up to len.
         size_t num_read = io_read(io, data, len);
 
@@ -273,6 +273,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
 #ifdef MICROPY_VM_HOOK_LOOP
         MICROPY_VM_HOOK_LOOP
 #endif
+       // If we are zero timeout, make sure we don't loop again (in the event 
+       // we read in under 1ms)
+       if (self->timeout_ms == 0)
+            break;
     }
 
     if (total_read == 0) {

From 2bd7040fe0dc5de68c9c6b731a1e5f162df9f21e Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Wed, 12 Sep 2018 17:16:52 -0400
Subject: [PATCH 12/14] usb_write() output_len was uint8_t instead of uint32_t

---
 ports/atmel-samd/usb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ports/atmel-samd/usb.c b/ports/atmel-samd/usb.c
index f32d81e196..1f1ba550f7 100644
--- a/ports/atmel-samd/usb.c
+++ b/ports/atmel-samd/usb.c
@@ -288,7 +288,7 @@ void usb_write(const char* buffer, uint32_t len) {
         return;
     }
     uint8_t * output_buffer;
-    uint8_t output_len;
+    uint32_t output_len;
     while (len > 0) {
         while (usb_transmitting) {}
         output_buffer = (uint8_t *) buffer;

From 6a046f55c449da59cf4641ef4cf34c6b1b63da44 Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Wed, 12 Sep 2018 17:19:43 -0400
Subject: [PATCH 13/14] UART fixes and enhancements; default board object fix

---
 ports/atmel-samd/Makefile                |   2 +-
 ports/atmel-samd/board_busses.c          | 143 +++++++++++++----------
 ports/atmel-samd/board_busses.h          |   2 +
 ports/atmel-samd/common-hal/busio/UART.c |  15 ++-
 ports/atmel-samd/common-hal/busio/UART.h |   4 -
 ports/atmel-samd/supervisor/port.c       |   3 +
 ports/esp8266/common-hal/busio/UART.c    |   3 +
 shared-bindings/busio/UART.c             |  35 +++++-
 shared-bindings/busio/UART.h             |   1 +
 9 files changed, 136 insertions(+), 72 deletions(-)

diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile
index 62f058c3d7..865210e2f5 100644
--- a/ports/atmel-samd/Makefile
+++ b/ports/atmel-samd/Makefile
@@ -115,7 +115,7 @@ else
   # -finline-limit=80 or so is similar to not having it on.
   # There is no simple default value, though.
   ifdef INTERNAL_FLASH_FILESYSTEM
-    CFLAGS += -finline-limit=55
+    CFLAGS += -finline-limit=50
   endif
   ifdef CFLAGS_INLINE_LIMIT
     CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT)
diff --git a/ports/atmel-samd/board_busses.c b/ports/atmel-samd/board_busses.c
index 4bf1a40faf..6a4c4a84d6 100644
--- a/ports/atmel-samd/board_busses.c
+++ b/ports/atmel-samd/board_busses.c
@@ -33,81 +33,96 @@
 #include "samd/pins.h"
 #include "py/runtime.h"
 
-#if !defined(DEFAULT_I2C_BUS_SDA) || !defined(DEFAULT_I2C_BUS_SCL)
-    STATIC mp_obj_t board_i2c(void) {
-        mp_raise_NotImplementedError("No default I2C bus");
-        return NULL;
+#define BOARD_I2C (defined(DEFAULT_I2C_BUS_SDA) && defined(DEFAULT_I2C_BUS_SCL))
+#define BOARD_SPI (defined(DEFAULT_SPI_BUS_SCK) && defined(DEFAULT_SPI_BUS_MISO) && defined(DEFAULT_SPI_BUS_MOSI))
+#define BOARD_UART (defined(DEFAULT_UART_BUS_RX) && defined(DEFAULT_UART_BUS_TX))
+
+#if BOARD_I2C
+STATIC mp_obj_t i2c_singleton = NULL;
+
+STATIC mp_obj_t board_i2c(void) {
+
+    if (i2c_singleton == NULL) {
+        busio_i2c_obj_t *self = m_new_obj(busio_i2c_obj_t);
+        self->base.type = &busio_i2c_type;
+
+        assert_pin_free(DEFAULT_I2C_BUS_SDA);
+        assert_pin_free(DEFAULT_I2C_BUS_SCL);
+        common_hal_busio_i2c_construct(self, DEFAULT_I2C_BUS_SCL, DEFAULT_I2C_BUS_SDA, 400000, 0);
+        i2c_singleton = (mp_obj_t)self;
     }
+    return i2c_singleton;
+}
 #else
-    STATIC mp_obj_t i2c_singleton = NULL;
-
-    STATIC mp_obj_t board_i2c(void) {
-
-        if (i2c_singleton == NULL) {
-            busio_i2c_obj_t *self = m_new_obj(busio_i2c_obj_t);
-            self->base.type = &busio_i2c_type;
-
-            assert_pin_free(DEFAULT_I2C_BUS_SDA);
-            assert_pin_free(DEFAULT_I2C_BUS_SCL);
-            common_hal_busio_i2c_construct(self, DEFAULT_I2C_BUS_SCL, DEFAULT_I2C_BUS_SDA, 400000, 0);
-            i2c_singleton = (mp_obj_t)self;
-        }
-        return i2c_singleton;
-
-    }
+STATIC mp_obj_t board_i2c(void) {
+    mp_raise_NotImplementedError("No default I2C bus");
+    return NULL;
+}
 #endif
 MP_DEFINE_CONST_FUN_OBJ_0(board_i2c_obj, board_i2c);
 
-#if !defined(DEFAULT_SPI_BUS_SCK) || !defined(DEFAULT_SPI_BUS_MISO) || !defined(DEFAULT_SPI_BUS_MOSI)
-    STATIC mp_obj_t board_spi(void) {
-        mp_raise_NotImplementedError("No default SPI bus");
-        return NULL;
+#if BOARD_SPI
+STATIC mp_obj_t spi_singleton = NULL;
+
+STATIC mp_obj_t board_spi(void) {
+    if (spi_singleton == NULL) {
+        busio_spi_obj_t *self = m_new_obj(busio_spi_obj_t);
+        self->base.type = &busio_spi_type;
+        assert_pin_free(DEFAULT_SPI_BUS_SCK);
+        assert_pin_free(DEFAULT_SPI_BUS_MOSI);
+        assert_pin_free(DEFAULT_SPI_BUS_MISO);
+        const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_SCK);
+        const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MOSI);
+        const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MISO);
+        common_hal_busio_spi_construct(self, clock, mosi, miso);
+        spi_singleton = (mp_obj_t)self;
     }
+    return spi_singleton;
+}
 #else
-    STATIC mp_obj_t spi_singleton = NULL;
-
-    STATIC mp_obj_t board_spi(void) {
-
-        if (spi_singleton == NULL) {
-            busio_spi_obj_t *self = m_new_obj(busio_spi_obj_t);
-            self->base.type = &busio_spi_type;
-            assert_pin_free(DEFAULT_SPI_BUS_SCK);
-            assert_pin_free(DEFAULT_SPI_BUS_MOSI);
-            assert_pin_free(DEFAULT_SPI_BUS_MISO);
-            const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_SCK);
-            const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MOSI);
-            const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MISO);
-            common_hal_busio_spi_construct(self, clock, mosi, miso);
-            spi_singleton = (mp_obj_t)self;
-        }
-        return spi_singleton;
-    }
+STATIC mp_obj_t board_spi(void) {
+    mp_raise_NotImplementedError("No default SPI bus");
+    return NULL;
+}
 #endif
 MP_DEFINE_CONST_FUN_OBJ_0(board_spi_obj, board_spi);
 
-#if !defined(DEFAULT_UART_BUS_RX) || !defined(DEFAULT_UART_BUS_TX)
-    STATIC mp_obj_t board_uart(void) {
-        mp_raise_NotImplementedError("No default UART bus");
-        return NULL;
+#if BOARD_UART
+STATIC mp_obj_t uart_singleton = NULL;
+
+STATIC mp_obj_t board_uart(void) {
+    if (uart_singleton == NULL) {
+        busio_uart_obj_t *self = m_new_obj(busio_uart_obj_t);
+        self->base.type = &busio_uart_type;
+
+        assert_pin_free(DEFAULT_UART_BUS_RX);
+        assert_pin_free(DEFAULT_UART_BUS_TX);
+
+        const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RX);
+        const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_TX);
+
+        common_hal_busio_uart_construct(self, tx, rx, 9600, 8, PARITY_NONE, 1, 1000, 64);
+        uart_singleton = (mp_obj_t)self;
     }
+    return uart_singleton;
+}
 #else
-    STATIC mp_obj_t uart_singleton = NULL;
-
-    STATIC mp_obj_t board_uart(void) {
-        if (uart_singleton == NULL) {
-            busio_uart_obj_t *self = m_new_obj(busio_uart_obj_t);
-            self->base.type = &busio_uart_type;
-
-            assert_pin_free(DEFAULT_UART_BUS_RX);
-            assert_pin_free(DEFAULT_UART_BUS_TX);
-
-            const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RX);
-            const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_TX);
-
-            common_hal_busio_uart_construct(self, tx, rx, 9600, 8, PARITY_NONE, 1, 1000, 64);
-            uart_singleton = (mp_obj_t)self;
-        }
-        return uart_singleton;
-    }
+STATIC mp_obj_t board_uart(void) {
+    mp_raise_NotImplementedError("No default UART bus");
+    return NULL;
+}
 #endif
 MP_DEFINE_CONST_FUN_OBJ_0(board_uart_obj, board_uart);
+
+
+void reset_board_busses(void) {
+#if BOARD_I2C
+    i2c_singleton = NULL;
+#endif
+#if BOARD_SPI
+    spi_singleton = NULL;
+#endif
+#if BOARD_UART
+    uart_singleton = NULL;
+#endif
+}
diff --git a/ports/atmel-samd/board_busses.h b/ports/atmel-samd/board_busses.h
index a368885a58..08dd1aae12 100644
--- a/ports/atmel-samd/board_busses.h
+++ b/ports/atmel-samd/board_busses.h
@@ -36,4 +36,6 @@ extern mp_obj_fun_builtin_fixed_t board_spi_obj;
 void board_uart(void);
 extern mp_obj_fun_builtin_fixed_t board_uart_obj;
 
+void reset_board_busses(void);
+
 #endif  // MICROPY_INCLUDED_ATMEL_SAMD_BOARD_BUSSES_H
diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c
index fbed1d506b..b8b0ce74ca 100644
--- a/ports/atmel-samd/common-hal/busio/UART.c
+++ b/ports/atmel-samd/common-hal/busio/UART.c
@@ -273,7 +273,7 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
 #ifdef MICROPY_VM_HOOK_LOOP
         MICROPY_VM_HOOK_LOOP
 #endif
-       // If we are zero timeout, make sure we don't loop again (in the event 
+       // If we are zero timeout, make sure we don't loop again (in the event
        // we read in under 1ms)
        if (self->timeout_ms == 0)
             break;
@@ -349,7 +349,18 @@ void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrat
 }
 
 uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
-    return self->buffer_size;
+    // This assignment is only here because the usart_async routines take a *const argument.
+    struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
+    struct usart_async_status async_status;
+    usart_async_get_status(usart_desc_p, &async_status);
+    return async_status.rxcnt;
+}
+
+void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
+    // This assignment is only here because the usart_async routines take a *const argument.
+    struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
+    usart_async_flush_rx_buffer(usart_desc_p);
+
 }
 
 bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) {
diff --git a/ports/atmel-samd/common-hal/busio/UART.h b/ports/atmel-samd/common-hal/busio/UART.h
index 685755a5d1..f94df040f8 100644
--- a/ports/atmel-samd/common-hal/busio/UART.h
+++ b/ports/atmel-samd/common-hal/busio/UART.h
@@ -42,10 +42,6 @@ typedef struct {
     bool rx_error;
     uint32_t baudrate;
     uint32_t timeout_ms;
-    // Index of the oldest received character.
-    uint32_t buffer_start;
-    // Index of the next available spot to store a character.
-    uint32_t buffer_size;
     uint32_t buffer_length;
     uint8_t* buffer;
 } busio_uart_obj_t;
diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c
index 422bf1f64c..a63b85a9f7 100644
--- a/ports/atmel-samd/supervisor/port.c
+++ b/ports/atmel-samd/supervisor/port.c
@@ -61,6 +61,7 @@
 #include "samd/external_interrupts.h"
 #include "samd/dma.h"
 #include "shared-bindings/rtc/__init__.h"
+#include "board_busses.h"
 #include "tick.h"
 #include "usb.h"
 
@@ -270,6 +271,8 @@ void reset_port(void) {
 
     reset_all_pins();
 
+    reset_board_busses();
+
     // Output clocks for debugging.
     // not supported by SAMD51G; uncomment for SAMD51J or update for 51G
     // #ifdef SAMD51
diff --git a/ports/esp8266/common-hal/busio/UART.c b/ports/esp8266/common-hal/busio/UART.c
index 9b5d86ef5c..8b5bb49d42 100644
--- a/ports/esp8266/common-hal/busio/UART.c
+++ b/ports/esp8266/common-hal/busio/UART.c
@@ -137,6 +137,9 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
     return 0;
 }
 
+void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
+}
+
 bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) {
     return true;
 }
diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c
index 9bad2468e5..864fb974a2 100644
--- a/shared-bindings/busio/UART.c
+++ b/shared-bindings/busio/UART.c
@@ -252,6 +252,36 @@ const mp_obj_property_t busio_uart_baudrate_obj = {
               (mp_obj_t)&mp_const_none_obj},
 };
 
+//|   .. attribute:: in_waiting
+//|
+//|     The number of bytes in the input buffer, available to be read
+//|
+STATIC mp_obj_t busio_uart_obj_get_in_waiting(mp_obj_t self_in) {
+    busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    raise_error_if_deinited(common_hal_busio_uart_deinited(self));
+    return MP_OBJ_NEW_SMALL_INT(common_hal_busio_uart_rx_characters_available(self));
+}
+MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_get_in_waiting_obj, busio_uart_obj_get_in_waiting);
+
+const mp_obj_property_t busio_uart_in_waiting_obj = {
+    .base.type = &mp_type_property,
+    .proxy = {(mp_obj_t)&busio_uart_get_in_waiting_obj,
+              (mp_obj_t)&mp_const_none_obj,
+              (mp_obj_t)&mp_const_none_obj},
+};
+
+//|   .. method:: reset_input_buffer()
+//|
+//|     Discard any unread characters in the input buffer.
+//|
+STATIC mp_obj_t busio_uart_obj_reset_input_buffer(mp_obj_t self_in) {
+    busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    raise_error_if_deinited(common_hal_busio_uart_deinited(self));
+    common_hal_busio_uart_clear_rx_buffer(self);
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_reset_input_buffer_obj, busio_uart_obj_reset_input_buffer);
+
 //| .. class:: busio.UART.Parity
 //|
 //|     Enum-like class to define the parity used to verify correct data transfer.
@@ -306,9 +336,12 @@ STATIC const mp_rom_map_elem_t busio_uart_locals_dict_table[] = {
     { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_write),    MP_ROM_PTR(&mp_stream_write_obj) },
 
+    { MP_OBJ_NEW_QSTR(MP_QSTR_reset_input_buffer), MP_ROM_PTR(&busio_uart_reset_input_buffer_obj) },
+
     // Properties
     { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&busio_uart_baudrate_obj) },
-    
+    { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&busio_uart_in_waiting_obj) },
+
     // Nested Enum-like Classes.
     { MP_ROM_QSTR(MP_QSTR_Parity),       MP_ROM_PTR(&busio_uart_parity_type) },
 };
diff --git a/shared-bindings/busio/UART.h b/shared-bindings/busio/UART.h
index fa39d8ad5f..513ff50c83 100644
--- a/shared-bindings/busio/UART.h
+++ b/shared-bindings/busio/UART.h
@@ -60,6 +60,7 @@ extern void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t
 
 
 extern uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self);
+extern void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self);
 extern bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self);
 
 #endif  // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_UART_H

From 6a72084198b10df61b1cf85fb8340f864bc54031 Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Wed, 12 Sep 2018 18:14:43 -0400
Subject: [PATCH 14/14] fix nrf builds; sphinx 1.8.0 crashing: use lower
 version

---
 .travis.yml                       | 2 +-
 ports/nrf/common-hal/busio/UART.c | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/.travis.yml b/.travis.yml
index c1a4849cf5..3f123fe6eb 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -64,7 +64,7 @@ before_script:
   - if [[ $TRAVIS_BOARD = "feather_huzzah" ]]; then wget https://github.com/jepler/esp-open-sdk/releases/download/2018-06-10/xtensa-lx106-elf-standalone.tar.gz && tar xavf xtensa-lx106-elf-standalone.tar.gz; PATH=$(readlink -f xtensa-lx106-elf/bin):$PATH; fi
   # For coverage testing (upgrade is used to get latest urllib3 version)
   - ([[ -z "$TRAVIS_TEST" ]] || sudo pip install --upgrade cpp-coveralls)
-  - ([[ $TRAVIS_TEST != "docs" ]] || sudo pip install Sphinx sphinx-rtd-theme recommonmark)
+  - ([[ $TRAVIS_TEST != "docs" ]] || sudo pip install 'Sphinx<1.8.0' sphinx-rtd-theme recommonmark)
   - gcc --version
   - ([[ -z "$TRAVIS_BOARD" ]] || arm-none-eabi-gcc --version)
   - python3 --version
diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c
index dbc6a85331..08b4bcd163 100644
--- a/ports/nrf/common-hal/busio/UART.c
+++ b/ports/nrf/common-hal/busio/UART.c
@@ -83,6 +83,10 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
     return 0;
 }
 
+void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
+    mp_raise_NotImplementedError("busio.UART not yet implemented");
+}
+
 bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) {
     mp_raise_NotImplementedError("busio.UART not yet implemented");
     return false;