From bbe30514efdf14443726a237da86461b31690891 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 12 Dec 2021 22:21:38 -0500 Subject: [PATCH] Fix other INTENCLR and INTENSET to write whole reg --- ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c | 4 ++-- ports/atmel-samd/common-hal/watchdog/WatchDogTimer.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c index 0bc0bc214e..4e06b77b56 100644 --- a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +++ b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c @@ -185,13 +185,13 @@ static void frequencyin_reference_tc_init(void) { #ifdef SAMD21 tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV1; - tc->COUNT16.INTENSET.bit.OVF = 1; + tc->COUNT16.INTENSET.reg = TC_INTENSET_OVF; NVIC_EnableIRQ(TC3_IRQn + reference_tc); #endif #ifdef SAM_D5X_E5X tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV1; - tc->COUNT16.INTENSET.bit.OVF = 1; + tc->COUNT16.INTENSET.reg = TC_INTENSET_OVF; NVIC_EnableIRQ(TC0_IRQn + reference_tc); #endif } diff --git a/ports/atmel-samd/common-hal/watchdog/WatchDogTimer.c b/ports/atmel-samd/common-hal/watchdog/WatchDogTimer.c index 2091b7d302..65d238ce75 100644 --- a/ports/atmel-samd/common-hal/watchdog/WatchDogTimer.c +++ b/ports/atmel-samd/common-hal/watchdog/WatchDogTimer.c @@ -58,7 +58,7 @@ STATIC void setup_wdt(watchdog_watchdogtimer_obj_t *self, int setting) { while (WDT->SYNCBUSY.reg) { // Sync CTRL write } - WDT->INTENCLR.bit.EW = 1; // Disable early warning interrupt + WDT->INTENCLR.reg = WDT_INTENCLR_EW; // Disable early warning interrupt WDT->CONFIG.bit.PER = setting; // Set period for chip reset WDT->CTRLA.bit.WEN = 0; // Disable window mode while (WDT->SYNCBUSY.reg) { // Sync CTRL write