diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 96fc3960e8..10c34355d1 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -1,6 +1,12 @@ name: Build CI -on: [push, pull_request, release] +on: + push: + pull_request: + release: + types: [published] + check_suite: + types: [rerequested] jobs: test: @@ -10,9 +16,6 @@ jobs: env: GITHUB_CONTEXT: ${{ toJson(github) }} run: echo "$GITHUB_CONTEXT" - - name: Fail if not a release publish # workaround has `on` doesn't have this filter - run: exit 1 - if: github.event_name == 'release' && (github.event.action != 'published' && github.event.action != 'rerequested') - name: Set up Python 3.5 uses: actions/setup-python@v1 with: @@ -49,9 +52,6 @@ jobs: done working-directory: tests if: failure() - - name: Test threads - run: MICROPY_CPYTHON3=python3.5 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -j1 -d thread - working-directory: tests - name: Native Tests run: MICROPY_CPYTHON3=python3.5 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -j1 --emit native working-directory: tests @@ -75,6 +75,7 @@ jobs: board: - "arduino_mkr1300" - "arduino_mkrzero" + - "arduino_nano_33_ble" - "arduino_zero" - "bast_pro_mini_m0" - "capablerobot_usbhub" @@ -102,12 +103,14 @@ jobs: - "feather_m4_express" - "feather_nrf52840_express" - "feather_radiofruit_zigbee" + - "feather_stm32f405_express" - "gemma_m0" - "grandcentral_m4_express" - "hallowing_m0_express" - "hallowing_m4_express" - "itsybitsy_m0_express" - "itsybitsy_m4_express" + - "itsybitsy_nrf52840_express" - "kicksat-sprite" - "makerdiary_nrf52840_mdk" - "makerdiary_nrf52840_mdk_usb_dongle" @@ -128,6 +131,7 @@ jobs: - "pirkey_m0" - "pybadge" - "pybadge_airlift" + - "pyboard_v11" - "pygamer" - "pygamer_advance" - "pyportal" @@ -140,16 +144,21 @@ jobs: - "snekboard" - "sparkfun_lumidrive" - "sparkfun_nrf52840_mini" + - "sparkfun_qwiic_micro_no_flash" + - "sparkfun_qwiic_micro_with_flash" - "sparkfun_redboard_turbo" - "sparkfun_samd21_dev" - "sparkfun_samd21_mini" + - "spresense" - "stm32f411ve_discovery" - "stm32f412zg_discovery" + - "stringcar_m0_express" - "trellis_m4_express" - "trinket_m0" - "trinket_m0_haxpress" - "uchip" - "ugame10" + - "winterbloom_sol" steps: - name: Set up Python 3.5 diff --git a/.github/workflows/create_website_pr.yml b/.github/workflows/create_website_pr.yml index ce93237021..69ca8f12b9 100644 --- a/.github/workflows/create_website_pr.yml +++ b/.github/workflows/create_website_pr.yml @@ -1,6 +1,8 @@ name: Update CircuitPython.org -on: release +on: + release: + types: [published] jobs: website: @@ -10,9 +12,6 @@ jobs: env: GITHUB_CONTEXT: ${{ toJson(github) }} run: echo "$GITHUB_CONTEXT" - - name: Fail if not a release publish # workaround has `on` doesn't have this filter - run: exit 1 - if: github.event.action != 'published' - name: Set up Python 3.5 uses: actions/setup-python@v1 with: diff --git a/.gitmodules b/.gitmodules index 7b57cab547..bb62a5c39d 100644 --- a/.gitmodules +++ b/.gitmodules @@ -98,3 +98,6 @@ [submodule "ports/stm32f4/stm32f4"] path = ports/stm32f4/stm32f4 url = https://github.com/adafruit/stm32f4.git +[submodule "ports/cxd56/spresense-exported-sdk"] + path = ports/cxd56/spresense-exported-sdk + url = https://github.com/sonydevworld/spresense-exported-sdk.git diff --git a/conf.py b/conf.py index 3df958fe1f..2e48703c93 100644 --- a/conf.py +++ b/conf.py @@ -125,6 +125,7 @@ exclude_patterns = ["**/build*", "ports/cc3200", "ports/cc3200/FreeRTOS", "ports/cc3200/hal", + "ports/cxd56/spresense-exported-sdk", "ports/esp32", "ports/esp8266/boards", "ports/esp8266/common-hal", @@ -139,7 +140,6 @@ exclude_patterns = ["**/build*", "ports/stm32f4/stm32f4", "ports/stm32f4/peripherals", "ports/stm32f4/ref", - "ports/stm32f4/README.md", "ports/pic16bit", "ports/qemu-arm", "ports/stm32", diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ed88efc75e..ba0ec0e4f9 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -87,7 +87,8 @@ def read_mpconfig(): def build_module_map(): """ Establish the base of the JSON file, based on the contents from `configs`. Base will contain module names, if they're part of - the `FULL_BUILD`, or their default value (0 | 1). + the `FULL_BUILD`, or their default value (0, 1, or a list of + modules that determine default [see audiocore, audiomixer, etc.]). """ base = dict() @@ -98,16 +99,17 @@ def build_module_map(): full_name = module search_name = module.lstrip("_") re_pattern = "CIRCUITPY_{}\s=\s(.+)".format(search_name.upper()) - find_config = re.search(re_pattern, configs) - #print(module, "|", find_config) + find_config = re.findall(re_pattern, configs) if not find_config: continue - full_build = int("FULL_BUILD" in find_config.group(0)) - #print(find_config[1]) + find_config = ", ".join([x.strip("$()") for x in find_config]) + + full_build = int("CIRCUITPY_FULL_BUILD" in find_config) if not full_build: - default_val = find_config.group(1) + default_val = find_config else: default_val = "None" + base[search_name] = { "name": full_name, "full_build": str(full_build), @@ -115,6 +117,7 @@ def build_module_map(): "excluded": {} } + #print(base) return base @@ -166,6 +169,7 @@ def get_excluded_boards(base): if board_chip in port_config: contents += "\n" + "\n".join(port_config[board_chip]) + check_dependent_modules = dict() for module in modules: board_is_excluded = False # check if board uses `SMALL_BUILD`. if yes, and current @@ -173,14 +177,32 @@ def get_excluded_boards(base): small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) if small_build and base[module]["full_build"] == "1": board_is_excluded = True + + # check if board uses `MINIMAL_BUILD`. if yes, and current + # module is marked as `DEFAULT_BUILD`, board is excluded + min_build = re.search("CIRCUITPY_MINIMAL_BUILD = 1", contents) + if min_build and base[module]["default_value"] == "CIRCUITPY_DEFAULT_BUILD": + board_is_excluded = True + # check if module is specifically disabled for this board re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) find_module = re.search(re_pattern, contents) if not find_module: - # check if default inclusion is off ('0'). if the board doesn't - # have it explicitly enabled, its excluded. - if base[module]["default_value"] == "0": - board_is_excluded = True + if base[module]["default_value"].isdigit(): + # check if default inclusion is off ('0'). if the board doesn't + # have it explicitly enabled, its excluded. + if base[module]["default_value"] == "0": + board_is_excluded = True + else: + # this module is dependent on another module. add it + # to the list to check after processing all other modules. + # only need to check exclusion if it isn't already excluded. + if (not board_is_excluded and + base[module]["default_value"] not in [ + "None", + "CIRCUITPY_DEFAULT_BUILD" + ]): + check_dependent_modules[module] = base[module]["default_value"] else: if (find_module.group(1) == "0" and find_module.group(1) != base[module]["default_value"]): @@ -191,6 +213,29 @@ def get_excluded_boards(base): base[module]["excluded"][board_chip].append(entry.name) else: base[module]["excluded"][board_chip] = [entry.name] + + for module in check_dependent_modules: + depend_results = set() + + parents = check_dependent_modules[module].split("CIRCUITPY_") + parents = [item.strip(", ").lower() for item in parents if item] + + for parent in parents: + if parent in base: + if (board_chip in base[parent]["excluded"] and + entry.name in base[parent]["excluded"][board_chip]): + depend_results.add(False) + else: + depend_results.add(True) + + # only exclude the module if there were zero parents enabled + # as determined by the 'depend_results' set. + if not any(depend_results): + if board_chip in base[module]["excluded"]: + base[module]["excluded"][board_chip].append(entry.name) + else: + base[module]["excluded"][board_chip] = [entry.name] + #print(json.dumps(base, indent=2)) return base diff --git a/docs/supported_ports.rst b/docs/supported_ports.rst index 039ddea68b..13f1e65076 100644 --- a/docs/supported_ports.rst +++ b/docs/supported_ports.rst @@ -8,5 +8,6 @@ and ESP8266. :maxdepth: 2 ../ports/atmel-samd/README - ../ports/esp8266/README ../ports/nrf/README + ../ports/stm32f4/README + ../ports/cxd56/README diff --git a/ports/stm32/font_petme128_8x8.h b/extmod/font_petme128_8x8.h similarity index 100% rename from ports/stm32/font_petme128_8x8.h rename to extmod/font_petme128_8x8.h diff --git a/extmod/modframebuf.c b/extmod/modframebuf.c index f92312a231..561b842bcc 100644 --- a/extmod/modframebuf.c +++ b/extmod/modframebuf.c @@ -31,7 +31,7 @@ #if MICROPY_PY_FRAMEBUF -#include "ports/stm32/font_petme128_8x8.h" +#include "font_petme128_8x8.h" typedef struct _mp_obj_framebuf_t { mp_obj_base_t base; diff --git a/frozen/Adafruit_CircuitPython_BusDevice b/frozen/Adafruit_CircuitPython_BusDevice index b9280af514..52d87bd7e5 160000 --- a/frozen/Adafruit_CircuitPython_BusDevice +++ b/frozen/Adafruit_CircuitPython_BusDevice @@ -1 +1 @@ -Subproject commit b9280af5142fc41639229544678e23b5cca07c3a +Subproject commit 52d87bd7e571af66ecb57ee32b5af92531134150 diff --git a/frozen/Adafruit_CircuitPython_CircuitPlayground b/frozen/Adafruit_CircuitPython_CircuitPlayground index 154b74de02..d87ea261c4 160000 --- a/frozen/Adafruit_CircuitPython_CircuitPlayground +++ b/frozen/Adafruit_CircuitPython_CircuitPlayground @@ -1 +1 @@ -Subproject commit 154b74de020764597ba49f0d1e8cc18d55b3643b +Subproject commit d87ea261c40ecbc6d893d72d337beefbea1cf932 diff --git a/frozen/Adafruit_CircuitPython_Crickit b/frozen/Adafruit_CircuitPython_Crickit index 617bb0787f..a6100fb5d8 160000 --- a/frozen/Adafruit_CircuitPython_Crickit +++ b/frozen/Adafruit_CircuitPython_Crickit @@ -1 +1 @@ -Subproject commit 617bb0787f2c61283d248632a62b27be80f64b29 +Subproject commit a6100fb5d867c7f4980f071119bfa7e0a76e1d47 diff --git a/frozen/Adafruit_CircuitPython_IRRemote b/frozen/Adafruit_CircuitPython_IRRemote index 70865ac6e0..8b7611a2cc 160000 --- a/frozen/Adafruit_CircuitPython_IRRemote +++ b/frozen/Adafruit_CircuitPython_IRRemote @@ -1 +1 @@ -Subproject commit 70865ac6e09f821b26ec727e2df300a6d9ebf6b3 +Subproject commit 8b7611a2cc076a2ac1b368c70227519f69f1e3e9 diff --git a/frozen/Adafruit_CircuitPython_LIS3DH b/frozen/Adafruit_CircuitPython_LIS3DH index bd7ddc67dc..53146ab2e8 160000 --- a/frozen/Adafruit_CircuitPython_LIS3DH +++ b/frozen/Adafruit_CircuitPython_LIS3DH @@ -1 +1 @@ -Subproject commit bd7ddc67dc86f7ad0115f58ab80d5605739c6482 +Subproject commit 53146ab2e82c318c3c37bd76bac34035a597b311 diff --git a/frozen/Adafruit_CircuitPython_Thermistor b/frozen/Adafruit_CircuitPython_Thermistor index 893c5ec6a9..2e5aedf18e 160000 --- a/frozen/Adafruit_CircuitPython_Thermistor +++ b/frozen/Adafruit_CircuitPython_Thermistor @@ -1 +1 @@ -Subproject commit 893c5ec6a9aeef38284985074c2058e87754ad3d +Subproject commit 2e5aedf18eb417a4120d4998ac1f387a4f600730 diff --git a/frozen/Adafruit_CircuitPython_seesaw b/frozen/Adafruit_CircuitPython_seesaw index f1171f9408..ea5e445edd 160000 --- a/frozen/Adafruit_CircuitPython_seesaw +++ b/frozen/Adafruit_CircuitPython_seesaw @@ -1 +1 @@ -Subproject commit f1171f94083ba64d153ff3f90eeb07500331d6e1 +Subproject commit ea5e445edd4441cacd207aa2d2bfd724b813a253 diff --git a/lib/stm32lib b/lib/stm32lib deleted file mode 160000 index d2bcfda543..0000000000 --- a/lib/stm32lib +++ /dev/null @@ -1 +0,0 @@ -Subproject commit d2bcfda543d3b99361e44112aca929225bdcc07f diff --git a/lib/tinyusb b/lib/tinyusb index f808153631..e413c9efa3 160000 --- a/lib/tinyusb +++ b/lib/tinyusb @@ -1 +1 @@ -Subproject commit f8081536310e5ac7a1e8c8ba9295890429a2cb6f +Subproject commit e413c9efa303d70de019a91aa415384fe80ca78f diff --git a/lib/utils/interrupt_char.c b/lib/utils/interrupt_char.c index 91ee5c80ef..da7f702544 100644 --- a/lib/utils/interrupt_char.c +++ b/lib/utils/interrupt_char.c @@ -49,7 +49,7 @@ void mp_keyboard_interrupt(void) { // Check to see if we've been CTRL-C'ed by autoreload or the user. bool mp_hal_is_interrupted(void) { - return MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)); + return MP_STATE_VM(mp_pending_exception) != NULL; } #endif diff --git a/locale/ID.po b/locale/ID.po index 63e3466b6e..9c70789af6 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -261,6 +261,10 @@ msgstr "Semua timer untuk pin ini sedang digunakan" msgid "All timers in use" msgstr "Semua timer sedang digunakan" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "fungsionalitas AnalogOut tidak didukung" @@ -329,6 +333,11 @@ msgstr "" msgid "Brightness not adjustable" msgstr "" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -465,6 +474,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -507,7 +522,7 @@ msgstr "" msgid "Data chunk must follow fmt chunk" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy msgid "Data too large for advertisement packet" msgstr "Tidak bisa menyesuaikan data ke dalam paket advertisment" @@ -554,10 +569,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -567,7 +578,7 @@ msgstr "" msgid "Expected a UUID" msgstr "" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -576,6 +587,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -586,20 +602,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Gagal untuk mendapatkan mutex, status: 0x%08lX" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Gagal untuk menambahkan karakteristik, status: 0x%08lX" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Gagal untuk menambahkan layanan, status: 0x%08lX" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Gagal untuk mengalokasikan buffer RX" @@ -611,25 +621,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Gagal untuk megalokasikan buffer RX dari %d byte" #: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy -msgid "Failed to change softdevice state" -msgstr "Gagal untuk merubah status softdevice, error: 0x%08lX" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, fuzzy, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Gagal untuk melanjutkan scanning, status: 0x%08lX" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c #, fuzzy msgid "Failed to discover services" msgstr "Gagal untuk menemukan layanan, status: 0x%08lX" @@ -649,7 +656,7 @@ msgstr "Gagal untuk mendapatkan status softdevice, error: 0x%08lX" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -658,8 +665,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Gagal untuk membaca nilai atribut, status: 0x%08lX" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "" @@ -679,35 +685,27 @@ msgstr "Gagal untuk menambahkan Vendor Spesific UUID, status: 0x%08lX" msgid "Failed to release mutex, err 0x%04x" msgstr "Gagal untuk melepaskan mutex, status: 0x%08lX" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Gagal untuk memulai advertisement, status: 0x%08lX" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Gagal untuk melakukan scanning, status: 0x%08lX" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Gagal untuk memberhentikan advertisement, status: 0x%08lX" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -1004,9 +1002,8 @@ msgstr "" msgid "No such file/directory" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c #, fuzzy msgid "Not connected" msgstr "Tidak dapat menyambungkan ke AP" @@ -1081,6 +1078,10 @@ msgstr "Tambahkan module apapun pada filesystem\n" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1151,6 +1152,10 @@ msgstr "" msgid "Sample rate too high. It must be less than %d" msgstr "Nilai sampel terlalu tinggi. Nilai harus kurang dari %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1165,11 +1170,6 @@ msgstr "" msgid "Slices not supported" msgstr "" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "Dukungan soft device, id: 0x%08lX, pc: 0x%08l" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Memisahkan dengan menggunakan sub-captures" @@ -1984,7 +1984,7 @@ msgstr "" msgid "integer required" msgstr "" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2161,11 +2161,6 @@ msgstr "" msgid "name '%q' is not defined" msgstr "" -#: shared-bindings/_bleio/Peripheral.c -#, fuzzy -msgid "name must be a string" -msgstr "keyword harus berupa string" - #: py/runtime.c msgid "name not defined" msgstr "" @@ -2216,7 +2211,7 @@ msgstr "" msgid "no such attribute" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2700,7 +2695,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2770,10 +2765,22 @@ msgstr "" #~ msgid "Failed to acquire mutex" #~ msgstr "Gagal untuk mendapatkan mutex, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Gagal untuk menambahkan karakteristik, status: 0x%08lX" + #, fuzzy #~ msgid "Failed to add service" #~ msgstr "Gagal untuk menambahkan layanan, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Gagal untuk menambahkan layanan, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Gagal untuk merubah status softdevice, error: 0x%08lX" + #, fuzzy #~ msgid "Failed to connect:" #~ msgstr "Gagal untuk menyambungkan, status: 0x%08lX" @@ -2782,6 +2789,10 @@ msgstr "" #~ msgid "Failed to continue scanning" #~ msgstr "Gagal untuk melanjutkan scanning, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Gagal untuk melanjutkan scanning, status: 0x%08lX" + #, fuzzy #~ msgid "Failed to create mutex" #~ msgstr "Gagal untuk membuat mutex, status: 0x%08lX" @@ -2802,6 +2813,10 @@ msgstr "" #~ msgid "Failed to start advertising" #~ msgstr "Gagal untuk memulai advertisement, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Gagal untuk memulai advertisement, status: 0x%08lX" + #, fuzzy #~ msgid "Failed to start scanning" #~ msgstr "Gagal untuk melakukan scanning, status: 0x%08lX" @@ -2810,6 +2825,10 @@ msgstr "" #~ msgid "Failed to stop advertising" #~ msgstr "Gagal untuk memberhentikan advertisement, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Gagal untuk memberhentikan advertisement, status: 0x%08lX" + #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 tidak mendukung pull up" @@ -2859,6 +2878,10 @@ msgstr "" #~ msgid "STA required" #~ msgstr "STA dibutuhkan" +#, fuzzy, c-format +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Dukungan soft device, id: 0x%08lX, pc: 0x%08l" + #~ msgid "UART(%d) does not exist" #~ msgstr "UART(%d) tidak ada" @@ -2936,6 +2959,10 @@ msgstr "" #~ msgid "memory allocation failed, allocating %u bytes for native code" #~ msgstr "alokasi memori gagal, mengalokasikan %u byte untuk kode native" +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "keyword harus berupa string" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "tidak valid channel ADC: %d" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index d709a69cc9..34aa3ff0aa 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -259,6 +259,10 @@ msgstr "" msgid "All timers in use" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "" @@ -325,6 +329,11 @@ msgstr "" msgid "Brightness not adjustable" msgstr "" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -455,6 +464,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -497,7 +512,7 @@ msgstr "" msgid "Data chunk must follow fmt chunk" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "" @@ -543,10 +558,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -556,7 +567,7 @@ msgstr "" msgid "Expected a UUID" msgstr "" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -565,6 +576,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -575,8 +591,7 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "" #: ports/nrf/common-hal/_bleio/Service.c -#, c-format -msgid "Failed to add characteristic, err 0x%04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c @@ -584,11 +599,6 @@ msgstr "" msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" @@ -600,24 +610,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to discover services" msgstr "" @@ -634,7 +642,7 @@ msgstr "" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -643,8 +651,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "" @@ -664,34 +671,26 @@ msgstr "" msgid "Failed to release mutex, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c @@ -989,9 +988,8 @@ msgstr "" msgid "No such file/directory" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "" @@ -1065,6 +1063,10 @@ msgstr "" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1131,6 +1133,10 @@ msgstr "" msgid "Sample rate too high. It must be less than %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1145,11 +1151,6 @@ msgstr "" msgid "Slices not supported" msgstr "" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "" @@ -1950,7 +1951,7 @@ msgstr "" msgid "integer required" msgstr "" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2127,10 +2128,6 @@ msgstr "" msgid "name '%q' is not defined" msgstr "" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "" - #: py/runtime.c msgid "name not defined" msgstr "" @@ -2181,7 +2178,7 @@ msgstr "" msgid "no such attribute" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2663,7 +2660,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po index c846b646b7..afe97ff9f8 100644 --- a/locale/de_DE.po +++ b/locale/de_DE.po @@ -7,11 +7,11 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: Pascal Deneaux\n" "Language-Team: Sebastian Plamauer, Pascal Deneaux\n" -"Language: en_US\n" +"Language: de_DE\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" @@ -48,7 +48,7 @@ msgstr "%q in Benutzung" #: py/obj.c msgid "%q index out of range" -msgstr "Der Index %q befindet sich außerhalb der Reihung" +msgstr "Der Index %q befindet sich außerhalb des Bereiches" #: py/obj.c msgid "%q indices must be integers, not %s" @@ -124,7 +124,7 @@ msgstr "'%s' Integer 0x%x passt nicht in Maske 0x%x" #: py/obj.c #, c-format msgid "'%s' object does not support item assignment" -msgstr "'%s' Objekt unterstützt keine item assignment" +msgstr "'%s' Objekt unterstützt keine Zuordnung von Elementen" #: py/obj.c #, c-format @@ -226,7 +226,7 @@ msgstr "Die Adresse muss %d Bytes lang sein" #: shared-bindings/_bleio/Address.c msgid "Address type out of range" -msgstr "" +msgstr "Adresstyp außerhalb des zulässigen Bereichs" #: ports/nrf/common-hal/busio/I2C.c msgid "All I2C peripherals are in use" @@ -261,6 +261,10 @@ msgstr "Alle timer für diesen Pin werden bereits benutzt" msgid "All timers in use" msgstr "Alle timer werden benutzt" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "AnalogOut-Funktion wird nicht unterstützt" @@ -303,7 +307,7 @@ msgstr "" #: shared-module/displayio/Display.c msgid "Below minimum frame rate" -msgstr "" +msgstr "Unterhalb der minimalen Frame Rate" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Bit clock and word select must share a clock unit" @@ -319,7 +323,7 @@ msgstr "Beide pins müssen Hardware Interrupts unterstützen" #: shared-bindings/displayio/Display.c msgid "Brightness must be 0-1.0" -msgstr "" +msgstr "Die Helligkeit muss zwischen 0 und 1.0 liegen" #: shared-bindings/supervisor/__init__.c msgid "Brightness must be between 0 and 255" @@ -329,6 +333,11 @@ msgstr "Die Helligkeit muss zwischen 0 und 255 liegen" msgid "Brightness not adjustable" msgstr "Die Helligkeit ist nicht einstellbar" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -336,16 +345,16 @@ msgstr "Der Puffergröße ist inkorrekt. Sie sollte %d bytes haben." #: shared-bindings/displayio/Display.c msgid "Buffer is not a bytearray." -msgstr "" +msgstr "Der Puffer ist kein Byte-Array" #: shared-bindings/displayio/Display.c msgid "Buffer is too small" -msgstr "" +msgstr "Der Puffer ist zu klein" #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #, c-format msgid "Buffer length %d too big. It must be less than %d" -msgstr "" +msgstr "Die Pufferlänge %d ist zu groß. Sie muss kleiner als %d sein." #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" @@ -367,7 +376,7 @@ msgstr "Ein Bytes kann nur Werte zwischen 0 und 255 annehmen." #: py/objtype.c msgid "Call super().__init__() before accessing native object." -msgstr "" +msgstr "Rufe super().__init__() vor dem Zugriff auf ein natives Objekt auf." #: shared-bindings/_pixelbuf/PixelBuf.c #, c-format @@ -449,23 +458,29 @@ msgstr "Clock unit wird benutzt" #: shared-bindings/_pew/PewPew.c msgid "Column entry must be digitalio.DigitalInOut" -msgstr "" +msgstr "Spalteneintrag muss digitalio.DigitalInOut sein" #: shared-bindings/displayio/I2CDisplay.c msgid "Command must be 0-255" -msgstr "" +msgstr "Der Befehl muss zwischen 0 und 255 liegen" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "Der Befehl muss ein int zwischen 0 und 255 sein" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" -msgstr "" +msgstr "Beschädigte .mpy Datei" #: py/emitglue.c msgid "Corrupt raw code" -msgstr "" +msgstr "Beschädigter raw code" #: ports/nrf/common-hal/_bleio/UUID.c #, c-format @@ -499,9 +514,9 @@ msgstr "Data 0 pin muss am Byte ausgerichtet sein" #: shared-module/audiocore/WaveFile.c msgid "Data chunk must follow fmt chunk" -msgstr "" +msgstr "Dem fmt Block muss ein Datenblock folgen" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "Zu vielen Daten für das advertisement packet" @@ -511,11 +526,11 @@ msgstr "Die Zielkapazität ist kleiner als destination_length." #: ports/nrf/common-hal/audiobusio/I2SOut.c msgid "Device in use" -msgstr "" +msgstr "Gerät in Benutzung" #: shared-bindings/displayio/Display.c msgid "Display must have a 16 bit colorspace." -msgstr "" +msgstr "Display muss einen 16 Bit Farbraum haben." #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c @@ -547,31 +562,32 @@ msgstr "Erwartet ein(e) %q" msgid "Expected a Characteristic" msgstr "Characteristic wird erwartet" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" -msgstr "" +msgstr "Ein Service wird erwartet" #: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c #: shared-bindings/_bleio/Service.c msgid "Expected a UUID" msgstr "Eine UUID wird erwartet" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" -msgstr "" +msgstr "Erwartet eine Adresse" #: shared-module/_pixelbuf/PixelBuf.c #, c-format msgid "Expected tuple of length %d, got %d" msgstr "Habe ein Tupel der Länge %d erwartet aber %d erhalten" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." -msgstr "" +msgstr "Kommando nicht gesendet." #: ports/nrf/sd_mutex.c #, c-format @@ -579,19 +595,13 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Mutex konnte nicht akquiriert werden. Status: 0x%04x" #: ports/nrf/common-hal/_bleio/Service.c -#, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Hinzufügen des Characteristic ist gescheitert. Status: 0x%04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" -msgstr "" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Dienst konnte nicht hinzugefügt werden. Status: 0x%04x" +msgstr "Deskriptor konnte nicht hinzugefügt werden. Status: 0x%04x" #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" @@ -604,24 +614,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Konnte keine RX Buffer mit %d allozieren" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" -msgstr "Fehler beim Ändern des Softdevice-Status" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" +msgstr "Verbindung nicht erfolgreich: timeout" + +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Der Scanvorgang kann nicht fortgesetzt werden. Status: 0x%04x" - -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to discover services" msgstr "Es konnten keine Dienste gefunden werden" @@ -638,20 +646,19 @@ msgstr "Fehler beim Abrufen des Softdevice-Status" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" -msgstr "" +msgstr "Koppeln fehlgeschlagen" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to read CCCD value, err 0x%04x" msgstr "Kann CCCD value nicht lesen. Status: 0x%04x" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" -msgstr "" +msgstr "Kann Attributwert nicht lesen, Status: 0x%04x" #: ports/nrf/common-hal/_bleio/__init__.c #, c-format @@ -668,40 +675,32 @@ msgstr "Kann keine herstellerspezifische UUID hinzufügen. Status: 0x%04x" msgid "Failed to release mutex, err 0x%04x" msgstr "Mutex konnte nicht freigegeben werden. Status: 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Kann advertisement nicht starten. Status: 0x%04x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" +msgstr "Verbindung konnte nicht hergestellt werden. Status: 0x%04x" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" -msgstr "" - -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Der Scanvorgang kann nicht gestartet werden. Status: 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Kann advertisement nicht stoppen. Status: 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to write CCCD, err 0x%04x" -msgstr "" +msgstr "Konnte CCCD nicht schreiben, Status: 0x%04x" #: ports/nrf/common-hal/_bleio/__init__.c #, c-format @@ -737,7 +736,7 @@ msgstr "" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Frequency captured is above capability. Capture Paused." -msgstr "" +msgstr "Die aufgezeichnete Frequenz liegt über der Leistungsgrenze. Aufnahme angehalten." #: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c #: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c @@ -747,7 +746,7 @@ msgstr "Die Funktion erwartet, dass der 'lock'-Befehl zuvor ausgeführt wurde" #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c msgid "Group already used" -msgstr "" +msgstr "Gruppe schon benutzt" #: shared-module/displayio/Group.c msgid "Group full" @@ -771,7 +770,7 @@ msgstr "" #: shared-bindings/_pew/PewPew.c msgid "Incorrect buffer size" -msgstr "" +msgstr "Inkorrekte Puffergröße" #: py/moduerrno.c msgid "Input/output error" @@ -797,7 +796,7 @@ msgstr "Ungültiges Argument" #: shared-module/displayio/Bitmap.c msgid "Invalid bits per value" -msgstr "" +msgstr "Ungültige Bits pro Wert" #: ports/nrf/common-hal/busio/UART.c msgid "Invalid buffer size" @@ -805,7 +804,7 @@ msgstr "Ungültige Puffergröße" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Invalid capture period. Valid range: 1 - 500" -msgstr "" +msgstr "Ungültiger Aufnahmezeitraum. Gültiger Bereich: 1 - 500" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid channel count" @@ -859,7 +858,7 @@ msgstr "Ungültige Polarität" #: shared-bindings/_bleio/Characteristic.c msgid "Invalid properties" -msgstr "" +msgstr "Ungültige Eigenschaften" #: shared-bindings/microcontroller/__init__.c msgid "Invalid run mode." @@ -867,11 +866,11 @@ msgstr "Ungültiger Ausführungsmodus" #: shared-module/_bleio/Attribute.c msgid "Invalid security_mode" -msgstr "" +msgstr "Ungültiger security_mode" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice" -msgstr "" +msgstr "Ungültige Stimme" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice count" @@ -887,7 +886,7 @@ msgstr "LHS des Schlüsselwortarguments muss eine id sein" #: shared-module/displayio/Group.c msgid "Layer already in a group." -msgstr "" +msgstr "Layer ist bereits in einer Gruppe." #: shared-module/displayio/Group.c msgid "Layer must be a Group or TileGrid subclass." @@ -942,11 +941,11 @@ msgstr "" #: shared-bindings/displayio/Group.c msgid "Must be a %q subclass." -msgstr "" +msgstr "Muss eine %q Unterklasse sein." #: ports/nrf/common-hal/_bleio/Characteristic.c msgid "No CCCD for this Characteristic" -msgstr "" +msgstr "Kein CCCD für diese Charakteristik" #: ports/atmel-samd/common-hal/analogio/AnalogOut.c msgid "No DAC on chip" @@ -967,7 +966,7 @@ msgstr "Kein TX Pin" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "No available clocks" -msgstr "" +msgstr "Keine Taktgeber verfügbar" #: shared-bindings/board/__init__.c msgid "No default %q bus" @@ -983,7 +982,7 @@ msgstr "Kein hardware random verfügbar" #: ports/atmel-samd/common-hal/ps2io/Ps2.c msgid "No hardware support on clk pin" -msgstr "" +msgstr "Keine Hardwareunterstützung am clk Pin" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -992,26 +991,25 @@ msgstr "Keine Hardwareunterstützung an diesem Pin" #: shared-module/touchio/TouchIn.c msgid "No pulldown on pin; 1Mohm recommended" -msgstr "" +msgstr "Kein Pulldown Widerstand am Pin; 1Mohm wird vorgeschlagen" #: py/moduerrno.c msgid "No space left on device" -msgstr "Kein Speicherplatz auf Gerät" +msgstr "Kein Speicherplatz mehr verfügbar auf dem Gerät" #: py/moduerrno.c msgid "No such file/directory" msgstr "Keine solche Datei/Verzeichnis" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "Nicht verbunden" #: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c #: shared-bindings/audiopwmio/PWMAudioOut.c msgid "Not playing" -msgstr "Spielt nicht" +msgstr "Spielt nicht ab" #: shared-bindings/util.c msgid "" @@ -1033,6 +1031,8 @@ msgstr "Nur 8 oder 16 bit mono mit " msgid "" "Only Windows format, uncompressed BMP supported: given header size is %d" msgstr "" +"Nur Windows-Format, unkomprimiertes BMP unterstützt: die gegebene Header-" +"Größe ist %d" #: shared-module/displayio/OnDiskBitmap.c #, c-format @@ -1040,6 +1040,8 @@ msgid "" "Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " "%d bpp given" msgstr "" +"Nur monochrome, indizierte 4bpp oder 8bpp, und 16bpp oder größere BMPs " +"unterstützt: %d bpp wurden gegeben" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "Only slices with step=1 (aka None) are supported" @@ -1080,6 +1082,10 @@ msgstr "und alle Module im Dateisystem \n" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1100,7 +1106,7 @@ msgstr "Eine RTC wird auf diesem Board nicht unterstützt" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "Range out of bounds" -msgstr "" +msgstr "Bereich außerhalb der Grenzen" #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" @@ -1116,7 +1122,7 @@ msgstr "Schreibgeschützte Objekt" #: shared-bindings/displayio/EPaperDisplay.c msgid "Refresh too soon" -msgstr "" +msgstr "Zu früh neu geladen" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Right channel unsupported" @@ -1124,7 +1130,7 @@ msgstr "Rechter Kanal wird nicht unterstützt" #: shared-bindings/_pew/PewPew.c msgid "Row entry must be digitalio.DigitalInOut" -msgstr "" +msgstr "Zeileneintrag muss ein digitalio.DigitalInOut sein" #: main.c msgid "Running in safe mode! Auto-reload is off.\n" @@ -1148,6 +1154,10 @@ msgstr "Abtastrate muss positiv sein" msgid "Sample rate too high. It must be less than %d" msgstr "Abtastrate zu hoch. Wert muss unter %d liegen" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1162,11 +1172,6 @@ msgstr "Slice und Wert (value) haben unterschiedliche Längen." msgid "Slices not supported" msgstr "Slices werden nicht unterstützt" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Splitting mit sub-captures" @@ -1199,6 +1204,8 @@ msgid "" "The `microcontroller` module was used to boot into safe mode. Press reset to " "exit safe mode.\n" msgstr "" +"Das `Mikrocontroller` Modul wurde benutzt, um in den Sicherheitsmodus zu " +"starten. Drücke Reset um den Sicherheitsmodus zu verlassen.\n" #: supervisor/shared/safe_mode.c msgid "" @@ -1288,7 +1295,7 @@ msgstr "USB Fehler" #: shared-bindings/_bleio/UUID.c msgid "UUID integer value must be 0-0xffff" -msgstr "" +msgstr "UUID Integer-Wert muss ein Wert von 0 bis 0xffff sein" #: shared-bindings/_bleio/UUID.c msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" @@ -1306,7 +1313,7 @@ msgstr "Konnte keine Buffer für Vorzeichenumwandlung allozieren" #: shared-module/displayio/I2CDisplay.c #, c-format msgid "Unable to find I2C Display at %x" -msgstr "" +msgstr "Konnte kein I2C Display finden an %x" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -1319,7 +1326,7 @@ msgstr "Parser konnte nicht gestartet werden" #: shared-module/displayio/OnDiskBitmap.c msgid "Unable to read color palette data" -msgstr "" +msgstr "Konnte Farbpalettendaten nicht lesen" #: shared-bindings/nvm/ByteArray.c msgid "Unable to write to nvm." @@ -1364,7 +1371,7 @@ msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c msgid "Value length > max_length" -msgstr "" +msgstr "Länge des Wertes > max_length" #: py/emitnative.c msgid "Viper functions don't currently support more than 4 arguments" @@ -1471,11 +1478,11 @@ msgstr "" #: py/objstr.c msgid "bad format string" -msgstr "" +msgstr "Falscher Formatstring" #: py/binary.c msgid "bad typecode" -msgstr "" +msgstr "Falscher Typcode" #: py/emitnative.c msgid "binary op %q not implemented" @@ -1534,7 +1541,7 @@ msgstr "" #: shared-bindings/_pixelbuf/PixelBuf.c #, c-format msgid "byteorder is not an instance of ByteOrder (got a %s)" -msgstr "" +msgstr "byteorder ist keine Instanz von ByteOrder (%s erhalten)" #: ports/atmel-samd/common-hal/busio/UART.c msgid "bytes > 8 bits not supported" @@ -1558,7 +1565,7 @@ msgstr "Kalibrierwert nicht im Bereich von +/-127" #: py/emitinlinethumb.c msgid "can only have up to 4 parameters to Thumb assembly" -msgstr "" +msgstr "kann nur bis zu 4 Parameter für die Thumb assembly haben" #: py/emitinlinextensa.c msgid "can only have up to 4 parameters to Xtensa assembly" @@ -1657,7 +1664,7 @@ msgstr "Laden von '%q' nicht möglich" #: py/emitnative.c msgid "can't load with '%q' index" -msgstr "" +msgstr "Laden mit '%q' index nicht möglich" #: py/objgenerator.c msgid "can't pend throw to just-started generator" @@ -1669,7 +1676,7 @@ msgstr "" #: py/objnamedtuple.c msgid "can't set attribute" -msgstr "" +msgstr "kann Attribut nicht setzen" #: py/emitnative.c msgid "can't store '%q'" @@ -1695,11 +1702,11 @@ msgstr "" #: py/objtype.c msgid "cannot create '%q' instances" -msgstr "" +msgstr "Kann '%q' Instanzen nicht erstellen" #: py/objtype.c msgid "cannot create instance" -msgstr "" +msgstr "Kann Instanz nicht erstellen" #: py/runtime.c msgid "cannot import name %q" @@ -1727,31 +1734,32 @@ msgstr "chr() arg ist nicht in range(256)" #: shared-bindings/displayio/Palette.c msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" -msgstr "" +msgstr "Farbpuffer muss 3 Bytes (RGB) oder 4 Bytes (RGB + pad byte) sein" #: shared-bindings/displayio/Palette.c msgid "color buffer must be a buffer or int" -msgstr "" +msgstr "Farbpuffer muss ein Puffer oder ein int sein" #: shared-bindings/displayio/Palette.c msgid "color buffer must be a bytearray or array of type 'b' or 'B'" msgstr "" +"Farbpuffer muss ein Byte-Array oder ein Array vom Typ 'b' oder 'B' sein" #: shared-bindings/displayio/Palette.c msgid "color must be between 0x000000 and 0xffffff" -msgstr "" +msgstr "Farbe muss zwischen 0x000000 und 0xffffff liegen" #: shared-bindings/displayio/ColorConverter.c msgid "color should be an int" -msgstr "" +msgstr "Farbe sollte ein int sein" #: py/objcomplex.c msgid "complex division by zero" -msgstr "" +msgstr "Komplexe Division durch null" #: py/objfloat.c py/parsenum.c msgid "complex values not supported" -msgstr "" +msgstr "Komplexe Zahlen nicht unterstützt" #: extmod/moduzlib.c msgid "compression header" @@ -1759,15 +1767,15 @@ msgstr "kompression header" #: py/parse.c msgid "constant must be an integer" -msgstr "" +msgstr "constant muss ein integer sein" #: py/emitnative.c msgid "conversion to object" -msgstr "" +msgstr "Umwandlung zu Objekt" #: py/parsenum.c msgid "decimal numbers not supported" -msgstr "" +msgstr "Dezimalzahlen nicht unterstützt" #: py/compile.c msgid "default 'except' must be last" @@ -1784,7 +1792,7 @@ msgstr "" #: shared-bindings/audiobusio/PDMIn.c msgid "destination_length must be an int >= 0" -msgstr "" +msgstr "destination_length muss ein int >= 0 sein" #: py/objdict.c msgid "dict update sequence has wrong length" @@ -1817,7 +1825,7 @@ msgstr "" #: shared-bindings/displayio/Shape.c msgid "end_x should be an int" -msgstr "" +msgstr "end_x sollte ein int sein" #: ports/nrf/common-hal/busio/UART.c #, c-format @@ -1991,10 +1999,10 @@ msgstr "int() arg 2 muss >= 2 und <= 36 sein" msgid "integer required" msgstr "integer erforderlich" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" -msgstr "" +msgstr "Das Intervall muss im Bereich %s-%s sein" #: extmod/machine_i2c.c msgid "invalid I2C peripheral" @@ -2127,7 +2135,7 @@ msgstr "" #: ports/nrf/common-hal/_bleio/Descriptor.c #, c-format msgid "max_length must be 0-%d when fixed_length is %s" -msgstr "" +msgstr "max_length muss 0-%d sein, wenn fixed_length %s ist" #: py/runtime.c msgid "maximum recursion depth exceeded" @@ -2156,7 +2164,7 @@ msgstr "" #: py/objtype.c msgid "multiple inheritance not supported" -msgstr "" +msgstr "Mehrfache Vererbung nicht unterstützt" #: py/emitnative.c msgid "must raise an object" @@ -2174,10 +2182,6 @@ msgstr "muss Schlüsselwortargument für key function verwenden" msgid "name '%q' is not defined" msgstr "Name '%q' ist nirgends definiert worden (Schreibweise kontrollieren)" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "name muss ein String sein" - #: py/runtime.c msgid "name not defined" msgstr "Dieser Name ist nirgends definiert worden (Schreibweise kontrollieren)" @@ -2209,7 +2213,7 @@ msgstr "" #: shared-bindings/socket/__init__.c shared-module/network/__init__.c msgid "no available NIC" -msgstr "" +msgstr "kein verfügbares Netzwerkadapter (NIC)" #: py/compile.c msgid "no binding for nonlocal found" @@ -2222,13 +2226,13 @@ msgstr "Kein Modul mit dem Namen '%q'" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c #: shared-bindings/displayio/ParallelBus.c msgid "no reset pin available" -msgstr "" +msgstr "kein Reset Pin verfügbar" #: py/runtime.c shared-bindings/_pixelbuf/__init__.c msgid "no such attribute" -msgstr "" +msgstr "kein solches Attribut" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2316,11 +2320,11 @@ msgstr "offset außerhalb der Grenzen" #: ports/nrf/common-hal/audiobusio/PDMIn.c msgid "only bit_depth=16 is supported" -msgstr "" +msgstr "nur eine bit_depth=16 wird unterstützt" #: ports/nrf/common-hal/audiobusio/PDMIn.c msgid "only sample_rate=16000 is supported" -msgstr "" +msgstr "nur eine sample_rate=16000 wird unterstützt" #: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c #: shared-bindings/nvm/ByteArray.c @@ -2340,7 +2344,7 @@ msgstr "" #: py/objint_mpz.c msgid "overflow converting long int to machine word" -msgstr "" +msgstr "Überlauf beim konvertieren von long int zu machine word" #: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c msgid "palette must be 32 bytes long" @@ -2348,7 +2352,7 @@ msgstr "" #: shared-bindings/displayio/Palette.c msgid "palette_index should be an int" -msgstr "" +msgstr "palette_index sollte ein int sein" #: py/compile.c msgid "parameter annotation must be an identifier" @@ -2450,7 +2454,7 @@ msgstr "Der schedule stack ist voll" #: lib/utils/pyexec.c py/builtinimport.c msgid "script compilation not supported" -msgstr "kompilieren von Skripten ist nicht unterstützt" +msgstr "kompilieren von Skripten nicht unterstützt" #: py/objstr.c msgid "sign not allowed in string format specifier" @@ -2482,11 +2486,11 @@ msgstr "weicher reboot\n" #: py/objstr.c msgid "start/end indices" -msgstr "" +msgstr "start/end Indizes" #: shared-bindings/displayio/Shape.c msgid "start_x should be an int" -msgstr "" +msgstr "start_x sollte ein int sein" #: shared-bindings/random/__init__.c msgid "step must be non-zero" @@ -2506,7 +2510,7 @@ msgstr "stream operation ist nicht unterstützt" #: py/objstrunicode.c msgid "string index out of range" -msgstr "" +msgstr "String index außerhalb des Bereiches" #: py/objstrunicode.c #, c-format @@ -2597,11 +2601,11 @@ msgstr "tx und rx können nicht beide None sein" #: py/objtype.c msgid "type '%q' is not an acceptable base type" -msgstr "" +msgstr "Typ '%q' ist kein akzeptierter Basis-Typ" #: py/objtype.c msgid "type is not an acceptable base type" -msgstr "" +msgstr "Typ ist kein akzeptierter Basis-Typ" #: py/runtime.c msgid "type object '%q' has no attribute '%q'" @@ -2713,13 +2717,13 @@ msgstr "nicht unterstützte Typen für %q: '%s', '%s'" #: py/objint.c #, c-format msgid "value must fit in %d byte(s)" -msgstr "" +msgstr "Wert muss in %d Byte(s) passen" #: shared-bindings/displayio/Bitmap.c msgid "value_count must be > 0" -msgstr "" +msgstr "value_count muss größer als 0 sein" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2806,18 +2810,36 @@ msgstr "" #~ msgid "Error in ffi_prep_cif" #~ msgstr "Fehler in ffi_prep_cif" +#~ msgid "Expected a Peripheral" +#~ msgstr "Ein Peripheriegerät wird erwartet" + #~ msgid "Failed to acquire mutex" #~ msgstr "Akquirieren des Mutex gescheitert" +#, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Hinzufügen des Characteristic ist gescheitert. Status: 0x%04x" + #~ msgid "Failed to add service" #~ msgstr "Dienst konnte nicht hinzugefügt werden" +#, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Dienst konnte nicht hinzugefügt werden. Status: 0x%04x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "Fehler beim Ändern des Softdevice-Status" + #~ msgid "Failed to connect:" #~ msgstr "Verbindung fehlgeschlagen:" #~ msgid "Failed to continue scanning" #~ msgstr "Der Scanvorgang kann nicht fortgesetzt werden" +#, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Der Scanvorgang kann nicht fortgesetzt werden. Status: 0x%04x" + #~ msgid "Failed to create mutex" #~ msgstr "Erstellen des Mutex ist fehlgeschlagen" @@ -2830,15 +2852,31 @@ msgstr "" #~ msgid "Failed to release mutex" #~ msgstr "Loslassen des Mutex gescheitert" +#, c-format +#~ msgid "Failed to set device name, err 0x%04x" +#~ msgstr "Gerätename konnte nicht gesetzt werden, Status: 0x%04x" + #~ msgid "Failed to start advertising" #~ msgstr "Kann advertisement nicht starten" +#, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Kann advertisement nicht starten. Status: 0x%04x" + +#, c-format +#~ msgid "Failed to start pairing, error 0x%04x" +#~ msgstr "Starten des Koppelns fehlgeschlagen, Status: 0x%04x" + #~ msgid "Failed to start scanning" #~ msgstr "Der Scanvorgang kann nicht gestartet werden" #~ msgid "Failed to stop advertising" #~ msgstr "Kann advertisement nicht stoppen" +#, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Kann advertisement nicht stoppen. Status: 0x%04x" + #~ msgid "Function requires lock." #~ msgstr "" #~ "Die Funktion erwartet, dass der 'lock'-Befehl zuvor ausgeführt wurde" @@ -2972,6 +3010,9 @@ msgstr "" #~ msgstr "" #~ "Speicherallozierung fehlgeschlagen, alloziere %u Bytes für nativen Code" +#~ msgid "name must be a string" +#~ msgstr "name muss ein String sein" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "Kein gültiger ADC Kanal: %d" diff --git a/locale/en_US.po b/locale/en_US.po index 652053ee99..b30e17cecc 100644 --- a/locale/en_US.po +++ b/locale/en_US.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: \n" @@ -259,6 +259,10 @@ msgstr "" msgid "All timers in use" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "" @@ -325,6 +329,11 @@ msgstr "" msgid "Brightness not adjustable" msgstr "" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -455,6 +464,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -497,7 +512,7 @@ msgstr "" msgid "Data chunk must follow fmt chunk" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "" @@ -543,10 +558,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -556,7 +567,7 @@ msgstr "" msgid "Expected a UUID" msgstr "" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -565,6 +576,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -575,8 +591,7 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "" #: ports/nrf/common-hal/_bleio/Service.c -#, c-format -msgid "Failed to add characteristic, err 0x%04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c @@ -584,11 +599,6 @@ msgstr "" msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" @@ -600,24 +610,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to discover services" msgstr "" @@ -634,7 +642,7 @@ msgstr "" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -643,8 +651,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "" @@ -664,34 +671,26 @@ msgstr "" msgid "Failed to release mutex, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c @@ -989,9 +988,8 @@ msgstr "" msgid "No such file/directory" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "" @@ -1065,6 +1063,10 @@ msgstr "" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1131,6 +1133,10 @@ msgstr "" msgid "Sample rate too high. It must be less than %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1145,11 +1151,6 @@ msgstr "" msgid "Slices not supported" msgstr "" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "" @@ -1950,7 +1951,7 @@ msgstr "" msgid "integer required" msgstr "" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2127,10 +2128,6 @@ msgstr "" msgid "name '%q' is not defined" msgstr "" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "" - #: py/runtime.c msgid "name not defined" msgstr "" @@ -2181,7 +2178,7 @@ msgstr "" msgid "no such attribute" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2663,7 +2660,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po index 1d2fcb659c..f9bb0a4002 100644 --- a/locale/en_x_pirate.po +++ b/locale/en_x_pirate.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: @sommersoft, @MrCertainly\n" @@ -261,6 +261,10 @@ msgstr "" msgid "All timers in use" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "" @@ -329,6 +333,11 @@ msgstr "" msgid "Brightness not adjustable" msgstr "" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -459,6 +468,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -501,7 +516,7 @@ msgstr "" msgid "Data chunk must follow fmt chunk" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "" @@ -547,10 +562,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -560,7 +571,7 @@ msgstr "" msgid "Expected a UUID" msgstr "" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -569,6 +580,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -579,8 +595,7 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "" #: ports/nrf/common-hal/_bleio/Service.c -#, c-format -msgid "Failed to add characteristic, err 0x%04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c @@ -588,11 +603,6 @@ msgstr "" msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" @@ -604,24 +614,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to discover services" msgstr "" @@ -638,7 +646,7 @@ msgstr "" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -647,8 +655,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "" @@ -668,34 +675,26 @@ msgstr "" msgid "Failed to release mutex, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c @@ -993,9 +992,8 @@ msgstr "" msgid "No such file/directory" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "" @@ -1069,6 +1067,10 @@ msgstr "" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1135,6 +1137,10 @@ msgstr "" msgid "Sample rate too high. It must be less than %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1149,11 +1155,6 @@ msgstr "" msgid "Slices not supported" msgstr "" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "" @@ -1954,7 +1955,7 @@ msgstr "" msgid "integer required" msgstr "" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2131,10 +2132,6 @@ msgstr "" msgid "name '%q' is not defined" msgstr "" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "" - #: py/runtime.c msgid "name not defined" msgstr "" @@ -2185,7 +2182,7 @@ msgstr "" msgid "no such attribute" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2667,7 +2664,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" diff --git a/locale/es.po b/locale/es.po index ca8593dcdf..8bcfcedbe3 100644 --- a/locale/es.po +++ b/locale/es.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-08-24 22:56-0500\n" "Last-Translator: \n" "Language-Team: \n" @@ -263,6 +263,10 @@ msgstr "Todos los timers para este pin están siendo utilizados" msgid "All timers in use" msgstr "Todos los timers en uso" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "Funcionalidad AnalogOut no soportada" @@ -333,6 +337,11 @@ msgstr "El brillo debe estar entro 0 y 255" msgid "Brightness not adjustable" msgstr "El brillo no se puede ajustar" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -463,6 +472,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "Command debe estar entre 0 y 255." +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -505,7 +520,7 @@ msgstr "El pin Data 0 debe estar alineado a bytes" msgid "Data chunk must follow fmt chunk" msgstr "Trozo de datos debe seguir fmt chunk" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "Data es muy grande para el paquete de advertisement." @@ -551,10 +566,6 @@ msgstr "Se espera un %q" msgid "Expected a Characteristic" msgstr "Se esperaba una Característica." -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -564,7 +575,7 @@ msgstr "" msgid "Expected a UUID" msgstr "Se esperaba un UUID" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -573,6 +584,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "Se esperaba un tuple de %d, se obtuvo %d" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Fallo enviando comando" @@ -583,20 +599,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "No se puede adquirir el mutex, status: 0x%08lX" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Fallo al añadir caracteristica, err: 0x%08lX" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Fallo al agregar servicio. err: 0x%02x" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Ha fallado la asignación del buffer RX" @@ -608,24 +618,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Falló la asignación del buffer RX de %d bytes" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" -msgstr "No se puede cambiar el estado del softdevice" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "No se puede iniciar el escaneo. err: 0x%02x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c #, fuzzy msgid "Failed to discover services" msgstr "No se puede descubrir servicios" @@ -643,7 +651,7 @@ msgstr "No se puede obtener el estado del softdevice" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "Error al notificar o indicar el valor del atributo, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -652,8 +660,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "No se puede leer el valor del atributo. err 0x%02x" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, fuzzy, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "Error al leer valor del atributo, err 0x%04" @@ -673,35 +680,27 @@ msgstr "Fallo al registrar el Vendor-Specific UUID, err 0x%04x" msgid "Failed to release mutex, err 0x%04x" msgstr "No se puede liberar el mutex, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "No se puede inicar el anuncio. err: 0x%04x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "No se puede iniciar el escaneo. err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "No se puede detener el anuncio. err: 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -1004,9 +1003,8 @@ msgstr "No queda espacio en el dispositivo" msgid "No such file/directory" msgstr "No existe el archivo/directorio" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "No conectado" @@ -1088,6 +1086,10 @@ msgstr "Incapaz de montar de nuevo el sistema de archivos" msgid "Pop from an empty Ps2 buffer" msgstr "Pop de un buffer Ps2 vacio" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1157,6 +1159,10 @@ msgstr "Sample rate debe ser positivo" msgid "Sample rate too high. It must be less than %d" msgstr "Frecuencia de muestreo demasiado alta. Debe ser menor a %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1171,11 +1177,6 @@ msgstr "Slice y value tienen diferentes longitudes" msgid "Slices not supported" msgstr "Rebanadas no soportadas" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Dividiendo con sub-capturas" @@ -2004,7 +2005,7 @@ msgstr "int() arg 2 debe ser >= 2 y <= 36" msgid "integer required" msgstr "Entero requerido" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2184,10 +2185,6 @@ msgstr "debe utilizar argumento de palabra clave para la función clave" msgid "name '%q' is not defined" msgstr "name '%q' no esta definido" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "name debe de ser un string" - #: py/runtime.c msgid "name not defined" msgstr "name no definido" @@ -2238,7 +2235,7 @@ msgstr "" msgid "no such attribute" msgstr "no hay tal atributo" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2728,7 +2725,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2818,10 +2815,21 @@ msgstr "paso cero" #~ msgid "Failed to acquire mutex" #~ msgstr "No se puede adquirir el mutex, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Fallo al añadir caracteristica, err: 0x%08lX" + #, fuzzy #~ msgid "Failed to add service" #~ msgstr "No se puede detener el anuncio. status: 0x%02x" +#, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Fallo al agregar servicio. err: 0x%02x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "No se puede cambiar el estado del softdevice" + #, fuzzy #~ msgid "Failed to connect:" #~ msgstr "No se puede conectar. status: 0x%02x" @@ -2830,6 +2838,10 @@ msgstr "paso cero" #~ msgid "Failed to continue scanning" #~ msgstr "No se puede iniciar el escaneo. status: 0x%02x" +#, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "No se puede iniciar el escaneo. err: 0x%02x" + #, fuzzy #~ msgid "Failed to create mutex" #~ msgstr "No se puede leer el valor del atributo. status 0x%02x" @@ -2850,6 +2862,10 @@ msgstr "paso cero" #~ msgid "Failed to start advertising" #~ msgstr "No se puede inicar el anuncio. status: 0x%02x" +#, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "No se puede inicar el anuncio. err: 0x%04x" + #, fuzzy #~ msgid "Failed to start scanning" #~ msgstr "No se puede iniciar el escaneo. status: 0x%02x" @@ -2858,6 +2874,10 @@ msgstr "paso cero" #~ msgid "Failed to stop advertising" #~ msgstr "No se puede detener el anuncio. status: 0x%02x" +#, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "No se puede detener el anuncio. err: 0x%04x" + #~ msgid "Function requires lock." #~ msgstr "La función requiere lock" @@ -2932,6 +2952,10 @@ msgstr "paso cero" #~ msgid "STA required" #~ msgstr "STA requerido" +#, c-format +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" + #~ msgid "Tile indices must be 0 - 255" #~ msgstr "Los índices de Tile deben ser 0 - 255" @@ -3027,6 +3051,9 @@ msgstr "paso cero" #~ msgstr "" #~ "falló la asignación de memoria, asignando %u bytes para código nativo" +#~ msgid "name must be a string" +#~ msgstr "name debe de ser un string" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "no es un canal ADC válido: %d" diff --git a/locale/fil.po b/locale/fil.po index 6f460c94cf..2223ee7793 100644 --- a/locale/fil.po +++ b/locale/fil.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-12-20 22:15-0800\n" "Last-Translator: Timothy \n" "Language-Team: fil\n" @@ -263,6 +263,10 @@ msgstr "Lahat ng timers para sa pin na ito ay ginagamit" msgid "All timers in use" msgstr "Lahat ng timer ginagamit" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "Hindi supportado ang AnalogOut" @@ -331,6 +335,11 @@ msgstr "Ang liwanag ay dapat sa gitna ng 0 o 255" msgid "Brightness not adjustable" msgstr "" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -464,6 +473,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "Sa gitna ng 0 o 255 dapat ang bytes." +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -507,7 +522,7 @@ msgstr "graphic ay dapat 2048 bytes ang haba" msgid "Data chunk must follow fmt chunk" msgstr "Dapat sunurin ng Data chunk ang fmt chunk" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy msgid "Data too large for advertisement packet" msgstr "Hindi makasya ang data sa loob ng advertisement packet" @@ -556,10 +571,6 @@ msgstr "Umasa ng %q" msgid "Expected a Characteristic" msgstr "Hindi mabasa and Characteristic." -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -570,7 +581,7 @@ msgstr "" msgid "Expected a UUID" msgstr "Umasa ng %q" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -579,6 +590,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -589,20 +605,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Nabigo sa pag kuha ng mutex, status: 0x%08lX" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Nabigo sa paglagay ng characteristic, status: 0x%08lX" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Hindi matagumpay ang paglagay ng service, status: 0x%08lX" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Nabigong ilaan ang RX buffer" @@ -614,25 +624,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Nabigong ilaan ang RX buffer ng %d bytes" #: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy -msgid "Failed to change softdevice state" -msgstr "Nabigo sa pagbago ng softdevice state, error: 0x%08lX" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, fuzzy, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Hindi maituloy ang pag scan, status: 0x%0xlX" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c #, fuzzy msgid "Failed to discover services" msgstr "Nabigo sa pagdiscover ng services, status: 0x%08lX" @@ -652,7 +659,7 @@ msgstr "Nabigo sa pagkuha ng softdevice state, error: 0x%08lX" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -661,8 +668,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Hindi mabasa ang value ng attribute, status: 0x%08lX" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "" @@ -682,35 +688,27 @@ msgstr "Hindi matagumpay ang paglagay ng Vender Specific UUID, status: 0x%08lX" msgid "Failed to release mutex, err 0x%04x" msgstr "Nabigo sa pagrelease ng mutex, status: 0x%08lX" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Hindi masimulaan ang advertisement, status: 0x%08lX" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Hindi masimulaan mag i-scan, status: 0x%0xlX" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Hindi mahinto ang advertisement, status: 0x%08lX" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -1013,9 +1011,8 @@ msgstr "" msgid "No such file/directory" msgstr "Walang file/directory" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c #, fuzzy msgid "Not connected" msgstr "Hindi maka connect sa AP" @@ -1094,6 +1091,10 @@ msgstr "Kasama ang kung ano pang modules na sa filesystem\n" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1164,6 +1165,10 @@ msgstr "Sample rate ay dapat positibo" msgid "Sample rate too high. It must be less than %d" msgstr "Sample rate ay masyadong mataas. Ito ay dapat hindi hiigit sa %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1178,11 +1183,6 @@ msgstr "Slice at value iba't ibang haba." msgid "Slices not supported" msgstr "Hindi suportado ang Slices" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Binibiyak gamit ang sub-captures" @@ -2016,7 +2016,7 @@ msgstr "int() arg 2 ay dapat >=2 at <= 36" msgid "integer required" msgstr "kailangan ng int" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2197,11 +2197,6 @@ msgstr "dapat gumamit ng keyword argument para sa key function" msgid "name '%q' is not defined" msgstr "name '%q' ay hindi defined" -#: shared-bindings/_bleio/Peripheral.c -#, fuzzy -msgid "name must be a string" -msgstr "ang keywords dapat strings" - #: py/runtime.c msgid "name not defined" msgstr "name hindi na define" @@ -2252,7 +2247,7 @@ msgstr "" msgid "no such attribute" msgstr "walang ganoon na attribute" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2741,7 +2736,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2825,10 +2820,22 @@ msgstr "zero step" #~ msgid "Failed to acquire mutex" #~ msgstr "Nabigo sa pag kuha ng mutex, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Nabigo sa paglagay ng characteristic, status: 0x%08lX" + #, fuzzy #~ msgid "Failed to add service" #~ msgstr "Hindi matagumpay ang paglagay ng service, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Hindi matagumpay ang paglagay ng service, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Nabigo sa pagbago ng softdevice state, error: 0x%08lX" + #, fuzzy #~ msgid "Failed to connect:" #~ msgstr "Hindi makaconnect, status: 0x%08lX" @@ -2837,6 +2844,10 @@ msgstr "zero step" #~ msgid "Failed to continue scanning" #~ msgstr "Hindi maituloy ang pag scan, status: 0x%0xlX" +#, fuzzy, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Hindi maituloy ang pag scan, status: 0x%0xlX" + #, fuzzy #~ msgid "Failed to create mutex" #~ msgstr "Hindi matagumpay ang pagbuo ng mutex, status: 0x%0xlX" @@ -2857,6 +2868,10 @@ msgstr "zero step" #~ msgid "Failed to start advertising" #~ msgstr "Hindi masimulaan ang advertisement, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Hindi masimulaan ang advertisement, status: 0x%08lX" + #, fuzzy #~ msgid "Failed to start scanning" #~ msgstr "Hindi masimulaan mag i-scan, status: 0x%0xlX" @@ -2865,6 +2880,10 @@ msgstr "zero step" #~ msgid "Failed to stop advertising" #~ msgstr "Hindi mahinto ang advertisement, status: 0x%08lX" +#, fuzzy, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Hindi mahinto ang advertisement, status: 0x%08lX" + #~ msgid "Function requires lock." #~ msgstr "Kailangan ng lock ang function." @@ -3010,6 +3029,10 @@ msgstr "zero step" #~ msgstr "" #~ "nabigo ang paglalaan ng memorya, naglalaan ng %u bytes para sa native code" +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "ang keywords dapat strings" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "hindi tamang ADC Channel: %d" diff --git a/locale/fr.po b/locale/fr.po index c176fd8bcf..9136376758 100644 --- a/locale/fr.po +++ b/locale/fr.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: 0.1\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2019-04-14 20:05+0100\n" "Last-Translator: Pierrick Couturier \n" "Language-Team: fr\n" @@ -266,6 +266,10 @@ msgstr "Tous les timers pour cette broche sont utilisés" msgid "All timers in use" msgstr "Tous les timers sont utilisés" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "Fonctionnalité AnalogOut non supportée" @@ -336,6 +340,11 @@ msgstr "La luminosité doit être entre 0 et 255" msgid "Brightness not adjustable" msgstr "Luminosité non-ajustable" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -470,6 +479,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "La commande doit être un entier entre 0 et 255" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -513,7 +528,7 @@ msgstr "La broche 'Data 0' doit être aligné sur l'octet" msgid "Data chunk must follow fmt chunk" msgstr "Un bloc de données doit suivre un bloc de format" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "Données trop volumineuses pour un paquet de diffusion" @@ -560,10 +575,6 @@ msgstr "Attendu un %q" msgid "Expected a Characteristic" msgstr "Une 'Characteristic' est attendue" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -574,7 +585,7 @@ msgstr "" msgid "Expected a UUID" msgstr "Un UUID est attendu" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -583,6 +594,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "Tuple de longueur %d attendu, obtenu %d" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -593,20 +609,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Echec de l'obtention de mutex, err 0x%04x" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Echec de l'ajout de caractéristique, err 0x%04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Echec de l'ajout de service, err 0x%04x" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Echec de l'allocation du tampon RX" @@ -618,25 +628,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Echec de l'allocation de %d octets du tampon RX" #: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy -msgid "Failed to change softdevice state" -msgstr "Echec de la modification de l'état du périphérique" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, fuzzy, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Impossible de poursuivre le scan, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c #, fuzzy msgid "Failed to discover services" msgstr "Echec de la découverte de services" @@ -657,7 +664,7 @@ msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" "Impossible de notifier ou d'indiquer la valeur de l'attribut, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -666,8 +673,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Impossible de lire la valeur 'CCCD', err 0x%04x" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "Impossible de lire la valeur de l'attribut, err 0x%04x" @@ -687,35 +693,27 @@ msgstr "Echec de l'ajout de l'UUID du fournisseur, err 0x%04x" msgid "Failed to release mutex, err 0x%04x" msgstr "Impossible de libérer mutex, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Impossible de commencer à diffuser, err 0x%04x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Impossible de commencer à scanner, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Echec de l'arrêt de diffusion, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -1022,9 +1020,8 @@ msgstr "Il n'y a plus d'espace libre sur le périphérique" msgid "No such file/directory" msgstr "Fichier/dossier introuvable" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c #, fuzzy msgid "Not connected" msgstr "Non connecté" @@ -1111,6 +1108,10 @@ msgstr "Ainsi que tout autre module présent sur le système de fichiers\n" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "Appuyez sur une touche pour entrer sur REPL ou CTRL-D pour recharger." @@ -1180,6 +1181,10 @@ msgstr "Le taux d'échantillonage doit être positif" msgid "Sample rate too high. It must be less than %d" msgstr "Taux d'échantillonage trop élevé. Doit être inf. à %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1194,11 +1199,6 @@ msgstr "Tranche et valeur de tailles différentes" msgid "Slices not supported" msgstr "Tranches non supportées" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "Assertion en mode 'soft-device', id: 0x%08lX, pc: 0x%08lX" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Fractionnement avec des sous-captures" @@ -2048,7 +2048,7 @@ msgstr "l'argument 2 de int() doit être >=2 et <=36" msgid "integer required" msgstr "entier requis" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2229,11 +2229,6 @@ msgstr "doit utiliser un argument nommé pour une fonction key" msgid "name '%q' is not defined" msgstr "nom '%q' non défini" -#: shared-bindings/_bleio/Peripheral.c -#, fuzzy -msgid "name must be a string" -msgstr "les noms doivent être des chaînes de caractère" - #: py/runtime.c msgid "name not defined" msgstr "nom non défini" @@ -2285,7 +2280,7 @@ msgstr "" msgid "no such attribute" msgstr "pas de tel attribut" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2783,7 +2778,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "'value_count' doit être > 0" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2873,10 +2868,22 @@ msgstr "'step' nul" #~ msgid "Failed to acquire mutex" #~ msgstr "Echec de l'obtention de mutex" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Echec de l'ajout de caractéristique, err 0x%04x" + #, fuzzy #~ msgid "Failed to add service" #~ msgstr "Echec de l'ajout de service" +#, fuzzy, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Echec de l'ajout de service, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Echec de la modification de l'état du périphérique" + #, fuzzy #~ msgid "Failed to connect:" #~ msgstr "Echec de connection:" @@ -2885,6 +2892,10 @@ msgstr "'step' nul" #~ msgid "Failed to continue scanning" #~ msgstr "Impossible de poursuivre le scan" +#, fuzzy, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Impossible de poursuivre le scan, err 0x%04x" + #, fuzzy #~ msgid "Failed to create mutex" #~ msgstr "Echec de la création de mutex" @@ -2905,6 +2916,10 @@ msgstr "'step' nul" #~ msgid "Failed to start advertising" #~ msgstr "Echec du démarrage de la diffusion" +#, fuzzy, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Impossible de commencer à diffuser, err 0x%04x" + #, fuzzy #~ msgid "Failed to start scanning" #~ msgstr "Impossible de commencer à scanner" @@ -2913,6 +2928,10 @@ msgstr "'step' nul" #~ msgid "Failed to stop advertising" #~ msgstr "Echec de l'arrêt de diffusion" +#, fuzzy, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Echec de l'arrêt de diffusion, err 0x%04x" + #~ msgid "Function requires lock." #~ msgstr "La fonction nécessite un verrou." @@ -2984,6 +3003,10 @@ msgstr "'step' nul" #~ msgid "STA required" #~ msgstr "'STA' requis" +#, c-format +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Assertion en mode 'soft-device', id: 0x%08lX, pc: 0x%08lX" + #~ msgid "Tile indices must be 0 - 255" #~ msgstr "Les indices des tuiles doivent être compris entre 0 et 255 " @@ -3077,6 +3100,10 @@ msgstr "'step' nul" #~ msgstr "" #~ "l'allocation de mémoire a échoué en allouant %u octets pour un code natif" +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "les noms doivent être des chaînes de caractère" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "canal ADC non valide : %d" diff --git a/locale/it_IT.po b/locale/it_IT.po index 883c65d41f..d4035fdf09 100644 --- a/locale/it_IT.po +++ b/locale/it_IT.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-10-02 16:27+0200\n" "Last-Translator: Enrico Paganin \n" "Language-Team: \n" @@ -262,6 +262,10 @@ msgstr "Tutti i timer per questo pin sono in uso" msgid "All timers in use" msgstr "Tutti i timer utilizzati" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "funzionalità AnalogOut non supportata" @@ -331,6 +335,11 @@ msgstr "La luminosità deve essere compreso tra 0 e 255" msgid "Brightness not adjustable" msgstr "Illiminazione non è regolabile" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -465,6 +474,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "I byte devono essere compresi tra 0 e 255" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -508,7 +523,7 @@ msgstr "graphic deve essere lunga 2048 byte" msgid "Data chunk must follow fmt chunk" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy msgid "Data too large for advertisement packet" msgstr "Impossibile inserire dati nel pacchetto di advertisement." @@ -556,10 +571,6 @@ msgstr "Atteso un %q" msgid "Expected a Characteristic" msgstr "Non è possibile aggiungere Characteristic." -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -570,7 +581,7 @@ msgstr "" msgid "Expected a UUID" msgstr "Atteso un %q" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -579,6 +590,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -589,20 +605,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Impossibile fermare advertisement. status: 0x%02x" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Impossibile fermare advertisement. status: 0x%02x" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Impossibile allocare buffer RX" @@ -614,25 +624,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Fallita allocazione del buffer RX di %d byte" #: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy -msgid "Failed to change softdevice state" -msgstr "Impossibile fermare advertisement. status: 0x%02x" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, fuzzy, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Impossible iniziare la scansione. status: 0x%02x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c #, fuzzy msgid "Failed to discover services" msgstr "Impossibile fermare advertisement. status: 0x%02x" @@ -651,7 +658,7 @@ msgstr "Impossibile fermare advertisement. status: 0x%02x" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "Notificamento o indicazione di attribute value fallito, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -660,8 +667,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "Tentative leggere attribute value fallito, err 0x%04x" @@ -681,35 +687,27 @@ msgstr "Non è possibile aggiungere l'UUID del vendor specifico da 128-bit" msgid "Failed to release mutex, err 0x%04x" msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Impossibile avviare advertisement. status: 0x%02x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Impossible iniziare la scansione. status: 0x%02x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Impossibile fermare advertisement. status: 0x%02x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -1012,9 +1010,8 @@ msgstr "Non che spazio sul dispositivo" msgid "No such file/directory" msgstr "Nessun file/directory esistente" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c #, fuzzy msgid "Not connected" msgstr "Impossible connettersi all'AP" @@ -1099,6 +1096,10 @@ msgstr "Imposssibile rimontare il filesystem" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1170,6 +1171,10 @@ msgid "Sample rate too high. It must be less than %d" msgstr "" "Frequenza di campionamento troppo alta. Il valore deve essere inferiore a %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1184,11 +1189,6 @@ msgstr "" msgid "Slices not supported" msgstr "Slice non supportate" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Suddivisione con sotto-catture" @@ -2008,7 +2008,7 @@ msgstr "il secondo argomanto di int() deve essere >= 2 e <= 36" msgid "integer required" msgstr "intero richiesto" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2190,11 +2190,6 @@ msgstr "" msgid "name '%q' is not defined" msgstr "nome '%q'non definito" -#: shared-bindings/_bleio/Peripheral.c -#, fuzzy -msgid "name must be a string" -msgstr "argomenti nominati devono essere stringhe" - #: py/runtime.c msgid "name not defined" msgstr "nome non definito" @@ -2246,7 +2241,7 @@ msgstr "" msgid "no such attribute" msgstr "attributo inesistente" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2739,7 +2734,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2829,10 +2824,22 @@ msgstr "zero step" #~ msgid "Failed to acquire mutex" #~ msgstr "Impossibile allocare buffer RX" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + #, fuzzy #~ msgid "Failed to add service" #~ msgstr "Impossibile fermare advertisement. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + #, fuzzy #~ msgid "Failed to connect:" #~ msgstr "Impossibile connettersi. status: 0x%02x" @@ -2841,6 +2848,10 @@ msgstr "zero step" #~ msgid "Failed to continue scanning" #~ msgstr "Impossible iniziare la scansione. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Impossible iniziare la scansione. status: 0x%02x" + #, fuzzy #~ msgid "Failed to create mutex" #~ msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" @@ -2861,6 +2872,10 @@ msgstr "zero step" #~ msgid "Failed to start advertising" #~ msgstr "Impossibile avviare advertisement. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Impossibile avviare advertisement. status: 0x%02x" + #, fuzzy #~ msgid "Failed to start scanning" #~ msgstr "Impossible iniziare la scansione. status: 0x%02x" @@ -2869,6 +2884,10 @@ msgstr "zero step" #~ msgid "Failed to stop advertising" #~ msgstr "Impossibile fermare advertisement. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 non supporta pull-up" @@ -3008,6 +3027,10 @@ msgstr "zero step" #~ msgstr "" #~ "allocazione di memoria fallita, allocazione di %d byte per codice nativo" +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "argomenti nominati devono essere stringhe" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "canale ADC non valido: %d" diff --git a/locale/pl.po b/locale/pl.po index 9ed76924b5..0edc5906e8 100644 --- a/locale/pl.po +++ b/locale/pl.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2019-03-19 18:37-0700\n" "Last-Translator: Radomir Dopieralski \n" "Language-Team: pl\n" @@ -260,6 +260,10 @@ msgstr "Wszystkie timery tej nóżki w użyciu" msgid "All timers in use" msgstr "Wszystkie timery w użyciu" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "AnalogOut jest niewspierane" @@ -328,6 +332,11 @@ msgstr "Jasność musi być pomiędzy 0 a 255" msgid "Brightness not adjustable" msgstr "Jasność nie jest regulowana" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -458,6 +467,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "Komenda musi być int pomiędzy 0 a 255" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -500,7 +515,7 @@ msgstr "Nóżka data 0 musi być wyrównana do bajtu" msgid "Data chunk must follow fmt chunk" msgstr "Fragment danych musi następować po fragmencie fmt" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "Zbyt dużo danych pakietu rozgłoszeniowego" @@ -546,10 +561,6 @@ msgstr "Oczekiwano %q" msgid "Expected a Characteristic" msgstr "Oczekiwano charakterystyki" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -559,7 +570,7 @@ msgstr "" msgid "Expected a UUID" msgstr "Oczekiwano UUID" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -568,6 +579,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "Oczekiwano krotkę długości %d, otrzymano %d" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -578,20 +594,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Nie udało się uzyskać blokady, błąd 0x$04x" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Nie udało się dodać charakterystyki, błąd 0x$04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Nie udało się dodać serwisu, błąd 0x%04x" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Nie udała się alokacja bufora RX" @@ -603,24 +613,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Nie udała się alokacja %d bajtów na bufor RX" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" -msgstr "Nie udało się zmienić stanu softdevice" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Nie udała się kontynuacja skanowania, błąd 0x%04x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to discover services" msgstr "Nie udało się odkryć serwisów" @@ -637,7 +645,7 @@ msgstr "Nie udało się odczytać stanu softdevice" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "Nie udało się powiadomić o wartości atrybutu, błąd 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -646,8 +654,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Nie udało się odczytać CCCD, błąd 0x%04x" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "Nie udało się odczytać wartości atrybutu, błąd 0x%04x" @@ -667,35 +674,27 @@ msgstr "Nie udało się zarejestrować UUID dostawcy, błąd 0x%04x" msgid "Failed to release mutex, err 0x%04x" msgstr "Nie udało się zwolnić blokady, błąd 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Nie udało się rozpocząć rozgłaszania, błąd 0x%04x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Nie udało się rozpocząć skanowania, błąd 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Nie udało się zatrzymać rozgłaszania, błąd 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -999,9 +998,8 @@ msgstr "Brak miejsca" msgid "No such file/directory" msgstr "Brak pliku/katalogu" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "Nie podłączono" @@ -1075,6 +1073,10 @@ msgstr "Oraz moduły w systemie plików\n" msgid "Pop from an empty Ps2 buffer" msgstr "" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "Dowolny klawisz aby uruchomić konsolę. CTRL-D aby przeładować." @@ -1141,6 +1143,10 @@ msgstr "Częstotliwość próbkowania musi być dodatnia" msgid "Sample rate too high. It must be less than %d" msgstr "Zbyt wysoka częstotliwość próbkowania. Musi być mniejsza niż %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1155,11 +1161,6 @@ msgstr "Fragment i wartość są różnych długości." msgid "Slices not supported" msgstr "Fragmenty nieobsługiwane" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Podział z podgrupami" @@ -1975,7 +1976,7 @@ msgstr "argument 2 do int() busi być pomiędzy 2 a 36" msgid "integer required" msgstr "wymagana liczba całkowita" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2152,10 +2153,6 @@ msgstr "funkcja key musi być podana jako argument nazwany" msgid "name '%q' is not defined" msgstr "nazwa '%q' niezdefiniowana" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "nazwa musi być łańcuchem" - #: py/runtime.c msgid "name not defined" msgstr "nazwa niezdefiniowana" @@ -2206,7 +2203,7 @@ msgstr "" msgid "no such attribute" msgstr "nie ma takiego atrybutu" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2690,7 +2687,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "value_count musi być > 0" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2749,15 +2746,30 @@ msgstr "zerowy krok" #~ msgid "Failed to acquire mutex" #~ msgstr "Nie udało się uzyskać blokady" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Nie udało się dodać charakterystyki, błąd 0x$04x" + #~ msgid "Failed to add service" #~ msgstr "Nie udało się dodać serwisu" +#, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Nie udało się dodać serwisu, błąd 0x%04x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "Nie udało się zmienić stanu softdevice" + #~ msgid "Failed to connect:" #~ msgstr "Nie udało się połączenie:" #~ msgid "Failed to continue scanning" #~ msgstr "Nie udała się kontynuacja skanowania" +#, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Nie udała się kontynuacja skanowania, błąd 0x%04x" + #~ msgid "Failed to create mutex" #~ msgstr "Nie udało się stworzyć blokady" @@ -2767,12 +2779,20 @@ msgstr "zerowy krok" #~ msgid "Failed to start advertising" #~ msgstr "Nie udało się rozpocząć rozgłaszania" +#, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Nie udało się rozpocząć rozgłaszania, błąd 0x%04x" + #~ msgid "Failed to start scanning" #~ msgstr "Nie udało się rozpocząć skanowania" #~ msgid "Failed to stop advertising" #~ msgstr "Nie udało się zatrzymać rozgłaszania" +#, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Nie udało się zatrzymać rozgłaszania, błąd 0x%04x" + #~ msgid "Invalid bit clock pin" #~ msgstr "Zła nóżka zegara" @@ -2790,6 +2810,10 @@ msgstr "zerowy krok" #~ "bpp given" #~ msgstr "Wspierane są tylko pliki BMP czarno-białe, 8bpp i 16bpp: %d bpp " +#, c-format +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" + #~ msgid "Tile indices must be 0 - 255" #~ msgstr "Indeks kafelka musi być pomiędzy 0 a 255 włącznie" @@ -2809,6 +2833,9 @@ msgstr "zerowy krok" #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "przedział poza zakresem 0.0020 do 10.24" +#~ msgid "name must be a string" +#~ msgstr "nazwa musi być łańcuchem" + #~ msgid "services includes an object that is not a Service" #~ msgstr "obiekt typu innego niż Service w services" diff --git a/locale/pt_BR.po b/locale/pt_BR.po index a17a275390..b5cd24405a 100644 --- a/locale/pt_BR.po +++ b/locale/pt_BR.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2018-10-02 21:14-0000\n" "Last-Translator: \n" "Language-Team: \n" @@ -262,6 +262,10 @@ msgstr "Todos os temporizadores para este pino estão em uso" msgid "All timers in use" msgstr "Todos os temporizadores em uso" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "Funcionalidade AnalogOut não suportada" @@ -328,6 +332,11 @@ msgstr "O brilho deve estar entre 0 e 255" msgid "Brightness not adjustable" msgstr "" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -461,6 +470,12 @@ msgstr "" msgid "Command must be an int between 0 and 255" msgstr "Os bytes devem estar entre 0 e 255." +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "" @@ -503,7 +518,7 @@ msgstr "" msgid "Data chunk must follow fmt chunk" msgstr "Pedaço de dados deve seguir o pedaço de cortes" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy msgid "Data too large for advertisement packet" msgstr "Não é possível ajustar dados no pacote de anúncios." @@ -551,10 +566,6 @@ msgstr "Esperado um" msgid "Expected a Characteristic" msgstr "Não é possível adicionar Característica." -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -565,7 +576,7 @@ msgstr "" msgid "Expected a UUID" msgstr "Esperado um" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "" @@ -574,6 +585,11 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Falha ao enviar comando." @@ -584,20 +600,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Não é possível ler o valor do atributo. status: 0x%02x" #: ports/nrf/common-hal/_bleio/Service.c -#, fuzzy, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Não pode parar propaganda. status: 0x%02x" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Não pode parar propaganda. status: 0x%02x" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Falha ao alocar buffer RX" @@ -609,25 +619,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Falha ao alocar buffer RX de %d bytes" #: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy -msgid "Failed to change softdevice state" -msgstr "Não pode parar propaganda. status: 0x%02x" - -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" +msgid "Failed to change softdevice state, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, fuzzy, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Não é possível iniciar o anúncio. status: 0x%02x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c #, fuzzy msgid "Failed to discover services" msgstr "Não pode parar propaganda. status: 0x%02x" @@ -646,7 +653,7 @@ msgstr "Não pode parar propaganda. status: 0x%02x" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "" @@ -655,8 +662,7 @@ msgstr "" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Não é possível ler o valor do atributo. status: 0x%02x" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "" @@ -676,35 +682,27 @@ msgstr "Não é possível adicionar o UUID de 128 bits específico do fornecedor msgid "Failed to release mutex, err 0x%04x" msgstr "Não é possível ler o valor do atributo. status: 0x%02x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Não é possível iniciar o anúncio. status: 0x%02x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Não é possível iniciar o anúncio. status: 0x%02x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, fuzzy, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Não pode parar propaganda. status: 0x%02x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -1004,9 +1002,8 @@ msgstr "" msgid "No such file/directory" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c #, fuzzy msgid "Not connected" msgstr "Não é possível conectar-se ao AP" @@ -1084,6 +1081,10 @@ msgstr "Não é possível remontar o sistema de arquivos" msgid "Pop from an empty Ps2 buffer" msgstr "Buffer Ps2 vazio" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" @@ -1151,6 +1152,10 @@ msgstr "" msgid "Sample rate too high. It must be less than %d" msgstr "Taxa de amostragem muito alta. Deve ser menor que %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1165,11 +1170,6 @@ msgstr "" msgid "Slices not supported" msgstr "" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "" @@ -1975,7 +1975,7 @@ msgstr "" msgid "integer required" msgstr "inteiro requerido" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "" @@ -2152,11 +2152,6 @@ msgstr "" msgid "name '%q' is not defined" msgstr "" -#: shared-bindings/_bleio/Peripheral.c -#, fuzzy -msgid "name must be a string" -msgstr "heap deve ser uma lista" - #: py/runtime.c msgid "name not defined" msgstr "nome não definido" @@ -2207,7 +2202,7 @@ msgstr "" msgid "no such attribute" msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "" @@ -2692,7 +2687,7 @@ msgstr "" msgid "value_count must be > 0" msgstr "" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -2759,10 +2754,26 @@ msgstr "passo zero" #~ msgid "Failed to acquire mutex" #~ msgstr "Falha ao alocar buffer RX" +#, fuzzy, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + #, fuzzy #~ msgid "Failed to add service" #~ msgstr "Não pode parar propaganda. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + #, fuzzy #~ msgid "Failed to create mutex" #~ msgstr "Não é possível ler o valor do atributo. status: 0x%02x" @@ -2783,6 +2794,10 @@ msgstr "passo zero" #~ msgid "Failed to start advertising" #~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + #, fuzzy #~ msgid "Failed to start scanning" #~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" @@ -2791,6 +2806,10 @@ msgstr "passo zero" #~ msgid "Failed to stop advertising" #~ msgstr "Não pode parar propaganda. status: 0x%02x" +#, fuzzy, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 não suporta pull up." @@ -2921,6 +2940,10 @@ msgstr "passo zero" #~ msgid "memory allocation failed, allocating %u bytes for native code" #~ msgstr "alocação de memória falhou, alocando %u bytes para código nativo" +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "heap deve ser uma lista" + #~ msgid "not a valid ADC Channel: %d" #~ msgstr "não é um canal ADC válido: %d" diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po index d5df0b7b0c..dfd7e8b0db 100644 --- a/locale/zh_Latn_pinyin.po +++ b/locale/zh_Latn_pinyin.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: circuitpython-cn\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2019-09-08 17:30-0500\n" +"POT-Creation-Date: 2019-10-21 19:50-0700\n" "PO-Revision-Date: 2019-04-13 10:10-0700\n" "Last-Translator: hexthat\n" "Language-Team: Chinese Hanyu Pinyin\n" @@ -261,6 +261,10 @@ msgstr "Cǐ yǐn jiǎo de suǒyǒu jìshí qì zhèngzài shǐyòng" msgid "All timers in use" msgstr "Suǒyǒu jìshí qì shǐyòng" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + #: ports/nrf/common-hal/analogio/AnalogOut.c msgid "AnalogOut functionality not supported" msgstr "Bù zhīchí AnalogOut gōngnéng" @@ -329,6 +333,11 @@ msgstr "Liàngdù bìxū jiè yú 0 dào 255 zhī jiān" msgid "Brightness not adjustable" msgstr "Liàngdù wúfǎ tiáozhěng" +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." @@ -459,6 +468,12 @@ msgstr "Mìnglìng bìxū wèi 0-255" msgid "Command must be an int between 0 and 255" msgstr "Mìnglìng bìxū shì 0 dào 255 zhī jiān de int" +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + #: py/persistentcode.c msgid "Corrupt .mpy file" msgstr "Fǔbài de .mpy wénjiàn" @@ -501,7 +516,7 @@ msgstr "Shùjù 0 de yǐn jiǎo bìxū shì zì jié duìqí" msgid "Data chunk must follow fmt chunk" msgstr "Shùjù kuài bìxū zūnxún fmt qū kuài" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Data too large for advertisement packet" msgstr "Guǎnggào bāo de shùjù tài dà" @@ -547,10 +562,6 @@ msgstr "Yùqí %q" msgid "Expected a Characteristic" msgstr "Yùqí de tèdiǎn" -#: shared-bindings/_bleio/Service.c -msgid "Expected a Peripheral" -msgstr "Qídài yīgè wàiwéi shèbèi" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "Yùqí fúwù" @@ -560,7 +571,7 @@ msgstr "Yùqí fúwù" msgid "Expected a UUID" msgstr "Yùqí UUID" -#: shared-bindings/_bleio/Central.c +#: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" msgstr "Qídài yīgè dìzhǐ" @@ -569,6 +580,11 @@ msgstr "Qídài yīgè dìzhǐ" msgid "Expected tuple of length %d, got %d" msgstr "Qīwàng de chángdù wèi %d de yuán zǔ, dédào %d" +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Failed initiate attribute read, err 0x%04x" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Fāsòng mìnglìng shībài." @@ -579,20 +595,14 @@ msgid "Failed to acquire mutex, err 0x%04x" msgstr "Wúfǎ huòdé mutex, err 0x%04x" #: ports/nrf/common-hal/_bleio/Service.c -#, c-format -msgid "Failed to add characteristic, err 0x%04x" -msgstr "Tiānjiā tèxìng shībài, err 0x%04x" +msgid "Failed to add characteristic, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format msgid "Failed to add descriptor, err 0x%04x" msgstr "Wúfǎ tiānjiā miáoshù fú, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to add service, err 0x%04x" -msgstr "Tiānjiā fúwù shībài, err 0x%04x" - #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Fēnpèi RX huǎnchōng shībài" @@ -604,24 +614,22 @@ msgid "Failed to allocate RX buffer of %d bytes" msgstr "Fēnpèi RX huǎnchōng qū%d zì jié shībài" #: ports/nrf/common-hal/_bleio/Adapter.c -msgid "Failed to change softdevice state" -msgstr "Gēnggǎi ruǎn shèbèi zhuàngtài shībài" +msgid "Failed to change softdevice state, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to configure advertising, err 0x%04x" -msgstr "Wúfǎ pèizhì guǎnggào, cuòwù 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" msgstr "Liánjiē shībài: Chāoshí" -#: ports/nrf/common-hal/_bleio/Scanner.c -#, c-format -msgid "Failed to continue scanning, err 0x%04x" -msgstr "Jìxù sǎomiáo shībài, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Service.c +msgid "Failed to create service, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to discover services" msgstr "Fāxiàn fúwù shībài" @@ -638,7 +646,7 @@ msgstr "Wúfǎ huòdé ruǎnjiàn shèbèi zhuàngtài" msgid "Failed to notify or indicate attribute value, err 0x%04x" msgstr "Wúfǎ tōngzhī huò xiǎnshì shǔxìng zhí, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "Failed to pair" msgstr "Pèiduì shībài" @@ -647,8 +655,7 @@ msgstr "Pèiduì shībài" msgid "Failed to read CCCD value, err 0x%04x" msgstr "Dòu qǔ CCCD zhí, err 0x%04x shībài" -#: ports/nrf/common-hal/_bleio/Characteristic.c -#: ports/nrf/common-hal/_bleio/Descriptor.c +#: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Failed to read attribute value, err 0x%04x" msgstr "Dòu qǔ shǔxìng zhí shībài, err 0x%04x" @@ -668,35 +675,27 @@ msgstr "Wúfǎ zhùcè màizhǔ tèdìng de UUID, err 0x%04x" msgid "Failed to release mutex, err 0x%04x" msgstr "Wúfǎ shìfàng mutex, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to set device name, err 0x%04x" -msgstr "Wúfǎ shèzhì shèbèi míngchēng, cuòwù 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to start advertising, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start advertising, err 0x%04x" -msgstr "Qǐdòng guǎnggào shībài, err 0x%04x" - -#: ports/nrf/common-hal/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start connecting, error 0x%04x" msgstr "Wúfǎ kāishǐ liánjiē, cuòwù 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to start pairing, error 0x%04x" -msgstr "Wúfǎ kāishǐ pèiduì, cuòwù 0x%04x" +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "Failed to start pairing, NRF_ERROR_%q" +msgstr "" -#: ports/nrf/common-hal/_bleio/Scanner.c +#: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Failed to start scanning, err 0x%04x" msgstr "Qǐdòng sǎomiáo shībài, err 0x%04x" -#: ports/nrf/common-hal/_bleio/Peripheral.c -#, c-format -msgid "Failed to stop advertising, err 0x%04x" -msgstr "Wúfǎ tíngzhǐ guǎnggào, err 0x%04x" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to stop advertising, NRF_ERROR_%q" +msgstr "" #: ports/nrf/common-hal/_bleio/Characteristic.c #, c-format @@ -999,9 +998,8 @@ msgstr "Shèbèi shàng méiyǒu kònggé" msgid "No such file/directory" msgstr "Méiyǒu cǐ lèi wénjiàn/mùlù" -#: ports/nrf/common-hal/_bleio/__init__.c shared-bindings/_bleio/Central.c +#: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Peripheral.c msgid "Not connected" msgstr "Wèi liánjiē" @@ -1079,6 +1077,10 @@ msgstr "Zài wénjiàn xìtǒng shàng tiānjiā rènhé mókuài\n" msgid "Pop from an empty Ps2 buffer" msgstr "Cóng kōng de Ps2 huǎnchōng qū dànchū" +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "Àn xià rènhé jiàn jìnrù REPL. Shǐyòng CTRL-D chóngxīn jiāzài." @@ -1145,6 +1147,10 @@ msgstr "Cǎiyàng lǜ bìxū wèi zhèng shù" msgid "Sample rate too high. It must be less than %d" msgstr "Cǎiyàng lǜ tài gāo. Tā bìxū xiǎoyú %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Serializer in use" @@ -1159,11 +1165,6 @@ msgstr "Qiēpiàn hé zhí bùtóng chángdù." msgid "Slices not supported" msgstr "Qiēpiàn bù shòu zhīchí" -#: ports/nrf/common-hal/_bleio/Adapter.c -#, c-format -msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" -msgstr "Ruǎn shèbèi wéihù, id: 0X%08lX, pc: 0X%08lX" - #: extmod/modure.c msgid "Splitting with sub-captures" msgstr "Yǔ zi bǔhuò fēnliè" @@ -1986,7 +1987,7 @@ msgstr "zhěngshù() cānshù 2 bìxū > = 2 qiě <= 36" msgid "integer required" msgstr "xūyào zhěngshù" -#: shared-bindings/_bleio/Peripheral.c shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" msgstr "Jiàngé bìxū zài %s-%s fànwéi nèi" @@ -2164,10 +2165,6 @@ msgstr "bìxū shǐyòng guānjiàn cí cānshù" msgid "name '%q' is not defined" msgstr "míngchēng '%q' wèi dìngyì" -#: shared-bindings/_bleio/Peripheral.c -msgid "name must be a string" -msgstr "míngchēng bìxū shì yīgè zìfú chuàn" - #: py/runtime.c msgid "name not defined" msgstr "míngchēng wèi dìngyì" @@ -2219,7 +2216,7 @@ msgstr "Méiyǒu kěyòng de fùwèi yǐn jiǎo" msgid "no such attribute" msgstr "méiyǒu cǐ shǔxìng" -#: ports/nrf/common-hal/_bleio/__init__.c +#: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" msgstr "Zài service_uuids bái míngdān zhōng zhǎodào fēi UUID" @@ -2703,7 +2700,7 @@ msgstr "Zhí bìxū fúhé %d zì jié" msgid "value_count must be > 0" msgstr "zhí jìshù bìxū wèi > 0" -#: shared-bindings/_bleio/Scanner.c +#: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "Chuāngkǒu bìxū shì <= jiàngé" @@ -2762,33 +2759,71 @@ msgstr "líng bù" #~ msgid "Data too large for the advertisement packet" #~ msgstr "Guǎnggào bāo de shùjù tài dà" +#~ msgid "Expected a Peripheral" +#~ msgstr "Qídài yīgè wàiwéi shèbèi" + #~ msgid "Failed to acquire mutex" #~ msgstr "Wúfǎ huòdé mutex" +#, c-format +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Tiānjiā tèxìng shībài, err 0x%04x" + #~ msgid "Failed to add service" #~ msgstr "Tiānjiā fúwù shībài" +#, c-format +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Tiānjiā fúwù shībài, err 0x%04x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "Gēnggǎi ruǎn shèbèi zhuàngtài shībài" + +#, c-format +#~ msgid "Failed to configure advertising, err 0x%04x" +#~ msgstr "Wúfǎ pèizhì guǎnggào, cuòwù 0x%04x" + #~ msgid "Failed to connect:" #~ msgstr "Liánjiē shībài:" #~ msgid "Failed to continue scanning" #~ msgstr "Jìxù sǎomiáo shībài" +#, c-format +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Jìxù sǎomiáo shībài, err 0x%04x" + #~ msgid "Failed to create mutex" #~ msgstr "Wúfǎ chuàngjiàn hù chì suǒ" #~ msgid "Failed to release mutex" #~ msgstr "Wúfǎ shìfàng mutex" +#, c-format +#~ msgid "Failed to set device name, err 0x%04x" +#~ msgstr "Wúfǎ shèzhì shèbèi míngchēng, cuòwù 0x%04x" + #~ msgid "Failed to start advertising" #~ msgstr "Qǐdòng guǎnggào shībài" +#, c-format +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Qǐdòng guǎnggào shībài, err 0x%04x" + +#, c-format +#~ msgid "Failed to start pairing, error 0x%04x" +#~ msgstr "Wúfǎ kāishǐ pèiduì, cuòwù 0x%04x" + #~ msgid "Failed to start scanning" #~ msgstr "Qǐdòng sǎomiáo shībài" #~ msgid "Failed to stop advertising" #~ msgstr "Wúfǎ tíngzhǐ guǎnggào" +#, c-format +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Wúfǎ tíngzhǐ guǎnggào, err 0x%04x" + #~ msgid "Invalid bit clock pin" #~ msgstr "Wúxiào de wèi shízhōng yǐn jiǎo" @@ -2819,6 +2854,10 @@ msgstr "líng bù" #~ msgstr "" #~ "Jǐn zhīchí dān sè, suǒyǐn 8bpp hé 16bpp huò gèng dà de BMP: %d bpp tígōng" +#, c-format +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Ruǎn shèbèi wéihù, id: 0X%08lX, pc: 0X%08lX" + #~ msgid "Tile indices must be 0 - 255" #~ msgstr "Píng pū zhǐshù bìxū wèi 0 - 255" @@ -2840,6 +2879,9 @@ msgstr "líng bù" #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "jùlí 0.0020 Zhì 10.24 Zhī jiān de jiàngé shíjiān" +#~ msgid "name must be a string" +#~ msgstr "míngchēng bìxū shì yīgè zìfú chuàn" + #~ msgid "row must be packed and word aligned" #~ msgstr "xíng bìxū dǎbāo bìngqiě zì duìqí" diff --git a/main.c b/main.c index 6b56f5ff6f..a6c7c05816 100755 --- a/main.c +++ b/main.c @@ -69,6 +69,11 @@ #include "shared-module/board/__init__.h" #endif +#if CIRCUITPY_BLEIO +#include "shared-bindings/_bleio/__init__.h" +#include "supervisor/shared/bluetooth.h" +#endif + void do_str(const char *src, mp_parse_input_kind_t input_kind) { mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); if (lex == NULL) { @@ -439,6 +444,10 @@ int __attribute__((used)) main(void) { // Start serial and HID after giving boot.py a chance to tweak behavior. serial_init(); + #if CIRCUITPY_BLEIO + supervisor_start_bluetooth(); + #endif + // Boot script is finished, so now go into REPL/main mode. int exit_code = PYEXEC_FORCED_EXIT; bool skip_repl = true; @@ -475,9 +484,13 @@ void gc_collect(void) { displayio_gc_collect(); #endif + #if CIRCUITPY_BLEIO + common_hal_bleio_gc_collect(); + #endif + // This naively collects all object references from an approximate stack // range. - gc_collect_root((void**)sp, ((uint32_t)&_estack - sp) / sizeof(uint32_t)); + gc_collect_root((void**)sp, ((uint32_t)port_stack_get_top() - sp) / sizeof(uint32_t)); gc_collect_end(); } diff --git a/ports/atmel-samd/boards/pyportal_titano/board.c b/ports/atmel-samd/boards/pyportal_titano/board.c index a18bb380bb..828ceebc4e 100644 --- a/ports/atmel-samd/boards/pyportal_titano/board.c +++ b/ports/atmel-samd/boards/pyportal_titano/board.c @@ -74,24 +74,21 @@ uint8_t display_init_sequence[] = { 0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01, 0x3a, 1, 0x55, - 0x36, 1, 0x00, + 0x36, 1, 0x60, 0x11, DELAY, 150/5, // Exit Sleep, then delay 150 ms 0x29, DELAY, 50/5 }; void board_init(void) { - busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, &pin_PA14); - common_hal_busio_spi_never_reset(spi); - - displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; - bus->base.type = &displayio_fourwire_type; - common_hal_displayio_fourwire_construct(bus, - spi, - &pin_PB05, // TFT_DC Command or data - &pin_PB06, // TFT_CS Chip select - &pin_PA00, // TFT_RST Reset - 24000000); + displayio_parallelbus_obj_t* bus = &displays[0].parallel_bus; + bus->base.type = &displayio_parallelbus_type; + common_hal_displayio_parallelbus_construct(bus, + &pin_PA16, // Data0 + &pin_PB05, // Command or data + &pin_PB06, // Chip select + &pin_PB09, // Write + &pin_PB04, // Read + &pin_PA00); // Reset displayio_display_obj_t* display = &displays[0].display; display->base.type = &displayio_display_type; @@ -101,7 +98,7 @@ void board_init(void) { 320, // Height 0, // column start 0, // row start - 270, // rotation + 0, // rotation 16, // Color depth false, // grayscale false, // pixels_in_byte_share_row (unused for depths > 8) diff --git a/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h index 91c1188108..f2af07371c 100644 --- a/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h +++ b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h @@ -3,7 +3,6 @@ #define CIRCUITPY_MCU_FAMILY samd51 - #define MICROPY_HW_LED_STATUS (&pin_PA27) #define MICROPY_HW_NEOPIXEL (&pin_PB22) diff --git a/ports/atmel-samd/boards/pyportal_titano/pins.c b/ports/atmel-samd/boards/pyportal_titano/pins.c index 6bc0a504a4..14699a209d 100644 --- a/ports/atmel-samd/boards/pyportal_titano/pins.c +++ b/ports/atmel-samd/boards/pyportal_titano/pins.c @@ -80,15 +80,6 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, - // TFT control pins - {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PB31)}, - {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PA12)}, - {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PA13)}, - {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MISO), MP_ROM_PTR(&pin_PA14)}, - {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PA00)}, - {MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB06)}, - {MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB05)}, - { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/robohatmm1_m4/pins.c b/ports/atmel-samd/boards/robohatmm1_m4/pins.c index edaf0bc4c5..4fc290fb0a 100644 --- a/ports/atmel-samd/boards/robohatmm1_m4/pins.c +++ b/ports/atmel-samd/boards/robohatmm1_m4/pins.c @@ -28,8 +28,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB23) }, { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PB22) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB02) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB03) }, + // GROVE on SERCOM0 { MP_ROM_QSTR(MP_QSTR_GROVE_SCL), MP_ROM_PTR(&pin_PA09) }, @@ -50,8 +49,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { // UART on SERCOM1 (Raspberry Pi) { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PA17) }, - { MP_ROM_QSTR(MP_QSTR_PI_RX), MP_ROM_PTR(&pin_PA16) }, - { MP_ROM_QSTR(MP_QSTR_PI_TX), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_PI_TX), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_PI_RX), MP_ROM_PTR(&pin_PA17) }, // I2C on SERCOM1 (External Connector) { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_PA00) }, diff --git a/ports/cc3200/mods/modubinascii.h b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/board.c similarity index 85% rename from ports/cc3200/mods/modubinascii.h rename to ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/board.c index eb9fc4f219..c8e20206a1 100644 --- a/ports/cc3200/mods/modubinascii.h +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/board.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2014 Paul Sokolovsky + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,8 +23,16 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODUBINASCII_H -#define MICROPY_INCLUDED_CC3200_MODS_MODUBINASCII_H +#include "boards/board.h" -#endif // MICROPY_INCLUDED_CC3200_MODS_MODUBINASCII_H +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.h new file mode 100644 index 0000000000..96291ff3f2 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.h @@ -0,0 +1,38 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun Qwiic Micro" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define CALIBRATE_CRYSTALLESS 1 +#define BOARD_HAS_CRYSTAL 0 + +//I2C and Qwiic Connector +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +//SPI +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA05) + +//UART +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Unused +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk new file mode 100644 index 0000000000..4497507ac4 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk @@ -0,0 +1,14 @@ +LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld +USB_VID = 0x1B4F +USB_PID = 0x8D24 +USB_PRODUCT = "SparkFun Qwiic Micro" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +CIRCUITPY_SMALL_BUILD = 1 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c new file mode 100644 index 0000000000..f9d755d935 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA23) }, + + // External SPI + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + + // UART + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + // I2C and Qwiic Connector + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) } + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/board.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/board.c new file mode 100644 index 0000000000..c8e20206a1 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.h new file mode 100644 index 0000000000..d31826d26c --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.h @@ -0,0 +1,46 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun Qwiic Micro" +#define MICROPY_HW_MCU_NAME "samd21e18" + +// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. +#define SPI_FLASH_BAUDRATE (8000000) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA19 + +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define CALIBRATE_CRYSTALLESS 1 +#define BOARD_HAS_CRYSTAL 0 + +//I2C and Qwiic Connector +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +//SPI +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA05) + +//UART +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Unused +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk new file mode 100644 index 0000000000..324da2e354 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk @@ -0,0 +1,16 @@ +LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld +USB_VID = 0x1B4F +USB_PID = 0x8D24 +USB_PRODUCT = "SparkFun Qwiic Micro" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32FV" +LONGINT_IMPL = MPZ + +CIRCUITPY_SMALL_BUILD = 1 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c new file mode 100644 index 0000000000..f9d755d935 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA23) }, + + // External SPI + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + + // UART + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + // I2C and Qwiic Connector + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) } + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/stringcar_m0_express/board.c b/ports/atmel-samd/boards/stringcar_m0_express/board.c new file mode 100644 index 0000000000..d7e856d611 --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.h new file mode 100644 index 0000000000..34ab8fcfbc --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.h @@ -0,0 +1,50 @@ +#define MICROPY_HW_BOARD_NAME "Cedar Grove StringCar M0 Express" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA10) + +#define MICROPY_HW_APA102_MOSI (&pin_PA00) +#define MICROPY_HW_APA102_SCK (&pin_PA01) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA19 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA11 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code. +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA05) +#define DEFAULT_I2C_BUS_SDA (&pin_PA04) + +// #define DEFAULT_SPI_BUS_SCK (&pin_PB11) +// #define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +// #define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +// #define DEFAULT_UART_BUS_RX (&pin_PA11) +// #define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Not connected +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA22 1 +#define IGNORE_PIN_PA23 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 + diff --git a/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk new file mode 100644 index 0000000000..17de6ac742 --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk @@ -0,0 +1,24 @@ +LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld +USB_VID = 0x239A +USB_PID = 0x8060 +USB_PRODUCT = "StringCar M0 Express" +USB_MANUFACTURER = "Cedar Grove Studios" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = AT25SF161 +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANG_APA102 = 1 + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_RTC = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 + diff --git a/ports/atmel-samd/boards/stringcar_m0_express/pins.c b/ports/atmel-samd/boards/stringcar_m0_express/pins.c new file mode 100644 index 0000000000..8bdfae9541 --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/pins.c @@ -0,0 +1,23 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_PIEZO), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_SENSOR_IN), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MOTOR_OUT_1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MOTOR_OUT_2), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_DOTSTAR_DI), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_DOTSTAR_CI), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/stm32/dac.h b/ports/atmel-samd/boards/winterbloom_sol/board.c similarity index 83% rename from ports/stm32/dac.h rename to ports/atmel-samd/boards/winterbloom_sol/board.c index 1d8f0ab61e..8096b9b8ea 100644 --- a/ports/stm32/dac.h +++ b/ports/atmel-samd/boards/winterbloom_sol/board.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,11 +23,16 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32_DAC_H -#define MICROPY_INCLUDED_STM32_DAC_H -void dac_init(void); +#include "boards/board.h" +#include "mpconfigboard.h" -extern const mp_obj_type_t pyb_dac_type; +void board_init(void) { +} -#endif // MICROPY_INCLUDED_STM32_DAC_H +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.h b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.h new file mode 100644 index 0000000000..7e01e228ac --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.h @@ -0,0 +1,33 @@ +#define MICROPY_HW_BOARD_NAME "Winterbloom Sol" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PB03) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define AUTORESET_DELAY_MS 500 + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 8192 + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk new file mode 100644 index 0000000000..19917898b6 --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk @@ -0,0 +1,27 @@ +LD_FILE = boards/samd51x20-bootloader-external-flash.ld +# Adafruit +USB_VID = 0x239A +# Allocated for Winterbloom Sol +# https://github.com/adafruit/circuitpython/issues/2217 +USB_PID = 0x8062 +USB_PRODUCT = "Sol" +USB_MANUFACTURER = "Winterbloom" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q32JV_IQ +LONGINT_IMPL = MPZ + +# Disable modules that are unusable on this special-purpose board. +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_BLEIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NETWORK = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_PS2IO = 0 diff --git a/ports/atmel-samd/boards/winterbloom_sol/pins.c b/ports/atmel-samd/boards/winterbloom_sol/pins.c new file mode 100644 index 0000000000..013542d3ca --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/pins.c @@ -0,0 +1,15 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_DAC_CS), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/common-hal/busio/I2C.c b/ports/atmel-samd/common-hal/busio/I2C.c index cdc616bbc8..b0e5714a79 100644 --- a/ports/atmel-samd/common-hal/busio/I2C.c +++ b/ports/atmel-samd/common-hal/busio/I2C.c @@ -116,6 +116,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, if (i2c_m_sync_set_baudrate(&self->i2c_desc, 0, frequency / 1000) != ERR_NONE) { reset_pin_number(sda->number); reset_pin_number(scl->number); + common_hal_busio_i2c_deinit(self); mp_raise_ValueError(translate("Unsupported baudrate")); } diff --git a/ports/atmel-samd/common-hal/microcontroller/Processor.c b/ports/atmel-samd/common-hal/microcontroller/Processor.c index e85a7bc459..1e0b8fa791 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Processor.c +++ b/ports/atmel-samd/common-hal/microcontroller/Processor.c @@ -72,6 +72,8 @@ #define INT1V_DIVIDER_1000 1000.0 #define ADC_12BIT_FULL_SCALE_VALUE_FLOAT 4095.0 +// channel argument (ignored in calls below) +#define IGNORED_CHANNEL 0 // Decimal to fraction conversion. (adapted from ASF sample). STATIC float convert_dec_to_frac(uint8_t val) { @@ -196,14 +198,12 @@ float common_hal_mcu_processor_get_temperature(void) { adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INT1V_Val); - // Channel passed in adc_sync_enable_channel is actually ignored (!). - adc_sync_enable_channel(&adc, ADC_INPUTCTRL_MUXPOS_TEMP_Val); + // Channel arg is ignored. + adc_sync_enable_channel(&adc, IGNORED_CHANNEL); adc_sync_set_inputs(&adc, ADC_INPUTCTRL_MUXPOS_TEMP_Val, // pos_input ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - ADC_INPUTCTRL_MUXPOS_TEMP_Val); // channel channel (this arg is ignored (!)) - - adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); + IGNORED_CHANNEL); // channel (ignored) hri_adc_write_CTRLB_PRESCALER_bf(adc.device.hw, ADC_CTRLB_PRESCALER_DIV32_Val); hri_adc_write_SAMPCTRL_SAMPLEN_bf(adc.device.hw, ADC_TEMP_SAMPLE_LENGTH); @@ -222,10 +222,9 @@ float common_hal_mcu_processor_get_temperature(void) { // like voltage reference / ADC channel change" // Empirical observation shows the first reading is quite different than subsequent ones. - // The channel listed in adc_sync_read_channel is actually ignored(!). - // Must be set as above with adc_sync_set_inputs. - adc_sync_read_channel(&adc, ADC_INPUTCTRL_MUXPOS_TEMP_Val, ((uint8_t*) &value), 2); - adc_sync_read_channel(&adc, ADC_INPUTCTRL_MUXPOS_TEMP_Val, ((uint8_t*) &value), 2); + // Channel arg is ignored. + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &value), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &value), 2); adc_sync_deinit(&adc); return calculate_temperature(value); @@ -233,51 +232,90 @@ float common_hal_mcu_processor_get_temperature(void) { #ifdef SAMD51 adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); - // Reference voltage choice is a guess. It's not specified in the datasheet that I can see. + // Using INTVCC0 as the reference voltage. // INTVCC1 seems to read a little high. - // INTREF doesn't work: ADC hangs BUSY. + // INTREF doesn't work: ADC hangs BUSY. It's supposed to work, but does not. + // The SAME54 example from Atmel START implicitly uses INTREF. adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTVCC0_Val); - // If ONDEMAND=1, we don't need to use the VREF.TSSEL bit to choose PTAT and CTAT. hri_supc_set_VREF_ONDEMAND_bit(SUPC); + // Enable temperature sensor. hri_supc_set_VREF_TSEN_bit(SUPC); + hri_supc_set_VREF_VREFOE_bit(SUPC); - // Channel passed in adc_sync_enable_channel is actually ignored (!). - adc_sync_enable_channel(&adc, ADC_INPUTCTRL_MUXPOS_PTAT_Val); + // Channel arg is ignored. + adc_sync_enable_channel(&adc, IGNORED_CHANNEL); adc_sync_set_inputs(&adc, ADC_INPUTCTRL_MUXPOS_PTAT_Val, // pos_input ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - ADC_INPUTCTRL_MUXPOS_PTAT_Val); // channel (this arg is ignored (!)) + IGNORED_CHANNEL); // channel (ignored) // Read both temperature sensors. volatile uint16_t ptat; volatile uint16_t ctat; - // The channel listed in adc_sync_read_channel is actually ignored(!). - // Must be set as above with adc_sync_set_inputs. - // Read twice for stability (necessary?) - adc_sync_read_channel(&adc, ADC_INPUTCTRL_MUXPOS_PTAT_Val, ((uint8_t*) &ptat), 2); - adc_sync_read_channel(&adc, ADC_INPUTCTRL_MUXPOS_PTAT_Val, ((uint8_t*) &ptat), 2); + // Read twice for stability (necessary?). + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ptat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ptat), 2); adc_sync_set_inputs(&adc, ADC_INPUTCTRL_MUXPOS_CTAT_Val, // pos_input ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - ADC_INPUTCTRL_MUXPOS_CTAT_Val); // channel (this arg is ignored (!)) + IGNORED_CHANNEL); // channel (ignored) - // Channel passed in adc_sync_enable_channel is actually ignored (!). - adc_sync_enable_channel(&adc, ADC_INPUTCTRL_MUXPOS_CTAT_Val); - // The channel listed in adc_sync_read_channel is actually ignored(!). - // Must be set as above with adc_sync_set_inputs. - // Read twice for stability (necessary?) - adc_sync_read_channel(&adc, ADC_INPUTCTRL_MUXPOS_CTAT_Val, ((uint8_t*) &ctat), 2); - adc_sync_read_channel(&adc, ADC_INPUTCTRL_MUXPOS_CTAT_Val, ((uint8_t*) &ctat), 2); - hri_supc_set_VREF_ONDEMAND_bit(SUPC); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ctat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ctat), 2); + + // Turn off temp sensor. + hri_supc_clear_VREF_TSEN_bit(SUPC); adc_sync_deinit(&adc); return calculate_temperature(ptat, ctat); #endif // SAMD51 } +float common_hal_mcu_processor_get_voltage(void) { + struct adc_sync_descriptor adc; + + static Adc* adc_insts[] = ADC_INSTS; + samd_peripherals_adc_setup(&adc, adc_insts[0]); + +#ifdef SAMD21 + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INT1V_Val); +#endif + +#ifdef SAMD51 + hri_supc_set_VREF_SEL_bf(SUPC, SUPC_VREF_SEL_1V0_Val); + // ONDEMAND must be clear, and VREFOE must be set, or else the ADC conversion will not complete. + // See https://community.atmel.com/forum/samd51-using-intref-adc-voltage-reference + hri_supc_clear_VREF_ONDEMAND_bit(SUPC); + hri_supc_set_VREF_VREFOE_bit(SUPC); + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTREF_Val); +#endif + + adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); + // Channel arg is ignored. + adc_sync_set_inputs(&adc, + ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val, // IOVCC/4 (nominal 3.3V/4) + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored). + adc_sync_enable_channel(&adc, IGNORED_CHANNEL); + + volatile uint16_t reading; + + // Channel arg is ignored. + // Read twice and discard first result, as recommended in section 14 of + // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf + // "Discard the first conversion result whenever there is a change in ADC configuration + // like voltage reference / ADC channel change" + // Empirical observation shows the first reading is quite different than subsequent ones. + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &reading), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &reading), 2); + + adc_sync_deinit(&adc); + // Multiply by 4 to compensate for SCALEDIOVCC division by 4. + return (reading / 4095.0f) * 4.0f; +} uint32_t common_hal_mcu_processor_get_frequency(void) { // TODO(tannewt): Determine this dynamically. diff --git a/ports/atmel-samd/common-hal/pulseio/PWMOut.c b/ports/atmel-samd/common-hal/pulseio/PWMOut.c index 6dcace21fd..0adb23fc5d 100644 --- a/ports/atmel-samd/common-hal/pulseio/PWMOut.c +++ b/ports/atmel-samd/common-hal/pulseio/PWMOut.c @@ -135,6 +135,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, bool variable_frequency) { self->pin = pin; self->variable_frequency = variable_frequency; + self->duty_cycle = duty; if (pin->timer[0].index >= TC_INST_NUM && pin->timer[1].index >= TCC_INST_NUM @@ -322,6 +323,13 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { } extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { + // Store the unadjusted duty cycle. It turns out the the process of adjusting and calculating + // the duty cycle here and reading it back is lossy - the value will decay over time. + // Track it here so that if frequency is changed we can use this value to recalculate the + // proper duty cycle. + // See https://github.com/adafruit/circuitpython/issues/2086 for more details + self->duty_cycle = duty; + const pin_timer_t* t = self->timer; if (t->is_tc) { uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; @@ -415,7 +423,6 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, break; } } - uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self); if (t->is_tc) { Tc* tc = tc_insts[t->index]; uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; @@ -450,7 +457,7 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, #endif } - common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty); + common_hal_pulseio_pwmout_set_duty_cycle(self, self->duty_cycle); } uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { diff --git a/ports/atmel-samd/common-hal/pulseio/PWMOut.h b/ports/atmel-samd/common-hal/pulseio/PWMOut.h index eef653bcb2..09abda8196 100644 --- a/ports/atmel-samd/common-hal/pulseio/PWMOut.h +++ b/ports/atmel-samd/common-hal/pulseio/PWMOut.h @@ -36,6 +36,7 @@ typedef struct { const mcu_pin_obj_t *pin; const pin_timer_t* timer; bool variable_frequency; + uint16_t duty_cycle; } pulseio_pwmout_obj_t; void pwmout_reset(void); diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index 51bbdd658d..88ddb49e01 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -22,7 +22,7 @@ CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_TOUCHIO_USE_NATIVE = 1 # SAMD21 needs separate endpoint pairs for MSC BULK IN and BULK OUT, otherwise it's erratic. -USB_MSC_NUM_ENDPOINT_PAIRS = 2 +USB_MSC_EP_NUM_OUT = 1 endif # Put samd51-only choices here. diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 512fd8eb8d..e962281c1e 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -271,6 +271,14 @@ void reset_cpu(void) { reset(); } +uint32_t *port_stack_get_limit(void) { + return &_ebss; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + // Place the word to save 8k from the end of RAM so we and the bootloader don't clobber it. #ifdef SAMD21 uint32_t* safe_word = (uint32_t*) (HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000); diff --git a/ports/bare-arm/Makefile b/ports/bare-arm/Makefile deleted file mode 100644 index a515db80e0..0000000000 --- a/ports/bare-arm/Makefile +++ /dev/null @@ -1,48 +0,0 @@ -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -CROSS_COMPILE = arm-none-eabi- - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mabi=aapcs-linux -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -Wdouble-promotion -CFLAGS = $(INC) -Wall -Werror -std=c99 -nostdlib $(CFLAGS_CORTEX_M4) $(COPT) - -#Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -O0 -ggdb -else -CFLAGS += -Os -DNDEBUG -endif - -LDFLAGS = -nostdlib -T stm32f405.ld -Map=$@.map --cref -LIBS = - -SRC_C = \ - main.c \ -# printf.c \ - string0.c \ - malloc0.c \ - gccollect.c \ - -SRC_S = \ -# startup_stm32f40xx.s \ - gchelper.s \ - -OBJ = $(PY_CORE_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o) $(SRC_S:.s=.o)) - -all: $(BUILD)/firmware.elf - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -include $(TOP)/py/mkrules.mk diff --git a/ports/bare-arm/main.c b/ports/bare-arm/main.c deleted file mode 100644 index b96fb47ace..0000000000 --- a/ports/bare-arm/main.c +++ /dev/null @@ -1,96 +0,0 @@ -#include -#include -#include - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/mperrno.h" - -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} - -int main(int argc, char **argv) { - mp_init(); - do_str("print('hello world!', list(x+1 for x in range(10)), end='eol\\n')", MP_PARSE_SINGLE_INPUT); - do_str("for i in range(10):\n print(i)", MP_PARSE_FILE_INPUT); - mp_deinit(); - return 0; -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - while (1); -} - -void NORETURN __fatal_error(const char *msg) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif - -/* -int _lseek() {return 0;} -int _read() {return 0;} -int _write() {return 0;} -int _close() {return 0;} -void _exit(int x) {for(;;){}} -int _sbrk() {return 0;} -int _kill() {return 0;} -int _getpid() {return 0;} -int _fstat() {return 0;} -int _isatty() {return 0;} -*/ - -void *malloc(size_t n) {return NULL;} -void *calloc(size_t nmemb, size_t size) {return NULL;} -void *realloc(void *ptr, size_t size) {return NULL;} -void free(void *p) {} -int printf(const char *m, ...) {return 0;} -void *memcpy(void *dest, const void *src, size_t n) {return NULL;} -int memcmp(const void *s1, const void *s2, size_t n) {return 0;} -void *memmove(void *dest, const void *src, size_t n) {return NULL;} -void *memset(void *s, int c, size_t n) {return NULL;} -int strcmp(const char *s1, const char* s2) {return 0;} -int strncmp(const char *s1, const char* s2, size_t n) {return 0;} -size_t strlen(const char *s) {return 0;} -char *strcat(char *dest, const char *src) {return NULL;} -char *strchr(const char *dest, int c) {return NULL;} -#include -int vprintf(const char *format, va_list ap) {return 0;} -int vsnprintf(char *str, size_t size, const char *format, va_list ap) {return 0;} - -#undef putchar -int putchar(int c) {return 0;} -int puts(const char *s) {return 0;} - -void _start(void) {main(0, NULL);} diff --git a/ports/bare-arm/mpconfigport.h b/ports/bare-arm/mpconfigport.h deleted file mode 100644 index 3fbd3769f1..0000000000 --- a/ports/bare-arm/mpconfigport.h +++ /dev/null @@ -1,66 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_QSTR_BYTES_IN_HASH (1) -#define MICROPY_ALLOC_PATH_MAX (512) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (0) -#define MICROPY_HELPER_REPL (0) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (0) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (0) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (0) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_NONE) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) -#define MICROPY_USE_INTERNAL_PRINTF (0) - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define UINT_FMT "%lu" -#define INT_FMT "%ld" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; - -// dummy print -#define MP_PLAT_PRINT_STRN(str, len) (void)0 - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// We need to provide a declaration/definition of alloca() -#include diff --git a/ports/bare-arm/mphalport.h b/ports/bare-arm/mphalport.h deleted file mode 100644 index 4bd8276f34..0000000000 --- a/ports/bare-arm/mphalport.h +++ /dev/null @@ -1 +0,0 @@ -// empty file diff --git a/ports/bare-arm/stm32f405.ld b/ports/bare-arm/stm32f405.ld deleted file mode 100644 index dd688a0246..0000000000 --- a/ports/bare-arm/stm32f405.ld +++ /dev/null @@ -1,117 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 0x004000 /* sector 0, 16 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x080000 /* sectors 5,6,7,8, 4*128KiB = 512 KiB (could increase it more) */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 0x010000 /* 64 KiB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x020000 /* 128 KiB */ -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x2001c000; /* tunable */ - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ - } >FLASH_TEXT - - /* - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } >FLASH - - .ARM : - { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - */ - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - _ram_start = .; /* create a global symbol at ram start for garbage collector */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - _heap_start = .; /* define a global symbol at heap start */ - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - } >RAM - - /* Remove information from the standard libraries */ - /* - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - */ - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/cc3200/FreeRTOS/FreeRTOSConfig.h b/ports/cc3200/FreeRTOS/FreeRTOSConfig.h deleted file mode 100644 index 2f25bbd7e8..0000000000 --- a/ports/cc3200/FreeRTOS/FreeRTOSConfig.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that has become a de facto standard. * - * * - * Help yourself get started quickly and support the FreeRTOS * - * project by purchasing a FreeRTOS tutorial book, reference * - * manual, or both from: http://www.FreeRTOS.org/Documentation * - * * - * Thank you! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available from the following - link: http://www.freertos.org/a00114.html - - 1 tab == 4 spaces! - - *************************************************************************** - * * - * Having a problem? Start by reading the FAQ "My application does * - * not run, what could be wrong?" * - * * - * http://www.FreeRTOS.org/FAQHelp.html * - * * - *************************************************************************** - - http://www.FreeRTOS.org - Documentation, books, training, latest versions, - license and Real Time Engineers Ltd. contact details. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 1 -#define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( ( unsigned long ) 80000000 ) -#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 72 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( \ - 16384 /* 16kbytes for FreeRTOS data structures and heap */ \ - - sizeof(StaticTask_t) - configMINIMAL_STACK_SIZE * sizeof(StackType_t) /* TCB+stack for idle task */ \ - - sizeof(StaticTask_t) - 1024 /* TCB+stack for servers task */ \ - - sizeof(StaticTask_t) - 6656 /* TCB+stack for main MicroPython task */ \ - - sizeof(StaticTask_t) - 896 /* TCB+stack for simplelink spawn task */ \ - ) ) -#define configMAX_TASK_NAME_LEN ( 8 ) -#define configUSE_TRACE_FACILITY 0 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_CO_ROUTINES 0 -#define configUSE_MUTEXES 0 -#define configUSE_RECURSIVE_MUTEXES 0 -#ifdef DEBUG -#define configCHECK_FOR_STACK_OVERFLOW 1 -#else -#define configCHECK_FOR_STACK_OVERFLOW 0 -#endif -#define configUSE_QUEUE_SETS 0 -#define configUSE_COUNTING_SEMAPHORES 0 -#define configUSE_ALTERNATIVE_API 0 - -#define configMAX_PRIORITIES ( 4UL ) -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) -#define configQUEUE_REGISTRY_SIZE 0 - -/* Timer related defines. */ -#define configUSE_TIMERS 0 -#define configTIMER_TASK_PRIORITY 2 -#define configTIMER_QUEUE_LENGTH 20 -#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) -#ifdef DEBUG -#define configUSE_MALLOC_FAILED_HOOK 1 -#else -#define configUSE_MALLOC_FAILED_HOOK 0 -#endif -#define configENABLE_BACKWARD_COMPATIBILITY 0 -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 0 -#define INCLUDE_vTaskDelayUntil 0 -#define INCLUDE_vTaskDelay 1 -#ifdef DEBUG -#define INCLUDE_uxTaskGetStackHighWaterMark 1 -#else -#define INCLUDE_uxTaskGetStackHighWaterMark 0 -#endif -#define INCLUDE_xTaskGetSchedulerState 0 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 -#ifdef DEBUG -#define INCLUDE_xTaskGetIdleTaskHandle 1 -#else -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#endif -#define INCLUDE_pcTaskGetTaskName 0 -#define INCLUDE_eTaskGetState 0 -#define INCLUDE_xSemaphoreGetMutexHolder 0 - -#define configKERNEL_INTERRUPT_PRIORITY ( 7 << 5 ) /* Priority 7, or 255 as only the top three bits are implemented. This is the lowest priority. */ -/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! -See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 1 << 5 ) /* Priority 5, or 160 as only the top three bits are implemented. */ - -/* Use the Cortex-M3 optimised task selection rather than the generic C code -version. */ -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 - -/* We provide a definition of ucHeap so it can go in a special segment. */ -#define configAPPLICATION_ALLOCATED_HEAP 1 - -/* We use static versions of functions (like xTaskCreateStatic) */ -#define configSUPPORT_STATIC_ALLOCATION 1 - -/* For threading */ -#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 1 -#undef configUSE_MUTEXES -#define configUSE_MUTEXES 1 -#undef INCLUDE_vTaskDelete -#define INCLUDE_vTaskDelete 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/ports/cc3200/FreeRTOS/License/license.txt b/ports/cc3200/FreeRTOS/License/license.txt deleted file mode 100644 index 5d243b8966..0000000000 --- a/ports/cc3200/FreeRTOS/License/license.txt +++ /dev/null @@ -1,399 +0,0 @@ -The FreeRTOS open source license covers the FreeRTOS source files, -which are located in the /FreeRTOS/Source directory of the official FreeRTOS -download. It also covers most of the source files in the demo application -projects, which are located in the /FreeRTOS/Demo directory of the official -FreeRTOS download. The demo projects may also include third party software that -is not part of FreeRTOS and is licensed separately to FreeRTOS. Examples of -third party software includes header files provided by chip or tools vendors, -linker scripts, peripheral drivers, etc. All the software in subdirectories of -the /FreeRTOS directory is either open source or distributed with permission, -and is free for use. For the avoidance of doubt, refer to the comments at the -top of each source file. - ----------------------------------------------------------------------------- - -NOTE: The modification to the GPL is included to allow you to distribute a -combined work that includes FreeRTOS without being obliged to provide the source -code for proprietary components. - ----------------------------------------------------------------------------- - -Applying to FreeRTOS V8.2.3 up to the latest version, the FreeRTOS GPL Exception -Text follows: - -Any FreeRTOS *source code*, whether modified or in it's original release form, -or whether in whole or in part, can only be distributed by you under the terms -of the GNU General Public License plus this exception. An independent module is -a module which is not derived from or based on FreeRTOS. - -Clause 1: - -Linking FreeRTOS with other modules is making a combined work based on FreeRTOS. -Thus, the terms and conditions of the GNU General Public License V2 cover the -whole combination. - -As a special exception, the copyright holders of FreeRTOS give you permission to -link FreeRTOS with independent modules to produce a statically linked -executable, regardless of the license terms of these independent modules, and to -copy and distribute the resulting executable under terms of your choice, -provided that you also meet, for each linked independent module, the terms and -conditions of the license of that module. An independent module is a module -which is not derived from or based on FreeRTOS. - -Clause 2: - -FreeRTOS may not be used for any competitive or comparative purpose, including -the publication of any form of run time or compile time metric, without the -express permission of Real Time Engineers Ltd. (this is the norm within the -industry and is intended to ensure information accuracy). - - - --------------------------------------------------------------------- - - - -The standard GPL V2 text: - - - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. This -General Public License applies to most of the Free Software -Foundation's software and to any other program whose authors commit to -using it. (Some other Free Software Foundation software is covered by -the GNU Library General Public License instead.) You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -this service if you wish), that you receive source code or can get it -if you want it, that you can change the software or use pieces of it -in new free programs; and that you know you can do these things. - - To protect your rights, we need to make restrictions that forbid -anyone to deny you these rights or to ask you to surrender the rights. -These restrictions translate to certain responsibilities for you if you -distribute copies of the software, or if you modify it. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must give the recipients all the rights that -you have. You must make sure that they, too, receive or can get the -source code. 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See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - -Also add information on how to contact you by electronic and paper mail. - -If the program is interactive, make it output a short notice like this -when it starts in an interactive mode: - - Gnomovision version 69, Copyright (C) year name of author - Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Library General -Public License instead of this License. - diff --git a/ports/cc3200/FreeRTOS/Source/croutine.c b/ports/cc3200/FreeRTOS/Source/croutine.c deleted file mode 100644 index 993e09b29e..0000000000 --- a/ports/cc3200/FreeRTOS/Source/croutine.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Remove the whole file is co-routines are not being used. */ -#if( configUSE_CO_ROUTINES != 0 ) - -/* - * Some kernel aware debuggers require data to be viewed to be global, rather - * than file scope. - */ -#ifdef portREMOVE_STATIC_QUALIFIER - #define static -#endif - - -/* Lists for ready and blocked co-routines. --------------------*/ -static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static List_t * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static List_t * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -CRCB_t * pxCurrentCoRoutine = NULL; -static UBaseType_t uxTopCoRoutineReadyPriority = 0; -static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ) -{ -BaseType_t xReturn; -CRCB_t *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the ListItem_t. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ) -{ -TickType_t xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE ) - { - CRCB_t *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) ); - ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static void prvCheckDelayedList( void ) -{ -CRCB_t *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - List_t * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE ) - { - pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ); - - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - ( void ) uxListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -UBaseType_t uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ) -{ -CRCB_t *pxUnblockedCRCB; -BaseType_t xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. This function assumes that a - check has already been made to ensure pxEventList is not empty. */ - pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - -#endif /* configUSE_CO_ROUTINES == 0 */ - diff --git a/ports/cc3200/FreeRTOS/Source/event_groups.c b/ports/cc3200/FreeRTOS/Source/event_groups.c deleted file mode 100644 index b8df5fd956..0000000000 --- a/ports/cc3200/FreeRTOS/Source/event_groups.c +++ /dev/null @@ -1,752 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* Standard includes. */ -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* FreeRTOS includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "timers.h" -#include "event_groups.h" - -/* Lint e961 and e750 are suppressed as a MISRA exception justified because the -MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the -header files above, but not in this file, in order to generate the correct -privileged Vs unprivileged linkage and placement. */ -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */ - -/* The following bit fields convey control information in a task's event list -item value. It is important they don't clash with the -taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ -#if configUSE_16_BIT_TICKS == 1 - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U - #define eventWAIT_FOR_ALL_BITS 0x0400U - #define eventEVENT_BITS_CONTROL_BYTES 0xff00U -#else - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL - #define eventWAIT_FOR_ALL_BITS 0x04000000UL - #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL -#endif - -typedef struct xEventGroupDefinition -{ - EventBits_t uxEventBits; - List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */ - - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxEventGroupNumber; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */ - #endif -} EventGroup_t; - -/*-----------------------------------------------------------*/ - -/* - * Test the bits set in uxCurrentEventBits to see if the wait condition is met. - * The wait condition is defined by xWaitForAllBits. If xWaitForAllBits is - * pdTRUE then the wait condition is met if all the bits set in uxBitsToWaitFor - * are also set in uxCurrentEventBits. If xWaitForAllBits is pdFALSE then the - * wait condition is met if any of the bits set in uxBitsToWait for are also set - * in uxCurrentEventBits. - */ -static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION; - -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - - EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) - { - EventGroup_t *pxEventBits; - - /* A StaticEventGroup_t object must be provided. */ - configASSERT( pxEventGroupBuffer ); - - /* The user has provided a statically allocated event group - use it. */ - pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 EventGroup_t and StaticEventGroup_t are guaranteed to have the same size and alignment requirement - checked by configASSERT(). */ - - if( pxEventBits != NULL ) - { - pxEventBits->uxEventBits = 0; - vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); - - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - /* Both static and dynamic allocation can be used, so note that - this event group was created statically in case the event group - is later deleted. */ - pxEventBits->ucStaticallyAllocated = pdTRUE; - } - #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ - - traceEVENT_GROUP_CREATE( pxEventBits ); - } - else - { - traceEVENT_GROUP_CREATE_FAILED(); - } - - return ( EventGroupHandle_t ) pxEventBits; - } - -#endif /* configSUPPORT_STATIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - - EventGroupHandle_t xEventGroupCreate( void ) - { - EventGroup_t *pxEventBits; - - /* Allocate the event group. */ - pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); - - if( pxEventBits != NULL ) - { - pxEventBits->uxEventBits = 0; - vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - /* Both static and dynamic allocation can be used, so note this - event group was allocated statically in case the event group is - later deleted. */ - pxEventBits->ucStaticallyAllocated = pdFALSE; - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ - - traceEVENT_GROUP_CREATE( pxEventBits ); - } - else - { - traceEVENT_GROUP_CREATE_FAILED(); - } - - return ( EventGroupHandle_t ) pxEventBits; - } - -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) -{ -EventBits_t uxOriginalBitValue, uxReturn; -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -BaseType_t xAlreadyYielded; -BaseType_t xTimeoutOccurred = pdFALSE; - - configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - configASSERT( uxBitsToWaitFor != 0 ); - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - { - configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - } - #endif - - vTaskSuspendAll(); - { - uxOriginalBitValue = pxEventBits->uxEventBits; - - ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet ); - - if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - /* All the rendezvous bits are now set - no need to block. */ - uxReturn = ( uxOriginalBitValue | uxBitsToSet ); - - /* Rendezvous always clear the bits. They will have been cleared - already unless this is the only task in the rendezvous. */ - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - - xTicksToWait = 0; - } - else - { - if( xTicksToWait != ( TickType_t ) 0 ) - { - traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ); - - /* Store the bits that the calling task is waiting for in the - task's event list item so the kernel knows when a match is - found. Then enter the blocked state. */ - vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait ); - - /* This assignment is obsolete as uxReturn will get set after - the task unblocks, but some compilers mistakenly generate a - warning about uxReturn being returned without being set if the - assignment is omitted. */ - uxReturn = 0; - } - else - { - /* The rendezvous bits were not set, but no block time was - specified - just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - if( xTicksToWait != ( TickType_t ) 0 ) - { - if( xAlreadyYielded == pdFALSE ) - { - portYIELD_WITHIN_API(); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* The task blocked to wait for its required bits to be set - at this - point either the required bits were set or the block time expired. If - the required bits were set they will have been stored in the task's - event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); - - if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) - { - /* The task timed out, just return the current event bit value. */ - taskENTER_CRITICAL(); - { - uxReturn = pxEventBits->uxEventBits; - - /* Although the task got here because it timed out before the - bits it was waiting for were set, it is possible that since it - unblocked another task has set the bits. If this is the case - then it needs to clear the bits before exiting. */ - if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - taskEXIT_CRITICAL(); - - xTimeoutOccurred = pdTRUE; - } - else - { - /* The task unblocked because the bits were set. */ - } - - /* Control bits might be set as the task had blocked should not be - returned. */ - uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; - } - - traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) -{ -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -EventBits_t uxReturn, uxControlBits = 0; -BaseType_t xWaitConditionMet, xAlreadyYielded; -BaseType_t xTimeoutOccurred = pdFALSE; - - /* Check the user is not attempting to wait on the bits used by the kernel - itself, and that at least one bit is being requested. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - configASSERT( uxBitsToWaitFor != 0 ); - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - { - configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - } - #endif - - vTaskSuspendAll(); - { - const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits; - - /* Check to see if the wait condition is already met or not. */ - xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits ); - - if( xWaitConditionMet != pdFALSE ) - { - /* The wait condition has already been met so there is no need to - block. */ - uxReturn = uxCurrentEventBits; - xTicksToWait = ( TickType_t ) 0; - - /* Clear the wait bits if requested to do so. */ - if( xClearOnExit != pdFALSE ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else if( xTicksToWait == ( TickType_t ) 0 ) - { - /* The wait condition has not been met, but no block time was - specified, so just return the current value. */ - uxReturn = uxCurrentEventBits; - } - else - { - /* The task is going to block to wait for its required bits to be - set. uxControlBits are used to remember the specified behaviour of - this call to xEventGroupWaitBits() - for use when the event bits - unblock the task. */ - if( xClearOnExit != pdFALSE ) - { - uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - if( xWaitForAllBits != pdFALSE ) - { - uxControlBits |= eventWAIT_FOR_ALL_BITS; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* Store the bits that the calling task is waiting for in the - task's event list item so the kernel knows when a match is - found. Then enter the blocked state. */ - vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait ); - - /* This is obsolete as it will get set after the task unblocks, but - some compilers mistakenly generate a warning about the variable - being returned without being set if it is not done. */ - uxReturn = 0; - - traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ); - } - } - xAlreadyYielded = xTaskResumeAll(); - - if( xTicksToWait != ( TickType_t ) 0 ) - { - if( xAlreadyYielded == pdFALSE ) - { - portYIELD_WITHIN_API(); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* The task blocked to wait for its required bits to be set - at this - point either the required bits were set or the block time expired. If - the required bits were set they will have been stored in the task's - event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); - - if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) - { - taskENTER_CRITICAL(); - { - /* The task timed out, just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; - - /* It is possible that the event bits were updated between this - task leaving the Blocked state and running again. */ - if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE ) - { - if( xClearOnExit != pdFALSE ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - taskEXIT_CRITICAL(); - - /* Prevent compiler warnings when trace macros are not used. */ - xTimeoutOccurred = pdFALSE; - } - else - { - /* The task unblocked because the bits were set. */ - } - - /* The task blocked so control bits may have been set. */ - uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; - } - traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) -{ -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -EventBits_t uxReturn; - - /* Check the user is not attempting to clear the bits used by the kernel - itself. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - - taskENTER_CRITICAL(); - { - traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ); - - /* The value returned is the event group value prior to the bits being - cleared. */ - uxReturn = pxEventBits->uxEventBits; - - /* Clear the bits. */ - pxEventBits->uxEventBits &= ~uxBitsToClear; - } - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - - BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) - { - BaseType_t xReturn; - - traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ); - xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) -{ -UBaseType_t uxSavedInterruptStatus; -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -EventBits_t uxReturn; - - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - { - uxReturn = pxEventBits->uxEventBits; - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) -{ -ListItem_t *pxListItem, *pxNext; -ListItem_t const *pxListEnd; -List_t *pxList; -EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -BaseType_t xMatchFound = pdFALSE; - - /* Check the user is not attempting to set the bits used by the kernel - itself. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - - pxList = &( pxEventBits->xTasksWaitingForBits ); - pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - vTaskSuspendAll(); - { - traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ); - - pxListItem = listGET_HEAD_ENTRY( pxList ); - - /* Set the bits. */ - pxEventBits->uxEventBits |= uxBitsToSet; - - /* See if the new bit value should unblock any tasks. */ - while( pxListItem != pxListEnd ) - { - pxNext = listGET_NEXT( pxListItem ); - uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); - xMatchFound = pdFALSE; - - /* Split the bits waited for from the control bits. */ - uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; - uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES; - - if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 ) - { - /* Just looking for single bit being set. */ - if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 ) - { - xMatchFound = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor ) - { - /* All bits are set. */ - xMatchFound = pdTRUE; - } - else - { - /* Need all bits to be set, but not all the bits were set. */ - } - - if( xMatchFound != pdFALSE ) - { - /* The bits match. Should the bits be cleared on exit? */ - if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 ) - { - uxBitsToClear |= uxBitsWaitedFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* Store the actual event flag value in the task's event list - item before removing the task from the event list. The - eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows - that is was unblocked due to its required bits matching, rather - than because it timed out. */ - ( void ) xTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET ); - } - - /* Move onto the next list item. Note pxListItem->pxNext is not - used here as the list item may have been removed from the event list - and inserted into the ready/pending reading list. */ - pxListItem = pxNext; - } - - /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT - bit was set in the control word. */ - pxEventBits->uxEventBits &= ~uxBitsToClear; - } - ( void ) xTaskResumeAll(); - - return pxEventBits->uxEventBits; -} -/*-----------------------------------------------------------*/ - -void vEventGroupDelete( EventGroupHandle_t xEventGroup ) -{ -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits ); - - vTaskSuspendAll(); - { - traceEVENT_GROUP_DELETE( xEventGroup ); - - while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 ) - { - /* Unblock the task, returning 0 as the event list is being deleted - and cannot therefore have any bits set. */ - configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) ); - ( void ) xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET ); - } - - #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) - { - /* The event group can only have been allocated dynamically - free - it again. */ - vPortFree( pxEventBits ); - } - #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) - { - /* The event group could have been allocated statically or - dynamically, so check before attempting to free the memory. */ - if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE ) - { - vPortFree( pxEventBits ); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ - } - ( void ) xTaskResumeAll(); -} -/*-----------------------------------------------------------*/ - -/* For internal use only - execute a 'set bits' command that was pended from -an interrupt. */ -void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) -{ - ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); -} -/*-----------------------------------------------------------*/ - -/* For internal use only - execute a 'clear bits' command that was pended from -an interrupt. */ -void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) -{ - ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); -} -/*-----------------------------------------------------------*/ - -static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) -{ -BaseType_t xWaitConditionMet = pdFALSE; - - if( xWaitForAllBits == pdFALSE ) - { - /* Task only has to wait for one bit within uxBitsToWaitFor to be - set. Is one already set? */ - if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 ) - { - xWaitConditionMet = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else - { - /* Task has to wait for all the bits in uxBitsToWaitFor to be set. - Are they set already? */ - if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - xWaitConditionMet = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - - return xWaitConditionMet; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - - BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) - { - BaseType_t xReturn; - - traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ); - xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if (configUSE_TRACE_FACILITY == 1) - - UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) - { - UBaseType_t xReturn; - EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; - - if( xEventGroup == NULL ) - { - xReturn = 0; - } - else - { - xReturn = pxEventBits->uxEventGroupNumber; - } - - return xReturn; - } - -#endif - diff --git a/ports/cc3200/FreeRTOS/Source/include/FreeRTOS.h b/ports/cc3200/FreeRTOS/Source/include/FreeRTOS.h deleted file mode 100644 index f81172dbe4..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/FreeRTOS.h +++ /dev/null @@ -1,1063 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* - * If stdint.h cannot be located then: - * + If using GCC ensure the -nostdint options is *not* being used. - * + Ensure the project's include path includes the directory in which your - * compiler stores stdint.h. - * + Set any compiler options necessary for it to support C99, as technically - * stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any - * other way). - * + The FreeRTOS download includes a simple stdint.h definition that can be - * used in cases where none is provided by the compiler. The files only - * contains the typedefs required to build FreeRTOS. Read the instructions - * in FreeRTOS/source/stdint.readme for more information. - */ -#include /* READ COMMENT ABOVE. */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - -/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */ -#ifndef configUSE_NEWLIB_REENTRANT - #define configUSE_NEWLIB_REENTRANT 0 -#endif - -/* Required if struct _reent is used. */ -#if ( configUSE_NEWLIB_REENTRANT == 1 ) - #include -#endif -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configMINIMAL_STACK_SIZE - #error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value. -#endif - -#ifndef configMAX_PRIORITIES - #error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configMAX_PRIORITIES - #error configMAX_PRIORITIES must be defined to be greater than or equal to 1. -#endif - -#ifndef configUSE_CO_ROUTINES - #define configUSE_CO_ROUTINES 0 -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #define INCLUDE_vTaskPrioritySet 0 -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #define INCLUDE_uxTaskPriorityGet 0 -#endif - -#ifndef INCLUDE_vTaskDelete - #define INCLUDE_vTaskDelete 0 -#endif - -#ifndef INCLUDE_vTaskSuspend - #define INCLUDE_vTaskSuspend 0 -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #define INCLUDE_vTaskDelayUntil 0 -#endif - -#ifndef INCLUDE_vTaskDelay - #define INCLUDE_vTaskDelay 0 -#endif - -#ifndef INCLUDE_xTaskGetIdleTaskHandle - #define INCLUDE_xTaskGetIdleTaskHandle 0 -#endif - -#ifndef INCLUDE_xTaskAbortDelay - #define INCLUDE_xTaskAbortDelay 0 -#endif - -#ifndef INCLUDE_xQueueGetMutexHolder - #define INCLUDE_xQueueGetMutexHolder 0 -#endif - -#ifndef INCLUDE_xSemaphoreGetMutexHolder - #define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder -#endif - -#ifndef INCLUDE_xTaskGetHandle - #define INCLUDE_xTaskGetHandle 0 -#endif - -#ifndef INCLUDE_uxTaskGetStackHighWaterMark - #define INCLUDE_uxTaskGetStackHighWaterMark 0 -#endif - -#ifndef INCLUDE_eTaskGetState - #define INCLUDE_eTaskGetState 0 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -#ifndef INCLUDE_xTimerPendFunctionCall - #define INCLUDE_xTimerPendFunctionCall 0 -#endif - -#ifndef INCLUDE_xTaskGetSchedulerState - #define INCLUDE_xTaskGetSchedulerState 0 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#if configUSE_CO_ROUTINES != 0 - #ifndef configMAX_CO_ROUTINE_PRIORITIES - #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1. - #endif -#endif - -#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK - #define configUSE_DAEMON_TASK_STARTUP_HOOK 0 -#endif - -#ifndef configUSE_APPLICATION_TASK_TAG - #define configUSE_APPLICATION_TASK_TAG 0 -#endif - -#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS - #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 -#endif - -#ifndef configUSE_RECURSIVE_MUTEXES - #define configUSE_RECURSIVE_MUTEXES 0 -#endif - -#ifndef configUSE_MUTEXES - #define configUSE_MUTEXES 0 -#endif - -#ifndef configUSE_TIMERS - #define configUSE_TIMERS 0 -#endif - -#ifndef configUSE_COUNTING_SEMAPHORES - #define configUSE_COUNTING_SEMAPHORES 0 -#endif - -#ifndef configUSE_ALTERNATIVE_API - #define configUSE_ALTERNATIVE_API 0 -#endif - -#ifndef portCRITICAL_NESTING_IN_TCB - #define portCRITICAL_NESTING_IN_TCB 0 -#endif - -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h -#endif - -#ifndef configASSERT - #define configASSERT( x ) - #define configASSERT_DEFINED 0 -#else - #define configASSERT_DEFINED 1 -#endif - -/* The timers module relies on xTaskGetSchedulerState(). */ -#if configUSE_TIMERS == 1 - - #ifndef configTIMER_TASK_PRIORITY - #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined. - #endif /* configTIMER_TASK_PRIORITY */ - - #ifndef configTIMER_QUEUE_LENGTH - #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined. - #endif /* configTIMER_QUEUE_LENGTH */ - - #ifndef configTIMER_TASK_STACK_DEPTH - #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined. - #endif /* configTIMER_TASK_STACK_DEPTH */ - -#endif /* configUSE_TIMERS */ - -#ifndef portSET_INTERRUPT_MASK_FROM_ISR - #define portSET_INTERRUPT_MASK_FROM_ISR() 0 -#endif - -#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR - #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue -#endif - -#ifndef portCLEAN_UP_TCB - #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB -#endif - -#ifndef portPRE_TASK_DELETE_HOOK - #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending ) -#endif - -#ifndef portSETUP_TCB - #define portSETUP_TCB( pxTCB ) ( void ) pxTCB -#endif - -#ifndef configQUEUE_REGISTRY_SIZE - #define configQUEUE_REGISTRY_SIZE 0U -#endif - -#if ( configQUEUE_REGISTRY_SIZE < 1 ) - #define vQueueAddToRegistry( xQueue, pcName ) - #define vQueueUnregisterQueue( xQueue ) - #define pcQueueGetName( xQueue ) -#endif - -#ifndef portPOINTER_SIZE_TYPE - #define portPOINTER_SIZE_TYPE uint32_t -#endif - -/* Remove any unused trace macros. */ -#ifndef traceSTART - /* Used to perform any necessary initialisation - for example, open a file - into which trace is to be written. */ - #define traceSTART() -#endif - -#ifndef traceEND - /* Use to close a trace, for example close a file into which trace has been - written. */ - #define traceEND() -#endif - -#ifndef traceTASK_SWITCHED_IN - /* Called after a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the selected task. */ - #define traceTASK_SWITCHED_IN() -#endif - -#ifndef traceINCREASE_TICK_COUNT - /* Called before stepping the tick count after waking from tickless idle - sleep. */ - #define traceINCREASE_TICK_COUNT( x ) -#endif - -#ifndef traceLOW_POWER_IDLE_BEGIN - /* Called immediately before entering tickless idle. */ - #define traceLOW_POWER_IDLE_BEGIN() -#endif - -#ifndef traceLOW_POWER_IDLE_END - /* Called when returning to the Idle task after a tickless idle. */ - #define traceLOW_POWER_IDLE_END() -#endif - -#ifndef traceTASK_SWITCHED_OUT - /* Called before a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the task being switched out. */ - #define traceTASK_SWITCHED_OUT() -#endif - -#ifndef traceTASK_PRIORITY_INHERIT - /* Called when a task attempts to take a mutex that is already held by a - lower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task - that holds the mutex. uxInheritedPriority is the priority the mutex holder - will inherit (the priority of the task that is attempting to obtain the - muted. */ - #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority ) -#endif - -#ifndef traceTASK_PRIORITY_DISINHERIT - /* Called when a task releases a mutex, the holding of which had resulted in - the task inheriting the priority of a higher priority task. - pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the - mutex. uxOriginalPriority is the task's configured (base) priority. */ - #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority ) -#endif - -#ifndef traceBLOCKING_ON_QUEUE_RECEIVE - /* Task is about to block because it cannot read from a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the read was attempted. pxCurrentTCB points to the TCB of the - task that attempted the read. */ - #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) -#endif - -#ifndef traceBLOCKING_ON_QUEUE_SEND - /* Task is about to block because it cannot write to a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the write was attempted. pxCurrentTCB points to the TCB of the - task that attempted the write. */ - #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) -#endif - -#ifndef configCHECK_FOR_STACK_OVERFLOW - #define configCHECK_FOR_STACK_OVERFLOW 0 -#endif - -/* The following event macros are embedded in the kernel API calls. */ - -#ifndef traceMOVED_TASK_TO_READY_STATE - #define traceMOVED_TASK_TO_READY_STATE( pxTCB ) -#endif - -#ifndef tracePOST_MOVED_TASK_TO_READY_STATE - #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB ) -#endif - -#ifndef traceQUEUE_CREATE - #define traceQUEUE_CREATE( pxNewQueue ) -#endif - -#ifndef traceQUEUE_CREATE_FAILED - #define traceQUEUE_CREATE_FAILED( ucQueueType ) -#endif - -#ifndef traceCREATE_MUTEX - #define traceCREATE_MUTEX( pxNewQueue ) -#endif - -#ifndef traceCREATE_MUTEX_FAILED - #define traceCREATE_MUTEX_FAILED() -#endif - -#ifndef traceGIVE_MUTEX_RECURSIVE - #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) -#endif - -#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED - #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) -#endif - -#ifndef traceTAKE_MUTEX_RECURSIVE - #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) -#endif - -#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED - #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ) -#endif - -#ifndef traceCREATE_COUNTING_SEMAPHORE - #define traceCREATE_COUNTING_SEMAPHORE() -#endif - -#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED - #define traceCREATE_COUNTING_SEMAPHORE_FAILED() -#endif - -#ifndef traceQUEUE_SEND - #define traceQUEUE_SEND( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FAILED - #define traceQUEUE_SEND_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE - #define traceQUEUE_RECEIVE( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK - #define traceQUEUE_PEEK( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK_FROM_ISR - #define traceQUEUE_PEEK_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FAILED - #define traceQUEUE_RECEIVE_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FROM_ISR - #define traceQUEUE_SEND_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FROM_ISR_FAILED - #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FROM_ISR - #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED - #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED - #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_DELETE - #define traceQUEUE_DELETE( pxQueue ) -#endif - -#ifndef traceTASK_CREATE - #define traceTASK_CREATE( pxNewTCB ) -#endif - -#ifndef traceTASK_CREATE_FAILED - #define traceTASK_CREATE_FAILED() -#endif - -#ifndef traceTASK_DELETE - #define traceTASK_DELETE( pxTaskToDelete ) -#endif - -#ifndef traceTASK_DELAY_UNTIL - #define traceTASK_DELAY_UNTIL( x ) -#endif - -#ifndef traceTASK_DELAY - #define traceTASK_DELAY() -#endif - -#ifndef traceTASK_PRIORITY_SET - #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) -#endif - -#ifndef traceTASK_SUSPEND - #define traceTASK_SUSPEND( pxTaskToSuspend ) -#endif - -#ifndef traceTASK_RESUME - #define traceTASK_RESUME( pxTaskToResume ) -#endif - -#ifndef traceTASK_RESUME_FROM_ISR - #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) -#endif - -#ifndef traceTASK_INCREMENT_TICK - #define traceTASK_INCREMENT_TICK( xTickCount ) -#endif - -#ifndef traceTIMER_CREATE - #define traceTIMER_CREATE( pxNewTimer ) -#endif - -#ifndef traceTIMER_CREATE_FAILED - #define traceTIMER_CREATE_FAILED() -#endif - -#ifndef traceTIMER_COMMAND_SEND - #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn ) -#endif - -#ifndef traceTIMER_EXPIRED - #define traceTIMER_EXPIRED( pxTimer ) -#endif - -#ifndef traceTIMER_COMMAND_RECEIVED - #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue ) -#endif - -#ifndef traceMALLOC - #define traceMALLOC( pvAddress, uiSize ) -#endif - -#ifndef traceFREE - #define traceFREE( pvAddress, uiSize ) -#endif - -#ifndef traceEVENT_GROUP_CREATE - #define traceEVENT_GROUP_CREATE( xEventGroup ) -#endif - -#ifndef traceEVENT_GROUP_CREATE_FAILED - #define traceEVENT_GROUP_CREATE_FAILED() -#endif - -#ifndef traceEVENT_GROUP_SYNC_BLOCK - #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ) -#endif - -#ifndef traceEVENT_GROUP_SYNC_END - #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred -#endif - -#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK - #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ) -#endif - -#ifndef traceEVENT_GROUP_WAIT_BITS_END - #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred -#endif - -#ifndef traceEVENT_GROUP_CLEAR_BITS - #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ) -#endif - -#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR - #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ) -#endif - -#ifndef traceEVENT_GROUP_SET_BITS - #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ) -#endif - -#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR - #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ) -#endif - -#ifndef traceEVENT_GROUP_DELETE - #define traceEVENT_GROUP_DELETE( xEventGroup ) -#endif - -#ifndef tracePEND_FUNC_CALL - #define tracePEND_FUNC_CALL(xFunctionToPend, pvParameter1, ulParameter2, ret) -#endif - -#ifndef tracePEND_FUNC_CALL_FROM_ISR - #define tracePEND_FUNC_CALL_FROM_ISR(xFunctionToPend, pvParameter1, ulParameter2, ret) -#endif - -#ifndef traceQUEUE_REGISTRY_ADD - #define traceQUEUE_REGISTRY_ADD(xQueue, pcQueueName) -#endif - -#ifndef traceTASK_NOTIFY_TAKE_BLOCK - #define traceTASK_NOTIFY_TAKE_BLOCK() -#endif - -#ifndef traceTASK_NOTIFY_TAKE - #define traceTASK_NOTIFY_TAKE() -#endif - -#ifndef traceTASK_NOTIFY_WAIT_BLOCK - #define traceTASK_NOTIFY_WAIT_BLOCK() -#endif - -#ifndef traceTASK_NOTIFY_WAIT - #define traceTASK_NOTIFY_WAIT() -#endif - -#ifndef traceTASK_NOTIFY - #define traceTASK_NOTIFY() -#endif - -#ifndef traceTASK_NOTIFY_FROM_ISR - #define traceTASK_NOTIFY_FROM_ISR() -#endif - -#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR - #define traceTASK_NOTIFY_GIVE_FROM_ISR() -#endif - -#ifndef configGENERATE_RUN_TIME_STATS - #define configGENERATE_RUN_TIME_STATS 0 -#endif - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - - #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. - #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ - - #ifndef portGET_RUN_TIME_COUNTER_VALUE - #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE - #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information. - #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */ - #endif /* portGET_RUN_TIME_COUNTER_VALUE */ - -#endif /* configGENERATE_RUN_TIME_STATS */ - -#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() -#endif - -#ifndef configUSE_MALLOC_FAILED_HOOK - #define configUSE_MALLOC_FAILED_HOOK 0 -#endif - -#ifndef portPRIVILEGE_BIT - #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 ) -#endif - -#ifndef portYIELD_WITHIN_API - #define portYIELD_WITHIN_API portYIELD -#endif - -#ifndef portSUPPRESS_TICKS_AND_SLEEP - #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) -#endif - -#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP - #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 -#endif - -#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2 - #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2 -#endif - -#ifndef configUSE_TICKLESS_IDLE - #define configUSE_TICKLESS_IDLE 0 -#endif - -#ifndef configPRE_SLEEP_PROCESSING - #define configPRE_SLEEP_PROCESSING( x ) -#endif - -#ifndef configPOST_SLEEP_PROCESSING - #define configPOST_SLEEP_PROCESSING( x ) -#endif - -#ifndef configUSE_QUEUE_SETS - #define configUSE_QUEUE_SETS 0 -#endif - -#ifndef portTASK_USES_FLOATING_POINT - #define portTASK_USES_FLOATING_POINT() -#endif - -#ifndef configUSE_TIME_SLICING - #define configUSE_TIME_SLICING 1 -#endif - -#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS - #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 -#endif - -#ifndef configUSE_STATS_FORMATTING_FUNCTIONS - #define configUSE_STATS_FORMATTING_FUNCTIONS 0 -#endif - -#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID - #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() -#endif - -#ifndef configUSE_TRACE_FACILITY - #define configUSE_TRACE_FACILITY 0 -#endif - -#ifndef mtCOVERAGE_TEST_MARKER - #define mtCOVERAGE_TEST_MARKER() -#endif - -#ifndef mtCOVERAGE_TEST_DELAY - #define mtCOVERAGE_TEST_DELAY() -#endif - -#ifndef portASSERT_IF_IN_ISR - #define portASSERT_IF_IN_ISR() -#endif - -#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION - #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#endif - -#ifndef configAPPLICATION_ALLOCATED_HEAP - #define configAPPLICATION_ALLOCATED_HEAP 0 -#endif - -#ifndef configUSE_TASK_NOTIFICATIONS - #define configUSE_TASK_NOTIFICATIONS 1 -#endif - -#ifndef portTICK_TYPE_IS_ATOMIC - #define portTICK_TYPE_IS_ATOMIC 0 -#endif - -#ifndef configSUPPORT_STATIC_ALLOCATION - /* Defaults to 0 for backward compatibility. */ - #define configSUPPORT_STATIC_ALLOCATION 0 -#endif - -#ifndef configSUPPORT_DYNAMIC_ALLOCATION - /* Defaults to 1 for backward compatibility. */ - #define configSUPPORT_DYNAMIC_ALLOCATION 1 -#endif - -/* Sanity check the configuration. */ -#if( configUSE_TICKLESS_IDLE != 0 ) - #if( INCLUDE_vTaskSuspend != 1 ) - #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0 - #endif /* INCLUDE_vTaskSuspend */ -#endif /* configUSE_TICKLESS_IDLE */ - -#if( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) ) - #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1. -#endif - -#if( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) ) - #error configUSE_MUTEXES must be set to 1 to use recursive mutexes -#endif - -#if( portTICK_TYPE_IS_ATOMIC == 0 ) - /* Either variables of tick type cannot be read atomically, or - portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when - the tick count is returned to the standard critical section macros. */ - #define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL() - #define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL() - #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() - #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) ) -#else - /* The tick type can be read atomically, so critical sections used when the - tick count is returned can be defined away. */ - #define portTICK_TYPE_ENTER_CRITICAL() - #define portTICK_TYPE_EXIT_CRITICAL() - #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0 - #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x -#endif - -/* Definitions to allow backward compatibility with FreeRTOS versions prior to -V8 if desired. */ -#ifndef configENABLE_BACKWARD_COMPATIBILITY - #define configENABLE_BACKWARD_COMPATIBILITY 1 -#endif - -#if configENABLE_BACKWARD_COMPATIBILITY == 1 - #define eTaskStateGet eTaskGetState - #define portTickType TickType_t - #define xTaskHandle TaskHandle_t - #define xQueueHandle QueueHandle_t - #define xSemaphoreHandle SemaphoreHandle_t - #define xQueueSetHandle QueueSetHandle_t - #define xQueueSetMemberHandle QueueSetMemberHandle_t - #define xTimeOutType TimeOut_t - #define xMemoryRegion MemoryRegion_t - #define xTaskParameters TaskParameters_t - #define xTaskStatusType TaskStatus_t - #define xTimerHandle TimerHandle_t - #define xCoRoutineHandle CoRoutineHandle_t - #define pdTASK_HOOK_CODE TaskHookFunction_t - #define portTICK_RATE_MS portTICK_PERIOD_MS - #define pcTaskGetTaskName pcTaskGetName - #define pcTimerGetTimerName pcTimerGetName - #define pcQueueGetQueueName pcQueueGetName - #define vTaskGetTaskInfo vTaskGetInfo - - /* Backward compatibility within the scheduler code only - these definitions - are not really required but are included for completeness. */ - #define tmrTIMER_CALLBACK TimerCallbackFunction_t - #define pdTASK_CODE TaskFunction_t - #define xListItem ListItem_t - #define xList List_t -#endif /* configENABLE_BACKWARD_COMPATIBILITY */ - -#if( configUSE_ALTERNATIVE_API != 0 ) - #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0 -#endif - -/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even -if floating point hardware is otherwise supported by the FreeRTOS port in use. -This constant is not supported by all FreeRTOS ports that include floating -point support. */ -#ifndef configUSE_TASK_FPU_SUPPORT - #define configUSE_TASK_FPU_SUPPORT 1 -#endif - -/* - * In line with software engineering best practice, FreeRTOS implements a strict - * data hiding policy, so the real structures used by FreeRTOS to maintain the - * state of tasks, queues, semaphores, etc. are not accessible to the application - * code. However, if the application writer wants to statically allocate such - * an object then the size of the object needs to be know. Dummy structures - * that are guaranteed to have the same size and alignment requirements of the - * real objects are used for this purpose. The dummy list and list item - * structures below are used for inclusion in such a dummy structure. - */ -struct xSTATIC_LIST_ITEM -{ - TickType_t xDummy1; - void *pvDummy2[ 4 ]; -}; -typedef struct xSTATIC_LIST_ITEM StaticListItem_t; - -/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ -struct xSTATIC_MINI_LIST_ITEM -{ - TickType_t xDummy1; - void *pvDummy2[ 2 ]; -}; -typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t; - -/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ -typedef struct xSTATIC_LIST -{ - UBaseType_t uxDummy1; - void *pvDummy2; - StaticMiniListItem_t xDummy3; -} StaticList_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the Task structure used internally by - * FreeRTOS is not accessible to application code. However, if the application - * writer wants to statically allocate the memory required to create a task then - * the size of the task object needs to be know. The StaticTask_t structure - * below is provided for this purpose. Its sizes and alignment requirements are - * guaranteed to match those of the genuine structure, no matter which - * architecture is being used, and no matter how the values in FreeRTOSConfig.h - * are set. Its contents are somewhat obfuscated in the hope users will - * recognise that it would be unwise to make direct use of the structure members. - */ -typedef struct xSTATIC_TCB -{ - void *pxDummy1; - #if ( portUSING_MPU_WRAPPERS == 1 ) - xMPU_SETTINGS xDummy2; - #endif - StaticListItem_t xDummy3[ 2 ]; - UBaseType_t uxDummy5; - void *pxDummy6; - uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ]; - #if ( portSTACK_GROWTH > 0 ) - void *pxDummy8; - #endif - #if ( portCRITICAL_NESTING_IN_TCB == 1 ) - UBaseType_t uxDummy9; - #endif - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy10[ 2 ]; - #endif - #if ( configUSE_MUTEXES == 1 ) - UBaseType_t uxDummy12[ 2 ]; - #endif - #if ( configUSE_APPLICATION_TASK_TAG == 1 ) - void *pxDummy14; - #endif - #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) - void *pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; - #endif - #if ( configGENERATE_RUN_TIME_STATS == 1 ) - uint32_t ulDummy16; - #endif - #if ( configUSE_NEWLIB_REENTRANT == 1 ) - struct _reent xDummy17; - #endif - #if ( configUSE_TASK_NOTIFICATIONS == 1 ) - uint32_t ulDummy18; - uint8_t ucDummy19; - #endif - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t uxDummy20; - #endif - -} StaticTask_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the Queue structure used internally by - * FreeRTOS is not accessible to application code. However, if the application - * writer wants to statically allocate the memory required to create a queue - * then the size of the queue object needs to be know. The StaticQueue_t - * structure below is provided for this purpose. Its sizes and alignment - * requirements are guaranteed to match those of the genuine structure, no - * matter which architecture is being used, and no matter how the values in - * FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in the hope - * users will recognise that it would be unwise to make direct use of the - * structure members. - */ -typedef struct xSTATIC_QUEUE -{ - void *pvDummy1[ 3 ]; - - union - { - void *pvDummy2; - UBaseType_t uxDummy2; - } u; - - StaticList_t xDummy3[ 2 ]; - UBaseType_t uxDummy4[ 3 ]; - uint8_t ucDummy5[ 2 ]; - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy6; - #endif - - #if ( configUSE_QUEUE_SETS == 1 ) - void *pvDummy7; - #endif - - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy8; - uint8_t ucDummy9; - #endif - -} StaticQueue_t; -typedef StaticQueue_t StaticSemaphore_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the event group structure used - * internally by FreeRTOS is not accessible to application code. However, if - * the application writer wants to statically allocate the memory required to - * create an event group then the size of the event group object needs to be - * know. The StaticEventGroup_t structure below is provided for this purpose. - * Its sizes and alignment requirements are guaranteed to match those of the - * genuine structure, no matter which architecture is being used, and no matter - * how the values in FreeRTOSConfig.h are set. Its contents are somewhat - * obfuscated in the hope users will recognise that it would be unwise to make - * direct use of the structure members. - */ -typedef struct xSTATIC_EVENT_GROUP -{ - TickType_t xDummy1; - StaticList_t xDummy2; - - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy3; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy4; - #endif - -} StaticEventGroup_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the software timer structure used - * internally by FreeRTOS is not accessible to application code. However, if - * the application writer wants to statically allocate the memory required to - * create a software timer then the size of the queue object needs to be know. - * The StaticTimer_t structure below is provided for this purpose. Its sizes - * and alignment requirements are guaranteed to match those of the genuine - * structure, no matter which architecture is being used, and no matter how the - * values in FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in - * the hope users will recognise that it would be unwise to make direct use of - * the structure members. - */ -typedef struct xSTATIC_TIMER -{ - void *pvDummy1; - StaticListItem_t xDummy2; - TickType_t xDummy3; - UBaseType_t uxDummy4; - void *pvDummy5[ 2 ]; - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy6; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy7; - #endif - -} StaticTimer_t; - -#ifdef __cplusplus -} -#endif - -#endif /* INC_FREERTOS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/StackMacros.h b/ports/cc3200/FreeRTOS/Source/include/StackMacros.h deleted file mode 100644 index 13c6b829be..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/StackMacros.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef STACK_MACROS_H -#define STACK_MACROS_H - -/* - * Call the stack overflow hook function if the stack of the task being swapped - * out is currently overflowed, or looks like it might have overflowed in the - * past. - * - * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check - * the current stack state only - comparing the current top of stack value to - * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 - * will also cause the last few stack bytes to be checked to ensure the value - * to which the bytes were set when the task was created have not been - * overwritten. Note this second test does not guarantee that an overflowed - * stack will always be recognised. - */ - -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) - - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ - const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ - \ - if( ( pulStack[ 0 ] != ulCheckValue ) || \ - ( pulStack[ 1 ] != ulCheckValue ) || \ - ( pulStack[ 2 ] != ulCheckValue ) || \ - ( pulStack[ 3 ] != ulCheckValue ) ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) - - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ - static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ - \ - \ - pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ - \ - /* Has the extremity of the task stack ever been written over? */ \ - if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -/* Remove stack overflow macro if not being used. */ -#ifndef taskCHECK_FOR_STACK_OVERFLOW - #define taskCHECK_FOR_STACK_OVERFLOW() -#endif - - - -#endif /* STACK_MACROS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/croutine.h b/ports/cc3200/FreeRTOS/Source/include/croutine.h deleted file mode 100644 index 4f003a0bae..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/croutine.h +++ /dev/null @@ -1,762 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include croutine.h" -#endif - -#include "list.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * CoRoutineHandle_t; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ - UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - uint16_t uxState; /*< Used internally by the co-routine implementation. */ -} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ - -/** - * croutine. h - *
- BaseType_t xCoRoutineCreate(
-                                 crCOROUTINE_CODE pxCoRoutineCode,
-                                 UBaseType_t uxPriority,
-                                 UBaseType_t uxIndex
-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 
- // Co-routine to be created.
- void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // This co-routine just delays for a fixed period, then toggles
-         // an LED.  Two co-routines are created using this function, so
-         // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how int32_t to delay.  This assumes xQueue has
-         // already been created.
-         vParTestToggleLED( cLedToFlash[ uxIndex ] );
-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- uint8_t ucParameterToPass;
- TaskHandle_t xHandle;
-
-     // Create two co-routines at priority 0.  The first is given index 0
-     // so (from the code above) toggles LED 5 every 200 ticks.  The second
-     // is given index 1 so toggles LED 6 every 400 ticks.
-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
-     {
-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
-     }
- }
-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ); - - -/** - * croutine. h - *
- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
-	vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to
- // execute, the idle task hook can call vCoRoutineScheduler() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
-    for( ;; )
-    {
-        vCoRoutineSchedule();
-    }
- }
-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 
- crSTART( CoRoutineHandle_t xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static int32_t ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0: - -/** - * croutine. h - * 
- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static int32_t ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *
- crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_PERIOD_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-        // Delay for 200ms.
-        crDELAY( xHandle, xDelayTime );
-
-        // Do something here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( ( xTicksToDelay ) > 0 ) \ - { \ - vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ - } \ - crSET_STATE0( ( xHandle ) ); - -/** - * 
- crQUEUE_SEND(
-                  CoRoutineHandle_t xHandle,
-                  QueueHandle_t pxQueue,
-                  void *pvItemToQueue,
-                  TickType_t xTicksToWait,
-                  BaseType_t *pxResult
-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static BaseType_t xNumberToPost = 0;
- static BaseType_t xResult;
-
-    // Co-routines must begin with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // This assumes the queue has already been created.
-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
-        if( xResult != pdPASS )
-        {
-            // The message was not posted!
-        }
-
-        // Increment the number to be posted onto the queue.
-        xNumberToPost++;
-
-        // Delay for 100 ticks.
-        crDELAY( xHandle, 100 );
-    }
-
-    // Co-routines must end with a call to crEND().
-    crEND();
- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \ - if( *( pxResult ) == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( ( xHandle ) ); \ - *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( ( xHandle ) ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_RECEIVE(
-                     CoRoutineHandle_t xHandle,
-                     QueueHandle_t pxQueue,
-                     void *pvBuffer,
-                     TickType_t xTicksToWait,
-                     BaseType_t *pxResult
-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 
- // A co-routine receives the number of an LED to flash from a queue.  It
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static BaseType_t xResult;
- static UBaseType_t uxLEDToFlash;
-
-    // All co-routines must start with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // Wait for data to become available on the queue.
-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-        if( xResult == pdPASS )
-        {
-            // We received the LED to flash - flash it!
-            vParTestToggleLED( uxLEDToFlash );
-        }
-    }
-
-    crEND();
- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \ - if( *( pxResult ) == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( ( xHandle ) ); \ - *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \ - } \ - if( *( pxResult ) == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( ( xHandle ) ); \ - *( pxResult ) = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            QueueHandle_t pxQueue,
-                            void *pvItemToQueue,
-                            BaseType_t xCoRoutinePreviouslyWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- char cRxedChar;
- BaseType_t xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Wait for data to become available on the queue.  This assumes the
-         // queue xCommsRxQueue has already been created!
-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-         // Was a character received?
-         if( xResult == pdPASS )
-         {
-             // Process the character here.
-         }
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- char cRxedChar;
- BaseType_t xCRWokenByPost = pdFALSE;
-
-     // We loop around reading characters until there are none left in the UART.
-     while( UART_RX_REG_NOT_EMPTY() )
-     {
-         // Obtain the character from the UART.
-         cRxedChar = UART_RX_REG;
-
-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
-         // the first time around the loop.  If the post causes a co-routine
-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
-         // In this manner we can ensure that if more than one co-routine is
-         // blocked on the queue only one is woken by this ISR no matter how
-         // many characters are posted to the queue.
-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
-     }
- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) - - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            QueueHandle_t pxQueue,
-                            void *pvBuffer,
-                            BaseType_t * pxCoRoutineWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 
- // A co-routine that posts a character to a queue then blocks for a fixed
- // period.  The character is incremented each time.
- static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static char cCharToTx = 'a';
- BaseType_t xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Send the next character to the queue.
-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-
-         if( xResult == pdPASS )
-         {
-             // The character was successfully posted to the queue.
-         }
-		 else
-		 {
-			// Could not post the character to the queue.
-		 }
-
-         // Enable the UART Tx interrupt to cause an interrupt in this
-		 // hypothetical UART.  The interrupt will obtain the character
-		 // from the queue and send it.
-		 ENABLE_RX_INTERRUPT();
-
-		 // Increment to the next character then block for a fixed period.
-		 // cCharToTx will maintain its value across the delay as it is
-		 // declared static.
-		 cCharToTx++;
-		 if( cCharToTx > 'x' )
-		 {
-			cCharToTx = 'a';
-		 }
-		 crDELAY( 100 );
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- char cCharToTx;
- BaseType_t xCRWokenByPost = pdFALSE;
-
-     while( UART_TX_REG_EMPTY() )
-     {
-         // Are there any characters in the queue waiting to be sent?
-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
-		 // is woken by the post - ensuring that only a single co-routine is
-		 // woken no matter how many times we go around this loop.
-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
-		 {
-			 SEND_CHARACTER( cCharToTx );
-		 }
-     }
- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ); - -#ifdef __cplusplus -} -#endif - -#endif /* CO_ROUTINE_H */ diff --git a/ports/cc3200/FreeRTOS/Source/include/deprecated_definitions.h b/ports/cc3200/FreeRTOS/Source/include/deprecated_definitions.h deleted file mode 100644 index 4ea816ccfd..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/deprecated_definitions.h +++ /dev/null @@ -1,321 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef DEPRECATED_DEFINITIONS_H -#define DEPRECATED_DEFINITIONS_H - - -/* Each FreeRTOS port has a unique portmacro.h header file. Originally a -pre-processor definition was used to ensure the pre-processor found the correct -portmacro.h file for the port being used. That scheme was deprecated in favour -of setting the compiler's include path such that it found the correct -portmacro.h file - removing the need for the constant and allowing the -portmacro.h file to be located anywhere in relation to the port being used. The -definitions below remain in the code for backward compatibility only. New -projects should not use them. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC24_PORT - #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" -#endif - -#ifdef MPLAB_DSPIC_PORT - #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "../../Source/portable/MPLAB/PIC18F/portmacro.h" -#endif - -#ifdef MPLAB_PIC32MX_PORT - #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_ARM7_ECLIPSE - #include "portmacro.h" -#endif - -#ifdef ROWLEY_LPC23xx - #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" -#endif - -#ifdef IAR_MSP430 - #include "..\..\Source\portable\IAR\MSP430\portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef ARM7_LPC21xx_KEIL_RVDS - #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef SAM9XE_IAR - #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR75X_IAR - #include "..\..\Source\portable\IAR\STR75x\portmacro.h" -#endif - -#ifdef STR75X_GCC - #include "..\..\Source\portable\GCC\STR75x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARM_CM3 - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - -#ifdef GCC_MCF5235 - #include "../../Source/portable/GCC/MCF5235/portmacro.h" -#endif - -#ifdef COLDFIRE_V2_GCC - #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" -#endif - -#ifdef COLDFIRE_V2_CODEWARRIOR - #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" -#endif - -#ifdef GCC_PPC405 - #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" -#endif - -#ifdef GCC_PPC440 - #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" -#endif - -#ifdef _16FX_SOFTUNE - #include "..\..\Source\portable\Softune\MB96340\portmacro.h" -#endif - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef __GNUC__ - #ifdef __AVR32_AVR32A__ - #include "portmacro.h" - #endif -#endif - -#ifdef __ICCAVR32__ - #ifdef __CORE__ - #if __CORE__ == __AVR32A__ - #include "portmacro.h" - #endif - #endif -#endif - -#ifdef __91467D - #include "portmacro.h" -#endif - -#ifdef __96340 - #include "portmacro.h" -#endif - - -#ifdef __IAR_V850ES_Fx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx3_L__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Hx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_78K0R_Kx3__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" -#endif - -#ifdef __IAR_78K0R_Kx3L__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" -#endif - -#endif /* DEPRECATED_DEFINITIONS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/event_groups.h b/ports/cc3200/FreeRTOS/Source/include/event_groups.h deleted file mode 100644 index 7331c91c25..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/event_groups.h +++ /dev/null @@ -1,797 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef EVENT_GROUPS_H -#define EVENT_GROUPS_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include event_groups.h" -#endif - -/* FreeRTOS includes. */ -#include "timers.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * An event group is a collection of bits to which an application can assign a - * meaning. For example, an application may create an event group to convey - * the status of various CAN bus related events in which bit 0 might mean "A CAN - * message has been received and is ready for processing", bit 1 might mean "The - * application has queued a message that is ready for sending onto the CAN - * network", and bit 2 might mean "It is time to send a SYNC message onto the - * CAN network" etc. A task can then test the bit values to see which events - * are active, and optionally enter the Blocked state to wait for a specified - * bit or a group of specified bits to be active. To continue the CAN bus - * example, a CAN controlling task can enter the Blocked state (and therefore - * not consume any processing time) until either bit 0, bit 1 or bit 2 are - * active, at which time the bit that was actually active would inform the task - * which action it had to take (process a received message, send a message, or - * send a SYNC). - * - * The event groups implementation contains intelligence to avoid race - * conditions that would otherwise occur were an application to use a simple - * variable for the same purpose. This is particularly important with respect - * to when a bit within an event group is to be cleared, and when bits have to - * be set and then tested atomically - as is the case where event groups are - * used to create a synchronisation point between multiple tasks (a - * 'rendezvous'). - * - * \defgroup EventGroup - */ - - - -/** - * event_groups.h - * - * Type by which event groups are referenced. For example, a call to - * xEventGroupCreate() returns an EventGroupHandle_t variable that can then - * be used as a parameter to other event group functions. - * - * \defgroup EventGroupHandle_t EventGroupHandle_t - * \ingroup EventGroup - */ -typedef void * EventGroupHandle_t; - -/* - * The type that holds event bits always matches TickType_t - therefore the - * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1, - * 32 bits if set to 0. - * - * \defgroup EventBits_t EventBits_t - * \ingroup EventGroup - */ -typedef TickType_t EventBits_t; - -/** - * event_groups.h - *
- EventGroupHandle_t xEventGroupCreate( void );
-
- * - * Create a new event group. - * - * Internally, within the FreeRTOS implementation, event groups use a [small] - * block of memory, in which the event group's structure is stored. If an event - * groups is created using xEventGropuCreate() then the required memory is - * automatically dynamically allocated inside the xEventGroupCreate() function. - * (see http://www.freertos.org/a00111.html). If an event group is created - * using xEventGropuCreateStatic() then the application writer must instead - * provide the memory that will get used by the event group. - * xEventGroupCreateStatic() therefore allows an event group to be created - * without using any dynamic memory allocation. - * - * Although event groups are not related to ticks, for internal implementation - * reasons the number of bits available for use in an event group is dependent - * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If - * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit - * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has - * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store - * event bits within an event group. - * - * @return If the event group was created then a handle to the event group is - * returned. If there was insufficient FreeRTOS heap available to create the - * event group then NULL is returned. See http://www.freertos.org/a00111.html - * - * Example usage: - 
-	// Declare a variable to hold the created event group.
-	EventGroupHandle_t xCreatedEventGroup;
-
-	// Attempt to create the event group.
-	xCreatedEventGroup = xEventGroupCreate();
-
-	// Was the event group created successfully?
-	if( xCreatedEventGroup == NULL )
-	{
-		// The event group was not created because there was insufficient
-		// FreeRTOS heap available.
-	}
-	else
-	{
-		// The event group was created.
-	}
-
- * \defgroup xEventGroupCreate xEventGroupCreate - * \ingroup EventGroup - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION; -#endif - -/** - * event_groups.h - *
- EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
-
- * - * Create a new event group. - * - * Internally, within the FreeRTOS implementation, event groups use a [small] - * block of memory, in which the event group's structure is stored. If an event - * groups is created using xEventGropuCreate() then the required memory is - * automatically dynamically allocated inside the xEventGroupCreate() function. - * (see http://www.freertos.org/a00111.html). If an event group is created - * using xEventGropuCreateStatic() then the application writer must instead - * provide the memory that will get used by the event group. - * xEventGroupCreateStatic() therefore allows an event group to be created - * without using any dynamic memory allocation. - * - * Although event groups are not related to ticks, for internal implementation - * reasons the number of bits available for use in an event group is dependent - * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If - * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit - * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has - * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store - * event bits within an event group. - * - * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type - * StaticEventGroup_t, which will be then be used to hold the event group's data - * structures, removing the need for the memory to be allocated dynamically. - * - * @return If the event group was created then a handle to the event group is - * returned. If pxEventGroupBuffer was NULL then NULL is returned. - * - * Example usage: - 
-	// StaticEventGroup_t is a publicly accessible structure that has the same
-	// size and alignment requirements as the real event group structure.  It is
-	// provided as a mechanism for applications to know the size of the event
-	// group (which is dependent on the architecture and configuration file
-	// settings) without breaking the strict data hiding policy by exposing the
-	// real event group internals.  This StaticEventGroup_t variable is passed
-	// into the xSemaphoreCreateEventGroupStatic() function and is used to store
-	// the event group's data structures
-	StaticEventGroup_t xEventGroupBuffer;
-
-	// Create the event group without dynamically allocating any memory.
-	xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
-
- */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION; -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupWaitBits( 	EventGroupHandle_t xEventGroup,
-										const EventBits_t uxBitsToWaitFor,
-										const BaseType_t xClearOnExit,
-										const BaseType_t xWaitForAllBits,
-										const TickType_t xTicksToWait );
-
- * - * [Potentially] block to wait for one or more bits to be set within a - * previously created event group. - * - * This function cannot be called from an interrupt. - * - * @param xEventGroup The event group in which the bits are being tested. The - * event group must have previously been created using a call to - * xEventGroupCreate(). - * - * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test - * inside the event group. For example, to wait for bit 0 and/or bit 2 set - * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set - * uxBitsToWaitFor to 0x07. Etc. - * - * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within - * uxBitsToWaitFor that are set within the event group will be cleared before - * xEventGroupWaitBits() returns if the wait condition was met (if the function - * returns for a reason other than a timeout). If xClearOnExit is set to - * pdFALSE then the bits set in the event group are not altered when the call to - * xEventGroupWaitBits() returns. - * - * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then - * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor - * are set or the specified block time expires. If xWaitForAllBits is set to - * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set - * in uxBitsToWaitFor is set or the specified block time expires. The block - * time is specified by the xTicksToWait parameter. - * - * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait - * for one/all (depending on the xWaitForAllBits value) of the bits specified by - * uxBitsToWaitFor to become set. - * - * @return The value of the event group at the time either the bits being waited - * for became set, or the block time expired. Test the return value to know - * which bits were set. If xEventGroupWaitBits() returned because its timeout - * expired then not all the bits being waited for will be set. If - * xEventGroupWaitBits() returned because the bits it was waiting for were set - * then the returned value is the event group value before any bits were - * automatically cleared in the case that xClearOnExit parameter was set to - * pdTRUE. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-   const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
-
-		// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
-		// the event group.  Clear the bits before exiting.
-		uxBits = xEventGroupWaitBits(
-					xEventGroup,	// The event group being tested.
-					BIT_0 | BIT_4,	// The bits within the event group to wait for.
-					pdTRUE,			// BIT_0 and BIT_4 should be cleared before returning.
-					pdFALSE,		// Don't wait for both bits, either bit will do.
-					xTicksToWait );	// Wait a maximum of 100ms for either bit to be set.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// xEventGroupWaitBits() returned because both bits were set.
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// xEventGroupWaitBits() returned because just BIT_0 was set.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// xEventGroupWaitBits() returned because just BIT_4 was set.
-		}
-		else
-		{
-			// xEventGroupWaitBits() returned because xTicksToWait ticks passed
-			// without either BIT_0 or BIT_4 becoming set.
-		}
-   }
-
- * \defgroup xEventGroupWaitBits xEventGroupWaitBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
-
- * - * Clear bits within an event group. This function cannot be called from an - * interrupt. - * - * @param xEventGroup The event group in which the bits are to be cleared. - * - * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear - * in the event group. For example, to clear bit 3 only, set uxBitsToClear to - * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. - * - * @return The value of the event group before the specified bits were cleared. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-
-		// Clear bit 0 and bit 4 in xEventGroup.
-		uxBits = xEventGroupClearBits(
-								xEventGroup,	// The event group being updated.
-								BIT_0 | BIT_4 );// The bits being cleared.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// Both bit 0 and bit 4 were set before xEventGroupClearBits() was
-			// called.  Both will now be clear (not set).
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// Bit 0 was set before xEventGroupClearBits() was called.  It will
-			// now be clear.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// Bit 4 was set before xEventGroupClearBits() was called.  It will
-			// now be clear.
-		}
-		else
-		{
-			// Neither bit 0 nor bit 4 were set in the first place.
-		}
-   }
-
- * \defgroup xEventGroupClearBits xEventGroupClearBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
-
- * - * A version of xEventGroupClearBits() that can be called from an interrupt. - * - * Setting bits in an event group is not a deterministic operation because there - * are an unknown number of tasks that may be waiting for the bit or bits being - * set. FreeRTOS does not allow nondeterministic operations to be performed - * while interrupts are disabled, so protects event groups that are accessed - * from tasks by suspending the scheduler rather than disabling interrupts. As - * a result event groups cannot be accessed directly from an interrupt service - * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the - * timer task to have the clear operation performed in the context of the timer - * task. - * - * @param xEventGroup The event group in which the bits are to be cleared. - * - * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. - * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 - * and bit 0 set uxBitsToClear to 0x09. - * - * @return If the request to execute the function was posted successfully then - * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned - * if the timer service queue was full. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   // An event group which it is assumed has already been created by a call to
-   // xEventGroupCreate().
-   EventGroupHandle_t xEventGroup;
-
-   void anInterruptHandler( void )
-   {
-		// Clear bit 0 and bit 4 in xEventGroup.
-		xResult = xEventGroupClearBitsFromISR(
-							xEventGroup,	 // The event group being updated.
-							BIT_0 | BIT_4 ); // The bits being set.
-
-		if( xResult == pdPASS )
-		{
-			// The message was posted successfully.
-		}
-  }
-
- * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR - * \ingroup EventGroup - */ -#if( configUSE_TRACE_FACILITY == 1 ) - BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; -#else - #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ) -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
-
- * - * Set bits within an event group. - * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() - * is a version that can be called from an interrupt. - * - * Setting bits in an event group will automatically unblock tasks that are - * blocked waiting for the bits. - * - * @param xEventGroup The event group in which the bits are to be set. - * - * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. - * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 - * and bit 0 set uxBitsToSet to 0x09. - * - * @return The value of the event group at the time the call to - * xEventGroupSetBits() returns. There are two reasons why the returned value - * might have the bits specified by the uxBitsToSet parameter cleared. First, - * if setting a bit results in a task that was waiting for the bit leaving the - * blocked state then it is possible the bit will be cleared automatically - * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any - * unblocked (or otherwise Ready state) task that has a priority above that of - * the task that called xEventGroupSetBits() will execute and may change the - * event group value before the call to xEventGroupSetBits() returns. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-
-		// Set bit 0 and bit 4 in xEventGroup.
-		uxBits = xEventGroupSetBits(
-							xEventGroup,	// The event group being updated.
-							BIT_0 | BIT_4 );// The bits being set.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// Both bit 0 and bit 4 remained set when the function returned.
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// Bit 0 remained set when the function returned, but bit 4 was
-			// cleared.  It might be that bit 4 was cleared automatically as a
-			// task that was waiting for bit 4 was removed from the Blocked
-			// state.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// Bit 4 remained set when the function returned, but bit 0 was
-			// cleared.  It might be that bit 0 was cleared automatically as a
-			// task that was waiting for bit 0 was removed from the Blocked
-			// state.
-		}
-		else
-		{
-			// Neither bit 0 nor bit 4 remained set.  It might be that a task
-			// was waiting for both of the bits to be set, and the bits were
-			// cleared as the task left the Blocked state.
-		}
-   }
-
- * \defgroup xEventGroupSetBits xEventGroupSetBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
-
- * - * A version of xEventGroupSetBits() that can be called from an interrupt. - * - * Setting bits in an event group is not a deterministic operation because there - * are an unknown number of tasks that may be waiting for the bit or bits being - * set. FreeRTOS does not allow nondeterministic operations to be performed in - * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() - * sends a message to the timer task to have the set operation performed in the - * context of the timer task - where a scheduler lock is used in place of a - * critical section. - * - * @param xEventGroup The event group in which the bits are to be set. - * - * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. - * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 - * and bit 0 set uxBitsToSet to 0x09. - * - * @param pxHigherPriorityTaskWoken As mentioned above, calling this function - * will result in a message being sent to the timer daemon task. If the - * priority of the timer daemon task is higher than the priority of the - * currently running task (the task the interrupt interrupted) then - * *pxHigherPriorityTaskWoken will be set to pdTRUE by - * xEventGroupSetBitsFromISR(), indicating that a context switch should be - * requested before the interrupt exits. For that reason - * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the - * example code below. - * - * @return If the request to execute the function was posted successfully then - * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned - * if the timer service queue was full. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   // An event group which it is assumed has already been created by a call to
-   // xEventGroupCreate().
-   EventGroupHandle_t xEventGroup;
-
-   void anInterruptHandler( void )
-   {
-   BaseType_t xHigherPriorityTaskWoken, xResult;
-
-		// xHigherPriorityTaskWoken must be initialised to pdFALSE.
-		xHigherPriorityTaskWoken = pdFALSE;
-
-		// Set bit 0 and bit 4 in xEventGroup.
-		xResult = xEventGroupSetBitsFromISR(
-							xEventGroup,	// The event group being updated.
-							BIT_0 | BIT_4   // The bits being set.
-							&xHigherPriorityTaskWoken );
-
-		// Was the message posted successfully?
-		if( xResult == pdPASS )
-		{
-			// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
-			// switch should be requested.  The macro used is port specific and
-			// will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
-			// refer to the documentation page for the port being used.
-			portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-		}
-  }
-
- * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR - * \ingroup EventGroup - */ -#if( configUSE_TRACE_FACILITY == 1 ) - BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; -#else - #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ) -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupSync(	EventGroupHandle_t xEventGroup,
-									const EventBits_t uxBitsToSet,
-									const EventBits_t uxBitsToWaitFor,
-									TickType_t xTicksToWait );
-
- * - * Atomically set bits within an event group, then wait for a combination of - * bits to be set within the same event group. This functionality is typically - * used to synchronise multiple tasks, where each task has to wait for the other - * tasks to reach a synchronisation point before proceeding. - * - * This function cannot be used from an interrupt. - * - * The function will return before its block time expires if the bits specified - * by the uxBitsToWait parameter are set, or become set within that time. In - * this case all the bits specified by uxBitsToWait will be automatically - * cleared before the function returns. - * - * @param xEventGroup The event group in which the bits are being tested. The - * event group must have previously been created using a call to - * xEventGroupCreate(). - * - * @param uxBitsToSet The bits to set in the event group before determining - * if, and possibly waiting for, all the bits specified by the uxBitsToWait - * parameter are set. - * - * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test - * inside the event group. For example, to wait for bit 0 and bit 2 set - * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set - * uxBitsToWaitFor to 0x07. Etc. - * - * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait - * for all of the bits specified by uxBitsToWaitFor to become set. - * - * @return The value of the event group at the time either the bits being waited - * for became set, or the block time expired. Test the return value to know - * which bits were set. If xEventGroupSync() returned because its timeout - * expired then not all the bits being waited for will be set. If - * xEventGroupSync() returned because all the bits it was waiting for were - * set then the returned value is the event group value before any bits were - * automatically cleared. - * - * Example usage: - 
- // Bits used by the three tasks.
- #define TASK_0_BIT		( 1 << 0 )
- #define TASK_1_BIT		( 1 << 1 )
- #define TASK_2_BIT		( 1 << 2 )
-
- #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
-
- // Use an event group to synchronise three tasks.  It is assumed this event
- // group has already been created elsewhere.
- EventGroupHandle_t xEventBits;
-
- void vTask0( void *pvParameters )
- {
- EventBits_t uxReturn;
- TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
-
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 0 in the event flag to note this task has reached the
-		// sync point.  The other two tasks will set the other two bits defined
-		// by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
-		// point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
-		// for this to happen.
-		uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
-
-		if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
-		{
-			// All three tasks reached the synchronisation point before the call
-			// to xEventGroupSync() timed out.
-		}
-	}
- }
-
- void vTask1( void *pvParameters )
- {
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 1 in the event flag to note this task has reached the
-		// synchronisation point.  The other two tasks will set the other two
-		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
-		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
-		// indefinitely for this to happen.
-		xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
-
-		// xEventGroupSync() was called with an indefinite block time, so
-		// this task will only reach here if the syncrhonisation was made by all
-		// three tasks, so there is no need to test the return value.
-	 }
- }
-
- void vTask2( void *pvParameters )
- {
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 2 in the event flag to note this task has reached the
-		// synchronisation point.  The other two tasks will set the other two
-		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
-		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
-		// indefinitely for this to happen.
-		xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
-
-		// xEventGroupSync() was called with an indefinite block time, so
-		// this task will only reach here if the syncrhonisation was made by all
-		// three tasks, so there is no need to test the return value.
-	}
- }
-
-
- * \defgroup xEventGroupSync xEventGroupSync - * \ingroup EventGroup - */ -EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - - -/** - * event_groups.h - *
-	EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
-
- * - * Returns the current value of the bits in an event group. This function - * cannot be used from an interrupt. - * - * @param xEventGroup The event group being queried. - * - * @return The event group bits at the time xEventGroupGetBits() was called. - * - * \defgroup xEventGroupGetBits xEventGroupGetBits - * \ingroup EventGroup - */ -#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) - -/** - * event_groups.h - *
-	EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
-
- * - * A version of xEventGroupGetBits() that can be called from an ISR. - * - * @param xEventGroup The event group being queried. - * - * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. - * - * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR - * \ingroup EventGroup - */ -EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	void xEventGroupDelete( EventGroupHandle_t xEventGroup );
-
- * - * Delete an event group that was previously created by a call to - * xEventGroupCreate(). Tasks that are blocked on the event group will be - * unblocked and obtain 0 as the event group's value. - * - * @param xEventGroup The event group being deleted. - */ -void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; - -/* For internal use only. */ -void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; -void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; - - -#if (configUSE_TRACE_FACILITY == 1) - UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION; -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* EVENT_GROUPS_H */ - - diff --git a/ports/cc3200/FreeRTOS/Source/include/list.h b/ports/cc3200/FreeRTOS/Source/include/list.h deleted file mode 100644 index a080d27def..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/list.h +++ /dev/null @@ -1,453 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - -#ifndef INC_FREERTOS_H - #error FreeRTOS.h must be included before list.h -#endif - -#ifndef LIST_H -#define LIST_H - -/* - * The list structure members are modified from within interrupts, and therefore - * by rights should be declared volatile. However, they are only modified in a - * functionally atomic way (within critical sections of with the scheduler - * suspended) and are either passed by reference into a function or indexed via - * a volatile variable. Therefore, in all use cases tested so far, the volatile - * qualifier can be omitted in order to provide a moderate performance - * improvement without adversely affecting functional behaviour. The assembly - * instructions generated by the IAR, ARM and GCC compilers when the respective - * compiler's options were set for maximum optimisation has been inspected and - * deemed to be as intended. That said, as compiler technology advances, and - * especially if aggressive cross module optimisation is used (a use case that - * has not been exercised to any great extend) then it is feasible that the - * volatile qualifier will be needed for correct optimisation. It is expected - * that a compiler removing essential code because, without the volatile - * qualifier on the list structure members and with aggressive cross module - * optimisation, the compiler deemed the code unnecessary will result in - * complete and obvious failure of the scheduler. If this is ever experienced - * then the volatile qualifier can be inserted in the relevant places within the - * list structures by simply defining configLIST_VOLATILE to volatile in - * FreeRTOSConfig.h (as per the example at the bottom of this comment block). - * If configLIST_VOLATILE is not defined then the preprocessor directives below - * will simply #define configLIST_VOLATILE away completely. - * - * To use volatile list structure members then add the following line to - * FreeRTOSConfig.h (without the quotes): - * "#define configLIST_VOLATILE volatile" - */ -#ifndef configLIST_VOLATILE - #define configLIST_VOLATILE -#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Macros that can be used to place known values within the list structures, -then check that the known values do not get corrupted during the execution of -the application. These may catch the list data structures being overwritten in -memory. They will not catch data errors caused by incorrect configuration or -use of FreeRTOS.*/ -#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) - /* Define the macros to do nothing. */ - #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE - #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE - #define listFIRST_LIST_INTEGRITY_CHECK_VALUE - #define listSECOND_LIST_INTEGRITY_CHECK_VALUE - #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) - #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) - #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) - #define listTEST_LIST_INTEGRITY( pxList ) -#else - /* Define macros that add new members into the list structures. */ - #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; - #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; - #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; - #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; - - /* Define macros that set the new structure members to known values. */ - #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - - /* Define macros that will assert if one of the structure members does not - contain its expected value. */ - #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) - #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) -#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ - - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ - struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * configLIST_VOLATILE pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ - listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ -}; -typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE TickType_t xItemValue; - struct xLIST_ITEM * configLIST_VOLATILE pxNext; - struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; -}; -typedef struct xMINI_LIST_ITEM MiniListItem_t; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE UBaseType_t uxNumberOfItems; - ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ - MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ - listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ -} List_t; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) - -/* - * Access macro to get the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) - -/* - * Access macro to retrieve the value of the list item. The value can - * represent anything - for example the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to retrieve the value of the list item at the head of a given - * list. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) - -/* - * Return the list item at the head of the list. - * - * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) - -/* - * Return the list item at the head of the list. - * - * \page listGET_NEXT listGET_NEXT - * \ingroup LinkedList - */ -#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) - -/* - * Return the list item that marks the end of the list - * - * \page listGET_END_MARKER listGET_END_MARKER - * \ingroup LinkedList - */ -#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( BaseType_t ) ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entry's pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxTCB pxTCB is set to the address of the owner of the next list item. - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ -{ \ -List_t * const pxConstList = ( pxList ); \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ - { \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - } \ - ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ -} - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE if the list item is in the list, otherwise pdFALSE. - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( BaseType_t ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) ) ) - -/* - * Return the list a list item is contained within (referenced from). - * - * @param pxListItem The list item being queried. - * @return A pointer to the List_t object that references the pxListItem - */ -#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pvContainer ) - -/* - * This provides a crude means of knowing if a list has been initialised, as - * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() - * function. - */ -#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION; - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION; - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pxIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pxIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param uxListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * @return The number of items that remain in the list after the list item has - * been removed. - * - * \page uxListRemove uxListRemove - * \ingroup LinkedList - */ -UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; - -#ifdef __cplusplus -} -#endif - -#endif - diff --git a/ports/cc3200/FreeRTOS/Source/include/mpu_prototypes.h b/ports/cc3200/FreeRTOS/Source/include/mpu_prototypes.h deleted file mode 100644 index 8f7500b022..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/mpu_prototypes.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* - * When the MPU is used the standard (non MPU) API functions are mapped to - * equivalents that start "MPU_", the prototypes for which are defined in this - * header files. This will cause the application code to call the MPU_ version - * which wraps the non-MPU version with privilege promoting then demoting code, - * so the kernel code always runs will full privileges. - */ - - -#ifndef MPU_PROTOTYPES_H -#define MPU_PROTOTYPES_H - -/* MPU versions of tasks.h API function. */ -BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ); -TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ); -BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ); -void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ); -void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ); -void MPU_vTaskDelay( const TickType_t xTicksToDelay ); -void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ); -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ); -UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t xTask ); -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ); -void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ); -void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ); -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ); -void MPU_vTaskResume( TaskHandle_t xTaskToResume ); -void MPU_vTaskStartScheduler( void ); -void MPU_vTaskSuspendAll( void ); -BaseType_t MPU_xTaskResumeAll( void ); -TickType_t MPU_xTaskGetTickCount( void ); -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ); -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ); -TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ); -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ); -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ); -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ); -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ); -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ); -BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ); -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ); -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ); -void MPU_vTaskList( char * pcWriteBuffer ); -void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ); -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ); -BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ); -uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ); -BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ); -BaseType_t MPU_xTaskIncrementTick( void ); -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ); -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ); -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ); -void MPU_vTaskMissedYield( void ); -BaseType_t MPU_xTaskGetSchedulerState( void ); - -/* MPU versions of queue.h API function. */ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ); -BaseType_t MPU_xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeek ); -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ); -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ); -void MPU_vQueueDelete( QueueHandle_t xQueue ); -QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ); -QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ); -QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ); -QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ); -void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ); -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ); -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ); -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ); -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ); -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ); -QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ); -QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ); -QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ); -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ); -BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ); -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ); -BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ); -void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ); -UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ); -uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ); - -/* MPU versions of timers.h API function. */ -TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ); -TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ); -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ); -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ); -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ); -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ); -BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ); -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ); -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ); -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ); -BaseType_t MPU_xTimerCreateTimerTask( void ); -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ); - -/* MPU versions of event_group.h API function. */ -EventGroupHandle_t MPU_xEventGroupCreate( void ); -EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ); -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ); -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ); -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ); -void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ); -UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ); - -#endif /* MPU_PROTOTYPES_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/mpu_wrappers.h b/ports/cc3200/FreeRTOS/Source/include/mpu_wrappers.h deleted file mode 100644 index 78f5a9aea1..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/mpu_wrappers.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef MPU_WRAPPERS_H -#define MPU_WRAPPERS_H - -/* This file redefines API functions to be called through a wrapper macro, but -only for ports that are using the MPU. */ -#ifdef portUSING_MPU_WRAPPERS - - /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is - included from queue.c or task.c to prevent it from having an effect within - those files. */ - #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - - /* - * Map standard (non MPU) API functions to equivalents that start - * "MPU_". This will cause the application code to call the MPU_ - * version, which wraps the non-MPU version with privilege promoting - * then demoting code, so the kernel code always runs will full - * privileges. - */ - - /* Map standard tasks.h API functions to the MPU equivalents. */ - #define xTaskCreate MPU_xTaskCreate - #define xTaskCreateStatic MPU_xTaskCreateStatic - #define xTaskCreateRestricted MPU_xTaskCreateRestricted - #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions - #define vTaskDelete MPU_vTaskDelete - #define vTaskDelay MPU_vTaskDelay - #define vTaskDelayUntil MPU_vTaskDelayUntil - #define xTaskAbortDelay MPU_xTaskAbortDelay - #define uxTaskPriorityGet MPU_uxTaskPriorityGet - #define eTaskGetState MPU_eTaskGetState - #define vTaskGetInfo MPU_vTaskGetInfo - #define vTaskPrioritySet MPU_vTaskPrioritySet - #define vTaskSuspend MPU_vTaskSuspend - #define vTaskResume MPU_vTaskResume - #define vTaskSuspendAll MPU_vTaskSuspendAll - #define xTaskResumeAll MPU_xTaskResumeAll - #define xTaskGetTickCount MPU_xTaskGetTickCount - #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks - #define pcTaskGetName MPU_pcTaskGetName - #define xTaskGetHandle MPU_xTaskGetHandle - #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark - #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag - #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag - #define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer - #define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer - #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook - #define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle - #define uxTaskGetSystemState MPU_uxTaskGetSystemState - #define vTaskList MPU_vTaskList - #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats - #define xTaskGenericNotify MPU_xTaskGenericNotify - #define xTaskNotifyWait MPU_xTaskNotifyWait - #define ulTaskNotifyTake MPU_ulTaskNotifyTake - #define xTaskNotifyStateClear MPU_xTaskNotifyStateClear - - #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle - #define vTaskSetTimeOutState MPU_vTaskSetTimeOutState - #define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut - #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState - - /* Map standard queue.h API functions to the MPU equivalents. */ - #define xQueueGenericSend MPU_xQueueGenericSend - #define xQueueGenericReceive MPU_xQueueGenericReceive - #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting - #define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable - #define vQueueDelete MPU_vQueueDelete - #define xQueueCreateMutex MPU_xQueueCreateMutex - #define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic - #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore - #define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic - #define xQueueGetMutexHolder MPU_xQueueGetMutexHolder - #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive - #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive - #define xQueueGenericCreate MPU_xQueueGenericCreate - #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic - #define xQueueCreateSet MPU_xQueueCreateSet - #define xQueueAddToSet MPU_xQueueAddToSet - #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet - #define xQueueSelectFromSet MPU_xQueueSelectFromSet - #define xQueueGenericReset MPU_xQueueGenericReset - - #if( configQUEUE_REGISTRY_SIZE > 0 ) - #define vQueueAddToRegistry MPU_vQueueAddToRegistry - #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue - #define pcQueueGetName MPU_pcQueueGetName - #endif - - /* Map standard timer.h API functions to the MPU equivalents. */ - #define xTimerCreate MPU_xTimerCreate - #define xTimerCreateStatic MPU_xTimerCreateStatic - #define pvTimerGetTimerID MPU_pvTimerGetTimerID - #define vTimerSetTimerID MPU_vTimerSetTimerID - #define xTimerIsTimerActive MPU_xTimerIsTimerActive - #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle - #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall - #define pcTimerGetName MPU_pcTimerGetName - #define xTimerGetPeriod MPU_xTimerGetPeriod - #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime - #define xTimerGenericCommand MPU_xTimerGenericCommand - - /* Map standard event_group.h API functions to the MPU equivalents. */ - #define xEventGroupCreate MPU_xEventGroupCreate - #define xEventGroupCreateStatic MPU_xEventGroupCreateStatic - #define xEventGroupWaitBits MPU_xEventGroupWaitBits - #define xEventGroupClearBits MPU_xEventGroupClearBits - #define xEventGroupSetBits MPU_xEventGroupSetBits - #define xEventGroupSync MPU_xEventGroupSync - #define vEventGroupDelete MPU_vEventGroupDelete - - /* Remove the privileged function macro. */ - #define PRIVILEGED_FUNCTION - - #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ - - /* Ensure API functions go in the privileged execution section. */ - #define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions"))) - #define PRIVILEGED_DATA __attribute__((section("privileged_data"))) - - #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ - -#else /* portUSING_MPU_WRAPPERS */ - - #define PRIVILEGED_FUNCTION - #define PRIVILEGED_DATA - #define portUSING_MPU_WRAPPERS 0 - -#endif /* portUSING_MPU_WRAPPERS */ - - -#endif /* MPU_WRAPPERS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/portable.h b/ports/cc3200/FreeRTOS/Source/include/portable.h deleted file mode 100644 index b9f8be39dd..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/portable.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Each FreeRTOS port has a unique portmacro.h header file. Originally a -pre-processor definition was used to ensure the pre-processor found the correct -portmacro.h file for the port being used. That scheme was deprecated in favour -of setting the compiler's include path such that it found the correct -portmacro.h file - removing the need for the constant and allowing the -portmacro.h file to be located anywhere in relation to the port being used. -Purely for reasons of backward compatibility the old method is still valid, but -to make it clear that new projects should not use it, support for the port -specific constants has been moved into the deprecated_definitions.h header -file. */ -#include "deprecated_definitions.h" - -/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h -did not result in a portmacro.h header file being included - and it should be -included here. In this case the path to the correct portmacro.h header file -must be set in the compiler's include path. */ -#ifndef portENTER_CRITICAL - #include "portmacro.h" -#endif - -#if portBYTE_ALIGNMENT == 32 - #define portBYTE_ALIGNMENT_MASK ( 0x001f ) -#endif - -#if portBYTE_ALIGNMENT == 16 - #define portBYTE_ALIGNMENT_MASK ( 0x000f ) -#endif - -#if portBYTE_ALIGNMENT == 8 - #define portBYTE_ALIGNMENT_MASK ( 0x0007 ) -#endif - -#if portBYTE_ALIGNMENT == 4 - #define portBYTE_ALIGNMENT_MASK ( 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define portBYTE_ALIGNMENT_MASK ( 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define portBYTE_ALIGNMENT_MASK ( 0x0000 ) -#endif - -#ifndef portBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -#ifndef portNUM_CONFIGURABLE_REGIONS - #define portNUM_CONFIGURABLE_REGIONS 1 -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#include "mpu_wrappers.h" - -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - * - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; -#else - StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION; -#endif - -/* Used by heap_5.c. */ -typedef struct HeapRegion -{ - uint8_t *pucStartAddress; - size_t xSizeInBytes; -} HeapRegion_t; - -/* - * Used to define multiple heap regions for use by heap_5.c. This function - * must be called before any calls to pvPortMalloc() - not creating a task, - * queue, semaphore, mutex, software timer, event group, etc. will result in - * pvPortMalloc being called. - * - * pxHeapRegions passes in an array of HeapRegion_t structures - each of which - * defines a region of memory that can be used as the heap. The array is - * terminated by a HeapRegions_t structure that has a size of 0. The region - * with the lowest start address must appear first in the array. - */ -void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION; - - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION; -void vPortFree( void *pv ) PRIVILEGED_FUNCTION; -void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; -size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; -size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION; - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION; - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ) PRIVILEGED_FUNCTION; - -/* - * The structures and methods of manipulating the MPU are contained within the - * port layer. - * - * Fills the xMPUSettings structure with the memory region information - * contained in xRegions. - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - struct xMEMORY_REGION; - void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION; -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* PORTABLE_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/projdefs.h b/ports/cc3200/FreeRTOS/Source/include/projdefs.h deleted file mode 100644 index 0b63fd8a9f..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/projdefs.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* - * Defines the prototype to which task functions must conform. Defined in this - * file to ensure the type is known before portable.h is included. - */ -typedef void (*TaskFunction_t)( void * ); - -/* Converts a time in milliseconds to a time in ticks. This macro can be -overridden by a macro of the same name defined in FreeRTOSConfig.h in case the -definition here is not suitable for your application. */ -#ifndef pdMS_TO_TICKS - #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) ) -#endif - -#define pdFALSE ( ( BaseType_t ) 0 ) -#define pdTRUE ( ( BaseType_t ) 1 ) - -#define pdPASS ( pdTRUE ) -#define pdFAIL ( pdFALSE ) -#define errQUEUE_EMPTY ( ( BaseType_t ) 0 ) -#define errQUEUE_FULL ( ( BaseType_t ) 0 ) - -/* FreeRTOS error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -/* Macros used for basic data corruption checks. */ -#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0 -#endif - -#if( configUSE_16_BIT_TICKS == 1 ) - #define pdINTEGRITY_CHECK_VALUE 0x5a5a -#else - #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL -#endif - -/* The following errno values are used by FreeRTOS+ components, not FreeRTOS -itself. */ -#define pdFREERTOS_ERRNO_NONE 0 /* No errors */ -#define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */ -#define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */ -#define pdFREERTOS_ERRNO_EIO 5 /* I/O error */ -#define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */ -#define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */ -#define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */ -#define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */ -#define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */ -#define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */ -#define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */ -#define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */ -#define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */ -#define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */ -#define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */ -#define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */ -#define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */ -#define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */ -#define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */ -#define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */ -#define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */ -#define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */ -#define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */ -#define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */ -#define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */ -#define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */ -#define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */ -#define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ -#define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */ -#define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */ -#define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */ -#define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */ -#define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */ -#define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */ -#define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */ -#define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */ -#define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */ -#define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */ -#define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ -#define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */ - -/* The following endian values are used by FreeRTOS+ components, not FreeRTOS -itself. */ -#define pdFREERTOS_LITTLE_ENDIAN 0 -#define pdFREERTOS_BIG_ENDIAN 1 - -#endif /* PROJDEFS_H */ - - - diff --git a/ports/cc3200/FreeRTOS/Source/include/queue.h b/ports/cc3200/FreeRTOS/Source/include/queue.h deleted file mode 100644 index 30be360136..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/queue.h +++ /dev/null @@ -1,1798 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - - -#ifndef QUEUE_H -#define QUEUE_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include queue.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * Type by which queues are referenced. For example, a call to xQueueCreate() - * returns an QueueHandle_t variable that can then be used as a parameter to - * xQueueSend(), xQueueReceive(), etc. - */ -typedef void * QueueHandle_t; - -/** - * Type by which queue sets are referenced. For example, a call to - * xQueueCreateSet() returns an xQueueSet variable that can then be used as a - * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc. - */ -typedef void * QueueSetHandle_t; - -/** - * Queue sets can contain both queues and semaphores, so the - * QueueSetMemberHandle_t is defined as a type to be used where a parameter or - * return value can be either an QueueHandle_t or an SemaphoreHandle_t. - */ -typedef void * QueueSetMemberHandle_t; - -/* For internal use only. */ -#define queueSEND_TO_BACK ( ( BaseType_t ) 0 ) -#define queueSEND_TO_FRONT ( ( BaseType_t ) 1 ) -#define queueOVERWRITE ( ( BaseType_t ) 2 ) - -/* For internal use only. These definitions *must* match those in queue.c. */ -#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U ) -#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U ) -#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U ) -#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U ) -#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U ) -#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U ) - -/** - * queue. h - * 
- QueueHandle_t xQueueCreate(
-							  UBaseType_t uxQueueLength,
-							  UBaseType_t uxItemSize
-						  );
- *
- * - * Creates a new queue instance, and returns a handle by which the new queue - * can be referenced. - * - * Internally, within the FreeRTOS implementation, queues use two blocks of - * memory. The first block is used to hold the queue's data structures. The - * second block is used to hold items placed into the queue. If a queue is - * created using xQueueCreate() then both blocks of memory are automatically - * dynamically allocated inside the xQueueCreate() function. (see - * http://www.freertos.org/a00111.html). If a queue is created using - * xQueueCreateStatic() then the application writer must provide the memory that - * will get used by the queue. xQueueCreateStatic() therefore allows a queue to - * be created without using any dynamic memory allocation. - * - * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-	if( xQueue1 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue2 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) ) -#endif - -/** - * queue. h - * 
- QueueHandle_t xQueueCreateStatic(
-							  UBaseType_t uxQueueLength,
-							  UBaseType_t uxItemSize,
-							  uint8_t *pucQueueStorageBuffer,
-							  StaticQueue_t *pxQueueBuffer
-						  );
- *
- * - * Creates a new queue instance, and returns a handle by which the new queue - * can be referenced. - * - * Internally, within the FreeRTOS implementation, queues use two blocks of - * memory. The first block is used to hold the queue's data structures. The - * second block is used to hold items placed into the queue. If a queue is - * created using xQueueCreate() then both blocks of memory are automatically - * dynamically allocated inside the xQueueCreate() function. (see - * http://www.freertos.org/a00111.html). If a queue is created using - * xQueueCreateStatic() then the application writer must provide the memory that - * will get used by the queue. xQueueCreateStatic() therefore allows a queue to - * be created without using any dynamic memory allocation. - * - * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @param pucQueueStorageBuffer If uxItemSize is not zero then - * pucQueueStorageBuffer must point to a uint8_t array that is at least large - * enough to hold the maximum number of items that can be in the queue at any - * one time - which is ( uxQueueLength * uxItemsSize ) bytes. If uxItemSize is - * zero then pucQueueStorageBuffer can be NULL. - * - * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which - * will be used to hold the queue's data structure. - * - * @return If the queue is created then a handle to the created queue is - * returned. If pxQueueBuffer is NULL then NULL is returned. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- #define QUEUE_LENGTH 10
- #define ITEM_SIZE sizeof( uint32_t )
-
- // xQueueBuffer will hold the queue structure.
- StaticQueue_t xQueueBuffer;
-
- // ucQueueStorage will hold the items posted to the queue.  Must be at least
- // [(queue length) * ( queue item size)] bytes long.
- uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
-							ITEM_SIZE	  // The size of each item in the queue
-							&( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
-							&xQueueBuffer ); // The buffer that will hold the queue structure.
-
-	// The queue is guaranteed to be created successfully as no dynamic memory
-	// allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueCreateStatic xQueueCreateStatic - * \ingroup QueueManagement - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * queue. h - * 
- BaseType_t xQueueSendToToFront(
-								   QueueHandle_t	xQueue,
-								   const void		*pvItemToQueue,
-								   TickType_t		xTicksToWait
-							   );
- *
- * - * This is a macro that calls xQueueGenericSend(). - * - * Post an item to the front of a queue. The item is queued by copy, not by - * reference. This function must not be called from an interrupt service - * routine. See xQueueSendFromISR () for an alternative which may be used - * in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT ) - -/** - * queue. h - * 
- BaseType_t xQueueSendToBack(
-								   QueueHandle_t	xQueue,
-								   const void		*pvItemToQueue,
-								   TickType_t		xTicksToWait
-							   );
- *
- * - * This is a macro that calls xQueueGenericSend(). - * - * Post an item to the back of a queue. The item is queued by copy, not by - * reference. This function must not be called from an interrupt service - * routine. See xQueueSendFromISR () for an alternative which may be used - * in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the queue - * is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueSend(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue,
-							  TickType_t xTicksToWait
-						 );
- *
- * - * This is a macro that calls xQueueGenericSend(). It is included for - * backward compatibility with versions of FreeRTOS.org that did not - * include the xQueueSendToFront() and xQueueSendToBack() macros. It is - * equivalent to xQueueSendToBack(). - * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueOverwrite(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue
-						 );
- *
- * - * Only for use with queues that have a length of one - so the queue is either - * empty or full. - * - * Post an item on a queue. If the queue is already full then overwrite the - * value held in the queue. The item is queued by copy, not by reference. - * - * This function must not be called from an interrupt service routine. - * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle of the queue to which the data is being sent. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and - * therefore has the same return values as xQueueSendToFront(). However, pdPASS - * is the only value that can be returned because xQueueOverwrite() will write - * to the queue even when the queue is already full. - * - * Example usage: - 
-
- void vFunction( void *pvParameters )
- {
- QueueHandle_t xQueue;
- uint32_t ulVarToSend, ulValReceived;
-
-	// Create a queue to hold one uint32_t value.  It is strongly
-	// recommended *not* to use xQueueOverwrite() on queues that can
-	// contain more than one value, and doing so will trigger an assertion
-	// if configASSERT() is defined.
-	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
-
-	// Write the value 10 to the queue using xQueueOverwrite().
-	ulVarToSend = 10;
-	xQueueOverwrite( xQueue, &ulVarToSend );
-
-	// Peeking the queue should now return 10, but leave the value 10 in
-	// the queue.  A block time of zero is used as it is known that the
-	// queue holds a value.
-	ulValReceived = 0;
-	xQueuePeek( xQueue, &ulValReceived, 0 );
-
-	if( ulValReceived != 10 )
-	{
-		// Error unless the item was removed by a different task.
-	}
-
-	// The queue is still full.  Use xQueueOverwrite() to overwrite the
-	// value held in the queue with 100.
-	ulVarToSend = 100;
-	xQueueOverwrite( xQueue, &ulVarToSend );
-
-	// This time read from the queue, leaving the queue empty once more.
-	// A block time of 0 is used again.
-	xQueueReceive( xQueue, &ulValReceived, 0 );
-
-	// The value read should be the last value written, even though the
-	// queue was already full when the value was written.
-	if( ulValReceived != 100 )
-	{
-		// Error!
-	}
-
-	// ...
-}
-
- * \defgroup xQueueOverwrite xQueueOverwrite - * \ingroup QueueManagement - */ -#define xQueueOverwrite( xQueue, pvItemToQueue ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE ) - - -/** - * queue. h - * 
- BaseType_t xQueueGenericSend(
-									QueueHandle_t xQueue,
-									const void * pvItemToQueue,
-									TickType_t xTicksToWait
-									BaseType_t xCopyPosition
-								);
- *
- * - * It is preferred that the macros xQueueSend(), xQueueSendToFront() and - * xQueueSendToBack() are used in place of calling this function directly. - * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the - * item at the back of the queue, or queueSEND_TO_FRONT to place the item - * at the front of the queue (for high priority messages). - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueuePeek(
-							 QueueHandle_t xQueue,
-							 void *pvBuffer,
-							 TickType_t xTicksToWait
-						 );
- * - * This is a macro that calls the xQueueGenericReceive() function. - * - * Receive an item from a queue without removing the item from the queue. - * The item is received by copy so a buffer of adequate size must be - * provided. The number of bytes copied into the buffer was defined when - * the queue was created. - * - * Successfully received items remain on the queue so will be returned again - * by the next call, or a call to xQueueReceive(). - * - * This macro must not be used in an interrupt service routine. See - * xQueuePeekFromISR() for an alternative that can be called from an interrupt - * service routine. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue - * is empty. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to peek the data from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Peek a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask, but the item still remains on the queue.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -#define xQueuePeek( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdTRUE ) - -/** - * queue. h - * 
- BaseType_t xQueuePeekFromISR(
-									QueueHandle_t xQueue,
-									void *pvBuffer,
-								);
- * - * A version of xQueuePeek() that can be called from an interrupt service - * routine (ISR). - * - * Receive an item from a queue without removing the item from the queue. - * The item is received by copy so a buffer of adequate size must be - * provided. The number of bytes copied into the buffer was defined when - * the queue was created. - * - * Successfully received items remain on the queue so will be returned again - * by the next call, or a call to xQueueReceive(). - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * \defgroup xQueuePeekFromISR xQueuePeekFromISR - * \ingroup QueueManagement - */ -BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueueReceive(
-								 QueueHandle_t xQueue,
-								 void *pvBuffer,
-								 TickType_t xTicksToWait
-							);
- * - * This is a macro that calls the xQueueGenericReceive() function. - * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * Successfully received items are removed from the queue. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. xQueueReceive() will return immediately if xTicksToWait - * is zero and the queue is empty. The time is defined in tick periods so the - * constant portTICK_PERIOD_MS should be used to convert to real time if this is - * required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -#define xQueueReceive( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdFALSE ) - - -/** - * queue. h - * 
- BaseType_t xQueueGenericReceive(
-									   QueueHandle_t	xQueue,
-									   void	*pvBuffer,
-									   TickType_t	xTicksToWait
-									   BaseType_t	xJustPeek
-									);
- * - * It is preferred that the macro xQueueReceive() be used rather than calling - * this function directly. - * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * xQueueGenericReceive() will return immediately if the queue is empty and - * xTicksToWait is 0. - * - * @param xJustPeek When set to true, the item received from the queue is not - * actually removed from the queue - meaning a subsequent call to - * xQueueReceive() will return the same item. When set to false, the item - * being received from the queue is also removed from the queue. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -BaseType_t xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeek ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
- * - * Return the number of free spaces available in a queue. This is equal to the - * number of items that can be sent to the queue before the queue becomes full - * if no items are removed. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of spaces available in the queue. - * - * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
void vQueueDelete( QueueHandle_t xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \defgroup vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueueSendToFrontFromISR(
-										 QueueHandle_t xQueue,
-										 const void *pvItemToQueue,
-										 BaseType_t *pxHigherPriorityTaskWoken
-									  );
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). - * - * Post an item to the front of a queue. It is safe to use this macro from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendToFromFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPrioritTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT ) - - -/** - * queue. h - * 
- BaseType_t xQueueSendToBackFromISR(
-										 QueueHandle_t xQueue,
-										 const void *pvItemToQueue,
-										 BaseType_t *pxHigherPriorityTaskWoken
-									  );
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). - * - * Post an item to the back of a queue. It is safe to use this macro from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueOverwriteFromISR(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue,
-							  BaseType_t *pxHigherPriorityTaskWoken
-						 );
- *
- * - * A version of xQueueOverwrite() that can be used in an interrupt service - * routine (ISR). - * - * Only for use with queues that can hold a single item - so the queue is either - * empty or full. - * - * Post an item on a queue. If the queue is already full then overwrite the - * value held in the queue. The item is queued by copy, not by reference. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueOverwriteFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return xQueueOverwriteFromISR() is a macro that calls - * xQueueGenericSendFromISR(), and therefore has the same return values as - * xQueueSendToFrontFromISR(). However, pdPASS is the only value that can be - * returned because xQueueOverwriteFromISR() will write to the queue even when - * the queue is already full. - * - * Example usage: - 
-
- QueueHandle_t xQueue;
-
- void vFunction( void *pvParameters )
- {
- 	// Create a queue to hold one uint32_t value.  It is strongly
-	// recommended *not* to use xQueueOverwriteFromISR() on queues that can
-	// contain more than one value, and doing so will trigger an assertion
-	// if configASSERT() is defined.
-	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
-}
-
-void vAnInterruptHandler( void )
-{
-// xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
-BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-uint32_t ulVarToSend, ulValReceived;
-
-	// Write the value 10 to the queue using xQueueOverwriteFromISR().
-	ulVarToSend = 10;
-	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
-
-	// The queue is full, but calling xQueueOverwriteFromISR() again will still
-	// pass because the value held in the queue will be overwritten with the
-	// new value.
-	ulVarToSend = 100;
-	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
-
-	// Reading from the queue will now return 100.
-
-	// ...
-
-	if( xHigherPrioritytaskWoken == pdTRUE )
-	{
-		// Writing to the queue caused a task to unblock and the unblocked task
-		// has a priority higher than or equal to the priority of the currently
-		// executing task (the task this interrupt interrupted).  Perform a context
-		// switch so this interrupt returns directly to the unblocked task.
-		portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
-	}
-}
-
- * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR - * \ingroup QueueManagement - */ -#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE ) - -/** - * queue. h - * 
- BaseType_t xQueueSendFromISR(
-									 QueueHandle_t xQueue,
-									 const void *pvItemToQueue,
-									 BaseType_t *pxHigherPriorityTaskWoken
-								);
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). It is included - * for backward compatibility with versions of FreeRTOS.org that did not - * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR() - * macros. - * - * Post an item to the back of a queue. It is safe to use this function from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		// Actual macro used here is port specific.
-		portYIELD_FROM_ISR ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueGenericSendFromISR(
-										   QueueHandle_t		xQueue,
-										   const	void	*pvItemToQueue,
-										   BaseType_t	*pxHigherPriorityTaskWoken,
-										   BaseType_t	xCopyPosition
-									   );
-
- * - * It is preferred that the macros xQueueSendFromISR(), - * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place - * of calling this function directly. xQueueGiveFromISR() is an - * equivalent for use by semaphores that don't actually copy any data. - * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the - * item at the back of the queue, or queueSEND_TO_FRONT to place the item - * at the front of the queue (for high priority messages). - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWokenByPost;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWokenByPost = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post each byte.
-		xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.  Note that the
-	// name of the yield function required is port specific.
-	if( xHigherPriorityTaskWokenByPost )
-	{
-		taskYIELD_YIELD_FROM_ISR();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; -BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueueReceiveFromISR(
-									   QueueHandle_t	xQueue,
-									   void	*pvBuffer,
-									   BaseType_t *pxTaskWoken
-								   );
- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
-
- QueueHandle_t xQueue;
-
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- char cValueToPost;
- const TickType_t xTicksToWait = ( TickType_t )0xff;
-
-	// Create a queue capable of containing 10 characters.
-	xQueue = xQueueCreate( 10, sizeof( char ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Post some characters that will be used within an ISR.  If the queue
-	// is full then this task will block for xTicksToWait ticks.
-	cValueToPost = 'a';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
-	cValueToPost = 'b';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
-
-	// ... keep posting characters ... this task may block when the queue
-	// becomes full.
-
-	cValueToPost = 'c';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
- }
-
- // ISR that outputs all the characters received on the queue.
- void vISR_Routine( void )
- {
- BaseType_t xTaskWokenByReceive = pdFALSE;
- char cRxedChar;
-
-	while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-	{
-		// A character was received.  Output the character now.
-		vOutputCharacter( cRxedChar );
-
-		// If removing the character from the queue woke the task that was
-		// posting onto the queue cTaskWokenByReceive will have been set to
-		// pdTRUE.  No matter how many times this loop iterates only one
-		// task will be woken.
-	}
-
-	if( cTaskWokenByPost != ( char ) pdFALSE;
-	{
-		taskYIELD ();
-	}
- }
-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; - -/* - * Utilities to query queues that are safe to use from an ISR. These utilities - * should be used only from witin an ISR, or within a critical section. - */ -BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-routines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken ); -BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken ); -BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait ); -BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait ); - -/* - * For internal use only. Use xSemaphoreCreateMutex(), - * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling - * these functions directly. - */ -QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; -QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION; -QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION; -QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION; -void* xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION; - -/* - * For internal use only. Use xSemaphoreTakeMutexRecursive() or - * xSemaphoreGiveMutexRecursive() instead of calling these functions directly. - */ -BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; -BaseType_t xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) PRIVILEGED_FUNCTION; - -/* - * Reset a queue back to its original empty state. The return value is now - * obsolete and is always set to pdPASS. - */ -#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE ) - -/* - * The registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add - * a queue, semaphore or mutex handle to the registry if you want the handle - * to be available to a kernel aware debugger. If you are not using a kernel - * aware debugger then this function can be ignored. - * - * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the - * registry can hold. configQUEUE_REGISTRY_SIZE must be greater than 0 - * within FreeRTOSConfig.h for the registry to be available. Its value - * does not effect the number of queues, semaphores and mutexes that can be - * created - just the number that the registry can hold. - * - * @param xQueue The handle of the queue being added to the registry. This - * is the handle returned by a call to xQueueCreate(). Semaphore and mutex - * handles can also be passed in here. - * - * @param pcName The name to be associated with the handle. This is the - * name that the kernel aware debugger will display. The queue registry only - * stores a pointer to the string - so the string must be persistent (global or - * preferably in ROM/Flash), not on the stack. - */ -#if( configQUEUE_REGISTRY_SIZE > 0 ) - void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif - -/* - * The registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add - * a queue, semaphore or mutex handle to the registry if you want the handle - * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to - * remove the queue, semaphore or mutex from the register. If you are not using - * a kernel aware debugger then this function can be ignored. - * - * @param xQueue The handle of the queue being removed from the registry. - */ -#if( configQUEUE_REGISTRY_SIZE > 0 ) - void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -#endif - -/* - * The queue registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call pcQueueGetName() to look - * up and return the name of a queue in the queue registry from the queue's - * handle. - * - * @param xQueue The handle of the queue the name of which will be returned. - * @return If the queue is in the registry then a pointer to the name of the - * queue is returned. If the queue is not in the registry then NULL is - * returned. - */ -#if( configQUEUE_REGISTRY_SIZE > 0 ) - const char *pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif - -/* - * Generic version of the function used to creaet a queue using dynamic memory - * allocation. This is called by other functions and macros that create other - * RTOS objects that use the queue structure as their base. - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; -#endif - -/* - * Generic version of the function used to creaet a queue using dynamic memory - * allocation. This is called by other functions and macros that create other - * RTOS objects that use the queue structure as their base. - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; -#endif - -/* - * Queue sets provide a mechanism to allow a task to block (pend) on a read - * operation from multiple queues or semaphores simultaneously. - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * A queue set must be explicitly created using a call to xQueueCreateSet() - * before it can be used. Once created, standard FreeRTOS queues and semaphores - * can be added to the set using calls to xQueueAddToSet(). - * xQueueSelectFromSet() is then used to determine which, if any, of the queues - * or semaphores contained in the set is in a state where a queue read or - * semaphore take operation would be successful. - * - * Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html - * for reasons why queue sets are very rarely needed in practice as there are - * simpler methods of blocking on multiple objects. - * - * Note 2: Blocking on a queue set that contains a mutex will not cause the - * mutex holder to inherit the priority of the blocked task. - * - * Note 3: An additional 4 bytes of RAM is required for each space in a every - * queue added to a queue set. Therefore counting semaphores that have a high - * maximum count value should not be added to a queue set. - * - * Note 4: A receive (in the case of a queue) or take (in the case of a - * semaphore) operation must not be performed on a member of a queue set unless - * a call to xQueueSelectFromSet() has first returned a handle to that set member. - * - * @param uxEventQueueLength Queue sets store events that occur on - * the queues and semaphores contained in the set. uxEventQueueLength specifies - * the maximum number of events that can be queued at once. To be absolutely - * certain that events are not lost uxEventQueueLength should be set to the - * total sum of the length of the queues added to the set, where binary - * semaphores and mutexes have a length of 1, and counting semaphores have a - * length set by their maximum count value. Examples: - * + If a queue set is to hold a queue of length 5, another queue of length 12, - * and a binary semaphore, then uxEventQueueLength should be set to - * (5 + 12 + 1), or 18. - * + If a queue set is to hold three binary semaphores then uxEventQueueLength - * should be set to (1 + 1 + 1 ), or 3. - * + If a queue set is to hold a counting semaphore that has a maximum count of - * 5, and a counting semaphore that has a maximum count of 3, then - * uxEventQueueLength should be set to (5 + 3), or 8. - * - * @return If the queue set is created successfully then a handle to the created - * queue set is returned. Otherwise NULL is returned. - */ -QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION; - -/* - * Adds a queue or semaphore to a queue set that was previously created by a - * call to xQueueCreateSet(). - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * Note 1: A receive (in the case of a queue) or take (in the case of a - * semaphore) operation must not be performed on a member of a queue set unless - * a call to xQueueSelectFromSet() has first returned a handle to that set member. - * - * @param xQueueOrSemaphore The handle of the queue or semaphore being added to - * the queue set (cast to an QueueSetMemberHandle_t type). - * - * @param xQueueSet The handle of the queue set to which the queue or semaphore - * is being added. - * - * @return If the queue or semaphore was successfully added to the queue set - * then pdPASS is returned. If the queue could not be successfully added to the - * queue set because it is already a member of a different queue set then pdFAIL - * is returned. - */ -BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; - -/* - * Removes a queue or semaphore from a queue set. A queue or semaphore can only - * be removed from a set if the queue or semaphore is empty. - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * @param xQueueOrSemaphore The handle of the queue or semaphore being removed - * from the queue set (cast to an QueueSetMemberHandle_t type). - * - * @param xQueueSet The handle of the queue set in which the queue or semaphore - * is included. - * - * @return If the queue or semaphore was successfully removed from the queue set - * then pdPASS is returned. If the queue was not in the queue set, or the - * queue (or semaphore) was not empty, then pdFAIL is returned. - */ -BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; - -/* - * xQueueSelectFromSet() selects from the members of a queue set a queue or - * semaphore that either contains data (in the case of a queue) or is available - * to take (in the case of a semaphore). xQueueSelectFromSet() effectively - * allows a task to block (pend) on a read operation on all the queues and - * semaphores in a queue set simultaneously. - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html - * for reasons why queue sets are very rarely needed in practice as there are - * simpler methods of blocking on multiple objects. - * - * Note 2: Blocking on a queue set that contains a mutex will not cause the - * mutex holder to inherit the priority of the blocked task. - * - * Note 3: A receive (in the case of a queue) or take (in the case of a - * semaphore) operation must not be performed on a member of a queue set unless - * a call to xQueueSelectFromSet() has first returned a handle to that set member. - * - * @param xQueueSet The queue set on which the task will (potentially) block. - * - * @param xTicksToWait The maximum time, in ticks, that the calling task will - * remain in the Blocked state (with other tasks executing) to wait for a member - * of the queue set to be ready for a successful queue read or semaphore take - * operation. - * - * @return xQueueSelectFromSet() will return the handle of a queue (cast to - * a QueueSetMemberHandle_t type) contained in the queue set that contains data, - * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained - * in the queue set that is available, or NULL if no such queue or semaphore - * exists before before the specified block time expires. - */ -QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/* - * A version of xQueueSelectFromSet() that can be used from an ISR. - */ -QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; - -/* Not public API functions. */ -void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION; -BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION; -void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION; -UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - - -#ifdef __cplusplus -} -#endif - -#endif /* QUEUE_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/semphr.h b/ports/cc3200/FreeRTOS/Source/include/semphr.h deleted file mode 100644 index a674b02a41..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/semphr.h +++ /dev/null @@ -1,1171 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include semphr.h" -#endif - -#include "queue.h" - -typedef QueueHandle_t SemaphoreHandle_t; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( uint8_t ) 1U ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( uint8_t ) 0U ) -#define semGIVE_BLOCK_TIME ( ( TickType_t ) 0U ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )
- * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a binary semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the - * xSemaphoreCreateBinary() function. Note that binary semaphores created using - * the vSemaphoreCreateBinary() macro are created in a state such that the - * first call to 'take' the semaphore would pass, whereas binary semaphores - * created using xSemaphoreCreateBinary() are created in a state such that the - * the semaphore must first be 'given' before it can be 'taken'. - * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @param xSemaphore Handle to the created semaphore. Should be of type SemaphoreHandle_t. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define vSemaphoreCreateBinary( xSemaphore ) \ - { \ - ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \ - if( ( xSemaphore ) != NULL ) \ - { \ - ( void ) xSemaphoreGive( ( xSemaphore ) ); \ - } \ - } -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateBinary( void )
- * - * Creates a new binary semaphore instance, and returns a handle by which the - * new semaphore can be referenced. - * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a binary semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, binary semaphores use a block - * of memory, in which the semaphore structure is stored. If a binary semaphore - * is created using xSemaphoreCreateBinary() then the required memory is - * automatically dynamically allocated inside the xSemaphoreCreateBinary() - * function. (see http://www.freertos.org/a00111.html). If a binary semaphore - * is created using xSemaphoreCreateBinaryStatic() then the application writer - * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a - * binary semaphore to be created without using any dynamic memory allocation. - * - * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this - * xSemaphoreCreateBinary() function. Note that binary semaphores created using - * the vSemaphoreCreateBinary() macro are created in a state such that the - * first call to 'take' the semaphore would pass, whereas binary semaphores - * created using xSemaphoreCreateBinary() are created in a state such that the - * the semaphore must first be 'given' before it can be 'taken'. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @return Handle to the created semaphore, or NULL if the memory required to - * hold the semaphore's data structures could not be allocated. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateBinary();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )
- * - * Creates a new binary semaphore instance, and returns a handle by which the - * new semaphore can be referenced. - * - * NOTE: In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a binary semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, binary semaphores use a block - * of memory, in which the semaphore structure is stored. If a binary semaphore - * is created using xSemaphoreCreateBinary() then the required memory is - * automatically dynamically allocated inside the xSemaphoreCreateBinary() - * function. (see http://www.freertos.org/a00111.html). If a binary semaphore - * is created using xSemaphoreCreateBinaryStatic() then the application writer - * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a - * binary semaphore to be created without using any dynamic memory allocation. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, - * which will then be used to hold the semaphore's data structure, removing the - * need for the memory to be allocated dynamically. - * - * @return If the semaphore is created then a handle to the created semaphore is - * returned. If pxSemaphoreBuffer is NULL then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
- StaticSemaphore_t xSemaphoreBuffer;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
-    // The semaphore's data structures will be placed in the xSemaphoreBuffer
-    // variable, the address of which is passed into the function.  The
-    // function's parameter is not NULL, so the function will not attempt any
-    // dynamic memory allocation, and therefore the function will not return
-    // return NULL.
-    xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );
-
-    // Rest of task code goes here.
- }
-
- * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic - * \ingroup Semaphores - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * semphr. h - * 
xSemaphoreTake(
- *                   SemaphoreHandle_t xSemaphore,
- *                   TickType_t xBlockTime
- *               )
- * - * Macro to obtain a semaphore. The semaphore must have previously been - * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting(). - * - * @param xSemaphore A handle to the semaphore being taken - obtained when - * the semaphore was created. - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_PERIOD_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. A block - * time of portMAX_DELAY can be used to block indefinitely (provided - * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h). - * - * @return pdTRUE if the semaphore was obtained. pdFALSE - * if xBlockTime expired without the semaphore becoming available. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    xSemaphore = xSemaphoreCreateBinary();
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueGenericReceive( ( QueueHandle_t ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE ) - -/** - * semphr. h - * xSemaphoreTakeRecursive( - * SemaphoreHandle_t xMutex, - * TickType_t xBlockTime - * ) - * - * Macro to recursively obtain, or 'take', a mutex type semaphore. - * The mutex must have previously been created using a call to - * xSemaphoreCreateRecursiveMutex(); - * - * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this - * macro to be available. - * - * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * @param xMutex A handle to the mutex being obtained. This is the - * handle returned by xSemaphoreCreateRecursiveMutex(); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_PERIOD_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. If - * the task already owns the semaphore then xSemaphoreTakeRecursive() will - * return immediately no matter what the value of xBlockTime. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 
- SemaphoreHandle_t xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, but instead buried in a more complex
-			// call structure.  This is just for illustrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive - * \ingroup Semaphores - */ -#if( configUSE_RECURSIVE_MUTEXES == 1 ) - #define xSemaphoreTakeRecursive( xMutex, xBlockTime ) xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) ) -#endif - -/** - * semphr. h - * 
xSemaphoreGive( SemaphoreHandle_t xSemaphore )
- * - * Macro to release a semaphore. The semaphore must have previously been - * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake(). - * - * This macro must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * This macro must also not be used on semaphores created using - * xSemaphoreCreateRecursiveMutex(). - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned when the semaphore was created. - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    xSemaphore = vSemaphoreCreateBinary();
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK ) - -/** - * semphr. h - * 
xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )
- * - * Macro to recursively release, or 'give', a mutex type semaphore. - * The mutex must have previously been created using a call to - * xSemaphoreCreateRecursiveMutex(); - * - * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this - * macro to be available. - * - * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * @param xMutex A handle to the mutex being released, or 'given'. This is the - * handle returned by xSemaphoreCreateMutex(); - * - * @return pdTRUE if the semaphore was given. - * - * Example usage: - 
- SemaphoreHandle_t xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, it would be more likely that the calls
-			// to xSemaphoreGiveRecursive() would be called as a call stack
-			// unwound.  This is just for demonstrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive - * \ingroup Semaphores - */ -#if( configUSE_RECURSIVE_MUTEXES == 1 ) - #define xSemaphoreGiveRecursive( xMutex ) xQueueGiveMutexRecursive( ( xMutex ) ) -#endif - -/** - * semphr. h - * 
- xSemaphoreGiveFromISR(
-                          SemaphoreHandle_t xSemaphore,
-                          BaseType_t *pxHigherPriorityTaskWoken
-                      )
- * - * Macro to release a semaphore. The semaphore must have previously been - * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting(). - * - * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) - * must not be used with this macro. - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned when the semaphore was created. - * - * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xSemaphoreGiveFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL. - * - * Example usage: - 
- \#define LONG_TIME 0xffff
- \#define TICKS_TO_WAIT	10
- SemaphoreHandle_t xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks of a timer.  The semaphore
-        // was created before this task was started.
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute
-            // again.  Note when using the semaphore for synchronisation with an
-			// ISR in this manner there is no need to 'give' the semaphore back.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static uint8_t ucLocalTickCount = 0;
- static BaseType_t xHigherPriorityTaskWoken;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-	xHigherPriorityTaskWoken = pdFALSE;
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
-
-    if( xHigherPriorityTaskWoken != pdFALSE )
-    {
-        // We can force a context switch here.  Context switching from an
-        // ISR uses port specific syntax.  Check the demo task for your port
-        // to find the syntax required.
-    }
- }
-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) ) - -/** - * semphr. h - * 
- xSemaphoreTakeFromISR(
-                          SemaphoreHandle_t xSemaphore,
-                          BaseType_t *pxHigherPriorityTaskWoken
-                      )
- * - * Macro to take a semaphore from an ISR. The semaphore must have - * previously been created with a call to xSemaphoreCreateBinary() or - * xSemaphoreCreateCounting(). - * - * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) - * must not be used with this macro. - * - * This macro can be used from an ISR, however taking a semaphore from an ISR - * is not a common operation. It is likely to only be useful when taking a - * counting semaphore when an interrupt is obtaining an object from a resource - * pool (when the semaphore count indicates the number of resources available). - * - * @param xSemaphore A handle to the semaphore being taken. This is the - * handle returned when the semaphore was created. - * - * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xSemaphoreTakeFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the semaphore was successfully taken, otherwise - * pdFALSE - */ -#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) ) - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateMutex( void )
- * - * Creates a new mutex type semaphore instance, and returns a handle by which - * the new mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, mutex semaphores use a block - * of memory, in which the mutex structure is stored. If a mutex is created - * using xSemaphoreCreateMutex() then the required memory is automatically - * dynamically allocated inside the xSemaphoreCreateMutex() function. (see - * http://www.freertos.org/a00111.html). If a mutex is created using - * xSemaphoreCreateMutexStatic() then the application writer must provided the - * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created - * without using any dynamic memory allocation. - * - * Mutexes created using this function can be accessed using the xSemaphoreTake() - * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and - * xSemaphoreGiveRecursive() macros must not be used. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @return If the mutex was successfully created then a handle to the created - * semaphore is returned. If there was not enough heap to allocate the mutex - * data structures then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )
- * - * Creates a new mutex type semaphore instance, and returns a handle by which - * the new mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, mutex semaphores use a block - * of memory, in which the mutex structure is stored. If a mutex is created - * using xSemaphoreCreateMutex() then the required memory is automatically - * dynamically allocated inside the xSemaphoreCreateMutex() function. (see - * http://www.freertos.org/a00111.html). If a mutex is created using - * xSemaphoreCreateMutexStatic() then the application writer must provided the - * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created - * without using any dynamic memory allocation. - * - * Mutexes created using this function can be accessed using the xSemaphoreTake() - * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and - * xSemaphoreGiveRecursive() macros must not be used. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, - * which will be used to hold the mutex's data structure, removing the need for - * the memory to be allocated dynamically. - * - * @return If the mutex was successfully created then a handle to the created - * mutex is returned. If pxMutexBuffer was NULL then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xMutexBuffer;
-
- void vATask( void * pvParameters )
- {
-    // A mutex cannot be used before it has been created.  xMutexBuffer is
-    // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
-    // attempted.
-    xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
-
-    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
-    // so there is no need to check it.
- }
-
- * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic - * \ingroup Semaphores - */ - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )
- * - * Creates a new recursive mutex type semaphore instance, and returns a handle - * by which the new recursive mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, recursive mutexs use a block - * of memory, in which the mutex structure is stored. If a recursive mutex is - * created using xSemaphoreCreateRecursiveMutex() then the required memory is - * automatically dynamically allocated inside the - * xSemaphoreCreateRecursiveMutex() function. (see - * http://www.freertos.org/a00111.html). If a recursive mutex is created using - * xSemaphoreCreateRecursiveMutexStatic() then the application writer must - * provide the memory that will get used by the mutex. - * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to - * be created without using any dynamic memory allocation. - * - * Mutexes created using this macro can be accessed using the - * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The - * xSemaphoreTake() and xSemaphoreGive() macros must not be used. - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @return xSemaphore Handle to the created mutex semaphore. Should be of type - * SemaphoreHandle_t. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateRecursiveMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex - * \ingroup Semaphores - */ -#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) - #define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )
- * - * Creates a new recursive mutex type semaphore instance, and returns a handle - * by which the new recursive mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, recursive mutexs use a block - * of memory, in which the mutex structure is stored. If a recursive mutex is - * created using xSemaphoreCreateRecursiveMutex() then the required memory is - * automatically dynamically allocated inside the - * xSemaphoreCreateRecursiveMutex() function. (see - * http://www.freertos.org/a00111.html). If a recursive mutex is created using - * xSemaphoreCreateRecursiveMutexStatic() then the application writer must - * provide the memory that will get used by the mutex. - * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to - * be created without using any dynamic memory allocation. - * - * Mutexes created using this macro can be accessed using the - * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The - * xSemaphoreTake() and xSemaphoreGive() macros must not be used. - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, - * which will then be used to hold the recursive mutex's data structure, - * removing the need for the memory to be allocated dynamically. - * - * @return If the recursive mutex was successfully created then a handle to the - * created recursive mutex is returned. If pxMutexBuffer was NULL then NULL is - * returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xMutexBuffer;
-
- void vATask( void * pvParameters )
- {
-    // A recursive semaphore cannot be used before it is created.  Here a
-    // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
-    // The address of xMutexBuffer is passed into the function, and will hold
-    // the mutexes data structures - so no dynamic memory allocation will be
-    // attempted.
-    xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
-
-    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
-    // so there is no need to check it.
- }
-
- * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic - * \ingroup Semaphores - */ -#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) - #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )
- * - * Creates a new counting semaphore instance, and returns a handle by which the - * new counting semaphore can be referenced. - * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a counting semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, counting semaphores use a - * block of memory, in which the counting semaphore structure is stored. If a - * counting semaphore is created using xSemaphoreCreateCounting() then the - * required memory is automatically dynamically allocated inside the - * xSemaphoreCreateCounting() function. (see - * http://www.freertos.org/a00111.html). If a counting semaphore is created - * using xSemaphoreCreateCountingStatic() then the application writer can - * instead optionally provide the memory that will get used by the counting - * semaphore. xSemaphoreCreateCountingStatic() therefore allows a counting - * semaphore to be created without using any dynamic memory allocation. - * - * Counting semaphores are typically used for two things: - * - * 1) Counting events. - * - * In this usage scenario an event handler will 'give' a semaphore each time - * an event occurs (incrementing the semaphore count value), and a handler - * task will 'take' a semaphore each time it processes an event - * (decrementing the semaphore count value). The count value is therefore - * the difference between the number of events that have occurred and the - * number that have been processed. In this case it is desirable for the - * initial count value to be zero. - * - * 2) Resource management. - * - * In this usage scenario the count value indicates the number of resources - * available. To obtain control of a resource a task must first obtain a - * semaphore - decrementing the semaphore count value. When the count value - * reaches zero there are no free resources. When a task finishes with the - * resource it 'gives' the semaphore back - incrementing the semaphore count - * value. In this case it is desirable for the initial count value to be - * equal to the maximum count value, indicating that all resources are free. - * - * @param uxMaxCount The maximum count value that can be reached. When the - * semaphore reaches this value it can no longer be 'given'. - * - * @param uxInitialCount The count value assigned to the semaphore when it is - * created. - * - * @return Handle to the created semaphore. Null if the semaphore could not be - * created. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
- SemaphoreHandle_t xSemaphore = NULL;
-
-    // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
-    // The max value to which the semaphore can count should be 10, and the
-    // initial value assigned to the count should be 0.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0 );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )
- * - * Creates a new counting semaphore instance, and returns a handle by which the - * new counting semaphore can be referenced. - * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a counting semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, counting semaphores use a - * block of memory, in which the counting semaphore structure is stored. If a - * counting semaphore is created using xSemaphoreCreateCounting() then the - * required memory is automatically dynamically allocated inside the - * xSemaphoreCreateCounting() function. (see - * http://www.freertos.org/a00111.html). If a counting semaphore is created - * using xSemaphoreCreateCountingStatic() then the application writer must - * provide the memory. xSemaphoreCreateCountingStatic() therefore allows a - * counting semaphore to be created without using any dynamic memory allocation. - * - * Counting semaphores are typically used for two things: - * - * 1) Counting events. - * - * In this usage scenario an event handler will 'give' a semaphore each time - * an event occurs (incrementing the semaphore count value), and a handler - * task will 'take' a semaphore each time it processes an event - * (decrementing the semaphore count value). The count value is therefore - * the difference between the number of events that have occurred and the - * number that have been processed. In this case it is desirable for the - * initial count value to be zero. - * - * 2) Resource management. - * - * In this usage scenario the count value indicates the number of resources - * available. To obtain control of a resource a task must first obtain a - * semaphore - decrementing the semaphore count value. When the count value - * reaches zero there are no free resources. When a task finishes with the - * resource it 'gives' the semaphore back - incrementing the semaphore count - * value. In this case it is desirable for the initial count value to be - * equal to the maximum count value, indicating that all resources are free. - * - * @param uxMaxCount The maximum count value that can be reached. When the - * semaphore reaches this value it can no longer be 'given'. - * - * @param uxInitialCount The count value assigned to the semaphore when it is - * created. - * - * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, - * which will then be used to hold the semaphore's data structure, removing the - * need for the memory to be allocated dynamically. - * - * @return If the counting semaphore was successfully created then a handle to - * the created counting semaphore is returned. If pxSemaphoreBuffer was NULL - * then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xSemaphoreBuffer;
-
- void vATask( void * pvParameters )
- {
- SemaphoreHandle_t xSemaphore = NULL;
-
-    // Counting semaphore cannot be used before they have been created.  Create
-    // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
-    // value to which the semaphore can count is 10, and the initial value
-    // assigned to the count will be 0.  The address of xSemaphoreBuffer is
-    // passed in and will be used to hold the semaphore structure, so no dynamic
-    // memory allocation will be used.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
-
-    // No memory allocation was attempted so xSemaphore cannot be NULL, so there
-    // is no need to check its value.
- }
-
- * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic - * \ingroup Semaphores - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * semphr. h - * 
void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
- * - * Delete a semaphore. This function must be used with care. For example, - * do not delete a mutex type semaphore if the mutex is held by a task. - * - * @param xSemaphore A handle to the semaphore to be deleted. - * - * \defgroup vSemaphoreDelete vSemaphoreDelete - * \ingroup Semaphores - */ -#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) ) - -/** - * semphr.h - * 
TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
- * - * If xMutex is indeed a mutex type semaphore, return the current mutex holder. - * If xMutex is not a mutex type semaphore, or the mutex is available (not held - * by a task), return NULL. - * - * Note: This is a good way of determining if the calling task is the mutex - * holder, but not a good way of determining the identity of the mutex holder as - * the holder may change between the function exiting and the returned value - * being tested. - */ -#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) ) - -/** - * semphr.h - * 
UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
- * - * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns - * its current count value. If the semaphore is a binary semaphore then - * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the - * semaphore is not available. - * - */ -#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) ) - -#endif /* SEMAPHORE_H */ - - diff --git a/ports/cc3200/FreeRTOS/Source/include/task.h b/ports/cc3200/FreeRTOS/Source/include/task.h deleted file mode 100644 index d0643c09e8..0000000000 --- a/ports/cc3200/FreeRTOS/Source/include/task.h +++ /dev/null @@ -1,2267 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - - -#ifndef INC_TASK_H -#define INC_TASK_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include task.h" -#endif - -#include "list.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V9.0.0" -#define tskKERNEL_VERSION_MAJOR 9 -#define tskKERNEL_VERSION_MINOR 0 -#define tskKERNEL_VERSION_BUILD 0 - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an TaskHandle_t variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \defgroup TaskHandle_t TaskHandle_t - * \ingroup Tasks - */ -typedef void * TaskHandle_t; - -/* - * Defines the prototype to which the application task hook function must - * conform. - */ -typedef BaseType_t (*TaskHookFunction_t)( void * ); - -/* Task states returned by eTaskGetState. */ -typedef enum -{ - eRunning = 0, /* A task is querying the state of itself, so must be running. */ - eReady, /* The task being queried is in a read or pending ready list. */ - eBlocked, /* The task being queried is in the Blocked state. */ - eSuspended, /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */ - eDeleted, /* The task being queried has been deleted, but its TCB has not yet been freed. */ - eInvalid /* Used as an 'invalid state' value. */ -} eTaskState; - -/* Actions that can be performed when vTaskNotify() is called. */ -typedef enum -{ - eNoAction = 0, /* Notify the task without updating its notify value. */ - eSetBits, /* Set bits in the task's notification value. */ - eIncrement, /* Increment the task's notification value. */ - eSetValueWithOverwrite, /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */ - eSetValueWithoutOverwrite /* Set the task's notification value if the previous value has been read by the task. */ -} eNotifyAction; - -/* - * Used internally only. - */ -typedef struct xTIME_OUT -{ - BaseType_t xOverflowCount; - TickType_t xTimeOnEntering; -} TimeOut_t; - -/* - * Defines the memory ranges allocated to the task when an MPU is used. - */ -typedef struct xMEMORY_REGION -{ - void *pvBaseAddress; - uint32_t ulLengthInBytes; - uint32_t ulParameters; -} MemoryRegion_t; - -/* - * Parameters required to create an MPU protected task. - */ -typedef struct xTASK_PARAMETERS -{ - TaskFunction_t pvTaskCode; - const char * const pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - uint16_t usStackDepth; - void *pvParameters; - UBaseType_t uxPriority; - StackType_t *puxStackBuffer; - MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ]; -} TaskParameters_t; - -/* Used with the uxTaskGetSystemState() function to return the state of each task -in the system. */ -typedef struct xTASK_STATUS -{ - TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */ - const char *pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - UBaseType_t xTaskNumber; /* A number unique to the task. */ - eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */ - UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */ - UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */ - uint32_t ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock. See http://www.freertos.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */ - StackType_t *pxStackBase; /* Points to the lowest address of the task's stack area. */ - uint16_t usStackHighWaterMark; /* The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack. */ -} TaskStatus_t; - -/* Possible return values for eTaskConfirmSleepModeStatus(). */ -typedef enum -{ - eAbortSleep = 0, /* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */ - eStandardSleep, /* Enter a sleep mode that will not last any longer than the expected idle time. */ - eNoTasksWaitingTimeout /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */ -} eSleepModeStatus; - -/** - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \defgroup taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() -#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() -#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - -/* Definitions returned by xTaskGetSchedulerState(). taskSCHEDULER_SUSPENDED is -0 to generate more optimal code when configASSERT() is defined as the constant -is used in assert() statements. */ -#define taskSCHEDULER_SUSPENDED ( ( BaseType_t ) 0 ) -#define taskSCHEDULER_NOT_STARTED ( ( BaseType_t ) 1 ) -#define taskSCHEDULER_RUNNING ( ( BaseType_t ) 2 ) - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *
- BaseType_t xTaskCreate(
-							  TaskFunction_t pvTaskCode,
-							  const char * const pcName,
-							  uint16_t usStackDepth,
-							  void *pvParameters,
-							  UBaseType_t uxPriority,
-							  TaskHandle_t *pvCreatedTask
-						  );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * Internally, within the FreeRTOS implementation, tasks use two blocks of - * memory. The first block is used to hold the task's data structures. The - * second block is used by the task as its stack. If a task is created using - * xTaskCreate() then both blocks of memory are automatically dynamically - * allocated inside the xTaskCreate() function. (see - * http://www.freertos.org/a00111.html). If a task is created using - * xTaskCreateStatic() then the application writer must provide the required - * memory. xTaskCreateStatic() therefore allows a task to be created without - * using any dynamic memory allocation. - * - * See xTaskCreateStatic() for a version that does not use any dynamic memory - * allocation. - * - * xTaskCreate() can only be used to create a task that has unrestricted - * access to the entire microcontroller memory map. Systems that include MPU - * support can alternatively create an MPU constrained task using - * xTaskCreateRestricted(). - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by configMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. Systems that - * include MPU support can optionally create tasks in a privileged (system) - * mode by setting bit portPRIVILEGE_BIT of the priority parameter. For - * example, to create a privileged task at priority 2 the uxPriority parameter - * should be set to ( 2 | portPRIVILEGE_BIT ). - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file projdefs.h - * - * Example usage: - 
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-	 }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- static uint8_t ucParameterToPass;
- TaskHandle_t xHandle = NULL;
-
-	 // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
-	 // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
-	 // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
-	 // the new task attempts to access it.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-     configASSERT( xHandle );
-
-	 // Use the handle to delete the task.
-     if( xHandle != NULL )
-     {
-	     vTaskDelete( xHandle );
-     }
- }
-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - BaseType_t xTaskCreate( TaskFunction_t pxTaskCode, - const char * const pcName, - const uint16_t usStackDepth, - void * const pvParameters, - UBaseType_t uxPriority, - TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif - -/** - * task. h - *
- TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,
-								 const char * const pcName,
-								 uint32_t ulStackDepth,
-								 void *pvParameters,
-								 UBaseType_t uxPriority,
-								 StackType_t *pxStackBuffer,
-								 StaticTask_t *pxTaskBuffer );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * Internally, within the FreeRTOS implementation, tasks use two blocks of - * memory. The first block is used to hold the task's data structures. The - * second block is used by the task as its stack. If a task is created using - * xTaskCreate() then both blocks of memory are automatically dynamically - * allocated inside the xTaskCreate() function. (see - * http://www.freertos.org/a00111.html). If a task is created using - * xTaskCreateStatic() then the application writer must provide the required - * memory. xTaskCreateStatic() therefore allows a task to be created without - * using any dynamic memory allocation. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. The maximum length of the string is defined by - * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h. - * - * @param ulStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task will run. - * - * @param pxStackBuffer Must point to a StackType_t array that has at least - * ulStackDepth indexes - the array will then be used as the task's stack, - * removing the need for the stack to be allocated dynamically. - * - * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will - * then be used to hold the task's data structures, removing the need for the - * memory to be allocated dynamically. - * - * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will - * be created and pdPASS is returned. If either pxStackBuffer or pxTaskBuffer - * are NULL then the task will not be created and - * errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY is returned. - * - * Example usage: - 
-
-    // Dimensions the buffer that the task being created will use as its stack.
-    // NOTE:  This is the number of words the stack will hold, not the number of
-    // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
-    // then 400 bytes (100 * 32-bits) will be allocated.
-    #define STACK_SIZE 200
-
-    // Structure that will hold the TCB of the task being created.
-    StaticTask_t xTaskBuffer;
-
-    // Buffer that the task being created will use as its stack.  Note this is
-    // an array of StackType_t variables.  The size of StackType_t is dependent on
-    // the RTOS port.
-    StackType_t xStack[ STACK_SIZE ];
-
-    // Function that implements the task being created.
-    void vTaskCode( void * pvParameters )
-    {
-        // The parameter value is expected to be 1 as 1 is passed in the
-        // pvParameters value in the call to xTaskCreateStatic().
-        configASSERT( ( uint32_t ) pvParameters == 1UL );
-
-        for( ;; )
-        {
-            // Task code goes here.
-        }
-    }
-
-    // Function that creates a task.
-    void vOtherFunction( void )
-    {
-        TaskHandle_t xHandle = NULL;
-
-        // Create the task without using any dynamic memory allocation.
-        xHandle = xTaskCreateStatic(
-                      vTaskCode,       // Function that implements the task.
-                      "NAME",          // Text name for the task.
-                      STACK_SIZE,      // Stack size in words, not bytes.
-                      ( void * ) 1,    // Parameter passed into the task.
-                      tskIDLE_PRIORITY,// Priority at which the task is created.
-                      xStack,          // Array to use as the task's stack.
-                      &xTaskBuffer );  // Variable to hold the task's data structure.
-
-        // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
-        // been created, and xHandle will be the task's handle.  Use the handle
-        // to suspend the task.
-        vTaskSuspend( xHandle );
-    }
-
- * \defgroup xTaskCreateStatic xTaskCreateStatic - * \ingroup Tasks - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode, - const char * const pcName, - const uint32_t ulStackDepth, - void * const pvParameters, - UBaseType_t uxPriority, - StackType_t * const puxStackBuffer, - StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * task. h - *
- BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
- * - * xTaskCreateRestricted() should only be used in systems that include an MPU - * implementation. - * - * Create a new task and add it to the list of tasks that are ready to run. - * The function parameters define the memory regions and associated access - * permissions allocated to the task. - * - * @param pxTaskDefinition Pointer to a structure that contains a member - * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API - * documentation) plus an optional stack buffer and the memory region - * definitions. - * - * @param pxCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file projdefs.h - * - * Example usage: - 
-// Create an TaskParameters_t structure that defines the task to be created.
-static const TaskParameters_t xCheckTaskParameters =
-{
-	vATask,		// pvTaskCode - the function that implements the task.
-	"ATask",	// pcName - just a text name for the task to assist debugging.
-	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
-	NULL,		// pvParameters - passed into the task function as the function parameters.
-	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
-	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
-
-	// xRegions - Allocate up to three separate memory regions for access by
-	// the task, with appropriate access permissions.  Different processors have
-	// different memory alignment requirements - refer to the FreeRTOS documentation
-	// for full information.
-	{
-		// Base address					Length	Parameters
-        { cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
-        { cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
-        { cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
-	}
-};
-
-int main( void )
-{
-TaskHandle_t xHandle;
-
-	// Create a task from the const structure defined above.  The task handle
-	// is requested (the second parameter is not NULL) but in this case just for
-	// demonstration purposes as its not actually used.
-	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
-
-	// Start the scheduler.
-	vTaskStartScheduler();
-
-	// Will only get here if there was insufficient memory to create the idle
-	// and/or timer task.
-	for( ;; );
-}
-
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted - * \ingroup Tasks - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION; -#endif - -/** - * task. h - *
- void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
- * - * Memory regions are assigned to a restricted task when the task is created by - * a call to xTaskCreateRestricted(). These regions can be redefined using - * vTaskAllocateMPURegions(). - * - * @param xTask The handle of the task being updated. - * - * @param xRegions A pointer to an MemoryRegion_t structure that contains the - * new memory region definitions. - * - * Example usage: - 
-// Define an array of MemoryRegion_t structures that configures an MPU region
-// allowing read/write access for 1024 bytes starting at the beginning of the
-// ucOneKByte array.  The other two of the maximum 3 definable regions are
-// unused so set to zero.
-static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
-{
-	// Base address		Length		Parameters
-	{ ucOneKByte,		1024,		portMPU_REGION_READ_WRITE },
-	{ 0,				0,			0 },
-	{ 0,				0,			0 }
-};
-
-void vATask( void *pvParameters )
-{
-	// This task was created such that it has access to certain regions of
-	// memory as defined by the MPU configuration.  At some point it is
-	// desired that these MPU regions are replaced with that defined in the
-	// xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
-	// for this purpose.  NULL is used as the task handle to indicate that this
-	// function should modify the MPU regions of the calling task.
-	vTaskAllocateMPURegions( NULL, xAltRegions );
-
-	// Now the task can continue its function, but from this point on can only
-	// access its stack and the ucOneKByte array (unless any other statically
-	// defined or shared regions have been declared elsewhere).
-}
-
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted - * \ingroup Tasks - */ -void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskDelete( TaskHandle_t xTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernel's management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param xTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 
- void vOtherFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create the task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // Use the handle to delete the task.
-	 vTaskDelete( xHandle );
- }
-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( const TickType_t xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_PERIOD_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * - * vTaskDelay() specifies a time at which the task wishes to unblock relative to - * the time at which vTaskDelay() is called. For example, specifying a block - * period of 100 ticks will cause the task to unblock 100 ticks after - * vTaskDelay() is called. vTaskDelay() does not therefore provide a good method - * of controlling the frequency of a periodic task as the path taken through the - * code, as well as other task and interrupt activity, will effect the frequency - * at which vTaskDelay() gets called and therefore the time at which the task - * next executes. See vTaskDelayUntil() for an alternative API function designed - * to facilitate fixed frequency execution. It does this by specifying an - * absolute time (rather than a relative time) at which the calling task should - * unblock. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - - void vTaskFunction( void * pvParameters ) - { - // Block for 500ms. - const TickType_t xDelay = 500 / portTICK_PERIOD_MS; - - for( ;; ) - { - // Simply toggle the LED every 500ms, blocking between each toggle. - vToggleLED(); - vTaskDelay( xDelay ); - } - } - - * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by periodic - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- TickType_t xLastWakeTime;
- const TickType_t xFrequency = 10;
-
-	 // Initialise the xLastWakeTime variable with the current time.
-	 xLastWakeTime = xTaskGetTickCount ();
-	 for( ;; )
-	 {
-		 // Wait for the next cycle.
-		 vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-		 // Perform action here.
-	 }
- }
-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
- * - * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this - * function to be available. - * - * A task will enter the Blocked state when it is waiting for an event. The - * event it is waiting for can be a temporal event (waiting for a time), such - * as when vTaskDelay() is called, or an event on an object, such as when - * xQueueReceive() or ulTaskNotifyTake() is called. If the handle of a task - * that is in the Blocked state is used in a call to xTaskAbortDelay() then the - * task will leave the Blocked state, and return from whichever function call - * placed the task into the Blocked state. - * - * @param xTask The handle of the task to remove from the Blocked state. - * - * @return If the task referenced by xTask was not in the Blocked state then - * pdFAIL is returned. Otherwise pdPASS is returned. - * - * \defgroup xTaskAbortDelay xTaskAbortDelay - * \ingroup TaskCtrl - */ -BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask );
- * - * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param xTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of xTask. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to obtain the priority of the created task.
-	 // It was created with tskIDLE_PRIORITY, but may have changed
-	 // it itself.
-	 if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-	 {
-		 // The task has changed it's priority.
-	 }
-
-	 // ...
-
-	 // Is our priority higher than the created task?
-	 if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-	 {
-		 // Our priority (obtained using NULL handle) is higher.
-	 }
- }
-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask );
- * - * A version of uxTaskPriorityGet() that can be used from an ISR. - */ -UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
eTaskState eTaskGetState( TaskHandle_t xTask );
- * - * INCLUDE_eTaskGetState must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the state of any task. States are encoded by the eTaskState - * enumerated type. - * - * @param xTask Handle of the task to be queried. - * - * @return The state of xTask at the time the function was called. Note the - * state of the task might change between the function being called, and the - * functions return value being tested by the calling task. - */ -eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
- * - * configUSE_TRACE_FACILITY must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * Populates a TaskStatus_t structure with information about a task. - * - * @param xTask Handle of the task being queried. If xTask is NULL then - * information will be returned about the calling task. - * - * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be - * filled with information about the task referenced by the handle passed using - * the xTask parameter. - * - * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report - * the stack high water mark of the task being queried. Calculating the stack - * high water mark takes a relatively long time, and can make the system - * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to - * allow the high water mark checking to be skipped. The high watermark value - * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is - * not set to pdFALSE; - * - * @param eState The TaskStatus_t structure contains a member to report the - * state of the task being queried. Obtaining the task state is not as fast as - * a simple assignment - so the eState parameter is provided to allow the state - * information to be omitted from the TaskStatus_t structure. To obtain state - * information then set eState to eInvalid - otherwise the value passed in - * eState will be reported as the task state in the TaskStatus_t structure. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
- TaskStatus_t xTaskDetails;
-
-    // Obtain the handle of a task from its name.
-    xHandle = xTaskGetHandle( "Task_Name" );
-
-    // Check the handle is not NULL.
-    configASSERT( xHandle );
-
-    // Use the handle to obtain further information about the task.
-    vTaskGetInfo( xHandle,
-                  &xTaskDetails,
-                  pdTRUE, // Include the high water mark in xTaskDetails.
-                  eInvalid ); // Include the task state in xTaskDetails.
- }
-
- * \defgroup vTaskGetInfo vTaskGetInfo - * \ingroup TaskCtrl - */ -void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param xTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to raise the priority of the created task.
-	 vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-	 // ...
-
-	 // Use a NULL handle to raise our priority to the same value.
-	 vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskSuspend( TaskHandle_t xTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param xTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Suspend ourselves.
-	 vTaskSuspend( NULL );
-
-	 // We cannot get here unless another task calls vTaskResume
-	 // with our handle as the parameter.
- }
-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskResume( TaskHandle_t xTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one or more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param xTaskToResume Handle to the task being readied. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Resume the suspended task ourselves.
-	 vTaskResume( xHandle );
-
-	 // The created task will once again get microcontroller processing
-	 // time in accordance with its priority within the system.
- }
-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one or more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * xTaskResumeFromISR() should not be used to synchronise a task with an - * interrupt if there is a chance that the interrupt could arrive prior to the - * task being suspended - as this can lead to interrupts being missed. Use of a - * semaphore as a synchronisation mechanism would avoid this eventuality. - * - * @param xTaskToResume Handle to the task being readied. - * - * @return pdTRUE if resuming the task should result in a context switch, - * otherwise pdFALSE. This is used by the ISR to determine if a context switch - * may be required following the ISR. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will not get here unless a task calls vTaskEndScheduler ()
- }
-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * NOTE: At the time of writing only the x86 real mode port, which runs on a PC - * in place of DOS, implements this function. - * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // At some point we want to end the real time kernel processing
-		 // so call ...
-		 vTaskEndScheduler ();
-	 }
- }
-
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will only get here when the vTaskCode () task has called
-	 // vTaskEndScheduler ().  When we get here we are back to single task
-	 // execution.
- }
-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends the scheduler without disabling interrupts. Context switches will - * not occur while the scheduler is suspended. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * API functions that have the potential to cause a context switch (for example, - * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler - * is suspended. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the kernel
-		 // tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.
-		 xTaskResumeAll ();
-	 }
- }
-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
BaseType_t xTaskResumeAll( void );
- * - * Resumes scheduler activity after it was suspended by a call to - * vTaskSuspendAll(). - * - * xTaskResumeAll() only resumes the scheduler. It does not unsuspend tasks - * that were previously suspended by a call to vTaskSuspend(). - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the real
-		 // time kernel tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.  We want to force
-		 // a context switch - but there is no point if resuming the scheduler
-		 // caused a context switch already.
-		 if( !xTaskResumeAll () )
-		 {
-			  taskYIELD ();
-		 }
-	 }
- }
-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
TickType_t xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \defgroup xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
TickType_t xTaskGetTickCountFromISR( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * This is a version of xTaskGetTickCount() that is safe to be called from an - * ISR - provided that TickType_t is the natural word size of the - * microcontroller being used or interrupt nesting is either not supported or - * not being used. - * - * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR - * \ingroup TaskUtils - */ -TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
uint16_t uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
char *pcTaskGetName( TaskHandle_t xTaskToQuery );
- * - * @return The text (human readable) name of the task referenced by the handle - * xTaskToQuery. A task can query its own name by either passing in its own - * handle, or by setting xTaskToQuery to NULL. - * - * \defgroup pcTaskGetName pcTaskGetName - * \ingroup TaskUtils - */ -char *pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task. h - * 
TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );
- * - * NOTE: This function takes a relatively long time to complete and should be - * used sparingly. - * - * @return The handle of the task that has the human readable name pcNameToQuery. - * NULL is returned if no matching name is found. INCLUDE_xTaskGetHandle - * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available. - * - * \defgroup pcTaskGetHandle pcTaskGetHandle - * \ingroup TaskUtils - */ -TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task.h - * 
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );
- * - * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for - * this function to be available. - * - * Returns the high water mark of the stack associated with xTask. That is, - * the minimum free stack space there has been (in words, so on a 32 bit machine - * a value of 1 means 4 bytes) since the task started. The smaller the returned - * number the closer the task has come to overflowing its stack. - * - * @param xTask Handle of the task associated with the stack to be checked. - * Set xTask to NULL to check the stack of the calling task. - * - * @return The smallest amount of free stack space there has been (in words, so - * actual spaces on the stack rather than bytes) since the task referenced by - * xTask was created. - */ -UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/* When using trace macros it is sometimes necessary to include task.h before -FreeRTOS.h. When this is done TaskHookFunction_t will not yet have been defined, -so the following two prototypes will cause a compilation error. This can be -fixed by simply guarding against the inclusion of these two prototypes unless -they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration -constant. */ -#ifdef configUSE_APPLICATION_TASK_TAG - #if configUSE_APPLICATION_TASK_TAG == 1 - /** - * task.h - * 
void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
- * - * Sets pxHookFunction to be the task hook function used by the task xTask. - * Passing xTask as NULL has the effect of setting the calling tasks hook - * function. - */ - void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION; - - /** - * task.h - * 
void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
- * - * Returns the pxHookFunction value assigned to the task xTask. - */ - TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - #endif /* configUSE_APPLICATION_TASK_TAG ==1 */ -#endif /* ifdef configUSE_APPLICATION_TASK_TAG */ - -#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) - - /* Each task contains an array of pointers that is dimensioned by the - configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h. The - kernel does not use the pointers itself, so the application writer can use - the pointers for any purpose they wish. The following two functions are - used to set and query a pointer respectively. */ - void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION; - void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION; - -#endif - -/** - * task.h - * 
BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
- * - * Calls the hook function associated with xTask. Passing xTask as NULL has - * the effect of calling the Running tasks (the calling task) hook function. - * - * pvParameter is passed to the hook function for the task to interpret as it - * wants. The return value is the value returned by the task hook function - * registered by the user. - */ -BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION; - -/** - * xTaskGetIdleTaskHandle() is only available if - * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h. - * - * Simply returns the handle of the idle task. It is not valid to call - * xTaskGetIdleTaskHandle() before the scheduler has been started. - */ -TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION; - -/** - * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for - * uxTaskGetSystemState() to be available. - * - * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in - * the system. TaskStatus_t structures contain, among other things, members - * for the task handle, task name, task priority, task state, and total amount - * of run time consumed by the task. See the TaskStatus_t structure - * definition in this file for the full member list. - * - * NOTE: This function is intended for debugging use only as its use results in - * the scheduler remaining suspended for an extended period. - * - * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures. - * The array must contain at least one TaskStatus_t structure for each task - * that is under the control of the RTOS. The number of tasks under the control - * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function. - * - * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray - * parameter. The size is specified as the number of indexes in the array, or - * the number of TaskStatus_t structures contained in the array, not by the - * number of bytes in the array. - * - * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in - * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the - * total run time (as defined by the run time stats clock, see - * http://www.freertos.org/rtos-run-time-stats.html) since the target booted. - * pulTotalRunTime can be set to NULL to omit the total run time information. - * - * @return The number of TaskStatus_t structures that were populated by - * uxTaskGetSystemState(). This should equal the number returned by the - * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed - * in the uxArraySize parameter was too small. - * - * Example usage: - 
-    // This example demonstrates how a human readable table of run time stats
-	// information is generated from raw data provided by uxTaskGetSystemState().
-	// The human readable table is written to pcWriteBuffer
-	void vTaskGetRunTimeStats( char *pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	uint32_t ulTotalRunTime, ulStatsAsPercentage;
-
-		// Make sure the write buffer does not contain a string.
-		*pcWriteBuffer = 0x00;
-
-		// Take a snapshot of the number of tasks in case it changes while this
-		// function is executing.
-		uxArraySize = uxTaskGetNumberOfTasks();
-
-		// Allocate a TaskStatus_t structure for each task.  An array could be
-		// allocated statically at compile time.
-		pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			// Generate raw status information about each task.
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
-
-			// For percentage calculations.
-			ulTotalRunTime /= 100UL;
-
-			// Avoid divide by zero errors.
-			if( ulTotalRunTime > 0 )
-			{
-				// For each populated position in the pxTaskStatusArray array,
-				// format the raw data as human readable ASCII data
-				for( x = 0; x < uxArraySize; x++ )
-				{
-					// What percentage of the total run time has the task used?
-					// This will always be rounded down to the nearest integer.
-					// ulTotalRunTimeDiv100 has already been divided by 100.
-					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
-
-					if( ulStatsAsPercentage > 0UL )
-					{
-						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
-					}
-					else
-					{
-						// If the percentage is zero here then the task has
-						// consumed less than 1% of the total run time.
-						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
-					}
-
-					pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
-				}
-			}
-
-			// The array is no longer needed, free the memory it consumes.
-			vPortFree( pxTaskStatusArray );
-		}
-	}
-
- */ -UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskList( char *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must - * both be defined as 1 for this function to be available. See the - * configuration section of the FreeRTOS.org website for more information. - * - * NOTE 1: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * PLEASE NOTE: - * - * This function is provided for convenience only, and is used by many of the - * demo applications. Do not consider it to be part of the scheduler. - * - * vTaskList() calls uxTaskGetSystemState(), then formats part of the - * uxTaskGetSystemState() output into a human readable table that displays task - * names, states and stack usage. - * - * vTaskList() has a dependency on the sprintf() C library function that might - * bloat the code size, use a lot of stack, and provide different results on - * different platforms. An alternative, tiny, third party, and limited - * functionality implementation of sprintf() is provided in many of the - * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note - * printf-stdarg.c does not provide a full snprintf() implementation!). - * - * It is recommended that production systems call uxTaskGetSystemState() - * directly to get access to raw stats data, rather than indirectly through a - * call to vTaskList(). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ASCII form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \defgroup vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task. h - * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );
- * - * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS - * must both be defined as 1 for this function to be available. The application - * must also then provide definitions for - * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE() - * to configure a peripheral timer/counter and return the timers current count - * value respectively. The counter should be at least 10 times the frequency of - * the tick count. - * - * NOTE 1: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total - * accumulated execution time being stored for each task. The resolution - * of the accumulated time value depends on the frequency of the timer - * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro. - * Calling vTaskGetRunTimeStats() writes the total execution time of each - * task into a buffer, both as an absolute count value and as a percentage - * of the total system execution time. - * - * NOTE 2: - * - * This function is provided for convenience only, and is used by many of the - * demo applications. Do not consider it to be part of the scheduler. - * - * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the - * uxTaskGetSystemState() output into a human readable table that displays the - * amount of time each task has spent in the Running state in both absolute and - * percentage terms. - * - * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function - * that might bloat the code size, use a lot of stack, and provide different - * results on different platforms. An alternative, tiny, third party, and - * limited functionality implementation of sprintf() is provided in many of the - * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note - * printf-stdarg.c does not provide a full snprintf() implementation!). - * - * It is recommended that production systems call uxTaskGetSystemState() directly - * to get access to raw stats data, rather than indirectly through a call to - * vTaskGetRunTimeStats(). - * - * @param pcWriteBuffer A buffer into which the execution times will be - * written, in ASCII form. This buffer is assumed to be large enough to - * contain the generated report. Approximately 40 bytes per task should - * be sufficient. - * - * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats - * \ingroup TaskUtils - */ -void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task. h - * 
BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this - * function to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * A notification sent to a task will remain pending until it is cleared by the - * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was - * already in the Blocked state to wait for a notification when the notification - * arrives then the task will automatically be removed from the Blocked state - * (unblocked) and the notification cleared. - * - * A task can use xTaskNotifyWait() to [optionally] block to wait for a - * notification to be pending, or ulTaskNotifyTake() to [optionally] block - * to wait for its notification value to have a non-zero value. The task does - * not consume any CPU time while it is in the Blocked state. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. - * - * @param xTaskToNotify The handle of the task being notified. The handle to a - * task can be returned from the xTaskCreate() API function used to create the - * task, and the handle of the currently running task can be obtained by calling - * xTaskGetCurrentTaskHandle(). - * - * @param ulValue Data that can be sent with the notification. How the data is - * used depends on the value of the eAction parameter. - * - * @param eAction Specifies how the notification updates the task's notification - * value, if at all. Valid values for eAction are as follows: - * - * eSetBits - - * The task's notification value is bitwise ORed with ulValue. xTaskNofify() - * always returns pdPASS in this case. - * - * eIncrement - - * The task's notification value is incremented. ulValue is not used and - * xTaskNotify() always returns pdPASS in this case. - * - * eSetValueWithOverwrite - - * The task's notification value is set to the value of ulValue, even if the - * task being notified had not yet processed the previous notification (the - * task already had a notification pending). xTaskNotify() always returns - * pdPASS in this case. - * - * eSetValueWithoutOverwrite - - * If the task being notified did not already have a notification pending then - * the task's notification value is set to ulValue and xTaskNotify() will - * return pdPASS. If the task being notified already had a notification - * pending then no action is performed and pdFAIL is returned. - * - * eNoAction - - * The task receives a notification without its notification value being - * updated. ulValue is not used and xTaskNotify() always returns pdPASS in - * this case. - * - * pulPreviousNotificationValue - - * Can be used to pass out the subject task's notification value before any - * bits are modified by the notify function. - * - * @return Dependent on the value of eAction. See the description of the - * eAction parameter. - * - * \defgroup xTaskNotify xTaskNotify - * \ingroup TaskNotifications - */ -BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION; -#define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL ) -#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) ) - -/** - * task. h - * 
BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this - * function to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * A version of xTaskNotify() that can be used from an interrupt service routine - * (ISR). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * A notification sent to a task will remain pending until it is cleared by the - * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was - * already in the Blocked state to wait for a notification when the notification - * arrives then the task will automatically be removed from the Blocked state - * (unblocked) and the notification cleared. - * - * A task can use xTaskNotifyWait() to [optionally] block to wait for a - * notification to be pending, or ulTaskNotifyTake() to [optionally] block - * to wait for its notification value to have a non-zero value. The task does - * not consume any CPU time while it is in the Blocked state. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. - * - * @param xTaskToNotify The handle of the task being notified. The handle to a - * task can be returned from the xTaskCreate() API function used to create the - * task, and the handle of the currently running task can be obtained by calling - * xTaskGetCurrentTaskHandle(). - * - * @param ulValue Data that can be sent with the notification. How the data is - * used depends on the value of the eAction parameter. - * - * @param eAction Specifies how the notification updates the task's notification - * value, if at all. Valid values for eAction are as follows: - * - * eSetBits - - * The task's notification value is bitwise ORed with ulValue. xTaskNofify() - * always returns pdPASS in this case. - * - * eIncrement - - * The task's notification value is incremented. ulValue is not used and - * xTaskNotify() always returns pdPASS in this case. - * - * eSetValueWithOverwrite - - * The task's notification value is set to the value of ulValue, even if the - * task being notified had not yet processed the previous notification (the - * task already had a notification pending). xTaskNotify() always returns - * pdPASS in this case. - * - * eSetValueWithoutOverwrite - - * If the task being notified did not already have a notification pending then - * the task's notification value is set to ulValue and xTaskNotify() will - * return pdPASS. If the task being notified already had a notification - * pending then no action is performed and pdFAIL is returned. - * - * eNoAction - - * The task receives a notification without its notification value being - * updated. ulValue is not used and xTaskNotify() always returns pdPASS in - * this case. - * - * @param pxHigherPriorityTaskWoken xTaskNotifyFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the - * task to which the notification was sent to leave the Blocked state, and the - * unblocked task has a priority higher than the currently running task. If - * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should - * be requested before the interrupt is exited. How a context switch is - * requested from an ISR is dependent on the port - see the documentation page - * for the port in use. - * - * @return Dependent on the value of eAction. See the description of the - * eAction parameter. - * - * \defgroup xTaskNotify xTaskNotify - * \ingroup TaskNotifications - */ -BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; -#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) ) -#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) ) - -/** - * task. h - * 
BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this - * function to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * A notification sent to a task will remain pending until it is cleared by the - * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was - * already in the Blocked state to wait for a notification when the notification - * arrives then the task will automatically be removed from the Blocked state - * (unblocked) and the notification cleared. - * - * A task can use xTaskNotifyWait() to [optionally] block to wait for a - * notification to be pending, or ulTaskNotifyTake() to [optionally] block - * to wait for its notification value to have a non-zero value. The task does - * not consume any CPU time while it is in the Blocked state. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. - * - * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value - * will be cleared in the calling task's notification value before the task - * checks to see if any notifications are pending, and optionally blocks if no - * notifications are pending. Setting ulBitsToClearOnEntry to ULONG_MAX (if - * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have - * the effect of resetting the task's notification value to 0. Setting - * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged. - * - * @param ulBitsToClearOnExit If a notification is pending or received before - * the calling task exits the xTaskNotifyWait() function then the task's - * notification value (see the xTaskNotify() API function) is passed out using - * the pulNotificationValue parameter. Then any bits that are set in - * ulBitsToClearOnExit will be cleared in the task's notification value (note - * *pulNotificationValue is set before any bits are cleared). Setting - * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL - * (if limits.h is not included) will have the effect of resetting the task's - * notification value to 0 before the function exits. Setting - * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged - * when the function exits (in which case the value passed out in - * pulNotificationValue will match the task's notification value). - * - * @param pulNotificationValue Used to pass the task's notification value out - * of the function. Note the value passed out will not be effected by the - * clearing of any bits caused by ulBitsToClearOnExit being non-zero. - * - * @param xTicksToWait The maximum amount of time that the task should wait in - * the Blocked state for a notification to be received, should a notification - * not already be pending when xTaskNotifyWait() was called. The task - * will not consume any processing time while it is in the Blocked state. This - * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be - * used to convert a time specified in milliseconds to a time specified in - * ticks. - * - * @return If a notification was received (including notifications that were - * already pending when xTaskNotifyWait was called) then pdPASS is - * returned. Otherwise pdFAIL is returned. - * - * \defgroup xTaskNotifyWait xTaskNotifyWait - * \ingroup TaskNotifications - */ -BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro - * to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * xTaskNotifyGive() is a helper macro intended for use when task notifications - * are used as light weight and faster binary or counting semaphore equivalents. - * Actual FreeRTOS semaphores are given using the xSemaphoreGive() API function, - * the equivalent action that instead uses a task notification is - * xTaskNotifyGive(). - * - * When task notifications are being used as a binary or counting semaphore - * equivalent then the task being notified should wait for the notification - * using the ulTaskNotificationTake() API function rather than the - * xTaskNotifyWait() API function. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details. - * - * @param xTaskToNotify The handle of the task being notified. The handle to a - * task can be returned from the xTaskCreate() API function used to create the - * task, and the handle of the currently running task can be obtained by calling - * xTaskGetCurrentTaskHandle(). - * - * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the - * eAction parameter set to eIncrement - so pdPASS is always returned. - * - * \defgroup xTaskNotifyGive xTaskNotifyGive - * \ingroup TaskNotifications - */ -#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL ) - -/** - * task. h - * 
void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );
- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
- * to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * A version of xTaskNotifyGive() that can be called from an interrupt service
- * routine (ISR).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * vTaskNotifyGiveFromISR() is intended for use when task notifications are
- * used as light weight and faster binary or counting semaphore equivalents.
- * Actual FreeRTOS semaphores are given from an ISR using the
- * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
- * a task notification is vTaskNotifyGiveFromISR().
- *
- * When task notifications are being used as a binary or counting semaphore
- * equivalent then the task being notified should wait for the notification
- * using the ulTaskNotificationTake() API function rather than the
- * xTaskNotifyWait() API function.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
- *
- * @param xTaskToNotify The handle of the task being notified.  The handle to a
- * task can be returned from the xTaskCreate() API function used to create the
- * task, and the handle of the currently running task can be obtained by calling
- * xTaskGetCurrentTaskHandle().
- *
- * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
- * task to which the notification was sent to leave the Blocked state, and the
- * unblocked task has a priority higher than the currently running task.  If
- * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
- * should be requested before the interrupt is exited.  How a context switch is
- * requested from an ISR is dependent on the port - see the documentation page
- * for the port in use.
- *
- * \defgroup xTaskNotifyWait xTaskNotifyWait
- * \ingroup TaskNotifications
- */
-void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
- * function to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * ulTaskNotifyTake() is intended for use when a task notification is used as a
- * faster and lighter weight binary or counting semaphore alternative.  Actual
- * FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the
- * equivalent action that instead uses a task notification is
- * ulTaskNotifyTake().
- *
- * When a task is using its notification value as a binary or counting semaphore
- * other tasks should send notifications to it using the xTaskNotifyGive()
- * macro, or xTaskNotify() function with the eAction parameter set to
- * eIncrement.
- *
- * ulTaskNotifyTake() can either clear the task's notification value to
- * zero on exit, in which case the notification value acts like a binary
- * semaphore, or decrement the task's notification value on exit, in which case
- * the notification value acts like a counting semaphore.
- *
- * A task can use ulTaskNotifyTake() to [optionally] block to wait for a
- * the task's notification value to be non-zero.  The task does not consume any
- * CPU time while it is in the Blocked state.
- *
- * Where as xTaskNotifyWait() will return when a notification is pending,
- * ulTaskNotifyTake() will return when the task's notification value is
- * not zero.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
- *
- * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
- * notification value is decremented when the function exits.  In this way the
- * notification value acts like a counting semaphore.  If xClearCountOnExit is
- * not pdFALSE then the task's notification value is cleared to zero when the
- * function exits.  In this way the notification value acts like a binary
- * semaphore.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait in
- * the Blocked state for the task's notification value to be greater than zero,
- * should the count not already be greater than zero when
- * ulTaskNotifyTake() was called.  The task will not consume any processing
- * time while it is in the Blocked state.  This is specified in kernel ticks,
- * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time
- * specified in milliseconds to a time specified in ticks.
- *
- * @return The task's notification count before it is either cleared to zero or
- * decremented (see the xClearCountOnExit parameter).
- *
- * \defgroup ulTaskNotifyTake ulTaskNotifyTake
- * \ingroup TaskNotifications
- */
-uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );

- *
- * If the notification state of the task referenced by the handle xTask is
- * eNotified, then set the task's notification state to eNotWaitingNotification.
- * The task's notification value is not altered.  Set xTask to NULL to clear the
- * notification state of the calling task.
- *
- * @return pdTRUE if the task's notification state was set to
- * eNotWaitingNotification, otherwise pdFALSE.
- * \defgroup xTaskNotifyStateClear xTaskNotifyStateClear
- * \ingroup TaskNotifications
- */
-BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
-
-/*-----------------------------------------------------------
- * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
- *----------------------------------------------------------*/
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Called from the real time kernel tick (either preemptive or cooperative),
- * this increments the tick count and checks if any tasks that are blocked
- * for a finite period required removing from a blocked list and placing on
- * a ready list.  If a non-zero value is returned then a context switch is
- * required because either:
- *   + A task was removed from a blocked list because its timeout had expired,
- *     or
- *   + Time slicing is in use and there is a task of equal priority to the
- *     currently running task.
- */
-BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes the calling task from the ready list and places it both
- * on the list of tasks waiting for a particular event, and the
- * list of delayed tasks.  The task will be removed from both lists
- * and replaced on the ready list should either the event occur (and
- * there be no higher priority tasks waiting on the same event) or
- * the delay period expires.
- *
- * The 'unordered' version replaces the event list item value with the
- * xItemValue value, and inserts the list item at the end of the list.
- *
- * The 'ordered' version uses the existing event list item value (which is the
- * owning tasks priority) to insert the list item into the event list is task
- * priority order.
- *
- * @param pxEventList The list containing tasks that are blocked waiting
- * for the event to occur.
- *
- * @param xItemValue The item value to use for the event list item when the
- * event list is not ordered by task priority.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait
- * for the event to occur.  This is specified in kernel ticks,the constant
- * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
- * period.
- */
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * This function performs nearly the same function as vTaskPlaceOnEventList().
- * The difference being that this function does not permit tasks to block
- * indefinitely, whereas vTaskPlaceOnEventList() does.
- *
- */
-void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes a task from both the specified event list and the list of blocked
- * tasks, and places it on a ready queue.
- *
- * xTaskRemoveFromEventList()/xTaskRemoveFromUnorderedEventList() will be called
- * if either an event occurs to unblock a task, or the block timeout period
- * expires.
- *
- * xTaskRemoveFromEventList() is used when the event list is in task priority
- * order.  It removes the list item from the head of the event list as that will
- * have the highest priority owning task of all the tasks on the event list.
- * xTaskRemoveFromUnorderedEventList() is used when the event list is not
- * ordered and the event list items hold something other than the owning tasks
- * priority.  In this case the event list item value is updated to the value
- * passed in the xItemValue parameter.
- *
- * @return pdTRUE if the task being removed has a higher priority than the task
- * making the call, otherwise pdFALSE.
- */
-BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
-BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Sets the pointer to the current TCB to the TCB of the highest priority task
- * that is ready to run.
- */
-void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
- * THE EVENT BITS MODULE.
- */
-TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Return the handle of the calling task.
- */
-TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Capture the current time status for future reference.
- */
-void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
-
-/*
- * Compare the time status now with that previously captured to see if the
- * timeout has expired.
- */
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * Shortcut used by the queue implementation to prevent unnecessary call to
- * taskYIELD();
- */
-void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Returns the scheduler state as taskSCHEDULER_RUNNING,
- * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
- */
-BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Raises the priority of the mutex holder to that of the calling task should
- * the mutex holder have a priority less than the calling task.
- */
-void vTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the priority of a task back to its proper priority in the case that it
- * inherited a higher priority while it was holding a semaphore.
- */
-BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
- */
-UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the uxTaskNumber of the task referenced by the xTask parameter to
- * uxHandle.
- */
-void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
-
-/*
- * Only available when configUSE_TICKLESS_IDLE is set to 1.
- * If tickless mode is being used, or a low power mode is implemented, then
- * the tick interrupt will not execute during idle periods.  When this is the
- * case, the tick count value maintained by the scheduler needs to be kept up
- * to date with the actual execution time by being skipped forward by a time
- * equal to the idle period.
- */
-void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
-
-/*
- * Only avilable when configUSE_TICKLESS_IDLE is set to 1.
- * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
- * specific sleep function to determine if it is ok to proceed with the sleep,
- * and if it is ok to proceed, if it is ok to sleep indefinitely.
- *
- * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
- * called with the scheduler suspended, not from within a critical section.  It
- * is therefore possible for an interrupt to request a context switch between
- * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
- * entered.  eTaskConfirmSleepModeStatus() should be called from a short
- * critical section between the timer being stopped and the sleep mode being
- * entered to ensure it is ok to proceed into the sleep mode.
- */
-eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
-
-/*
- * For internal use only.  Increment the mutex held count when a mutex is
- * taken and return the handle of the task that has taken the mutex.
- */
-void *pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* INC_TASK_H */
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/include/timers.h b/ports/cc3200/FreeRTOS/Source/include/timers.h
deleted file mode 100644
index 798c955bb3..0000000000
--- a/ports/cc3200/FreeRTOS/Source/include/timers.h
+++ /dev/null
@@ -1,1314 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-#ifndef TIMERS_H
-#define TIMERS_H
-
-#ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h must appear in source files before include timers.h"
-#endif
-
-/*lint -e537 This headers are only multiply included if the application code
-happens to also be including task.h. */
-#include "task.h"
-/*lint +e537 */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * MACROS AND DEFINITIONS
- *----------------------------------------------------------*/
-
-/* IDs for commands that can be sent/received on the timer queue.  These are to
-be used solely through the macros that make up the public software timer API,
-as defined below.  The commands that are sent from interrupts must use the
-highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
-or interrupt version of the queue send function should be used. */
-#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR 	( ( BaseType_t ) -2 )
-#define tmrCOMMAND_EXECUTE_CALLBACK				( ( BaseType_t ) -1 )
-#define tmrCOMMAND_START_DONT_TRACE				( ( BaseType_t ) 0 )
-#define tmrCOMMAND_START					    ( ( BaseType_t ) 1 )
-#define tmrCOMMAND_RESET						( ( BaseType_t ) 2 )
-#define tmrCOMMAND_STOP							( ( BaseType_t ) 3 )
-#define tmrCOMMAND_CHANGE_PERIOD				( ( BaseType_t ) 4 )
-#define tmrCOMMAND_DELETE						( ( BaseType_t ) 5 )
-
-#define tmrFIRST_FROM_ISR_COMMAND				( ( BaseType_t ) 6 )
-#define tmrCOMMAND_START_FROM_ISR				( ( BaseType_t ) 6 )
-#define tmrCOMMAND_RESET_FROM_ISR				( ( BaseType_t ) 7 )
-#define tmrCOMMAND_STOP_FROM_ISR				( ( BaseType_t ) 8 )
-#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR		( ( BaseType_t ) 9 )
-
-
-/**
- * Type by which software timers are referenced.  For example, a call to
- * xTimerCreate() returns an TimerHandle_t variable that can then be used to
- * reference the subject timer in calls to other software timer API functions
- * (for example, xTimerStart(), xTimerReset(), etc.).
- */
-typedef void * TimerHandle_t;
-
-/*
- * Defines the prototype to which timer callback functions must conform.
- */
-typedef void (*TimerCallbackFunction_t)( TimerHandle_t xTimer );
-
-/*
- * Defines the prototype to which functions used with the
- * xTimerPendFunctionCallFromISR() function must conform.
- */
-typedef void (*PendedFunction_t)( void *, uint32_t );
-
-/**
- * TimerHandle_t xTimerCreate( 	const char * const pcTimerName,
- * 								TickType_t xTimerPeriodInTicks,
- * 								UBaseType_t uxAutoReload,
- * 								void * pvTimerID,
- * 								TimerCallbackFunction_t pxCallbackFunction );
- *
- * Creates a new software timer instance, and returns a handle by which the
- * created software timer can be referenced.
- *
- * Internally, within the FreeRTOS implementation, software timers use a block
- * of memory, in which the timer data structure is stored.  If a software timer
- * is created using xTimerCreate() then the required memory is automatically
- * dynamically allocated inside the xTimerCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a software timer is created using
- * xTimerCreateStatic() then the application writer must provide the memory that
- * will get used by the software timer.  xTimerCreateStatic() therefore allows a
- * software timer to be created without using any dynamic memory allocation.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a
- * timer into the active state.
- *
- * @param pcTimerName A text name that is assigned to the timer.  This is done
- * purely to assist debugging.  The kernel itself only ever references a timer
- * by its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
- * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
- * has been specified in milliseconds.  For example, if the timer must expire
- * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
- * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
- * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
- * equal to 1000.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
- * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by TimerCallbackFunction_t,
- * which is	"void vCallbackFunction( TimerHandle_t xTimer );".
- *
- * @return If the timer is successfully created then a handle to the newly
- * created timer is returned.  If the timer cannot be created (because either
- * there is insufficient FreeRTOS heap remaining to allocate the timer
- * structures, or the timer period was set to 0) then NULL is returned.
- *
- * Example usage:
- * @verbatim
- * #define NUM_TIMERS 5
- *
- * // An array to hold handles to the created timers.
- * TimerHandle_t xTimers[ NUM_TIMERS ];
- *
- * // An array to hold a count of the number of times each timer expires.
- * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
- *
- * // Define a callback function that will be used by multiple timer instances.
- * // The callback function does nothing but count the number of times the
- * // associated timer expires, and stop the timer once the timer has expired
- * // 10 times.
- * void vTimerCallback( TimerHandle_t pxTimer )
- * {
- * int32_t lArrayIndex;
- * const int32_t xMaxExpiryCountBeforeStopping = 10;
- *
- * 	   // Optionally do something if the pxTimer parameter is NULL.
- * 	   configASSERT( pxTimer );
- *
- *     // Which timer expired?
- *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
- *
- *     // Increment the number of times that pxTimer has expired.
- *     lExpireCounters[ lArrayIndex ] += 1;
- *
- *     // If the timer has expired 10 times then stop it from running.
- *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
- *     {
- *         // Do not use a block time if calling a timer API function from a
- *         // timer callback function, as doing so could cause a deadlock!
- *         xTimerStop( pxTimer, 0 );
- *     }
- * }
- *
- * void main( void )
- * {
- * int32_t x;
- *
- *     // Create then start some timers.  Starting the timers before the scheduler
- *     // has been started means the timers will start running immediately that
- *     // the scheduler starts.
- *     for( x = 0; x < NUM_TIMERS; x++ )
- *     {
- *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
- *                                         ( 100 * x ),   // The timer period in ticks.
- *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
- *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
- *                                         vTimerCallback // Each timer calls the same callback when it expires.
- *                                     );
- *
- *         if( xTimers[ x ] == NULL )
- *         {
- *             // The timer was not created.
- *         }
- *         else
- *         {
- *             // Start the timer.  No block time is specified, and even if one was
- *             // it would be ignored because the scheduler has not yet been
- *             // started.
- *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
- *             {
- *                 // The timer could not be set into the Active state.
- *             }
- *         }
- *     }
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timers running as they have already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	TimerHandle_t xTimerCreate(	const char * const pcTimerName,
-								const TickType_t xTimerPeriodInTicks,
-								const UBaseType_t uxAutoReload,
-								void * const pvTimerID,
-								TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-#endif
-
-/**
- * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
- * 									TickType_t xTimerPeriodInTicks,
- * 									UBaseType_t uxAutoReload,
- * 									void * pvTimerID,
- * 									TimerCallbackFunction_t pxCallbackFunction,
- *									StaticTimer_t *pxTimerBuffer );
- *
- * Creates a new software timer instance, and returns a handle by which the
- * created software timer can be referenced.
- *
- * Internally, within the FreeRTOS implementation, software timers use a block
- * of memory, in which the timer data structure is stored.  If a software timer
- * is created using xTimerCreate() then the required memory is automatically
- * dynamically allocated inside the xTimerCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a software timer is created using
- * xTimerCreateStatic() then the application writer must provide the memory that
- * will get used by the software timer.  xTimerCreateStatic() therefore allows a
- * software timer to be created without using any dynamic memory allocation.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a
- * timer into the active state.
- *
- * @param pcTimerName A text name that is assigned to the timer.  This is done
- * purely to assist debugging.  The kernel itself only ever references a timer
- * by its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
- * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
- * has been specified in milliseconds.  For example, if the timer must expire
- * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
- * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
- * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
- * equal to 1000.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
- * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by TimerCallbackFunction_t,
- * which is "void vCallbackFunction( TimerHandle_t xTimer );".
- *
- * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
- * will be then be used to hold the software timer's data structures, removing
- * the need for the memory to be allocated dynamically.
- *
- * @return If the timer is created then a handle to the created timer is
- * returned.  If pxTimerBuffer was NULL then NULL is returned.
- *
- * Example usage:
- * @verbatim
- *
- * // The buffer used to hold the software timer's data structure.
- * static StaticTimer_t xTimerBuffer;
- *
- * // A variable that will be incremented by the software timer's callback
- * // function.
- * UBaseType_t uxVariableToIncrement = 0;
- *
- * // A software timer callback function that increments a variable passed to
- * // it when the software timer was created.  After the 5th increment the
- * // callback function stops the software timer.
- * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
- * {
- * UBaseType_t *puxVariableToIncrement;
- * BaseType_t xReturned;
- *
- *     // Obtain the address of the variable to increment from the timer ID.
- *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
- *
- *     // Increment the variable to show the timer callback has executed.
- *     ( *puxVariableToIncrement )++;
- *
- *     // If this callback has executed the required number of times, stop the
- *     // timer.
- *     if( *puxVariableToIncrement == 5 )
- *     {
- *         // This is called from a timer callback so must not block.
- *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
- *     }
- * }
- *
- *
- * void main( void )
- * {
- *     // Create the software time.  xTimerCreateStatic() has an extra parameter
- *     // than the normal xTimerCreate() API function.  The parameter is a pointer
- *     // to the StaticTimer_t structure that will hold the software timer
- *     // structure.  If the parameter is passed as NULL then the structure will be
- *     // allocated dynamically, just as if xTimerCreate() had been called.
- *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
- *                                  xTimerPeriod,     // The period of the timer in ticks.
- *                                  pdTRUE,           // This is an auto-reload timer.
- *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
- *                                  prvTimerCallback, // The function to execute when the timer expires.
- *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
- *
- *     // The scheduler has not started yet so a block time is not used.
- *     xReturned = xTimerStart( xTimer, 0 );
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timers running as they have already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,
-										const TickType_t xTimerPeriodInTicks,
-										const UBaseType_t uxAutoReload,
-										void * const pvTimerID,
-										TimerCallbackFunction_t pxCallbackFunction,
-										StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-/**
- * void *pvTimerGetTimerID( TimerHandle_t xTimer );
- *
- * Returns the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer, and by calling the
- * vTimerSetTimerID() API function.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used as time specific (timer local) storage.
- *
- * @param xTimer The timer being queried.
- *
- * @return The ID assigned to the timer being queried.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void *pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
- *
- * Sets the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used as time specific (timer local) storage.
- *
- * @param xTimer The timer being updated.
- *
- * @param pvNewID The ID to assign to the timer.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) PRIVILEGED_FUNCTION;
-
-/**
- * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
- *
- * Queries a timer to see if it is active or dormant.
- *
- * A timer will be dormant if:
- *     1) It has been created but not started, or
- *     2) It is an expired one-shot timer that has not been restarted.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
- * active state.
- *
- * @param xTimer The timer being queried.
- *
- * @return pdFALSE will be returned if the timer is dormant.  A value other than
- * pdFALSE will be returned if the timer is active.
- *
- * Example usage:
- * @verbatim
- * // This function assumes xTimer has already been created.
- * void vAFunction( TimerHandle_t xTimer )
- * {
- *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- *     {
- *         // xTimer is active, do something.
- *     }
- *     else
- *     {
- *         // xTimer is not active, do something else.
- *     }
- * }
- * @endverbatim
- */
-BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
- *
- * Simply returns the handle of the timer service/daemon task.  It it not valid
- * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
- */
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/**
- * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStart() starts a timer that was previously created using the
- * xTimerCreate() API function.  If the timer had already been started and was
- * already in the active state, then xTimerStart() has equivalent functionality
- * to the xTimerReset() API function.
- *
- * Starting a timer ensures the timer is in the active state.  If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerStart() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerStart() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerStart() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
- * to be available.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the start command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called.  The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStart( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStop() stops a timer that was previously started using either of the
- * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
- * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
- *
- * Stopping a timer ensures the timer is not in the active state.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
- * to be available.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the stop command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStop( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerChangePeriod( 	TimerHandle_t xTimer,
- *										TickType_t xNewPeriod,
- *										TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerChangePeriod() changes the period of a timer that was previously
- * created using the xTimerCreate() API function.
- *
- * xTimerChangePeriod() can be called to change the period of an active or
- * dormant state timer.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerChangePeriod() to be available.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
- * that has been specified in milliseconds.  For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the change period command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
- * xTimerChangePeriod() is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the change period command could not be
- * sent to the timer command queue even after xTicksToWait ticks had passed.
- * pdPASS will be returned if the command was successfully sent to the timer
- * command queue.  When the command is actually processed will depend on the
- * priority of the timer service/daemon task relative to other tasks in the
- * system.  The timer service/daemon task priority is set by the
- * configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This function assumes xTimer has already been created.  If the timer
- * // referenced by xTimer is already active when it is called, then the timer
- * // is deleted.  If the timer referenced by xTimer is not active when it is
- * // called, then the period of the timer is set to 500ms and the timer is
- * // started.
- * void vAFunction( TimerHandle_t xTimer )
- * {
- *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- *     {
- *         // xTimer is already active - delete it.
- *         xTimerDelete( xTimer );
- *     }
- *     else
- *     {
- *         // xTimer is not active, change its period to 500ms.  This will also
- *         // cause the timer to start.  Block for a maximum of 100 ticks if the
- *         // change period command cannot immediately be sent to the timer
- *         // command queue.
- *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
- *         {
- *             // The command was successfully sent.
- *         }
- *         else
- *         {
- *             // The command could not be sent, even after waiting for 100 ticks
- *             // to pass.  Take appropriate action here.
- *         }
- *     }
- * }
- * @endverbatim
- */
- #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerDelete() deletes a timer that was previously created using the
- * xTimerCreate() API function.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerDelete() to be available.
- *
- * @param xTimer The handle of the timer being deleted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the delete command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
- * is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the delete command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerChangePeriod() API function example usage scenario.
- */
-#define xTimerDelete( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerReset() re-starts a timer that was previously created using the
- * xTimerCreate() API function.  If the timer had already been started and was
- * already in the active state, then xTimerReset() will cause the timer to
- * re-evaluate its expiry time so that it is relative to when xTimerReset() was
- * called.  If the timer was in the dormant state then xTimerReset() has
- * equivalent functionality to the xTimerStart() API function.
- *
- * Resetting a timer ensures the timer is in the active state.  If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerReset() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerReset() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerReset() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
- * to be available.
- *
- * @param xTimer The handle of the timer being reset/started/restarted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the reset command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called.  The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- * @verbatim
- * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer.
- *
- * TimerHandle_t xBacklightTimer = NULL;
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press event handler.
- * void vKeyPressEventHandler( char cKey )
- * {
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
- *     // if it cannot be sent immediately.
- *     vSetBacklightState( BACKLIGHT_ON );
- *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
- *     {
- *         // The reset command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- * }
- *
- * void main( void )
- * {
- * int32_t x;
- *
- *     // Create then start the one-shot timer that is responsible for turning
- *     // the back-light off if no keys are pressed within a 5 second period.
- *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
- *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
- *                                     pdFALSE,                    // The timer is a one-shot timer.
- *                                     0,                          // The id is not used by the callback so can take any value.
- *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
- *                                   );
- *
- *     if( xBacklightTimer == NULL )
- *     {
- *         // The timer was not created.
- *     }
- *     else
- *     {
- *         // Start the timer.  No block time is specified, and even if one was
- *         // it would be ignored because the scheduler has not yet been
- *         // started.
- *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
- *         {
- *             // The timer could not be set into the Active state.
- *         }
- *     }
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timer running as it has already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#define xTimerReset( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerStartFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStart() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerStartFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
- * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerStartFromISR() is actually called.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xBacklightTimer has already been created.  When a
- * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // Ensure the LCD back-light is on, then restart the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  This is an interrupt service routine so can only
- *     // call FreeRTOS API functions that end in "FromISR".
- *     vSetBacklightState( BACKLIGHT_ON );
- *
- *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- *     // as both cause the timer to re-calculate its expiry time.
- *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- *     // declared (in this function).
- *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The start command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerStopFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStop() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerStopFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
- * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system.  The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xTimer has already been created and started.  When
- * // an interrupt occurs, the timer should be simply stopped.
- *
- * // The interrupt service routine that stops the timer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // The interrupt has occurred - simply stop the timer.
- *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- *     // (within this function).  As this is an interrupt service routine, only
- *     // FreeRTOS API functions that end in "FromISR" can be used.
- *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The stop command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
- *										 TickType_t xNewPeriod,
- *										 BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerChangePeriod() that can be called from an interrupt
- * service routine.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
- * that has been specified in milliseconds.  For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
- * timer command queue, so has the potential to transition the timer service/
- * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
- * causes the timer service/daemon task to leave the Blocked state, and the
- * timer service/daemon task has a priority equal to or greater than the
- * currently executing task (the task that was interrupted), then
- * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
- * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
- * this value to pdTRUE then a context switch should be performed before the
- * interrupt exits.
- *
- * @return pdFAIL will be returned if the command to change the timers period
- * could not be sent to the timer command queue.  pdPASS will be returned if the
- * command was successfully sent to the timer command queue.  When the command
- * is actually processed will depend on the priority of the timer service/daemon
- * task relative to other tasks in the system.  The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xTimer has already been created and started.  When
- * // an interrupt occurs, the period of xTimer should be changed to 500ms.
- *
- * // The interrupt service routine that changes the period of xTimer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // The interrupt has occurred - change the period of xTimer to 500ms.
- *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- *     // (within this function).  As this is an interrupt service routine, only
- *     // FreeRTOS API functions that end in "FromISR" can be used.
- *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The command to change the timers period was not executed
- *         // successfully.  Take appropriate action here.
- *     }
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerResetFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerReset() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer that is to be started, reset, or
- * restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerResetFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
- * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
- * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xBacklightTimer has already been created.  When a
- * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  This is an interrupt service routine so can only
- *     // call FreeRTOS API functions that end in "FromISR".
- *     vSetBacklightState( BACKLIGHT_ON );
- *
- *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- *     // as both cause the timer to re-calculate its expiry time.
- *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- *     // declared (in this function).
- *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The reset command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-
-/**
- * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
- *                                          void *pvParameter1,
- *                                          uint32_t ulParameter2,
- *                                          BaseType_t *pxHigherPriorityTaskWoken );
- *
- *
- * Used from application interrupt service routines to defer the execution of a
- * function to the RTOS daemon task (the timer service task, hence this function
- * is implemented in timers.c and is prefixed with 'Timer').
- *
- * Ideally an interrupt service routine (ISR) is kept as short as possible, but
- * sometimes an ISR either has a lot of processing to do, or needs to perform
- * processing that is not deterministic.  In these cases
- * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
- * to the RTOS daemon task.
- *
- * A mechanism is provided that allows the interrupt to return directly to the
- * task that will subsequently execute the pended callback function.  This
- * allows the callback function to execute contiguously in time with the
- * interrupt - just as if the callback had executed in the interrupt itself.
- *
- * @param xFunctionToPend The function to execute from the timer service/
- * daemon task.  The function must conform to the PendedFunction_t
- * prototype.
- *
- * @param pvParameter1 The value of the callback function's first parameter.
- * The parameter has a void * type to allow it to be used to pass any type.
- * For example, unsigned longs can be cast to a void *, or the void * can be
- * used to point to a structure.
- *
- * @param ulParameter2 The value of the callback function's second parameter.
- *
- * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
- * will result in a message being sent to the timer daemon task.  If the
- * priority of the timer daemon task (which is set using
- * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
- * the currently running task (the task the interrupt interrupted) then
- * *pxHigherPriorityTaskWoken will be set to pdTRUE within
- * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
- * requested before the interrupt exits.  For that reason
- * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
- * example code below.
- *
- * @return pdPASS is returned if the message was successfully sent to the
- * timer daemon task, otherwise pdFALSE is returned.
- *
- * Example usage:
- * @verbatim
- *
- *	// The callback function that will execute in the context of the daemon task.
- *  // Note callback functions must all use this same prototype.
- *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
- *	{
- *		BaseType_t xInterfaceToService;
- *
- *		// The interface that requires servicing is passed in the second
- *      // parameter.  The first parameter is not used in this case.
- *		xInterfaceToService = ( BaseType_t ) ulParameter2;
- *
- *		// ...Perform the processing here...
- *	}
- *
- *	// An ISR that receives data packets from multiple interfaces
- *  void vAnISR( void )
- *	{
- *		BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
- *
- *		// Query the hardware to determine which interface needs processing.
- *		xInterfaceToService = prvCheckInterfaces();
- *
- *      // The actual processing is to be deferred to a task.  Request the
- *      // vProcessInterface() callback function is executed, passing in the
- *		// number of the interface that needs processing.  The interface to
- *		// service is passed in the second parameter.  The first parameter is
- *		// not used in this case.
- *		xHigherPriorityTaskWoken = pdFALSE;
- *		xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
- *
- *		// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
- *		// switch should be requested.  The macro used is port specific and will
- *		// be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
- *		// the documentation page for the port being used.
- *		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
- *
- *	}
- * @endverbatim
- */
-BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
- /**
-  * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
-  *                                    void *pvParameter1,
-  *                                    uint32_t ulParameter2,
-  *                                    TickType_t xTicksToWait );
-  *
-  *
-  * Used to defer the execution of a function to the RTOS daemon task (the timer
-  * service task, hence this function is implemented in timers.c and is prefixed
-  * with 'Timer').
-  *
-  * @param xFunctionToPend The function to execute from the timer service/
-  * daemon task.  The function must conform to the PendedFunction_t
-  * prototype.
-  *
-  * @param pvParameter1 The value of the callback function's first parameter.
-  * The parameter has a void * type to allow it to be used to pass any type.
-  * For example, unsigned longs can be cast to a void *, or the void * can be
-  * used to point to a structure.
-  *
-  * @param ulParameter2 The value of the callback function's second parameter.
-  *
-  * @param xTicksToWait Calling this function will result in a message being
-  * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
-  * time the calling task should remain in the Blocked state (so not using any
-  * processing time) for space to become available on the timer queue if the
-  * queue is found to be full.
-  *
-  * @return pdPASS is returned if the message was successfully sent to the
-  * timer daemon task, otherwise pdFALSE is returned.
-  *
-  */
-BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * const char * const pcTimerGetName( TimerHandle_t xTimer );
- *
- * Returns the name that was assigned to a timer when the timer was created.
- *
- * @param xTimer The handle of the timer being queried.
- *
- * @return The name assigned to the timer specified by the xTimer parameter.
- */
-const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
- * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
- *
- * Returns the period of a timer.
- *
- * @param xTimer The handle of the timer being queried.
- *
- * @return The period of the timer in ticks.
- */
-TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
-* TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
-*
-* Returns the time in ticks at which the timer will expire.  If this is less
-* than the current tick count then the expiry time has overflowed from the
-* current time.
-*
-* @param xTimer The handle of the timer being queried.
-*
-* @return If the timer is running then the time in ticks at which the timer
-* will next expire is returned.  If the timer is not running then the return
-* value is undefined.
-*/
-TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/*
- * Functions beyond this part are not part of the public API and are intended
- * for use by the kernel only.
- */
-BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
-BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* TIMERS_H */
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/list.c b/ports/cc3200/FreeRTOS/Source/list.c
deleted file mode 100644
index 5e207c1608..0000000000
--- a/ports/cc3200/FreeRTOS/Source/list.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-#include 
-#include "FreeRTOS.h"
-#include "list.h"
-
-/*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
-
-void vListInitialise( List_t * const pxList )
-{
-	/* The list structure contains a list item which is used to mark the
-	end of the list.  To initialise the list the list end is inserted
-	as the only list entry. */
-	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-
-	/* The list end value is the highest possible value in the list to
-	ensure it remains at the end of the list. */
-	pxList->xListEnd.xItemValue = portMAX_DELAY;
-
-	/* The list end next and previous pointers point to itself so we know
-	when the list is empty. */
-	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-
-	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
-
-	/* Write known values into the list if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
-	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
-}
-/*-----------------------------------------------------------*/
-
-void vListInitialiseItem( ListItem_t * const pxItem )
-{
-	/* Make sure the list item is not recorded as being on a list. */
-	pxItem->pvContainer = NULL;
-
-	/* Write known values into the list item if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-}
-/*-----------------------------------------------------------*/
-
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
-ListItem_t * const pxIndex = pxList->pxIndex;
-
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert a new list item into pxList, but rather than sort the list,
-	makes the new list item the last item to be removed by a call to
-	listGET_OWNER_OF_NEXT_ENTRY(). */
-	pxNewListItem->pxNext = pxIndex;
-	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	pxIndex->pxPrevious->pxNext = pxNewListItem;
-	pxIndex->pxPrevious = pxNewListItem;
-
-	/* Remember which list the item is in. */
-	pxNewListItem->pvContainer = ( void * ) pxList;
-
-	( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
-ListItem_t *pxIterator;
-const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
-
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert the new list item into the list, sorted in xItemValue order.
-
-	If the list already contains a list item with the same item value then the
-	new list item should be placed after it.  This ensures that TCB's which are
-	stored in ready lists (all of which have the same xItemValue value) get a
-	share of the CPU.  However, if the xItemValue is the same as the back marker
-	the iteration loop below will not end.  Therefore the value is checked
-	first, and the algorithm slightly modified if necessary. */
-	if( xValueOfInsertion == portMAX_DELAY )
-	{
-		pxIterator = pxList->xListEnd.pxPrevious;
-	}
-	else
-	{
-		/* *** NOTE ***********************************************************
-		If you find your application is crashing here then likely causes are
-		listed below.  In addition see http://www.freertos.org/FAQHelp.html for
-		more tips, and ensure configASSERT() is defined!
-		http://www.freertos.org/a00110.html#configASSERT
-
-			1) Stack overflow -
-			   see http://www.freertos.org/Stacks-and-stack-overflow-checking.html
-			2) Incorrect interrupt priority assignment, especially on Cortex-M
-			   parts where numerically high priority values denote low actual
-			   interrupt priorities, which can seem counter intuitive.  See
-			   http://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
-			   of configMAX_SYSCALL_INTERRUPT_PRIORITY on
-			   http://www.freertos.org/a00110.html
-			3) Calling an API function from within a critical section or when
-			   the scheduler is suspended, or calling an API function that does
-			   not end in "FromISR" from an interrupt.
-			4) Using a queue or semaphore before it has been initialised or
-			   before the scheduler has been started (are interrupts firing
-			   before vTaskStartScheduler() has been called?).
-		**********************************************************************/
-
-		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-		{
-			/* There is nothing to do here, just iterating to the wanted
-			insertion position. */
-		}
-	}
-
-	pxNewListItem->pxNext = pxIterator->pxNext;
-	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
-	pxNewListItem->pxPrevious = pxIterator;
-	pxIterator->pxNext = pxNewListItem;
-
-	/* Remember which list the item is in.  This allows fast removal of the
-	item later. */
-	pxNewListItem->pvContainer = ( void * ) pxList;
-
-	( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
-{
-/* The list item knows which list it is in.  Obtain the list from the list
-item. */
-List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer;
-
-	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
-	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	/* Make sure the index is left pointing to a valid item. */
-	if( pxList->pxIndex == pxItemToRemove )
-	{
-		pxList->pxIndex = pxItemToRemove->pxPrevious;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxItemToRemove->pvContainer = NULL;
-	( pxList->uxNumberOfItems )--;
-
-	return pxList->uxNumberOfItems;
-}
-/*-----------------------------------------------------------*/
-
diff --git a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
deleted file mode 100644
index f6fe755fbd..0000000000
--- a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
+++ /dev/null
@@ -1,710 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
-defined.  The value should also ensure backward compatibility.
-FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
-#ifndef configKERNEL_INTERRUPT_PRIORITY
-	#define configKERNEL_INTERRUPT_PRIORITY 255
-#endif
-
-#ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
-#else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
-#endif
-
-/* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-/* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
-
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
-
-/* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
-
-/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
-
-/* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000UL )
-
-/* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
-
-/* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
-
-/* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
-
-/* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
-#ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
-#else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
-#endif
-
-/* Each task maintains its own interrupt status in the critical nesting
-variable. */
-static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
-
-/*
- * Setup the timer to generate the tick interrupts.  The implementation in this
- * file is weak to allow application writers to change the timer used to
- * generate the tick interrupt.
- */
-void vPortSetupTimerInterrupt( void );
-
-/*
- * Exception handlers.
- */
-void xPortPendSVHandler( void ) __attribute__ (( naked ));
-void xPortSysTickHandler( void );
-void vPortSVCHandler( void ) __attribute__ (( naked ));
-
-/*
- * Start first task is a separate function so it can be tested in isolation.
- */
-static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
-
-/*
- * Used to catch tasks that attempt to return from their implementing function.
- */
-static void prvTaskExitError( void );
-
-/*-----------------------------------------------------------*/
-
-/*
- * The number of SysTick increments that make up one tick period.
- */
-#if configUSE_TICKLESS_IDLE == 1
-	static uint32_t ulTimerCountsForOneTick = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-
-/*
- * The maximum number of tick periods that can be suppressed is limited by the
- * 24 bit resolution of the SysTick timer.
- */
-#if configUSE_TICKLESS_IDLE == 1
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-
-/*
- * Compensate for the CPU cycles that pass while the SysTick is stopped (low
- * power functionality only.
- */
-#if configUSE_TICKLESS_IDLE == 1
-	static uint32_t ulStoppedTimerCompensation = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-
-/*
- * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
- * FreeRTOS API functions are not called from interrupts that have been assigned
- * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
- */
-#if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
-#endif /* configASSERT_DEFINED */
-
-/*-----------------------------------------------------------*/
-
-/*
- * See header file for description.
- */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-{
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
-
-	return pxTopOfStack;
-}
-/*-----------------------------------------------------------*/
-
-static void prvTaskExitError( void )
-{
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
-
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-void vPortSVCHandler( void )
-{
-	__asm volatile (
-					"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-					"	ldr r1, [r3]					\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-					"	ldr r0, [r1]					\n" /* The first item in pxCurrentTCB is the task top of stack. */
-					"	ldmia r0!, {r4-r11}				\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-					"	msr psp, r0						\n" /* Restore the task stack pointer. */
-					"	isb								\n"
-					"	mov r0, #0 						\n"
-					"	msr	basepri, r0					\n"
-					"	orr r14, #0xd					\n"
-					"	bx r14							\n"
-					"									\n"
-					"	.align 4						\n"
-					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-				);
-}
-/*-----------------------------------------------------------*/
-
-static void prvPortStartFirstTask( void )
-{
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc 0					\n" /* System call to start first task. */
-					" nop					\n"
-				);
-}
-/*-----------------------------------------------------------*/
-
-/*
- * See header file for description.
- */
-BaseType_t xPortStartScheduler( void )
-{
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
-
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
-
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
-
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
-
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
-
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
-
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
-
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
-
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
-
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
-
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
-
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
-
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
-
-	/* Start the first task. */
-	prvPortStartFirstTask();
-
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS. */
-	prvTaskExitError();
-
-	/* Should not get here! */
-	return 0;
-}
-/*-----------------------------------------------------------*/
-
-void vPortEndScheduler( void )
-{
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
-}
-/*-----------------------------------------------------------*/
-
-void vPortEnterCritical( void )
-{
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
-
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
-}
-/*-----------------------------------------------------------*/
-
-void vPortExitCritical( void )
-{
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-}
-/*-----------------------------------------------------------*/
-
-void xPortPendSVHandler( void )
-{
-	/* This is a naked function. */
-
-	__asm volatile
-	(
-	"	mrs r0, psp							\n"
-	"	isb									\n"
-	"										\n"
-	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-	"	ldr	r2, [r3]						\n"
-	"										\n"
-	"	stmdb r0!, {r4-r11}					\n" /* Save the remaining registers. */
-	"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-	"										\n"
-	"	stmdb sp!, {r3, r14}				\n"
-	"	mov r0, %0							\n"
-	"	msr basepri, r0						\n"
-	"	bl vTaskSwitchContext				\n"
-	"	mov r0, #0							\n"
-	"	msr basepri, r0						\n"
-	"	ldmia sp!, {r3, r14}				\n"
-	"										\n"	/* Restore the context, including the critical nesting count. */
-	"	ldr r1, [r3]						\n"
-	"	ldr r0, [r1]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	ldmia r0!, {r4-r11}					\n" /* Pop the registers. */
-	"	msr psp, r0							\n"
-	"	isb									\n"
-	"	bx r14								\n"
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
-}
-/*-----------------------------------------------------------*/
-
-void xPortSysTickHandler( void )
-{
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
-}
-/*-----------------------------------------------------------*/
-
-#if configUSE_TICKLESS_IDLE == 1
-
-	__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
-	TickType_t xModifiableIdleTime;
-
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
-
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
-
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
-
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
-
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
-
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
-
-			/* Stop SysTick.  Again, the time the SysTick is stopped for is
-			accounted for as best it can be, but using the tickless mode will
-			inevitably result in some tiny drift of the time maintained by the
-			kernel with respect to calendar time. */
-			ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
-			portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" );
-
-			if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
-
-				/* The tick interrupt has already executed, and the SysTick
-				count reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
-
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
-
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
-
-				/* The tick interrupt handler will already have pended the tick
-				processing in the kernel.  As the pending tick will be
-				processed as soon as this function exits, the tick value
-				maintained by the tick is stepped forward by one less than the
-				time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
-
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
-
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value.  The critical section is used to ensure the tick interrupt
-			can only execute once in the case that the reload register is near
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portENTER_CRITICAL();
-			{
-				portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-				vTaskStepTick( ulCompleteTickPeriods );
-				portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-			}
-			portEXIT_CRITICAL();
-		}
-	}
-
-#endif /* #if configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-/*
- * Setup the systick timer to generate the tick interrupts at the required
- * frequency.
- */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
-{
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if configUSE_TICKLESS_IDLE == 1
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
-
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
-}
-/*-----------------------------------------------------------*/
-
-#if( configASSERT_DEFINED == 1 )
-
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
-
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
-
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
-
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredicable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
-
-#endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
deleted file mode 100644
index d44fc92228..0000000000
--- a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the
- * given hardware and compiler.
- *
- * These settings should not be altered.
- *-----------------------------------------------------------
- */
-
-/* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
-
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
-/*-----------------------------------------------------------*/
-
-/* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-/*-----------------------------------------------------------*/
-
-/* Scheduler utilities. */
-#define portYIELD() 															\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" );													\
-	__asm volatile( "isb" );													\
-}
-
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-
-/*-----------------------------------------------------------*/
-
-/* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-/* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
-/*-----------------------------------------------------------*/
-
-/* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
-
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
-
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
-
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
-		return ucReturn;
-	}
-
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
-
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
-
-	/*-----------------------------------------------------------*/
-
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
-
-/*-----------------------------------------------------------*/
-
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
-
-/* portNOP() is not required by this port. */
-#define portNOP()
-
-#define portINLINE	__inline
-
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
-
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
-
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
-
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
-
-	return xReturn;
-}
-
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
-
-	__asm volatile
-	(
-		"	mov %0, %1												\n"	\
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
-}
-
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
-
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n"	\
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
-
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
-}
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue )
-	);
-}
-/*-----------------------------------------------------------*/
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
-
diff --git a/ports/cc3200/FreeRTOS/Source/portable/MemMang/heap_4.c b/ports/cc3200/FreeRTOS/Source/portable/MemMang/heap_4.c
deleted file mode 100644
index e7c7ade682..0000000000
--- a/ports/cc3200/FreeRTOS/Source/portable/MemMang/heap_4.c
+++ /dev/null
@@ -1,478 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/*
- * A sample implementation of pvPortMalloc() and vPortFree() that combines
- * (coalescences) adjacent memory blocks as they are freed, and in so doing
- * limits memory fragmentation.
- *
- * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
- * memory management pages of http://www.FreeRTOS.org for more information.
- */
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "FreeRTOS.h"
-#include "task.h"
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
-#endif
-
-/* Block sizes must not get too small. */
-#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
-
-/* Assumes 8bit bytes! */
-#define heapBITS_PER_BYTE		( ( size_t ) 8 )
-
-/* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
-#else
-	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
-#endif /* configAPPLICATION_ALLOCATED_HEAP */
-
-/* Define the linked list structure.  This is used to link free blocks in order
-of their memory address. */
-typedef struct A_BLOCK_LINK
-{
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
-	size_t xBlockSize;						/*<< The size of the free block. */
-} BlockLink_t;
-
-/*-----------------------------------------------------------*/
-
-/*
- * Inserts a block of memory that is being freed into the correct position in
- * the list of free memory blocks.  The block being freed will be merged with
- * the block in front it and/or the block behind it if the memory blocks are
- * adjacent to each other.
- */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
-
-/*
- * Called automatically to setup the required heap structures the first time
- * pvPortMalloc() is called.
- */
-static void prvHeapInit( void );
-
-/*-----------------------------------------------------------*/
-
-/* The size of the structure placed at the beginning of each allocated memory
-block must by correctly byte aligned. */
-static const size_t xHeapStructSize	= ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-
-/* Create a couple of list links to mark the start and end of the list. */
-static BlockLink_t xStart, *pxEnd = NULL;
-
-/* Keeps track of the number of free bytes remaining, but says nothing about
-fragmentation. */
-static size_t xFreeBytesRemaining = 0U;
-static size_t xMinimumEverFreeBytesRemaining = 0U;
-
-/* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
-member of an BlockLink_t structure is set then the block belongs to the
-application.  When the bit is free the block is still part of the free heap
-space. */
-static size_t xBlockAllocatedBit = 0;
-
-/*-----------------------------------------------------------*/
-
-void *pvPortMalloc( size_t xWantedSize )
-{
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
-
-	vTaskSuspendAll();
-	{
-		/* If this is the first call to malloc then the heap will require
-		initialisation to setup the list of free blocks. */
-		if( pxEnd == NULL )
-		{
-			prvHeapInit();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* Check the requested block size is not so large that the top bit is
-		set.  The top bit of the block size member of the BlockLink_t structure
-		is used to determine who owns the block - the application or the
-		kernel, so it must be free. */
-		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-		{
-			/* The wanted size is increased so it can contain a BlockLink_t
-			structure in addition to the requested amount of bytes. */
-			if( xWantedSize > 0 )
-			{
-				xWantedSize += xHeapStructSize;
-
-				/* Ensure that blocks are always aligned to the required number
-				of bytes. */
-				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
-				{
-					/* Byte alignment required. */
-					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
-					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-			{
-				/* Traverse the list from the start	(lowest address) block until
-				one	of adequate size is found. */
-				pxPreviousBlock = &xStart;
-				pxBlock = xStart.pxNextFreeBlock;
-				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-				{
-					pxPreviousBlock = pxBlock;
-					pxBlock = pxBlock->pxNextFreeBlock;
-				}
-
-				/* If the end marker was reached then a block of adequate size
-				was	not found. */
-				if( pxBlock != pxEnd )
-				{
-					/* Return the memory space pointed to - jumping over the
-					BlockLink_t structure at its start. */
-					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
-
-					/* This block is being returned for use so must be taken out
-					of the list of free blocks. */
-					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
-
-					/* If the block is larger than required it can be split into
-					two. */
-					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
-					{
-						/* This block is to be split into two.  Create a new
-						block following the number of bytes requested. The void
-						cast is used to prevent byte alignment warnings from the
-						compiler. */
-						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
-
-						/* Calculate the sizes of two blocks split from the
-						single block. */
-						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-						pxBlock->xBlockSize = xWantedSize;
-
-						/* Insert the new block into the list of free blocks. */
-						prvInsertBlockIntoFreeList( pxNewBlockLink );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					xFreeBytesRemaining -= pxBlock->xBlockSize;
-
-					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-					{
-						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* The block is being returned - it is allocated and owned
-					by the application and has no "next" block. */
-					pxBlock->xBlockSize |= xBlockAllocatedBit;
-					pxBlock->pxNextFreeBlock = NULL;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
-
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
-
-	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vPortFree( void *pv )
-{
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
-
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		before it. */
-		puc -= xHeapStructSize;
-
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
-
-		/* Check the block is actually allocated. */
-		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		configASSERT( pxLink->pxNextFreeBlock == NULL );
-
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
-
-				vTaskSuspendAll();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-size_t xPortGetFreeHeapSize( void )
-{
-	return xFreeBytesRemaining;
-}
-/*-----------------------------------------------------------*/
-
-size_t xPortGetMinimumEverFreeHeapSize( void )
-{
-	return xMinimumEverFreeBytesRemaining;
-}
-/*-----------------------------------------------------------*/
-
-void vPortInitialiseBlocks( void )
-{
-	/* This just exists to keep the linker quiet. */
-}
-/*-----------------------------------------------------------*/
-
-static void prvHeapInit( void )
-{
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
-
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
-
-	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( portBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
-
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
-
-	/* xStart is used to hold a pointer to the first item in the list of free
-	blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
-
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
-
-	/* To start with there is a single free block that is sized to take up the
-	entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
-
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
-}
-/*-----------------------------------------------------------*/
-
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
-{
-BlockLink_t *pxIterator;
-uint8_t *puc;
-
-	/* Iterate through the list until a block is found that has a higher address
-	than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
-
-	/* Do the block being inserted, and the block it is being inserted after
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	/* Do the block being inserted, and the block it is being inserted before
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
-
-	/* If the block being inserted plugged a gab, so was merged with the block
-	before and the block after, then it's pxNextFreeBlock pointer will have
-	already been set, and should not be set here as that would make it point
-	to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
-
diff --git a/ports/cc3200/FreeRTOS/Source/queue.c b/ports/cc3200/FreeRTOS/Source/queue.c
deleted file mode 100644
index ce623bec26..0000000000
--- a/ports/cc3200/FreeRTOS/Source/queue.c
+++ /dev/null
@@ -1,2566 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-#include 
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "FreeRTOS.h"
-#include "task.h"
-#include "queue.h"
-
-#if ( configUSE_CO_ROUTINES == 1 )
-	#include "croutine.h"
-#endif
-
-/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
-MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
-header files above, but not in this file, in order to generate the correct
-privileged Vs unprivileged linkage and placement. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
-
-
-/* Constants used with the cRxLock and cTxLock structure members. */
-#define queueUNLOCKED					( ( int8_t ) -1 )
-#define queueLOCKED_UNMODIFIED			( ( int8_t ) 0 )
-
-/* When the Queue_t structure is used to represent a base queue its pcHead and
-pcTail members are used as pointers into the queue storage area.  When the
-Queue_t structure is used to represent a mutex pcHead and pcTail pointers are
-not necessary, and the pcHead pointer is set to NULL to indicate that the
-pcTail pointer actually points to the mutex holder (if any).  Map alternative
-names to the pcHead and pcTail structure members to ensure the readability of
-the code is maintained despite this dual use of two structure members.  An
-alternative implementation would be to use a union, but use of a union is
-against the coding standard (although an exception to the standard has been
-permitted where the dual use also significantly changes the type of the
-structure member). */
-#define pxMutexHolder					pcTail
-#define uxQueueType						pcHead
-#define queueQUEUE_IS_MUTEX				NULL
-
-/* Semaphores do not actually store or copy data, so have an item size of
-zero. */
-#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 )
-#define queueMUTEX_GIVE_BLOCK_TIME		 ( ( TickType_t ) 0U )
-
-#if( configUSE_PREEMPTION == 0 )
-	/* If the cooperative scheduler is being used then a yield should not be
-	performed just because a higher priority task has been woken. */
-	#define queueYIELD_IF_USING_PREEMPTION()
-#else
-	#define queueYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
-#endif
-
-/*
- * Definition of the queue used by the scheduler.
- * Items are queued by copy, not reference.  See the following link for the
- * rationale: http://www.freertos.org/Embedded-RTOS-Queues.html
- */
-typedef struct QueueDefinition
-{
-	int8_t *pcHead;					/*< Points to the beginning of the queue storage area. */
-	int8_t *pcTail;					/*< Points to the byte at the end of the queue storage area.  Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
-	int8_t *pcWriteTo;				/*< Points to the free next place in the storage area. */
-
-	union							/* Use of a union is an exception to the coding standard to ensure two mutually exclusive structure members don't appear simultaneously (wasting RAM). */
-	{
-		int8_t *pcReadFrom;			/*< Points to the last place that a queued item was read from when the structure is used as a queue. */
-		UBaseType_t uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */
-	} u;
-
-	List_t xTasksWaitingToSend;		/*< List of tasks that are blocked waiting to post onto this queue.  Stored in priority order. */
-	List_t xTasksWaitingToReceive;	/*< List of tasks that are blocked waiting to read from this queue.  Stored in priority order. */
-
-	volatile UBaseType_t uxMessagesWaiting;/*< The number of items currently in the queue. */
-	UBaseType_t uxLength;			/*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
-	UBaseType_t uxItemSize;			/*< The size of each items that the queue will hold. */
-
-	volatile int8_t cRxLock;		/*< Stores the number of items received from the queue (removed from the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
-	volatile int8_t cTxLock;		/*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
-
-	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-		uint8_t ucStaticallyAllocated;	/*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */
-	#endif
-
-	#if ( configUSE_QUEUE_SETS == 1 )
-		struct QueueDefinition *pxQueueSetContainer;
-	#endif
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t uxQueueNumber;
-		uint8_t ucQueueType;
-	#endif
-
-} xQUEUE;
-
-/* The old xQUEUE name is maintained above then typedefed to the new Queue_t
-name below to enable the use of older kernel aware debuggers. */
-typedef xQUEUE Queue_t;
-
-/*-----------------------------------------------------------*/
-
-/*
- * The queue registry is just a means for kernel aware debuggers to locate
- * queue structures.  It has no other purpose so is an optional component.
- */
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	/* The type stored within the queue registry array.  This allows a name
-	to be assigned to each queue making kernel aware debugging a little
-	more user friendly. */
-	typedef struct QUEUE_REGISTRY_ITEM
-	{
-		const char *pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-		QueueHandle_t xHandle;
-	} xQueueRegistryItem;
-
-	/* The old xQueueRegistryItem name is maintained above then typedefed to the
-	new xQueueRegistryItem name below to enable the use of older kernel aware
-	debuggers. */
-	typedef xQueueRegistryItem QueueRegistryItem_t;
-
-	/* The queue registry is simply an array of QueueRegistryItem_t structures.
-	The pcQueueName member of a structure being NULL is indicative of the
-	array position being vacant. */
-	PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-
-/*
- * Unlocks a queue locked by a call to prvLockQueue.  Locking a queue does not
- * prevent an ISR from adding or removing items to the queue, but does prevent
- * an ISR from removing tasks from the queue event lists.  If an ISR finds a
- * queue is locked it will instead increment the appropriate queue lock count
- * to indicate that a task may require unblocking.  When the queue in unlocked
- * these lock counts are inspected, and the appropriate action taken.
- */
-static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Uses a critical section to determine if there is any data in a queue.
- *
- * @return pdTRUE if the queue contains no items, otherwise pdFALSE.
- */
-static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Uses a critical section to determine if there is any space in a queue.
- *
- * @return pdTRUE if there is no space, otherwise pdFALSE;
- */
-static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Copies an item into the queue, either at the front of the queue or the
- * back of the queue.
- */
-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
-
-/*
- * Copies an item out of a queue.
- */
-static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;
-
-#if ( configUSE_QUEUE_SETS == 1 )
-	/*
-	 * Checks to see if a queue is a member of a queue set, and if so, notifies
-	 * the queue set that the queue contains data.
-	 */
-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * Called after a Queue_t structure has been allocated either statically or
- * dynamically to fill in the structure's members.
- */
-static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Mutexes are a special type of queue.  When a mutex is created, first the
- * queue is created, then prvInitialiseMutex() is called to configure the queue
- * as a mutex.
- */
-#if( configUSE_MUTEXES == 1 )
-	static void prvInitialiseMutex( Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
-#endif
-
-/*-----------------------------------------------------------*/
-
-/*
- * Macro to mark a queue as locked.  Locking a queue prevents an ISR from
- * accessing the queue event lists.
- */
-#define prvLockQueue( pxQueue )								\
-	taskENTER_CRITICAL();									\
-	{														\
-		if( ( pxQueue )->cRxLock == queueUNLOCKED )			\
-		{													\
-			( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED;	\
-		}													\
-		if( ( pxQueue )->cTxLock == queueUNLOCKED )			\
-		{													\
-			( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED;	\
-		}													\
-	}														\
-	taskEXIT_CRITICAL()
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
-{
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-
-	taskENTER_CRITICAL();
-	{
-		pxQueue->pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize );
-		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
-		pxQueue->pcWriteTo = pxQueue->pcHead;
-		pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( UBaseType_t ) 1U ) * pxQueue->uxItemSize );
-		pxQueue->cRxLock = queueUNLOCKED;
-		pxQueue->cTxLock = queueUNLOCKED;
-
-		if( xNewQueue == pdFALSE )
-		{
-			/* If there are tasks blocked waiting to read from the queue, then
-			the tasks will remain blocked as after this function exits the queue
-			will still be empty.  If there are tasks blocked waiting to write to
-			the queue, then one should be unblocked as after this function exits
-			it will be possible to write to it. */
-			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-			{
-				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-				{
-					queueYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			/* Ensure the event queues start in the correct state. */
-			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
-			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	/* A value is returned for calling semantic consistency with previous
-	versions. */
-	return pdPASS;
-}
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-
-		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
-
-		/* The StaticQueue_t structure and the queue storage area must be
-		supplied. */
-		configASSERT( pxStaticQueue != NULL );
-
-		/* A queue storage area should be provided if the item size is not 0, and
-		should not be provided if the item size is 0. */
-		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
-		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
-
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
-			the real queue and semaphore structures. */
-			volatile size_t xSize = sizeof( StaticQueue_t );
-			configASSERT( xSize == sizeof( Queue_t ) );
-		}
-		#endif /* configASSERT_DEFINED */
-
-		/* The address of a statically allocated queue was passed in, use it.
-		The address of a statically allocated storage area was also passed in
-		but is already set. */
-		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-
-		if( pxNewQueue != NULL )
-		{
-			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-			{
-				/* Queues can be allocated wither statically or dynamically, so
-				note this queue was allocated statically in case the queue is
-				later deleted. */
-				pxNewQueue->ucStaticallyAllocated = pdTRUE;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-
-			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
-		}
-
-		return pxNewQueue;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-
-	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-	size_t xQueueSizeInBytes;
-	uint8_t *pucQueueStorage;
-
-		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
-
-		if( uxItemSize == ( UBaseType_t ) 0 )
-		{
-			/* There is not going to be a queue storage area. */
-			xQueueSizeInBytes = ( size_t ) 0;
-		}
-		else
-		{
-			/* Allocate enough space to hold the maximum number of items that
-			can be in the queue at any time. */
-			xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		}
-
-		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );
-
-		if( pxNewQueue != NULL )
-		{
-			/* Jump past the queue structure to find the location of the queue
-			storage area. */
-			pucQueueStorage = ( ( uint8_t * ) pxNewQueue ) + sizeof( Queue_t );
-
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* Queues can be created either statically or dynamically, so
-				note this task was created dynamically in case it is later
-				deleted. */
-				pxNewQueue->ucStaticallyAllocated = pdFALSE;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
-		}
-
-		return pxNewQueue;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
-{
-	/* Remove compiler warnings about unused parameters should
-	configUSE_TRACE_FACILITY not be set to 1. */
-	( void ) ucQueueType;
-
-	if( uxItemSize == ( UBaseType_t ) 0 )
-	{
-		/* No RAM was allocated for the queue storage area, but PC head cannot
-		be set to NULL because NULL is used as a key to say the queue is used as
-		a mutex.  Therefore just set pcHead to point to the queue as a benign
-		value that is known to be within the memory map. */
-		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
-	}
-	else
-	{
-		/* Set the head to the start of the queue storage area. */
-		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
-	}
-
-	/* Initialise the queue members as described where the queue type is
-	defined. */
-	pxNewQueue->uxLength = uxQueueLength;
-	pxNewQueue->uxItemSize = uxItemSize;
-	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-	{
-		pxNewQueue->ucQueueType = ucQueueType;
-	}
-	#endif /* configUSE_TRACE_FACILITY */
-
-	#if( configUSE_QUEUE_SETS == 1 )
-	{
-		pxNewQueue->pxQueueSetContainer = NULL;
-	}
-	#endif /* configUSE_QUEUE_SETS */
-
-	traceQUEUE_CREATE( pxNewQueue );
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_MUTEXES == 1 )
-
-	static void prvInitialiseMutex( Queue_t *pxNewQueue )
-	{
-		if( pxNewQueue != NULL )
-		{
-			/* The queue create function will set all the queue structure members
-			correctly for a generic queue, but this function is creating a
-			mutex.  Overwrite those members that need to be set differently -
-			in particular the information required for priority inheritance. */
-			pxNewQueue->pxMutexHolder = NULL;
-			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
-
-			/* In case this is a recursive mutex. */
-			pxNewQueue->u.uxRecursiveCallCount = 0;
-
-			traceCREATE_MUTEX( pxNewQueue );
-
-			/* Start with the semaphore in the expected state. */
-			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
-		}
-		else
-		{
-			traceCREATE_MUTEX_FAILED();
-		}
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
-
-		pxNewQueue = ( Queue_t * ) xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
-		prvInitialiseMutex( pxNewQueue );
-
-		return pxNewQueue;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
-	{
-	Queue_t *pxNewQueue;
-	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
-
-		/* Prevent compiler warnings about unused parameters if
-		configUSE_TRACE_FACILITY does not equal 1. */
-		( void ) ucQueueType;
-
-		pxNewQueue = ( Queue_t * ) xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
-		prvInitialiseMutex( pxNewQueue );
-
-		return pxNewQueue;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
-
-	void* xQueueGetMutexHolder( QueueHandle_t xSemaphore )
-	{
-	void *pxReturn;
-
-		/* This function is called by xSemaphoreGetMutexHolder(), and should not
-		be called directly.  Note:  This is a good way of determining if the
-		calling task is the mutex holder, but not a good way of determining the
-		identity of the mutex holder, as the holder may change between the
-		following critical section exiting and the function returning. */
-		taskENTER_CRITICAL();
-		{
-			if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )
-			{
-				pxReturn = ( void * ) ( ( Queue_t * ) xSemaphore )->pxMutexHolder;
-			}
-			else
-			{
-				pxReturn = NULL;
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return pxReturn;
-	} /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_RECURSIVE_MUTEXES == 1 )
-
-	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
-
-		configASSERT( pxMutex );
-
-		/* If this is the task that holds the mutex then pxMutexHolder will not
-		change outside of this task.  If this task does not hold the mutex then
-		pxMutexHolder can never coincidentally equal the tasks handle, and as
-		this is the only condition we are interested in it does not matter if
-		pxMutexHolder is accessed simultaneously by another task.  Therefore no
-		mutual exclusion is required to test the pxMutexHolder variable. */
-		if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Not a redundant cast as TaskHandle_t is a typedef. */
-		{
-			traceGIVE_MUTEX_RECURSIVE( pxMutex );
-
-			/* uxRecursiveCallCount cannot be zero if pxMutexHolder is equal to
-			the task handle, therefore no underflow check is required.  Also,
-			uxRecursiveCallCount is only modified by the mutex holder, and as
-			there can only be one, no mutual exclusion is required to modify the
-			uxRecursiveCallCount member. */
-			( pxMutex->u.uxRecursiveCallCount )--;
-
-			/* Has the recursive call count unwound to 0? */
-			if( pxMutex->u.uxRecursiveCallCount == ( UBaseType_t ) 0 )
-			{
-				/* Return the mutex.  This will automatically unblock any other
-				task that might be waiting to access the mutex. */
-				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			/* The mutex cannot be given because the calling task is not the
-			holder. */
-			xReturn = pdFAIL;
-
-			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_RECURSIVE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_RECURSIVE_MUTEXES == 1 )
-
-	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
-
-		configASSERT( pxMutex );
-
-		/* Comments regarding mutual exclusion as per those within
-		xQueueGiveMutexRecursive(). */
-
-		traceTAKE_MUTEX_RECURSIVE( pxMutex );
-
-		if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */
-		{
-			( pxMutex->u.uxRecursiveCallCount )++;
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = xQueueGenericReceive( pxMutex, NULL, xTicksToWait, pdFALSE );
-
-			/* pdPASS will only be returned if the mutex was successfully
-			obtained.  The calling task may have entered the Blocked state
-			before reaching here. */
-			if( xReturn != pdFAIL )
-			{
-				( pxMutex->u.uxRecursiveCallCount )++;
-			}
-			else
-			{
-				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
-			}
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_RECURSIVE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
-	{
-	QueueHandle_t xHandle;
-
-		configASSERT( uxMaxCount != 0 );
-		configASSERT( uxInitialCount <= uxMaxCount );
-
-		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
-
-		if( xHandle != NULL )
-		{
-			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
-
-			traceCREATE_COUNTING_SEMAPHORE();
-		}
-		else
-		{
-			traceCREATE_COUNTING_SEMAPHORE_FAILED();
-		}
-
-		return xHandle;
-	}
-
-#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
-	{
-	QueueHandle_t xHandle;
-
-		configASSERT( uxMaxCount != 0 );
-		configASSERT( uxInitialCount <= uxMaxCount );
-
-		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
-
-		if( xHandle != NULL )
-		{
-			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
-
-			traceCREATE_COUNTING_SEMAPHORE();
-		}
-		else
-		{
-			traceCREATE_COUNTING_SEMAPHORE_FAILED();
-		}
-
-		return xHandle;
-	}
-
-#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
-{
-BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
-TimeOut_t xTimeOut;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
-
-
-	/* This function relaxes the coding standard somewhat to allow return
-	statements within the function itself.  This is done in the interest
-	of execution time efficiency. */
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			/* Is there room on the queue now?  The running task must be the
-			highest priority task wanting to access the queue.  If the head item
-			in the queue is to be overwritten then it does not matter if the
-			queue is full. */
-			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
-			{
-				traceQUEUE_SEND( pxQueue );
-				xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE )
-						{
-							/* The queue is a member of a queue set, and posting
-							to the queue set caused a higher priority task to
-							unblock. A context switch is required. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						/* If there was a task waiting for data to arrive on the
-						queue then unblock it now. */
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The unblocked task has a priority higher than
-								our own so yield immediately.  Yes it is ok to
-								do this from within the critical section - the
-								kernel takes care of that. */
-								queueYIELD_IF_USING_PREEMPTION();
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else if( xYieldRequired != pdFALSE )
-						{
-							/* This path is a special case that will only get
-							executed if the task was holding multiple mutexes
-							and the mutexes were given back in an order that is
-							different to that in which they were taken. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					/* If there was a task waiting for data to arrive on the
-					queue then unblock it now. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The unblocked task has a priority higher than
-							our own so yield immediately.  Yes it is ok to do
-							this from within the critical section - the kernel
-							takes care of that. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else if( xYieldRequired != pdFALSE )
-					{
-						/* This path is a special case that will only get
-						executed if the task was holding multiple mutexes and
-						the mutexes were given back in an order that is
-						different to that in which they were taken. */
-						queueYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was full and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
-
-					/* Return to the original privilege level before exiting
-					the function. */
-					traceQUEUE_SEND_FAILED( pxQueue );
-					return errQUEUE_FULL;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was full and a block time was specified so
-					configure the timeout structure. */
-					vTaskSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
-
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
-
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			if( prvIsQueueFull( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
-
-				/* Unlocking the queue means queue events can effect the
-				event list.  It is possible	that interrupts occurring now
-				remove this task from the event	list again - but as the
-				scheduler is suspended the task will go onto the pending
-				ready last instead of the actual ready list. */
-				prvUnlockQueue( pxQueue );
-
-				/* Resuming the scheduler will move tasks from the pending
-				ready list into the ready list - so it is feasible that this
-				task is already in a ready list before it yields - in which
-				case the yield will not cause a context switch unless there
-				is also a higher priority task in the pending ready list. */
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-			}
-			else
-			{
-				/* Try again. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			/* The timeout has expired. */
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
-
-			traceQUEUE_SEND_FAILED( pxQueue );
-			return errQUEUE_FULL;
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	/* Similar to xQueueGenericSend, except without blocking if there is no room
-	in the queue.  Also don't directly wake a task that was blocked on a queue
-	read, instead return a flag to say whether a context switch is required or
-	not (i.e. has a task with a higher priority than us been woken by this
-	post). */
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
-		{
-			const int8_t cTxLock = pxQueue->cTxLock;
-
-			traceQUEUE_SEND_FROM_ISR( pxQueue );
-
-			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
-			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
-			in a task disinheriting a priority and prvCopyDataToQueue() can be
-			called here even though the disinherit function does not check if
-			the scheduler is suspended before accessing the ready lists. */
-			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
-			/* The event list is not altered if the queue is locked.  This will
-			be done when the queue is unlocked later. */
-			if( cTxLock == queueUNLOCKED )
-			{
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE )
-						{
-							/* The queue is a member of a queue set, and posting
-							to the queue set caused a higher priority task to
-							unblock.  A context switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The task waiting has a higher priority so
-								record that a context switch is required. */
-								if( pxHigherPriorityTaskWoken != NULL )
-								{
-									*pxHigherPriorityTaskWoken = pdTRUE;
-								}
-								else
-								{
-									mtCOVERAGE_TEST_MARKER();
-								}
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was posted while it was locked. */
-				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
-			xReturn = errQUEUE_FULL;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	/* Similar to xQueueGenericSendFromISR() but used with semaphores where the
-	item size is 0.  Don't directly wake a task that was blocked on a queue
-	read, instead return a flag to say whether a context switch is required or
-	not (i.e. has a task with a higher priority than us been woken by this
-	post). */
-
-	configASSERT( pxQueue );
-
-	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
-	if the item size is not 0. */
-	configASSERT( pxQueue->uxItemSize == 0 );
-
-	/* Normally a mutex would not be given from an interrupt, especially if
-	there is a mutex holder, as priority inheritance makes no sense for an
-	interrupts, only tasks. */
-	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->pxMutexHolder != NULL ) ) );
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-		/* When the queue is used to implement a semaphore no data is ever
-		moved through the queue but it is still valid to see if the queue 'has
-		space'. */
-		if( uxMessagesWaiting < pxQueue->uxLength )
-		{
-			const int8_t cTxLock = pxQueue->cTxLock;
-
-			traceQUEUE_SEND_FROM_ISR( pxQueue );
-
-			/* A task can only have an inherited priority if it is a mutex
-			holder - and if there is a mutex holder then the mutex cannot be
-			given from an ISR.  As this is the ISR version of the function it
-			can be assumed there is no mutex holder and no need to determine if
-			priority disinheritance is needed.  Simply increase the count of
-			messages (semaphores) available. */
-			pxQueue->uxMessagesWaiting = uxMessagesWaiting + 1;
-
-			/* The event list is not altered if the queue is locked.  This will
-			be done when the queue is unlocked later. */
-			if( cTxLock == queueUNLOCKED )
-			{
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE )
-						{
-							/* The semaphore is a member of a queue set, and
-							posting	to the queue set caused a higher priority
-							task to	unblock.  A context switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The task waiting has a higher priority so
-								record that a context switch is required. */
-								if( pxHigherPriorityTaskWoken != NULL )
-								{
-									*pxHigherPriorityTaskWoken = pdTRUE;
-								}
-								else
-								{
-									mtCOVERAGE_TEST_MARKER();
-								}
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was posted while it was locked. */
-				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
-			xReturn = errQUEUE_FULL;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeeking )
-{
-BaseType_t xEntryTimeSet = pdFALSE;
-TimeOut_t xTimeOut;
-int8_t *pcOriginalReadPosition;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
-
-	/* This function relaxes the coding standard somewhat to allow return
-	statements within the function itself.  This is done in the interest
-	of execution time efficiency. */
-
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-			/* Is there data in the queue now?  To be running the calling task
-			must be the highest priority task wanting to access the queue. */
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Remember the read position in case the queue is only being
-				peeked. */
-				pcOriginalReadPosition = pxQueue->u.pcReadFrom;
-
-				prvCopyDataFromQueue( pxQueue, pvBuffer );
-
-				if( xJustPeeking == pdFALSE )
-				{
-					traceQUEUE_RECEIVE( pxQueue );
-
-					/* Actually removing data, not just peeking. */
-					pxQueue->uxMessagesWaiting = uxMessagesWaiting - 1;
-
-					#if ( configUSE_MUTEXES == 1 )
-					{
-						if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-						{
-							/* Record the information required to implement
-							priority inheritance should it become necessary. */
-							pxQueue->pxMutexHolder = ( int8_t * ) pvTaskIncrementMutexHeldCount(); /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configUSE_MUTEXES */
-
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-						{
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					traceQUEUE_PEEK( pxQueue );
-
-					/* The data is not being removed, so reset the read
-					pointer. */
-					pxQueue->u.pcReadFrom = pcOriginalReadPosition;
-
-					/* The data is being left in the queue, so see if there are
-					any other tasks waiting for the data. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority than this task. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was empty and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
-					traceQUEUE_RECEIVE_FAILED( pxQueue );
-					return errQUEUE_EMPTY;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was empty and a block time was specified so
-					configure the timeout structure. */
-					vTaskSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
-
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
-
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
-
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-					{
-						taskENTER_CRITICAL();
-						{
-							vTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder );
-						}
-						taskEXIT_CRITICAL();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif
-
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
-				prvUnlockQueue( pxQueue );
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* Try again. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
-
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceQUEUE_RECEIVE_FAILED( pxQueue );
-				return errQUEUE_EMPTY;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-		/* Cannot block in an ISR, so check there is data available. */
-		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			const int8_t cRxLock = pxQueue->cRxLock;
-
-			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
-
-			prvCopyDataFromQueue( pxQueue, pvBuffer );
-			pxQueue->uxMessagesWaiting = uxMessagesWaiting - 1;
-
-			/* If the queue is locked the event list will not be modified.
-			Instead update the lock count so the task that unlocks the queue
-			will know that an ISR has removed data while the queue was
-			locked. */
-			if( cRxLock == queueUNLOCKED )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority than us so
-						force a context switch. */
-						if( pxHigherPriorityTaskWoken != NULL )
-						{
-							*pxHigherPriorityTaskWoken = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was removed while it was locked. */
-				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,  void * const pvBuffer )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-int8_t *pcOriginalReadPosition;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Cannot block in an ISR, so check there is data available. */
-		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			traceQUEUE_PEEK_FROM_ISR( pxQueue );
-
-			/* Remember the read position so it can be reset as nothing is
-			actually being removed from the queue. */
-			pcOriginalReadPosition = pxQueue->u.pcReadFrom;
-			prvCopyDataFromQueue( pxQueue, pvBuffer );
-			pxQueue->u.pcReadFrom = pcOriginalReadPosition;
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-			traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
-{
-UBaseType_t uxReturn;
-
-	configASSERT( xQueue );
-
-	taskENTER_CRITICAL();
-	{
-		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
-	}
-	taskEXIT_CRITICAL();
-
-	return uxReturn;
-} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue )
-{
-UBaseType_t uxReturn;
-Queue_t *pxQueue;
-
-	pxQueue = ( Queue_t * ) xQueue;
-	configASSERT( pxQueue );
-
-	taskENTER_CRITICAL();
-	{
-		uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting;
-	}
-	taskEXIT_CRITICAL();
-
-	return uxReturn;
-} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
-{
-UBaseType_t uxReturn;
-
-	configASSERT( xQueue );
-
-	uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
-
-	return uxReturn;
-} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
-/*-----------------------------------------------------------*/
-
-void vQueueDelete( QueueHandle_t xQueue )
-{
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	traceQUEUE_DELETE( pxQueue );
-
-	#if ( configQUEUE_REGISTRY_SIZE > 0 )
-	{
-		vQueueUnregisterQueue( pxQueue );
-	}
-	#endif
-
-	#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
-	{
-		/* The queue can only have been allocated dynamically - free it
-		again. */
-		vPortFree( pxQueue );
-	}
-	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-	{
-		/* The queue could have been allocated statically or dynamically, so
-		check before attempting to free the memory. */
-		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
-		{
-			vPortFree( pxQueue );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#else
-	{
-		/* The queue must have been statically allocated, so is not going to be
-		deleted.  Avoid compiler warnings about the unused parameter. */
-		( void ) pxQueue;
-	}
-	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )
-	{
-		return ( ( Queue_t * ) xQueue )->uxQueueNumber;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber )
-	{
-		( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )
-	{
-		return ( ( Queue_t * ) xQueue )->ucQueueType;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
-{
-BaseType_t xReturn = pdFALSE;
-UBaseType_t uxMessagesWaiting;
-
-	/* This function is called from a critical section. */
-
-	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
-	{
-		#if ( configUSE_MUTEXES == 1 )
-		{
-			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-			{
-				/* The mutex is no longer being held. */
-				xReturn = xTaskPriorityDisinherit( ( void * ) pxQueue->pxMutexHolder );
-				pxQueue->pxMutexHolder = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_MUTEXES */
-	}
-	else if( xPosition == queueSEND_TO_BACK )
-	{
-		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. */
-		pxQueue->pcWriteTo += pxQueue->uxItemSize;
-		if( pxQueue->pcWriteTo >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
-		{
-			pxQueue->pcWriteTo = pxQueue->pcHead;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		( void ) memcpy( ( void * ) pxQueue->u.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		pxQueue->u.pcReadFrom -= pxQueue->uxItemSize;
-		if( pxQueue->u.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
-		{
-			pxQueue->u.pcReadFrom = ( pxQueue->pcTail - pxQueue->uxItemSize );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		if( xPosition == queueOVERWRITE )
-		{
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* An item is not being added but overwritten, so subtract
-				one from the recorded number of items in the queue so when
-				one is added again below the number of recorded items remains
-				correct. */
-				--uxMessagesWaiting;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-	pxQueue->uxMessagesWaiting = uxMessagesWaiting + 1;
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
-{
-	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
-	{
-		pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
-		if( pxQueue->u.pcReadFrom >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
-		{
-			pxQueue->u.pcReadFrom = pxQueue->pcHead;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. */
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvUnlockQueue( Queue_t * const pxQueue )
-{
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
-
-	/* The lock counts contains the number of extra data items placed or
-	removed from the queue while the queue was locked.  When a queue is
-	locked items can be added or removed, but the event lists cannot be
-	updated. */
-	taskENTER_CRITICAL();
-	{
-		int8_t cTxLock = pxQueue->cTxLock;
-
-		/* See if data was added to the queue while it was locked. */
-		while( cTxLock > queueLOCKED_UNMODIFIED )
-		{
-			/* Data was posted while the queue was locked.  Are any tasks
-			blocked waiting for data to become available? */
-			#if ( configUSE_QUEUE_SETS == 1 )
-			{
-				if( pxQueue->pxQueueSetContainer != NULL )
-				{
-					if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE )
-					{
-						/* The queue is a member of a queue set, and posting to
-						the queue set caused a higher priority task to unblock.
-						A context switch is required. */
-						vTaskMissedYield();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					/* Tasks that are removed from the event list will get
-					added to the pending ready list as the scheduler is still
-					suspended. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							vTaskMissedYield();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						break;
-					}
-				}
-			}
-			#else /* configUSE_QUEUE_SETS */
-			{
-				/* Tasks that are removed from the event list will get added to
-				the pending ready list as the scheduler is still suspended. */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority so record that
-						a context switch is required. */
-						vTaskMissedYield();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					break;
-				}
-			}
-			#endif /* configUSE_QUEUE_SETS */
-
-			--cTxLock;
-		}
-
-		pxQueue->cTxLock = queueUNLOCKED;
-	}
-	taskEXIT_CRITICAL();
-
-	/* Do the same for the Rx lock. */
-	taskENTER_CRITICAL();
-	{
-		int8_t cRxLock = pxQueue->cRxLock;
-
-		while( cRxLock > queueLOCKED_UNMODIFIED )
-		{
-			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-			{
-				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-				{
-					vTaskMissedYield();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				--cRxLock;
-			}
-			else
-			{
-				break;
-			}
-		}
-
-		pxQueue->cRxLock = queueUNLOCKED;
-	}
-	taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
-{
-BaseType_t xReturn;
-
-	taskENTER_CRITICAL();
-	{
-		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
-		{
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue )
-{
-BaseType_t xReturn;
-
-	configASSERT( xQueue );
-	if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( UBaseType_t ) 0 )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
-{
-BaseType_t xReturn;
-
-	taskENTER_CRITICAL();
-	{
-		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
-		{
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue )
-{
-BaseType_t xReturn;
-
-	configASSERT( xQueue );
-	if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( ( Queue_t * ) xQueue )->uxLength )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* If the queue is already full we may have to block.  A critical section
-		is required to prevent an interrupt removing something from the queue
-		between the check to see if the queue is full and blocking on the queue. */
-		portDISABLE_INTERRUPTS();
-		{
-			if( prvIsQueueFull( pxQueue ) != pdFALSE )
-			{
-				/* The queue is full - do we want to block or just leave without
-				posting? */
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					/* As this is called from a coroutine we cannot block directly, but
-					return indicating that we need to block. */
-					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
-					portENABLE_INTERRUPTS();
-					return errQUEUE_BLOCKED;
-				}
-				else
-				{
-					portENABLE_INTERRUPTS();
-					return errQUEUE_FULL;
-				}
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
-			{
-				/* There is room in the queue, copy the data into the queue. */
-				prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
-				xReturn = pdPASS;
-
-				/* Were any co-routines waiting for data to become available? */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					/* In this instance the co-routine could be placed directly
-					into the ready list as we are within a critical section.
-					Instead the same pending ready list mechanism is used as if
-					the event were caused from within an interrupt. */
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The co-routine waiting has a higher priority so record
-						that a yield might be appropriate. */
-						xReturn = errQUEUE_YIELD;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				xReturn = errQUEUE_FULL;
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* If the queue is already empty we may have to block.  A critical section
-		is required to prevent an interrupt adding something to the queue
-		between the check to see if the queue is empty and blocking on the queue. */
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
-			{
-				/* There are no messages in the queue, do we want to block or just
-				leave with nothing? */
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					/* As this is a co-routine we cannot block directly, but return
-					indicating that we need to block. */
-					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
-					portENABLE_INTERRUPTS();
-					return errQUEUE_BLOCKED;
-				}
-				else
-				{
-					portENABLE_INTERRUPTS();
-					return errQUEUE_FULL;
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Data is available from the queue. */
-				pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
-				if( pxQueue->u.pcReadFrom >= pxQueue->pcTail )
-				{
-					pxQueue->u.pcReadFrom = pxQueue->pcHead;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-				--( pxQueue->uxMessagesWaiting );
-				( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
-
-				xReturn = pdPASS;
-
-				/* Were any co-routines waiting for space to become available? */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					/* In this instance the co-routine could be placed directly
-					into the ready list as we are within a critical section.
-					Instead the same pending ready list mechanism is used as if
-					the event were caused from within an interrupt. */
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						xReturn = errQUEUE_YIELD;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken )
-	{
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* Cannot block within an ISR so if there is no space on the queue then
-		exit without doing anything. */
-		if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
-		{
-			prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
-
-			/* We only want to wake one co-routine per ISR, so check that a
-			co-routine has not already been woken. */
-			if( xCoRoutinePreviouslyWoken == pdFALSE )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						return pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xCoRoutinePreviouslyWoken;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxCoRoutineWoken )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* We cannot block from an ISR, so check there is data available. If
-		not then just leave without doing anything. */
-		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			/* Copy the data from the queue. */
-			pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
-			if( pxQueue->u.pcReadFrom >= pxQueue->pcTail )
-			{
-				pxQueue->u.pcReadFrom = pxQueue->pcHead;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-			--( pxQueue->uxMessagesWaiting );
-			( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
-
-			if( ( *pxCoRoutineWoken ) == pdFALSE )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						*pxCoRoutineWoken = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t ux;
-
-		/* See if there is an empty space in the registry.  A NULL name denotes
-		a free slot. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].pcQueueName == NULL )
-			{
-				/* Store the information on this queue. */
-				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
-				xQueueRegistry[ ux ].xHandle = xQueue;
-
-				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-/*-----------------------------------------------------------*/
-
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	const char *pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t ux;
-	const char *pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-		/* Note there is nothing here to protect against another task adding or
-		removing entries from the registry while it is being searched. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].xHandle == xQueue )
-			{
-				pcReturn = xQueueRegistry[ ux ].pcQueueName;
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		return pcReturn;
-	}
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-/*-----------------------------------------------------------*/
-
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	void vQueueUnregisterQueue( QueueHandle_t xQueue )
-	{
-	UBaseType_t ux;
-
-		/* See if the handle of the queue being unregistered in actually in the
-		registry. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].xHandle == xQueue )
-			{
-				/* Set the name to NULL to show that this slot if free again. */
-				xQueueRegistry[ ux ].pcQueueName = NULL;
-
-				/* Set the handle to NULL to ensure the same queue handle cannot
-				appear in the registry twice if it is added, removed, then
-				added again. */
-				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TIMERS == 1 )
-
-	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
-	{
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* This function should not be called by application code hence the
-		'Restricted' in its name.  It is not part of the public API.  It is
-		designed for use by kernel code, and has special calling requirements.
-		It can result in vListInsert() being called on a list that can only
-		possibly ever have one item in it, so the list will be fast, but even
-		so it should be called with the scheduler locked and not from a critical
-		section. */
-
-		/* Only do anything if there are no messages in the queue.  This function
-		will not actually cause the task to block, just place it on a blocked
-		list.  It will not block until the scheduler is unlocked - at which
-		time a yield will be performed.  If an item is added to the queue while
-		the queue is locked, and the calling task blocks on the queue, then the
-		calling task will be immediately unblocked when the queue is unlocked. */
-		prvLockQueue( pxQueue );
-		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
-		{
-			/* There is nothing in the queue, block for the specified period. */
-			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-		prvUnlockQueue( pxQueue );
-	}
-
-#endif /* configUSE_TIMERS */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-
-	QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )
-	{
-	QueueSetHandle_t pxQueue;
-
-		pxQueue = xQueueGenericCreate( uxEventQueueLength, sizeof( Queue_t * ), queueQUEUE_TYPE_SET );
-
-		return pxQueue;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
-	{
-	BaseType_t xReturn;
-
-		taskENTER_CRITICAL();
-		{
-			if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )
-			{
-				/* Cannot add a queue/semaphore to more than one queue set. */
-				xReturn = pdFAIL;
-			}
-			else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )
-			{
-				/* Cannot add a queue/semaphore to a queue set if there are already
-				items in the queue/semaphore. */
-				xReturn = pdFAIL;
-			}
-			else
-			{
-				( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;
-				xReturn = pdPASS;
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;
-
-		if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )
-		{
-			/* The queue was not a member of the set. */
-			xReturn = pdFAIL;
-		}
-		else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )
-		{
-			/* It is dangerous to remove a queue from a set when the queue is
-			not empty because the queue set will still hold pending events for
-			the queue. */
-			xReturn = pdFAIL;
-		}
-		else
-		{
-			taskENTER_CRITICAL();
-			{
-				/* The queue is no longer contained in the set. */
-				pxQueueOrSemaphore->pxQueueSetContainer = NULL;
-			}
-			taskEXIT_CRITICAL();
-			xReturn = pdPASS;
-		}
-
-		return xReturn;
-	} /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t const xTicksToWait )
-	{
-	QueueSetMemberHandle_t xReturn = NULL;
-
-		( void ) xQueueGenericReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait, pdFALSE ); /*lint !e961 Casting from one typedef to another is not redundant. */
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )
-	{
-	QueueSetMemberHandle_t xReturn = NULL;
-
-		( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition )
-	{
-	Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer;
-	BaseType_t xReturn = pdFALSE;
-
-		/* This function must be called form a critical section. */
-
-		configASSERT( pxQueueSetContainer );
-		configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );
-
-		if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength )
-		{
-			const int8_t cTxLock = pxQueueSetContainer->cTxLock;
-
-			traceQUEUE_SEND( pxQueueSetContainer );
-
-			/* The data copied is the handle of the queue that contains data. */
-			xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, xCopyPosition );
-
-			if( cTxLock == queueUNLOCKED )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority. */
-						xReturn = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/tasks.c b/ports/cc3200/FreeRTOS/Source/tasks.c
deleted file mode 100644
index 6c261a6510..0000000000
--- a/ports/cc3200/FreeRTOS/Source/tasks.c
+++ /dev/null
@@ -1,4807 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/* Standard includes. */
-#include 
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* FreeRTOS includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-#include "timers.h"
-#include "StackMacros.h"
-
-/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
-MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
-header files above, but not in this file, in order to generate the correct
-privileged Vs unprivileged linkage and placement. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
-
-/* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting
-functions but without including stdio.h here. */
-#if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 )
-	/* At the bottom of this file are two optional functions that can be used
-	to generate human readable text from the raw data generated by the
-	uxTaskGetSystemState() function.  Note the formatting functions are provided
-	for convenience only, and are NOT considered part of the kernel. */
-	#include 
-#endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */
-
-#if( configUSE_PREEMPTION == 0 )
-	/* If the cooperative scheduler is being used then a yield should not be
-	performed just because a higher priority task has been woken. */
-	#define taskYIELD_IF_USING_PREEMPTION()
-#else
-	#define taskYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
-#endif
-
-/* Values that can be assigned to the ucNotifyState member of the TCB. */
-#define taskNOT_WAITING_NOTIFICATION	( ( uint8_t ) 0 )
-#define taskWAITING_NOTIFICATION		( ( uint8_t ) 1 )
-#define taskNOTIFICATION_RECEIVED		( ( uint8_t ) 2 )
-
-/*
- * The value used to fill the stack of a task when the task is created.  This
- * is used purely for checking the high water mark for tasks.
- */
-#define tskSTACK_FILL_BYTE	( 0xa5U )
-
-/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
-dynamically allocated RAM, in which case when any task is deleted it is known
-that both the task's stack and TCB need to be freed.  Sometimes the
-FreeRTOSConfig.h settings only allow a task to be created using statically
-allocated RAM, in which case when any task is deleted it is known that neither
-the task's stack or TCB should be freed.  Sometimes the FreeRTOSConfig.h
-settings allow a task to be created using either statically or dynamically
-allocated RAM, in which case a member of the TCB is used to record whether the
-stack and/or TCB were allocated statically or dynamically, so when a task is
-deleted the RAM that was allocated dynamically is freed again and no attempt is
-made to free the RAM that was allocated statically.
-tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is only true if it is possible for a
-task to be created using either statically or dynamically allocated RAM.  Note
-that if portUSING_MPU_WRAPPERS is 1 then a protected task can be created with
-a statically allocated stack and a dynamically allocated TCB. */
-#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE ( ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) || ( portUSING_MPU_WRAPPERS == 1 ) )
-#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB 		( ( uint8_t ) 0 )
-#define tskSTATICALLY_ALLOCATED_STACK_ONLY 			( ( uint8_t ) 1 )
-#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB		( ( uint8_t ) 2 )
-
-/*
- * Macros used by vListTask to indicate which state a task is in.
- */
-#define tskBLOCKED_CHAR		( 'B' )
-#define tskREADY_CHAR		( 'R' )
-#define tskDELETED_CHAR		( 'D' )
-#define tskSUSPENDED_CHAR	( 'S' )
-
-/*
- * Some kernel aware debuggers require the data the debugger needs access to be
- * global, rather than file scope.
- */
-#ifdef portREMOVE_STATIC_QUALIFIER
-	#define static
-#endif
-
-#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
-
-	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 0 then task selection is
-	performed in a generic way that is not optimised to any particular
-	microcontroller architecture. */
-
-	/* uxTopReadyPriority holds the priority of the highest priority ready
-	state task. */
-	#define taskRECORD_READY_PRIORITY( uxPriority )														\
-	{																									\
-		if( ( uxPriority ) > uxTopReadyPriority )														\
-		{																								\
-			uxTopReadyPriority = ( uxPriority );														\
-		}																								\
-	} /* taskRECORD_READY_PRIORITY */
-
-	/*-----------------------------------------------------------*/
-
-	#define taskSELECT_HIGHEST_PRIORITY_TASK()															\
-	{																									\
-	UBaseType_t uxTopPriority = uxTopReadyPriority;														\
-																										\
-		/* Find the highest priority queue that contains ready tasks. */								\
-		while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopPriority ] ) ) )							\
-		{																								\
-			configASSERT( uxTopPriority );																\
-			--uxTopPriority;																			\
-		}																								\
-																										\
-		/* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of						\
-		the	same priority get an equal share of the processor time. */									\
-		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );			\
-		uxTopReadyPriority = uxTopPriority;																\
-	} /* taskSELECT_HIGHEST_PRIORITY_TASK */
-
-	/*-----------------------------------------------------------*/
-
-	/* Define away taskRESET_READY_PRIORITY() and portRESET_READY_PRIORITY() as
-	they are only required when a port optimised method of task selection is
-	being used. */
-	#define taskRESET_READY_PRIORITY( uxPriority )
-	#define portRESET_READY_PRIORITY( uxPriority, uxTopReadyPriority )
-
-#else /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
-
-	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 1 then task selection is
-	performed in a way that is tailored to the particular microcontroller
-	architecture being used. */
-
-	/* A port optimised version is provided.  Call the port defined macros. */
-	#define taskRECORD_READY_PRIORITY( uxPriority )	portRECORD_READY_PRIORITY( uxPriority, uxTopReadyPriority )
-
-	/*-----------------------------------------------------------*/
-
-	#define taskSELECT_HIGHEST_PRIORITY_TASK()														\
-	{																								\
-	UBaseType_t uxTopPriority;																		\
-																									\
-		/* Find the highest priority list that contains ready tasks. */								\
-		portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority );								\
-		configASSERT( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ uxTopPriority ] ) ) > 0 );		\
-		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );		\
-	} /* taskSELECT_HIGHEST_PRIORITY_TASK() */
-
-	/*-----------------------------------------------------------*/
-
-	/* A port optimised version is provided, call it only if the TCB being reset
-	is being referenced from a ready list.  If it is referenced from a delayed
-	or suspended list then it won't be in a ready list. */
-	#define taskRESET_READY_PRIORITY( uxPriority )														\
-	{																									\
-		if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ ( uxPriority ) ] ) ) == ( UBaseType_t ) 0 )	\
-		{																								\
-			portRESET_READY_PRIORITY( ( uxPriority ), ( uxTopReadyPriority ) );							\
-		}																								\
-	}
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
-
-/*-----------------------------------------------------------*/
-
-/* pxDelayedTaskList and pxOverflowDelayedTaskList are switched when the tick
-count overflows. */
-#define taskSWITCH_DELAYED_LISTS()																	\
-{																									\
-	List_t *pxTemp;																					\
-																									\
-	/* The delayed tasks list should be empty when the lists are switched. */						\
-	configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );										\
-																									\
-	pxTemp = pxDelayedTaskList;																		\
-	pxDelayedTaskList = pxOverflowDelayedTaskList;													\
-	pxOverflowDelayedTaskList = pxTemp;																\
-	xNumOfOverflows++;																				\
-	prvResetNextTaskUnblockTime();																	\
-}
-
-/*-----------------------------------------------------------*/
-
-/*
- * Place the task represented by pxTCB into the appropriate ready list for
- * the task.  It is inserted at the end of the list.
- */
-#define prvAddTaskToReadyList( pxTCB )																\
-	traceMOVED_TASK_TO_READY_STATE( pxTCB );														\
-	taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority );												\
-	vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
-	tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
-/*-----------------------------------------------------------*/
-
-/*
- * Several functions take an TaskHandle_t parameter that can optionally be NULL,
- * where NULL is used to indicate that the handle of the currently executing
- * task should be used in place of the parameter.  This macro simply checks to
- * see if the parameter is NULL and returns a pointer to the appropriate TCB.
- */
-#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? ( TCB_t * ) pxCurrentTCB : ( TCB_t * ) ( pxHandle ) )
-
-/* The item value of the event list item is normally used to hold the priority
-of the task to which it belongs (coded to allow it to be held in reverse
-priority order).  However, it is occasionally borrowed for other purposes.  It
-is important its value is not updated due to a task priority change while it is
-being used for another purpose.  The following bit definition is used to inform
-the scheduler that the value should not be changed - in which case it is the
-responsibility of whichever module is using the value to ensure it gets set back
-to its original value when it is released. */
-#if( configUSE_16_BIT_TICKS == 1 )
-	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x8000U
-#else
-	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x80000000UL
-#endif
-
-/*
- * Task control block.  A task control block (TCB) is allocated for each task,
- * and stores task state information, including a pointer to the task's context
- * (the task's run time environment, including register values)
- */
-typedef struct tskTaskControlBlock
-{
-	volatile StackType_t	*pxTopOfStack;	/*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
-
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-		xMPU_SETTINGS	xMPUSettings;		/*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
-	#endif
-
-	ListItem_t			xStateListItem;	/*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
-	ListItem_t			xEventListItem;		/*< Used to reference a task from an event list. */
-	UBaseType_t			uxPriority;			/*< The priority of the task.  0 is the lowest priority. */
-	StackType_t			*pxStack;			/*< Points to the start of the stack. */
-	char				pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-	#if ( portSTACK_GROWTH > 0 )
-		StackType_t		*pxEndOfStack;		/*< Points to the end of the stack on architectures where the stack grows up from low memory. */
-	#endif
-
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-		UBaseType_t		uxCriticalNesting;	/*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
-	#endif
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t		uxTCBNumber;		/*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
-		UBaseType_t		uxTaskNumber;		/*< Stores a number specifically for use by third party trace code. */
-	#endif
-
-	#if ( configUSE_MUTEXES == 1 )
-		UBaseType_t		uxBasePriority;		/*< The priority last assigned to the task - used by the priority inheritance mechanism. */
-		UBaseType_t		uxMutexesHeld;
-	#endif
-
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-		TaskHookFunction_t pxTaskTag;
-	#endif
-
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
-		void *pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
-	#endif
-
-	#if( configGENERATE_RUN_TIME_STATS == 1 )
-		uint32_t		ulRunTimeCounter;	/*< Stores the amount of time the task has spent in the Running state. */
-	#endif
-
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		/* Allocate a Newlib reent structure that is specific to this task.
-		Note Newlib support has been included by popular demand, but is not
-		used by the FreeRTOS maintainers themselves.  FreeRTOS is not
-		responsible for resulting newlib operation.  User must be familiar with
-		newlib and must provide system-wide implementations of the necessary
-		stubs. Be warned that (at the time of writing) the current newlib design
-		implements a system-wide malloc() that must be provided with locks. */
-		struct	_reent xNewLib_reent;
-	#endif
-
-	#if( configUSE_TASK_NOTIFICATIONS == 1 )
-		volatile uint32_t ulNotifiedValue;
-		volatile uint8_t ucNotifyState;
-	#endif
-
-	/* See the comments above the definition of
-	tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
-	#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-		uint8_t	ucStaticallyAllocated; 		/*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
-	#endif
-
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-		uint8_t ucDelayAborted;
-	#endif
-
-} tskTCB;
-
-/* The old tskTCB name is maintained above then typedefed to the new TCB_t name
-below to enable the use of older kernel aware debuggers. */
-typedef tskTCB TCB_t;
-
-/*lint -e956 A manual analysis and inspection has been used to determine which
-static variables must be declared volatile. */
-
-PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;
-
-/* Lists for ready and blocked tasks. --------------------*/
-PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */
-PRIVILEGED_DATA static List_t xDelayedTaskList1;						/*< Delayed tasks. */
-PRIVILEGED_DATA static List_t xDelayedTaskList2;						/*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;				/*< Points to the delayed task list currently being used. */
-PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;		/*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t xPendingReadyList;						/*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
-
-#if( INCLUDE_vTaskDelete == 1 )
-
-	PRIVILEGED_DATA static List_t xTasksWaitingTermination;				/*< Tasks that have been deleted - but their memory not yet freed. */
-	PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;
-
-#endif
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	PRIVILEGED_DATA static List_t xSuspendedTaskList;					/*< Tasks that are currently suspended. */
-
-#endif
-
-/* Other file private variables. --------------------------------*/
-PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks 	= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xTickCount 				= ( TickType_t ) 0U;
-PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority 		= tskIDLE_PRIORITY;
-PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning 		= pdFALSE;
-PRIVILEGED_DATA static volatile UBaseType_t uxPendedTicks 			= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile BaseType_t xYieldPending 			= pdFALSE;
-PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows 			= ( BaseType_t ) 0;
-PRIVILEGED_DATA static UBaseType_t uxTaskNumber 					= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime		= ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
-PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle					= NULL;			/*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
-
-/* Context switches are held pending while the scheduler is suspended.  Also,
-interrupts must not manipulate the xStateListItem of a TCB, or any of the
-lists the xStateListItem can be referenced from, if the scheduler is suspended.
-If an interrupt needs to unblock a task while the scheduler is suspended then it
-moves the task's event list item into the xPendingReadyList, ready for the
-kernel to move the task from the pending ready list into the real ready list
-when the scheduler is unsuspended.  The pending ready list itself can only be
-accessed from a critical section. */
-PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended	= ( UBaseType_t ) pdFALSE;
-
-#if ( configGENERATE_RUN_TIME_STATS == 1 )
-
-	PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL;	/*< Holds the value of a timer/counter the last time a task was switched in. */
-	PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL;		/*< Holds the total amount of execution time as defined by the run time counter clock. */
-
-#endif
-
-/*lint +e956 */
-
-/*-----------------------------------------------------------*/
-
-/* Callback function prototypes. --------------------------*/
-#if(  configCHECK_FOR_STACK_OVERFLOW > 0 )
-	extern void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName );
-#endif
-
-#if( configUSE_TICK_HOOK > 0 )
-	extern void vApplicationTickHook( void );
-#endif
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	extern void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
-#endif
-
-/* File private functions. --------------------------------*/
-
-/**
- * Utility task that simply returns pdTRUE if the task referenced by xTask is
- * currently in the Suspended state, or pdFALSE if the task referenced by xTask
- * is in any other state.
- */
-#if ( INCLUDE_vTaskSuspend == 1 )
-	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-#endif /* INCLUDE_vTaskSuspend */
-
-/*
- * Utility to ready all the lists used by the scheduler.  This is called
- * automatically upon the creation of the first task.
- */
-static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The idle task, which as all tasks is implemented as a never ending loop.
- * The idle task is automatically created and added to the ready lists upon
- * creation of the first user task.
- *
- * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific
- * language extensions.  The equivalent prototype for this function is:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
-static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters );
-
-/*
- * Utility to free all memory allocated by the scheduler to hold a TCB,
- * including the stack pointed to by the TCB.
- *
- * This does not free memory allocated by the task itself (i.e. memory
- * allocated by calls to pvPortMalloc from within the tasks application code).
- */
-#if ( INCLUDE_vTaskDelete == 1 )
-
-	static void prvDeleteTCB( TCB_t *pxTCB ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Used only by the idle task.  This checks to see if anything has been placed
- * in the list of tasks waiting to be deleted.  If so the task is cleaned up
- * and its TCB deleted.
- */
-static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The currently executing task is entering the Blocked state.  Add the task to
- * either the current or the overflow delayed task list.
- */
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;
-
-/*
- * Fills an TaskStatus_t structure with information on each task that is
- * referenced from the pxList list (which may be a ready list, a delayed list,
- * a suspended list, etc.).
- *
- * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM
- * NORMAL APPLICATION CODE.
- */
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Searches pxList for a task with name pcNameToQuery - returning a handle to
- * the task if it is found, or NULL if the task is not found.
- */
-#if ( INCLUDE_xTaskGetHandle == 1 )
-
-	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * When a task is created, the stack of the task is filled with a known value.
- * This function determines the 'high water mark' of the task stack by
- * determining how much of the stack remains at the original preset value.
- */
-#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-
-	static uint16_t prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Return the amount of time, in ticks, that will pass before the kernel will
- * next move a task from the Blocked state to the Running state.
- *
- * This conditional compilation should use inequality to 0, not equality to 1.
- * This is to ensure portSUPPRESS_TICKS_AND_SLEEP() can be called when user
- * defined low power mode implementations require configUSE_TICKLESS_IDLE to be
- * set to a value other than 1.
- */
-#if ( configUSE_TICKLESS_IDLE != 0 )
-
-	static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Set xNextTaskUnblockTime to the time at which the next Blocked state task
- * will exit the Blocked state.
- */
-static void prvResetNextTaskUnblockTime( void );
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	/*
-	 * Helper function used to pad task names with spaces when printing out
-	 * human readable tables of task information.
-	 */
-	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Called after a Task_t structure has been allocated either statically or
- * dynamically to fill in the structure's members.
- */
-static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
-									const char * const pcName,
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/*
- * Called after a new task has been created and initialised to place the task
- * under the control of the scheduler.
- */
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	TaskHandle_t xTaskCreateStatic(	TaskFunction_t pxTaskCode,
-									const char * const pcName,
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									StackType_t * const puxStackBuffer,
-									StaticTask_t * const pxTaskBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	TCB_t *pxNewTCB;
-	TaskHandle_t xReturn;
-
-		configASSERT( puxStackBuffer != NULL );
-		configASSERT( pxTaskBuffer != NULL );
-
-		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
-		{
-			/* The memory used for the task's TCB and stack are passed into this
-			function - use them. */
-			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
-
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created statically in case the task is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-
-			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
-			prvAddNewTaskToReadyList( pxNewTCB );
-		}
-		else
-		{
-			xReturn = NULL;
-		}
-
-		return xReturn;
-	}
-
-#endif /* SUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if( portUSING_MPU_WRAPPERS == 1 )
-
-	BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
-
-		configASSERT( pxTaskDefinition->puxStackBuffer );
-
-		if( pxTaskDefinition->puxStackBuffer != NULL )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends
-			on the implementation of the port malloc function and whether or
-			not static allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
-
-			if( pxNewTCB != NULL )
-			{
-				/* Store the stack location in the TCB. */
-				pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
-
-				/* Tasks can be created statically or dynamically, so note
-				this task had a statically allocated stack in case it is
-				later deleted.  The TCB was allocated dynamically. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_ONLY;
-
-				prvInitialiseNewTask(	pxTaskDefinition->pvTaskCode,
-										pxTaskDefinition->pcName,
-										( uint32_t ) pxTaskDefinition->usStackDepth,
-										pxTaskDefinition->pvParameters,
-										pxTaskDefinition->uxPriority,
-										pxCreatedTask, pxNewTCB,
-										pxTaskDefinition->xRegions );
-
-				prvAddNewTaskToReadyList( pxNewTCB );
-				xReturn = pdPASS;
-			}
-		}
-
-		return xReturn;
-	}
-
-#endif /* portUSING_MPU_WRAPPERS */
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-
-	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
-							const char * const pcName,
-							const uint16_t usStackDepth,
-							void * const pvParameters,
-							UBaseType_t uxPriority,
-							TaskHandle_t * const pxCreatedTask ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn;
-
-		/* If the stack grows down then allocate the stack then the TCB so the stack
-		does not grow into the TCB.  Likewise if the stack grows up then allocate
-		the TCB then the stack. */
-		#if( portSTACK_GROWTH > 0 )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends on
-			the implementation of the port malloc function and whether or not static
-			allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
-
-			if( pxNewTCB != NULL )
-			{
-				/* Allocate space for the stack used by the task being created.
-				The base of the stack memory stored in the TCB so the task can
-				be deleted later if required. */
-				pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-				if( pxNewTCB->pxStack == NULL )
-				{
-					/* Could not allocate the stack.  Delete the allocated TCB. */
-					vPortFree( pxNewTCB );
-					pxNewTCB = NULL;
-				}
-			}
-		}
-		#else /* portSTACK_GROWTH */
-		{
-		StackType_t *pxStack;
-
-			/* Allocate space for the stack used by the task being created. */
-			pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-			if( pxStack != NULL )
-			{
-				/* Allocate space for the TCB. */
-				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e961 MISRA exception as the casts are only redundant for some paths. */
-
-				if( pxNewTCB != NULL )
-				{
-					/* Store the stack location in the TCB. */
-					pxNewTCB->pxStack = pxStack;
-				}
-				else
-				{
-					/* The stack cannot be used as the TCB was not created.  Free
-					it again. */
-					vPortFree( pxStack );
-				}
-			}
-			else
-			{
-				pxNewTCB = NULL;
-			}
-		}
-		#endif /* portSTACK_GROWTH */
-
-		if( pxNewTCB != NULL )
-		{
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created dynamically in case it is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
-			prvAddNewTaskToReadyList( pxNewTCB );
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
-									const char * const pcName,
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-StackType_t *pxTopOfStack;
-UBaseType_t x;
-
-	#if( portUSING_MPU_WRAPPERS == 1 )
-		/* Should the task be created in privileged mode? */
-		BaseType_t xRunPrivileged;
-		if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
-		{
-			xRunPrivileged = pdTRUE;
-		}
-		else
-		{
-			xRunPrivileged = pdFALSE;
-		}
-		uxPriority &= ~portPRIVILEGE_BIT;
-	#endif /* portUSING_MPU_WRAPPERS == 1 */
-
-	/* Avoid dependency on memset() if it is not required. */
-	#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-	{
-		/* Fill the stack with a known value to assist debugging. */
-		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
-	}
-	#endif /* ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) ) */
-
-	/* Calculate the top of stack address.  This depends on whether the stack
-	grows from high memory to low (as per the 80x86) or vice versa.
-	portSTACK_GROWTH is used to make the result positive or negative as required
-	by the port. */
-	#if( portSTACK_GROWTH < 0 )
-	{
-		pxTopOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
-		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type. */
-
-		/* Check the alignment of the calculated top of stack is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
-	}
-	#else /* portSTACK_GROWTH */
-	{
-		pxTopOfStack = pxNewTCB->pxStack;
-
-		/* Check the alignment of the stack buffer is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
-
-		/* The other extreme of the stack space is required if stack checking is
-		performed. */
-		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
-	}
-	#endif /* portSTACK_GROWTH */
-
-	/* Store the task name in the TCB. */
-	for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
-	{
-		pxNewTCB->pcTaskName[ x ] = pcName[ x ];
-
-		/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
-		configMAX_TASK_NAME_LEN characters just in case the memory after the
-		string is not accessible (extremely unlikely). */
-		if( pcName[ x ] == 0x00 )
-		{
-			break;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-	/* Ensure the name string is terminated in the case that the string length
-	was greater or equal to configMAX_TASK_NAME_LEN. */
-	pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
-
-	/* This is used as an array index so must ensure it's not too large.  First
-	remove the privilege bit if one is present. */
-	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
-	{
-		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxNewTCB->uxPriority = uxPriority;
-	#if ( configUSE_MUTEXES == 1 )
-	{
-		pxNewTCB->uxBasePriority = uxPriority;
-		pxNewTCB->uxMutexesHeld = 0;
-	}
-	#endif /* configUSE_MUTEXES */
-
-	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
-	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
-
-	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
-	back to	the containing TCB from a generic item in a list. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
-
-	/* Event lists are always in priority order. */
-	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
-
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-	{
-		pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
-	}
-	#endif /* portCRITICAL_NESTING_IN_TCB */
-
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	{
-		pxNewTCB->pxTaskTag = NULL;
-	}
-	#endif /* configUSE_APPLICATION_TASK_TAG */
-
-	#if ( configGENERATE_RUN_TIME_STATS == 1 )
-	{
-		pxNewTCB->ulRunTimeCounter = 0UL;
-	}
-	#endif /* configGENERATE_RUN_TIME_STATS */
-
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-	{
-		vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, ulStackDepth );
-	}
-	#else
-	{
-		/* Avoid compiler warning about unreferenced parameter. */
-		( void ) xRegions;
-	}
-	#endif
-
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-	{
-		for( x = 0; x < ( UBaseType_t ) configNUM_THREAD_LOCAL_STORAGE_POINTERS; x++ )
-		{
-			pxNewTCB->pvThreadLocalStoragePointers[ x ] = NULL;
-		}
-	}
-	#endif
-
-	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
-	{
-		pxNewTCB->ulNotifiedValue = 0;
-		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-	}
-	#endif
-
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-	{
-		/* Initialise this task's Newlib reent structure. */
-		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
-	}
-	#endif
-
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-	{
-		pxNewTCB->ucDelayAborted = pdFALSE;
-	}
-	#endif
-
-	/* Initialize the TCB stack to look as if the task was already running,
-	but had been interrupted by the scheduler.  The return address is set
-	to the start of the task function. Once the stack has been initialised
-	the	top of stack variable is updated. */
-	#if( portUSING_MPU_WRAPPERS == 1 )
-	{
-		pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
-	}
-	#else /* portUSING_MPU_WRAPPERS */
-	{
-		pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
-	}
-	#endif /* portUSING_MPU_WRAPPERS */
-
-	if( ( void * ) pxCreatedTask != NULL )
-	{
-		/* Pass the handle out in an anonymous way.  The handle can be used to
-		change the created task's priority, delete the created task, etc.*/
-		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
-{
-	/* Ensure interrupts don't access the task lists while the lists are being
-	updated. */
-	taskENTER_CRITICAL();
-	{
-		uxCurrentNumberOfTasks++;
-		if( pxCurrentTCB == NULL )
-		{
-			/* There are no other tasks, or all the other tasks are in
-			the suspended state - make this the current task. */
-			pxCurrentTCB = pxNewTCB;
-
-			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
-			{
-				/* This is the first task to be created so do the preliminary
-				initialisation required.  We will not recover if this call
-				fails, but we will report the failure. */
-				prvInitialiseTaskLists();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			/* If the scheduler is not already running, make this task the
-			current task if it is the highest priority task to be created
-			so far. */
-			if( xSchedulerRunning == pdFALSE )
-			{
-				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
-				{
-					pxCurrentTCB = pxNewTCB;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		uxTaskNumber++;
-
-		#if ( configUSE_TRACE_FACILITY == 1 )
-		{
-			/* Add a counter into the TCB for tracing only. */
-			pxNewTCB->uxTCBNumber = uxTaskNumber;
-		}
-		#endif /* configUSE_TRACE_FACILITY */
-		traceTASK_CREATE( pxNewTCB );
-
-		prvAddTaskToReadyList( pxNewTCB );
-
-		portSETUP_TCB( pxNewTCB );
-	}
-	taskEXIT_CRITICAL();
-
-	if( xSchedulerRunning != pdFALSE )
-	{
-		/* If the created task is of a higher priority than the current task
-		then it should run now. */
-		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
-		{
-			taskYIELD_IF_USING_PREEMPTION();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
-	void vTaskDelete( TaskHandle_t xTaskToDelete )
-	{
-	TCB_t *pxTCB;
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the calling task that is
-			being deleted. */
-			pxTCB = prvGetTCBFromHandle( xTaskToDelete );
-
-			/* Remove task from the ready list. */
-			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-			{
-				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Is the task waiting on an event also? */
-			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-			{
-				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Increment the uxTaskNumber also so kernel aware debuggers can
-			detect that the task lists need re-generating.  This is done before
-			portPRE_TASK_DELETE_HOOK() as in the Windows port that macro will
-			not return. */
-			uxTaskNumber++;
-
-			if( pxTCB == pxCurrentTCB )
-			{
-				/* A task is deleting itself.  This cannot complete within the
-				task itself, as a context switch to another task is required.
-				Place the task in the termination list.  The idle task will
-				check the termination list and free up any memory allocated by
-				the scheduler for the TCB and stack of the deleted task. */
-				vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xStateListItem ) );
-
-				/* Increment the ucTasksDeleted variable so the idle task knows
-				there is a task that has been deleted and that it should therefore
-				check the xTasksWaitingTermination list. */
-				++uxDeletedTasksWaitingCleanUp;
-
-				/* The pre-delete hook is primarily for the Windows simulator,
-				in which Windows specific clean up operations are performed,
-				after which it is not possible to yield away from this task -
-				hence xYieldPending is used to latch that a context switch is
-				required. */
-				portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending );
-			}
-			else
-			{
-				--uxCurrentNumberOfTasks;
-				prvDeleteTCB( pxTCB );
-
-				/* Reset the next expected unblock time in case it referred to
-				the task that has just been deleted. */
-				prvResetNextTaskUnblockTime();
-			}
-
-			traceTASK_DELETE( pxTCB );
-		}
-		taskEXIT_CRITICAL();
-
-		/* Force a reschedule if it is the currently running task that has just
-		been deleted. */
-		if( xSchedulerRunning != pdFALSE )
-		{
-			if( pxTCB == pxCurrentTCB )
-			{
-				configASSERT( uxSchedulerSuspended == 0 );
-				portYIELD_WITHIN_API();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-
-#endif /* INCLUDE_vTaskDelete */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelayUntil == 1 )
-
-	void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement )
-	{
-	TickType_t xTimeToWake;
-	BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
-
-		configASSERT( pxPreviousWakeTime );
-		configASSERT( ( xTimeIncrement > 0U ) );
-		configASSERT( uxSchedulerSuspended == 0 );
-
-		vTaskSuspendAll();
-		{
-			/* Minor optimisation.  The tick count cannot change in this
-			block. */
-			const TickType_t xConstTickCount = xTickCount;
-
-			/* Generate the tick time at which the task wants to wake. */
-			xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
-
-			if( xConstTickCount < *pxPreviousWakeTime )
-			{
-				/* The tick count has overflowed since this function was
-				lasted called.  In this case the only time we should ever
-				actually delay is if the wake time has also	overflowed,
-				and the wake time is greater than the tick time.  When this
-				is the case it is as if neither time had overflowed. */
-				if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
-				{
-					xShouldDelay = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* The tick time has not overflowed.  In this case we will
-				delay if either the wake time has overflowed, and/or the
-				tick time is less than the wake time. */
-				if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
-				{
-					xShouldDelay = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-
-			/* Update the wake time ready for the next call. */
-			*pxPreviousWakeTime = xTimeToWake;
-
-			if( xShouldDelay != pdFALSE )
-			{
-				traceTASK_DELAY_UNTIL( xTimeToWake );
-
-				/* prvAddCurrentTaskToDelayedList() needs the block time, not
-				the time to wake, so subtract the current tick count. */
-				prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		xAlreadyYielded = xTaskResumeAll();
-
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
-		{
-			portYIELD_WITHIN_API();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskDelayUntil */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelay == 1 )
-
-	void vTaskDelay( const TickType_t xTicksToDelay )
-	{
-	BaseType_t xAlreadyYielded = pdFALSE;
-
-		/* A delay time of zero just forces a reschedule. */
-		if( xTicksToDelay > ( TickType_t ) 0U )
-		{
-			configASSERT( uxSchedulerSuspended == 0 );
-			vTaskSuspendAll();
-			{
-				traceTASK_DELAY();
-
-				/* A task that is removed from the event list while the
-				scheduler is suspended will not get placed in the ready
-				list or removed from the blocked list until the scheduler
-				is resumed.
-
-				This task cannot be in an event list as it is the currently
-				executing task. */
-				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
-			}
-			xAlreadyYielded = xTaskResumeAll();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
-		{
-			portYIELD_WITHIN_API();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskDelay */
-/*-----------------------------------------------------------*/
-
-#if( ( INCLUDE_eTaskGetState == 1 ) || ( configUSE_TRACE_FACILITY == 1 ) )
-
-	eTaskState eTaskGetState( TaskHandle_t xTask )
-	{
-	eTaskState eReturn;
-	List_t *pxStateList;
-	const TCB_t * const pxTCB = ( TCB_t * ) xTask;
-
-		configASSERT( pxTCB );
-
-		if( pxTCB == pxCurrentTCB )
-		{
-			/* The task calling this function is querying its own state. */
-			eReturn = eRunning;
-		}
-		else
-		{
-			taskENTER_CRITICAL();
-			{
-				pxStateList = ( List_t * ) listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) );
-			}
-			taskEXIT_CRITICAL();
-
-			if( ( pxStateList == pxDelayedTaskList ) || ( pxStateList == pxOverflowDelayedTaskList ) )
-			{
-				/* The task being queried is referenced from one of the Blocked
-				lists. */
-				eReturn = eBlocked;
-			}
-
-			#if ( INCLUDE_vTaskSuspend == 1 )
-				else if( pxStateList == &xSuspendedTaskList )
-				{
-					/* The task being queried is referenced from the suspended
-					list.  Is it genuinely suspended or is it block
-					indefinitely? */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL )
-					{
-						eReturn = eSuspended;
-					}
-					else
-					{
-						eReturn = eBlocked;
-					}
-				}
-			#endif
-
-			#if ( INCLUDE_vTaskDelete == 1 )
-				else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )
-				{
-					/* The task being queried is referenced from the deleted
-					tasks list, or it is not referenced from any lists at
-					all. */
-					eReturn = eDeleted;
-				}
-			#endif
-
-			else /*lint !e525 Negative indentation is intended to make use of pre-processor clearer. */
-			{
-				/* If the task is not in any other state, it must be in the
-				Ready (including pending ready) state. */
-				eReturn = eReady;
-			}
-		}
-
-		return eReturn;
-	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
-
-#endif /* INCLUDE_eTaskGetState */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskPriorityGet == 1 )
-
-	UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxReturn;
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the priority of the that
-			called uxTaskPriorityGet() that is being queried. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-			uxReturn = pxTCB->uxPriority;
-		}
-		taskEXIT_CRITICAL();
-
-		return uxReturn;
-	}
-
-#endif /* INCLUDE_uxTaskPriorityGet */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskPriorityGet == 1 )
-
-	UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxReturn, uxSavedInterruptState;
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			/* If null is passed in here then it is the priority of the calling
-			task that is being queried. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-			uxReturn = pxTCB->uxPriority;
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
-
-		return uxReturn;
-	}
-
-#endif /* INCLUDE_uxTaskPriorityGet */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskPrioritySet == 1 )
-
-	void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;
-	BaseType_t xYieldRequired = pdFALSE;
-
-		configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );
-
-		/* Ensure the new priority is valid. */
-		if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
-		{
-			uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the priority of the calling
-			task that is being changed. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-
-			traceTASK_PRIORITY_SET( pxTCB, uxNewPriority );
-
-			#if ( configUSE_MUTEXES == 1 )
-			{
-				uxCurrentBasePriority = pxTCB->uxBasePriority;
-			}
-			#else
-			{
-				uxCurrentBasePriority = pxTCB->uxPriority;
-			}
-			#endif
-
-			if( uxCurrentBasePriority != uxNewPriority )
-			{
-				/* The priority change may have readied a task of higher
-				priority than the calling task. */
-				if( uxNewPriority > uxCurrentBasePriority )
-				{
-					if( pxTCB != pxCurrentTCB )
-					{
-						/* The priority of a task other than the currently
-						running task is being raised.  Is the priority being
-						raised above that of the running task? */
-						if( uxNewPriority >= pxCurrentTCB->uxPriority )
-						{
-							xYieldRequired = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						/* The priority of the running task is being raised,
-						but the running task must already be the highest
-						priority task able to run so no yield is required. */
-					}
-				}
-				else if( pxTCB == pxCurrentTCB )
-				{
-					/* Setting the priority of the running task down means
-					there may now be another task of higher priority that
-					is ready to execute. */
-					xYieldRequired = pdTRUE;
-				}
-				else
-				{
-					/* Setting the priority of any other task down does not
-					require a yield as the running task must be above the
-					new priority of the task being modified. */
-				}
-
-				/* Remember the ready list the task might be referenced from
-				before its uxPriority member is changed so the
-				taskRESET_READY_PRIORITY() macro can function correctly. */
-				uxPriorityUsedOnEntry = pxTCB->uxPriority;
-
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					/* Only change the priority being used if the task is not
-					currently using an inherited priority. */
-					if( pxTCB->uxBasePriority == pxTCB->uxPriority )
-					{
-						pxTCB->uxPriority = uxNewPriority;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* The base priority gets set whatever. */
-					pxTCB->uxBasePriority = uxNewPriority;
-				}
-				#else
-				{
-					pxTCB->uxPriority = uxNewPriority;
-				}
-				#endif
-
-				/* Only reset the event list item value if the value is not
-				being used for anything else. */
-				if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-				{
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				/* If the task is in the blocked or suspended list we need do
-				nothing more than change it's priority variable. However, if
-				the task is in a ready list it needs to be removed and placed
-				in the list appropriate to its new priority. */
-				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
-				{
-					/* The task is currently in its ready list - remove before adding
-					it to it's new ready list.  As we are in a critical section we
-					can do this even if the scheduler is suspended. */
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						/* It is known that the task is in its ready list so
-						there is no need to check again and the port level
-						reset macro can be called directly. */
-						portRESET_READY_PRIORITY( uxPriorityUsedOnEntry, uxTopReadyPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				if( xYieldRequired != pdFALSE )
-				{
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				/* Remove compiler warning about unused variables when the port
-				optimised task selection is not being used. */
-				( void ) uxPriorityUsedOnEntry;
-			}
-		}
-		taskEXIT_CRITICAL();
-	}
-
-#endif /* INCLUDE_vTaskPrioritySet */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	void vTaskSuspend( TaskHandle_t xTaskToSuspend )
-	{
-	TCB_t *pxTCB;
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the running task that is
-			being suspended. */
-			pxTCB = prvGetTCBFromHandle( xTaskToSuspend );
-
-			traceTASK_SUSPEND( pxTCB );
-
-			/* Remove task from the ready/delayed list and place in the
-			suspended list. */
-			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-			{
-				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Is the task waiting on an event also? */
-			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-			{
-				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
-		}
-		taskEXIT_CRITICAL();
-
-		if( xSchedulerRunning != pdFALSE )
-		{
-			/* Reset the next expected unblock time in case it referred to the
-			task that is now in the Suspended state. */
-			taskENTER_CRITICAL();
-			{
-				prvResetNextTaskUnblockTime();
-			}
-			taskEXIT_CRITICAL();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		if( pxTCB == pxCurrentTCB )
-		{
-			if( xSchedulerRunning != pdFALSE )
-			{
-				/* The current task has just been suspended. */
-				configASSERT( uxSchedulerSuspended == 0 );
-				portYIELD_WITHIN_API();
-			}
-			else
-			{
-				/* The scheduler is not running, but the task that was pointed
-				to by pxCurrentTCB has just been suspended and pxCurrentTCB
-				must be adjusted to point to a different task. */
-				if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks )
-				{
-					/* No other tasks are ready, so set pxCurrentTCB back to
-					NULL so when the next task is created pxCurrentTCB will
-					be set to point to it no matter what its relative priority
-					is. */
-					pxCurrentTCB = NULL;
-				}
-				else
-				{
-					vTaskSwitchContext();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskSuspend */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask )
-	{
-	BaseType_t xReturn = pdFALSE;
-	const TCB_t * const pxTCB = ( TCB_t * ) xTask;
-
-		/* Accesses xPendingReadyList so must be called from a critical
-		section. */
-
-		/* It does not make sense to check if the calling task is suspended. */
-		configASSERT( xTask );
-
-		/* Is the task being resumed actually in the suspended list? */
-		if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xStateListItem ) ) != pdFALSE )
-		{
-			/* Has the task already been resumed from within an ISR? */
-			if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) == pdFALSE )
-			{
-				/* Is it in the suspended list because it is in the	Suspended
-				state, or because is is blocked with no timeout? */
-				if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) != pdFALSE )
-				{
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xReturn;
-	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
-
-#endif /* INCLUDE_vTaskSuspend */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	void vTaskResume( TaskHandle_t xTaskToResume )
-	{
-	TCB_t * const pxTCB = ( TCB_t * ) xTaskToResume;
-
-		/* It does not make sense to resume the calling task. */
-		configASSERT( xTaskToResume );
-
-		/* The parameter cannot be NULL as it is impossible to resume the
-		currently executing task. */
-		if( ( pxTCB != NULL ) && ( pxTCB != pxCurrentTCB ) )
-		{
-			taskENTER_CRITICAL();
-			{
-				if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
-				{
-					traceTASK_RESUME( pxTCB );
-
-					/* As we are in a critical section we can access the ready
-					lists even if the scheduler is suspended. */
-					( void ) uxListRemove(  &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-
-					/* We may have just resumed a higher priority task. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						/* This yield may not cause the task just resumed to run,
-						but will leave the lists in the correct state for the
-						next yield. */
-						taskYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			taskEXIT_CRITICAL();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskSuspend */
-
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )
-
-	BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )
-	{
-	BaseType_t xYieldRequired = pdFALSE;
-	TCB_t * const pxTCB = ( TCB_t * ) xTaskToResume;
-	UBaseType_t uxSavedInterruptStatus;
-
-		configASSERT( xTaskToResume );
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
-			{
-				traceTASK_RESUME_FROM_ISR( pxTCB );
-
-				/* Check the ready lists can be accessed. */
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					/* Ready lists can be accessed so move the task from the
-					suspended list to the ready list directly. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						xYieldRequired = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed or ready lists cannot be accessed so the task
-					is held in the pending ready list until the scheduler is
-					unsuspended. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-		return xYieldRequired;
-	}
-
-#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-void vTaskStartScheduler( void )
-{
-BaseType_t xReturn;
-
-	/* Add the idle task at the lowest priority. */
-	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	{
-		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
-		StackType_t *pxIdleTaskStackBuffer = NULL;
-		uint32_t ulIdleTaskStackSize;
-
-		/* The Idle task is created using user provided RAM - obtain the
-		address of the RAM then create the idle task. */
-		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
-		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
-												"IDLE",
-												ulIdleTaskStackSize,
-												( void * ) NULL,
-												( tskIDLE_PRIORITY | portPRIVILEGE_BIT ),
-												pxIdleTaskStackBuffer,
-												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
-
-		if( xIdleTaskHandle != NULL )
-		{
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-	}
-	#else
-	{
-		/* The Idle task is being created using dynamically allocated RAM. */
-		xReturn = xTaskCreate(	prvIdleTask,
-								"IDLE", configMINIMAL_STACK_SIZE,
-								( void * ) NULL,
-								( tskIDLE_PRIORITY | portPRIVILEGE_BIT ),
-								&xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
-	}
-	#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-	#if ( configUSE_TIMERS == 1 )
-	{
-		if( xReturn == pdPASS )
-		{
-			xReturn = xTimerCreateTimerTask();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif /* configUSE_TIMERS */
-
-	if( xReturn == pdPASS )
-	{
-		/* Interrupts are turned off here, to ensure a tick does not occur
-		before or during the call to xPortStartScheduler().  The stacks of
-		the created tasks contain a status word with interrupts switched on
-		so interrupts will automatically get re-enabled when the first task
-		starts to run. */
-		portDISABLE_INTERRUPTS();
-
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			/* Switch Newlib's _impure_ptr variable to point to the _reent
-			structure specific to the task that will run first. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-
-		xNextTaskUnblockTime = portMAX_DELAY;
-		xSchedulerRunning = pdTRUE;
-		xTickCount = ( TickType_t ) 0U;
-
-		/* If configGENERATE_RUN_TIME_STATS is defined then the following
-		macro must be defined to configure the timer/counter used to generate
-		the run time counter time base. */
-		portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
-
-		/* Setting up the timer tick is hardware specific and thus in the
-		portable interface. */
-		if( xPortStartScheduler() != pdFALSE )
-		{
-			/* Should not reach here as if the scheduler is running the
-			function will not return. */
-		}
-		else
-		{
-			/* Should only reach here if a task calls xTaskEndScheduler(). */
-		}
-	}
-	else
-	{
-		/* This line will only be reached if the kernel could not be started,
-		because there was not enough FreeRTOS heap to create the idle task
-		or the timer task. */
-		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
-	}
-
-	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
-	meaning xIdleTaskHandle is not used anywhere else. */
-	( void ) xIdleTaskHandle;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskEndScheduler( void )
-{
-	/* Stop the scheduler interrupts and call the portable scheduler end
-	routine so the original ISRs can be restored if necessary.  The port
-	layer must ensure interrupts enable	bit is left in the correct state. */
-	portDISABLE_INTERRUPTS();
-	xSchedulerRunning = pdFALSE;
-	vPortEndScheduler();
-}
-/*----------------------------------------------------------*/
-
-void vTaskSuspendAll( void )
-{
-	/* A critical section is not required as the variable is of type
-	BaseType_t.  Please read Richard Barry's reply in the following link to a
-	post in the FreeRTOS support forum before reporting this as a bug! -
-	http://goo.gl/wu4acr */
-	++uxSchedulerSuspended;
-}
-/*----------------------------------------------------------*/
-
-#if ( configUSE_TICKLESS_IDLE != 0 )
-
-	static TickType_t prvGetExpectedIdleTime( void )
-	{
-	TickType_t xReturn;
-	UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
-
-		/* uxHigherPriorityReadyTasks takes care of the case where
-		configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
-		task that are in the Ready state, even though the idle task is
-		running. */
-		#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
-		{
-			if( uxTopReadyPriority > tskIDLE_PRIORITY )
-			{
-				uxHigherPriorityReadyTasks = pdTRUE;
-			}
-		}
-		#else
-		{
-			const UBaseType_t uxLeastSignificantBit = ( UBaseType_t ) 0x01;
-
-			/* When port optimised task selection is used the uxTopReadyPriority
-			variable is used as a bit map.  If bits other than the least
-			significant bit are set then there are tasks that have a priority
-			above the idle priority that are in the Ready state.  This takes
-			care of the case where the co-operative scheduler is in use. */
-			if( uxTopReadyPriority > uxLeastSignificantBit )
-			{
-				uxHigherPriorityReadyTasks = pdTRUE;
-			}
-		}
-		#endif
-
-		if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )
-		{
-			xReturn = 0;
-		}
-		else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > 1 )
-		{
-			/* There are other idle priority tasks in the ready state.  If
-			time slicing is used then the very next tick interrupt must be
-			processed. */
-			xReturn = 0;
-		}
-		else if( uxHigherPriorityReadyTasks != pdFALSE )
-		{
-			/* There are tasks in the Ready state that have a priority above the
-			idle priority.  This path can only be reached if
-			configUSE_PREEMPTION is 0. */
-			xReturn = 0;
-		}
-		else
-		{
-			xReturn = xNextTaskUnblockTime - xTickCount;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*----------------------------------------------------------*/
-
-BaseType_t xTaskResumeAll( void )
-{
-TCB_t *pxTCB = NULL;
-BaseType_t xAlreadyYielded = pdFALSE;
-
-	/* If uxSchedulerSuspended is zero then this function does not match a
-	previous call to vTaskSuspendAll(). */
-	configASSERT( uxSchedulerSuspended );
-
-	/* It is possible that an ISR caused a task to be removed from an event
-	list while the scheduler was suspended.  If this was the case then the
-	removed task will have been added to the xPendingReadyList.  Once the
-	scheduler has been resumed it is safe to move all the pending ready
-	tasks from this list into their appropriate ready list. */
-	taskENTER_CRITICAL();
-	{
-		--uxSchedulerSuspended;
-
-		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-		{
-			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
-			{
-				/* Move any readied tasks from the pending list into the
-				appropriate ready list. */
-				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
-				{
-					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );
-					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-
-					/* If the moved task has a priority higher than the current
-					task then a yield must be performed. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						xYieldPending = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( pxTCB != NULL )
-				{
-					/* A task was unblocked while the scheduler was suspended,
-					which may have prevented the next unblock time from being
-					re-calculated, in which case re-calculate it now.  Mainly
-					important for low power tickless implementations, where
-					this can prevent an unnecessary exit from low power
-					state. */
-					prvResetNextTaskUnblockTime();
-				}
-
-				/* If any ticks occurred while the scheduler was suspended then
-				they should be processed now.  This ensures the tick count does
-				not	slip, and that any delayed tasks are resumed at the correct
-				time. */
-				{
-					UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
-
-					if( uxPendedCounts > ( UBaseType_t ) 0U )
-					{
-						do
-						{
-							if( xTaskIncrementTick() != pdFALSE )
-							{
-								xYieldPending = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-							--uxPendedCounts;
-						} while( uxPendedCounts > ( UBaseType_t ) 0U );
-
-						uxPendedTicks = 0;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( xYieldPending != pdFALSE )
-				{
-					#if( configUSE_PREEMPTION != 0 )
-					{
-						xAlreadyYielded = pdTRUE;
-					}
-					#endif
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xAlreadyYielded;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTaskGetTickCount( void )
-{
-TickType_t xTicks;
-
-	/* Critical section required if running on a 16 bit processor. */
-	portTICK_TYPE_ENTER_CRITICAL();
-	{
-		xTicks = xTickCount;
-	}
-	portTICK_TYPE_EXIT_CRITICAL();
-
-	return xTicks;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTaskGetTickCountFromISR( void )
-{
-TickType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
-	{
-		xReturn = xTickCount;
-	}
-	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxTaskGetNumberOfTasks( void )
-{
-	/* A critical section is not required because the variables are of type
-	BaseType_t. */
-	return uxCurrentNumberOfTasks;
-}
-/*-----------------------------------------------------------*/
-
-char *pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-TCB_t *pxTCB;
-
-	/* If null is passed in here then the name of the calling task is being
-	queried. */
-	pxTCB = prvGetTCBFromHandle( xTaskToQuery );
-	configASSERT( pxTCB );
-	return &( pxTCB->pcTaskName[ 0 ] );
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetHandle == 1 )
-
-	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] )
-	{
-	TCB_t *pxNextTCB, *pxFirstTCB, *pxReturn = NULL;
-	UBaseType_t x;
-	char cNextChar;
-
-		/* This function is called with the scheduler suspended. */
-
-		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
-		{
-			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
-
-			do
-			{
-				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
-
-				/* Check each character in the name looking for a match or
-				mismatch. */
-				for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
-				{
-					cNextChar = pxNextTCB->pcTaskName[ x ];
-
-					if( cNextChar != pcNameToQuery[ x ] )
-					{
-						/* Characters didn't match. */
-						break;
-					}
-					else if( cNextChar == 0x00 )
-					{
-						/* Both strings terminated, a match must have been
-						found. */
-						pxReturn = pxNextTCB;
-						break;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( pxReturn != NULL )
-				{
-					/* The handle has been found. */
-					break;
-				}
-
-			} while( pxNextTCB != pxFirstTCB );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return pxReturn;
-	}
-
-#endif /* INCLUDE_xTaskGetHandle */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetHandle == 1 )
-
-	TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t uxQueue = configMAX_PRIORITIES;
-	TCB_t* pxTCB;
-
-		/* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */
-		configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN );
-
-		vTaskSuspendAll();
-		{
-			/* Search the ready lists. */
-			do
-			{
-				uxQueue--;
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) &( pxReadyTasksLists[ uxQueue ] ), pcNameToQuery );
-
-				if( pxTCB != NULL )
-				{
-					/* Found the handle. */
-					break;
-				}
-
-			} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-			/* Search the delayed lists. */
-			if( pxTCB == NULL )
-			{
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxDelayedTaskList, pcNameToQuery );
-			}
-
-			if( pxTCB == NULL )
-			{
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxOverflowDelayedTaskList, pcNameToQuery );
-			}
-
-			#if ( INCLUDE_vTaskSuspend == 1 )
-			{
-				if( pxTCB == NULL )
-				{
-					/* Search the suspended list. */
-					pxTCB = prvSearchForNameWithinSingleList( &xSuspendedTaskList, pcNameToQuery );
-				}
-			}
-			#endif
-
-			#if( INCLUDE_vTaskDelete == 1 )
-			{
-				if( pxTCB == NULL )
-				{
-					/* Search the deleted list. */
-					pxTCB = prvSearchForNameWithinSingleList( &xTasksWaitingTermination, pcNameToQuery );
-				}
-			}
-			#endif
-		}
-		( void ) xTaskResumeAll();
-
-		return ( TaskHandle_t ) pxTCB;
-	}
-
-#endif /* INCLUDE_xTaskGetHandle */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime )
-	{
-	UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;
-
-		vTaskSuspendAll();
-		{
-			/* Is there a space in the array for each task in the system? */
-			if( uxArraySize >= uxCurrentNumberOfTasks )
-			{
-				/* Fill in an TaskStatus_t structure with information on each
-				task in the Ready state. */
-				do
-				{
-					uxQueue--;
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );
-
-				} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-				/* Fill in an TaskStatus_t structure with information on each
-				task in the Blocked state. */
-				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );
-				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );
-
-				#if( INCLUDE_vTaskDelete == 1 )
-				{
-					/* Fill in an TaskStatus_t structure with information on
-					each task that has been deleted but not yet cleaned up. */
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );
-				}
-				#endif
-
-				#if ( INCLUDE_vTaskSuspend == 1 )
-				{
-					/* Fill in an TaskStatus_t structure with information on
-					each task in the Suspended state. */
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );
-				}
-				#endif
-
-				#if ( configGENERATE_RUN_TIME_STATS == 1)
-				{
-					if( pulTotalRunTime != NULL )
-					{
-						#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
-							portALT_GET_RUN_TIME_COUNTER_VALUE( ( *pulTotalRunTime ) );
-						#else
-							*pulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
-						#endif
-					}
-				}
-				#else
-				{
-					if( pulTotalRunTime != NULL )
-					{
-						*pulTotalRunTime = 0;
-					}
-				}
-				#endif
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		( void ) xTaskResumeAll();
-
-		return uxTask;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
-
-	TaskHandle_t xTaskGetIdleTaskHandle( void )
-	{
-		/* If xTaskGetIdleTaskHandle() is called before the scheduler has been
-		started, then xIdleTaskHandle will be NULL. */
-		configASSERT( ( xIdleTaskHandle != NULL ) );
-		return xIdleTaskHandle;
-	}
-
-#endif /* INCLUDE_xTaskGetIdleTaskHandle */
-/*----------------------------------------------------------*/
-
-/* This conditional compilation should use inequality to 0, not equality to 1.
-This is to ensure vTaskStepTick() is available when user defined low power mode
-implementations require configUSE_TICKLESS_IDLE to be set to a value other than
-1. */
-#if ( configUSE_TICKLESS_IDLE != 0 )
-
-	void vTaskStepTick( const TickType_t xTicksToJump )
-	{
-		/* Correct the tick count value after a period during which the tick
-		was suppressed.  Note this does *not* call the tick hook function for
-		each stepped tick. */
-		configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );
-		xTickCount += xTicksToJump;
-		traceINCREASE_TICK_COUNT( xTicksToJump );
-	}
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskAbortDelay == 1 )
-
-	BaseType_t xTaskAbortDelay( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB = ( TCB_t * ) xTask;
-	BaseType_t xReturn = pdFALSE;
-
-		configASSERT( pxTCB );
-
-		vTaskSuspendAll();
-		{
-			/* A task can only be prematurely removed from the Blocked state if
-			it is actually in the Blocked state. */
-			if( eTaskGetState( xTask ) == eBlocked )
-			{
-				/* Remove the reference to the task from the blocked list.  An
-				interrupt won't touch the xStateListItem because the
-				scheduler is suspended. */
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-
-				/* Is the task waiting on an event also?  If so remove it from
-				the event list too.  Interrupts can touch the event list item,
-				even though the scheduler is suspended, so a critical section
-				is used. */
-				taskENTER_CRITICAL();
-				{
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-						pxTCB->ucDelayAborted = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				taskEXIT_CRITICAL();
-
-				/* Place the unblocked task into the appropriate ready list. */
-				prvAddTaskToReadyList( pxTCB );
-
-				/* A task being unblocked cannot cause an immediate context
-				switch if preemption is turned off. */
-				#if (  configUSE_PREEMPTION == 1 )
-				{
-					/* Preemption is on, but a context switch should only be
-					performed if the unblocked task has a priority that is
-					equal to or higher than the currently executing task. */
-					if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-					{
-						/* Pend the yield to be performed when the scheduler
-						is unsuspended. */
-						xYieldPending = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_PREEMPTION */
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		xTaskResumeAll();
-
-		return xReturn;
-	}
-
-#endif /* INCLUDE_xTaskAbortDelay */
-/*----------------------------------------------------------*/
-
-BaseType_t xTaskIncrementTick( void )
-{
-TCB_t * pxTCB;
-TickType_t xItemValue;
-BaseType_t xSwitchRequired = pdFALSE;
-
-	/* Called by the portable layer each time a tick interrupt occurs.
-	Increments the tick then checks to see if the new tick value will cause any
-	tasks to be unblocked. */
-	traceTASK_INCREMENT_TICK( xTickCount );
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-	{
-		/* Minor optimisation.  The tick count cannot change in this
-		block. */
-		const TickType_t xConstTickCount = xTickCount + 1;
-
-		/* Increment the RTOS tick, switching the delayed and overflowed
-		delayed lists if it wraps to 0. */
-		xTickCount = xConstTickCount;
-
-		if( xConstTickCount == ( TickType_t ) 0U )
-		{
-			taskSWITCH_DELAYED_LISTS();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* See if this tick has made a timeout expire.  Tasks are stored in
-		the	queue in the order of their wake time - meaning once one task
-		has been found whose block time has not expired there is no need to
-		look any further down the list. */
-		if( xConstTickCount >= xNextTaskUnblockTime )
-		{
-			for( ;; )
-			{
-				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
-				{
-					/* The delayed list is empty.  Set xNextTaskUnblockTime
-					to the maximum possible value so it is extremely
-					unlikely that the
-					if( xTickCount >= xNextTaskUnblockTime ) test will pass
-					next time through. */
-					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					break;
-				}
-				else
-				{
-					/* The delayed list is not empty, get the value of the
-					item at the head of the delayed list.  This is the time
-					at which the task at the head of the delayed list must
-					be removed from the Blocked state. */
-					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
-					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
-
-					if( xConstTickCount < xItemValue )
-					{
-						/* It is not time to unblock this item yet, but the
-						item value is the time at which the task at the head
-						of the blocked list must be removed from the Blocked
-						state -	so record the item value in
-						xNextTaskUnblockTime. */
-						xNextTaskUnblockTime = xItemValue;
-						break;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* It is time to remove the item from the Blocked state. */
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-
-					/* Is the task waiting on an event also?  If so remove
-					it from the event list. */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Place the unblocked task into the appropriate ready
-					list. */
-					prvAddTaskToReadyList( pxTCB );
-
-					/* A task being unblocked cannot cause an immediate
-					context switch if preemption is turned off. */
-					#if (  configUSE_PREEMPTION == 1 )
-					{
-						/* Preemption is on, but a context switch should
-						only be performed if the unblocked task has a
-						priority that is equal to or higher than the
-						currently executing task. */
-						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-						{
-							xSwitchRequired = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configUSE_PREEMPTION */
-				}
-			}
-		}
-
-		/* Tasks of equal priority to the currently running task will share
-		processing time (time slice) if preemption is on, and the application
-		writer has not explicitly turned time slicing off. */
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
-		{
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
-			{
-				xSwitchRequired = pdTRUE;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) */
-
-		#if ( configUSE_TICK_HOOK == 1 )
-		{
-			/* Guard against the tick hook being called when the pended tick
-			count is being unwound (when the scheduler is being unlocked). */
-			if( uxPendedTicks == ( UBaseType_t ) 0U )
-			{
-				vApplicationTickHook();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_TICK_HOOK */
-	}
-	else
-	{
-		++uxPendedTicks;
-
-		/* The tick hook gets called at regular intervals, even if the
-		scheduler is locked. */
-		#if ( configUSE_TICK_HOOK == 1 )
-		{
-			vApplicationTickHook();
-		}
-		#endif
-	}
-
-	#if ( configUSE_PREEMPTION == 1 )
-	{
-		if( xYieldPending != pdFALSE )
-		{
-			xSwitchRequired = pdTRUE;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif /* configUSE_PREEMPTION */
-
-	return xSwitchRequired;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
-	void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction )
-	{
-	TCB_t *xTCB;
-
-		/* If xTask is NULL then it is the task hook of the calling task that is
-		getting set. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = ( TCB_t * ) xTask;
-		}
-
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		taskENTER_CRITICAL();
-			xTCB->pxTaskTag = pxHookFunction;
-		taskEXIT_CRITICAL();
-	}
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
-	TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask )
-	{
-	TCB_t *xTCB;
-	TaskHookFunction_t xReturn;
-
-		/* If xTask is NULL then we are setting our own task hook. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = ( TCB_t * ) xTask;
-		}
-
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		taskENTER_CRITICAL();
-		{
-			xReturn = xTCB->pxTaskTag;
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
-	BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
-	{
-	TCB_t *xTCB;
-	BaseType_t xReturn;
-
-		/* If xTask is NULL then we are calling our own task hook. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = ( TCB_t * ) xTask;
-		}
-
-		if( xTCB->pxTaskTag != NULL )
-		{
-			xReturn = xTCB->pxTaskTag( pvParameter );
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-void vTaskSwitchContext( void )
-{
-	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
-	{
-		/* The scheduler is currently suspended - do not allow a context
-		switch. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xYieldPending = pdFALSE;
-		traceTASK_SWITCHED_OUT();
-
-		#if ( configGENERATE_RUN_TIME_STATS == 1 )
-		{
-				#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
-					portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
-				#else
-					ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
-				#endif
-
-				/* Add the amount of time the task has been running to the
-				accumulated time so far.  The time the task started running was
-				stored in ulTaskSwitchedInTime.  Note that there is no overflow
-				protection here so count values are only valid until the timer
-				overflows.  The guard against negative values is to protect
-				against suspect run time stat counter implementations - which
-				are provided by the application, not the kernel. */
-				if( ulTotalRunTime > ulTaskSwitchedInTime )
-				{
-					pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-				ulTaskSwitchedInTime = ulTotalRunTime;
-		}
-		#endif /* configGENERATE_RUN_TIME_STATS */
-
-		/* Check for stack overflow, if configured. */
-		taskCHECK_FOR_STACK_OVERFLOW();
-
-		/* Select a new task to run using either the generic C or port
-		optimised asm code. */
-		taskSELECT_HIGHEST_PRIORITY_TASK();
-		traceTASK_SWITCHED_IN();
-
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			/* Switch Newlib's _impure_ptr variable to point to the _reent
-			structure specific to this task. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-	}
-}
-/*-----------------------------------------------------------*/
-
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
-{
-	configASSERT( pxEventList );
-
-	/* THIS FUNCTION MUST BE CALLED WITH EITHER INTERRUPTS DISABLED OR THE
-	SCHEDULER SUSPENDED AND THE QUEUE BEING ACCESSED LOCKED. */
-
-	/* Place the event list item of the TCB in the appropriate event list.
-	This is placed in the list in priority order so the highest priority task
-	is the first to be woken by the event.  The queue that contains the event
-	list is locked, preventing simultaneous access from interrupts. */
-	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
-
-	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-}
-/*-----------------------------------------------------------*/
-
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait )
-{
-	configASSERT( pxEventList );
-
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
-	the event groups implementation. */
-	configASSERT( uxSchedulerSuspended != 0 );
-
-	/* Store the item value in the event list item.  It is safe to access the
-	event list item here as interrupts won't access the event list item of a
-	task that is not in the Blocked state. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
-
-	/* Place the event list item of the TCB at the end of the appropriate event
-	list.  It is safe to access the event list here because it is part of an
-	event group implementation - and interrupts don't access event groups
-	directly (instead they access them indirectly by pending function calls to
-	the task level). */
-	vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
-
-	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TIMERS == 1 )
-
-	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
-	{
-		configASSERT( pxEventList );
-
-		/* This function should not be called by application code hence the
-		'Restricted' in its name.  It is not part of the public API.  It is
-		designed for use by kernel code, and has special calling requirements -
-		it should be called with the scheduler suspended. */
-
-
-		/* Place the event list item of the TCB in the appropriate event list.
-		In this case it is assume that this is the only task that is going to
-		be waiting on this event list, so the faster vListInsertEnd() function
-		can be used in place of vListInsert. */
-		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
-
-		/* If the task should block indefinitely then set the block time to a
-		value that will be recognised as an indefinite delay inside the
-		prvAddCurrentTaskToDelayedList() function. */
-		if( xWaitIndefinitely != pdFALSE )
-		{
-			xTicksToWait = portMAX_DELAY;
-		}
-
-		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
-		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
-	}
-
-#endif /* configUSE_TIMERS */
-/*-----------------------------------------------------------*/
-
-BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
-{
-TCB_t *pxUnblockedTCB;
-BaseType_t xReturn;
-
-	/* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION.  It can also be
-	called from a critical section within an ISR. */
-
-	/* The event list is sorted in priority order, so the first in the list can
-	be removed as it is known to be the highest priority.  Remove the TCB from
-	the delayed list, and add it to the ready list.
-
-	If an event is for a queue that is locked then this function will never
-	get called - the lock count on the queue will get modified instead.  This
-	means exclusive access to the event list is guaranteed here.
-
-	This function assumes that a check has already been made to ensure that
-	pxEventList is not empty. */
-	pxUnblockedTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
-	configASSERT( pxUnblockedTCB );
-	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
-
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-	{
-		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
-		prvAddTaskToReadyList( pxUnblockedTCB );
-	}
-	else
-	{
-		/* The delayed and ready lists cannot be accessed, so hold this task
-		pending until the scheduler is resumed. */
-		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
-	}
-
-	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
-	{
-		/* Return true if the task removed from the event list has a higher
-		priority than the calling task.  This allows the calling task to know if
-		it should force a context switch now. */
-		xReturn = pdTRUE;
-
-		/* Mark that a yield is pending in case the user is not using the
-		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	#if( configUSE_TICKLESS_IDLE != 0 )
-	{
-		/* If a task is blocked on a kernel object then xNextTaskUnblockTime
-		might be set to the blocked task's time out time.  If the task is
-		unblocked for a reason other than a timeout xNextTaskUnblockTime is
-		normally left unchanged, because it is automatically reset to a new
-		value when the tick count equals xNextTaskUnblockTime.  However if
-		tickless idling is used it might be more important to enter sleep mode
-		at the earliest possible time - so reset xNextTaskUnblockTime here to
-		ensure it is updated at the earliest possible time. */
-		prvResetNextTaskUnblockTime();
-	}
-	#endif
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue )
-{
-TCB_t *pxUnblockedTCB;
-BaseType_t xReturn;
-
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
-	the event flags implementation. */
-	configASSERT( uxSchedulerSuspended != pdFALSE );
-
-	/* Store the new item value in the event list. */
-	listSET_LIST_ITEM_VALUE( pxEventListItem, xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
-
-	/* Remove the event list form the event flag.  Interrupts do not access
-	event flags. */
-	pxUnblockedTCB = ( TCB_t * ) listGET_LIST_ITEM_OWNER( pxEventListItem );
-	configASSERT( pxUnblockedTCB );
-	( void ) uxListRemove( pxEventListItem );
-
-	/* Remove the task from the delayed list and add it to the ready list.  The
-	scheduler is suspended so interrupts will not be accessing the ready
-	lists. */
-	( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
-	prvAddTaskToReadyList( pxUnblockedTCB );
-
-	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
-	{
-		/* Return true if the task removed from the event list has
-		a higher priority than the calling task.  This allows
-		the calling task to know if it should force a context
-		switch now. */
-		xReturn = pdTRUE;
-
-		/* Mark that a yield is pending in case the user is not using the
-		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
-{
-	configASSERT( pxTimeOut );
-	pxTimeOut->xOverflowCount = xNumOfOverflows;
-	pxTimeOut->xTimeOnEntering = xTickCount;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
-{
-BaseType_t xReturn;
-
-	configASSERT( pxTimeOut );
-	configASSERT( pxTicksToWait );
-
-	taskENTER_CRITICAL();
-	{
-		/* Minor optimisation.  The tick count cannot change in this block. */
-		const TickType_t xConstTickCount = xTickCount;
-
-		#if( INCLUDE_xTaskAbortDelay == 1 )
-			if( pxCurrentTCB->ucDelayAborted != pdFALSE )
-			{
-				/* The delay was aborted, which is not the same as a time out,
-				but has the same result. */
-				pxCurrentTCB->ucDelayAborted = pdFALSE;
-				xReturn = pdTRUE;
-			}
-			else
-		#endif
-
-		#if ( INCLUDE_vTaskSuspend == 1 )
-			if( *pxTicksToWait == portMAX_DELAY )
-			{
-				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
-				specified is the maximum block time then the task should block
-				indefinitely, and therefore never time out. */
-				xReturn = pdFALSE;
-			}
-			else
-		#endif
-
-		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
-		{
-			/* The tick count is greater than the time at which
-			vTaskSetTimeout() was called, but has also overflowed since
-			vTaskSetTimeOut() was called.  It must have wrapped all the way
-			around and gone past again. This passed since vTaskSetTimeout()
-			was called. */
-			xReturn = pdTRUE;
-		}
-		else if( ( ( TickType_t ) ( xConstTickCount - pxTimeOut->xTimeOnEntering ) ) < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
-		{
-			/* Not a genuine timeout. Adjust parameters for time remaining. */
-			*pxTicksToWait -= ( xConstTickCount - pxTimeOut->xTimeOnEntering );
-			vTaskSetTimeOutState( pxTimeOut );
-			xReturn = pdFALSE;
-		}
-		else
-		{
-			xReturn = pdTRUE;
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskMissedYield( void )
-{
-	xYieldPending = pdTRUE;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )
-	{
-	UBaseType_t uxReturn;
-	TCB_t *pxTCB;
-
-		if( xTask != NULL )
-		{
-			pxTCB = ( TCB_t * ) xTask;
-			uxReturn = pxTCB->uxTaskNumber;
-		}
-		else
-		{
-			uxReturn = 0U;
-		}
-
-		return uxReturn;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle )
-	{
-	TCB_t *pxTCB;
-
-		if( xTask != NULL )
-		{
-			pxTCB = ( TCB_t * ) xTask;
-			pxTCB->uxTaskNumber = uxHandle;
-		}
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-
-/*
- * -----------------------------------------------------------
- * The Idle task.
- * ----------------------------------------------------------
- *
- * The portTASK_FUNCTION() macro is used to allow port/compiler specific
- * language extensions.  The equivalent prototype for this function is:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
-static portTASK_FUNCTION( prvIdleTask, pvParameters )
-{
-	/* Stop warnings. */
-	( void ) pvParameters;
-
-	/** THIS IS THE RTOS IDLE TASK - WHICH IS CREATED AUTOMATICALLY WHEN THE
-	SCHEDULER IS STARTED. **/
-
-	for( ;; )
-	{
-		/* See if any tasks have deleted themselves - if so then the idle task
-		is responsible for freeing the deleted task's TCB and stack. */
-		prvCheckTasksWaitingTermination();
-
-		#if ( configUSE_PREEMPTION == 0 )
-		{
-			/* If we are not using preemption we keep forcing a task switch to
-			see if any other task has become available.  If we are using
-			preemption we don't need to do this as any task becoming available
-			will automatically get the processor anyway. */
-			taskYIELD();
-		}
-		#endif /* configUSE_PREEMPTION */
-
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
-		{
-			/* When using preemption tasks of equal priority will be
-			timesliced.  If a task that is sharing the idle priority is ready
-			to run then the idle task should yield before the end of the
-			timeslice.
-
-			A critical region is not required here as we are just reading from
-			the list, and an occasional incorrect value will not matter.  If
-			the ready list at the idle priority contains more than one task
-			then a task other than the idle task is ready to execute. */
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
-			{
-				taskYIELD();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) */
-
-		#if ( configUSE_IDLE_HOOK == 1 )
-		{
-			extern void vApplicationIdleHook( void );
-
-			/* Call the user defined function from within the idle task.  This
-			allows the application designer to add background functionality
-			without the overhead of a separate task.
-			NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
-			CALL A FUNCTION THAT MIGHT BLOCK. */
-			vApplicationIdleHook();
-		}
-		#endif /* configUSE_IDLE_HOOK */
-
-		/* This conditional compilation should use inequality to 0, not equality
-		to 1.  This is to ensure portSUPPRESS_TICKS_AND_SLEEP() is called when
-		user defined low power mode	implementations require
-		configUSE_TICKLESS_IDLE to be set to a value other than 1. */
-		#if ( configUSE_TICKLESS_IDLE != 0 )
-		{
-		TickType_t xExpectedIdleTime;
-
-			/* It is not desirable to suspend then resume the scheduler on
-			each iteration of the idle task.  Therefore, a preliminary
-			test of the expected idle time is performed without the
-			scheduler suspended.  The result here is not necessarily
-			valid. */
-			xExpectedIdleTime = prvGetExpectedIdleTime();
-
-			if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
-			{
-				vTaskSuspendAll();
-				{
-					/* Now the scheduler is suspended, the expected idle
-					time can be sampled again, and this time its value can
-					be used. */
-					configASSERT( xNextTaskUnblockTime >= xTickCount );
-					xExpectedIdleTime = prvGetExpectedIdleTime();
-
-					if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
-					{
-						traceLOW_POWER_IDLE_BEGIN();
-						portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime );
-						traceLOW_POWER_IDLE_END();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_TICKLESS_IDLE */
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TICKLESS_IDLE != 0 )
-
-	eSleepModeStatus eTaskConfirmSleepModeStatus( void )
-	{
-	/* The idle task exists in addition to the application tasks. */
-	const UBaseType_t uxNonApplicationTasks = 1;
-	eSleepModeStatus eReturn = eStandardSleep;
-
-		if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
-		{
-			/* A task was made ready while the scheduler was suspended. */
-			eReturn = eAbortSleep;
-		}
-		else if( xYieldPending != pdFALSE )
-		{
-			/* A yield was pended while the scheduler was suspended. */
-			eReturn = eAbortSleep;
-		}
-		else
-		{
-			/* If all the tasks are in the suspended list (which might mean they
-			have an infinite block time rather than actually being suspended)
-			then it is safe to turn all clocks off and just wait for external
-			interrupts. */
-			if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
-			{
-				eReturn = eNoTasksWaitingTimeout;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		return eReturn;
-	}
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-
-	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue )
-	{
-	TCB_t *pxTCB;
-
-		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
-		{
-			pxTCB = prvGetTCBFromHandle( xTaskToSet );
-			pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue;
-		}
-	}
-
-#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
-/*-----------------------------------------------------------*/
-
-#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-
-	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex )
-	{
-	void *pvReturn = NULL;
-	TCB_t *pxTCB;
-
-		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
-		{
-			pxTCB = prvGetTCBFromHandle( xTaskToQuery );
-			pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ];
-		}
-		else
-		{
-			pvReturn = NULL;
-		}
-
-		return pvReturn;
-	}
-
-#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
-/*-----------------------------------------------------------*/
-
-#if ( portUSING_MPU_WRAPPERS == 1 )
-
-	void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify, const MemoryRegion_t * const xRegions )
-	{
-	TCB_t *pxTCB;
-
-		/* If null is passed in here then we are modifying the MPU settings of
-		the calling task. */
-		pxTCB = prvGetTCBFromHandle( xTaskToModify );
-
-		vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
-	}
-
-#endif /* portUSING_MPU_WRAPPERS */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseTaskLists( void )
-{
-UBaseType_t uxPriority;
-
-	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
-	{
-		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
-	}
-
-	vListInitialise( &xDelayedTaskList1 );
-	vListInitialise( &xDelayedTaskList2 );
-	vListInitialise( &xPendingReadyList );
-
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		vListInitialise( &xTasksWaitingTermination );
-	}
-	#endif /* INCLUDE_vTaskDelete */
-
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		vListInitialise( &xSuspendedTaskList );
-	}
-	#endif /* INCLUDE_vTaskSuspend */
-
-	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
-	using list2. */
-	pxDelayedTaskList = &xDelayedTaskList1;
-	pxOverflowDelayedTaskList = &xDelayedTaskList2;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckTasksWaitingTermination( void )
-{
-
-	/** THIS FUNCTION IS CALLED FROM THE RTOS IDLE TASK **/
-
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		BaseType_t xListIsEmpty;
-
-		/* ucTasksDeleted is used to prevent vTaskSuspendAll() being called
-		too often in the idle task. */
-		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
-		{
-			vTaskSuspendAll();
-			{
-				xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination );
-			}
-			( void ) xTaskResumeAll();
-
-			if( xListIsEmpty == pdFALSE )
-			{
-				TCB_t *pxTCB;
-
-				taskENTER_CRITICAL();
-				{
-					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					--uxCurrentNumberOfTasks;
-					--uxDeletedTasksWaitingCleanUp;
-				}
-				taskEXIT_CRITICAL();
-
-				prvDeleteTCB( pxTCB );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-	#endif /* INCLUDE_vTaskDelete */
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TRACE_FACILITY == 1 )
-
-	void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState )
-	{
-	TCB_t *pxTCB;
-
-		/* xTask is NULL then get the state of the calling task. */
-		pxTCB = prvGetTCBFromHandle( xTask );
-
-		pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB;
-		pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName [ 0 ] );
-		pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority;
-		pxTaskStatus->pxStackBase = pxTCB->pxStack;
-		pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber;
-
-		#if ( INCLUDE_vTaskSuspend == 1 )
-		{
-			/* If the task is in the suspended list then there is a chance it is
-			actually just blocked indefinitely - so really it should be reported as
-			being in the Blocked state. */
-			if( pxTaskStatus->eCurrentState == eSuspended )
-			{
-				vTaskSuspendAll();
-				{
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						pxTaskStatus->eCurrentState = eBlocked;
-					}
-				}
-				xTaskResumeAll();
-			}
-		}
-		#endif /* INCLUDE_vTaskSuspend */
-
-		#if ( configUSE_MUTEXES == 1 )
-		{
-			pxTaskStatus->uxBasePriority = pxTCB->uxBasePriority;
-		}
-		#else
-		{
-			pxTaskStatus->uxBasePriority = 0;
-		}
-		#endif
-
-		#if ( configGENERATE_RUN_TIME_STATS == 1 )
-		{
-			pxTaskStatus->ulRunTimeCounter = pxTCB->ulRunTimeCounter;
-		}
-		#else
-		{
-			pxTaskStatus->ulRunTimeCounter = 0;
-		}
-		#endif
-
-		/* Obtaining the task state is a little fiddly, so is only done if the value
-		of eState passed into this function is eInvalid - otherwise the state is
-		just set to whatever is passed in. */
-		if( eState != eInvalid )
-		{
-			pxTaskStatus->eCurrentState = eState;
-		}
-		else
-		{
-			pxTaskStatus->eCurrentState = eTaskGetState( xTask );
-		}
-
-		/* Obtaining the stack space takes some time, so the xGetFreeStackSpace
-		parameter is provided to allow it to be skipped. */
-		if( xGetFreeStackSpace != pdFALSE )
-		{
-			#if ( portSTACK_GROWTH > 0 )
-			{
-				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxEndOfStack );
-			}
-			#else
-			{
-				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxStack );
-			}
-			#endif
-		}
-		else
-		{
-			pxTaskStatus->usStackHighWaterMark = 0;
-		}
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState )
-	{
-	volatile TCB_t *pxNextTCB, *pxFirstTCB;
-	UBaseType_t uxTask = 0;
-
-		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
-		{
-			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
-
-			/* Populate an TaskStatus_t structure within the
-			pxTaskStatusArray array for each task that is referenced from
-			pxList.  See the definition of TaskStatus_t in task.h for the
-			meaning of each TaskStatus_t structure member. */
-			do
-			{
-				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
-				vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
-				uxTask++;
-			} while( pxNextTCB != pxFirstTCB );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return uxTask;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-
-	static uint16_t prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )
-	{
-	uint32_t ulCount = 0U;
-
-		while( *pucStackByte == ( uint8_t ) tskSTACK_FILL_BYTE )
-		{
-			pucStackByte -= portSTACK_GROWTH;
-			ulCount++;
-		}
-
-		ulCount /= ( uint32_t ) sizeof( StackType_t ); /*lint !e961 Casting is not redundant on smaller architectures. */
-
-		return ( uint16_t ) ulCount;
-	}
-
-#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
-
-	UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	uint8_t *pucEndOfStack;
-	UBaseType_t uxReturn;
-
-		pxTCB = prvGetTCBFromHandle( xTask );
-
-		#if portSTACK_GROWTH < 0
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
-		}
-		#else
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
-		}
-		#endif
-
-		uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );
-
-		return uxReturn;
-	}
-
-#endif /* INCLUDE_uxTaskGetStackHighWaterMark */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
-	static void prvDeleteTCB( TCB_t *pxTCB )
-	{
-		/* This call is required specifically for the TriCore port.  It must be
-		above the vPortFree() calls.  The call is also used by ports/demos that
-		want to allocate and clean RAM statically. */
-		portCLEAN_UP_TCB( pxTCB );
-
-		/* Free up the memory allocated by the scheduler for the task.  It is up
-		to the task to free any memory allocated at the application level. */
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-
-		#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
-		{
-			/* The task can only have been allocated dynamically - free both
-			the stack and TCB. */
-			vPortFree( pxTCB->pxStack );
-			vPortFree( pxTCB );
-		}
-		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE == 1 )
-		{
-			/* The task could have been allocated statically or dynamically, so
-			check what was statically allocated before trying to free the
-			memory. */
-			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
-			{
-				/* Both the stack and TCB were allocated dynamically, so both
-				must be freed. */
-				vPortFree( pxTCB->pxStack );
-				vPortFree( pxTCB );
-			}
-			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
-			{
-				/* Only the stack was statically allocated, so the TCB is the
-				only memory that must be freed. */
-				vPortFree( pxTCB );
-			}
-			else
-			{
-				/* Neither the stack nor the TCB were allocated dynamically, so
-				nothing needs to be freed. */
-				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	)
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-	}
-
-#endif /* INCLUDE_vTaskDelete */
-/*-----------------------------------------------------------*/
-
-static void prvResetNextTaskUnblockTime( void )
-{
-TCB_t *pxTCB;
-
-	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
-	{
-		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
-		the maximum possible value so it is	extremely unlikely that the
-		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
-		there is an item in the delayed list. */
-		xNextTaskUnblockTime = portMAX_DELAY;
-	}
-	else
-	{
-		/* The new current delayed list is not empty, get the value of
-		the item at the head of the delayed list.  This is the time at
-		which the task at the head of the delayed list should be removed
-		from the Blocked state. */
-		( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
-		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
-
-	TaskHandle_t xTaskGetCurrentTaskHandle( void )
-	{
-	TaskHandle_t xReturn;
-
-		/* A critical section is not required as this is not called from
-		an interrupt and the current TCB will always be the same for any
-		individual execution thread. */
-		xReturn = pxCurrentTCB;
-
-		return xReturn;
-	}
-
-#endif /* ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-
-	BaseType_t xTaskGetSchedulerState( void )
-	{
-	BaseType_t xReturn;
-
-		if( xSchedulerRunning == pdFALSE )
-		{
-			xReturn = taskSCHEDULER_NOT_STARTED;
-		}
-		else
-		{
-			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-			{
-				xReturn = taskSCHEDULER_RUNNING;
-			}
-			else
-			{
-				xReturn = taskSCHEDULER_SUSPENDED;
-			}
-		}
-
-		return xReturn;
-	}
-
-#endif /* ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
-	void vTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
-	{
-	TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;
-
-		/* If the mutex was given back by an interrupt while the queue was
-		locked then the mutex holder might now be NULL. */
-		if( pxMutexHolder != NULL )
-		{
-			/* If the holder of the mutex has a priority below the priority of
-			the task attempting to obtain the mutex then it will temporarily
-			inherit the priority of the task attempting to obtain the mutex. */
-			if( pxTCB->uxPriority < pxCurrentTCB->uxPriority )
-			{
-				/* Adjust the mutex holder state to account for its new
-				priority.  Only reset the event list item value if the value is
-				not	being used for anything else. */
-				if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-				{
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				/* If the task being modified is in the ready state it will need
-				to be moved into a new list. */
-				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
-				{
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Inherit the priority before being moved into the new list. */
-					pxTCB->uxPriority = pxCurrentTCB->uxPriority;
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* Just inherit the priority. */
-					pxTCB->uxPriority = pxCurrentTCB->uxPriority;
-				}
-
-				traceTASK_PRIORITY_INHERIT( pxTCB, pxCurrentTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
-	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
-	{
-	TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;
-	BaseType_t xReturn = pdFALSE;
-
-		if( pxMutexHolder != NULL )
-		{
-			/* A task can only have an inherited priority if it holds the mutex.
-			If the mutex is held by a task then it cannot be given from an
-			interrupt, and if a mutex is given by the holding task then it must
-			be the running state task. */
-			configASSERT( pxTCB == pxCurrentTCB );
-
-			configASSERT( pxTCB->uxMutexesHeld );
-			( pxTCB->uxMutexesHeld )--;
-
-			/* Has the holder of the mutex inherited the priority of another
-			task? */
-			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
-			{
-				/* Only disinherit if no other mutexes are held. */
-				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
-				{
-					/* A task can only have an inherited priority if it holds
-					the mutex.  If the mutex is held by a task then it cannot be
-					given from an interrupt, and if a mutex is given by the
-					holding	task then it must be the running state task.  Remove
-					the	holding task from the ready	list. */
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Disinherit the priority before adding the task into the
-					new	ready list. */
-					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
-					pxTCB->uxPriority = pxTCB->uxBasePriority;
-
-					/* Reset the event list item value.  It cannot be in use for
-					any other purpose if this task is running, and it must be
-					running to give back the mutex. */
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					prvAddTaskToReadyList( pxTCB );
-
-					/* Return true to indicate that a context switch is required.
-					This is only actually required in the corner case whereby
-					multiple mutexes were held and the mutexes were given back
-					in an order different to that in which they were taken.
-					If a context switch did not occur when the first mutex was
-					returned, even if a task was waiting on it, then a context
-					switch should occur when the last mutex is returned whether
-					a task is waiting on it or not. */
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-
-	void vTaskEnterCritical( void )
-	{
-		portDISABLE_INTERRUPTS();
-
-		if( xSchedulerRunning != pdFALSE )
-		{
-			( pxCurrentTCB->uxCriticalNesting )++;
-
-			/* This is not the interrupt safe version of the enter critical
-			function so	assert() if it is being called from an interrupt
-			context.  Only API functions that end in "FromISR" can be used in an
-			interrupt.  Only assert if the critical nesting count is 1 to
-			protect against recursive calls if the assert function also uses a
-			critical section. */
-			if( pxCurrentTCB->uxCriticalNesting == 1 )
-			{
-				portASSERT_IF_IN_ISR();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* portCRITICAL_NESTING_IN_TCB */
-/*-----------------------------------------------------------*/
-
-#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-
-	void vTaskExitCritical( void )
-	{
-		if( xSchedulerRunning != pdFALSE )
-		{
-			if( pxCurrentTCB->uxCriticalNesting > 0U )
-			{
-				( pxCurrentTCB->uxCriticalNesting )--;
-
-				if( pxCurrentTCB->uxCriticalNesting == 0U )
-				{
-					portENABLE_INTERRUPTS();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* portCRITICAL_NESTING_IN_TCB */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName )
-	{
-	size_t x;
-
-		/* Start by copying the entire string. */
-		strcpy( pcBuffer, pcTaskName );
-
-		/* Pad the end of the string with spaces to ensure columns line up when
-		printed out. */
-		for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
-		{
-			pcBuffer[ x ] = ' ';
-		}
-
-		/* Terminate. */
-		pcBuffer[ x ] = 0x00;
-
-		/* Return the new end of string. */
-		return &( pcBuffer[ x ] );
-	}
-
-#endif /* ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	void vTaskList( char * pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	char cStatus;
-
-		/*
-		 * PLEASE NOTE:
-		 *
-		 * This function is provided for convenience only, and is used by many
-		 * of the demo applications.  Do not consider it to be part of the
-		 * scheduler.
-		 *
-		 * vTaskList() calls uxTaskGetSystemState(), then formats part of the
-		 * uxTaskGetSystemState() output into a human readable table that
-		 * displays task names, states and stack usage.
-		 *
-		 * vTaskList() has a dependency on the sprintf() C library function that
-		 * might bloat the code size, use a lot of stack, and provide different
-		 * results on different platforms.  An alternative, tiny, third party,
-		 * and limited functionality implementation of sprintf() is provided in
-		 * many of the FreeRTOS/Demo sub-directories in a file called
-		 * printf-stdarg.c (note printf-stdarg.c does not provide a full
-		 * snprintf() implementation!).
-		 *
-		 * It is recommended that production systems call uxTaskGetSystemState()
-		 * directly to get access to raw stats data, rather than indirectly
-		 * through a call to vTaskList().
-		 */
-
-
-		/* Make sure the write buffer does not contain a string. */
-		*pcWriteBuffer = 0x00;
-
-		/* Take a snapshot of the number of tasks in case it changes while this
-		function is executing. */
-		uxArraySize = uxCurrentNumberOfTasks;
-
-		/* Allocate an array index for each task.  NOTE!  if
-		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
-		equate to NULL. */
-		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			/* Generate the (binary) data. */
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, NULL );
-
-			/* Create a human readable table from the binary data. */
-			for( x = 0; x < uxArraySize; x++ )
-			{
-				switch( pxTaskStatusArray[ x ].eCurrentState )
-				{
-					case eReady:		cStatus = tskREADY_CHAR;
-										break;
-
-					case eBlocked:		cStatus = tskBLOCKED_CHAR;
-										break;
-
-					case eSuspended:	cStatus = tskSUSPENDED_CHAR;
-										break;
-
-					case eDeleted:		cStatus = tskDELETED_CHAR;
-										break;
-
-					default:			/* Should not get here, but it is included
-										to prevent static checking errors. */
-										cStatus = 0x00;
-										break;
-				}
-
-				/* Write the task name to the string, padding with spaces so it
-				can be printed in tabular form more easily. */
-				pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
-
-				/* Write the rest of the string. */
-				sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber );
-				pcWriteBuffer += strlen( pcWriteBuffer );
-			}
-
-			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
-			is 0 then vPortFree() will be #defined to nothing. */
-			vPortFree( pxTaskStatusArray );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */
-/*----------------------------------------------------------*/
-
-#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	void vTaskGetRunTimeStats( char *pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	uint32_t ulTotalTime, ulStatsAsPercentage;
-
-		#if( configUSE_TRACE_FACILITY != 1 )
-		{
-			#error configUSE_TRACE_FACILITY must also be set to 1 in FreeRTOSConfig.h to use vTaskGetRunTimeStats().
-		}
-		#endif
-
-		/*
-		 * PLEASE NOTE:
-		 *
-		 * This function is provided for convenience only, and is used by many
-		 * of the demo applications.  Do not consider it to be part of the
-		 * scheduler.
-		 *
-		 * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part
-		 * of the uxTaskGetSystemState() output into a human readable table that
-		 * displays the amount of time each task has spent in the Running state
-		 * in both absolute and percentage terms.
-		 *
-		 * vTaskGetRunTimeStats() has a dependency on the sprintf() C library
-		 * function that might bloat the code size, use a lot of stack, and
-		 * provide different results on different platforms.  An alternative,
-		 * tiny, third party, and limited functionality implementation of
-		 * sprintf() is provided in many of the FreeRTOS/Demo sub-directories in
-		 * a file called printf-stdarg.c (note printf-stdarg.c does not provide
-		 * a full snprintf() implementation!).
-		 *
-		 * It is recommended that production systems call uxTaskGetSystemState()
-		 * directly to get access to raw stats data, rather than indirectly
-		 * through a call to vTaskGetRunTimeStats().
-		 */
-
-		/* Make sure the write buffer does not contain a string. */
-		*pcWriteBuffer = 0x00;
-
-		/* Take a snapshot of the number of tasks in case it changes while this
-		function is executing. */
-		uxArraySize = uxCurrentNumberOfTasks;
-
-		/* Allocate an array index for each task.  NOTE!  If
-		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
-		equate to NULL. */
-		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			/* Generate the (binary) data. */
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime );
-
-			/* For percentage calculations. */
-			ulTotalTime /= 100UL;
-
-			/* Avoid divide by zero errors. */
-			if( ulTotalTime > 0 )
-			{
-				/* Create a human readable table from the binary data. */
-				for( x = 0; x < uxArraySize; x++ )
-				{
-					/* What percentage of the total run time has the task used?
-					This will always be rounded down to the nearest integer.
-					ulTotalRunTimeDiv100 has already been divided by 100. */
-					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalTime;
-
-					/* Write the task name to the string, padding with
-					spaces so it can be printed in tabular form more
-					easily. */
-					pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
-
-					if( ulStatsAsPercentage > 0UL )
-					{
-						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
-						{
-							sprintf( pcWriteBuffer, "\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
-						}
-						#else
-						{
-							/* sizeof( int ) == sizeof( long ) so a smaller
-							printf() library can be used. */
-							sprintf( pcWriteBuffer, "\t%u\t\t%u%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage );
-						}
-						#endif
-					}
-					else
-					{
-						/* If the percentage is zero here then the task has
-						consumed less than 1% of the total run time. */
-						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
-						{
-							sprintf( pcWriteBuffer, "\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter );
-						}
-						#else
-						{
-							/* sizeof( int ) == sizeof( long ) so a smaller
-							printf() library can be used. */
-							sprintf( pcWriteBuffer, "\t%u\t\t<1%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter );
-						}
-						#endif
-					}
-
-					pcWriteBuffer += strlen( pcWriteBuffer );
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
-			is 0 then vPortFree() will be #defined to nothing. */
-			vPortFree( pxTaskStatusArray );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */
-/*-----------------------------------------------------------*/
-
-TickType_t uxTaskResetEventItemValue( void )
-{
-TickType_t uxReturn;
-
-	uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );
-
-	/* Reset the event list item to its normal value - so it can be used with
-	queues and semaphores. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-	return uxReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
-	void *pvTaskIncrementMutexHeldCount( void )
-	{
-		/* If xSemaphoreCreateMutex() is called before any tasks have been created
-		then pxCurrentTCB will be NULL. */
-		if( pxCurrentTCB != NULL )
-		{
-			( pxCurrentTCB->uxMutexesHeld )++;
-		}
-
-		return pxCurrentTCB;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait )
-	{
-	uint32_t ulReturn;
-
-		taskENTER_CRITICAL();
-		{
-			/* Only block if the notification count is not already non-zero. */
-			if( pxCurrentTCB->ulNotifiedValue == 0UL )
-			{
-				/* Mark this task as waiting for a notification. */
-				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
-
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-					traceTASK_NOTIFY_TAKE_BLOCK();
-
-					/* All ports are written to allow a yield in a critical
-					section (some will yield immediately, others wait until the
-					critical section exits) - but it is not something that
-					application code should ever do. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		taskENTER_CRITICAL();
-		{
-			traceTASK_NOTIFY_TAKE();
-			ulReturn = pxCurrentTCB->ulNotifiedValue;
-
-			if( ulReturn != 0UL )
-			{
-				if( xClearCountOnExit != pdFALSE )
-				{
-					pxCurrentTCB->ulNotifiedValue = 0UL;
-				}
-				else
-				{
-					pxCurrentTCB->ulNotifiedValue = ulReturn - 1;
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-		}
-		taskEXIT_CRITICAL();
-
-		return ulReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-
-		taskENTER_CRITICAL();
-		{
-			/* Only block if a notification is not already pending. */
-			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
-			{
-				/* Clear bits in the task's notification value as bits may get
-				set	by the notifying task or interrupt.  This can be used to
-				clear the value to zero. */
-				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
-
-				/* Mark this task as waiting for a notification. */
-				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
-
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-					traceTASK_NOTIFY_WAIT_BLOCK();
-
-					/* All ports are written to allow a yield in a critical
-					section (some will yield immediately, others wait until the
-					critical section exits) - but it is not something that
-					application code should ever do. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		taskENTER_CRITICAL();
-		{
-			traceTASK_NOTIFY_WAIT();
-
-			if( pulNotificationValue != NULL )
-			{
-				/* Output the current notification value, which may or may not
-				have changed. */
-				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
-			}
-
-			/* If ucNotifyValue is set then either the task never entered the
-			blocked state (because a notification was already pending) or the
-			task unblocked because of a notification.  Otherwise the task
-			unblocked because of a timeout. */
-			if( pxCurrentTCB->ucNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* A notification was not received. */
-				xReturn = pdFALSE;
-			}
-			else
-			{
-				/* A notification was already pending or a notification was
-				received while the task was waiting. */
-				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
-				xReturn = pdTRUE;
-			}
-
-			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
-	{
-	TCB_t * pxTCB;
-	BaseType_t xReturn = pdPASS;
-	uint8_t ucOriginalNotifyState;
-
-		configASSERT( xTaskToNotify );
-		pxTCB = ( TCB_t * ) xTaskToNotify;
-
-		taskENTER_CRITICAL();
-		{
-			if( pulPreviousNotificationValue != NULL )
-			{
-				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
-			}
-
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
-
-			switch( eAction )
-			{
-				case eSetBits	:
-					pxTCB->ulNotifiedValue |= ulValue;
-					break;
-
-				case eIncrement	:
-					( pxTCB->ulNotifiedValue )++;
-					break;
-
-				case eSetValueWithOverwrite	:
-					pxTCB->ulNotifiedValue = ulValue;
-					break;
-
-				case eSetValueWithoutOverwrite :
-					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
-					{
-						pxTCB->ulNotifiedValue = ulValue;
-					}
-					else
-					{
-						/* The value could not be written to the task. */
-						xReturn = pdFAIL;
-					}
-					break;
-
-				case eNoAction:
-					/* The task is being notified without its notify value being
-					updated. */
-					break;
-			}
-
-			traceTASK_NOTIFY();
-
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-				prvAddTaskToReadyList( pxTCB );
-
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
-
-				#if( configUSE_TICKLESS_IDLE != 0 )
-				{
-					/* If a task is blocked waiting for a notification then
-					xNextTaskUnblockTime might be set to the blocked task's time
-					out time.  If the task is unblocked for a reason other than
-					a timeout xNextTaskUnblockTime is normally left unchanged,
-					because it will automatically get reset to a new value when
-					the tick count equals xNextTaskUnblockTime.  However if
-					tickless idling is used it might be more important to enter
-					sleep mode at the earliest possible time - so reset
-					xNextTaskUnblockTime here to ensure it is updated at the
-					earliest possible time. */
-					prvResetNextTaskUnblockTime();
-				}
-				#endif
-
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	TCB_t * pxTCB;
-	uint8_t ucOriginalNotifyState;
-	BaseType_t xReturn = pdPASS;
-	UBaseType_t uxSavedInterruptStatus;
-
-		configASSERT( xTaskToNotify );
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		pxTCB = ( TCB_t * ) xTaskToNotify;
-
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			if( pulPreviousNotificationValue != NULL )
-			{
-				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
-			}
-
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
-
-			switch( eAction )
-			{
-				case eSetBits	:
-					pxTCB->ulNotifiedValue |= ulValue;
-					break;
-
-				case eIncrement	:
-					( pxTCB->ulNotifiedValue )++;
-					break;
-
-				case eSetValueWithOverwrite	:
-					pxTCB->ulNotifiedValue = ulValue;
-					break;
-
-				case eSetValueWithoutOverwrite :
-					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
-					{
-						pxTCB->ulNotifiedValue = ulValue;
-					}
-					else
-					{
-						/* The value could not be written to the task. */
-						xReturn = pdFAIL;
-					}
-					break;
-
-				case eNoAction :
-					/* The task is being notified without its notify value being
-					updated. */
-					break;
-			}
-
-			traceTASK_NOTIFY_FROM_ISR();
-
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
-
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed and ready lists cannot be accessed, so hold
-					this task pending until the scheduler is resumed. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					if( pxHigherPriorityTaskWoken != NULL )
-					{
-						*pxHigherPriorityTaskWoken = pdTRUE;
-					}
-					else
-					{
-						/* Mark that a yield is pending in case the user is not
-						using the "xHigherPriorityTaskWoken" parameter to an ISR
-						safe FreeRTOS function. */
-						xYieldPending = pdTRUE;
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	TCB_t * pxTCB;
-	uint8_t ucOriginalNotifyState;
-	UBaseType_t uxSavedInterruptStatus;
-
-		configASSERT( xTaskToNotify );
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		pxTCB = ( TCB_t * ) xTaskToNotify;
-
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
-
-			/* 'Giving' is equivalent to incrementing a count in a counting
-			semaphore. */
-			( pxTCB->ulNotifiedValue )++;
-
-			traceTASK_NOTIFY_GIVE_FROM_ISR();
-
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
-
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed and ready lists cannot be accessed, so hold
-					this task pending until the scheduler is resumed. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					if( pxHigherPriorityTaskWoken != NULL )
-					{
-						*pxHigherPriorityTaskWoken = pdTRUE;
-					}
-					else
-					{
-						/* Mark that a yield is pending in case the user is not
-						using the "xHigherPriorityTaskWoken" parameter in an ISR
-						safe FreeRTOS function. */
-						xYieldPending = pdTRUE;
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	BaseType_t xReturn;
-
-		/* If null is passed in here then it is the calling task that is having
-		its notification state cleared. */
-		pxTCB = prvGetTCBFromHandle( xTask );
-
-		taskENTER_CRITICAL();
-		{
-			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
-			{
-				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-				xReturn = pdPASS;
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
-{
-TickType_t xTimeToWake;
-const TickType_t xConstTickCount = xTickCount;
-
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-	{
-		/* About to enter a delayed list, so ensure the ucDelayAborted flag is
-		reset to pdFALSE so it can be detected as having been set to pdTRUE
-		when the task leaves the Blocked state. */
-		pxCurrentTCB->ucDelayAborted = pdFALSE;
-	}
-	#endif
-
-	/* Remove the task from the ready list before adding it to the blocked list
-	as the same list item is used for both lists. */
-	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-	{
-		/* The current task must be in a ready list, so there is no need to
-		check, and the port reset macro can be called directly. */
-		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
-		{
-			/* Add the task to the suspended task list instead of a delayed task
-			list to ensure it is not woken by a timing event.  It will block
-			indefinitely. */
-			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
-		}
-		else
-		{
-			/* Calculate the time at which the task should be woken if the event
-			does not occur.  This may overflow but this doesn't matter, the
-			kernel will manage it correctly. */
-			xTimeToWake = xConstTickCount + xTicksToWait;
-
-			/* The list item will be inserted in wake time order. */
-			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
-
-			if( xTimeToWake < xConstTickCount )
-			{
-				/* Wake time has overflowed.  Place this item in the overflow
-				list. */
-				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-			}
-			else
-			{
-				/* The wake time has not overflowed, so the current block list
-				is used. */
-				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-
-				/* If the task entering the blocked state was placed at the
-				head of the list of blocked tasks then xNextTaskUnblockTime
-				needs to be updated too. */
-				if( xTimeToWake < xNextTaskUnblockTime )
-				{
-					xNextTaskUnblockTime = xTimeToWake;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-	}
-	#else /* INCLUDE_vTaskSuspend */
-	{
-		/* Calculate the time at which the task should be woken if the event
-		does not occur.  This may overflow but this doesn't matter, the kernel
-		will manage it correctly. */
-		xTimeToWake = xConstTickCount + xTicksToWait;
-
-		/* The list item will be inserted in wake time order. */
-		listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
-
-		if( xTimeToWake < xConstTickCount )
-		{
-			/* Wake time has overflowed.  Place this item in the overflow list. */
-			vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-		}
-		else
-		{
-			/* The wake time has not overflowed, so the current block list is used. */
-			vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-
-			/* If the task entering the blocked state was placed at the head of the
-			list of blocked tasks then xNextTaskUnblockTime needs to be updated
-			too. */
-			if( xTimeToWake < xNextTaskUnblockTime )
-			{
-				xNextTaskUnblockTime = xTimeToWake;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
-		( void ) xCanBlockIndefinitely;
-	}
-	#endif /* INCLUDE_vTaskSuspend */
-}
-
-
-#ifdef FREERTOS_MODULE_TEST
-	#include "tasks_test_access_functions.h"
-#endif
-
diff --git a/ports/cc3200/FreeRTOS/Source/timers.c b/ports/cc3200/FreeRTOS/Source/timers.c
deleted file mode 100644
index d4a821a263..0000000000
--- a/ports/cc3200/FreeRTOS/Source/timers.c
+++ /dev/null
@@ -1,1092 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/* Standard includes. */
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "FreeRTOS.h"
-#include "task.h"
-#include "queue.h"
-#include "timers.h"
-
-#if ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 0 )
-	#error configUSE_TIMERS must be set to 1 to make the xTimerPendFunctionCall() function available.
-#endif
-
-/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
-MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
-header files above, but not in this file, in order to generate the correct
-privileged Vs unprivileged linkage and placement. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
-
-
-/* This entire source file will be skipped if the application is not configured
-to include software timer functionality.  This #if is closed at the very bottom
-of this file.  If you want to include software timer functionality then ensure
-configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
-#if ( configUSE_TIMERS == 1 )
-
-/* Misc definitions. */
-#define tmrNO_DELAY		( TickType_t ) 0U
-
-/* The definition of the timers themselves. */
-typedef struct tmrTimerControl
-{
-	const char				*pcTimerName;		/*<< Text name.  This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	ListItem_t				xTimerListItem;		/*<< Standard linked list item as used by all kernel features for event management. */
-	TickType_t				xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */
-	UBaseType_t				uxAutoReload;		/*<< Set to pdTRUE if the timer should be automatically restarted once expired.  Set to pdFALSE if the timer is, in effect, a one-shot timer. */
-	void 					*pvTimerID;			/*<< An ID to identify the timer.  This allows the timer to be identified when the same callback is used for multiple timers. */
-	TimerCallbackFunction_t	pxCallbackFunction;	/*<< The function that will be called when the timer expires. */
-	#if( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t			uxTimerNumber;		/*<< An ID assigned by trace tools such as FreeRTOS+Trace */
-	#endif
-
-	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-		uint8_t 			ucStaticallyAllocated; /*<< Set to pdTRUE if the timer was created statically so no attempt is made to free the memory again if the timer is later deleted. */
-	#endif
-} xTIMER;
-
-/* The old xTIMER name is maintained above then typedefed to the new Timer_t
-name below to enable the use of older kernel aware debuggers. */
-typedef xTIMER Timer_t;
-
-/* The definition of messages that can be sent and received on the timer queue.
-Two types of message can be queued - messages that manipulate a software timer,
-and messages that request the execution of a non-timer related callback.  The
-two message types are defined in two separate structures, xTimerParametersType
-and xCallbackParametersType respectively. */
-typedef struct tmrTimerParameters
-{
-	TickType_t			xMessageValue;		/*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
-	Timer_t *			pxTimer;			/*<< The timer to which the command will be applied. */
-} TimerParameter_t;
-
-
-typedef struct tmrCallbackParameters
-{
-	PendedFunction_t	pxCallbackFunction;	/* << The callback function to execute. */
-	void *pvParameter1;						/* << The value that will be used as the callback functions first parameter. */
-	uint32_t ulParameter2;					/* << The value that will be used as the callback functions second parameter. */
-} CallbackParameters_t;
-
-/* The structure that contains the two message types, along with an identifier
-that is used to determine which message type is valid. */
-typedef struct tmrTimerQueueMessage
-{
-	BaseType_t			xMessageID;			/*<< The command being sent to the timer service task. */
-	union
-	{
-		TimerParameter_t xTimerParameters;
-
-		/* Don't include xCallbackParameters if it is not going to be used as
-		it makes the structure (and therefore the timer queue) larger. */
-		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
-			CallbackParameters_t xCallbackParameters;
-		#endif /* INCLUDE_xTimerPendFunctionCall */
-	} u;
-} DaemonTaskMessage_t;
-
-/*lint -e956 A manual analysis and inspection has been used to determine which
-static variables must be declared volatile. */
-
-/* The list in which active timers are stored.  Timers are referenced in expire
-time order, with the nearest expiry time at the front of the list.  Only the
-timer service task is allowed to access these lists. */
-PRIVILEGED_DATA static List_t xActiveTimerList1;
-PRIVILEGED_DATA static List_t xActiveTimerList2;
-PRIVILEGED_DATA static List_t *pxCurrentTimerList;
-PRIVILEGED_DATA static List_t *pxOverflowTimerList;
-
-/* A queue that is used to send commands to the timer service task. */
-PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;
-PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;
-
-/*lint +e956 */
-
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	/* If static allocation is supported then the application must provide the
-	following callback function - which enables the application to optionally
-	provide the memory that will be used by the timer task as the task's stack
-	and TCB. */
-	extern void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize );
-
-#endif
-
-/*
- * Initialise the infrastructure used by the timer service task if it has not
- * been initialised already.
- */
-static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The timer service task (daemon).  Timer functionality is controlled by this
- * task.  Other tasks communicate with the timer service task using the
- * xTimerQueue queue.
- */
-static void prvTimerTask( void *pvParameters ) PRIVILEGED_FUNCTION;
-
-/*
- * Called by the timer service task to interpret and process a command it
- * received on the timer queue.
- */
-static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
- * depending on if the expire time causes a timer counter overflow.
- */
-static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;
-
-/*
- * An active timer has reached its expire time.  Reload the timer if it is an
- * auto reload timer, then call its callback.
- */
-static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
-
-/*
- * The tick count has overflowed.  Switch the timer lists after ensuring the
- * current timer list does not still reference some timers.
- */
-static void prvSwitchTimerLists( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE
- * if a tick count overflow occurred since prvSampleTimeNow() was last called.
- */
-static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
-
-/*
- * If the timer list contains any active timers then return the expire time of
- * the timer that will expire first and set *pxListWasEmpty to false.  If the
- * timer list does not contain any timers then return 0 and set *pxListWasEmpty
- * to pdTRUE.
- */
-static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;
-
-/*
- * If a timer has expired, process it.  Otherwise, block the timer service task
- * until either a timer does expire or a command is received.
- */
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
-
-/*
- * Called after a Timer_t structure has been allocated either statically or
- * dynamically to fill in the structure's members.
- */
-static void prvInitialiseNewTimer(	const char * const pcTimerName,
-									const TickType_t xTimerPeriodInTicks,
-									const UBaseType_t uxAutoReload,
-									void * const pvTimerID,
-									TimerCallbackFunction_t pxCallbackFunction,
-									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-/*-----------------------------------------------------------*/
-
-BaseType_t xTimerCreateTimerTask( void )
-{
-BaseType_t xReturn = pdFAIL;
-
-	/* This function is called when the scheduler is started if
-	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
-	timer service task has been created/initialised.  If timers have already
-	been created then the initialisation will already have been performed. */
-	prvCheckForValidListAndQueue();
-
-	if( xTimerQueue != NULL )
-	{
-		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-		{
-			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
-			StackType_t *pxTimerTaskStackBuffer = NULL;
-			uint32_t ulTimerTaskStackSize;
-
-			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
-			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
-													"Tmr Svc",
-													ulTimerTaskStackSize,
-													NULL,
-													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
-													pxTimerTaskStackBuffer,
-													pxTimerTaskTCBBuffer );
-
-			if( xTimerTaskHandle != NULL )
-			{
-				xReturn = pdPASS;
-			}
-		}
-		#else
-		{
-			xReturn = xTaskCreate(	prvTimerTask,
-									"Tmr Svc",
-									configTIMER_TASK_STACK_DEPTH,
-									NULL,
-									( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
-									&xTimerTaskHandle );
-		}
-		#endif /* configSUPPORT_STATIC_ALLOCATION */
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	configASSERT( xReturn );
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-
-	TimerHandle_t xTimerCreate(	const char * const pcTimerName,
-								const TickType_t xTimerPeriodInTicks,
-								const UBaseType_t uxAutoReload,
-								void * const pvTimerID,
-								TimerCallbackFunction_t pxCallbackFunction ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	Timer_t *pxNewTimer;
-
-		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) );
-
-		if( pxNewTimer != NULL )
-		{
-			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
-
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* Timers can be created statically or dynamically, so note this
-				timer was created dynamically in case the timer is later
-				deleted. */
-				pxNewTimer->ucStaticallyAllocated = pdFALSE;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
-		}
-
-		return pxNewTimer;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,
-										const TickType_t xTimerPeriodInTicks,
-										const UBaseType_t uxAutoReload,
-										void * const pvTimerID,
-										TimerCallbackFunction_t pxCallbackFunction,
-										StaticTimer_t *pxTimerBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	Timer_t *pxNewTimer;
-
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticTimer_t equals the size of the real timer
-			structures. */
-			volatile size_t xSize = sizeof( StaticTimer_t );
-			configASSERT( xSize == sizeof( Timer_t ) );
-		}
-		#endif /* configASSERT_DEFINED */
-
-		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
-		configASSERT( pxTimerBuffer );
-		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-
-		if( pxNewTimer != NULL )
-		{
-			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
-
-			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-			{
-				/* Timers can be created statically or dynamically so note this
-				timer was created statically in case it is later deleted. */
-				pxNewTimer->ucStaticallyAllocated = pdTRUE;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-		}
-
-		return pxNewTimer;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseNewTimer(	const char * const pcTimerName,
-									const TickType_t xTimerPeriodInTicks,
-									const UBaseType_t uxAutoReload,
-									void * const pvTimerID,
-									TimerCallbackFunction_t pxCallbackFunction,
-									Timer_t *pxNewTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-	/* 0 is not a valid value for xTimerPeriodInTicks. */
-	configASSERT( ( xTimerPeriodInTicks > 0 ) );
-
-	if( pxNewTimer != NULL )
-	{
-		/* Ensure the infrastructure used by the timer service task has been
-		created/initialised. */
-		prvCheckForValidListAndQueue();
-
-		/* Initialise the timer structure members using the function
-		parameters. */
-		pxNewTimer->pcTimerName = pcTimerName;
-		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
-		pxNewTimer->uxAutoReload = uxAutoReload;
-		pxNewTimer->pvTimerID = pvTimerID;
-		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
-		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
-		traceTIMER_CREATE( pxNewTimer );
-	}
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
-{
-BaseType_t xReturn = pdFAIL;
-DaemonTaskMessage_t xMessage;
-
-	configASSERT( xTimer );
-
-	/* Send a message to the timer service task to perform a particular action
-	on a particular timer definition. */
-	if( xTimerQueue != NULL )
-	{
-		/* Send a command to the timer service task to start the xTimer timer. */
-		xMessage.xMessageID = xCommandID;
-		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
-		xMessage.u.xTimerParameters.pxTimer = ( Timer_t * ) xTimer;
-
-		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
-		{
-			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
-			{
-				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
-			}
-			else
-			{
-				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
-			}
-		}
-		else
-		{
-			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
-		}
-
-		traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )
-{
-	/* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
-	started, then xTimerTaskHandle will be NULL. */
-	configASSERT( ( xTimerTaskHandle != NULL ) );
-	return xTimerTaskHandle;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTimerGetPeriod( TimerHandle_t xTimer )
-{
-Timer_t *pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-	return pxTimer->xTimerPeriodInTicks;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer )
-{
-Timer_t * pxTimer = ( Timer_t * ) xTimer;
-TickType_t xReturn;
-
-	configASSERT( xTimer );
-	xReturn = listGET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ) );
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-const char * pcTimerGetName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-Timer_t *pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-	return pxTimer->pcTimerName;
-}
-/*-----------------------------------------------------------*/
-
-static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
-{
-BaseType_t xResult;
-Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
-
-	/* Remove the timer from the list of active timers.  A check has already
-	been performed to ensure the list is not empty. */
-	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-	traceTIMER_EXPIRED( pxTimer );
-
-	/* If the timer is an auto reload timer then calculate the next
-	expiry time and re-insert the timer in the list of active timers. */
-	if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
-	{
-		/* The timer is inserted into a list using a time relative to anything
-		other than the current time.  It will therefore be inserted into the
-		correct list relative to the time this task thinks it is now. */
-		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
-		{
-			/* The timer expired before it was added to the active timer
-			list.  Reload it now.  */
-			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
-			configASSERT( xResult );
-			( void ) xResult;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	/* Call the timer callback. */
-	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-}
-/*-----------------------------------------------------------*/
-
-static void prvTimerTask( void *pvParameters )
-{
-TickType_t xNextExpireTime;
-BaseType_t xListWasEmpty;
-
-	/* Just to avoid compiler warnings. */
-	( void ) pvParameters;
-
-	#if( configUSE_DAEMON_TASK_STARTUP_HOOK == 1 )
-	{
-		extern void vApplicationDaemonTaskStartupHook( void );
-
-		/* Allow the application writer to execute some code in the context of
-		this task at the point the task starts executing.  This is useful if the
-		application includes initialisation code that would benefit from
-		executing after the scheduler has been started. */
-		vApplicationDaemonTaskStartupHook();
-	}
-	#endif /* configUSE_DAEMON_TASK_STARTUP_HOOK */
-
-	for( ;; )
-	{
-		/* Query the timers list to see if it contains any timers, and if so,
-		obtain the time at which the next timer will expire. */
-		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
-
-		/* If a timer has expired, process it.  Otherwise, block this task
-		until either a timer does expire, or a command is received. */
-		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
-
-		/* Empty the command queue. */
-		prvProcessReceivedCommands();
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
-{
-TickType_t xTimeNow;
-BaseType_t xTimerListsWereSwitched;
-
-	vTaskSuspendAll();
-	{
-		/* Obtain the time now to make an assessment as to whether the timer
-		has expired or not.  If obtaining the time causes the lists to switch
-		then don't process this timer as any timers that remained in the list
-		when the lists were switched will have been processed within the
-		prvSampleTimeNow() function. */
-		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
-		if( xTimerListsWereSwitched == pdFALSE )
-		{
-			/* The tick count has not overflowed, has the timer expired? */
-			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
-			{
-				( void ) xTaskResumeAll();
-				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
-			}
-			else
-			{
-				/* The tick count has not overflowed, and the next expire
-				time has not been reached yet.  This task should therefore
-				block to wait for the next expire time or a command to be
-				received - whichever comes first.  The following line cannot
-				be reached unless xNextExpireTime > xTimeNow, except in the
-				case when the current timer list is empty. */
-				if( xListWasEmpty != pdFALSE )
-				{
-					/* The current timer list is empty - is the overflow list
-					also empty? */
-					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
-				}
-
-				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
-
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					/* Yield to wait for either a command to arrive, or the
-					block time to expire.  If a command arrived between the
-					critical section being exited and this yield then the yield
-					will not cause the task to block. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			( void ) xTaskResumeAll();
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
-{
-TickType_t xNextExpireTime;
-
-	/* Timers are listed in expiry time order, with the head of the list
-	referencing the task that will expire first.  Obtain the time at which
-	the timer with the nearest expiry time will expire.  If there are no
-	active timers then just set the next expire time to 0.  That will cause
-	this task to unblock when the tick count overflows, at which point the
-	timer lists will be switched and the next expiry time can be
-	re-assessed.  */
-	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
-	if( *pxListWasEmpty == pdFALSE )
-	{
-		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
-	}
-	else
-	{
-		/* Ensure the task unblocks when the tick count rolls over. */
-		xNextExpireTime = ( TickType_t ) 0U;
-	}
-
-	return xNextExpireTime;
-}
-/*-----------------------------------------------------------*/
-
-static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
-{
-TickType_t xTimeNow;
-PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
-
-	xTimeNow = xTaskGetTickCount();
-
-	if( xTimeNow < xLastTime )
-	{
-		prvSwitchTimerLists();
-		*pxTimerListsWereSwitched = pdTRUE;
-	}
-	else
-	{
-		*pxTimerListsWereSwitched = pdFALSE;
-	}
-
-	xLastTime = xTimeNow;
-
-	return xTimeNow;
-}
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
-{
-BaseType_t xProcessTimerNow = pdFALSE;
-
-	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
-	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
-
-	if( xNextExpiryTime <= xTimeNow )
-	{
-		/* Has the expiry time elapsed between the command to start/reset a
-		timer was issued, and the time the command was processed? */
-		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		{
-			/* The time between a command being issued and the command being
-			processed actually exceeds the timers period.  */
-			xProcessTimerNow = pdTRUE;
-		}
-		else
-		{
-			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
-		}
-	}
-	else
-	{
-		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
-		{
-			/* If, since the command was issued, the tick count has overflowed
-			but the expiry time has not, then the timer must have already passed
-			its expiry time and should be processed immediately. */
-			xProcessTimerNow = pdTRUE;
-		}
-		else
-		{
-			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
-		}
-	}
-
-	return xProcessTimerNow;
-}
-/*-----------------------------------------------------------*/
-
-static void	prvProcessReceivedCommands( void )
-{
-DaemonTaskMessage_t xMessage;
-Timer_t *pxTimer;
-BaseType_t xTimerListsWereSwitched, xResult;
-TickType_t xTimeNow;
-
-	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
-	{
-		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
-		{
-			/* Negative commands are pended function calls rather than timer
-			commands. */
-			if( xMessage.xMessageID < ( BaseType_t ) 0 )
-			{
-				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
-
-				/* The timer uses the xCallbackParameters member to request a
-				callback be executed.  Check the callback is not NULL. */
-				configASSERT( pxCallback );
-
-				/* Call the function. */
-				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* INCLUDE_xTimerPendFunctionCall */
-
-		/* Commands that are positive are timer commands rather than pended
-		function calls. */
-		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
-		{
-			/* The messages uses the xTimerParameters member to work on a
-			software timer. */
-			pxTimer = xMessage.u.xTimerParameters.pxTimer;
-
-			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE )
-			{
-				/* The timer is in a list, remove it. */
-				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.u.xTimerParameters.xMessageValue );
-
-			/* In this case the xTimerListsWereSwitched parameter is not used, but
-			it must be present in the function call.  prvSampleTimeNow() must be
-			called after the message is received from xTimerQueue so there is no
-			possibility of a higher priority task adding a message to the message
-			queue with a time that is ahead of the timer daemon task (because it
-			pre-empted the timer daemon task after the xTimeNow value was set). */
-			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
-
-			switch( xMessage.xMessageID )
-			{
-				case tmrCOMMAND_START :
-			    case tmrCOMMAND_START_FROM_ISR :
-			    case tmrCOMMAND_RESET :
-			    case tmrCOMMAND_RESET_FROM_ISR :
-				case tmrCOMMAND_START_DONT_TRACE :
-					/* Start or restart a timer. */
-					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
-					{
-						/* The timer expired before it was added to the active
-						timer list.  Process it now. */
-						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-						traceTIMER_EXPIRED( pxTimer );
-
-						if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
-						{
-							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
-							configASSERT( xResult );
-							( void ) xResult;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					break;
-
-				case tmrCOMMAND_STOP :
-				case tmrCOMMAND_STOP_FROM_ISR :
-					/* The timer has already been removed from the active list.
-					There is nothing to do here. */
-					break;
-
-				case tmrCOMMAND_CHANGE_PERIOD :
-				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
-					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
-					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
-
-					/* The new period does not really have a reference, and can
-					be longer or shorter than the old one.  The command time is
-					therefore set to the current time, and as the period cannot
-					be zero the next expiry time can only be in the future,
-					meaning (unlike for the xTimerStart() case above) there is
-					no fail case that needs to be handled here. */
-					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
-					break;
-
-				case tmrCOMMAND_DELETE :
-					/* The timer has already been removed from the active list,
-					just free up the memory if the memory was dynamically
-					allocated. */
-					#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
-					{
-						/* The timer can only have been allocated dynamically -
-						free it again. */
-						vPortFree( pxTimer );
-					}
-					#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-					{
-						/* The timer could have been allocated statically or
-						dynamically, so check before attempting to free the
-						memory. */
-						if( pxTimer->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
-						{
-							vPortFree( pxTimer );
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-					break;
-
-				default	:
-					/* Don't expect to get here. */
-					break;
-			}
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvSwitchTimerLists( void )
-{
-TickType_t xNextExpireTime, xReloadTime;
-List_t *pxTemp;
-Timer_t *pxTimer;
-BaseType_t xResult;
-
-	/* The tick count has overflowed.  The timer lists must be switched.
-	If there are any timers still referenced from the current timer list
-	then they must have expired and should be processed before the lists
-	are switched. */
-	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
-	{
-		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
-
-		/* Remove the timer from the list. */
-		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
-		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-		traceTIMER_EXPIRED( pxTimer );
-
-		/* Execute its callback, then send a command to restart the timer if
-		it is an auto-reload timer.  It cannot be restarted here as the lists
-		have not yet been switched. */
-		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-
-		if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
-		{
-			/* Calculate the reload value, and if the reload value results in
-			the timer going into the same timer list then it has already expired
-			and the timer should be re-inserted into the current list so it is
-			processed again within this loop.  Otherwise a command should be sent
-			to restart the timer to ensure it is only inserted into a list after
-			the lists have been swapped. */
-			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
-			if( xReloadTime > xNextExpireTime )
-			{
-				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
-				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
-				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
-			}
-			else
-			{
-				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
-				configASSERT( xResult );
-				( void ) xResult;
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-	pxTemp = pxCurrentTimerList;
-	pxCurrentTimerList = pxOverflowTimerList;
-	pxOverflowTimerList = pxTemp;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckForValidListAndQueue( void )
-{
-	/* Check that the list from which active timers are referenced, and the
-	queue used to communicate with the timer service, have been
-	initialised. */
-	taskENTER_CRITICAL();
-	{
-		if( xTimerQueue == NULL )
-		{
-			vListInitialise( &xActiveTimerList1 );
-			vListInitialise( &xActiveTimerList2 );
-			pxCurrentTimerList = &xActiveTimerList1;
-			pxOverflowTimerList = &xActiveTimerList2;
-
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* The timer queue is allocated statically in case
-				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
-				static StaticQueue_t xStaticTimerQueue;
-				static uint8_t ucStaticTimerQueueStorage[ configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ];
-
-				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
-			}
-			#else
-			{
-				xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );
-			}
-			#endif
-
-			#if ( configQUEUE_REGISTRY_SIZE > 0 )
-			{
-				if( xTimerQueue != NULL )
-				{
-					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			#endif /* configQUEUE_REGISTRY_SIZE */
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
-{
-BaseType_t xTimerIsInActiveList;
-Timer_t *pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-
-	/* Is the timer in the list of active timers? */
-	taskENTER_CRITICAL();
-	{
-		/* Checking to see if it is in the NULL list in effect checks to see if
-		it is referenced from either the current or the overflow timer lists in
-		one go, but the logic has to be reversed, hence the '!'. */
-		xTimerIsInActiveList = ( BaseType_t ) !( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) );
-	}
-	taskEXIT_CRITICAL();
-
-	return xTimerIsInActiveList;
-} /*lint !e818 Can't be pointer to const due to the typedef. */
-/*-----------------------------------------------------------*/
-
-void *pvTimerGetTimerID( const TimerHandle_t xTimer )
-{
-Timer_t * const pxTimer = ( Timer_t * ) xTimer;
-void *pvReturn;
-
-	configASSERT( xTimer );
-
-	taskENTER_CRITICAL();
-	{
-		pvReturn = pxTimer->pvTimerID;
-	}
-	taskEXIT_CRITICAL();
-
-	return pvReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID )
-{
-Timer_t * const pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-
-	taskENTER_CRITICAL();
-	{
-		pxTimer->pvTimerID = pvNewID;
-	}
-	taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-#if( INCLUDE_xTimerPendFunctionCall == 1 )
-
-	BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	DaemonTaskMessage_t xMessage;
-	BaseType_t xReturn;
-
-		/* Complete the message with the function parameters and post it to the
-		daemon task. */
-		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR;
-		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
-		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
-		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
-
-		xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
-
-		tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
-
-		return xReturn;
-	}
-
-#endif /* INCLUDE_xTimerPendFunctionCall */
-/*-----------------------------------------------------------*/
-
-#if( INCLUDE_xTimerPendFunctionCall == 1 )
-
-	BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait )
-	{
-	DaemonTaskMessage_t xMessage;
-	BaseType_t xReturn;
-
-		/* This function can only be called after a timer has been created or
-		after the scheduler has been started because, until then, the timer
-		queue does not exist. */
-		configASSERT( xTimerQueue );
-
-		/* Complete the message with the function parameters and post it to the
-		daemon task. */
-		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK;
-		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
-		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
-		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
-
-		xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
-
-		tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
-
-		return xReturn;
-	}
-
-#endif /* INCLUDE_xTimerPendFunctionCall */
-/*-----------------------------------------------------------*/
-
-/* This entire source file will be skipped if the application is not configured
-to include software timer functionality.  If you want to include software timer
-functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
-#endif /* configUSE_TIMERS == 1 */
-
-
-
diff --git a/ports/cc3200/Makefile b/ports/cc3200/Makefile
deleted file mode 100644
index 81531b1084..0000000000
--- a/ports/cc3200/Makefile
+++ /dev/null
@@ -1,63 +0,0 @@
-# Select the board to build for: if not given on the command line,
-# then default to WIPY
-BOARD ?= WIPY
-ifeq ($(wildcard boards/$(BOARD)/.),)
-$(error Invalid BOARD specified)
-endif
-
-# Make 'release' the default build type
-BTYPE ?= release
-
-# Port for flashing firmware
-PORT ?= /dev/ttyUSB1
-
-# If the build directory is not given, make it reflect the board name.
-BUILD ?= build/$(BOARD)/$(BTYPE)
-
-include ../../py/mkenv.mk
--include ../../localconfig.mk
-
-CROSS_COMPILE ?= arm-none-eabi-
-
-CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -march=armv7e-m -mabi=aapcs -mcpu=cortex-m4 -msoft-float -mfloat-abi=soft -fsingle-precision-constant -Wdouble-promotion
-CFLAGS = -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_CORTEX_M4) -Os
-CFLAGS += -g -ffunction-sections -fdata-sections -fno-common -fsigned-char -mno-unaligned-access
-CFLAGS += -Iboards/$(BOARD)
-CFLAGS += $(CFLAGS_MOD)
-
-LDFLAGS = -Wl,-nostdlib -Wl,--gc-sections -Wl,-Map=$@.map
-
-FLASH_SIZE_WIPY = 2M
-FLASH_SIZE_LAUNCHXL = 1M
-
-ifeq ($(BTARGET), application)
-# qstr definitions (must come before including py.mk)
-QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h
-# include MicroPython make definitions
-include $(TOP)/py/py.mk
-include application.mk
-else
-ifeq ($(BTARGET), bootloader)
-include bootmgr/bootloader.mk
-else
-$(error Invalid BTARGET specified)
-endif
-endif
-
-# always include MicroPython make rules
-include $(TOP)/py/mkrules.mk
-
-erase:
-	cc3200tool -p $(PORT) format_flash --size $(FLASH_SIZE_$(BOARD))
-
-deploy:
-	cc3200tool -p $(PORT) \
-	    write_file bootmgr/build/$(BOARD)/$(BTYPE)/bootloader.bin /sys/mcuimg.bin \
-	    write_file build/$(BOARD)/$(BTYPE)/mcuimg.bin /sys/factimg.bin
-
-# Files *.ucf and *ucf.signed.bin come from CC3200SDK-SERVICEPACK
-# package from http://www.ti.com/tool/cc3200sdk
-servicepack:
-	cc3200tool -p $(PORT) \
-	write_file --file-size=0x20000 --signature ota_1.0.1.6-2.7.0.0.ucf.signed.bin \
-	    ota_1.0.1.6-2.7.0.0.ucf /sys/servicepack.ucf
diff --git a/ports/cc3200/README.md b/ports/cc3200/README.md
deleted file mode 100644
index 53cad3ba0f..0000000000
--- a/ports/cc3200/README.md
+++ /dev/null
@@ -1,148 +0,0 @@
-MicroPython port to CC3200 WiFi SoC
-===================================
-
-This is a MicroPython port to Texas Instruments CC3200 WiFi SoC (ARM Cortex-M4
-architecture). This port supports 2 boards: WiPy and TI CC3200-LAUNCHXL.
-
-## Build Instructions for the CC3200
-
-Currently the CC3200 port of MicroPython builds under Linux and OSX,
-but not under Windows.
-
-The toolchain required for the build can be found at
-.
-
-In order to flash the image to the CC3200 you will need the
-[cc3200tool](https://github.com/ALLTERCO/cc3200tool). An alternative is
-to use CCS_Uniflash tool from TI, which works only under Windows, and all
-support is provided by TI itself.
-
-Building the bootloader:
-
-```
-make BTARGET=bootloader BTYPE=release BOARD=LAUNCHXL
-```
-
-Building the "release" image:
-
-```
-make BTARGET=application BTYPE=release BOARD=LAUNCHXL
-```
-
-To build an image suitable for debugging:
-
-In order to debug the port specific code, optimizations need to be disabled on the
-port file (check the Makefile for specific details). You can use CCS from TI.
-Use the CC3200.ccxml file supplied with this distribution for the debuuger configuration.
-
-```
-make BTARGET=application BTYPE=debug BOARD=LAUNCHXL
-```
-
-## Flashing the CC3200-LAUNCHXL
-
-Note that WiPy comes factory programmed with a default version of MicroPython,
-it cannot be programmed via serial, and can be upgraded only with OTA (see
-below).
-
-- Make sure that you have built both the *bootloader* and the *application* in **release** mode.
-- Make sure the SOP2 jumper is in position.
-- Make sure you Linux system recognized the board and created `ttyUSB*`
-  devices (see below for configuration of `ftdi_sio` driver).
-- Run "make erase" and immediately press Reset button on the device.
-- Wait few seconds.
-- Run "make deploy" and immediately press Reset button on the device.
-- You are recommended to install the latest vendor WiFi firmware
-  servicepack from http://www.ti.com/tool/cc3200sdk. Download
-  CC3200SDK-SERVICEPACK package, install it, and locate `ota_*.ucf`
-  and `ota_*.ucf.signed.bin` files. Copy them to the port's directory
-  and run "make servicepack", with immediate press of Reset button.
-- Remove the SOP2 jumper and reset the board.
-
-Flashing process using TI Uniflash:
-
-- Open CCS_Uniflash and connect to the board (by default on port 22). 
-- Format the serial flash (select 1MB size in case of the CC3200-LAUNCHXL, 2MB in case of the WiPy, leave the rest unchecked).
-- Mark the following files for erasing: `/cert/ca.pem`, `/cert/client.pem`, `/cert/private.key` and `/tmp/pac.bin`.
-- Add a new file with the name of /sys/mcuimg.bin, and select the URL to point to cc3200\bootmgr\build\\bootloader.bin.
-- Add another file with the name of /sys/factimg.bin, and select the URL to point to cc3200\build\\mcuimg.bin.
-- Click "Program" to apply all changes.
-- Flash the latest service pack (servicepack_1.0.0.10.0.bin) using the "Service Pack Update" button.
-- Close CCS_Uniflash, remove the SOP2 jumper and reset the board.
-
-## Playing with MicroPython and the CC3200:
-
-Once the software is running, you have two options to access the MicroPython REPL:
-
-- Through telnet.
-  * Connect to the network created by the board (as boots up in AP mode), **ssid = "wipy-wlan", key = "www.wipy.io"**.
-    * You can also reinitialize the WLAN in station mode and connect to another AP, or in AP mode but with a
-      different ssid and/or key.
-  * Use your favourite telnet client with the following settings: **host = 192.168.1.1, port = 23.**
-  * Log in with **user = "micro" and password = "python"**
-
-- Through UART (serial).
-  * This is enabled by default in the standard configuration, for UART0 (speed 115200).
-  * For CC3200-LAUNCHXL, you will need to configure Linux `ftdi_sio` driver as described
-    in the [blog post](http://www.achanceofbrainshowers.com/blog/tech/2014/8/19/cc3200-development-under-linux/).
-    After that, connecting a board will create two `/dev/ttyUSB*` devices, a serial
-    console is available on the 2nd one (usually `/dev/ttyUSB1`).
-  * WiPy doesn't have onboard USB-UART converter, so you will need an external one,
-    connected to GPIO01 (Tx) and GPIO02 (Rx).
-  * Usage of UART port for REPL is controlled by MICROPY_STDIO_UART setting (and
-    is done at the high level, using a suitable call to `os.dupterm()` function
-    in boot.py, so you can override it at runtime regardless of MICROPY_STDIO_UART
-    setting).
-
-The board has a small file system of 192K (WiPy) or 64K (Launchpad) located in the serial flash connected to the CC3200. 
-SD cards are also supported, you can connect any SD card and configure the pinout using the SD class API.
-
-## Uploading scripts:
-
-To upload your MicroPython scripts to the FTP server, open your FTP client of choice and connect to:
-**ftp://192.168.1.1, user = "micro", password = "python"**
-
-Tested FTP clients are: FileZilla, FireFTP, FireFox, IE and Chrome. Other
-clients should work as well, but you may need to configure them to use a
-single connection (this should be the default for any compliant FTP client).
-
-## Upgrading the firmware Over The Air (OTA)
-
-OTA software updates can be performed through the builtin FTP server. After
-building a new `mcuimg.bin` in release mode, upload it to:
-`/flash/sys/mcuimg.bin`. It will take around 6s (The TI SimpleLink file
-system is quite slow because every file is mirrored for safety). You won't
-see the file being stored inside `/flash/sys/` because it's actually saved
-bypassing FatFS, but rest assured that the file was successfully transferred,
-and it has been signed with a MD5 checksum to verify its integrity.
-Now, reset the MCU by pressing the switch on the board, or by typing:
-
-```python
-import machine
-machine.reset()
-```
-
-There's a script which automates this process from the host side:
-
-- Make sure the board is running and connected to the same network as the computer.
-
-```bash
-make BTARGET=application BTYPE=release BOARD=LAUNCHXL WIPY_IP=192.168.1.1 WIPY_USER=micro WIPY_PWD=python deploy-ota
-```
-
-If `WIPY_IP`, `WIPY_USER` or `WIPY_PWD` are omitted the default values (the ones shown above) will be used.
-
-
-## Notes and known issues
-
-## Regarding old revisions of the CC3200-LAUNCHXL
-
-First silicon (pre-release) revisions of the CC3200 had issues with the ram blocks, and MicroPython cannot run
-there. Make sure to use a **v4.1 (or higher) LAUNCHXL board** when trying this port, otherwise it won't work.
-
-### Note regarding FileZilla
-
-Do not use the quick connect button, instead, open the site manager and create a new configuration. In the "General" tab make 
-sure that encryption is set to: "Only use plain FTP (insecure)". In the Transfer Settings tab limit the max number of connections 
-to one, otherwise FileZilla will try to open a second command connection when retrieving and saving files, and for simplicity and 
-to reduce code size, only one command and one data connections are possible.
diff --git a/ports/cc3200/application.lds b/ports/cc3200/application.lds
deleted file mode 100644
index 3f5e72f8bd..0000000000
--- a/ports/cc3200/application.lds
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-__stack_size__    = 2K;       /* interrupts are handled within this stack */
-__min_heap_size__ = 8K;
-
-MEMORY
-{
-    SRAMB (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
-    SRAM  (rwx) : ORIGIN = 0x20004000, LENGTH = 0x0003C000
-}
-
-ENTRY(ResetISR)
-
-SECTIONS
-{  
-    /* place the FreeRTOS heap (the MicroPython stack will live here) */
-    .rtos_heap (NOLOAD) :
-    {
-        . = ALIGN(8);
-        *(.rtos_heap*)
-        . = ALIGN(8);
-    } > SRAMB
-
-    .text :
-    {
-        _text = .;
-        KEEP(*(.intvecs))
-        *(.text*)
-        *(.rodata*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-        . = ALIGN(8);
-    } > SRAM
-
-    .ARM :
-    {
-        __exidx_start = .;
-        *(.ARM.exidx*)
-        __exidx_end = .;
-        _etext = .;
-    } > SRAM
-
-    .data :
-    {
-        . = ALIGN(8);
-        _data = .;
-        *(.data*)
-        . = ALIGN(8);
-        _edata = .;
-    } > SRAM
-
-    .bss :
-    {
-        . = ALIGN(8);
-        _bss = .;
-        *(.bss*)
-        *(COMMON)
-        . = ALIGN(8);
-        _ebss = .;
-    } > SRAM
-
-    /* place here functions that are only called during boot up, */
-    /* that way, we can re-use this area for the MicroPython heap */
-    .boot :
-    {
-        . = ALIGN(8);
-        _boot = .;
-        *(.boot*)
-        . = ALIGN(8);
-        _eboot = .;
-    } > SRAM
-     
-    /* allocate the MicroPython heap */
-    .heap :
-    {
-        . = ALIGN(8);
-        _heap = .;
-        . = . + __min_heap_size__;
-        . = . + (ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ - ABSOLUTE(.));
-        . = ALIGN(8);
-        _eheap = .;
-    } > SRAM
-
-    /* allocate the main stack */
-    .stack ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ :
-    {
-        . = ALIGN(8);
-        _stack = .;
-        . = . + __stack_size__;
-        . = ALIGN(8);
-        _estack = .;
-    } > SRAM
-}
diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
deleted file mode 100644
index 19abe66163..0000000000
--- a/ports/cc3200/application.mk
+++ /dev/null
@@ -1,240 +0,0 @@
-APP_INC =  -I.
-APP_INC += -I$(TOP)
-APP_INC += -Ifatfs/src
-APP_INC += -Ifatfs/src/drivers
-APP_INC += -IFreeRTOS
-APP_INC += -IFreeRTOS/Source/include
-APP_INC += -IFreeRTOS/Source/portable/GCC/ARM_CM3
-APP_INC += -Iftp
-APP_INC += -Ihal
-APP_INC += -Ihal/inc
-APP_INC += -Imisc
-APP_INC += -Imods
-APP_INC += -I$(TOP)/drivers/cc3100/inc
-APP_INC += -Isimplelink
-APP_INC += -Isimplelink/oslib
-APP_INC += -Itelnet
-APP_INC += -Iutil
-APP_INC += -Ibootmgr
-APP_INC += -I$(BUILD)
-APP_INC += -I$(BUILD)/genhdr
-APP_INC += -I$(TOP)/ports/stm32
-
-APP_CPPDEFINES = -Dgcc -DTARGET_IS_CC3200 -DSL_FULL -DUSE_FREERTOS
-
-APP_FATFS_SRC_C = $(addprefix fatfs/src/,\
-	drivers/sflash_diskio.c \
-	drivers/sd_diskio.c \
-	)
-
-APP_RTOS_SRC_C = $(addprefix FreeRTOS/Source/,\
-	croutine.c \
-	event_groups.c \
-	list.c \
-	queue.c \
-	tasks.c \
-	timers.c \
-	portable/GCC/ARM_CM3/port.c \
-	portable/MemMang/heap_4.c \
-	)
-
-APP_FTP_SRC_C = $(addprefix ftp/,\
-	ftp.c \
-	updater.c \
-	)
-
-APP_HAL_SRC_C = $(addprefix hal/,\
-	adc.c \
-	aes.c \
-	cc3200_hal.c \
-	cpu.c \
-	crc.c \
-	des.c \
-	gpio.c \
-	i2c.c \
-	i2s.c \
-	interrupt.c \
-	pin.c \
-	prcm.c \
-	sdhost.c \
-	shamd5.c \
-	spi.c \
-	startup_gcc.c \
-	systick.c \
-	timer.c \
-	uart.c \
-	utils.c \
-	wdt.c \
-	)
-
-APP_MISC_SRC_C = $(addprefix misc/,\
-	antenna.c \
-	FreeRTOSHooks.c \
-	help.c \
-	mpirq.c \
-	mperror.c \
-	mpexception.c \
-	)
-
-APP_MODS_SRC_C = $(addprefix mods/,\
-	modmachine.c \
-	modnetwork.c \
-	modubinascii.c \
-	moduos.c \
-	modusocket.c \
-	modussl.c \
-	modutime.c \
-	modwipy.c \
-	modwlan.c \
-	pybadc.c \
-	pybpin.c \
-	pybi2c.c \
-	pybrtc.c \
-	pybflash.c \
-	pybsd.c \
-	pybsleep.c \
-	pybspi.c \
-	pybtimer.c \
-	pybuart.c \
-	pybwdt.c \
-	)
-
-APP_CC3100_SRC_C = $(addprefix drivers/cc3100/src/,\
-	device.c \
-	driver.c \
-	flowcont.c \
-	fs.c \
-	netapp.c \
-	netcfg.c \
-	socket.c \
-	wlan.c \
-	)
-
-APP_SL_SRC_C = $(addprefix simplelink/,\
-	oslib/osi_freertos.c \
-	cc_pal.c \
-	) 
-
-APP_TELNET_SRC_C = $(addprefix telnet/,\
-	telnet.c \
-	)
-	
-APP_UTIL_SRC_C = $(addprefix util/,\
-	cryptohash.c \
-	fifo.c \
-	gccollect.c \
-	random.c \
-	socketfifo.c \
-	)
-	
-APP_UTIL_SRC_S = $(addprefix util/,\
-	gchelper.s \
-	sleeprestore.s \
-	)
-	
-APP_MAIN_SRC_C = \
-	main.c \
-	mptask.c \
-	mpthreadport.c \
-	serverstask.c \
-	fatfs_port.c \
-	
-APP_LIB_SRC_C = $(addprefix lib/,\
-	oofatfs/ff.c \
-	oofatfs/option/unicode.c \
-	libc/string0.c \
-	mp-readline/readline.c \
-	netutils/netutils.c \
-	timeutils/timeutils.c \
-	utils/pyexec.c \
-	utils/interrupt_char.c \
-	utils/sys_stdio_mphal.c \
-	)
-	
-APP_STM_SRC_C = $(addprefix ports/stm32/,\
-	bufhelper.c \
-	irq.c \
-	)
-
-OBJ = $(PY_O) $(addprefix $(BUILD)/, $(APP_FATFS_SRC_C:.c=.o) $(APP_RTOS_SRC_C:.c=.o) $(APP_FTP_SRC_C:.c=.o) $(APP_HAL_SRC_C:.c=.o) $(APP_MISC_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(APP_MODS_SRC_C:.c=.o) $(APP_CC3100_SRC_C:.c=.o) $(APP_SL_SRC_C:.c=.o) $(APP_TELNET_SRC_C:.c=.o) $(APP_UTIL_SRC_C:.c=.o) $(APP_UTIL_SRC_S:.s=.o))
-OBJ += $(addprefix $(BUILD)/, $(APP_MAIN_SRC_C:.c=.o) $(APP_LIB_SRC_C:.c=.o) $(APP_STM_SRC_C:.c=.o))
-OBJ += $(BUILD)/pins.o
-
-# List of sources for qstr extraction
-SRC_QSTR += $(APP_MODS_SRC_C) $(APP_MISC_SRC_C) $(APP_STM_SRC_C)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
-
-# Add the linker script
-LINKER_SCRIPT = application.lds
-LDFLAGS += -T $(LINKER_SCRIPT)
-
-# Add the application specific CFLAGS
-CFLAGS += $(APP_CPPDEFINES) $(APP_INC)
-
-# Disable strict aliasing for the simplelink driver
-$(BUILD)/drivers/cc3100/src/driver.o: CFLAGS += -fno-strict-aliasing
-
-# Check if we would like to debug the port code
-ifeq ($(BTYPE), release)
-CFLAGS += -DNDEBUG
-else
-ifeq ($(BTYPE), debug)
-CFLAGS += -DNDEBUG
-else
-$(error Invalid BTYPE specified)
-endif
-endif
-
-SHELL = bash
-APP_SIGN = appsign.sh
-UPDATE_WIPY ?= tools/update-wipy.py
-WIPY_IP ?= '192.168.1.1'
-WIPY_USER ?= 'micro'
-WIPY_PWD ?= 'python'
-
-all: $(BUILD)/mcuimg.bin
-
-.PHONY: deploy-ota
-
-deploy-ota: $(BUILD)/mcuimg.bin
-	$(ECHO) "Writing $< to the board"
-	$(Q)$(PYTHON) $(UPDATE_WIPY) --verify --ip $(WIPY_IP) --user $(WIPY_USER) --password $(WIPY_PWD) --file $<
-
-$(BUILD)/application.axf: $(OBJ) $(LINKER_SCRIPT)
-	$(ECHO) "LINK $@"
-	$(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) $(LIBS)
-	$(Q)$(SIZE) $@
-
-$(BUILD)/application.bin: $(BUILD)/application.axf
-	$(ECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary $< $@
-
-$(BUILD)/mcuimg.bin: $(BUILD)/application.bin
-	$(ECHO) "Create $@"
-	$(Q)$(SHELL) $(APP_SIGN) $(BUILD)
-
-MAKE_PINS = boards/make-pins.py
-BOARD_PINS = boards/$(BOARD)/pins.csv
-AF_FILE = boards/cc3200_af.csv
-PREFIX_FILE = boards/cc3200_prefix.c
-GEN_PINS_SRC = $(BUILD)/pins.c
-GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
-
-# Making OBJ use an order-only dependency on the generated pins.h file
-# has the side effect of making the pins.h file before we actually compile
-# any of the objects. The normal dependency generation will deal with the
-# case when pins.h is modified. But when it doesn't exist, we don't know
-# which source files might need it.
-$(OBJ): | $(GEN_PINS_HDR)
-
-# Call make-pins.py to generate both pins_gen.c and pins.h
-$(GEN_PINS_SRC) $(GEN_PINS_HDR) $(GEN_PINS_QSTR): $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
-	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) > $(GEN_PINS_SRC)
-
-$(BUILD)/pins.o: $(BUILD)/pins.c
-	$(call compile_c)
diff --git a/ports/cc3200/appsign.sh b/ports/cc3200/appsign.sh
deleted file mode 100644
index 5752b40cd5..0000000000
--- a/ports/cc3200/appsign.sh
+++ /dev/null
@@ -1,29 +0,0 @@
-#!/bin/bash
-
-if [ "$#" -ne 1 ]; then
-    echo "Usage: appsign.sh *build dir*"
-    exit 1
-fi
-
-# Build location
-BUILD=$1
-
-# Generate the MD5 hash
-# md5 on Darwin, md5sum on Unix
-if [ `uname -s` = "Darwin" ]; then
-echo -n `md5 -q $BUILD/application.bin` > __md5hash.bin
-else
-echo -n `md5sum --binary $BUILD/application.bin | awk '{ print $1 }'` > __md5hash.bin
-fi
-
-# Concatenate it with the application binary
-cat $BUILD/application.bin __md5hash.bin > $BUILD/mcuimg.bin
-RET=$?
-
-# Remove the tmp files
-rm -f __md5hash.bin
-
-# Remove the unsigned binary
-rm -f $BUILD/application.bin
-
-exit $RET
diff --git a/ports/cc3200/boards/LAUNCHXL/mpconfigboard.h b/ports/cc3200/boards/LAUNCHXL/mpconfigboard.h
deleted file mode 100644
index b3d766d1e2..0000000000
--- a/ports/cc3200/boards/LAUNCHXL/mpconfigboard.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#define LAUNCHXL
-
-#define MICROPY_HW_BOARD_NAME                       "LaunchPad"
-#define MICROPY_HW_MCU_NAME                         "CC3200"
-
-#define MICROPY_HW_ANTENNA_DIVERSITY                (0)
-
-#define MICROPY_STDIO_UART                          1
-#define MICROPY_STDIO_UART_BAUD                     115200
-
-#define MICROPY_SYS_LED_PRCM                        PRCM_GPIOA1
-#define MICROPY_SAFE_BOOT_PRCM                      PRCM_GPIOA2
-#define MICROPY_SYS_LED_PORT                        GPIOA1_BASE
-#define MICROPY_SAFE_BOOT_PORT                      GPIOA2_BASE
-#define MICROPY_SYS_LED_GPIO                        pin_GP9
-#define MICROPY_SYS_LED_PIN_NUM                     PIN_64      // GP9
-#define MICROPY_SAFE_BOOT_PIN_NUM                   PIN_15      // GP22
-#define MICROPY_SYS_LED_PORT_PIN                    GPIO_PIN_1
-#define MICROPY_SAFE_BOOT_PORT_PIN                  GPIO_PIN_6
-
-#define MICROPY_PORT_SFLASH_BLOCK_COUNT             32
-
diff --git a/ports/cc3200/boards/LAUNCHXL/pins.csv b/ports/cc3200/boards/LAUNCHXL/pins.csv
deleted file mode 100644
index 38071e1307..0000000000
--- a/ports/cc3200/boards/LAUNCHXL/pins.csv
+++ /dev/null
@@ -1,25 +0,0 @@
-P12,58
-P13,4
-P14,3
-P15,61
-P16,59
-P17,5
-P18,62
-P19,1
-P110,2
-P33,57
-P34,60
-P37,63
-P38,53
-P39,64
-P310,50
-P49,16
-P410,17
-P22,18
-P23,8
-P24,45
-P26,7
-P27,6
-P28,21
-P29,55
-P210,15
\ No newline at end of file
diff --git a/ports/cc3200/boards/WIPY/mpconfigboard.h b/ports/cc3200/boards/WIPY/mpconfigboard.h
deleted file mode 100644
index af15cca350..0000000000
--- a/ports/cc3200/boards/WIPY/mpconfigboard.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#define WIPY
-
-#define MICROPY_HW_BOARD_NAME                       "WiPy"
-#define MICROPY_HW_MCU_NAME                         "CC3200"
-
-#define MICROPY_HW_ANTENNA_DIVERSITY                (1)
-
-#define MICROPY_STDIO_UART                          1
-#define MICROPY_STDIO_UART_BAUD                     115200
-
-#define MICROPY_SYS_LED_PRCM                        PRCM_GPIOA3
-#define MICROPY_SAFE_BOOT_PRCM                      PRCM_GPIOA3
-#define MICROPY_SYS_LED_PORT                        GPIOA3_BASE
-#define MICROPY_SAFE_BOOT_PORT                      GPIOA3_BASE
-#define MICROPY_SYS_LED_GPIO                        pin_GP25
-#define MICROPY_SYS_LED_PIN_NUM                     PIN_21      // GP25   (SOP2)
-#define MICROPY_SAFE_BOOT_PIN_NUM                   PIN_18      // GP28
-#define MICROPY_SYS_LED_PORT_PIN                    GPIO_PIN_1
-#define MICROPY_SAFE_BOOT_PORT_PIN                  GPIO_PIN_4
-
-#define MICROPY_PORT_SFLASH_BLOCK_COUNT             96
diff --git a/ports/cc3200/boards/WIPY/pins.csv b/ports/cc3200/boards/WIPY/pins.csv
deleted file mode 100644
index c4e4376246..0000000000
--- a/ports/cc3200/boards/WIPY/pins.csv
+++ /dev/null
@@ -1,25 +0,0 @@
-L2,GP2
-L3,GP1
-L4,GP23
-L5,GP24
-L6,GP11
-L7,GP12
-L8,GP13
-L9,GP14
-L10,GP15
-L11,GP16
-L12,GP17
-L13,GP22
-L14,GP28
-R4,GP10
-R5,GP9
-R6,GP8
-R7,GP7
-R8,GP6
-R9,GP30
-R10,GP31
-R11,GP3
-R12,GP0
-R13,GP4
-R14,GP5
-HBL,GP25
diff --git a/ports/cc3200/boards/cc3200_af.csv b/ports/cc3200/boards/cc3200_af.csv
deleted file mode 100644
index a93cb54a5b..0000000000
--- a/ports/cc3200/boards/cc3200_af.csv
+++ /dev/null
@@ -1,66 +0,0 @@
-Pin,Name,Default,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,ADC
-1,GP10,GP10,GP10,I2C0_SCL,,TIM3_PWM,,,SD0_CLK,UART1_TX,,,,,TIM0_CC,,,,
-2,GP11,GP11,GP11,I2C0_SDA,,TIM3_PWM,pXCLK(XVCLK),,SD0_CMD,UART1_RX,,,,,TIM1_CC,I2S0_FS,,,
-3,GP12,GP12,GP12,,,I2S0_CLK,pVS(VSYNC),I2C0_SCL,,UART0_TX,,,,,TIM1_CC,,,,
-4,GP13,GP13,GP13,,,,pHS(HSYNC),I2C0_SDA,,UART0_RX,,,,,TIM2_CC,,,,
-5,GP14,GP14,GP14,,,,pDATA8(CAM_D4),I2C0_SCL,,SPI0_CLK,,,,,TIM2_CC,,,,
-6,GP15,GP15,GP15,,,,pDATA9(CAM_D5),I2C0_SDA,,SPI0_MISO,SD0_DAT0,,,,,TIM3_CC,,,
-7,GP16,GP16,GP16,,,,pDATA10(CAM_D6),UART1_TX,,SPI0_MOSI,SD0_CLK,,,,,TIM3_CC,,,
-8,GP17,GP17,GP17,,,,pDATA11(CAM_D7),UART1_RX,,SPI0_CS0,SD0_CMD,,,,,,,,
-9,VDD_DIG1,VDD_DIG1,VDD_DIG1,,,,,,,,,,,,,,,,
-10,VIN_IO1,VIN_IO1,VIN_IO1,,,,,,,,,,,,,,,,
-11,FLASH_SPI_CLK,FLASH_SPI_CLK,FLASH_SPI_CLK,,,,,,,,,,,,,,,,
-12,FLASH_SPI_DOUT,FLASH_SPI_DOUT,FLASH_SPI_DOUT,,,,,,,,,,,,,,,,
-13,FLASH_SPI_DIN,FLASH_SPI_DIN,FLASH_SPI_DIN,,,,,,,,,,,,,,,,
-14,FLASH_SPI_CS,FLASH_SPI_CS,FLASH_SPI_CS,,,,,,,,,,,,,,,,
-15,GP22,GP22,GP22,,,,,TIM2_CC,,I2S0_FS,,,,,,,,,
-16,GP23,TDI,GP23,TDI,UART1_TX,,,,,,,I2C0_SCL,,,,,,,
-17,GP24,TDO,GP24,TDO,UART1_RX,,TIM3_CC,TIM0_PWM,I2S0_FS,,,I2C0_SDA,,,,,,,
-18,GP28,GP28,GP28,,,,,,,,,,,,,,,,
-19,TCK,TCK,,TCK,,,,,,,TIM1_PWM,,,,,,,,
-20,GP29,TMS,GP29,TMS,,,,,,,,,,,,,,,
-21,GP25,SOP2,GP25,,I2S0_FS,,,,,,,TIM1_PWM,,,,,,,
-22,WLAN_XTAL_N,WLAN_XTAL_N,WLAN_XTAL_N,,,,,,,,,,,,,,,,
-23,WLAN_XTAL_P,WLAN_XTAL_P,WLAN_XTAL_P,,,,,,,,,,,,,,,,
-24,VDD_PLL,VDD_PLL,VDD_PLL,,,,,,,,,,,,,,,,
-25,LDO_IN2,LDO_IN2,LDO_IN2,,,,,,,,,,,,,,,,
-26,NC,NC,NC,,,,,,,,,,,,,,,,
-27,NC,NC,NC,,,,,,,,,,,,,,,,
-28,NC,NC,NC,,,,,,,,,,,,,,,,
-29,ANTSEL1,ANTSEL1,ANTSEL1,,,,,,,,,,,,,,,,
-30,ANTSEL2,ANTSEL2,ANTSEL2,,,,,,,,,,,,,,,,
-31,RF_BG,RF_BG,RF_BG,,,,,,,,,,,,,,,,
-32,nRESET,nRESET,nRESET,,,,,,,,,,,,,,,,
-33,VDD_PA_IN,VDD_PA_IN,VDD_PA_IN,,,,,,,,,,,,,,,,
-34,SOP1,SOP1,SOP1,,,,,,,,,,,,,,,,
-35,SOP0,SOP0,SOP0,,,,,,,,,,,,,,,,
-36,LDO_IN1,LDO_IN1,LDO_IN1,,,,,,,,,,,,,,,,
-37,VIN_DCDC_ANA,VIN_DCDC_ANA,VIN_DCDC_ANA,,,,,,,,,,,,,,,,
-38,DCDC_ANA_SW,DCDC_ANA_SW,DCDC_ANA_SW,,,,,,,,,,,,,,,,
-39,VIN_DCDC_PA,VIN_DCDC_ PA,VIN_DCDC_PA,,,,,,,,,,,,,,,,
-40,DCDC_PA_SW_P,DCDC_PA_SW_P,DCDC_PA_SW_P,,,,,,,,,,,,,,,,
-41,DCDC_PA_SW_N,DCDC_PA_SW_N,DCDC_PA_SW_N,,,,,,,,,,,,,,,,
-42,DCDC_PA_OUT,DCDC_PA_O UT,DCDC_PA_O UT,,,,,,,,,,,,,,,,
-43,DCDC_DIG_SW,DCDC_DIG_ SW,DCDC_DIG_ SW,,,,,,,,,,,,,,,,
-44,VIN_DCDC_DIG,VIN_DCDC_ DIG,VIN_DCDC_ DIG,,,,,,,,,,,,,,,,
-45,GP31,DCDC_ANA2_SW_P,GP31,,UART1_RX,,,,I2S0_DAT0,SPI0_CLK,,UART0_RX,,,I2S0_FS,,,,
-46,DCDC_ANA2_SW_N,DCDC_ANA2_SW_N,DCDC_ANA2_SW_N,,,,,,,,,,,,,,,,
-47,VDD_ANA2,VDD_ANA2,VDD_ANA2,,,,,,,,,,,,,,,,
-48,VDD_ANA1,VDD_ANA1,VDD_ANA1,,,,,,,,,,,,,,,,
-49,VDD_RAM,VDD_RAM,VDD_RAM,,,,,,,,,,,,,,,,
-50,GP0,GP0,GP0,,,UART0_RTS,I2S0_DAT0,,I2S0_DAT1,TIM0_CC,,SPI0_CS0,UART1_RTS,,UART0_CTS,,,,
-51,RTC_XTAL_P,RTC_XTAL_P,RTC_XTAL_P,,,,,,,,,,,,,,,,
-52,RTC_XTAL_N,RTC_XTAL_N,GP32,,I2S0_CLK,,I2S0_DAT0,,UART0_RTS,,SPI0_MOSI,,,,,,,,
-53,GP30,GP30,GP30,,I2S0_CLK,I2S0_FS,TIM2_CC,,,SPI0_MISO,,UART0_TX,,,,,,,
-54,VIN_IO2,VIN_IO2,VIN_IO2,,,,,,,,,,,,,,,,
-55,GP1,GP1,GP1,,,UART0_TX,pCLK (PIXCLK),,UART1_TX,TIM0_CC,,,,,,,,,
-56,VDD_DIG2,VDD_DIG2,VDD_DIG2,,,,,,,,,,,,,,,,
-57,GP2,GP2,GP2,,,UART0_RX,,,UART1_RX,TIM1_CC,,,,,,,,,ADC0_CH0
-58,GP3,GP3,GP3,,,,pDATA7(CAM_D3),,UART1_TX,,,,,,,,,,ADC0_CH1
-59,GP4,GP4,GP4,,,,pDATA6(CAM_D2),,UART1_RX,,,,,,,,,,ADC0_CH2
-60,GP5,GP5,GP5,,,,pDATA5(CAM_D1),,I2S0_DAT1,TIM2_CC,,,,,,,,,ADC0_CH3
-61,GP6,GP6,GP6,,,UART1_CTS,pDATA4(CAM_D0),UART0_RTS,UART0_CTS,TIM3_CC,,,,,,,,,
-62,GP7,GP7,GP7,,,UART1_RTS,,,,,,,UART0_RTS,UART0_TX,,I2S0_CLK,,,
-63,GP8,GP8,GP8,,,,,,SD0_IRQ,I2S0_FS,,,,,TIM3_CC,,,,
-64,GP9,GP9,GP9,,,TIM2_PWM,,,SD0_DAT0,I2S0_DAT0,,,,,TIM0_CC,,,,
-65,GND_TAB,GND_TAB,GND_TAB,,,,,,,,,,,,,,,,
diff --git a/ports/cc3200/boards/cc3200_prefix.c b/ports/cc3200/boards/cc3200_prefix.c
deleted file mode 100644
index d03efe0240..0000000000
--- a/ports/cc3200/boards/cc3200_prefix.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-// cc3200_prefix.c becomes the initial portion of the generated pins file.
-
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "pin.h"
-#include "gpio.h"
-#include "pybpin.h"
-
-
-#define AF(af_name, af_idx, af_fn, af_unit, af_type) \
-{ \
-    .name = MP_QSTR_ ## af_name, \
-    .idx = (af_idx), \
-    .fn = PIN_FN_ ## af_fn, \
-    .unit = (af_unit), \
-    .type = PIN_TYPE_ ## af_fn ## _ ## af_type, \
-}
-
-
-#define PIN(p_pin_name, p_port, p_bit, p_pin_num, p_af_list, p_num_afs) \
-{ \
-    { &pin_type }, \
-    .name           = MP_QSTR_ ## p_pin_name, \
-    .port           = PORT_A ## p_port, \
-    .af_list        = (p_af_list), \
-    .pull           = PIN_TYPE_STD, \
-    .bit            = (p_bit), \
-    .pin_num        = (p_pin_num), \
-    .af             = PIN_MODE_0, \
-    .strength       = PIN_STRENGTH_4MA, \
-    .mode           = GPIO_DIR_MODE_IN, \
-    .num_afs        = (p_num_afs), \
-    .value          = 0, \
-    .used           = false, \
-    .irq_trigger    = 0, \
-    .irq_flags      = 0, \
-}
diff --git a/ports/cc3200/boards/make-pins.py b/ports/cc3200/boards/make-pins.py
deleted file mode 100644
index 30db4ac9ec..0000000000
--- a/ports/cc3200/boards/make-pins.py
+++ /dev/null
@@ -1,233 +0,0 @@
-#!/usr/bin/env python
-"""Generates the pins file for the CC3200."""
-
-from __future__ import print_function
-
-import argparse
-import sys
-import csv
-
-
-SUPPORTED_AFS = { 'UART': ('TX', 'RX', 'RTS', 'CTS'),
-                  'SPI': ('CLK', 'MOSI', 'MISO', 'CS0'),
-                  #'I2S': ('CLK', 'FS', 'DAT0', 'DAT1'),
-                  'I2C': ('SDA', 'SCL'),
-                  'TIM': ('PWM'),
-                  'SD': ('CLK', 'CMD', 'DAT0'),
-                  'ADC': ('CH0', 'CH1', 'CH2', 'CH3')
-                }
-
-def parse_port_pin(name_str):
-    """Parses a string and returns a (port, gpio_bit) tuple."""
-    if len(name_str) < 3:
-        raise ValueError("Expecting pin name to be at least 3 characters")
-    if name_str[:2] != 'GP':
-        raise ValueError("Expecting pin name to start with GP")
-    if not name_str[2:].isdigit():
-        raise ValueError("Expecting numeric GPIO number")
-    port = int(int(name_str[2:]) / 8)
-    gpio_bit = 1 << int(int(name_str[2:]) % 8)
-    return (port, gpio_bit)
-
-
-class AF:
-    """Holds the description of an alternate function"""
-    def __init__(self, name, idx, fn, unit, type):
-        self.name = name
-        self.idx = idx
-        if self.idx > 15:
-            self.idx = -1
-        self.fn = fn
-        self.unit = unit
-        self.type = type
-
-    def print(self):
-        print ('    AF({:16s}, {:4d}, {:8s}, {:4d}, {:8s}),    // {}'.format(self.name, self.idx, self.fn, self.unit, self.type, self.name))
-
-
-class Pin:
-    """Holds the information associated with a pin."""
-    def __init__(self, name, port, gpio_bit, pin_num):
-        self.name = name
-        self.port = port
-        self.gpio_bit = gpio_bit
-        self.pin_num = pin_num
-        self.board_pin = False
-        self.afs = []
-
-    def add_af(self, af):
-        self.afs.append(af)
-
-    def print(self):
-        print('// {}'.format(self.name))
-        if len(self.afs):
-            print('const pin_af_t pin_{}_af[] = {{'.format(self.name))
-            for af in self.afs:
-                af.print()
-            print('};')
-            print('pin_obj_t pin_{:4s} = PIN({:6s}, {:1d}, {:3d}, {:2d}, pin_{}_af, {});\n'.format(
-                   self.name, self.name, self.port, self.gpio_bit, self.pin_num, self.name, len(self.afs)))
-        else:
-            print('pin_obj_t pin_{:4s} = PIN({:6s}, {:1d}, {:3d}, {:2d}, NULL, 0);\n'.format(
-                   self.name, self.name, self.port, self.gpio_bit, self.pin_num))
-
-    def print_header(self, hdr_file):
-        hdr_file.write('extern pin_obj_t pin_{:s};\n'.format(self.name))
-
-
-class Pins:
-    def __init__(self):
-        self.board_pins = []   # list of pin objects
-
-    def find_pin(self, port, gpio_bit):
-        for pin in self.board_pins:
-            if pin.port == port and pin.gpio_bit == gpio_bit:
-                return pin
-
-    def find_pin_by_num(self, pin_num):
-        for pin in self.board_pins:
-            if pin.pin_num == pin_num:
-                return pin
-
-    def find_pin_by_name(self, name):
-        for pin in self.board_pins:
-            if pin.name == name:
-                return pin
-
-    def parse_af_file(self, filename, pin_col, pinname_col, af_start_col):
-        with open(filename, 'r') as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    (port_num, gpio_bit) = parse_port_pin(row[pinname_col])
-                except:
-                    continue
-                if not row[pin_col].isdigit():
-                    raise ValueError("Invalid pin number {:s} in row {:s}".format(row[pin_col]), row)
-                # Pin numbers must start from 0 when used with the TI API
-                pin_num = int(row[pin_col]) - 1;        
-                pin = Pin(row[pinname_col], port_num, gpio_bit, pin_num)
-                self.board_pins.append(pin)
-                af_idx = 0
-                for af in row[af_start_col:]:
-                    af_splitted = af.split('_')
-                    fn_name = af_splitted[0].rstrip('0123456789')
-                    if  fn_name in SUPPORTED_AFS:
-                        type_name = af_splitted[1]
-                        if type_name in SUPPORTED_AFS[fn_name]:
-                            unit_idx = af_splitted[0][-1]
-                            pin.add_af(AF(af, af_idx, fn_name, int(unit_idx), type_name))
-                    af_idx += 1
-
-    def parse_board_file(self, filename, cpu_pin_col):
-        with open(filename, 'r') as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                # Pin numbers must start from 0 when used with the TI API
-                if row[cpu_pin_col].isdigit():
-                    pin = self.find_pin_by_num(int(row[cpu_pin_col]) - 1)
-                else:
-                    pin = self.find_pin_by_name(row[cpu_pin_col])
-                if pin:
-                    pin.board_pin = True
-
-    def print_named(self, label, pins):
-        print('')
-        print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label))
-        for pin in pins:
-            if pin.board_pin:
-                print('    {{ MP_ROM_QSTR(MP_QSTR_{:6s}), MP_ROM_PTR(&pin_{:6s}) }},'.format(pin.name, pin.name))
-        print('};')
-        print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label));
-
-    def print(self):
-        for pin in self.board_pins:
-            if pin.board_pin:
-                pin.print()
-        self.print_named('board', self.board_pins)
-        print('')
-
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, 'wt') as hdr_file:
-            for pin in self.board_pins:
-                if pin.board_pin:
-                    pin.print_header(hdr_file)
-
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, 'wt') as qstr_file:
-            pin_qstr_set = set([])
-            af_qstr_set = set([])
-            for pin in self.board_pins:
-                if pin.board_pin:
-                    pin_qstr_set |= set([pin.name])
-                    for af in pin.afs:
-                        af_qstr_set |= set([af.name])
-            print('// Board pins', file=qstr_file)
-            for qstr in sorted(pin_qstr_set):
-                print('Q({})'.format(qstr), file=qstr_file)
-            print('\n// Pin AFs', file=qstr_file)
-            for qstr in sorted(af_qstr_set):
-                print('Q({})'.format(qstr), file=qstr_file)
-
-
-def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file"
-    )
-    parser.add_argument(
-        "-a", "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="cc3200_af.csv"
-    )
-    parser.add_argument(
-        "-b", "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p", "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="cc3200_prefix.c"
-    )
-    parser.add_argument(
-        "-q", "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h"
-    )
-    parser.add_argument(
-        "-r", "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h"
-    )
-    args = parser.parse_args(sys.argv[1:])
-
-    pins = Pins()
-
-    print('// This file was automatically generated by make-pins.py')
-    print('//')
-    if args.af_filename:
-        print('// --af {:s}'.format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 0, 1, 3)
-
-    if args.board_filename:
-        print('// --board {:s}'.format(args.board_filename))
-        pins.parse_board_file(args.board_filename, 1)
-
-    if args.prefix_filename:
-        print('// --prefix {:s}'.format(args.prefix_filename))
-        print('')
-        with open(args.prefix_filename, 'r') as prefix_file:
-            print(prefix_file.read())
-    pins.print()
-    pins.print_qstr(args.qstr_filename)
-    pins.print_header(args.hdr_filename)
-
-
-if __name__ == "__main__":
-    main()
diff --git a/ports/cc3200/bootmgr/bootgen.sh b/ports/cc3200/bootmgr/bootgen.sh
deleted file mode 100644
index f4bf32540c..0000000000
--- a/ports/cc3200/bootmgr/bootgen.sh
+++ /dev/null
@@ -1,50 +0,0 @@
-#!/bin/bash
-
-if [ "$#" -ne 1 ]; then
-    echo "Usage: bootgen.sh *build dir*"
-    exit 1
-fi
-
-BUILD=$1
-
-# Re-locator Path
-RELOCATOR=bootmgr/relocator
-
-# Build location
-BOOTMGR=${BUILD}
-
-# Check for re-locator binary
-if [ ! -f $RELOCATOR/relocator.bin ]; then
-
-	echo "Error : Relocator Not found!"
-	exit 1
-else
-	echo "Relocator found..."
-fi
-
-# Check for boot manager binary
-if [ ! -f $BOOTMGR/bootmgr.bin ]; then
-
-	echo "Error : Boot Manager Not found!"
-	exit 1
-else
-	echo "Boot Manager found..."
-fi
-
-# echo
-echo "Generating bootloader..."
-
-# Generate an all 0 bin file
-dd if=/dev/zero of=__tmp.bin ibs=1 count=256 conv=notrunc >/dev/null 2>&1
-
-# Generate a 0 padded version of the relocator 
-dd if=$RELOCATOR/relocator.bin of=__tmp.bin ibs=1 conv=notrunc >/dev/null 2>&1
-
-# Concatenate the re-locator and the boot-manager
-cat __tmp.bin $BOOTMGR/bootmgr.bin > $BOOTMGR/bootloader.bin
-
-# Remove the tmp files
-rm -f __tmp.bin
-
-# Remove bootmgr.bin
-rm -f $BOOTMGR/bootmgr.bin
diff --git a/ports/cc3200/bootmgr/bootloader.mk b/ports/cc3200/bootmgr/bootloader.mk
deleted file mode 100644
index 44f1b7f42d..0000000000
--- a/ports/cc3200/bootmgr/bootloader.mk
+++ /dev/null
@@ -1,132 +0,0 @@
-BUILD = bootmgr/build/$(BOARD)/$(BTYPE)
-
-BOOT_INC  = -Ibootmgr
-BOOT_INC += -Ibootmgr/sl
-BOOT_INC += -Ihal
-BOOT_INC += -Ihal/inc
-BOOT_INC += -I$(TOP)/drivers/cc3100/inc
-BOOT_INC += -Imisc
-BOOT_INC += -Imods
-BOOT_INC += -Isimplelink
-BOOT_INC += -Isimplelink/oslib
-BOOT_INC += -Iutil
-BOOT_INC += -I$(TOP)
-BOOT_INC += -I.
-BOOT_INC += -I$(BUILD)
-
-BOOT_CPPDEFINES = -Dgcc -DBOOTLOADER -DTARGET_IS_CC3200 -DSL_TINY
-
-BOOT_HAL_SRC_C = $(addprefix hal/,\
-	cpu.c \
-	interrupt.c \
-	gpio.c \
-	pin.c \
-	prcm.c \
-	shamd5.c \
-	spi.c \
-	startup_gcc.c \
-	systick.c \
-	utils.c \
-	)
-
-BOOT_CC3100_SRC_C = $(addprefix drivers/cc3100/,\
-	src/device.c \
-	src/driver.c \
-	src/flowcont.c \
-	src/fs.c \
-	src/netapp.c \
-	src/netcfg.c \
-	src/nonos.c \
-	src/socket.c \
-	src/spawn.c \
-	src/wlan.c \
-	)
-
-BOOT_MISC_SRC_C = $(addprefix misc/,\
-	antenna.c \
-	mperror.c \
-	)
-
-BOOT_SL_SRC_C = $(addprefix simplelink/,\
-	cc_pal.c \
-	)
-
-BOOT_UTIL_SRC_C = $(addprefix util/,\
-	cryptohash.c \
-	) 
-
-BOOT_MAIN_SRC_C = \
-	bootmgr/main.c
-
-BOOT_MAIN_SRC_S = \
-	bootmgr/runapp.s
-
-BOOT_PY_SRC_C = $(addprefix py/,\
-	mpprint.c \
-	)
-
-BOOT_LIB_SRC_C = $(addprefix lib/,\
-	libc/string0.c \
-	utils/printf.c \
-	)
-
-OBJ  = $(addprefix $(BUILD)/, $(BOOT_HAL_SRC_C:.c=.o) $(BOOT_SL_SRC_C:.c=.o) $(BOOT_CC3100_SRC_C:.c=.o) $(BOOT_UTIL_SRC_C:.c=.o) $(BOOT_MISC_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(BOOT_MAIN_SRC_C:.c=.o) $(BOOT_MAIN_SRC_S:.s=.o) $(BOOT_PY_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(BOOT_LIB_SRC_C:.c=.o))
-
-# Add the linker script
-LINKER_SCRIPT = bootmgr/bootmgr.lds
-LDFLAGS += -T $(LINKER_SCRIPT)
-
-# Add the bootloader specific CFLAGS
-CFLAGS += $(BOOT_CPPDEFINES) $(BOOT_INC)
-
-# Disable strict aliasing for the simplelink driver
-$(BUILD)/drivers/cc3100/src/driver.o: CFLAGS += -fno-strict-aliasing
-
-# Check if we would like to debug the port code
-ifeq ($(BTYPE), release)
-# Optimize everything and define the NDEBUG flag
-CFLAGS += -Os -DNDEBUG
-else
-ifeq ($(BTYPE), debug)
-# Define the DEBUG flag
-CFLAGS += -DDEBUG=DEBUG
-# Optimize the stable sources only
-$(BUILD)/hal/%.o: CFLAGS += -Os
-$(BUILD)/misc/%.o: CFLAGS += -Os
-$(BUILD)/simplelink/%.o: CFLAGS += -Os
-$(BUILD)/drivers/cc3100/%.o: CFLAGS += -Os
-$(BUILD)/py/%.o: CFLAGS += -Os
-$(BUILD)/ports/stm32/%.o: CFLAGS += -Os
-else
-$(error Invalid BTYPE specified)
-endif
-endif
-
-SHELL = bash
-BOOT_GEN = bootmgr/bootgen.sh
-HEADER_BUILD = $(BUILD)/genhdr
-
-all: $(BUILD)/bootloader.bin
-
-$(BUILD)/bootmgr.axf: $(OBJ) $(LINKER_SCRIPT)
-	$(ECHO) "LINK $@"
-	$(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) $(LIBS)
-	$(Q)$(SIZE) $@
-	
-$(BUILD)/bootmgr.bin: $(BUILD)/bootmgr.axf
-	$(ECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary $< $@
-
-$(BUILD)/bootloader.bin: $(BUILD)/bootmgr.bin
-	$(ECHO) "Create $@"
-	$(Q)$(SHELL) $(BOOT_GEN) $(BUILD)
-
-# Create an empty "qstrdefs.generated.h" needed by py/mkrules.mk
-$(HEADER_BUILD)/qstrdefs.generated.h: | $(HEADER_BUILD)
-	touch $@
-
-# Create an empty "mpversion.h" needed by py/mkrules.mk
-$(HEADER_BUILD)/mpversion.h: | $(HEADER_BUILD)
-	touch $@
diff --git a/ports/cc3200/bootmgr/bootmgr.h b/ports/cc3200/bootmgr/bootmgr.h
deleted file mode 100644
index 5a370f8c99..0000000000
--- a/ports/cc3200/bootmgr/bootmgr.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_BOOTMGR_BOOTMGR_H
-#define MICROPY_INCLUDED_CC3200_BOOTMGR_BOOTMGR_H
-
-//****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-// User image tokens
-//*****************************************************************************
-#define FACTORY_IMG_TOKEN       0x5555AAAA
-#define UPDATE_IMG_TOKEN        0xAA5555AA
-#define USER_BOOT_INFO_TOKEN    0xA5A55A5A
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define APP_IMG_SRAM_OFFSET     0x20004000
-#define DEVICE_IS_CC3101RS      0x18
-#define DEVICE_IS_CC3101S       0x1B
-
-//*****************************************************************************
-// Function prototype
-//*****************************************************************************
-extern void Run(unsigned long);
-
-//****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // MICROPY_INCLUDED_CC3200_BOOTMGR_BOOTMGR_H
diff --git a/ports/cc3200/bootmgr/bootmgr.lds b/ports/cc3200/bootmgr/bootmgr.lds
deleted file mode 100644
index 9c911a0d08..0000000000
--- a/ports/cc3200/bootmgr/bootmgr.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-__stack_size__  = 1024;
-
-MEMORY
-{
-    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
-}
-
-ENTRY(ResetISR)
-
-SECTIONS
-{
-    .text :
-    {
-        _text = .;
-        KEEP(*(.intvecs))
-        *(.boot*)
-        *(.text*)
-        *(.rodata*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-        . = ALIGN(8);
-    } > SRAM
-
-    .ARM :
-    {
-        __exidx_start = .;
-        *(.ARM.exidx*)
-        __exidx_end = .;
-        _etext = .;
-    } > SRAM
-
-    .data :
-    {
-        _data = .;
-        *(.data*)
-        . = ALIGN (8);
-        _edata = .;
-    } > SRAM
-
-    .bss :
-    {
-        _bss = .;
-        *(.bss*)
-        *(COMMON)
-        _ebss = .;
-    } > SRAM
-
-    .stack ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ :
-    {
-        . = ALIGN(8);
-        _stack = .;
-        . = . + __stack_size__;
-        . = ALIGN(8);
-        _estack = .;
-    } > SRAM
-}
-
diff --git a/ports/cc3200/bootmgr/flc.h b/ports/cc3200/bootmgr/flc.h
deleted file mode 100644
index 8f05bb320e..0000000000
--- a/ports/cc3200/bootmgr/flc.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_BOOTMGR_FLC_H
-#define MICROPY_INCLUDED_CC3200_BOOTMGR_FLC_H
-
-/******************************************************************************
-
-   If building with a C++ compiler, make all of the definitions in this header
-   have a C binding.
-  
-*******************************************************************************/
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/******************************************************************************
-   Image file names
-*******************************************************************************/
-#define IMG_BOOT_INFO           "/sys/bootinfo.bin"
-#define IMG_FACTORY             "/sys/factimg.bin"
-#define IMG_UPDATE1             "/sys/updtimg1.bin"
-#define IMG_UPDATE2             "/sys/updtimg2.bin"
-#define IMG_PREFIX              "/sys/updtimg"
-
-#define IMG_SRVPACK             "/sys/servicepack.ucf"
-#define SRVPACK_SIGN            "/sys/servicepack.sig"
-
-#define CA_FILE                 "/cert/ca.pem"
-#define CERT_FILE               "/cert/cert.pem"
-#define KEY_FILE                "/cert/private.key"
-
-/******************************************************************************
-   Special file sizes
-*******************************************************************************/
-#define IMG_SIZE                (192 * 1024)    /* 16KB are reserved for the bootloader and at least 48KB for the heap*/
-#define SRVPACK_SIZE            (16  * 1024)
-#define SIGN_SIZE               (2   * 1024)
-#define CA_KEY_SIZE             (4   * 1024)
-
-/******************************************************************************
-   Active Image
-*******************************************************************************/
-#define IMG_ACT_FACTORY         0
-#define IMG_ACT_UPDATE1         1
-#define IMG_ACT_UPDATE2         2
-
-#define IMG_STATUS_CHECK        0
-#define IMG_STATUS_READY        1
-
-/******************************************************************************
-   Boot Info structure
-*******************************************************************************/
-typedef struct _sBootInfo_t
-{
-  _u8  ActiveImg;
-  _u8  Status;
-  _u8  PrevImg;
-  _u8  : 8;
-} sBootInfo_t;
-
-
-/******************************************************************************
-  
-   Mark the end of the C bindings section for C++ compilers.
-  
-*******************************************************************************/
-#ifdef __cplusplus
-}
-#endif
-
-#endif // MICROPY_INCLUDED_CC3200_BOOTMGR_FLC_H
diff --git a/ports/cc3200/bootmgr/main.c b/ports/cc3200/bootmgr/main.c
deleted file mode 100644
index cfb8dec21d..0000000000
--- a/ports/cc3200/bootmgr/main.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "hw_ints.h"
-#include "hw_types.h"
-#include "hw_gpio.h"
-#include "hw_memmap.h"
-#include "hw_gprcm.h"
-#include "hw_common_reg.h"
-#include "pin.h"
-#include "gpio.h"
-#include "rom_map.h"
-#include "prcm.h"
-#include "simplelink.h"
-#include "interrupt.h"
-#include "gpio.h"
-#include "flc.h"
-#include "bootmgr.h"
-#include "shamd5.h"
-#include "cryptohash.h"
-#include "utils.h"
-#include "cc3200_hal.h"
-#include "debug.h"
-#include "mperror.h"
-#include "antenna.h"
-
-
-//*****************************************************************************
-// Local Constants
-//*****************************************************************************
-#define SL_STOP_TIMEOUT                     35
-#define BOOTMGR_HASH_ALGO                   SHAMD5_ALGO_MD5
-#define BOOTMGR_HASH_SIZE                   32
-#define BOOTMGR_BUFF_SIZE                   512
-
-#define BOOTMGR_WAIT_SAFE_MODE_0_MS         500
-
-#define BOOTMGR_WAIT_SAFE_MODE_1_MS         3000
-#define BOOTMGR_WAIT_SAFE_MODE_1_BLINK_MS   500
-
-#define BOOTMGR_WAIT_SAFE_MODE_2_MS         3000
-#define BOOTMGR_WAIT_SAFE_MODE_2_BLINK_MS   250
-
-#define BOOTMGR_WAIT_SAFE_MODE_3_MS         1500
-#define BOOTMGR_WAIT_SAFE_MODE_3_BLINK_MS   100
-
-//*****************************************************************************
-// Exported functions declarations
-//*****************************************************************************
-extern void bootmgr_run_app (_u32 base);
-
-//*****************************************************************************
-// Local functions declarations
-//*****************************************************************************
-static void bootmgr_board_init (void);
-static bool bootmgr_verify (_u8 *image);
-static void bootmgr_load_and_execute (_u8 *image);
-static bool wait_while_blinking (uint32_t wait_time, uint32_t period, bool force_wait);
-static bool safe_boot_request_start (uint32_t wait_time);
-static void wait_for_safe_boot (sBootInfo_t *psBootInfo);
-static void bootmgr_image_loader (sBootInfo_t *psBootInfo);
-
-//*****************************************************************************
-// Private data
-//*****************************************************************************
-static _u8 bootmgr_file_buf[BOOTMGR_BUFF_SIZE];
-static _u8 bootmgr_hash_buf[BOOTMGR_HASH_SIZE + 1];
-
-//*****************************************************************************
-// Vector Table
-//*****************************************************************************
-extern void (* const g_pfnVectors[])(void);
-
-//*****************************************************************************
-// WLAN Event handler callback hookup function
-//*****************************************************************************
-void SimpleLinkWlanEventHandler(SlWlanEvent_t *pWlanEvent)
-{
-
-}
-
-//*****************************************************************************
-// HTTP Server callback hookup function
-//*****************************************************************************
-void SimpleLinkHttpServerCallback(SlHttpServerEvent_t *pHttpEvent,
-                                  SlHttpServerResponse_t *pHttpResponse)
-{
-
-}
-
-//*****************************************************************************
-// Net APP Event callback hookup function
-//*****************************************************************************
-void SimpleLinkNetAppEventHandler(SlNetAppEvent_t *pNetAppEvent)
-{
-
-}
-
-//*****************************************************************************
-// General Event callback hookup function
-//*****************************************************************************
-void SimpleLinkGeneralEventHandler(SlDeviceEvent_t *pDevEvent)
-{
-
-}
-
-//*****************************************************************************
-// Socket Event callback hookup function
-//*****************************************************************************
-void SimpleLinkSockEventHandler(SlSockEvent_t *pSock)
-{
-
-}
-
-//*****************************************************************************
-//! Board Initialization & Configuration
-//*****************************************************************************
-static void bootmgr_board_init(void) {
-    // set the vector table base
-    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);
-
-    // enable processor interrupts
-    MAP_IntMasterEnable();
-    MAP_IntEnable(FAULT_SYSTICK);
-
-    // mandatory MCU initialization
-    PRCMCC3200MCUInit();
-
-    // clear all the special bits, since we can't trust their content after reset
-    // except for the WDT reset one!!
-    PRCMClearSpecialBit(PRCM_SAFE_BOOT_BIT);
-    PRCMClearSpecialBit(PRCM_FIRST_BOOT_BIT);
-
-    // check the reset after clearing the special bits
-    mperror_bootloader_check_reset_cause();
-
-#if MICROPY_HW_ANTENNA_DIVERSITY
-    // configure the antenna selection pins
-    antenna_init0();
-#endif
-
-    // enable the data hashing engine
-    CRYPTOHASH_Init();
-
-    // init the system led and the system switch
-    mperror_init0();
-}
-
-//*****************************************************************************
-//! Verifies the integrity of the new application binary
-//*****************************************************************************
-static bool bootmgr_verify (_u8 *image) {
-    SlFsFileInfo_t FsFileInfo;
-    _u32 reqlen, offset = 0;
-    _i32 fHandle;
-
-    // open the file for reading
-    if (0 == sl_FsOpen(image, FS_MODE_OPEN_READ, NULL, &fHandle)) {
-        // get the file size
-        sl_FsGetInfo(image, 0, &FsFileInfo);
-
-        if (FsFileInfo.FileLen > BOOTMGR_HASH_SIZE) {
-            FsFileInfo.FileLen -= BOOTMGR_HASH_SIZE;
-            CRYPTOHASH_SHAMD5Start(BOOTMGR_HASH_ALGO, FsFileInfo.FileLen);
-            do {
-                if ((FsFileInfo.FileLen - offset) > BOOTMGR_BUFF_SIZE) {
-                    reqlen = BOOTMGR_BUFF_SIZE;
-                }
-                else {
-                    reqlen = FsFileInfo.FileLen - offset;
-                }
-
-                offset += sl_FsRead(fHandle, offset, bootmgr_file_buf, reqlen);
-                CRYPTOHASH_SHAMD5Update(bootmgr_file_buf, reqlen);
-            } while (offset < FsFileInfo.FileLen);
-
-            CRYPTOHASH_SHAMD5Read (bootmgr_file_buf);
-
-            // convert the resulting hash to hex
-            for (_u32 i = 0; i < (BOOTMGR_HASH_SIZE / 2); i++) {
-                snprintf ((char *)&bootmgr_hash_buf[(i * 2)], 3, "%02x", bootmgr_file_buf[i]);
-            }
-
-            // read the hash from the file and close it
-            sl_FsRead(fHandle, offset, bootmgr_file_buf, BOOTMGR_HASH_SIZE);
-            sl_FsClose (fHandle, NULL, NULL, 0);
-            bootmgr_file_buf[BOOTMGR_HASH_SIZE] = '\0';
-            // compare both hashes
-            if (!strcmp((const char *)bootmgr_hash_buf, (const char *)bootmgr_file_buf)) {
-                // it's a match
-                return true;
-            }
-        }
-        // close the file
-        sl_FsClose(fHandle, NULL, NULL, 0);
-    }
-    return false;
-}
-
-//*****************************************************************************
-//! Loads the application from sFlash and executes
-//*****************************************************************************
-static void bootmgr_load_and_execute (_u8 *image) {
-    SlFsFileInfo_t pFsFileInfo;
-    _i32 fhandle;
-    // open the application binary
-    if (!sl_FsOpen(image, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-        // get the file size
-        if (!sl_FsGetInfo(image, 0, &pFsFileInfo)) {
-            // read the application into SRAM
-            if (pFsFileInfo.FileLen == sl_FsRead(fhandle, 0, (unsigned char *)APP_IMG_SRAM_OFFSET, pFsFileInfo.FileLen)) {
-                // close the file
-                sl_FsClose(fhandle, 0, 0, 0);
-                // stop the network services
-                sl_Stop(SL_STOP_TIMEOUT);
-                // execute the application
-                bootmgr_run_app(APP_IMG_SRAM_OFFSET);
-            }
-        }
-    }
-}
-
-//*****************************************************************************
-//! Wait while the safe mode pin is being held high and blink the system led
-//! with the specified period
-//*****************************************************************************
-static bool wait_while_blinking (uint32_t wait_time, uint32_t period, bool force_wait) {
-    _u32 count;
-    for (count = 0; (force_wait || MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN)) &&
-         ((period * count) < wait_time); count++) {
-        // toogle the led
-        MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, ~MAP_GPIOPinRead(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN));
-        UtilsDelay(UTILS_DELAY_US_TO_COUNT(period * 1000));
-    }
-    return MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN) ? true : false;
-}
-
-static bool safe_boot_request_start (uint32_t wait_time) {
-    if (MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN)) {
-        UtilsDelay(UTILS_DELAY_US_TO_COUNT(wait_time * 1000));
-    }
-    return MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN) ? true : false;
-}
-
-//*****************************************************************************
-//! Check for the safe mode pin
-//*****************************************************************************
-static void wait_for_safe_boot (sBootInfo_t *psBootInfo) {
-    if (safe_boot_request_start(BOOTMGR_WAIT_SAFE_MODE_0_MS)) {
-        if (wait_while_blinking(BOOTMGR_WAIT_SAFE_MODE_1_MS, BOOTMGR_WAIT_SAFE_MODE_1_BLINK_MS, false)) {
-            // go back one step in time
-            psBootInfo->ActiveImg = psBootInfo->PrevImg;
-            if (wait_while_blinking(BOOTMGR_WAIT_SAFE_MODE_2_MS, BOOTMGR_WAIT_SAFE_MODE_2_BLINK_MS, false)) {
-                // go back directly to the factory image
-                psBootInfo->ActiveImg = IMG_ACT_FACTORY;
-                wait_while_blinking(BOOTMGR_WAIT_SAFE_MODE_3_MS, BOOTMGR_WAIT_SAFE_MODE_3_BLINK_MS, true);
-            }
-        }
-        // turn off the system led
-        MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, 0);
-        // request a safe boot to the application
-        PRCMSetSpecialBit(PRCM_SAFE_BOOT_BIT);
-    }
-    // deinit the safe boot pin
-    mperror_deinit_sfe_pin();
-}
-
-//*****************************************************************************
-//! Load the proper image based on the information from the boot info
-//! and launch it.
-//*****************************************************************************
-static void bootmgr_image_loader(sBootInfo_t *psBootInfo) {
-    _i32 fhandle;
-    _u8 *image;
-
-    // search for the active image
-    switch (psBootInfo->ActiveImg) {
-    case IMG_ACT_UPDATE1:
-        image = (unsigned char *)IMG_UPDATE1;
-        break;
-    case IMG_ACT_UPDATE2:
-        image = (unsigned char *)IMG_UPDATE2;
-        break;
-    default:
-        image = (unsigned char *)IMG_FACTORY;
-        break;
-    }
-
-    // do we have a new image that needs to be verified?
-    if ((psBootInfo->ActiveImg != IMG_ACT_FACTORY) && (psBootInfo->Status == IMG_STATUS_CHECK)) {
-        if (!bootmgr_verify(image)) {
-            // verification failed, delete the broken file
-            sl_FsDel(image, 0);
-            // switch to the previous image
-            psBootInfo->ActiveImg = psBootInfo->PrevImg;
-            psBootInfo->PrevImg = IMG_ACT_FACTORY;
-        }
-        // in any case, change the status to "READY"
-        psBootInfo->Status = IMG_STATUS_READY;
-        // write the new boot info
-        if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_WRITE, NULL, &fhandle)) {
-            sl_FsWrite(fhandle, 0, (unsigned char *)psBootInfo, sizeof(sBootInfo_t));
-            // close the file
-            sl_FsClose(fhandle, 0, 0, 0);
-        }
-    }
-
-    // this one might modify the boot info hence it MUST be called after
-    // bootmgr_verify! (so that the changes are not saved to flash)
-    wait_for_safe_boot(psBootInfo);
-
-    // select the active image again, since it might have changed
-    switch (psBootInfo->ActiveImg) {
-    case IMG_ACT_UPDATE1:
-        image = (unsigned char *)IMG_UPDATE1;
-        break;
-    case IMG_ACT_UPDATE2:
-        image = (unsigned char *)IMG_UPDATE2;
-        break;
-    default:
-        image = (unsigned char *)IMG_FACTORY;
-        break;
-    }
-    bootmgr_load_and_execute(image);
-}
-
-//*****************************************************************************
-//! Main function
-//*****************************************************************************
-int main (void) {
-    sBootInfo_t sBootInfo = { .ActiveImg = IMG_ACT_FACTORY, .Status = IMG_STATUS_READY, .PrevImg = IMG_ACT_FACTORY };
-    bool bootapp = false;
-    _i32 fhandle;
-
-    // board setup
-    bootmgr_board_init();
-
-    // start simplelink since we need it to access the sflash
-    sl_Start(0, 0, 0);
-
-    // if a boot info file is found, load it, else, create a new one with the default boot info
-    if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-        if (sizeof(sBootInfo_t) == sl_FsRead(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t))) {
-            bootapp = true;
-        }
-        sl_FsClose(fhandle, 0, 0, 0);
-    }
-    // boot info file not present, it means that this is the first boot after being programmed
-    if (!bootapp) {
-        // create a new boot info file
-        _u32 BootInfoCreateFlag  = _FS_FILE_OPEN_FLAG_COMMIT | _FS_FILE_PUBLIC_WRITE | _FS_FILE_PUBLIC_READ;
-        if (!sl_FsOpen ((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_CREATE((2 * sizeof(sBootInfo_t)),
-                        BootInfoCreateFlag), NULL, &fhandle)) {
-            // write the default boot info.
-            if (sizeof(sBootInfo_t) == sl_FsWrite(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t))) {
-                bootapp = true;
-            }
-            sl_FsClose(fhandle, 0, 0, 0);
-        }
-        // signal the first boot to the application
-        PRCMSetSpecialBit(PRCM_FIRST_BOOT_BIT);
-    }
-
-    if (bootapp) {
-        // load and execute the image based on the boot info
-        bootmgr_image_loader(&sBootInfo);
-    }
-
-    // stop simplelink
-    sl_Stop(SL_STOP_TIMEOUT);
-
-    // if we've reached this point, then it means that a fatal error has occurred and the
-    // application could not be loaded, so, loop forever and signal the crash to the user
-    while (true) {
-        // keep the bld on
-        MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, MICROPY_SYS_LED_PORT_PIN);
-        __asm volatile(" dsb \n"
-                       " isb \n"
-                       " wfi \n");
-    }
-}
-
-//*****************************************************************************
-//! The following stub function is needed to link mp_vprintf
-//*****************************************************************************
-#include "py/qstr.h"
-
-const byte *qstr_data(qstr q, size_t *len) {
-    *len = 0;
-    return NULL;
-}
diff --git a/ports/cc3200/bootmgr/relocator/relocator.bin b/ports/cc3200/bootmgr/relocator/relocator.bin
deleted file mode 100644
index b1ac51005a..0000000000
Binary files a/ports/cc3200/bootmgr/relocator/relocator.bin and /dev/null differ
diff --git a/ports/cc3200/bootmgr/runapp.s b/ports/cc3200/bootmgr/runapp.s
deleted file mode 100644
index 45c6dcb195..0000000000
--- a/ports/cc3200/bootmgr/runapp.s
+++ /dev/null
@@ -1,19 +0,0 @@
-    .syntax unified
-    .cpu cortex-m4
-    .thumb
-    .text
-    .align  2
-
-@ void bootmgr_run_app(_u32 base)
-    .global bootmgr_run_app
-    .thumb
-    .thumb_func
-    .type   bootmgr_run_app, %function
-bootmgr_run_app:
-    @ set the SP
-    ldr    sp, [r0]
-    add    r0, r0, #4
-
-    @ jump to the entry code
-    ldr    r1, [r0]
-    bx     r1
diff --git a/ports/cc3200/bootmgr/sl/user.h b/ports/cc3200/bootmgr/sl/user.h
deleted file mode 100644
index be93029d1c..0000000000
--- a/ports/cc3200/bootmgr/sl/user.h
+++ /dev/null
@@ -1,1063 +0,0 @@
-/*
- * user.h - CC31xx/CC32xx Host Driver Implementation
- *
- * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
- * 
- * 
- *  Redistribution and use in source and binary forms, with or without 
- *  modification, are permitted provided that the following conditions 
- *  are met:
- *
- *    Redistributions of source code must retain the above copyright 
- *    notice, this list of conditions and the following disclaimer.
- *
- *    Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the 
- *    documentation and/or other materials provided with the   
- *    distribution.
- *
- *    Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
-*/
-
-    
-
-#ifndef __USER_H__
-#define __USER_H__
-
-#ifdef  __cplusplus
-extern "C" {
-#endif
-
-
-
-
-
-/*!
- ******************************************************************************
-
-    \defgroup       porting_user_include        Porting - User Include Files
-
-    This section IS NOT REQUIRED in case user provided primitives are handled
-    in makefiles or project configurations (IDE)
-
-    PORTING ACTION:
-        - Include all required header files for the definition of:
-            -# Transport layer library API (e.g. SPI, UART)
-            -# OS primitives definitions (e.g. Task spawn, Semaphores)
-            -# Memory management primitives (e.g. alloc, free)
-
- ******************************************************************************
- */
-  
-#include   
-#include "cc_pal.h"
-
-/*!
-	\def		MAX_CONCURRENT_ACTIONS
-
-    \brief      Defines the maximum number of concurrent action in the system
-				Min:1 , Max: 32
-
-                Actions which has async events as return, can be
-
-    \sa
-
-    \note       In case there are not enough resources for the actions needed in the system,
-	        	error is received: POOL_IS_EMPTY
-			    one option is to increase MAX_CONCURRENT_ACTIONS
-				(improves performance but results in memory consumption)
-		     	Other option is to call the API later (decrease performance)
-
-    \warning    In case of setting to one, recommend to use non-blocking recv\recvfrom to allow
-				multiple socket recv
-*/
-#define MAX_CONCURRENT_ACTIONS 10
-/*!
-	\def		CPU_FREQ_IN_MHZ
-    \brief      Defines CPU frequency for Host side, for better accuracy of busy loops, if any
-    \sa             
-    \note       
-
-    \warning    If not set the default CPU frequency is set to 200MHz
-                This option will be deprecated in future release
-*/
-
-#define CPU_FREQ_IN_MHZ        80
-
-
-/*!
- ******************************************************************************
-
-    \defgroup       porting_capabilities        Porting - Capabilities Set
-
-    This section IS NOT REQUIRED in case one of the following pre defined
-    capabilities set is in use:
-    - SL_TINY
-    - SL_SMALL
-    - SL_FULL
-
-    PORTING ACTION:
-        - Define one of the pre-defined capabilities set or uncomment the
-          relevant definitions below to select the required capabilities
-
-    @{
-
- *******************************************************************************
-*/
-
-/*!
-	\def		SL_INC_ARG_CHECK
-
-    \brief      Defines whether the SimpleLink driver perform argument check
-                or not
-
-                When defined, the SimpleLink driver perform argument check on
-                function call. Removing this define could reduce some code
-                size and improve slightly the performances but may impact in
-                unpredictable behavior in case of invalid arguments
-
-    \sa
-
-    \note       belongs to \ref proting_sec
-
-    \warning    Removing argument check may cause unpredictable behavior in
-                case of invalid arguments.
-                In this case the user is responsible to argument validity
-                (for example all handlers must not be NULL)
-*/
-#define SL_INC_ARG_CHECK
-
-
-/*!
-    \def		SL_INC_STD_BSD_API_NAMING
-
-    \brief      Defines whether SimpleLink driver should expose standard BSD
-                APIs or not
-
-                When defined, the SimpleLink driver in addtion to its alternative
-                BSD APIs expose also standard BSD APIs.
-    Stadrad BSD API includs the following functions:
-                socket , close , accept , bind , listen	, connect , select ,
-                setsockopt	, getsockopt , recv , recvfrom , write , send , sendto ,
-                gethostbyname
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_STD_BSD_API_NAMING
-
-
-/*!
-    \brief      Defines whether to include extended API in SimpleLink driver
-                or not
-
-                When defined, the SimpleLink driver will include also all
-                exteded API of the included packages
-
-    \sa             ext_api
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_EXT_API
-
-/*!
-    \brief      Defines whether to include WLAN package in SimpleLink driver
-                or not
-
-                When defined, the SimpleLink driver will include also
-                the WLAN package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_WLAN_PKG
-
-/*!
-    \brief      Defines whether to include SOCKET package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also
-                the SOCKET package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCKET_PKG
-
-/*!
-    \brief      Defines whether to include NET_APP package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also the
-                NET_APP package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_NET_APP_PKG
-
-/*!
-    \brief      Defines whether to include NET_CFG package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also
-                the NET_CFG package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_NET_CFG_PKG
-
-/*!
-    \brief      Defines whether to include NVMEM package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also the
-                NVMEM package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_NVMEM_PKG
-
-/*!
-    \brief      Defines whether to include socket server side APIs
-                in SimpleLink driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                server side APIs
-
-    \sa             server_side
-
-    \note
-
-    \warning
-*/
-#define SL_INC_SOCK_SERVER_SIDE_API
-
-/*!
-    \brief      Defines whether to include socket client side APIs in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                client side APIs
-
-    \sa             client_side
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCK_CLIENT_SIDE_API
-
-/*!
-    \brief      Defines whether to include socket receive APIs in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                receive side APIs
-
-    \sa             recv_api
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCK_RECV_API
-
-/*!
-    \brief      Defines whether to include socket send APIs in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                send side APIs
-
-    \sa             send_api
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCK_SEND_API
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-
-/*!
- ******************************************************************************
-
-    \defgroup   ported_enable_device       Ported on CC32XX - Device Enable/Disable
-
-    The enable/disable API provide mechanism to enable/disable the network processor
-
-   
-    PORTING ACTION:
-        - None
-    @{
-
- ******************************************************************************
- */
-
-/*!
-    \brief		Preamble to the enabling the Network Processor.
-                        Placeholder to implement any pre-process operations
-                        before enabling networking operations.
-
-    \sa			sl_DeviceEnable
-
-    \note       belongs to \ref ported_sec
-
-*/
-#ifdef DEBUG
-#define sl_DeviceEnablePreamble()       NwpPowerOnPreamble()
-#else
-#define sl_DeviceEnablePreamble()
-#endif
-
-/*!
-    \brief		Enable the Network Processor
-
-    \sa			sl_DeviceDisable
-
-    \note       belongs to \ref ported_sec
-
-*/
-#define sl_DeviceEnable()			NwpPowerOn()
-
-/*!
-    \brief		Disable the Network Processor
-
-    \sa			sl_DeviceEnable
-
-    \note       belongs to \ref ported_sec
-*/
-#define sl_DeviceDisable() 			NwpPowerOff()
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-/*!
- ******************************************************************************
-
-    \defgroup   ported_interface         Ported on CC32XX - Communication Interface
-
-    The simple link device can work with different communication
-    channels (e.g. spi/uart). Texas Instruments provides single driver
-    that can work with all these types. This section bind between the
-    physical communication interface channel and the SimpleLink driver
-
-
-    \note       Correct and efficient implementation of this driver is critical
-                for the performances of the SimpleLink device on this platform.
-
-
-    PORTING ACTION:
-        - None
-
-    @{
-
- ******************************************************************************
-*/
-
-#define _SlFd_t					Fd_t
-
-/*!
-    \brief      Opens an interface communication port to be used for communicating
-                with a SimpleLink device
-
-	            Given an interface name and option flags, this function opens
-                the communication port and creates a file descriptor.
-                This file descriptor is used afterwards to read and write
-                data from and to this specific communication channel.
-	            The speed, clock polarity, clock phase, chip select and all other
-                specific attributes of the channel are all should be set to hardcoded
-                in this function.
-
-	\param	 	ifName  -   points to the interface name/path. The interface name is an
-                            optional attributes that the simple link driver receives
-                            on opening the driver (sl_Start).
-                            In systems that the spi channel is not implemented as
-                            part of the os device drivers, this parameter could be NULL.
-
-	\param      flags   -   optional flags parameters for future use
-
-	\return     upon successful completion, the function shall open the channel
-                and return a non-negative integer representing the file descriptor.
-                Otherwise, -1 shall be returned
-
-    \sa         sl_IfClose , sl_IfRead , sl_IfWrite
-
-	\note       The prototype of the function is as follow:
-                    Fd_t xxx_IfOpen(char* pIfName , unsigned long flags);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfOpen                           spi_Open
-
-/*!
-    \brief      Closes an opened interface communication port
-
-	\param	 	fd  -   file descriptor of opened communication channel
-
-	\return		upon successful completion, the function shall return 0.
-			    Otherwise, -1 shall be returned
-
-    \sa         sl_IfOpen , sl_IfRead , sl_IfWrite
-
-	\note       The prototype of the function is as follow:
-                    int xxx_IfClose(Fd_t Fd);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfClose                          spi_Close
-
-/*!
-    \brief      Attempts to read up to len bytes from an opened communication channel
-                into a buffer starting at pBuff.
-
-	\param	 	fd      -   file descriptor of an opened communication channel
-
-	\param		pBuff   -   pointer to the first location of a buffer that contains enough
-                            space for all expected data
-
-	\param      len     -   number of bytes to read from the communication channel
-
-	\return     upon successful completion, the function shall return the number of read bytes.
-                Otherwise, 0 shall be returned
-
-    \sa         sl_IfClose , sl_IfOpen , sl_IfWrite
-
-
-	\note       The prototype of the function is as follow:
-                    int xxx_IfRead(Fd_t Fd , char* pBuff , int Len);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfRead                           spi_Read
-
-/*!
-    \brief attempts to write up to len bytes to the SPI channel
-
-	\param	 	fd      -   file descriptor of an opened communication channel
-
-	\param		pBuff   -   pointer to the first location of a buffer that contains
-                            the data to send over the communication channel
-
-	\param      len     -   number of bytes to write to the communication channel
-
-	\return     upon successful completion, the function shall return the number of sent bytes.
-				therwise, 0 shall be returned
-
-    \sa         sl_IfClose , sl_IfOpen , sl_IfRead
-
-	\note       This function could be implemented as zero copy and return only upon successful completion
-                of writing the whole buffer, but in cases that memory allocation is not too tight, the
-                function could copy the data to internal buffer, return back and complete the write in
-                parallel to other activities as long as the other SPI activities would be blocked until
-                the entire buffer write would be completed
-
-               The prototype of the function is as follow:
-                    int xxx_IfWrite(Fd_t Fd , char* pBuff , int Len);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfWrite                          spi_Write
-
-/*!
-    \brief 		register an interrupt handler routine for the host IRQ
-
-	\param	 	InterruptHdl	-	pointer to interrupt handler routine
-
-	\param 		pValue			-	pointer to a memory structure that is passed
-									to the interrupt handler.
-
-	\return		upon successful registration, the function shall return 0.
-				Otherwise, -1 shall be returned
-
-    \sa
-
-	\note		If there is already registered interrupt handler, the function
-				should overwrite the old handler with the new one
-
-	\note       If the handler is a null pointer, the function should un-register the
-	            interrupt handler, and the interrupts can be disabled.
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfRegIntHdlr(InterruptHdl , pValue)          NwpRegisterInterruptHandler(InterruptHdl , pValue)
-
-/*!
-    \brief 		Masks the Host IRQ
-
-    \sa		sl_IfUnMaskIntHdlr
-
-
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-
-
-#define sl_IfMaskIntHdlr()								NwpMaskInterrupt()
-
-/*!
-    \brief 		Unmasks the Host IRQ
-
-    \sa		sl_IfMaskIntHdlr
-
-
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-
-#define sl_IfUnMaskIntHdlr()								NwpUnMaskInterrupt()
-    
-/*!
-    \brief 		Write Handers for statistics debug on write 
-
-	\param	 	interface handler	-	pointer to interrupt handler routine
-
-
-	\return		no return value
-
-    \sa
-
-	\note		An optional hooks for monitoring before and after write info
-
-    \note       belongs to \ref ported_sec
-
-    \warning        
-*/
-/* #define SL_START_WRITE_STAT */
-
-
-/*!
-
- Close the Doxygen group.
- @}
-
-*/
-
-/*!
- ******************************************************************************
-
-    \defgroup   ported_os          Ported on CC32XX - Operating System
-
-    The simple link driver can run on multi-threaded environment as well
-    as non-os environment (mail loop)
-
-    This section IS NOT REQUIRED in case you are working on non-os environment.
-
-    If you choose to work in multi-threaded environment under any operating system
-    you will have to provide some basic adaptation routines to allow the driver
-    to protect access to resources from different threads (locking object) and
-    to allow synchronization between threads (sync objects).
-
-    PORTING ACTION:
-        -# Uncomment SL_PLATFORM_MULTI_THREADED define
-        -# Bind locking object routines
-        -# Bind synchronization object routines
-        -# Optional - Bind spawn thread routine
-
-    @{
-
- ******************************************************************************
-*/
-
-/*
-#define SL_PLATFORM_MULTI_THREADED
-*/
-
-#ifdef SL_PLATFORM_MULTI_THREADED
-#include "osi.h"
-
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define SL_OS_RET_CODE_OK                       ((int)OSI_OK)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define SL_OS_WAIT_FOREVER                      ((OsiTime_t)OSI_WAIT_FOREVER)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define SL_OS_NO_WAIT	                        ((OsiTime_t)OSI_NO_WAIT)
-
-/*!
-	\brief type definition for a time value
-
-	\note	On each porting or platform the type could be whatever is needed - integer, pointer to structure etc.
-
-    \note       belongs to \ref ported_sec
-*/
-#define _SlTime_t				OsiTime_t
-
-/*!
-	\brief 	type definition for a sync object container
-
-	Sync object is object used to synchronize between two threads or thread and interrupt handler.
-	One thread is waiting on the object and the other thread send a signal, which then
-	release the waiting thread.
-	The signal must be able to be sent from interrupt context.
-	This object is generally implemented by binary semaphore or events.
-
-	\note	On each porting or platform the type could be whatever is needed - integer, structure etc.
-
-    \note       belongs to \ref ported_sec
-*/
-typedef OsiSyncObj_t                            _SlSyncObj_t;
-
-
-/*!
-	\brief 	This function creates a sync object
-
-	The sync object is used for synchronization between diffrent thread or ISR and
-	a thread.
-
-	\param	pSyncObj	-	pointer to the sync object control block
-
-	\return upon successful creation the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_SyncObjCreate(pSyncObj,pName)            osi_SyncObjCreate(pSyncObj)
-
-
-/*!
-	\brief 	This function deletes a sync object
-
-	\param	pSyncObj	-	pointer to the sync object control block
-
-	\return upon successful deletion the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_SyncObjDelete(pSyncObj)                  osi_SyncObjDelete(pSyncObj)
-
-
-/*!
-	\brief 		This function generates a sync signal for the object.
-
-	All suspended threads waiting on this sync object are resumed
-
-	\param		pSyncObj	-	pointer to the sync object control block
-
-	\return 	upon successful signaling the function should return 0
-				Otherwise, a negative value indicating the error code shall be returned
-	\note		the function could be called from ISR context
-    \warning
-*/
-#define sl_SyncObjSignal(pSyncObj)                osi_SyncObjSignal(pSyncObj)
-
-/*!
-	\brief 		This function generates a sync signal for the object from Interrupt
-
-	This is for RTOS that should signal from IRQ using a dedicated API
-
-	\param		pSyncObj	-	pointer to the sync object control block
-
-	\return 	upon successful signaling the function should return 0
-				Otherwise, a negative value indicating the error code shall be returned
-	\note		the function could be called from ISR context
-	\warning
-*/
-#define sl_SyncObjSignalFromIRQ(pSyncObj)           osi_SyncObjSignalFromISR(pSyncObj)
-
-/*!
-	\brief 	This function waits for a sync signal of the specific sync object
-
-	\param	pSyncObj	-	pointer to the sync object control block
-	\param	Timeout		-	numeric value specifies the maximum number of mSec to
-							stay suspended while waiting for the sync signal
-							Currently, the simple link driver uses only two values:
-								- OSI_WAIT_FOREVER
-								- OSI_NO_WAIT
-
-	\return upon successful reception of the signal within the timeout window return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_SyncObjWait(pSyncObj,Timeout)            osi_SyncObjWait(pSyncObj,Timeout)
-
-/*!
-	\brief 	type definition for a locking object container
-
-	Locking object are used to protect a resource from mutual accesses of two or more threads.
-	The locking object should suppurt reentrant locks by a signal thread.
-	This object is generally implemented by mutex semaphore
-
-	\note	On each porting or platform the type could be whatever is needed - integer, structure etc.
-    \note       belongs to \ref ported_sec
-*/
-typedef OsiLockObj_t                            _SlLockObj_t;
-
-/*!
-	\brief 	This function creates a locking object.
-
-	The locking object is used for protecting a shared resources between different
-	threads.
-
-	\param	pLockObj	-	pointer to the locking object control block
-
-	\return upon successful creation the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjCreate(pLockObj,pName)            osi_LockObjCreate(pLockObj)
-
-/*!
-	\brief 	This function deletes a locking object.
-
-	\param	pLockObj	-	pointer to the locking object control block
-
-	\return upon successful deletion the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjDelete(pLockObj)                  osi_LockObjDelete(pLockObj)
-
-/*!
-	\brief 	This function locks a locking object.
-
-	All other threads that call this function before this thread calls
-	the osi_LockObjUnlock would be suspended
-
-	\param	pLockObj	-	pointer to the locking object control block
-	\param	Timeout		-	numeric value specifies the maximum number of mSec to
-							stay suspended while waiting for the locking object
-							Currently, the simple link driver uses only two values:
-								- OSI_WAIT_FOREVER
-								- OSI_NO_WAIT
-
-
-	\return upon successful reception of the locking object the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjLock(pLockObj,Timeout)           osi_LockObjLock(pLockObj,Timeout)
-
-/*!
-	\brief 	This function unlock a locking object.
-
-	\param	pLockObj	-	pointer to the locking object control block
-
-	\return upon successful unlocking the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjUnlock(pLockObj)                   osi_LockObjUnlock(pLockObj)
-
-#endif
-/*!
-	\brief 	This function call the pEntry callback from a different context
-
-	\param	pEntry		-	pointer to the entry callback function
-
-	\param	pValue		- 	pointer to any type of memory structure that would be
-							passed to pEntry callback from the execution thread.
-
-	\param	flags		- 	execution flags - reserved for future usage
-
-	\return upon successful registration of the spawn the function should return 0
-			(the function is not blocked till the end of the execution of the function
-			and could be returned before the execution is actually completed)
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-//#define SL_PLATFORM_EXTERNAL_SPAWN
-
-#ifdef SL_PLATFORM_EXTERNAL_SPAWN
-#define sl_Spawn(pEntry,pValue,flags)       osi_Spawn(pEntry,pValue,flags)
-#endif
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-/*!
- ******************************************************************************
-
-    \defgroup   porting_mem_mgm             Porting - Memory Management
-
-    This section declare in which memory management model the SimpleLink driver
-    will run:
-        -# Static
-        -# Dynamic
-
-    This section IS NOT REQUIRED in case Static model is selected.
-
-    The default memory model is Static
-
-    PORTING ACTION:
-        - If dynamic model is selected, define the alloc and free functions.
-
-    @{
-
- *****************************************************************************
-*/
-
-/*!
-    \brief      Defines whether the SimpleLink driver is working in dynamic
-                memory model or not
-
-                When defined, the SimpleLink driver use dynamic allocations
-                if dynamic allocation is selected malloc and free functions
-                must be retrieved
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define SL_MEMORY_MGMT_DYNAMIC 	        1
-#define SL_MEMORY_MGMT_STATIC           0
-
-#define SL_MEMORY_MGMT                  SL_MEMORY_MGMT_STATIC
-
-#ifdef SL_MEMORY_MGMT_DYNAMIC
-#ifdef SL_PLATFORM_MULTI_THREADED
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define sl_Malloc(Size)                                 mem_Malloc(Size)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define sl_Free(pMem)                                   mem_Free(pMem)
-#else
-#include 
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning        
-*/
-#define sl_Malloc(Size)                                 malloc(Size)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning        
-*/
-#define sl_Free(pMem)                                   free(pMem)
-#endif
-#endif
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-
-/*!
- ******************************************************************************
-
-    \defgroup       porting_events      Porting - Event Handlers
-
-    This section includes the asynchronous event handlers routines
-
-    PORTING ACTION:
-        -Uncomment the required handler and define your routine as the value
-        of this handler
-
-    @{
-
- ******************************************************************************
- */
-
-/*!
-    \brief
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_GeneralEvtHdlr                   SimpleLinkGeneralEventHandler
-
-
-/*!
-    \brief          An event handler for WLAN connection or disconnection indication
-                    This event handles async WLAN events. 
-                    Possible events are:
-                    SL_WLAN_CONNECT_EVENT - indicates WLAN is connected 
-                    SL_WLAN_DISCONNECT_EVENT - indicates WLAN is disconnected
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_WlanEvtHdlr                     SimpleLinkWlanEventHandler
-
-
-/*!
-    \brief          An event handler for IP address asynchronous event. Usually accepted after new WLAN connection.
-                    This event handles networking events.
-                    Possible events are:
-                    SL_NETAPP_IPV4_ACQUIRED - IP address was acquired (DHCP or Static)
-
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_NetAppEvtHdlr              		SimpleLinkNetAppEventHandler
-
-/*!
-    \brief          A callback for HTTP server events.
-                    Possible events are:
-                    SL_NETAPP_HTTPGETTOKENVALUE - NWP requests to get the value of a specific token
-					SL_NETAPP_HTTPPOSTTOKENVALUE - NWP post to the host a new value for a specific token
-
-	\param			pServerEvent - Contains the relevant event information (SL_NETAPP_HTTPGETTOKENVALUE or SL_NETAPP_HTTPPOSTTOKENVALUE)
-
-	\param			pServerResponse - Should be filled by the user with the relevant response information (i.e SL_NETAPP_HTTPSETTOKENVALUE as a response to SL_NETAPP_HTTPGETTOKENVALUE event)
-
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_HttpServerCallback   SimpleLinkHttpServerCallback
-/*!
-    \brief
-
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_SockEvtHdlr         SimpleLinkSockEventHandler
-
-
-
-#define _SL_USER_TYPES
-#define _u8         unsigned char
-#define _i8         signed char
-
-#define _u16        unsigned short
-#define _i16        signed short
-
-#define _u32        unsigned int
-#define _i32        signed int
-#define _volatile   volatile
-#define _const      const
-
-
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-
-#ifdef  __cplusplus
-}
-#endif // __cplusplus
-
-#endif // __USER_H__
diff --git a/ports/cc3200/fatfs/src/drivers/sd_diskio.c b/ports/cc3200/fatfs/src/drivers/sd_diskio.c
deleted file mode 100644
index 0a1379181b..0000000000
--- a/ports/cc3200/fatfs/src/drivers/sd_diskio.c
+++ /dev/null
@@ -1,433 +0,0 @@
-//*****************************************************************************
-// sd_diskio.c
-//
-// Low level SD Card access hookup for FatFS
-//
-// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-#include 
-
-#include "py/mpconfig.h"
-#include "py/mphal.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/oofatfs/diskio.h"
-#include "hw_types.h"
-#include "hw_memmap.h"
-#include "hw_ints.h"
-#include "rom_map.h"
-#include "sd_diskio.h"
-#include "sdhost.h"
-#include "pin.h"
-#include "prcm.h"
-#include "stdcmd.h"
-#include "utils.h"
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define DISKIO_RETRY_TIMEOUT        0xFFFFFFFF
-
-#define CARD_TYPE_UNKNOWN           0
-#define CARD_TYPE_MMC               1
-#define CARD_TYPE_SDCARD            2
-
-#define CARD_CAP_CLASS_SDSC         0
-#define CARD_CAP_CLASS_SDHC         1
-
-#define CARD_VERSION_1              0
-#define CARD_VERSION_2              1
-
-//*****************************************************************************
-// Disk Info for attached disk
-//*****************************************************************************
-DiskInfo_t sd_disk_info =  {CARD_TYPE_UNKNOWN, CARD_VERSION_1, CARD_CAP_CLASS_SDSC, 0, 0, STA_NOINIT, 0};
-
-//*****************************************************************************
-//
-//! Send Command to card
-//!
-//! \param ulCmd is the command to be send
-//! \paran ulArg is the command argument
-//!
-//! This function sends command to attached card and check the response status
-//! if any.
-//!
-//! \return Returns 0 on success, 1 otherwise
-//
-//*****************************************************************************
-static unsigned int CardSendCmd (unsigned int ulCmd, unsigned int ulArg) {
-    unsigned long ulStatus;
-
-    // Clear the interrupt status
-    MAP_SDHostIntClear(SDHOST_BASE,0xFFFFFFFF);
-
-    // Send command
-    MAP_SDHostCmdSend(SDHOST_BASE,ulCmd,ulArg);
-
-    // Wait for command complete or error
-    do {
-        ulStatus = MAP_SDHostIntStatus(SDHOST_BASE);
-        ulStatus = (ulStatus & (SDHOST_INT_CC | SDHOST_INT_ERRI));
-    } while (!ulStatus);
-
-    // Check error status
-    if (ulStatus & SDHOST_INT_ERRI) {
-        // Reset the command line
-        MAP_SDHostCmdReset(SDHOST_BASE);
-        return 1;
-    }
-    else {
-        return 0;
-    }
-}
-
-//*****************************************************************************
-//
-//! Get the capacity of specified card
-//!
-//! \param ulRCA is the Relative Card Address (RCA)
-//!
-//! This function gets the capacity of card addressed by \e ulRCA paramaeter.
-//!
-//! \return Returns 0 on success, 1 otherwise.
-//
-//*****************************************************************************
-static unsigned int CardCapacityGet(DiskInfo_t *psDiskInfo) {
-    unsigned long ulRet;
-    unsigned long ulResp[4];
-    unsigned long ulBlockSize;
-    unsigned long ulBlockCount;
-    unsigned long ulCSizeMult;
-    unsigned long ulCSize;
-
-    // Read the CSD register
-    ulRet = CardSendCmd(CMD_SEND_CSD, (psDiskInfo->usRCA << 16));
-
-    if(ulRet == 0) {
-        // Read the response
-        MAP_SDHostRespGet(SDHOST_BASE,ulResp);
-
-        // 136 bit CSD register is read into an array of 4 words.
-        // ulResp[0] = CSD[31:0]
-        // ulResp[1] = CSD[63:32]
-        // ulResp[2] = CSD[95:64]
-        // ulResp[3] = CSD[127:96]
-        if(ulResp[3] >> 30) {
-            ulBlockSize = SD_SECTOR_SIZE * 1024;
-            ulBlockCount = (ulResp[1] >> 16 | ((ulResp[2] & 0x3F) << 16)) + 1;
-        }
-        else {
-            ulBlockSize  = 1 << ((ulResp[2] >> 16) & 0xF);
-            ulCSizeMult  = ((ulResp[1] >> 15) & 0x7);
-            ulCSize      = ((ulResp[1] >> 30) | (ulResp[2] & 0x3FF) << 2);
-            ulBlockCount = (ulCSize + 1) * (1 << (ulCSizeMult + 2));
-        }
-
-        // Calculate the card capacity in bytes
-        psDiskInfo->ulBlockSize = ulBlockSize;
-        psDiskInfo->ulNofBlock  = ulBlockCount;
-    }
-
-    return ulRet;
-}
-
-//*****************************************************************************
-//
-//! Select a card for reading or writing
-//!
-//! \param Card is the pointer to card attribute structure.
-//!
-//! This function selects a card for reading or writing using its RCA from
-//! \e Card parameter.
-//!
-//! \return Returns 0 success, 1 otherwise.
-//
-//*****************************************************************************
-static unsigned int CardSelect (DiskInfo_t *sDiskInfo) {
-    unsigned long ulRCA;
-    unsigned long ulRet;
-
-    ulRCA = sDiskInfo->usRCA;
-
-    // Send select command with card's RCA.
-    ulRet = CardSendCmd(CMD_SELECT_CARD, (ulRCA << 16));
-
-    if (ulRet == 0) {
-        while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-    }
-
-    // Delay 250ms for the card to become ready
-    mp_hal_delay_ms(250);
-
-    return ulRet;
-}
-
-//*****************************************************************************
-//
-//! Initializes physical drive
-//!
-//! This function initializes the physical drive
-//!
-//! \return Returns 0 on succeeded.
-//*****************************************************************************
-DSTATUS sd_disk_init (void) {
-    unsigned long ulRet;
-    unsigned long ulResp[4];
-
-    if (sd_disk_info.bStatus != 0) {
-        sd_disk_info.bStatus = STA_NODISK;
-        // Send std GO IDLE command
-        if (CardSendCmd(CMD_GO_IDLE_STATE, 0) == 0) {
-            // Get interface operating condition for the card
-            ulRet = CardSendCmd(CMD_SEND_IF_COND,0x000001A5);
-            MAP_SDHostRespGet(SDHOST_BASE,ulResp);
-
-            // It's a SD ver 2.0 or higher card
-            if (ulRet == 0 && ((ulResp[0] & 0xFF) == 0xA5)) {
-                // Version 1 card do not respond to this command
-                sd_disk_info.ulVersion = CARD_VERSION_2;
-                sd_disk_info.ucCardType = CARD_TYPE_SDCARD;
-
-                // Wait for card to become ready.
-                do {
-                    // Send ACMD41
-                    CardSendCmd(CMD_APP_CMD, 0);
-                    ulRet = CardSendCmd(CMD_SD_SEND_OP_COND, 0x40E00000);
-
-                    // Response contains 32-bit OCR register
-                    MAP_SDHostRespGet(SDHOST_BASE, ulResp);
-
-                } while (((ulResp[0] >> 31) == 0));
-
-                if (ulResp[0] & (1UL<<30)) {
-                    sd_disk_info.ulCapClass = CARD_CAP_CLASS_SDHC;
-                }
-                sd_disk_info.bStatus = 0;
-            }
-            //It's a MMC or SD 1.x card
-            else {
-                // Wait for card to become ready.
-                do {
-                    CardSendCmd(CMD_APP_CMD, 0);
-                    ulRet = CardSendCmd(CMD_SD_SEND_OP_COND,0x00E00000);
-                    if (ulRet == 0) {
-                        // Response contains 32-bit OCR register
-                        MAP_SDHostRespGet(SDHOST_BASE, ulResp);
-                    }
-                } while (((ulRet == 0) && (ulResp[0] >> 31) == 0));
-
-                if (ulRet == 0) {
-                    sd_disk_info.ucCardType = CARD_TYPE_SDCARD;
-                    sd_disk_info.bStatus = 0;
-                }
-                else {
-                    if (CardSendCmd(CMD_SEND_OP_COND, 0) == 0) {
-                        // MMC not supported by the controller
-                        sd_disk_info.ucCardType = CARD_TYPE_MMC;
-                    }
-                }
-            }
-        }
-
-        // Get the RCA of the attached card
-        if (sd_disk_info.bStatus == 0) {
-            ulRet = CardSendCmd(CMD_ALL_SEND_CID, 0);
-            if (ulRet == 0) {
-                CardSendCmd(CMD_SEND_REL_ADDR,0);
-                MAP_SDHostRespGet(SDHOST_BASE, ulResp);
-
-                //  Fill in the RCA
-                sd_disk_info.usRCA = (ulResp[0] >> 16);
-
-                // Get tha card capacity
-                CardCapacityGet(&sd_disk_info);
-            }
-
-            // Select the card.
-            ulRet = CardSelect(&sd_disk_info);
-            if (ulRet == 0) {
-                sd_disk_info.bStatus = 0;
-            }
-        }
-    }
-
-    return sd_disk_info.bStatus;
-}
-
-//*****************************************************************************
-//
-//! De-initializes the physical drive
-//!
-//! This function de-initializes the physical drive
-//*****************************************************************************
-void sd_disk_deinit (void) {
-    sd_disk_info.ucCardType = CARD_TYPE_UNKNOWN;
-    sd_disk_info.ulVersion = CARD_VERSION_1;
-    sd_disk_info.ulCapClass = CARD_CAP_CLASS_SDSC;
-    sd_disk_info.ulNofBlock = 0;
-    sd_disk_info.ulBlockSize = 0;
-    sd_disk_info.bStatus = STA_NOINIT;
-    sd_disk_info.usRCA = 0;
-}
-
-//*****************************************************************************
-//
-//! Reads sector(s) from the disk drive.
-//!
-//!
-//! This function reads specified number of sectors from the drive
-//!
-//! \return Returns RES_OK on success.
-//
-//*****************************************************************************
-DRESULT sd_disk_read (BYTE* pBuffer, DWORD ulSectorNumber, UINT SectorCount) {
-    DRESULT Res = RES_ERROR;
-    unsigned long ulSize;
-
-    if (SectorCount > 0) {
-        // Return if disk not initialized
-        if (sd_disk_info.bStatus & STA_NOINIT) {
-            return RES_NOTRDY;
-        }
-
-        // SDSC uses linear address, SDHC uses block address
-        if (sd_disk_info.ulCapClass == CARD_CAP_CLASS_SDSC) {
-            ulSectorNumber = ulSectorNumber * SD_SECTOR_SIZE;
-        }
-
-        // Set the block count
-        MAP_SDHostBlockCountSet(SDHOST_BASE, SectorCount);
-
-        // Compute the number of words
-        ulSize = (SD_SECTOR_SIZE * SectorCount) / 4;
-
-        // Check if 1 block or multi block transfer
-        if (SectorCount == 1) {
-            // Send single block read command
-            if (CardSendCmd(CMD_READ_SINGLE_BLK, ulSectorNumber) == 0) {
-                // Read the block of data
-                while (ulSize--) {
-                    MAP_SDHostDataRead(SDHOST_BASE, (unsigned long *)pBuffer);
-                    pBuffer += 4;
-                }
-                Res = RES_OK;
-            }
-        }
-        else {
-            // Send multi block read command
-            if (CardSendCmd(CMD_READ_MULTI_BLK, ulSectorNumber) == 0) {
-                // Read the data
-                while (ulSize--) {
-                    MAP_SDHostDataRead(SDHOST_BASE, (unsigned long *)pBuffer);
-                    pBuffer += 4;
-                }
-                CardSendCmd(CMD_STOP_TRANS, 0);
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                Res = RES_OK;
-            }
-        }
-    }
-
-    return Res;
-}
-
-//*****************************************************************************
-//
-//! Wrties sector(s) to the disk drive.
-//!
-//!
-//! This function writes specified number of sectors to the drive
-//!
-//! \return Returns RES_OK on success.
-//
-//*****************************************************************************
-DRESULT sd_disk_write (const BYTE* pBuffer, DWORD ulSectorNumber, UINT SectorCount) {
-    DRESULT Res = RES_ERROR;
-    unsigned long ulSize;
-
-    if (SectorCount > 0) {
-        // Return if disk not initialized
-        if (sd_disk_info.bStatus & STA_NOINIT) {
-            return RES_NOTRDY;
-        }
-
-        // SDSC uses linear address, SDHC uses block address
-        if (sd_disk_info.ulCapClass == CARD_CAP_CLASS_SDSC) {
-            ulSectorNumber = ulSectorNumber * SD_SECTOR_SIZE;
-        }
-
-        // Set the block count
-        MAP_SDHostBlockCountSet(SDHOST_BASE, SectorCount);
-
-        // Compute the number of words
-        ulSize = (SD_SECTOR_SIZE * SectorCount) / 4;
-
-        // Check if 1 block or multi block transfer
-        if (SectorCount == 1) {
-            // Send single block write command
-            if (CardSendCmd(CMD_WRITE_SINGLE_BLK, ulSectorNumber) == 0) {
-                // Write the data
-                while (ulSize--) {
-                    MAP_SDHostDataWrite (SDHOST_BASE, (*(unsigned long *)pBuffer));
-                    pBuffer += 4;
-                }
-                // Wait for data transfer complete
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                Res = RES_OK;
-            }
-        }
-        else {
-            // Set the card write block count
-            if (sd_disk_info.ucCardType == CARD_TYPE_SDCARD) {
-                CardSendCmd(CMD_APP_CMD,sd_disk_info.usRCA << 16);
-                CardSendCmd(CMD_SET_BLK_CNT, SectorCount);
-            }
-
-            // Send multi block write command
-            if (CardSendCmd(CMD_WRITE_MULTI_BLK, ulSectorNumber) == 0) {
-                // Write the data buffer
-                while (ulSize--) {
-                    MAP_SDHostDataWrite(SDHOST_BASE, (*(unsigned long *)pBuffer));
-                    pBuffer += 4;
-                }
-                // Wait for transfer complete
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                CardSendCmd(CMD_STOP_TRANS, 0);
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                Res = RES_OK;
-            }
-        }
-    }
-
-    return Res;
-}
diff --git a/ports/cc3200/fatfs/src/drivers/sd_diskio.h b/ports/cc3200/fatfs/src/drivers/sd_diskio.h
deleted file mode 100644
index b5a1944ec4..0000000000
--- a/ports/cc3200/fatfs/src/drivers/sd_diskio.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef SD_DISKIO_H_
-#define SD_DISKIO_H_
-
-#define SD_SECTOR_SIZE          512
-
-//*****************************************************************************
-// Disk Info Structure definition
-//*****************************************************************************
-typedef struct
-{
-    unsigned char ucCardType;
-    unsigned int  ulVersion;
-    unsigned int  ulCapClass;
-    unsigned int ulNofBlock;
-    unsigned int ulBlockSize;
-    DSTATUS bStatus;
-    unsigned short usRCA;
-}DiskInfo_t;
-
-extern DiskInfo_t sd_disk_info;
-
-DSTATUS sd_disk_init (void);
-void sd_disk_deinit (void);
-DRESULT sd_disk_read (BYTE* pBuffer, DWORD ulSectorNumber, UINT bSectorCount);
-DRESULT sd_disk_write (const BYTE* pBuffer, DWORD ulSectorNumber, UINT bSectorCount);
-
-#endif /* SD_DISKIO_H_ */
diff --git a/ports/cc3200/fatfs/src/drivers/sflash_diskio.c b/ports/cc3200/fatfs/src/drivers/sflash_diskio.c
deleted file mode 100644
index 6a1fc40685..0000000000
--- a/ports/cc3200/fatfs/src/drivers/sflash_diskio.c
+++ /dev/null
@@ -1,182 +0,0 @@
-#include 
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/oofatfs/diskio.h"
-#include "simplelink.h"
-#include "sflash_diskio.h"
-#include "debug.h"
-#include "modnetwork.h"
-#include "modwlan.h"
-
-#define SFLASH_TIMEOUT_MAX_MS               5500
-#define SFLASH_WAIT_TIME_MS                 5
-
-static _u8 sflash_block_name[] =  "__NNN__.fsb";
-static _u8 *sflash_block_cache;
-static bool sflash_init_done = false;
-static bool sflash_cache_is_dirty;
-static uint32_t sflash_ublock;
-static uint32_t sflash_prblock;
-
-
-static void print_block_name (_u32 ublock) {
-    char _sblock[4];
-    snprintf (_sblock, sizeof(_sblock), "%03u", ublock);
-    memcpy (&sflash_block_name[2], _sblock, 3);
-}
-
-static bool sflash_access (_u32 mode, _i32 (* sl_FsFunction)(_i32 FileHdl, _u32 Offset, _u8* pData, _u32 Len)) {
-    _i32 fileHandle;
-    bool retval = false;
-
-    // wlan must be enabled in order to access the serial flash
-    sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-
-    if (0 == sl_FsOpen(sflash_block_name, mode, NULL, &fileHandle)) {
-        if (SFLASH_BLOCK_SIZE == sl_FsFunction (fileHandle, 0, sflash_block_cache, SFLASH_BLOCK_SIZE)) {
-            retval = true;
-        }
-        sl_FsClose (fileHandle, NULL, NULL, 0);
-    }
-    sl_LockObjUnlock (&wlan_LockObj);
-    return retval;
-}
-
-DRESULT sflash_disk_init (void) {
-    _i32 fileHandle;
-    SlFsFileInfo_t FsFileInfo;
-
-    if (!sflash_init_done) {
-        // Allocate space for the block cache
-        ASSERT ((sflash_block_cache = mem_Malloc(SFLASH_BLOCK_SIZE)) != NULL);
-        sflash_init_done = true;
-        sflash_prblock = UINT32_MAX;
-        sflash_cache_is_dirty = false;
-
-        // In order too speed up booting, check the last block, if exists, then
-        // it means that the file system has been already created
-        print_block_name (SFLASH_BLOCK_COUNT - 1);
-        sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-        if (!sl_FsGetInfo(sflash_block_name, 0, &FsFileInfo)) {
-            sl_LockObjUnlock (&wlan_LockObj);
-            return RES_OK;
-        }
-        sl_LockObjUnlock (&wlan_LockObj);
-
-        // Proceed to format the memory
-        for (int i = 0; i < SFLASH_BLOCK_COUNT; i++) {
-            print_block_name (i);
-            sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-            // Create the block file if it doesn't exist
-            if (sl_FsGetInfo(sflash_block_name, 0, &FsFileInfo) != 0) {
-                if (!sl_FsOpen(sflash_block_name, FS_MODE_OPEN_CREATE(SFLASH_BLOCK_SIZE, 0), NULL, &fileHandle)) {
-                    sl_FsClose(fileHandle, NULL, NULL, 0);
-                    sl_LockObjUnlock (&wlan_LockObj);
-                    memset(sflash_block_cache, 0xFF, SFLASH_BLOCK_SIZE);
-                    if (!sflash_access(FS_MODE_OPEN_WRITE, sl_FsWrite)) {
-                        return RES_ERROR;
-                    }
-                }
-                else {
-                    // Unexpected failure while creating the file
-                    sl_LockObjUnlock (&wlan_LockObj);
-                    return RES_ERROR;
-                }
-            }
-            sl_LockObjUnlock (&wlan_LockObj);
-        }
-    }
-    return RES_OK;
-}
-
-DRESULT sflash_disk_status(void) {
-    if (!sflash_init_done) {
-        return STA_NOINIT;
-    }
-    return RES_OK;
-}
-
-DRESULT sflash_disk_read(BYTE *buff, DWORD sector, UINT count) {
-    uint32_t secindex;
-
-    if (!sflash_init_done) {
-        return STA_NOINIT;
-    }
-
-    if ((sector + count > SFLASH_SECTOR_COUNT) || (count == 0)) {
-        return RES_PARERR;
-    }
-
-    for (int i = 0; i < count; i++) {
-        secindex = (sector + i) % SFLASH_SECTORS_PER_BLOCK;
-        sflash_ublock = (sector + i) / SFLASH_SECTORS_PER_BLOCK;
-        // See if it's time to read a new block
-        if (sflash_prblock != sflash_ublock) {
-            if (sflash_disk_flush() != RES_OK) {
-                return RES_ERROR;
-            }
-            sflash_prblock = sflash_ublock;
-            print_block_name (sflash_ublock);
-            if (!sflash_access(FS_MODE_OPEN_READ, sl_FsRead)) {
-                return RES_ERROR;
-            }
-        }
-        // Copy the requested sector from the block cache
-        memcpy (buff, &sflash_block_cache[(secindex * SFLASH_SECTOR_SIZE)], SFLASH_SECTOR_SIZE);
-        buff += SFLASH_SECTOR_SIZE;
-    }
-    return RES_OK;
-}
-
-DRESULT sflash_disk_write(const BYTE *buff, DWORD sector, UINT count) {
-    uint32_t secindex;
-    int32_t index = 0;
-
-    if (!sflash_init_done) {
-        return STA_NOINIT;
-    }
-
-    if ((sector + count > SFLASH_SECTOR_COUNT) || (count == 0)) {
-        sflash_disk_flush();
-        return RES_PARERR;
-    }
-
-    do {
-        secindex = (sector + index) % SFLASH_SECTORS_PER_BLOCK;
-        sflash_ublock = (sector + index) / SFLASH_SECTORS_PER_BLOCK;
-        // Check if it's a different block than last time
-        if (sflash_prblock != sflash_ublock) {
-            if (sflash_disk_flush() != RES_OK) {
-                return RES_ERROR;
-            }
-            sflash_prblock = sflash_ublock;
-            print_block_name (sflash_ublock);
-            // Read the block into the cache
-            if (!sflash_access(FS_MODE_OPEN_READ, sl_FsRead)) {
-                return RES_ERROR;
-            }
-        }
-        // Copy the input sector to the block cache
-        memcpy (&sflash_block_cache[(secindex * SFLASH_SECTOR_SIZE)], buff, SFLASH_SECTOR_SIZE);
-        buff += SFLASH_SECTOR_SIZE;
-        sflash_cache_is_dirty = true;
-    } while (++index < count);
-
-    return RES_OK;
-}
-
-DRESULT sflash_disk_flush (void) {
-    // Write back the cache if it's dirty
-    if (sflash_cache_is_dirty) {
-        if (!sflash_access(FS_MODE_OPEN_WRITE, sl_FsWrite)) {
-            return RES_ERROR;
-        }
-        sflash_cache_is_dirty = false;
-    }
-    return RES_OK;
-}
-
diff --git a/ports/cc3200/fatfs/src/drivers/sflash_diskio.h b/ports/cc3200/fatfs/src/drivers/sflash_diskio.h
deleted file mode 100644
index de3093439c..0000000000
--- a/ports/cc3200/fatfs/src/drivers/sflash_diskio.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef SFLASH_DISKIO_H_
-#define SFLASH_DISKIO_H_
-
-#define SFLASH_BLOCK_SIZE           2048
-#define SFLASH_BLOCK_COUNT          MICROPY_PORT_SFLASH_BLOCK_COUNT
-#define SFLASH_SECTOR_SIZE          512
-#define SFLASH_SECTOR_COUNT         ((SFLASH_BLOCK_SIZE * SFLASH_BLOCK_COUNT) / SFLASH_SECTOR_SIZE)
-#define SFLASH_SECTORS_PER_BLOCK    (SFLASH_BLOCK_SIZE / SFLASH_SECTOR_SIZE)
-
-DRESULT sflash_disk_init(void);
-DRESULT sflash_disk_status(void);
-DRESULT sflash_disk_read(BYTE *buff, DWORD sector, UINT count);
-DRESULT sflash_disk_write(const BYTE *buff, DWORD sector, UINT count);
-DRESULT sflash_disk_flush(void);
-
-#endif /* SFLASH_DISKIO_H_ */
diff --git a/ports/cc3200/fatfs/src/drivers/stdcmd.h b/ports/cc3200/fatfs/src/drivers/stdcmd.h
deleted file mode 100644
index 464e2ddfaa..0000000000
--- a/ports/cc3200/fatfs/src/drivers/stdcmd.h
+++ /dev/null
@@ -1,62 +0,0 @@
-//*****************************************************************************
-// stdcmd.h
-//
-// Defines standard SD Card commands for CC3200 SDHOST module. 
-//
-// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
-// 
-// 
-//  Redistribution and use in source and binary forms, with or without 
-//  modification, are permitted provided that the following conditions 
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright 
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the 
-//    documentation and/or other materials provided with the   
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __STDCMD_H__
-#define __STDCMD_H__
-
-//*****************************************************************************
-// Standard MMC/SD Card Commands                           
-//*****************************************************************************
-#define CMD_GO_IDLE_STATE    SDHOST_CMD_0
-#define CMD_SEND_IF_COND     SDHOST_CMD_8|SDHOST_RESP_LEN_48
-#define CMD_SEND_CSD         SDHOST_CMD_9|SDHOST_RESP_LEN_136
-#define CMD_APP_CMD          SDHOST_CMD_55|SDHOST_RESP_LEN_48
-#define CMD_SD_SEND_OP_COND  SDHOST_CMD_41|SDHOST_RESP_LEN_48
-#define CMD_SEND_OP_COND     SDHOST_CMD_1|SDHOST_RESP_LEN_48
-#define CMD_READ_SINGLE_BLK  SDHOST_CMD_17|SDHOST_RD_CMD|SDHOST_RESP_LEN_48
-#define CMD_READ_MULTI_BLK   SDHOST_CMD_18|SDHOST_RD_CMD|SDHOST_RESP_LEN_48|SDHOST_MULTI_BLK
-#define CMD_WRITE_SINGLE_BLK SDHOST_CMD_24|SDHOST_WR_CMD|SDHOST_RESP_LEN_48
-#define CMD_WRITE_MULTI_BLK  SDHOST_CMD_25|SDHOST_WR_CMD|SDHOST_RESP_LEN_48|SDHOST_MULTI_BLK
-#define CMD_SELECT_CARD      SDHOST_CMD_7|SDHOST_RESP_LEN_48B
-#define CMD_DESELECT_CARD    SDHOST_CMD_7
-#define CMD_STOP_TRANS       SDHOST_CMD_12|SDHOST_RESP_LEN_48B
-#define CMD_SET_BLK_CNT      SDHOST_CMD_23|SDHOST_RESP_LEN_48
-#define CMD_ALL_SEND_CID     SDHOST_CMD_2|SDHOST_RESP_LEN_136
-#define CMD_SEND_REL_ADDR    SDHOST_CMD_3|SDHOST_RESP_LEN_48
-
-#endif //__STDCMD_H__
diff --git a/ports/cc3200/fatfs_port.c b/ports/cc3200/fatfs_port.c
deleted file mode 100644
index 658c94e886..0000000000
--- a/ports/cc3200/fatfs_port.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013-2017 Damien P. George
- * Parts of this file are (C)ChaN, 2014, from FatFs option/syscall.c
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "py/runtime.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/timeutils/timeutils.h"
-#include "mods/pybrtc.h"
-
-#if _FS_REENTRANT
-// Create a Synchronization Object
-// This function is called in f_mount() function to create a new
-// synchronization object, such as semaphore and mutex.
-// A return of 0 indicates failure, and then f_mount() fails with FR_INT_ERR.
-int ff_cre_syncobj(FATFS *fatfs, _SYNC_t *sobj) {
-    vSemaphoreCreateBinary((*sobj));
-    return (int)(*sobj != NULL);
-}
-
-// Delete a Synchronization Object
-// This function is called in f_mount() function to delete a synchronization
-// object that created with ff_cre_syncobj function.
-// A return of 0 indicates failure, and then f_mount() fails with FR_INT_ERR.
-int ff_del_syncobj(_SYNC_t sobj) {
-    vSemaphoreDelete(sobj);
-    return 1;
-}
-
-// Request Grant to Access the Volume
-// This function is called on entering file functions to lock the volume.
-// When a 0 is returned, the file function fails with FR_TIMEOUT.
-int ff_req_grant(_SYNC_t sobj) {
-    return (int)(xSemaphoreTake(sobj, _FS_TIMEOUT) == pdTRUE);
-}
-
-// Release Grant to Access the Volume
-// This function is called on leaving file functions to unlock the volume.
-void ff_rel_grant(_SYNC_t sobj) {
-    xSemaphoreGive(sobj);
-}
-
-#endif
-
-DWORD get_fattime(void) {
-    timeutils_struct_time_t tm;
-    timeutils_seconds_since_2000_to_struct_time(pyb_rtc_get_seconds(), &tm);
-
-    return ((tm.tm_year - 1980) << 25) | ((tm.tm_mon) << 21)  |
-            ((tm.tm_mday) << 16)       | ((tm.tm_hour) << 11) |
-            ((tm.tm_min) << 5)         | (tm.tm_sec >> 1);
-}
diff --git a/ports/cc3200/ftp/ftp.c b/ports/cc3200/ftp/ftp.c
deleted file mode 100644
index ee80e51f52..0000000000
--- a/ports/cc3200/ftp/ftp.c
+++ /dev/null
@@ -1,1152 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-
-#include "py/runtime.h"
-#include "lib/timeutils/timeutils.h"
-#include "lib/oofatfs/ff.h"
-#include "extmod/vfs.h"
-#include "extmod/vfs_fat.h"
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "rom_map.h"
-#include "prcm.h"
-#include "pybrtc.h"
-#include "ftp.h"
-#include "simplelink.h"
-#include "modnetwork.h"
-#include "modwlan.h"
-#include "modusocket.h"
-#include "debug.h"
-#include "serverstask.h"
-#include "fifo.h"
-#include "socketfifo.h"
-#include "updater.h"
-#include "moduos.h"
-
-/******************************************************************************
- DEFINE PRIVATE CONSTANTS
- ******************************************************************************/
-#define FTP_CMD_PORT                        21
-#define FTP_ACTIVE_DATA_PORT                20
-#define FTP_PASIVE_DATA_PORT                2024
-#define FTP_BUFFER_SIZE                     512
-#define FTP_TX_RETRIES_MAX                  25
-#define FTP_CMD_SIZE_MAX                    6
-#define FTP_CMD_CLIENTS_MAX                 1
-#define FTP_DATA_CLIENTS_MAX                1
-#define FTP_MAX_PARAM_SIZE                  (MICROPY_ALLOC_PATH_MAX + 1)
-#define FTP_UNIX_TIME_20000101              946684800
-#define FTP_UNIX_TIME_20150101              1420070400
-#define FTP_UNIX_SECONDS_180_DAYS           15552000
-#define FTP_DATA_TIMEOUT_MS                 5000            // 5 seconds
-#define FTP_SOCKETFIFO_ELEMENTS_MAX         4
-#define FTP_CYCLE_TIME_MS                   (SERVERS_CYCLE_TIME_MS * 2)
-
-/******************************************************************************
- DEFINE PRIVATE TYPES
- ******************************************************************************/
-typedef enum {
-    E_FTP_RESULT_OK = 0,
-    E_FTP_RESULT_CONTINUE,
-    E_FTP_RESULT_FAILED
-} ftp_result_t;
-
-typedef enum {
-    E_FTP_STE_DISABLED = 0,
-    E_FTP_STE_START,
-    E_FTP_STE_READY,
-    E_FTP_STE_END_TRANSFER,
-    E_FTP_STE_CONTINUE_LISTING,
-    E_FTP_STE_CONTINUE_FILE_TX,
-    E_FTP_STE_CONTINUE_FILE_RX
-} ftp_state_t;
-
-typedef enum {
-    E_FTP_STE_SUB_DISCONNECTED = 0,
-    E_FTP_STE_SUB_LISTEN_FOR_DATA,
-    E_FTP_STE_SUB_DATA_CONNECTED
-} ftp_substate_t;
-
-typedef struct {
-    bool            uservalid : 1;
-    bool            passvalid : 1;
-} ftp_loggin_t;
-
-typedef enum {
-    E_FTP_NOTHING_OPEN = 0,
-    E_FTP_FILE_OPEN,
-    E_FTP_DIR_OPEN
-} ftp_e_open_t;
-
-typedef enum {
-    E_FTP_CLOSE_NONE = 0,
-    E_FTP_CLOSE_DATA,
-    E_FTP_CLOSE_CMD_AND_DATA,
-} ftp_e_closesocket_t;
-
-typedef struct {
-    uint8_t             *dBuffer;
-    uint32_t            ctimeout;
-    union {
-        FF_DIR          dp;
-        FIL             fp;
-    };
-    int16_t             lc_sd;
-    int16_t             ld_sd;
-    int16_t             c_sd;
-    int16_t             d_sd;
-    int16_t             dtimeout;
-    uint16_t            volcount;
-    uint8_t             state;
-    uint8_t             substate;
-    uint8_t             txRetries;
-    uint8_t             logginRetries;
-    ftp_loggin_t        loggin;
-    uint8_t             e_open;
-    bool                closechild;
-    bool                enabled;
-    bool                special_file;
-    bool                listroot;
-} ftp_data_t;
-
-typedef struct {
-    char * cmd;
-} ftp_cmd_t;
-
-typedef struct {
-    char * month;
-} ftp_month_t;
-
-typedef enum {
-    E_FTP_CMD_NOT_SUPPORTED = -1,
-    E_FTP_CMD_FEAT = 0,
-    E_FTP_CMD_SYST,
-    E_FTP_CMD_CDUP,
-    E_FTP_CMD_CWD,
-    E_FTP_CMD_PWD,
-    E_FTP_CMD_XPWD,
-    E_FTP_CMD_SIZE,
-    E_FTP_CMD_MDTM,
-    E_FTP_CMD_TYPE,
-    E_FTP_CMD_USER,
-    E_FTP_CMD_PASS,
-    E_FTP_CMD_PASV,
-    E_FTP_CMD_LIST,
-    E_FTP_CMD_RETR,
-    E_FTP_CMD_STOR,
-    E_FTP_CMD_DELE,
-    E_FTP_CMD_RMD,
-    E_FTP_CMD_MKD,
-    E_FTP_CMD_RNFR,
-    E_FTP_CMD_RNTO,
-    E_FTP_CMD_NOOP,
-    E_FTP_CMD_QUIT,
-    E_FTP_NUM_FTP_CMDS
-} ftp_cmd_index_t;
-
-/******************************************************************************
- DECLARE PRIVATE DATA
- ******************************************************************************/
-static ftp_data_t ftp_data;
-static char *ftp_path;
-static char *ftp_scratch_buffer;
-static char *ftp_cmd_buffer;
-static const ftp_cmd_t ftp_cmd_table[] = { { "FEAT" }, { "SYST" }, { "CDUP" }, { "CWD"  },
-                                           { "PWD"  }, { "XPWD" }, { "SIZE" }, { "MDTM" },
-                                           { "TYPE" }, { "USER" }, { "PASS" }, { "PASV" },
-                                           { "LIST" }, { "RETR" }, { "STOR" }, { "DELE" },
-                                           { "RMD"  }, { "MKD"  }, { "RNFR" }, { "RNTO" },
-                                           { "NOOP" }, { "QUIT" } };
-
-static const ftp_month_t ftp_month[] = { { "Jan" }, { "Feb" }, { "Mar" }, { "Apr" },
-                                         { "May" }, { "Jun" }, { "Jul" }, { "Ago" },
-                                         { "Sep" }, { "Oct" }, { "Nov" }, { "Dec" } };
-
-static SocketFifoElement_t ftp_fifoelements[FTP_SOCKETFIFO_ELEMENTS_MAX];
-static FIFO_t ftp_socketfifo;
-
-/******************************************************************************
- DEFINE VFS WRAPPER FUNCTIONS
- ******************************************************************************/
-
-// These wrapper functions are used so that the FTP server can access the
-// mounted FATFS devices directly without going through the costly mp_vfs_XXX
-// functions.  The latter may raise exceptions and we would then need to wrap
-// all calls in an nlr handler.  The wrapper functions below assume that there
-// are only FATFS filesystems mounted.
-
-STATIC FATFS *lookup_path(const TCHAR **path) {
-    mp_vfs_mount_t *fs = mp_vfs_lookup_path(*path, path);
-    if (fs == MP_VFS_NONE || fs == MP_VFS_ROOT) {
-        return NULL;
-    }
-    // here we assume that the mounted device is FATFS
-    return &((fs_user_mount_t*)MP_OBJ_TO_PTR(fs->obj))->fatfs;
-}
-
-STATIC FRESULT f_open_helper(FIL *fp, const TCHAR *path, BYTE mode) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_open(fs, fp, path, mode);
-}
-
-STATIC FRESULT f_opendir_helper(FF_DIR *dp, const TCHAR *path) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_opendir(fs, dp, path);
-}
-
-STATIC FRESULT f_stat_helper(const TCHAR *path, FILINFO *fno) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_stat(fs, path, fno);
-}
-
-STATIC FRESULT f_mkdir_helper(const TCHAR *path) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_mkdir(fs, path);
-}
-
-STATIC FRESULT f_unlink_helper(const TCHAR *path) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_unlink(fs, path);
-}
-
-STATIC FRESULT f_rename_helper(const TCHAR *path_old, const TCHAR *path_new) {
-    FATFS *fs_old = lookup_path(&path_old);
-    if (fs_old == NULL) {
-        return FR_NO_PATH;
-    }
-    FATFS *fs_new = lookup_path(&path_new);
-    if (fs_new == NULL) {
-        return FR_NO_PATH;
-    }
-    if (fs_old != fs_new) {
-        return FR_NO_PATH;
-    }
-    return f_rename(fs_new, path_old, path_new);
-}
-
-/******************************************************************************
- DECLARE PRIVATE FUNCTIONS
- ******************************************************************************/
-static void ftp_wait_for_enabled (void);
-static bool ftp_create_listening_socket (_i16 *sd, _u16 port, _u8 backlog);
-static ftp_result_t ftp_wait_for_connection (_i16 l_sd, _i16 *n_sd);
-static ftp_result_t ftp_send_non_blocking (_i16 sd, void *data, _i16 Len);
-static void ftp_send_reply (_u16 status, char *message);
-static void ftp_send_data (_u32 datasize);
-static void ftp_send_from_fifo (void);
-static ftp_result_t ftp_recv_non_blocking (_i16 sd, void *buff, _i16 Maxlen, _i32 *rxLen);
-static void ftp_process_cmd (void);
-static void ftp_close_files (void);
-static void ftp_close_filesystem_on_error (void);
-static void ftp_close_cmd_data (void);
-static ftp_cmd_index_t ftp_pop_command (char **str);
-static void ftp_pop_param (char **str, char *param);
-static int ftp_print_eplf_item (char *dest, uint32_t destsize, FILINFO *fno);
-static int ftp_print_eplf_drive (char *dest, uint32_t destsize, const char *name);
-static bool ftp_open_file (const char *path, int mode);
-static ftp_result_t ftp_read_file (char *filebuf, uint32_t desiredsize, uint32_t *actualsize);
-static ftp_result_t ftp_write_file (char *filebuf, uint32_t size);
-static ftp_result_t ftp_open_dir_for_listing (const char *path);
-static ftp_result_t ftp_list_dir (char *list, uint32_t maxlistsize, uint32_t *listsize);
-static void ftp_open_child (char *pwd, char *dir);
-static void ftp_close_child (char *pwd);
-static void ftp_return_to_previous_path (char *pwd, char *dir);
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-void ftp_init (void) {
-    // Allocate memory for the data buffer, and the file system structs (from the RTOS heap)
-    ASSERT ((ftp_data.dBuffer = mem_Malloc(FTP_BUFFER_SIZE)) != NULL);
-    ASSERT ((ftp_path = mem_Malloc(FTP_MAX_PARAM_SIZE)) != NULL);
-    ASSERT ((ftp_scratch_buffer = mem_Malloc(FTP_MAX_PARAM_SIZE)) != NULL);
-    ASSERT ((ftp_cmd_buffer = mem_Malloc(FTP_MAX_PARAM_SIZE + FTP_CMD_SIZE_MAX)) != NULL);
-    SOCKETFIFO_Init (&ftp_socketfifo, (void *)ftp_fifoelements, FTP_SOCKETFIFO_ELEMENTS_MAX);
-    ftp_data.c_sd  = -1;
-    ftp_data.d_sd  = -1;
-    ftp_data.lc_sd = -1;
-    ftp_data.ld_sd = -1;
-    ftp_data.e_open = E_FTP_NOTHING_OPEN;
-    ftp_data.state = E_FTP_STE_DISABLED;
-    ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-    ftp_data.special_file = false;
-    ftp_data.volcount = 0;
-}
-
-void ftp_run (void) {
-    switch (ftp_data.state) {
-        case E_FTP_STE_DISABLED:
-            ftp_wait_for_enabled();
-            break;
-        case E_FTP_STE_START:
-            if (wlan_is_connected() && ftp_create_listening_socket(&ftp_data.lc_sd, FTP_CMD_PORT, FTP_CMD_CLIENTS_MAX - 1)) {
-                ftp_data.state = E_FTP_STE_READY;
-            }
-            break;
-        case E_FTP_STE_READY:
-            if (ftp_data.c_sd < 0 && ftp_data.substate == E_FTP_STE_SUB_DISCONNECTED) {
-                if (E_FTP_RESULT_OK == ftp_wait_for_connection(ftp_data.lc_sd, &ftp_data.c_sd)) {
-                    ftp_data.txRetries = 0;
-                    ftp_data.logginRetries = 0;
-                    ftp_data.ctimeout = 0;
-                    ftp_data.loggin.uservalid = false;
-                    ftp_data.loggin.passvalid = false;
-                    strcpy (ftp_path, "/");
-                    ftp_send_reply (220, "MicroPython FTP Server");
-                    break;
-                }
-            }
-            if (SOCKETFIFO_IsEmpty()) {
-                if (ftp_data.c_sd > 0 && ftp_data.substate != E_FTP_STE_SUB_LISTEN_FOR_DATA) {
-                    ftp_process_cmd();
-                    if (ftp_data.state != E_FTP_STE_READY) {
-                        break;
-                    }
-                }
-            }
-            break;
-        case E_FTP_STE_END_TRANSFER:
-            break;
-        case E_FTP_STE_CONTINUE_LISTING:
-            // go on with listing only if the transmit buffer is empty
-            if (SOCKETFIFO_IsEmpty()) {
-                uint32_t listsize;
-                ftp_list_dir((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, &listsize);
-                if (listsize > 0) {
-                    ftp_send_data(listsize);
-                } else {
-                    ftp_send_reply(226, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-                ftp_data.ctimeout = 0;
-            }
-            break;
-        case E_FTP_STE_CONTINUE_FILE_TX:
-            // read the next block from the file only if the previous one has been sent
-            if (SOCKETFIFO_IsEmpty()) {
-                uint32_t readsize;
-                ftp_result_t result;
-                ftp_data.ctimeout = 0;
-                result = ftp_read_file ((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, &readsize);
-                if (result == E_FTP_RESULT_FAILED) {
-                    ftp_send_reply(451, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-                else {
-                    if (readsize > 0) {
-                        ftp_send_data(readsize);
-                    }
-                    if (result == E_FTP_RESULT_OK) {
-                        ftp_send_reply(226, NULL);
-                        ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    }
-                }
-            }
-            break;
-        case E_FTP_STE_CONTINUE_FILE_RX:
-            if (SOCKETFIFO_IsEmpty()) {
-                _i32 len;
-                ftp_result_t result;
-                if (E_FTP_RESULT_OK == (result = ftp_recv_non_blocking(ftp_data.d_sd, ftp_data.dBuffer, FTP_BUFFER_SIZE, &len))) {
-                    ftp_data.dtimeout = 0;
-                    ftp_data.ctimeout = 0;
-                    // its a software update
-                    if (ftp_data.special_file) {
-                        if (updater_write(ftp_data.dBuffer, len)) {
-                            break;
-                        }
-                    }
-                    // user file being received
-                    else if (E_FTP_RESULT_OK == ftp_write_file ((char *)ftp_data.dBuffer, len)) {
-                        break;
-                    }
-                    ftp_send_reply(451, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-                else if (result == E_FTP_RESULT_CONTINUE) {
-                    if (ftp_data.dtimeout++ > FTP_DATA_TIMEOUT_MS / FTP_CYCLE_TIME_MS) {
-                        ftp_close_files();
-                        ftp_send_reply(426, NULL);
-                        ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    }
-                }
-                else {
-                    if (ftp_data.special_file) {
-                        ftp_data.special_file = false;
-                        updater_finnish();
-                    }
-                    ftp_close_files();
-                    ftp_send_reply(226, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-            }
-            break;
-        default:
-            break;
-    }
-
-    switch (ftp_data.substate) {
-    case E_FTP_STE_SUB_DISCONNECTED:
-        break;
-    case E_FTP_STE_SUB_LISTEN_FOR_DATA:
-        if (E_FTP_RESULT_OK == ftp_wait_for_connection(ftp_data.ld_sd, &ftp_data.d_sd)) {
-            ftp_data.dtimeout = 0;
-            ftp_data.substate = E_FTP_STE_SUB_DATA_CONNECTED;
-        }
-        else if (ftp_data.dtimeout++ > FTP_DATA_TIMEOUT_MS / FTP_CYCLE_TIME_MS) {
-            ftp_data.dtimeout = 0;
-            // close the listening socket
-            servers_close_socket(&ftp_data.ld_sd);
-            ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-        }
-        break;
-    case E_FTP_STE_SUB_DATA_CONNECTED:
-        if (ftp_data.state == E_FTP_STE_READY && ftp_data.dtimeout++ > FTP_DATA_TIMEOUT_MS / FTP_CYCLE_TIME_MS) {
-            // close the listening and the data socket
-            servers_close_socket(&ftp_data.ld_sd);
-            servers_close_socket(&ftp_data.d_sd);
-            ftp_close_filesystem_on_error ();
-            ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-        }
-        break;
-    default:
-        break;
-    }
-
-    // send data pending in the queue
-    ftp_send_from_fifo();
-
-    // check the state of the data sockets
-    if (ftp_data.d_sd < 0 && (ftp_data.state > E_FTP_STE_READY)) {
-        ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-        ftp_data.state = E_FTP_STE_READY;
-    }
-}
-
-void ftp_enable (void) {
-    ftp_data.enabled = true;
-}
-
-void ftp_disable (void) {
-    ftp_reset();
-    ftp_data.enabled = false;
-    ftp_data.state = E_FTP_STE_DISABLED;
-}
-
-void ftp_reset (void) {
-    // close all connections and start all over again
-    servers_close_socket(&ftp_data.lc_sd);
-    servers_close_socket(&ftp_data.ld_sd);
-    ftp_close_cmd_data();
-    ftp_data.state = E_FTP_STE_START;
-    ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-    ftp_data.volcount = 0;
-    SOCKETFIFO_Flush();
-}
-
-/******************************************************************************
- DEFINE PRIVATE FUNCTIONS
- ******************************************************************************/
-static void ftp_wait_for_enabled (void) {
-    // Check if the telnet service has been enabled
-    if (ftp_data.enabled) {
-        ftp_data.state = E_FTP_STE_START;
-    }
-}
-
-static bool ftp_create_listening_socket (_i16 *sd, _u16 port, _u8 backlog) {
-    SlSockNonblocking_t nonBlockingOption;
-    SlSockAddrIn_t sServerAddress;
-    _i16 _sd;
-    _i16 result;
-
-    // Open a socket for ftp data listen
-    ASSERT ((*sd = sl_Socket(SL_AF_INET, SL_SOCK_STREAM, SL_IPPROTO_IP)) > 0);
-    _sd = *sd;
-
-    if (_sd > 0) {
-        // add the new socket to the network administration
-        modusocket_socket_add(_sd, false);
-
-        // Enable non-blocking mode
-        nonBlockingOption.NonblockingEnabled = 1;
-        ASSERT ((result = sl_SetSockOpt(_sd, SL_SOL_SOCKET, SL_SO_NONBLOCKING, &nonBlockingOption, sizeof(nonBlockingOption))) == SL_SOC_OK);
-
-        // Bind the socket to a port number
-        sServerAddress.sin_family = SL_AF_INET;
-        sServerAddress.sin_addr.s_addr = SL_INADDR_ANY;
-        sServerAddress.sin_port = sl_Htons(port);
-
-        ASSERT ((result |= sl_Bind(_sd, (const SlSockAddr_t *)&sServerAddress, sizeof(sServerAddress))) == SL_SOC_OK);
-
-        // Start listening
-        ASSERT ((result |= sl_Listen (_sd, backlog)) == SL_SOC_OK);
-
-        if (result == SL_SOC_OK) {
-            return true;
-        }
-        servers_close_socket(sd);
-    }
-    return false;
-}
-
-static ftp_result_t ftp_wait_for_connection (_i16 l_sd, _i16 *n_sd) {
-    SlSockAddrIn_t sClientAddress;
-    SlSocklen_t  in_addrSize;
-
-    // accepts a connection from a TCP client, if there is any, otherwise returns SL_EAGAIN
-    *n_sd = sl_Accept(l_sd, (SlSockAddr_t *)&sClientAddress, (SlSocklen_t *)&in_addrSize);
-    _i16 _sd = *n_sd;
-    if (_sd == SL_EAGAIN) {
-        return E_FTP_RESULT_CONTINUE;
-    }
-    else if (_sd < 0) {
-        // error
-        ftp_reset();
-        return E_FTP_RESULT_FAILED;
-    }
-
-    // add the new socket to the network administration
-    modusocket_socket_add(_sd, false);
-
-    // client connected, so go on
-    return E_FTP_RESULT_OK;
-}
-
-static ftp_result_t ftp_send_non_blocking (_i16 sd, void *data, _i16 Len) {
-    int16_t result = sl_Send(sd, data, Len, 0);
-
-    if (result > 0) {
-        ftp_data.txRetries = 0;
-        return E_FTP_RESULT_OK;
-    }
-    else if ((FTP_TX_RETRIES_MAX >= ++ftp_data.txRetries) && (result == SL_EAGAIN)) {
-        return E_FTP_RESULT_CONTINUE;
-    }
-    else {
-        // error
-        ftp_reset();
-        return E_FTP_RESULT_FAILED;
-    }
-}
-
-static void ftp_send_reply (_u16 status, char *message) {
-    SocketFifoElement_t fifoelement;
-    if (!message) {
-        message = "";
-    }
-    snprintf((char *)ftp_cmd_buffer, 4, "%u", status);
-    strcat ((char *)ftp_cmd_buffer, " ");
-    strcat ((char *)ftp_cmd_buffer, message);
-    strcat ((char *)ftp_cmd_buffer, "\r\n");
-    fifoelement.sd = &ftp_data.c_sd;
-    fifoelement.datasize = strlen((char *)ftp_cmd_buffer);
-    fifoelement.data = mem_Malloc(fifoelement.datasize);
-    if (status == 221) {
-        fifoelement.closesockets = E_FTP_CLOSE_CMD_AND_DATA;
-    }
-    else if (status == 426 || status == 451 || status == 550) {
-        fifoelement.closesockets = E_FTP_CLOSE_DATA;
-    }
-    else {
-        fifoelement.closesockets = E_FTP_CLOSE_NONE;
-    }
-    fifoelement.freedata = true;
-    if (fifoelement.data) {
-        memcpy (fifoelement.data, ftp_cmd_buffer, fifoelement.datasize);
-        if (!SOCKETFIFO_Push (&fifoelement)) {
-            mem_Free(fifoelement.data);
-        }
-    }
-}
-
-static void ftp_send_data (_u32 datasize) {
-    SocketFifoElement_t fifoelement;
-
-    fifoelement.data = ftp_data.dBuffer;
-    fifoelement.datasize = datasize;
-    fifoelement.sd = &ftp_data.d_sd;
-    fifoelement.closesockets = E_FTP_CLOSE_NONE;
-    fifoelement.freedata = false;
-    SOCKETFIFO_Push (&fifoelement);
-}
-
-static void ftp_send_from_fifo (void) {
-    SocketFifoElement_t fifoelement;
-    if (SOCKETFIFO_Peek (&fifoelement)) {
-        _i16 _sd = *fifoelement.sd;
-        if (_sd > 0) {
-            if (E_FTP_RESULT_OK == ftp_send_non_blocking (_sd, fifoelement.data, fifoelement.datasize)) {
-                SOCKETFIFO_Pop (&fifoelement);
-                if (fifoelement.closesockets != E_FTP_CLOSE_NONE) {
-                    servers_close_socket(&ftp_data.d_sd);
-                    if (fifoelement.closesockets == E_FTP_CLOSE_CMD_AND_DATA) {
-                        servers_close_socket(&ftp_data.ld_sd);
-                        // this one is the command socket
-                        servers_close_socket(fifoelement.sd);
-                        ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-                    }
-                    ftp_close_filesystem_on_error();
-                }
-                if (fifoelement.freedata) {
-                    mem_Free(fifoelement.data);
-                }
-            }
-        }
-        // socket closed, remove from the queue
-        else {
-            SOCKETFIFO_Pop (&fifoelement);
-            if (fifoelement.freedata) {
-                mem_Free(fifoelement.data);
-            }
-        }
-    }
-    else if (ftp_data.state == E_FTP_STE_END_TRANSFER && (ftp_data.d_sd > 0)) {
-        // close the listening and the data sockets
-        servers_close_socket(&ftp_data.ld_sd);
-        servers_close_socket(&ftp_data.d_sd);
-        if (ftp_data.special_file) {
-            ftp_data.special_file = false;
-        }
-    }
-}
-
-static ftp_result_t ftp_recv_non_blocking (_i16 sd, void *buff, _i16 Maxlen, _i32 *rxLen) {
-    *rxLen = sl_Recv(sd, buff, Maxlen, 0);
-
-    if (*rxLen > 0) {
-        return E_FTP_RESULT_OK;
-    }
-    else if (*rxLen != SL_EAGAIN) {
-        // error
-        return E_FTP_RESULT_FAILED;
-    }
-    return E_FTP_RESULT_CONTINUE;
-}
-
-static void ftp_get_param_and_open_child (char **bufptr) {
-    ftp_pop_param (bufptr, ftp_scratch_buffer);
-    ftp_open_child (ftp_path, ftp_scratch_buffer);
-    ftp_data.closechild = true;
-}
-
-static void ftp_process_cmd (void) {
-    _i32 len;
-    char *bufptr = (char *)ftp_cmd_buffer;
-    ftp_result_t result;
-    FRESULT fres;
-    FILINFO fno;
-
-    ftp_data.closechild = false;
-    // also use the reply buffer to receive new commands
-    if (E_FTP_RESULT_OK == (result = ftp_recv_non_blocking(ftp_data.c_sd, ftp_cmd_buffer, FTP_MAX_PARAM_SIZE + FTP_CMD_SIZE_MAX, &len))) {
-        // bufptr is moved as commands are being popped
-        ftp_cmd_index_t cmd = ftp_pop_command(&bufptr);
-        if (!ftp_data.loggin.passvalid && (cmd != E_FTP_CMD_USER && cmd != E_FTP_CMD_PASS && cmd != E_FTP_CMD_QUIT)) {
-            ftp_send_reply(332, NULL);
-            return;
-        }
-        switch (cmd) {
-        case E_FTP_CMD_FEAT:
-            ftp_send_reply(211, "no-features");
-            break;
-        case E_FTP_CMD_SYST:
-            ftp_send_reply(215, "UNIX Type: L8");
-            break;
-        case E_FTP_CMD_CDUP:
-            ftp_close_child(ftp_path);
-            ftp_send_reply(250, NULL);
-            break;
-        case E_FTP_CMD_CWD:
-            {
-                fres = FR_NO_PATH;
-                ftp_pop_param (&bufptr, ftp_scratch_buffer);
-                ftp_open_child (ftp_path, ftp_scratch_buffer);
-                if ((ftp_path[0] == '/' && ftp_path[1] == '\0') || ((fres = f_opendir_helper (&ftp_data.dp, ftp_path)) == FR_OK)) {
-                    if (fres == FR_OK) {
-                        f_closedir(&ftp_data.dp);
-                    }
-                    ftp_send_reply(250, NULL);
-                }
-                else {
-                    ftp_close_child (ftp_path);
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_PWD:
-        case E_FTP_CMD_XPWD:
-            ftp_send_reply(257, ftp_path);
-            break;
-        case E_FTP_CMD_SIZE:
-            {
-                ftp_get_param_and_open_child (&bufptr);
-                if (FR_OK == f_stat_helper(ftp_path, &fno)) {
-                    // send the size
-                    snprintf((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, "%u", (_u32)fno.fsize);
-                    ftp_send_reply(213, (char *)ftp_data.dBuffer);
-                }
-                else {
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_MDTM:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_stat_helper(ftp_path, &fno)) {
-                // send the last modified time
-                snprintf((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, "%u%02u%02u%02u%02u%02u",
-                         1980 + ((fno.fdate >> 9) & 0x7f), (fno.fdate >> 5) & 0x0f,
-                         fno.fdate & 0x1f, (fno.ftime >> 11) & 0x1f,
-                         (fno.ftime >> 5) & 0x3f, 2 * (fno.ftime & 0x1f));
-                ftp_send_reply(213, (char *)ftp_data.dBuffer);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_TYPE:
-            ftp_send_reply(200, NULL);
-            break;
-        case E_FTP_CMD_USER:
-            ftp_pop_param (&bufptr, ftp_scratch_buffer);
-            if (!memcmp(ftp_scratch_buffer, servers_user, MAX(strlen(ftp_scratch_buffer), strlen(servers_user)))) {
-                ftp_data.loggin.uservalid = true && (strlen(servers_user) == strlen(ftp_scratch_buffer));
-            }
-            ftp_send_reply(331, NULL);
-            break;
-        case E_FTP_CMD_PASS:
-            ftp_pop_param (&bufptr, ftp_scratch_buffer);
-            if (!memcmp(ftp_scratch_buffer, servers_pass, MAX(strlen(ftp_scratch_buffer), strlen(servers_pass))) &&
-                    ftp_data.loggin.uservalid) {
-                ftp_data.loggin.passvalid = true && (strlen(servers_pass) == strlen(ftp_scratch_buffer));
-                if (ftp_data.loggin.passvalid) {
-                    ftp_send_reply(230, NULL);
-                    break;
-                }
-            }
-            ftp_send_reply(530, NULL);
-            break;
-        case E_FTP_CMD_PASV:
-            {
-                // some servers (e.g. google chrome) send PASV several times very quickly
-                servers_close_socket(&ftp_data.d_sd);
-                ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-                bool socketcreated = true;
-                if (ftp_data.ld_sd < 0) {
-                    socketcreated = ftp_create_listening_socket(&ftp_data.ld_sd, FTP_PASIVE_DATA_PORT, FTP_DATA_CLIENTS_MAX - 1);
-                }
-                if (socketcreated) {
-                    uint32_t ip;
-                    uint8_t *pip = (uint8_t *)&ip;
-                    ftp_data.dtimeout = 0;
-                    wlan_get_ip(&ip);
-                    snprintf((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, "(%u,%u,%u,%u,%u,%u)",
-                             pip[3], pip[2], pip[1], pip[0], (FTP_PASIVE_DATA_PORT >> 8), (FTP_PASIVE_DATA_PORT & 0xFF));
-                    ftp_data.substate = E_FTP_STE_SUB_LISTEN_FOR_DATA;
-                    ftp_send_reply(227, (char *)ftp_data.dBuffer);
-                }
-                else {
-                    ftp_send_reply(425, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_LIST:
-            if (ftp_open_dir_for_listing(ftp_path) == E_FTP_RESULT_CONTINUE) {
-                ftp_data.state = E_FTP_STE_CONTINUE_LISTING;
-                ftp_send_reply(150, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_RETR:
-            ftp_get_param_and_open_child (&bufptr);
-            if (ftp_open_file (ftp_path, FA_READ)) {
-                ftp_data.state = E_FTP_STE_CONTINUE_FILE_TX;
-                ftp_send_reply(150, NULL);
-            }
-            else {
-                ftp_data.state = E_FTP_STE_END_TRANSFER;
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_STOR:
-            ftp_get_param_and_open_child (&bufptr);
-            // first check if a software update is being requested
-            if (updater_check_path (ftp_path)) {
-                if (updater_start()) {
-                    ftp_data.special_file = true;
-                    ftp_data.state = E_FTP_STE_CONTINUE_FILE_RX;
-                    ftp_send_reply(150, NULL);
-                }
-                else {
-                    // to unlock the updater
-                    updater_finnish();
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            else {
-                if (ftp_open_file (ftp_path, FA_WRITE | FA_CREATE_ALWAYS)) {
-                    ftp_data.state = E_FTP_STE_CONTINUE_FILE_RX;
-                    ftp_send_reply(150, NULL);
-                }
-                else {
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_DELE:
-        case E_FTP_CMD_RMD:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_unlink_helper(ftp_path)) {
-                ftp_send_reply(250, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_MKD:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_mkdir_helper(ftp_path)) {
-                ftp_send_reply(250, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_RNFR:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_stat_helper(ftp_path, &fno)) {
-                ftp_send_reply(350, NULL);
-                // save the current path
-                strcpy ((char *)ftp_data.dBuffer, ftp_path);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_RNTO:
-            ftp_get_param_and_open_child (&bufptr);
-            // old path was saved in the data buffer
-            if (FR_OK == (fres = f_rename_helper((char *)ftp_data.dBuffer, ftp_path))) {
-                ftp_send_reply(250, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_NOOP:
-            ftp_send_reply(200, NULL);
-            break;
-        case E_FTP_CMD_QUIT:
-            ftp_send_reply(221, NULL);
-            break;
-        default:
-            // command not implemented
-            ftp_send_reply(502, NULL);
-            break;
-        }
-
-        if (ftp_data.closechild) {
-            ftp_return_to_previous_path(ftp_path, ftp_scratch_buffer);
-        }
-    }
-    else if (result == E_FTP_RESULT_CONTINUE) {
-        if (ftp_data.ctimeout++ > (servers_get_timeout() / FTP_CYCLE_TIME_MS)) {
-            ftp_send_reply(221, NULL);
-        }
-    }
-    else {
-        ftp_close_cmd_data ();
-    }
-}
-
-static void ftp_close_files (void) {
-    if (ftp_data.e_open == E_FTP_FILE_OPEN) {
-        f_close(&ftp_data.fp);
-    }
-    else if (ftp_data.e_open == E_FTP_DIR_OPEN) {
-        f_closedir(&ftp_data.dp);
-    }
-    ftp_data.e_open = E_FTP_NOTHING_OPEN;
-}
-
-static void ftp_close_filesystem_on_error (void) {
-    ftp_close_files();
-    if (ftp_data.special_file) {
-        updater_finnish ();
-        ftp_data.special_file = false;
-    }
-}
-
-static void ftp_close_cmd_data (void) {
-    servers_close_socket(&ftp_data.c_sd);
-    servers_close_socket(&ftp_data.d_sd);
-    ftp_close_filesystem_on_error ();
-}
-
-static void stoupper (char *str) {
-    while (str && *str != '\0') {
-        *str = (char)unichar_toupper((int)(*str));
-        str++;
-    }
-}
-
-static ftp_cmd_index_t ftp_pop_command (char **str) {
-    char _cmd[FTP_CMD_SIZE_MAX];
-    ftp_pop_param (str, _cmd);
-    stoupper (_cmd);
-    for (ftp_cmd_index_t i = 0; i < E_FTP_NUM_FTP_CMDS; i++) {
-        if (!strcmp (_cmd, ftp_cmd_table[i].cmd)) {
-            // move one step further to skip the space
-            (*str)++;
-            return i;
-        }
-    }
-    return E_FTP_CMD_NOT_SUPPORTED;
-}
-
-static void ftp_pop_param (char **str, char *param) {
-    while (**str != ' ' && **str != '\r' && **str != '\n' && **str != '\0') {
-        *param++ = **str;
-        (*str)++;
-    }
-    *param = '\0';
-}
-
-static int ftp_print_eplf_item (char *dest, uint32_t destsize, FILINFO *fno) {
-
-    char *type = (fno->fattrib & AM_DIR) ? "d" : "-";
-    uint32_t tseconds;
-    uint mindex = (((fno->fdate >> 5) & 0x0f) > 0) ? (((fno->fdate >> 5) & 0x0f) - 1) : 0;
-    uint day = ((fno->fdate & 0x1f) > 0) ? (fno->fdate & 0x1f) : 1;
-    uint fseconds = timeutils_seconds_since_2000(1980 + ((fno->fdate >> 9) & 0x7f),
-                                                        (fno->fdate >> 5) & 0x0f,
-                                                        fno->fdate & 0x1f,
-                                                        (fno->ftime >> 11) & 0x1f,
-                                                        (fno->ftime >> 5) & 0x3f,
-                                                        2 * (fno->ftime & 0x1f));
-    tseconds = pyb_rtc_get_seconds();
-    if (FTP_UNIX_SECONDS_180_DAYS < tseconds - fseconds) {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %5u %s\r\n",
-                        type, (_u32)fno->fsize, ftp_month[mindex].month, day,
-                        1980 + ((fno->fdate >> 9) & 0x7f), fno->fname);
-    }
-    else {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %02u:%02u %s\r\n",
-                        type, (_u32)fno->fsize, ftp_month[mindex].month, day,
-                        (fno->ftime >> 11) & 0x1f, (fno->ftime >> 5) & 0x3f, fno->fname);
-    }
-}
-
-static int ftp_print_eplf_drive (char *dest, uint32_t destsize, const char *name) {
-    timeutils_struct_time_t tm;
-    uint32_t tseconds;
-    char *type = "d";
-
-    timeutils_seconds_since_2000_to_struct_time((FTP_UNIX_TIME_20150101 - FTP_UNIX_TIME_20000101), &tm);
-
-    tseconds = pyb_rtc_get_seconds();
-    if (FTP_UNIX_SECONDS_180_DAYS < tseconds - (FTP_UNIX_TIME_20150101 - FTP_UNIX_TIME_20000101)) {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %5u %s\r\n",
-                        type, 0, ftp_month[(tm.tm_mon - 1)].month, tm.tm_mday, tm.tm_year, name);
-    }
-    else {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %02u:%02u %s\r\n",
-                        type, 0, ftp_month[(tm.tm_mon - 1)].month, tm.tm_mday, tm.tm_hour, tm.tm_min, name);
-    }
-}
-
-static bool ftp_open_file (const char *path, int mode) {
-    FRESULT res = f_open_helper(&ftp_data.fp, path, mode);
-    if (res != FR_OK) {
-        return false;
-    }
-    ftp_data.e_open = E_FTP_FILE_OPEN;
-    return true;
-}
-
-static ftp_result_t ftp_read_file (char *filebuf, uint32_t desiredsize, uint32_t *actualsize) {
-    ftp_result_t result = E_FTP_RESULT_CONTINUE;
-    FRESULT res = f_read(&ftp_data.fp, filebuf, desiredsize, (UINT *)actualsize);
-    if (res != FR_OK) {
-        ftp_close_files();
-        result = E_FTP_RESULT_FAILED;
-        *actualsize = 0;
-    }
-    else if (*actualsize < desiredsize) {
-        ftp_close_files();
-        result = E_FTP_RESULT_OK;
-    }
-    return result;
-}
-
-static ftp_result_t ftp_write_file (char *filebuf, uint32_t size) {
-    ftp_result_t result = E_FTP_RESULT_FAILED;
-    uint32_t actualsize;
-    FRESULT res = f_write(&ftp_data.fp, filebuf, size, (UINT *)&actualsize);
-    if ((actualsize == size) && (FR_OK == res)) {
-        result = E_FTP_RESULT_OK;
-    }
-    else {
-        ftp_close_files();
-    }
-    return result;
-}
-
-static ftp_result_t ftp_open_dir_for_listing (const char *path) {
-    // "hack" to detect the root directory
-    if (path[0] == '/' && path[1] == '\0') {
-        ftp_data.listroot = true;
-    } else {
-        FRESULT res;
-        res = f_opendir_helper(&ftp_data.dp, path); /* Open the directory */
-        if (res != FR_OK) {
-            return E_FTP_RESULT_FAILED;
-        }
-        ftp_data.e_open = E_FTP_DIR_OPEN;
-        ftp_data.listroot = false;
-    }
-    return E_FTP_RESULT_CONTINUE;
-}
-
-static ftp_result_t ftp_list_dir (char *list, uint32_t maxlistsize, uint32_t *listsize) {
-    uint next = 0;
-    uint listcount = 0;
-    FRESULT res;
-    ftp_result_t result = E_FTP_RESULT_CONTINUE;
-    FILINFO fno;
-#if _USE_LFN
-    // read up to 2 directory items
-    while (listcount < 2) {
-#else
-    // read up to 4 directory items
-    while (listcount < 4) {
-#endif
-        if (ftp_data.listroot) {
-            // root directory "hack"
-            mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table);
-            int i = ftp_data.volcount;
-            while (vfs != NULL && i != 0) {
-                vfs = vfs->next;
-                i -= 1;
-            }
-            if (vfs == NULL) {
-                if (!next) {
-                    // no volume found this time, we are done
-                    ftp_data.volcount = 0;
-                }
-                break;
-            } else {
-                next += ftp_print_eplf_drive((list + next), (maxlistsize - next), vfs->str + 1);
-            }
-            ftp_data.volcount++;
-        } else {
-            // a "normal" directory
-            res = f_readdir(&ftp_data.dp, &fno);                                                       /* Read a directory item */
-            if (res != FR_OK || fno.fname[0] == 0) {
-                result = E_FTP_RESULT_OK;
-                break;                                                                                 /* Break on error or end of dp */
-            }
-            if (fno.fname[0] == '.' && fno.fname[1] == 0) continue;                                    /* Ignore . entry */
-            if (fno.fname[0] == '.' && fno.fname[1] == '.' && fno.fname[2] == 0) continue;             /* Ignore .. entry */
-
-            // add the entry to the list
-            next += ftp_print_eplf_item((list + next), (maxlistsize - next), &fno);
-        }
-        listcount++;
-    }
-    if (result == E_FTP_RESULT_OK) {
-        ftp_close_files();
-    }
-    *listsize = next;
-    return result;
-}
-
-static void ftp_open_child (char *pwd, char *dir) {
-    if (dir[0] == '/') {
-        strcpy (pwd, dir);
-    } else {
-        if (strlen(pwd) > 1) {
-            strcat (pwd, "/");
-        }
-        strcat (pwd, dir);
-    }
-
-    uint len = strlen(pwd);
-    if ((len > 1) && (pwd[len - 1] == '/')) {
-        pwd[len - 1] = '\0';
-    }
-}
-
-static void ftp_close_child (char *pwd) {
-    uint len = strlen(pwd);
-    while (len && (pwd[len] != '/')) {
-        len--;
-    }
-    if (len == 0) {
-        strcpy (pwd, "/");
-    } else {
-        pwd[len] = '\0';
-    }
-}
-
-static void ftp_return_to_previous_path (char *pwd, char *dir) {
-    uint newlen = strlen(pwd) - strlen(dir);
-    if ((newlen > 2) && (pwd[newlen - 1] == '/')) {
-        pwd[newlen - 1] = '\0';
-    }
-    else {
-        if (newlen == 0) {
-            strcpy (pwd, "/");
-        } else {
-            pwd[newlen] = '\0';
-        }
-    }
-}
-
diff --git a/ports/cc3200/ftp/ftp.h b/ports/cc3200/ftp/ftp.h
deleted file mode 100644
index af4c14fa3b..0000000000
--- a/ports/cc3200/ftp/ftp.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_FTP_FTP_H
-#define MICROPY_INCLUDED_CC3200_FTP_FTP_H
-
-/******************************************************************************
- DECLARE EXPORTED FUNCTIONS
- ******************************************************************************/
-extern void ftp_init (void);
-extern void ftp_run (void);
-extern void ftp_enable (void);
-extern void ftp_disable (void);
-extern void ftp_reset (void);
-
-#endif // MICROPY_INCLUDED_CC3200_FTP_FTP_H
diff --git a/ports/cc3200/ftp/updater.c b/ports/cc3200/ftp/updater.c
deleted file mode 100644
index 5be2c6063c..0000000000
--- a/ports/cc3200/ftp/updater.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "simplelink.h"
-#include "flc.h"
-#include "updater.h"
-#include "shamd5.h"
-#include "modnetwork.h"
-#include "modwlan.h"
-#include "debug.h"
-#include "osi.h"
-
-/******************************************************************************
- DEFINE PRIVATE CONSTANTS
- ******************************************************************************/
-#define UPDATER_IMG_PATH            "/flash/sys/mcuimg.bin"
-#define UPDATER_SRVPACK_PATH        "/flash/sys/servicepack.ucf"
-#define UPDATER_SIGN_PATH           "/flash/sys/servicepack.sig"
-#define UPDATER_CA_PATH             "/flash/cert/ca.pem"
-#define UPDATER_CERT_PATH           "/flash/cert/cert.pem"
-#define UPDATER_KEY_PATH            "/flash/cert/private.key"
-
-/******************************************************************************
- DEFINE TYPES
- ******************************************************************************/
-typedef struct {
-    char *path;
-    _i32 fhandle;
-    _u32 fsize;
-    _u32 foffset;
-} updater_data_t;
-
-/******************************************************************************
- DECLARE PRIVATE DATA
- ******************************************************************************/
-static updater_data_t updater_data = { .path = NULL, .fhandle = -1, .fsize = 0, .foffset = 0 };
-static OsiLockObj_t updater_LockObj;
-static sBootInfo_t sBootInfo;
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-__attribute__ ((section (".boot")))
-void updater_pre_init (void) {
-    // create the updater lock
-    ASSERT(OSI_OK == sl_LockObjCreate(&updater_LockObj, "UpdaterLock"));
-}
-
-bool updater_check_path (void *path) {
-    sl_LockObjLock (&updater_LockObj, SL_OS_WAIT_FOREVER);
-    if (!strcmp(UPDATER_IMG_PATH, path)) {
-        updater_data.fsize = IMG_SIZE;
-        updater_data.path = IMG_UPDATE1;
-// the launchxl doesn't have enough flash space for 2 user update images
-#ifdef WIPY
-        // check which one should be the next active image
-         _i32 fhandle;
-        if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-            ASSERT (sizeof(sBootInfo_t) == sl_FsRead(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t)));
-            sl_FsClose(fhandle, 0, 0, 0);
-            // if we still have an image pending for verification, keep overwriting it
-            if ((sBootInfo.Status == IMG_STATUS_CHECK && sBootInfo.ActiveImg == IMG_ACT_UPDATE2) ||
-                 (sBootInfo.ActiveImg == IMG_ACT_UPDATE1 && sBootInfo.Status != IMG_STATUS_CHECK)) {
-                updater_data.path = IMG_UPDATE2;
-            }
-        }
-#endif
-    } else if (!strcmp(UPDATER_SRVPACK_PATH, path)) {
-        updater_data.path = IMG_SRVPACK;
-        updater_data.fsize = SRVPACK_SIZE;
-    } else if (!strcmp(UPDATER_SIGN_PATH, path)) {
-        updater_data.path = SRVPACK_SIGN;
-        updater_data.fsize = SIGN_SIZE;
-    } else if (!strcmp(UPDATER_CA_PATH, path)) {
-        updater_data.path = CA_FILE;
-        updater_data.fsize = CA_KEY_SIZE;
-    } else if (!strcmp(UPDATER_CERT_PATH, path)) {
-        updater_data.path = CERT_FILE;
-        updater_data.fsize = CA_KEY_SIZE;
-    } else if (!strcmp(UPDATER_KEY_PATH, path)) {
-        updater_data.path = KEY_FILE;
-        updater_data.fsize = CA_KEY_SIZE;
-    } else {
-        sl_LockObjUnlock (&updater_LockObj);
-        return false;
-    }
-    return true;
-}
-
-bool updater_start (void) {
-    _u32 AccessModeAndMaxSize = FS_MODE_OPEN_WRITE;
-    SlFsFileInfo_t FsFileInfo;
-    bool result = false;
-
-    sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-    if (0 != sl_FsGetInfo((_u8 *)updater_data.path, 0, &FsFileInfo)) {
-        // file doesn't exist, create it
-        AccessModeAndMaxSize = FS_MODE_OPEN_CREATE(updater_data.fsize, 0);
-    }
-    if (!sl_FsOpen((_u8 *)updater_data.path, AccessModeAndMaxSize, NULL, &updater_data.fhandle)) {
-        updater_data.foffset = 0;
-        result = true;
-    }
-    sl_LockObjUnlock (&wlan_LockObj);
-    return result;
-}
-
-bool updater_write (uint8_t *buf, uint32_t len) {
-    bool result = false;
-
-    sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-    if (len == sl_FsWrite(updater_data.fhandle, updater_data.foffset, buf, len)) {
-        updater_data.foffset += len;
-        result = true;
-    }
-    sl_LockObjUnlock (&wlan_LockObj);
-
-    return result;
-}
-
-void updater_finnish (void) {
-    _i32 fhandle;
-
-    if (updater_data.fhandle > 0) {
-        sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-        // close the file being updated
-        sl_FsClose(updater_data.fhandle, NULL, NULL, 0);
-#ifdef WIPY
-        // if we still have an image pending for verification, leave the boot info as it is
-        if (!strncmp(IMG_PREFIX, updater_data.path, strlen(IMG_PREFIX)) && sBootInfo.Status != IMG_STATUS_CHECK) {
-#else
-        if (!strncmp(IMG_PREFIX, updater_data.path, strlen(IMG_PREFIX))) {
-#endif
-#ifdef DEBUG
-            if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-
-                ASSERT (sizeof(sBootInfo_t) == sl_FsRead(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t)));
-                sl_FsClose(fhandle, 0, 0, 0);
-#endif
-                // open the boot info file for writing
-                ASSERT (sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_WRITE, NULL, &fhandle) == 0);
-#ifdef DEBUG
-            }
-            else {
-                // the boot info file doesn't exist yet
-                _u32 BootInfoCreateFlag  = _FS_FILE_OPEN_FLAG_COMMIT | _FS_FILE_PUBLIC_WRITE | _FS_FILE_PUBLIC_READ;
-                ASSERT (sl_FsOpen ((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_CREATE((2 * sizeof(sBootInfo_t)),
-                                   BootInfoCreateFlag), NULL, &fhandle) == 0);
-            }
-#endif
-
-            // save the new boot info
-#ifdef WIPY
-            sBootInfo.PrevImg = sBootInfo.ActiveImg;
-            if (sBootInfo.ActiveImg == IMG_ACT_UPDATE1) {
-                sBootInfo.ActiveImg = IMG_ACT_UPDATE2;
-            } else {
-                sBootInfo.ActiveImg = IMG_ACT_UPDATE1;
-            }
-// the launchxl doesn't have enough flash space for 2 user updates
-#else
-            sBootInfo.PrevImg = IMG_ACT_FACTORY;
-            sBootInfo.ActiveImg = IMG_ACT_UPDATE1;
-#endif
-            sBootInfo.Status = IMG_STATUS_CHECK;
-            ASSERT (sizeof(sBootInfo_t) == sl_FsWrite(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t)));
-            sl_FsClose(fhandle, 0, 0, 0);
-        }
-        sl_LockObjUnlock (&wlan_LockObj);
-        updater_data.fhandle = -1;
-    }
-    sl_LockObjUnlock (&updater_LockObj);
-}
-
diff --git a/ports/cc3200/ftp/updater.h b/ports/cc3200/ftp/updater.h
deleted file mode 100644
index 51248e4bf3..0000000000
--- a/ports/cc3200/ftp/updater.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_FTP_UPDATER_H
-#define MICROPY_INCLUDED_CC3200_FTP_UPDATER_H
-
-extern void updater_pre_init (void);
-extern bool updater_check_path (void *path);
-extern bool updater_start (void);
-extern bool updater_write (uint8_t *buf, uint32_t len);
-extern void updater_finnish (void);
-extern bool updater_verify (uint8_t *rbuff, uint8_t *hasbuff);
-
-#endif // MICROPY_INCLUDED_CC3200_FTP_UPDATER_H
diff --git a/ports/cc3200/hal/adc.c b/ports/cc3200/hal/adc.c
deleted file mode 100644
index 23d219e1d9..0000000000
--- a/ports/cc3200/hal/adc.c
+++ /dev/null
@@ -1,692 +0,0 @@
-//*****************************************************************************
-//
-//  adc.c
-//
-//  Driver for the ADC module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup ADC_Analog_to_Digital_Converter_api
-//! @{
-//
-//*****************************************************************************
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_adc.h"
-#include "inc/hw_apps_config.h"
-#include "interrupt.h"
-#include "adc.h"
-
-
-//*****************************************************************************
-//
-//! Enables the ADC
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function sets the ADC global enable
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCEnable(unsigned long ulBase)
-{
-  //
-  // Set the global enable bit in the control register.
-  //
-  HWREG(ulBase + ADC_O_ADC_CTRL) |= 0x1;
-}
-
-//*****************************************************************************
-//
-//! Disable the ADC
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function clears the ADC global enable
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCDisable(unsigned long ulBase)
-{
-  //
-  // Clear the global enable bit in the control register.
-  //
-  HWREG(ulBase + ADC_O_ADC_CTRL) &= ~0x1 ;
-}
-
-//*****************************************************************************
-//
-//! Enables specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function enables specified ADC channel and configures the
-//! pin as analog pin.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCChannelEnable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulCh;
-
-  ulCh =  (ulChannel == ADC_CH_0)? 0x02 :
-          (ulChannel == ADC_CH_1)? 0x04 :
-          (ulChannel == ADC_CH_2)? 0x08 : 0x10;
-
-  HWREG(ulBase + ADC_O_ADC_CH_ENABLE) |= ulCh;
-}
-
-//*****************************************************************************
-//
-//! Disables specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channelsber
-//!
-//! This function disables specified ADC channel.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCChannelDisable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulCh;
-
-  ulCh =  (ulChannel == ADC_CH_0)? 0x02 :
-          (ulChannel == ADC_CH_1)? 0x04 :
-          (ulChannel == ADC_CH_2)? 0x08 : 0x10;
-
-  HWREG(ulBase + ADC_O_ADC_CH_ENABLE) &= ~ulCh;
-}
-
-//*****************************************************************************
-//
-//! Enables and registers ADC interrupt handler for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//! \param pfnHandler is a pointer to the function to be called when the
-//! ADC channel interrupt occurs.
-//!
-//! This function enables and registers ADC interrupt handler for specified
-//! channel. Individual interrupt for each channel should be enabled using
-//! \sa ADCIntEnable(). It is the interrupt handler's responsibility to clear
-//! the interrupt source.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel,
-                    void (*pfnHandler)(void))
-{
-  unsigned long ulIntNo;
-
-  //
-  // Get the interrupt number associted with the specified channel
-  //
-  ulIntNo = (ulChannel == ADC_CH_0)? INT_ADCCH0 :
-            (ulChannel == ADC_CH_1)? INT_ADCCH1 :
-            (ulChannel == ADC_CH_2)? INT_ADCCH2 : INT_ADCCH3;
-
-  //
-  // Register the interrupt handler
-  //
-  IntRegister(ulIntNo,pfnHandler);
-
-  //
-  // Enable ADC interrupt
-  //
-  IntEnable(ulIntNo);
-}
-
-
-//*****************************************************************************
-//
-//! Disables and unregisters ADC interrupt handler for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function disables and unregisters ADC interrupt handler for specified
-//! channel. This function also masks off the interrupt in the interrupt
-//! controller so that the interrupt handler no longer is called.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntUnregister(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulIntNo;
-
-  //
-  // Get the interrupt number associted with the specified channel
-  //
-  ulIntNo = (ulChannel == ADC_CH_0)? INT_ADCCH0 :
-            (ulChannel == ADC_CH_1)? INT_ADCCH1 :
-            (ulChannel == ADC_CH_2)? INT_ADCCH2 : INT_ADCCH3;
-
-  //
-  // Disable ADC interrupt
-  //
-  IntDisable(ulIntNo);
-
-  //
-  // Unregister the interrupt handler
-  //
-  IntUnregister(ulIntNo);
-}
-
-//*****************************************************************************
-//
-//! Enables individual interrupt sources for specified channel
-//!
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated ADC interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//! - \b ADC_DMA_DONE for DMA done
-//! - \b ADC_FIFO_OVERFLOW for FIFO over flow
-//! - \b ADC_FIFO_UNDERFLOW for FIFO under flow
-//! - \b ADC_FIFO_EMPTY for FIFO empty
-//! - \b ADC_FIFO_FULL for FIFO full
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntEnable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-
-  //
-  // Enable DMA Done interrupt
-  //
-  if(ulIntFlags & ADC_DMA_DONE)
-  {
-     ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-                (ulChannel == ADC_CH_1)?0x00002000:
-                (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-     HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) = ulDmaMsk;
-  }
-
-  ulIntFlags = ulIntFlags &  0x0F;
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_en + ulChannel;
-
-  //
-  // Unmask the specified interrupts
-  //
-  HWREG(ulBase + ulOffset) |= (ulIntFlags & 0xf);
-}
-
-
-//*****************************************************************************
-//
-//! Disables individual interrupt sources for specified channel
-//!
-//!
-//! \param ulBase is the base address of the ADC.
-//! \param ulChannel is one of the valid ADC channels
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function disables the indicated ADC interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The parameters\e ulIntFlags and \e ulChannel should be as explained in
-//! ADCIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntDisable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-
-  //
-  // Disable DMA Done interrupt
-  //
-  if(ulIntFlags & ADC_DMA_DONE)
-  {
-     ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-                (ulChannel == ADC_CH_1)?0x00002000:
-                (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-     HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) = ulDmaMsk;
-  }
-
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_en + ulChannel;
-
-  //
-  // Unmask the specified interrupts
-  //
-  HWREG(ulBase + ulOffset) &= ~ulIntFlags;
-}
-
-
-//*****************************************************************************
-//
-//! Gets the current channel interrupt status
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function returns the interrupt status of the specified ADC channel.
-//!
-//! The parameter \e ulChannel should be as explained in \sa ADCIntEnable().
-//!
-//! \return Return the ADC channel interrupt status,  enumerated as a bit
-//! field of values described in ADCIntEnable()
-//
-//*****************************************************************************
-unsigned long ADCIntStatus(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-  unsigned long ulIntStatus;
-
-  //
-  // Get DMA Done interrupt status
-  //
-  ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-            (ulChannel == ADC_CH_1)?0x00002000:
-            (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-  ulIntStatus = HWREG(APPS_CONFIG_BASE +
-                     APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED)& ulDmaMsk;
-
-
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_status + ulChannel;
-
-  //
-  // Read ADC interrupt status
-  //
-  ulIntStatus |= HWREG(ulBase + ulOffset) & 0xf;
-
-  //
-  // Return the current interrupt status
-  //
-  return(ulIntStatus);
-}
-
-
-//*****************************************************************************
-//
-//! Clears the current channel interrupt sources
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//! \param ulIntFlags is the bit mask of the interrupt sources to be cleared.
-//!
-//! This function clears individual interrupt source for the specified
-//! ADC channel.
-//!
-//! The parameter \e ulChannel should be as explained in \sa ADCIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntClear(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-
-  //
-  // Clear DMA Done interrupt
-  //
-  if(ulIntFlags & ADC_DMA_DONE)
-  {
-     ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-                (ulChannel == ADC_CH_1)?0x00002000:
-                (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-     HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) = ulDmaMsk;
-  }
-
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_status + ulChannel;
-
-  //
-  // Clear the specified interrupts
-  //
-  HWREG(ulBase + ulOffset) = (ulIntFlags & ~(ADC_DMA_DONE));
-}
-
-//*****************************************************************************
-//
-//! Enables the ADC DMA operation for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function enables the DMA operation for specified ADC channel
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCDMAEnable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulBitMask;
-
-  //
-  // Get the bit mask for enabling DMA for specified channel
-  //
-  ulBitMask = (ulChannel == ADC_CH_0)?0x01:
-              (ulChannel == ADC_CH_1)?0x04:
-              (ulChannel == ADC_CH_2)?0x10:0x40;
-
-  //
-  // Enable DMA request for the specified channel
-  //
-  HWREG(ulBase + ADC_O_adc_dma_mode_en) |= ulBitMask;
-}
-
-//*****************************************************************************
-//
-//! Disables the ADC DMA operation for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function disables the DMA operation for specified ADC channel
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCDMADisable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulBitMask;
-
-  //
-  // Get the bit mask for disabling DMA for specified channel
-  //
-  ulBitMask = (ulChannel == ADC_CH_0)?0x01:
-              (ulChannel == ADC_CH_1)?0x04:
-              (ulChannel == ADC_CH_2)?0x10:0x40;
-
-  //
-  // Disable DMA request for the specified channel
-  //
-  HWREG(ulBase + ADC_O_adc_dma_mode_en) &= ~ulBitMask;
-}
-
-//*****************************************************************************
-//
-//! Configures the ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulValue is wrap arround value of the timer
-//!
-//! This function Configures the ADC internal timer. The ADC timer is a 17 bit
-//! used to timestamp the ADC data samples internally.
-//! User can read the timestamp along with the sample from the FIFO register(s).
-//! Each sample in the FIFO contains 14 bit actual data and 18 bit timestamp
-//!
-//! The parameter \e ulValue can take any value between 0 - 2^17
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerConfig(unsigned long ulBase, unsigned long ulValue)
-{
-  unsigned long ulReg;
-
-  //
-  // Read the currrent config
-  //
-  ulReg =  HWREG(ulBase + ADC_O_adc_timer_configuration);
-
-  //
-  // Mask and set timer count field
-  //
-  ulReg = ((ulReg & ~0x1FFFF) | (ulValue & 0x1FFFF));
-
-  //
-  // Set the timer count value
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) = ulReg;
-}
-
-//*****************************************************************************
-//
-//! Resets ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function resets 17-bit ADC internal timer
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerReset(unsigned long ulBase)
-{
-  //
-  // Reset the timer
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) |= (1 << 24);
-}
-
-//*****************************************************************************
-//
-//! Enables ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function enables 17-bit ADC internal timer
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerEnable(unsigned long ulBase)
-{
-  //
-  // Enable the timer
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) |= (1 << 25);
-}
-
-//*****************************************************************************
-//
-//! Disables ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function disables 17-bit ADC internal timer
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerDisable(unsigned long ulBase)
-{
-  //
-  // Disable the timer
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) &= ~(1 << 25);
-}
-
-//*****************************************************************************
-//
-//! Gets the current value of ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function the current value of 17-bit ADC internal timer
-//!
-//! \returns Return the current value of ADC internal timer.
-//
-//*****************************************************************************
-unsigned long ADCTimerValueGet(unsigned long ulBase)
-{
-  return(HWREG(ulBase + ADC_O_adc_timer_current_count));
-}
-
-//*****************************************************************************
-//
-//! Gets the current FIFO level for specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels.
-//!
-//! This function returns the current FIFO level for specified ADC channel.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \returns Return the current FIFO level for specified channel
-//
-//*****************************************************************************
-unsigned char ADCFIFOLvlGet(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulOffset;
-
-  //
-  // Get the fifo level register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_fifo_lvl + ulChannel;
-
-  //
-  // Return FIFO level
-  //
-  return(HWREG(ulBase + ulOffset) & 0x7);
-}
-
-//*****************************************************************************
-//
-//! Reads FIFO for specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels.
-//!
-//! This function returns one data sample from the channel fifo as specified by
-//! \e ulChannel parameter.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \returns Return one data sample from the channel fifo.
-//
-//*****************************************************************************
-unsigned long ADCFIFORead(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulOffset;
-
-  //
-  // Get the fifo register offset for specified channel
-  //
-  ulOffset = ADC_O_channel0FIFODATA + ulChannel;
-
-  //
-  // Return FIFO level
-  //
-  return(HWREG(ulBase + ulOffset));
-}
-
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/adc.h b/ports/cc3200/hal/adc.h
deleted file mode 100644
index 03e0ea52cf..0000000000
--- a/ports/cc3200/hal/adc.h
+++ /dev/null
@@ -1,117 +0,0 @@
-//*****************************************************************************
-//
-//  adc.h
-//
-//  Defines and Macros for the ADC.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __ADC_H__
-#define __ADC_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-// Values that can be passed to APIs as ulChannel parameter
-//*****************************************************************************
-#define ADC_CH_0   0x00000000
-#define ADC_CH_1   0x00000008
-#define ADC_CH_2   0x00000010
-#define ADC_CH_3   0x00000018
-
-
-//*****************************************************************************
-//
-// Values that can be passed to ADCIntEnable(), ADCIntDisable()
-// and ADCIntClear() as ulIntFlags, and returned from ADCIntStatus()
-//
-//*****************************************************************************
-#define ADC_DMA_DONE        0x00000010
-#define ADC_FIFO_OVERFLOW   0x00000008
-#define ADC_FIFO_UNDERFLOW  0x00000004
-#define ADC_FIFO_EMPTY      0x00000002
-#define ADC_FIFO_FULL       0x00000001
-
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void ADCEnable(unsigned long ulBase);
-extern void ADCDisable(unsigned long ulBase);
-extern void ADCChannelEnable(unsigned long ulBase,unsigned long ulChannel);
-extern void ADCChannelDisable(unsigned long ulBase,unsigned long ulChannel);
-extern void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel,
-                    void (*pfnHandler)(void));
-extern void ADCIntUnregister(unsigned long ulBase, unsigned long ulChannel);
-extern void ADCIntEnable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags);
-extern void ADCIntDisable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags);
-extern unsigned long ADCIntStatus(unsigned long ulBase,unsigned long ulChannel);
-extern void ADCIntClear(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags);
-extern void ADCDMAEnable(unsigned long ulBase, unsigned long ulChannel);
-extern void ADCDMADisable(unsigned long ulBase, unsigned long ulChannel);
-extern void ADCTimerConfig(unsigned long ulBase, unsigned long ulValue);
-extern void ADCTimerEnable(unsigned long ulBase);
-extern void ADCTimerDisable(unsigned long ulBase);
-extern void ADCTimerReset(unsigned long ulBase);
-extern unsigned long ADCTimerValueGet(unsigned long ulBase);
-extern unsigned char ADCFIFOLvlGet(unsigned long ulBase,
-                                   unsigned long ulChannel);
-extern unsigned long ADCFIFORead(unsigned long ulBase,
-                                   unsigned long ulChannel);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __ADC_H__
-
diff --git a/ports/cc3200/hal/aes.c b/ports/cc3200/hal/aes.c
deleted file mode 100644
index e0e129ef5f..0000000000
--- a/ports/cc3200/hal/aes.c
+++ /dev/null
@@ -1,1360 +0,0 @@
-//*****************************************************************************
-//
-//  aes.c
-//
-//  Driver for the AES module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup AES_Advanced_Encryption_Standard_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_aes.h"
-#include "inc/hw_dthe.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_types.h"
-#include "aes.h"
-#include "debug.h"
-#include "interrupt.h"
-
-#define AES_BLOCK_SIZE_IN_BYTES 16
-
-//*****************************************************************************
-//
-//! Configures the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Config is the configuration of the AES module.
-//!
-//! This function configures the AES module based on the specified parameters.
-//! It does not change any DMA- or interrupt-related parameters.
-//!
-//! The ui32Config parameter is a bit-wise OR of a number of configuration
-//! flags. The valid flags are grouped based on their function.
-//!
-//! The direction of the operation is specified with only of following flags:
-//!
-//! - \b AES_CFG_DIR_ENCRYPT - Encryption mode
-//! - \b AES_CFG_DIR_DECRYPT - Decryption mode
-//!
-//! The key size is specified with only one of the following flags:
-//!
-//! - \b AES_CFG_KEY_SIZE_128BIT - Key size of 128 bits
-//! - \b AES_CFG_KEY_SIZE_192BIT - Key size of 192 bits
-//! - \b AES_CFG_KEY_SIZE_256BIT - Key size of 256 bits
-//!
-//! The mode of operation is specified with only one of the following flags.
-//!
-//! - \b AES_CFG_MODE_ECB - Electronic codebook mode
-//! - \b AES_CFG_MODE_CBC - Cipher-block chaining mode
-//! - \b AES_CFG_MODE_CFB - Cipher feedback mode
-//! - \b AES_CFG_MODE_CTR - Counter mode
-//! - \b AES_CFG_MODE_ICM - Integer counter mode
-//! - \b AES_CFG_MODE_XTS - Ciphertext stealing mode
-//! - \b AES_CFG_MODE_XTS_TWEAKJL - XEX-based tweaked-codebook mode with
-//! ciphertext stealing with previous/intermediate tweak value and j loaded
-//! - \b AES_CFG_MODE_XTS_K2IJL - XEX-based tweaked-codebook mode with
-//! ciphertext stealing with key2, i and j loaded
-//! - \b AES_CFG_MODE_XTS_K2ILJ0 - XEX-based tweaked-codebook mode with
-//! ciphertext stealing with key2 and i loaded, j = 0
-//! - \b AES_CFG_MODE_F8 - F8 mode
-//! - \b AES_CFG_MODE_F9 - F9 mode
-//! - \b AES_CFG_MODE_CBCMAC - Cipher block chaining message authentication
-//! code mode
-//! - \b AES_CFG_MODE_GCM - Galois/counter mode
-//! - \b AES_CFG_MODE_GCM_HLY0ZERO - Galois/counter mode with GHASH with H
-//! loaded and Y0-encrypted forced to zero
-//! - \b AES_CFG_MODE_GCM_HLY0CALC - Galois/counter mode with GHASH with H
-//! loaded and Y0-encrypted calculated internally
-//! - \b AES_CFG_MODE_GCM_HY0CALC - Galois/Counter mode with autonomous GHASH
-//! (both H and Y0-encrypted calculated internally)
-//! - \b AES_CFG_MODE_CCM - Counter with CBC-MAC mode
-//!
-//! The following defines are used to specify the counter width.  It is only
-//! required to be defined when using CTR, CCM, or GCM modes, only one of the
-//! following defines must be used to specify the counter width length:
-//!
-//! - \b AES_CFG_CTR_WIDTH_32 - Counter is 32 bits
-//! - \b AES_CFG_CTR_WIDTH_64 - Counter is 64 bits
-//! - \b AES_CFG_CTR_WIDTH_96 - Counter is 96 bits
-//! - \b AES_CFG_CTR_WIDTH_128 - Counter is 128 bits
-//!
-//! Only one of the following defines must be used to specify the length field
-//! for CCM operations (L):
-//!
-//! - \b AES_CFG_CCM_L_2 - 2 bytes
-//! - \b AES_CFG_CCM_L_4 - 4 bytes
-//! - \b AES_CFG_CCM_L_8 - 8 bytes
-//!
-//! Only one of the following defines must be used to specify the length of the
-//! authentication field for CCM operations (M) through the \e ui32Config
-//! argument in the AESConfigSet() function:
-//!
-//! - \b AES_CFG_CCM_M_4 - 4 bytes
-//! - \b AES_CFG_CCM_M_6 - 6 bytes
-//! - \b AES_CFG_CCM_M_8 - 8 bytes
-//! - \b AES_CFG_CCM_M_10 - 10 bytes
-//! - \b AES_CFG_CCM_M_12 - 12 bytes
-//! - \b AES_CFG_CCM_M_14 - 14 bytes
-//! - \b AES_CFG_CCM_M_16 - 16 bytes
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Config & AES_CFG_DIR_ENCRYPT) ||
-           (ui32Config & AES_CFG_DIR_DECRYPT));
-    ASSERT((ui32Config & AES_CFG_KEY_SIZE_128BIT) ||
-           (ui32Config & AES_CFG_KEY_SIZE_192BIT) ||
-           (ui32Config & AES_CFG_KEY_SIZE_256BIT));
-    ASSERT((ui32Config & AES_CFG_MODE_ECB) ||
-           (ui32Config & AES_CFG_MODE_CBC) ||
-           (ui32Config & AES_CFG_MODE_CTR) ||
-           (ui32Config & AES_CFG_MODE_ICM) ||
-           (ui32Config & AES_CFG_MODE_CFB) ||
-           (ui32Config & AES_CFG_MODE_XTS_TWEAKJL) ||
-           (ui32Config & AES_CFG_MODE_XTS_K2IJL) ||
-           (ui32Config & AES_CFG_MODE_XTS_K2ILJ0) ||
-           (ui32Config & AES_CFG_MODE_F8) ||
-           (ui32Config & AES_CFG_MODE_F9) ||
-           (ui32Config & AES_CFG_MODE_CTR) ||
-           (ui32Config & AES_CFG_MODE_CBCMAC) ||
-           (ui32Config & AES_CFG_MODE_GCM_HLY0ZERO) ||
-           (ui32Config & AES_CFG_MODE_GCM_HLY0CALC) ||
-           (ui32Config & AES_CFG_MODE_GCM_HY0CALC) ||
-           (ui32Config & AES_CFG_MODE_CCM));
-    ASSERT(((ui32Config & AES_CFG_MODE_CTR) ||
-            (ui32Config & AES_CFG_MODE_GCM_HLY0ZERO) ||
-            (ui32Config & AES_CFG_MODE_GCM_HLY0CALC) ||
-            (ui32Config & AES_CFG_MODE_GCM_HY0CALC) ||
-            (ui32Config & AES_CFG_MODE_CCM)) &&
-           ((ui32Config & AES_CFG_CTR_WIDTH_32) ||
-            (ui32Config & AES_CFG_CTR_WIDTH_64) ||
-            (ui32Config & AES_CFG_CTR_WIDTH_96) ||
-            (ui32Config & AES_CFG_CTR_WIDTH_128)));
-    ASSERT((ui32Config & AES_CFG_MODE_CCM) &&
-           ((ui32Config & AES_CFG_CCM_L_2) ||
-            (ui32Config & AES_CFG_CCM_L_4) ||
-            (ui32Config & AES_CFG_CCM_L_8)) &&
-           ((ui32Config & AES_CFG_CCM_M_4) ||
-            (ui32Config & AES_CFG_CCM_M_6) ||
-            (ui32Config & AES_CFG_CCM_M_8) ||
-            (ui32Config & AES_CFG_CCM_M_10) ||
-            (ui32Config & AES_CFG_CCM_M_12) ||
-            (ui32Config & AES_CFG_CCM_M_14) ||
-            (ui32Config & AES_CFG_CCM_M_16)));
-
-    //
-    // Backup the save context field before updating the register.
-    //
-    if(HWREG(ui32Base + AES_O_CTRL) & AES_CTRL_SAVE_CONTEXT)
-    {
-        ui32Config |= AES_CTRL_SAVE_CONTEXT;
-    }
-
-    //
-    // Write the CTRL register with the new value
-    //
-    HWREG(ui32Base + AES_O_CTRL) = ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Writes the key 1 configuration registers, which are used for encryption or
-//! decryption.
-//!
-//! \param ui32Base is the base address for the AES module.
-//! \param pui8Key is an array of bytes, containing the key to be
-//! configured.  The least significant word in the 0th index.
-//! \param ui32Keysize is the size of the key, which must be one of the
-//! following values:  \b AES_CFG_KEY_SIZE_128, \b AES_CFG_KEY_SIZE_192, or
-//! \b AES_CFG_KEY_SIZE_256.
-//!
-//! This function writes key 1 configuration registers based on the key
-//! size.  This function is used in all modes.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key, uint32_t ui32Keysize)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Keysize == AES_CFG_KEY_SIZE_128BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_192BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_256BIT));
-
-    //
-    // With all key sizes, the first 4 words are written.
-    //
-    HWREG(ui32Base + AES_O_KEY1_0) = * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + AES_O_KEY1_1) = * ((uint32_t *)(pui8Key + 4));
-    HWREG(ui32Base + AES_O_KEY1_2) = * ((uint32_t *)(pui8Key + 8));
-    HWREG(ui32Base + AES_O_KEY1_3) = * ((uint32_t *)(pui8Key + 12));
-
-    //
-    // The key is 192 or 256 bits.  Write the next 2 words.
-    //
-    if(ui32Keysize != AES_CFG_KEY_SIZE_128BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY1_4) = * ((uint32_t *)(pui8Key + 16));
-        HWREG(ui32Base + AES_O_KEY1_5) = * ((uint32_t *)(pui8Key + 20));
-    }
-
-    //
-    // The key is 256 bits.  Write the last 2 words.
-    //
-    if(ui32Keysize == AES_CFG_KEY_SIZE_256BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY1_6) = * ((uint32_t *)(pui8Key + 24));
-        HWREG(ui32Base + AES_O_KEY1_7) = * ((uint32_t *)(pui8Key + 28));
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes the key 2 configuration registers, which are used for encryption or
-//! decryption.
-//!
-//! \param ui32Base is the base address for the AES module.
-//! \param pui8Key is an array of bytes, containing the key to be
-//! configured.  The least significant word in the 0th index.
-//! \param ui32Keysize is the size of the key, which must be one of the
-//! following values:  \b AES_CFG_KEY_SIZE_128, \b AES_CFG_KEY_SIZE_192, or
-//! \b AES_CFG_KEY_SIZE_256.
-//!
-//! This function writes the key 2 configuration registers based on the key
-//! size.  This function is used in the F8, F9, XTS, CCM, and CBC-MAC modes.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key, uint32_t ui32Keysize)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Keysize == AES_CFG_KEY_SIZE_128BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_192BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_256BIT));
-
-    //
-    // With all key sizes, the first 4 words are written.
-    //
-    HWREG(ui32Base + AES_O_KEY2_0) = * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + AES_O_KEY2_1) = * ((uint32_t *)(pui8Key + 4));
-    HWREG(ui32Base + AES_O_KEY2_2) = * ((uint32_t *)(pui8Key + 8));
-    HWREG(ui32Base + AES_O_KEY2_3) = * ((uint32_t *)(pui8Key + 12));
-
-    //
-    // The key is 192 or 256 bits.  Write the next 2 words.
-    //
-    if(ui32Keysize != AES_CFG_KEY_SIZE_128BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY2_4) = * ((uint32_t *)(pui8Key + 16));
-        HWREG(ui32Base + AES_O_KEY2_5) = * ((uint32_t *)(pui8Key + 20));
-    }
-
-    //
-    // The key is 256 bits.  Write the last 2 words.
-    //
-    if(ui32Keysize == AES_CFG_KEY_SIZE_256BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY2_6) = * ((uint32_t *)(pui8Key + 24));
-        HWREG(ui32Base + AES_O_KEY2_7) = * ((uint32_t *)(pui8Key + 28));
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes key 3 configuration registers, which are used for encryption or
-//! decryption.
-//!
-//! \param ui32Base is the base address for the AES module.
-//! \param pui8Key is a pointer to an array bytes, containing
-//! the key to be configured. The least significant word is in the 0th index.
-//!
-//! This function writes the key 2 configuration registers with key 3 data
-//! used in CBC-MAC and F8 modes.  This key is always 128 bits.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the key into the upper 4 key registers
-    //
-    HWREG(ui32Base + AES_O_KEY2_4) = * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + AES_O_KEY2_5) = * ((uint32_t *)(pui8Key + 4));
-    HWREG(ui32Base + AES_O_KEY2_6) = * ((uint32_t *)(pui8Key + 8));
-    HWREG(ui32Base + AES_O_KEY2_7) = * ((uint32_t *)(pui8Key + 12));
-}
-
-//*****************************************************************************
-//
-//! Writes the Initial Vector (IV) register, needed in some of the AES Modes.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8IVdata is an array of 16 bytes (128 bits), containing the IV
-//! value to be configured. The least significant word is in the 0th index.
-//!
-//! This functions writes the initial vector registers in the AES module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the initial vector registers.
-    //
-    HWREG(ui32Base + AES_O_IV_IN_0) = *((uint32_t *)(pui8IVdata+0));
-    HWREG(ui32Base + AES_O_IV_IN_1) = *((uint32_t *)(pui8IVdata+4));
-    HWREG(ui32Base + AES_O_IV_IN_2) = *((uint32_t *)(pui8IVdata+8));
-    HWREG(ui32Base + AES_O_IV_IN_3) = *((uint32_t *)(pui8IVdata+12));
-}
-
-
-//*****************************************************************************
-//
-//! Reads the Initial Vector (IV) register, needed in some of the AES Modes.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8IVdata is pointer to an array of 16 bytes.
-//!
-//! This functions reads the initial vector registers in the AES module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the initial vector registers.
-    //
-    *((uint32_t *)(pui8IVdata+ 0)) = HWREG(ui32Base + AES_O_IV_IN_0);
-    *((uint32_t *)(pui8IVdata+ 4)) = HWREG(ui32Base + AES_O_IV_IN_1);
-    *((uint32_t *)(pui8IVdata+ 8)) = HWREG(ui32Base + AES_O_IV_IN_2);
-    *((uint32_t *)(pui8IVdata+12)) = HWREG(ui32Base + AES_O_IV_IN_3);
-}
-
-//*****************************************************************************
-//
-//! Saves the tag registers to a user-defined location.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8TagData is pointer to the location that stores the tag data.
-//!
-//! This function stores the tag data for use authenticated encryption and
-//! decryption operations.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Read the tag data.
-    //
-    *((uint32_t *)(pui8TagData+0)) = HWREG((ui32Base + AES_O_TAG_OUT_0));
-    *((uint32_t *)(pui8TagData+4)) = HWREG((ui32Base + AES_O_TAG_OUT_1));
-    *((uint32_t *)(pui8TagData+8)) = HWREG((ui32Base + AES_O_TAG_OUT_2));
-    *((uint32_t *)(pui8TagData+12)) = HWREG((ui32Base + AES_O_TAG_OUT_3));
-}
-
-//*****************************************************************************
-//
-//! Used to set the write crypto data length in the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui64Length is the crypto data length in bytes.
-//!
-//! This function stores the cryptographic data length in blocks for all modes.
-//! Data lengths up to (2^61 - 1) bytes are allowed.  For GCM, any value up
-//! to (2^36 - 2) bytes are allowed because a 32-bit block counter is used.  For
-//! basic modes (ECB/CBC/CTR/ICM/CFB128), zero can be programmed into the
-//! length field, indicating that the length is infinite.
-//!
-//! When this function is called, the engine is triggered to start using
-//! this context.
-//!
-//! \note This length does not include the authentication-only data used in
-//! some modes.  Use the AESAuthLengthSet() function to specify the
-//! authentication data length.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length register by shifting the 64-bit ui64Length.
-    //
-    HWREG(ui32Base + AES_O_C_LENGTH_0) = (uint32_t)(ui64Length);
-    HWREG(ui32Base + AES_O_C_LENGTH_1) = (uint32_t)(ui64Length >> 32);
-}
-
-//*****************************************************************************
-//
-//! Sets the optional additional authentication data (AAD) length.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Length is the length in bytes.
-//!
-//! This function is only used to write the authentication data length in the
-//! combined modes (GCM or CCM) and XTS mode.  Supported AAD lengths for CCM
-//! are from 0 to (2^16 - 28) bytes.  For GCM, any value up to (2^32 - 1) can
-//! be used.  For XTS mode, this register is used to load j.  Loading of j is
-//! only required if j != 0.  j represents the sequential number of the 128-bit
-//! blocks inside the data unit.  Consequently, j must be multiplied by 16
-//! when passed to this function, thereby placing the block number in
-//! bits [31:4] of the register.
-//!
-//! When this function is called, the engine is triggered to start using
-//! this context for GCM and CCM.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length into the register.
-    //
-    HWREG(ui32Base + AES_O_AUTH_LENGTH) = ui32Length;
-}
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers without blocking.
-//! This api writes data in blocks
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Dest is a pointer to an array of words of data.
-//! \param ui8Length the length can be from 1 to 16
-//!
-//! This function reads a block of either plaintext or ciphertext out of the
-//! AES module.  If the output data is not ready, the function returns
-//! false.  If the read completed successfully, the function returns true.
-//! A block is 16 bytes or 4 words.
-//!
-//! \return true or false.
-//
-//*****************************************************************************
-bool
-AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[4];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-    {
-       	return(false);
-    }
-
-    //
-    // Check if the output is ready before reading the data.  If it not ready,
-    // return false.
-    //
-    if((AES_CTRL_OUTPUT_READY & (HWREG(ui32Base + AES_O_CTRL))) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Read a block of data from the data registers
-    //
-    pui32Dest[0] = HWREG(ui32Base + AES_O_DATA_IN_3);
-    pui32Dest[1] = HWREG(ui32Base + AES_O_DATA_IN_2);
-    pui32Dest[2] = HWREG(ui32Base + AES_O_DATA_IN_1);
-    pui32Dest[3] = HWREG(ui32Base + AES_O_DATA_IN_0);
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-     	*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-    }
-    //
-    // Read successful, return true.
-    //
-    return(true);
-}
-
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers with blocking.
-//! This api writes data in blocks
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Dest is a pointer to an array of words.
-//! \param ui8Length is the length of data in bytes to be read.
-//!        ui8Length can be from 1 to 16
-//!
-//! This function reads a block of either plaintext or ciphertext out of the
-//! AES module.  If the output is not ready, the function waits until it
-//! is ready. A block is 16 bytes or 4 words.
-//!
-//! \return None.
-//
-//*****************************************************************************
-
-void
-AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[4];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-   	{
-       	return;
-    }
-
-
-    //
-    // Wait for the output to be ready before reading the data.
-    //
-    while((AES_CTRL_OUTPUT_READY & (HWREG(ui32Base + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    // Read a block of data from the data registers
-    //
-    pui32Dest[0] = HWREG(ui32Base + AES_O_DATA_IN_3);
-    pui32Dest[1] = HWREG(ui32Base + AES_O_DATA_IN_2);
-    pui32Dest[2] = HWREG(ui32Base + AES_O_DATA_IN_1);
-    pui32Dest[3] = HWREG(ui32Base + AES_O_DATA_IN_0);
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-   	{
-    	*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-   	}
-
-    return;
-}
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers without blocking.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to an array of words of data.
-//! \param ui8Length the length can be from 1 to 16
-//!
-//! This function writes a block of either plaintext or ciphertext into the
-//! AES module.  If the input is not ready, the function returns false
-//! If the write completed successfully, the function returns true.
-//!
-//! \return True or false.
-//
-//*****************************************************************************
-bool
-AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Src[4]={0,0,0,0};
-	uint8_t ui8BytCnt;
-	uint8_t *pui8SrcTemp;
-
-	//
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-   	{
-      	return(false);
-    }
-
-    //
-    // Check if the input is ready.  If not, then return false.
-    //
-    if(!(AES_CTRL_INPUT_READY & (HWREG(ui32Base + AES_O_CTRL))))
-    {
-        return(false);
-    }
-
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-	{
-		*(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-	}
-    //
-    // Write a block of data into the data registers.
-    //
-    HWREG(ui32Base + AES_O_DATA_IN_3) = pui32Src[0];
-    HWREG(ui32Base + AES_O_DATA_IN_2) = pui32Src[1];
-    HWREG(ui32Base + AES_O_DATA_IN_1) = pui32Src[2];
-    HWREG(ui32Base + AES_O_DATA_IN_0) = pui32Src[3];
-
-    //
-    // Write successful, return true.
-    //
-    return(true);
-}
-
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers with blocking.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to an array of bytes.
-//! \param ui8Length the length can be from 1 to 16
-//!
-//! This function writes a block of either plaintext or ciphertext into the
-//! AES module.  If the input is not ready, the function waits until it is
-//! ready before performing the write.
-//!
-//! \return None.
-//
-//*****************************************************************************
-
-void
-AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Src[4]={0,0,0,0};
-	uint8_t ui8BytCnt;
-	uint8_t *pui8SrcTemp;
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-	{
-    	return;
-	}
-    //
-    // Wait for input ready.
-    //
-    while((AES_CTRL_INPUT_READY & (HWREG(ui32Base + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-   	{
-   		*(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-   	}
-
-    //
-    // Write a block of data into the data registers.
-    //
-    HWREG(ui32Base + AES_O_DATA_IN_3) = pui32Src[0];
-    HWREG(ui32Base + AES_O_DATA_IN_2) = pui32Src[1];
-    HWREG(ui32Base + AES_O_DATA_IN_1) = pui32Src[2];
-    HWREG(ui32Base + AES_O_DATA_IN_0) = pui32Src[3];
-}
-
-
-//*****************************************************************************
-//
-//! Used to process(transform) blocks of data, either encrypt or decrypt it.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to the memory location where the input data
-//! is stored.
-//! \param pui8Dest is a pointer to the memory location output is written.
-//! \param ui32Length is the length of the cryptographic data in bytes.
-//!
-//! This function iterates the encryption or decryption mechanism number over
-//! the data length.  Before calling this function, ensure that the AES
-//! module is properly configured the key, data size, mode, etc.  Only ECB,
-//! CBC, CTR, ICM, CFB, XTS and F8 operating modes should be used.  The data
-//! is processed in 4-word (16-byte) blocks.
-//!
-//! \note This function only supports values of \e ui32Length less than 2^32,
-//! because the memory size is restricted to between 0 to 2^32 bytes.
-//!
-//! \return Returns true if data was processed successfully.  Returns false
-//! if data processing failed.
-//
-//*****************************************************************************
-bool
-AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src, uint8_t *pui8Dest,
-               uint32_t ui32Length)
-{
-    uint32_t ui32Count, ui32BlkCount, ui32ByteCount;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length register first, which triggers the engine to start
-    // using this context.
-    //
-    AESDataLengthSet(AES_BASE, (uint64_t) ui32Length);
-
-    //
-    // Now loop until the blocks are written.
-    //
-    ui32BlkCount = ui32Length/16;
-    for(ui32Count = 0; ui32Count < ui32BlkCount; ui32Count += 1)
-    {
-        //
-        // Write the data registers.
-        //
-        AESDataWrite(ui32Base, pui8Src + (ui32Count*16) ,16);
-
-        //
-        // Read the data registers.
-        //
-        AESDataRead(ui32Base, pui8Dest + (ui32Count*16) ,16);
-
-    }
-
-    //
-    //Now handle the residue bytes
-    //
-    ui32ByteCount = ui32Length%16;
-    if(ui32ByteCount)
-    {
-    	//
-    	// Write the data registers.
-    	//
-    	AESDataWrite(ui32Base, pui8Src + (16*ui32BlkCount) ,ui32ByteCount);
-
-    	//
-    	// Read the data registers.
-    	//
-        AESDataRead(ui32Base, pui8Dest + (16*ui32BlkCount) ,ui32ByteCount);
-    }
-
-
-
-    //
-    // Return true to indicate successful completion of the function.
-    //
-    return(true);
-}
-//*****************************************************************************
-//
-//! Used to generate message authentication code (MAC) using CBC-MAC and F9 mode.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to the memory location where the input data
-//! is stored.
-//! \param ui32Length  is the length of the cryptographic data in bytes.
-//! \param pui8Tag is a pointer to a 4-word array where the hash tag is
-//! written.
-//!
-//! This function processes data to produce a hash tag that can be used tor
-//! authentication.   Before calling this function, ensure that the AES
-//! module is properly configured the key, data size, mode, etc.  Only
-//! CBC-MAC and F9 modes should be used.
-//!
-//! \return Returns true if data was processed successfully.  Returns false
-//! if data processing failed.
-//
-//*****************************************************************************
-bool
-AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src, uint32_t ui32Length,
-            uint8_t *pui8Tag)
-{
-    uint32_t ui32Count, ui32BlkCount, ui32ByteCount;
-	//
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length register first, which triggers the engine to start
-    // using this context.
-    //
-    AESDataLengthSet(AES_BASE, (uint64_t) ui32Length);
-
-    //
-    // Write the data registers.
-    //
-
-    //
-    // Now loop until the blocks are written.
-    //
-    ui32BlkCount = ui32Length/16;
-    for(ui32Count = 0; ui32Count < ui32BlkCount; ui32Count += 1)
-    {
-	   //
-	   // Write the data registers.
-	   //
-	   AESDataWrite(ui32Base, pui8Src + ui32Count*16 ,16);
-    }
-
-    //
-    //Now handle the residue bytes
-    //
-    ui32ByteCount = ui32Length%16;
-    if(ui32ByteCount)
-    {
-	   //
-	   // Write the data registers.
-	   //
-	   AESDataWrite(ui32Base, pui8Src + (ui32Count*ui32BlkCount) ,ui32ByteCount);
-    }
-
-    //
-    // Wait for the context data regsiters to be ready.
-    //
-    while((AES_CTRL_SVCTXTRDY & (HWREG(AES_BASE + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    // Read the hash tag value.
-    //
-    AESTagRead(AES_BASE, pui8Tag);
-
-    //
-    // Return true to indicate successful completion of the function.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Used for Authenticated encryption (AE) of the data. Processes and authenticates blocks of data,
-//! either encrypt the data or decrypt the data.
-//!
-//! \param ui32Base  is the base address of the AES module.
-//! \param pui8Src is a pointer to the memory location where the input data
-//! is stored. The data must be padded to the 16-byte boundary.
-//! \param pui8Dest is a pointer to the memory location output is written.
-//! The space for written data must be rounded up to the 16-byte boundary.
-//! \param ui32Length is the length of the cryptographic data in bytes.
-//! \param pui8AuthSrc is a pointer to the memory location where the
-//! additional authentication data is stored.  The data must be padded to the
-//! 16-byte boundary.
-//! \param ui32AuthLength is the length of the additional authentication
-//! data in bytes.
-//! \param pui8Tag is a pointer to a 4-word array where the hash tag is
-//! written.
-//!
-//! This function encrypts or decrypts blocks of data in addition to
-//! authentication data.  A hash tag is also produced.  Before calling this
-//! function, ensure that the AES module is properly configured the key,
-//! data size, mode, etc.  Only CCM and GCM modes should be used.
-//!
-//! \return Returns true if data was processed successfully.  Returns false
-//! if data processing failed.
-//
-//*****************************************************************************
-bool
-AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src, uint8_t *pui8Dest,
-                   uint32_t ui32Length, uint8_t *pui8AuthSrc,
-                   uint32_t ui32AuthLength, uint8_t *pui8Tag)
-{
-    uint32_t ui32Count;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Set the data length.
-    //
-    AESDataLengthSet(AES_BASE, (uint64_t) ui32Length);
-
-    //
-    // Set the additional authentication data length.
-    //
-    AESAuthDataLengthSet(AES_BASE, ui32AuthLength);
-
-    //
-    // Now loop until the authentication data blocks are written.
-    //
-    for(ui32Count = 0; ui32Count < ui32AuthLength; ui32Count += 16)
-    {
-        //
-        // Write the data registers.
-        //
-        AESDataWrite(ui32Base, pui8AuthSrc + (ui32Count),16);
-    }
-
-    //
-    // Now loop until the data blocks are written.
-    //
-    for(ui32Count = 0; ui32Count < ui32Length; ui32Count += 16)
-    {
-        //
-        // Write the data registers.
-        //
-        AESDataWrite(ui32Base, pui8Src + (ui32Count),16);
-
-        //
-        //
-        // Read the data registers.
-        //
-        AESDataRead(ui32Base, pui8Dest + (ui32Count),16);
-    }
-
-    //
-    // Wait for the context data regsiters to be ready.
-    //
-    while((AES_CTRL_SVCTXTRDY & (HWREG(AES_BASE + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    // Read the hash tag value.
-    //
-    AESTagRead(AES_BASE, pui8Tag);
-
-    //
-    // Return true to indicate successful completion of the function.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Returns the current AES module interrupt status.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param bMasked is \b false if the raw interrupt status is required and
-//! \b true if the masked interrupt status is required.
-//!
-//! \return Returns a bit mask of the interrupt sources, which is a logical OR
-//! of any of the following:
-//!
-//! - \b AES_INT_CONTEXT_IN - Context interrupt
-//! - \b AES_INT_CONTEXT_OUT - Authentication tag (and IV) interrupt.
-//! - \b AES_INT_DATA_IN - Data input interrupt
-//! - \b AES_INT_DATA_OUT - Data output interrupt
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//
-//*****************************************************************************
-uint32_t
-AESIntStatus(uint32_t ui32Base, bool bMasked)
-{
-    uint32_t ui32Temp;
-    uint32_t ui32IrqEnable;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Read the IRQ status register and return the value.
-    //
-    if(bMasked)
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_AES_MIS);
-        ui32IrqEnable = HWREG(ui32Base + AES_O_IRQENABLE);
-        return((HWREG(ui32Base + AES_O_IRQSTATUS) &
-                ui32IrqEnable) | ((ui32Temp & 0x0000000F) << 16));
-    }
-    else
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_AES_RIS);
-        return(HWREG(ui32Base + AES_O_IRQSTATUS) |
-               ((ui32Temp & 0x0000000F) << 16));
-    }
-}
-
-//*****************************************************************************
-//
-//! Enables AES module interrupts.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to enable.
-//!
-//! This function enables the interrupts in the AES module. The \e ui32IntFlags
-//! parameter is the logical OR of any of the following:
-//!
-//! - \b AES_INT_CONTEXT_IN - Context interrupt
-//! - \b AES_INT_CONTEXT_OUT - Authentication tag (and IV) interrupt
-//! - \b AES_INT_DATA_IN - Data input interrupt
-//! - \b AES_INT_DATA_OUT - Data output interrupt
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \note Interrupts that have been previously been enabled are not disabled
-//! when this function is called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32IntFlags == AES_INT_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DATA_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_OUT));
-
-    //
-    // Set the flags.
-    //
-    HWREG(DTHE_BASE + DTHE_O_AES_IM) &= ~((ui32IntFlags & 0x000F0000) >> 16);
-    HWREG(ui32Base + AES_O_IRQENABLE) |= ui32IntFlags & 0x0000ffff;
-}
-
-//*****************************************************************************
-//
-//! Disables AES module interrupts.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to disable.
-//!
-//! This function disables the interrupt sources in the AES module. The
-//! \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b AES_INT_CONTEXT_IN - Context interrupt
-//! - \b AES_INT_CONTEXT_OUT - Authentication tag (and IV) interrupt
-//! - \b AES_INT_DATA_IN - Data input interrupt
-//! - \b AES_INT_DATA_OUT - Data output interrupt
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \note The DMA done interrupts are the only interrupts that can be cleared.
-//! The remaining interrupts can be disabled instead using AESIntDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32IntFlags == AES_INT_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DATA_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_OUT));
-
-    //
-    // Clear the flags.
-    //
-    HWREG(DTHE_BASE + DTHE_O_AES_IM) |= ((ui32IntFlags & 0x000F0000) >> 16);
-    HWREG(ui32Base + AES_O_IRQENABLE) &= ~(ui32IntFlags & 0x0000ffff);
-}
-
-//*****************************************************************************
-//
-//! Clears AES module interrupts.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to disable.
-//!
-//! This function clears the interrupt sources in the AES module.  The
-//! \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \note Only the DMA done interrupts can be cleared.  The remaining
-//! interrupts should be disabled with AESIntDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32IntFlags == AES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_OUT));
-
-    HWREG(DTHE_BASE + DTHE_O_AES_IC) = ((ui32IntFlags >> 16) & 0x0000000F);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! enabled AES interrupts occur.
-//!
-//! This function registers the interrupt handler in the interrupt vector
-//! table, and enables AES interrupts on the interrupt controller; specific AES
-//! interrupt sources must be enabled using AESIntEnable().  The interrupt
-//! handler being registered must clear the source of the interrupt using
-//! AESIntClear().
-//!
-//! If the application is using a static interrupt vector table stored in
-//! flash, then it is not necessary to register the interrupt handler this way.
-//! Instead, IntEnable() is used to enable AES interrupts on the
-//! interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(INT_AES, pfnHandler);
-
-    //
-    // Enable the interrupt
-    //
-    IntEnable(INT_AES);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//!
-//! This function unregisters the previously registered interrupt handler and
-//! disables the interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntUnregister(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(INT_AES);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(INT_AES);
-}
-
-//*****************************************************************************
-//
-//! Enables uDMA requests for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Flags is a bit mask of the uDMA requests to be enabled.
-//!
-//! This function enables the uDMA request sources in the AES module.
-//! The \e ui32Flags parameter is the logical OR of any of the following:
-//!
-//! - \b AES_DMA_DATA_IN
-//! - \b AES_DMA_DATA_OUT
-//! - \b AES_DMA_CONTEXT_IN
-//! - \b AES_DMA_CONTEXT_OUT
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Flags == AES_DMA_DATA_IN) ||
-           (ui32Flags == AES_DMA_DATA_OUT) ||
-           (ui32Flags == AES_DMA_CONTEXT_IN) ||
-           (ui32Flags == AES_DMA_CONTEXT_OUT));
-
-    //
-    // Set the flags in the current register value.
-    //
-    HWREG(ui32Base + AES_O_SYSCONFIG) |= ui32Flags;
-}
-
-//*****************************************************************************
-//
-//! Disables uDMA requests for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Flags is a bit mask of the uDMA requests to be disabled.
-//!
-//! This function disables the uDMA request sources in the AES module.
-//! The \e ui32Flags parameter is the logical OR of any of the
-//! following:
-//!
-//! - \b AES_DMA_DATA_IN
-//! - \b AES_DMA_DATA_OUT
-//! - \b AES_DMA_CONTEXT_IN
-//! - \b AES_DMA_CONTEXT_OUT
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Flags == AES_DMA_DATA_IN) ||
-           (ui32Flags == AES_DMA_DATA_OUT) ||
-           (ui32Flags == AES_DMA_CONTEXT_IN) ||
-           (ui32Flags == AES_DMA_CONTEXT_OUT));
-
-    //
-    // Clear the flags in the current register value.
-    //
-    HWREG(ui32Base + AES_O_SYSCONFIG) &= ~ui32Flags;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/aes.h b/ports/cc3200/hal/aes.h
deleted file mode 100644
index 766d3587e4..0000000000
--- a/ports/cc3200/hal/aes.h
+++ /dev/null
@@ -1,218 +0,0 @@
-//*****************************************************************************
-//
-//  aes.h
-//
-//  Defines and Macros for the AES module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_AES_H__
-#define __DRIVERLIB_AES_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following defines are used to specify the operation direction in the
-// ui32Config argument in the AESConfig function.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_DIR_ENCRYPT     0x00000004
-#define AES_CFG_DIR_DECRYPT     0x00000000
-
-//*****************************************************************************
-//
-// The following defines are used to specify the key size in the ui32Config
-// argument in the AESConfig function.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_KEY_SIZE_128BIT 0x00000008
-#define AES_CFG_KEY_SIZE_192BIT 0x00000010
-#define AES_CFG_KEY_SIZE_256BIT 0x00000018
-
-//*****************************************************************************
-//
-// The following defines are used to specify the mode of operation in the
-// ui32Config argument in the AESConfig function.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_MODE_M          0x2007fe60
-#define AES_CFG_MODE_ECB        0x00000000
-#define AES_CFG_MODE_CBC        0x00000020
-#define AES_CFG_MODE_CTR        0x00000040
-#define AES_CFG_MODE_ICM        0x00000200
-#define AES_CFG_MODE_CFB        0x00000400
-#define AES_CFG_MODE_XTS_TWEAKJL \
-                                0x00000800
-#define AES_CFG_MODE_XTS_K2IJL \
-                                0x00001000
-#define AES_CFG_MODE_XTS_K2ILJ0 \
-                                0x00001800
-#define AES_CFG_MODE_F8         0x00002000
-#define AES_CFG_MODE_F9         0x20004000
-#define AES_CFG_MODE_CBCMAC     0x20008000
-#define AES_CFG_MODE_GCM_HLY0ZERO \
-                                0x20010040
-#define AES_CFG_MODE_GCM_HLY0CALC \
-                                0x20020040
-#define AES_CFG_MODE_GCM_HY0CALC \
-                                0x20030040
-#define AES_CFG_MODE_CCM        0x20040040
-
-//*****************************************************************************
-//
-// The following defines are used to specify the counter width in the
-// ui32Config argument in the AESConfig function.  It is only required to
-// be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_CTR_WIDTH_32    0x00000000
-#define AES_CFG_CTR_WIDTH_64    0x00000080
-#define AES_CFG_CTR_WIDTH_96    0x00000100
-#define AES_CFG_CTR_WIDTH_128   0x00000180
-
-//*****************************************************************************
-//
-// The following defines are used to define the width of the length field for
-// CCM operation through the ui32Config argument in the AESConfig function.
-// This value is also known as L.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_CCM_L_2         0x00080000
-#define AES_CFG_CCM_L_4         0x00180000
-#define AES_CFG_CCM_L_8         0x00380000
-
-//*****************************************************************************
-//
-// The following defines are used to define the length of the authentication
-// field for CCM operations through the ui32Config argument in the AESConfig
-// function.  This value is also known as M.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_CCM_M_4         0x00400000
-#define AES_CFG_CCM_M_6         0x00800000
-#define AES_CFG_CCM_M_8         0x00c00000
-#define AES_CFG_CCM_M_10        0x01000000
-#define AES_CFG_CCM_M_12        0x01400000
-#define AES_CFG_CCM_M_14        0x01800000
-#define AES_CFG_CCM_M_16        0x01c00000
-
-//*****************************************************************************
-//
-// Interrupt flags for use with the AESIntEnable, AESIntDisable, and
-// AESIntStatus functions.
-//
-//*****************************************************************************
-#define AES_INT_CONTEXT_IN      0x00000001
-#define AES_INT_CONTEXT_OUT     0x00000008
-#define AES_INT_DATA_IN         0x00000002
-#define AES_INT_DATA_OUT        0x00000004
-#define AES_INT_DMA_CONTEXT_IN  0x00010000
-#define AES_INT_DMA_CONTEXT_OUT 0x00020000
-#define AES_INT_DMA_DATA_IN     0x00040000
-#define AES_INT_DMA_DATA_OUT    0x00080000
-
-//*****************************************************************************
-//
-// Defines used when enabling and disabling DMA requests in the
-// AESEnableDMA and AESDisableDMA functions.
-//
-//*****************************************************************************
-#define AES_DMA_DATA_IN         0x00000040
-#define AES_DMA_DATA_OUT        0x00000020
-#define AES_DMA_CONTEXT_IN      0x00000080
-#define AES_DMA_CONTEXT_OUT     0x00000100
-
-//*****************************************************************************
-//
-// Function prototypes.
-//
-//*****************************************************************************
-extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key,
-                       uint32_t ui32Keysize);
-extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key,
-                       uint32_t ui32Keysize);
-extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key);
-extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
-extern void AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata);
-extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData);
-extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length);
-extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
-extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
-                                   uint8_t ui8Length);
-extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
-                        uint8_t ui8Length);
-extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
-                                    uint8_t ui8Length);
-extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
-                         uint8_t ui8Length);
-extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
-                           uint8_t *pui8Dest,
-               uint32_t ui32Length);
-extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src,
-                       uint32_t ui32Length,
-            uint8_t *pui8Tag);
-extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src,
-                             uint8_t *pui8Dest, uint32_t ui32Length,
-                             uint8_t *pui8AuthSrc, uint32_t ui32AuthLength,
-                             uint8_t *pui8Tag);
-extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
-extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
-extern void AESIntUnregister(uint32_t ui32Base);
-extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
-extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __DRIVERLIB_AES_H__
diff --git a/ports/cc3200/hal/cc3200_asm.h b/ports/cc3200/hal/cc3200_asm.h
deleted file mode 100644
index 742c9a6f7f..0000000000
--- a/ports/cc3200/hal/cc3200_asm.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef CC3200_ASM_H_
-#define CC3200_ASM_H_
-
-// We have inlined IRQ functions for efficiency (they are generally
-// 1 machine instruction).
-//
-// Note on IRQ state: you should not need to know the specific
-// value of the state variable, but rather just pass the return
-// value from disable_irq back to enable_irq.  If you really need
-// to know the machine-specific values, see irq.h.
-
-#ifndef __disable_irq
-#define __disable_irq() __asm__ volatile ("cpsid i");
-#endif
-
-#ifndef DEBUG
-__attribute__(( always_inline ))
-static inline void __WFI(void) {
-    __asm volatile ("    dsb      \n"
-                    "    isb      \n"
-                    "    wfi      \n");
-}
-#else
-// For some reason the debugger gets disconnected when entering any of the sleep modes
-__attribute__(( always_inline ))
-static inline void __WFI(void) {
-    __asm volatile ("    dsb      \n"
-                    "    isb      \n");
-}
-#endif
-
-__attribute__(( always_inline ))
-static inline uint32_t __get_PRIMASK(void) {
-    uint32_t result;
-    __asm volatile ("mrs %0, primask" : "=r" (result));
-    return(result);
-}
-
-__attribute__(( always_inline ))
-static inline void __set_PRIMASK(uint32_t priMask) {
-    __asm volatile ("msr primask, %0" : : "r" (priMask) : "memory");
-}
-
-__attribute__(( always_inline ))
-static inline uint32_t __get_BASEPRI(void) {
-    uint32_t result;
-    __asm volatile ("mrs %0, basepri" : "=r" (result));
-    return(result);
-}
-
-__attribute__(( always_inline ))
-static inline void __set_BASEPRI(uint32_t value) {
-    __asm volatile ("msr basepri, %0" : : "r" (value) : "memory");
-}
-
-__attribute__(( always_inline ))
-static inline void enable_irq(mp_uint_t state) {
-    __set_PRIMASK(state);
-}
-
-__attribute__(( always_inline ))
-static inline mp_uint_t disable_irq(void) {
-    mp_uint_t state = __get_PRIMASK();
-    __disable_irq();
-    return state;
-}
-
-#endif /* CC3200_ASM_H_ */
diff --git a/ports/cc3200/hal/cc3200_hal.c b/ports/cc3200/hal/cc3200_hal.c
deleted file mode 100644
index 0285d05856..0000000000
--- a/ports/cc3200/hal/cc3200_hal.c
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-
- /******************************************************************************
- IMPORTS
- ******************************************************************************/
-#include 
-#include 
-#include 
-
-
-#include "py/mphal.h"
-#include "py/runtime.h"
-#include "py/objstr.h"
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_nvic.h"
-#include "hw_memmap.h"
-#include "rom_map.h"
-#include "interrupt.h"
-#include "systick.h"
-#include "prcm.h"
-#include "pin.h"
-#include "mpexception.h"
-#include "telnet.h"
-#include "pybuart.h"
-#include "utils.h"
-#include "irq.h"
-#include "moduos.h"
-
-#ifdef USE_FREERTOS
-#include "FreeRTOS.h"
-#include "task.h"
-#include "semphr.h"
-#endif
-
-
-/******************************************************************************
- DECLARE PRIVATE FUNCTIONS
- ******************************************************************************/
-#ifndef USE_FREERTOS
-static void hal_TickInit (void);
-#endif
-
-/******************************************************************************
- DECLARE LOCAL DATA
- ******************************************************************************/
-static volatile uint32_t HAL_tickCount;
-
-/******************************************************************************
- DECLARE IMPORTED DATA
- ******************************************************************************/
-extern void (* const g_pfnVectors[256])(void);
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-
-__attribute__ ((section (".boot")))
-void HAL_SystemInit (void) {
-    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);
-
-    // in the case of a release image, these steps are already performed by
-    // the bootloader so we can skip it and gain some code space
-#ifdef DEBUG
-    MAP_IntMasterEnable();
-    PRCMCC3200MCUInit();
-#endif
-
-#ifndef USE_FREERTOS
-    hal_TickInit();
-#endif
-}
-
-void HAL_SystemDeInit (void) {
-}
- 
-void HAL_IncrementTick(void) {
-    HAL_tickCount++;
-}
-
-mp_uint_t mp_hal_ticks_ms(void) {
-    return HAL_tickCount;
-}
-
-// The SysTick timer counts down at HAL_FCPU_HZ, so we can use that knowledge
-// to grab a microsecond counter.
-mp_uint_t mp_hal_ticks_us(void) {
-    mp_uint_t irq_state = disable_irq();
-    uint32_t counter = SysTickValueGet();
-    uint32_t milliseconds = mp_hal_ticks_ms();
-    enable_irq(irq_state);
-
-    uint32_t load = SysTickPeriodGet();
-    counter = load - counter; // Convert from decrementing to incrementing
-    return (milliseconds * 1000) + ((counter * 1000) / load);
-}
-
-void mp_hal_delay_ms(mp_uint_t delay) {
-    // only if we are not within interrupt context and interrupts are enabled
-    if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) {
-        MP_THREAD_GIL_EXIT();
-        #ifdef USE_FREERTOS
-            vTaskDelay (delay / portTICK_PERIOD_MS);
-        #else
-            uint32_t start = HAL_tickCount;
-            // wraparound of tick is taken care of by 2's complement arithmetic.
-            while (HAL_tickCount - start < delay) {
-                // enter sleep mode, waiting for (at least) the SysTick interrupt.
-                __WFI();
-            }
-        #endif
-        MP_THREAD_GIL_ENTER();
-    } else {
-        for (int ms = 0; ms < delay; ms++) {
-            UtilsDelay(UTILS_DELAY_US_TO_COUNT(1000));
-        }
-    }
-}
-
-void mp_hal_stdout_tx_str(const char *str) {
-    mp_hal_stdout_tx_strn(str, strlen(str));
-}
-
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
-    if (MP_STATE_PORT(os_term_dup_obj)) {
-        if (MP_OBJ_IS_TYPE(MP_STATE_PORT(os_term_dup_obj)->stream_o, &pyb_uart_type)) {
-            uart_tx_strn(MP_STATE_PORT(os_term_dup_obj)->stream_o, str, len);
-        } else {
-            MP_STATE_PORT(os_term_dup_obj)->write[2] = mp_obj_new_str_of_type(&mp_type_str, (const byte *)str, len);
-            mp_call_method_n_kw(1, 0, MP_STATE_PORT(os_term_dup_obj)->write);
-        }
-    }
-    // and also to telnet
-    telnet_tx_strn(str, len);
-}
-
-void mp_hal_stdout_tx_strn_cooked (const char *str, size_t len) {
-    int32_t nslen = 0;
-    const char *_str = str;
-
-    for (int i = 0; i < len; i++) {
-        if (str[i] == '\n') {
-            mp_hal_stdout_tx_strn(_str, nslen);
-            mp_hal_stdout_tx_strn("\r\n", 2);
-            _str += nslen + 1;
-            nslen = 0;
-        } else {
-            nslen++;
-        }
-    }
-    if (_str < str + len) {
-        mp_hal_stdout_tx_strn(_str, nslen);
-    }
-}
-
-int mp_hal_stdin_rx_chr(void) {
-    for ( ;; ) {
-        // read telnet first
-        if (telnet_rx_any()) {
-            return telnet_rx_char();
-        } else if (MP_STATE_PORT(os_term_dup_obj)) { // then the stdio_dup
-            if (MP_OBJ_IS_TYPE(MP_STATE_PORT(os_term_dup_obj)->stream_o, &pyb_uart_type)) {
-                if (uart_rx_any(MP_STATE_PORT(os_term_dup_obj)->stream_o)) {
-                    return uart_rx_char(MP_STATE_PORT(os_term_dup_obj)->stream_o);
-                }
-            } else {
-                MP_STATE_PORT(os_term_dup_obj)->read[2] = mp_obj_new_int(1);
-                mp_obj_t data = mp_call_method_n_kw(1, 0, MP_STATE_PORT(os_term_dup_obj)->read);
-                // data len is > 0
-                if (mp_obj_is_true(data)) {
-                    mp_buffer_info_t bufinfo;
-                    mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ);
-                    return ((int *)(bufinfo.buf))[0];
-                }
-            }
-        }
-        mp_hal_delay_ms(1);
-    }
-}
-
-/******************************************************************************
- DEFINE PRIVATE FUNCTIONS
- ******************************************************************************/
-
-#ifndef USE_FREERTOS
-static void hal_TickInit (void) {
-    HAL_tickCount = 0;
-    MAP_SysTickIntRegister(HAL_IncrementTick);
-    MAP_IntEnable(FAULT_SYSTICK);
-    MAP_SysTickIntEnable();
-    MAP_SysTickPeriodSet(HAL_FCPU_HZ / HAL_SYSTICK_PERIOD_US);
-    // Force a reload of the SysTick counter register
-    HWREG(NVIC_ST_CURRENT) = 0;
-    MAP_SysTickEnable();
-}
-#endif
diff --git a/ports/cc3200/hal/cc3200_hal.h b/ports/cc3200/hal/cc3200_hal.h
deleted file mode 100644
index 71e245eeb1..0000000000
--- a/ports/cc3200/hal/cc3200_hal.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-
-#include "hal/utils.h"
-#include "hal/systick.h"
-
-/******************************************************************************
- DEFINE CONSTANTS
- ******************************************************************************/
-
-#define HAL_FCPU_MHZ                        80U
-#define HAL_FCPU_HZ                         (1000000U * HAL_FCPU_MHZ)
-#define HAL_SYSTICK_PERIOD_US               1000U
-#define UTILS_DELAY_US_TO_COUNT(us)         (((us) * HAL_FCPU_MHZ) / 6)
-
-#define HAL_NVIC_INT_CTRL_REG               (*((volatile uint32_t *) 0xE000ED04 ) )
-#define HAL_VECTACTIVE_MASK                 (0x1FUL)
-
-/******************************************************************************
- DEFINE TYPES
- ******************************************************************************/
-
-/******************************************************************************
- DEFINE FUNCTION-LIKE MACROS
- ******************************************************************************/
-
-#define HAL_INTRODUCE_SYNC_BARRIER() {                      \
-                                        __asm(" dsb \n"     \
-                                              " isb \n");   \
-                                     }
-
-/******************************************************************************
- DECLARE PUBLIC FUNCTIONS
- ******************************************************************************/
-
-extern void HAL_SystemInit (void);
-extern void HAL_SystemDeInit (void);
-extern void HAL_IncrementTick(void);
-extern void mp_hal_set_interrupt_char (int c);
-
-#define mp_hal_delay_us(usec) UtilsDelay(UTILS_DELAY_US_TO_COUNT(usec))
-#define mp_hal_ticks_cpu() (SysTickPeriodGet() - SysTickValueGet())
diff --git a/ports/cc3200/hal/cpu.c b/ports/cc3200/hal/cpu.c
deleted file mode 100644
index 29d10afb25..0000000000
--- a/ports/cc3200/hal/cpu.c
+++ /dev/null
@@ -1,412 +0,0 @@
-//*****************************************************************************
-//
-//  cpu.c
-//
-//  Instruction wrappers for special CPU instructions needed by the
-//  drivers.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-#include "cpu.h"
-
-//*****************************************************************************
-//
-// Wrapper function for the CPSID instruction.  Returns the state of PRIMASK
-// on entry.
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUcpsid(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsid   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUcpsid(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsid   i\n"
-          "    dsb      \n"
-          "    isb      \n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUcpsid(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsid   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function returning the state of PRIMASK (indicating whether
-// interrupts are enabled or disabled).
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUprimask(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUprimask(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUprimask(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for the CPSIE instruction.  Returns the state of PRIMASK
-// on entry.
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUcpsie(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read PRIMASK and enable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsie   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUcpsie(void)
-{
-    //
-    // Read PRIMASK and enable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsie   i\n"
-          "    dsb      \n"
-          "    isb      \n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUcpsie(void)
-{
-    //
-    // Read PRIMASK and enable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsie   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for the WFI instruction.
-//
-//*****************************************************************************
-#if defined(gcc)
-void __attribute__((naked))
-CPUwfi(void)
-{
-    //
-    // Wait for the next interrupt.
-    //
-    __asm("    dsb      \n"
-          "    isb      \n"
-          "    wfi      \n"
-          "    bx      lr\n");
-}
-#endif
-#if defined(ewarm)
-void
-CPUwfi(void)
-{
-    //
-    // Wait for the next interrupt.
-    //
-    __asm("    dsb      \n"
-          "    isb      \n"
-          "    wfi      \n");
-}
-#endif
-#if defined(ccs)
-void
-CPUwfi(void)
-{
-    //
-    // Wait for the next interrupt.
-    //
-    __asm("    dsb      \n"
-          "    isb      \n"
-          "    wfi      \n");
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for writing the BASEPRI register.
-//
-//*****************************************************************************
-#if defined(gcc)
-void __attribute__((naked))
-CPUbasepriSet(unsigned long ulNewBasepri)
-{
-
-    //
-    // Set the BASEPRI register
-    //
-    __asm("    msr     BASEPRI, r0\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n");
-}
-#endif
-#if defined(ewarm)
-void
-CPUbasepriSet(unsigned long ulNewBasepri)
-{
-    //
-    // Set the BASEPRI register
-    //
-    __asm("    msr     BASEPRI, r0\n"
-          "    dsb      \n"
-          "    isb      \n");
-}
-#endif
-#if defined(ccs)
-void
-CPUbasepriSet(unsigned long ulNewBasepri)
-{
-    //
-    // Set the BASEPRI register
-    //
-    __asm("    msr     BASEPRI, r0\n"
-          "    dsb      \n"
-          "    isb      \n");
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for reading the BASEPRI register.
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUbasepriGet(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read BASEPRI
-    //
-    __asm("    mrs     r0, BASEPRI\n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUbasepriGet(void)
-{
-    //
-    // Read BASEPRI
-    //
-    __asm("    mrs     r0, BASEPRI\n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUbasepriGet(void)
-{
-    //
-    // Read BASEPRI
-    //
-    __asm("    mrs     r0, BASEPRI\n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
diff --git a/ports/cc3200/hal/cpu.h b/ports/cc3200/hal/cpu.h
deleted file mode 100644
index 4a0fc0dcc0..0000000000
--- a/ports/cc3200/hal/cpu.h
+++ /dev/null
@@ -1,75 +0,0 @@
-//*****************************************************************************
-//
-//  cpu.h
-//
-//  Prototypes for the CPU instruction wrapper functions.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __CPU_H__
-#define __CPU_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Prototypes.
-//
-//*****************************************************************************
-extern unsigned long CPUcpsid(void);
-extern unsigned long CPUcpsie(void);
-extern unsigned long CPUprimask(void);
-extern void CPUwfi(void);
-extern unsigned long CPUbasepriGet(void);
-extern void CPUbasepriSet(unsigned long ulNewBasepri);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __CPU_H__
diff --git a/ports/cc3200/hal/crc.c b/ports/cc3200/hal/crc.c
deleted file mode 100644
index 9ccb92c385..0000000000
--- a/ports/cc3200/hal/crc.c
+++ /dev/null
@@ -1,305 +0,0 @@
-//*****************************************************************************
-//
-//  crc.c
-//
-//  Driver for the CRC module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup CRC_Cyclic_Redundancy_Check_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_dthe.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "crc.h"
-#include "debug.h"
-
-//*****************************************************************************
-//
-//! Set the configuration of CRC functionality with the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param ui32CRCConfig is the configuration of the CRC engine.
-//!
-//! This function configures the operation of the CRC engine within the EC
-//! module.  The configuration is specified with the \e ui32CRCConfig argument.
-//! It is the logical OR of any of the following options:
-//!
-//! CRC Initialization Value
-//! - \b EC_CRC_CFG_INIT_SEED - Initialize with seed value
-//! - \b EC_CRC_CFG_INIT_0 - Initialize to all '0s'
-//! - \b EC_CRC_CFG_INIT_1 - Initialize to all '1s'
-//!
-//! Input Data Size
-//! - \b EC_CRC_CFG_SIZE_8BIT - Input data size of 8 bits
-//! - \b EC_CRC_CFG_SIZE_32BIT - Input data size of 32 bits
-//!
-//! Post Process Reverse/Inverse
-//! - \b EC_CRC_CFG_RESINV - Result inverse enable
-//! - \b EC_CRC_CFG_OBR - Output reverse enable
-//!
-//! Input Bit Reverse
-//! - \b EC_CRC_CFG_IBR - Bit reverse enable
-//!
-//! Endian Control
-//! - \b EC_CRC_CFG_ENDIAN_SBHW - Swap byte in half-word
-//! - \b EC_CRC_CFG_ENDIAN_SHW - Swap half-word
-//!
-//! Operation Type
-//! - \b EC_CRC_CFG_TYPE_P8005 - Polynomial 0x8005
-//! - \b EC_CRC_CFG_TYPE_P1021 - Polynomial 0x1021
-//! - \b EC_CRC_CFG_TYPE_P4C11DB7 - Polynomial 0x4C11DB7
-//! - \b EC_CRC_CFG_TYPE_P1EDC6F41 - Polynomial 0x1EDC6F41
-//! - \b EC_CRC_CFG_TYPE_TCPCHKSUM - TCP checksum
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-    ASSERT((ui32CRCConfig & CRC_CFG_INIT_SEED) ||
-           (ui32CRCConfig & CRC_CFG_INIT_0) ||
-           (ui32CRCConfig & CRC_CFG_INIT_1) ||
-           (ui32CRCConfig & CRC_CFG_SIZE_8BIT) ||
-           (ui32CRCConfig & CRC_CFG_SIZE_32BIT) ||
-           (ui32CRCConfig & CRC_CFG_RESINV) ||
-           (ui32CRCConfig & CRC_CFG_OBR) ||
-           (ui32CRCConfig & CRC_CFG_IBR) ||
-           (ui32CRCConfig & CRC_CFG_ENDIAN_SBHW) ||
-           (ui32CRCConfig & CRC_CFG_ENDIAN_SHW) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P8005) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P1021) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P4C11DB7) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P1EDC6F41) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_TCPCHKSUM));
-
-    //
-    // Write the control register with the configuration.
-    //
-    HWREG(ui32Base + DTHE_O_CRC_CTRL) = ui32CRCConfig;
-}
-
-//*****************************************************************************
-//
-//! Write the seed value for CRC operations in the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param ui32Seed is the seed value.
-//!
-//! This function writes the seed value for use with CRC operations in the
-//! EC module.  This value is the start value for CRC operations.  If this
-//! value is not written, then the residual seed from the previous operation
-//! is used as the starting value.
-//!
-//! \note The seed must be written only if \b EC_CRC_CFG_INIT_SEED is
-//! set with the CRCConfigSet() function.
-//
-//*****************************************************************************
-void
-CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // Write the seed value to the seed register.
-    //
-    HWREG(ui32Base + DTHE_O_CRC_SEED) = ui32Seed;
-}
-
-//*****************************************************************************
-//
-//! Write data into the EC module for CRC operations.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param ui32Data is the data to be written.
-//!
-//! This function writes either 8 or 32 bits of data into the EC module for
-//! CRC operations.  The distinction between 8 and 32 bits of data is made
-//! when the \b EC_CRC_CFG_SIZE_8BIT or \b EC_CRC_CFG_SIZE_32BIT flag
-//! is set using the CRCConfigSet() function.
-//!
-//! When writing 8 bits of data, ensure the data is in the least signficant
-//! byte position.  The remaining bytes should be written with zero.  For
-//! example, when writing 0xAB, \e ui32Data should be 0x000000AB.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // Write the data
-    //
-    HWREG(DTHE_BASE + DTHE_O_CRC_DIN) = ui32Data;
-}
-
-//*****************************************************************************
-//
-//! Reads the result of a CRC operation in the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//!
-//! This function reads either the unmodified CRC result or the post
-//! processed CRC result from the EC module.  The post-processing options
-//! are selectable through \b EC_CRC_CFG_RESINV and \b EC_CRC_CFG_OBR
-//! parameters in the CRCConfigSet() function.
-//!
-//! \return The CRC result.
-//
-//*****************************************************************************
-uint32_t
-CRCResultRead(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // return value.
-    //
-    return(HWREG(DTHE_BASE + DTHE_O_CRC_RSLT_PP));
-
-}
-
-//*****************************************************************************
-//
-//! Process data to generate a CRC with the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param puiDataIn is a pointer to an array of data that is processed.
-//! \param ui32DataLength is the number of data items that are processed
-//! to produce the CRC.
-//! \param ui32Config the config parameter to determine the CRC mode
-//!
-//! This function processes an array of data to produce a CRC result.
-//! This function takes the CRC mode as the parameter.
-//!
-//! The data in the array pointed to be \e pui32DataIn is either an array
-//! of bytes or an array or words depending on the selection of the input
-//! data size options \b EC_CRC_CFG_SIZE_8BIT and
-//! \b EC_CRC_CFG_SIZE_32BIT.
-//!
-//! This function returns either the unmodified CRC result or the
-//! post- processed CRC result from the EC module.  The post-processing
-//! options are selectable through \b EC_CRC_CFG_RESINV and
-//! \b EC_CRC_CFG_OBR parameters.
-//!
-//! \return The CRC result.
-//
-//*****************************************************************************
-uint32_t
-CRCDataProcess(uint32_t ui32Base, void *puiDataIn,
-               uint32_t ui32DataLength, uint32_t ui32Config)
-{
-    uint8_t *pui8DataIn;
-    uint32_t *pui32DataIn;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // See if the CRC is operating in 8-bit or 32-bit mode.
-    //
-    if(ui32Config & DTHE_CRC_CTRL_SIZE)
-    {
-        //
-        // The CRC is operating in 8-bit mode, so create an 8-bit pointer to
-        // the data.
-        //
-        pui8DataIn = (uint8_t *)puiDataIn;
-
-        //
-        // Loop through the input data.
-        //
-        while(ui32DataLength--)
-        {
-            //
-            // Write the next data byte.
-            //
-            HWREG(ui32Base + DTHE_O_CRC_DIN) = *pui8DataIn++;
-        }
-    }
-    else
-    {
-        //
-        // The CRC is operating in 32-bit mode, so loop through the input data.
-        //
-    	pui32DataIn = (uint32_t *)puiDataIn;
-        while(ui32DataLength--)
-        {
-            //
-            // Write the next data word.
-            //
-            HWREG(ui32Base + DTHE_O_CRC_DIN) = *pui32DataIn++;
-        }
-    }
-
-    //
-    // Return the result.
-    //
-    return(CRCResultRead(ui32Base));
-}
-
-
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/crc.h b/ports/cc3200/hal/crc.h
deleted file mode 100644
index c0858bb1ba..0000000000
--- a/ports/cc3200/hal/crc.h
+++ /dev/null
@@ -1,98 +0,0 @@
-//*****************************************************************************
-//
-//  crc.h
-//
-//  Defines and Macros for CRC module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_CRC_H__
-#define __DRIVERLIB_CRC_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following defines are used in the ui32Config argument of the
-// ECConfig function.
-//
-//*****************************************************************************
-#define CRC_CFG_INIT_SEED       0x00000000  // Initialize with seed
-#define CRC_CFG_INIT_0          0x00004000  // Initialize to all '0s'
-#define CRC_CFG_INIT_1          0x00006000  // Initialize to all '1s'
-#define CRC_CFG_SIZE_8BIT       0x00001000  // Input Data Size
-#define CRC_CFG_SIZE_32BIT      0x00000000  // Input Data Size
-#define CRC_CFG_RESINV          0x00000200  // Result Inverse Enable
-#define CRC_CFG_OBR             0x00000100  // Output Reverse Enable
-#define CRC_CFG_IBR             0x00000080  // Bit reverse enable
-#define CRC_CFG_ENDIAN_SBHW     0x00000000  // Swap byte in half-word
-#define CRC_CFG_ENDIAN_SHW      0x00000010  // Swap half-word
-#define CRC_CFG_TYPE_P8005      0x00000000  // Polynomial 0x8005
-#define CRC_CFG_TYPE_P1021      0x00000001  // Polynomial 0x1021
-#define CRC_CFG_TYPE_P4C11DB7   0x00000002  // Polynomial 0x4C11DB7
-#define CRC_CFG_TYPE_P1EDC6F41  0x00000003  // Polynomial 0x1EDC6F41
-#define CRC_CFG_TYPE_TCPCHKSUM  0x00000008  // TCP checksum
-
-//*****************************************************************************
-//
-// Function prototypes.
-//
-//*****************************************************************************
-extern void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig);
-extern uint32_t CRCDataProcess(uint32_t ui32Base, void *puiDataIn,
-               uint32_t ui32DataLength, uint32_t ui32Config);
-extern void CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data);
-extern uint32_t CRCResultRead(uint32_t ui32Base);
-extern void CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed);
-
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __DRIVERLIB_CRC_H__
diff --git a/ports/cc3200/hal/debug.h b/ports/cc3200/hal/debug.h
deleted file mode 100644
index 1f6556704e..0000000000
--- a/ports/cc3200/hal/debug.h
+++ /dev/null
@@ -1,63 +0,0 @@
-//*****************************************************************************
-//
-//  debug.h
-//
-//  Macros for assisting debug of the driver library.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-#ifndef __DEBUG_H__
-#define __DEBUG_H__
-
-#include "assert.h"
-
-//*****************************************************************************
-//
-// Prototype for the function that is called when an invalid argument is passed
-// to an API.  This is only used when doing a DEBUG build.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// The ASSERT macro, which does the actual assertion checking.  Typically, this
-// will be for procedure arguments.
-//
-//*****************************************************************************
-#if defined(DEBUG) && !defined(BOOTLOADER)
-#define ASSERT(expr)        assert(expr)
-#else
-#define ASSERT(expr)        (void)(expr)
-#endif
-
-#endif // __DEBUG_H__
diff --git a/ports/cc3200/hal/des.c b/ports/cc3200/hal/des.c
deleted file mode 100644
index 1620e6bafc..0000000000
--- a/ports/cc3200/hal/des.c
+++ /dev/null
@@ -1,887 +0,0 @@
-//*****************************************************************************
-//
-//  des.c
-//
-//  Driver for the DES data transformation.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup DES_Data_Encryption_Standard_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_des.h"
-#include "inc/hw_dthe.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "debug.h"
-#include "des.h"
-#include "interrupt.h"
-
-
-//*****************************************************************************
-//
-//! Configures the DES module for operation.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Config is the configuration of the DES module.
-//!
-//! This function configures the DES module for operation.
-//!
-//! The \e ui32Config parameter is a bit-wise OR of a number of configuration
-//! flags. The valid flags are grouped below based on their function.
-//!
-//! The direction of the operation is specified with one of the following two
-//! flags.  Only one is permitted.
-//!
-//! - \b DES_CFG_DIR_ENCRYPT - Encryption
-//! - \b DES_CFG_DIR_DECRYPT - Decryption
-//!
-//! The operational mode of the DES engine is specified with one of the
-//! following flags. Only one is permitted.
-//!
-//! - \b DES_CFG_MODE_ECB - Electronic Codebook Mode
-//! - \b DES_CFG_MODE_CBC - Cipher-Block Chaining Mode
-//! - \b DES_CFG_MODE_CFB - Cipher Feedback Mode
-//!
-//! The selection of single DES or triple DES is specified with one of the
-//! following two flags. Only one is permitted.
-//!
-//! - \b DES_CFG_SINGLE - Single DES
-//! - \b DES_CFG_TRIPLE - Triple DES
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Backup the save context field.
-    //
-    ui32Config |= (HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_CONTEXT);
-
-    //
-    // Write the control register.
-    //
-    HWREG(ui32Base + DES_O_CTRL) = ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Sets the key used for DES operations.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Key is a pointer to an array that holds the key
-//!
-//! This function sets the key used for DES operations.
-//!
-//! \e pui8Key should be 64 bits long (2 words) if single DES is being used or
-//! 192 bits (6 words) if triple DES is being used.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESKeySet(uint32_t ui32Base, uint8_t *pui8Key)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Write the first part of the key.
-    //
-    HWREG(ui32Base + DES_O_KEY1_L) =  * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + DES_O_KEY1_H) = * ((uint32_t *)(pui8Key + 4));
-
-    //
-    // If we are performing triple DES, then write the key registers for
-    // the second and third rounds.
-    //
-    if(HWREG(ui32Base + DES_O_CTRL) & DES_CFG_TRIPLE)
-    {
-        HWREG(ui32Base + DES_O_KEY2_L) = * ((uint32_t *)(pui8Key + 8));
-        HWREG(ui32Base + DES_O_KEY2_H) = * ((uint32_t *)(pui8Key + 12));
-        HWREG(ui32Base + DES_O_KEY3_L) = * ((uint32_t *)(pui8Key + 16));
-        HWREG(ui32Base + DES_O_KEY3_H) = * ((uint32_t *)(pui8Key + 20));
-    }
-}
-
-//*****************************************************************************
-//
-//! Sets the initialization vector in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8IVdata is a pointer to an array of 64 bits (2 words) of data to
-//! be written into the initialization vectors registers.
-//!
-//! This function sets the initialization vector in the DES module.  It returns
-//! true if the registers were successfully written.  If the context registers
-//! cannot be written at the time the function was called, then false is
-//! returned.
-//!
-//! \return True or false.
-//
-//*****************************************************************************
-bool
-DESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Check to see if context registers can be overwritten.  If not, return
-    // false.
-    //
-    if((HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_CONTEXT) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Write the initialization vector registers.
-    //
-    HWREG(ui32Base + DES_O_IV_L) =  *((uint32_t *) (pui8IVdata + 0));
-    HWREG(ui32Base + DES_O_IV_H) = *((uint32_t *) (pui8IVdata + 4));
-
-    //
-    // Return true to indicate the write was successful.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Sets the crytographic data length in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Length is the length of the data in bytes.
-//!
-//! This function writes the cryptographic data length into the DES module.
-//! When this register is written, the engine is triggersed to start using
-//! this context.
-//!
-//! \note Data lengths up to (2^32 - 1) bytes are allowed.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDataLengthSet(uint32_t ui32Base, uint32_t ui32Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Write the length register.
-    //
-    HWREG(ui32Base + DES_O_LENGTH) = ui32Length;
-}
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers without blocking
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Dest is a pointer to an array of 2 words.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function returns true if the data was ready when the function was
-//! called. If the data was not ready, false is returned.
-//!
-//! \return True or false.
-//
-//*****************************************************************************
-bool
-DESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[2];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-
-	//
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    if((ui8Length == 0)||(ui8Length>8))
-    {
-       	return(false);
-    }
-
-    //
-    // Check to see if the data is ready to be read.
-    //
-    if((DES_CTRL_OUTPUT_READY & (HWREG(ui32Base + DES_O_CTRL))) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Read two words of data from the data registers.
-    //
-    pui32Dest[0] = HWREG(DES_BASE + DES_O_DATA_L);
-    pui32Dest[1] = HWREG(DES_BASE + DES_O_DATA_H);
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
- 		*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-    }
-
-    //
-    // Return true to indicate a successful write.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers with blocking.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Dest is a pointer to an array of bytes.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function waits until the DES module is finished and encrypted or
-//! decrypted data is ready.  The output data is then stored in the pui8Dest
-//! array.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-DESDataRead(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[2];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-
-	//
-	// Check the arguments.
-	//
-	ASSERT(ui32Base == DES_BASE);
-	if((ui8Length == 0)||(ui8Length>8))
-	{
-		return;
-	}
-    //
-    // Wait for data output to be ready.
-    //
-    while((HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_OUTPUT_READY) == 0)
-    {
-    }
-
-    //
-    // Read two words of data from the data registers.
-    //
-    pui32Dest[0] = HWREG(DES_BASE + DES_O_DATA_L);
-    pui32Dest[1] = HWREG(DES_BASE + DES_O_DATA_H);
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-    	*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers without blocking
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Src is a pointer to an array of 2 words.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function returns false if the DES module is not ready to accept
-//! data.  It returns true if the data was written successfully.
-//!
-//! \return true or false.
-//
-//*****************************************************************************
-bool
-DESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-
-    volatile uint32_t pui32Src[2]={0,0};
-    uint8_t ui8BytCnt;
-    uint8_t *pui8SrcTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    if((ui8Length == 0)||(ui8Length>8))
-    {
-            return(false);
-    }
-
-    //
-    // Check if the DES module is ready to encrypt or decrypt data.  If it
-    // is not, return false.
-    //
-    if(!(DES_CTRL_INPUT_READY & (HWREG(ui32Base + DES_O_CTRL))))
-    {
-        return(false);
-    }
-
-    //
-    // Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-            *(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-    }
-
-    //
-    // Write the data.
-    //
-    HWREG(DES_BASE + DES_O_DATA_L) = pui32Src[0];
-    HWREG(DES_BASE + DES_O_DATA_H) = pui32Src[1];
-
-    //
-    // Return true to indicate a successful write.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers without blocking
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Src is a pointer to an array of bytes.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function waits until the DES module is ready before writing the
-//! data contained in the pui8Src array.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDataWrite(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-    volatile uint32_t pui32Src[2]={0,0};
-    uint8_t ui8BytCnt;
-    uint8_t *pui8SrcTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    if((ui8Length == 0)||(ui8Length>8))
-    {
-            return;
-    }
-
-    //
-    // Wait for the input ready bit to go high.
-    //
-    while(((HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_INPUT_READY)) == 0)
-    {
-    }
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-            *(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-    }
-
-    //
-    // Write the data.
-    //
-    HWREG(DES_BASE + DES_O_DATA_L) = pui32Src[0];
-    HWREG(DES_BASE + DES_O_DATA_H) = pui32Src[1];
-}
-
-//*****************************************************************************
-//
-//! Processes blocks of data through the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Src is a pointer to an array of words that contains the
-//! source data for processing.
-//! \param pui8Dest is a pointer to an array of words consisting of the
-//! processed data.
-//! \param ui32Length is the length of the cryptographic data in bytes.
-//! It must be a multiple of eight.
-//!
-//! This function takes the data contained in the pui8Src array and processes
-//! it using the DES engine.  The resulting data is stored in the
-//! pui8Dest array.  The function blocks until all of the data has been
-//! processed. If processing is successful, the function returns true.
-//!
-//! \note This functions assumes that the DES module has been configured,
-//! and initialization values and keys have been written.
-//!
-//! \return true or false.
-//
-//*****************************************************************************
-bool
-DESDataProcess(uint32_t ui32Base, uint8_t *pui8Src, uint8_t *pui8Dest,
-               uint32_t ui32Length)
-{
-    uint32_t ui32Count, ui32BlkCount, ui32ByteCount;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32Length % 8) == 0);
-
-    //
-    // Write the length register first. This triggers the engine to start
-    // using this context.
-    //
-    HWREG(ui32Base + DES_O_LENGTH) = ui32Length;
-
-
-    //
-    // Now loop until the blocks are written.
-    //
-    ui32BlkCount = ui32Length/8;
-    for(ui32Count = 0; ui32Count > 16);
-    HWREG(ui32Base + DES_O_IRQENABLE) |= ui32IntFlags & 0x0000ffff;
-}
-
-//*****************************************************************************
-//
-//! Disables interrupts in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32IntFlags is a bit mask of the interrupts to be disabled.
-//!
-//! This function disables interrupt sources in the DES module.
-//! \e ui32IntFlags should be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b DES_INT_CONTEXT_IN - Context interrupt
-//! - \b DES_INT_DATA_IN - Data input interrupt
-//! - \b DES_INT_DATA_OUT - Data output interrupt
-//! - \b DES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b DES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b DES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32IntFlags & DES_INT_CONTEXT_IN) ||
-           (ui32IntFlags & DES_INT_DATA_IN) ||
-           (ui32IntFlags & DES_INT_DATA_OUT) ||
-           (ui32IntFlags & DES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_OUT));
-
-    //
-    // Clear the interrupts from the flags.
-    //
-    HWREG(DTHE_BASE + DTHE_O_AES_IM)  |= ((ui32IntFlags & 0x00070000) >> 16);
-    HWREG(ui32Base + DES_O_IRQENABLE) &= ~(ui32IntFlags & 0x0000ffff);
-}
-
-//*****************************************************************************
-//
-//! Clears interrupts in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32IntFlags is a bit mask of the interrupts to be disabled.
-//!
-//! This function disables interrupt sources in the DES module.
-//! \e ui32IntFlags should be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b DES_INT_DMA_CONTEXT_IN - Context interrupt
-//! - \b DES_INT_DMA_DATA_IN - Data input interrupt
-//! - \b DES_INT_DMA_DATA_OUT - Data output interrupt
-//!
-//! \note The DMA done interrupts are the only interrupts that can be cleared.
-//! The remaining interrupts can be disabled instead using DESIntDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32IntFlags & DES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_OUT));
-
-    HWREG(DTHE_BASE + DTHE_O_DES_IC) = ((ui32IntFlags & 0x00070000) >> 16);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! enabled DES interrupts occur.
-//!
-//! This function registers the interrupt handler in the interrupt vector
-//! table, and enables DES interrupts on the interrupt controller; specific DES
-//! interrupt sources must be enabled using DESIntEnable().  The interrupt
-//! handler being registered must clear the source of the interrupt using
-//! DESIntClear().
-//!
-//! If the application is using a static interrupt vector table stored in
-//! flash, then it is not necessary to register the interrupt handler this way.
-//! Instead, IntEnable() should be used to enable DES interrupts on the
-//! interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(INT_DES, pfnHandler);
-
-    //
-    // Enable the interrupt.
-    //
-    IntEnable(INT_DES);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//!
-//! This function unregisters the previously registered interrupt handler and
-//! disables the interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntUnregister(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(INT_DES);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(INT_DES);
-}
-
-//*****************************************************************************
-//
-//! Enables DMA request sources in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Flags is a bit mask of the DMA requests to be enabled.
-//!
-//! This function enables DMA request sources in the DES module.  The
-//! \e ui32Flags parameter should be the logical OR of any of the following:
-//!
-//! - \b DES_DMA_CONTEXT_IN - Context In
-//! - \b DES_DMA_DATA_OUT - Data Out
-//! - \b DES_DMA_DATA_IN - Data In
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32Flags & DES_DMA_CONTEXT_IN) ||
-           (ui32Flags & DES_DMA_DATA_OUT) ||
-           (ui32Flags & DES_DMA_DATA_IN));
-
-    //
-    // Set the data in and data out DMA request enable bits.
-    //
-    HWREG(ui32Base + DES_O_SYSCONFIG) |= ui32Flags;
-}
-
-//*****************************************************************************
-//
-//! Disables DMA request sources in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Flags is a bit mask of the DMA requests to be disabled.
-//!
-//! This function disables DMA request sources in the DES module.  The
-//! \e ui32Flags parameter should be the logical OR of any of the following:
-//!
-//! - \b DES_DMA_CONTEXT_IN - Context In
-//! - \b DES_DMA_DATA_OUT - Data Out
-//! - \b DES_DMA_DATA_IN - Data In
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDMADisable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32Flags & DES_DMA_CONTEXT_IN) ||
-           (ui32Flags & DES_DMA_DATA_OUT) ||
-           (ui32Flags & DES_DMA_DATA_IN));
-
-    //
-    // Disable the DMA sources.
-    //
-    HWREG(ui32Base + DES_O_SYSCONFIG) &= ~ui32Flags;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/des.h b/ports/cc3200/hal/des.h
deleted file mode 100644
index 3bee5e6c9b..0000000000
--- a/ports/cc3200/hal/des.h
+++ /dev/null
@@ -1,143 +0,0 @@
-//*****************************************************************************
-//
-//  des.h
-//
-//  Defines and Macros for the DES module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_DES_H__
-#define __DRIVERLIB_DES_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following defines are used to specify the direction with the
-// ui32Config argument in the DESConfig() function.  Only one is permitted.
-//
-//*****************************************************************************
-#define DES_CFG_DIR_DECRYPT     0x00000000
-#define DES_CFG_DIR_ENCRYPT     0x00000004
-
-//*****************************************************************************
-//
-// The following defines are used to specify the operational with the
-// ui32Config argument in the DESConfig() function.  Only one is permitted.
-//
-//*****************************************************************************
-#define DES_CFG_MODE_ECB        0x00000000
-#define DES_CFG_MODE_CBC        0x00000010
-#define DES_CFG_MODE_CFB        0x00000020
-
-//*****************************************************************************
-//
-// The following defines are used to select between single DES and triple DES
-// with the ui32Config argument in the DESConfig() function.  Only one is
-// permitted.
-//
-//*****************************************************************************
-#define DES_CFG_SINGLE          0x00000000
-#define DES_CFG_TRIPLE          0x00000008
-
-//*****************************************************************************
-//
-// The following defines are used with the DESIntEnable(), DESIntDisable() and
-// DESIntStatus() functions.
-//
-//*****************************************************************************
-#define DES_INT_CONTEXT_IN      0x00000001
-#define DES_INT_DATA_IN         0x00000002
-#define DES_INT_DATA_OUT        0x00000004
-#define DES_INT_DMA_CONTEXT_IN  0x00010000
-#define DES_INT_DMA_DATA_IN     0x00020000
-#define DES_INT_DMA_DATA_OUT    0x00040000
-
-//*****************************************************************************
-//
-// The following defines are used with the DESEnableDMA() and DESDisableDMA()
-// functions.
-//
-//*****************************************************************************
-#define DES_DMA_CONTEXT_IN      0x00000080
-#define DES_DMA_DATA_OUT        0x00000040
-#define DES_DMA_DATA_IN         0x00000020
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void DESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void DESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
-                        uint8_t ui8Length);
-extern bool DESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
-                                   uint8_t ui8Length);
-extern bool DESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
-                           uint8_t *pui8Dest, uint32_t ui32Length);
-extern void DESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
-                         uint8_t ui8Length);
-extern bool DESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
-                                    uint8_t ui8Length);
-extern void DESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
-extern void DESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
-extern void DESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void DESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void DESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void DESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
-extern uint32_t DESIntStatus(uint32_t ui32Base, bool bMasked);
-extern void DESIntUnregister(uint32_t ui32Base);
-extern bool DESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
-extern void DESKeySet(uint32_t ui32Base, uint8_t *pui8Key);
-extern void DESDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __DRIVERLIB_DES_H__
diff --git a/ports/cc3200/hal/fault_registers.h b/ports/cc3200/hal/fault_registers.h
deleted file mode 100644
index ade516b9e4..0000000000
--- a/ports/cc3200/hal/fault_registers.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef FAULT_REGISTERS_H_
-#define FAULT_REGISTERS_H_
-
-
-typedef struct
-{
-    uint32_t    IERR        :1;
-    uint32_t    DERR        :1;
-    uint32_t                :1;
-    uint32_t    MUSTKE      :1;
-    uint32_t    MSTKE       :1;
-    uint32_t    MLSPERR     :1;
-    uint32_t                :1;
-    uint32_t    MMARV       :1;
-    uint32_t    IBUS        :1;
-    uint32_t    PRECISE     :1;
-    uint32_t    IMPRE       :1;
-    uint32_t    BUSTKE      :1;
-    uint32_t    BSTKE       :1;
-    uint32_t    BLSPERR     :1;
-    uint32_t                :1;
-    uint32_t    BFARV       :1;
-    uint32_t    UNDEF       :1;
-    uint32_t    INVSTAT     :1;
-    uint32_t    INVCP       :1;
-    uint32_t    NOCP        :1;
-    uint32_t                :4;
-    uint32_t    UNALIGN     :1;
-    uint32_t    DIVO0       :1;
-    uint32_t                :6;
-
-}_CFSR_t;
-
-
-typedef struct
-{
-
-    uint32_t    DBG         :1;
-    uint32_t    FORCED      :1;
-    uint32_t                :28;
-    uint32_t    VECT        :1;
-    uint32_t                :1;
-
-}_HFSR_t;
-
-
-#endif /* FAULT_REGISTERS_H_ */
diff --git a/ports/cc3200/hal/gpio.c b/ports/cc3200/hal/gpio.c
deleted file mode 100644
index 59aa71aa57..0000000000
--- a/ports/cc3200/hal/gpio.c
+++ /dev/null
@@ -1,706 +0,0 @@
-//*****************************************************************************
-//
-//  gpio.c
-//
-//  Driver for the GPIO module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup GPIO_General_Purpose_InputOutput_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_gpio.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_common_reg.h"
-#include "debug.h"
-#include "gpio.h"
-#include "interrupt.h"
-
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks a GPIO base address.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function determines if a GPIO port base address is valid.
-//!
-//! \return Returns \b true if the base address is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#if defined(DEBUG) && !defined(BOOTLOADER)
-static tBoolean
-GPIOBaseValid(unsigned long ulPort)
-{
-    return((ulPort == GPIOA0_BASE) ||
-           (ulPort == GPIOA1_BASE) ||
-           (ulPort == GPIOA2_BASE) ||
-           (ulPort == GPIOA3_BASE) ||             
-           (ulPort == GPIOA4_BASE));
-}
-#else
-#define GPIOBaseValid(ulPort)         (ulPort)
-#endif
-
-//*****************************************************************************
-//
-//! \internal
-//! Gets the GPIO interrupt number.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! Given a GPIO base address, returns the corresponding interrupt number.
-//!
-//! \return Returns a GPIO interrupt number, or -1 if \e ulPort is invalid.
-//
-//*****************************************************************************
-static long
-GPIOGetIntNumber(unsigned long ulPort)
-{
-    unsigned int ulInt;
-
-    //
-    // Determine the GPIO interrupt number for the given module.
-    //
-    switch(ulPort)
-    {
-        case GPIOA0_BASE:
-        {
-            ulInt = INT_GPIOA0;
-            break;
-        }
-
-        case GPIOA1_BASE:
-        {
-            ulInt = INT_GPIOA1;
-            break;
-        }
-
-        case GPIOA2_BASE:
-        {
-            ulInt = INT_GPIOA2;
-            break;
-        }
-
-        case GPIOA3_BASE:
-        {
-            ulInt = INT_GPIOA3;
-            break;
-        }
-
-        default:
-        {
-            return(-1);
-        }
-    }
-
-    //
-    // Return GPIO interrupt number.
-    //
-    return(ulInt);
-}
-
-//*****************************************************************************
-//
-//! Sets the direction and mode of the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port
-//! \param ucPins is the bit-packed representation of the pin(s).
-//! \param ulPinIO is the pin direction and/or mode.
-//!
-//! This function will set the specified pin(s) on the selected GPIO port
-//! as either an input or output under software control, or it will set the
-//! pin to be under hardware control.
-//!
-//! The parameter \e ulPinIO is an enumerated data type that can be one of
-//! the following values:
-//!
-//! - \b GPIO_DIR_MODE_IN
-//! - \b GPIO_DIR_MODE_OUT
-//!
-//! where \b GPIO_DIR_MODE_IN specifies that the pin will be programmed as
-//! a software controlled input, \b GPIO_DIR_MODE_OUT specifies that the pin
-//! will be programmed as a software controlled output.
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \note GPIOPadConfigSet() must also be used to configure the corresponding
-//! pad(s) in order for them to propagate the signal to/from the GPIO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
-               unsigned long ulPinIO)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-    ASSERT((ulPinIO == GPIO_DIR_MODE_IN) || (ulPinIO == GPIO_DIR_MODE_OUT));
-
-    //
-    // Set the pin direction and mode.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_DIR) = ((ulPinIO & 1) ?
-                                  (HWREG(ulPort + GPIO_O_GPIO_DIR) | ucPins) :
-                                  (HWREG(ulPort + GPIO_O_GPIO_DIR) & ~(ucPins)));
-}
-
-//*****************************************************************************
-//
-//! Gets the direction and mode of a pin.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPin is the pin number.
-//!
-//! This function gets the direction and control mode for a specified pin on
-//! the selected GPIO port.  The pin can be configured as either an input or
-//! output under software control, or it can be under hardware control.  The
-//! type of control and direction are returned as an enumerated data type.
-//!
-//! \return Returns one of the enumerated data types described for
-//! GPIODirModeSet().
-//
-//*****************************************************************************
-unsigned long
-GPIODirModeGet(unsigned long ulPort, unsigned char ucPin)
-{
-    unsigned long ulDir;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the pin direction
-    //
-    ulDir = HWREG(ulPort + GPIO_O_GPIO_DIR);
-    return(((ulDir & ucPin) ? 1 : 0));
-}
-
-//*****************************************************************************
-//
-//! Sets the interrupt type for the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPins is the bit-packed representation of the pin(s).
-//! \param ulIntType specifies the type of interrupt trigger mechanism.
-//!
-//! This function sets up the various interrupt trigger mechanisms for the
-//! specified pin(s) on the selected GPIO port.
-//!
-//! The parameter \e ulIntType is an enumerated data type that can be one of
-//! the following values:
-//!
-//! - \b GPIO_FALLING_EDGE
-//! - \b GPIO_RISING_EDGE
-//! - \b GPIO_BOTH_EDGES
-//! - \b GPIO_LOW_LEVEL
-//! - \b GPIO_HIGH_LEVEL
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \note In order to avoid any spurious interrupts, the user must
-//! ensure that the GPIO inputs remain stable for the duration of
-//! this function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
-               unsigned long ulIntType)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-    ASSERT((ulIntType == GPIO_FALLING_EDGE) ||
-           (ulIntType == GPIO_RISING_EDGE) || (ulIntType == GPIO_BOTH_EDGES) ||
-           (ulIntType == GPIO_LOW_LEVEL) || (ulIntType == GPIO_HIGH_LEVEL));
-
-    //
-    // Set the pin interrupt type.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_IBE) = ((ulIntType & 1) ?
-                                  (HWREG(ulPort + GPIO_O_GPIO_IBE) | ucPins) :
-                                  (HWREG(ulPort + GPIO_O_GPIO_IBE) & ~(ucPins)));
-    HWREG(ulPort + GPIO_O_GPIO_IS) = ((ulIntType & 2) ?
-                                 (HWREG(ulPort + GPIO_O_GPIO_IS) | ucPins) :
-                                 (HWREG(ulPort + GPIO_O_GPIO_IS) & ~(ucPins)));
-    HWREG(ulPort + GPIO_O_GPIO_IEV) = ((ulIntType & 4) ?
-                                  (HWREG(ulPort + GPIO_O_GPIO_IEV) | ucPins) :
-                                  (HWREG(ulPort + GPIO_O_GPIO_IEV) & ~(ucPins)));
-}
-
-//*****************************************************************************
-//
-//! Gets the interrupt type for a pin.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPin is the pin number.
-//!
-//! This function gets the interrupt type for a specified pin on the selected
-//! GPIO port.  The pin can be configured as a falling edge, rising edge, or
-//! both edge detected interrupt, or it can be configured as a low level or
-//! high level detected interrupt.  The type of interrupt detection mechanism
-//! is returned as an enumerated data type.
-//!
-//! \return Returns one of the enumerated data types described for
-//! GPIOIntTypeSet().
-//
-//*****************************************************************************
-unsigned long
-GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin)
-{
-    unsigned long ulIBE, ulIS, ulIEV;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the pin interrupt type.
-    //
-    ulIBE = HWREG(ulPort + GPIO_O_GPIO_IBE);
-    ulIS = HWREG(ulPort + GPIO_O_GPIO_IS);
-    ulIEV = HWREG(ulPort + GPIO_O_GPIO_IEV);
-    return(((ulIBE & ucPin) ? 1 : 0) | ((ulIS & ucPin) ? 2 : 0) |
-           ((ulIEV & ucPin) ? 4 : 0));
-}
-
-//*****************************************************************************
-//
-//! Enables the specified GPIO interrupts.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ulIntFlags is the bit mask of the interrupt sources to enable.
-//!
-//! This function enables the indicated GPIO interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b GPIO_INT_DMA   - interrupt due to GPIO triggered DMA Done
-//! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
-//! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
-//! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
-//! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
-//! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
-//! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
-//! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
-//! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntEnable(unsigned long ulPort, unsigned long ulIntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Enable the interrupts.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_IM) |= ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables the specified GPIO interrupts.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ulIntFlags is the bit mask of the interrupt sources to disable.
-//!
-//! This function disables the indicated GPIO interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b GPIO_INT_DMA   - interrupt due to GPIO triggered DMA Done
-//! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
-//! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
-//! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
-//! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
-//! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
-//! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
-//! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
-//! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntDisable(unsigned long ulPort, unsigned long ulIntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Disable the interrupts.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_IM) &= ~(ulIntFlags);
-}
-
-//*****************************************************************************
-//
-//! Gets interrupt status for the specified GPIO port.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param bMasked specifies whether masked or raw interrupt status is
-//! returned.
-//!
-//! If \e bMasked is set as \b true, then the masked interrupt status is
-//! returned; otherwise, the raw interrupt status will be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in GPIOIntEnable().
-//
-//*****************************************************************************
-long
-GPIOIntStatus(unsigned long ulPort, tBoolean bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the interrupt status.
-    //
-    if(bMasked)
-    {
-        return(HWREG(ulPort + GPIO_O_GPIO_MIS));
-    }
-    else
-    {
-        return(HWREG(ulPort + GPIO_O_GPIO_RIS));
-    }
-}
-
-//*****************************************************************************
-//
-//! Clears the interrupt for the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! Clears the interrupt for the specified pin(s).
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to GPIOIntEnable().
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntClear(unsigned long ulPort, unsigned long ulIntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Clear the interrupts.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_ICR) = ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for a GPIO port.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param pfnIntHandler is a pointer to the GPIO port interrupt handling
-//! function.
-//!
-//! This function will ensure that the interrupt handler specified by
-//! \e pfnIntHandler is called when an interrupt is detected from the selected
-//! GPIO port.  This function will also enable the corresponding GPIO interrupt
-//! in the interrupt controller; individual pin interrupts and interrupt
-//! sources must be enabled with GPIOIntEnable().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntRegister(unsigned long ulPort, void (*pfnIntHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Get the interrupt number associated with the specified GPIO.
-    //
-    ulPort = GPIOGetIntNumber(ulPort);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(ulPort, pfnIntHandler);
-
-    //
-    // Enable the GPIO interrupt.
-    //
-    IntEnable(ulPort);
-}
-
-//*****************************************************************************
-//
-//! Removes an interrupt handler for a GPIO port.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function will unregister the interrupt handler for the specified
-//! GPIO port.  This function will also disable the corresponding
-//! GPIO port interrupt in the interrupt controller; individual GPIO interrupts
-//! and interrupt sources must be disabled with GPIOIntDisable().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntUnregister(unsigned long ulPort)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Get the interrupt number associated with the specified GPIO.
-    //
-    ulPort = GPIOGetIntNumber(ulPort);
-
-    //
-    // Disable the GPIO interrupt.
-    //
-    IntDisable(ulPort);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(ulPort);
-}
-
-//*****************************************************************************
-//
-//! Reads the values present of the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPins is the bit-packed representation of the pin(s).
-//!
-//! The values at the specified pin(s) are read, as specified by \e ucPins.
-//! Values are returned for both input and output pin(s), and the value
-//! for pin(s) that are not specified by \e ucPins are set to 0.
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \return Returns a bit-packed byte providing the state of the specified
-//! pin, where bit 0 of the byte represents GPIO port pin 0, bit 1 represents
-//! GPIO port pin 1, and so on.  Any bit that is not specified by \e ucPins
-//! is returned as a 0.  Bits 31:8 should be ignored.
-//
-//*****************************************************************************
-long
-GPIOPinRead(unsigned long ulPort, unsigned char ucPins)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the pin value(s).
-    //
-    return(HWREG(ulPort + (GPIO_O_GPIO_DATA + (ucPins << 2))));
-}
-
-//*****************************************************************************
-//
-//! Writes a value to the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPins is the bit-packed representation of the pin(s).
-//! \param ucVal is the value to write to the pin(s).
-//!
-//! Writes the corresponding bit values to the output pin(s) specified by
-//! \e ucPins.  Writing to a pin configured as an input pin has no effect.
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOPinWrite(unsigned long ulPort, unsigned char ucPins, unsigned char ucVal)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Write the pins.
-    //
-    HWREG(ulPort + (GPIO_O_GPIO_DATA + (ucPins << 2))) = ucVal;
-}
-
-//*****************************************************************************
-//
-//! Enables a GPIO port as a trigger to start a DMA transaction.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function enables a GPIO port to be used as a trigger to start a uDMA
-//! transaction. The GPIO pin will still generate interrupts if the interrupt is
-//! enabled for the selected pin.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIODMATriggerEnable(unsigned long ulPort)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Set the pin as a DMA trigger.
-    //
-    if(ulPort == GPIOA0_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x1;
-    }
-    else if(ulPort == GPIOA1_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x2;
-    }
-    else if(ulPort == GPIOA2_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x4;
-    }
-    else if(ulPort == GPIOA3_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x8;
-    }
-}
-
-//*****************************************************************************
-//
-//! Disables a GPIO port as a trigger to start a DMA transaction.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function disables a GPIO port to be used as a trigger to start a uDMA
-//! transaction.  This function can be used to disable this feature if it was
-//! enabled via a call to GPIODMATriggerEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIODMATriggerDisable(unsigned long ulPort)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Set the pin as a DMA trigger.
-    //
-    if(ulPort == GPIOA0_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x1;
-    }
-    else if(ulPort == GPIOA1_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x2;
-    }
-    else if(ulPort == GPIOA2_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x4;
-    }
-    else if(ulPort == GPIOA3_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x8;
-    }
-}
-
-
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/gpio.h b/ports/cc3200/hal/gpio.h
deleted file mode 100644
index 35acf79a60..0000000000
--- a/ports/cc3200/hal/gpio.h
+++ /dev/null
@@ -1,139 +0,0 @@
-//*****************************************************************************
-//
-//  gpio.h
-//
-//  Defines and Macros for GPIO API.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __GPIO_H__
-#define __GPIO_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following values define the bit field for the ucPins argument to several
-// of the APIs.
-//
-//*****************************************************************************
-#define GPIO_PIN_0              0x00000001  // GPIO pin 0
-#define GPIO_PIN_1              0x00000002  // GPIO pin 1
-#define GPIO_PIN_2              0x00000004  // GPIO pin 2
-#define GPIO_PIN_3              0x00000008  // GPIO pin 3
-#define GPIO_PIN_4              0x00000010  // GPIO pin 4
-#define GPIO_PIN_5              0x00000020  // GPIO pin 5
-#define GPIO_PIN_6              0x00000040  // GPIO pin 6
-#define GPIO_PIN_7              0x00000080  // GPIO pin 7
-
-//*****************************************************************************
-//
-// Values that can be passed to GPIODirModeSet as the ulPinIO parameter, and
-// returned from GPIODirModeGet.
-//
-//*****************************************************************************
-#define GPIO_DIR_MODE_IN        0x00000000  // Pin is a GPIO input
-#define GPIO_DIR_MODE_OUT       0x00000001  // Pin is a GPIO output
-
-//*****************************************************************************
-//
-// Values that can be passed to GPIOIntTypeSet as the ulIntType parameter, and
-// returned from GPIOIntTypeGet.
-//
-//*****************************************************************************
-#define GPIO_FALLING_EDGE       0x00000000  // Interrupt on falling edge
-#define GPIO_RISING_EDGE        0x00000004  // Interrupt on rising edge
-#define GPIO_BOTH_EDGES         0x00000001  // Interrupt on both edges
-#define GPIO_LOW_LEVEL          0x00000002  // Interrupt on low level
-#define GPIO_HIGH_LEVEL         0x00000006  // Interrupt on high level
-
-//*****************************************************************************
-//
-// Values that can be passed to GPIOIntEnable() and GPIOIntDisable() functions
-// in the ulIntFlags parameter.
-//
-//*****************************************************************************
-#define GPIO_INT_DMA            0x00000100
-#define GPIO_INT_PIN_0          0x00000001
-#define GPIO_INT_PIN_1          0x00000002
-#define GPIO_INT_PIN_2          0x00000004
-#define GPIO_INT_PIN_3          0x00000008
-#define GPIO_INT_PIN_4          0x00000010
-#define GPIO_INT_PIN_5          0x00000020
-#define GPIO_INT_PIN_6          0x00000040
-#define GPIO_INT_PIN_7          0x00000080
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
-                           unsigned long ulPinIO);
-extern unsigned long GPIODirModeGet(unsigned long ulPort, unsigned char ucPin);
-extern void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
-                           unsigned long ulIntType);
-extern void GPIODMATriggerEnable(unsigned long ulPort);
-extern void GPIODMATriggerDisable(unsigned long ulPort);
-extern unsigned long GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin);
-extern void GPIOIntEnable(unsigned long ulPort, unsigned long ulIntFlags);
-extern void GPIOIntDisable(unsigned long ulPort, unsigned long ulIntFlags);
-extern long GPIOIntStatus(unsigned long ulPort, tBoolean bMasked);
-extern void GPIOIntClear(unsigned long ulPort, unsigned long ulIntFlags);
-extern void GPIOIntRegister(unsigned long ulPort,
-                                void (*pfnIntHandler)(void));
-extern void GPIOIntUnregister(unsigned long ulPort);
-extern long GPIOPinRead(unsigned long ulPort, unsigned char ucPins);
-extern void GPIOPinWrite(unsigned long ulPort, unsigned char ucPins,
-                         unsigned char ucVal);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __GPIO_H__
diff --git a/ports/cc3200/hal/i2c.c b/ports/cc3200/hal/i2c.c
deleted file mode 100644
index 487f93cc26..0000000000
--- a/ports/cc3200/hal/i2c.c
+++ /dev/null
@@ -1,2043 +0,0 @@
-//*****************************************************************************
-//
-//  i2c.c
-//
-//  Driver for Inter-IC (I2C) bus block.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup I2C_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_i2c.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "debug.h"
-#include "i2c.h"
-#include "interrupt.h"
-
-//*****************************************************************************
-//
-// A mapping of I2C base address to interrupt number.
-//
-//*****************************************************************************
-static const uint32_t g_ppui32I2CIntMap[][2] =
-{
-    { I2CA0_BASE, INT_I2CA0},
-};
-
-static const int_fast8_t g_i8I2CIntMapRows =
-    sizeof(g_ppui32I2CIntMap) / sizeof(g_ppui32I2CIntMap[0]);
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks an I2C base address.
-//!
-//! \param ui32Base is the base address of the I2C module.
-//!
-//! This function determines if a I2C module base address is valid.
-//!
-//! \return Returns \b true if the base address is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#ifdef DEBUG
-static bool
-_I2CBaseValid(uint32_t ui32Base)
-{
-    return((ui32Base == I2CA0_BASE));
-}
-#else
-#define _I2CBaseValid(ui32Base)         (ui32Base)
-#endif
-
-//*****************************************************************************
-//
-//! \internal
-//! Gets the I2C interrupt number.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! Given a I2C base address, this function returns the corresponding
-//! interrupt number.
-//!
-//! \return Returns an I2C interrupt number, or 0 if \e ui32Base is invalid.
-//
-//*****************************************************************************
-static uint32_t
-_I2CIntNumberGet(uint32_t ui32Base)
-{
-    int_fast8_t i8Idx, i8Rows;
-    const uint32_t (*ppui32I2CIntMap)[2];
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    ppui32I2CIntMap = g_ppui32I2CIntMap;
-    i8Rows = g_i8I2CIntMapRows;
-
-    //
-    // Loop through the table that maps I2C base addresses to interrupt
-    // numbers.
-    //
-    for(i8Idx = 0; i8Idx < i8Rows; i8Idx++)
-    {
-        //
-        // See if this base address matches.
-        //
-        if(ppui32I2CIntMap[i8Idx][0] == ui32Base)
-        {
-            //
-            // Return the corresponding interrupt number.
-            //
-            return(ppui32I2CIntMap[i8Idx][1]);
-        }
-    }
-
-    //
-    // The base address could not be found, so return an error.
-    //
-    return(0);
-}
-
-//*****************************************************************************
-//
-//! Initializes the I2C Master block.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32I2CClk is the rate of the clock supplied to the I2C module.
-//! \param bFast set up for fast data transfers.
-//!
-//! This function initializes operation of the I2C Master block by configuring
-//! the bus speed for the master and enabling the I2C Master block.
-//!
-//! If the parameter \e bFast is \b true, then the master block is set up to
-//! transfer data at 400 Kbps; otherwise, it is set up to transfer data at
-//! 100 Kbps.  If Fast Mode Plus (1 Mbps) is desired, software should manually
-//! write the I2CMTPR after calling this function.  For High Speed (3.4 Mbps)
-//! mode, a specific command is used to switch to the faster clocks after the
-//! initial communication with the slave is done at either 100 Kbps or
-//! 400 Kbps.
-//!
-//! The peripheral clock is the same as the processor clock.  This value is
-//! returned by SysCtlClockGet(), or it can be explicitly hard coded if it is
-//! constant and known (to save the code/execution overhead of a call to
-//! SysCtlClockGet()).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq)
-{
-    uint32_t ui32TPR;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Must enable the device before doing anything else.
-    //
-    I2CMasterEnable(ui32Base);
-
-    //
-    // Compute the clock divider that achieves the fastest speed less than or
-    // equal to the desired speed.  The numerator is biased to favor a larger
-    // clock divider so that the resulting clock is always less than or equal
-    // to the desired clock, never greater.
-    //
-    ui32TPR = ((80000000 + (2 * 10 * ui32SCLFreq) - 1) /
-               (2 * 10 * ui32SCLFreq)) - 1;
-    HWREG(ui32Base + I2C_O_MTPR) = ui32TPR;
-
-    //
-    // Check to see if this I2C peripheral is High-Speed enabled.  If yes, also
-    // choose the fastest speed that is less than or equal to 3.4 Mbps.
-    //
-    if(HWREG(ui32Base + I2C_O_PP) & I2C_PP_HS)
-    {
-        ui32TPR = ((80000000 + (2 * 3 * 3400000) - 1) /
-                   (2 * 3 * 3400000)) - 1;
-        HWREG(ui32Base + I2C_O_MTPR) = I2C_MTPR_HS | ui32TPR;
-    }
-}
-
-//*****************************************************************************
-//
-//! Initializes the I2C Slave block.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui8SlaveAddr 7-bit slave address
-//!
-//! This function initializes operation of the I2C Slave block by configuring
-//! the slave address and enabling the I2C Slave block.
-//!
-//! The parameter \e ui8SlaveAddr is the value that is compared against the
-//! slave address sent by an I2C master.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT(!(ui8SlaveAddr & 0x80));
-
-    //
-    // Must enable the device before doing anything else.
-    //
-    I2CSlaveEnable(ui32Base);
-
-    //
-    // Set up the slave address.
-    //
-    HWREG(ui32Base + I2C_O_SOAR) = ui8SlaveAddr;
-}
-
-//*****************************************************************************
-//
-//! Sets the I2C slave address.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui8AddrNum determines which slave address is set.
-//! \param ui8SlaveAddr is the 7-bit slave address
-//!
-//! This function writes the specified slave address.  The \e ui32AddrNum field
-//! dictates which slave address is configured.  For example, a value of 0
-//! configures the primary address and a value of 1 configures the secondary.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum, uint8_t ui8SlaveAddr)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT(!(ui8AddrNum > 1));
-    ASSERT(!(ui8SlaveAddr & 0x80));
-
-    //
-    // Determine which slave address is being set.
-    //
-    switch(ui8AddrNum)
-    {
-        //
-        // Set up the primary slave address.
-        //
-        case 0:
-        {
-            HWREG(ui32Base + I2C_O_SOAR) = ui8SlaveAddr;
-            break;
-        }
-
-        //
-        // Set up and enable the secondary slave address.
-        //
-        case 1:
-        {
-            HWREG(ui32Base + I2C_O_SOAR2) = I2C_SOAR2_OAR2EN | ui8SlaveAddr;
-            break;
-        }
-    }
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Master block.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function enables operation of the I2C Master block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the master block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) |= I2C_MCR_MFE;
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Slave block.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This fucntion enables operation of the I2C Slave block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the clock to the slave block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) |= I2C_MCR_SFE;
-
-    //
-    // Enable the slave.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = I2C_SCSR_DA;
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C master block.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function disables operation of the I2C master block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the master block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) &= ~(I2C_MCR_MFE);
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C slave block.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function disables operation of the I2C slave block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the slave.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = 0;
-
-    //
-    // Disable the clock to the slave block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) &= ~(I2C_MCR_SFE);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the I2C module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! I2C interrupt occurs.
-//!
-//! This function sets the handler to be called when an I2C interrupt occurs.
-//! This function enables the global interrupt in the interrupt controller;
-//! specific I2C interrupts must be enabled via I2CMasterIntEnable() and
-//! I2CSlaveIntEnable().  If necessary, it is the interrupt handler's
-//! responsibility to clear the interrupt source via I2CMasterIntClear() and
-//! I2CSlaveIntClear().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void))
-{
-    uint32_t ui32Int;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Determine the interrupt number based on the I2C port.
-    //
-    ui32Int = _I2CIntNumberGet(ui32Base);
-
-    ASSERT(ui32Int != 0);
-
-    //
-    // Register the interrupt handler, returning an error if an error occurs.
-    //
-    IntRegister(ui32Int, pfnHandler);
-
-    //
-    // Enable the I2C interrupt.
-    //
-    IntEnable(ui32Int);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the I2C module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function clears the handler to be called when an I2C interrupt
-//! occurs.  This function also masks off the interrupt in the interrupt r
-//! controller so that the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CIntUnregister(uint32_t ui32Base)
-{
-    uint32_t ui32Int;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Determine the interrupt number based on the I2C port.
-    //
-    ui32Int = _I2CIntNumberGet(ui32Base);
-
-    ASSERT(ui32Int != 0);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(ui32Int);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(ui32Int);
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Master interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function enables the I2C Master interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) = 1;
-}
-
-//*****************************************************************************
-//
-//! Enables individual I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated I2C Master interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b I2C_MASTER_INT_RX_FIFO_FULL - RX FIFO Full interrupt
-//! - \b I2C_MASTER_INT_TX_FIFO_EMPTY - TX FIFO Empty interrupt
-//! - \b I2C_MASTER_INT_RX_FIFO_REQ - RX FIFO Request interrupt
-//! - \b I2C_MASTER_INT_TX_FIFO_REQ - TX FIFO Request interrupt
-//! - \b I2C_MASTER_INT_ARB_LOST - Arbitration Lost interrupt
-//! - \b I2C_MASTER_INT_STOP - Stop Condition interrupt
-//! - \b I2C_MASTER_INT_START - Start Condition interrupt
-//! - \b I2C_MASTER_INT_NACK - Address/Data NACK interrupt
-//! - \b I2C_MASTER_INT_TX_DMA_DONE - TX DMA Complete interrupt
-//! - \b I2C_MASTER_INT_RX_DMA_DONE - RX DMA Complete interrupt
-//! - \b I2C_MASTER_INT_TIMEOUT - Clock Timeout interrupt
-//! - \b I2C_MASTER_INT_DATA - Data interrupt
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) |= ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Slave interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function enables the I2C Slave interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) |= I2C_SLAVE_INT_DATA;
-}
-
-//*****************************************************************************
-//
-//! Enables individual I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated I2C Slave interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b I2C_SLAVE_INT_RX_FIFO_FULL - RX FIFO Full interrupt
-//! - \b I2C_SLAVE_INT_TX_FIFO_EMPTY - TX FIFO Empty interrupt
-//! - \b I2C_SLAVE_INT_RX_FIFO_REQ - RX FIFO Request interrupt
-//! - \b I2C_SLAVE_INT_TX_FIFO_REQ - TX FIFO Request interrupt
-//! - \b I2C_SLAVE_INT_TX_DMA_DONE - TX DMA Complete interrupt
-//! - \b I2C_SLAVE_INT_RX_DMA_DONE - RX DMA Complete interrupt
-//! - \b I2C_SLAVE_INT_STOP - Stop condition detected interrupt
-//! - \b I2C_SLAVE_INT_START - Start condition detected interrupt
-//! - \b I2C_SLAVE_INT_DATA - Data interrupt
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) |= ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C Master interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function disables the I2C Master interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) = 0;
-}
-
-//*****************************************************************************
-//
-//! Disables individual I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be
-//!        disabled.
-//!
-//! This function disables the indicated I2C Master interrupt sources.  Only
-//! the sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CMasterIntEnableEx().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) &= ~ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C Slave interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function disables the I2C Slave interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) &= ~I2C_SLAVE_INT_DATA;
-}
-
-//*****************************************************************************
-//
-//! Disables individual I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be
-//!        disabled.
-//!
-//! This function disables the indicated I2C Slave interrupt sources.  Only
-//! the sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CSlaveIntEnableEx().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) &= ~ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Master interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Master module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return The current interrupt status, returned as \b true if active
-//! or \b false if not active.
-//
-//*****************************************************************************
-bool
-I2CMasterIntStatus(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return((HWREG(ui32Base + I2C_O_MMIS)) ? true : false);
-    }
-    else
-    {
-        return((HWREG(ui32Base + I2C_O_MRIS)) ? true : false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Master interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Master module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in I2CMasterIntEnableEx().
-//
-//*****************************************************************************
-uint32_t
-I2CMasterIntStatusEx(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return(HWREG(ui32Base + I2C_O_MMIS));
-    }
-    else
-    {
-        return(HWREG(ui32Base + I2C_O_MRIS));
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Slave interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Slave module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return The current interrupt status, returned as \b true if active
-//! or \b false if not active.
-//
-//*****************************************************************************
-bool
-I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return((HWREG(ui32Base + I2C_O_SMIS)) ? true : false);
-    }
-    else
-    {
-        return((HWREG(ui32Base + I2C_O_SRIS)) ? true : false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Slave interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Slave module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in I2CSlaveIntEnableEx().
-//
-//*****************************************************************************
-uint32_t
-I2CSlaveIntStatusEx(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return(HWREG(ui32Base + I2C_O_SMIS));
-    }
-    else
-    {
-        return(HWREG(ui32Base + I2C_O_SRIS));
-    }
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! The I2C Master interrupt source is cleared, so that it no longer
-//! asserts.  This function must be called in the interrupt handler to keep the
-//! interrupt from being triggered again immediately upon exit.
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntClear(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C master interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_MICR) = I2C_MICR_IC;
-
-    //
-    // Workaround for I2C master interrupt clear errata for some
-    // devices.  For later devices, this write is ignored and therefore
-    // harmless (other than the slight performance hit).
-    //
-    HWREG(ui32Base + I2C_O_MMIS) = I2C_MICR_IC;
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified I2C Master interrupt sources are cleared, so that they no
-//! longer assert.  This function must be called in the interrupt handler to
-//! keep the interrupt from being triggered again immediately upon exit.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CMasterIntEnableEx().
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C master interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_MICR) = ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! The I2C Slave interrupt source is cleared, so that it no longer asserts.
-//! This function must be called in the interrupt handler to keep the interrupt
-//! from being triggered again immediately upon exit.
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntClear(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C slave interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_SICR) = I2C_SICR_DATAIC;
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified I2C Slave interrupt sources are cleared, so that they no
-//! longer assert.  This function must be called in the interrupt handler to
-//! keep the interrupt from being triggered again immediately upon exit.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CSlaveIntEnableEx().
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C slave interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_SICR) = ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Sets the address that the I2C Master places on the bus.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui8SlaveAddr 7-bit slave address
-//! \param bReceive flag indicating the type of communication with the slave
-//!
-//! This function configures the address that the I2C Master places on the
-//! bus when initiating a transaction.  When the \e bReceive parameter is set
-//! to \b true, the address indicates that the I2C Master is initiating a
-//! read from the slave; otherwise the address indicates that the I2C
-//! Master is initiating a write to the slave.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterSlaveAddrSet(uint32_t ui32Base, uint8_t ui8SlaveAddr,
-                      bool bReceive)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT(!(ui8SlaveAddr & 0x80));
-
-    //
-    // Set the address of the slave with which the master will communicate.
-    //
-    HWREG(ui32Base + I2C_O_MSA) = (ui8SlaveAddr << 1) | bReceive;
-}
-
-//*****************************************************************************
-//
-//! Reads the state of the SDA and SCL pins.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns the state of the I2C bus by providing the real time
-//! values of the SDA and SCL pins.
-//!
-//!
-//! \return Returns the state of the bus with SDA in bit position 1 and SCL in
-//! bit position 0.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterLineStateGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the line state.
-    //
-    return(HWREG(ui32Base + I2C_O_MBMON));
-}
-
-//*****************************************************************************
-//
-//! Indicates whether or not the I2C Master is busy.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns an indication of whether or not the I2C Master is
-//! busy transmitting or receiving data.
-//!
-//! \return Returns \b true if the I2C Master is busy; otherwise, returns
-//! \b false.
-//
-//*****************************************************************************
-bool
-I2CMasterBusy(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the busy status.
-    //
-    if(HWREG(ui32Base + I2C_O_MCS) & I2C_MCS_BUSY)
-    {
-        return(true);
-    }
-    else
-    {
-        return(false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Indicates whether or not the I2C bus is busy.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns an indication of whether or not the I2C bus is busy.
-//! This function can be used in a multi-master environment to determine if
-//! another master is currently using the bus.
-//!
-//! \return Returns \b true if the I2C bus is busy; otherwise, returns
-//! \b false.
-//
-//*****************************************************************************
-bool
-I2CMasterBusBusy(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the bus busy status.
-    //
-    if(HWREG(ui32Base + I2C_O_MCS) & I2C_MCS_BUSBSY)
-    {
-        return(true);
-    }
-    else
-    {
-        return(false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Controls the state of the I2C Master module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32Cmd command to be issued to the I2C Master module.
-//!
-//! This function is used to control the state of the Master module send and
-//! receive operations.  The \e ui8Cmd parameter can be one of the following
-//! values:
-//!
-//! - \b I2C_MASTER_CMD_SINGLE_SEND
-//! - \b I2C_MASTER_CMD_SINGLE_RECEIVE
-//! - \b I2C_MASTER_CMD_BURST_SEND_START
-//! - \b I2C_MASTER_CMD_BURST_SEND_CONT
-//! - \b I2C_MASTER_CMD_BURST_SEND_FINISH
-//! - \b I2C_MASTER_CMD_BURST_SEND_ERROR_STOP
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_START
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_CONT
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_FINISH
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP
-//! - \b I2C_MASTER_CMD_QUICK_COMMAND
-//! - \b I2C_MASTER_CMD_HS_MASTER_CODE_SEND
-//! - \b I2C_MASTER_CMD_FIFO_SINGLE_SEND
-//! - \b I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_START
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_CONT
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT((ui32Cmd == I2C_MASTER_CMD_SINGLE_SEND) ||
-           (ui32Cmd == I2C_MASTER_CMD_SINGLE_RECEIVE) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_QUICK_COMMAND) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_SINGLE_SEND) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_HS_MASTER_CODE_SEND));
-
-    //
-    // Send the command.
-    //
-    HWREG(ui32Base + I2C_O_MCS) = ui32Cmd;
-}
-
-//*****************************************************************************
-//
-//! Gets the error status of the I2C Master module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function is used to obtain the error status of the Master module send
-//! and receive operations.
-//!
-//! \return Returns the error status, as one of \b I2C_MASTER_ERR_NONE,
-//! \b I2C_MASTER_ERR_ADDR_ACK, \b I2C_MASTER_ERR_DATA_ACK, or
-//! \b I2C_MASTER_ERR_ARB_LOST.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterErr(uint32_t ui32Base)
-{
-    uint32_t ui32Err;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Get the raw error state
-    //
-    ui32Err = HWREG(ui32Base + I2C_O_MCS);
-
-    //
-    // If the I2C master is busy, then all the other bit are invalid, and
-    // don't have an error to report.
-    //
-    if(ui32Err & I2C_MCS_BUSY)
-    {
-        return(I2C_MASTER_ERR_NONE);
-    }
-
-    //
-    // Check for errors.
-    //
-    if(ui32Err & (I2C_MCS_ERROR | I2C_MCS_ARBLST))
-    {
-        return(ui32Err & (I2C_MCS_ARBLST | I2C_MCS_ACK | I2C_MCS_ADRACK));
-    }
-    else
-    {
-        return(I2C_MASTER_ERR_NONE);
-    }
-}
-
-//*****************************************************************************
-//
-//! Transmits a byte from the I2C Master.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui8Data data to be transmitted from the I2C Master.
-//!
-//! This function places the supplied data into I2C Master Data Register.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Write the byte.
-    //
-    HWREG(ui32Base + I2C_O_MDR) = ui8Data;
-}
-
-//*****************************************************************************
-//
-//! Receives a byte that has been sent to the I2C Master.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function reads a byte of data from the I2C Master Data Register.
-//!
-//! \return Returns the byte received from by the I2C Master, cast as an
-//! uint32_t.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterDataGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Read a byte.
-    //
-    return(HWREG(ui32Base + I2C_O_MDR));
-}
-
-//*****************************************************************************
-//
-//! Sets the Master clock timeout value.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32Value is the number of I2C clocks before the timeout is
-//!        asserted.
-//!
-//! This function enables and configures the clock low timeout feature in the
-//! I2C peripheral.  This feature is implemented as a 12-bit counter, with the
-//! upper 8-bits being programmable.  For example, to program a timeout of 20ms
-//! with a 100kHz SCL frequency, \e ui32Value would be 0x7d.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Write the timeout value.
-    //
-    HWREG(ui32Base + I2C_O_MCLKOCNT) = ui32Value;
-}
-
-//*****************************************************************************
-//
-//! Configures ACK override behavior of the I2C Slave.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bEnable enables or disables ACK override.
-//!
-//! This function enables or disables ACK override, allowing the user
-//! application to drive the value on SDA during the ACK cycle.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable or disable based on bEnable.
-    //
-    if(bEnable)
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) |= I2C_SACKCTL_ACKOEN;
-    }
-    else
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) &= ~I2C_SACKCTL_ACKOEN;
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes the ACK value.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bACK chooses whether to ACK (true) or NACK (false) the transfer.
-//!
-//! This function puts the desired ACK value on SDA during the ACK cycle.  The
-//! value written is only valid when ACK override is enabled using
-//! I2CSlaveACKOverride().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // ACK or NACK based on the value of bACK.
-    //
-    if(bACK)
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) &= ~I2C_SACKCTL_ACKOVAL;
-    }
-    else
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) |= I2C_SACKCTL_ACKOVAL;
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the I2C Slave module status
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function returns the action requested from a master, if any.
-//! Possible values are:
-//!
-//! - \b I2C_SLAVE_ACT_NONE
-//! - \b I2C_SLAVE_ACT_RREQ
-//! - \b I2C_SLAVE_ACT_TREQ
-//! - \b I2C_SLAVE_ACT_RREQ_FBR
-//! - \b I2C_SLAVE_ACT_OWN2SEL
-//! - \b I2C_SLAVE_ACT_QCMD
-//! - \b I2C_SLAVE_ACT_QCMD_DATA
-//!
-//! \note Not all devices support the second I2C slave's own address
-//! or the quick command function.  Please consult the device data sheet to
-//! determine if these features are supported.
-//!
-//! \return Returns \b I2C_SLAVE_ACT_NONE to indicate that no action has been
-//! requested of the I2C Slave module, \b I2C_SLAVE_ACT_RREQ to indicate that
-//! an I2C master has sent data to the I2C Slave module, \b I2C_SLAVE_ACT_TREQ
-//! to indicate that an I2C master has requested that the I2C Slave module send
-//! data, \b I2C_SLAVE_ACT_RREQ_FBR to indicate that an I2C master has sent
-//! data to the I2C slave and the first byte following the slave's own address
-//! has been received, \b I2C_SLAVE_ACT_OWN2SEL to indicate that the second I2C
-//! slave address was matched, \b I2C_SLAVE_ACT_QCMD to indicate that a quick
-//! command was received, and \b I2C_SLAVE_ACT_QCMD_DATA to indicate that the
-//! data bit was set when the quick command was received.
-//
-//*****************************************************************************
-uint32_t
-I2CSlaveStatus(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the slave status.
-    //
-    return(HWREG(ui32Base + I2C_O_SCSR));
-}
-
-//*****************************************************************************
-//
-//! Transmits a byte from the I2C Slave.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui8Data is the data to be transmitted from the I2C Slave
-//!
-//! This function places the supplied data into I2C Slave Data Register.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Write the byte.
-    //
-    HWREG(ui32Base + I2C_O_SDR) = ui8Data;
-}
-
-//*****************************************************************************
-//
-//! Receives a byte that has been sent to the I2C Slave.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function reads a byte of data from the I2C Slave Data Register.
-//!
-//! \return Returns the byte received from by the I2C Slave, cast as an
-//! uint32_t.
-//
-//*****************************************************************************
-uint32_t
-I2CSlaveDataGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Read a byte.
-    //
-    return(HWREG(ui32Base + I2C_O_SDR));
-}
-
-//*****************************************************************************
-//
-//! Configures the I2C transmit (TX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui32Config is the configuration of the FIFO using specified macros.
-//!
-//! This configures the I2C peripheral's transmit FIFO.  The transmit FIFO can
-//! be used by the master or slave, but not both.  The following macros are
-//! used to configure the TX FIFO behavior for master or slave, with or without
-//! DMA:
-//!
-//! \b I2C_FIFO_CFG_TX_MASTER, \b I2C_FIFO_CFG_TX_SLAVE,
-//! \b I2C_FIFO_CFG_TX_MASTER_DMA, \b I2C_FIFO_CFG_TX_SLAVE_DMA
-//!
-//! To select the trigger level, one of the following macros should be used:
-//!
-//! \b I2C_FIFO_CFG_TX_TRIG_1, \b I2C_FIFO_CFG_TX_TRIG_2,
-//! \b I2C_FIFO_CFG_TX_TRIG_3, \b I2C_FIFO_CFG_TX_TRIG_4,
-//! \b I2C_FIFO_CFG_TX_TRIG_5, \b I2C_FIFO_CFG_TX_TRIG_6,
-//! \b I2C_FIFO_CFG_TX_TRIG_7, \b I2C_FIFO_CFG_TX_TRIG_8
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear transmit configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) &= 0xffff0000;
-
-    //
-    // Store new transmit configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Flushes the transmit (TX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function flushes the I2C transmit FIFO.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CTxFIFOFlush(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Flush the TX FIFO.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= I2C_FIFOCTL_TXFLUSH;
-}
-
-//*****************************************************************************
-//
-//! Configures the I2C receive (RX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui32Config is the configuration of the FIFO using specified macros.
-//!
-//! This configures the I2C peripheral's receive FIFO.  The receive FIFO can be
-//! used by the master or slave, but not both.  The following macros are used
-//! to configure the RX FIFO behavior for master or slave, with or without DMA:
-//!
-//! \b I2C_FIFO_CFG_RX_MASTER, \b I2C_FIFO_CFG_RX_SLAVE,
-//! \b I2C_FIFO_CFG_RX_MASTER_DMA, \b I2C_FIFO_CFG_RX_SLAVE_DMA
-//!
-//! To select the trigger level, one of the following macros should be used:
-//!
-//! \b I2C_FIFO_CFG_RX_TRIG_1, \b I2C_FIFO_CFG_RX_TRIG_2,
-//! \b I2C_FIFO_CFG_RX_TRIG_3, \b I2C_FIFO_CFG_RX_TRIG_4,
-//! \b I2C_FIFO_CFG_RX_TRIG_5, \b I2C_FIFO_CFG_RX_TRIG_6,
-//! \b I2C_FIFO_CFG_RX_TRIG_7, \b I2C_FIFO_CFG_RX_TRIG_8
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear receive configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) &= 0x0000ffff;
-
-    //
-    // Store new receive configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Flushes the receive (RX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function flushes the I2C receive FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CRxFIFOFlush(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Flush the TX FIFO.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= I2C_FIFOCTL_RXFLUSH;
-}
-
-//*****************************************************************************
-//
-//! Gets the current FIFO status.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function retrieves the status for both the transmit (TX) and receive
-//! (RX) FIFOs.  The trigger level for the transmit FIFO is set using
-//! I2CTxFIFOConfigSet() and for the receive FIFO using I2CTxFIFOConfigSet().
-//!
-//! \return Returns the FIFO status, enumerated as a bit field containing
-//! \b I2C_FIFO_RX_BELOW_TRIG_LEVEL, \b I2C_FIFO_RX_FULL, \b I2C_FIFO_RX_EMPTY,
-//! \b I2C_FIFO_TX_BELOW_TRIG_LEVEL, \b I2C_FIFO_TX_FULL, and
-//! \b I2C_FIFO_TX_EMPTY.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFOStatus(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the contents of the FIFO status register.
-    //
-    return(HWREG(ui32Base + I2C_O_FIFOSTATUS));
-}
-
-//*****************************************************************************
-//
-//! Writes a data byte to the I2C transmit FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui8Data is the data to be placed into the transmit FIFO.
-//!
-//! This function adds a byte of data to the I2C transmit FIFO.  If there is
-//! no space available in the FIFO,  this function waits for space to become
-//! available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Wait until there is space.
-    //
-    while(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_TXFF)
-    {
-    }
-
-    //
-    // Place data into the FIFO.
-    //
-    HWREG(ui32Base + I2C_O_FIFODATA) = ui8Data;
-}
-
-//*****************************************************************************
-//
-//! Writes a data byte to the I2C transmit FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui8Data is the data to be placed into the transmit FIFO.
-//!
-//! This function adds a byte of data to the I2C transmit FIFO.  If there is
-//! no space available in the FIFO, this function returns a zero.
-//!
-//! \return The number of elements added to the I2C transmit FIFO.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFODataPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // If FIFO is full, return zero.
-    //
-    if(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_TXFF)
-    {
-        return(0);
-    }
-    else
-    {
-        HWREG(ui32Base + I2C_O_FIFODATA) = ui8Data;
-        return(1);
-    }
-}
-
-//*****************************************************************************
-//
-//! Reads a byte from the I2C receive FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function reads a byte of data from I2C receive FIFO and places it in
-//! the location specified by the \e pui8Data parameter.  If there is no data
-//! available, this function waits until data is received before returning.
-//!
-//! \return The data byte.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFODataGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Wait until there is data to read.
-    //
-    while(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_RXFE)
-    {
-    }
-
-    //
-    // Read a byte.
-    //
-    return(HWREG(ui32Base + I2C_O_FIFODATA));
-}
-
-//*****************************************************************************
-//
-//! Reads a byte from the I2C receive FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param pui8Data is a pointer where the read data is stored.
-//!
-//! This function reads a byte of data from I2C receive FIFO and places it in
-//! the location specified by the \e pui8Data parameter.  If there is no data
-//! available, this functions returns 0.
-//!
-//! \return The number of elements read from the I2C receive FIFO.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFODataGetNonBlocking(uint32_t ui32Base, uint8_t *pui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // If nothing in the FIFO, return zero.
-    //
-    if(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_RXFE)
-    {
-        return(0);
-    }
-    else
-    {
-        *pui8Data = HWREG(ui32Base + I2C_O_FIFODATA);
-        return(1);
-    }
-}
-
-//*****************************************************************************
-//
-//! Set the burst length for a I2C master FIFO operation.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui8Length is the length of the burst transfer.
-//!
-//! This function configures the burst length for a I2C Master FIFO operation.
-//! The burst field is limited to 8 bits or 256 bytes.  The burst length
-//! applies to a single I2CMCS BURST operation meaning that it specifies the
-//! burst length for only the current operation (can be TX or RX).  Each burst
-//! operation must configure the burst length prior to writing the BURST bit
-//! in the I2CMCS using I2CMasterControl().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterBurstLengthSet(uint32_t ui32Base, uint8_t ui8Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base) && (ui8Length < 255));
-
-    //
-    // Set the burst length.
-    //
-    HWREG(ui32Base + I2C_O_MBLEN) = ui8Length;
-}
-
-//*****************************************************************************
-//
-//! Returns the current value of the burst transfer counter.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns the current value of the burst transfer counter that
-//! is used by the FIFO mechanism.  Software can use this value to determine
-//! how many bytes remain in a transfer, or where in the transfer the burst
-//! operation was if an error has occurred.
-//!
-//! \return None.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterBurstCountGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Get burst count.
-    //
-    return(HWREG(ui32Base + I2C_O_MBCNT));
-}
-
-//*****************************************************************************
-//
-//! Configures the I2C Master glitch filter.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32Config is the glitch filter configuration.
-//!
-//! This function configures the I2C Master glitch filter.  The value passed in
-//! to \e ui32Config determines the sampling range of the glitch filter, which
-//! is configurable between 1 and 32 system clock cycles.  The default
-//! configuration of the glitch filter is 0 system clock cycles, which means
-//! that it's disabled.
-//!
-//! The \e ui32Config field should be any of the following values:
-//!
-//! - \b I2C_MASTER_GLITCH_FILTER_DISABLED
-//! - \b I2C_MASTER_GLITCH_FILTER_1
-//! - \b I2C_MASTER_GLITCH_FILTER_2
-//! - \b I2C_MASTER_GLITCH_FILTER_3
-//! - \b I2C_MASTER_GLITCH_FILTER_4
-//! - \b I2C_MASTER_GLITCH_FILTER_8
-//! - \b I2C_MASTER_GLITCH_FILTER_16
-//! - \b I2C_MASTER_GLITCH_FILTER_32
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterGlitchFilterConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Configure the glitch filter field of MTPR.
-    //
-    HWREG(ui32Base + I2C_O_MTPR) |= ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Enables FIFO usage for the I2C Slave module.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32Config is the desired FIFO configuration of the I2C Slave.
-//!
-//! This function configures the I2C Slave module to use the FIFO(s).  This
-//! function should be used in combination with I2CTxFIFOConfigSet() and/or
-//! I2CRxFIFOConfigSet(), which configure the FIFO trigger level and tell
-//! the FIFO hardware whether to interact with the I2C Master or Slave.  The
-//! application appropriate combination of \b I2C_SLAVE_TX_FIFO_ENABLE and
-//! \b I2C_SLAVE_RX_FIFO_ENABLE should be passed in to the \e ui32Config
-//! field.
-//!
-//! The Slave I2CSCSR register is write-only, so any call to I2CSlaveEnable(),
-//! I2CSlaveDisable or I2CSlaveFIFOEnable() overwrites the slave configuration.
-//! Therefore, application software should call I2CSlaveEnable() followed by
-//! I2CSlaveFIFOEnable() with the desired FIFO configuration.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the FIFOs for the slave.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = ui32Config | I2C_SCSR_DA;
-}
-
-//*****************************************************************************
-//
-//! Disable FIFO usage for the I2C Slave module.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function disables the FIFOs for the I2C Slave.  After calling this
-//! this function, the FIFOs are disabled, but the Slave remains active.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveFIFODisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable slave FIFOs.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = I2C_SCSR_DA;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/i2c.h b/ports/cc3200/hal/i2c.h
deleted file mode 100644
index d966dbf56a..0000000000
--- a/ports/cc3200/hal/i2c.h
+++ /dev/null
@@ -1,360 +0,0 @@
-//*****************************************************************************
-//
-//  i2c.h
-//
-//  Prototypes for the I2C Driver.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_I2C_H__
-#define __DRIVERLIB_I2C_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Defines for the API.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// Interrupt defines.
-//
-//*****************************************************************************
-#define I2C_INT_MASTER          0x00000001
-#define I2C_INT_SLAVE           0x00000002
-
-//*****************************************************************************
-//
-// I2C Master commands.
-//
-//*****************************************************************************
-#define I2C_MASTER_CMD_SINGLE_SEND                                            \
-                                0x00000007
-#define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \
-                                0x00000007
-#define I2C_MASTER_CMD_BURST_SEND_START                                       \
-                                0x00000003
-#define I2C_MASTER_CMD_BURST_SEND_CONT                                        \
-                                0x00000001
-#define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \
-                                0x00000005
-#define I2C_MASTER_CMD_BURST_SEND_STOP                                        \
-                                0x00000004
-#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \
-                                0x00000004
-#define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \
-                                0x0000000b
-#define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \
-                                0x00000009
-#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \
-                                0x00000005
-#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \
-                                0x00000004
-#define I2C_MASTER_CMD_QUICK_COMMAND                                          \
-                                0x00000027
-#define I2C_MASTER_CMD_HS_MASTER_CODE_SEND                                    \
-                                0x00000013
-#define I2C_MASTER_CMD_FIFO_SINGLE_SEND                                       \
-                                0x00000046
-#define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE                                    \
-                                0x00000046
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_START                                  \
-                                0x00000042
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT                                   \
-                                0x00000040
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH                                 \
-                                0x00000044
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP                             \
-                                0x00000004
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START                               \
-                                0x0000004a
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT                                \
-                                0x00000048
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH                              \
-                                0x00000044
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP                          \
-                                0x00000004
-
-//*****************************************************************************
-//
-// I2C Master glitch filter configuration.
-//
-//*****************************************************************************
-#define I2C_MASTER_GLITCH_FILTER_DISABLED                                     \
-                                0
-#define I2C_MASTER_GLITCH_FILTER_1                                            \
-                                0x00010000
-#define I2C_MASTER_GLITCH_FILTER_2                                            \
-                                0x00020000
-#define I2C_MASTER_GLITCH_FILTER_3                                            \
-                                0x00030000
-#define I2C_MASTER_GLITCH_FILTER_4                                            \
-                                0x00040000
-#define I2C_MASTER_GLITCH_FILTER_8                                            \
-                                0x00050000
-#define I2C_MASTER_GLITCH_FILTER_16                                           \
-                                0x00060000
-#define I2C_MASTER_GLITCH_FILTER_32                                           \
-                                0x00070000
-
-//*****************************************************************************
-//
-// I2C Master error status.
-//
-//*****************************************************************************
-#define I2C_MASTER_ERR_NONE     0
-#define I2C_MASTER_ERR_ADDR_ACK 0x00000004
-#define I2C_MASTER_ERR_DATA_ACK 0x00000008
-#define I2C_MASTER_ERR_ARB_LOST 0x00000010
-#define I2C_MASTER_ERR_CLK_TOUT 0x00000080
-
-//*****************************************************************************
-//
-// I2C Slave action requests
-//
-//*****************************************************************************
-#define I2C_SLAVE_ACT_NONE      0
-#define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data
-#define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data
-#define I2C_SLAVE_ACT_RREQ_FBR  0x00000005  // Master has sent first byte
-#define I2C_SLAVE_ACT_OWN2SEL   0x00000008  // Master requested secondary slave
-#define I2C_SLAVE_ACT_QCMD      0x00000010  // Master has sent a Quick Command
-#define I2C_SLAVE_ACT_QCMD_DATA 0x00000020  // Master Quick Command value
-
-//*****************************************************************************
-//
-// Miscellaneous I2C driver definitions.
-//
-//*****************************************************************************
-#define I2C_MASTER_MAX_RETRIES  1000        // Number of retries
-
-//*****************************************************************************
-//
-// I2C Master interrupts.
-//
-//*****************************************************************************
-#define I2C_MASTER_INT_RX_FIFO_FULL                                           \
-                                0x00000800  // RX FIFO Full Interrupt
-#define I2C_MASTER_INT_TX_FIFO_EMPTY                                          \
-                                0x00000400  // TX FIFO Empty Interrupt
-#define I2C_MASTER_INT_RX_FIFO_REQ                                            \
-                                0x00000200  // RX FIFO Request Interrupt
-#define I2C_MASTER_INT_TX_FIFO_REQ                                            \
-                                0x00000100  // TX FIFO Request Interrupt
-#define I2C_MASTER_INT_ARB_LOST                                               \
-                                0x00000080  // Arb Lost Interrupt
-#define I2C_MASTER_INT_STOP     0x00000040  // Stop Condition Interrupt
-#define I2C_MASTER_INT_START    0x00000020  // Start Condition Interrupt
-#define I2C_MASTER_INT_NACK     0x00000010  // Addr/Data NACK Interrupt
-#define I2C_MASTER_INT_TX_DMA_DONE                                            \
-                                0x00000008  // TX DMA Complete Interrupt
-#define I2C_MASTER_INT_RX_DMA_DONE                                            \
-                                0x00000004  // RX DMA Complete Interrupt
-#define I2C_MASTER_INT_TIMEOUT  0x00000002  // Clock Timeout Interrupt
-#define I2C_MASTER_INT_DATA     0x00000001  // Data Interrupt
-
-//*****************************************************************************
-//
-// I2C Slave interrupts.
-//
-//*****************************************************************************
-#define I2C_SLAVE_INT_RX_FIFO_FULL                                            \
-                                0x00000100  // RX FIFO Full Interrupt
-#define I2C_SLAVE_INT_TX_FIFO_EMPTY                                           \
-                                0x00000080  // TX FIFO Empty Interrupt
-#define I2C_SLAVE_INT_RX_FIFO_REQ                                             \
-                                0x00000040  // RX FIFO Request Interrupt
-#define I2C_SLAVE_INT_TX_FIFO_REQ                                             \
-                                0x00000020  // TX FIFO Request Interrupt
-#define I2C_SLAVE_INT_TX_DMA_DONE                                             \
-                                0x00000010  // TX DMA Complete Interrupt
-#define I2C_SLAVE_INT_RX_DMA_DONE                                             \
-                                0x00000008  // RX DMA Complete Interrupt
-#define I2C_SLAVE_INT_STOP      0x00000004  // Stop Condition Interrupt
-#define I2C_SLAVE_INT_START     0x00000002  // Start Condition Interrupt
-#define I2C_SLAVE_INT_DATA      0x00000001  // Data Interrupt
-
-//*****************************************************************************
-//
-// I2C Slave FIFO configuration macros.
-//
-//*****************************************************************************
-#define I2C_SLAVE_TX_FIFO_ENABLE                                              \
-                                0x00000002
-#define I2C_SLAVE_RX_FIFO_ENABLE                                              \
-                                0x00000004
-
-//*****************************************************************************
-//
-// I2C FIFO configuration macros.
-//
-//*****************************************************************************
-#define I2C_FIFO_CFG_TX_MASTER  0x00000000
-#define I2C_FIFO_CFG_TX_SLAVE   0x00008000
-#define I2C_FIFO_CFG_RX_MASTER  0x00000000
-#define I2C_FIFO_CFG_RX_SLAVE   0x80000000
-#define I2C_FIFO_CFG_TX_MASTER_DMA                                            \
-                                0x00002000
-#define I2C_FIFO_CFG_TX_SLAVE_DMA                                             \
-                                0x0000a000
-#define I2C_FIFO_CFG_RX_MASTER_DMA                                            \
-                                0x20000000
-#define I2C_FIFO_CFG_RX_SLAVE_DMA                                             \
-                                0xa0000000
-#define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
-#define I2C_FIFO_CFG_TX_TRIG_1  0x00000001
-#define I2C_FIFO_CFG_TX_TRIG_2  0x00000002
-#define I2C_FIFO_CFG_TX_TRIG_3  0x00000003
-#define I2C_FIFO_CFG_TX_TRIG_4  0x00000004
-#define I2C_FIFO_CFG_TX_TRIG_5  0x00000005
-#define I2C_FIFO_CFG_TX_TRIG_6  0x00000006
-#define I2C_FIFO_CFG_TX_TRIG_7  0x00000007
-#define I2C_FIFO_CFG_TX_TRIG_8  0x00000008
-#define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
-#define I2C_FIFO_CFG_RX_TRIG_1  0x00010000
-#define I2C_FIFO_CFG_RX_TRIG_2  0x00020000
-#define I2C_FIFO_CFG_RX_TRIG_3  0x00030000
-#define I2C_FIFO_CFG_RX_TRIG_4  0x00040000
-#define I2C_FIFO_CFG_RX_TRIG_5  0x00050000
-#define I2C_FIFO_CFG_RX_TRIG_6  0x00060000
-#define I2C_FIFO_CFG_RX_TRIG_7  0x00070000
-#define I2C_FIFO_CFG_RX_TRIG_8  0x00080000
-
-//*****************************************************************************
-//
-// I2C FIFO status.
-//
-//*****************************************************************************
-#define I2C_FIFO_RX_BELOW_TRIG_LEVEL                                          \
-                                0x00040000
-#define I2C_FIFO_RX_FULL        0x00020000
-#define I2C_FIFO_RX_EMPTY       0x00010000
-#define I2C_FIFO_TX_BELOW_TRIG_LEVEL                                          \
-                                0x00000004
-#define I2C_FIFO_TX_FULL        0x00000002
-#define I2C_FIFO_TX_EMPTY       0x00000001
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void I2CIntRegister(uint32_t ui32Base, void(pfnHandler)(void));
-extern void I2CIntUnregister(uint32_t ui32Base);
-extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void I2CTxFIFOFlush(uint32_t ui32Base);
-extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void I2CRxFIFOFlush(uint32_t ui32Base);
-extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
-extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
-extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
-                                          uint8_t ui8Data);
-extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
-extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
-                                          uint8_t *pui8Data);
-extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
-                                    uint8_t ui8Length);
-extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
-extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
-                                           uint32_t ui32Config);
-extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
-extern void I2CSlaveFIFODisable(uint32_t ui32Base);
-extern bool I2CMasterBusBusy(uint32_t ui32Base);
-extern bool I2CMasterBusy(uint32_t ui32Base);
-extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
-extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
-extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
-extern void I2CMasterDisable(uint32_t ui32Base);
-extern void I2CMasterEnable(uint32_t ui32Base);
-extern uint32_t I2CMasterErr(uint32_t ui32Base);
-extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq);
-extern void I2CMasterIntClear(uint32_t ui32Base);
-extern void I2CMasterIntDisable(uint32_t ui32Base);
-extern void I2CMasterIntEnable(uint32_t ui32Base);
-extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
-extern void I2CMasterIntEnableEx(uint32_t ui32Base,
-                                 uint32_t ui32IntFlags);
-extern void I2CMasterIntDisableEx(uint32_t ui32Base,
-                                  uint32_t ui32IntFlags);
-extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
-                                       bool bMasked);
-extern void I2CMasterIntClearEx(uint32_t ui32Base,
-                                uint32_t ui32IntFlags);
-extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
-extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
-extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
-extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
-extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
-                                  uint8_t ui8SlaveAddr,
-                                  bool bReceive);
-extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
-extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
-extern void I2CSlaveDisable(uint32_t ui32Base);
-extern void I2CSlaveEnable(uint32_t ui32Base);
-extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
-extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
-                                 uint8_t ui8SlaveAddr);
-extern void I2CSlaveIntClear(uint32_t ui32Base);
-extern void I2CSlaveIntDisable(uint32_t ui32Base);
-extern void I2CSlaveIntEnable(uint32_t ui32Base);
-extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
-                                 uint32_t ui32IntFlags);
-extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
-extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
-                                      bool bMasked);
-extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __DRIVERLIB_I2C_H__
diff --git a/ports/cc3200/hal/i2s.c b/ports/cc3200/hal/i2s.c
deleted file mode 100644
index dbbb936d77..0000000000
--- a/ports/cc3200/hal/i2s.c
+++ /dev/null
@@ -1,1012 +0,0 @@
-//*****************************************************************************
-//
-//  i2s.c
-//
-//  Driver for the I2S interface.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup I2S_api
-//! @{
-//
-//*****************************************************************************
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_mcasp.h"
-#include "inc/hw_apps_config.h"
-#include "interrupt.h"
-#include "i2s.h"
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define MCASP_GBL_RCLK		0x00000001
-#define MCASP_GBL_RHCLK		0x00000002
-#define MCASP_GBL_RSER		0x00000004
-#define MCASP_GBL_RSM		0x00000008
-#define MCASP_GBL_RFSYNC	0x00000010
-#define MCASP_GBL_XCLK		0x00000100
-#define MCASP_GBL_XHCLK		0x00000200
-#define MCASP_GBL_XSER		0x00000400
-#define MCASP_GBL_XSM		0x00000800
-#define MCASP_GBL_XFSYNC	0x00001000
-
-
-//*****************************************************************************
-//
-//! \internal
-//! Releases the specifed submodule out of reset.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulFlag is one of the valid sub module.
-//!
-//! This function Releases the specifed submodule out of reset.
-//!
-//! \return None.
-//
-//*****************************************************************************
-static void I2SGBLEnable(unsigned long ulBase, unsigned long ulFlag)
-{
-  unsigned long ulReg;
-
-  //
-  // Read global control register
-  //
-  ulReg = HWREG(ulBase + MCASP_O_GBLCTL);
-
-  //
-  // Remove the sub modules reset as specified by ulFlag parameter
-  //
-  ulReg |= ulFlag;
-
-  //
-  // Write the configuration
-  //
-  HWREG(ulBase + MCASP_O_GBLCTL) = ulReg;
-
-  //
-  // Wait for write completeion
-  //
-  while(HWREG(ulBase + MCASP_O_GBLCTL) != ulReg)
-  {
-
-  }
-
-}
-
-//*****************************************************************************
-//
-//! Enables transmit and/or receive.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulMode is one of the valid modes.
-//!
-//! This function enables the I2S module in specified mode. The parameter
-//! \e ulMode should be one of the following
-//!
-//! -\b I2S_MODE_TX_ONLY
-//! -\b I2S_MODE_TX_RX_SYNC
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SEnable(unsigned long ulBase, unsigned long ulMode)
-{
-  //
-  // FSYNC and Bit clock are output only in master mode
-  //
-  if( HWREG(ulBase + MCASP_O_ACLKXCTL) & 0x20)
-  {
-    //
-    // Set FSYNC anc BitClk as output
-    //
-    HWREG(ulBase + MCASP_O_PDIR) |= 0x14000000;
-  }
-
-
-  if(ulMode & 0x2)
-  {
-    //
-    // Remove Rx HCLK reset
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RHCLK);
-
-    //
-    // Remove Rx XCLK reset
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RCLK);
-
-    //
-    // Enable Rx SERDES(s)
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RSER);
-
-    //
-    // Enable Rx state machine
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RSM);
-
-    //
-    // Enable FSync generator
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RFSYNC);
-  }
-
-
-  //
-  // Remove Tx  HCLK reset
-  //
-  I2SGBLEnable(ulBase, MCASP_GBL_XHCLK);
-
-  //
-  // Remove Tx XCLK reset
-  //
-  I2SGBLEnable(ulBase, MCASP_GBL_XCLK);
-
-
-  if(ulMode & 0x1)
-  {
-    //
-    // Enable Tx SERDES(s)
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_XSER);
-
-    //
-    // Enable Tx state machine
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_XSM);
-  }
-
-   //
-   // Enable FSync generator
-   //
-   I2SGBLEnable(ulBase, MCASP_GBL_XFSYNC);
-}
-
-//*****************************************************************************
-//
-//! Disables transmit and/or receive.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function disables transmit and/or receive from I2S module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SDisable(unsigned long ulBase)
-{
-  //
-  // Reset all sub modules
-  //
-  HWREG(ulBase + MCASP_O_GBLCTL) = 0;
-
-  //
-  // Wait for write to complete
-  //
-  while( HWREG(ulBase + MCASP_O_GBLCTL) != 0)
-  {
-
-  }
-}
-
-//*****************************************************************************
-//
-//! Waits to send data over the specified data line
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param ulData is the data to be transmitted.
-//!
-//! This function sends the \e ucData to the transmit register for the
-//! specified data line. If there is no space available, this
-//! function waits until there is space available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long ulData)
-{
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Wait for free space in fifo
-  //
-  while(!( HWREG(ulBase + MCASP_O_TXSTAT) & MCASP_TXSTAT_XDATA))
-  {
-
-  }
-
-  //
-  // Write Data into the FIFO
-  //
-  HWREG(ulBase + MCASP_O_TXBUF0 + ulDataLine) = ulData;
-}
-
-//*****************************************************************************
-//
-//! Sends data over the specified data line
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param ulData is the data to be transmitted.
-//!
-//! This function writes the \e ucData to the transmit register for
-//! the specified data line. This function does not block, so if there is no
-//! space available, then \b -1 is returned, and the application must retry the
-//! function later.
-//!
-//! \return Returns 0 on success, -1 otherwise.
-//
-//*****************************************************************************
-long I2SDataPutNonBlocking(unsigned long ulBase,  unsigned long ulDataLine,
-                           unsigned long ulData)
-{
-
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Send Data if fifo has free space
-  //
-  if( HWREG(ulBase + MCASP_O_TXSTAT) & MCASP_TXSTAT_XDATA)
-  {
-    //
-    // Write data into the FIFO
-    //
-    HWREG(ulBase + MCASP_O_TXBUF0 + ulDataLine) = ulData;
-    return 0;
-  }
-
-  //
-  // FIFO is full
-  //
-  return(-1);
-}
-
-//*****************************************************************************
-//
-//! Waits for data from the specified data line.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param pulData is pointer to receive data variable.
-//!
-//! This function gets data from the receive register for the specified
-//! data line. If there are no data available, this function waits until a
-//! receive before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long *pulData)
-{
-
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Wait for atleat on word in FIFO
-  //
-  while(!(HWREG(ulBase + MCASP_O_RXSTAT) & MCASP_RXSTAT_RDATA))
-  {
-
-  }
-
-  //
-  // Read the Data
-  //
-  *pulData = HWREG(ulBase + MCASP_O_RXBUF0 + ulDataLine);
-}
-
-
-//*****************************************************************************
-//
-//! Receives data from the specified data line.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param pulData is pointer to receive data variable.
-//!
-//! This function gets data from the receive register for the specified
-//! data line.
-//!
-//!
-//! \return Returns 0 on success, -1 otherwise.
-//
-//*****************************************************************************
-long I2SDataGetNonBlocking(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long *pulData)
-{
-
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Check if data is available in FIFO
-  //
-  if(HWREG(ulBase + MCASP_O_RXSTAT) & MCASP_RXSTAT_RDATA)
-  {
-    //
-    // Read the Data
-    //
-    *pulData = HWREG(ulBase + MCASP_O_RXBUF0 + ulDataLine);
-    return 0;
-  }
-
-  //
-  // FIFO is empty
-  //
-  return -1;
-}
-
-
-//*****************************************************************************
-//
-//! Sets the configuration of the I2S module.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulI2SClk is the rate of the clock supplied to the I2S module.
-//! \param ulBitClk is the desired bit rate.
-//! \param ulConfig is the data format.
-//!
-//! This function configures the I2S for operation in the specified data
-//! format.  The bit rate is provided in the \e ulBitClk parameter and the data
-//! format in the \e ulConfig parameter.
-//!
-//! The \e ulConfig parameter is the logical OR of three values: the slot size
-//! the data read/write port select, Master or Slave mode
-//!
-//! Follwoing selects the Master-Slave mode
-//! -\b I2S_MODE_MASTER
-//! -\b I2S_MODE_SLAVE
-//!
-//! Following selects the slot size:
-//! -\b I2S_SLOT_SIZE_24
-//! -\b I2S_SLOT_SIZE_16
-//!
-//! Following selects the data read/write port:
-//! -\b I2S_PORT_DMA
-//! -\b I2S_PORT_CPU
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
-                               unsigned long ulBitClk, unsigned long ulConfig)
-{
-  unsigned long ulHClkDiv;
-  unsigned long ulClkDiv;
-  unsigned long ulSlotSize;
-  unsigned long ulBitMask;
-
-  //
-  // Calculate clock dividers
-  //
-  ulHClkDiv = ((ulI2SClk/ulBitClk)-1);
-  ulClkDiv  = 0;
-
-  //
-  // Check if HCLK divider is overflowing
-  //
-  if(ulHClkDiv > 0xFFF)
-  {
-    ulHClkDiv = 0xFFF;
-
-    //
-    // Calculate clock divider
-    //
-    ulClkDiv = ((ulI2SClk/(ulBitClk * (ulHClkDiv + 1))) & 0x1F);
-  }
-
-  //
-  //
-  //
-  ulClkDiv = ((ulConfig & I2S_MODE_SLAVE )?0x80:0xA0|ulClkDiv);
-
-  HWREG(ulBase + MCASP_O_ACLKXCTL) = ulClkDiv;
-
-  HWREG(ulBase + MCASP_O_AHCLKXCTL) = (0x8000|ulHClkDiv);
-
-  //
-  // Write the Tx format register
-  //
-  HWREG(ulBase + MCASP_O_TXFMT) = (0x18000 | (ulConfig & 0x7FFF));
-
-  //
-  // Write the Rx format register
-  //
-  HWREG(ulBase + MCASP_O_RXFMT) = (0x18000 | ((ulConfig >> 16) &0x7FFF));
-
-  //
-  // Check if in master mode
-  //
-  if( ulConfig & I2S_MODE_SLAVE)
-  {
-    //
-    // Configure Tx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_TXFMCTL) = 0x111;
-
-    //
-    // Configure Rx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_RXFMCTL) = 0x111;
-  }
-  else
-  {
-    //
-    // Configure Tx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_TXFMCTL) = 0x113;
-
-    //
-    // Configure Rx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_RXFMCTL) = 0x113;
-  }
-
-  //
-  // Compute Slot Size
-  //
-  ulSlotSize = ((((ulConfig & 0xFF) >> 4) + 1) * 2);
-
-  //
-  // Creat the bit mask
-  //
-  ulBitMask = (0xFFFFFFFF >> (32 - ulSlotSize));
-
-  //
-  // Set Tx bit valid mask
-  //
-  HWREG(ulBase + MCASP_O_TXMASK) = ulBitMask;
-
-  //
-  // Set Rx bit valid mask
-  //
-  HWREG(ulBase + MCASP_O_RXMASK) = ulBitMask;
-
-  //
-  // Set Tx slot valid mask
-  //
-  HWREG(ulBase + MCASP_O_TXTDM) = 0x3;
-
-  //
-  // Set Rx slot valid mask
-  //
-  HWREG(ulBase + MCASP_O_RXTDM) = 0x3;
-}
-
-//*****************************************************************************
-//
-//! Configure and enable transmit FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulTxLevel is the transmit FIFO DMA request level.
-//! \param ulWordsPerTransfer is the nuber of words transferred from the FIFO.
-//!
-//! This function configures and enable I2S transmit FIFO.
-//!
-//! The parameter \e ulTxLevel sets the level at which transmit DMA requests
-//! are generated. This should be non-zero integer multiple of number of
-//! serializers enabled as transmitters
-//!
-//! The parameter \e ulWordsPerTransfer sets the number of words that are
-//! transferred from the transmit FIFO to the data line(s). This value must
-//! equal the number of serializers used as transmitters.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
-                     unsigned long ulWordsPerTransfer)
-{
-  //
-  // Set transmit FIFO configuration and
-  // enable it
-  //
-  HWREG(ulBase + MCASP_0_WFIFOCTL) = ((1 <<16) | ((ulTxLevel & 0xFF) << 8)
-					| (ulWordsPerTransfer & 0x1F));
-
-}
-
-//*****************************************************************************
-//
-//! Disables transmit FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function disables the I2S transmit FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2STxFIFODisable(unsigned long ulBase)
-{
-  //
-  // Disable transmit FIFO.
-  //
-  HWREG(ulBase + MCASP_0_WFIFOCTL) = 0;
-}
-
-//*****************************************************************************
-//
-//! Configure and enable receive FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulRxLevel is the receive FIFO DMA request level.
-//! \param ulWordsPerTransfer is the nuber of words transferred from the FIFO.
-//!
-//! This function configures and enable I2S receive FIFO.
-//!
-//! The parameter \e ulRxLevel sets the level at which receive DMA requests
-//! are generated. This should be non-zero integer multiple of number of
-//! serializers enabled as receivers.
-//!
-//! The parameter \e ulWordsPerTransfer sets the number of words that are
-//! transferred to the receive FIFO from the data line(s). This value must
-//! equal the number of serializers used as receivers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
-                     unsigned long ulWordsPerTransfer)
-{
-  //
-  // Set FIFO configuration
-  //
-  HWREG(ulBase + MCASP_0_RFIFOCTL) = ( (1 <<16) | ((ulRxLevel & 0xFF) << 8)
-					| (ulWordsPerTransfer & 0x1F));
-
-}
-
-//*****************************************************************************
-//
-//! Disables receive FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function disables the I2S receive FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SRxFIFODisable(unsigned long ulBase)
-{
-  //
-  // Disable receive FIFO.
-  //
-  HWREG(ulBase + MCASP_0_RFIFOCTL) = 0;
-}
-
-//*****************************************************************************
-//
-//! Get the transmit FIFO status.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function gets the number of 32-bit words currently in the transmit
-//! FIFO.
-//!
-//! \return Returns transmit FIFO status.
-//
-//*****************************************************************************
-unsigned long I2STxFIFOStatusGet(unsigned long ulBase)
-{
-  //
-  // Return transmit FIFO level
-  //
-  return HWREG(ulBase + MCASP_0_WFIFOSTS);
-}
-
-//*****************************************************************************
-//
-//! Get the receive FIFO status.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function gets the number of 32-bit words currently in the receive
-//! FIFO.
-//!
-//! \return Returns receive FIFO status.
-//
-//*****************************************************************************
-unsigned long I2SRxFIFOStatusGet(unsigned long ulBase)
-{
-  //
-  // Return receive FIFO level
-  //
-  return HWREG(ulBase + MCASP_0_RFIFOSTS);
-}
-
-//*****************************************************************************
-//
-//! Configure the serializer in specified mode.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is the data line (serilizer) to be configured.
-//! \param ulSerMode is the required serializer mode.
-//! \param ulInActState sets the inactive state of the data line.
-//!
-//! This function configure and enable the serializer associated with the given
-//! data line in specified mode.
-//!
-//! The paramenter \e ulDataLine selects to data line to be configured and
-//! can be one of the following:
-//! -\b I2S_DATA_LINE_0
-//! -\b I2S_DATA_LINE_1
-//!
-//! The parameter \e ulSerMode can be one of the following:
-//! -\b I2S_SER_MODE_TX
-//! -\b I2S_SER_MODE_RX
-//! -\b I2S_SER_MODE_DISABLE
-//!
-//! The parameter \e ulInActState can be one of the following
-//! -\b I2S_INACT_TRI_STATE
-//! -\b I2S_INACT_LOW_LEVEL
-//! -\b I2S_INACT_LOW_HIGH
-//!
-//! \return Returns receive FIFO status.
-//
-//*****************************************************************************
-void I2SSerializerConfig(unsigned long ulBase, unsigned long ulDataLine,
-                         unsigned long ulSerMode, unsigned long ulInActState)
-{
-  if( ulSerMode == I2S_SER_MODE_TX)
-  {
-    //
-    // Set the data line in output mode
-    //
-    HWREG(ulBase + MCASP_O_PDIR) |= ulDataLine;
-  }
-  else
-  {
-    //
-    // Set the data line in input mode
-    //
-    HWREG(ulBase + MCASP_O_PDIR) &= ~ulDataLine;
-  }
-
-  //
-  // Set the serializer configuration.
-  //
-  HWREG(ulBase + MCASP_O_XRSRCTL0 + ((ulDataLine-1) << 2))
-                                            = (ulSerMode | ulInActState);
-}
-
-//*****************************************************************************
-//
-//! Enables individual I2S interrupt sources.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated I2S interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! -\b I2S_INT_XUNDRN
-//! -\b I2S_INT_XSYNCERR
-//! -\b I2S_INT_XLAST
-//! -\b I2S_INT_XDATA
-//! -\b I2S_INT_XSTAFRM
-//! -\b I2S_INT_XDMA
-//! -\b I2S_INT_ROVRN
-//! -\b I2S_INT_RSYNCERR
-//! -\b I2S_INT_RLAST
-//! -\b I2S_INT_RDATA
-//! -\b I2S_INT_RSTAFRM
-//! -\b I2S_INT_RDMA
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
-{
-
-  //
-  // Enable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR )
-     |= ((ulIntFlags &0xC0000000) >> 20);
-
-  //
-  // Enable specific Tx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLX) |= (ulIntFlags & 0xFF);
-
-  //
-  // Enable specific Rx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLR) |= ((ulIntFlags >> 16) & 0xFF);
-}
-
-//*****************************************************************************
-//
-//! Disables individual I2S interrupt sources.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
-//!
-//! This function disables the indicated I2S interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to I2SIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
-{
-  //
-  // Disable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET)
-     |= ((ulIntFlags &0xC0000000) >> 20);
-
-  //
-  // Disable specific Tx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLX) &= ~(ulIntFlags & 0xFF);
-
-  //
-  // Disable specific Rx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLR) &= ~((ulIntFlags >> 16) & 0xFF);
-}
-
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function returns the raw interrupt status for I2S enumerated
-//! as a bit field of values:
-//! -\b I2S_STS_XERR
-//! -\b I2S_STS_XDMAERR
-//! -\b I2S_STS_XSTAFRM
-//! -\b I2S_STS_XDATA
-//! -\b I2S_STS_XLAST
-//! -\b I2S_STS_XSYNCERR
-//! -\b I2S_STS_XUNDRN
-//! -\b I2S_STS_XDMA
-//! -\b I2S_STS_RERR
-//! -\b I2S_STS_RDMAERR
-//! -\b I2S_STS_RSTAFRM
-//! -\b I2S_STS_RDATA
-//! -\b I2S_STS_RLAST
-//! -\b I2S_STS_RSYNCERR
-//! -\b I2S_STS_ROVERN
-//! -\b I2S_STS_RDMA
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described above.
-//
-//*****************************************************************************
-unsigned long I2SIntStatus(unsigned long ulBase)
-{
-  unsigned long ulStatus;
-
-  //
-  // Get DMA interrupt status
-  //
-  ulStatus =
-    HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW) << 20;
-
-  ulStatus &= 0xC0000000;
-
-  //
-  // Read Tx Interrupt status
-  //
-  ulStatus |= HWREG(ulBase + MCASP_O_TXSTAT);
-
-  //
-  // Read Rx Interrupt status
-  //
-  ulStatus |= HWREG(ulBase + MCASP_O_RXSTAT) << 16;
-
-  //
-  // Return the status
-  //
-  return ulStatus;
-}
-
-//*****************************************************************************
-//
-//! Clears I2S interrupt sources.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulStatFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified I2S interrupt sources are cleared, so that they no longer
-//! assert.  This function must be called in the interrupt handler to keep the
-//! interrupt from being recognized again immediately upon exit.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the value
-//! describe in I2SIntStatus().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntClear(unsigned long ulBase, unsigned long ulStatFlags)
-{
-  //
-  // Clear DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK)
-     |= ((ulStatFlags &0xC0000000) >> 20);
-
-  //
-  // Clear Tx Interrupt
-  //
-  HWREG(ulBase + MCASP_O_TXSTAT) = ulStatFlags & 0x1FF ;
-
-  //
-  // Clear Rx Interrupt
-  //
-  HWREG(ulBase + MCASP_O_RXSTAT) = (ulStatFlags >> 16) & 0x1FF;
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for a I2S interrupt.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! I2S interrupt occurs.
-//!
-//! This function does the actual registering of the interrupt handler.  This
-//! function enables the global interrupt in the interrupt controller; specific
-//! I2S interrupts must be enabled via I2SIntEnable().  It is the interrupt
-//! handler's responsibility to clear the interrupt source.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
-  //
-  // Register the interrupt handler
-  //
-  IntRegister(INT_I2S,pfnHandler);
-
-  //
-  // Enable the interrupt
-  //
-  IntEnable(INT_I2S);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for a I2S interrupt.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function does the actual unregistering of the interrupt handler.  It
-//! clears the handler to be called when a I2S interrupt occurs.  This
-//! function also masks off the interrupt in the interrupt controller so that
-//! the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntUnregister(unsigned long ulBase)
-{
-  //
-  // Disable interrupt
-  //
-  IntDisable(INT_I2S);
-
-  //
-  // Unregister the handler
-  //
-  IntUnregister(INT_I2S);
-
-}
-
-//*****************************************************************************
-//
-//! Set the active slots for Trasmitter
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulActSlot is the bit-mask of activ slots
-//!
-//! This function sets the active slots for the transmitter. By default both
-//! the slots are active. The parameter \e ulActSlot is logical OR follwoing
-//! values:
-//! -\b I2S_ACT_SLOT_EVEN
-//! -\b I2S_ACT_SLOT_ODD
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2STxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot)
-{
-   HWREG(ulBase + MCASP_O_TXTDM) = ulActSlot;
-}
-
-//*****************************************************************************
-//
-//! Set the active slots for Receiver
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulActSlot is the bit-mask of activ slots
-//!
-//! This function sets the active slots for the receiver. By default both
-//! the slots are active. The parameter \e ulActSlot is logical OR follwoing
-//! values:
-//! -\b I2S_ACT_SLOT_EVEN
-//! -\b I2S_ACT_SLOT_ODD
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SRxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot)
-{
-   HWREG(ulBase + MCASP_O_RXTDM) = ulActSlot;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/i2s.h b/ports/cc3200/hal/i2s.h
deleted file mode 100644
index 38620aef5a..0000000000
--- a/ports/cc3200/hal/i2s.h
+++ /dev/null
@@ -1,218 +0,0 @@
-//*****************************************************************************
-//
-//  i2s.h
-//
-//  Defines and Macros for the I2S.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __I2S_H__
-#define __I2S_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// I2S DMA ports.
-//
-//*****************************************************************************
-#define I2S_TX_DMA_PORT      0x4401E200
-#define I2S_RX_DMA_PORT      0x4401E280
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SConfigSetExpClk() as the ulConfig parameter.
-//
-//*****************************************************************************
-#define I2S_SLOT_SIZE_8       0x00300032
-#define I2S_SLOT_SIZE_16      0x00700074
-#define I2S_SLOT_SIZE_24      0x00B000B6
-
-
-#define I2S_PORT_CPU          0x00080008
-#define I2S_PORT_DMA          0x00000000
-
-#define I2S_MODE_MASTER       0x00000000
-#define I2S_MODE_SLAVE        0x00008000
-
-//*****************************************************************************
-//
-// Values that can be passed as ulDataLine parameter.
-//
-//*****************************************************************************
-#define I2S_DATA_LINE_0       0x00000001
-#define I2S_DATA_LINE_1       0x00000002
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SSerializerConfig() as the ulSerMode
-// parameter.
-//
-//*****************************************************************************
-#define I2S_SER_MODE_TX       0x00000001
-#define I2S_SER_MODE_RX       0x00000002
-#define I2S_SER_MODE_DISABLE  0x00000000
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SSerializerConfig() as the ulInActState
-// parameter.
-//
-//*****************************************************************************
-#define I2S_INACT_TRI_STATE   0x00000000
-#define I2S_INACT_LOW_LEVEL   0x00000008
-#define I2S_INACT_HIGH_LEVEL  0x0000000C
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SIntEnable() and I2SIntDisable() as the
-// ulIntFlags parameter.
-//
-//*****************************************************************************
-#define I2S_INT_XUNDRN	      0x00000001
-#define I2S_INT_XSYNCERR      0x00000002
-#define I2S_INT_XLAST         0x00000010
-#define I2S_INT_XDATA         0x00000020
-#define I2S_INT_XSTAFRM       0x00000080
-#define I2S_INT_XDMA	      0x80000000
-#define I2S_INT_ROVRN         0x00010000
-#define I2S_INT_RSYNCERR      0x00020000
-#define I2S_INT_RLAST         0x00100000
-#define I2S_INT_RDATA         0x00200000
-#define I2S_INT_RSTAFRM       0x00800000
-#define I2S_INT_RDMA          0x40000000
-
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SRxActiveSlotSet() and I2STxActiveSlotSet
-//
-//*****************************************************************************
-#define I2S_ACT_SLOT_EVEN     0x00000001
-#define I2S_ACT_SLOT_ODD      0x00000002
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SIntClear() as the
-// ulIntFlags parameter and returned from I2SIntStatus().
-//
-//*****************************************************************************
-#define I2S_STS_XERR          0x00000100
-#define I2S_STS_XDMAERR	      0x00000080
-#define I2S_STS_XSTAFRM	      0x00000040
-#define I2S_STS_XDATA	      0x00000020
-#define I2S_STS_XLAST	      0x00000010
-#define I2S_STS_XSYNCERR      0x00000002
-#define I2S_STS_XUNDRN	      0x00000001
-#define I2S_STS_XDMA	      0x80000000
-#define I2S_STS_RERR          0x01000000
-#define I2S_STS_RDMAERR       0x00800000
-#define I2S_STS_RSTAFRM       0x00400000
-#define I2S_STS_RDATA         0x00200000
-#define I2S_STS_RLAST         0x00100000
-#define I2S_STS_RSYNCERR      0x00020000
-#define I2S_STS_ROVERN	      0x00010000
-#define I2S_STS_RDMA          0x40000000
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SEnable() as the ulMode parameter.
-//
-//*****************************************************************************
-#define I2S_MODE_TX_ONLY      0x00000001
-#define I2S_MODE_TX_RX_SYNC   0x00000003
-
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void I2SEnable(unsigned long ulBase, unsigned long ulMode);
-extern void I2SDisable(unsigned long ulBase);
-
-extern void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long ulData);
-extern long I2SDataPutNonBlocking(unsigned long ulBase,
-                               unsigned long ulDataLine, unsigned long ulData);
-
-extern void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long *pulData);
-extern long I2SDataGetNonBlocking(unsigned long ulBase,
-                unsigned long ulDataLine, unsigned long *pulData);
-
-extern void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
-                               unsigned long ulBitClk, unsigned long ulConfig);
-
-extern void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
-                     unsigned long ulWordsPerTransfer);
-extern void I2STxFIFODisable(unsigned long ulBase);
-extern void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
-                     unsigned long ulWordsPerTransfer);
-extern void I2SRxFIFODisable(unsigned long ulBase);
-extern unsigned long I2STxFIFOStatusGet(unsigned long ulBase);
-extern unsigned long I2SRxFIFOStatusGet(unsigned long ulBase);
-
-extern void I2SSerializerConfig(unsigned long ulBase, unsigned long ulDataLine,
-                         unsigned long ulSerMode, unsigned long ulInActState);
-
-extern void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
-extern unsigned long I2SIntStatus(unsigned long ulBase);
-extern void I2SIntClear(unsigned long ulBase, unsigned long ulIntFlags);
-extern void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
-extern void I2SIntUnregister(unsigned long ulBase);
-extern void I2STxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot);
-extern void I2SRxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //__I2S_H__
-
diff --git a/ports/cc3200/hal/inc/asmdefs.h b/ports/cc3200/hal/inc/asmdefs.h
deleted file mode 100644
index c2a6f97342..0000000000
--- a/ports/cc3200/hal/inc/asmdefs.h
+++ /dev/null
@@ -1,229 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// asmdefs.h - Macros to allow assembly code be portable among toolchains.
-//
-//*****************************************************************************
-
-#ifndef __ASMDEFS_H__
-#define __ASMDEFS_H__
-
-//*****************************************************************************
-//
-// The defines required for code_red.
-//
-//*****************************************************************************
-#ifdef codered
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    .syntax unified
-    .thumb
-
-//
-// Section headers.
-//
-#define __LIBRARY__             @
-#define __TEXT__                .text
-#define __DATA__                .data
-#define __BSS__                 .bss
-#define __TEXT_NOROOT__         .text
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               .balign 4
-#define __END__                 .end
-#define __EXPORT__              .globl
-#define __IMPORT__              .extern
-#define __LABEL__               :
-#define __STR__                 .ascii
-#define __THUMB_LABEL__         .thumb_func
-#define __WORD__                .word
-#define __INLINE_DATA__
-
-#endif // codered
-
-//*****************************************************************************
-//
-// The defines required for EW-ARM.
-//
-//*****************************************************************************
-#ifdef ewarm
-
-//
-// Section headers.
-//
-#define __LIBRARY__             module
-#define __TEXT__                rseg CODE:CODE(2)
-#define __DATA__                rseg DATA:DATA(2)
-#define __BSS__                 rseg DATA:DATA(2)
-#define __TEXT_NOROOT__         rseg CODE:CODE:NOROOT(2)
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               alignrom 2
-#define __END__                 end
-#define __EXPORT__              export
-#define __IMPORT__              import
-#define __LABEL__
-#define __STR__                 dcb
-#define __THUMB_LABEL__         thumb
-#define __WORD__                dcd
-#define __INLINE_DATA__         data
-
-#endif // ewarm
-
-//*****************************************************************************
-//
-// The defines required for GCC.
-//
-//*****************************************************************************
-#if defined(gcc)
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    .syntax unified
-    .thumb
-
-//
-// Section headers.
-//
-#define __LIBRARY__             @
-#define __TEXT__                .text
-#define __DATA__                .data
-#define __BSS__                 .bss
-#define __TEXT_NOROOT__         .text
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               .balign 4
-#define __END__                 .end
-#define __EXPORT__              .globl
-#define __IMPORT__              .extern
-#define __LABEL__               :
-#define __STR__                 .ascii
-#define __THUMB_LABEL__         .thumb_func
-#define __WORD__                .word
-#define __INLINE_DATA__
-
-#endif // gcc
-
-//*****************************************************************************
-//
-// The defines required for RV-MDK.
-//
-//*****************************************************************************
-#ifdef rvmdk
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    thumb
-    require8
-    preserve8
-
-//
-// Section headers.
-//
-#define __LIBRARY__             ;
-#define __TEXT__                area ||.text||, code, readonly, align=2
-#define __DATA__                area ||.data||, data, align=2
-#define __BSS__                 area ||.bss||, noinit, align=2
-#define __TEXT_NOROOT__         area ||.text||, code, readonly, align=2
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               align 4
-#define __END__                 end
-#define __EXPORT__              export
-#define __IMPORT__              import
-#define __LABEL__
-#define __STR__                 dcb
-#define __THUMB_LABEL__
-#define __WORD__                dcd
-#define __INLINE_DATA__
-
-#endif // rvmdk
-
-//*****************************************************************************
-//
-// The defines required for Sourcery G++.
-//
-//*****************************************************************************
-#if defined(sourcerygxx)
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    .syntax unified
-    .thumb
-
-//
-// Section headers.
-//
-#define __LIBRARY__             @
-#define __TEXT__                .text
-#define __DATA__                .data
-#define __BSS__                 .bss
-#define __TEXT_NOROOT__         .text
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               .balign 4
-#define __END__                 .end
-#define __EXPORT__              .globl
-#define __IMPORT__              .extern
-#define __LABEL__               :
-#define __STR__                 .ascii
-#define __THUMB_LABEL__         .thumb_func
-#define __WORD__                .word
-#define __INLINE_DATA__
-
-#endif // sourcerygxx
-
-#endif // __ASMDEF_H__
diff --git a/ports/cc3200/hal/inc/hw_adc.h b/ports/cc3200/hal/inc/hw_adc.h
deleted file mode 100644
index 525ce905c6..0000000000
--- a/ports/cc3200/hal/inc/hw_adc.h
+++ /dev/null
@@ -1,888 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_ADC_H__
-#define __HW_ADC_H__
-
-//*****************************************************************************
-//
-// The following are defines for the ADC register offsets.
-//
-//*****************************************************************************
-#define ADC_O_ADC_CTRL          0x00000000  // ADC control register.
-#define ADC_O_adc_ch0_gain      0x00000004  // Channel 0 gain setting
-#define ADC_O_adc_ch1_gain      0x00000008  // Channel 1 gain setting
-#define ADC_O_adc_ch2_gain      0x0000000C  // Channel 2 gain setting
-#define ADC_O_adc_ch3_gain      0x00000010  // Channel 3 gain setting
-#define ADC_O_adc_ch4_gain      0x00000014  // Channel 4 gain setting
-#define ADC_O_adc_ch5_gain      0x00000018  // Channel 5 gain setting
-#define ADC_O_adc_ch6_gain      0x0000001C  // Channel 6 gain setting
-#define ADC_O_adc_ch7_gain      0x00000020  // Channel 7 gain setting
-#define ADC_O_adc_ch0_irq_en    0x00000024  // Channel 0 interrupt enable
-                                            // register
-#define ADC_O_adc_ch1_irq_en    0x00000028  // Channel 1 interrupt enable
-                                            // register
-#define ADC_O_adc_ch2_irq_en    0x0000002C  // Channel 2 interrupt enable
-                                            // register
-#define ADC_O_adc_ch3_irq_en    0x00000030  // Channel 3 interrupt enable
-                                            // register
-#define ADC_O_adc_ch4_irq_en    0x00000034  // Channel 4 interrupt enable
-                                            // register
-#define ADC_O_adc_ch5_irq_en    0x00000038  // Channel 5 interrupt enable
-                                            // register
-#define ADC_O_adc_ch6_irq_en    0x0000003C  // Channel 6 interrupt enable
-                                            // register
-#define ADC_O_adc_ch7_irq_en    0x00000040  // Channel 7 interrupt enable
-                                            // register
-#define ADC_O_adc_ch0_irq_status \
-                                0x00000044  // Channel 0 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch1_irq_status \
-                                0x00000048  // Channel 1 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch2_irq_status \
-                                0x0000004C
-
-#define ADC_O_adc_ch3_irq_status \
-                                0x00000050  // Channel 3 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch4_irq_status \
-                                0x00000054  // Channel 4 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch5_irq_status \
-                                0x00000058
-
-#define ADC_O_adc_ch6_irq_status \
-                                0x0000005C  // Channel 6 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch7_irq_status \
-                                0x00000060  // Channel 7 interrupt status
-                                            // register
-
-#define ADC_O_adc_dma_mode_en   0x00000064  // DMA mode enable register
-#define ADC_O_adc_timer_configuration \
-                                0x00000068  // ADC timer configuration register
-
-#define ADC_O_adc_timer_current_count \
-                                0x00000070  // ADC timer current count register
-
-#define ADC_O_channel0FIFODATA  0x00000074  // CH0 FIFO DATA register
-#define ADC_O_channel1FIFODATA  0x00000078  // CH1 FIFO DATA register
-#define ADC_O_channel2FIFODATA  0x0000007C  // CH2 FIFO DATA register
-#define ADC_O_channel3FIFODATA  0x00000080  // CH3 FIFO DATA register
-#define ADC_O_channel4FIFODATA  0x00000084  // CH4 FIFO DATA register
-#define ADC_O_channel5FIFODATA  0x00000088  // CH5 FIFO DATA register
-#define ADC_O_channel6FIFODATA  0x0000008C  // CH6 FIFO DATA register
-#define ADC_O_channel7FIFODATA  0x00000090  // CH7 FIFO DATA register
-#define ADC_O_adc_ch0_fifo_lvl  0x00000094  // channel 0 FIFO Level register
-#define ADC_O_adc_ch1_fifo_lvl  0x00000098  // Channel 1 interrupt status
-                                            // register
-#define ADC_O_adc_ch2_fifo_lvl  0x0000009C
-#define ADC_O_adc_ch3_fifo_lvl  0x000000A0  // Channel 3 interrupt status
-                                            // register
-#define ADC_O_adc_ch4_fifo_lvl  0x000000A4  // Channel 4 interrupt status
-                                            // register
-#define ADC_O_adc_ch5_fifo_lvl  0x000000A8
-#define ADC_O_adc_ch6_fifo_lvl  0x000000AC  // Channel 6 interrupt status
-                                            // register
-#define ADC_O_adc_ch7_fifo_lvl  0x000000B0  // Channel 7 interrupt status
-                                            // register
-
-#define ADC_O_ADC_CH_ENABLE     0x000000B8
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the ADC_O_ADC_CTRL register.
-//
-//******************************************************************************
-#define ADC_ADC_CTRL_adc_cap_scale \
-                                0x00000020  // ADC CAP SCALE.
-
-#define ADC_ADC_CTRL_adc_buf_bypass \
-                                0x00000010  // ADC ANA CIO buffer bypass.
-                                            // Signal is modelled in ANA TOP.
-                                            // When '1': ADC buffer is bypassed.
-
-#define ADC_ADC_CTRL_adc_buf_en 0x00000008  // ADC ANA buffer enable. When 1:
-                                            // ADC buffer is enabled.
-#define ADC_ADC_CTRL_adc_core_en \
-                                0x00000004  // ANA ADC core en. This signal act
-                                            // as glbal enable to ADC CIO. When
-                                            // 1: ADC core is enabled.
-
-#define ADC_ADC_CTRL_adc_soft_reset \
-                                0x00000002  // ADC soft reset. When '1' : reset
-                                            // ADC internal logic.
-
-#define ADC_ADC_CTRL_adc_en     0x00000001  // ADC global enable. When set ADC
-                                            // module is enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_gain_adc_channel0_gain_M \
-                                0x00000003  // gain setting for ADC channel 0.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch0_gain_adc_channel0_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_gain_adc_channel1_gain_M \
-                                0x00000003  // gain setting for ADC channel 1.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch1_gain_adc_channel1_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_gain_adc_channel2_gain_M \
-                                0x00000003  // gain setting for ADC channel 2.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch2_gain_adc_channel2_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_gain_adc_channel3_gain_M \
-                                0x00000003  // gain setting for ADC channel 3.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch3_gain_adc_channel3_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_gain_adc_channel4_gain_M \
-                                0x00000003  // gain setting for ADC channel 4
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch4_gain_adc_channel4_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_gain_adc_channel5_gain_M \
-                                0x00000003  // gain setting for ADC channel 5.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch5_gain_adc_channel5_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_gain_adc_channel6_gain_M \
-                                0x00000003  // gain setting for ADC channel 6
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch6_gain_adc_channel6_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_gain_adc_channel7_gain_M \
-                                0x00000003  // gain setting for ADC channel 7.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch7_gain_adc_channel7_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_irq_en_adc_channel0_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch0_irq_en_adc_channel0_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_irq_en_adc_channel1_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch1_irq_en_adc_channel1_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_irq_en_adc_channel2_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch2_irq_en_adc_channel2_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_irq_en_adc_channel3_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch3_irq_en_adc_channel3_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_irq_en_adc_channel4_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch4_irq_en_adc_channel4_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_irq_en_adc_channel5_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch5_irq_en_adc_channel5_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_irq_en_adc_channel6_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch6_irq_en_adc_channel6_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_irq_en_adc_channel7_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch7_irq_en_adc_channel7_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_irq_status_adc_channel0_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch0_irq_status_adc_channel0_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_irq_status_adc_channel1_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch1_irq_status_adc_channel1_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_irq_status_adc_channel2_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch2_irq_status_adc_channel2_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_irq_status_adc_channel3_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch3_irq_status_adc_channel3_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_irq_status_adc_channel4_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch4_irq_status_adc_channel4_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_irq_status_adc_channel5_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch5_irq_status_adc_channel5_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_irq_status_adc_channel6_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch6_irq_status_adc_channel6_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_irq_status_adc_channel7_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch7_irq_status_adc_channel7_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_dma_mode_en register.
-//
-//******************************************************************************
-#define ADC_adc_dma_mode_en_DMA_MODEenable_M \
-                                0x000000FF  // this register enable DMA mode.
-                                            // when '1' respective ADC channel
-                                            // is enabled for DMA. When '0' only
-                                            // interrupt mode is enabled. Bit 0:
-                                            // channel 0 DMA mode enable. Bit 1:
-                                            // channel 1 DMA mode enable. Bit 2:
-                                            // channel 2 DMA mode enable. Bit 3:
-                                            // channel 3 DMA mode enable. bit 4:
-                                            // channel 4 DMA mode enable. bit 5:
-                                            // channel 5 DMA mode enable. bit 6:
-                                            // channel 6 DMA mode enable. bit 7:
-                                            // channel 7 DMA mode enable.
-
-#define ADC_adc_dma_mode_en_DMA_MODEenable_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_timer_configuration register.
-//
-//******************************************************************************
-#define ADC_adc_timer_configuration_timeren \
-                                0x02000000  // when '1' timer is enabled.
-
-#define ADC_adc_timer_configuration_timerreset \
-                                0x01000000  // when '1' reset timer.
-
-#define ADC_adc_timer_configuration_timercount_M \
-                                0x00FFFFFF  // Timer count configuration. 17
-                                            // bit counter is supported. Other
-                                            // MSB's are redundent.
-
-#define ADC_adc_timer_configuration_timercount_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_timer_current_count register.
-//
-//******************************************************************************
-#define ADC_adc_timer_current_count_timercurrentcount_M \
-                                0x0001FFFF  // Timer count configuration
-
-#define ADC_adc_timer_current_count_timercurrentcount_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel0FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel0FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel0FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel1FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel1FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel1FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel2FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel2FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel2FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel3FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel3FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel3FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel4FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel4FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel4FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel5FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel5FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel5FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel6FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel6FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel6FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel7FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel7FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel7FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_fifo_lvl_adc_channel0_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch0_fifo_lvl_adc_channel0_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_fifo_lvl_adc_channel1_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch1_fifo_lvl_adc_channel1_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_fifo_lvl_adc_channel2_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch2_fifo_lvl_adc_channel2_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_fifo_lvl_adc_channel3_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch3_fifo_lvl_adc_channel3_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_fifo_lvl_adc_channel4_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch4_fifo_lvl_adc_channel4_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_fifo_lvl_adc_channel5_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch5_fifo_lvl_adc_channel5_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_fifo_lvl_adc_channel6_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch6_fifo_lvl_adc_channel6_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_fifo_lvl_adc_channel7_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch7_fifo_lvl_adc_channel7_fifo_lvl_S 0
-
-
-
-#endif // __HW_ADC_H__
diff --git a/ports/cc3200/hal/inc/hw_aes.h b/ports/cc3200/hal/inc/hw_aes.h
deleted file mode 100644
index 3ab0398b35..0000000000
--- a/ports/cc3200/hal/inc/hw_aes.h
+++ /dev/null
@@ -1,802 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_AES_H__
-#define __HW_AES_H__
-
-//*****************************************************************************
-//
-// The following are defines for the AES_P register offsets.
-//
-//*****************************************************************************
-#define AES_O_KEY2_6          0x00000000  // XTS second key / CBC-MAC third
-                                            // key
-#define AES_O_KEY2_7          0x00000004  // XTS second key (MSW for 256-bit
-                                            // key) / CBC-MAC third key (MSW)
-#define AES_O_KEY2_4          0x00000008  // XTS / CCM second key / CBC-MAC
-                                            // third key (LSW)
-#define AES_O_KEY2_5          0x0000000C  // XTS second key (MSW for 192-bit
-                                            // key) / CBC-MAC third key
-#define AES_O_KEY2_2          0x00000010  // XTS / CCM / CBC-MAC second key /
-                                            // Hash Key input
-#define AES_O_KEY2_3          0x00000014  // XTS second key (MSW for 128-bit
-                                            // key) + CCM/CBC-MAC second key
-                                            // (MSW) / Hash Key input (MSW)
-#define AES_O_KEY2_0          0x00000018  // XTS / CCM / CBC-MAC second key
-                                            // (LSW) / Hash Key input (LSW)
-#define AES_O_KEY2_1          0x0000001C  // XTS / CCM / CBC-MAC second key /
-                                            // Hash Key input
-#define AES_O_KEY1_6          0x00000020  // Key (LSW for 256-bit key)
-#define AES_O_KEY1_7          0x00000024  // Key (MSW for 256-bit key)
-#define AES_O_KEY1_4          0x00000028  // Key (LSW for 192-bit key)
-#define AES_O_KEY1_5          0x0000002C  // Key (MSW for 192-bit key)
-#define AES_O_KEY1_2          0x00000030  // Key
-#define AES_O_KEY1_3          0x00000034  // Key (MSW for 128-bit key)
-#define AES_O_KEY1_0          0x00000038  // Key (LSW for 128-bit key)
-#define AES_O_KEY1_1          0x0000003C  // Key
-#define AES_O_IV_IN_0         0x00000040  // Initialization Vector input
-                                            // (LSW)
-#define AES_O_IV_IN_1         0x00000044  // Initialization vector input
-#define AES_O_IV_IN_2         0x00000048  // Initialization vector input
-#define AES_O_IV_IN_3         0x0000004C  // Initialization Vector input
-                                            // (MSW)
-#define AES_O_CTRL            0x00000050  // register determines the mode of
-                                            // operation of the AES Engine
-#define AES_O_C_LENGTH_0      0x00000054  // Crypto data length registers
-                                            // (LSW and MSW) store the
-                                            // cryptographic data length in
-                                            // bytes for all modes. Once
-                                            // processing with this context is
-                                            // started@@ this length decrements
-                                            // to zero. Data lengths up to (2^61
-                                            // – 1) bytes are allowed. For GCM@@
-                                            // any value up to 2^36 - 32 bytes
-                                            // can be used. This is because a
-                                            // 32-bit counter mode is used; the
-                                            // maximum number of 128-bit blocks
-                                            // is 2^32 – 2@@ resulting in a
-                                            // maximum number of bytes of 2^36 -
-                                            // 32. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. This is valid
-                                            // for all modes except GCM and CCM.
-                                            // Note that for the combined
-                                            // modes@@ this length does not
-                                            // include the authentication only
-                                            // data; the authentication length
-                                            // is specified in the
-                                            // AES_AUTH_LENGTH register below.
-                                            // All modes must have a length > 0.
-                                            // For the combined modes@@ it is
-                                            // allowed to have one of the
-                                            // lengths equal to zero. For the
-                                            // basic encryption modes
-                                            // (ECB/CBC/CTR/ICM/CFB128) it is
-                                            // allowed to program zero to the
-                                            // length field; in that case the
-                                            // length is assumed infinite. All
-                                            // data must be byte (8-bit)
-                                            // aligned; bit aligned data streams
-                                            // are not supported by the AES
-                                            // Engine. For a Host read
-                                            // operation@@ these registers
-                                            // return all-zeroes.
-#define AES_O_C_LENGTH_1      0x00000058  // Crypto data length registers
-                                            // (LSW and MSW) store the
-                                            // cryptographic data length in
-                                            // bytes for all modes. Once
-                                            // processing with this context is
-                                            // started@@ this length decrements
-                                            // to zero. Data lengths up to (2^61
-                                            // – 1) bytes are allowed. For GCM@@
-                                            // any value up to 2^36 - 32 bytes
-                                            // can be used. This is because a
-                                            // 32-bit counter mode is used; the
-                                            // maximum number of 128-bit blocks
-                                            // is 2^32 – 2@@ resulting in a
-                                            // maximum number of bytes of 2^36 -
-                                            // 32. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. This is valid
-                                            // for all modes except GCM and CCM.
-                                            // Note that for the combined
-                                            // modes@@ this length does not
-                                            // include the authentication only
-                                            // data; the authentication length
-                                            // is specified in the
-                                            // AES_AUTH_LENGTH register below.
-                                            // All modes must have a length > 0.
-                                            // For the combined modes@@ it is
-                                            // allowed to have one of the
-                                            // lengths equal to zero. For the
-                                            // basic encryption modes
-                                            // (ECB/CBC/CTR/ICM/CFB128) it is
-                                            // allowed to program zero to the
-                                            // length field; in that case the
-                                            // length is assumed infinite. All
-                                            // data must be byte (8-bit)
-                                            // aligned; bit aligned data streams
-                                            // are not supported by the AES
-                                            // Engine. For a Host read
-                                            // operation@@ these registers
-                                            // return all-zeroes.
-#define AES_O_AUTH_LENGTH     0x0000005C  // AAD data length. The
-                                            // authentication length register
-                                            // store the authentication data
-                                            // length in bytes for combined
-                                            // modes only (GCM or CCM) Supported
-                                            // AAD-lengths for CCM are from 0 to
-                                            // (2^16 - 2^8) bytes. For GCM any
-                                            // value up to (2^32 - 1) bytes can
-                                            // be used. Once processing with
-                                            // this context is started@@ this
-                                            // length decrements to zero. A
-                                            // write to this register triggers
-                                            // the engine to start using this
-                                            // context for GCM and CCM. For XTS
-                                            // this register is optionally used
-                                            // to load ‘j’. Loading of ‘j’ is
-                                            // only required if ‘j’ != 0. ‘j’ is
-                                            // a 28-bit value and must be
-                                            // written to bits [31-4] of this
-                                            // register. ‘j’ represents the
-                                            // sequential number of the 128-bit
-                                            // block inside the data unit. For
-                                            // the first block in a unit@@ this
-                                            // value is zero. It is not required
-                                            // to provide a ‘j’ for each new
-                                            // data block within a unit. Note
-                                            // that it is possible to start with
-                                            // a ‘j’ unequal to zero; refer to
-                                            // Table 4 for more details. For a
-                                            // Host read operation@@ these
-                                            // registers return all-zeroes.
-#define AES_O_DATA_IN_0       0x00000060  // Data register to read and write
-                                            // plaintext/ciphertext (MSW)
-#define AES_O_DATA_IN_1       0x00000064  // Data register to read and write
-                                            // plaintext/ciphertext
-#define AES_O_DATA_IN_2       0x00000068  // Data register to read and write
-                                            // plaintext/ciphertext
-#define AES_O_DATA_IN_3       0x0000006C  // Data register to read and write
-                                            // plaintext/ciphertext (LSW)
-#define AES_O_TAG_OUT_0       0x00000070
-#define AES_O_TAG_OUT_1       0x00000074
-#define AES_O_TAG_OUT_2       0x00000078
-#define AES_O_TAG_OUT_3       0x0000007C
-#define AES_O_REVISION        0x00000080  // Register AES_REVISION
-#define AES_O_SYSCONFIG       0x00000084  // Register AES_SYSCONFIG.This
-                                            // register configures the DMA
-                                            // signals and controls the IDLE and
-                                            // reset logic
-#define AES_O_SYSSTATUS       0x00000088
-#define AES_O_IRQSTATUS       0x0000008C  // This register indicates the
-                                            // interrupt status. If one of the
-                                            // interrupt bits is set the
-                                            // interrupt output will be asserted
-#define AES_O_IRQENABLE       0x00000090  // This register contains an enable
-                                            // bit for each unique interrupt
-                                            // generated by the module. It
-                                            // matches the layout of
-                                            // AES_IRQSTATUS register. An
-                                            // interrupt is enabled when the bit
-                                            // in this register is set to ‘1’.
-                                            // An interrupt that is enabled is
-                                            // propagated to the SINTREQUEST_x
-                                            // output. All interrupts need to be
-                                            // enabled explicitly by writing
-                                            // this register.
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_6 register.
-//
-//******************************************************************************
-#define AES_KEY2_6_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_6_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_7 register.
-//
-//******************************************************************************
-#define AES_KEY2_7_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_7_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_4 register.
-//
-//******************************************************************************
-#define AES_KEY2_4_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_4_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_5 register.
-//
-//******************************************************************************
-#define AES_KEY2_5_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_5_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_2 register.
-//
-//******************************************************************************
-#define AES_KEY2_2_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_2_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_3 register.
-//
-//******************************************************************************
-#define AES_KEY2_3_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_3_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_0 register.
-//
-//******************************************************************************
-#define AES_KEY2_0_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_0_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_1 register.
-//
-//******************************************************************************
-#define AES_KEY2_1_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_1_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_6 register.
-//
-//******************************************************************************
-#define AES_KEY1_6_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_6_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_7 register.
-//
-//******************************************************************************
-#define AES_KEY1_7_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_7_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_4 register.
-//
-//******************************************************************************
-#define AES_KEY1_4_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_4_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_5 register.
-//
-//******************************************************************************
-#define AES_KEY1_5_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_5_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_2 register.
-//
-//******************************************************************************
-#define AES_KEY1_2_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_2_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_3 register.
-//
-//******************************************************************************
-#define AES_KEY1_3_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_3_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_0 register.
-//
-//******************************************************************************
-#define AES_KEY1_0_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_0_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_1 register.
-//
-//******************************************************************************
-#define AES_KEY1_1_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_1_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_0 register.
-//
-//******************************************************************************
-#define AES_IV_IN_0_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_0_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_1 register.
-//
-//******************************************************************************
-#define AES_IV_IN_1_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_1_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_2 register.
-//
-//******************************************************************************
-#define AES_IV_IN_2_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_2_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_3 register.
-//
-//******************************************************************************
-#define AES_IV_IN_3_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_3_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_CTRL register.
-//
-//******************************************************************************
-#define AES_CTRL_CONTEXT_READY \
-                                0x80000000  // If ‘1’@@ this read-only status
-                                            // bit indicates that the context
-                                            // data registers can be overwritten
-                                            // and the host is permitted to
-                                            // write the next context.
-
-#define AES_CTRL_SVCTXTRDY \
-                                0x40000000  // If ‘1’@@ this read-only status
-                                            // bit indicates that an AES
-                                            // authentication TAG and/or IV
-                                            // block(s) is/are available for the
-                                            // host to retrieve. This bit is
-                                            // only asserted if the
-                                            // ‘save_context’ bit is set to ‘1’.
-                                            // The bit is mutual exclusive with
-                                            // the ‘context_ready’ bit.
-
-#define AES_CTRL_SAVE_CONTEXT 0x20000000  // This bit is used to indicate
-                                            // that an authentication TAG or
-                                            // result IV needs to be stored as a
-                                            // result context. If this bit is
-                                            // set@@ context output DMA and/or
-                                            // interrupt will be asserted if the
-                                            // operation is finished and related
-                                            // signals are enabled.
-#define AES_CTRL_CCM_M      0x01C00000  // Defines “M” that indicated the
-                                            // length of the authentication
-                                            // field for CCM operations; the
-                                            // authentication field length
-                                            // equals two times (the value of
-                                            // CCM-M plus one). Note that the
-                                            // AES Engine always returns a
-                                            // 128-bit authentication field@@ of
-                                            // which the M least significant
-                                            // bytes are valid. All values are
-                                            // supported.
-#define AES_CTRL_CCM_S      22
-#define AES_CTRL_CCM_L_M      0x00380000  // Defines “L” that indicated the
-                                            // width of the length field for CCM
-                                            // operations; the length field in
-                                            // bytes equals the value of CMM-L
-                                            // plus one. Supported values for L
-                                            // are (programmed value): 2 (1)@@ 4
-                                            // (3) and 8 (7).
-#define AES_CTRL_CCM_L_S      19
-#define AES_CTRL_CCM          0x00040000  // AES-CCM is selected@@ this is a
-                                            // combined mode@@ using AES for
-                                            // both authentication and
-                                            // encryption. No additional mode
-                                            // selection is required. 0 Other
-                                            // mode selected 1 ccm mode selected
-#define AES_CTRL_GCM_M        0x00030000  // AES-GCM mode is selected.this is
-                                            // a combined mode@@ using the
-                                            // Galois field multiplier GF(2^128)
-                                            // for authentication and AES-CTR
-                                            // mode for encryption@@ the bits
-                                            // specify the GCM mode. 0x0 No
-                                            // operation 0x1 GHASH with H loaded
-                                            // and Y0-encrypted forced to zero
-                                            // 0x2 GHASH with H loaded and
-                                            // Y0-encrypted calculated
-                                            // internally 0x3 Autonomous GHASH
-                                            // (both H and Y0-encrypted
-                                            // calculated internally)
-#define AES_CTRL_GCM_S        16
-#define AES_CTRL_CBCMAC       0x00008000  // AES-CBC MAC is selected@@ the
-                                            // Direction bit must be set to ‘1’
-                                            // for this mode. 0 Other mode
-                                            // selected 1 cbcmac mode selected
-#define AES_CTRL_F9           0x00004000  // AES f9 mode is selected@@ the
-                                            // AES key size must be set to
-                                            // 128-bit for this mode. 0 Other
-                                            // mode selected 1 f9 selected
-#define AES_CTRL_F8           0x00002000  // AES f8 mode is selected@@ the
-                                            // AES key size must be set to
-                                            // 128-bit for this mode. 0 Other
-                                            // mode selected 1 f8 selected
-#define AES_CTRL_XTS_M        0x00001800  // AES-XTS operation is selected;
-                                            // the bits specify the XTS mode.01
-                                            // = Previous/intermediate tweak
-                                            // value and ‘j’ loaded (value is
-                                            // loaded via IV@@ j is loaded via
-                                            // the AAD length register) 0x0 No
-                                            // operation 0x1
-                                            // Previous/intermediate tweak value
-                                            // and ‘j’ loaded (value is loaded
-                                            // via IV@@ j is loaded via the AAD
-                                            // length register) 0x2 Key2@@ i and
-                                            // j loaded (i is loaded via IV@@ j
-                                            // is loaded via the AAD length
-                                            // register) 0x3 Key2 and i loaded@@
-                                            // j=0 (i is loaded via IV)
-#define AES_CTRL_XTS_S        11
-#define AES_CTRL_CFB          0x00000400  // full block AES cipher feedback
-                                            // mode (CFB128) is selected. 0
-                                            // other mode selected 1 cfb
-                                            // selected
-#define AES_CTRL_ICM          0x00000200  // AES integer counter mode (ICM)
-                                            // is selected@@ this is a counter
-                                            // mode with a 16-bit wide counter.
-                                            // 0 Other mode selected. 1 ICM mode
-                                            // selected
-#define AES_CTRL_CTR_WIDTH_M  0x00000180  // Specifies the counter width for
-                                            // AES-CTR mode 0x0 Counter is 32
-                                            // bits 0x1 Counter is 64 bits 0x2
-                                            // Counter is 128 bits 0x3 Counter
-                                            // is 192 bits
-#define AES_CTRL_CTR_WIDTH_S  7
-#define AES_CTRL_CTR          0x00000040  // Tthis bit must also be set for
-                                            // GCM and CCM@@ when
-                                            // encryption/decryption is
-                                            // required. 0 Other mode selected 1
-                                            // Counter mode
-#define AES_CTRL_MODE         0x00000020  // ecb/cbc mode 0 ecb mode 1 cbc
-                                            // mode
-#define AES_CTRL_KEY_SIZE_M   0x00000018  // key size 0x0 reserved 0x1 Key is
-                                            // 128 bits. 0x2 Key is 192 bits 0x3
-                                            // Key is 256
-#define AES_CTRL_KEY_SIZE_S   3
-#define AES_CTRL_DIRECTION    0x00000004  // If set to ‘1’ an encrypt
-                                            // operation is performed. If set to
-                                            // ‘0’ a decrypt operation is
-                                            // performed. Read 0 decryption is
-                                            // selected Read 1 Encryption is
-                                            // selected
-#define AES_CTRL_INPUT_READY  0x00000002  // If ‘1’@@ this read-only status
-                                            // bit indicates that the 16-byte
-                                            // input buffer is empty@@ and the
-                                            // host is permitted to write the
-                                            // next block of data.
-#define AES_CTRL_OUTPUT_READY 0x00000001  // If ‘1’@@ this read-only status
-                                            // bit indicates that an AES output
-                                            // block is available for the host
-                                            // to retrieve.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// AES_O_C_LENGTH_0 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// AES_O_C_LENGTH_1 register.
-//
-//******************************************************************************
-#define AES_C_LENGTH_1_LENGTH_M \
-                                0x1FFFFFFF  // Data length (MSW) length
-                                            // registers (LSW and MSW) store the
-                                            // cryptographic data length in
-                                            // bytes for all modes. Once
-                                            // processing with this context is
-                                            // started@@ this length decrements
-                                            // to zero. Data lengths up to (2^61
-                                            // – 1) bytes are allowed. For GCM@@
-                                            // any value up to 2^36 - 32 bytes
-                                            // can be used. This is because a
-                                            // 32-bit counter mode is used; the
-                                            // maximum number of 128-bit blocks
-                                            // is 2^32 – 2@@ resulting in a
-                                            // maximum number of bytes of 2^36 -
-                                            // 32. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. This is valid
-                                            // for all modes except GCM and CCM.
-                                            // Note that for the combined
-                                            // modes@@ this length does not
-                                            // include the authentication only
-                                            // data; the authentication length
-                                            // is specified in the
-                                            // AES_AUTH_LENGTH register below.
-                                            // All modes must have a length > 0.
-                                            // For the combined modes@@ it is
-                                            // allowed to have one of the
-                                            // lengths equal to zero. For the
-                                            // basic encryption modes
-                                            // (ECB/CBC/CTR/ICM/CFB128) it is
-                                            // allowed to program zero to the
-                                            // length field; in that case the
-                                            // length is assumed infinite. All
-                                            // data must be byte (8-bit)
-                                            // aligned; bit aligned data streams
-                                            // are not supported by the AES
-                                            // Engine. For a Host read
-                                            // operation@@ these registers
-                                            // return all-zeroes.
-
-#define AES_C_LENGTH_1_LENGTH_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// AES_O_AUTH_LENGTH register.
-//
-//******************************************************************************
-#define AES_AUTH_LENGTH_AUTH_M \
-                                0xFFFFFFFF  // data
-
-#define AES_AUTH_LENGTH_AUTH_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_0 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_0_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_0_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_1 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_1_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_1_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_2 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_2_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_2_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_3 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_3_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_3_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_0 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_0_HASH_M  0xFFFFFFFF  // Hash result (MSW)
-#define AES_TAG_OUT_0_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_1 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_1_HASH_M  0xFFFFFFFF  // Hash result (MSW)
-#define AES_TAG_OUT_1_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_2 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_2_HASH_M  0xFFFFFFFF  // Hash result (MSW)
-#define AES_TAG_OUT_2_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_3 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_3_HASH_M  0xFFFFFFFF  // Hash result (LSW)
-#define AES_TAG_OUT_3_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_REVISION register.
-//
-//******************************************************************************
-#define AES_REVISION_SCHEME_M 0xC0000000
-#define AES_REVISION_SCHEME_S 30
-#define AES_REVISION_FUNC_M   0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define AES_REVISION_FUNC_S   16
-#define AES_REVISION_R_RTL_M  0x0000F800  // RTL Version (R)@@ maintained by
-                                            // IP design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define AES_REVISION_R_RTL_S  11
-#define AES_REVISION_X_MAJOR_M \
-                                0x00000700  // Major Revision (X)@@ maintained
-                                            // by IP specification owner. X
-                                            // changes ONLY when: (1) There is a
-                                            // major feature addition. An
-                                            // example would be adding Master
-                                            // Mode to Utopia Level2. The Func
-                                            // field (or Class/Type in old PID
-                                            // format) will remain the same. X
-                                            // does NOT change due to: (1) Bug
-                                            // fixes (2) Change in feature
-                                            // parameters.
-
-#define AES_REVISION_X_MAJOR_S 8
-#define AES_REVISION_CUSTOM_M 0x000000C0
-#define AES_REVISION_CUSTOM_S 6
-#define AES_REVISION_Y_MINOR_M \
-                                0x0000003F  // Minor Revision (Y)@@ maintained
-                                            // by IP specification owner. Y
-                                            // changes ONLY when: (1) Features
-                                            // are scaled (up or down).
-                                            // Flexibility exists in that this
-                                            // feature scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R@@ S@@ X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless@@ the spec tracks
-                                            // the IP bugs. An RTL release (say
-                                            // for silicon PG1.1) that occurs
-                                            // due to bug fix should document
-                                            // the corresponding spec number
-                                            // (X.Y.S) in its release notes.
-
-#define AES_REVISION_Y_MINOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define AES_SYSCONFIG_MACONTEXT_OUT_ON_DATA_OUT \
-                                0x00000200  // If set to '1' the two context
-                                            // out requests
-                                            // (dma_req_context_out_en@@ Bit [8]
-                                            // above@@ and context_out interrupt
-                                            // enable@@ Bit [3] of AES_IRQENABLE
-                                            // register) are mapped on the
-                                            // corresponding data output request
-                                            // bit. In this case@@ the original
-                                            // ‘context out’ bit values are
-                                            // ignored.
-
-#define AES_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN \
-                                0x00000100  // If set to ‘1’@@ the DMA context
-                                            // output request is enabled (for
-                                            // context data out@@ e.g. TAG for
-                                            // authentication modes). 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define AES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN \
-                                0x00000080  // If set to ‘1’@@ the DMA context
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define AES_SYSCONFIG_DMA_REQ_DATA_OUT_EN \
-                                0x00000040  // If set to ‘1’@@ the DMA output
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define AES_SYSCONFIG_DMA_REQ_DATA_IN_EN \
-                                0x00000020  // If set to ‘1’@@ the DMA input
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define AES_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define AES_IRQSTATUS_CONTEXT_OUT \
-                                0x00000008  // This bit indicates
-                                            // authentication tag (and IV)
-                                            // interrupt(s) is/are active and
-                                            // triggers the interrupt output.
-
-#define AES_IRQSTATUS_DATA_OUT \
-                                0x00000004  // This bit indicates data output
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-#define AES_IRQSTATUS_DATA_IN 0x00000002  // This bit indicates data input
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-#define AES_IRQSTATUS_CONTEX_IN \
-                                0x00000001  // This bit indicates context
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IRQENABLE register.
-//
-//******************************************************************************
-#define AES_IRQENABLE_CONTEXT_OUT \
-                                0x00000008  // This bit indicates
-                                            // authentication tag (and IV)
-                                            // interrupt(s) is/are active and
-                                            // triggers the interrupt output.
-
-#define AES_IRQENABLE_DATA_OUT \
-                                0x00000004  // This bit indicates data output
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-#define AES_IRQENABLE_DATA_IN 0x00000002  // This bit indicates data input
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-#define AES_IRQENABLE_CONTEX_IN \
-                                0x00000001  // This bit indicates context
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-
-
-
-#endif // __HW_AES_H__
diff --git a/ports/cc3200/hal/inc/hw_apps_config.h b/ports/cc3200/hal/inc/hw_apps_config.h
deleted file mode 100644
index b8789b9802..0000000000
--- a/ports/cc3200/hal/inc/hw_apps_config.h
+++ /dev/null
@@ -1,747 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-
-#ifndef __HW_APPS_CONFIG_H__
-#define __HW_APPS_CONFIG_H__
-
-//*****************************************************************************
-//
-// The following are defines for the APPS_CONFIG register offsets.
-//
-//*****************************************************************************
-#define APPS_CONFIG_O_PATCH_TRAP_ADDR_REG \
-                                0x00000000  // Patch trap address Register
-                                            // array
-
-#define APPS_CONFIG_O_PATCH_TRAP_EN_REG \
-                                0x00000078
-
-#define APPS_CONFIG_O_FAULT_STATUS_REG \
-                                0x0000007C
-
-#define APPS_CONFIG_O_MEMSS_WR_ERR_CLR_REG \
-                                0x00000080
-
-#define APPS_CONFIG_O_MEMSS_WR_ERR_ADDR_REG \
-                                0x00000084
-
-#define APPS_CONFIG_O_DMA_DONE_INT_MASK \
-                                0x0000008C
-
-#define APPS_CONFIG_O_DMA_DONE_INT_MASK_SET \
-                                0x00000090
-
-#define APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR \
-                                0x00000094
-
-#define APPS_CONFIG_O_DMA_DONE_INT_STS_CLR \
-                                0x00000098
-
-#define APPS_CONFIG_O_DMA_DONE_INT_ACK \
-                                0x0000009C
-
-#define APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED \
-                                0x000000A0
-
-#define APPS_CONFIG_O_DMA_DONE_INT_STS_RAW \
-                                0x000000A4
-
-#define APPS_CONFIG_O_FAULT_STATUS_CLR_REG \
-                                0x000000A8
-
-#define APPS_CONFIG_O_RESERVD_REG_0 \
-                                0x000000AC
-
-#define APPS_CONFIG_O_GPT_TRIG_SEL \
-                                0x000000B0
-
-#define APPS_CONFIG_O_TOP_DIE_SPARE_DIN_REG \
-                                0x000000B4
-
-#define APPS_CONFIG_O_TOP_DIE_SPARE_DOUT_REG \
-                                0x000000B8
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_PATCH_TRAP_ADDR_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_PATCH_TRAP_ADDR_REG_PATCH_TRAP_ADDR_M \
-                                0xFFFFFFFF  // When PATCH_TRAP_EN[n] is set bus
-                                            // fault is generated for the
-                                            // address
-                                            // PATCH_TRAP_ADDR_REG[n][31:0] from
-                                            // Idcode bus. The exception routine
-                                            // should take care to jump to the
-                                            // location where the patch
-                                            // correspond to this address is
-                                            // kept.
-
-#define APPS_CONFIG_PATCH_TRAP_ADDR_REG_PATCH_TRAP_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_PATCH_TRAP_EN_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_PATCH_TRAP_EN_REG_PATCH_TRAP_EN_M \
-                                0x3FFFFFFF  // When PATCH_TRAP_EN[n] is set bus
-                                            // fault is generated for the
-                                            // address PATCH_TRAP_ADD[n][31:0]
-                                            // from Idcode bus. The exception
-                                            // routine should take care to jump
-                                            // to the location where the patch
-                                            // correspond to this address is
-                                            // kept.
-
-#define APPS_CONFIG_PATCH_TRAP_EN_REG_PATCH_TRAP_EN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_FAULT_STATUS_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_FAULT_STATUS_REG_PATCH_ERR_INDEX_M \
-                                0x0000003E  // This field shows because of
-                                            // which patch trap address the
-                                            // bus_fault is generated. If the
-                                            // PATCH_ERR bit is set, then it
-                                            // means the bus fault is generated
-                                            // because of
-                                            // PATCH_TRAP_ADDR_REG[2^PATCH_ERR_INDEX]
-
-#define APPS_CONFIG_FAULT_STATUS_REG_PATCH_ERR_INDEX_S 1
-#define APPS_CONFIG_FAULT_STATUS_REG_PATCH_ERR \
-                                0x00000001  // This bit is set when there is a
-                                            // bus fault because of patched
-                                            // address access to the Apps boot
-                                            // rom. Write 0 to clear this
-                                            // register.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_MEMSS_WR_ERR_CLR_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_MEMSS_WR_ERR_CLR_REG_MEMSS_WR_ERR_CLR \
-                                0x00000001  // This bit is set when there is a
-                                            // an error in memss write access.
-                                            // And the address causing this
-                                            // error is captured in
-                                            // MEMSS_ERR_ADDR_REG. To capture
-                                            // the next error address one have
-                                            // to clear this bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_MEMSS_WR_ERR_ADDR_REG register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_MASK register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_MASK_ADC_WR_DMA_DONE_INT_MASK_M \
-                                0x0000F000  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-                                            // bit 14: ADC channel 7 interrupt
-                                            // enable/disable bit 13: ADC
-                                            // channel 5 interrupt
-                                            // enable/disable bit 12: ADC
-                                            // channel 3 interrupt
-                                            // enable/disable bit 11: ADC
-                                            // channel 1 interrupt
-                                            // enable/disable
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_ADC_WR_DMA_DONE_INT_MASK_S 12
-#define APPS_CONFIG_DMA_DONE_INT_MASK_MCASP_WR_DMA_DONE_INT_MASK \
-                                0x00000800  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_MCASP_RD_DMA_DONE_INT_MASK \
-                                0x00000400  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CAM_FIFO_EMPTY_DMA_DONE_INT_MASK \
-                                0x00000200  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CAM_THRESHHOLD_DMA_DONE_INT_MASK \
-                                0x00000100  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SHSPI_WR_DMA_DONE_INT_MASK \
-                                0x00000080  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SHSPI_RD_DMA_DONE_INT_MASK \
-                                0x00000040  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_HOSTSPI_WR_DMA_DONE_INT_MASK \
-                                0x00000020  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_HOSTSPI_RD_DMA_DONE_INT_MASK \
-                                0x00000010  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_APPS_SPI_WR_DMA_DONE_INT_MASK \
-                                0x00000008  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_APPS_SPI_RD_DMA_DONE_INT_MASK \
-                                0x00000004  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SDIOM_WR_DMA_DONE_INT_MASK \
-                                0x00000002  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SDIOM_RD_DMA_DONE_INT_MASK \
-                                0x00000001  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_MASK_SET register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_ADC_WR_DMA_DONE_INT_MASK_SET_M \
-                                0x0000F000  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect bit 14: ADC channel 7 DMA
-                                            // Done IRQ bit 13: ADC channel 5
-                                            // DMA Done IRQ bit 12: ADC channel
-                                            // 3 DMA Done IRQ bit 11: ADC
-                                            // channel 1 DMA Done IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_ADC_WR_DMA_DONE_INT_MASK_SET_S 12
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_MCASP_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000800  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_MCASP_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000400  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_CAM_FIFO_EMPTY_DMA_DONE_INT_MASK_SET \
-                                0x00000200  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_CAM_THRESHHOLD_DMA_DONE_INT_MASK_SET \
-                                0x00000100  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SHSPI_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000080  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SHSPI_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000040  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_HOSTSPI_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000020  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_HOSTSPI_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000010  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_APPS_SPI_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000008  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_APPS_SPI_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000004  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SDIOM_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000002  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SDIOM_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000001  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_ADC_WR_DMA_DONE_INT_MASK_CLR_M \
-                                0x0000F000  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect bit 14: ADC channel 7 DMA
-                                            // Done IRQ mask bit 13: ADC channel
-                                            // 5 DMA Done IRQ mask bit 12: ADC
-                                            // channel 3 DMA Done IRQ mask bit
-                                            // 11: ADC channel 1 DMA Done IRQ
-                                            // mask
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_ADC_WR_DMA_DONE_INT_MASK_CLR_S 12
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_MACASP_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000800  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_MCASP_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000400  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_CAM_FIFO_EMPTY_DMA_DONE_INT_MASK_CLR \
-                                0x00000200  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_CAM_THRESHHOLD_DMA_DONE_INT_MASK_CLR \
-                                0x00000100  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SHSPI_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000080  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SHSPI_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000040  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_HOSTSPI_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000020  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_HOSTSPI_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000010  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_APPS_SPI_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000008  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_APPS_SPI_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000004  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SDIOM_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000002  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SDIOM_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000001  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_STS_CLR register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_STS_CLR_DMA_INT_STS_CLR_M \
-                                0xFFFFFFFF  // write 1 or 0 to clear all
-                                            // DMA_DONE interrupt;
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_CLR_DMA_INT_STS_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_ACK register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_ACK_ADC_WR_DMA_DONE_INT_ACK_M \
-                                0x0000F000  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect; bit 14:
-                                            // ADC channel 7 DMA Done IRQ bit
-                                            // 13: ADC channel 5 DMA Done IRQ
-                                            // bit 12: ADC channel 3 DMA Done
-                                            // IRQ bit 11: ADC channel 1 DMA
-                                            // Done IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_ADC_WR_DMA_DONE_INT_ACK_S 12
-#define APPS_CONFIG_DMA_DONE_INT_ACK_MCASP_WR_DMA_DONE_INT_ACK \
-                                0x00000800  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_MCASP_RD_DMA_DONE_INT_ACK \
-                                0x00000400  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_CAM_FIFO_EMPTY_DMA_DONE_INT_ACK \
-                                0x00000200  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_CAM_THRESHHOLD_DMA_DONE_INT_ACK \
-                                0x00000100  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SHSPI_WR_DMA_DONE_INT_ACK \
-                                0x00000080  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SHSPI_RD_DMA_DONE_INT_ACK \
-                                0x00000040  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_HOSTSPI_WR_DMA_DONE_INT_ACK \
-                                0x00000020  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_HOSTSPI_RD_DMA_DONE_INT_ACK \
-                                0x00000010  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_APPS_SPI_WR_DMA_DONE_INT_ACK \
-                                0x00000008  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_APPS_SPI_RD_DMA_DONE_INT_ACK \
-                                0x00000004  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SDIOM_WR_DMA_DONE_INT_ACK \
-                                0x00000002  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SDIOM_RD_DMA_DONE_INT_ACK \
-                                0x00000001  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_ADC_WR_DMA_DONE_INT_STS_MASKED_M \
-                                0x0000F000  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask bit 14: ADC
-                                            // channel 7 DMA Done IRQ bit 13:
-                                            // ADC channel 5 DMA Done IRQ bit
-                                            // 12: ADC channel 3 DMA Done IRQ
-                                            // bit 11: ADC channel 1 DMA Done
-                                            // IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_ADC_WR_DMA_DONE_INT_STS_MASKED_S 12
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_MCASP_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000800  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_MCASP_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000400  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_CAM_FIFO_EMPTY_DMA_DONE_INT_STS_MASKED \
-                                0x00000200  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_CAM_THRESHHOLD_DMA_DONE_INT_STS_MASKED \
-                                0x00000100  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SHSPI_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000080  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SHSPI_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000040  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_HOSTSPI_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000020  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_HOSTSPI_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000010  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_APPS_SPI_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000008  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_APPS_SPI_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000004  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SDIOM_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000002  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SDIOM_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000001  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_STS_RAW register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_ADC_WR_DMA_DONE_INT_STS_RAW_M \
-                                0x0000F000  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive bit 14: ADC channel 7
-                                            // DMA Done IRQ bit 13: ADC channel
-                                            // 5 DMA Done IRQ bit 12: ADC
-                                            // channel 3 DMA Done IRQ bit 11:
-                                            // ADC channel 1 DMA Done IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_ADC_WR_DMA_DONE_INT_STS_RAW_S 12
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_MCASP_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000800  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_MCASP_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000400  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_CAM_EPMTY_FIFO_DMA_DONE_INT_STS_RAW \
-                                0x00000200  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_CAM_THRESHHOLD_DMA_DONE_INT_STS_RAW \
-                                0x00000100  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SHSPI_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000080  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SHSPI_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000040  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_HOSTSPI_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000020  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_HOSTSPI_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000010  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_APPS_SPI_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000008  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_APPS_SPI_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000004  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SDIOM_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000002  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SDIOM_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000001  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_FAULT_STATUS_CLR_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_FAULT_STATUS_CLR_REG_PATCH_ERR_CLR \
-                                0x00000001  // Write 1 to clear the LSB of
-                                            // FAULT_STATUS_REG
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_RESERVD_REG_0 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_GPT_TRIG_SEL register.
-//
-//******************************************************************************
-#define APPS_CONFIG_GPT_TRIG_SEL_GPT_TRIG_SEL_M \
-                                0x000000FF  // This bit is implemented for GPT
-                                            // trigger mode select. GPT IP
-                                            // support 2 modes: RTC mode and
-                                            // external trigger. When this bit
-                                            // is set to logic '1': enable
-                                            // external trigger mode for APPS
-                                            // GPT CP0 and CP1 pin. bit 0: when
-                                            // set '1' enable external GPT
-                                            // trigger 0 on GPIO0 CP0 pin else
-                                            // RTC mode is selected. bit 1: when
-                                            // set '1' enable external GPT
-                                            // trigger 1 on GPIO0 CP1 pin else
-                                            // RTC mode is selected. bit 2: when
-                                            // set '1' enable external GPT
-                                            // trigger 2 on GPIO1 CP0 pin else
-                                            // RTC mode is selected. bit 3: when
-                                            // set '1' enable external GPT
-                                            // trigger 3 on GPIO1 CP1 pin else
-                                            // RTC mode is selected. bit 4: when
-                                            // set '1' enable external GPT
-                                            // trigger 4 on GPIO2 CP0 pin else
-                                            // RTC mode is selected. bit 5: when
-                                            // set '1' enable external GPT
-                                            // trigger 5 on GPIO2 CP1 pin else
-                                            // RTC mode is selected. bit 6: when
-                                            // set '1' enable external GPT
-                                            // trigger 6 on GPIO3 CP0 pin else
-                                            // RTC mode is selected. bit 7: when
-                                            // set '1' enable external GPT
-                                            // trigger 7 on GPIO3 CP1 pin else
-                                            // RTC mode is selected.
-
-#define APPS_CONFIG_GPT_TRIG_SEL_GPT_TRIG_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_TOP_DIE_SPARE_DIN_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_TOP_DIE_SPARE_DIN_REG_D2D_SPARE_DIN_M \
-                                0x00000007  // Capture data from d2d_spare pads
-
-#define APPS_CONFIG_TOP_DIE_SPARE_DIN_REG_D2D_SPARE_DIN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_TOP_DIE_SPARE_DOUT_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_TOP_DIE_SPARE_DOUT_REG_D2D_SPARE_DOUT_M \
-                                0x00000007  // Send data to d2d_spare pads -
-                                            // eventually this will get
-                                            // registered in top die
-
-#define APPS_CONFIG_TOP_DIE_SPARE_DOUT_REG_D2D_SPARE_DOUT_S 0
-
-
-
-#endif // __HW_APPS_CONFIG_H__
diff --git a/ports/cc3200/hal/inc/hw_apps_rcm.h b/ports/cc3200/hal/inc/hw_apps_rcm.h
deleted file mode 100644
index edb52d26be..0000000000
--- a/ports/cc3200/hal/inc/hw_apps_rcm.h
+++ /dev/null
@@ -1,1506 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_APPS_RCM_H__
-#define __HW_APPS_RCM_H__
-
-//*****************************************************************************
-//
-// The following are defines for the APPS_RCM register offsets.
-//
-//*****************************************************************************
-#define APPS_RCM_O_CAMERA_CLK_GEN \
-                                0x00000000
-
-#define APPS_RCM_O_CAMERA_CLK_GATING \
-                                0x00000004
-
-#define APPS_RCM_O_CAMERA_SOFT_RESET \
-                                0x00000008
-
-#define APPS_RCM_O_MCASP_CLK_GATING \
-                                0x00000014
-
-#define APPS_RCM_O_MCASP_SOFT_RESET \
-                                0x00000018
-
-#define APPS_RCM_O_MMCHS_CLK_GEN \
-                                0x00000020
-
-#define APPS_RCM_O_MMCHS_CLK_GATING \
-                                0x00000024
-
-#define APPS_RCM_O_MMCHS_SOFT_RESET \
-                                0x00000028
-
-#define APPS_RCM_O_MCSPI_A1_CLK_GEN \
-                                0x0000002C
-
-#define APPS_RCM_O_MCSPI_A1_CLK_GATING \
-                                0x00000030
-
-#define APPS_RCM_O_MCSPI_A1_SOFT_RESET \
-                                0x00000034
-
-#define APPS_RCM_O_MCSPI_A2_CLK_GEN \
-                                0x00000038
-
-#define APPS_RCM_O_MCSPI_A2_CLK_GATING \
-                                0x00000040
-
-#define APPS_RCM_O_MCSPI_A2_SOFT_RESET \
-                                0x00000044
-
-#define APPS_RCM_O_UDMA_A_CLK_GATING \
-                                0x00000048
-
-#define APPS_RCM_O_UDMA_A_SOFT_RESET \
-                                0x0000004C
-
-#define APPS_RCM_O_GPIO_A_CLK_GATING \
-                                0x00000050
-
-#define APPS_RCM_O_GPIO_A_SOFT_RESET \
-                                0x00000054
-
-#define APPS_RCM_O_GPIO_B_CLK_GATING \
-                                0x00000058
-
-#define APPS_RCM_O_GPIO_B_SOFT_RESET \
-                                0x0000005C
-
-#define APPS_RCM_O_GPIO_C_CLK_GATING \
-                                0x00000060
-
-#define APPS_RCM_O_GPIO_C_SOFT_RESET \
-                                0x00000064
-
-#define APPS_RCM_O_GPIO_D_CLK_GATING \
-                                0x00000068
-
-#define APPS_RCM_O_GPIO_D_SOFT_RESET \
-                                0x0000006C
-
-#define APPS_RCM_O_GPIO_E_CLK_GATING \
-                                0x00000070
-
-#define APPS_RCM_O_GPIO_E_SOFT_RESET \
-                                0x00000074
-
-#define APPS_RCM_O_WDOG_A_CLK_GATING \
-                                0x00000078
-
-#define APPS_RCM_O_WDOG_A_SOFT_RESET \
-                                0x0000007C
-
-#define APPS_RCM_O_UART_A0_CLK_GATING \
-                                0x00000080
-
-#define APPS_RCM_O_UART_A0_SOFT_RESET \
-                                0x00000084
-
-#define APPS_RCM_O_UART_A1_CLK_GATING \
-                                0x00000088
-
-#define APPS_RCM_O_UART_A1_SOFT_RESET \
-                                0x0000008C
-
-#define APPS_RCM_O_GPT_A0_CLK_GATING \
-                                0x00000090
-
-#define APPS_RCM_O_GPT_A0_SOFT_RESET \
-                                0x00000094
-
-#define APPS_RCM_O_GPT_A1_CLK_GATING \
-                                0x00000098
-
-#define APPS_RCM_O_GPT_A1_SOFT_RESET \
-                                0x0000009C
-
-#define APPS_RCM_O_GPT_A2_CLK_GATING \
-                                0x000000A0
-
-#define APPS_RCM_O_GPT_A2_SOFT_RESET \
-                                0x000000A4
-
-#define APPS_RCM_O_GPT_A3_CLK_GATING \
-                                0x000000A8
-
-#define APPS_RCM_O_GPT_A3_SOFT_RESET \
-                                0x000000AC
-
-#define APPS_RCM_O_MCASP_FRAC_CLK_CONFIG0 \
-                                0x000000B0
-
-#define APPS_RCM_O_MCASP_FRAC_CLK_CONFIG1 \
-                                0x000000B4
-
-#define APPS_RCM_O_CRYPTO_CLK_GATING \
-                                0x000000B8
-
-#define APPS_RCM_O_CRYPTO_SOFT_RESET \
-                                0x000000BC
-
-#define APPS_RCM_O_MCSPI_S0_CLK_GATING \
-                                0x000000C8
-
-#define APPS_RCM_O_MCSPI_S0_SOFT_RESET \
-                                0x000000CC
-
-#define APPS_RCM_O_MCSPI_S0_CLKDIV_CFG \
-                                0x000000D0
-
-#define APPS_RCM_O_I2C_CLK_GATING \
-                                0x000000D8
-
-#define APPS_RCM_O_I2C_SOFT_RESET \
-                                0x000000DC
-
-#define APPS_RCM_O_APPS_LPDS_REQ \
-                                0x000000E4
-
-#define APPS_RCM_O_APPS_TURBO_REQ \
-                                0x000000EC
-
-#define APPS_RCM_O_APPS_DSLP_WAKE_CONFIG \
-                                0x00000108
-
-#define APPS_RCM_O_APPS_DSLP_WAKE_TIMER_CFG \
-                                0x0000010C
-
-#define APPS_RCM_O_APPS_RCM_SLP_WAKE_ENABLE \
-                                0x00000110
-
-#define APPS_RCM_O_APPS_SLP_WAKETIMER_CFG \
-                                0x00000114
-
-#define APPS_RCM_O_APPS_TO_NWP_WAKE_REQUEST \
-                                0x00000118
-
-#define APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS \
-                                0x00000120
-
-#define APPS_RCM_O_APPS_RCM_INTERRUPT_ENABLE \
-                                0x00000124
-
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CAMERA_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of Camera func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_OFF_TIME_S 8
-#define APPS_RCM_CAMERA_CLK_GEN_NU1_M \
-                                0x000000F8
-
-#define APPS_RCM_CAMERA_CLK_GEN_NU1_S 3
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of Camera func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CAMERA_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_CAMERA_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU1_S 17
-#define APPS_RCM_CAMERA_CLK_GATING_CAMERA_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable camera clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU2_S 9
-#define APPS_RCM_CAMERA_CLK_GATING_CAMERA_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable camera clk during
-                                            // sleep mode ; 0- Disable camera
-                                            // clk during sleep mode
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU3_S 1
-#define APPS_RCM_CAMERA_CLK_GATING_CAMERA_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable camera clk during run
-                                            // mode ; 0- Disable camera clk
-                                            // during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CAMERA_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_CAMERA_SOFT_RESET_CAMERA_ENABLED_STATUS \
-                                0x00000002  // 1 - Camera clocks/resets are
-                                            // enabled ; 0 - Camera
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_CAMERA_SOFT_RESET_CAMERA_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for Camera-core
-                                            // ; 0 - De-assert reset for
-                                            // Camera-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MCASP_CLK_GATING_NU1_S 17
-#define APPS_RCM_MCASP_CLK_GATING_MCASP_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MCASP clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MCASP_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCASP_CLK_GATING_NU2_S 9
-#define APPS_RCM_MCASP_CLK_GATING_MCASP_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MCASP clk during sleep
-                                            // mode ; 0- Disable MCASP clk
-                                            // during sleep mode
-
-#define APPS_RCM_MCASP_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MCASP_CLK_GATING_NU3_S 1
-#define APPS_RCM_MCASP_CLK_GATING_MCASP_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MCASP clk during run
-                                            // mode ; 0- Disable MCASP clk
-                                            // during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_SOFT_RESET_MCASP_ENABLED_STATUS \
-                                0x00000002  // 1 - MCASP Clocks/resets are
-                                            // enabled ; 0 - MCASP Clocks/resets
-                                            // are disabled
-
-#define APPS_RCM_MCASP_SOFT_RESET_MCASP_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for MCASP-core
-                                            // ; 0 - De-assert reset for
-                                            // MCASP-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MMCHS_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MMCHS func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_OFF_TIME_S 8
-#define APPS_RCM_MMCHS_CLK_GEN_NU1_M \
-                                0x000000F8
-
-#define APPS_RCM_MMCHS_CLK_GEN_NU1_S 3
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MMCHS func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MMCHS_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MMCHS_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU1_S 17
-#define APPS_RCM_MMCHS_CLK_GATING_MMCHS_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MMCHS clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU2_S 9
-#define APPS_RCM_MMCHS_CLK_GATING_MMCHS_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MMCHS clk during sleep
-                                            // mode ; 0- Disable MMCHS clk
-                                            // during sleep mode
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU3_S 1
-#define APPS_RCM_MMCHS_CLK_GATING_MMCHS_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MMCHS clk during run
-                                            // mode ; 0- Disable MMCHS clk
-                                            // during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MMCHS_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MMCHS_SOFT_RESET_MMCHS_ENABLED_STATUS \
-                                0x00000002  // 1 - MMCHS Clocks/resets are
-                                            // enabled ; 0 - MMCHS Clocks/resets
-                                            // are disabled
-
-#define APPS_RCM_MMCHS_SOFT_RESET_MMCHS_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for MMCHS-core
-                                            // ; 0 - De-assert reset for
-                                            // MMCHS-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A1_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_BAUD_CLK_SEL \
-                                0x00010000  // 0 - XTAL clk is used as baud clk
-                                            // for MCSPI_A1 ; 1 - PLL divclk is
-                                            // used as baud clk for MCSPI_A1.
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU1_M \
-                                0x0000F800
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU1_S 11
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A1 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_OFF_TIME_S 8
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU2_M \
-                                0x000000F8
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU2_S 3
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A1 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A1_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU1_S 17
-#define APPS_RCM_MCSPI_A1_CLK_GATING_MCSPI_A1_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MCSPI_A1 clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU2_S 9
-#define APPS_RCM_MCSPI_A1_CLK_GATING_MCSPI_A1_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MCSPI_A1 clk during
-                                            // sleep mode ; 0- Disable MCSPI_A1
-                                            // clk during sleep mode
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU3_S 1
-#define APPS_RCM_MCSPI_A1_CLK_GATING_MCSPI_A1_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MCSPI_A1 clk during
-                                            // run mode ; 0- Disable MCSPI_A1
-                                            // clk during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A1_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A1_SOFT_RESET_MCSPI_A1_ENABLED_STATUS \
-                                0x00000002  // 1 - MCSPI_A1 Clocks/Resets are
-                                            // enabled ; 0 - MCSPI_A1
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_MCSPI_A1_SOFT_RESET_MCSPI_A1_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for
-                                            // MCSPI_A1-core ; 0 - De-assert
-                                            // reset for MCSPI_A1-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A2_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_BAUD_CLK_SEL \
-                                0x00010000  // 0 - XTAL clk is used as baud-clk
-                                            // for MCSPI_A2 ; 1 - PLL divclk is
-                                            // used as baud-clk for MCSPI_A2
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU1_M \
-                                0x0000F800
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU1_S 11
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A2 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_OFF_TIME_S 8
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU2_M \
-                                0x000000F8
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU2_S 3
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A2 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A2_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU1_S 17
-#define APPS_RCM_MCSPI_A2_CLK_GATING_MCSPI_A2_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MCSPI_A2 clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU2_S 9
-#define APPS_RCM_MCSPI_A2_CLK_GATING_MCSPI_A2_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MCSPI_A2 clk during
-                                            // sleep mode ; 0- Disable MCSPI_A2
-                                            // clk during sleep mode
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU3_S 1
-#define APPS_RCM_MCSPI_A2_CLK_GATING_MCSPI_A2_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MCSPI_A2 clk during
-                                            // run mode ; 0- Disable MCSPI_A2
-                                            // clk during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A2_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A2_SOFT_RESET_MCSPI_A2_ENABLED_STATUS \
-                                0x00000002  // 1 - MCSPI_A2 Clocks/Resets are
-                                            // enabled ; 0 - MCSPI_A2
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_MCSPI_A2_SOFT_RESET_MCSPI_A2_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for
-                                            // MCSPI_A2-core ; 0 - De-assert
-                                            // reset for MCSPI_A2-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UDMA_A_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_UDMA_A_CLK_GATING_UDMA_A_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable UDMA_A clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // UDMA_A clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU1_S 9
-#define APPS_RCM_UDMA_A_CLK_GATING_UDMA_A_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable UDMA_A clk during
-                                            // sleep mode 0 - Disable UDMA_A clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU2_S 1
-#define APPS_RCM_UDMA_A_CLK_GATING_UDMA_A_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable UDMA_A clk during run
-                                            // mode 0 - Disable UDMA_A clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UDMA_A_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_UDMA_A_SOFT_RESET_UDMA_A_ENABLED_STATUS \
-                                0x00000002  // 1 - UDMA_A Clocks/Resets are
-                                            // enabled ; 0 - UDMA_A
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_UDMA_A_SOFT_RESET_UDMA_A_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for DMA_A ; 0 -
-                                            // De-assert reset for DMA_A
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_A_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_A clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_A clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_A clk during
-                                            // sleep mode 0 - Disable GPIO_A clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_A clk during run
-                                            // mode 0 - Disable GPIO_A clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_A_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_A_SOFT_RESET_GPIO_A_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_A Clocks/Resets are
-                                            // enabled ; 0 - GPIO_A
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_A_SOFT_RESET_GPIO_A_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_A ; 0
-                                            // - De-assert reset for GPIO_A
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_B_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_B clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_B clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_B clk during
-                                            // sleep mode 0 - Disable GPIO_B clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_B clk during run
-                                            // mode 0 - Disable GPIO_B clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_B_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_B_SOFT_RESET_GPIO_B_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_B Clocks/Resets are
-                                            // enabled ; 0 - GPIO_B
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_B_SOFT_RESET_GPIO_B_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_B ; 0
-                                            // - De-assert reset for GPIO_B
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_C_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_C clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_C clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_C clk during
-                                            // sleep mode 0 - Disable GPIO_C clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_C clk during run
-                                            // mode 0 - Disable GPIO_C clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_C_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_C_SOFT_RESET_GPIO_C_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_C Clocks/Resets are
-                                            // enabled ; 0 - GPIO_C
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_C_SOFT_RESET_GPIO_C_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_C ; 0
-                                            // - De-assert reset for GPIO_C
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_D_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_D clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_D clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_D clk during
-                                            // sleep mode 0 - Disable GPIO_D clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_D clk during run
-                                            // mode 0 - Disable GPIO_D clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_D_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_D_SOFT_RESET_GPIO_D_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_D Clocks/Resets are
-                                            // enabled ; 0 - GPIO_D
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_D_SOFT_RESET_GPIO_D_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_D ; 0
-                                            // - De-assert reset for GPIO_D
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_E_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_E clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_E clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_E clk during
-                                            // sleep mode 0 - Disable GPIO_E clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_E clk during run
-                                            // mode 0 - Disable GPIO_E clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_E_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_E_SOFT_RESET_GPIO_E_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_E Clocks/Resets are
-                                            // enabled ; 0 - GPIO_E
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_E_SOFT_RESET_GPIO_E_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_E ; 0
-                                            // - De-assert reset for GPIO_E
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_WDOG_A_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_BAUD_CLK_SEL_M \
-                                0x03000000  // "00" - Sysclk ; "01" - REF_CLK
-                                            // (38.4 MHz) ; "10/11" - Slow_clk
-
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_BAUD_CLK_SEL_S 24
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable WDOG_A clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // WDOG_A clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU1_S 9
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable WDOG_A clk during
-                                            // sleep mode 0 - Disable WDOG_A clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU2_S 1
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable WDOG_A clk during run
-                                            // mode 0 - Disable WDOG_A clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_WDOG_A_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_WDOG_A_SOFT_RESET_WDOG_A_ENABLED_STATUS \
-                                0x00000002  // 1 - WDOG_A Clocks/Resets are
-                                            // enabled ; 0 - WDOG_A
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_WDOG_A_SOFT_RESET_WDOG_A_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for WDOG_A ; 0
-                                            // - De-assert reset for WDOG_A
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A0_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A0_CLK_GATING_UART_A0_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable UART_A0 clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // UART_A0 clk during deep-sleep
-                                            // mode ;
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU1_S 9
-#define APPS_RCM_UART_A0_CLK_GATING_UART_A0_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable UART_A0 clk during
-                                            // sleep mode 0 - Disable UART_A0
-                                            // clk during sleep mode ;
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU2_S 1
-#define APPS_RCM_UART_A0_CLK_GATING_UART_A0_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable UART_A0 clk during
-                                            // run mode 0 - Disable UART_A0 clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A0_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A0_SOFT_RESET_UART_A0_ENABLED_STATUS \
-                                0x00000002  // 1 - UART_A0 Clocks/Resets are
-                                            // enabled ; 0 - UART_A0
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_UART_A0_SOFT_RESET_UART_A0_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for UART_A0 ; 0
-                                            // - De-assert reset for UART_A0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A1_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A1_CLK_GATING_UART_A1_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable UART_A1 clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // UART_A1 clk during deep-sleep
-                                            // mode ;
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU1_S 9
-#define APPS_RCM_UART_A1_CLK_GATING_UART_A1_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable UART_A1 clk during
-                                            // sleep mode 0 - Disable UART_A1
-                                            // clk during sleep mode ;
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU2_S 1
-#define APPS_RCM_UART_A1_CLK_GATING_UART_A1_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable UART_A1 clk during
-                                            // run mode 0 - Disable UART_A1 clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A1_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A1_SOFT_RESET_UART_A1_ENABLED_STATUS \
-                                0x00000002  // 1 - UART_A1 Clocks/Resets are
-                                            // enabled ; 0 - UART_A1
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_UART_A1_SOFT_RESET_UART_A1_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // UART_A1 ; 0 - De-assert the soft
-                                            // reset for UART_A1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A0_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A0_CLK_GATING_GPT_A0_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A0 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A0 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A0_CLK_GATING_GPT_A0_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A0 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A0 clock during sleep
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A0_CLK_GATING_GPT_A0_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A0 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A0 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A0_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A0_SOFT_RESET_GPT_A0_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A0 clocks/resets are
-                                            // enabled ; 0 - GPT_A0
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_GPT_A0_SOFT_RESET_GPT_A0_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A0 ; 0 - De-assert the soft
-                                            // reset for GPT_A0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A1_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A1_CLK_GATING_GPT_A1_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A1 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A1 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A1_CLK_GATING_GPT_A1_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A1 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A1 clock during sleep
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A1_CLK_GATING_GPT_A1_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A1 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A1 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A1_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A1_SOFT_RESET_GPT_A1_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A1 clocks/resets are
-                                            // enabled ; 0 - GPT_A1
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_GPT_A1_SOFT_RESET_GPT_A1_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A1 ; 0 - De-assert the soft
-                                            // reset for GPT_A1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A2_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A2_CLK_GATING_GPT_A2_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A2 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A2 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A2_CLK_GATING_GPT_A2_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A2 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A2 clock during sleep
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A2_CLK_GATING_GPT_A2_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A2 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A2 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A2_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A2_SOFT_RESET_GPT_A2_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A2 clocks/resets are
-                                            // enabled ; 0 - GPT_A2
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_GPT_A2_SOFT_RESET_GPT_A2_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A2 ; 0 - De-assert the soft
-                                            // reset for GPT_A2
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A3_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A3_CLK_GATING_GPT_A3_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A3 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A3 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A3_CLK_GATING_GPT_A3_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A3 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A3 clock during sleep
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A3_CLK_GATING_GPT_A3_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A3 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A3 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A3_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A3_SOFT_RESET_GPT_A3_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A3 Clocks/resets are
-                                            // enabled ; 0 - GPT_A3
-                                            // Clocks/resets are disabled
-
-#define APPS_RCM_GPT_A3_SOFT_RESET_GPT_A3_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A3 ; 0 - De-assert the soft
-                                            // reset for GPT_A3
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_FRAC_CLK_CONFIG0 register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_DIVISOR_M \
-                                0x03FF0000
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_DIVISOR_S 16
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_FRACTION_M \
-                                0x0000FFFF
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_FRACTION_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_FRAC_CLK_CONFIG1 register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG1_MCASP_FRAC_DIV_SOFT_RESET \
-                                0x00010000  // 1 - Assert the reset for MCASP
-                                            // Frac-clk div; 0 - Donot assert
-                                            // the reset for MCASP frac clk-div
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG1_MCASP_FRAC_DIV_PERIOD_M \
-                                0x000003FF
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG1_MCASP_FRAC_DIV_PERIOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CRYPTO_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_CRYPTO_CLK_GATING_CRYPTO_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable the Crypto clock
-                                            // during deep-sleep
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU1_S 9
-#define APPS_RCM_CRYPTO_CLK_GATING_CRYPTO_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the Crypto clock
-                                            // during sleep ; 0 - Disable the
-                                            // Crypto clock during sleep
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU2_S 1
-#define APPS_RCM_CRYPTO_CLK_GATING_CRYPTO_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the Crypto clock
-                                            // during run ; 0 - Disable the
-                                            // Crypto clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CRYPTO_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_CRYPTO_SOFT_RESET_CRYPTO_ENABLED_STATUS \
-                                0x00000002  // 1 - Crypto clocks/resets are
-                                            // enabled ; 0 - Crypto
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_CRYPTO_SOFT_RESET_CRYPTO_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // Crypto ; 0 - De-assert the soft
-                                            // reset for Crypto
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_S0_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_S0_CLK_GATING_MCSPI_S0_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable the MCSPI_S0 clock
-                                            // during deep-sleep
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU1_S 9
-#define APPS_RCM_MCSPI_S0_CLK_GATING_MCSPI_S0_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the MCSPI_S0 clock
-                                            // during sleep ; 0 - Disable the
-                                            // MCSPI_S0 clock during sleep
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU2_S 1
-#define APPS_RCM_MCSPI_S0_CLK_GATING_MCSPI_S0_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the MCSPI_S0 clock
-                                            // during run ; 0 - Disable the
-                                            // MCSPI_S0 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_S0_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_S0_SOFT_RESET_MCSPI_S0_ENABLED_STATUS \
-                                0x00000002  // 1 - MCSPI_S0 Clocks/Resets are
-                                            // enabled ; 0 - MCSPI_S0
-                                            // Clocks/resets are disabled
-
-#define APPS_RCM_MCSPI_S0_SOFT_RESET_MCSPI_S0_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // MCSPI_S0 ; 0 - De-assert the soft
-                                            // reset for MCSPI_S0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_S0_CLKDIV_CFG register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_BAUD_CLK_SEL \
-                                0x00010000  // 0 - XTAL clk is used as baud-clk
-                                            // for MCSPI_S0 ; 1 - PLL divclk is
-                                            // used as buad-clk for MCSPI_S0
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU1_M \
-                                0x0000F800
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU1_S 11
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_S0 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_OFF_TIME_S 8
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU2_M \
-                                0x000000F8
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU2_S 3
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_S0 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_I2C_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_I2C_CLK_GATING_I2C_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the I2C Clock during
-                                            // deep-sleep 0 - Disable the I2C
-                                            // clock during deep-sleep
-
-#define APPS_RCM_I2C_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_I2C_CLK_GATING_NU1_S 9
-#define APPS_RCM_I2C_CLK_GATING_I2C_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the I2C clock during
-                                            // sleep ; 0 - Disable the I2C clock
-                                            // during sleep
-
-#define APPS_RCM_I2C_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_I2C_CLK_GATING_NU2_S 1
-#define APPS_RCM_I2C_CLK_GATING_I2C_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the I2C clock during
-                                            // run ; 0 - Disable the I2C clock
-                                            // during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_I2C_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_I2C_SOFT_RESET_I2C_ENABLED_STATUS \
-                                0x00000002  // 1 - I2C Clocks/Resets are
-                                            // enabled ; 0 - I2C clocks/resets
-                                            // are disabled
-
-#define APPS_RCM_I2C_SOFT_RESET_I2C_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // Shared-I2C ; 0 - De-assert the
-                                            // soft reset for Shared-I2C
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_LPDS_REQ register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ \
-                                0x00000001  // 1 - Request for LPDS
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_TURBO_REQ register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_TURBO_REQ_APPS_TURBO_REQ \
-                                0x00000001  // 1 - Request for TURBO
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_DSLP_WAKE_CONFIG register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_DSLP_WAKE_CONFIG_DSLP_WAKE_FROM_NWP_ENABLE \
-                                0x00000002  // 1 - Enable the NWP to wake APPS
-                                            // from deep-sleep ; 0 - Disable NWP
-                                            // to wake APPS from deep-sleep
-
-#define APPS_RCM_APPS_DSLP_WAKE_CONFIG_DSLP_WAKE_TIMER_ENABLE \
-                                0x00000001  // 1 - Enable deep-sleep wake timer
-                                            // in APPS RCM for deep-sleep; 0 -
-                                            // Disable deep-sleep wake timer in
-                                            // APPS RCM
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_DSLP_WAKE_TIMER_CFG register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_OPP_CFG_M \
-                                0xFFFF0000  // Configuration (in slow_clks)
-                                            // which says when to request for
-                                            // OPP during deep-sleep exit
-
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_OPP_CFG_S 16
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_WAKE_CFG_M \
-                                0x0000FFFF  // Configuration (in slow_clks)
-                                            // which says when to request for
-                                            // WAKE during deep-sleep exit
-
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_WAKE_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_RCM_SLP_WAKE_ENABLE register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_RCM_SLP_WAKE_ENABLE_SLP_WAKE_FROM_NWP_ENABLE \
-                                0x00000002  // 1- Enable the sleep wakeup due
-                                            // to NWP request. 0- Disable the
-                                            // sleep wakeup due to NWP request
-
-#define APPS_RCM_APPS_RCM_SLP_WAKE_ENABLE_SLP_WAKE_TIMER_ENABLE \
-                                0x00000001  // 1- Enable the sleep wakeup due
-                                            // to sleep-timer; 0-Disable the
-                                            // sleep wakeup due to sleep-timer
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_SLP_WAKETIMER_CFG register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_SLP_WAKETIMER_CFG_SLP_WAKE_TIMER_CFG_M \
-                                0xFFFFFFFF  // Configuration (number of
-                                            // sysclks-80MHz) for the Sleep
-                                            // wakeup timer
-
-#define APPS_RCM_APPS_SLP_WAKETIMER_CFG_SLP_WAKE_TIMER_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_TO_NWP_WAKE_REQUEST register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_TO_NWP_WAKE_REQUEST_APPS_TO_NWP_WAKEUP_REQUEST \
-                                0x00000001  // When 1 => APPS generated a wake
-                                            // request to NWP (When NWP is in
-                                            // any of its low-power modes :
-                                            // SLP/DSLP/LPDS)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_deep_sleep_timer_wake \
-                                0x00000008  // 1 - Indicates that deep-sleep
-                                            // timer expiry had caused the
-                                            // wakeup from deep-sleep
-
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_sleep_timer_wake \
-                                0x00000004  // 1 - Indicates that sleep timer
-                                            // expiry had caused the wakeup from
-                                            // sleep
-
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_deep_sleep_wake_from_nwp \
-                                0x00000002  // 1 - Indicates that NWP had
-                                            // caused the wakeup from deep-sleep
-
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_sleep_wake_from_nwp \
-                                0x00000001  // 1 - Indicates that NWP had
-                                            // caused the wakeup from Sleep
-
-
-
-
-#endif // __HW_APPS_RCM_H__
diff --git a/ports/cc3200/hal/inc/hw_camera.h b/ports/cc3200/hal/inc/hw_camera.h
deleted file mode 100644
index 4461a28467..0000000000
--- a/ports/cc3200/hal/inc/hw_camera.h
+++ /dev/null
@@ -1,519 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_CAMERA_H__
-#define __HW_CAMERA_H__
-
-//*****************************************************************************
-//
-// The following are defines for the CAMERA register offsets.
-//
-//*****************************************************************************
-#define CAMERA_O_CC_REVISION    0x00000000  // This register contains the IP
-                                            // revision code ( Parallel Mode)
-#define CAMERA_O_CC_SYSCONFIG   0x00000010  // This register controls the
-                                            // various parameters of the OCP
-                                            // interface (CCP and Parallel Mode)
-#define CAMERA_O_CC_SYSSTATUS   0x00000014  // This register provides status
-                                            // information about the module
-                                            // excluding the interrupt status
-                                            // information (CCP and Parallel
-                                            // Mode)
-#define CAMERA_O_CC_IRQSTATUS   0x00000018  // The interrupt status regroups
-                                            // all the status of the module
-                                            // internal events that can generate
-                                            // an interrupt (CCP & Parallel
-                                            // Mode)
-#define CAMERA_O_CC_IRQENABLE   0x0000001C  // The interrupt enable register
-                                            // allows to enable/disable the
-                                            // module internal sources of
-                                            // interrupt on an event-by-event
-                                            // basis (CCP & Parallel Mode)
-#define CAMERA_O_CC_CTRL        0x00000040  // This register controls the
-                                            // various parameters of the Camera
-                                            // Core block (CCP & Parallel Mode)
-#define CAMERA_O_CC_CTRL_DMA    0x00000044  // This register controls the DMA
-                                            // interface of the Camera Core
-                                            // block (CCP & Parallel Mode)
-#define CAMERA_O_CC_CTRL_XCLK   0x00000048  // This register control the value
-                                            // of the clock divisor used to
-                                            // generate the external clock
-                                            // (Parallel Mode)
-#define CAMERA_O_CC_FIFO_DATA   0x0000004C  // This register allows to write to
-                                            // the FIFO and read from the FIFO
-                                            // (CCP & Parallel Mode)
-#define CAMERA_O_CC_TEST        0x00000050  // This register shows the status
-                                            // of some important variables of
-                                            // the camera core module (CCP &
-                                            // Parallel Mode)
-#define CAMERA_O_CC_GEN_PAR     0x00000054  // This register shows the values
-                                            // of the generic parameters of the
-                                            // module
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_REVISION register.
-//
-//******************************************************************************
-#define CAMERA_CC_REVISION_REV_M \
-                                0x000000FF  // IP revision [7:4] Major revision
-                                            // [3:0] Minor revision Examples:
-                                            // 0x10 for 1.0 0x21 for 2.1
-
-#define CAMERA_CC_REVISION_REV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_SYSCONFIG register.
-//
-//******************************************************************************
-#define CAMERA_CC_SYSCONFIG_S_IDLE_MODE_M \
-                                0x00000018  // Slave interface power management
-                                            // req/ack control """00""
-                                            // Force-idle. An idle request is
-                                            // acknoledged unconditionally"
-                                            // """01"" No-idle. An idle request
-                                            // is never acknowledged" """10""
-                                            // reserved (Smart-idle not
-                                            // implemented)"
-
-#define CAMERA_CC_SYSCONFIG_S_IDLE_MODE_S 3
-#define CAMERA_CC_SYSCONFIG_SOFT_RESET \
-                                0x00000002  // Software reset. Set this bit to
-                                            // 1 to trigger a module reset. The
-                                            // bit is automatically reset by the
-                                            // hardware. During reset it always
-                                            // returns 0. 0 Normal mode 1 The
-                                            // module is reset
-
-#define CAMERA_CC_SYSCONFIG_AUTO_IDLE \
-                                0x00000001  // Internal OCP clock gating
-                                            // strategy 0 OCP clock is
-                                            // free-running 1 Automatic OCP
-                                            // clock gating strategy is applied
-                                            // based on the OCP interface
-                                            // activity
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_SYSSTATUS register.
-//
-//******************************************************************************
-#define CAMERA_CC_SYSSTATUS_RESET_DONE2 \
-                                0x00000001  // Internal Reset Monitoring 0
-                                            // Internal module reset is on-going
-                                            // 1 Reset completed
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_IRQSTATUS register.
-//
-//******************************************************************************
-#define CAMERA_CC_IRQSTATUS_FS_IRQ \
-                                0x00080000  // Frame Start has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_LE_IRQ \
-                                0x00040000  // Line End has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_LS_IRQ \
-                                0x00020000  // Line Start has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FE_IRQ \
-                                0x00010000  // Frame End has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FSP_ERR_IRQ \
-                                0x00000800  // FSP code error 0 Event false "1
-                                            // Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FW_ERR_IRQ \
-                                0x00000400  // Frame Height Error 0 Event false
-                                            // "1 Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FSC_ERR_IRQ \
-                                0x00000200  // False Synchronization Code 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_SSC_ERR_IRQ \
-                                0x00000100  // Shifted Synchronization Code 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_NONEMPTY_IRQ \
-                                0x00000010  // FIFO is not empty 0 Event false
-                                            // "1 Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_FULL_IRQ \
-                                0x00000008  // FIFO is full 0 Event false "1
-                                            // Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_THR_IRQ \
-                                0x00000004  // FIFO threshold has been reached
-                                            // 0 Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_OF_IRQ \
-                                0x00000002  // FIFO overflow has occurred 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_UF_IRQ \
-                                0x00000001  // FIFO underflow has occurred 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_IRQENABLE register.
-//
-//******************************************************************************
-#define CAMERA_CC_IRQENABLE_FS_IRQ_EN \
-                                0x00080000  // Frame Start Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_LE_IRQ_EN \
-                                0x00040000  // Line End Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_LS_IRQ_EN \
-                                0x00020000  // Line Start Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FE_IRQ_EN \
-                                0x00010000  // Frame End Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FSP_IRQ_EN \
-                                0x00000800  // FSP code Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FW_ERR_IRQ_EN \
-                                0x00000400  // Frame Height Error Interrupt
-                                            // Enable 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FSC_ERR_IRQ_EN \
-                                0x00000200  // False Synchronization Code
-                                            // Interrupt Enable 0 Event is
-                                            // masked 1 Event generates an
-                                            // interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_SSC_ERR_IRQ_EN \
-                                0x00000100  // False Synchronization Code
-                                            // Interrupt Enable 0 Event is
-                                            // masked 1 Event generates an
-                                            // interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_NONEMPTY_IRQ_EN \
-                                0x00000010  // FIFO Threshold Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_FULL_IRQ_EN \
-                                0x00000008  // FIFO Threshold Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_THR_IRQ_EN \
-                                0x00000004  // FIFO Threshold Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_OF_IRQ_EN \
-                                0x00000002  // FIFO Overflow Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_UF_IRQ_EN \
-                                0x00000001  // FIFO Underflow Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the CAMERA_O_CC_CTRL register.
-//
-//******************************************************************************
-#define CAMERA_CC_CTRL_CC_IF_SYNCHRO \
-                                0x00080000  // Synchronize all camera sensor
-                                            // inputs This must be set during
-                                            // the configuration phase before
-                                            // CC_EN set to '1'. This can be
-                                            // used in very high frequency to
-                                            // avoid dependancy to the IO
-                                            // timings. 0 No synchro (most of
-                                            // applications) 1 Synchro enabled
-                                            // (should never be required)
-
-#define CAMERA_CC_CTRL_CC_RST   0x00040000  // Resets all the internal finite
-                                            // states machines of the camera
-                                            // core module - by writing a 1 to
-                                            // this bit. must be applied when
-                                            // CC_EN = 0 Reads returns 0
-#define CAMERA_CC_CTRL_CC_FRAME_TRIG \
-                                0x00020000  // Set the modality in which CC_EN
-                                            // works when a disabling of the
-                                            // sensor camera core is wanted "If
-                                            // CC_FRAME_TRIG = 1 by writing
-                                            // ""0"" to CC_EN" the module is
-                                            // disabled at the end of the frame
-                                            // "If CC_FRAME_TRIG = 0 by writing
-                                            // ""0"" to CC_EN" the module is
-                                            // disabled immediately
-
-#define CAMERA_CC_CTRL_CC_EN    0x00010000  // Enables the sensor interface of
-                                            // the camera core module "By
-                                            // writing ""1"" to this field the
-                                            // module is enabled." "By writing
-                                            // ""0"" to this field the module is
-                                            // disabled at" the end of the frame
-                                            // if CC_FRAM_TRIG =1 and is
-                                            // disabled immediately if
-                                            // CC_FRAM_TRIG = 0
-#define CAMERA_CC_CTRL_NOBT_SYNCHRO \
-                                0x00002000  // Enables to start at the
-                                            // beginning of the frame or not in
-                                            // NoBT 0 Acquisition starts when
-                                            // Vertical synchro is high 1
-                                            // Acquisition starts when Vertical
-                                            // synchro goes from low to high
-                                            // (beginning of the frame) -
-                                            // Recommended.
-
-#define CAMERA_CC_CTRL_BT_CORRECT \
-                                0x00001000  // Enables the correction within
-                                            // the sync codes in BT mode 0
-                                            // correction is not enabled 1
-                                            // correction is enabled
-
-#define CAMERA_CC_CTRL_PAR_ORDERCAM \
-                                0x00000800  // Enables swap between image-data
-                                            // in parallel mode 0 swap is not
-                                            // enabled 1 swap is enabled
-
-#define CAMERA_CC_CTRL_PAR_CLK_POL \
-                                0x00000400  // Inverts the clock coming from
-                                            // the sensor in parallel mode 0
-                                            // clock not inverted - data sampled
-                                            // on rising edge 1 clock inverted -
-                                            // data sampled on falling edge
-
-#define CAMERA_CC_CTRL_NOBT_HS_POL \
-                                0x00000200  // Sets the polarity of the
-                                            // synchronization signals in NOBT
-                                            // parallel mode 0 CAM_P_HS is
-                                            // active high 1 CAM_P_HS is active
-                                            // low
-
-#define CAMERA_CC_CTRL_NOBT_VS_POL \
-                                0x00000100  // Sets the polarity of the
-                                            // synchronization signals in NOBT
-                                            // parallel mode 0 CAM_P_VS is
-                                            // active high 1 CAM_P_VS is active
-                                            // low
-
-#define CAMERA_CC_CTRL_PAR_MODE_M \
-                                0x0000000E  // Sets the Protocol Mode of the
-                                            // Camera Core module in parallel
-                                            // mode (when CCP_MODE = 0) """000""
-                                            // Parallel NOBT 8-bit" """001""
-                                            // Parallel NOBT 10-bit" """010""
-                                            // Parallel NOBT 12-bit" """011""
-                                            // reserved" """100"" Parallet BT
-                                            // 8-bit" """101"" Parallel BT
-                                            // 10-bit" """110"" reserved"
-                                            // """111"" FIFO test mode. Refer to
-                                            // Table 12 - FIFO Write and Read
-                                            // access"
-
-#define CAMERA_CC_CTRL_PAR_MODE_S 1
-#define CAMERA_CC_CTRL_CCP_MODE 0x00000001  // Set the Camera Core in CCP mode
-                                            // 0 CCP mode disabled 1 CCP mode
-                                            // enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_CTRL_DMA register.
-//
-//******************************************************************************
-#define CAMERA_CC_CTRL_DMA_DMA_EN \
-                                0x00000100  // Sets the number of dma request
-                                            // lines 0 DMA interface disabled
-                                            // The DMA request line stays
-                                            // inactive 1 DMA interface enabled
-                                            // The DMA request line is
-                                            // operational
-
-#define CAMERA_CC_CTRL_DMA_FIFO_THRESHOLD_M \
-                                0x0000007F  // Sets the threshold of the FIFO
-                                            // the assertion of the dmarequest
-                                            // line takes place when the
-                                            // threshold is reached.
-                                            // """0000000"" threshold set to 1"
-                                            // """0000001"" threshold set to 2"
-                                            // … """1111111"" threshold set to
-                                            // 128"
-
-#define CAMERA_CC_CTRL_DMA_FIFO_THRESHOLD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_CTRL_XCLK register.
-//
-//******************************************************************************
-#define CAMERA_CC_CTRL_XCLK_XCLK_DIV_M \
-                                0x0000001F  // Sets the clock divisor value for
-                                            // CAM_XCLK generation. based on
-                                            // CAM_MCK (value of CAM_MCLK is
-                                            // 96MHz) """00000"" CAM_XCLK Stable
-                                            // Low Level" Divider not enabled
-                                            // """00001"" CAM_XCLK Stable High
-                                            // Level" Divider not enabled from 2
-                                            // to 30 CAM_XCLK = CAM_MCLK /
-                                            // XCLK_DIV """11111"" Bypass -
-                                            // CAM_XCLK = CAM_MCLK"
-
-#define CAMERA_CC_CTRL_XCLK_XCLK_DIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_FIFO_DATA register.
-//
-//******************************************************************************
-#define CAMERA_CC_FIFO_DATA_FIFO_DATA_M \
-                                0xFFFFFFFF  // Writes the 32-bit word into the
-                                            // FIFO Reads the 32-bit word from
-                                            // the FIFO
-
-#define CAMERA_CC_FIFO_DATA_FIFO_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the CAMERA_O_CC_TEST register.
-//
-//******************************************************************************
-#define CAMERA_CC_TEST_FIFO_RD_POINTER_M \
-                                0xFF000000  // FIFO READ Pointer This field
-                                            // shows the value of the FIFO read
-                                            // pointer Expected value ranges
-                                            // from 0 to 127
-
-#define CAMERA_CC_TEST_FIFO_RD_POINTER_S 24
-#define CAMERA_CC_TEST_FIFO_WR_POINTER_M \
-                                0x00FF0000  // FIFO WRITE pointer This field
-                                            // shows the value of the FIFO write
-                                            // pointer Expected value ranges
-                                            // from 0 to 127
-
-#define CAMERA_CC_TEST_FIFO_WR_POINTER_S 16
-#define CAMERA_CC_TEST_FIFO_LEVEL_M \
-                                0x0000FF00  // FIFO level (how many 32-bit
-                                            // words the FIFO contains) This
-                                            // field shows the value of the FIFO
-                                            // level and can assume values from
-                                            // 0 to 128
-
-#define CAMERA_CC_TEST_FIFO_LEVEL_S 8
-#define CAMERA_CC_TEST_FIFO_LEVEL_PEAK_M \
-                                0x000000FF  // FIFO level peak This field shows
-                                            // the max value of the FIFO level
-                                            // and can assume values from 0 to
-                                            // 128
-
-#define CAMERA_CC_TEST_FIFO_LEVEL_PEAK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_GEN_PAR register.
-//
-//******************************************************************************
-#define CAMERA_CC_GEN_PAR_CC_FIFO_DEPTH_M \
-                                0x00000007  // Camera Core FIFO DEPTH generic
-                                            // parameter
-
-#define CAMERA_CC_GEN_PAR_CC_FIFO_DEPTH_S 0
-
-
-
-#endif // __HW_CAMERA_H__
diff --git a/ports/cc3200/hal/inc/hw_common_reg.h b/ports/cc3200/hal/inc/hw_common_reg.h
deleted file mode 100644
index 417544ad48..0000000000
--- a/ports/cc3200/hal/inc/hw_common_reg.h
+++ /dev/null
@@ -1,1117 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_COMMON_REG_H__
-#define __HW_COMMON_REG_H__
-
-//*****************************************************************************
-//
-// The following are defines for the COMMON_REG register offsets.
-//
-//*****************************************************************************
-#define COMMON_REG_O_I2C_Properties_Register \
-                                0x00000000
-
-#define COMMON_REG_O_SPI_Properties_Register \
-                                0x00000004
-
-#define COMMON_REG_O_APPS_sh_resource_Interrupt_enable \
-                                0x0000000C
-
-#define COMMON_REG_O_APPS_sh_resource_Interrupt_status \
-                                0x00000010
-
-#define COMMON_REG_O_NWP_sh_resource_Interrupt_enable \
-                                0x00000014
-
-#define COMMON_REG_O_NWP_sh_resource_Interrupt_status \
-                                0x00000018
-
-#define COMMON_REG_O_Flash_ctrl_reg \
-                                0x0000001C
-
-#define COMMON_REG_O_Bus_matrix_M0_segment_access_config \
-                                0x00000024
-
-#define COMMON_REG_O_Bus_matrix_M1_segment_access_config \
-                                0x00000028
-
-#define COMMON_REG_O_Bus_matrix_M2_segment_access_config \
-                                0x0000002C
-
-#define COMMON_REG_O_Bus_matrix_M3_segment_access_config \
-                                0x00000030
-
-#define COMMON_REG_O_Bus_matrix_M4_segment_access_config \
-                                0x00000034
-
-#define COMMON_REG_O_Bus_matrix_M5_segment_access_config \
-                                0x00000038
-
-#define COMMON_REG_O_GPIO_properties_register \
-                                0x0000003C
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE1 \
-                                0x00000040
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE2 \
-                                0x00000044
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE3 \
-                                0x00000048
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE4 \
-                                0x0000004C
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE5 \
-                                0x00000050
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE6 \
-                                0x00000054
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE7 \
-                                0x00000058
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE8 \
-                                0x0000005C
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE9 \
-                                0x00000060
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE10 \
-                                0x00000064
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE11 \
-                                0x00000068
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE12 \
-                                0x0000006C
-
-#define COMMON_REG_O_APPS_SEMAPPHORE_PEND \
-                                0x00000070
-
-#define COMMON_REG_O_NW_SEMAPPHORE_PEND \
-                                0x00000074
-
-#define COMMON_REG_O_SEMAPHORE_STATUS \
-                                0x00000078
-
-#define COMMON_REG_O_IDMEM_TIM_Update \
-                                0x0000007C
-
-#define COMMON_REG_O_FPGA_ROM_WR_EN \
-                                0x00000080
-
-#define COMMON_REG_O_NW_INT_MASK \
-                                0x00000084
-
-#define COMMON_REG_O_NW_INT_MASK_SET \
-                                0x00000088
-
-#define COMMON_REG_O_NW_INT_MASK_CLR \
-                                0x0000008C
-
-#define COMMON_REG_O_NW_INT_STS_CLR \
-                                0x00000090
-
-#define COMMON_REG_O_NW_INT_ACK 0x00000094
-#define COMMON_REG_O_NW_INT_TRIG \
-                                0x00000098
-
-#define COMMON_REG_O_NW_INT_STS_MASKED \
-                                0x0000009C
-
-#define COMMON_REG_O_NW_INT_STS_RAW \
-                                0x000000A0
-
-#define COMMON_REG_O_APPS_INT_MASK \
-                                0x000000A4
-
-#define COMMON_REG_O_APPS_INT_MASK_SET \
-                                0x000000A8
-
-#define COMMON_REG_O_APPS_INT_MASK_CLR \
-                                0x000000AC
-
-#define COMMON_REG_O_APPS_INT_STS_CLR \
-                                0x000000B0
-
-#define COMMON_REG_O_APPS_INT_ACK \
-                                0x000000B4
-
-#define COMMON_REG_O_APPS_INT_TRIG \
-                                0x000000B8
-
-#define COMMON_REG_O_APPS_INT_STS_MASKED \
-                                0x000000BC
-
-#define COMMON_REG_O_APPS_INT_STS_RAW \
-                                0x000000C0
-
-#define COMMON_REG_O_IDMEM_TIM_Updated \
-                                0x000000C4
-
-#define COMMON_REG_O_APPS_GPIO_TRIG_EN \
-                                0x000000C8
-
-#define COMMON_REG_O_EMU_DEBUG_REG \
-                                0x000000CC
-
-#define COMMON_REG_O_SEMAPHORE_STATUS2 \
-                                0x000000D0
-
-#define COMMON_REG_O_SEMAPHORE_PREV_OWNER1 \
-                                0x000000D4
-
-#define COMMON_REG_O_SEMAPHORE_PREV_OWNER2 \
-                                0x000000D8
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_I2C_Properties_Register register.
-//
-//******************************************************************************
-#define COMMON_REG_I2C_Properties_Register_I2C_Properties_Register_M \
-                                0x00000003  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_I2C_Properties_Register_I2C_Properties_Register_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SPI_Properties_Register register.
-//
-//******************************************************************************
-#define COMMON_REG_SPI_Properties_Register_SPI_Properties_Register_M \
-                                0x00000003  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_SPI_Properties_Register_SPI_Properties_Register_S 0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_sh_resource_Interrupt_enable register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_sh_resource_Interrupt_enable_APPS_sh_resource_Interrupt_enable_M \
-                                0x0000000F  // Interrupt enable APPS bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_APPS_sh_resource_Interrupt_enable_APPS_sh_resource_Interrupt_enable_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_sh_resource_Interrupt_status register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_sh_resource_Interrupt_status_APPS_sh_resource_Interrupt_status_M \
-                                0x0000000F  // Interrupt enable APPS bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_APPS_sh_resource_Interrupt_status_APPS_sh_resource_Interrupt_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NWP_sh_resource_Interrupt_enable register.
-//
-//******************************************************************************
-#define COMMON_REG_NWP_sh_resource_Interrupt_enable_NWP_sh_resource_Interrupt_enable_M \
-                                0x0000000F  // Interrupt enable NWP bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_NWP_sh_resource_Interrupt_enable_NWP_sh_resource_Interrupt_enable_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NWP_sh_resource_Interrupt_status register.
-//
-//******************************************************************************
-#define COMMON_REG_NWP_sh_resource_Interrupt_status_NWP_sh_resource_Interrupt_status_M \
-                                0x0000000F  // Interrupt enable NWP bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_NWP_sh_resource_Interrupt_status_NWP_sh_resource_Interrupt_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Flash_ctrl_reg register.
-//
-//******************************************************************************
-#define COMMON_REG_Flash_ctrl_reg_Flash_ctrl_reg_M \
-                                0x00000003  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_Flash_ctrl_reg_Flash_ctrl_reg_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M0_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M0_segment_access_config_Bus_matrix_M0_segment_access_config_M \
-                                0x0003FFFF  // Master 0 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M0_segment_access_config_Bus_matrix_M0_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M1_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M1_segment_access_config_Bus_matrix_M1_segment_access_config_M \
-                                0x0003FFFF  // Master 1 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M1_segment_access_config_Bus_matrix_M1_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M2_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M2_segment_access_config_Bus_matrix_M2_segment_access_config_M \
-                                0x0003FFFF  // Master 2 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M2_segment_access_config_Bus_matrix_M2_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M3_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M3_segment_access_config_Bus_matrix_M3_segment_access_config_M \
-                                0x0003FFFF  // Master 3 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M3_segment_access_config_Bus_matrix_M3_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M4_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M4_segment_access_config_Bus_matrix_M4_segment_access_config_M \
-                                0x0003FFFF  // Master 4 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M4_segment_access_config_Bus_matrix_M4_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M5_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M5_segment_access_config_Bus_matrix_M5_segment_access_config_M \
-                                0x0003FFFF  // Master 5 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M5_segment_access_config_Bus_matrix_M5_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_GPIO_properties_register register.
-//
-//******************************************************************************
-#define COMMON_REG_GPIO_properties_register_GPIO_properties_register_M \
-                                0x000003FF  // Shared GPIO configuration
-                                            // register. Bit [1:0] to configure
-                                            // GPIO0 Bit [3:2] to configure
-                                            // GPIO1 Bit [5:4] to configure
-                                            // GPIO2 Bit [7:6] to configure
-                                            // GPIO3 Bit [9:8] to configure
-                                            // GPIO4 each GPIO can be
-                                            // individully selected. When “00”
-                                            // GPIO is free resource. When “01”
-                                            // GPIO is APPS resource. When “10”
-                                            // GPIO is NWP resource. Writing 11
-                                            // doesnt have any affect, i.e. If
-                                            // one write only relevant gpio
-                                            // semaphore and other bits are 1s,
-                                            // it'll not disturb the other
-                                            // semaphore bits. For example : Say
-                                            // If NW wants to take control of
-                                            // gpio-1, one should write
-                                            // 10'b11_1111_1011 and if one wants
-                                            // to release it write
-                                            // 10'b11_1111_0011.
-
-#define COMMON_REG_GPIO_properties_register_GPIO_properties_register_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE1 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE1_APPS_NW_SEMAPHORE1_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE1_APPS_NW_SEMAPHORE1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE2 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE2_APPS_NW_SEMAPHORE2_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE2_APPS_NW_SEMAPHORE2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE3 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE3_APPS_NW_SEMAPHORE3_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE3_APPS_NW_SEMAPHORE3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE4 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE4_APPS_NW_SEMAPHORE4_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE4_APPS_NW_SEMAPHORE4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE5 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE5_APPS_NW_SEMAPHORE5_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE5_APPS_NW_SEMAPHORE5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE6 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE6_APPS_NW_SEMAPHORE6_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE6_APPS_NW_SEMAPHORE6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE7 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE7_APPS_NW_SEMAPHORE7_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE7_APPS_NW_SEMAPHORE7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE8 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE8_APPS_NW_SEMAPHORE8_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE8_APPS_NW_SEMAPHORE8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE9 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE9_APPS_NW_SEMAPHORE9_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE9_APPS_NW_SEMAPHORE9_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE10 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE10_APPS_NW_SEMAPHORE10_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE10_APPS_NW_SEMAPHORE10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE11 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE11_APPS_NW_SEMAPHORE11_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE11_APPS_NW_SEMAPHORE11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE12 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE12_APPS_NW_SEMAPHORE12_M \
-                                0xFFFFFFFF  // APPS NW semaphore register - not
-                                            // reflected in status.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE12_APPS_NW_SEMAPHORE12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_SEMAPPHORE_PEND register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_SEMAPPHORE_PEND_APPS_SEMAPPHORE_PEND_M \
-                                0xFFFFFFFF  // APPS SEMAPOHORE STATUS
-
-#define COMMON_REG_APPS_SEMAPPHORE_PEND_APPS_SEMAPPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_SEMAPPHORE_PEND register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_SEMAPPHORE_PEND_NW_SEMAPPHORE_PEND_M \
-                                0xFFFFFFFF  // NW SEMAPHORE STATUS
-
-#define COMMON_REG_NW_SEMAPPHORE_PEND_NW_SEMAPPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_STATUS register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_STATUS_SEMAPHORE_STATUS_M \
-                                0xFFFFFFFF  // SEMAPHORE STATUS 9:8 :semaphore
-                                            // status of flash_control 7:6
-                                            // :semaphore status of
-                                            // gpio_properties 5:4
-                                            // :semaphore status of
-                                            // spi_propertie 1:0 :semaphore
-                                            // status of i2c_propertie
-
-#define COMMON_REG_SEMAPHORE_STATUS_SEMAPHORE_STATUS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_IDMEM_TIM_Update register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_FPGA_ROM_WR_EN register.
-//
-//******************************************************************************
-#define COMMON_REG_FPGA_ROM_WR_EN_FPGA_ROM_WR_EN \
-                                0x00000001  // when '1' enables Write into
-                                            // IDMEM CORE ROM, APPS ROM, NWP ROM
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_MASK register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_MASK_NW_INT_MASK_M \
-                                0xFFFFFFFF  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define COMMON_REG_NW_INT_MASK_NW_INT_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_MASK_SET register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_MASK_SET_NW_INT_MASK_SET_M \
-                                0xFFFFFFFF  // write 1 to set corresponding bit
-                                            // in NW_INT_MASK;0 = no effect
-
-#define COMMON_REG_NW_INT_MASK_SET_NW_INT_MASK_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_MASK_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_MASK_CLR_NW_INT_MASK_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // bit in NW_INT_MASK;0 = no effect
-
-#define COMMON_REG_NW_INT_MASK_CLR_NW_INT_MASK_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_STS_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_STS_CLR_NW_INT_STS_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-                                            // interrupt is not lost if coincide
-                                            // with write operation
-
-#define COMMON_REG_NW_INT_STS_CLR_NW_INT_STS_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_ACK register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_ACK_NW_INT_ACK_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt;0 = no effect
-
-#define COMMON_REG_NW_INT_ACK_NW_INT_ACK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_TRIG register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_TRIG_NW_INT_TRIG_M \
-                                0xFFFFFFFF  // Writing a 1 to a bit in this
-                                            // register causes the the Host CPU
-                                            // if enabled (not masked). This
-                                            // register is self-clearing.
-                                            // Writing 0 has no effect
-
-#define COMMON_REG_NW_INT_TRIG_NW_INT_TRIG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_STS_MASKED register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_STS_MASKED_NW_INT_STS_MASKED_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by NW_INT mask
-
-#define COMMON_REG_NW_INT_STS_MASKED_NW_INT_STS_MASKED_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_STS_RAW register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_STS_RAW_NW_INT_STS_RAW_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define COMMON_REG_NW_INT_STS_RAW_NW_INT_STS_RAW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_MASK register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_MASK_APPS_INT_MASK_M \
-                                0xFFFFFFFF  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define COMMON_REG_APPS_INT_MASK_APPS_INT_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_MASK_SET register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_MASK_SET_APPS_INT_MASK_SET_M \
-                                0xFFFFFFFF  // write 1 to set corresponding bit
-                                            // in APPS_INT_MASK;0 = no effect
-
-#define COMMON_REG_APPS_INT_MASK_SET_APPS_INT_MASK_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_MASK_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_MASK_CLR_APPS_INT_MASK_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // bit in APPS_INT_MASK;0 = no
-                                            // effect
-
-#define COMMON_REG_APPS_INT_MASK_CLR_APPS_INT_MASK_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_STS_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_STS_CLR_APPS_INT_STS_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-                                            // interrupt is not lost if coincide
-                                            // with write operation
-
-#define COMMON_REG_APPS_INT_STS_CLR_APPS_INT_STS_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_ACK register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_ACK_APPS_INT_ACK_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt;0 = no effect
-
-#define COMMON_REG_APPS_INT_ACK_APPS_INT_ACK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_TRIG register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_TRIG_APPS_INT_TRIG_M \
-                                0xFFFFFFFF  // Writing a 1 to a bit in this
-                                            // register causes the the Host CPU
-                                            // if enabled (not masked). This
-                                            // register is self-clearing.
-                                            // Writing 0 has no effect
-
-#define COMMON_REG_APPS_INT_TRIG_APPS_INT_TRIG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_STS_MASKED register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_STS_MASKED_APPS_INT_STS_MASKED_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by APPS_INT mask
-
-#define COMMON_REG_APPS_INT_STS_MASKED_APPS_INT_STS_MASKED_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_STS_RAW register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_STS_RAW_APPS_INT_STS_RAW_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define COMMON_REG_APPS_INT_STS_RAW_APPS_INT_STS_RAW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_IDMEM_TIM_Updated register.
-//
-//******************************************************************************
-#define COMMON_REG_IDMEM_TIM_Updated_TIM_UPDATED \
-                                0x00000001  // toggle in this signal
-                                            // indicatesIDMEM_TIM_UPDATE
-                                            // register mentioned above is
-                                            // updated.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_GPIO_TRIG_EN register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_GPIO_TRIG_EN_APPS_GPIO_TRIG_EN_M \
-                                0x0000001F  // APPS GPIO Trigger EN control.
-                                            // Bit 0: when '1' enable GPIO 0
-                                            // trigger. This bit enables trigger
-                                            // for all GPIO 0 pins (GPIO 0 to
-                                            // GPIO7). Bit 1: when '1' enable
-                                            // GPIO 1 trigger. This bit enables
-                                            // trigger for all GPIO 1 pins (
-                                            // GPIO8 to GPIO15). Bit 2: when '1'
-                                            // enable GPIO 2 trigger. This bit
-                                            // enables trigger for all GPIO 2
-                                            // pins (GPIO16 to GPIO23). Bit 3:
-                                            // when '1' enable GPIO 3 trigger.
-                                            // This bit enables trigger for all
-                                            // GPIO 3 pins (GPIO24 to GPIO31).
-                                            // Bit 4: when '1' enable GPIO 4
-                                            // trigger. This bit enables trigger
-                                            // for all GPIO 4 pins.(GPIO32 to
-                                            // GPIO39)
-
-#define COMMON_REG_APPS_GPIO_TRIG_EN_APPS_GPIO_TRIG_EN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_EMU_DEBUG_REG register.
-//
-//******************************************************************************
-#define COMMON_REG_EMU_DEBUG_REG_EMU_DEBUG_REG_M \
-                                0xFFFFFFFF  // 0 th bit used for stalling APPS
-                                            // DMA and 1st bit is used for
-                                            // stalling NWP DMA for debug
-                                            // purpose. Other bits are unused.
-
-#define COMMON_REG_EMU_DEBUG_REG_EMU_DEBUG_REG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_STATUS2 register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_STATUS2_SEMPAPHORE_STATUS2_M \
-                                0x00FFFFFF  // SEMAPHORE STATUS 23:22
-                                            // :semaphore status of
-                                            // apps_nw_semaphore11 21:20
-                                            // :semaphore status of
-                                            // apps_nw_semaphore11 19:18
-                                            // :semaphore status of
-                                            // apps_nw_semaphore10 17:16
-                                            // :semaphore status of
-                                            // apps_nw_semaphore9 15:14
-                                            // :semaphore status of
-                                            // apps_nw_semaphore8 13:12
-                                            // :semaphore status of
-                                            // apps_nw_semaphore7 11:10
-                                            // :semaphore status of
-                                            // apps_nw_semaphore6 9:8 :semaphore
-                                            // status of apps_nw_semaphore5 7:6
-                                            // :semaphore status of
-                                            // apps_nw_semaphore4 5:4 :semaphore
-                                            // status of apps_nw_semaphore3 3:2
-                                            // :semaphore status of
-                                            // apps_nw_semaphore2 1:0 :semaphore
-                                            // status of apps_nw_semaphore1
-
-#define COMMON_REG_SEMAPHORE_STATUS2_SEMPAPHORE_STATUS2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_PREV_OWNER1 register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_PREV_OWNER1_SEMAPHORE_PREV_OWNER1_M \
-                                0x0003FFFF  // 1:0 : prvious owner of
-                                            // i2c_properties_reg[1:0] 3:2 :
-                                            // prvious owner of
-                                            // spi_properties_reg[1:0] 5:4 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[1:0] 9:8 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[3:2] 11:10 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[5:4] 13:12 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[7:6] 15:14 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[9:8] 17:16 :
-                                            // prvious owner of
-                                            // flash_control_reg[1:0]
-
-#define COMMON_REG_SEMAPHORE_PREV_OWNER1_SEMAPHORE_PREV_OWNER1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_PREV_OWNER2 register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_PREV_OWNER2_SEMAPHORE_PREV_OWNER2_M \
-                                0x00FFFFFF  // 1:0 : previous owner of
-                                            // apps_nw_semaphore1_reg[1:0] 3:2 :
-                                            // previous owner of
-                                            // apps_nw_semaphore2_reg[1:0] 5:4 :
-                                            // previous owner of
-                                            // apps_nw_semaphore3_reg[1:0] 7:6 :
-                                            // previous owner of
-                                            // apps_nw_semaphore4_reg[1:0] 9:8 :
-                                            // previous owner of
-                                            // apps_nw_semaphore5_reg[1:0] 11:10
-                                            // : previous owner of
-                                            // apps_nw_semaphore6_reg[1:0] 13:12
-                                            // : previous owner of
-                                            // apps_nw_semaphore7_reg[1:0] 15:14
-                                            // : previous owner of
-                                            // apps_nw_semaphore8_reg[1:0] 17:16
-                                            // : previous owner of
-                                            // apps_nw_semaphore9_reg[1:0] 19:18
-                                            // : previous owner of
-                                            // apps_nw_semaphore10_reg[1:0]
-                                            // 21:20 : previous owner of
-                                            // apps_nw_semaphore11_reg[1:0]
-                                            // 23:22 : previous owner of
-                                            // apps_nw_semaphore12_reg[1:0]
-
-#define COMMON_REG_SEMAPHORE_PREV_OWNER2_SEMAPHORE_PREV_OWNER2_S 0
-
-
-
-#endif // __HW_COMMON_REG_H__
diff --git a/ports/cc3200/hal/inc/hw_des.h b/ports/cc3200/hal/inc/hw_des.h
deleted file mode 100644
index c3aed65627..0000000000
--- a/ports/cc3200/hal/inc/hw_des.h
+++ /dev/null
@@ -1,339 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_DES_H__
-#define __HW_DES_H__
-
-//*****************************************************************************
-//
-// The following are defines for the DES_P register offsets.
-//
-//*****************************************************************************
-#define DES_O_KEY3_L          0x00000000  // KEY3 (LSW) for 192-bit key
-#define DES_O_KEY3_H          0x00000004  // KEY3 (MSW) for 192-bit key
-#define DES_O_KEY2_L          0x00000008  // KEY2 (LSW) for 192-bit key
-#define DES_O_KEY2_H          0x0000000C  // KEY2 (MSW) for 192-bit key
-#define DES_O_KEY1_L          0x00000010  // KEY1 (LSW) for 128-bit
-                                            // key/192-bit key
-#define DES_O_KEY1_H          0x00000014  // KEY1 (LSW) for 128-bit
-                                            // key/192-bit key
-#define DES_O_IV_L            0x00000018  // Initialization vector LSW
-#define DES_O_IV_H            0x0000001C  // Initialization vector MSW
-#define DES_O_CTRL            0x00000020
-#define DES_O_LENGTH          0x00000024  // Indicates the cryptographic data
-                                            // length in bytes for all modes.
-                                            // Once processing is started with
-                                            // this context this length
-                                            // decrements to zero. Data lengths
-                                            // up to (2^32 – 1) bytes are
-                                            // allowed. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. For a Host
-                                            // read operation these registers
-                                            // return all-zeroes.
-#define DES_O_DATA_L          0x00000028  // Data register(LSW) to read/write
-                                            // encrypted/decrypted data.
-#define DES_O_DATA_H          0x0000002C  // Data register(MSW) to read/write
-                                            // encrypted/decrypted data.
-#define DES_O_REVISION        0x00000030
-#define DES_O_SYSCONFIG       0x00000034
-#define DES_O_SYSSTATUS       0x00000038
-#define DES_O_IRQSTATUS       0x0000003C  // This register indicates the
-                                            // interrupt status. If one of the
-                                            // interrupt bits is set the
-                                            // interrupt output will be asserted
-#define DES_O_IRQENABLE       0x00000040  // This register contains an enable
-                                            // bit for each unique interrupt
-                                            // generated by the module. It
-                                            // matches the layout of
-                                            // DES_IRQSTATUS register. An
-                                            // interrupt is enabled when the bit
-                                            // in this register is set to 1
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY3_L register.
-//
-//******************************************************************************
-#define DES_KEY3_L_KEY3_L_M   0xFFFFFFFF  // data for key3
-#define DES_KEY3_L_KEY3_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY3_H register.
-//
-//******************************************************************************
-#define DES_KEY3_H_KEY3_H_M   0xFFFFFFFF  // data for key3
-#define DES_KEY3_H_KEY3_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY2_L register.
-//
-//******************************************************************************
-#define DES_KEY2_L_KEY2_L_M   0xFFFFFFFF  // data for key2
-#define DES_KEY2_L_KEY2_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY2_H register.
-//
-//******************************************************************************
-#define DES_KEY2_H_KEY2_H_M   0xFFFFFFFF  // data for key2
-#define DES_KEY2_H_KEY2_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY1_L register.
-//
-//******************************************************************************
-#define DES_KEY1_L_KEY1_L_M   0xFFFFFFFF  // data for key1
-#define DES_KEY1_L_KEY1_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY1_H register.
-//
-//******************************************************************************
-#define DES_KEY1_H_KEY1_H_M   0xFFFFFFFF  // data for key1
-#define DES_KEY1_H_KEY1_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IV_L register.
-//
-//******************************************************************************
-#define DES_IV_L_IV_L_M       0xFFFFFFFF  // initialization vector for CBC
-                                            // CFB modes
-#define DES_IV_L_IV_L_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IV_H register.
-//
-//******************************************************************************
-#define DES_IV_H_IV_H_M       0xFFFFFFFF  // initialization vector for CBC
-                                            // CFB modes
-#define DES_IV_H_IV_H_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_CTRL register.
-//
-//******************************************************************************
-#define DES_CTRL_CONTEXT      0x80000000  // If ‘1’ this read-only status bit
-                                            // indicates that the context data
-                                            // registers can be overwritten and
-                                            // the host is permitted to write
-                                            // the next context.
-#define DES_CTRL_MODE_M       0x00000030  // Select CBC ECB or CFB mode 0x0
-                                            // ecb mode 0x1 cbc mode 0x2 cfb
-                                            // mode 0x3 reserved
-#define DES_CTRL_MODE_S       4
-#define DES_CTRL_TDES         0x00000008  // Select DES or triple DES
-                                            // encryption/decryption. 0 des mode
-                                            // 1 tdes mode
-#define DES_CTRL_DIRECTION    0x00000004  // select encryption/decryption 0
-                                            // decryption is selected 1
-                                            // Encryption is selected
-#define DES_CTRL_INPUT_READY  0x00000002  // When '1' ready to
-                                            // encrypt/decrypt data
-#define DES_CTRL_OUTPUT_READY 0x00000001  // When '1' Data
-                                            // decrypted/encrypted ready
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_LENGTH register.
-//
-//******************************************************************************
-#define DES_LENGTH_LENGTH_M   0xFFFFFFFF
-#define DES_LENGTH_LENGTH_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_DATA_L register.
-//
-//******************************************************************************
-#define DES_DATA_L_DATA_L_M   0xFFFFFFFF  // data for encryption/decryption
-#define DES_DATA_L_DATA_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_DATA_H register.
-//
-//******************************************************************************
-#define DES_DATA_H_DATA_H_M   0xFFFFFFFF  // data for encryption/decryption
-#define DES_DATA_H_DATA_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_REVISION register.
-//
-//******************************************************************************
-#define DES_REVISION_SCHEME_M 0xC0000000
-#define DES_REVISION_SCHEME_S 30
-#define DES_REVISION_FUNC_M   0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define DES_REVISION_FUNC_S   16
-#define DES_REVISION_R_RTL_M  0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define DES_REVISION_R_RTL_S  11
-#define DES_REVISION_X_MAJOR_M \
-                                0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-
-#define DES_REVISION_X_MAJOR_S 8
-#define DES_REVISION_CUSTOM_M 0x000000C0
-#define DES_REVISION_CUSTOM_S 6
-#define DES_REVISION_Y_MINOR_M \
-                                0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-
-#define DES_REVISION_Y_MINOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define DES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN \
-                                0x00000080  // If set to ‘1’ the DMA context
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define DES_SYSCONFIG_DMA_REQ_DATA_OUT_EN \
-                                0x00000040  // If set to ‘1’ the DMA output
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define DES_SYSCONFIG_DMA_REQ_DATA_IN_EN \
-                                0x00000020  // If set to ‘1’ the DMA input
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define DES_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define DES_IRQSTATUS_DATA_OUT \
-                                0x00000004  // This bit indicates data output
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-#define DES_IRQSTATUS_DATA_IN 0x00000002  // This bit indicates data input
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-#define DES_IRQSTATUS_CONTEX_IN \
-                                0x00000001  // This bit indicates context
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IRQENABLE register.
-//
-//******************************************************************************
-#define DES_IRQENABLE_M_DATA_OUT \
-                                0x00000004  // If this bit is set to ‘1’ the
-                                            // secure data output interrupt is
-                                            // enabled.
-
-#define DES_IRQENABLE_M_DATA_IN \
-                                0x00000002  // If this bit is set to ‘1’ the
-                                            // secure data input interrupt is
-                                            // enabled.
-
-#define DES_IRQENABLE_M_CONTEX_IN \
-                                0x00000001  // If this bit is set to ‘1’ the
-                                            // secure context interrupt is
-                                            // enabled.
-
-
-
-
-#endif // __HW_DES_H__
diff --git a/ports/cc3200/hal/inc/hw_dthe.h b/ports/cc3200/hal/inc/hw_dthe.h
deleted file mode 100644
index 1d302f426b..0000000000
--- a/ports/cc3200/hal/inc/hw_dthe.h
+++ /dev/null
@@ -1,392 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-//*****************************************************************************
-
-#ifndef __HW_DTHE_H__
-#define __HW_DTHE_H__
-
-//*****************************************************************************
-//
-// The following are defines for the DTHE register offsets.
-//
-//*****************************************************************************
-#define DTHE_O_SHA_IM    0x00000810
-#define DTHE_O_SHA_RIS    0x00000814
-#define DTHE_O_SHA_MIS    0x00000818
-#define DTHE_O_SHA_IC    0x0000081C
-#define DTHE_O_AES_IM    0x00000820
-#define DTHE_O_AES_RIS    0x00000824
-#define DTHE_O_AES_MIS    0x00000828
-#define DTHE_O_AES_IC    0x0000082C
-#define DTHE_O_DES_IM    0x00000830
-#define DTHE_O_DES_RIS    0x00000834
-#define DTHE_O_DES_MIS    0x00000838
-#define DTHE_O_DES_IC    0x0000083C
-#define DTHE_O_EIP_CGCFG      0x00000A00
-#define DTHE_O_EIP_CGREQ      0x00000A04
-#define DTHE_O_CRC_CTRL       0x00000C00
-#define DTHE_O_CRC_SEED       0x00000C10
-#define DTHE_O_CRC_DIN        0x00000C14
-#define DTHE_O_CRC_RSLT_PP    0x00000C18
-#define DTHE_O_RAND_KEY0      0x00000F00
-#define DTHE_O_RAND_KEY1      0x00000F04
-#define DTHE_O_RAND_KEY2      0x00000F08
-#define DTHE_O_RAND_KEY3      0x00000F0C
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_IMST register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_IMST_DIN  0x00000004  // Data in: this interrupt is
-                                            // raised when DMA writes last word
-                                            // of input data to internal FIFO of
-                                            // the engine
-#define DTHE_SHAMD5_IMST_COUT 0x00000002  // Context out: this interrupt is
-                                            // raised when DMA complets the
-                                            // output context movement from
-                                            // internal register
-#define DTHE_SHAMD5_IMST_CIN  0x00000001  // context in: this interrupt is
-                                            // raised when DMA complets Context
-                                            // write to internal register
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_IRIS register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_IRIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_SHAMD5_IRIS_COUT 0x00000002  // Context output is done
-#define DTHE_SHAMD5_IRIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_IMIS register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_IMIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_SHAMD5_IMIS_COUT 0x00000002  // Context output is done
-#define DTHE_SHAMD5_IMIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_ICIS register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_ICIS_DIN  0x00000004  // Clear “input Data movement done”
-                                            // flag
-#define DTHE_SHAMD5_ICIS_COUT 0x00000002  // Clear “Context output done” flag
-#define DTHE_SHAMD5_ICIS_CIN  0x00000001  // Clear “context input done” flag
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_IMST register.
-//
-//******************************************************************************
-#define DTHE_AES_IMST_DOUT 0x00000008  // Data out: this interrupt is
-                                            // raised when DMA finishes writing
-                                            // last word of the process result
-#define DTHE_AES_IMST_DIN  0x00000004  // Data in: this interrupt is
-                                            // raised when DMA writes last word
-                                            // of input data to internal FIFO of
-                                            // the engine
-#define DTHE_AES_IMST_COUT 0x00000002  // Context out: this interrupt is
-                                            // raised when DMA complets the
-                                            // output context movement from
-                                            // internal register
-#define DTHE_AES_IMST_CIN  0x00000001  // context in: this interrupt is
-                                            // raised when DMA complets Context
-                                            // write to internal register
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_IRIS register.
-//
-//******************************************************************************
-#define DTHE_AES_IRIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_AES_IRIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_AES_IRIS_COUT 0x00000002  // Context output is done
-#define DTHE_AES_IRIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_IMIS register.
-//
-//******************************************************************************
-#define DTHE_AES_IMIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_AES_IMIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_AES_IMIS_COUT 0x00000002  // Context output is done
-#define DTHE_AES_IMIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_ICIS register.
-//
-//******************************************************************************
-#define DTHE_AES_ICIS_DOUT 0x00000008  // Clear “output Data movement
-                                            // done” flag
-#define DTHE_AES_ICIS_DIN  0x00000004  // Clear “input Data movement done”
-                                            // flag
-#define DTHE_AES_ICIS_COUT 0x00000002  // Clear “Context output done” flag
-#define DTHE_AES_ICIS_CIN  0x00000001  // Clear “context input done” flag
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_IMST register.
-//
-//******************************************************************************
-#define DTHE_DES_IMST_DOUT 0x00000008  // Data out: this interrupt is
-                                            // raised when DMA finishes writing
-                                            // last word of the process result
-#define DTHE_DES_IMST_DIN  0x00000004  // Data in: this interrupt is
-                                            // raised when DMA writes last word
-                                            // of input data to internal FIFO of
-                                            // the engine
-#define DTHE_DES_IMST_CIN  0x00000001  // context in: this interrupt is
-                                            // raised when DMA complets Context
-                                            // write to internal register
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_IRIS register.
-//
-//******************************************************************************
-#define DTHE_DES_IRIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_DES_IRIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_DES_IRIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_IMIS register.
-//
-//******************************************************************************
-#define DTHE_DES_IMIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_DES_IMIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_DES_IMIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_ICIS register.
-//
-//******************************************************************************
-#define DTHE_DES_ICIS_DOUT 0x00000008  // Clear “output Data movement
-                                            // done” flag
-#define DTHE_DES_ICIS_DIN  0x00000004  // Clear “input Data movement done”
-                                            // flag
-#define DTHE_DES_ICIS_CIN  0x00000001  // Clear "context input done” flag
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_EIP_CGCFG register.
-//
-//******************************************************************************
-#define DTHE_EIP_CGCFG_EIP29_CFG \
-                                0x00000010  // Clock gating protocol setting
-                                            // for EIP29T. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP75_CFG \
-                                0x00000008  // Clock gating protocol setting
-                                            // for EIP75T. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP16_CFG \
-                                0x00000004  // Clock gating protocol setting
-                                            // for DES. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP36_CFG \
-                                0x00000002  // Clock gating protocol setting
-                                            // for AES. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP57_CFG \
-                                0x00000001  // Clock gating protocol setting
-                                            // for SHAMD5. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_EIP_CGREQ register.
-//
-//******************************************************************************
-#define DTHE_EIP_CGREQ_Key_M  0xF0000000  // When “0x5” write “1” to lower
-                                            // bits [4:0] will set the bit.
-                                            // Write “0” will be ignored When
-                                            // “0x2” write “1” to lower bit
-                                            // [4:0] will clear the bit. Write
-                                            // “0” will be ignored for other key
-                                            // value, regular read write
-                                            // operation
-#define DTHE_EIP_CGREQ_Key_S  28
-#define DTHE_EIP_CGREQ_EIP29_REQ \
-                                0x00000010  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP75_REQ \
-                                0x00000008  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP16_REQ \
-                                0x00000004  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP36_REQ \
-                                0x00000002  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP57_REQ \
-                                0x00000001  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DTHE_O_CRC_CTRL register.
-//
-//******************************************************************************
-#define DTHE_CRC_CTRL_INIT_M  0x00006000  // Initialize the CRC 00 – use SEED
-                                            // register context as starting
-                                            // value 10 – all “zero” 11 – all
-                                            // “one” This is self clearing. With
-                                            // first write to data register this
-                                            // value clears to zero and remain
-                                            // zero for rest of the operation
-                                            // unless written again
-#define DTHE_CRC_CTRL_INIT_S  13
-#define DTHE_CRC_CTRL_SIZE    0x00001000  // Input data size 0 – 32 bit 1 – 8
-                                            // bit
-#define DTHE_CRC_CTRL_OINV    0x00000200  // Inverse the bits of result
-                                            // before storing to CRC_RSLT_PP0
-#define DTHE_CRC_CTRL_OBR     0x00000100  // Bit reverse the output result
-                                            // byte before storing to
-                                            // CRC_RSLT_PP0. applicable for all
-                                            // bytes in word
-#define DTHE_CRC_CTRL_IBR     0x00000080  // Bit reverse the input byte. For
-                                            // all bytes in word
-#define DTHE_CRC_CTRL_ENDIAN_M \
-                                0x00000030  // Endian control [0] – swap byte
-                                            // in half-word [1] – swap half word
-
-#define DTHE_CRC_CTRL_ENDIAN_S 4
-#define DTHE_CRC_CTRL_TYPE_M  0x0000000F  // Type of operation 0000 –
-                                            // polynomial 0x8005 0001 –
-                                            // polynomial 0x1021 0010 –
-                                            // polynomial 0x4C11DB7 0011 –
-                                            // polynomial 0x1EDC6F41 1000 – TCP
-                                            // checksum TYPE in DTHE_S_CRC_CTRL
-                                            // & DTHE_S_CRC_CTRL should be
-                                            // exclusive
-#define DTHE_CRC_CTRL_TYPE_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DTHE_O_CRC_SEED register.
-//
-//******************************************************************************
-#define DTHE_CRC_SEED_SEED_M  0xFFFFFFFF  // Starting seed of CRC and
-                                            // checksum operation. Please see
-                                            // CTRL register for more detail.
-                                            // This resister also holds the
-                                            // latest result of CRC or checksum
-                                            // operation
-#define DTHE_CRC_SEED_SEED_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DTHE_O_CRC_DIN register.
-//
-//******************************************************************************
-#define DTHE_CRC_DIN_DATA_IN_M \
-                                0xFFFFFFFF  // Input data for CRC or checksum
-                                            // operation
-
-#define DTHE_CRC_DIN_DATA_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_CRC_RSLT_PP register.
-//
-//******************************************************************************
-#define DTHE_CRC_RSLT_PP_RSLT_PP_M \
-                                0xFFFFFFFF  // Input data for CRC or checksum
-                                            // operation
-
-#define DTHE_CRC_RSLT_PP_RSLT_PP_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY0 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY0_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [31:0]
-#define DTHE_RAND_KEY0_KEY_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY1 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY1_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [63:32]
-#define DTHE_RAND_KEY1_KEY_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY2 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY2_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [95:34]
-#define DTHE_RAND_KEY2_KEY_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY3 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY3_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [127:96]
-#define DTHE_RAND_KEY3_KEY_S  0
-
-
-
-#endif // __HW_DTHE_H__
diff --git a/ports/cc3200/hal/inc/hw_flash_ctrl.h b/ports/cc3200/hal/inc/hw_flash_ctrl.h
deleted file mode 100644
index b57044aa13..0000000000
--- a/ports/cc3200/hal/inc/hw_flash_ctrl.h
+++ /dev/null
@@ -1,1862 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_FLASH_CTRL_H__
-#define __HW_FLASH_CTRL_H__
-
-//*****************************************************************************
-//
-// The following are defines for the FLASH_CTRL register offsets.
-//
-//*****************************************************************************
-#define FLASH_CTRL_O_FMA        0x00000000  // Flash Memory Address (FMA)
-                                            // offset 0x000 During a write
-                                            // operation this register contains
-                                            // a 4-byte-aligned address and
-                                            // specifies where the data is
-                                            // written. During erase operations
-                                            // this register contains a 1
-                                            // KB-aligned CPU byte address and
-                                            // specifies which block is erased.
-                                            // Note that the alignment
-                                            // requirements must be met by
-                                            // software or the results of the
-                                            // operation are unpredictable.
-#define FLASH_CTRL_O_FMD        0x00000004  // Flash Memory Data (FMD) offset
-                                            // 0x004 This register contains the
-                                            // data to be written during the
-                                            // programming cycle or read during
-                                            // the read cycle. Note that the
-                                            // contents of this register are
-                                            // undefined for a read access of an
-                                            // execute-only block. This register
-                                            // is not used during erase cycles.
-#define FLASH_CTRL_O_FMC        0x00000008  // Flash Memory Control (FMC)
-                                            // offset 0x008 When this register
-                                            // is written the Flash memory
-                                            // controller initiates the
-                                            // appropriate access cycle for the
-                                            // location specified by the Flash
-                                            // Memory Address (FMA) register .
-                                            // If the access is a write access
-                                            // the data contained in the Flash
-                                            // Memory Data (FMD) register is
-                                            // written to the specified address.
-                                            // This register must be the final
-                                            // register written and initiates
-                                            // the memory operation. The four
-                                            // control bits in the lower byte of
-                                            // this register are used to
-                                            // initiate memory operations.
-#define FLASH_CTRL_O_FCRIS      0x0000000C  // Flash Controller Raw Interrupt
-                                            // Status (FCRIS) offset 0x00C This
-                                            // register indicates that the Flash
-                                            // memory controller has an
-                                            // interrupt condition. An interrupt
-                                            // is sent to the interrupt
-                                            // controller only if the
-                                            // corresponding FCIM register bit
-                                            // is set.
-#define FLASH_CTRL_O_FCIM       0x00000010  // Flash Controller Interrupt Mask
-                                            // (FCIM) offset 0x010 This register
-                                            // controls whether the Flash memory
-                                            // controller generates interrupts
-                                            // to the controller.
-#define FLASH_CTRL_O_FCMISC     0x00000014  // Flash Controller Masked
-                                            // Interrupt Status and Clear
-                                            // (FCMISC) offset 0x014 This
-                                            // register provides two functions.
-                                            // First it reports the cause of an
-                                            // interrupt by indicating which
-                                            // interrupt source or sources are
-                                            // signalling the interrupt. Second
-                                            // it serves as the method to clear
-                                            // the interrupt reporting.
-#define FLASH_CTRL_O_FMC2       0x00000020  // Flash Memory Control 2 (FMC2)
-                                            // offset 0x020 When this register
-                                            // is written the Flash memory
-                                            // controller initiates the
-                                            // appropriate access cycle for the
-                                            // location specified by the Flash
-                                            // Memory Address (FMA) register .
-                                            // If the access is a write access
-                                            // the data contained in the Flash
-                                            // Write Buffer (FWB) registers is
-                                            // written. This register must be
-                                            // the final register written as it
-                                            // initiates the memory operation.
-#define FLASH_CTRL_O_FWBVAL     0x00000030  // Flash Write Buffer Valid
-                                            // (FWBVAL) offset 0x030 This
-                                            // register provides a bitwise
-                                            // status of which FWBn registers
-                                            // have been written by the
-                                            // processor since the last write of
-                                            // the Flash memory write buffer.
-                                            // The entries with a 1 are written
-                                            // on the next write of the Flash
-                                            // memory write buffer. This
-                                            // register is cleared after the
-                                            // write operation by hardware. A
-                                            // protection violation on the write
-                                            // operation also clears this
-                                            // status. Software can program the
-                                            // same 32 words to various Flash
-                                            // memory locations by setting the
-                                            // FWB[n] bits after they are
-                                            // cleared by the write operation.
-                                            // The next write operation then
-                                            // uses the same data as the
-                                            // previous one. In addition if a
-                                            // FWBn register change should not
-                                            // be written to Flash memory
-                                            // software can clear the
-                                            // corresponding FWB[n] bit to
-                                            // preserve the existing data when
-                                            // the next write operation occurs.
-#define FLASH_CTRL_O_FWB1       0x00000100  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB2       0x00000104  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB3       0x00000108  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB4       0x0000010C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB5       0x00000110  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB6       0x00000114  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB7       0x00000118  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB8       0x0000011C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB9       0x00000120  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB10      0x00000124  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB11      0x00000128  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB12      0x0000012C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB13      0x00000130  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB14      0x00000134  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB15      0x00000138  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB16      0x0000013C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB17      0x00000140  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB18      0x00000144  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB19      0x00000148  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB20      0x0000014C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB21      0x00000150  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB22      0x00000154  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB23      0x00000158  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB24      0x0000015C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB25      0x00000160  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB26      0x00000164  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB27      0x00000168  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB28      0x0000016C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB29      0x00000170  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB30      0x00000174  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB31      0x00000178  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB32      0x0000017C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FSIZE      0x00000FC0  // Flash Size (FSIZE) offset 0xFC0
-                                            // This register indicates the size
-                                            // of the on-chip Flash memory.
-                                            // Important: This register should
-                                            // be used to determine the size of
-                                            // the Flash memory that is
-                                            // implemented on this
-                                            // microcontroller. However to
-                                            // support legacy software the DC0
-                                            // register is available. A read of
-                                            // the DC0 register correctly
-                                            // identifies legacy memory sizes.
-                                            // Software must use the FSIZE
-                                            // register for memory sizes that
-                                            // are not listed in the DC0
-                                            // register description.
-#define FLASH_CTRL_O_SSIZE      0x00000FC4  // SRAM Size (SSIZE) offset 0xFC4
-                                            // This register indicates the size
-                                            // of the on-chip SRAM. Important:
-                                            // This register should be used to
-                                            // determine the size of the SRAM
-                                            // that is implemented on this
-                                            // microcontroller. However to
-                                            // support legacy software the DC0
-                                            // register is available. A read of
-                                            // the DC0 register correctly
-                                            // identifies legacy memory sizes.
-                                            // Software must use the SSIZE
-                                            // register for memory sizes that
-                                            // are not listed in the DC0
-                                            // register description.
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMA register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMA_OFFSET_M 0x0003FFFF  // Address Offset Address offset in
-                                            // Flash memory where operation is
-                                            // performed except for nonvolatile
-                                            // registers
-#define FLASH_CTRL_FMA_OFFSET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMD register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMD_DATA_M   0xFFFFFFFF  // Data Value Data value for write
-                                            // operation.
-#define FLASH_CTRL_FMD_DATA_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMC register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMC_WRKEY_M  0xFFFF0000  // Flash Memory Write Key This
-                                            // field contains a write key which
-                                            // is used to minimize the incidence
-                                            // of accidental Flash memory
-                                            // writes. The value 0xA442 must be
-                                            // written into this field for a
-                                            // Flash memory write to occur.
-                                            // Writes to the FMC register
-                                            // without this WRKEY value are
-                                            // ignored. A read of this field
-                                            // returns the value 0.
-#define FLASH_CTRL_FMC_WRKEY_S  16
-#define FLASH_CTRL_FMC_COMT     0x00000008  // Commit Register Value This bit
-                                            // is used to commit writes to
-                                            // Flash-memory-resident registers
-                                            // and to monitor the progress of
-                                            // that process. Value Description 1
-                                            // Set this bit to commit (write)
-                                            // the register value to a
-                                            // Flash-memory-resident register.
-                                            // When read a 1 indicates that the
-                                            // previous commit access is not
-                                            // complete. 0 A write of 0 has no
-                                            // effect on the state of this bit.
-                                            // When read a 0 indicates that the
-                                            // previous commit access is
-                                            // complete.
-#define FLASH_CTRL_FMC_MERASE1  0x00000004  // Mass Erase Flash Memory This bit
-                                            // is used to mass erase the Flash
-                                            // main memory and to monitor the
-                                            // progress of that process. Value
-                                            // Description 1 Set this bit to
-                                            // erase the Flash main memory. When
-                                            // read a 1 indicates that the
-                                            // previous mass erase access is not
-                                            // complete. 0 A write of 0 has no
-                                            // effect on the state of this bit.
-                                            // When read a 0 indicates that the
-                                            // previous mass erase access is
-                                            // complete.
-#define FLASH_CTRL_FMC_ERASE    0x00000002  // Erase a Page of Flash Memory
-                                            // This bit is used to erase a page
-                                            // of Flash memory and to monitor
-                                            // the progress of that process.
-                                            // Value Description 1 Set this bit
-                                            // to erase the Flash memory page
-                                            // specified by the contents of the
-                                            // FMA register. When read a 1
-                                            // indicates that the previous page
-                                            // erase access is not complete. 0 A
-                                            // write of 0 has no effect on the
-                                            // state of this bit. When read a 0
-                                            // indicates that the previous page
-                                            // erase access is complete.
-#define FLASH_CTRL_FMC_WRITE    0x00000001  // Write a Word into Flash Memory
-                                            // This bit is used to write a word
-                                            // into Flash memory and to monitor
-                                            // the progress of that process.
-                                            // Value Description 1 Set this bit
-                                            // to write the data stored in the
-                                            // FMD register into the Flash
-                                            // memory location specified by the
-                                            // contents of the FMA register.
-                                            // When read a 1 indicates that the
-                                            // write update access is not
-                                            // complete. 0 A write of 0 has no
-                                            // effect on the state of this bit.
-                                            // When read a 0 indicates that the
-                                            // previous write update access is
-                                            // complete.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FCRIS register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FCRIS_PROGRIS \
-                                0x00002000  // Program Verify Error Raw
-                                            // Interrupt Status Value
-                                            // Description 1 An interrupt is
-                                            // pending because the verify of a
-                                            // PROGRAM operation failed. 0 An
-                                            // interrupt has not occurred. This
-                                            // bit is cleared by writing a 1 to
-                                            // the PROGMISC bit in the FCMISC
-                                            // register.
-
-#define FLASH_CTRL_FCRIS_ERRIS  0x00000800  // Erase Verify Error Raw Interrupt
-                                            // Status Value Description 1 An
-                                            // interrupt is pending because the
-                                            // verify of an ERASE operation
-                                            // failed. 0 An interrupt has not
-                                            // occurred. This bit is cleared by
-                                            // writing a 1 to the ERMISC bit in
-                                            // the FCMISC register.
-#define FLASH_CTRL_FCRIS_INVDRIS \
-                                0x00000400  // Invalid Data Raw Interrupt
-                                            // Status Value Description 1 An
-                                            // interrupt is pending because a
-                                            // bit that was previously
-                                            // programmed as a 0 is now being
-                                            // requested to be programmed as a
-                                            // 1. 0 An interrupt has not
-                                            // occurred. This bit is cleared by
-                                            // writing a 1 to the INVMISC bit in
-                                            // the FCMISC register.
-
-#define FLASH_CTRL_FCRIS_VOLTRIS \
-                                0x00000200  // Pump Voltage Raw Interrupt
-                                            // Status Value Description 1 An
-                                            // interrupt is pending because the
-                                            // regulated voltage of the pump
-                                            // went out of spec during the Flash
-                                            // operation and the operation was
-                                            // terminated. 0 An interrupt has
-                                            // not occurred. This bit is cleared
-                                            // by writing a 1 to the VOLTMISC
-                                            // bit in the FCMISC register.
-
-#define FLASH_CTRL_FCRIS_ERIS   0x00000004  // EEPROM Raw Interrupt Status This
-                                            // bit provides status EEPROM
-                                            // operation. Value Description 1 An
-                                            // EEPROM interrupt has occurred. 0
-                                            // An EEPROM interrupt has not
-                                            // occurred. This bit is cleared by
-                                            // writing a 1 to the EMISC bit in
-                                            // the FCMISC register.
-#define FLASH_CTRL_FCRIS_PRIS   0x00000002  // Programming Raw Interrupt Status
-                                            // This bit provides status on
-                                            // programming cycles which are
-                                            // write or erase actions generated
-                                            // through the FMC or FMC2 register
-                                            // bits (see page 537 and page 549).
-                                            // Value Description 1 The
-                                            // programming or erase cycle has
-                                            // completed. 0 The programming or
-                                            // erase cycle has not completed.
-                                            // This status is sent to the
-                                            // interrupt controller when the
-                                            // PMASK bit in the FCIM register is
-                                            // set. This bit is cleared by
-                                            // writing a 1 to the PMISC bit in
-                                            // the FCMISC register.
-#define FLASH_CTRL_FCRIS_ARIS   0x00000001  // Access Raw Interrupt Status
-                                            // Value Description 1 A program or
-                                            // erase action was attempted on a
-                                            // block of Flash memory that
-                                            // contradicts the protection policy
-                                            // for that block as set in the
-                                            // FMPPEn registers. 0 No access has
-                                            // tried to improperly program or
-                                            // erase the Flash memory. This
-                                            // status is sent to the interrupt
-                                            // controller when the AMASK bit in
-                                            // the FCIM register is set. This
-                                            // bit is cleared by writing a 1 to
-                                            // the AMISC bit in the FCMISC
-                                            // register.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FCIM register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FCIM_ILLMASK 0x00004000  // Illegal Address Interrupt Mask
-                                            // Value Description 1 An interrupt
-                                            // is sent to the interrupt
-                                            // controller when the ILLARIS bit
-                                            // is set. 0 The ILLARIS interrupt
-                                            // is suppressed and not sent to the
-                                            // interrupt controller.
-#define FLASH_CTRL_FCIM_PROGMASK \
-                                0x00002000  // PROGVER Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the PROGRIS bit is set. 0
-                                            // The PROGRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_PREMASK 0x00001000  // PREVER Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the PRERIS bit is set. 0 The
-                                            // PRERIS interrupt is suppressed
-                                            // and not sent to the interrupt
-                                            // controller.
-#define FLASH_CTRL_FCIM_ERMASK  0x00000800  // ERVER Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the ERRIS bit is set. 0 The
-                                            // ERRIS interrupt is suppressed and
-                                            // not sent to the interrupt
-                                            // controller.
-#define FLASH_CTRL_FCIM_INVDMASK \
-                                0x00000400  // Invalid Data Interrupt Mask
-                                            // Value Description 1 An interrupt
-                                            // is sent to the interrupt
-                                            // controller when the INVDRIS bit
-                                            // is set. 0 The INVDRIS interrupt
-                                            // is suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_VOLTMASK \
-                                0x00000200  // VOLT Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the VOLTRIS bit is set. 0
-                                            // The VOLTRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_LOCKMASK \
-                                0x00000100  // LOCK Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the LOCKRIS bit is set. 0
-                                            // The LOCKRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_EMASK   0x00000004  // EEPROM Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the ERIS bit is set. 0 The
-                                            // ERIS interrupt is suppressed and
-                                            // not sent to the interrupt
-                                            // controller.
-#define FLASH_CTRL_FCIM_PMASK   0x00000002  // Programming Interrupt Mask This
-                                            // bit controls the reporting of the
-                                            // programming raw interrupt status
-                                            // to the interrupt controller.
-                                            // Value Description 1 An interrupt
-                                            // is sent to the interrupt
-                                            // controller when the PRIS bit is
-                                            // set. 0 The PRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-#define FLASH_CTRL_FCIM_AMASK   0x00000001  // Access Interrupt Mask This bit
-                                            // controls the reporting of the
-                                            // access raw interrupt status to
-                                            // the interrupt controller. Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the ARIS bit is set. 0 The
-                                            // ARIS interrupt is suppressed and
-                                            // not sent to the interrupt
-                                            // controller.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FCMISC register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FCMISC_ILLMISC \
-                                0x00004000  // Illegal Address Masked Interrupt
-                                            // Status and Clear Value
-                                            // Description 1 When read a 1
-                                            // indicates that an unmasked
-                                            // interrupt was signaled. Writing a
-                                            // 1 to this bit clears ILLAMISC and
-                                            // also the ILLARIS bit in the FCRIS
-                                            // register (see page 540). 0 When
-                                            // read a 0 indicates that an
-                                            // interrupt has not occurred. A
-                                            // write of 0 has no effect on the
-                                            // state of this bit.
-
-#define FLASH_CTRL_FCMISC_PROGMISC \
-                                0x00002000  // PROGVER Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // PROGMISC and also the PROGRIS bit
-                                            // in the FCRIS register (see page
-                                            // 540). 0 When read a 0 indicates
-                                            // that an interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_PREMISC \
-                                0x00001000  // PREVER Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // PREMISC and also the PRERIS bit
-                                            // in the FCRIS register . 0 When
-                                            // read a 0 indicates that an
-                                            // interrupt has not occurred. A
-                                            // write of 0 has no effect on the
-                                            // state of this bit.
-
-#define FLASH_CTRL_FCMISC_ERMISC \
-                                0x00000800  // ERVER Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // ERMISC and also the ERRIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that an interrupt has
-                                            // not occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_INVDMISC \
-                                0x00000400  // Invalid Data Masked Interrupt
-                                            // Status and Clear Value
-                                            // Description 1 When read a 1
-                                            // indicates that an unmasked
-                                            // interrupt was signaled. Writing a
-                                            // 1 to this bit clears INVDMISC and
-                                            // also the INVDRIS bit in the FCRIS
-                                            // register (see page 540). 0 When
-                                            // read a 0 indicates that an
-                                            // interrupt has not occurred. A
-                                            // write of 0 has no effect on the
-                                            // state of this bit.
-
-#define FLASH_CTRL_FCMISC_VOLTMISC \
-                                0x00000200  // VOLT Masked Interrupt Status and
-                                            // Clear Value Description 1 When
-                                            // read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // VOLTMISC and also the VOLTRIS bit
-                                            // in the FCRIS register (see page
-                                            // 540). 0 When read a 0 indicates
-                                            // that an interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_LOCKMISC \
-                                0x00000100  // LOCK Masked Interrupt Status and
-                                            // Clear Value Description 1 When
-                                            // read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // LOCKMISC and also the LOCKRIS bit
-                                            // in the FCRIS register (see page
-                                            // 540). 0 When read a 0 indicates
-                                            // that an interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_EMISC 0x00000004  // EEPROM Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // EMISC and also the ERIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that an interrupt has
-                                            // not occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-#define FLASH_CTRL_FCMISC_PMISC 0x00000002  // Programming Masked Interrupt
-                                            // Status and Clear Value
-                                            // Description 1 When read a 1
-                                            // indicates that an unmasked
-                                            // interrupt was signaled because a
-                                            // programming cycle completed.
-                                            // Writing a 1 to this bit clears
-                                            // PMISC and also the PRIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that a programming
-                                            // cycle complete interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-#define FLASH_CTRL_FCMISC_AMISC 0x00000001  // Access Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled
-                                            // because a program or erase action
-                                            // was attempted on a block of Flash
-                                            // memory that contradicts the
-                                            // protection policy for that block
-                                            // as set in the FMPPEn registers.
-                                            // Writing a 1 to this bit clears
-                                            // AMISC and also the ARIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that no improper
-                                            // accesses have occurred. A write
-                                            // of 0 has no effect on the state
-                                            // of this bit.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMC2 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMC2_WRKEY_M 0xFFFF0000  // Flash Memory Write Key This
-                                            // field contains a write key which
-                                            // is used to minimize the incidence
-                                            // of accidental Flash memory
-                                            // writes. The value 0xA442 must be
-                                            // written into this field for a
-                                            // write to occur. Writes to the
-                                            // FMC2 register without this WRKEY
-                                            // value are ignored. A read of this
-                                            // field returns the value 0.
-#define FLASH_CTRL_FMC2_WRKEY_S 16
-#define FLASH_CTRL_FMC2_WRBUF   0x00000001  // Buffered Flash Memory Write This
-                                            // bit is used to start a buffered
-                                            // write to Flash memory. Value
-                                            // Description 1 Set this bit to
-                                            // write the data stored in the FWBn
-                                            // registers to the location
-                                            // specified by the contents of the
-                                            // FMA register. When read a 1
-                                            // indicates that the previous
-                                            // buffered Flash memory write
-                                            // access is not complete. 0 A write
-                                            // of 0 has no effect on the state
-                                            // of this bit. When read a 0
-                                            // indicates that the previous
-                                            // buffered Flash memory write
-                                            // access is complete.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWBVAL register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWBVAL_FWBN_M \
-                                0xFFFFFFFF  // Flash Memory Write Buffer Value
-                                            // Description 1 The corresponding
-                                            // FWBn register has been updated
-                                            // since the last buffer write
-                                            // operation and is ready to be
-                                            // written to Flash memory. 0 The
-                                            // corresponding FWBn register has
-                                            // no new data to be written. Bit 0
-                                            // corresponds to FWB0 offset 0x100
-                                            // and bit 31 corresponds to FWB31
-                                            // offset 0x13C.
-
-#define FLASH_CTRL_FWBVAL_FWBN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB1 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB1_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB1_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB2 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB2_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB2_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB3 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB3_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB3_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB4 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB4_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB4_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB5 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB5_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB5_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB6 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB6_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB6_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB7 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB7_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB7_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB8 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB8_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB8_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB9 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB9_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB9_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB10 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB10_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB10_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB11 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB11_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB11_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB12 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB12_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB12_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB13 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB13_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB13_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB14 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB14_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB14_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB15 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB15_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB15_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB16 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB16_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB16_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB17 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB17_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB17_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB18 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB18_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB18_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB19 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB19_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB19_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB20 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB20_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB20_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB21 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB21_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB21_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB22 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB22_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB22_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB23 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB23_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB23_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB24 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB24_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB24_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB25 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB25_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB25_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB26 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB26_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB26_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB27 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB27_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB27_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB28 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB28_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB28_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB29 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB29_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB29_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB30 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB30_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB30_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB31 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB31_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB31_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB32 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB32_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB32_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FSIZE register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FSIZE_SIZE_M 0x0000FFFF  // Flash Size Indicates the size of
-                                            // the on-chip Flash memory. Value
-                                            // Description 0x0003 8 KB of Flash
-                                            // 0x0007 16 KB of Flash 0x000F 32
-                                            // KB of Flash 0x001F 64 KB of Flash
-                                            // 0x002F 96 KB of Flash 0x003F 128
-                                            // KB of Flash 0x005F 192 KB of
-                                            // Flash 0x007F 256 KB of Flash
-#define FLASH_CTRL_FSIZE_SIZE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_SSIZE register.
-//
-//******************************************************************************
-#define FLASH_CTRL_SSIZE_SRAM_SIZE_M \
-                                0x0000FFFF  // SRAM Size Indicates the size of
-                                            // the on-chip SRAM. Value
-                                            // Description 0x0007 2 KB of SRAM
-                                            // 0x000F 4 KB of SRAM 0x0017 6 KB
-                                            // of SRAM 0x001F 8 KB of SRAM
-                                            // 0x002F 12 KB of SRAM 0x003F 16 KB
-                                            // of SRAM 0x004F 20 KB of SRAM
-                                            // 0x005F 24 KB of SRAM 0x007F 32 KB
-                                            // of SRAM
-
-#define FLASH_CTRL_SSIZE_SRAM_SIZE_S 0
-#define FLASH_CTRL_FMC_WRKEY    0xA4420000  // FLASH write key
-#define FLASH_CTRL_FMC2_WRKEY   0xA4420000  // FLASH write key
-#define FLASH_CTRL_O_FWBN       FLASH_CTRL_O_FWB1
-#define FLASH_ERASE_SIZE        0x00000400
-#define FLASH_PROTECT_SIZE      0x00000800
-#define FLASH_FMP_BLOCK_0       0x00000001  // Enable for block 0
-
-#define FLASH_FMPRE0            0x400FE200  // Flash Memory Protection Read
-                                            // Enable 0
-#define FLASH_FMPRE1            0x400FE204  // Flash Memory Protection Read
-                                            // Enable 1
-#define FLASH_FMPRE2            0x400FE208  // Flash Memory Protection Read
-                                            // Enable 2
-#define FLASH_FMPRE3            0x400FE20C  // Flash Memory Protection Read
-                                            // Enable 3
-#define FLASH_FMPRE4            0x400FE210  // Flash Memory Protection Read
-                                            // Enable 4
-#define FLASH_FMPRE5            0x400FE214  // Flash Memory Protection Read
-                                            // Enable 5
-#define FLASH_FMPRE6            0x400FE218  // Flash Memory Protection Read
-                                            // Enable 6
-#define FLASH_FMPRE7            0x400FE21C  // Flash Memory Protection Read
-                                            // Enable 7
-#define FLASH_FMPRE8            0x400FE220  // Flash Memory Protection Read
-                                            // Enable 8
-#define FLASH_FMPRE9            0x400FE224  // Flash Memory Protection Read
-                                            // Enable 9
-#define FLASH_FMPRE10           0x400FE228  // Flash Memory Protection Read
-                                            // Enable 10
-#define FLASH_FMPRE11           0x400FE22C  // Flash Memory Protection Read
-                                            // Enable 11
-#define FLASH_FMPRE12           0x400FE230  // Flash Memory Protection Read
-                                            // Enable 12
-#define FLASH_FMPRE13           0x400FE234  // Flash Memory Protection Read
-                                            // Enable 13
-#define FLASH_FMPRE14           0x400FE238  // Flash Memory Protection Read
-                                            // Enable 14
-#define FLASH_FMPRE15           0x400FE23C  // Flash Memory Protection Read
-                                            // Enable 15
-
-#define FLASH_FMPPE0            0x400FE400  // Flash Memory Protection Program
-                                            // Enable 0
-#define FLASH_FMPPE1            0x400FE404  // Flash Memory Protection Program
-                                            // Enable 1
-#define FLASH_FMPPE2            0x400FE408  // Flash Memory Protection Program
-                                            // Enable 2
-#define FLASH_FMPPE3            0x400FE40C  // Flash Memory Protection Program
-                                            // Enable 3
-#define FLASH_FMPPE4            0x400FE410  // Flash Memory Protection Program
-                                            // Enable 4
-#define FLASH_FMPPE5            0x400FE414  // Flash Memory Protection Program
-                                            // Enable 5
-#define FLASH_FMPPE6            0x400FE418  // Flash Memory Protection Program
-                                            // Enable 6
-#define FLASH_FMPPE7            0x400FE41C  // Flash Memory Protection Program
-                                            // Enable 7
-#define FLASH_FMPPE8            0x400FE420  // Flash Memory Protection Program
-                                            // Enable 8
-#define FLASH_FMPPE9            0x400FE424  // Flash Memory Protection Program
-                                            // Enable 9
-#define FLASH_FMPPE10           0x400FE428  // Flash Memory Protection Program
-                                            // Enable 10
-#define FLASH_FMPPE11           0x400FE42C  // Flash Memory Protection Program
-                                            // Enable 11
-#define FLASH_FMPPE12           0x400FE430  // Flash Memory Protection Program
-                                            // Enable 12
-#define FLASH_FMPPE13           0x400FE434  // Flash Memory Protection Program
-                                            // Enable 13
-#define FLASH_FMPPE14           0x400FE438  // Flash Memory Protection Program
-                                            // Enable 14
-#define FLASH_FMPPE15           0x400FE43C  // Flash Memory Protection Program
-                                            // Enable 15
-
-#define FLASH_USECRL            0x400FE140  // USec Reload
-#define FLASH_CTRL_ERASE_SIZE   0x00000400
-
-
-#endif // __HW_FLASH_CTRL_H__
diff --git a/ports/cc3200/hal/inc/hw_gpio.h b/ports/cc3200/hal/inc/hw_gpio.h
deleted file mode 100644
index 2bd6e0f3ae..0000000000
--- a/ports/cc3200/hal/inc/hw_gpio.h
+++ /dev/null
@@ -1,1349 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_GPIO_H__
-#define __HW_GPIO_H__
-
-//*****************************************************************************
-//
-// The following are defines for the GPIO register offsets.
-//
-//*****************************************************************************
-#define GPIO_O_GPIO_DATA        0x00000000  // 0x4000 5000 0x4000 6000 0x4000
-                                            // 7000 0x4002 4000 GPIO Data
-                                            // (GPIODATA)@@ offset 0x000 The
-                                            // GPIODATA register is the data
-                                            // register. In software control
-                                            // mode@@ values written in the
-                                            // GPIODATA register are transferred
-                                            // onto the GPIO port pins if the
-                                            // respective pins have been
-                                            // configured as outputs through the
-                                            // GPIO Direction (GPIODIR) register
-                                            // (see page 653). In order to write
-                                            // to GPIODATA@@ the corresponding
-                                            // bits in the mask@@ resulting from
-                                            // the address bus bits [9:2]@@ must
-                                            // be set. Otherwise@@ the bit
-                                            // values remain unchanged by the
-                                            // write. Similarly@@ the values
-                                            // read from this register are
-                                            // determined for each bit by the
-                                            // mask bit derived from the address
-                                            // used to access the data
-                                            // register@@ bits [9:2]. Bits that
-                                            // are set in the address mask cause
-                                            // the corresponding bits in
-                                            // GPIODATA to be read@@ and bits
-                                            // that are clear in the address
-                                            // mask cause the corresponding bits
-                                            // in GPIODATA to be read as 0@@
-                                            // regardless of their value. A read
-                                            // from GPIODATA returns the last
-                                            // bit value written if the
-                                            // respective pins are configured as
-                                            // outputs@@ or it returns the value
-                                            // on the corresponding input pin
-                                            // when these are configured as
-                                            // inputs. All bits are cleared by a
-                                            // reset.
-#define GPIO_O_GPIO_DIR         0x00000400  // 0x4000 5400 0x4000 6400 0x4000
-                                            // 7400 0x4002 4400 GPIO Direction
-                                            // (GPIODIR)@@ offset 0x400 The
-                                            // GPIODIR register is the data
-                                            // direction register. Setting a bit
-                                            // in the GPIODIR register
-                                            // configures the corresponding pin
-                                            // to be an output@@ while clearing
-                                            // a bit configures the
-                                            // corresponding pin to be an input.
-                                            // All bits are cleared by a reset@@
-                                            // meaning all GPIO pins are inputs
-                                            // by default.
-#define GPIO_O_GPIO_IS          0x00000404  // 0x4000 5404 0x4000 6404 0x4000
-                                            // 7404 0x4002 4404 GPIO Interrupt
-                                            // Sense (GPIOIS)@@ offset 0x404 The
-                                            // GPIOIS register is the interrupt
-                                            // sense register. Setting a bit in
-                                            // the GPIOIS register configures
-                                            // the corresponding pin to detect
-                                            // levels@@ while clearing a bit
-                                            // configures the corresponding pin
-                                            // to detect edges. All bits are
-                                            // cleared by a reset.
-#define GPIO_O_GPIO_IBE         0x00000408  // 0x4000 5408 0x4000 6408 0x4000
-                                            // 7408 0x4002 4408 GPIO Interrupt
-                                            // Both Edges (GPIOIBE)@@ offset
-                                            // 0x408 The GPIOIBE register allows
-                                            // both edges to cause interrupts.
-                                            // When the corresponding bit in the
-                                            // GPIO Interrupt Sense (GPIOIS)
-                                            // register is set to detect edges@@
-                                            // setting a bit in the GPIOIBE
-                                            // register configures the
-                                            // corresponding pin to detect both
-                                            // rising and falling edges@@
-                                            // regardless of the corresponding
-                                            // bit in the GPIO Interrupt Event
-                                            // (GPIOIEV) register . Clearing a
-                                            // bit configures the pin to be
-                                            // controlled by the GPIOIEV
-                                            // register. All bits are cleared by
-                                            // a reset.
-#define GPIO_O_GPIO_IEV         0x0000040C  // 0x4000 540C 0x4000 640C 0x4000
-                                            // 740C 0x4002 440C GPIO Interrupt
-                                            // Event (GPIOIEV)@@ offset 0x40C
-                                            // The GPIOIEV register is the
-                                            // interrupt event register. Setting
-                                            // a bit in the GPIOIEV register
-                                            // configures the corresponding pin
-                                            // to detect rising edges or high
-                                            // levels@@ depending on the
-                                            // corresponding bit value in the
-                                            // GPIO Interrupt Sense (GPIOIS)
-                                            // register . Clearing a bit
-                                            // configures the pin to detect
-                                            // falling edges or low levels@@
-                                            // depending on the corresponding
-                                            // bit value in the GPIOIS register.
-                                            // All bits are cleared by a reset.
-#define GPIO_O_GPIO_IM          0x00000410  // 0x4000 5410 0x4000 6410 0x4000
-                                            // 7410 0x4002 4410 GPIO Interrupt
-                                            // Mask (GPIOIM)@@ offset 0x410 The
-                                            // GPIOIM register is the interrupt
-                                            // mask register. Setting a bit in
-                                            // the GPIOIM register allows
-                                            // interrupts that are generated by
-                                            // the corresponding pin to be sent
-                                            // to the interrupt controller on
-                                            // the combined interrupt signal.
-                                            // Clearing a bit prevents an
-                                            // interrupt on the corresponding
-                                            // pin from being sent to the
-                                            // interrupt controller. All bits
-                                            // are cleared by a reset.
-#define GPIO_O_GPIO_RIS         0x00000414  // 0x4000 5414 0x4000 6414 0x4000
-                                            // 7414 0x4002 4414 GPIO Raw
-                                            // Interrupt Status (GPIORIS)@@
-                                            // offset 0x414 The GPIORIS register
-                                            // is the raw interrupt status
-                                            // register. A bit in this register
-                                            // is set when an interrupt
-                                            // condition occurs on the
-                                            // corresponding GPIO pin. If the
-                                            // corresponding bit in the GPIO
-                                            // Interrupt Mask (GPIOIM) register
-                                            // is set@@ the interrupt is sent to
-                                            // the interrupt controller. Bits
-                                            // read as zero indicate that
-                                            // corresponding input pins have not
-                                            // initiated an interrupt. A bit in
-                                            // this register can be cleared by
-                                            // writing a 1 to the corresponding
-                                            // bit in the GPIO Interrupt Clear
-                                            // (GPIOICR) register.
-#define GPIO_O_GPIO_MIS         0x00000418  // 0x4000 5418 0x4000 6418 0x4000
-                                            // 7418 0x4002 4418 GPIO Masked
-                                            // Interrupt Status (GPIOMIS)@@
-                                            // offset 0x418 The GPIOMIS register
-                                            // is the masked interrupt status
-                                            // register. If a bit is set in this
-                                            // register@@ the corresponding
-                                            // interrupt has triggered an
-                                            // interrupt to the interrupt
-                                            // controller. If a bit is clear@@
-                                            // either no interrupt has been
-                                            // generated@@ or the interrupt is
-                                            // masked. If no port pin@@ other
-                                            // than the one that is being used
-                                            // as an ADC trigger@@ is being used
-                                            // to generate interrupts@@ the
-                                            // appropriate Interrupt Set Enable
-                                            // (ENn) register can disable the
-                                            // interrupts for the port@@ and the
-                                            // ADC interrupt can be used to read
-                                            // back the converted data.
-                                            // Otherwise@@ the port interrupt
-                                            // handler must ignore and clear
-                                            // interrupts on the port pin and
-                                            // wait for the ADC interrupt@@ or
-                                            // the ADC interrupt must be
-                                            // disabled in the EN0 register and
-                                            // the port interrupt handler must
-                                            // poll the ADC registers until the
-                                            // conversion is completed. If no
-                                            // port pin@@ other than the one
-                                            // that is being used as an ADC
-                                            // trigger@@ is being used to
-                                            // generate interrupts@@ the
-                                            // appropriate Interrupt Set Enable
-                                            // (ENn) register can disable the
-                                            // interrupts for the port@@ and the
-                                            // ADC interrupt can be used to read
-                                            // back the converted data.
-                                            // Otherwise@@ the port interrupt
-                                            // handler must ignore and clear
-                                            // interrupts on the port pin and
-                                            // wait for the ADC interrupt@@ or
-                                            // the ADC interrupt must be
-                                            // disabled in the EN0 register and
-                                            // the port interrupt handler must
-                                            // poll the ADC registers until the
-                                            // conversion is completed. Note
-                                            // that if the Port B GPIOADCCTL
-                                            // register is cleared@@ PB4 can
-                                            // still be used as an external
-                                            // trigger for the ADC. This is a
-                                            // legacy mode which allows code
-                                            // written for previous Stellaris
-                                            // devices to operate on this
-                                            // microcontroller. GPIOMIS is the
-                                            // state of the interrupt after
-                                            // masking.
-#define GPIO_O_GPIO_ICR         0x0000041C  // 0x4000 541C 0x4000 641C 0x4000
-                                            // 741C 0x4002 441C GPIO Interrupt
-                                            // Clear (GPIOICR)@@ offset 0x41C
-                                            // The GPIOICR register is the
-                                            // interrupt clear register. Writing
-                                            // a 1 to a bit in this register
-                                            // clears the corresponding
-                                            // interrupt bit in the GPIORIS and
-                                            // GPIOMIS registers. Writing a 0
-                                            // has no effect.
-#define GPIO_O_GPIO_AFSEL       0x00000420  // 0x4000 5420 0x4000 6420 0x4000
-                                            // 7420 0x4002 4420 GPIO Alternate
-                                            // Function Select (GPIOAFSEL)@@
-                                            // offset 0x420 The GPIOAFSEL
-                                            // register is the mode control
-                                            // select register. If a bit is
-                                            // clear@@ the pin is used as a GPIO
-                                            // and is controlled by the GPIO
-                                            // registers. Setting a bit in this
-                                            // register configures the
-                                            // corresponding GPIO line to be
-                                            // controlled by an associated
-                                            // peripheral. Several possible
-                                            // peripheral functions are
-                                            // multiplexed on each GPIO. The
-                                            // GPIO Port Control (GPIOPCTL)
-                                            // register is used to select one of
-                                            // the possible functions.
-#define GPIO_O_GPIO_DR2R        0x00000500  // 0x4000 5500 0x4000 6500 0x4000
-                                            // 7500 0x4002 4500 GPIO 2-mA Drive
-                                            // Select (GPIODR2R)@@ offset 0x500
-                                            // The GPIODR2R register is the 2-mA
-                                            // drive control register. Each GPIO
-                                            // signal in the port can be
-                                            // individually configured without
-                                            // affecting the other pads. When
-                                            // setting the DRV2 bit for a GPIO
-                                            // signal@@ the corresponding DRV4
-                                            // bit in the GPIODR4R register and
-                                            // DRV8 bit in the GPIODR8R register
-                                            // are automatically cleared by
-                                            // hardware. By default@@ all GPIO
-                                            // pins have 2-mA drive.
-#define GPIO_O_GPIO_DR4R        0x00000504  // 0x4000 5504 0x4000 6504 0x4000
-                                            // 7504 0x4002 4504 GPIO 4-mA Drive
-                                            // Select (GPIODR4R)@@ offset 0x504
-                                            // The GPIODR4R register is the 4-mA
-                                            // drive control register. Each GPIO
-                                            // signal in the port can be
-                                            // individually configured without
-                                            // affecting the other pads. When
-                                            // setting the DRV4 bit for a GPIO
-                                            // signal@@ the corresponding DRV2
-                                            // bit in the GPIODR2R register and
-                                            // DRV8 bit in the GPIODR8R register
-                                            // are automatically cleared by
-                                            // hardware.
-#define GPIO_O_GPIO_DR8R        0x00000508  // 0x4000 5508 0x4000 6508 0x4000
-                                            // 7508 0x4002 4508 GPIO 8-mA Drive
-                                            // Select (GPIODR8R)@@ offset 0x508
-                                            // The GPIODR8R register is the 8-mA
-                                            // drive control register. Each GPIO
-                                            // signal in the port can be
-                                            // individually configured without
-                                            // affecting the other pads. When
-                                            // setting the DRV8 bit for a GPIO
-                                            // signal@@ the corresponding DRV2
-                                            // bit in the GPIODR2R register and
-                                            // DRV4 bit in the GPIODR4R register
-                                            // are automatically cleared by
-                                            // hardware. The 8-mA setting is
-                                            // also used for high-current
-                                            // operation. Note: There is no
-                                            // configuration difference between
-                                            // 8-mA and high-current operation.
-                                            // The additional current capacity
-                                            // results from a shift in the
-                                            // VOH/VOL levels.
-#define GPIO_O_GPIO_ODR         0x0000050C  // 0x4000 550C 0x4000 650C 0x4000
-                                            // 750C 0x4002 450C GPIO Open Drain
-                                            // Select (GPIOODR)@@ offset 0x50C
-                                            // The GPIOODR register is the open
-                                            // drain control register. Setting a
-                                            // bit in this register enables the
-                                            // open-drain configuration of the
-                                            // corresponding GPIO pad. When
-                                            // open-drain mode is enabled@@ the
-                                            // corresponding bit should also be
-                                            // set in the GPIO Digital Input
-                                            // Enable (GPIODEN) register .
-                                            // Corresponding bits in the drive
-                                            // strength and slew rate control
-                                            // registers (GPIODR2R@@ GPIODR4R@@
-                                            // GPIODR8R@@ and GPIOSLR) can be
-                                            // set to achieve the desired rise
-                                            // and fall times. The GPIO acts as
-                                            // an open-drain input if the
-                                            // corresponding bit in the GPIODIR
-                                            // register is cleared. If open
-                                            // drain is selected while the GPIO
-                                            // is configured as an input@@ the
-                                            // GPIO will remain an input and the
-                                            // open-drain selection has no
-                                            // effect until the GPIO is changed
-                                            // to an output. When using the I2C
-                                            // module@@ in addition to
-                                            // configuring the pin to open
-                                            // drain@@ the GPIO Alternate
-                                            // Function Select (GPIOAFSEL)
-                                            // register bits for the I2C clock
-                                            // and data pins should be set
-#define GPIO_O_GPIO_PUR         0x00000510  // 0x4000 5510 0x4000 6510 0x4000
-                                            // 7510 0x4002 4510 GPIO Pull-Up
-                                            // Select (GPIOPUR)@@ offset 0x510
-                                            // The GPIOPUR register is the
-                                            // pull-up control register. When a
-                                            // bit is set@@ a weak pull-up
-                                            // resistor on the corresponding
-                                            // GPIO signal is enabled. Setting a
-                                            // bit in GPIOPUR automatically
-                                            // clears the corresponding bit in
-                                            // the GPIO Pull-Down Select
-                                            // (GPIOPDR) register . Write access
-                                            // to this register is protected
-                                            // with the GPIOCR register. Bits in
-                                            // GPIOCR that are cleared prevent
-                                            // writes to the equivalent bit in
-                                            // this register.
-#define GPIO_O_GPIO_PDR         0x00000514  // 0x4000 5514 0x4000 6514 0x4000
-                                            // 7514 0x4002 4514 GPIO Pull-Down
-                                            // Select (GPIOPDR)@@ offset 0x514
-                                            // The GPIOPDR register is the
-                                            // pull-down control register. When
-                                            // a bit is set@@ a weak pull-down
-                                            // resistor on the corresponding
-                                            // GPIO signal is enabled. Setting a
-                                            // bit in GPIOPDR automatically
-                                            // clears the corresponding bit in
-                                            // the GPIO Pull-Up Select (GPIOPUR)
-                                            // register
-#define GPIO_O_GPIO_SLR         0x00000518  // 0x4000 5518 0x4000 6518 0x4000
-                                            // 7518 0x4002 4518 The GPIOSLR
-                                            // register is the slew rate control
-                                            // register. Slew rate control is
-                                            // only available when using the
-                                            // 8-mA drive strength option via
-                                            // the GPIO 8-mA Drive Select
-                                            // (GPIODR8R) register
-#define GPIO_O_GPIO_DEN         0x0000051C  // 0x4000 551C 0x4000 651C 0x4000
-                                            // 751C 0x4002 451C GPIO Digital
-                                            // Enable (GPIODEN)@@ offset 0x51C
-                                            // Note: Pins configured as digital
-                                            // inputs are Schmitt-triggered. The
-                                            // GPIODEN register is the digital
-                                            // enable register. By default@@ all
-                                            // GPIO signals except those listed
-                                            // below are configured out of reset
-                                            // to be undriven (tristate). Their
-                                            // digital function is disabled;
-                                            // they do not drive a logic value
-                                            // on the pin and they do not allow
-                                            // the pin voltage into the GPIO
-                                            // receiver. To use the pin as a
-                                            // digital input or output (either
-                                            // GPIO or alternate function)@@ the
-                                            // corresponding GPIODEN bit must be
-                                            // set.
-#define GPIO_O_GPIO_LOCK        0x00000520  // 0x4000 5520 0x4000 6520 0x4000
-                                            // 7520 0x4002 4520 GPIO Lock
-                                            // (GPIOLOCK)@@ offset 0x520 The
-                                            // GPIOLOCK register enables write
-                                            // access to the GPIOCR register .
-                                            // Writing 0x4C4F.434B to the
-                                            // GPIOLOCK register unlocks the
-                                            // GPIOCR register. Writing any
-                                            // other value to the GPIOLOCK
-                                            // register re-enables the locked
-                                            // state. Reading the GPIOLOCK
-                                            // register returns the lock status
-                                            // rather than the 32-bit value that
-                                            // was previously written.
-                                            // Therefore@@ when write accesses
-                                            // are disabled@@ or locked@@
-                                            // reading the GPIOLOCK register
-                                            // returns 0x0000.0001. When write
-                                            // accesses are enabled@@ or
-                                            // unlocked@@ reading the GPIOLOCK
-                                            // register returns 0x0000.0000.
-#define GPIO_O_GPIO_CR          0x00000524  // 0x4000 5524 0x4000 6524 0x4000
-                                            // 7524 0x4002 4524 GPIO Commit
-                                            // (GPIOCR)@@ offset 0x524 The
-                                            // GPIOCR register is the commit
-                                            // register. The value of the GPIOCR
-                                            // register determines which bits of
-                                            // the GPIOAFSEL@@ GPIOPUR@@
-                                            // GPIOPDR@@ and GPIODEN registers
-                                            // are committed when a write to
-                                            // these registers is performed. If
-                                            // a bit in the GPIOCR register is
-                                            // cleared@@ the data being written
-                                            // to the corresponding bit in the
-                                            // GPIOAFSEL@@ GPIOPUR@@ GPIOPDR@@
-                                            // or GPIODEN registers cannot be
-                                            // committed and retains its
-                                            // previous value. If a bit in the
-                                            // GPIOCR register is set@@ the data
-                                            // being written to the
-                                            // corresponding bit of the
-                                            // GPIOAFSEL@@ GPIOPUR@@ GPIOPDR@@
-                                            // or GPIODEN registers is committed
-                                            // to the register and reflects the
-                                            // new value. The contents of the
-                                            // GPIOCR register can only be
-                                            // modified if the status in the
-                                            // GPIOLOCK register is unlocked.
-                                            // Writes to the GPIOCR register are
-                                            // ignored if the status in the
-                                            // GPIOLOCK register is locked.
-#define GPIO_O_GPIO_AMSEL       0x00000528  // 0x4000 5528 0x4000 6528 0x4000
-                                            // 7528 0x4002 4528 The GPIOAMSEL
-                                            // register controls isolation
-                                            // circuits to the analog side of a
-                                            // unified I/O pad. Because the
-                                            // GPIOs may be driven by a 5-V
-                                            // source and affect analog
-                                            // operation@@ analog circuitry
-                                            // requires isolation from the pins
-                                            // when they are not used in their
-                                            // analog function. Each bit of this
-                                            // register controls the isolation
-                                            // circuitry for the corresponding
-                                            // GPIO signal.
-#define GPIO_O_GPIO_PCTL        0x0000052C  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) 0x4000 552C
-                                            // 0x4000 652C 0x4000 752C 0x4002
-                                            // 452C GPIO Port Control
-                                            // (GPIOPCTL)@@ offset 0x52C The
-                                            // GPIOPCTL register is used in
-                                            // conjunction with the GPIOAFSEL
-                                            // register and selects the specific
-                                            // peripheral signal for each GPIO
-                                            // pin when using the alternate
-                                            // function mode. Most bits in the
-                                            // GPIOAFSEL register are cleared on
-                                            // reset@@ therefore most GPIO pins
-                                            // are configured as GPIOs by
-                                            // default. When a bit is set in the
-                                            // GPIOAFSEL register@@ the
-                                            // corresponding GPIO signal is
-                                            // controlled by an associated
-                                            // peripheral. The GPIOPCTL register
-                                            // selects one out of a set of
-                                            // peripheral functions for each
-                                            // GPIO@@ providing additional
-                                            // flexibility in signal definition.
-#define GPIO_O_GPIO_ADCCTL      0x00000530  // This register is not used in
-                                            // cc3xx. ADC trigger via GPIO is
-                                            // not supported. 0x4000 5530 0x4000
-                                            // 6530 0x4000 7530 0x4002 4530 GPIO
-                                            // ADC Control (GPIOADCCTL)@@ offset
-                                            // 0x530 This register is used to
-                                            // configure a GPIO pin as a source
-                                            // for the ADC trigger. Note that if
-                                            // the Port B GPIOADCCTL register is
-                                            // cleared@@ PB4 can still be used
-                                            // as an external trigger for the
-                                            // ADC. This is a legacy mode which
-                                            // allows code written for previous
-                                            // Stellaris devices to operate on
-                                            // this microcontroller.
-#define GPIO_O_GPIO_DMACTL      0x00000534  // 0x4000 5534 0x4000 6534 0x4000
-                                            // 7534 0x4002 4534 GPIO DMA Control
-                                            // (GPIODMACTL)@@ offset 0x534 This
-                                            // register is used to configure a
-                                            // GPIO pin as a source for the ?DMA
-                                            // trigger.
-#define GPIO_O_GPIO_SI          0x00000538  // 0x4000 5538 0x4000 6538 0x4000
-                                            // 7538 0x4002 4538 GPIO Select
-                                            // Interrupt (GPIOSI)@@ offset 0x538
-                                            // This register is used to enable
-                                            // individual interrupts for each
-                                            // pin. Note: This register is only
-                                            // available on Port P and Port Q.
-#define GPIO_O_GPIO_PERIPHID4   0x00000FD0  // 0x4000 5FD0 0x4000 6FD0 0x4000
-                                            // 7FD0 0x4002 4FD0 GPIO Peripheral
-                                            // Identification 4
-                                            // (GPIOPeriphID4)@@ offset 0xFD0
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID5   0x00000FD4  // 0x4000 5FD4 0x4000 6FD4 0x4000
-                                            // 7FD4 0x4002 4FD4 GPIO Peripheral
-                                            // Identification 5
-                                            // (GPIOPeriphID5)@@ offset 0xFD4
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID6   0x00000FD8  // 0x4000 5FD8 0x4000 6FD8 0x4000
-                                            // 7FD8 0x4002 4FD8 GPIO Peripheral
-                                            // Identification 6
-                                            // (GPIOPeriphID6)@@ offset 0xFD8
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID7   0x00000FDC  // 0x4000 5FDC 0x4000 6FDC 0x4000
-                                            // 7FDC 0x4002 4FDC GPIO Peripheral
-                                            // Identification 7
-                                            // (GPIOPeriphID7)@@ offset 0xFDC
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID0   0x00000FE0  // 0x4000 5FE0 0x4000 6FE0 0x4000
-                                            // 7FE0 0x4002 4FE0 GPIO Peripheral
-                                            // Identification 0
-                                            // (GPIOPeriphID0)@@ offset 0xFE0
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID1   0x00000FE4  // 0x4000 5FE4 0x4000 6FE4 0x4000
-                                            // 7FE4 0x4002 4FE4 GPIO Peripheral
-                                            // Identification 1
-                                            // (GPIOPeriphID1)@@ offset 0xFE4
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID2   0x00000FE8  // 0x4000 5FE8 0x4000 6FE8 0x4000
-                                            // 7FE8 0x4002 4FE8 GPIO Peripheral
-                                            // Identification 2
-                                            // (GPIOPeriphID2)@@ offset 0xFE8
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID3   0x00000FEC  // 0x4000 5FEC 0x4000 6FEC 0x4000
-                                            // 7FEC 0x4002 4FEC GPIO Peripheral
-                                            // Identification 3
-                                            // (GPIOPeriphID3)@@ offset 0xFEC
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PCELLID0    0x00000FF0  // 0x4000 5FF0 0x4000 6FF0 0x4000
-                                            // 7FF0 0x4002 4FF0 GPIO PrimeCell
-                                            // Identification 0 (GPIOPCellID0)@@
-                                            // offset 0xFF0 The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.
-#define GPIO_O_GPIO_PCELLID1    0x00000FF4  // 0x4000 5FF4 0x4000 6FF4 0x4000
-                                            // 7FF4 0x4002 4FF4 GPIO PrimeCell
-                                            // Identification 1 (GPIOPCellID1)@@
-                                            // offset 0xFF4 The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.
-#define GPIO_O_GPIO_PCELLID2    0x00000FF8  // 0x4000 5FF8 0x4000 6FF8 0x4000
-                                            // 7FF8 0x4002 4FF8 GPIO PrimeCell
-                                            // Identification 2 (GPIOPCellID2)@@
-                                            // offset 0xFF8 The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.
-#define GPIO_O_GPIO_PCELLID3    0x00000FFC  // 0x4000 5FFC 0x4000 6FFC 0x4000
-                                            // 7FFC 0x4002 4FFC GPIO PrimeCell
-                                            // Identification 3 (GPIOPCellID3)@@
-                                            // offset 0xFFC The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.0xb1
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DATA register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DATA_DATA_M   0x000000FF  // GPIO Data This register is
-                                            // virtually mapped to 256 locations
-                                            // in the address space. To
-                                            // facilitate the reading and
-                                            // writing of data to these
-                                            // registers by independent
-                                            // drivers@@ the data read from and
-                                            // written to the registers are
-                                            // masked by the eight address lines
-                                            // [9:2]. Reads from this register
-                                            // return its current state. Writes
-                                            // to this register only affect bits
-                                            // that are not masked by ADDR[9:2]
-                                            // and are configured as outputs.
-#define GPIO_GPIO_DATA_DATA_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DIR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DIR_DIR_M     0x000000FF  // GPIO Data Direction Value
-                                            // Description 0 Corresponding pin
-                                            // is an input. 1 Corresponding pins
-                                            // is an output.
-#define GPIO_GPIO_DIR_DIR_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IS register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IS_IS_M       0x000000FF  // GPIO Interrupt Sense Value
-                                            // Description 0 The edge on the
-                                            // corresponding pin is detected
-                                            // (edge-sensitive). 1 The level on
-                                            // the corresponding pin is detected
-                                            // (level-sensitive).
-#define GPIO_GPIO_IS_IS_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IBE register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IBE_IBE_M     0x000000FF  // GPIO Interrupt Both Edges Value
-                                            // Description 0 Interrupt
-                                            // generation is controlled by the
-                                            // GPIO Interrupt Event (GPIOIEV)
-                                            // register. 1 Both edges on the
-                                            // corresponding pin trigger an
-                                            // interrupt.
-#define GPIO_GPIO_IBE_IBE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IEV register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IEV_IEV_M     0x000000FF  // GPIO Interrupt Event Value
-                                            // Description 1 A falling edge or a
-                                            // Low level on the corresponding
-                                            // pin triggers an interrupt. 0 A
-                                            // rising edge or a High level on
-                                            // the corresponding pin triggers an
-                                            // interrupt.
-#define GPIO_GPIO_IEV_IEV_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IM register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IM_IME_M      0x000000FF  // GPIO Interrupt Mask Enable Value
-                                            // Description 0 The interrupt from
-                                            // the corresponding pin is masked.
-                                            // 1 The interrupt from the
-                                            // corresponding pin is sent to the
-                                            // interrupt controller.
-#define GPIO_GPIO_IM_IME_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_RIS register.
-//
-//******************************************************************************
-#define GPIO_GPIO_RIS_RIS_M     0x000000FF  // GPIO Interrupt Raw Status Value
-                                            // Description 1 An interrupt
-                                            // condition has occurred on the
-                                            // corresponding pin. 0 interrupt
-                                            // condition has not occurred on the
-                                            // corresponding pin. A bit is
-                                            // cleared by writing a 1 to the
-                                            // corresponding bit in the GPIOICR
-                                            // register.
-#define GPIO_GPIO_RIS_RIS_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_MIS register.
-//
-//******************************************************************************
-#define GPIO_GPIO_MIS_MIS_M     0x000000FF  // GPIO Masked Interrupt Status
-                                            // Value Description 1 An interrupt
-                                            // condition on the corresponding
-                                            // pin has triggered an interrupt to
-                                            // the interrupt controller. 0 An
-                                            // interrupt condition on the
-                                            // corresponding pin is masked or
-                                            // has not occurred. A bit is
-                                            // cleared by writing a 1 to the
-                                            // corresponding bit in the GPIOICR
-                                            // register.
-#define GPIO_GPIO_MIS_MIS_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_ICR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_ICR_IC_M      0x000000FF  // GPIO Interrupt Clear Value
-                                            // Description 1 The corresponding
-                                            // interrupt is cleared. 0 The
-                                            // corresponding interrupt is
-                                            // unaffected.
-#define GPIO_GPIO_ICR_IC_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_AFSEL register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DR2R register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DR2R_DRV2_M   0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // 2-mA Drive Enable Value
-                                            // Description 1 The corresponding
-                                            // GPIO pin has 2-mA drive. The
-                                            // drive for the corresponding GPIO
-                                            // pin is controlled by the GPIODR4R
-                                            // or GPIODR8R register. 0 Setting a
-                                            // bit in either the GPIODR4
-                                            // register or the GPIODR8 register
-                                            // clears the corresponding 2-mA
-                                            // enable bit. The change is
-                                            // effective on the second clock
-                                            // cycle after the write if
-                                            // accessing GPIO via the APB memory
-                                            // aperture. If using AHB access@@
-                                            // the change is effective on the
-                                            // next clock cycle.
-#define GPIO_GPIO_DR2R_DRV2_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DR4R register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DR4R_DRV4_M   0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // 4-mA Drive Enable Value
-                                            // Description 1 The corresponding
-                                            // GPIO pin has 4-mA drive. The
-                                            // drive for the corresponding GPIO
-                                            // pin is controlled by the GPIODR2R
-                                            // or GPIODR8R register. 0 Setting a
-                                            // bit in either the GPIODR2
-                                            // register or the GPIODR8 register
-                                            // clears the corresponding 4-mA
-                                            // enable bit. The change is
-                                            // effective on the second clock
-                                            // cycle after the write if
-                                            // accessing GPIO via the APB memory
-                                            // aperture. If using AHB access@@
-                                            // the change is effective on the
-                                            // next clock cycle.
-#define GPIO_GPIO_DR4R_DRV4_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DR8R register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DR8R_DRV8_M   0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // 8-mA Drive Enable Value
-                                            // Description 1 The corresponding
-                                            // GPIO pin has 8-mA drive. The
-                                            // drive for the corresponding GPIO
-                                            // pin is controlled by the GPIODR2R
-                                            // or GPIODR4R register. 0 Setting a
-                                            // bit in either the GPIODR2
-                                            // register or the GPIODR4 register
-                                            // clears the corresponding 8-mA
-                                            // enable bit. The change is
-                                            // effective on the second clock
-                                            // cycle after the write if
-                                            // accessing GPIO via the APB memory
-                                            // aperture. If using AHB access@@
-                                            // the change is effective on the
-                                            // next clock cycle.
-#define GPIO_GPIO_DR8R_DRV8_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_ODR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_ODR_ODE_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // Open Drain Enable Value
-                                            // Description 1 The corresponding
-                                            // pin is configured as open drain.
-                                            // 0 The corresponding pin is not
-                                            // configured as open drain.
-#define GPIO_GPIO_ODR_ODE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_PUR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PUR_PUE_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Pad Weak
-                                            // Pull-Up Enable Value Description
-                                            // 1 The corresponding pin has a
-                                            // weak pull-up resistor. 0 The
-                                            // corresponding pin is not
-                                            // affected. Setting a bit in the
-                                            // GPIOPDR register clears the
-                                            // corresponding bit in the GPIOPUR
-                                            // register. The change is effective
-                                            // on the second clock cycle after
-                                            // the write if accessing GPIO via
-                                            // the APB memory aperture. If using
-                                            // AHB access@@ the change is
-                                            // effective on the next clock
-                                            // cycle.
-#define GPIO_GPIO_PUR_PUE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_PDR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PDR_PDE_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Pad Weak
-                                            // Pull-Down Enable Value
-                                            // Description 1 The corresponding
-                                            // pin has a weak pull-down
-                                            // resistor. 0 The corresponding pin
-                                            // is not affected. Setting a bit in
-                                            // the GPIOPUR register clears the
-                                            // corresponding bit in the GPIOPDR
-                                            // register. The change is effective
-                                            // on the second clock cycle after
-                                            // the write if accessing GPIO via
-                                            // the APB memory aperture. If using
-                                            // AHB access@@ the change is
-                                            // effective on the next clock
-                                            // cycle.
-#define GPIO_GPIO_PDR_PDE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_SLR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_SLR_SRL_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Slew Rate
-                                            // Limit Enable (8-mA drive only)
-                                            // Value Description 1 Slew rate
-                                            // control is enabled for the
-                                            // corresponding pin. 0 Slew rate
-                                            // control is disabled for the
-                                            // corresponding pin.
-#define GPIO_GPIO_SLR_SRL_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DEN register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DEN_DEN_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Digital Enable
-                                            // Value Description 0 The digital
-                                            // functions for the corresponding
-                                            // pin are disabled. 1 The digital
-                                            // functions for the corresponding
-                                            // pin are enabled.
-#define GPIO_GPIO_DEN_DEN_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_LOCK register.
-//
-//******************************************************************************
-#define GPIO_GPIO_LOCK_LOCK_M   0xFFFFFFFF  // This register is not used in
-                                            // cc3xx. GPIO Lock A write of the
-                                            // value 0x4C4F.434B unlocks the
-                                            // GPIO Commit (GPIOCR) register for
-                                            // write access.A write of any other
-                                            // value or a write to the GPIOCR
-                                            // register reapplies the lock@@
-                                            // preventing any register updates.
-                                            // A read of this register returns
-                                            // the following values: Value
-                                            // Description 0x1 The GPIOCR
-                                            // register is locked and may not be
-                                            // modified. 0x0 The GPIOCR register
-                                            // is unlocked and may be modified.
-#define GPIO_GPIO_LOCK_LOCK_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_CR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_CR_CR_M       0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) GPIO Commit
-                                            // Value Description The
-                                            // corresponding GPIOAFSEL@@
-                                            // GPIOPUR@@ GPIOPDR@@ or GPIODEN
-                                            // bits can be written. 1 The
-                                            // corresponding GPIOAFSEL@@
-                                            // GPIOPUR@@ GPIOPDR@@ or GPIODEN
-                                            // bits cannot be written. 0 Note:
-                                            // The default register type for the
-                                            // GPIOCR register is RO for all
-                                            // GPIO pins with the exception of
-                                            // the NMI pin and the four JTAG/SWD
-                                            // pins (PD7@@ PF0@@ and PC[3:0]).
-                                            // These six pins are the only GPIOs
-                                            // that are protected by the GPIOCR
-                                            // register. Because of this@@ the
-                                            // register type for GPIO Port D7@@
-                                            // GPIO Port F0@@ and GPIO Port
-                                            // C[3:0] is R/W. The default reset
-                                            // value for the GPIOCR register is
-                                            // 0x0000.00FF for all GPIO pins@@
-                                            // with the exception of the NMI pin
-                                            // and the four JTAG/SWD pins (PD7@@
-                                            // PF0@@ and PC[3:0]). To ensure
-                                            // that the JTAG port is not
-                                            // accidentally programmed as GPIO
-                                            // pins@@ the PC[3:0] pins default
-                                            // to non-committable. Similarly@@
-                                            // to ensure that the NMI pin is not
-                                            // accidentally programmed as a GPIO
-                                            // pin@@ the PD7 and PF0 pins
-                                            // default to non-committable.
-                                            // Because of this@@ the default
-                                            // reset value of GPIOCR for GPIO
-                                            // Port C is 0x0000.00F0@@ for GPIO
-                                            // Port D is 0x0000.007F@@ and for
-                                            // GPIO Port F is 0x0000.00FE.
-#define GPIO_GPIO_CR_CR_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_AMSEL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_AMSEL_GPIO_AMSEL_M \
-                                0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) GPIO Analog
-                                            // Mode Select Value Description 1
-                                            // The analog function of the pin is
-                                            // enabled@@ the isolation is
-                                            // disabled@@ and the pin is capable
-                                            // of analog functions. 0 The analog
-                                            // function of the pin is disabled@@
-                                            // the isolation is enabled@@ and
-                                            // the pin is capable of digital
-                                            // functions as specified by the
-                                            // other GPIO configuration
-                                            // registers. Note: This register
-                                            // and bits are only valid for GPIO
-                                            // signals that share analog
-                                            // function through a unified I/O
-                                            // pad. The reset state of this
-                                            // register is 0 for all signals.
-
-#define GPIO_GPIO_AMSEL_GPIO_AMSEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_PCTL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCTL_PMC7_M   0xF0000000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 7 This field controls the
-                                            // configuration for GPIO pin 7.
-#define GPIO_GPIO_PCTL_PMC7_S   28
-#define GPIO_GPIO_PCTL_PMC6_M   0x0F000000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 6 This field controls the
-                                            // configuration for GPIO pin 6.
-#define GPIO_GPIO_PCTL_PMC6_S   24
-#define GPIO_GPIO_PCTL_PMC5_M   0x00F00000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 5 This field controls the
-                                            // configuration for GPIO pin 5.
-#define GPIO_GPIO_PCTL_PMC5_S   20
-#define GPIO_GPIO_PCTL_PMC4_M   0x000F0000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 4 This field controls the
-                                            // configuration for GPIO pin 4.
-#define GPIO_GPIO_PCTL_PMC4_S   16
-#define GPIO_GPIO_PCTL_PMC3_M   0x0000F000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 43 This field controls
-                                            // the configuration for GPIO pin 3.
-#define GPIO_GPIO_PCTL_PMC3_S   12
-#define GPIO_GPIO_PCTL_PMC1_M   0x00000F00  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 1 This field controls the
-                                            // configuration for GPIO pin 1.
-#define GPIO_GPIO_PCTL_PMC1_S   8
-#define GPIO_GPIO_PCTL_PMC2_M   0x000000F0  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 2 This field controls the
-                                            // configuration for GPIO pin 2.
-#define GPIO_GPIO_PCTL_PMC2_S   4
-#define GPIO_GPIO_PCTL_PMC0_M   0x0000000F  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 0 This field controls the
-                                            // configuration for GPIO pin 0.
-#define GPIO_GPIO_PCTL_PMC0_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_ADCCTL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_ADCCTL_ADCEN_M \
-                                0x000000FF  // This register is not used in
-                                            // cc3xx. ADC trigger via GPIO is
-                                            // not supported. ADC Trigger Enable
-                                            // Value Description 1 The
-                                            // corresponding pin is used to
-                                            // trigger the ADC. 0 The
-                                            // corresponding pin is not used to
-                                            // trigger the ADC.
-
-#define GPIO_GPIO_ADCCTL_ADCEN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_DMACTL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DMACTL_DMAEN_M \
-                                0x000000FF  // This register is not used in the
-                                            // cc3xx. Alternate register to
-                                            // support this feature is coded in
-                                            // the APPS_NWP_CMN space. refer
-                                            // register as offset 0x400F70D8
-                                            // ?DMA Trigger Enable Value
-                                            // Description 1 The corresponding
-                                            // pin is used to trigger the ?DMA.
-                                            // 0 The corresponding pin is not
-                                            // used to trigger the ?DMA.
-
-#define GPIO_GPIO_DMACTL_DMAEN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_SI register.
-//
-//******************************************************************************
-#define GPIO_GPIO_SI_SUM        0x00000001  // Summary Interrupt Value
-                                            // Description 1 Each pin has its
-                                            // own interrupt vector. 0 All port
-                                            // pin interrupts are OR'ed together
-                                            // to produce a summary interrupt.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID4 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID4_PID4_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [7:0]
-
-#define GPIO_GPIO_PERIPHID4_PID4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID5 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID5_PID5_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [15:8]
-
-#define GPIO_GPIO_PERIPHID5_PID5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID6 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID6_PID6_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [23:16]
-
-#define GPIO_GPIO_PERIPHID6_PID6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID7 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID7_PID7_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [31:24]
-
-#define GPIO_GPIO_PERIPHID7_PID7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID0 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID0_PID0_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [7:0] Can be used by
-                                            // software to identify the presence
-                                            // of this peripheral.
-
-#define GPIO_GPIO_PERIPHID0_PID0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID1 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID1_PID1_M \
-                                0x000000FF  // GPIO Peripheral ID Register
-                                            // [15:8] Can be used by software to
-                                            // identify the presence of this
-                                            // peripheral.
-
-#define GPIO_GPIO_PERIPHID1_PID1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID2 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID2_PID2_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX.v GPIO Peripheral ID
-                                            // Register [23:16] Can be used by
-                                            // software to identify the presence
-                                            // of this peripheral.
-
-#define GPIO_GPIO_PERIPHID2_PID2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID3 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID3_PID3_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [31:24] Can be used by
-                                            // software to identify the presence
-                                            // of this peripheral.
-
-#define GPIO_GPIO_PERIPHID3_PID3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID0 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID0_CID0_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [7:0] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID0_CID0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID1 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID1_CID1_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [15:8] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID1_CID1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID2 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID2_CID2_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [23:16] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID2_CID2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID3 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID3_CID3_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [31:24] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID3_CID3_S 0
-
-
-
-#endif // __HW_GPIO_H__
diff --git a/ports/cc3200/hal/inc/hw_gprcm.h b/ports/cc3200/hal/inc/hw_gprcm.h
deleted file mode 100644
index 43628f4aba..0000000000
--- a/ports/cc3200/hal/inc/hw_gprcm.h
+++ /dev/null
@@ -1,3322 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_GPRCM_H__
-#define __HW_GPRCM_H__
-
-//*****************************************************************************
-//
-// The following are defines for the GPRCM register offsets.
-//
-//*****************************************************************************
-#define GPRCM_O_APPS_SOFT_RESET 0x00000000
-#define GPRCM_O_APPS_LPDS_WAKEUP_CFG \
-                                0x00000004
-
-#define GPRCM_O_APPS_LPDS_WAKEUP_SRC \
-                                0x00000008
-
-#define GPRCM_O_APPS_RESET_CAUSE \
-                                0x0000000C
-
-#define GPRCM_O_APPS_LPDS_WAKETIME_OPP_CFG \
-                                0x00000010
-
-#define GPRCM_O_APPS_SRAM_DSLP_CFG \
-                                0x00000018
-
-#define GPRCM_O_APPS_SRAM_LPDS_CFG \
-                                0x0000001C
-
-#define GPRCM_O_APPS_LPDS_WAKETIME_WAKE_CFG \
-                                0x00000020
-
-#define GPRCM_O_TOP_DIE_ENABLE  0x00000100
-#define GPRCM_O_TOP_DIE_ENABLE_PARAMETERS \
-                                0x00000104
-
-#define GPRCM_O_MCU_GLOBAL_SOFT_RESET \
-                                0x00000108
-
-#define GPRCM_O_ADC_CLK_CONFIG  0x0000010C
-#define GPRCM_O_APPS_GPIO_WAKE_CONF \
-                                0x00000110
-
-#define GPRCM_O_EN_NWP_BOOT_WO_DEVINIT \
-                                0x00000114
-
-#define GPRCM_O_MEM_HCLK_DIV_CFG \
-                                0x00000118
-
-#define GPRCM_O_MEM_SYSCLK_DIV_CFG \
-                                0x0000011C
-
-#define GPRCM_O_APLLMCS_LOCK_TIME_CONF \
-                                0x00000120
-
-#define GPRCM_O_NWP_SOFT_RESET  0x00000400
-#define GPRCM_O_NWP_LPDS_WAKEUP_CFG \
-                                0x00000404
-
-#define GPRCM_O_NWP_LPDS_WAKEUP_SRC \
-                                0x00000408
-
-#define GPRCM_O_NWP_RESET_CAUSE 0x0000040C
-#define GPRCM_O_NWP_LPDS_WAKETIME_OPP_CFG \
-                                0x00000410
-
-#define GPRCM_O_NWP_SRAM_DSLP_CFG \
-                                0x00000418
-
-#define GPRCM_O_NWP_SRAM_LPDS_CFG \
-                                0x0000041C
-
-#define GPRCM_O_NWP_LPDS_WAKETIME_WAKE_CFG \
-                                0x00000420
-
-#define GPRCM_O_NWP_AUTONMS_SPI_MASTER_SEL \
-                                0x00000424
-
-#define GPRCM_O_NWP_AUTONMS_SPI_IDLE_REQ \
-                                0x00000428
-
-#define GPRCM_O_WLAN_TO_NWP_WAKE_REQUEST \
-                                0x0000042C
-
-#define GPRCM_O_NWP_TO_WLAN_WAKE_REQUEST \
-                                0x00000430
-
-#define GPRCM_O_NWP_GPIO_WAKE_CONF \
-                                0x00000434
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG12 \
-                                0x00000438
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG5 \
-                                0x00000448
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG6 \
-                                0x0000044C
-
-#define GPRCM_O_REF_FSM_CFG0    0x00000800
-#define GPRCM_O_REF_FSM_CFG1    0x00000804
-#define GPRCM_O_APLLMCS_WLAN_CONFIG0_40 \
-                                0x00000808
-
-#define GPRCM_O_APLLMCS_WLAN_CONFIG1_40 \
-                                0x0000080C
-
-#define GPRCM_O_APLLMCS_WLAN_CONFIG0_26 \
-                                0x00000810
-
-#define GPRCM_O_APLLMCS_WLAN_CONFIG1_26 \
-                                0x00000814
-
-#define GPRCM_O_APLLMCS_WLAN_OVERRIDES \
-                                0x00000818
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_38P4 \
-                                0x0000081C
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_38P4 \
-                                0x00000820
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_26 \
-                                0x00000824
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_26 \
-                                0x00000828
-
-#define GPRCM_O_SPARE_RW0       0x0000082C
-#define GPRCM_O_SPARE_RW1       0x00000830
-#define GPRCM_O_APLLMCS_MCU_OVERRIDES \
-                                0x00000834
-
-#define GPRCM_O_SYSCLK_SWITCH_STATUS \
-                                0x00000838
-
-#define GPRCM_O_REF_LDO_CONTROLS \
-                                0x0000083C
-
-#define GPRCM_O_REF_RTRIM_CONTROL \
-                                0x00000840
-
-#define GPRCM_O_REF_SLICER_CONTROLS0 \
-                                0x00000844
-
-#define GPRCM_O_REF_SLICER_CONTROLS1 \
-                                0x00000848
-
-#define GPRCM_O_REF_ANA_BGAP_CONTROLS0 \
-                                0x0000084C
-
-#define GPRCM_O_REF_ANA_BGAP_CONTROLS1 \
-                                0x00000850
-
-#define GPRCM_O_REF_ANA_SPARE_CONTROLS0 \
-                                0x00000854
-
-#define GPRCM_O_REF_ANA_SPARE_CONTROLS1 \
-                                0x00000858
-
-#define GPRCM_O_MEMSS_PSCON_OVERRIDES0 \
-                                0x0000085C
-
-#define GPRCM_O_MEMSS_PSCON_OVERRIDES1 \
-                                0x00000860
-
-#define GPRCM_O_PLL_REF_LOCK_OVERRIDES \
-                                0x00000864
-
-#define GPRCM_O_MCU_PSCON_DEBUG 0x00000868
-#define GPRCM_O_MEMSS_PWR_PS    0x0000086C
-#define GPRCM_O_REF_FSM_DEBUG   0x00000870
-#define GPRCM_O_MEM_SYS_OPP_REQ_OVERRIDE \
-                                0x00000874
-
-#define GPRCM_O_MEM_TESTCTRL_PD_OPP_CONFIG \
-                                0x00000878
-
-#define GPRCM_O_MEM_WL_FAST_CLK_REQ_OVERRIDES \
-                                0x0000087C
-
-#define GPRCM_O_MEM_MCU_PD_MODE_REQ_OVERRIDES \
-                                0x00000880
-
-#define GPRCM_O_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES \
-                                0x00000884
-
-#define GPRCM_O_MEM_WLAN_APLLMCS_OVERRIDES \
-                                0x00000888
-
-#define GPRCM_O_MEM_REF_FSM_CFG2 \
-                                0x0000088C
-
-#define GPRCM_O_TESTCTRL_POWER_CTRL \
-                                0x00000C10
-
-#define GPRCM_O_SSDIO_POWER_CTRL \
-                                0x00000C14
-
-#define GPRCM_O_MCSPI_N1_POWER_CTRL \
-                                0x00000C18
-
-#define GPRCM_O_WELP_POWER_CTRL 0x00000C1C
-#define GPRCM_O_WL_SDIO_POWER_CTRL \
-                                0x00000C20
-
-#define GPRCM_O_WLAN_SRAM_ACTIVE_PWR_CFG \
-                                0x00000C24
-
-#define GPRCM_O_WLAN_SRAM_SLEEP_PWR_CFG \
-                                0x00000C28
-
-#define GPRCM_O_APPS_SECURE_INIT_DONE \
-                                0x00000C30
-
-#define GPRCM_O_APPS_DEV_MODE_INIT_DONE \
-                                0x00000C34
-
-#define GPRCM_O_EN_APPS_REBOOT  0x00000C38
-#define GPRCM_O_MEM_APPS_PERIPH_PRESENT \
-                                0x00000C3C
-
-#define GPRCM_O_MEM_NWP_PERIPH_PRESENT \
-                                0x00000C40
-
-#define GPRCM_O_MEM_SHARED_PERIPH_PRESENT \
-                                0x00000C44
-
-#define GPRCM_O_NWP_PWR_STATE   0x00000C48
-#define GPRCM_O_APPS_PWR_STATE  0x00000C4C
-#define GPRCM_O_MCU_PWR_STATE   0x00000C50
-#define GPRCM_O_WTOP_PM_PS      0x00000C54
-#define GPRCM_O_WTOP_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C58
-
-#define GPRCM_O_WELP_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C5C
-
-#define GPRCM_O_WL_SDIO_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C60
-
-#define GPRCM_O_SSDIO_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C64
-
-#define GPRCM_O_MCSPI_N1_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C68
-
-#define GPRCM_O_TESTCTRL_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C6C
-
-#define GPRCM_O_MCU_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C70
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG0 \
-                                0x00000C78
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG1 \
-                                0x00000C7C
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG2 \
-                                0x00000C80
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG3 \
-                                0x00000C84
-
-#define GPRCM_O_WTOP_MEM_RET_CFG \
-                                0x00000C88
-
-#define GPRCM_O_COEX_CLK_SWALLOW_CFG0 \
-                                0x00000C8C
-
-#define GPRCM_O_COEX_CLK_SWALLOW_CFG1 \
-                                0x00000C90
-
-#define GPRCM_O_COEX_CLK_SWALLOW_CFG2 \
-                                0x00000C94
-
-#define GPRCM_O_COEX_CLK_SWALLOW_ENABLE \
-                                0x00000C98
-
-#define GPRCM_O_DCDC_CLK_GEN_CONFIG \
-                                0x00000C9C
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG4 \
-                                0x00000CA0
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG5 \
-                                0x00000CA4
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG6 \
-                                0x00000CA8
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG7 \
-                                0x00000CAC
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG8 \
-                                0x00000CB0
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG9 \
-                                0x00000CB4
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG10 \
-                                0x00000CB8
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG11 \
-                                0x00000CBC
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG0 \
-                                0x00000CC0
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG1 \
-                                0x00000CC4
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG2 \
-                                0x00000CC8
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG3 \
-                                0x00000CCC
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG4 \
-                                0x00000CD0
-
-#define GPRCM_O_APPS_SS_OVERRIDES \
-                                0x00000CD4
-
-#define GPRCM_O_NWP_SS_OVERRIDES \
-                                0x00000CD8
-
-#define GPRCM_O_SHARED_SS_OVERRIDES \
-                                0x00000CDC
-
-#define GPRCM_O_IDMEM_CORE_RST_OVERRIDES \
-                                0x00000CE0
-
-#define GPRCM_O_TOP_DIE_FSM_OVERRIDES \
-                                0x00000CE4
-
-#define GPRCM_O_MCU_PSCON_OVERRIDES \
-                                0x00000CE8
-
-#define GPRCM_O_WTOP_PSCON_OVERRIDES \
-                                0x00000CEC
-
-#define GPRCM_O_WELP_PSCON_OVERRIDES \
-                                0x00000CF0
-
-#define GPRCM_O_WL_SDIO_PSCON_OVERRIDES \
-                                0x00000CF4
-
-#define GPRCM_O_MCSPI_PSCON_OVERRIDES \
-                                0x00000CF8
-
-#define GPRCM_O_SSDIO_PSCON_OVERRIDES \
-                                0x00000CFC
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SOFT_RESET register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SOFT_RESET_APPS_SOFT_RESET1 \
-                                0x00000002  // Soft-reset1 for APPS : Cortex
-                                            // sysrstn is asserted and in
-                                            // addition to that the associated
-                                            // APPS Peripherals are also reset.
-                                            // This is an auto-clear bit.
-
-#define GPRCM_APPS_SOFT_RESET_APPS_SOFT_RESET0 \
-                                0x00000001  // Soft-reset0 for APPS : Only
-                                            // sys-resetn for Cortex will be
-                                            // asserted. This is an auto-clear
-                                            // bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKEUP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKEUP_CFG_APPS_LPDS_WAKEUP_CFG_M \
-                                0x000000FF  // Mask for LPDS Wakeup interrupt :
-                                            // [7] - Host IRQ from NWP [6] -
-                                            // NWP_LPDS_Wake_irq (TRUE_LPDS) [5]
-                                            // - NWP Wake-request to APPS [4] -
-                                            // GPIO [3:1] - Reserved [0] - LPDS
-                                            // Wakeup-timer
-
-#define GPRCM_APPS_LPDS_WAKEUP_CFG_APPS_LPDS_WAKEUP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKEUP_SRC register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKEUP_SRC_APPS_LPDS_WAKEUP_SRC_M \
-                                0x000000FF  // Indicates the cause for wakeup
-                                            // from LPDS : [7] - Host IRQ from
-                                            // NWP [6] - NWP_LPDS_Wake_irq
-                                            // (TRUE_LPDS) [5] - NWP
-                                            // Wake-request to APPS [4] - GPIO
-                                            // [3:1] - Reserved [0] - LPDS
-                                            // Wakeup-timer
-
-#define GPRCM_APPS_LPDS_WAKEUP_SRC_APPS_LPDS_WAKEUP_SRC_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_RESET_CAUSE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_RESET_CAUSE_APPS_RESET_CAUSE_M \
-                                0x000000FF  // Indicates the reset cause for
-                                            // APPS : "0000" - Wake from HIB/OFF
-                                            // mode; "0001" - Wake from LPDS ;
-                                            // "0010" - Reserved ; "0011" -
-                                            // Soft-reset0 (Only APPS
-                                            // Cortex-sysrstn is asserted);
-                                            // "0100" - Soft-reset1 (APPS
-                                            // Cortex-sysrstn and APPS
-                                            // peripherals are reset); "0101" -
-                                            // WDOG0 (APPS Cortex-sysrstn and
-                                            // APPS peripherals are reset);
-                                            // "0110" - MCU Soft-reset (APPS +
-                                            // NWP Cortex-sysrstn + Peripherals
-                                            // are reset); "0111" - Secure Init
-                                            // done (Indication that reset has
-                                            // happened after DevInit); "1000" -
-                                            // Dev Mode Patch Init done (During
-                                            // development mode, patch
-                                            // downloading and Cortex
-                                            // re-vectoring is completed)
-
-#define GPRCM_APPS_RESET_CAUSE_APPS_RESET_CAUSE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKETIME_OPP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKETIME_OPP_CFG_APPS_LPDS_WAKETIME_OPP_CFG_M \
-                                0xFFFFFFFF  // OPP Request Configuration
-                                            // (Number of slow-clk cycles) for
-                                            // LPDS Wake-timer : This
-                                            // configuration implies the RTC
-                                            // time-stamp, which must be few
-                                            // slow-clks prior to
-                                            // APPS_LPDS_WAKETIME_WAKE_CFG, such
-                                            // that by the time actual wakeup is
-                                            // given, OPP is already switched to
-                                            // ACTIVE (RUN).
-
-#define GPRCM_APPS_LPDS_WAKETIME_OPP_CFG_APPS_LPDS_WAKETIME_OPP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SRAM_DSLP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SRAM_DSLP_CFG_APPS_SRAM_DSLP_CFG_M \
-                                0x000FFFFF  // Configuration of APPS Memories
-                                            // during Deep-sleep : 0 - SRAMs are
-                                            // OFF ; 1 - SRAMs are Retained.
-                                            // APPS SRAM Cluster information :
-                                            // [0] - 1st column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS); [1] - 2nd column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS); [2] - 3rd column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS) ; [3] - 4th column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS) ; [16] - MCU-PD - Apps
-                                            // cluster 0 (TBD); [19:18] -
-                                            // Reserved.
-
-#define GPRCM_APPS_SRAM_DSLP_CFG_APPS_SRAM_DSLP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SRAM_LPDS_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SRAM_LPDS_CFG_APPS_SRAM_LPDS_CFG_M \
-                                0x000FFFFF  // Configuration of APPS Memories
-                                            // during LPDS : 0 - SRAMs are OFF ;
-                                            // 1 - SRAMs are Retained. APPS SRAM
-                                            // Cluster information : [0] - 1st
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS); [1] - 2nd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS); [2] - 3rd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS) ; [3] - 4th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS) ; [16] -
-                                            // MCU-PD - Apps cluster 0 (TBD);
-                                            // [19:18] - Reserved.
-
-#define GPRCM_APPS_SRAM_LPDS_CFG_APPS_SRAM_LPDS_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKETIME_WAKE_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKETIME_WAKE_CFG_APPS_LPDS_WAKETIME_WAKE_CFG_M \
-                                0xFFFFFFFF  // Configuration (in no of
-                                            // slow_clks) which says when the
-                                            // actual wakeup request for
-                                            // removing the PD-reset be given.
-
-#define GPRCM_APPS_LPDS_WAKETIME_WAKE_CFG_APPS_LPDS_WAKETIME_WAKE_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TOP_DIE_ENABLE register.
-//
-//******************************************************************************
-#define GPRCM_TOP_DIE_ENABLE_FLASH_BUSY \
-                                0x00001000
-
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_PWR_PS_M \
-                                0x00000F00
-
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_PWR_PS_S 8
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_ENABLE_STATUS \
-                                0x00000002  // 1 - Top-die is enabled ;
-
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_ENABLE \
-                                0x00000001  // 1 - Enable the top-die ; 0 -
-                                            // Disable the top-die
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TOP_DIE_ENABLE_PARAMETERS register.
-//
-//******************************************************************************
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_FLASH_3P3_RSTN2D2D_POR_RSTN_M \
-                                0xF0000000  // Configuration (in slow_clks) for
-                                            // number of clks between
-                                            // Flash-3p3-rstn to D2D POR Resetn.
-
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_FLASH_3P3_RSTN2D2D_POR_RSTN_S 28
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_SW_EN2TOP_DIE_FLASH_3P3_RSTN_M \
-                                0x00FF0000  // Configuration (in slow_clks) for
-                                            // number of clks between Top-die
-                                            // Switch-Enable and Top-die Flash
-                                            // 3p3 Reset removal
-
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_SW_EN2TOP_DIE_FLASH_3P3_RSTN_S 16
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_POR_RSTN2BOTT_DIE_FMC_RSTN_M \
-                                0x000000FF  // Configuration (in slow_clks) for
-                                            // number of clks between D2D POR
-                                            // Reset removal and bottom die FMC
-                                            // reset removal
-
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_POR_RSTN2BOTT_DIE_FMC_RSTN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_GLOBAL_SOFT_RESET register.
-//
-//******************************************************************************
-#define GPRCM_MCU_GLOBAL_SOFT_RESET_MCU_GLOBAL_SOFT_RESET \
-                                0x00000001  // 1 - Assert the global reset for
-                                            // MCU (APPS + NWP) ; Asserts both
-                                            // Cortex sysrstn and its
-                                            // peripherals 0 - Deassert the
-                                            // global reset for MCU (APPS + NWP)
-                                            // ; Asserts both Cortex sysrstn and
-                                            // its peripherals Note : Reset for
-                                            // shared peripherals is not
-                                            // affected here.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_ADC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_OFF_TIME_M \
-                                0x000007C0  // Configuration (in number of 38.4
-                                            // MHz clks) for the OFF-Time in
-                                            // generation of ADC_CLK
-
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_OFF_TIME_S 6
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_ON_TIME_M \
-                                0x0000003E  // Configuration (in number of 38.4
-                                            // MHz clks) for the ON-Time in
-                                            // generation of ADC_CLK
-
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_ON_TIME_S 1
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the ADC_CLK ; 0 -
-                                            // Disable the ADC_CLK
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_GPIO_WAKE_CONF register.
-//
-//******************************************************************************
-#define GPRCM_APPS_GPIO_WAKE_CONF_APPS_GPIO_WAKE_CONF_M \
-                                0x00000003  // "00" - Wake on Level0 on
-                                            // selected GPIO pin (GPIO is
-                                            // selected inside the HIB3p3
-                                            // module); "01" - Wakeup on
-                                            // fall-edge of GPIO pin.
-
-#define GPRCM_APPS_GPIO_WAKE_CONF_APPS_GPIO_WAKE_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_EN_NWP_BOOT_WO_DEVINIT register.
-//
-//******************************************************************************
-#define GPRCM_EN_NWP_BOOT_WO_DEVINIT_reserved_M \
-                                0xFFFFFFFE
-
-#define GPRCM_EN_NWP_BOOT_WO_DEVINIT_reserved_S 1
-#define GPRCM_EN_NWP_BOOT_WO_DEVINIT_mem_en_nwp_boot_wo_devinit \
-                                0x00000001  // 1 - Override the secure-mode
-                                            // done for booting up NWP (Wakeup
-                                            // NWP on its event independent of
-                                            // CM4 state) ; 0 - Donot override
-                                            // the secure-mode done for NWP boot
-                                            // (NWP must be enabled by CM4 only)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_HCLK_DIV_CFG register.
-//
-//******************************************************************************
-#define GPRCM_MEM_HCLK_DIV_CFG_mem_hclk_div_cfg_M \
-                                0x00000007  // Division configuration for
-                                            // HCLKDIVOUT : "000" - Divide by 1
-                                            // ; "001" - Divide by 2 ; "010" -
-                                            // Divide by 3 ; "011" - Divide by 4
-                                            // ; "100" - Divide by 5 ; "101" -
-                                            // Divide by 6 ; "110" - Divide by 7
-                                            // ; "111" - Divide by 8
-
-#define GPRCM_MEM_HCLK_DIV_CFG_mem_hclk_div_cfg_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_SYSCLK_DIV_CFG register.
-//
-//******************************************************************************
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_off_time_M \
-                                0x00000038
-
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_off_time_S 3
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_on_time_M \
-                                0x00000007
-
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_on_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_LOCK_TIME_CONF register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_wlan_lock_time_M \
-                                0x0000FF00
-
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_wlan_lock_time_S 8
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_mcu_lock_time_M \
-                                0x000000FF
-
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_mcu_lock_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SOFT_RESET register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SOFT_RESET_NWP_SOFT_RESET1 \
-                                0x00000002  // Soft-reset1 for NWP - Cortex
-                                            // sysrstn and NWP associated
-                                            // peripherals are - This is an
-                                            // auto-clr bit.
-
-#define GPRCM_NWP_SOFT_RESET_NWP_SOFT_RESET0 \
-                                0x00000001  // Soft-reset0 for NWP - Only
-                                            // Cortex-sysrstn is asserted - This
-                                            // is an auto-clear bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKEUP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKEUP_CFG_NWP_LPDS_WAKEUP_CFG_M \
-                                0x000000FF  // Mask for LPDS Wakeup interrupt :
-                                            // 7 - WLAN Host Interrupt ; 6 -
-                                            // WLAN to NWP Wake request ; 5 -
-                                            // APPS to NWP Wake request; 4 -
-                                            // GPIO Wakeup ; 3 - Autonomous UART
-                                            // Wakeup ; 2 - SSDIO Wakeup ; 1 -
-                                            // Autonomous SPI Wakeup ; 0 - LPDS
-                                            // Wakeup-timer
-
-#define GPRCM_NWP_LPDS_WAKEUP_CFG_NWP_LPDS_WAKEUP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKEUP_SRC register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKEUP_SRC_NWP_LPDS_WAKEUP_SRC_M \
-                                0x000000FF  // Indicates the cause for NWP
-                                            // LPDS-Wakeup : 7 - WLAN Host
-                                            // Interrupt ; 6 - WLAN to NWP Wake
-                                            // request ; 5 - APPS to NWP Wake
-                                            // request; 4 - GPIO Wakeup ; 3 -
-                                            // Autonomous UART Wakeup ; 2 -
-                                            // SSDIO Wakeup ; 1 - Autonomous SPI
-                                            // Wakeup ; 0 - LPDS Wakeup-timer
-
-#define GPRCM_NWP_LPDS_WAKEUP_SRC_NWP_LPDS_WAKEUP_SRC_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_RESET_CAUSE register.
-//
-//******************************************************************************
-#define GPRCM_NWP_RESET_CAUSE_NWP_RESET_CAUSE_M \
-                                0x000000FF  // Indicates the reset cause for
-                                            // NWP : "0000" - Wake from HIB/OFF
-                                            // mode; "0001" - Wake from LPDS ;
-                                            // "0010" - Reserved ; "0011" -
-                                            // Soft-reset0 (Only NWP
-                                            // Cortex-sysrstn is asserted);
-                                            // "0100" - Soft-reset1 (NWP
-                                            // Cortex-sysrstn and NWP
-                                            // peripherals are reset); "0101" -
-                                            // WDOG0 (NWP Cortex-sysrstn and NWP
-                                            // peripherals are reset); "0110" -
-                                            // MCU Soft-reset (APPS + NWP
-                                            // Cortex-sysrstn + Peripherals are
-                                            // reset); "0111" - SSDIO Function2
-                                            // reset (Only Cortex-sysrstn is
-                                            // asserted) ; "1000" - Reset due to
-                                            // WDOG of APPS (NWP Cortex-sysrstn
-                                            // and NWP peripherals are reset);
-
-#define GPRCM_NWP_RESET_CAUSE_NWP_RESET_CAUSE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKETIME_OPP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKETIME_OPP_CFG_NWP_LPDS_WAKETIME_OPP_CFG_M \
-                                0xFFFFFFFF  // OPP Request Configuration
-                                            // (Number of slow-clk cycles) for
-                                            // LPDS Wake-timer
-
-#define GPRCM_NWP_LPDS_WAKETIME_OPP_CFG_NWP_LPDS_WAKETIME_OPP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SRAM_DSLP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SRAM_DSLP_CFG_NWP_SRAM_DSLP_CFG_M \
-                                0x000FFFFF  // Configuration of NWP Memories
-                                            // during DSLP : 0 - SRAMs are OFF ;
-                                            // 1 - SRAMs are Retained. NWP SRAM
-                                            // Cluster information : [2] - 3rd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [3] - 4th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [4] - 5th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [5] - 6th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [6] - 7th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [7] - 8th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [8] - 9th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [9] - 10th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [10] - 11th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [11] - 12th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [12] - 13th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [13] - 14th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [14] - 15th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [19:18] -
-                                            // Reserved.
-
-#define GPRCM_NWP_SRAM_DSLP_CFG_NWP_SRAM_DSLP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SRAM_LPDS_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SRAM_LPDS_CFG_NWP_SRAM_LPDS_CFG_M \
-                                0x000FFFFF  // Configuration of NWP Memories
-                                            // during LPDS : 0 - SRAMs are OFF ;
-                                            // 1 - SRAMs are Retained. NWP SRAM
-                                            // Cluster information : [2] - 3rd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [3] - 4th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [4] - 5th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [5] - 6th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [6] - 7th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [7] - 8th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [8] - 9th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [9] - 10th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [10] - 11th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [11] - 12th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [12] - 13th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [13] - 14th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [14] - 15th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [19:18] -
-                                            // Reserved.
-
-#define GPRCM_NWP_SRAM_LPDS_CFG_NWP_SRAM_LPDS_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKETIME_WAKE_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKETIME_WAKE_CFG_NWP_LPDS_WAKETIME_WAKE_CFG_M \
-                                0xFFFFFFFF  // Wake time configuration (no of
-                                            // slow clks) for NWP wake from
-                                            // LPDS.
-
-#define GPRCM_NWP_LPDS_WAKETIME_WAKE_CFG_NWP_LPDS_WAKETIME_WAKE_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_AUTONMS_SPI_MASTER_SEL register.
-//
-//******************************************************************************
-#define GPRCM_NWP_AUTONMS_SPI_MASTER_SEL_F_M \
-                                0xFFFE0000
-
-#define GPRCM_NWP_AUTONMS_SPI_MASTER_SEL_F_S 17
-#define GPRCM_NWP_AUTONMS_SPI_MASTER_SEL_MEM_AUTONMS_SPI_MASTER_SEL \
-                                0x00010000  // 0 - APPS is selected as host for
-                                            // Autonms SPI ; 1 - External host
-                                            // is selected as host for Autonms
-                                            // SPI
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_AUTONMS_SPI_IDLE_REQ register.
-//
-//******************************************************************************
-#define GPRCM_NWP_AUTONMS_SPI_IDLE_REQ_NWP_AUTONMS_SPI_IDLE_WAKEUP \
-                                0x00010000
-
-#define GPRCM_NWP_AUTONMS_SPI_IDLE_REQ_NWP_AUTONMS_SPI_IDLE_ACK \
-                                0x00000002  // When 1 => IDLE-mode is
-                                            // acknowledged by the SPI-IP. (This
-                                            // is for MCSPI_N1)
-
-#define GPRCM_NWP_AUTONMS_SPI_IDLE_REQ_NWP_AUTONMS_SPI_IDLE_REQ \
-                                0x00000001  // When 1 => Request for IDLE-mode
-                                            // for autonomous SPI. (This is for
-                                            // MCSPI_N1)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WLAN_TO_NWP_WAKE_REQUEST register.
-//
-//******************************************************************************
-#define GPRCM_WLAN_TO_NWP_WAKE_REQUEST_WLAN_TO_NWP_WAKE_REQUEST \
-                                0x00000001  // 1 - Request for waking up NWP
-                                            // from any of its low-power modes
-                                            // (SLP/DSLP/LPDS)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_TO_WLAN_WAKE_REQUEST register.
-//
-//******************************************************************************
-#define GPRCM_NWP_TO_WLAN_WAKE_REQUEST_NWP_TO_WLAN_WAKE_REQUEST \
-                                0x00000001  // 1 - Request for wakinp up WLAN
-                                            // from its ELP Mode (This gets
-                                            // triggered to ELP-logic of WLAN)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_GPIO_WAKE_CONF register.
-//
-//******************************************************************************
-#define GPRCM_NWP_GPIO_WAKE_CONF_NWP_GPIO_WAKE_CONF_M \
-                                0x00000003  // "00" - Wakeup on level0 of the
-                                            // selected GPIO (GPIO gets selected
-                                            // inside HIB3P3-module); "01" -
-                                            // Wakeup on fall-edge of selected
-                                            // GPIO.
-
-#define GPRCM_NWP_GPIO_WAKE_CONF_NWP_GPIO_WAKE_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG12 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG12_FUSEFARM_ROW_32_MSW_M \
-                                0x0000FFFF  // This corrsponds to ROW_32
-                                            // [31:16] of the FUSEFARM. SPARE
-
-#define GPRCM_GPRCM_EFUSE_READ_REG12_FUSEFARM_ROW_32_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG5 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG5_FUSEFARM_ROW_10_M \
-                                0xFFFFFFFF  // Corresponds to ROW10 of FUSEFARM
-                                            // : [5:0] - ADC OFFSET ; [13:6] -
-                                            // TEMP_SENSE ; [14:14] - DFT_GSG ;
-                                            // [15:15] - FMC_DISABLE ; [31:16] -
-                                            // WLAN_MAC ID
-
-#define GPRCM_GPRCM_DIEID_READ_REG5_FUSEFARM_ROW_10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG6 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG6_FUSEFARM_ROW_11_M \
-                                0xFFFFFFFF  // Corresponds to ROW11 of FUSEFARM
-                                            // : [31:0] : WLAN MAC ID
-
-#define GPRCM_GPRCM_DIEID_READ_REG6_FUSEFARM_ROW_11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_FSM_CFG0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_FSM_CFG0_BGAP_SETTLING_TIME_M \
-                                0x00FF0000  // ANA-BGAP Settling time (In
-                                            // number of slow_clks)
-
-#define GPRCM_REF_FSM_CFG0_BGAP_SETTLING_TIME_S 16
-#define GPRCM_REF_FSM_CFG0_FREF_LDO_SETTLING_TIME_M \
-                                0x0000FF00  // Slicer LDO settling time (In
-                                            // number of slow clks)
-
-#define GPRCM_REF_FSM_CFG0_FREF_LDO_SETTLING_TIME_S 8
-#define GPRCM_REF_FSM_CFG0_DIG_BUF_SETTLING_TIME_M \
-                                0x000000FF  // Dig-buffer settling time (In
-                                            // number of slow clks)
-
-#define GPRCM_REF_FSM_CFG0_DIG_BUF_SETTLING_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_FSM_CFG1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_FSM_CFG1_XTAL_SETTLING_TIME_M \
-                                0xFF000000  // XTAL settling time (In number of
-                                            // slow clks)
-
-#define GPRCM_REF_FSM_CFG1_XTAL_SETTLING_TIME_S 24
-#define GPRCM_REF_FSM_CFG1_SLICER_LV_SETTLING_TIME_M \
-                                0x00FF0000  // LV Slicer settling time
-
-#define GPRCM_REF_FSM_CFG1_SLICER_LV_SETTLING_TIME_S 16
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_PD_SETTLING_TIME_M \
-                                0x0000FF00  // HV Slicer Pull-down settling
-                                            // time
-
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_PD_SETTLING_TIME_S 8
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_SETTLING_TIME_M \
-                                0x000000FF  // HV Slicer settling time
-
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_SETTLING_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG0_40 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_N_40_M \
-                                0x00007F00  // Configuration for WLAN APLLMCS -
-                                            // N[6:0], if the XTAL frequency is
-                                            // 40 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_N_40_S 8
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_M_40_M \
-                                0x000000FF  // Configuration for WLAN APLLMCS -
-                                            // M[7:0], if the XTAL frequency is
-                                            // 40 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_M_40_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG1_40 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_HISPEED_40 \
-                                0x00000010  // Configuration for WLAN APLLMCS -
-                                            // if the XTAL frequency if 40 MHz
-                                            // (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_SEL96_40 \
-                                0x00000008  // Configuration for WLAN APLLMCS -
-                                            // Sel96, if the XTAL frequency is
-                                            // 40 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_SELINPFREQ_40_M \
-                                0x00000007  // Configuration for WLAN APLLMCS -
-                                            // Selinpfreq, if the XTAL frequency
-                                            // is 40 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_SELINPFREQ_40_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG0_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_N_26_M \
-                                0x00007F00  // Configuration for WLAN APLLMCS -
-                                            // N[6:0], if the XTAL frequency is
-                                            // 26 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_N_26_S 8
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_M_26_M \
-                                0x000000FF  // Configuration for WLAN APLLMCS -
-                                            // M[7:0], if the XTAL frequency is
-                                            // 26 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_M_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG1_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_HISPEED_26 \
-                                0x00000010  // Configuration for WLAN APLLMCS -
-                                            // if the XTAL frequency if 26 MHz
-                                            // (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_SEL96_26 \
-                                0x00000008  // Configuration for WLAN APLLMCS -
-                                            // Sel96, if the XTAL frequency is
-                                            // 26 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_SELINPFREQ_26_M \
-                                0x00000007  // Configuration for WLAN APLLMCS -
-                                            // Selinpfreq, if the XTAL frequency
-                                            // is 26 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_SELINPFREQ_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_POSTDIV_OVERRIDE_CTRL \
-                                0x00080000
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_POSTDIV_OVERRIDE_M \
-                                0x00070000
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_POSTDIV_OVERRIDE_S 16
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_SPARE_M \
-                                0x00000700
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_SPARE_S 8
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_M_8_OVERRIDE_CTRL \
-                                0x00000020  // Override control for
-                                            // WLAN_APLLMCS_M[8]. When set to1,
-                                            // M[8] will be selected by bit [3].
-                                            // (Else controlled from WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_M_8_OVERRIDE \
-                                0x00000010  // Override for WLAN_APLLMCS_M[8].
-                                            // Applicable only when bit [4] is
-                                            // set to 1. (Else controlled from
-                                            // WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_N_7_8_OVERRIDE_CTRL \
-                                0x00000004  // Override control for
-                                            // WLAN_APLLMCS_N[8:7]. When set
-                                            // to1, N[8:7] will be selected by
-                                            // bits [2:1]. (Else controlled from
-                                            // WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_N_7_8_OVERRIDE_M \
-                                0x00000003  // Override value for
-                                            // WLAN_APLLMCS_N[8:7] bits.
-                                            // Applicable only when bit [1] is
-                                            // set to 1. (Else controlled from
-                                            // WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_N_7_8_OVERRIDE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_38P4 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_POSTDIV_M \
-                                0x38000000
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_POSTDIV_S 27
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_SPARE_M \
-                                0x07000000
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_SPARE_S 24
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_38P4_M \
-                                0x007F0000  // Configuration for MCU-APLLMCS :
-                                            // N during RUN mode. Selected if
-                                            // the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_38P4_S 16
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_M_38P4_M \
-                                0x0000FF00  // Configuration for MCU-APLLMCS :
-                                            // M during RUN mode. Selected if
-                                            // the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_M_38P4_S 8
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_M_8_38P4 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // M[8] during RUN mode. Selected if
-                                            // the XTAL frequency is 38.4 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_7_8_38P4_M \
-                                0x00000003  // Configuration for MCU-APLLMCS :
-                                            // N[8:7] during RUN mode. Selected
-                                            // if the XTAL frequency is 38.4 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_7_8_38P4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_38P4 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_HISPEED_38P4 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // HISPEED during RUN mode. Selected
-                                            // if the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_SEL96_38P4 \
-                                0x00000008  // Configuration for MCU-APLLMCS :
-                                            // SEL96 during RUN mode. Selected
-                                            // if the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_SELINPFREQ_38P4_M \
-                                0x00000007  // Configuration for MCU-APLLMCS :
-                                            // SELINPFREQ during RUN mode.
-                                            // Selected if the XTAL frequency is
-                                            // 38.4 MHz (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_SELINPFREQ_38P4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_26_M \
-                                0x007F0000  // Configuration for MCU-APLLMCS :
-                                            // N during RUN mode. Selected if
-                                            // the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_26_S 16
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_M_26_M \
-                                0x0000FF00  // Configuration for MCU-APLLMCS :
-                                            // M during RUN mode. Selected if
-                                            // the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_M_26_S 8
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_M_8_26 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // M[8] during RUN mode. Selected if
-                                            // the XTAL frequency is 26 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_7_8_26_M \
-                                0x00000003  // Configuration for MCU-APLLMCS :
-                                            // N[8:7] during RUN mode. Selected
-                                            // if the XTAL frequency is 26 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_7_8_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_HISPEED_26 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // HISPEED during RUN mode. Selected
-                                            // if the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_SEL96_26 \
-                                0x00000008  // Configuration for MCU-APLLMCS :
-                                            // SEL96 during RUN mode. Selected
-                                            // if the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_SELINPFREQ_26_M \
-                                0x00000007  // Configuration for MCU-APLLMCS :
-                                            // SELINPFREQ during RUN mode.
-                                            // Selected if the XTAL frequency is
-                                            // 26 MHz (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_SELINPFREQ_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPRCM_O_SPARE_RW0 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPRCM_O_SPARE_RW1 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_OVERRIDES_APLLMCS_MCU_LOCK \
-                                0x00000400  // 1 - APLLMCS_MCU is locked ; 0 -
-                                            // APLLMCS_MCU is not locked
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_APLLMCS_MCU_ENABLE_OVERRIDE \
-                                0x00000200  // Override for APLLMCS_MCU Enable.
-                                            // Applicable if bit [8] is set
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_APLLMCS_MCU_ENABLE_OVERRIDE_CTRL \
-                                0x00000100  // 1 - Enable for APLLMCS_MCU comes
-                                            // from bit [9]. 0 - Enable for
-                                            // APLLMCS_MCU comes from FSM.
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_SYSCLK_SRC_OVERRIDE_M \
-                                0x00000006  // Override for sysclk src
-                                            // (applicable only if bit [0] is
-                                            // set to 1. "00"- SLOW_CLK "01"-
-                                            // XTAL_CLK "10"- PLL_CLK
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_SYSCLK_SRC_OVERRIDE_S 1
-#define GPRCM_APLLMCS_MCU_OVERRIDES_SYSCLK_SRC_OVERRIDE_CTRL \
-                                0x00000001  // 1 - Sysclk src is selected from
-                                            // bits [2:1] of this register. 0 -
-                                            // Sysclk src is selected from FSM
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SYSCLK_SWITCH_STATUS register.
-//
-//******************************************************************************
-#define GPRCM_SYSCLK_SWITCH_STATUS_SYSCLK_SWITCH_STATUS \
-                                0x00000001  // 1 - Sysclk switching is
-                                            // complete. 0 - Sysclk switching is
-                                            // in progress.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_LDO_CONTROLS register.
-//
-//******************************************************************************
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_ENABLE_OVERRIDE_CTRL \
-                                0x00010000  // 1 - Enable for REF_LDO comes
-                                            // from bit [0] of this register ; 0
-                                            // - Enable for REF_LDO comes from
-                                            // the FSM. Note : Final REF_LDO_EN
-                                            // reaches on the port
-                                            // TOP_PM_REG2[0] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_SPARE_CONTROL_M \
-                                0x0000C000  // Spare bits for REF_CTRL_FSM.
-                                            // Reaches directly on port
-                                            // TOP_PM_REG2[15:14] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_SPARE_CONTROL_S 14
-#define GPRCM_REF_LDO_CONTROLS_REF_TLOAD_ENABLE_M \
-                                0x00003800  // REF TLOAD Enable. Reaches
-                                            // directly on port
-                                            // TOP_PM_REG2[13:11] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_TLOAD_ENABLE_S 11
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_TMUX_CONTROL_M \
-                                0x00000700  // REF_LDO Test-mux control.
-                                            // Reaches directly on port
-                                            // TOP_PM_REG2[10:8] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_TMUX_CONTROL_S 8
-#define GPRCM_REF_LDO_CONTROLS_REF_BW_CONTROL_M \
-                                0x000000C0  // REF BW Control. Reaches directly
-                                            // on port TOP_PM_REG2[7:6] of
-                                            // gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_BW_CONTROL_S 6
-#define GPRCM_REF_LDO_CONTROLS_REF_VTRIM_CONTROL_M \
-                                0x0000003C  // REF VTRIM Control. Reaches
-                                            // directly on port TOP_PM_REG2[5:2]
-                                            // of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_VTRIM_CONTROL_S 2
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_BYPASS_ENABLE \
-                                0x00000002  // REF LDO Bypass Enable. Reaches
-                                            // directly on port TOP_PM_REG2[1]
-                                            // of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_ENABLE \
-                                0x00000001  // Override for REF_LDO Enable.
-                                            // Applicable only if bit [16] of
-                                            // this register is set. Note :
-                                            // Final REF_LDO_EN reaches on the
-                                            // port TOP_PM_REG2[0] of gprcm.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_RTRIM_CONTROL register.
-//
-//******************************************************************************
-#define GPRCM_REF_RTRIM_CONTROL_TOP_PM_REG0_5_4_M \
-                                0x18000000  // This is [5:4] bits of
-                                            // TOP_PM_REG0
-
-#define GPRCM_REF_RTRIM_CONTROL_TOP_PM_REG0_5_4_S 27
-#define GPRCM_REF_RTRIM_CONTROL_TOP_CLKM_REG0_15_5_M \
-                                0x07FF0000  // This is [15:5] bits of
-                                            // TOP_CLKM_REG0
-
-#define GPRCM_REF_RTRIM_CONTROL_TOP_CLKM_REG0_15_5_S 16
-#define GPRCM_REF_RTRIM_CONTROL_REF_CLKM_RTRIM_OVERRIDE_CTRL \
-                                0x00000100  // 1 - CLKM_RTRIM comes for
-                                            // bits[4:0] of this register. 0 -
-                                            // CLKM_RTRIM comes from Efuse
-                                            // (after efuse_done = 1).
-
-#define GPRCM_REF_RTRIM_CONTROL_REF_CLKM_RTRIM_M \
-                                0x0000001F  // CLKM_TRIM Override. Applicable
-                                            // when efuse_done = 0 or bit[8] is
-                                            // set to 1.
-
-#define GPRCM_REF_RTRIM_CONTROL_REF_CLKM_RTRIM_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_SLICER_CONTROLS0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_WLAN_LOWV_OVERRIDE_CTRL \
-                                0x00200000  // 1 - EN_DIG_BUF_TOP comes from
-                                            // bit [14] of this register. 0 -
-                                            // EN_DIG_BUF_TOP comes from the
-                                            // FSM. Note : Final EN_DIG_BUF_WLAN
-                                            // reaches on TOP_CLKM_REG1_IN[14]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_TOP_LOWV_OVERRIDE_CTRL \
-                                0x00100000  // 1 - EN_DIG_BUF_TOP comes from
-                                            // bit [15] of this register. 0 -
-                                            // EN_DIG_BUF_TOP comes from the
-                                            // FSM. Note : Final EN_DIG_BUF_TOP
-                                            // reaches on TOP_CLKM_REG1_IN[15]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_XTAL_OVERRIDE_CTRL \
-                                0x00080000  // 1 - EN_XTAL comes from bit [3]
-                                            // of this register. 0 - EN_XTAL
-                                            // comes from FSM. Note : Final
-                                            // XTAL_EN reaches on
-                                            // TOP_CLKM_REG1_IN[3] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLI_HV_OVERRIDE_CTRL \
-                                0x00040000  // 1 - Enable HV Slicer comes from
-                                            // bit [2] of this register. 0 -
-                                            // Enable HV Slicer comes from FSM.
-                                            // Note : Final HV_SLICER_EN reaches
-                                            // on port TOP_CLKM_REG1_IN[1] of
-                                            // gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLI_LV_OVERRIDE_CTRL \
-                                0x00020000  // 1 - Enable LV Slicer comes from
-                                            // bit[1] of this register. 0 -
-                                            // Enable LV Slicer comes from FSM.
-                                            // Note : final LV_SLICER_EN reaches
-                                            // on port TOP_CLKM_REG1_IN[2] of
-                                            // gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLI_HV_PDN_OVERRIDE_CTRL \
-                                0x00010000  // 1 - Enable HV Pull-down comes
-                                            // from bit[0] of this register. 0 -
-                                            // Enable HV Pull-down comes from
-                                            // FSM. Note : Final HV_PULL_DOWN
-                                            // reaches on port
-                                            // TOP_CLKM_REG1_IN[0] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_TOP_LOWV \
-                                0x00008000  // Override for EN_DIG_BUF_TOP.
-                                            // Applicable if bit[20] is set to
-                                            // 1. Note : Final EN_DIG_BUF_TOP
-                                            // reaches on TOP_CLKM_REG1_IN[15]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_WLAN_LOWV \
-                                0x00004000  // Override for EN_DIG_BUF_WLAN.
-                                            // Applicable if bit[19] is set to
-                                            // 1. Note : Final EN_DIG_BUF_WLAN
-                                            // reaches on TOP_CLKM_REG1_IN[14]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLKOUT_FLIP_EN \
-                                0x00002000  // CLKOUT Flip Enable. Reaches on
-                                            // bit[13] of TOP_CLKM_REG1_IN[13]
-                                            // port of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_DIV2_WLAN_CLK \
-                                0x00001000  // Enable divide2 in WLAN Clk-path.
-                                            // Reaches on TOP_CLKM_REG1_IN[12]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_DIV3_WLAN_CLK \
-                                0x00000800  // Enable divide3 in WLAN Clk-path.
-                                            // Reaches on TOP_CLKM_REG1_IN[11]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_DIV4_WLAN_CLK \
-                                0x00000400  // Enable divide4 in WLAN Clk-path.
-                                            // Reaches on TOP_CLKM_REG1_IN[10]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CM_TMUX_SEL_LOWV_M \
-                                0x000003C0  // CM Test-mux select. Reaches on
-                                            // TOP_CLMM_REG1_IN[9:6] port of
-                                            // gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CM_TMUX_SEL_LOWV_S 6
-#define GPRCM_REF_SLICER_CONTROLS0_SLICER_SPARE0_M \
-                                0x00000030  // Slicer spare0 control. Reaches
-                                            // on TOP_CLKM_REG1_IN[5:4] port of
-                                            // gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_SLICER_SPARE0_S 4
-#define GPRCM_REF_SLICER_CONTROLS0_EN_XTAL \
-                                0x00000008  // Enable XTAL override. Reaches on
-                                            // TOP_CLKM_REG1_IN[3] port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLICER_HV \
-                                0x00000004  // Enable HV Slicer override.
-                                            // Reaches on TOP_CLKM_REG1_IN[1]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLICER_LV \
-                                0x00000002  // Enable LV Slicer override.
-                                            // Reaches on TOP_CLKM_REG1_IN[2]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLICER_HV_PDN \
-                                0x00000001  // Enable HV Pull-down override.
-                                            // Reaches on TOP_CLKM_REG1_IN[0]
-                                            // port of gprcm
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_SLICER_CONTROLS1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_SPARE1_M \
-                                0x0000FC00  // Slicer spare1. Reaches on port
-                                            // TOP_CLKM_REG2_IN[15:10] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_SPARE1_S 10
-#define GPRCM_REF_SLICER_CONTROLS1_XOSC_TRIM_M \
-                                0x000003F0  // XOSC Trim. Reaches on port
-                                            // TOP_CLKM_REG2_IN[9:4] of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS1_XOSC_TRIM_S 4
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_ITRIM_CHANGE_TOGGLE \
-                                0x00000008  // Slicer ITRIM Toggle. Reaches on
-                                            // port TOP_CLKM_REG2_IN[3] of
-                                            // gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_LV_TRIM_M \
-                                0x00000007  // LV Slicer trim. Reaches on port
-                                            // TOP_CLKM_REG2_IN[2:0] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_LV_TRIM_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_BGAP_CONTROLS0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_reserved_M \
-                                0xFF800000
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_reserved_S 23
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_mag_trim_override_ctrl \
-                                0x00400000  // 1 - REF_MAG_TRIM comes from
-                                            // bit[4:0] of register
-                                            // REF_ANA_BGAP_CONTROLS1 [Addr :
-                                            // 0x0850]; 0 - REF_MAG_TRIM comes
-                                            // from efuse (After efc_done = 1).
-                                            // Note : Final REF_MAG_TRIM reaches
-                                            // on port TOP_PM_REG1[4:0] of gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_trim_override_ctrl \
-                                0x00200000  // 1 - REF_V2I_TRIM comes from
-                                            // bit[9:6] of this register ; 0 -
-                                            // REF_V2I_TRIM comes from efuse
-                                            // (After efc_done = 1). Note :
-                                            // Final REF_V2I_TRIM reaches on
-                                            // port TOP_PM_REG0[9:6] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_temp_trim_override_ctrl \
-                                0x00100000  // 1 - REF_TEMP_TRIM comes from
-                                            // bit[15:10] of this register ; 0 -
-                                            // REF_TEMP_TRIM comes from efuse
-                                            // (After efc_done = 1). Note :
-                                            // Final REF_TEMP_TRIM reaches on
-                                            // port TOP_PM_REG0[15:10] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_startup_en_override_ctrl \
-                                0x00080000  // 1 - REF_STARTUP_EN comes from
-                                            // bit [3] of this register ; 0 -
-                                            // REF_STARTUP_EN comes from FSM.
-                                            // Note : Final REF_STARTUP_EN
-                                            // reaches on port TOP_PM_REG0[3] of
-                                            // gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_en_override_ctrl \
-                                0x00040000  // 1 - REF_V2I_EN comes from bit
-                                            // [2] of this register ; 0 -
-                                            // REF_V2I_EN comes from FSM. Note :
-                                            // Final REF_V2I_EN reaches on port
-                                            // TOP_PM_REG0[2] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_fc_en_override_ctrl \
-                                0x00020000  // 1 - REF_FC_EN comes from bit [1]
-                                            // of this register ; 0 - REF_FC_EN
-                                            // comes from FSM. Note : Final
-                                            // REF_FC_EN reaches on port
-                                            // TOP_PM_REG0[1] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_bgap_en_override_ctrl \
-                                0x00010000  // 1 - REF_BGAP_EN comes from bit
-                                            // [0] of this register ; 0 -
-                                            // REF_BGAP_EN comes from FSM. Note
-                                            // : Final REF_BGAP_EN reaches on
-                                            // port TOP_PM_REG0[0] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_temp_trim_M \
-                                0x0000FC00  // REF_TEMP_TRIM override.
-                                            // Applicable when bit [20] of this
-                                            // register set to 1. (or efc_done =
-                                            // 0) Note : Final REF_TEMP_TRIM
-                                            // reaches on port
-                                            // TOP_PM_REG0[15:10] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_temp_trim_S 10
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_trim_M \
-                                0x000003C0  // REF_V2I_TRIM Override.
-                                            // Applicable when bit [21] of this
-                                            // register set to 1 . (of efc_done
-                                            // = 0) Note : Final REF_V2I_TRIM
-                                            // reaches on port TOP_PM_REG0[9:6]
-                                            // of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_trim_S 6
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_NU1_M \
-                                0x00000030
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_NU1_S 4
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_startup_en \
-                                0x00000008  // REF_STARTUP_EN override.
-                                            // Applicable when bit [19] of this
-                                            // register is set to 1. Note :
-                                            // Final REF_STARTUP_EN reaches on
-                                            // port TOP_PM_REG0[3] of gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_en \
-                                0x00000004  // REF_V2I_EN override. Applicable
-                                            // when bit [21] of this register is
-                                            // set to 1. Note : Final REF_V2I_EN
-                                            // reaches on port TOP_PM_REG0[2] of
-                                            // gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_fc_en \
-                                0x00000002  // REF_FC_EN override. Applicable
-                                            // when bit [17] of this register is
-                                            // set to 1. Note : Final REF_FC_EN
-                                            // reaches on port TOP_PM_REG0[1] of
-                                            // gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_bgap_en \
-                                0x00000001  // REF_BGAP_EN override. Applicable
-                                            // when bit [16] of this register
-                                            // set to 1. Note : Final
-                                            // REF_BGAP_EN reaches on port
-                                            // TOP_PM_REG0[0] of gprcm.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_BGAP_CONTROLS1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_reserved_M \
-                                0xFFFF0000
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_reserved_S 16
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bg_spare_M \
-                                0x0000C000  // REF_BGAP_SPARE. Reaches on port
-                                            // TOP_PM_REG1[15:14] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bg_spare_S 14
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bgap_tmux_ctrl_M \
-                                0x00003E00  // REF_BGAP_TMUX_CTRL. Reaches on
-                                            // port TOP_PM_REG1[13:9] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bgap_tmux_ctrl_S 9
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_filt_trim_M \
-                                0x000001E0  // REF_FILT_TRIM. Reaches on port
-                                            // TOP_PM_REG1[8:5] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_filt_trim_S 5
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_mag_trim_M \
-                                0x0000001F  // REF_MAG_TRIM Override.
-                                            // Applicable when bit[22] of
-                                            // REF_ANA_BGAP_CONTROLS0 [0x084C]
-                                            // set to 1 (of efc_done = 0). Note
-                                            // : Final REF_MAG_TRIM reaches on
-                                            // port TOP_PM_REG1[4:0] of gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_mag_trim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_SPARE_CONTROLS0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_reserved_M \
-                                0xFFFF0000
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_reserved_S 16
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_mem_top_pm_reg3_M \
-                                0x0000FFFF  // Spare control. Reaches on
-                                            // TOP_PM_REG3 [15:0] of gprcm.
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_mem_top_pm_reg3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_SPARE_CONTROLS1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg3_M \
-                                0xFFFF0000  // Spare control. Reaches on
-                                            // TOP_CLKM_REG3 [15:0] of gprcm.
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg3_S 16
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg4_M \
-                                0x0000FFFF  // Spare control. Reaches on
-                                            // TOP_CLKM_REG4 [15:0] of gprcm.
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEMSS_PSCON_OVERRIDES0 register.
-//
-//******************************************************************************
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_off_override_M \
-                                0xFFFF0000
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_off_override_S 16
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_retain_override_M \
-                                0x0000FFFF
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_retain_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEMSS_PSCON_OVERRIDES1 register.
-//
-//******************************************************************************
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_reserved_M \
-                                0xFFFFFFC0
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_reserved_S 6
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_mem_update_override_ctrl \
-                                0x00000020
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_mem_update_override \
-                                0x00000010
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_sleep_override_ctrl \
-                                0x00000008
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_sleep_override \
-                                0x00000004
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_mem_off_override_ctrl \
-                                0x00000002
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memms_pscon_mem_retain_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_PLL_REF_LOCK_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_reserved_M \
-                                0xFFFFFFF8
-
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_reserved_S 3
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_mem_mcu_apllmcs_lock_override \
-                                0x00000004
-
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_mem_wlan_apllmcs_lock_override \
-                                0x00000002
-
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_mem_ref_clk_valid_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PSCON_DEBUG register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PSCON_DEBUG_reserved_M \
-                                0xFFFFFFC0
-
-#define GPRCM_MCU_PSCON_DEBUG_reserved_S 6
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_rtc_ps_M \
-                                0x00000038  // MCU_PSCON_RTC_ON = "0000";
-                                            // MCU_PSCON_RTC_OFF = "0001";
-                                            // MCU_PSCON_RTC_RET = "0010";
-                                            // MCU_PSCON_RTC_OFF_TO_ON = "0011";
-                                            // MCU_PSCON_RTC_RET_TO_ON = "0100";
-                                            // MCU_PSCON_RTC_ON_TO_RET = "0101";
-                                            // MCU_PSCON_RTC_ON_TO_OFF = "0110";
-                                            // MCU_PSCON_RTC_RET_TO_ON_WAIT_OPP
-                                            // = "0111";
-                                            // MCU_PSCON_RTC_OFF_TO_ON_WAIT_OPP
-                                            // = "1000";
-
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_rtc_ps_S 3
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_sys_ps_M \
-                                0x00000007
-
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_sys_ps_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEMSS_PWR_PS register.
-//
-//******************************************************************************
-#define GPRCM_MEMSS_PWR_PS_reserved_M \
-                                0xFFFFFFF8
-
-#define GPRCM_MEMSS_PWR_PS_reserved_S 3
-#define GPRCM_MEMSS_PWR_PS_pwr_ps_memss_M \
-                                0x00000007  // MEMSS_PM_SLEEP = "000";
-                                            // MEMSS_PM_WAIT_OPP = "010";
-                                            // MEMSS_PM_ACTIVE = "011";
-                                            // MEMSS_PM_SLEEP_TO_ACTIVE = "100";
-                                            // MEMSS_PM_ACTIVE_TO_SLEEP = "101";
-
-#define GPRCM_MEMSS_PWR_PS_pwr_ps_memss_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_FSM_DEBUG register.
-//
-//******************************************************************************
-#define GPRCM_REF_FSM_DEBUG_reserved_M \
-                                0xFFFFFFC0
-
-#define GPRCM_REF_FSM_DEBUG_reserved_S 6
-#define GPRCM_REF_FSM_DEBUG_fref_mode_M \
-                                0x00000030  // 01 - HV Mode ; 10 - LV Mode ; 11
-                                            // - XTAL Mode
-
-#define GPRCM_REF_FSM_DEBUG_fref_mode_S 4
-#define GPRCM_REF_FSM_DEBUG_ref_fsm_ps_M \
-                                0x0000000F  // constant FREF_CLK_OFF = "00000";
-                                            // constant FREF_EN_BGAP = "00001";
-                                            // constant FREF_EN_LDO = "00010";
-                                            // constant FREF_EN_SLI_HV =
-                                            // "00011"; constant
-                                            // FREF_EN_SLI_HV_PD = "00100";
-                                            // constant FREF_EN_DIG_BUF =
-                                            // "00101"; constant FREF_EN_OSC =
-                                            // "00110"; constant FREF_EN_SLI_LV
-                                            // = "00111"; constant
-                                            // FREF_EN_CLK_REQ = "01000";
-                                            // constant FREF_CLK_VALID =
-                                            // "01001"; constant FREF_MODE_DET0
-                                            // = "01010"; constant
-                                            // FREF_MODE_DET1 = "01011";
-                                            // constant FREF_MODE_DET2 =
-                                            // "10010"; constant FREF_MODE_DET3
-                                            // = "10011"; constant FREF_VALID =
-                                            // "01100"; constant FREF_VALID0 =
-                                            // "01101"; constant FREF_VALID1 =
-                                            // "01110"; constant FREF_VALID2 =
-                                            // "01111"; constant
-                                            // FREF_WAIT_EXT_TCXO0 = "10000";
-                                            // constant FREF_WAIT_EXT_TCXO1 =
-                                            // "10001";
-
-#define GPRCM_REF_FSM_DEBUG_ref_fsm_ps_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_SYS_OPP_REQ_OVERRIDE register.
-//
-//******************************************************************************
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_reserved_M \
-                                0xFFFFFFE0
-
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_reserved_S 5
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_mem_sys_opp_req_override_ctrl \
-                                0x00000010  // 1 - Override the sytem-opp
-                                            // request to ANATOP using bit0 of
-                                            // this register
-
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_mem_sys_opp_req_override_M \
-                                0x0000000F  // "0001" - RUN ; "0010" - DSLP ;
-                                            // "0100" - LPDS ; Others - NA
-
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_mem_sys_opp_req_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_TESTCTRL_PD_OPP_CONFIG register.
-//
-//******************************************************************************
-#define GPRCM_MEM_TESTCTRL_PD_OPP_CONFIG_reserved_M \
-                                0xFFFFFFFE
-
-#define GPRCM_MEM_TESTCTRL_PD_OPP_CONFIG_reserved_S 1
-#define GPRCM_MEM_TESTCTRL_PD_OPP_CONFIG_mem_sleep_opp_enter_with_testpd_on \
-                                0x00000001  // 1 - Enable sleep-opp (DSLP/LPDS)
-                                            // entry even if Test-Pd is kept ON
-                                            // ; 0 - Donot enable sleep-opp
-                                            // (DSLP/LPDS) entry with Test-Pd
-                                            // ON.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_WL_FAST_CLK_REQ_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_reserved_M \
-                                0xFFFFFFF8
-
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_reserved_S 3
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_mem_wl_fast_clk_req_override_ctrl \
-                                0x00000004  // NA
-
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_mem_wl_fast_clk_req_override \
-                                0x00000002  // NA
-
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_mem_wl_sleep_with_clk_req_override \
-                                0x00000001  // NA
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_MCU_PD_MODE_REQ_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_MCU_PD_MODE_REQ_OVERRIDES_mem_mcu_pd_mode_req_override_ctrl \
-                                0x00000004  // 1 - Override the MCU-PD power
-                                            // modes using bits [1] & [0] ;
-
-#define GPRCM_MEM_MCU_PD_MODE_REQ_OVERRIDES_mem_mcu_pd_pwrdn_req_override \
-                                0x00000002  // 1 - Request for power-down of
-                                            // MCU-PD ;
-
-#define GPRCM_MEM_MCU_PD_MODE_REQ_OVERRIDES_mem_mcu_pd_ret_req_override \
-                                0x00000001  // 1 - Request for retention mode
-                                            // of MCU-PD.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES_mem_mcspi_sram_off_req_override_ctrl \
-                                0x00000002  // 1- Override the MCSPI
-                                            // (Autonomous SPI) memory state
-                                            // using bit [0]
-
-#define GPRCM_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES_mem_mcspi_sram_off_req_override \
-                                0x00000001  // 1 - Request for power-down of
-                                            // Autonomous SPI 8k memory ; 0 -
-                                            // Donot request power-down of
-                                            // Autonomous SPI 8k Memory
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_WLAN_APLLMCS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_WLAN_APLLMCS_OVERRIDES_wlan_apllmcs_lock \
-                                0x00000100
-
-#define GPRCM_MEM_WLAN_APLLMCS_OVERRIDES_mem_wlan_apllmcs_enable_override \
-                                0x00000002
-
-#define GPRCM_MEM_WLAN_APLLMCS_OVERRIDES_mem_wlan_apllmcs_enable_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_REF_FSM_CFG2 register.
-//
-//******************************************************************************
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_FC_DEASSERT_DELAY_M \
-                                0x00380000  // Number of RTC clocks for keeping
-                                            // the FC_EN asserted high
-
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_FC_DEASSERT_DELAY_S 19
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_STARTUP_DEASSERT_DELAY_M \
-                                0x00070000  // Number of RTC clocks for keeping
-                                            // the STARTUP_EN asserted high
-
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_STARTUP_DEASSERT_DELAY_S 16
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_EXT_TCXO_SETTLING_TIME_M \
-                                0x0000FFFF  // Number of RTC clocks for waiting
-                                            // for clock to settle.
-
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_EXT_TCXO_SETTLING_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TESTCTRL_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_TESTCTRL_POWER_CTRL_TESTCTRL_PD_STATUS_M \
-                                0x00000006
-
-#define GPRCM_TESTCTRL_POWER_CTRL_TESTCTRL_PD_STATUS_S 1
-#define GPRCM_TESTCTRL_POWER_CTRL_TESTCTRL_PD_ENABLE \
-                                0x00000001  // 0 - Disable the TestCtrl-pd ; 1
-                                            // - Enable the TestCtrl-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SSDIO_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_SSDIO_POWER_CTRL_SSDIO_PD_STATUS_M \
-                                0x00000006  // 1 - SSDIO-PD is ON ; 0 -
-                                            // SSDIO-PD is OFF
-
-#define GPRCM_SSDIO_POWER_CTRL_SSDIO_PD_STATUS_S 1
-#define GPRCM_SSDIO_POWER_CTRL_SSDIO_PD_ENABLE \
-                                0x00000001  // 0 - Disable the SSDIO-pd ; 1 -
-                                            // Enable the SSDIO-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCSPI_N1_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_MCSPI_N1_POWER_CTRL_MCSPI_N1_PD_STATUS_M \
-                                0x00000006  // 1 - MCSPI_N1-PD is ON ; 0 -
-                                            // MCSPI_N1-PD if OFF
-
-#define GPRCM_MCSPI_N1_POWER_CTRL_MCSPI_N1_PD_STATUS_S 1
-#define GPRCM_MCSPI_N1_POWER_CTRL_MCSPI_N1_PD_ENABLE \
-                                0x00000001  // 0 - Disable the MCSPI_N1-pd ; 1
-                                            // - Enable the MCSPI_N1-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WELP_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_STATUS_M \
-                                0x00001C00
-
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_STATUS_S 10
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_REQ_OVERRIDE \
-                                0x00000200
-
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_REQ_OVERRIDE_CTRL \
-                                0x00000100
-
-#define GPRCM_WELP_POWER_CTRL_WELP_PD_STATUS_M \
-                                0x00000006
-
-#define GPRCM_WELP_POWER_CTRL_WELP_PD_STATUS_S 1
-#define GPRCM_WELP_POWER_CTRL_WELP_PD_ENABLE \
-                                0x00000001  // 0 - Disable the WELP-pd ; 1 -
-                                            // Enable the WELP-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WL_SDIO_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_WL_SDIO_POWER_CTRL_WL_SDIO_PD_STATUS_M \
-                                0x00000006
-
-#define GPRCM_WL_SDIO_POWER_CTRL_WL_SDIO_PD_STATUS_S 1
-#define GPRCM_WL_SDIO_POWER_CTRL_WL_SDIO_PD_ENABLE \
-                                0x00000001  // 0 - Disable the WL_SDIO-pd ; 1 -
-                                            // Enable the WL_SDIO-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WLAN_SRAM_ACTIVE_PWR_CFG register.
-//
-//******************************************************************************
-#define GPRCM_WLAN_SRAM_ACTIVE_PWR_CFG_WLAN_SRAM_ACTIVE_PWR_CFG_M \
-                                0x00FFFFFF  // SRAM (WTOP+DRP) state during
-                                            // Active-mode : 1 - SRAMs are ON ;
-                                            // 0 - SRAMs are OFF. Cluster
-                                            // information : [0] - 1st column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) [1] - 2nd column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [2] - 3rd column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [3] - 4th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [4] -
-                                            // 5th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [5] - 6th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [6] - 7th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [7] - 8th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [8] - 9th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [9] -
-                                            // 10th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [10] - 11th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [11] - 12th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [12] - 13th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [13] - 14th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [14] -
-                                            // 15th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [15] - 16th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [23:16] - Internal to
-                                            // WTOP Cluster
-
-#define GPRCM_WLAN_SRAM_ACTIVE_PWR_CFG_WLAN_SRAM_ACTIVE_PWR_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WLAN_SRAM_SLEEP_PWR_CFG register.
-//
-//******************************************************************************
-#define GPRCM_WLAN_SRAM_SLEEP_PWR_CFG_WLAN_SRAM_SLEEP_PWR_CFG_M \
-                                0x00FFFFFF  // SRAM (WTOP+DRP) state during
-                                            // Sleep-mode : 1 - SRAMs are RET ;
-                                            // 0 - SRAMs are OFF. Cluster
-                                            // information : [0] - 1st column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) [1] - 2nd column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [2] - 3rd column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [3] - 4th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [4] -
-                                            // 5th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [5] - 6th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [6] - 7th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [7] - 8th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [8] - 9th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [9] -
-                                            // 10th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [10] - 11th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [11] - 12th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [12] - 13th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [13] - 14th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [14] -
-                                            // 15th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [15] - 16th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [23:16] - Internal to
-                                            // WTOP Cluster
-
-#define GPRCM_WLAN_SRAM_SLEEP_PWR_CFG_WLAN_SRAM_SLEEP_PWR_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SECURE_INIT_DONE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SECURE_INIT_DONE_SECURE_INIT_DONE_STATUS \
-                                0x00000002  // 1-Secure mode init is done ;
-                                            // 0-Secure mode init is not done
-
-#define GPRCM_APPS_SECURE_INIT_DONE_APPS_SECURE_INIT_DONE \
-                                0x00000001  // Must be programmed 1 in order to
-                                            // say that secure-mode device init
-                                            // is done
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_DEV_MODE_INIT_DONE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_DEV_MODE_INIT_DONE_APPS_DEV_MODE_INIT_DONE \
-                                0x00000001  // 1 - Patch download and other
-                                            // initializations are done (before
-                                            // removing APPS resetn) for
-                                            // development mode (#3) . 0 -
-                                            // Development mode (#3) init is not
-                                            // done yet
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_EN_APPS_REBOOT register.
-//
-//******************************************************************************
-#define GPRCM_EN_APPS_REBOOT_EN_APPS_REBOOT \
-                                0x00000001  // 1 - When 1, disable the reboot
-                                            // of APPS after DevInit is
-                                            // completed. In this case, APPS
-                                            // will permanantly help in reset. 0
-                                            // - When 0, enable the reboot of
-                                            // APPS after DevInit is completed.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_APPS_PERIPH_PRESENT register.
-//
-//******************************************************************************
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_WLAN_GEM_PP \
-                                0x00010000  // 1 - Enable ; 0 - Disable
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_AES_PP \
-                                0x00008000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_DES_PP \
-                                0x00004000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_SHA_PP \
-                                0x00002000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_CAMERA_PP \
-                                0x00001000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MMCHS_PP \
-                                0x00000800
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MCASP_PP \
-                                0x00000400
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MCSPI_A1_PP \
-                                0x00000200
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MCSPI_A2_PP \
-                                0x00000100
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_UDMA_PP \
-                                0x00000080
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_WDOG_PP \
-                                0x00000040
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_UART_A0_PP \
-                                0x00000020
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_UART_A1_PP \
-                                0x00000010
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A0_PP \
-                                0x00000008
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A1_PP \
-                                0x00000004
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A2_PP \
-                                0x00000002
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A3_PP \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_NWP_PERIPH_PRESENT register.
-//
-//******************************************************************************
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_ASYNC_BRIDGE_PP \
-                                0x00000200
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_MCSPI_N2_PP \
-                                0x00000100
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_GPT_N0_PP \
-                                0x00000080
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_GPT_N1_PP \
-                                0x00000040
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_WDOG_PP \
-                                0x00000020
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_UDMA_PP \
-                                0x00000010
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_UART_N0_PP \
-                                0x00000008
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_UART_N1_PP \
-                                0x00000004
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_SSDIO_PP \
-                                0x00000002
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_MCSPI_N1_PP \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_SHARED_PERIPH_PRESENT register.
-//
-//******************************************************************************
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_MCSPI_PP \
-                                0x00000040
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_I2C_PP \
-                                0x00000020
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_A_PP \
-                                0x00000010
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_B_PP \
-                                0x00000008
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_C_PP \
-                                0x00000004
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_D_PP \
-                                0x00000002
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_E_PP \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_PWR_STATE register.
-//
-//******************************************************************************
-#define GPRCM_NWP_PWR_STATE_NWP_PWR_STATE_PS_M \
-                                0x00000F00  // "0000"- PORZ :- NWP is yet to be
-                                            // enabled by APPS during powerup
-                                            // (from HIB/OFF) ; "0011"- ACTIVE
-                                            // :- NWP is enabled, clocks and
-                                            // resets to NWP-SubSystem are
-                                            // enabled ; "0010"- LPDS :- NWP is
-                                            // in LPDS-mode ; Clocks and reset
-                                            // to NWP-SubSystem are gated ;
-                                            // "0101"- WAIT_FOR_OPP :- NWP is in
-                                            // transition from LPDS to ACTIVE,
-                                            // where it is waiting for OPP to be
-                                            // stable ; "1000"-
-                                            // WAKE_TIMER_OPP_REQ :- NWP is in
-                                            // transition from LPDS, where the
-                                            // wakeup cause is LPDS_Wake timer
-                                            // OTHERS : NA
-
-#define GPRCM_NWP_PWR_STATE_NWP_PWR_STATE_PS_S 8
-#define GPRCM_NWP_PWR_STATE_NWP_RCM_PS_M \
-                                0x00000007  // "000" - NWP_RUN : NWP is in RUN
-                                            // state (default) - Applicable only
-                                            // when NWP_PWR_STATE_PS = ACTIVE ;
-                                            // "001" - NWP_SLP : NWP is in SLEEP
-                                            // state (default) - Applicable only
-                                            // when NWP_PWR_STATE_PS = ACTIVE ;
-                                            // "010" - NWP_DSLP : NWP is in
-                                            // Deep-Sleep state (default) -
-                                            // Applicable only when
-                                            // NWP_PWR_STATE_PS = ACTIVE ; "011"
-                                            // - WAIT_FOR_ACTIVE : NWP is in
-                                            // transition from Deep-sleep to
-                                            // Run, where it is waiting for OPP
-                                            // to be stable ; "100" -
-                                            // WAIT_FOR_DSLP_TIMER_WAKE_REQ :
-                                            // NWP is in transition from
-                                            // Deep-sleep to Run, where the
-                                            // wakeup cause is deep-sleep
-                                            // wake-timer
-
-#define GPRCM_NWP_PWR_STATE_NWP_RCM_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_PWR_STATE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_PWR_STATE_APPS_PWR_STATE_PS_M \
-                                0x00000F00  // "0000"- PORZ :- APPS is waiting
-                                            // for PLL_clock during powerup
-                                            // (from HIB/OFF) ; "0011"- ACTIVE
-                                            // :- APPS is enabled, clocks and
-                                            // resets to APPS-SubSystem are
-                                            // enabled ; APPS might be either in
-                                            // Secure or Un-secure mode during
-                                            // this state. "1001" -
-                                            // SECURE_MODE_LPDS :- While in
-                                            // ACTIVE (Secure-mode), APPS had to
-                                            // program the DevInit_done bit at
-                                            // the end, after which it enters
-                                            // into this state, where the reset
-                                            // to APPS will be asserted. From
-                                            // this state APPS might either
-                                            // re-boot itself or enter into LPDS
-                                            // depending upon whether the device
-                                            // is 3200 or 3100. "0010"- LPDS :-
-                                            // APPS is in LPDS-mode ; Clocks and
-                                            // reset to APPS-SubSystem are gated
-                                            // ; "0101"- WAIT_FOR_OPP :- APPS is
-                                            // in transition from LPDS to
-                                            // ACTIVE, where it is waiting for
-                                            // OPP to be stable ; "1000" -
-                                            // WAKE_TIMER_OPP_REQ : APPS is in
-                                            // transition from LPDS, where the
-                                            // wakeup cause is LPDS_Wake timer ;
-                                            // "1010" - WAIT_FOR_PATCH_INIT :
-                                            // APPS enters into this state
-                                            // during development-mode #3 (SOP =
-                                            // 3), where it is waiting for patch
-                                            // download to complete and 0x4 hack
-                                            // is programmed. OTHERS : NA
-
-#define GPRCM_APPS_PWR_STATE_APPS_PWR_STATE_PS_S 8
-#define GPRCM_APPS_PWR_STATE_APPS_RCM_PS_M \
-                                0x00000007  // "000" - APPS_RUN : APPS is in
-                                            // RUN state (default) - Applicable
-                                            // only when APPS_PWR_STATE_PS =
-                                            // ACTIVE ; "001" - APPS_SLP : APPS
-                                            // is in SLEEP state (default) -
-                                            // Applicable only when
-                                            // APPS_PWR_STATE_PS = ACTIVE ;
-                                            // "010" - APPS_DSLP : APPS is in
-                                            // Deep-Sleep state (default) -
-                                            // Applicable only when
-                                            // APPS_PWR_STATE_PS = ACTIVE ;
-                                            // "011" - WAIT_FOR_ACTIVE : APPS is
-                                            // in transition from Deep-sleep to
-                                            // Run, where it is waiting for OPP
-                                            // to be stable ; "100" -
-                                            // WAIT_FOR_DSLP_TIMER_WAKE_REQ :
-                                            // APPS is in transition from
-                                            // Deep-sleep to Run, where the
-                                            // wakeup cause is deep-sleep
-                                            // wake-timer
-
-#define GPRCM_APPS_PWR_STATE_APPS_RCM_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PWR_STATE register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PWR_STATE_MCU_OPP_PS_M \
-                                0x0000001F  // TBD
-
-#define GPRCM_MCU_PWR_STATE_MCU_OPP_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_PM_PS register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_PM_PS_WTOP_PM_PS_M \
-                                0x00000007  // "011" - WTOP_PM_ACTIVE (Default)
-                                            // :- WTOP_Pd is in ACTIVE mode;
-                                            // "100" - WTOP_PM_ACTIVE_TO_SLEEP
-                                            // :- WTOP_Pd is in transition from
-                                            // ACTIVE to SLEEP ; "000" -
-                                            // WTOP_PM_SLEEP : WTOP-Pd is in
-                                            // Sleep-state ; "100" -
-                                            // WTOP_PM_SLEEP_TO_ACTIVE : WTOP_Pd
-                                            // is in transition from SLEEP to
-                                            // ACTIVE ; "000" -
-                                            // WTOP_PM_WAIT_FOR_OPP : Wait for
-                                            // OPP to be stable ;
-
-#define GPRCM_WTOP_PM_PS_WTOP_PM_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_PD_RESETZ_OVERRIDE_REG_WTOP_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for WTOP PD
-                                            // Resetz. When set to 1,
-                                            // WTOP_Resetz will be controlled by
-                                            // bit [0]
-
-#define GPRCM_WTOP_PD_RESETZ_OVERRIDE_REG_WTOP_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for WTOP PD Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WELP_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_WELP_PD_RESETZ_OVERRIDE_REG_WELP_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for WELP PD
-                                            // Resetz. When set to 1,
-                                            // WELP_Resetz will be controlled by
-                                            // bit [0]
-
-#define GPRCM_WELP_PD_RESETZ_OVERRIDE_REG_WELP_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for WELP PD Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WL_SDIO_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_WL_SDIO_PD_RESETZ_OVERRIDE_REG_WL_SDIO_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for WL_SDIO
-                                            // Resetz. When set to 1,
-                                            // WL_SDIO_Resetz will be controlled
-                                            // by bit [0]
-
-#define GPRCM_WL_SDIO_PD_RESETZ_OVERRIDE_REG_WL_SDIO_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for WL_SDIO Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SSDIO_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_SSDIO_PD_RESETZ_OVERRIDE_REG_SSDIO_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for SSDIO
-                                            // Resetz. When set to 1,
-                                            // SSDIO_Resetz will be controlled
-                                            // by bit [0]
-
-#define GPRCM_SSDIO_PD_RESETZ_OVERRIDE_REG_SSDIO_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for SSDIO Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCSPI_N1_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_MCSPI_N1_PD_RESETZ_OVERRIDE_REG_MCSPI_N1_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for MCSPI_N1
-                                            // Resetz. When set to 1,
-                                            // MCSPI_N1_Resetz will be
-                                            // controlled by bit [0]
-
-#define GPRCM_MCSPI_N1_PD_RESETZ_OVERRIDE_REG_MCSPI_N1_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for MCSPI_N1 Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TESTCTRL_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_TESTCTRL_PD_RESETZ_OVERRIDE_REG_TESTCTRL_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for TESTCTRL-PD
-                                            // Resetz. When set to 1,
-                                            // TESTCTRL_Resetz will be
-                                            // controlled by bit [0]
-
-#define GPRCM_TESTCTRL_PD_RESETZ_OVERRIDE_REG_TESTCTRL_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for TESTCTRL Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PD_RESETZ_OVERRIDE_REG_MCU_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for MCU-PD
-                                            // Resetz. When set to 1, MCU_Resetz
-                                            // will be controlled by bit [0]
-
-#define GPRCM_MCU_PD_RESETZ_OVERRIDE_REG_MCU_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for MCU Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG0 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG0_FUSEFARM_ROW_14_M \
-                                0xFFFFFFFF  // This is ROW_14 [31:0] of
-                                            // FUSEFARM. [0:0] : XTAL_IS_26MHZ
-                                            // [5:1] : TOP_CLKM_RTRIM[4:0]
-                                            // [10:6] : ANA_BGAP_MAG_TRIM[4:0]
-                                            // [16:11] : ANA_BGAP_TEMP_TRIM[5:0]
-                                            // [20:17] : ANA_BGAP_V2I_TRIM[3:0]
-                                            // [25:22] : PROCESS INDICATOR
-                                            // [26:26] : Reserved [31:27] :
-                                            // FUSEROM Version
-
-#define GPRCM_GPRCM_EFUSE_READ_REG0_FUSEFARM_ROW_14_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG1 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG1_FUSEFARM_ROW_15_LSW_M \
-                                0x0000FFFF  // This is ROW_15[15:0] of FUSEFARM
-                                            // 1. NWP Peripheral Present bits
-                                            // [15:8] NWP_GPT_N0_PP [15:15]
-                                            // NWP_GPT_N1_PP [14:14] NWP_WDOG_PP
-                                            // [13:13] NWP_UDMA_PP [12:12]
-                                            // NWP_UART_N0_PP [11:11]
-                                            // NWP_UART_N1_PP [10:10]
-                                            // NWP_SSDIO_PP [9:9]
-                                            // NWP_MCSPI_N1_PP [8:8] 2. Shared
-                                            // Peripheral Present bits [7:0]
-                                            // SHARED SPI PP [6:6]
-                                            // SHARED I2C PP [5:5] SHARED
-                                            // GPIO-A PP [4:4] SHARED GPIO-B PP
-                                            // [3:3] SHARED GPIO-C PP [2:2]
-                                            // SHARED GPIO-D PP [1:1] SHARED
-                                            // GPIO-E PP [0:0]
-
-#define GPRCM_GPRCM_EFUSE_READ_REG1_FUSEFARM_ROW_15_LSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG2 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG2_FUSEFARM_ROW_16_LSW_ROW_15_MSW_M \
-                                0xFFFFFFFF  // This is ROW_16[15:0] &
-                                            // ROW_15[31:16] of FUSEFARM.
-                                            // [31:21] - Reserved [20:16] -
-                                            // CHIP_ID [15:15] - SSBD SOP
-                                            // Control [14:14] - SSBD TAP
-                                            // Control [13:2] - APPS Peripheral
-                                            // Present bits : APPS_CAMERA_PP
-                                            // [13:13] APPS_MMCHS_PP [12:12]
-                                            // APPS_MCASP_PP [11:11]
-                                            // APPS_MCSPI_A1_PP [10:10]
-                                            // APPS_MCSPI_A2_PP [9:9]
-                                            // APPS_UDMA_PP [8:8] APPS_WDOG_PP
-                                            // [7:7] APPS_UART_A0_PP [6:6]
-                                            // APPS_UART_A1_PP [5:5]
-                                            // APPS_GPT_A0_PP [4:4]
-                                            // APPS_GPT_A1_PP [3:3]
-                                            // APPS_GPT_A2_PP [2:2]
-                                            // APPS_GPT_A3_PP [1:1] [0:0] - NWP
-                                            // Peripheral present bits
-                                            // NWP_ACSPI_PP [0:0]
-
-#define GPRCM_GPRCM_EFUSE_READ_REG2_FUSEFARM_ROW_16_LSW_ROW_15_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG3 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG3_FUSEFARM_ROW_17_LSW_ROW_16_MSW_M \
-                                0xFFFFFFFF  // This is ROW_17[15:0] &
-                                            // ROW_16[31:16] of FUSEFARM :
-                                            // [31:16] - TEST_TAP_KEY(15:0)
-                                            // [15:0] - Reserved
-
-#define GPRCM_GPRCM_EFUSE_READ_REG3_FUSEFARM_ROW_17_LSW_ROW_16_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_MEM_RET_CFG register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_MEM_RET_CFG_WTOP_MEM_RET_CFG \
-                                0x00000001  // 1 - Soft-compile memories in
-                                            // WTOP can be turned-off during
-                                            // WTOP-sleep mode ; 0 -
-                                            // Soft-compile memories in WTOP
-                                            // must be kept on during WTOP-sleep
-                                            // mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_CFG0 register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_CFG0_Q_FACTOR_M \
-                                0x007FFFFF  // TBD
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG0_Q_FACTOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_CFG1 register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_CFG1_P_FACTOR_M \
-                                0x000FFFFF  // TBD
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG1_P_FACTOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_CFG2 register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_CONSECUTIVE_SWALLOW_M \
-                                0x00000018
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_CONSECUTIVE_SWALLOW_S 3
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_PRBS_GAIN \
-                                0x00000004
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_PRBS_ENABLE \
-                                0x00000002
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_SWALLOW_ENABLE \
-                                0x00000001  // TBD
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_ENABLE register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_ENABLE_COEX_CLK_SWALLOW_ENABLE \
-                                0x00000001  // 1 - Enable switching of sysclk
-                                            // to Coex-clk path ; 0 - Disable
-                                            // switching of sysclk to Coex-clk
-                                            // path.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_DCDC_CLK_GEN_CONFIG register.
-//
-//******************************************************************************
-#define GPRCM_DCDC_CLK_GEN_CONFIG_DCDC_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the clock for DCDC
-                                            // (PWM-mode) ; 0 - Disable the
-                                            // clock for DCDC (PWM-mode)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG4 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG4_FUSEFARM_ROW_17_MSW_M \
-                                0x0000FFFF  // This corresponds to
-                                            // ROW_17[31:16] of the FUSEFARM :
-                                            // [15:0] : TEST_TAP_KEY(31:16)
-
-#define GPRCM_GPRCM_EFUSE_READ_REG4_FUSEFARM_ROW_17_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG5 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG5_FUSEFARM_ROW_18_M \
-                                0xFFFFFFFF  // Corresponds to ROW_18 of
-                                            // FUSEFARM. [29:0] -
-                                            // MEMSS_COLUMN_SEL_LSW ; [30:30] -
-                                            // WLAN GEM DISABLE ; [31:31] -
-                                            // SERIAL WIRE JTAG SELECT
-
-#define GPRCM_GPRCM_EFUSE_READ_REG5_FUSEFARM_ROW_18_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG6 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG6_FUSEFARM_ROW_19_LSW_M \
-                                0x0000FFFF  // Corresponds to ROW_19[15:0] of
-                                            // FUSEFARM. [15:0] :
-                                            // MEMSS_COLUMN_SEL_MSW
-
-#define GPRCM_GPRCM_EFUSE_READ_REG6_FUSEFARM_ROW_19_LSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG7 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG7_FUSEFARM_ROW_20_LSW_ROW_19_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_20[15:0] &
-                                            // ROW_19[31:16] of FUSEFARM.
-                                            // FLASH_REGION0
-
-#define GPRCM_GPRCM_EFUSE_READ_REG7_FUSEFARM_ROW_20_LSW_ROW_19_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG8 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG8_FUSEFARM_ROW_21_LSW_ROW_20_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_21[15:0] &
-                                            // ROW_20[31:16] of FUSEFARM.
-                                            // FLASH_REGION1
-
-#define GPRCM_GPRCM_EFUSE_READ_REG8_FUSEFARM_ROW_21_LSW_ROW_20_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG9 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG9_FUSEFARM_ROW_22_LSW_ROW_21_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_22[15:0] &
-                                            // ROW_21[31:16] of FUSEFARM.
-                                            // FLASH_REGION2
-
-#define GPRCM_GPRCM_EFUSE_READ_REG9_FUSEFARM_ROW_22_LSW_ROW_21_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG10 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG10_FUSEFARM_ROW_23_LSW_ROW_22_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_23[15:0] &
-                                            // ROW_22[31:16] of FUSEFARM.
-                                            // FLASH_REGION3
-
-#define GPRCM_GPRCM_EFUSE_READ_REG10_FUSEFARM_ROW_23_LSW_ROW_22_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG11 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG11_FUSEFARM_ROW_24_LSW_ROW_23_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_24[15:0] &
-                                            // ROW_23[31:16] of FUSEFARM.
-                                            // FLASH_DESCRIPTOR
-
-#define GPRCM_GPRCM_EFUSE_READ_REG11_FUSEFARM_ROW_24_LSW_ROW_23_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG0 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG0_FUSEFARM_191_160_M \
-                                0xFFFFFFFF  // Corresponds to bits [191:160] of
-                                            // the FUSEFARM. This is ROW_5 of
-                                            // FUSEFARM [191:160] : [31:0] :
-                                            // DIE_ID0 [31:0] : DEVX [11:0] DEVY
-                                            // [23:12] DEVWAF [29:24] DEV_SPARE
-                                            // [31:30]
-
-#define GPRCM_GPRCM_DIEID_READ_REG0_FUSEFARM_191_160_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG1 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG1_FUSEFARM_223_192_M \
-                                0xFFFFFFFF  // Corresponds to bits [223:192] of
-                                            // the FUSEFARM. This is ROW_6 of
-                                            // FUSEFARM :- DEVLOT [23:0] DEVFAB
-                                            // [28:24] DEVFABBE [31:29]
-
-#define GPRCM_GPRCM_DIEID_READ_REG1_FUSEFARM_223_192_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG2 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG2_FUSEFARM_255_224_M \
-                                0xFFFFFFFF  // Corresponds to bits [255:224] of
-                                            // the FUSEFARM. This is ROW_7 of
-                                            // FUSEFARM:- DEVDESREV[4:0]
-                                            // Memrepair[5:5] MakeDefined[16:6]
-                                            // CHECKSUM[30:17] Reserved :
-                                            // [31:31]
-
-#define GPRCM_GPRCM_DIEID_READ_REG2_FUSEFARM_255_224_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG3 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG3_FUSEFARM_287_256_M \
-                                0xFFFFFFFF  // Corresponds to bits [287:256] of
-                                            // the FUSEFARM. This is ROW_8 of
-                                            // FUSEFARM :- DIEID0 - DEVREG
-                                            // [31:0]
-
-#define GPRCM_GPRCM_DIEID_READ_REG3_FUSEFARM_287_256_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG4 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG4_FUSEFARM_319_288_M \
-                                0xFFFFFFFF  // Corresponds to bits [319:288] of
-                                            // the FUSEFARM. This is ROW_9 of
-                                            // FUSEFARM :- [7:0] - VBATMON ;
-                                            // [13:8] - BUFF_OFFSET ; [15:15] -
-                                            // DFT_GXG ; [14:14] - DFT_GLX ;
-                                            // [19:16] - PHY ROM Version ;
-                                            // [23:20] - MAC ROM Version ;
-                                            // [27:24] - NWP ROM Version ;
-                                            // [31:28] - APPS ROM Version
-
-#define GPRCM_GPRCM_DIEID_READ_REG4_FUSEFARM_319_288_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SS_OVERRIDES_reserved_M \
-                                0xFFFFFC00
-
-#define GPRCM_APPS_SS_OVERRIDES_reserved_S 10
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_refclk_gating_override \
-                                0x00000200
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_refclk_gating_override_ctrl \
-                                0x00000100
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_pllclk_gating_override \
-                                0x00000080
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_pllclk_gating_override_ctrl \
-                                0x00000040
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_por_rstn_override \
-                                0x00000020
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysrstn_override \
-                                0x00000010
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysclk_gating_override \
-                                0x00000008
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_por_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysrstn_override_ctrl \
-                                0x00000002
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysclk_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SS_OVERRIDES_reserved_M \
-                                0xFFFFFC00
-
-#define GPRCM_NWP_SS_OVERRIDES_reserved_S 10
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_refclk_gating_override \
-                                0x00000200
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_refclk_gating_override_ctrl \
-                                0x00000100
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_pllclk_gating_override \
-                                0x00000080
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_pllclk_gating_override_ctrl \
-                                0x00000040
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_por_rstn_override \
-                                0x00000020
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysrstn_override \
-                                0x00000010
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysclk_gating_override \
-                                0x00000008
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_por_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysrstn_override_ctrl \
-                                0x00000002
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysclk_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SHARED_SS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_SHARED_SS_OVERRIDES_reserved_M \
-                                0xFFFFFF00
-
-#define GPRCM_SHARED_SS_OVERRIDES_reserved_S 8
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_pllclk_gating_override_ctrl \
-                                0x00000080
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_pllclk_gating_override \
-                                0x00000040
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_refclk_gating_override_ctrl \
-                                0x00000020
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_refclk_gating_override \
-                                0x00000010
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_rstn_override \
-                                0x00000008
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_sysclk_gating_override \
-                                0x00000004
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_rstn_override_ctrl \
-                                0x00000002
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_sysclk_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_IDMEM_CORE_RST_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_reserved_M \
-                                0xFFFFFF00
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_reserved_S 8
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_sysrstn_override \
-                                0x00000080
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_fmc_rstn_override \
-                                0x00000040
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_SPARE_RW1 \
-                                0x00000020
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_piosc_gating_override \
-                                0x00000010
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_sysrstn_override_ctrl \
-                                0x00000008
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_fmc_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_SPARE_RW0 \
-                                0x00000002
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_piosc_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TOP_DIE_FSM_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_reserved_M \
-                                0xFFFFF000
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_reserved_S 12
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_pgoodin_override_ctrl \
-                                0x00000800
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_pgoodin_override \
-                                0x00000400
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_hclk_gating_override \
-                                0x00000200
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_piosc_gating_override \
-                                0x00000100
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_rstn_override \
-                                0x00000080
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_ponin_override \
-                                0x00000040
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_flash_ready_override \
-                                0x00000020
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_hclk_gating_override_ctrl \
-                                0x00000010
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_piosc_gating_override_ctrl \
-                                0x00000008
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_ponin_override_ctrl \
-                                0x00000002
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_flash_ready_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PSCON_OVERRIDES_reserved_M \
-                                0xFFF00000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_reserved_S 20
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_sleep_override_ctrl \
-                                0x00080000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_update_override_ctrl \
-                                0x00040000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_off_override_ctrl \
-                                0x00020000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_retain_override_ctrl \
-                                0x00010000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_NU1_M \
-                                0x0000FC00
-
-#define GPRCM_MCU_PSCON_OVERRIDES_NU1_S 10
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_sleep_override \
-                                0x00000200
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_update_override \
-                                0x00000100
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_off_override_M \
-                                0x000000F0
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_off_override_S 4
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_retain_override_M \
-                                0x0000000F
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_retain_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_PSCON_OVERRIDES_reserved_M \
-                                0xFFC00000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_reserved_S 22
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_sleep_override_ctrl \
-                                0x00200000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_update_override_ctrl \
-                                0x00100000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_off_override_ctrl \
-                                0x00080000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_retain_override_ctrl \
-                                0x00040000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_sleep_override \
-                                0x00020000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_update_override \
-                                0x00010000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_off_override_M \
-                                0x0000FF00
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_off_override_S 8
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_retain_override_M \
-                                0x000000FF
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_retain_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WELP_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_WELP_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFFFC
-
-#define GPRCM_WELP_PSCON_OVERRIDES_reserved_S 2
-#define GPRCM_WELP_PSCON_OVERRIDES_mem_welp_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_WELP_PSCON_OVERRIDES_mem_welp_pscon_sleep_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WL_SDIO_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFFFC
-
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_reserved_S 2
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_mem_wl_sdio_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_mem_wl_sdio_pscon_sleep_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCSPI_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MCSPI_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFF00
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_reserved_S 8
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_retain_override_ctrl \
-                                0x00000080
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_off_override_ctrl \
-                                0x00000040
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_retain_override \
-                                0x00000020
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_off_override \
-                                0x00000010
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_update_override_ctrl \
-                                0x00000008
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_update_override \
-                                0x00000004
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_sleep_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SSDIO_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_SSDIO_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFFFC
-
-#define GPRCM_SSDIO_PSCON_OVERRIDES_reserved_S 2
-#define GPRCM_SSDIO_PSCON_OVERRIDES_mem_ssdio_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_SSDIO_PSCON_OVERRIDES_mem_ssdio_pscon_sleep_override \
-                                0x00000001
-
-
-
-
-#endif // __HW_GPRCM_H__
diff --git a/ports/cc3200/hal/inc/hw_hib1p2.h b/ports/cc3200/hal/inc/hw_hib1p2.h
deleted file mode 100644
index 95e25ff7cf..0000000000
--- a/ports/cc3200/hal/inc/hw_hib1p2.h
+++ /dev/null
@@ -1,1750 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_HIB1P2_H__
-#define __HW_HIB1P2_H__
-
-//*****************************************************************************
-//
-// The following are defines for the HIB1P2 register offsets.
-//
-//*****************************************************************************
-#define HIB1P2_O_SRAM_SKA_LDO_PARAMETERS0 \
-                                0x00000000
-
-#define HIB1P2_O_SRAM_SKA_LDO_PARAMETERS1 \
-                                0x00000004
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS0 \
-                                0x00000008
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS1 \
-                                0x0000000C
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS2 \
-                                0x00000010
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS3 \
-                                0x00000014
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS4 \
-                                0x00000018
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS5 \
-                                0x0000001C
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS6 \
-                                0x00000020
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS0 \
-                                0x00000024
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS1 \
-                                0x00000028
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS16 \
-                                0x00000064
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS17 \
-                                0x00000068
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS18 \
-                                0x0000006C
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS19 \
-                                0x00000070
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS0 \
-                                0x00000074
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS1 \
-                                0x00000078
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS2 \
-                                0x0000007C
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS3 \
-                                0x00000080
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS4 \
-                                0x00000084
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS5 \
-                                0x00000088
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS6 \
-                                0x0000008C
-
-#define HIB1P2_O_PMBIST_PARAMETERS0 \
-                                0x00000094
-
-#define HIB1P2_O_PMBIST_PARAMETERS1 \
-                                0x00000098
-
-#define HIB1P2_O_PMBIST_PARAMETERS2 \
-                                0x0000009C
-
-#define HIB1P2_O_PMBIST_PARAMETERS3 \
-                                0x000000A0
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS8 \
-                                0x000000A4
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS_OVERRIDE \
-                                0x000000A8
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS_OVERRIDE \
-                                0x000000AC
-
-#define HIB1P2_O_DIG_DCDC_VTRIM_CFG \
-                                0x000000B0
-
-#define HIB1P2_O_DIG_DCDC_FSM_PARAMETERS \
-                                0x000000B4
-
-#define HIB1P2_O_ANA_DCDC_FSM_PARAMETERS \
-                                0x000000B8
-
-#define HIB1P2_O_SRAM_SKA_LDO_FSM_PARAMETERS \
-                                0x000000BC
-
-#define HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG \
-                                0x000000C0
-
-#define HIB1P2_O_CM_OSC_16M_CONFIG \
-                                0x000000C4
-
-#define HIB1P2_O_SOP_SENSE_VALUE \
-                                0x000000C8
-
-#define HIB1P2_O_HIB_RTC_TIMER_LSW_1P2 \
-                                0x000000CC
-
-#define HIB1P2_O_HIB_RTC_TIMER_MSW_1P2 \
-                                0x000000D0
-
-#define HIB1P2_O_HIB1P2_BGAP_TRIM_OVERRIDES \
-                                0x000000D4
-
-#define HIB1P2_O_HIB1P2_EFUSE_READ_REG0 \
-                                0x000000D8
-
-#define HIB1P2_O_HIB1P2_EFUSE_READ_REG1 \
-                                0x000000DC
-
-#define HIB1P2_O_HIB1P2_POR_TEST_CTRL \
-                                0x000000E0
-
-#define HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG0 \
-                                0x000000E4
-
-#define HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG1 \
-                                0x000000E8
-
-#define HIB1P2_O_HIB_TIMER_SYNC_CFG2 \
-                                0x000000EC
-
-#define HIB1P2_O_HIB_TIMER_SYNC_TSF_ADJ_VAL \
-                                0x000000F0
-
-#define HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW \
-                                0x000000F4
-
-#define HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW \
-                                0x000000F8
-
-#define HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW \
-                                0x000000FC
-
-#define HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW \
-                                0x00000100
-
-#define HIB1P2_O_HIB_TIMER_SYNC_WAKE_OFFSET_ERR \
-                                0x00000104
-
-#define HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW \
-                                0x00000108
-
-#define HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW \
-                                0x0000010C
-
-#define HIB1P2_O_CM_SPARE       0x00000110
-#define HIB1P2_O_PORPOL_SPARE   0x00000114
-#define HIB1P2_O_MEM_DIG_DCDC_CLK_CONFIG \
-                                0x00000118
-
-#define HIB1P2_O_MEM_ANA_DCDC_CLK_CONFIG \
-                                0x0000011C
-
-#define HIB1P2_O_MEM_FLASH_DCDC_CLK_CONFIG \
-                                0x00000120
-
-#define HIB1P2_O_MEM_PA_DCDC_CLK_CONFIG \
-                                0x00000124
-
-#define HIB1P2_O_MEM_SLDO_VNWA_OVERRIDE \
-                                0x00000128
-
-#define HIB1P2_O_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE \
-                                0x0000012C
-
-#define HIB1P2_O_MEM_HIB_FSM_DEBUG \
-                                0x00000130
-
-#define HIB1P2_O_MEM_SLDO_VNWA_SW_CTRL \
-                                0x00000134
-
-#define HIB1P2_O_MEM_SLDO_WEAK_PROCESS \
-                                0x00000138
-
-#define HIB1P2_O_MEM_PA_DCDC_OV_UV_STATUS \
-                                0x0000013C
-
-#define HIB1P2_O_MEM_CM_TEST_MODE \
-                                0x00000140
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SRAM_SKA_LDO_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_sc_itrim_lowv_M \
-                                0xC0000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_sc_itrim_lowv_S 30
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_iq_trim_lowv_M \
-                                0x30000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_iq_trim_lowv_S 28
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_sc_prot_lowv \
-                                0x08000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_lowv_override \
-                                0x04000000  // FSM Override value for SLDO_EN :
-                                            // Applicable only when bit [4] of
-                                            // this register is set to 1.
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_low_pwr_lowv \
-                                0x02000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_int_cap_sel_lowv \
-                                0x01000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_vtrim_lowv_M \
-                                0x00FC0000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_vtrim_lowv_S 18
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_spare_lowv_M \
-                                0x0003FF00
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_spare_lowv_S 8
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_lowv_override \
-                                0x00000080  // FSM Override value for
-                                            // SKA_LDO_EN : Applicable only when
-                                            // bit [3] of this register is set
-                                            // to 1.
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_cap_ref_lowv \
-                                0x00000040
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_resdiv_ref_lowv \
-                                0x00000020
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_lowv_fsm_override_ctrl \
-                                0x00000010  // When 1, bit[26] of this register
-                                            // will be used as SLDO_EN
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_lowv_fsm_override_ctrl \
-                                0x00000008  // When 1, bit[26] of this register
-                                            // will be used as SKA_LDO_EN
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_NA1_M \
-                                0x00000007
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_NA1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SRAM_SKA_LDO_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_ctrl_lowv_M \
-                                0xFFC00000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_ctrl_lowv_S 22
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_vtrim_lowv_M \
-                                0x003F0000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_vtrim_lowv_S 16
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_sldo_en_tload_lowv \
-                                0x00008000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_en_tload_lowv \
-                                0x00004000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_cap_sw_en_lowv \
-                                0x00002000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_en_hib_lowv \
-                                0x00001000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_en_vref_buf_lowv \
-                                0x00000800
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_NA2_M \
-                                0x000007FF
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_NA2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_lowv_override \
-                                0x80000000  // Override value for DCDC_DIG_EN :
-                                            // Applicable only when bit [31] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_delayed_en_lowv \
-                                0x40000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_subreg_1p8v_lowv_override \
-                                0x20000000  // Override value for
-                                            // DCDC_DIG_EN_SUBREG_1P8V :
-                                            // Applicable only when bit [30] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_subreg_1p2v_lowv_override \
-                                0x10000000  // Override value for
-                                            // DCDC_DIG_EN_SUBREG_1P2V :
-                                            // Applicable only when bit [29] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_slp_mode_lowv_override \
-                                0x08000000  // Override value for
-                                            // DCDC_DIG_SLP_EN : Applicable only
-                                            // when bit [28] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_ldo_mode_lowv \
-                                0x04000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_nfet_rds_mode_lowv \
-                                0x02000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_pfet_rds_mode_lowv \
-                                0x01000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_ext_smps_override_mode_lowv \
-                                0x00800000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_clk_in_lowv_enable \
-                                0x00400000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_vtrim_lowv_override_M \
-                                0x003F0000  // Override value for
-                                            // DCDC_DIG_VTRIM : Applicable only
-                                            // when bit [27] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1.
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_vtrim_lowv_override_S 16
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_pfm_ripple_trim_lowv_M \
-                                0x0000C000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_pfm_ripple_trim_lowv_S 14
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_iq_ctrl_lowv_M \
-                                0x00003000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_iq_ctrl_lowv_S 12
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_cl_non_ov_lowv \
-                                0x00000800
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_non_ov_ctrl_lowv_M \
-                                0x00000780
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_non_ov_ctrl_lowv_S 7
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_slp_drv_dly_sel_lowv_M \
-                                0x00000078
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_slp_drv_dly_sel_lowv_S 3
-#define HIB1P2_DIG_DCDC_PARAMETERS0_NA3_M \
-                                0x00000007
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_NA3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_lowv_fsm_override_ctrl \
-                                0x80000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_subreg_1p8v_fsm_override_ctrl \
-                                0x40000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_subreg_1p2v_fsm_override_ctrl \
-                                0x20000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_slp_mode_lowv_fsm_override_ctrl \
-                                0x10000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_vtrim_fsm_override_ctrl \
-                                0x08000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_cot_mode_en_lowv_fsm_override_ctrl \
-                                0x04000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_ilim_trim_lowv_efc_override_ctrl \
-                                0x02000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_NA4_M \
-                                0x01FFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_NA4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS2 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pfet_sel_lowv_M \
-                                0xF0000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pfet_sel_lowv_S 28
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_nfet_sel_lowv_M \
-                                0x0F000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_nfet_sel_lowv_S 24
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_stagger_ctrl_lowv_M \
-                                0x00C00000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_stagger_ctrl_lowv_S 22
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_stagger_ctrl_lowv_M \
-                                0x00300000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_stagger_ctrl_lowv_S 20
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_str_sel_lowv_M \
-                                0x000F0000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_str_sel_lowv_S 16
-#define HIB1P2_DIG_DCDC_PARAMETERS2_NA5 \
-                                0x00008000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_str_sel_lowv_M \
-                                0x00007800
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_str_sel_lowv_S 11
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_en_shootthru_ctrl_lowv \
-                                0x00000400
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ton_trim_lowv_M \
-                                0x000003FC
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ton_trim_lowv_S 2
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_swcap_res_hf_clk_lowv \
-                                0x00000002
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_cot_mode_en_lowv_override \
-                                0x00000001  // Override value for
-                                            // DCDC_DIG_COT_EN : Applicable only
-                                            // when bit[26] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS3 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS3_NA6 \
-                                0x80000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_cot_ctrl_lowv_M \
-                                0x7F800000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_cot_ctrl_lowv_S 23
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ilim_lowv \
-                                0x00400000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ilim_hib_lowv \
-                                0x00200000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_trim_lowv_override_M \
-                                0x001FE000  // Override value for
-                                            // DCDC_DIG_ILIM_TRIM : Applicable
-                                            // only when bit [25] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_trim_lowv_override_S 13
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_mask_dly_sel_lowv_M \
-                                0x00001800
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_mask_dly_sel_lowv_S 11
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ncomp_lowv \
-                                0x00000400
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ncomp_hib_lowv \
-                                0x00000200
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_trim_lowv_M \
-                                0x000001F0
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_trim_lowv_S 4
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_mask_dly_sel_lowv_M \
-                                0x0000000C
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_mask_dly_sel_lowv_S 2
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_uv_prot_lowv \
-                                0x00000002
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ov_prot_lowv \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS4 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS4_dcdc_dig_uv_prot_out_lowv \
-                                0x80000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_dcdc_dig_ov_prot_out_lowv \
-                                0x40000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_mem_dcdc_dig_en_tmux_lowv \
-                                0x20000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_NA7_M \
-                                0x1FFFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_NA7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS5 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS5_mem_dcdc_dig_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS5_mem_dcdc_dig_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS6 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS6_mem_dcdc_dig_spare_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS6_mem_dcdc_dig_spare_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_lowv_override \
-                                0x80000000  // Override for ANA DCDC EN
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_delayed_en_lowv \
-                                0x40000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_subreg_1p8v_lowv \
-                                0x20000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_subreg_1p2v_lowv \
-                                0x10000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_pwm_mode_lowv_override \
-                                0x08000000  // Override for ANA DCDC PWM
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_slp_mode_lowv_override \
-                                0x04000000  // Override for ANA DCDC SLP
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_ldo_mode_lowv \
-                                0x02000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_pfet_rds_mode_lowv \
-                                0x01000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_nfet_rds_mode_lowv \
-                                0x00800000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_ext_smps_override_mode_lowv \
-                                0x00400000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_clk_in_lowv_enable \
-                                0x00200000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_vtrim_lowv_M \
-                                0x001E0000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_vtrim_lowv_S 17
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfm_ripple_trim_lowv_M \
-                                0x00018000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfm_ripple_trim_lowv_S 15
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_iq_ctrl_lowv_M \
-                                0x00006000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_iq_ctrl_lowv_S 13
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_cl_non_ov_lowv \
-                                0x00001000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_non_ov_ctrl_lowv_M \
-                                0x00000F00
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_non_ov_ctrl_lowv_S 8
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_slp_drv_dly_sel_lowv_M \
-                                0x000000F0
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_slp_drv_dly_sel_lowv_S 4
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfet_sel_lowv_M \
-                                0x0000000F
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfet_sel_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_nfet_sel_lowv_M \
-                                0xF0000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_nfet_sel_lowv_S 28
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_stagger_ctrl_lowv_M \
-                                0x0C000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_stagger_ctrl_lowv_S 26
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_stagger_ctrl_lowv_M \
-                                0x03000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_stagger_ctrl_lowv_S 24
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_str_sel_lowv_M \
-                                0x00F00000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_str_sel_lowv_S 20
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_str_sel_lowv_M \
-                                0x000F0000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_str_sel_lowv_S 16
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_rtrim_lowv \
-                                0x00008000  // (Earlier SHOOTTHRU CTRL)
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_apwm_en_lowv \
-                                0x00004000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ramp_hgt_lowv_M \
-                                0x00003E00
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ramp_hgt_lowv_S 9
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_anti_glitch_lowv \
-                                0x00000100
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_hi_clamp_lowv \
-                                0x00000080
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_hi_clamp_trim_lowv_M \
-                                0x00000060
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_hi_clamp_trim_lowv_S 5
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_lo_clamp_lowv \
-                                0x00000010
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_lo_clamp_trim_lowv_M \
-                                0x0000000C
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_lo_clamp_trim_lowv_S 2
-#define HIB1P2_ANA_DCDC_PARAMETERS1_NA8_M \
-                                0x00000003
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_NA8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS16 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ilim_lowv \
-                                0x00200000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ilim_hib_lowv \
-                                0x00100000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_trim_lowv_override_M \
-                                0x000FF000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_trim_lowv_override_S 12
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_mask_dly_sel_lowv_M \
-                                0x00000C00
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_mask_dly_sel_lowv_S 10
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ncomp_lowv \
-                                0x00000200
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ncomp_hib_lowv \
-                                0x00000100
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_trim_lowv_M \
-                                0x000000F8
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_trim_lowv_S 3
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_mask_dly_sel_lowv_M \
-                                0x00000006
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_mask_dly_sel_lowv_S 1
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ov_prot_lowv \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS17 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS17_dcdc_ana_ov_prot_out_lowv \
-                                0x80000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS17_mem_dcdc_ana_en_tmux_lowv \
-                                0x40000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS17_NA17_M \
-                                0x3FFFFFFF
-
-#define HIB1P2_ANA_DCDC_PARAMETERS17_NA17_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS18 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS18_mem_dcdc_ana_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_ANA_DCDC_PARAMETERS18_mem_dcdc_ana_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS19 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS19_mem_dcdc_ana_spare_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_ANA_DCDC_PARAMETERS19_mem_dcdc_ana_spare_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_delayed_en_lowv \
-                                0x40000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_clk_in_lowv_enable \
-                                0x20000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_iq_ctrl_lowv_M \
-                                0x18000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_iq_ctrl_lowv_S 27
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_buck_mode_lowv \
-                                0x04000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_boost_mode_lowv \
-                                0x02000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_buck_boost_mode_lowv \
-                                0x01000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_bb_alt_cycles_lowv \
-                                0x00800000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_cl_non_ov_lowv \
-                                0x00400000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_non_ov_ctrl_lowv_M \
-                                0x003C0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_non_ov_ctrl_lowv_S 18
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_drv_lowv \
-                                0x00020000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_pwm_mode_lowv \
-                                0x00010000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_pfm_comp_lowv \
-                                0x00008000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_slp_mode_lowv \
-                                0x00004000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_n1fet_rds_mode_lowv \
-                                0x00002000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_n2fet_rds_mode_lowv \
-                                0x00001000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_p1fet_rds_mode_lowv \
-                                0x00000800
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_p2fet_rds_mode_lowv \
-                                0x00000400
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_ext_smps_mode_override_lowv \
-                                0x00000200
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_p1fet_sel_lowv_M \
-                                0x000001E0
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_p1fet_sel_lowv_S 5
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_n1fet_sel_lowv_M \
-                                0x0000001E
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_n1fet_sel_lowv_S 1
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_NA18 \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_sel_lowv_M \
-                                0xF0000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_sel_lowv_S 28
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_sel_lowv_M \
-                                0x0F000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_sel_lowv_S 24
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1drv_str_sel_lowv_M \
-                                0x00F00000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1drv_str_sel_lowv_S 20
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1drv_str_sel_lowv_M \
-                                0x000F0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1drv_str_sel_lowv_S 16
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2drv_str_sel_lowv_M \
-                                0x0000F000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2drv_str_sel_lowv_S 12
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2drv_str_sel_lowv_M \
-                                0x00000F00
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2drv_str_sel_lowv_S 8
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1fet_non_ov_lowv_M \
-                                0x000000C0
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1fet_non_ov_lowv_S 6
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1fet_non_ov_lowv_M \
-                                0x00000030
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1fet_non_ov_lowv_S 4
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_non_ov_lowv_M \
-                                0x0000000C
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_non_ov_lowv_S 2
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_non_ov_lowv_M \
-                                0x00000003
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_non_ov_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS2 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p1fet_stagger_lowv_M \
-                                0xC0000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p1fet_stagger_lowv_S 30
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n1fet_stagger_lowv_M \
-                                0x30000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n1fet_stagger_lowv_S 28
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p2fet_stagger_lowv_M \
-                                0x0C000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p2fet_stagger_lowv_S 26
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n2fet_stagger_lowv_M \
-                                0x03000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n2fet_stagger_lowv_S 24
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_shoot_thru_ctrl_lowv \
-                                0x00800000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ncomp_lowv \
-                                0x00400000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ncomp_hib_lowv \
-                                0x00200000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_trim_lowv_M \
-                                0x001F0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_trim_lowv_S 16
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_mask_dly_trim_lowv_M \
-                                0x0000F000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_mask_dly_trim_lowv_S 12
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ilim_lowv \
-                                0x00000800
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ilim_hib_lowv \
-                                0x00000400
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_trim_lowv_override_M \
-                                0x000003FC
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_trim_lowv_override_S 2
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_mask_dly_sel_lowv_M \
-                                0x00000003
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_mask_dly_sel_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS3 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_anti_glitch_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_hi_clamp_lowv \
-                                0x40000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_lo_clamp_lowv \
-                                0x20000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_ramp_hgt_lowv_M \
-                                0x1F000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_ramp_hgt_lowv_S 24
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclamph_trim_lowv_M \
-                                0x00E00000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclamph_trim_lowv_S 21
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclampl_trim_lowv_M \
-                                0x001C0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclampl_trim_lowv_S 18
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vtrim_lowv_M \
-                                0x0003C000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vtrim_lowv_S 14
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_pfm_ripple_trim_lowv_M \
-                                0x00003C00
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_pfm_ripple_trim_lowv_S 10
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_slp_drv_dly_sel_lowv_M \
-                                0x00000300
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_slp_drv_dly_sel_lowv_S 8
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_ov_prot_lowv \
-                                0x00000080
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_uv_prot_lowv \
-                                0x00000040
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_tmux_lowv \
-                                0x00000020
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_NA19_M \
-                                0x0000001F
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_NA19_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS4 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS4_mem_dcdc_flash_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS4_mem_dcdc_flash_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS5 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS5_mem_dcdc_flash_spare_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS5_mem_dcdc_flash_spare_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS6 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_dcdc_flash_ov_prot_out_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_dcdc_flash_uv_prot_out_lowv \
-                                0x40000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_NA20_M \
-                                0x3FFFFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_NA20_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS0_mem_pm_bist_en_lowv \
-                                0x80000000
-
-#define HIB1P2_PMBIST_PARAMETERS0_mem_pm_bist_ctrl_lowv_M \
-                                0x7FFFF800
-
-#define HIB1P2_PMBIST_PARAMETERS0_mem_pm_bist_ctrl_lowv_S 11
-#define HIB1P2_PMBIST_PARAMETERS0_NA21_M \
-                                0x000007FF
-
-#define HIB1P2_PMBIST_PARAMETERS0_NA21_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS1_mem_pm_bist_spare_lowv_M \
-                                0xFFFF0000
-
-#define HIB1P2_PMBIST_PARAMETERS1_mem_pm_bist_spare_lowv_S 16
-#define HIB1P2_PMBIST_PARAMETERS1_mem_pmtest_en_lowv \
-                                0x00008000
-
-#define HIB1P2_PMBIST_PARAMETERS1_NA22_M \
-                                0x00007FFF
-
-#define HIB1P2_PMBIST_PARAMETERS1_NA22_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS2 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS2_mem_pmtest_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_PMBIST_PARAMETERS2_mem_pmtest_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS3 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_spare_lowv_M \
-                                0xFFFF0000
-
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_spare_lowv_S 16
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_load_trim_lowv_M \
-                                0x0000E000
-
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_load_trim_lowv_S 13
-#define HIB1P2_PMBIST_PARAMETERS3_mem_rnwell_calib_en_lowv \
-                                0x00001000
-
-#define HIB1P2_PMBIST_PARAMETERS3_NA23_M \
-                                0x00000FFF
-
-#define HIB1P2_PMBIST_PARAMETERS3_NA23_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS8 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_en_flash_sup_comp_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_high_sup_trim_lowv_M \
-                                0x7C000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_high_sup_trim_lowv_S 26
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_low_sup_trim_lowv_M \
-                                0x03E00000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_low_sup_trim_lowv_S 21
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_NA24_M \
-                                0x001FFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_NA24_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_reserved_M \
-                                0xFFFFFFC0
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_reserved_S 6
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_subreg_1p2v_lowv_override_ctrl \
-                                0x00000020
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_subreg_1p8v_lowv_override_ctrl \
-                                0x00000010
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_ilim_trim_lowv_efc_override_ctrl \
-                                0x00000008
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_slp_mode_lowv_fsm_override_ctrl \
-                                0x00000004
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_pwm_mode_lowv_fsm_override_ctrl \
-                                0x00000002
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_lowv_fsm_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_reserved_M \
-                                0xFFFFFFFC
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_reserved_S 2
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_flash_en_lowv_override_ctrl \
-                                0x00000002
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_flash_ilim_trim_lowv_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_VTRIM_CFG register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_reserved_M \
-                                0xFF000000
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_reserved_S 24
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_run_vtrim_M \
-                                0x00FC0000
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_run_vtrim_S 18
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_dslp_vtrim_M \
-                                0x0003F000
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_dslp_vtrim_S 12
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_lpds_vtrim_M \
-                                0x00000FC0
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_lpds_vtrim_S 6
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_Spare_RW_M \
-                                0x0000003F
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_Spare_RW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_FSM_PARAMETERS register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_reserved_M \
-                                0xFFFF8000
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_reserved_S 15
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_cot_to_vtrim_M \
-                                0x00007000
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_cot_to_vtrim_S 12
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_vtrim_to_sleep_M \
-                                0x00000E00
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_vtrim_to_sleep_S 9
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_sleep_to_vtrim_M \
-                                0x000001C0
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_sleep_to_vtrim_S 6
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_vtrim_to_cot_M \
-                                0x00000038
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_vtrim_to_cot_S 3
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_cot_to_run_M \
-                                0x00000007
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_cot_to_run_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_FSM_PARAMETERS register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_reserved_M \
-                                0xFFFFFFF8
-
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_reserved_S 3
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_mem_dcdc_ana_dslp_exit_sleep_to_run_M \
-                                0x00000007
-
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_mem_dcdc_ana_dslp_exit_sleep_to_run_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SRAM_SKA_LDO_FSM_PARAMETERS register.
-//
-//******************************************************************************
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_reserved_M \
-                                0xFFFFFFC0
-
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_reserved_S 6
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_ska_ldo_en_to_sram_ldo_dis_M \
-                                0x00000038
-
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_ska_ldo_en_to_sram_ldo_dis_S 3
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_sram_ldo_en_to_ska_ldo_dis_M \
-                                0x00000007
-
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_sram_ldo_en_to_ska_ldo_dis_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG register.
-//
-//******************************************************************************
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_reserved_M \
-                                0xFFFFFFF8
-
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_reserved_S 3
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_mem_bgap_duty_cycling_exit_time_M \
-                                0x00000007
-
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_mem_bgap_duty_cycling_exit_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_CM_OSC_16M_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_CM_OSC_16M_CONFIG_reserved_M \
-                                0xFFFC0000
-
-#define HIB1P2_CM_OSC_16M_CONFIG_reserved_S 18
-#define HIB1P2_CM_OSC_16M_CONFIG_cm_clk_good_16m \
-                                0x00020000
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_en_osc_16m \
-                                0x00010000
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_trim_M \
-                                0x0000FC00
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_trim_S 10
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_spare_M \
-                                0x000003F0
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_spare_S 4
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_en_sli_16m \
-                                0x00000008
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_sli_16m_trim_M \
-                                0x00000007
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_sli_16m_trim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SOP_SENSE_VALUE register.
-//
-//******************************************************************************
-#define HIB1P2_SOP_SENSE_VALUE_reserved_M \
-                                0xFFFFFF00
-
-#define HIB1P2_SOP_SENSE_VALUE_reserved_S 8
-#define HIB1P2_SOP_SENSE_VALUE_sop_sense_value_M \
-                                0x000000FF
-
-#define HIB1P2_SOP_SENSE_VALUE_sop_sense_value_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_RTC_TIMER_LSW_1P2 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_RTC_TIMER_LSW_1P2_hib_rtc_timer_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_RTC_TIMER_LSW_1P2_hib_rtc_timer_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_RTC_TIMER_MSW_1P2 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_RTC_TIMER_MSW_1P2_hib_rtc_timer_msw_M \
-                                0x0000FFFF
-
-#define HIB1P2_HIB_RTC_TIMER_MSW_1P2_hib_rtc_timer_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_BGAP_TRIM_OVERRIDES register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_reserved_M \
-                                0xFF800000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_reserved_S 23
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_mag_trim_override_ctrl \
-                                0x00400000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_mag_trim_override_M \
-                                0x003FC000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_mag_trim_override_S 14
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_temp_trim_override_ctrl \
-                                0x00002000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_temp_trim_override_M \
-                                0x00001FC0
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_temp_trim_override_S 6
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_rtrim_override_ctrl \
-                                0x00000020
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_rtrim_override_M \
-                                0x0000001F
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_rtrim_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_EFUSE_READ_REG0 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_EFUSE_READ_REG0_FUSEFARM_ROW_12_M \
-                                0xFFFFFFFF  // Corresponds to ROW_12 of
-                                            // FUSEFARM. [7:0] :
-                                            // DCDC_DIG_ILIM_TRIM_LOWV(7:0)
-                                            // [15:8] :
-                                            // DCDC_ANA_ILIM_TRIM_LOWV(7:0)
-                                            // [23:16] :
-                                            // DCDC_FLASH_ILIM_TRIM_LOWV(7:0)
-                                            // [24:24] : DTHE SHA DISABLE
-                                            // [25:25] : DTHE DES DISABLE
-                                            // [26:26] : DTHE AES DISABLE
-                                            // [31:27] : HD_BG_RTRIM (4:0)
-
-#define HIB1P2_HIB1P2_EFUSE_READ_REG0_FUSEFARM_ROW_12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_EFUSE_READ_REG1 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_EFUSE_READ_REG1_FUSEFARM_ROW_13_M \
-                                0xFFFFFFFF  // Corresponds to ROW_13 of the
-                                            // FUSEFARM. [7:0] : HD_BG_MAG_TRIM
-                                            // (7:0) [14:8] : HD_BG_TEMP_TRIM
-                                            // (6:0) [15:15] : GREYOUT ENABLE
-                                            // DUTY CYCLING [31:16] :
-                                            // Reserved/Checksum
-
-#define HIB1P2_HIB1P2_EFUSE_READ_REG1_FUSEFARM_ROW_13_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_POR_TEST_CTRL register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_reserved_M \
-                                0xFFFFFF00
-
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_reserved_S 8
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_mem_prcm_por_test_ctrl_M \
-                                0x000000FF
-
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_mem_prcm_por_test_ctrl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG0 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_reserved_M \
-                                0xFFFF0000
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_reserved_S 16
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_mem_cfg_calib_time_M \
-                                0x0000FF00
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_mem_cfg_calib_time_S 8
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_NU1_M \
-                                0x000000FE
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_NU1_S 1
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_mem_cfg_calib_start \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG1 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_reserved_M \
-                                0xFFF00000
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_reserved_S 20
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_fast_calib_count_M \
-                                0x000FFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_fast_calib_count_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_CFG2 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_reserved_M \
-                                0xFFFFFE00
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_reserved_S 9
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_mem_cfg_hib_unload \
-                                0x00000100
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_NU1_M \
-                                0x000000FC
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_NU1_S 2
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_mem_cfg_tsf_adj \
-                                0x00000002
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_mem_cfg_update_tsf \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_TSF_ADJ_VAL register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_TSF_ADJ_VAL_mem_tsf_adj_val_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_TSF_ADJ_VAL_mem_tsf_adj_val_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW_rtc_gts_timestamp_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW_rtc_gts_timestamp_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_reserved_M \
-                                0xFFFF0000
-
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_reserved_S 16
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_rtc_gts_timestamp_msw_M \
-                                0x0000FFFF
-
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_rtc_gts_timestamp_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW_rtc_wup_timestamp_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW_rtc_wup_timestamp_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_reserved_M \
-                                0xFFFF0000
-
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_reserved_S 16
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_rtc_wup_timestamp_msw_M \
-                                0x0000FFFF
-
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_rtc_wup_timestamp_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_WAKE_OFFSET_ERR register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_reserved_M \
-                                0xFFFFF000
-
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_reserved_S 12
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_wup_offset_error_M \
-                                0x00000FFF
-
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_wup_offset_error_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW_tsf_curr_val_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW_tsf_curr_val_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW_tsf_curr_val_msw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW_tsf_curr_val_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the HIB1P2_O_CM_SPARE register.
-//
-//******************************************************************************
-#define HIB1P2_CM_SPARE_CM_SPARE_OUT_M \
-                                0xFF000000
-
-#define HIB1P2_CM_SPARE_CM_SPARE_OUT_S 24
-#define HIB1P2_CM_SPARE_MEM_CM_TEST_CTRL_M \
-                                0x00FF0000
-
-#define HIB1P2_CM_SPARE_MEM_CM_TEST_CTRL_S 16
-#define HIB1P2_CM_SPARE_MEM_CM_SPARE_M \
-                                0x0000FFFF
-
-#define HIB1P2_CM_SPARE_MEM_CM_SPARE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PORPOL_SPARE register.
-//
-//******************************************************************************
-#define HIB1P2_PORPOL_SPARE_MEM_PORPOL_SPARE_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_PORPOL_SPARE_MEM_PORPOL_SPARE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_DIG_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_ANA_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_FLASH_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_PA_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_SLDO_VNWA_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_SLDO_VNWA_OVERRIDE_MEM_SLDO_EN_TOP_VNWA_OVERRIDE_CTRL \
-                                0x00000002
-
-#define HIB1P2_MEM_SLDO_VNWA_OVERRIDE_MEM_SLDO_EN_TOP_VNWA_OVERRIDE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE_MEM_BGAP_DUTY_CYCLING_OVERRIDE_CTRL \
-                                0x00000002
-
-#define HIB1P2_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE_MEM_BGAP_DUTY_CYCLING_OVERRIDE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_HIB_FSM_DEBUG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_HIB_FSM_DEBUG_SRAM_PS_M \
-                                0x00000700
-
-#define HIB1P2_MEM_HIB_FSM_DEBUG_SRAM_PS_S 8
-#define HIB1P2_MEM_HIB_FSM_DEBUG_ANA_DCDC_PS_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_HIB_FSM_DEBUG_ANA_DCDC_PS_S 4
-#define HIB1P2_MEM_HIB_FSM_DEBUG_DIG_DCDC_PS_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_HIB_FSM_DEBUG_DIG_DCDC_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_SLDO_VNWA_SW_CTRL register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_SLDO_VNWA_SW_CTRL_MEM_SLDO_VNWA_SW_CTRL_M \
-                                0x000FFFFF
-
-#define HIB1P2_MEM_SLDO_VNWA_SW_CTRL_MEM_SLDO_VNWA_SW_CTRL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_SLDO_WEAK_PROCESS register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_SLDO_WEAK_PROCESS_MEM_SLDO_WEAK_PROCESS \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_PA_DCDC_OV_UV_STATUS register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_PA_DCDC_OV_UV_STATUS_dcdc_pa_ov_prot_out_lowv \
-                                0x00000002
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_CM_TEST_MODE register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_CM_TEST_MODE_mem_cm_test_mode \
-                                0x00000001
-
-
-
-
-#endif // __HW_HIB1P2_H__
diff --git a/ports/cc3200/hal/inc/hw_hib3p3.h b/ports/cc3200/hal/inc/hw_hib3p3.h
deleted file mode 100644
index 9701689165..0000000000
--- a/ports/cc3200/hal/inc/hw_hib3p3.h
+++ /dev/null
@@ -1,1138 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_HIB3P3_H__
-#define __HW_HIB3P3_H__
-
-//*****************************************************************************
-//
-// The following are defines for the HIB3P3 register offsets.
-//
-//*****************************************************************************
-#define HIB3P3_O_MEM_HIB_REQ    0x00000000
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_ENABLE \
-                                0x00000004
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_RESET \
-                                0x00000008
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_READ \
-                                0x0000000C
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_LSW \
-                                0x00000010
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_MSW \
-                                0x00000014
-
-#define HIB3P3_O_MEM_HIB_RTC_WAKE_EN \
-                                0x00000018
-
-#define HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF \
-                                0x0000001C
-
-#define HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF \
-                                0x00000020
-
-#define HIB3P3_O_MEM_INT_OSC_CONF \
-                                0x0000002C
-
-#define HIB3P3_O_MEM_XTAL_OSC_CONF \
-                                0x00000034
-
-#define HIB3P3_O_MEM_BGAP_PARAMETERS0 \
-                                0x00000038
-
-#define HIB3P3_O_MEM_BGAP_PARAMETERS1 \
-                                0x0000003C
-
-#define HIB3P3_O_MEM_HIB_DETECTION_STATUS \
-                                0x00000040
-
-#define HIB3P3_O_MEM_HIB_MISC_CONTROLS \
-                                0x00000044
-
-#define HIB3P3_O_MEM_HIB_CONFIG 0x00000050
-#define HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE \
-                                0x00000054
-
-#define HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF \
-                                0x00000058
-
-#define HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF \
-                                0x0000005C
-
-#define HIB3P3_O_MEM_HIB_UART_CONF \
-                                0x00000400
-
-#define HIB3P3_O_MEM_GPIO_WAKE_EN \
-                                0x00000404
-
-#define HIB3P3_O_MEM_GPIO_WAKE_CONF \
-                                0x00000408
-
-#define HIB3P3_O_MEM_PAD_OEN_RET33_CONF \
-                                0x0000040C
-
-#define HIB3P3_O_MEM_UART_RTS_OEN_RET33_CONF \
-                                0x00000410
-
-#define HIB3P3_O_MEM_JTAG_CONF  0x00000414
-#define HIB3P3_O_MEM_HIB_REG0   0x00000418
-#define HIB3P3_O_MEM_HIB_REG1   0x0000041C
-#define HIB3P3_O_MEM_HIB_REG2   0x00000420
-#define HIB3P3_O_MEM_HIB_REG3   0x00000424
-#define HIB3P3_O_MEM_HIB_SEQUENCER_CFG0 \
-                                0x0000045C
-
-#define HIB3P3_O_MEM_HIB_SEQUENCER_CFG1 \
-                                0x00000460
-
-#define HIB3P3_O_MEM_HIB_MISC_CONFIG \
-                                0x00000464
-
-#define HIB3P3_O_MEM_HIB_WAKE_STATUS \
-                                0x00000468
-
-#define HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL \
-                                0x0000046C
-
-#define HIB3P3_O_MEM_HIB_SEQUENCER_CFG2 \
-                                0x00000470
-
-#define HIB3P3_O_HIBANA_SPARE_LOWV \
-                                0x00000474
-
-#define HIB3P3_O_HIB_TMUX_CTRL  0x00000478
-#define HIB3P3_O_HIB_1P2_1P8_LDO_TRIM \
-                                0x0000047C
-
-#define HIB3P3_O_HIB_COMP_TRIM  0x00000480
-#define HIB3P3_O_HIB_EN_TS      0x00000484
-#define HIB3P3_O_HIB_1P8V_DET_EN \
-                                0x00000488
-
-#define HIB3P3_O_HIB_VBAT_MON_EN \
-                                0x0000048C
-
-#define HIB3P3_O_HIB_NHIB_ENABLE \
-                                0x00000490
-
-#define HIB3P3_O_HIB_UART_RTS_SW_ENABLE \
-                                0x00000494
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REQ register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REQ_reserved_M \
-                                0xFFFFFE00
-
-#define HIB3P3_MEM_HIB_REQ_reserved_S 9
-#define HIB3P3_MEM_HIB_REQ_NU1_M \
-                                0x000001FC
-
-#define HIB3P3_MEM_HIB_REQ_NU1_S 2
-#define HIB3P3_MEM_HIB_REQ_mem_hib_clk_disable \
-                                0x00000002  // 1 - Specifies that the Hiberante
-                                            // mode is without clocks ; 0 -
-                                            // Specified that the Hibernate mode
-                                            // is with clocks This register will
-                                            // be reset during Hibernate
-                                            // -WO-Clks mode (but not during
-                                            // Hibernate-W-Clks mode).
-
-#define HIB3P3_MEM_HIB_REQ_mem_hib_req \
-                                0x00000001  // 1 - Request for hibernate mode
-                                            // (This is an auto-clear bit) ; 0 -
-                                            // Donot request for hibernate mode
-                                            // This register will be reset
-                                            // during Hibernate -WO-Clks mode
-                                            // (but not during Hibernate-W-Clks
-                                            // mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_ENABLE_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_ENABLE_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_TIMER_ENABLE_mem_hib_rtc_timer_enable \
-                                0x00000001  // 1 - Enable the RTC timer to
-                                            // start running ; 0 - Keep the RTC
-                                            // timer disabled This register will
-                                            // be reset during Hibernate
-                                            // -WO-Clks mode (but not during
-                                            // Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_RESET register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_RESET_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_RESET_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_TIMER_RESET_mem_hib_rtc_timer_reset \
-                                0x00000001  // 1 - Reset the RTC timer ; 0 -
-                                            // Donot reset the RTC timer. This
-                                            // is an auto-clear bit. This
-                                            // register will be reset during
-                                            // Hibernate -WO-Clks mode (but not
-                                            // during Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_READ register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_READ_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_READ_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_TIMER_READ_mem_hib_rtc_timer_read \
-                                0x00000001  // 1 - Latch the running RTC timer
-                                            // into local registers. After
-                                            // programming this bit to 1, the
-                                            // F/w can read the latched RTC
-                                            // timer values from
-                                            // MEM_HIB_RTC_TIMER_LSW and
-                                            // MEM_HIB_RTC_TIMER_MSW. Before the
-                                            // F/w (APPS or NWP) wants to read
-                                            // the RTC-Timer, it has to program
-                                            // this bit to 1, then only read the
-                                            // MSW and LSW values. This is an
-                                            // auto-clear bit. This register
-                                            // will be reset during Hibernate
-                                            // -WO-Clks mode (but not during
-                                            // Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_LSW register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_LSW_hib_rtc_timer_lsw_M \
-                                0xFFFFFFFF  // Lower 32b value of the latched
-                                            // RTC-Timer.
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_LSW_hib_rtc_timer_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_MSW register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_reserved_S 16
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_hib_rtc_timer_msw_M \
-                                0x0000FFFF  // Upper 32b value of the latched
-                                            // RTC-Timer.
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_hib_rtc_timer_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_WAKE_EN register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_WAKE_EN_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_EN_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_WAKE_EN_mem_hib_rtc_wake_en \
-                                0x00000001  // 1 - Enable the RTC timer based
-                                            // wakeup during Hibernate mode ; 0
-                                            // - Disable the RTC timer based
-                                            // wakeup during Hibernate mode This
-                                            // register will be reset during
-                                            // Hibernate-WO-Clks mode (but not
-                                            // during Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_WAKE_LSW_CONF_mem_hib_rtc_wake_lsw_conf_M \
-                                0xFFFFFFFF  // Configuration for RTC-Timer
-                                            // Wakeup (Lower 32b word)
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_LSW_CONF_mem_hib_rtc_wake_lsw_conf_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_reserved_S 16
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_mem_hib_rtc_wake_msw_conf_M \
-                                0x0000FFFF  // Configuration for RTC-Timer
-                                            // Wakeup (Upper 16b word)
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_mem_hib_rtc_wake_msw_conf_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_INT_OSC_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_INT_OSC_CONF_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_INT_OSC_CONF_reserved_S 16
-#define HIB3P3_MEM_INT_OSC_CONF_cm_clk_good_32k_int \
-                                0x00008000  // 1 - Internal 32kHz Oscillator is
-                                            // valid ; 0 - Internal 32k
-                                            // oscillator clk is not valid
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_spare_M \
-                                0x00007E00
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_spare_S 9
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_en_intosc_32k_override_ctrl \
-                                0x00000100  // When 1, the INT_32K_OSC_EN comes
-                                            // from bit [0] of this register,
-                                            // else comes from the FSM. This
-                                            // register will be reset during
-                                            // Hibernate-WO-Clks mode (but not
-                                            // during Hibernate-W-Clks mode)
-
-#define HIB3P3_MEM_INT_OSC_CONF_NU1 \
-                                0x00000080
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_trim_M \
-                                0x0000007E
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_trim_S 1
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_en_intosc_32k \
-                                0x00000001  // Override value for INT_OSC_EN.
-                                            // Applicable only when bit [3] of
-                                            // this register is set to 1.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_XTAL_OSC_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_XTAL_OSC_CONF_reserved_M \
-                                0xFFF00000
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_reserved_S 20
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_sli_32k_override_ctrl \
-                                0x00080000  // When 1, the SLICER_EN comes from
-                                            // bit [10] of this register, else
-                                            // comes from the FSM.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_xtal_32k_override_ctrl \
-                                0x00040000  // When 1, the XTAL_EN comes from
-                                            // bit [0] of this register, else
-                                            // comes from the FSM.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_cm_clk_good_xtal \
-                                0x00020000  // 1 - XTAL Clk is good ; 0 - XTAL
-                                            // Clk is yet to be valid.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_xtal_trim_M \
-                                0x0001F800
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_xtal_trim_S 11
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_sli_32k \
-                                0x00000400  // SLICER_EN Override value :
-                                            // Applicable only when bit [19] of
-                                            // this register is set to 1.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_sli_32k_trim_M \
-                                0x00000380
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_sli_32k_trim_S 7
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_fref_32k_slicer_itrim_M \
-                                0x00000070
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_fref_32k_slicer_itrim_S 4
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_fref_32k_slicer \
-                                0x00000008
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_input_sense_M \
-                                0x00000006
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_input_sense_S 1
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_xtal_32k \
-                                0x00000001  // XTAL_EN Override value :
-                                            // Applicable only when bit [18] of
-                                            // this register is set to 1.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_BGAP_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_BGAP_PARAMETERS0_reserved_M \
-                                0xFFF80000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_reserved_S 19
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_en_seq \
-                                0x00040000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_vbok4bg_comp_trim_M \
-                                0x0001C000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_vbok4bg_comp_trim_S 14
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_en_vbat_ok_4bg \
-                                0x00001000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_en_vbok4bg_comp \
-                                0x00000800
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_en_vbok4bg_comp_ref \
-                                0x00000400
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_spare_M \
-                                0x000003FF
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_spare_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_BGAP_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_BGAP_PARAMETERS1_reserved_M \
-                                0xE0000000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_reserved_S 29
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_act_iref_itrim_M \
-                                0x1F000000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_act_iref_itrim_S 24
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en_act_iref \
-                                0x00000008
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en_v2i \
-                                0x00000004
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en_cap_sw \
-                                0x00000002
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_DETECTION_STATUS register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_reserved_M \
-                                0xFFFFFF80
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_reserved_S 7
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_forced_ana_status \
-                                0x00000040  // 1 - 1.8 V supply forced mode.
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_forced_flash_status \
-                                0x00000004  // 1 - 3.3 V supply forced mode for
-                                            // Flash supply
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_ext_clk_det_out_status \
-                                0x00000002  // 1 - Forced clock mode
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_xtal_det_out_status \
-                                0x00000001  // 1 - XTAL clock mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_MISC_CONTROLS register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_reserved_M \
-                                0xFFFFF800
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_reserved_S 11
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_en_pok_por_comp \
-                                0x00000400
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_en_pok_por_comp_ref \
-                                0x00000200
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_pok_por_comp_trim_M \
-                                0x000001C0
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_pok_por_comp_trim_S 6
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_NU1 \
-                                0x00000020
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_flash_det_en \
-                                0x00000010
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_en_tmux \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_CONFIG register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_CONFIG_TOP_MUX_CTRL_SOP_SPIO_M \
-                                0xFF000000
-
-#define HIB3P3_MEM_HIB_CONFIG_TOP_MUX_CTRL_SOP_SPIO_S 24
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED3 \
-                                0x00080000  // 1 - Enable VDD_FLASH_INDP_PAD
-                                            // for digital path (SHARED4) ; 0 -
-                                            // Disable VDD_FLASH_INDP_PAD for
-                                            // digital path (SHARED4) ; Before
-                                            // programming this bit to 1, ensure
-                                            // that the device is in FORCED 3.3
-                                            // supply Mode, which can be
-                                            // inferred from the register :
-                                            // MEM_HIB_DETECTION_STATUS : 0x0040
-
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED2 \
-                                0x00040000  // 1 - Enable the
-                                            // VDD_FB_GPIO_MUX_PAD for digital
-                                            // path (SHARED3) ; 0 - Disable the
-                                            // VDD_FB_GPIO_MUX_PAD for digital
-                                            // path (SHARED3) ; This pin can be
-                                            // used only in modes other than
-                                            // SOP("111")
-
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED1 \
-                                0x00020000  // 1 - Enable the PM_TEST_PAD for
-                                            // digital GPIO path (SHARED2) ; 0 -
-                                            // Disable the PM_TEST_PAD for
-                                            // digital GPIO path (SHARED2) This
-                                            // pin can be used for digital only
-                                            // in modes other then SOP-111
-
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED0 \
-                                0x00010000  // 1 - Enable the XTAL_N pin
-                                            // digital GPIO path (SHARED1); 0 -
-                                            // Disable the XTAL_N pin digital
-                                            // GPIO path (SHARED1). Before
-                                            // programming this bit to 1, ensure
-                                            // that the device is in FORCED CLK
-                                            // Mode, which can inferred from the
-                                            // register :
-                                            // MEM_HIB_DETECTION_STATUS :
-                                            // 0x0040.
-
-#define HIB3P3_MEM_HIB_CONFIG_mem_hib_xtal_enable \
-                                0x00000100  // 1 - Enable the XTAL Clock ; 0 -
-                                            // Donot enable the XTAL Clock. This
-                                            // bit has to be programmed to 1 (by
-                                            // APPS Devinit F/w), during exit
-                                            // from OFF or Hib_wo_clks modes,
-                                            // after checking if the slow_clk
-                                            // mode is XTAL_CLK mode. Once
-                                            // enabled the XTAL will be disabled
-                                            // only after entering HIB_WO_CLKS
-                                            // mode. This register will be reset
-                                            // during Hibernate -WO-Clks mode
-                                            // (but not during Hibernate-W-Clks
-                                            // mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_IRQ_ENABLE_HIB_RTC_IRQ_ENABLE \
-                                0x00000001  // 1 - Enable the HIB RTC - IRQ ; 0
-                                            // - Disable the HIB RTC - IRQ
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_IRQ_LSW_CONF_HIB_RTC_IRQ_LSW_CONF_M \
-                                0xFFFFFFFF  // Configuration for LSW of the
-                                            // RTC-Timestamp at which interrupt
-                                            // need to be generated
-
-#define HIB3P3_MEM_HIB_RTC_IRQ_LSW_CONF_HIB_RTC_IRQ_LSW_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_IRQ_MSW_CONF_HIB_RTC_IRQ_MSW_CONF_M \
-                                0x0000FFFF  // Configuration for MSW of thr
-                                            // RTC-Timestamp at which the
-                                            // interrupt need to be generated
-
-#define HIB3P3_MEM_HIB_RTC_IRQ_MSW_CONF_HIB_RTC_IRQ_MSW_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_UART_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_UART_CONF_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_UART_CONF_reserved_S 1
-#define HIB3P3_MEM_HIB_UART_CONF_mem_hib_uart_wake_en \
-                                0x00000001  // 1 - Enable the UART-Autonomous
-                                            // mode wakeup during Hibernate mode
-                                            // ; This is an auto-clear bit, once
-                                            // programmed to 1, it will latched
-                                            // into an internal register which
-                                            // remain asserted until the
-                                            // Hib-wakeup is initiated.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_GPIO_WAKE_EN register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_GPIO_WAKE_EN_reserved_M \
-                                0xFFFFFF00
-
-#define HIB3P3_MEM_GPIO_WAKE_EN_reserved_S 8
-#define HIB3P3_MEM_GPIO_WAKE_EN_mem_gpio_wake_en_M \
-                                0x000000FF  // 1 - Enable the GPIO-Autonomous
-                                            // mode wakeup during Hibernate mode
-                                            // ; This is an auto-clear bit, once
-                                            // programmed to 1, it will latched
-                                            // into an internal register which
-                                            // remain asserted until the
-                                            // Hib-wakeup is initiated.
-
-#define HIB3P3_MEM_GPIO_WAKE_EN_mem_gpio_wake_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_GPIO_WAKE_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_GPIO_WAKE_CONF_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_GPIO_WAKE_CONF_reserved_S 16
-#define HIB3P3_MEM_GPIO_WAKE_CONF_mem_gpio_wake_conf_M \
-                                0x0000FFFF  // Configuration to say whether the
-                                            // GPIO wakeup has to happen on
-                                            // Level0 or falling-edge for the
-                                            // given group. “00” – Level0 “01” –
-                                            // Level1 “10”- Fall-edge “11”-
-                                            // Rise-edge [1:0] – Conf for GPIO0
-                                            // [3:2] – Conf for GPIO1 [5:4] –
-                                            // Conf for GPIO2 [7:6] – Conf for
-                                            // GPIO3 [9:8] – Conf for GPIO4
-                                            // [11:10] – Conf for GPIO5 [13:12]
-                                            // – Conf for GPIO6
-
-#define HIB3P3_MEM_GPIO_WAKE_CONF_mem_gpio_wake_conf_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_PAD_OEN_RET33_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_PAD_OEN_RET33_CONF_mem_pad_oen_ret33_override_ctrl \
-                                0x00000004  // 1 - Override the OEN33 and RET33
-                                            // controls of GPIOs during
-                                            // SOP-Bootdebug mode ; 0 - Donot
-                                            // override the OEN33 and RET33
-                                            // controls of GPIOs during
-                                            // SOP-Bootdebug mode
-
-#define HIB3P3_MEM_PAD_OEN_RET33_CONF_PAD_OEN33_CONF \
-                                0x00000002
-
-#define HIB3P3_MEM_PAD_OEN_RET33_CONF_PAD_RET33_CONF \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_UART_RTS_OEN_RET33_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_UART_RTS_OEN_RET33_CONF_mem_uart_nrts_oen_ret33_override_ctrl \
-                                0x00000004  // 1 - Override the OEN33 and RET33
-                                            // controls of UART NRTS GPIO during
-                                            // SOP-Bootdebug mode ; 0 - Donot
-                                            // override the OEN33 and RET33
-                                            // controls of UART NRTS GPIO during
-                                            // SOP-Bootdebug mode
-
-#define HIB3P3_MEM_UART_RTS_OEN_RET33_CONF_PAD_UART_RTS_OEN33_CONF \
-                                0x00000002
-
-#define HIB3P3_MEM_UART_RTS_OEN_RET33_CONF_PAD_UART_RTS_RET33_CONF \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_JTAG_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_JTAG_CONF_mem_jtag1_oen_ret33_override_ctrl \
-                                0x00000200
-
-#define HIB3P3_MEM_JTAG_CONF_mem_jtag0_oen_ret33_override_ctrl \
-                                0x00000100
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG1_RTS_OEN33_CONF \
-                                0x00000008
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG1_RTS_RET33_CONF \
-                                0x00000004
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG0_RTS_OEN33_CONF \
-                                0x00000002
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG0_RTS_RET33_CONF \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG0 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG0_mem_hib_reg0_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG0_mem_hib_reg0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG1 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG1_mem_hib_reg1_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG1_mem_hib_reg1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG2 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG2_mem_hib_reg2_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG2_mem_hib_reg2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG3 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG3_mem_hib_reg3_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG3_mem_hib_reg3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_SEQUENCER_CFG0 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev0_to_ev1_time_M \
-                                0xFFFF0000  // Configuration for the number of
-                                            // slow-clks between de-assertion of
-                                            // EN_BG_3P3V to assertion of
-                                            // EN_BG_3P3V
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev0_to_ev1_time_S 16
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_NU1 \
-                                0x00008000
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev3_to_ev4_time_M \
-                                0x00006000  // Configuration for the number of
-                                            // slow-clks between assertion of
-                                            // EN_COMP_3P3V and assertion of
-                                            // EN_COMP_LATCH_3P3V
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev3_to_ev4_time_S 13
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev2_to_ev3_time_M \
-                                0x00001800  // Configuration for the number of
-                                            // slow-clks between assertion of
-                                            // (EN_CAP_SW_3P3V,EN_COMP_REF) and
-                                            // assertion of (EN_COMP_3P3V)
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev2_to_ev3_time_S 11
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev1_to_ev2_time_M \
-                                0x00000600  // Configuration for the number of
-                                            // slow-clks between assertion of
-                                            // (EN_BG_3P3V) and assertion of
-                                            // (EN_CAP_SW_3P3V,
-                                            // EN_COMP_REF_3P3V)
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev1_to_ev2_time_S 9
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_crude_ref_comp \
-                                0x00000100
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_vbok4bg_ref_override_ctrl \
-                                0x00000080  // 1 - EN_VBOK4BG_REF comes from
-                                            // bit[10] of the register
-                                            // MEM_BGAP_PARAMETERS0 [0x0038]. 0
-                                            // - EN_VBOK4BG_REF comes directly
-                                            // from the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_vbok4bg_comp_override_ctrl \
-                                0x00000040  // 1 - EN_VBOK4BG comes from
-                                            // bit[11] of the register
-                                            // MEM_BGAP_PARAMETERS0 [0x0038]. 0
-                                            // - EN_VBOK4BG comes directly from
-                                            // the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_v2i_override_ctrl \
-                                0x00000020  // 1 - EN_V2I comes from bit[2] of
-                                            // the register MEM_BGAP_PARAMETERS1
-                                            // [0x003C]. 0 - EN_V2I comes
-                                            // directly from the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_por_comp_ref_override_ctrl \
-                                0x00000010  // 1 - EN_POR_COMP_REF comes from
-                                            // bit[9] of the register
-                                            // MEM_HIB_MISC_CONTROLS [0x0044]. 0
-                                            // - EN_POR_COMP_REF comes directly
-                                            // from the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_por_comp_override_ctrl \
-                                0x00000008  // 1 - EN_POR_COMP comes from
-                                            // bit[10] of the register
-                                            // MEM_HIB_MISC_CONTROLS [0x044]. 0
-                                            // - EN_POR_COMP comes directly from
-                                            // the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_cap_sw_override_ctrl \
-                                0x00000004  // 1 - EN_CAP_SW comes from bit[1]
-                                            // of the register
-                                            // MEM_BGAP_PARAMETERS1 [0x003C]. 0
-                                            // - EN_CAP_SW comes directly from
-                                            // Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bg_override_ctrl \
-                                0x00000002  // 1 - EN_BGAP comes from bit[0] of
-                                            // the register MEM_BGAP_PARAMETERS1
-                                            // [0x003C]. 0 - EN_BGAP comes
-                                            // directly from Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_act_iref_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_SEQUENCER_CFG1 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_reserved_S 16
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_ev5_to_ev6_time_M \
-                                0x0000C000  // Configuration for number of
-                                            // slow-clks between de-assertion of
-                                            // EN_COMP_LATCH and assertion of
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_ev5_to_ev6_time_S 14
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev1_to_ev2_time_M \
-                                0x00003000  // Configuration for number of
-                                            // slow-clks between assertion of
-                                            // EN_COMP_REF to assertion of
-                                            // EN_COMP during HIB-Exit
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev1_to_ev2_time_S 12
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_ev1_time_M \
-                                0x00000C00  // TBD
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_ev1_time_S 10
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_active_M \
-                                0x00000300  // Configuration in number of
-                                            // slow-clks between assertion of
-                                            // (EN_BGAP_3P3V, EN_CAP_SW_3P3V,
-                                            // EN_ACT_IREF_3P3V, EN_COMP_REF) to
-                                            // assertion of EN_COMP_3P3V
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_active_S 8
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_active_to_bdc_ev1_to_bdc_ev0_time_M \
-                                0x000000C0  // Configuration in number of
-                                            // slow-clks between de-assertion of
-                                            // (EN_COMP_3P3V, EN_COMP_REF_3P3V,
-                                            // EN_ACT_IREF_3P3V, EN_CAP_SW_3P3V)
-                                            // to deassertion of EN_BGAP_3P3V.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_active_to_bdc_ev1_to_bdc_ev0_time_S 6
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_NU1_M \
-                                0x0000003F
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_NU1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_MISC_CONFIG register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_MISC_CONFIG_mem_en_pll_untrim_current \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_WAKE_STATUS register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_WAKE_STATUS_hib_wake_src_M \
-                                0x0000001E  // "0100" - GPIO ; "0010" - RTC ;
-                                            // "0001" - UART Others - Reserved
-
-#define HIB3P3_MEM_HIB_WAKE_STATUS_hib_wake_src_S 1
-#define HIB3P3_MEM_HIB_WAKE_STATUS_hib_wake_status \
-                                0x00000001  // 1 - Wake from Hibernate ; 0 -
-                                            // Wake from OFF
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_LPDS_GPIO_SEL_HIB_LPDS_GPIO_SEL_M \
-                                0x00000007
-
-#define HIB3P3_MEM_HIB_LPDS_GPIO_SEL_HIB_LPDS_GPIO_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_SEQUENCER_CFG2 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_reserved_M \
-                                0xFFFFF800
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_reserved_S 11
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_active_to_bdc_ev0_to_active_to_bdc_ev1_time_M \
-                                0x00000600  // Deassertion of EN_COMP_LATCH_3P3
-                                            // to deassertion of (EN_COMP_3P3,
-                                            // EN_COMP_REF_3P3, EN_ACT_IREF_3P3,
-                                            // EN_CAP_SW_3P3)
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_active_to_bdc_ev0_to_active_to_bdc_ev1_time_S 9
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev4_to_ev5_time_M \
-                                0x000001C0  // Assertion of EN_COMP_LATCH_3P3
-                                            // to deassertion of
-                                            // EN_COMP_LATCH_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev4_to_ev5_time_S 6
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev6_to_ev7_time_M \
-                                0x00000030  // Deassertion of (EN_CAP_SW_3P3,
-                                            // EN_COMP_REF_3P3, EN_COMP_3P3,
-                                            // EN_COMP_OUT_LATCH_3P3) to
-                                            // deassertion of EN_BGAP_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev6_to_ev7_time_S 4
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_to_active_ev1_to_ev2_time_M \
-                                0x0000000C  // Assertion of EN_COMP_3P3 to
-                                            // assertion of EN_COMPOUT_LATCH_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_to_active_ev1_to_ev2_time_S 2
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_hib_to_active_ev2_to_ev3_time_M \
-                                0x00000003  // Assertion of EN_COMP_3P3 to
-                                            // assertion of EN_COMPOUT_LATCH_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_hib_to_active_ev2_to_ev3_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIBANA_SPARE_LOWV register.
-//
-//******************************************************************************
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare1_M \
-                                0xFFC00000
-
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare1_S 22
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare0_M \
-                                0x0001FFFF
-
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_TMUX_CTRL register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_TMUX_CTRL_reserved_M \
-                                0xFFFFFC00
-
-#define HIB3P3_HIB_TMUX_CTRL_reserved_S 10
-#define HIB3P3_HIB_TMUX_CTRL_mem_hd_tmux_cntrl_M \
-                                0x000003FF
-
-#define HIB3P3_HIB_TMUX_CTRL_mem_hd_tmux_cntrl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_1P2_1P8_LDO_TRIM register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_reserved_M \
-                                0xFFFFF000
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_reserved_S 12
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_en_override_ctrl \
-                                0x00000800
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_en_override_ctrl \
-                                0x00000400
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_en_override \
-                                0x00000200
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_en_override \
-                                0x00000100
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_vtrim_M \
-                                0x000000F0
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_vtrim_S 4
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_vtrim_M \
-                                0x0000000F
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_vtrim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_COMP_TRIM register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_COMP_TRIM_reserved_M \
-                                0xFFFFFFF8
-
-#define HIB3P3_HIB_COMP_TRIM_reserved_S 3
-#define HIB3P3_HIB_COMP_TRIM_mem_hd_comp_trim_M \
-                                0x00000007
-
-#define HIB3P3_HIB_COMP_TRIM_mem_hd_comp_trim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_EN_TS register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_EN_TS_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_HIB_EN_TS_reserved_S 1
-#define HIB3P3_HIB_EN_TS_mem_hd_en_ts \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_1P8V_DET_EN register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_1P8V_DET_EN_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_HIB_1P8V_DET_EN_reserved_S 1
-#define HIB3P3_HIB_1P8V_DET_EN_mem_hib_1p8v_det_en \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_VBAT_MON_EN register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_VBAT_MON_EN_reserved_M \
-                                0xFFFFFFFC
-
-#define HIB3P3_HIB_VBAT_MON_EN_reserved_S 2
-#define HIB3P3_HIB_VBAT_MON_EN_mem_hib_vbat_mon_del_en \
-                                0x00000002
-
-#define HIB3P3_HIB_VBAT_MON_EN_mem_hib_vbat_mon_en \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_NHIB_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_NHIB_ENABLE_mem_hib_nhib_enable \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_UART_RTS_SW_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_UART_RTS_SW_ENABLE_mem_hib_uart_rts_sw_enable \
-                                0x00000001
-
-
-
-
-#endif // __HW_HIB3P3_H__
diff --git a/ports/cc3200/hal/inc/hw_i2c.h b/ports/cc3200/hal/inc/hw_i2c.h
deleted file mode 100644
index 17536d3e9c..0000000000
--- a/ports/cc3200/hal/inc/hw_i2c.h
+++ /dev/null
@@ -1,503 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_I2C_H__
-#define __HW_I2C_H__
-
-//*****************************************************************************
-//
-// The following are defines for the I2C register offsets.
-//
-//*****************************************************************************
-#define I2C_O_MSA               0x00000000
-#define I2C_O_MCS               0x00000004
-#define I2C_O_MDR               0x00000008
-#define I2C_O_MTPR              0x0000000C
-#define I2C_O_MIMR              0x00000010
-#define I2C_O_MRIS              0x00000014
-#define I2C_O_MMIS              0x00000018
-#define I2C_O_MICR              0x0000001C
-#define I2C_O_MCR               0x00000020
-#define I2C_O_MCLKOCNT          0x00000024
-#define I2C_O_MBMON             0x0000002C
-#define I2C_O_MBLEN             0x00000030
-#define I2C_O_MBCNT             0x00000034
-#define I2C_O_SOAR              0x00000800
-#define I2C_O_SCSR              0x00000804
-#define I2C_O_SDR               0x00000808
-#define I2C_O_SIMR              0x0000080C
-#define I2C_O_SRIS              0x00000810
-#define I2C_O_SMIS              0x00000814
-#define I2C_O_SICR              0x00000818
-#define I2C_O_SOAR2             0x0000081C
-#define I2C_O_SACKCTL           0x00000820
-#define I2C_O_FIFODATA          0x00000F00
-#define I2C_O_FIFOCTL           0x00000F04
-#define I2C_O_FIFOSTATUS        0x00000F08
-#define I2C_O_OBSMUXSEL0        0x00000F80
-#define I2C_O_OBSMUXSEL1        0x00000F84
-#define I2C_O_MUXROUTE          0x00000F88
-#define I2C_O_PV                0x00000FB0
-#define I2C_O_PP                0x00000FC0
-#define I2C_O_PC                0x00000FC4
-#define I2C_O_CC                0x00000FC8
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MSA register.
-//
-//******************************************************************************
-#define I2C_MSA_SA_M          0x000000FE  // I2C Slave Address
-#define I2C_MSA_SA_S          1
-#define I2C_MSA_RS              0x00000001  // Receive not send
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MCS register.
-//
-//******************************************************************************
-#define I2C_MCS_ACTDMARX        0x80000000  // DMA RX Active Status
-#define I2C_MCS_ACTDMATX        0x40000000  // DMA TX Active Status
-#define I2C_MCS_CLKTO           0x00000080  // Clock Timeout Error
-#define I2C_MCS_BUSBSY          0x00000040  // Bus Busy
-#define I2C_MCS_IDLE            0x00000020  // I2C Idle
-#define I2C_MCS_ARBLST          0x00000010  // Arbitration Lost
-#define I2C_MCS_ACK             0x00000008  // Data Acknowledge Enable
-#define I2C_MCS_ADRACK          0x00000004  // Acknowledge Address
-#define I2C_MCS_ERROR           0x00000002  // Error
-#define I2C_MCS_BUSY            0x00000001  // I2C Busy
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MDR register.
-//
-//******************************************************************************
-#define I2C_MDR_DATA_M        0x000000FF  // Data Transferred
-#define I2C_MDR_DATA_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MTPR register.
-//
-//******************************************************************************
-#define I2C_MTPR_HS             0x00000080  // High-Speed Enable
-#define I2C_MTPR_TPR_M        0x0000007F  // SCL Clock Period
-#define I2C_MTPR_TPR_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MIMR register.
-//
-//******************************************************************************
-#define I2C_MIMR_RXFFIM         0x00000800  // Receive FIFO Full Interrupt Mask
-#define I2C_MIMR_TXFEIM         0x00000400  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_MIMR_RXIM           0x00000200  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_MIMR_TXIM           0x00000100  // Transmit FIFO Request Interrupt
-                                            // Mask
-#define I2C_MIMR_ARBLOSTIM      0x00000080  // Arbitration Lost Interrupt Mask
-#define I2C_MIMR_STOPIM         0x00000040  // STOP Detection Interrupt Mask
-#define I2C_MIMR_STARTIM        0x00000020  // START Detection Interrupt Mask
-#define I2C_MIMR_NACKIM         0x00000010  // Address/Data NACK Interrupt Mask
-#define I2C_MIMR_DMATXIM        0x00000008  // Transmit DMA Interrupt Mask
-#define I2C_MIMR_DMARXIM        0x00000004  // Receive DMA Interrupt Mask
-#define I2C_MIMR_CLKIM          0x00000002  // Clock Timeout Interrupt Mask
-#define I2C_MIMR_IM             0x00000001  // Master Interrupt Mask
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MRIS register.
-//
-//******************************************************************************
-#define I2C_MRIS_RXFFRIS        0x00000800  // Receive FIFO Full Raw Interrupt
-                                            // Status
-#define I2C_MRIS_TXFERIS        0x00000400  // Transmit FIFO Empty Raw
-                                            // Interrupt Status
-#define I2C_MRIS_RXRIS          0x00000200  // Receive FIFO Request Raw
-                                            // Interrupt Status
-#define I2C_MRIS_TXRIS          0x00000100  // Transmit Request Raw Interrupt
-                                            // Status
-#define I2C_MRIS_ARBLOSTRIS     0x00000080  // Arbitration Lost Raw Interrupt
-                                            // Status
-#define I2C_MRIS_STOPRIS        0x00000040  // STOP Detection Raw Interrupt
-                                            // Status
-#define I2C_MRIS_STARTRIS       0x00000020  // START Detection Raw Interrupt
-                                            // Status
-#define I2C_MRIS_NACKRIS        0x00000010  // Address/Data NACK Raw Interrupt
-                                            // Status
-#define I2C_MRIS_DMATXRIS       0x00000008  // Transmit DMA Raw Interrupt
-                                            // Status
-#define I2C_MRIS_DMARXRIS       0x00000004  // Receive DMA Raw Interrupt Status
-#define I2C_MRIS_CLKRIS         0x00000002  // Clock Timeout Raw Interrupt
-                                            // Status
-#define I2C_MRIS_RIS            0x00000001  // Master Raw Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MMIS register.
-//
-//******************************************************************************
-#define I2C_MMIS_RXFFMIS        0x00000800  // Receive FIFO Full Interrupt Mask
-#define I2C_MMIS_TXFEMIS        0x00000400  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_MMIS_RXMIS          0x00000200  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_MMIS_TXMIS          0x00000100  // Transmit Request Interrupt Mask
-#define I2C_MMIS_ARBLOSTMIS     0x00000080  // Arbitration Lost Interrupt Mask
-#define I2C_MMIS_STOPMIS        0x00000040  // STOP Detection Interrupt Mask
-#define I2C_MMIS_STARTMIS       0x00000020  // START Detection Interrupt Mask
-#define I2C_MMIS_NACKMIS        0x00000010  // Address/Data NACK Interrupt Mask
-#define I2C_MMIS_DMATXMIS       0x00000008  // Transmit DMA Interrupt Status
-#define I2C_MMIS_DMARXMIS       0x00000004  // Receive DMA Interrupt Status
-#define I2C_MMIS_CLKMIS         0x00000002  // Clock Timeout Masked Interrupt
-                                            // Status
-#define I2C_MMIS_MIS            0x00000001  // Masked Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MICR register.
-//
-//******************************************************************************
-#define I2C_MICR_RXFFIC         0x00000800  // Receive FIFO Full Interrupt
-                                            // Clear
-#define I2C_MICR_TXFEIC         0x00000400  // Transmit FIFO Empty Interrupt
-                                            // Clear
-#define I2C_MICR_RXIC           0x00000200  // Receive FIFO Request Interrupt
-                                            // Clear
-#define I2C_MICR_TXIC           0x00000100  // Transmit FIFO Request Interrupt
-                                            // Clear
-#define I2C_MICR_ARBLOSTIC      0x00000080  // Arbitration Lost Interrupt Clear
-#define I2C_MICR_STOPIC         0x00000040  // STOP Detection Interrupt Clear
-#define I2C_MICR_STARTIC        0x00000020  // START Detection Interrupt Clear
-#define I2C_MICR_NACKIC         0x00000010  // Address/Data NACK Interrupt
-                                            // Clear
-#define I2C_MICR_DMATXIC        0x00000008  // Transmit DMA Interrupt Clear
-#define I2C_MICR_DMARXIC        0x00000004  // Receive DMA Interrupt Clear
-#define I2C_MICR_CLKIC          0x00000002  // Clock Timeout Interrupt Clear
-#define I2C_MICR_IC             0x00000001  // Master Interrupt Clear
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MCR register.
-//
-//******************************************************************************
-#define I2C_MCR_MMD             0x00000040  // Multi-master Disable
-#define I2C_MCR_SFE             0x00000020  // I2C Slave Function Enable
-#define I2C_MCR_MFE             0x00000010  // I2C Master Function Enable
-#define I2C_MCR_LPBK            0x00000001  // I2C Loopback
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MCLKOCNT register.
-//
-//******************************************************************************
-#define I2C_MCLKOCNT_CNTL_M   0x000000FF  // I2C Master Count
-#define I2C_MCLKOCNT_CNTL_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MBMON register.
-//
-//******************************************************************************
-#define I2C_MBMON_SDA           0x00000002  // I2C SDA Status
-#define I2C_MBMON_SCL           0x00000001  // I2C SCL Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MBLEN register.
-//
-//******************************************************************************
-#define I2C_MBLEN_CNTL_M      0x000000FF  // I2C Burst Length
-#define I2C_MBLEN_CNTL_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MBCNT register.
-//
-//******************************************************************************
-#define I2C_MBCNT_CNTL_M      0x000000FF  // I2C Master Burst Count
-#define I2C_MBCNT_CNTL_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SOAR register.
-//
-//******************************************************************************
-#define I2C_SOAR_OAR_M        0x0000007F  // I2C Slave Own Address
-#define I2C_SOAR_OAR_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SCSR register.
-//
-//******************************************************************************
-#define I2C_SCSR_ACTDMARX       0x80000000  // DMA RX Active Status
-#define I2C_SCSR_ACTDMATX       0x40000000  // DMA TX Active Status
-#define I2C_SCSR_QCMDRW         0x00000020  // Quick Command Read / Write
-#define I2C_SCSR_QCMDST         0x00000010  // Quick Command Status
-#define I2C_SCSR_OAR2SEL        0x00000008  // OAR2 Address Matched
-#define I2C_SCSR_FBR            0x00000004  // First Byte Received
-#define I2C_SCSR_TREQ           0x00000002  // Transmit Request
-#define I2C_SCSR_DA             0x00000001  // Device Active
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SDR register.
-//
-//******************************************************************************
-#define I2C_SDR_DATA_M        0x000000FF  // Data for Transfer
-#define I2C_SDR_DATA_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SIMR register.
-//
-//******************************************************************************
-#define I2C_SIMR_IM             0x00000100  // Interrupt Mask
-#define I2C_SIMR_TXFEIM         0x00000080  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_SIMR_RXIM           0x00000040  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_SIMR_TXIM           0x00000020  // Transmit FIFO Request Interrupt
-                                            // Mask
-#define I2C_SIMR_DMATXIM        0x00000010  // Transmit DMA Interrupt Mask
-#define I2C_SIMR_DMARXIM        0x00000008  // Receive DMA Interrupt Mask
-#define I2C_SIMR_STOPIM         0x00000004  // Stop Condition Interrupt Mask
-#define I2C_SIMR_STARTIM        0x00000002  // Start Condition Interrupt Mask
-#define I2C_SIMR_DATAIM         0x00000001  // Data Interrupt Mask
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SRIS register.
-//
-//******************************************************************************
-#define I2C_SRIS_RIS            0x00000100  // Raw Interrupt Status
-#define I2C_SRIS_TXFERIS        0x00000080  // Transmit FIFO Empty Raw
-                                            // Interrupt Status
-#define I2C_SRIS_RXRIS          0x00000040  // Receive FIFO Request Raw
-                                            // Interrupt Status
-#define I2C_SRIS_TXRIS          0x00000020  // Transmit Request Raw Interrupt
-                                            // Status
-#define I2C_SRIS_DMATXRIS       0x00000010  // Transmit DMA Raw Interrupt
-                                            // Status
-#define I2C_SRIS_DMARXRIS       0x00000008  // Receive DMA Raw Interrupt Status
-#define I2C_SRIS_STOPRIS        0x00000004  // Stop Condition Raw Interrupt
-                                            // Status
-#define I2C_SRIS_STARTRIS       0x00000002  // Start Condition Raw Interrupt
-                                            // Status
-#define I2C_SRIS_DATARIS        0x00000001  // Data Raw Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SMIS register.
-//
-//******************************************************************************
-#define I2C_SMIS_RXFFMIS        0x00000100  // Receive FIFO Full Interrupt Mask
-#define I2C_SMIS_TXFEMIS        0x00000080  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_SMIS_RXMIS          0x00000040  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_SMIS_TXMIS          0x00000020  // Transmit FIFO Request Interrupt
-                                            // Mask
-#define I2C_SMIS_DMATXMIS       0x00000010  // Transmit DMA Masked Interrupt
-                                            // Status
-#define I2C_SMIS_DMARXMIS       0x00000008  // Receive DMA Masked Interrupt
-                                            // Status
-#define I2C_SMIS_STOPMIS        0x00000004  // Stop Condition Masked Interrupt
-                                            // Status
-#define I2C_SMIS_STARTMIS       0x00000002  // Start Condition Masked Interrupt
-                                            // Status
-#define I2C_SMIS_DATAMIS        0x00000001  // Data Masked Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SICR register.
-//
-//******************************************************************************
-#define I2C_SICR_RXFFIC         0x00000100  // Receive FIFO Full Interrupt Mask
-#define I2C_SICR_TXFEIC         0x00000080  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_SICR_RXIC           0x00000040  // Receive Request Interrupt Mask
-#define I2C_SICR_TXIC           0x00000020  // Transmit Request Interrupt Mask
-#define I2C_SICR_DMATXIC        0x00000010  // Transmit DMA Interrupt Clear
-#define I2C_SICR_DMARXIC        0x00000008  // Receive DMA Interrupt Clear
-#define I2C_SICR_STOPIC         0x00000004  // Stop Condition Interrupt Clear
-#define I2C_SICR_STARTIC        0x00000002  // Start Condition Interrupt Clear
-#define I2C_SICR_DATAIC         0x00000001  // Data Interrupt Clear
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SOAR2 register.
-//
-//******************************************************************************
-#define I2C_SOAR2_OAR2EN        0x00000080  // I2C Slave Own Address 2 Enable
-#define I2C_SOAR2_OAR2_M      0x0000007F  // I2C Slave Own Address 2
-#define I2C_SOAR2_OAR2_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SACKCTL register.
-//
-//******************************************************************************
-#define I2C_SACKCTL_ACKOVAL     0x00000002  // I2C Slave ACK Override Value
-#define I2C_SACKCTL_ACKOEN      0x00000001  // I2C Slave ACK Override Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_FIFODATA register.
-//
-//******************************************************************************
-#define I2C_FIFODATA_DATA_M   0x000000FF  // I2C FIFO Data Byte
-#define I2C_FIFODATA_DATA_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_FIFOCTL register.
-//
-//******************************************************************************
-#define I2C_FIFOCTL_RXASGNMT    0x80000000  // RX Control Assignment
-#define I2C_FIFOCTL_RXFLUSH     0x40000000  // RX FIFO Flush
-#define I2C_FIFOCTL_DMARXENA    0x20000000  // DMA RX Channel Enable
-#define I2C_FIFOCTL_RXTRIG_M  0x00070000  // RX FIFO Trigger
-#define I2C_FIFOCTL_RXTRIG_S  16
-#define I2C_FIFOCTL_TXASGNMT    0x00008000  // TX Control Assignment
-#define I2C_FIFOCTL_TXFLUSH     0x00004000  // TX FIFO Flush
-#define I2C_FIFOCTL_DMATXENA    0x00002000  // DMA TX Channel Enable
-#define I2C_FIFOCTL_TXTRIG_M  0x00000007  // TX FIFO Trigger
-#define I2C_FIFOCTL_TXTRIG_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_FIFOSTATUS register.
-//
-//******************************************************************************
-#define I2C_FIFOSTATUS_RXABVTRIG \
-                                0x00040000  // RX FIFO Above Trigger Level
-
-#define I2C_FIFOSTATUS_RXFF     0x00020000  // RX FIFO Full
-#define I2C_FIFOSTATUS_RXFE     0x00010000  // RX FIFO Empty
-#define I2C_FIFOSTATUS_TXBLWTRIG \
-                                0x00000004  // TX FIFO Below Trigger Level
-
-#define I2C_FIFOSTATUS_TXFF     0x00000002  // TX FIFO Full
-#define I2C_FIFOSTATUS_TXFE     0x00000001  // TX FIFO Empty
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_OBSMUXSEL0 register.
-//
-//******************************************************************************
-#define I2C_OBSMUXSEL0_LN3_M  0x07000000  // Observation Mux Lane 3
-#define I2C_OBSMUXSEL0_LN3_S  24
-#define I2C_OBSMUXSEL0_LN2_M  0x00070000  // Observation Mux Lane 2
-#define I2C_OBSMUXSEL0_LN2_S  16
-#define I2C_OBSMUXSEL0_LN1_M  0x00000700  // Observation Mux Lane 1
-#define I2C_OBSMUXSEL0_LN1_S  8
-#define I2C_OBSMUXSEL0_LN0_M  0x00000007  // Observation Mux Lane 0
-#define I2C_OBSMUXSEL0_LN0_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_OBSMUXSEL1 register.
-//
-//******************************************************************************
-#define I2C_OBSMUXSEL1_LN7_M  0x07000000  // Observation Mux Lane 7
-#define I2C_OBSMUXSEL1_LN7_S  24
-#define I2C_OBSMUXSEL1_LN6_M  0x00070000  // Observation Mux Lane 6
-#define I2C_OBSMUXSEL1_LN6_S  16
-#define I2C_OBSMUXSEL1_LN5_M  0x00000700  // Observation Mux Lane 5
-#define I2C_OBSMUXSEL1_LN5_S  8
-#define I2C_OBSMUXSEL1_LN4_M  0x00000007  // Observation Mux Lane 4
-#define I2C_OBSMUXSEL1_LN4_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MUXROUTE register.
-//
-//******************************************************************************
-#define I2C_MUXROUTE_LN7ROUTE_M \
-                                0x70000000  // Lane 7 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN7ROUTE_S 28
-#define I2C_MUXROUTE_LN6ROUTE_M \
-                                0x07000000  // Lane 6 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN6ROUTE_S 24
-#define I2C_MUXROUTE_LN5ROUTE_M \
-                                0x00700000  // Lane 5 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN5ROUTE_S 20
-#define I2C_MUXROUTE_LN4ROUTE_M \
-                                0x00070000  // Lane 4 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN4ROUTE_S 16
-#define I2C_MUXROUTE_LN3ROUTE_M \
-                                0x00007000  // Lane 3 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN3ROUTE_S 12
-#define I2C_MUXROUTE_LN2ROUTE_M \
-                                0x00000700  // Lane 2 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN2ROUTE_S 8
-#define I2C_MUXROUTE_LN1ROUTE_M \
-                                0x00000070  // Lane 1 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN1ROUTE_S 4
-#define I2C_MUXROUTE_LN0ROUTE_M \
-                                0x00000007  // Lane 0 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN0ROUTE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_PV register.
-//
-//******************************************************************************
-#define I2C_PV_MAJOR_M        0x0000FF00  // Major Revision
-#define I2C_PV_MAJOR_S        8
-#define I2C_PV_MINOR_M        0x000000FF  // Minor Revision
-#define I2C_PV_MINOR_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_PP register.
-//
-//******************************************************************************
-#define I2C_PP_HS               0x00000001  // High-Speed Capable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_PC register.
-//
-//******************************************************************************
-#define I2C_PC_HS               0x00000001  // High-Speed Capable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_CC register.
-//
-//******************************************************************************
-
-
-
-#endif // __HW_I2C_H__
diff --git a/ports/cc3200/hal/inc/hw_ints.h b/ports/cc3200/hal/inc/hw_ints.h
deleted file mode 100644
index 6b40193559..0000000000
--- a/ports/cc3200/hal/inc/hw_ints.h
+++ /dev/null
@@ -1,117 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// hw_ints.h - Macros that define the interrupt assignment on CC3200.
-//
-//*****************************************************************************
-
-#ifndef __HW_INTS_H__
-#define __HW_INTS_H__
-
-//*****************************************************************************
-//
-// The following are defines for the fault assignments.
-//
-//*****************************************************************************
-#define FAULT_NMI               2           // NMI fault
-#define FAULT_HARD              3           // Hard fault
-#define FAULT_MPU               4           // MPU fault
-#define FAULT_BUS               5           // Bus fault
-#define FAULT_USAGE             6           // Usage fault
-#define FAULT_SVCALL            11          // SVCall
-#define FAULT_DEBUG             12          // Debug monitor
-#define FAULT_PENDSV            14          // PendSV
-#define FAULT_SYSTICK           15          // System Tick
-
-//*****************************************************************************
-//
-// The following are defines for the interrupt assignments.
-//
-//*****************************************************************************
-#define INT_GPIOA0              16          // GPIO Port S0
-#define INT_GPIOA1              17          // GPIO Port S1
-#define INT_GPIOA2              18          // GPIO Port S2
-#define INT_GPIOA3              19          // GPIO Port S3
-#define INT_UARTA0              21          // UART0 Rx and Tx
-#define INT_UARTA1              22          // UART1 Rx and Tx
-#define INT_I2CA0               24          // I2C controller
-#define INT_ADCCH0              30          // ADC Sequence 0
-#define INT_ADCCH1              31          // ADC Sequence 1
-#define INT_ADCCH2              32          // ADC Sequence 2
-#define INT_ADCCH3              33          // ADC Sequence 3
-#define INT_WDT                 34          // Watchdog Timer0
-#define INT_TIMERA0A            35          // Timer 0 subtimer A
-#define INT_TIMERA0B            36          // Timer 0 subtimer B
-#define INT_TIMERA1A            37          // Timer 1 subtimer A
-#define INT_TIMERA1B            38          // Timer 1 subtimer B
-#define INT_TIMERA2A            39          // Timer 2 subtimer A
-#define INT_TIMERA2B            40          // Timer 2 subtimer B
-#define INT_FLASH               45          // FLASH Control
-#define INT_TIMERA3A            51          // Timer 3 subtimer A
-#define INT_TIMERA3B            52          // Timer 3 subtimer B
-#define INT_UDMA                62          // uDMA controller
-#define INT_UDMAERR             63          // uDMA Error
-#define INT_SHA                 164         // SHA
-#define INT_AES                 167         // AES
-#define INT_DES                 169         // DES
-#define INT_MMCHS               175         // SDIO
-#define INT_I2S                 177         // McAPS
-#define INT_CAMERA              179         // Camera
-#define INT_NWPIC               187         // Interprocessor communication
-#define INT_PRCM                188         // Power, Reset and Clock Module
-#define INT_SSPI                191         // Shared SPI
-#define INT_GSPI                192         // Generic SPI
-#define INT_LSPI                193         // Link SPI
-
-//*****************************************************************************
-//
-// The following are defines for the total number of interrupts.
-//
-//*****************************************************************************
-#define NUM_INTERRUPTS          195 //The above number plus 2?
-
-
-//*****************************************************************************
-//
-// The following are defines for the total number of priority levels.
-//
-//*****************************************************************************
-#define NUM_PRIORITY            8
-#define NUM_PRIORITY_BITS       3
-
-
-#endif // __HW_INTS_H__
diff --git a/ports/cc3200/hal/inc/hw_mcasp.h b/ports/cc3200/hal/inc/hw_mcasp.h
deleted file mode 100644
index c27a007797..0000000000
--- a/ports/cc3200/hal/inc/hw_mcasp.h
+++ /dev/null
@@ -1,1706 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MCASP_H__
-#define __HW_MCASP_H__
-
-//*****************************************************************************
-//
-// The following are defines for the MCASP register offsets.
-//
-//*****************************************************************************
-#define MCASP_O_PID             0x00000000
-#define MCASP_O_ESYSCONFIG      0x00000004  // Power Idle SYSCONFIG register.
-#define MCASP_O_PFUNC           0x00000010
-#define MCASP_O_PDIR            0x00000014
-#define MCASP_O_PDOUT           0x00000018
-#define MCASP_O_PDSET           0x0000001C  // The pin data set register
-                                            // (PDSET) is an alias of the pin
-                                            // data output register (PDOUT) for
-                                            // writes only. Writing a 1 to the
-                                            // PDSET bit sets the corresponding
-                                            // bit in PDOUT and if PFUNC = 1
-                                            // (GPIO function) and PDIR = 1
-                                            // (output) drives a logic high on
-                                            // the pin.
-#define MCASP_O_PDIN            0x0000001C  // The pin data input register
-                                            // (PDIN) holds the I/O pin state of
-                                            // each of the McASP pins. PDIN
-                                            // allows the actual value of the
-                                            // pin to be read regardless of the
-                                            // state of PFUNC and PDIR.
-#define MCASP_O_PDCLR           0x00000020  // The pin data clear register
-                                            // (PDCLR) is an alias of the pin
-                                            // data output register (PDOUT) for
-                                            // writes only. Writing a 1 to the
-                                            // PDCLR bit clears the
-                                            // corresponding bit in PDOUT and if
-                                            // PFUNC = 1 (GPIO function) and
-                                            // PDIR = 1 (output) drives a logic
-                                            // low on the pin.
-#define MCASP_O_TLGC            0x00000030  // for IODFT
-#define MCASP_O_TLMR            0x00000034  // for IODFT
-#define MCASP_O_TLEC            0x00000038  // for IODFT
-#define MCASP_O_GBLCTL          0x00000044
-#define MCASP_O_AMUTE           0x00000048
-#define MCASP_O_LBCTL           0x0000004C
-#define MCASP_O_TXDITCTL        0x00000050
-#define MCASP_O_GBLCTLR         0x00000060
-#define MCASP_O_RXMASK          0x00000064
-#define MCASP_O_RXFMT           0x00000068
-#define MCASP_O_RXFMCTL         0x0000006C
-#define MCASP_O_ACLKRCTL        0x00000070
-#define MCASP_O_AHCLKRCTL       0x00000074
-#define MCASP_O_RXTDM           0x00000078
-#define MCASP_O_EVTCTLR         0x0000007C
-#define MCASP_O_RXSTAT          0x00000080
-#define MCASP_O_RXTDMSLOT       0x00000084
-#define MCASP_O_RXCLKCHK        0x00000088
-#define MCASP_O_REVTCTL         0x0000008C
-#define MCASP_O_GBLCTLX         0x000000A0
-#define MCASP_O_TXMASK          0x000000A4
-#define MCASP_O_TXFMT           0x000000A8
-#define MCASP_O_TXFMCTL         0x000000AC
-#define MCASP_O_ACLKXCTL        0x000000B0
-#define MCASP_O_AHCLKXCTL       0x000000B4
-#define MCASP_O_TXTDM           0x000000B8
-#define MCASP_O_EVTCTLX         0x000000BC
-#define MCASP_O_TXSTAT          0x000000C0
-#define MCASP_O_TXTDMSLOT       0x000000C4
-#define MCASP_O_TXCLKCHK        0x000000C8
-#define MCASP_O_XEVTCTL         0x000000CC
-#define MCASP_O_CLKADJEN        0x000000D0
-#define MCASP_O_DITCSRA0        0x00000100
-#define MCASP_O_DITCSRA1        0x00000104
-#define MCASP_O_DITCSRA2        0x00000108
-#define MCASP_O_DITCSRA3        0x0000010C
-#define MCASP_O_DITCSRA4        0x00000110
-#define MCASP_O_DITCSRA5        0x00000114
-#define MCASP_O_DITCSRB0        0x00000118
-#define MCASP_O_DITCSRB1        0x0000011C
-#define MCASP_O_DITCSRB2        0x00000120
-#define MCASP_O_DITCSRB3        0x00000124
-#define MCASP_O_DITCSRB4        0x00000128
-#define MCASP_O_DITCSRB5        0x0000012C
-#define MCASP_O_DITUDRA0        0x00000130
-#define MCASP_O_DITUDRA1        0x00000134
-#define MCASP_O_DITUDRA2        0x00000138
-#define MCASP_O_DITUDRA3        0x0000013C
-#define MCASP_O_DITUDRA4        0x00000140
-#define MCASP_O_DITUDRA5        0x00000144
-#define MCASP_O_DITUDRB0        0x00000148
-#define MCASP_O_DITUDRB1        0x0000014C
-#define MCASP_O_DITUDRB2        0x00000150
-#define MCASP_O_DITUDRB3        0x00000154
-#define MCASP_O_DITUDRB4        0x00000158
-#define MCASP_O_DITUDRB5        0x0000015C
-#define MCASP_O_XRSRCTL0        0x00000180
-#define MCASP_O_XRSRCTL1        0x00000184
-#define MCASP_O_XRSRCTL2        0x00000188
-#define MCASP_O_XRSRCTL3        0x0000018C
-#define MCASP_O_XRSRCTL4        0x00000190
-#define MCASP_O_XRSRCTL5        0x00000194
-#define MCASP_O_XRSRCTL6        0x00000198
-#define MCASP_O_XRSRCTL7        0x0000019C
-#define MCASP_O_XRSRCTL8        0x000001A0
-#define MCASP_O_XRSRCTL9        0x000001A4
-#define MCASP_O_XRSRCTL10       0x000001A8
-#define MCASP_O_XRSRCTL11       0x000001AC
-#define MCASP_O_XRSRCTL12       0x000001B0
-#define MCASP_O_XRSRCTL13       0x000001B4
-#define MCASP_O_XRSRCTL14       0x000001B8
-#define MCASP_O_XRSRCTL15       0x000001BC
-#define MCASP_O_TXBUF0          0x00000200
-#define MCASP_O_TXBUF1          0x00000204
-#define MCASP_O_TXBUF2          0x00000208
-#define MCASP_O_TXBUF3          0x0000020C
-#define MCASP_O_TXBUF4          0x00000210
-#define MCASP_O_TXBUF5          0x00000214
-#define MCASP_O_TXBUF6          0x00000218
-#define MCASP_O_TXBUF7          0x0000021C
-#define MCASP_O_TXBUF8          0x00000220
-#define MCASP_O_TXBUF9          0x00000224
-#define MCASP_O_TXBUF10         0x00000228
-#define MCASP_O_TXBUF11         0x0000022C
-#define MCASP_O_TXBUF12         0x00000230
-#define MCASP_O_TXBUF13         0x00000234
-#define MCASP_O_TXBUF14         0x00000238
-#define MCASP_O_TXBUF15         0x0000023C
-#define MCASP_O_RXBUF0          0x00000280
-#define MCASP_O_RXBUF1          0x00000284
-#define MCASP_O_RXBUF2          0x00000288
-#define MCASP_O_RXBUF3          0x0000028C
-#define MCASP_O_RXBUF4          0x00000290
-#define MCASP_O_RXBUF5          0x00000294
-#define MCASP_O_RXBUF6          0x00000298
-#define MCASP_O_RXBUF7          0x0000029C
-#define MCASP_O_RXBUF8          0x000002A0
-#define MCASP_O_RXBUF9          0x000002A4
-#define MCASP_O_RXBUF10         0x000002A8
-#define MCASP_O_RXBUF11         0x000002AC
-#define MCASP_O_RXBUF12         0x000002B0
-#define MCASP_O_RXBUF13         0x000002B4
-#define MCASP_O_RXBUF14         0x000002B8
-#define MCASP_O_RXBUF15         0x000002BC
-#define	MCASP_0_WFIFOCTL	0x00001000
-#define	MCASP_0_WFIFOSTS	0x00001004
-#define	MCASP_0_RFIFOCTL	0x00001008
-#define	MCASP_0_RFIFOSTS	0x0000100C
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PID register.
-//
-//******************************************************************************
-#define MCASP_PID_SCHEME_M      0xC0000000
-#define MCASP_PID_SCHEME_S      30
-#define MCASP_PID_RESV_M        0x30000000
-#define MCASP_PID_RESV_S        28
-#define MCASP_PID_FUNCTION_M    0x0FFF0000  // McASP
-#define MCASP_PID_FUNCTION_S    16
-#define MCASP_PID_RTL_M         0x0000F800
-#define MCASP_PID_RTL_S         11
-#define MCASP_PID_REVMAJOR_M    0x00000700
-#define MCASP_PID_REVMAJOR_S    8
-#define MCASP_PID_CUSTOM_M      0x000000C0  // non-custom
-#define MCASP_PID_CUSTOM_S      6
-#define MCASP_PID_REVMINOR_M    0x0000003F
-#define MCASP_PID_REVMINOR_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MCASP_O_ESYSCONFIG register.
-//
-//******************************************************************************
-#define MCASP_ESYSCONFIG_RSV_M  0xFFFFFFC0  // Reserved as per PDR 3.5
-#define MCASP_ESYSCONFIG_RSV_S  6
-#define MCASP_ESYSCONFIG_OTHER_M \
-                                0x0000003C  // Reserved for future expansion
-
-#define MCASP_ESYSCONFIG_OTHER_S 2
-#define MCASP_ESYSCONFIG_IDLE_MODE_M \
-                                0x00000003  // Idle Mode
-
-#define MCASP_ESYSCONFIG_IDLE_MODE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PFUNC register.
-//
-//******************************************************************************
-#define MCASP_PFUNC_AFSR        0x80000000  // AFSR PFUNC 31 0 1
-#define MCASP_PFUNC_AHCLKR      0x40000000  // AHCLKR PFUNC 30 0 1
-#define MCASP_PFUNC_ACLKR       0x20000000  // ACLKR PFUNC 29 0 1
-#define MCASP_PFUNC_AFSX        0x10000000  // AFSX PFUNC 28 0 1
-#define MCASP_PFUNC_AHCLKX      0x08000000  // AHCLKX PFUNC 27 0 1
-#define MCASP_PFUNC_ACLKX       0x04000000  // ACLKX PFUNC 26 0 1
-#define MCASP_PFUNC_AMUTE       0x02000000  // AMUTE PFUNC 25 0 1
-#define MCASP_PFUNC_RESV1_M     0x01FF0000  // Reserved
-#define MCASP_PFUNC_RESV1_S     16
-#define MCASP_PFUNC_AXR15       0x00008000  // AXR PFUNC BIT 15 0 1
-#define MCASP_PFUNC_AXR14       0x00004000  // AXR PFUNC BIT 14 0 1
-#define MCASP_PFUNC_AXR13       0x00002000  // AXR PFUNC BIT 13 0 1
-#define MCASP_PFUNC_AXR12       0x00001000  // AXR PFUNC BIT 12 0 1
-#define MCASP_PFUNC_AXR11       0x00000800  // AXR PFUNC BIT 11 0 1
-#define MCASP_PFUNC_AXR10       0x00000400  // AXR PFUNC BIT 10 0 1
-#define MCASP_PFUNC_AXR9        0x00000200  // AXR PFUNC BIT 9 0 1
-#define MCASP_PFUNC_AXR8        0x00000100  // AXR PFUNC BIT 8 0 1
-#define MCASP_PFUNC_AXR7        0x00000080  // AXR PFUNC BIT 7 0 1
-#define MCASP_PFUNC_AXR6        0x00000040  // AXR PFUNC BIT 6 0 1
-#define MCASP_PFUNC_AXR5        0x00000020  // AXR PFUNC BIT 5 0 1
-#define MCASP_PFUNC_AXR4        0x00000010  // AXR PFUNC BIT 4 0 1
-#define MCASP_PFUNC_AXR3        0x00000008  // AXR PFUNC BIT 3 0 1
-#define MCASP_PFUNC_AXR2        0x00000004  // AXR PFUNC BIT 2 0 1
-#define MCASP_PFUNC_AXR1        0x00000002  // AXR PFUNC BIT 1 0 1
-#define MCASP_PFUNC_AXR0        0x00000001  // AXR PFUNC BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDIR register.
-//
-//******************************************************************************
-#define MCASP_PDIR_AFSR         0x80000000  // AFSR PDIR 31 0 1
-#define MCASP_PDIR_AHCLKR       0x40000000  // AHCLKR PDIR 30 0 1
-#define MCASP_PDIR_ACLKR        0x20000000  // ACLKR PDIR 29 0 1
-#define MCASP_PDIR_AFSX         0x10000000  // AFSX PDIR 28 0 1
-#define MCASP_PDIR_AHCLKX       0x08000000  // AHCLKX PDIR 27 0 1
-#define MCASP_PDIR_ACLKX        0x04000000  // ACLKX PDIR 26 0 1
-#define MCASP_PDIR_AMUTE        0x02000000  // AMUTE PDIR 25 0 1
-#define MCASP_PDIR_RESV_M       0x01FF0000  // Reserved
-#define MCASP_PDIR_RESV_S       16
-#define MCASP_PDIR_AXR15        0x00008000  // AXR PDIR BIT 15 0 1
-#define MCASP_PDIR_AXR14        0x00004000  // AXR PDIR BIT 14 0 1
-#define MCASP_PDIR_AXR13        0x00002000  // AXR PDIR BIT 13 0 1
-#define MCASP_PDIR_AXR12        0x00001000  // AXR PDIR BIT 12 0 1
-#define MCASP_PDIR_AXR11        0x00000800  // AXR PDIR BIT 11 0 1
-#define MCASP_PDIR_AXR10        0x00000400  // AXR PDIR BIT 10 0 1
-#define MCASP_PDIR_AXR9         0x00000200  // AXR PDIR BIT 9 0 1
-#define MCASP_PDIR_AXR8         0x00000100  // AXR PDIR BIT 8 0 1
-#define MCASP_PDIR_AXR7         0x00000080  // AXR PDIR BIT 7 0 1
-#define MCASP_PDIR_AXR6         0x00000040  // AXR PDIR BIT 6 0 1
-#define MCASP_PDIR_AXR5         0x00000020  // AXR PDIR BIT 5 0 1
-#define MCASP_PDIR_AXR4         0x00000010  // AXR PDIR BIT 4 0 1
-#define MCASP_PDIR_AXR3         0x00000008  // AXR PDIR BIT 3 0 1
-#define MCASP_PDIR_AXR2         0x00000004  // AXR PDIR BIT 2 0 1
-#define MCASP_PDIR_AXR1         0x00000002  // AXR PDIR BIT 1 0 1
-#define MCASP_PDIR_AXR0         0x00000001  // AXR PDIR BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDOUT register.
-//
-//******************************************************************************
-#define MCASP_PDOUT_AFSR        0x80000000  // AFSR PDOUT 31 0 1
-#define MCASP_PDOUT_AHCLKR      0x40000000  // AHCLKR PDOUT 30 0 1
-#define MCASP_PDOUT_ACLKR       0x20000000  // ACLKR PDOUT 29 0 1
-#define MCASP_PDOUT_AFSX        0x10000000  // AFSX PDOUT 28 0 1
-#define MCASP_PDOUT_AHCLKX      0x08000000  // AHCLKX PDOUT 27 0 1
-#define MCASP_PDOUT_ACLKX       0x04000000  // ACLKX PDOUT 26 0 1
-#define MCASP_PDOUT_AMUTE       0x02000000  // AMUTE PDOUT 25 0 1
-#define MCASP_PDOUT_RESV_M      0x01FF0000  // Reserved
-#define MCASP_PDOUT_RESV_S      16
-#define MCASP_PDOUT_AXR15       0x00008000  // AXR PDOUT BIT 15 0 1
-#define MCASP_PDOUT_AXR14       0x00004000  // AXR PDOUT BIT 14 0 1
-#define MCASP_PDOUT_AXR13       0x00002000  // AXR PDOUT BIT 13 0 1
-#define MCASP_PDOUT_AXR12       0x00001000  // AXR PDOUT BIT 12 0 1
-#define MCASP_PDOUT_AXR11       0x00000800  // AXR PDOUT BIT 11 0 1
-#define MCASP_PDOUT_AXR10       0x00000400  // AXR PDOUT BIT 10 0 1
-#define MCASP_PDOUT_AXR9        0x00000200  // AXR PDOUT BIT 9 0 1
-#define MCASP_PDOUT_AXR8        0x00000100  // AXR PDOUT BIT 8 0 1
-#define MCASP_PDOUT_AXR7        0x00000080  // AXR PDOUT BIT 7 0 1
-#define MCASP_PDOUT_AXR6        0x00000040  // AXR PDOUT BIT 6 0 1
-#define MCASP_PDOUT_AXR5        0x00000020  // AXR PDOUT BIT 5 0 1
-#define MCASP_PDOUT_AXR4        0x00000010  // AXR PDOUT BIT 4 0 1
-#define MCASP_PDOUT_AXR3        0x00000008  // AXR PDOUT BIT 3 0 1
-#define MCASP_PDOUT_AXR2        0x00000004  // AXR PDOUT BIT 2 0 1
-#define MCASP_PDOUT_AXR1        0x00000002  // AXR PDOUT BIT 1 0 1
-#define MCASP_PDOUT_AXR0        0x00000001  // AXR PDOUT BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDSET register.
-//
-//******************************************************************************
-#define MCASP_PDSET_AFSR        0x80000000
-#define MCASP_PDSET_AHCLKR      0x40000000
-#define MCASP_PDSET_ACLKR       0x20000000
-#define MCASP_PDSET_AFSX        0x10000000
-#define MCASP_PDSET_AHCLKX      0x08000000
-#define MCASP_PDSET_ACLKX       0x04000000
-#define MCASP_PDSET_AMUTE       0x02000000
-#define MCASP_PDSET_RESV_M      0x01FF0000  // Reserved
-#define MCASP_PDSET_RESV_S      16
-#define MCASP_PDSET_AXR15       0x00008000
-#define MCASP_PDSET_AXR14       0x00004000
-#define MCASP_PDSET_AXR13       0x00002000
-#define MCASP_PDSET_AXR12       0x00001000
-#define MCASP_PDSET_AXR11       0x00000800
-#define MCASP_PDSET_AXR10       0x00000400
-#define MCASP_PDSET_AXR9        0x00000200
-#define MCASP_PDSET_AXR8        0x00000100
-#define MCASP_PDSET_AXR7        0x00000080
-#define MCASP_PDSET_AXR6        0x00000040
-#define MCASP_PDSET_AXR5        0x00000020
-#define MCASP_PDSET_AXR4        0x00000010
-#define MCASP_PDSET_AXR3        0x00000008
-#define MCASP_PDSET_AXR2        0x00000004
-#define MCASP_PDSET_AXR1        0x00000002
-#define MCASP_PDSET_AXR0        0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDIN register.
-//
-//******************************************************************************
-#define MCASP_PDIN_AFSR         0x80000000
-#define MCASP_PDIN_AHCLKR       0x40000000
-#define MCASP_PDIN_ACLKR        0x20000000
-#define MCASP_PDIN_AFSX         0x10000000
-#define MCASP_PDIN_AHCLKX       0x08000000
-#define MCASP_PDIN_ACLKX        0x04000000
-#define MCASP_PDIN_AMUTE        0x02000000
-#define MCASP_PDIN_RESV_M       0x01FF0000  // Reserved
-#define MCASP_PDIN_RESV_S       16
-#define MCASP_PDIN_AXR15        0x00008000
-#define MCASP_PDIN_AXR14        0x00004000
-#define MCASP_PDIN_AXR13        0x00002000
-#define MCASP_PDIN_AXR12        0x00001000
-#define MCASP_PDIN_AXR11        0x00000800
-#define MCASP_PDIN_AXR10        0x00000400
-#define MCASP_PDIN_AXR9         0x00000200
-#define MCASP_PDIN_AXR8         0x00000100
-#define MCASP_PDIN_AXR7         0x00000080
-#define MCASP_PDIN_AXR6         0x00000040
-#define MCASP_PDIN_AXR5         0x00000020
-#define MCASP_PDIN_AXR4         0x00000010
-#define MCASP_PDIN_AXR3         0x00000008
-#define MCASP_PDIN_AXR2         0x00000004
-#define MCASP_PDIN_AXR1         0x00000002
-#define MCASP_PDIN_AXR0         0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDCLR register.
-//
-//******************************************************************************
-#define MCASP_PDCLR_AFSR        0x80000000  // AFSR PDCLR 31 0 1
-#define MCASP_PDCLR_AHCLKR      0x40000000  // AHCLKR PDCLR 30 0 1
-#define MCASP_PDCLR_ACLKR       0x20000000  // ACLKR PDCLR 29 0 1
-#define MCASP_PDCLR_AFSX        0x10000000  // AFSX PDCLR 28 0 1
-#define MCASP_PDCLR_AHCLKX      0x08000000  // AHCLKX PDCLR 27 0 1
-#define MCASP_PDCLR_ACLKX       0x04000000  // ACLKX PDCLR 26 0 1
-#define MCASP_PDCLR_AMUTE       0x02000000  // AMUTE PDCLR 25 0 1
-#define MCASP_PDCLR_RESV_M      0x01FF0000  // Reserved
-#define MCASP_PDCLR_RESV_S      16
-#define MCASP_PDCLR_AXR15       0x00008000  // AXR PDCLR BIT 15 0 1
-#define MCASP_PDCLR_AXR14       0x00004000  // AXR PDCLR BIT 14 0 1
-#define MCASP_PDCLR_AXR13       0x00002000  // AXR PDCLR BIT 13 0 1
-#define MCASP_PDCLR_AXR12       0x00001000  // AXR PDCLR BIT 12 0 1
-#define MCASP_PDCLR_AXR11       0x00000800  // AXR PDCLR BIT 11 0 1
-#define MCASP_PDCLR_AXR10       0x00000400  // AXR PDCLR BIT 10 0 1
-#define MCASP_PDCLR_AXR9        0x00000200  // AXR PDCLR BIT 9 0 1
-#define MCASP_PDCLR_AXR8        0x00000100  // AXR PDCLR BIT 8 0 1
-#define MCASP_PDCLR_AXR7        0x00000080  // AXR PDCLR BIT 7 0 1
-#define MCASP_PDCLR_AXR6        0x00000040  // AXR PDCLR BIT 6 0 1
-#define MCASP_PDCLR_AXR5        0x00000020  // AXR PDCLR BIT 5 0 1
-#define MCASP_PDCLR_AXR4        0x00000010  // AXR PDCLR BIT 4 0 1
-#define MCASP_PDCLR_AXR3        0x00000008  // AXR PDCLR BIT 3 0 1
-#define MCASP_PDCLR_AXR2        0x00000004  // AXR PDCLR BIT 2 0 1
-#define MCASP_PDCLR_AXR1        0x00000002  // AXR PDCLR BIT 1 0 1
-#define MCASP_PDCLR_AXR0        0x00000001  // AXR PDCLR BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TLGC register.
-//
-//******************************************************************************
-#define MCASP_TLGC_RESV_M       0xFFFF0000  // Reserved
-#define MCASP_TLGC_RESV_S       16
-#define MCASP_TLGC_MT_M         0x0000C000  // MISR on/off trigger command 0x0
-                                            // 0x1 0x2 0x3
-#define MCASP_TLGC_MT_S         14
-#define MCASP_TLGC_RESV1_M      0x00003E00  // Reserved
-#define MCASP_TLGC_RESV1_S      9
-#define MCASP_TLGC_MMS          0x00000100  // Source of MISR input 0 1
-#define MCASP_TLGC_ESEL         0x00000080  // Output enable select 0 1
-#define MCASP_TLGC_TOEN         0x00000040  // Test output enable control. 0 1
-#define MCASP_TLGC_MC_M         0x00000030  // States of MISR 0x0 0x1 0x2 0x3
-#define MCASP_TLGC_MC_S         4
-#define MCASP_TLGC_PC_M         0x0000000E  // Pattern code 0x0 0x1 0x2 0x3 0x4
-                                            // 0x5 0x6 0x7
-#define MCASP_TLGC_PC_S         1
-#define MCASP_TLGC_TM           0x00000001  // Tie high; do not write to this
-                                            // bit 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TLMR register.
-//
-//******************************************************************************
-#define MCASP_TLMR_TLMR_M       0xFFFFFFFF  // Contains test result signature.
-#define MCASP_TLMR_TLMR_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TLEC register.
-//
-//******************************************************************************
-#define MCASP_TLEC_TLEC_M       0xFFFFFFFF  // Contains number of cycles during
-                                            // which MISR sig will be
-                                            // accumulated.
-#define MCASP_TLEC_TLEC_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_GBLCTL register.
-//
-//******************************************************************************
-#define MCASP_GBLCTL_XFRST      0x00001000  // Frame sync generator reset 0 1
-#define MCASP_GBLCTL_XSMRST     0x00000800  // XMT state machine reset 0 1
-#define MCASP_GBLCTL_XSRCLR     0x00000400  // XMT serializer clear 0 1
-#define MCASP_GBLCTL_XHCLKRST   0x00000200  // XMT High Freq. clk Divider 0 1
-#define MCASP_GBLCTL_XCLKRST    0x00000100  // XMT clock divder reset 0 1
-#define MCASP_GBLCTL_RFRST      0x00000010  // Frame sync generator reset 0 1
-#define MCASP_GBLCTL_RSMRST     0x00000008  // RCV state machine reset 0 1
-#define MCASP_GBLCTL_RSRCLR     0x00000004  // RCV serializer clear 0 1
-#define MCASP_GBLCTL_RHCLKRST   0x00000002  // RCV High Freq. clk Divider 0 1
-#define MCASP_GBLCTL_RCLKRST    0x00000001  // RCV clock divder reset 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_AMUTE register.
-//
-//******************************************************************************
-#define MCASP_AMUTE_XDMAERR     0x00001000  // MUTETXDMAERR occur 0 1
-#define MCASP_AMUTE_RDMAERR     0x00000800  // MUTERXDMAERR occur 0 1
-#define MCASP_AMUTE_XCKFAIL     0x00000400  // XMT bad clock 0 1
-#define MCASP_AMUTE_RCKFAIL     0x00000200  // RCV bad clock 0 1
-#define MCASP_AMUTE_XSYNCERR    0x00000100  // XMT unexpected FS 0 1
-#define MCASP_AMUTE_RSYNCERR    0x00000080  // RCV unexpected FS 0 1
-#define MCASP_AMUTE_XUNDRN      0x00000040  // XMT underrun occurs 0 1
-#define MCASP_AMUTE_ROVRN       0x00000020  // RCV overun occurs 0 1
-#define MCASP_AMUTE_INSTAT      0x00000010
-#define MCASP_AMUTE_INEN        0x00000008  // drive AMUTE active on mute in
-                                            // active 0 1
-#define MCASP_AMUTE_INPOL       0x00000004  // Mute input polarity 0 1
-#define MCASP_AMUTE_MUTEN_M     0x00000003  // AMUTE pin enable 0x0 0x1 0x2
-#define MCASP_AMUTE_MUTEN_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_LBCTL register.
-//
-//******************************************************************************
-#define MCASP_LBCTL_IOLBEN      0x00000010  // IO loopback enable 0 1
-#define MCASP_LBCTL_MODE_M      0x0000000C  // Loop back clock source generator
-                                            // 0x0 0x1 0x2 0x3
-#define MCASP_LBCTL_MODE_S      2
-#define MCASP_LBCTL_ORD         0x00000002  // Loopback order 0 1
-#define MCASP_LBCTL_DLBEN       0x00000001  // Loop back mode 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXDITCTL register.
-//
-//******************************************************************************
-#define MCASP_TXDITCTL_VB       0x00000008  // Valib bit for odd TDM 0 1
-#define MCASP_TXDITCTL_VA       0x00000004  // Valib bit for even TDM 0 1
-#define MCASP_TXDITCTL_DITEN    0x00000001  // XMT DIT Mode Enable 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_GBLCTLR register.
-//
-//******************************************************************************
-#define MCASP_GBLCTLR_XFRST     0x00001000
-#define MCASP_GBLCTLR_XSMRST    0x00000800
-#define MCASP_GBLCTLR_XSRCLR    0x00000400
-#define MCASP_GBLCTLR_XHCLKRST  0x00000200
-#define MCASP_GBLCTLR_XCLKRST   0x00000100
-#define MCASP_GBLCTLR_RFRST     0x00000010  // Frame sync generator reset 0 1
-#define MCASP_GBLCTLR_RSMRST    0x00000008  // RCV state machine reset 0 1
-#define MCASP_GBLCTLR_RSRCLR    0x00000004  // RCV serializer clear 0 1
-#define MCASP_GBLCTLR_RHCLKRST  0x00000002  // RCV High Freq. clk Divider 0 1
-#define MCASP_GBLCTLR_RCLKRST   0x00000001  // RCV clock divder reset 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXMASK register.
-//
-//******************************************************************************
-#define MCASP_RXMASK_RMASK31    0x80000000  // RMASK BIT 31 0 1
-#define MCASP_RXMASK_RMASK30    0x40000000  // RMASK BIT 30 0 1
-#define MCASP_RXMASK_RMASK29    0x20000000  // RMASK BIT 29 0 1
-#define MCASP_RXMASK_RMASK28    0x10000000  // RMASK BIT 28 0 1
-#define MCASP_RXMASK_RMASK27    0x08000000  // RMASK BIT 27 0 1
-#define MCASP_RXMASK_RMASK26    0x04000000  // RMASK BIT 26 0 1
-#define MCASP_RXMASK_RMASK25    0x02000000  // RMASK BIT 25 0 1
-#define MCASP_RXMASK_RMASK24    0x01000000  // RMASK BIT 24 0 1
-#define MCASP_RXMASK_RMASK23    0x00800000  // RMASK BIT 23 0 1
-#define MCASP_RXMASK_RMASK22    0x00400000  // RMASK BIT 22 0 1
-#define MCASP_RXMASK_RMASK21    0x00200000  // RMASK BIT 21 0 1
-#define MCASP_RXMASK_RMASK20    0x00100000  // RMASK BIT 20 0 1
-#define MCASP_RXMASK_RMASK19    0x00080000  // RMASK BIT 19 0 1
-#define MCASP_RXMASK_RMASK18    0x00040000  // RMASK BIT 18 0 1
-#define MCASP_RXMASK_RMASK17    0x00020000  // RMASK BIT 17 0 1
-#define MCASP_RXMASK_RMASK16    0x00010000  // RMASK BIT 16 0 1
-#define MCASP_RXMASK_RMASK15    0x00008000  // RMASK BIT 15 0 1
-#define MCASP_RXMASK_RMASK14    0x00004000  // RMASK BIT 14 0 1
-#define MCASP_RXMASK_RMASK13    0x00002000  // RMASK BIT 13 0 1
-#define MCASP_RXMASK_RMASK12    0x00001000  // RMASK BIT 12 0 1
-#define MCASP_RXMASK_RMASK11    0x00000800  // RMASK BIT 11 0 1
-#define MCASP_RXMASK_RMASK10    0x00000400  // RMASK BIT 10 0 1
-#define MCASP_RXMASK_RMASK9     0x00000200  // RMASK BIT 9 0 1
-#define MCASP_RXMASK_RMASK8     0x00000100  // RMASK BIT 8 0 1
-#define MCASP_RXMASK_RMASK7     0x00000080  // RMASK BIT 7 0 1
-#define MCASP_RXMASK_RMASK6     0x00000040  // RMASK BIT 6 0 1
-#define MCASP_RXMASK_RMASK5     0x00000020  // RMASK BIT 5 0 1
-#define MCASP_RXMASK_RMASK4     0x00000010  // RMASK BIT 4 0 1
-#define MCASP_RXMASK_RMASK3     0x00000008  // RMASK BIT 3 0 1
-#define MCASP_RXMASK_RMASK2     0x00000004  // RMASK BIT 2 0 1
-#define MCASP_RXMASK_RMASK1     0x00000002  // RMASK BIT 1 0 1
-#define MCASP_RXMASK_RMASK0     0x00000001  // RMASK BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXFMT register.
-//
-//******************************************************************************
-#define MCASP_RXFMT_RDATDLY_M   0x00030000  // RCV Frame sync delay 0x0 0 Bit
-                                            // delay 0x1 1 Bit delay 0x2 2 Bit
-                                            // delay
-#define MCASP_RXFMT_RDATDLY_S   16
-#define MCASP_RXFMT_RRVRS       0x00008000  // RCV serial stream bit order 0 1
-#define MCASP_RXFMT_RPAD_M      0x00006000  // Pad value 0x0 0x1 0x2
-#define MCASP_RXFMT_RPAD_S      13
-#define MCASP_RXFMT_RPBIT_M     0x00001F00  // Pad bit position
-#define MCASP_RXFMT_RPBIT_S     8
-#define MCASP_RXFMT_RSSZ_M      0x000000F0  // RCV slot Size 0x0 0x1 0x2 0x3
-                                            // 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB
-                                            // 0xC 0xD 0xE 0xF
-#define MCASP_RXFMT_RSSZ_S      4
-#define MCASP_RXFMT_RBUSEL      0x00000008  // Write to RBUF using CPU/DMA 0
-                                            // DMA port access 1 CPU port Access
-#define MCASP_RXFMT_RROT_M      0x00000007  // Right Rotate Value 0x0 0x1 0x2
-                                            // 0x3 0x4 0x5 0x6 0x7
-#define MCASP_RXFMT_RROT_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXFMCTL register.
-//
-//******************************************************************************
-#define MCASP_RXFMCTL_RMOD_M    0x0000FF80  // RCV Frame sync mode
-#define MCASP_RXFMCTL_RMOD_S    7
-#define MCASP_RXFMCTL_FRWID     0x00000010  // RCV Frame sync Duration 0 1
-#define MCASP_RXFMCTL_FSRM      0x00000002  // RCV frame sync External 0 1
-#define MCASP_RXFMCTL_FSRP      0x00000001  // RCV Frame sync Polarity 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_ACLKRCTL register.
-//
-//******************************************************************************
-#define MCASP_ACLKRCTL_BUSY     0x00100000
-#define MCASP_ACLKRCTL_DIVBUSY  0x00080000
-#define MCASP_ACLKRCTL_ADJBUSY  0x00040000
-#define MCASP_ACLKRCTL_CLKRADJ_M \
-                                0x00030000
-
-#define MCASP_ACLKRCTL_CLKRADJ_S 16
-#define MCASP_ACLKRCTL_CLKRP    0x00000080  // RCV Clock Polarity 0 1
-#define MCASP_ACLKRCTL_CLKRM    0x00000020  // RCV clock source 0 1
-#define MCASP_ACLKRCTL_CLKRDIV_M \
-                                0x0000001F  // RCV clock devide ratio
-
-#define MCASP_ACLKRCTL_CLKRDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_AHCLKRCTL register.
-//
-//******************************************************************************
-#define MCASP_AHCLKRCTL_BUSY    0x00100000
-#define MCASP_AHCLKRCTL_DIVBUSY 0x00080000
-#define MCASP_AHCLKRCTL_ADJBUSY 0x00040000
-#define MCASP_AHCLKRCTL_HCLKRADJ_M \
-                                0x00030000
-
-#define MCASP_AHCLKRCTL_HCLKRADJ_S 16
-#define MCASP_AHCLKRCTL_HCLKRM  0x00008000  // High Freq. RCV clock Source 0 1
-#define MCASP_AHCLKRCTL_HCLKRP  0x00004000  // High Freq. clock Polarity Before
-                                            // diviser 0 1
-#define MCASP_AHCLKRCTL_HCLKRDIV_M \
-                                0x00000FFF  // RCV clock Divide Ratio
-
-#define MCASP_AHCLKRCTL_HCLKRDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXTDM register.
-//
-//******************************************************************************
-#define MCASP_RXTDM_RTDMS31     0x80000000  // RCV mode during TDM time slot 31
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS30     0x40000000  // RCV mode during TDM time slot 30
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS29     0x20000000  // RCV mode during TDM time slot 29
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS28     0x10000000  // RCV mode during TDM time slot 28
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS27     0x08000000  // RCV mode during TDM time slot 27
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS26     0x04000000  // RCV mode during TDM time slot 26
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS25     0x02000000  // RCV mode during TDM time slot 25
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS24     0x01000000  // RCV mode during TDM time slot 24
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS23     0x00800000  // RCV mode during TDM time slot 23
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS22     0x00400000  // RCV mode during TDM time slot 22
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS21     0x00200000  // RCV mode during TDM time slot 21
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS20     0x00100000  // RCV mode during TDM time slot 20
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS19     0x00080000  // RCV mode during TDM time slot 19
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS18     0x00040000  // RCV mode during TDM time slot 18
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS17     0x00020000  // RCV mode during TDM time slot 17
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS16     0x00010000  // RCV mode during TDM time slot 16
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS15     0x00008000  // RCV mode during TDM time slot 15
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS14     0x00004000  // RCV mode during TDM time slot 14
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS13     0x00002000  // RCV mode during TDM time slot 13
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS12     0x00001000  // RCV mode during TDM time slot 12
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS11     0x00000800  // RCV mode during TDM time slot 11
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS10     0x00000400  // RCV mode during TDM time slot 10
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS9      0x00000200  // RCV mode during TDM time slot 9
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS8      0x00000100  // RCV mode during TDM time slot 8
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS7      0x00000080  // RCV mode during TDM time slot 7
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS6      0x00000040  // RCV mode during TDM time slot 6
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS5      0x00000020  // RCV mode during TDM time slot 5
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS4      0x00000010  // RCV mode during TDM time slot 4
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS3      0x00000008  // RCV mode during TDM time slot 3
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS2      0x00000004  // RCV mode during TDM time slot 2
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS1      0x00000002  // RCV mode during TDM time slot 1
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS0      0x00000001  // RCV mode during TDM time slot 0
-                                            // 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_EVTCTLR register.
-//
-//******************************************************************************
-#define MCASP_EVTCTLR_RSTAFRM   0x00000080  // RCV Start of Frame Interrupt 0 1
-#define MCASP_EVTCTLR_RDATA     0x00000020  // RCV Data Interrupt 0 1
-#define MCASP_EVTCTLR_RLAST     0x00000010  // RCV Last Slot Interrupt 0 1
-#define MCASP_EVTCTLR_RDMAERR   0x00000008  // RCV DMA Bus Error 0 1
-#define MCASP_EVTCTLR_RCKFAIL   0x00000004  // Bad Clock Interrupt 0 1
-#define MCASP_EVTCTLR_RSYNCERR  0x00000002  // RCV Unexpected FSR Interrupt 0 1
-#define MCASP_EVTCTLR_ROVRN     0x00000001  // RCV Underrun Flag 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXSTAT register.
-//
-//******************************************************************************
-#define MCASP_RXSTAT_RERR       0x00000100  // RCV Error 0 1
-#define MCASP_RXSTAT_RDMAERR    0x00000080  // RCV DMA bus error 0 1
-#define MCASP_RXSTAT_RSTAFRM    0x00000040  // Start of Frame-RCV 0 1
-#define MCASP_RXSTAT_RDATA      0x00000020  // Data Ready Flag 0 1
-#define MCASP_RXSTAT_RLAST      0x00000010  // Last Slot Interrupt Flag 0 1
-#define MCASP_RXSTAT_RTDMSLOT   0x00000008  // EvenOdd Slot 0 1
-#define MCASP_RXSTAT_RCKFAIL    0x00000004  // Bad Transmit Flag 0 1
-#define MCASP_RXSTAT_RSYNCERR   0x00000002  // Unexpected RCV Frame sync flag 0
-                                            // 1
-#define MCASP_RXSTAT_ROVRN      0x00000001  // RCV Underrun Flag 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXTDMSLOT register.
-//
-//******************************************************************************
-#define MCASP_RXTDMSLOT_RSLOTCNT_M \
-                                0x000003FF  // Current RCV time slot count
-
-#define MCASP_RXTDMSLOT_RSLOTCNT_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXCLKCHK register.
-//
-//******************************************************************************
-#define MCASP_RXCLKCHK_RCNT_M   0xFF000000  // RCV clock count value
-#define MCASP_RXCLKCHK_RCNT_S   24
-#define MCASP_RXCLKCHK_RMAX_M   0x00FF0000  // RCV clock maximum boundary
-#define MCASP_RXCLKCHK_RMAX_S   16
-#define MCASP_RXCLKCHK_RMIN_M   0x0000FF00  // RCV clock minimum boundary
-#define MCASP_RXCLKCHK_RMIN_S   8
-#define MCASP_RXCLKCHK_RPS_M    0x0000000F  // RCV clock check prescaler 0x0
-                                            // 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8
-#define MCASP_RXCLKCHK_RPS_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_REVTCTL register.
-//
-//******************************************************************************
-#define MCASP_REVTCTL_RDATDMA   0x00000001  // RCV data DMA request 0 Enable
-                                            // DMA Transfer 1 Disable DMA
-                                            // Transfer
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_GBLCTLX register.
-//
-//******************************************************************************
-#define MCASP_GBLCTLX_XFRST     0x00001000  // Frame sync generator reset 0 1
-#define MCASP_GBLCTLX_XSMRST    0x00000800  // XMT state machine reset 0 1
-#define MCASP_GBLCTLX_XSRCLR    0x00000400  // XMT serializer clear 0 1
-#define MCASP_GBLCTLX_XHCLKRST  0x00000200  // XMT High Freq. clk Divider 0 1
-#define MCASP_GBLCTLX_XCLKRST   0x00000100  // XMT clock divder reset 0 1
-#define MCASP_GBLCTLX_RFRST     0x00000010
-#define MCASP_GBLCTLX_RSMRST    0x00000008
-#define MCASP_GBLCTLX_RSRCLKR   0x00000004
-#define MCASP_GBLCTLX_RHCLKRST  0x00000002
-#define MCASP_GBLCTLX_RCLKRST   0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXMASK register.
-//
-//******************************************************************************
-#define MCASP_TXMASK_XMASK31    0x80000000  // XMASK BIT 31 0 1
-#define MCASP_TXMASK_XMASK30    0x40000000  // XMASK BIT 30 0 1
-#define MCASP_TXMASK_XMASK29    0x20000000  // XMASK BIT 29 0 1
-#define MCASP_TXMASK_XMASK28    0x10000000  // XMASK BIT 28 0 1
-#define MCASP_TXMASK_XMASK27    0x08000000  // XMASK BIT 27 0 1
-#define MCASP_TXMASK_XMASK26    0x04000000  // XMASK BIT 26 0 1
-#define MCASP_TXMASK_XMASK25    0x02000000  // XMASK BIT 25 0 1
-#define MCASP_TXMASK_XMASK24    0x01000000  // XMASK BIT 24 0 1
-#define MCASP_TXMASK_XMASK23    0x00800000  // XMASK BIT 23 0 1
-#define MCASP_TXMASK_XMASK22    0x00400000  // XMASK BIT 22 0 1
-#define MCASP_TXMASK_XMASK21    0x00200000  // XMASK BIT 21 0 1
-#define MCASP_TXMASK_XMASK20    0x00100000  // XMASK BIT 20 0 1
-#define MCASP_TXMASK_XMASK19    0x00080000  // XMASK BIT 19 0 1
-#define MCASP_TXMASK_XMASK18    0x00040000  // XMASK BIT 18 0 1
-#define MCASP_TXMASK_XMASK17    0x00020000  // XMASK BIT 17 0 1
-#define MCASP_TXMASK_XMASK16    0x00010000  // XMASK BIT 16 0 1
-#define MCASP_TXMASK_XMASK15    0x00008000  // XMASK BIT 15 0 1
-#define MCASP_TXMASK_XMASK14    0x00004000  // XMASK BIT 14 0 1
-#define MCASP_TXMASK_XMASK13    0x00002000  // XMASK BIT 13 0 1
-#define MCASP_TXMASK_XMASK12    0x00001000  // XMASK BIT 12 0 1
-#define MCASP_TXMASK_XMASK11    0x00000800  // XMASK BIT 11 0 1
-#define MCASP_TXMASK_XMASK10    0x00000400  // XMASK BIT 10 0 1
-#define MCASP_TXMASK_XMASK9     0x00000200  // XMASK BIT 9 0 1
-#define MCASP_TXMASK_XMASK8     0x00000100  // XMASK BIT 8 0 1
-#define MCASP_TXMASK_XMASK7     0x00000080  // XMASK BIT 7 0 1
-#define MCASP_TXMASK_XMASK6     0x00000040  // XMASK BIT 6 0 1
-#define MCASP_TXMASK_XMASK5     0x00000020  // XMASK BIT 5 0 1
-#define MCASP_TXMASK_XMASK4     0x00000010  // XMASK BIT 4 0 1
-#define MCASP_TXMASK_XMASK3     0x00000008  // XMASK BIT 3 0 1
-#define MCASP_TXMASK_XMASK2     0x00000004  // XMASK BIT 2 0 1
-#define MCASP_TXMASK_XMASK1     0x00000002  // XMASK BIT 1 0 1
-#define MCASP_TXMASK_XMASK0     0x00000001  // XMASK BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXFMT register.
-//
-//******************************************************************************
-#define MCASP_TXFMT_XDATDLY_M   0x00030000  // XMT Frame sync delay 0x0 0 Bit
-                                            // delay 0x1 1 Bit delay 0x2 2 Bit
-                                            // delay
-#define MCASP_TXFMT_XDATDLY_S   16
-#define MCASP_TXFMT_XRVRS       0x00008000  // XMT serial stream bit order 0 1
-#define MCASP_TXFMT_XPAD_M      0x00006000  // Pad value 0x0 0x1 0x2
-#define MCASP_TXFMT_XPAD_S      13
-#define MCASP_TXFMT_XPBIT_M     0x00001F00  // Pad bit position
-#define MCASP_TXFMT_XPBIT_S     8
-#define MCASP_TXFMT_XSSZ_M      0x000000F0  // XMT slot Size 0x0 0x1 0x2 0x3
-                                            // 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB
-                                            // 0xC 0xD 0xE 0xF
-#define MCASP_TXFMT_XSSZ_S      4
-#define MCASP_TXFMT_XBUSEL      0x00000008  // Write to XBUF using CPU/DMA 0
-                                            // DMA port access 1 CPU port Access
-#define MCASP_TXFMT_XROT_M      0x00000007  // Right Rotate Value 0x0 0x1 0x2
-                                            // 0x3 0x4 0x5 0x6 0x7
-#define MCASP_TXFMT_XROT_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXFMCTL register.
-//
-//******************************************************************************
-#define MCASP_TXFMCTL_XMOD_M    0x0000FF80  // XMT Frame sync mode
-#define MCASP_TXFMCTL_XMOD_S    7
-#define MCASP_TXFMCTL_FXWID     0x00000010  // XMT Frame sync Duration 0 1
-#define MCASP_TXFMCTL_FSXM      0x00000002  // XMT frame sync External 0 1
-#define MCASP_TXFMCTL_FSXP      0x00000001  // XMT Frame sync Polarity 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_ACLKXCTL register.
-//
-//******************************************************************************
-#define MCASP_ACLKXCTL_BUSY     0x00100000
-#define MCASP_ACLKXCTL_DIVBUSY  0x00080000
-#define MCASP_ACLKXCTL_ADJBUSY  0x00040000
-#define MCASP_ACLKXCTL_CLKXADJ_M \
-                                0x00030000
-
-#define MCASP_ACLKXCTL_CLKXADJ_S 16
-#define MCASP_ACLKXCTL_CLKXP    0x00000080  // XMT Clock Polarity 0 1
-#define MCASP_ACLKXCTL_ASYNC    0x00000040  // XMT/RCV operation sync /Async 0
-                                            // 1
-#define MCASP_ACLKXCTL_CLKXM    0x00000020  // XMT clock source 0 1
-#define MCASP_ACLKXCTL_CLKXDIV_M \
-                                0x0000001F  // XMT clock devide ratio
-
-#define MCASP_ACLKXCTL_CLKXDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_AHCLKXCTL register.
-//
-//******************************************************************************
-#define MCASP_AHCLKXCTL_BUSY    0x00100000
-#define MCASP_AHCLKXCTL_DIVBUSY 0x00080000
-#define MCASP_AHCLKXCTL_ADJBUSY 0x00040000
-#define MCASP_AHCLKXCTL_HCLKXADJ_M \
-                                0x00030000
-
-#define MCASP_AHCLKXCTL_HCLKXADJ_S 16
-#define MCASP_AHCLKXCTL_HCLKXM  0x00008000  // High Freq. XMT clock Source 0 1
-#define MCASP_AHCLKXCTL_HCLKXP  0x00004000  // High Freq. clock Polarity Before
-                                            // diviser 0 1
-#define MCASP_AHCLKXCTL_HCLKXDIV_M \
-                                0x00000FFF  // XMT clock Divide Ratio
-
-#define MCASP_AHCLKXCTL_HCLKXDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXTDM register.
-//
-//******************************************************************************
-#define MCASP_TXTDM_XTDMS31     0x80000000  // XMT mode during TDM time slot 31
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS30     0x40000000  // XMT mode during TDM time slot 30
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS29     0x20000000  // XMT mode during TDM time slot 29
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS28     0x10000000  // XMT mode during TDM time slot 28
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS27     0x08000000  // XMT mode during TDM time slot 27
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS26     0x04000000  // XMT mode during TDM time slot 26
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS25     0x02000000  // XMT mode during TDM time slot 25
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS24     0x01000000  // XMT mode during TDM time slot 24
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS23     0x00800000  // XMT mode during TDM time slot 23
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS22     0x00400000  // XMT mode during TDM time slot 22
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS21     0x00200000  // XMT mode during TDM time slot 21
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS20     0x00100000  // XMT mode during TDM time slot 20
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS19     0x00080000  // XMT mode during TDM time slot 19
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS18     0x00040000  // XMT mode during TDM time slot 18
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS17     0x00020000  // XMT mode during TDM time slot 17
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS16     0x00010000  // XMT mode during TDM time slot 16
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS15     0x00008000  // XMT mode during TDM time slot 15
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS14     0x00004000  // XMT mode during TDM time slot 14
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS13     0x00002000  // XMT mode during TDM time slot 13
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS12     0x00001000  // XMT mode during TDM time slot 12
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS11     0x00000800  // XMT mode during TDM time slot 11
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS10     0x00000400  // XMT mode during TDM time slot 10
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS9      0x00000200  // XMT mode during TDM time slot 9
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS8      0x00000100  // XMT mode during TDM time slot 8
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS7      0x00000080  // XMT mode during TDM time slot 7
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS6      0x00000040  // XMT mode during TDM time slot 6
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS5      0x00000020  // XMT mode during TDM time slot 5
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS4      0x00000010  // XMT mode during TDM time slot 4
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS3      0x00000008  // XMT mode during TDM time slot 3
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS2      0x00000004  // XMT mode during TDM time slot 2
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS1      0x00000002  // XMT mode during TDM time slot 1
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS0      0x00000001  // XMT mode during TDM time slot 0
-                                            // 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_EVTCTLX register.
-//
-//******************************************************************************
-#define MCASP_EVTCTLX_XSTAFRM   0x00000080  // XMT Start of Frame Interrupt 0 1
-#define MCASP_EVTCTLX_XDATA     0x00000020  // XMT Data Interrupt 0 1
-#define MCASP_EVTCTLX_XLAST     0x00000010  // XMT Last Slot Interrupt 0 1
-#define MCASP_EVTCTLX_XDMAERR   0x00000008  // XMT DMA Bus Error 0 1
-#define MCASP_EVTCTLX_XCKFAIL   0x00000004  // Bad Clock Interrupt 0 1
-#define MCASP_EVTCTLX_XSYNCERR  0x00000002  // XMT Unexpected FSR Interrupt 0 1
-#define MCASP_EVTCTLX_XUNDRN    0x00000001  // XMT Underrun Interrupt 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXSTAT register.
-//
-//******************************************************************************
-#define MCASP_TXSTAT_XERR       0x00000100  // XMT Error 0 1
-#define MCASP_TXSTAT_XDMAERR    0x00000080  // XMT DMA bus error 0 1
-#define MCASP_TXSTAT_XSTAFRM    0x00000040  // Start of Frame-XMT 0 1
-#define MCASP_TXSTAT_XDATA      0x00000020  // Data Ready Flag 0 1
-#define MCASP_TXSTAT_XLAST      0x00000010  // Last Slot Interrupt Flag 0 1
-#define MCASP_TXSTAT_XTDMSLOT   0x00000008  // EvenOdd Slot 0 1
-#define MCASP_TXSTAT_XCKFAIL    0x00000004  // Bad Transmit Flag 0 1
-#define MCASP_TXSTAT_XSYNCERR   0x00000002  // Unexpected XMT Frame sync flag 0
-                                            // 1
-#define MCASP_TXSTAT_XUNDRN     0x00000001  // XMT Underrun Flag 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXTDMSLOT register.
-//
-//******************************************************************************
-#define MCASP_TXTDMSLOT_XSLOTCNT_M \
-                                0x000003FF  // Current XMT time slot count
-                                            // during reset the value of this
-                                            // register is 0b0101111111 (0x17f)
-                                            // and after reset 0
-
-#define MCASP_TXTDMSLOT_XSLOTCNT_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXCLKCHK register.
-//
-//******************************************************************************
-#define MCASP_TXCLKCHK_XCNT_M   0xFF000000  // XMT clock count value
-#define MCASP_TXCLKCHK_XCNT_S   24
-#define MCASP_TXCLKCHK_XMAX_M   0x00FF0000  // XMT clock maximum boundary
-#define MCASP_TXCLKCHK_XMAX_S   16
-#define MCASP_TXCLKCHK_XMIN_M   0x0000FF00  // XMT clock minimum boundary
-#define MCASP_TXCLKCHK_XMIN_S   8
-#define MCASP_TXCLKCHK_RESV     0x00000080  // Reserved
-#define MCASP_TXCLKCHK_XPS_M    0x0000000F  // XMT clock check prescaler 0x0
-                                            // 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8
-#define MCASP_TXCLKCHK_XPS_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XEVTCTL register.
-//
-//******************************************************************************
-#define MCASP_XEVTCTL_XDATDMA   0x00000001  // XMT data DMA request 0 Enable
-                                            // DMA Transfer 1 Disable DMA
-                                            // Transfer
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_CLKADJEN register.
-//
-//******************************************************************************
-#define MCASP_CLKADJEN_ENABLE   0x00000001  // One-shot clock adjust enable 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA0 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA0_DITCSRA0_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA0_DITCSRA0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA1 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA1_DITCSRA1_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA1_DITCSRA1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA2 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA2_DITCSRA2_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status Register
-
-#define MCASP_DITCSRA2_DITCSRA2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA3 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA3_DITCSRA3_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status Register
-
-#define MCASP_DITCSRA3_DITCSRA3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA4 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA4_DITCSRA4_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA4_DITCSRA4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA5 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA5_DITCSRA5_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA5_DITCSRA5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB0 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB0_DITCSRB0_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB0_DITCSRB0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB1 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB1_DITCSRB1_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB1_DITCSRB1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB2 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB2_DITCSRB2_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB2_DITCSRB2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB3 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB3_DITCSRB3_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB3_DITCSRB3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB4 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB4_DITCSRB4_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB4_DITCSRB4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB5 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB5_DITCSRB5_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB5_DITCSRB5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA0 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA0_DITUDRA0_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA0_DITUDRA0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA1 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA1_DITUDRA1_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA1_DITUDRA1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA2 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA2_DITUDRA2_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA2_DITUDRA2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA3 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA3_DITUDRA3_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA3_DITUDRA3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA4 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA4_DITUDRA4_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA4_DITUDRA4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA5 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA5_DITUDRA5_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA5_DITUDRA5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB0 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB0_DITUDRB0_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB0_DITUDRB0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB1 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB1_DITUDRB1_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB1_DITUDRB1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB2 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB2_DITUDRB2_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB2_DITUDRB2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB3 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB3_DITUDRB3_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB3_DITUDRB3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB4 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB4_DITUDRB4_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB4_DITUDRB4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB5 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB5_DITUDRB5_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB5_DITUDRB5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL0 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL0_RRDY     0x00000020
-#define MCASP_XRSRCTL0_XRDY     0x00000010
-#define MCASP_XRSRCTL0_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL0_DISMOD_S 2
-#define MCASP_XRSRCTL0_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL0_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL1 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL1_RRDY     0x00000020
-#define MCASP_XRSRCTL1_XRDY     0x00000010
-#define MCASP_XRSRCTL1_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL1_DISMOD_S 2
-#define MCASP_XRSRCTL1_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL1_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL2 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL2_RRDY     0x00000020
-#define MCASP_XRSRCTL2_XRDY     0x00000010
-#define MCASP_XRSRCTL2_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL2_DISMOD_S 2
-#define MCASP_XRSRCTL2_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL2_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL3 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL3_RRDY     0x00000020
-#define MCASP_XRSRCTL3_XRDY     0x00000010
-#define MCASP_XRSRCTL3_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL3_DISMOD_S 2
-#define MCASP_XRSRCTL3_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL3_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL4 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL4_RRDY     0x00000020
-#define MCASP_XRSRCTL4_XRDY     0x00000010
-#define MCASP_XRSRCTL4_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL4_DISMOD_S 2
-#define MCASP_XRSRCTL4_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL4_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL5 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL5_RRDY     0x00000020
-#define MCASP_XRSRCTL5_XRDY     0x00000010
-#define MCASP_XRSRCTL5_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL5_DISMOD_S 2
-#define MCASP_XRSRCTL5_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL5_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL6 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL6_RRDY     0x00000020
-#define MCASP_XRSRCTL6_XRDY     0x00000010
-#define MCASP_XRSRCTL6_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL6_DISMOD_S 2
-#define MCASP_XRSRCTL6_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL6_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL7 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL7_RRDY     0x00000020
-#define MCASP_XRSRCTL7_XRDY     0x00000010
-#define MCASP_XRSRCTL7_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL7_DISMOD_S 2
-#define MCASP_XRSRCTL7_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL7_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL8 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL8_RRDY     0x00000020
-#define MCASP_XRSRCTL8_XRDY     0x00000010
-#define MCASP_XRSRCTL8_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL8_DISMOD_S 2
-#define MCASP_XRSRCTL8_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL8_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL9 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL9_RRDY     0x00000020
-#define MCASP_XRSRCTL9_XRDY     0x00000010
-#define MCASP_XRSRCTL9_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL9_DISMOD_S 2
-#define MCASP_XRSRCTL9_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL9_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL10 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL10_RRDY    0x00000020
-#define MCASP_XRSRCTL10_XRDY    0x00000010
-#define MCASP_XRSRCTL10_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL10_DISMOD_S 2
-#define MCASP_XRSRCTL10_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL10_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL11 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL11_RRDY    0x00000020
-#define MCASP_XRSRCTL11_XRDY    0x00000010
-#define MCASP_XRSRCTL11_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL11_DISMOD_S 2
-#define MCASP_XRSRCTL11_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL11_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL12 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL12_RRDY    0x00000020
-#define MCASP_XRSRCTL12_XRDY    0x00000010
-#define MCASP_XRSRCTL12_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL12_DISMOD_S 2
-#define MCASP_XRSRCTL12_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL12_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL13 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL13_RRDY    0x00000020
-#define MCASP_XRSRCTL13_XRDY    0x00000010
-#define MCASP_XRSRCTL13_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL13_DISMOD_S 2
-#define MCASP_XRSRCTL13_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL13_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL14 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL14_RRDY    0x00000020
-#define MCASP_XRSRCTL14_XRDY    0x00000010
-#define MCASP_XRSRCTL14_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL14_DISMOD_S 2
-#define MCASP_XRSRCTL14_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL14_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL15 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL15_RRDY    0x00000020
-#define MCASP_XRSRCTL15_XRDY    0x00000010
-#define MCASP_XRSRCTL15_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL15_DISMOD_S 2
-#define MCASP_XRSRCTL15_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL15_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF0 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF0_XBUF0_M    0xFFFFFFFF  // Transmit Buffer 0
-#define MCASP_TXBUF0_XBUF0_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF1 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF1_XBUF1_M    0xFFFFFFFF  // Transmit Buffer 1
-#define MCASP_TXBUF1_XBUF1_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF2 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF2_XBUF2_M    0xFFFFFFFF  // Transmit Buffer 2
-#define MCASP_TXBUF2_XBUF2_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF3 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF3_XBUF3_M    0xFFFFFFFF  // Transmit Buffer 3
-#define MCASP_TXBUF3_XBUF3_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF4 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF4_XBUF4_M    0xFFFFFFFF  // Transmit Buffer 4
-#define MCASP_TXBUF4_XBUF4_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF5 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF5_XBUF5_M    0xFFFFFFFF  // Transmit Buffer 5
-#define MCASP_TXBUF5_XBUF5_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF6 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF6_XBUF6_M    0xFFFFFFFF  // Transmit Buffer 6
-#define MCASP_TXBUF6_XBUF6_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF7 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF7_XBUF7_M    0xFFFFFFFF  // Transmit Buffer 7
-#define MCASP_TXBUF7_XBUF7_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF8 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF8_XBUF8_M    0xFFFFFFFF  // Transmit Buffer 8
-#define MCASP_TXBUF8_XBUF8_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF9 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF9_XBUF9_M    0xFFFFFFFF  // Transmit Buffer 9
-#define MCASP_TXBUF9_XBUF9_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF10 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF10_XBUF10_M  0xFFFFFFFF  // Transmit Buffer 10
-#define MCASP_TXBUF10_XBUF10_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF11 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF11_XBUF11_M  0xFFFFFFFF  // Transmit Buffer 11
-#define MCASP_TXBUF11_XBUF11_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF12 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF12_XBUF12_M  0xFFFFFFFF  // Transmit Buffer 12
-#define MCASP_TXBUF12_XBUF12_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF13 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF13_XBUF13_M  0xFFFFFFFF  // Transmit Buffer 13
-#define MCASP_TXBUF13_XBUF13_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF14 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF14_XBUF14_M  0xFFFFFFFF  // Transmit Buffer 14
-#define MCASP_TXBUF14_XBUF14_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF15 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF15_XBUF15_M  0xFFFFFFFF  // Transmit Buffer 15
-#define MCASP_TXBUF15_XBUF15_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF0 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF0_RBUF0_M    0xFFFFFFFF  // Receive Buffer 0
-#define MCASP_RXBUF0_RBUF0_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF1 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF1_RBUF1_M    0xFFFFFFFF  // Receive Buffer 1
-#define MCASP_RXBUF1_RBUF1_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF2 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF2_RBUF2_M    0xFFFFFFFF  // Receive Buffer 2
-#define MCASP_RXBUF2_RBUF2_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF3 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF3_RBUF3_M    0xFFFFFFFF  // Receive Buffer 3
-#define MCASP_RXBUF3_RBUF3_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF4 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF4_RBUF4_M    0xFFFFFFFF  // Receive Buffer 4
-#define MCASP_RXBUF4_RBUF4_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF5 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF5_RBUF5_M    0xFFFFFFFF  // Receive Buffer 5
-#define MCASP_RXBUF5_RBUF5_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF6 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF6_RBUF6_M    0xFFFFFFFF  // Receive Buffer 6
-#define MCASP_RXBUF6_RBUF6_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF7 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF7_RBUF7_M    0xFFFFFFFF  // Receive Buffer 7
-#define MCASP_RXBUF7_RBUF7_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF8 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF8_RBUF8_M    0xFFFFFFFF  // Receive Buffer 8
-#define MCASP_RXBUF8_RBUF8_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF9 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF9_RBUF9_M    0xFFFFFFFF  // Receive Buffer 9
-#define MCASP_RXBUF9_RBUF9_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF10 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF10_RBUF10_M  0xFFFFFFFF  // Receive Buffer 10
-#define MCASP_RXBUF10_RBUF10_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF11 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF11_RBUF11_M  0xFFFFFFFF  // Receive Buffer 11
-#define MCASP_RXBUF11_RBUF11_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF12 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF12_RBUF12_M  0xFFFFFFFF  // Receive Buffer 12
-#define MCASP_RXBUF12_RBUF12_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF13 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF13_RBUF13_M  0xFFFFFFFF  // Receive Buffer 13
-#define MCASP_RXBUF13_RBUF13_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF14 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF14_RBUF14_M  0xFFFFFFFF  // Receive Buffer 14
-#define MCASP_RXBUF14_RBUF14_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF15 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF15_RBUF15_M  0xFFFFFFFF  // Receive Buffer 15
-#define MCASP_RXBUF15_RBUF15_S  0
-
-
-
-#endif // __HW_MCASP_H__
diff --git a/ports/cc3200/hal/inc/hw_mcspi.h b/ports/cc3200/hal/inc/hw_mcspi.h
deleted file mode 100644
index 079e4b6b67..0000000000
--- a/ports/cc3200/hal/inc/hw_mcspi.h
+++ /dev/null
@@ -1,1745 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MCSPI_H__
-#define __HW_MCSPI_H__
-
-//*****************************************************************************
-//
-// The following are defines for the MCSPI register offsets.
-//
-//*****************************************************************************
-#define MCSPI_O_HL_REV          0x00000000  // IP Revision Identifier (X.Y.R)
-                                            // Used by software to track
-                                            // features bugs and compatibility
-#define MCSPI_O_HL_HWINFO       0x00000004  // Information about the IP
-                                            // module's hardware configuration
-                                            // i.e. typically the module's HDL
-                                            // generics (if any). Actual field
-                                            // format and encoding is up to the
-                                            // module's designer to decide.
-#define MCSPI_O_HL_SYSCONFIG    0x00000010  // 0x4402 1010 0x4402 2010 Clock
-                                            // management configuration
-#define MCSPI_O_REVISION        0x00000100  // 0x4402 1100 0x4402 2100 This
-                                            // register contains the hard coded
-                                            // RTL revision number.
-#define MCSPI_O_SYSCONFIG       0x00000110  // 0x4402 1110 0x4402 2110 This
-                                            // register allows controlling
-                                            // various parameters of the OCP
-                                            // interface.
-#define MCSPI_O_SYSSTATUS       0x00000114  // 0x4402 1114 0x4402 2114 This
-                                            // register provides status
-                                            // information about the module
-                                            // excluding the interrupt status
-                                            // information
-#define MCSPI_O_IRQSTATUS       0x00000118  // 0x4402 1118 0x4402 2118 The
-                                            // interrupt status regroups all the
-                                            // status of the module internal
-                                            // events that can generate an
-                                            // interrupt
-#define MCSPI_O_IRQENABLE       0x0000011C  // 0x4402 111C 0x4402 211C This
-                                            // register allows to enable/disable
-                                            // the module internal sources of
-                                            // interrupt on an event-by-event
-                                            // basis.
-#define MCSPI_O_WAKEUPENABLE    0x00000120  // 0x4402 1120 0x4402 2120 The
-                                            // wakeup enable register allows to
-                                            // enable/disable the module
-                                            // internal sources of wakeup on
-                                            // event-by-event basis.
-#define MCSPI_O_SYST            0x00000124  // 0x4402 1124 0x4402 2124 This
-                                            // register is used to check the
-                                            // correctness of the system
-                                            // interconnect either internally to
-                                            // peripheral bus or externally to
-                                            // device IO pads when the module is
-                                            // configured in system test
-                                            // (SYSTEST) mode.
-#define MCSPI_O_MODULCTRL       0x00000128  // 0x4402 1128 0x4402 2128 This
-                                            // register is dedicated to the
-                                            // configuration of the serial port
-                                            // interface.
-#define MCSPI_O_CH0CONF         0x0000012C  // 0x4402 112C 0x4402 212C This
-                                            // register is dedicated to the
-                                            // configuration of the channel 0
-#define MCSPI_O_CH0STAT         0x00000130  // 0x4402 1130 0x4402 2130 This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 0
-#define MCSPI_O_CH0CTRL         0x00000134  // 0x4402 1134 0x4402 2134 This
-                                            // register is dedicated to enable
-                                            // the channel 0
-#define MCSPI_O_TX0             0x00000138  // 0x4402 1138 0x4402 2138 This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX0             0x0000013C  // 0x4402 113C 0x4402 213C This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_CH1CONF         0x00000140  // 0x4402 1140 0x4402 2140 This
-                                            // register is dedicated to the
-                                            // configuration of the channel.
-#define MCSPI_O_CH1STAT         0x00000144  // 0x4402 1144 0x4402 2144 This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 1
-#define MCSPI_O_CH1CTRL         0x00000148  // 0x4402 1148 0x4402 2148 This
-                                            // register is dedicated to enable
-                                            // the channel 1
-#define MCSPI_O_TX1             0x0000014C  // 0x4402 114C 0x4402 214C This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX1             0x00000150  // 0x4402 1150 0x4402 2150 This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_CH2CONF         0x00000154  // 0x4402 1154 0x4402 2154 This
-                                            // register is dedicated to the
-                                            // configuration of the channel 2
-#define MCSPI_O_CH2STAT         0x00000158  // 0x4402 1158 0x4402 2158 This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 2
-#define MCSPI_O_CH2CTRL         0x0000015C  // 0x4402 115C 0x4402 215C This
-                                            // register is dedicated to enable
-                                            // the channel 2
-#define MCSPI_O_TX2             0x00000160  // 0x4402 1160 0x4402 2160 This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX2             0x00000164  // 0x4402 1164 0x4402 2164 This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_CH3CONF         0x00000168  // 0x4402 1168 0x4402 2168 This
-                                            // register is dedicated to the
-                                            // configuration of the channel 3
-#define MCSPI_O_CH3STAT         0x0000016C  // 0x4402 116C 0x4402 216C This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 3
-#define MCSPI_O_CH3CTRL         0x00000170  // 0x4402 1170 0x4402 2170 This
-                                            // register is dedicated to enable
-                                            // the channel 3
-#define MCSPI_O_TX3             0x00000174  // 0x4402 1174 0x4402 2174 This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX3             0x00000178  // 0x4402 1178 0x4402 2178 This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_XFERLEVEL       0x0000017C  // 0x4402 117C 0x4402 217C This
-                                            // register provides transfer levels
-                                            // needed while using FIFO buffer
-                                            // during transfer.
-#define MCSPI_O_DAFTX           0x00000180  // 0x4402 1180 0x4402 2180 This
-                                            // register contains the SPI words
-                                            // to transmit on the serial link
-                                            // when FIFO used and DMA address is
-                                            // aligned on 256 bit.This register
-                                            // is an image of one of MCSPI_TX(i)
-                                            // register corresponding to the
-                                            // channel which have its FIFO
-                                            // enabled.
-#define MCSPI_O_DAFRX           0x000001A0  // 0x4402 11A0 0x4402 21A0 This
-                                            // register contains the SPI words
-                                            // to received on the serial link
-                                            // when FIFO used and DMA address is
-                                            // aligned on 256 bit.This register
-                                            // is an image of one of MCSPI_RX(i)
-                                            // register corresponding to the
-                                            // channel which have its FIFO
-                                            // enabled.
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_HL_REV register.
-//
-//******************************************************************************
-#define MCSPI_HL_REV_SCHEME_M   0xC0000000
-#define MCSPI_HL_REV_SCHEME_S   30
-#define MCSPI_HL_REV_RSVD_M     0x30000000  // Reserved These bits are
-                                            // initialized to zero and writes to
-                                            // them are ignored.
-#define MCSPI_HL_REV_RSVD_S     28
-#define MCSPI_HL_REV_FUNC_M     0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define MCSPI_HL_REV_FUNC_S     16
-#define MCSPI_HL_REV_R_RTL_M    0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define MCSPI_HL_REV_R_RTL_S    11
-#define MCSPI_HL_REV_X_MAJOR_M  0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-#define MCSPI_HL_REV_X_MAJOR_S  8
-#define MCSPI_HL_REV_CUSTOM_M   0x000000C0
-#define MCSPI_HL_REV_CUSTOM_S   6
-#define MCSPI_HL_REV_Y_MINOR_M  0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-#define MCSPI_HL_REV_Y_MINOR_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_HL_HWINFO register.
-//
-//******************************************************************************
-#define MCSPI_HL_HWINFO_RETMODE 0x00000040
-#define MCSPI_HL_HWINFO_FFNBYTE_M \
-                                0x0000003E
-
-#define MCSPI_HL_HWINFO_FFNBYTE_S 1
-#define MCSPI_HL_HWINFO_USEFIFO 0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MCSPI_O_HL_SYSCONFIG register.
-//
-//******************************************************************************
-#define MCSPI_HL_SYSCONFIG_IDLEMODE_M \
-                                0x0000000C  // Configuration of the local
-                                            // target state management mode. By
-                                            // definition target can handle
-                                            // read/write transaction as long as
-                                            // it is out of IDLE state. 0x0
-                                            // Force-idle mode: local target's
-                                            // idle state follows (acknowledges)
-                                            // the system's idle requests
-                                            // unconditionally i.e. regardless
-                                            // of the IP module's internal
-                                            // requirements.Backup mode for
-                                            // debug only. 0x1 No-idle mode:
-                                            // local target never enters idle
-                                            // state.Backup mode for debug only.
-                                            // 0x2 Smart-idle mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module shall not
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events. 0x3 "Smart-idle
-                                            // wakeup-capable mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module may
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events when in idle state.Mode is
-                                            // only relevant if the appropriate
-                                            // IP module ""swakeup"" output(s)
-                                            // is (are) implemented."
-
-#define MCSPI_HL_SYSCONFIG_IDLEMODE_S 2
-#define MCSPI_HL_SYSCONFIG_FREEEMU \
-                                0x00000002  // Sensitivity to emulation (debug)
-                                            // suspend input signal. 0 IP module
-                                            // is sensitive to emulation suspend
-                                            // 1 IP module is not sensitive to
-                                            // emulation suspend
-
-#define MCSPI_HL_SYSCONFIG_SOFTRESET \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_REVISION register.
-//
-//******************************************************************************
-#define MCSPI_REVISION_REV_M    0x000000FF  // IP revision [7:4] Major revision
-                                            // [3:0] Minor revision Examples:
-                                            // 0x10 for 1.0 0x21 for 2.1
-#define MCSPI_REVISION_REV_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define MCSPI_SYSCONFIG_CLOCKACTIVITY_M \
-                                0x00000300  // Clocks activity during wake up
-                                            // mode period 0x0 OCP and
-                                            // Functional clocks may be switched
-                                            // off. 0x1 OCP clock is maintained.
-                                            // Functional clock may be
-                                            // switched-off. 0x2 Functional
-                                            // clock is maintained. OCP clock
-                                            // may be switched-off. 0x3 OCP and
-                                            // Functional clocks are maintained.
-
-#define MCSPI_SYSCONFIG_CLOCKACTIVITY_S 8
-#define MCSPI_SYSCONFIG_SIDLEMODE_M \
-                                0x00000018  // Power management 0x0 If an idle
-                                            // request is detected the McSPI
-                                            // acknowledges it unconditionally
-                                            // and goes in Inactive mode.
-                                            // Interrupt DMA requests and wake
-                                            // up lines are unconditionally
-                                            // de-asserted and the module wakeup
-                                            // capability is deactivated even if
-                                            // the bit
-                                            // MCSPI_SYSCONFIG[EnaWakeUp] is
-                                            // set. 0x1 If an idle request is
-                                            // detected the request is ignored
-                                            // and the module does not switch to
-                                            // wake up mode and keeps on
-                                            // behaving normally. 0x2 If an idle
-                                            // request is detected the module
-                                            // will switch to idle mode based on
-                                            // its internal activity. The wake
-                                            // up capability cannot be used. 0x3
-                                            // If an idle request is detected
-                                            // the module will switch to idle
-                                            // mode based on its internal
-                                            // activity and the wake up
-                                            // capability can be used if the bit
-                                            // MCSPI_SYSCONFIG[EnaWakeUp] is
-                                            // set.
-
-#define MCSPI_SYSCONFIG_SIDLEMODE_S 3
-#define MCSPI_SYSCONFIG_ENAWAKEUP \
-                                0x00000004  // WakeUp feature control 0 WakeUp
-                                            // capability is disabled 1 WakeUp
-                                            // capability is enabled
-
-#define MCSPI_SYSCONFIG_SOFTRESET \
-                                0x00000002  // Software reset. During reads it
-                                            // always returns 0. 0 (write)
-                                            // Normal mode 1 (write) Set this
-                                            // bit to 1 to trigger a module
-                                            // reset.The bit is automatically
-                                            // reset by the hardware.
-
-#define MCSPI_SYSCONFIG_AUTOIDLE \
-                                0x00000001  // Internal OCP Clock gating
-                                            // strategy 0 OCP clock is
-                                            // free-running 1 Automatic OCP
-                                            // clock gating strategy is applied
-                                            // based on the OCP interface
-                                            // activity
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define MCSPI_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define MCSPI_IRQSTATUS_EOW     0x00020000
-#define MCSPI_IRQSTATUS_WKS     0x00010000
-#define MCSPI_IRQSTATUS_RX3_FULL \
-                                0x00004000
-
-#define MCSPI_IRQSTATUS_TX3_UNDERFLOW \
-                                0x00002000
-
-#define MCSPI_IRQSTATUS_TX3_EMPTY \
-                                0x00001000
-
-#define MCSPI_IRQSTATUS_RX2_FULL \
-                                0x00000400
-
-#define MCSPI_IRQSTATUS_TX2_UNDERFLOW \
-                                0x00000200
-
-#define MCSPI_IRQSTATUS_TX2_EMPTY \
-                                0x00000100
-
-#define MCSPI_IRQSTATUS_RX1_FULL \
-                                0x00000040
-
-#define MCSPI_IRQSTATUS_TX1_UNDERFLOW \
-                                0x00000020
-
-#define MCSPI_IRQSTATUS_TX1_EMPTY \
-                                0x00000010
-
-#define MCSPI_IRQSTATUS_RX0_OVERFLOW \
-                                0x00000008
-
-#define MCSPI_IRQSTATUS_RX0_FULL \
-                                0x00000004
-
-#define MCSPI_IRQSTATUS_TX0_UNDERFLOW \
-                                0x00000002
-
-#define MCSPI_IRQSTATUS_TX0_EMPTY \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_IRQENABLE register.
-//
-//******************************************************************************
-#define MCSPI_IRQENABLE_EOW_ENABLE \
-                                0x00020000  // End of Word count Interrupt
-                                            // Enable. 0 Interrupt disabled 1
-                                            // Interrupt enabled
-
-#define MCSPI_IRQENABLE_WKE     0x00010000  // Wake Up event interrupt Enable
-                                            // in slave mode when an active
-                                            // control signal is detected on the
-                                            // SPIEN line programmed in the
-                                            // field MCSPI_CH0CONF[SPIENSLV] 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-#define MCSPI_IRQENABLE_RX3_FULL_ENABLE \
-                                0x00004000  // Receiver register Full Interrupt
-                                            // Enable. Ch 3 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX3_UNDERFLOW_ENABLE \
-                                0x00002000  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 3 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX3_EMPTY_ENABLE \
-                                0x00001000  // Transmitter register Empty
-                                            // Interrupt Enable. Ch3 0 Interrupt
-                                            // disabled 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_RX2_FULL_ENABLE \
-                                0x00000400  // Receiver register Full Interrupt
-                                            // Enable. Ch 2 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX2_UNDERFLOW_ENABLE \
-                                0x00000200  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 2 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX2_EMPTY_ENABLE \
-                                0x00000100  // Transmitter register Empty
-                                            // Interrupt Enable. Ch 2 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_RX1_FULL_ENABLE \
-                                0x00000040  // Receiver register Full Interrupt
-                                            // Enable. Ch 1 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX1_UNDERFLOW_ENABLE \
-                                0x00000020  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 1 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX1_EMPTY_ENABLE \
-                                0x00000010  // Transmitter register Empty
-                                            // Interrupt Enable. Ch 1 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_RX0_OVERFLOW_ENABLE \
-                                0x00000008  // Receiver register Overflow
-                                            // Interrupt Enable. Ch 0 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_RX0_FULL_ENABLE \
-                                0x00000004  // Receiver register Full Interrupt
-                                            // Enable. Ch 0 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX0_UNDERFLOW_ENABLE \
-                                0x00000002  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 0 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX0_EMPTY_ENABLE \
-                                0x00000001  // Transmitter register Empty
-                                            // Interrupt Enable. Ch 0 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MCSPI_O_WAKEUPENABLE register.
-//
-//******************************************************************************
-#define MCSPI_WAKEUPENABLE_WKEN 0x00000001  // WakeUp functionality in slave
-                                            // mode when an active control
-                                            // signal is detected on the SPIEN
-                                            // line programmed in the field
-                                            // MCSPI_CH0CONF[SPIENSLV] 0 The
-                                            // event is not allowed to wakeup
-                                            // the system even if the global
-                                            // control bit
-                                            // MCSPI_SYSCONF[EnaWakeUp] is set.
-                                            // 1 The event is allowed to wakeup
-                                            // the system if the global control
-                                            // bit MCSPI_SYSCONF[EnaWakeUp] is
-                                            // set.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_SYST register.
-//
-//******************************************************************************
-#define MCSPI_SYST_SSB          0x00000800  // Set status bit 0 No action.
-                                            // Writing 0 does not clear already
-                                            // set status bits; This bit must be
-                                            // cleared prior attempting to clear
-                                            // a status bit of the
-                                            //  register. 1
-                                            // Force to 1 all status bits of
-                                            // MCSPI_IRQSTATUS register. Writing
-                                            // 1 into this bit sets to 1 all
-                                            // status bits contained in the
-                                            //  register.
-#define MCSPI_SYST_SPIENDIR     0x00000400  // Set the direction of the
-                                            // SPIEN[3:0] lines and SPICLK line
-                                            // 0 output (as in master mode) 1
-                                            // input (as in slave mode)
-#define MCSPI_SYST_SPIDATDIR1   0x00000200  // Set the direction of the
-                                            // SPIDAT[1] 0 output 1 input
-#define MCSPI_SYST_SPIDATDIR0   0x00000100  // Set the direction of the
-                                            // SPIDAT[0] 0 output 1 input
-#define MCSPI_SYST_WAKD         0x00000080  // SWAKEUP output (signal data
-                                            // value of internal signal to
-                                            // system). The signal is driven
-                                            // high or low according to the
-                                            // value written into this register
-                                            // bit. 0 The pin is driven low. 1
-                                            // The pin is driven high.
-#define MCSPI_SYST_SPICLK       0x00000040  // SPICLK line (signal data value)
-                                            // If MCSPI_SYST[SPIENDIR] = 1
-                                            // (input mode direction) this bit
-                                            // returns the value on the CLKSPI
-                                            // line (high or low) and a write
-                                            // into this bit has no effect. If
-                                            // MCSPI_SYST[SPIENDIR] = 0 (output
-                                            // mode direction) the CLKSPI line
-                                            // is driven high or low according
-                                            // to the value written into this
-                                            // register.
-#define MCSPI_SYST_SPIDAT_1     0x00000020  // SPIDAT[1] line (signal data
-                                            // value) If MCSPI_SYST[SPIDATDIR1]
-                                            // = 0 (output mode direction) the
-                                            // SPIDAT[1] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIDATDIR1] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIDAT[1] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIDAT_0     0x00000010  // SPIDAT[0] line (signal data
-                                            // value) If MCSPI_SYST[SPIDATDIR0]
-                                            // = 0 (output mode direction) the
-                                            // SPIDAT[0] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIDATDIR0] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIDAT[0] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_3      0x00000008  // SPIEN[3] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[3] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[3] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_2      0x00000004  // SPIEN[2] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[2] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[2] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_1      0x00000002  // SPIEN[1] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[1] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[1] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_0      0x00000001  // SPIEN[0] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[0] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[0] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_MODULCTRL register.
-//
-//******************************************************************************
-#define MCSPI_MODULCTRL_FDAA    0x00000100  // FIFO DMA Address 256-bit aligned
-                                            // This register is used when a FIFO
-                                            // is managed by the module and DMA
-                                            // connected to the controller
-                                            // provides only 256 bit aligned
-                                            // address. If this bit is set the
-                                            // enabled channel which uses the
-                                            // FIFO has its datas managed
-                                            // through MCSPI_DAFTX and
-                                            // MCSPI_DAFRX registers instead of
-                                            // MCSPI_TX(i) and MCSPI_RX(i)
-                                            // registers. 0 FIFO data managed by
-                                            // MCSPI_TX(i) and MCSPI_RX(i)
-                                            // registers. 1 FIFO data managed by
-                                            // MCSPI_DAFTX and MCSPI_DAFRX
-                                            // registers.
-#define MCSPI_MODULCTRL_MOA     0x00000080  // Multiple word ocp access: This
-                                            // register can only be used when a
-                                            // channel is enabled using a FIFO.
-                                            // It allows the system to perform
-                                            // multiple SPI word access for a
-                                            // single 32-bit OCP word access.
-                                            // This is possible for WL < 16. 0
-                                            // Multiple word access disabled 1
-                                            // Multiple word access enabled with
-                                            // FIFO
-#define MCSPI_MODULCTRL_INITDLY_M \
-                                0x00000070  // Initial spi delay for first
-                                            // transfer: This register is an
-                                            // option only available in SINGLE
-                                            // master mode The controller waits
-                                            // for a delay to transmit the first
-                                            // spi word after channel enabled
-                                            // and corresponding TX register
-                                            // filled. This Delay is based on
-                                            // SPI output frequency clock No
-                                            // clock output provided to the
-                                            // boundary and chip select is not
-                                            // active in 4 pin mode within this
-                                            // period. 0x0 No delay for first
-                                            // spi transfer. 0x1 The controller
-                                            // wait 4 spi bus clock 0x2 The
-                                            // controller wait 8 spi bus clock
-                                            // 0x3 The controller wait 16 spi
-                                            // bus clock 0x4 The controller wait
-                                            // 32 spi bus clock
-
-#define MCSPI_MODULCTRL_INITDLY_S 4
-#define MCSPI_MODULCTRL_SYSTEM_TEST \
-                                0x00000008  // Enables the system test mode 0
-                                            // Functional mode 1 System test
-                                            // mode (SYSTEST)
-
-#define MCSPI_MODULCTRL_MS      0x00000004  // Master/ Slave 0 Master - The
-                                            // module generates the SPICLK and
-                                            // SPIEN[3:0] 1 Slave - The module
-                                            // receives the SPICLK and
-                                            // SPIEN[3:0]
-#define MCSPI_MODULCTRL_PIN34   0x00000002  // Pin mode selection: This
-                                            // register is used to configure the
-                                            // SPI pin mode in master or slave
-                                            // mode. If asserted the controller
-                                            // only use SIMOSOMI and SPICLK
-                                            // clock pin for spi transfers. 0
-                                            // SPIEN is used as a chip select. 1
-                                            // SPIEN is not used.In this mode
-                                            // all related option to chip select
-                                            // have no meaning.
-#define MCSPI_MODULCTRL_SINGLE  0x00000001  // Single channel / Multi Channel
-                                            // (master mode only) 0 More than
-                                            // one channel will be used in
-                                            // master mode. 1 Only one channel
-                                            // will be used in master mode. This
-                                            // bit must be set in Force SPIEN
-                                            // mode.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH0CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH0CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH0CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH0CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH0CONF_TCS0_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH0CONF_TCS0_S    25
-#define MCSPI_CH0CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH0CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH0CONF[SBPOL]
-#define MCSPI_CH0CONF_SPIENSLV_M \
-                                0x00600000  // Channel 0 only and slave mode
-                                            // only: SPI slave select signal
-                                            // detection. Reserved bits for
-                                            // other cases. 0x0 Detection
-                                            // enabled only on SPIEN[0] 0x1
-                                            // Detection enabled only on
-                                            // SPIEN[1] 0x2 Detection enabled
-                                            // only on SPIEN[2] 0x3 Detection
-                                            // enabled only on SPIEN[3]
-
-#define MCSPI_CH0CONF_SPIENSLV_S 21
-#define MCSPI_CH0CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH0CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH0CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH0CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH0CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH0CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH0CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH0CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH0CONF_TRM_S     12
-#define MCSPI_CH0CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH0CONF_WL_S      7
-#define MCSPI_CH0CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH0CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH0CONF_CLKD_S    2
-#define MCSPI_CH0CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH0CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH0STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH0STAT_RXFFF     0x00000040
-#define MCSPI_CH0STAT_RXFFE     0x00000020
-#define MCSPI_CH0STAT_TXFFF     0x00000010
-#define MCSPI_CH0STAT_TXFFE     0x00000008
-#define MCSPI_CH0STAT_EOT       0x00000004
-#define MCSPI_CH0STAT_TXS       0x00000002
-#define MCSPI_CH0STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH0CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH0CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH0CTRL_EXTCLK_S  8
-#define MCSPI_CH0CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX0 register.
-//
-//******************************************************************************
-#define MCSPI_TX0_TDATA_M       0xFFFFFFFF  // Channel 0 Data to transmit
-#define MCSPI_TX0_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX0 register.
-//
-//******************************************************************************
-#define MCSPI_RX0_RDATA_M       0xFFFFFFFF  // Channel 0 Received Data
-#define MCSPI_RX0_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH1CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH1CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH1CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH1CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH1CONF_TCS1_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH1CONF_TCS1_S    25
-#define MCSPI_CH1CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH1CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH1CONF[SBPOL]
-#define MCSPI_CH1CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH1CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH1CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH1CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH1CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH1CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH1CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH1CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH1CONF_TRM_S     12
-#define MCSPI_CH1CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH1CONF_WL_S      7
-#define MCSPI_CH1CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH1CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH1CONF_CLKD_S    2
-#define MCSPI_CH1CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH1CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH1STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH1STAT_RXFFF     0x00000040
-#define MCSPI_CH1STAT_RXFFE     0x00000020
-#define MCSPI_CH1STAT_TXFFF     0x00000010
-#define MCSPI_CH1STAT_TXFFE     0x00000008
-#define MCSPI_CH1STAT_EOT       0x00000004
-#define MCSPI_CH1STAT_TXS       0x00000002
-#define MCSPI_CH1STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH1CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH1CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH1CTRL_EXTCLK_S  8
-#define MCSPI_CH1CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX1 register.
-//
-//******************************************************************************
-#define MCSPI_TX1_TDATA_M       0xFFFFFFFF  // Channel 1 Data to transmit
-#define MCSPI_TX1_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX1 register.
-//
-//******************************************************************************
-#define MCSPI_RX1_RDATA_M       0xFFFFFFFF  // Channel 1 Received Data
-#define MCSPI_RX1_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH2CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH2CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH2CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH2CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH2CONF_TCS2_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH2CONF_TCS2_S    25
-#define MCSPI_CH2CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH2CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH2CONF[SBPOL]
-#define MCSPI_CH2CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH2CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH2CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH2CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH2CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH2CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH2CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH2CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH2CONF_TRM_S     12
-#define MCSPI_CH2CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH2CONF_WL_S      7
-#define MCSPI_CH2CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH2CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH2CONF_CLKD_S    2
-#define MCSPI_CH2CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH2CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH2STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH2STAT_RXFFF     0x00000040
-#define MCSPI_CH2STAT_RXFFE     0x00000020
-#define MCSPI_CH2STAT_TXFFF     0x00000010
-#define MCSPI_CH2STAT_TXFFE     0x00000008
-#define MCSPI_CH2STAT_EOT       0x00000004
-#define MCSPI_CH2STAT_TXS       0x00000002
-#define MCSPI_CH2STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH2CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH2CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH2CTRL_EXTCLK_S  8
-#define MCSPI_CH2CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX2 register.
-//
-//******************************************************************************
-#define MCSPI_TX2_TDATA_M       0xFFFFFFFF  // Channel 2 Data to transmit
-#define MCSPI_TX2_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX2 register.
-//
-//******************************************************************************
-#define MCSPI_RX2_RDATA_M       0xFFFFFFFF  // Channel 2 Received Data
-#define MCSPI_RX2_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH3CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH3CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH3CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH3CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH3CONF_TCS3_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH3CONF_TCS3_S    25
-#define MCSPI_CH3CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH3CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH3CONF[SBPOL]
-#define MCSPI_CH3CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH3CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH3CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH3CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH3CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH3CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH3CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH3CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH3CONF_TRM_S     12
-#define MCSPI_CH3CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH3CONF_WL_S      7
-#define MCSPI_CH3CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH3CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH3CONF_CLKD_S    2
-#define MCSPI_CH3CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH3CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH3STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH3STAT_RXFFF     0x00000040
-#define MCSPI_CH3STAT_RXFFE     0x00000020
-#define MCSPI_CH3STAT_TXFFF     0x00000010
-#define MCSPI_CH3STAT_TXFFE     0x00000008
-#define MCSPI_CH3STAT_EOT       0x00000004
-#define MCSPI_CH3STAT_TXS       0x00000002
-#define MCSPI_CH3STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH3CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH3CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH3CTRL_EXTCLK_S  8
-#define MCSPI_CH3CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX3 register.
-//
-//******************************************************************************
-#define MCSPI_TX3_TDATA_M       0xFFFFFFFF  // Channel 3 Data to transmit
-#define MCSPI_TX3_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX3 register.
-//
-//******************************************************************************
-#define MCSPI_RX3_RDATA_M       0xFFFFFFFF  // Channel 3 Received Data
-#define MCSPI_RX3_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_XFERLEVEL register.
-//
-//******************************************************************************
-#define MCSPI_XFERLEVEL_WCNT_M  0xFFFF0000  // Spi word counterThis register
-                                            // holds the programmable value of
-                                            // number of SPI word to be
-                                            // transferred on channel which is
-                                            // using the FIFO buffer.When
-                                            // transfer had started a read back
-                                            // in this register returns the
-                                            // current SPI word transfer index.
-                                            // 0x0000 Counter not used 0x0001
-                                            // one word 0xFFFE 65534 spi word
-                                            // 0xFFFF 65535 spi word
-#define MCSPI_XFERLEVEL_WCNT_S  16
-#define MCSPI_XFERLEVEL_AFL_M   0x0000FF00  // Buffer Almost Full This register
-                                            // holds the programmable almost
-                                            // full level value used to
-                                            // determine almost full buffer
-                                            // condition. If the user wants an
-                                            // interrupt or a DMA read request
-                                            // to be issued during a receive
-                                            // operation when the data buffer
-                                            // holds at least n bytes then the
-                                            // buffer MCSPI_MODULCTRL[AFL] must
-                                            // be set with n-1.The size of this
-                                            // register is defined by the
-                                            // generic parameter FFNBYTE. 0x00
-                                            // one byte 0x01 2 bytes 0xFE
-                                            // 255bytes 0xFF 256bytes
-#define MCSPI_XFERLEVEL_AFL_S   8
-#define MCSPI_XFERLEVEL_AEL_M   0x000000FF  // Buffer Almost EmptyThis register
-                                            // holds the programmable almost
-                                            // empty level value used to
-                                            // determine almost empty buffer
-                                            // condition. If the user wants an
-                                            // interrupt or a DMA write request
-                                            // to be issued during a transmit
-                                            // operation when the data buffer is
-                                            // able to receive n bytes then the
-                                            // buffer MCSPI_MODULCTRL[AEL] must
-                                            // be set with n-1. 0x00 one byte
-                                            // 0x01 2 bytes 0xFE 255 bytes 0xFF
-                                            // 256bytes
-#define MCSPI_XFERLEVEL_AEL_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_DAFTX register.
-//
-//******************************************************************************
-#define MCSPI_DAFTX_DAFTDATA_M  0xFFFFFFFF  // FIFO Data to transmit with DMA
-                                            // 256 bit aligned address. "This
-                                            // Register is only is used when
-                                            // MCSPI_MODULCTRL[FDAA] is set to
-                                            // ""1"" and only one of the
-                                            // MCSPI_CH(i)CONF[FFEW] of enabled
-                                            // channels is set. If these
-                                            // conditions are not respected any
-                                            // access to this register return a
-                                            // null value."
-#define MCSPI_DAFTX_DAFTDATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_DAFRX register.
-//
-//******************************************************************************
-#define MCSPI_DAFRX_DAFRDATA_M  0xFFFFFFFF  // FIFO Data to transmit with DMA
-                                            // 256 bit aligned address. "This
-                                            // Register is only is used when
-                                            // MCSPI_MODULCTRL[FDAA] is set to
-                                            // ""1"" and only one of the
-                                            // MCSPI_CH(i)CONF[FFEW] of enabled
-                                            // channels is set. If these
-                                            // conditions are not respected any
-                                            // access to this register return a
-                                            // null value."
-#define MCSPI_DAFRX_DAFRDATA_S  0
-
-
-
-#endif // __HW_MCSPI_H__
diff --git a/ports/cc3200/hal/inc/hw_memmap.h b/ports/cc3200/hal/inc/hw_memmap.h
deleted file mode 100644
index 244905dd20..0000000000
--- a/ports/cc3200/hal/inc/hw_memmap.h
+++ /dev/null
@@ -1,84 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MEMMAP_H__
-#define __HW_MEMMAP_H__
-
-//*****************************************************************************
-//
-// The following are defines for the base address of the memories and
-// peripherals on the slave_1 interface.
-//
-//*****************************************************************************
-#define FLASH_BASE              0x01000000
-#define SRAM_BASE               0x20000000
-#define WDT_BASE                0x40000000
-#define GPIOA0_BASE             0x40004000
-#define GPIOA1_BASE             0x40005000
-#define GPIOA2_BASE             0x40006000
-#define GPIOA3_BASE             0x40007000
-#define GPIOA4_BASE             0x40024000 
-#define UARTA0_BASE             0x4000C000
-#define UARTA1_BASE             0x4000D000
-#define I2CA0_BASE              0x40020000
-#define TIMERA0_BASE            0x40030000
-#define TIMERA1_BASE            0x40031000
-#define TIMERA2_BASE            0x40032000
-#define TIMERA3_BASE            0x40033000
-#define STACKDIE_CTRL_BASE      0x400F5000
-#define COMMON_REG_BASE         0x400F7000
-#define FLASH_CONTROL_BASE      0x400FD000
-#define SYSTEM_CONTROL_BASE     0x400FE000
-#define UDMA_BASE               0x400FF000
-#define SDHOST_BASE             0x44010000
-#define CAMERA_BASE             0x44018000
-#define I2S_BASE                0x4401C000
-#define SSPI_BASE               0x44020000
-#define GSPI_BASE               0x44021000
-#define LSPI_BASE               0x44022000
-#define ARCM_BASE               0x44025000
-#define APPS_CONFIG_BASE        0x44026000
-#define GPRCM_BASE              0x4402D000
-#define OCP_SHARED_BASE         0x4402E000
-#define ADC_BASE                0x4402E800
-#define HIB1P2_BASE             0x4402F000
-#define HIB3P3_BASE             0x4402F800
-#define DTHE_BASE               0x44030000
-#define SHAMD5_BASE             0x44035000
-#define AES_BASE                0x44037000
-#define DES_BASE                0x44039000
-
-
-#endif // __HW_MEMMAP_H__
diff --git a/ports/cc3200/hal/inc/hw_mmchs.h b/ports/cc3200/hal/inc/hw_mmchs.h
deleted file mode 100644
index 3096d13a99..0000000000
--- a/ports/cc3200/hal/inc/hw_mmchs.h
+++ /dev/null
@@ -1,1919 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MMCHS_H__
-#define __HW_MMCHS_H__
-
-//*****************************************************************************
-//
-// The following are defines for the MMCHS register offsets.
-//
-//*****************************************************************************
-#define MMCHS_O_HL_REV          0x00000000  // IP Revision Identifier (X.Y.R)
-                                            // Used by software to track
-                                            // features bugs and compatibility
-#define MMCHS_O_HL_HWINFO       0x00000004  // Information about the IP
-                                            // module's hardware configuration
-                                            // i.e. typically the module's HDL
-                                            // generics (if any). Actual field
-                                            // format and encoding is up to the
-                                            // module's designer to decide.
-#define MMCHS_O_HL_SYSCONFIG    0x00000010  // Clock management configuration
-#define MMCHS_O_SYSCONFIG       0x00000110  // System Configuration Register
-                                            // This register allows controlling
-                                            // various parameters of the OCP
-                                            // interface.
-#define MMCHS_O_SYSSTATUS       0x00000114  // System Status Register This
-                                            // register provides status
-                                            // information about the module
-                                            // excluding the interrupt status
-                                            // information
-#define MMCHS_O_CSRE            0x00000124  // Card status response error This
-                                            // register enables the host
-                                            // controller to detect card status
-                                            // errors of response type R1 R1b
-                                            // for all cards and of R5 R5b and
-                                            // R6 response for cards types SD or
-                                            // SDIO. When a bit MMCHS_CSRE[i] is
-                                            // set to 1 if the corresponding bit
-                                            // at the same position in the
-                                            // response MMCHS_RSP0[i] is set to
-                                            // 1 the host controller indicates a
-                                            // card error (MMCHS_STAT[CERR])
-                                            // interrupt status to avoid the
-                                            // host driver reading the response
-                                            // register (MMCHS_RSP0). Note: No
-                                            // automatic card error detection
-                                            // for autoCMD12 is implemented; the
-                                            // host system has to check
-                                            // autoCMD12 response register
-                                            // (MMCHS_RESP76) for possible card
-                                            // errors.
-#define MMCHS_O_SYSTEST         0x00000128  // System Test register This
-                                            // register is used to control the
-                                            // signals that connect to I/O pins
-                                            // when the module is configured in
-                                            // system test (SYSTEST) mode for
-                                            // boundary connectivity
-                                            // verification. Note: In SYSTEST
-                                            // mode a write into MMCHS_CMD
-                                            // register will not start a
-                                            // transfer. The buffer behaves as a
-                                            // stack accessible only by the
-                                            // local host (push and pop
-                                            // operations). In this mode the
-                                            // Transfer Block Size
-                                            // (MMCHS_BLK[BLEN]) and the Blocks
-                                            // count for current transfer
-                                            // (MMCHS_BLK[NBLK]) are needed to
-                                            // generate a Buffer write ready
-                                            // interrupt (MMCHS_STAT[BWR]) or a
-                                            // Buffer read ready interrupt
-                                            // (MMCHS_STAT[BRR]) and DMA
-                                            // requests if enabled.
-#define MMCHS_O_CON             0x0000012C  // Configuration register This
-                                            // register is used: - to select the
-                                            // functional mode or the SYSTEST
-                                            // mode for any card. - to send an
-                                            // initialization sequence to any
-                                            // card. - to enable the detection
-                                            // on DAT[1] of a card interrupt for
-                                            // SDIO cards only. and also to
-                                            // configure : - specific data and
-                                            // command transfers for MMC cards
-                                            // only. - the parameters related to
-                                            // the card detect and write protect
-                                            // input signals.
-#define MMCHS_O_PWCNT           0x00000130  // Power counter register This
-                                            // register is used to program a mmc
-                                            // counter to delay command
-                                            // transfers after activating the
-                                            // PAD power this value depends on
-                                            // PAD characteristics and voltage.
-#define MMCHS_O_BLK             0x00000204  // Transfer Length Configuration
-                                            // register MMCHS_BLK[BLEN] is the
-                                            // block size register.
-                                            // MMCHS_BLK[NBLK] is the block
-                                            // count register. This register
-                                            // shall be used for any card.
-#define MMCHS_O_ARG             0x00000208  // Command argument Register This
-                                            // register contains command
-                                            // argument specified as bit 39-8 of
-                                            // Command-Format These registers
-                                            // must be initialized prior to
-                                            // sending the command itself to the
-                                            // card (write action into the
-                                            // register MMCHS_CMD register).
-                                            // Only exception is for a command
-                                            // index specifying stuff bits in
-                                            // arguments making a write
-                                            // unnecessary.
-#define MMCHS_O_CMD             0x0000020C  // Command and transfer mode
-                                            // register MMCHS_CMD[31:16] = the
-                                            // command register MMCHS_CMD[15:0]
-                                            // = the transfer mode. This
-                                            // register configures the data and
-                                            // command transfers. A write into
-                                            // the most significant byte send
-                                            // the command. A write into
-                                            // MMCHS_CMD[15:0] registers during
-                                            // data transfer has no effect. This
-                                            // register shall be used for any
-                                            // card. Note: In SYSTEST mode a
-                                            // write into MMCHS_CMD register
-                                            // will not start a transfer.
-#define MMCHS_O_RSP10           0x00000210  // Command response[31:0] Register
-                                            // This 32-bit register holds bits
-                                            // positions [31:0] of command
-                                            // response type
-                                            // R1/R1b/R2/R3/R4/R5/R5b/R6
-#define MMCHS_O_RSP32           0x00000214  // Command response[63:32] Register
-                                            // This 32-bit register holds bits
-                                            // positions [63:32] of command
-                                            // response type R2
-#define MMCHS_O_RSP54           0x00000218  // Command response[95:64] Register
-                                            // This 32-bit register holds bits
-                                            // positions [95:64] of command
-                                            // response type R2
-#define MMCHS_O_RSP76           0x0000021C  // Command response[127:96]
-                                            // Register This 32-bit register
-                                            // holds bits positions [127:96] of
-                                            // command response type R2
-#define MMCHS_O_DATA            0x00000220  // Data Register This register is
-                                            // the 32-bit entry point of the
-                                            // buffer for read or write data
-                                            // transfers. The buffer size is
-                                            // 32bits x256(1024 bytes). Bytes
-                                            // within a word are stored and read
-                                            // in little endian format. This
-                                            // buffer can be used as two 512
-                                            // byte buffers to transfer data
-                                            // efficiently without reducing the
-                                            // throughput. Sequential and
-                                            // contiguous access is necessary to
-                                            // increment the pointer correctly.
-                                            // Random or skipped access is not
-                                            // allowed. In little endian if the
-                                            // local host accesses this register
-                                            // byte-wise or 16bit-wise the least
-                                            // significant byte (bits [7:0])
-                                            // must always be written/read
-                                            // first. The update of the buffer
-                                            // address is done on the most
-                                            // significant byte write for full
-                                            // 32-bit DATA register or on the
-                                            // most significant byte of the last
-                                            // word of block transfer. Example
-                                            // 1: Byte or 16-bit access
-                                            // Mbyteen[3:0]=0001 (1-byte) =>
-                                            // Mbyteen[3:0]=0010 (1-byte) =>
-                                            // Mbyteen[3:0]=1100 (2-bytes) OK
-                                            // Mbyteen[3:0]=0001 (1-byte) =>
-                                            // Mbyteen[3:0]=0010 (1-byte) =>
-                                            // Mbyteen[3:0]=0100 (1-byte) OK
-                                            // Mbyteen[3:0]=0001 (1-byte) =>
-                                            // Mbyteen[3:0]=0010 (1-byte) =>
-                                            // Mbyteen[3:0]=1000 (1-byte) Bad
-#define MMCHS_O_PSTATE          0x00000224  // Present state register The Host
-                                            // can get status of the Host
-                                            // Controller from this 32-bit read
-                                            // only register.
-#define MMCHS_O_HCTL            0x00000228  // Control register This register
-                                            // defines the host controls to set
-                                            // power wakeup and transfer
-                                            // parameters. MMCHS_HCTL[31:24] =
-                                            // Wakeup control MMCHS_HCTL[23:16]
-                                            // = Block gap control
-                                            // MMCHS_HCTL[15:8] = Power control
-                                            // MMCHS_HCTL[7:0] = Host control
-#define MMCHS_O_SYSCTL          0x0000022C  // SD system control register This
-                                            // register defines the system
-                                            // controls to set software resets
-                                            // clock frequency management and
-                                            // data timeout. MMCHS_SYSCTL[31:24]
-                                            // = Software resets
-                                            // MMCHS_SYSCTL[23:16] = Timeout
-                                            // control MMCHS_SYSCTL[15:0] =
-                                            // Clock control
-#define MMCHS_O_STAT            0x00000230  // Interrupt status register The
-                                            // interrupt status regroups all the
-                                            // status of the module internal
-                                            // events that can generate an
-                                            // interrupt. MMCHS_STAT[31:16] =
-                                            // Error Interrupt Status
-                                            // MMCHS_STAT[15:0] = Normal
-                                            // Interrupt Status
-#define MMCHS_O_IE              0x00000234  // Interrupt SD enable register
-                                            // This register allows to
-                                            // enable/disable the module to set
-                                            // status bits on an event-by-event
-                                            // basis. MMCHS_IE[31:16] = Error
-                                            // Interrupt Status Enable
-                                            // MMCHS_IE[15:0] = Normal Interrupt
-                                            // Status Enable
-#define MMCHS_O_ISE             0x00000238  // Interrupt signal enable register
-                                            // This register allows to
-                                            // enable/disable the module
-                                            // internal sources of status on an
-                                            // event-by-event basis.
-                                            // MMCHS_ISE[31:16] = Error
-                                            // Interrupt Signal Enable
-                                            // MMCHS_ISE[15:0] = Normal
-                                            // Interrupt Signal Enable
-#define MMCHS_O_AC12            0x0000023C  // Auto CMD12 Error Status Register
-                                            // The host driver may determine
-                                            // which of the errors cases related
-                                            // to Auto CMD12 has occurred by
-                                            // checking this MMCHS_AC12 register
-                                            // when an Auto CMD12 Error
-                                            // interrupt occurs. This register
-                                            // is valid only when Auto CMD12 is
-                                            // enabled (MMCHS_CMD[ACEN]) and
-                                            // Auto CMD12Error (MMCHS_STAT[ACE])
-                                            // is set to 1. Note: These bits are
-                                            // automatically reset when starting
-                                            // a new adtc command with data.
-#define MMCHS_O_CAPA            0x00000240  // Capabilities register This
-                                            // register lists the capabilities
-                                            // of the MMC/SD/SDIO host
-                                            // controller.
-#define MMCHS_O_CUR_CAPA        0x00000248  // Maximum current capabilities
-                                            // Register This register indicates
-                                            // the maximum current capability
-                                            // for each voltage. The value is
-                                            // meaningful if the voltage support
-                                            // is set in the capabilities
-                                            // register (MMCHS_CAPA).
-                                            // Initialization of this register
-                                            // (via a write access to this
-                                            // register) depends on the system
-                                            // capabilities. The host driver
-                                            // shall not modify this register
-                                            // after the initilaization. This
-                                            // register is only reinitialized by
-                                            // a hard reset (via RESETN signal)
-#define MMCHS_O_FE              0x00000250  // Force Event Register for Error
-                                            // Interrupt status The force Event
-                                            // Register is not a physically
-                                            // implemented register. Rather it
-                                            // is an address at which the Error
-                                            // Interrupt Status register can be
-                                            // written. The effect of a write to
-                                            // this address will be reflected in
-                                            // the Error Interrupt Status
-                                            // Register if corresponding bit of
-                                            // the Error Interrupt Status Enable
-                                            // Register is set.
-#define MMCHS_O_ADMAES          0x00000254  // ADMA Error Status Register When
-                                            // ADMA Error Interrupt is occurred
-                                            // the ADMA Error States field in
-                                            // this register holds the ADMA
-                                            // state and the ADMA System Address
-                                            // Register holds the address around
-                                            // the error descriptor. For
-                                            // recovering the error the Host
-                                            // Driver requires the ADMA state to
-                                            // identify the error descriptor
-                                            // address as follows: ST_STOP:
-                                            // Previous location set in the ADMA
-                                            // System Address register is the
-                                            // error descriptor address ST_FDS:
-                                            // Current location set in the ADMA
-                                            // System Address register is the
-                                            // error descriptor address ST_CADR:
-                                            // This sate is never set because do
-                                            // not generate ADMA error in this
-                                            // state. ST_TFR: Previous location
-                                            // set in the ADMA System Address
-                                            // register is the error descriptor
-                                            // address In case of write
-                                            // operation the Host Driver should
-                                            // use ACMD22 to get the number of
-                                            // written block rather than using
-                                            // this information since unwritten
-                                            // data may exist in the Host
-                                            // Controller. The Host Controller
-                                            // generates the ADMA Error
-                                            // Interrupt when it detects invalid
-                                            // descriptor data (Valid=0) at the
-                                            // ST_FDS state. In this case ADMA
-                                            // Error State indicates that an
-                                            // error occurs at ST_FDS state. The
-                                            // Host Driver may find that the
-                                            // Valid bit is not set in the error
-                                            // descriptor.
-#define MMCHS_O_ADMASAL         0x00000258  // ADMA System address Low bits
-#define MMCHS_O_REV             0x000002FC  // Versions Register This register
-                                            // contains the hard coded RTL
-                                            // vendor revision number the
-                                            // version number of SD
-                                            // specification compliancy and a
-                                            // slot status bit. MMCHS_REV[31:16]
-                                            // = Host controller version
-                                            // MMCHS_REV[15:0] = Slot Interrupt
-                                            // Status
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_HL_REV register.
-//
-//******************************************************************************
-#define MMCHS_HL_REV_SCHEME_M   0xC0000000
-#define MMCHS_HL_REV_SCHEME_S   30
-#define MMCHS_HL_REV_FUNC_M     0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define MMCHS_HL_REV_FUNC_S     16
-#define MMCHS_HL_REV_R_RTL_M    0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define MMCHS_HL_REV_R_RTL_S    11
-#define MMCHS_HL_REV_X_MAJOR_M  0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-#define MMCHS_HL_REV_X_MAJOR_S  8
-#define MMCHS_HL_REV_CUSTOM_M   0x000000C0
-#define MMCHS_HL_REV_CUSTOM_S   6
-#define MMCHS_HL_REV_Y_MINOR_M  0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-#define MMCHS_HL_REV_Y_MINOR_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_HL_HWINFO register.
-//
-//******************************************************************************
-#define MMCHS_HL_HWINFO_RETMODE 0x00000040
-#define MMCHS_HL_HWINFO_MEM_SIZE_M \
-                                0x0000003C
-
-#define MMCHS_HL_HWINFO_MEM_SIZE_S 2
-#define MMCHS_HL_HWINFO_MERGE_MEM \
-                                0x00000002
-
-#define MMCHS_HL_HWINFO_MADMA_EN \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MMCHS_O_HL_SYSCONFIG register.
-//
-//******************************************************************************
-#define MMCHS_HL_SYSCONFIG_STANDBYMODE_M \
-                                0x00000030  // Configuration of the local
-                                            // initiator state management mode.
-                                            // By definition initiator may
-                                            // generate read/write transaction
-                                            // as long as it is out of STANDBY
-                                            // state. 0x0 Force-standby mode:
-                                            // local initiator is
-                                            // unconditionally placed in standby
-                                            // state.Backup mode for debug only.
-                                            // 0x1 No-standby mode: local
-                                            // initiator is unconditionally
-                                            // placed out of standby
-                                            // state.Backup mode for debug only.
-                                            // 0x2 Smart-standby mode: local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator.IP module
-                                            // shall not generate
-                                            // (initiator-related) wakeup
-                                            // events. 0x3 "Smart-Standby
-                                            // wakeup-capable mode: local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator. IP module may
-                                            // generate (master-related) wakeup
-                                            // events when in standby state.Mode
-                                            // is only relevant if the
-                                            // appropriate IP module ""mwakeup""
-                                            // output is implemented."
-
-#define MMCHS_HL_SYSCONFIG_STANDBYMODE_S 4
-#define MMCHS_HL_SYSCONFIG_IDLEMODE_M \
-                                0x0000000C  // Configuration of the local
-                                            // target state management mode. By
-                                            // definition target can handle
-                                            // read/write transaction as long as
-                                            // it is out of IDLE state. 0x0
-                                            // Force-idle mode: local target's
-                                            // idle state follows (acknowledges)
-                                            // the system's idle requests
-                                            // unconditionally i.e. regardless
-                                            // of the IP module's internal
-                                            // requirements.Backup mode for
-                                            // debug only. 0x1 No-idle mode:
-                                            // local target never enters idle
-                                            // state.Backup mode for debug only.
-                                            // 0x2 Smart-idle mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module shall not
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events. 0x3 "Smart-idle
-                                            // wakeup-capable mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module may
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events when in idle state.Mode is
-                                            // only relevant if the appropriate
-                                            // IP module ""swakeup"" output(s)
-                                            // is (are) implemented."
-
-#define MMCHS_HL_SYSCONFIG_IDLEMODE_S 2
-#define MMCHS_HL_SYSCONFIG_FREEEMU \
-                                0x00000002  // Sensitivity to emulation (debug)
-                                            // suspend input signal.
-                                            // Functionality NOT implemented in
-                                            // MMCHS. 0 IP module is sensitive
-                                            // to emulation suspend 1 IP module
-                                            // is not sensitive to emulation
-                                            // suspend
-
-#define MMCHS_HL_SYSCONFIG_SOFTRESET \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define MMCHS_SYSCONFIG_STANDBYMODE_M \
-                                0x00003000  // Master interface power
-                                            // Management standby/wait control.
-                                            // The bit field is only useful when
-                                            // generic parameter MADMA_EN
-                                            // (Master ADMA enable) is set as
-                                            // active otherwise it is a read
-                                            // only register read a '0'. 0x0
-                                            // Force-standby. Mstandby is forced
-                                            // unconditionnaly. 0x1 No-standby.
-                                            // Mstandby is never asserted. 0x2
-                                            // Smart-standby mode: local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator.IP module
-                                            // shall not generate
-                                            // (initiator-related) wakeup
-                                            // events. 0x3 Smart-Standby
-                                            // wakeup-capable mode: "local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator. IP module may
-                                            // generate (master-related) wakeup
-                                            // events when in standby state.Mode
-                                            // is only relevant if the
-                                            // appropriate IP module ""mwakeup""
-                                            // output is implemented."
-
-#define MMCHS_SYSCONFIG_STANDBYMODE_S 12
-#define MMCHS_SYSCONFIG_CLOCKACTIVITY_M \
-                                0x00000300  // Clocks activity during wake up
-                                            // mode period. Bit8: OCP interface
-                                            // clock Bit9: Functional clock 0x0
-                                            // OCP and Functional clock may be
-                                            // switched off. 0x1 OCP clock is
-                                            // maintained. Functional clock may
-                                            // be switched-off. 0x2 Functional
-                                            // clock is maintained. OCP clock
-                                            // may be switched-off. 0x3 OCP and
-                                            // Functional clocks are maintained.
-
-#define MMCHS_SYSCONFIG_CLOCKACTIVITY_S 8
-#define MMCHS_SYSCONFIG_SIDLEMODE_M \
-                                0x00000018  // Power management 0x0 If an idle
-                                            // request is detected the MMCHS
-                                            // acknowledges it unconditionally
-                                            // and goes in Inactive mode.
-                                            // Interrupt and DMA requests are
-                                            // unconditionally de-asserted. 0x1
-                                            // If an idle request is detected
-                                            // the request is ignored and the
-                                            // module keeps on behaving
-                                            // normally. 0x2 Smart-idle mode:
-                                            // local target's idle state
-                                            // eventually follows (acknowledges)
-                                            // the system's idle requests
-                                            // depending on the IP module's
-                                            // internal requirements.IP module
-                                            // shall not generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events. 0x3 Smart-idle
-                                            // wakeup-capable mode: "local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module may
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events when in idle state.Mode is
-                                            // only relevant if the appropriate
-                                            // IP module ""swakeup"" output(s)
-                                            // is (are) implemented."
-
-#define MMCHS_SYSCONFIG_SIDLEMODE_S 3
-#define MMCHS_SYSCONFIG_ENAWAKEUP \
-                                0x00000004  // Wakeup feature control 0 Wakeup
-                                            // capability is disabled 1 Wakeup
-                                            // capability is enabled
-
-#define MMCHS_SYSCONFIG_SOFTRESET \
-                                0x00000002
-
-#define MMCHS_SYSCONFIG_AUTOIDLE \
-                                0x00000001  // Internal Clock gating strategy 0
-                                            // Clocks are free-running 1
-                                            // Automatic clock gating strategy
-                                            // is applied based on the OCP and
-                                            // MMC interface activity
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define MMCHS_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CSRE register.
-//
-//******************************************************************************
-#define MMCHS_CSRE_CSRE_M       0xFFFFFFFF  // Card status response error
-#define MMCHS_CSRE_CSRE_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSTEST register.
-//
-//******************************************************************************
-#define MMCHS_SYSTEST_OBI       0x00010000
-#define MMCHS_SYSTEST_SDCD      0x00008000
-#define MMCHS_SYSTEST_SDWP      0x00004000
-#define MMCHS_SYSTEST_WAKD      0x00002000
-#define MMCHS_SYSTEST_SSB       0x00001000
-#define MMCHS_SYSTEST_D7D       0x00000800
-#define MMCHS_SYSTEST_D6D       0x00000400
-#define MMCHS_SYSTEST_D5D       0x00000200
-#define MMCHS_SYSTEST_D4D       0x00000100
-#define MMCHS_SYSTEST_D3D       0x00000080
-#define MMCHS_SYSTEST_D2D       0x00000040
-#define MMCHS_SYSTEST_D1D       0x00000020
-#define MMCHS_SYSTEST_D0D       0x00000010
-#define MMCHS_SYSTEST_DDIR      0x00000008
-#define MMCHS_SYSTEST_CDAT      0x00000004
-#define MMCHS_SYSTEST_CDIR      0x00000002
-#define MMCHS_SYSTEST_MCKD      0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CON register.
-//
-//******************************************************************************
-#define MMCHS_CON_SDMA_LNE      0x00200000  // Slave DMA Level/Edge Request:
-                                            // The waveform of the DMA request
-                                            // can be configured either edge
-                                            // sensitive with early de-assertion
-                                            // on first access to MMCHS_DATA
-                                            // register or late de-assertion
-                                            // request remains active until last
-                                            // allowed data written into
-                                            // MMCHS_DATA. 0 Slave DMA edge
-                                            // sensitive Early DMA de-assertion
-                                            // 1 Slave DMA level sensitive Late
-                                            // DMA de-assertion
-#define MMCHS_CON_DMA_MNS       0x00100000  // DMA Master or Slave selection:
-                                            // When this bit is set and the
-                                            // controller is configured to use
-                                            // the DMA Ocp master interface is
-                                            // used to get datas from system
-                                            // using ADMA2 procedure (direct
-                                            // access to the memory).This option
-                                            // is only available if generic
-                                            // parameter MADMA_EN is asserted to
-                                            // '1'. 0 The controller is slave on
-                                            // data transfers with system. 1 The
-                                            // controller is master on data
-                                            // exchange with system controller
-                                            // must be configured as using DMA.
-#define MMCHS_CON_DDR           0x00080000  // Dual Data Rate mode: When this
-                                            // register is set the controller
-                                            // uses both clock edge to emit or
-                                            // receive data. Odd bytes are
-                                            // transmitted on falling edges and
-                                            // even bytes are transmitted on
-                                            // rise edges. It only applies on
-                                            // Data bytes and CRC Start end bits
-                                            // and CRC status are kept full
-                                            // cycle. This bit field is only
-                                            // meaningful and active for even
-                                            // clock divider ratio of
-                                            // MMCHS_SYSCTL[CLKD] it is
-                                            // insensitive to MMCHS_HCTL[HSPE]
-                                            // setting. 0 Standard mode : data
-                                            // are transmitted on a single edge
-                                            // depending on MMCHS_HCTRL[HSPE]. 1
-                                            // Data Bytes and CRC are
-                                            // transmitted on both edge.
-#define MMCHS_CON_BOOT_CF0      0x00040000
-#define MMCHS_CON_BOOT_ACK      0x00020000  // Book acknowledge received: When
-                                            // this bit is set the controller
-                                            // should receive a boot status on
-                                            // DAT0 line after next command
-                                            // issued. If no status is received
-                                            // a data timeout will be generated.
-                                            // 0 No acknowledge to be received 1
-                                            // A boot status will be received on
-                                            // DAT0 line after issuing a
-                                            // command.
-#define MMCHS_CON_CLKEXTFREE    0x00010000  // External clock free running:
-                                            // This register is used to maintain
-                                            // card clock out of transfer
-                                            // transaction to enable slave
-                                            // module for example to generate a
-                                            // synchronous interrupt on DAT[1].
-                                            // The Clock will be maintain only
-                                            // if MMCHS_SYSCTL[CEN] is set. 0
-                                            // External card clock is cut off
-                                            // outside active transaction
-                                            // period. 1 External card clock is
-                                            // maintain even out of active
-                                            // transaction period only if
-                                            // MMCHS_SYSCTL[CEN] is set.
-#define MMCHS_CON_PADEN         0x00008000  // Control Power for MMC Lines:
-                                            // This register is only useful when
-                                            // MMC PADs contain power saving
-                                            // mechanism to minimize its leakage
-                                            // power. It works as a GPIO that
-                                            // directly control the ACTIVE pin
-                                            // of PADs. Excepted for DAT[1] the
-                                            // signal is also combine outside
-                                            // the module with the dedicated
-                                            // power control MMCHS_CON[CTPL]
-                                            // bit. 0 ADPIDLE module pin is not
-                                            // forced it is automatically
-                                            // generated by the MMC fsms. 1
-                                            // ADPIDLE module pin is forced to
-                                            // active state.
-#define MMCHS_CON_OBIE          0x00004000  // Out-of-Band Interrupt Enable MMC
-                                            // cards only: This bit enables the
-                                            // detection of Out-of-Band
-                                            // Interrupt on MMCOBI input pin.
-                                            // The usage of the Out-of-Band
-                                            // signal (OBI) is optional and
-                                            // depends on the system
-                                            // integration. 0 Out-of-Band
-                                            // interrupt detection disabled 1
-                                            // Out-of-Band interrupt detection
-                                            // enabled
-#define MMCHS_CON_OBIP          0x00002000  // Out-of-Band Interrupt Polarity
-                                            // MMC cards only: This bit selects
-                                            // the active level of the
-                                            // out-of-band interrupt coming from
-                                            // MMC cards. The usage of the
-                                            // Out-of-Band signal (OBI) is
-                                            // optional and depends on the
-                                            // system integration. 0 active high
-                                            // level 1 active low level
-#define MMCHS_CON_CEATA         0x00001000  // CE-ATA control mode MMC cards
-                                            // compliant with CE-ATA:By default
-                                            // this bit is set to 0. It is use
-                                            // to indicate that next commands
-                                            // are considered as specific CE-ATA
-                                            // commands that potentially use
-                                            // 'command completion' features. 0
-                                            // Standard MMC/SD/SDIO mode. 1
-                                            // CE-ATA mode next commands are
-                                            // considered as CE-ATA commands.
-#define MMCHS_CON_CTPL          0x00000800  // Control Power for DAT[1] line
-                                            // MMC and SD cards: By default this
-                                            // bit is set to 0 and the host
-                                            // controller automatically disables
-                                            // all the input buffers outside of
-                                            // a transaction to minimize the
-                                            // leakage current. SDIO cards: When
-                                            // this bit is set to 1 the host
-                                            // controller automatically disables
-                                            // all the input buffers except the
-                                            // buffer of DAT[1] outside of a
-                                            // transaction in order to detect
-                                            // asynchronous card interrupt on
-                                            // DAT[1] line and minimize the
-                                            // leakage current of the buffers. 0
-                                            // Disable all the input buffers
-                                            // outside of a transaction. 1
-                                            // Disable all the input buffers
-                                            // except the buffer of DAT[1]
-                                            // outside of a transaction.
-#define MMCHS_CON_DVAL_M        0x00000600  // Debounce filter value All cards
-                                            // This register is used to define a
-                                            // debounce period to filter the
-                                            // card detect input signal (SDCD).
-                                            // The usage of the card detect
-                                            // input signal (SDCD) is optional
-                                            // and depends on the system
-                                            // integration and the type of the
-                                            // connector housing that
-                                            // accommodates the card. 0x0 33 us
-                                            // debounce period 0x1 231 us
-                                            // debounce period 0x2 1 ms debounce
-                                            // period 0x3 84 ms debounce period
-#define MMCHS_CON_DVAL_S        9
-#define MMCHS_CON_WPP           0x00000100  // Write protect polarity For SD
-                                            // and SDIO cards only This bit
-                                            // selects the active level of the
-                                            // write protect input signal
-                                            // (SDWP). The usage of the write
-                                            // protect input signal (SDWP) is
-                                            // optional and depends on the
-                                            // system integration and the type
-                                            // of the connector housing that
-                                            // accommodates the card. 0 active
-                                            // high level 1 active low level
-#define MMCHS_CON_CDP           0x00000080  // Card detect polarity All cards
-                                            // This bit selects the active level
-                                            // of the card detect input signal
-                                            // (SDCD). The usage of the card
-                                            // detect input signal (SDCD) is
-                                            // optional and depends on the
-                                            // system integration and the type
-                                            // of the connector housing that
-                                            // accommodates the card. 0 active
-                                            // high level 1 active low level
-#define MMCHS_CON_MIT           0x00000040  // MMC interrupt command Only for
-                                            // MMC cards. This bit must be set
-                                            // to 1 when the next write access
-                                            // to the command register
-                                            // (MMCHS_CMD) is for writing a MMC
-                                            // interrupt command (CMD40)
-                                            // requiring the command timeout
-                                            // detection to be disabled for the
-                                            // command response. 0 Command
-                                            // timeout enabled 1 Command timeout
-                                            // disabled
-#define MMCHS_CON_DW8           0x00000020  // 8-bit mode MMC select For
-                                            // SD/SDIO cards this bit must be
-                                            // set to 0. For MMC card this bit
-                                            // must be set following a valid
-                                            // SWITCH command (CMD6) with the
-                                            // correct value and extend CSD
-                                            // index written in the argument.
-                                            // Prior to this command the MMC
-                                            // card configuration register (CSD
-                                            // and EXT_CSD) must be verified for
-                                            // compliancy with MMC standard
-                                            // specification 4.x (see section
-                                            // 3.6). 0 1-bit or 4-bit Data width
-                                            // (DAT[0] used MMC SD cards) 1
-                                            // 8-bit Data width (DAT[7:0] used
-                                            // MMC cards)
-#define MMCHS_CON_MODE          0x00000010  // Mode select All cards These bits
-                                            // select between Functional mode
-                                            // and SYSTEST mode. 0 Functional
-                                            // mode. Transfers to the
-                                            // MMC/SD/SDIO cards follow the card
-                                            // protocol. MMC clock is enabled.
-                                            // MMC/SD transfers are operated
-                                            // under the control of the CMD
-                                            // register. 1 SYSTEST mode The
-                                            // signal pins are configured as
-                                            // general-purpose input/output and
-                                            // the 1024-byte buffer is
-                                            // configured as a stack memory
-                                            // accessible only by the local host
-                                            // or system DMA. The pins retain
-                                            // their default type (input output
-                                            // or in-out). SYSTEST mode is
-                                            // operated under the control of the
-                                            // SYSTEST register.
-#define MMCHS_CON_STR           0x00000008  // Stream command Only for MMC
-                                            // cards. This bit must be set to 1
-                                            // only for the stream data
-                                            // transfers (read or write) of the
-                                            // adtc commands. Stream read is a
-                                            // class 1 command (CMD11:
-                                            // READ_DAT_UNTIL_STOP). Stream
-                                            // write is a class 3 command
-                                            // (CMD20: WRITE_DAT_UNTIL_STOP). 0
-                                            // Block oriented data transfer 1
-                                            // Stream oriented data transfer
-#define MMCHS_CON_HR            0x00000004  // Broadcast host response Only for
-                                            // MMC cards. This register is used
-                                            // to force the host to generate a
-                                            // 48-bit response for bc command
-                                            // type. "It can be used to
-                                            // terminate the interrupt mode by
-                                            // generating a CMD40 response by
-                                            // the core (see section 4.3
-                                            // ""Interrupt Mode"" in the MMC [1]
-                                            // specification). In order to have
-                                            // the host response to be generated
-                                            // in open drain mode the register
-                                            // MMCHS_CON[OD] must be set to 1."
-                                            // When MMCHS_CON[CEATA] is set to 1
-                                            // and MMCHS_ARG set to 0x00000000
-                                            // when writing 0x00000000 into
-                                            // MMCHS_CMD register the host
-                                            // controller performs a 'command
-                                            // completion signal disable' token
-                                            // i.e. CMD line held to '0' during
-                                            // 47 cycles followed by a 1. 0 The
-                                            // host does not generate a 48-bit
-                                            // response instead of a command. 1
-                                            // The host generates a 48-bit
-                                            // response instead of a command or
-                                            // a command completion signal
-                                            // disable token.
-#define MMCHS_CON_INIT          0x00000002  // Send initialization stream All
-                                            // cards. When this bit is set to 1
-                                            // and the card is idle an
-                                            // initialization sequence is sent
-                                            // to the card. "An initialization
-                                            // sequence consists of setting the
-                                            // CMD line to 1 during 80 clock
-                                            // cycles. The initialisation
-                                            // sequence is mandatory - but it is
-                                            // not required to do it through
-                                            // this bit - this bit makes it
-                                            // easier. Clock divider
-                                            // (MMCHS_SYSCTL[CLKD]) should be
-                                            // set to ensure that 80 clock
-                                            // periods are greater than 1ms.
-                                            // (see section 9.3 ""Power-Up"" in
-                                            // the MMC card specification [1] or
-                                            // section 6.4 in the SD card
-                                            // specification [2])." Note: in
-                                            // this mode there is no command
-                                            // sent to the card and no response
-                                            // is expected 0 The host does not
-                                            // send an initialization sequence.
-                                            // 1 The host sends an
-                                            // initialization sequence.
-#define MMCHS_CON_OD            0x00000001  // Card open drain mode. Only for
-                                            // MMC cards. This bit must be set
-                                            // to 1 for MMC card commands 1 2 3
-                                            // and 40 and if the MMC card bus is
-                                            // operating in open-drain mode
-                                            // during the response phase to the
-                                            // command sent. Typically during
-                                            // card identification mode when the
-                                            // card is either in idle ready or
-                                            // ident state. It is also necessary
-                                            // to set this bit to 1 for a
-                                            // broadcast host response (see
-                                            // Broadcast host response register
-                                            // MMCHS_CON[HR]) 0 No Open Drain 1
-                                            // Open Drain or Broadcast host
-                                            // response
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_PWCNT register.
-//
-//******************************************************************************
-#define MMCHS_PWCNT_PWRCNT_M    0x0000FFFF  // Power counter register. This
-                                            // register is used to introduce a
-                                            // delay between the PAD ACTIVE pin
-                                            // assertion and the command issued.
-                                            // 0x0000 No additional delay added
-                                            // 0x0001 TCF delay (card clock
-                                            // period) 0x0002 TCF x 2 delay
-                                            // (card clock period) 0xFFFE TCF x
-                                            // 65534 delay (card clock period)
-                                            // 0xFFFF TCF x 65535 delay (card
-                                            // clock period)
-#define MMCHS_PWCNT_PWRCNT_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_BLK register.
-//
-//******************************************************************************
-#define MMCHS_BLK_NBLK_M        0xFFFF0000  // Blocks count for current
-                                            // transfer This register is enabled
-                                            // when Block count Enable
-                                            // (MMCHS_CMD[BCE]) is set to 1 and
-                                            // is valid only for multiple block
-                                            // transfers. Setting the block
-                                            // count to 0 results no data blocks
-                                            // being transferred. Note: The host
-                                            // controller decrements the block
-                                            // count after each block transfer
-                                            // and stops when the count reaches
-                                            // zero. This register can be
-                                            // accessed only if no transaction
-                                            // is executing (i.e after a
-                                            // transaction has stopped). Read
-                                            // operations during transfers may
-                                            // return an invalid value and write
-                                            // operation will be ignored. In
-                                            // suspend context the number of
-                                            // blocks yet to be transferred can
-                                            // be determined by reading this
-                                            // register. When restoring transfer
-                                            // context prior to issuing a Resume
-                                            // command The local host shall
-                                            // restore the previously saved
-                                            // block count. 0x0000 Stop count
-                                            // 0x0001 1 block 0x0002 2 blocks
-                                            // 0xFFFF 65535 blocks
-#define MMCHS_BLK_NBLK_S        16
-#define MMCHS_BLK_BLEN_M        0x00000FFF  // Transfer Block Size. This
-                                            // register specifies the block size
-                                            // for block data transfers. Read
-                                            // operations during transfers may
-                                            // return an invalid value and write
-                                            // operations are ignored. When a
-                                            // CMD12 command is issued to stop
-                                            // the transfer a read of the BLEN
-                                            // field after transfer completion
-                                            // (MMCHS_STAT[TC] set to 1) will
-                                            // not return the true byte number
-                                            // of data length while the stop
-                                            // occurs but the value written in
-                                            // this register before transfer is
-                                            // launched. 0x000 No data transfer
-                                            // 0x001 1 byte block length 0x002 2
-                                            // bytes block length 0x003 3 bytes
-                                            // block length 0x1FF 511 bytes
-                                            // block length 0x200 512 bytes
-                                            // block length 0x7FF 2047 bytes
-                                            // block length 0x800 2048 bytes
-                                            // block length
-#define MMCHS_BLK_BLEN_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ARG register.
-//
-//******************************************************************************
-#define MMCHS_ARG_ARG_M         0xFFFFFFFF  // Command argument bits [31:0]
-#define MMCHS_ARG_ARG_S         0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CMD register.
-//
-//******************************************************************************
-#define MMCHS_CMD_INDX_M        0x3F000000  // Command index Binary encoded
-                                            // value from 0 to 63 specifying the
-                                            // command number send to card 0x00
-                                            // CMD0 or ACMD0 0x01 CMD1 or ACMD1
-                                            // 0x02 CMD2 or ACMD2 0x03 CMD3 or
-                                            // ACMD3 0x04 CMD4 or ACMD4 0x05
-                                            // CMD5 or ACMD5 0x06 CMD6 or ACMD6
-                                            // 0x07 CMD7 or ACMD7 0x08 CMD8 or
-                                            // ACMD8 0x09 CMD9 or ACMD9 0x0A
-                                            // CMD10 or ACMD10 0x0B CMD11 or
-                                            // ACMD11 0x0C CMD12 or ACMD12 0x0D
-                                            // CMD13 or ACMD13 0x0E CMD14 or
-                                            // ACMD14 0x0F CMD15 or ACMD15 0x10
-                                            // CMD16 or ACMD16 0x11 CMD17 or
-                                            // ACMD17 0x12 CMD18 or ACMD18 0x13
-                                            // CMD19 or ACMD19 0x14 CMD20 or
-                                            // ACMD20 0x15 CMD21 or ACMD21 0x16
-                                            // CMD22 or ACMD22 0x17 CMD23 or
-                                            // ACMD23 0x18 CMD24 or ACMD24 0x19
-                                            // CMD25 or ACMD25 0x1A CMD26 or
-                                            // ACMD26 0x1B CMD27 or ACMD27 0x1C
-                                            // CMD28 or ACMD28 0x1D CMD29 or
-                                            // ACMD29 0x1E CMD30 or ACMD30 0x1F
-                                            // CMD31 or ACMD31 0x20 CMD32 or
-                                            // ACMD32 0x21 CMD33 or ACMD33 0x22
-                                            // CMD34 or ACMD34 0x23 CMD35 or
-                                            // ACMD35 0x24 CMD36 or ACMD36 0x25
-                                            // CMD37 or ACMD37 0x26 CMD38 or
-                                            // ACMD38 0x27 CMD39 or ACMD39 0x28
-                                            // CMD40 or ACMD40 0x29 CMD41 or
-                                            // ACMD41 0x2A CMD42 or ACMD42 0x2B
-                                            // CMD43 or ACMD43 0x2C CMD44 or
-                                            // ACMD44 0x2D CMD45 or ACMD45 0x2E
-                                            // CMD46 or ACMD46 0x2F CMD47 or
-                                            // ACMD47 0x30 CMD48 or ACMD48 0x31
-                                            // CMD49 or ACMD49 0x32 CMD50 or
-                                            // ACMD50 0x33 CMD51 or ACMD51 0x34
-                                            // CMD52 or ACMD52 0x35 CMD53 or
-                                            // ACMD53 0x36 CMD54 or ACMD54 0x37
-                                            // CMD55 or ACMD55 0x38 CMD56 or
-                                            // ACMD56 0x39 CMD57 or ACMD57 0x3A
-                                            // CMD58 or ACMD58 0x3B CMD59 or
-                                            // ACMD59 0x3C CMD60 or ACMD60 0x3D
-                                            // CMD61 or ACMD61 0x3E CMD62 or
-                                            // ACMD62 0x3F CMD63 or ACMD63
-#define MMCHS_CMD_INDX_S        24
-#define MMCHS_CMD_CMD_TYPE_M    0x00C00000  // Command type This register
-                                            // specifies three types of special
-                                            // command: Suspend Resume and
-                                            // Abort. These bits shall be set to
-                                            // 00b for all other commands. 0x0
-                                            // Others Commands 0x1 "CMD52 for
-                                            // writing ""Bus Suspend"" in CCCR"
-                                            // 0x2 "CMD52 for writing ""Function
-                                            // Select"" in CCCR" 0x3 "Abort
-                                            // command CMD12 CMD52 for writing
-                                            // "" I/O Abort"" in CCCR"
-#define MMCHS_CMD_CMD_TYPE_S    22
-#define MMCHS_CMD_DP            0x00200000  // Data present select This
-                                            // register indicates that data is
-                                            // present and DAT line shall be
-                                            // used. It must be set to 0 in the
-                                            // following conditions: - command
-                                            // using only CMD line - command
-                                            // with no data transfer but using
-                                            // busy signal on DAT[0] - Resume
-                                            // command 0 Command with no data
-                                            // transfer 1 Command with data
-                                            // transfer
-#define MMCHS_CMD_CICE          0x00100000  // Command Index check enable This
-                                            // bit must be set to 1 to enable
-                                            // index check on command response
-                                            // to compare the index field in the
-                                            // response against the index of the
-                                            // command. If the index is not the
-                                            // same in the response as in the
-                                            // command it is reported as a
-                                            // command index error
-                                            // (MMCHS_STAT[CIE] set to1) Note:
-                                            // The register CICE cannot be
-                                            // configured for an Auto CMD12 then
-                                            // index check is automatically
-                                            // checked when this command is
-                                            // issued. 0 Index check disable 1
-                                            // Index check enable
-#define MMCHS_CMD_CCCE          0x00080000  // Command CRC check enable This
-                                            // bit must be set to 1 to enable
-                                            // CRC7 check on command response to
-                                            // protect the response against
-                                            // transmission errors on the bus.
-                                            // If an error is detected it is
-                                            // reported as a command CRC error
-                                            // (MMCHS_STAT[CCRC] set to 1).
-                                            // Note: The register CCCE cannot be
-                                            // configured for an Auto CMD12 and
-                                            // then CRC check is automatically
-                                            // checked when this command is
-                                            // issued. 0 CRC7 check disable 1
-                                            // CRC7 check enable
-#define MMCHS_CMD_RSP_TYPE_M    0x00030000  // Response type This bits defines
-                                            // the response type of the command
-                                            // 0x0 No response 0x1 Response
-                                            // Length 136 bits 0x2 Response
-                                            // Length 48 bits 0x3 Response
-                                            // Length 48 bits with busy after
-                                            // response
-#define MMCHS_CMD_RSP_TYPE_S    16
-#define MMCHS_CMD_MSBS          0x00000020  // Multi/Single block select This
-                                            // bit must be set to 1 for data
-                                            // transfer in case of multi block
-                                            // command. For any others command
-                                            // this bit shall be set to 0. 0
-                                            // Single block. If this bit is 0 it
-                                            // is not necessary to set the
-                                            // register MMCHS_BLK[NBLK]. 1 Multi
-                                            // block. When Block Count is
-                                            // disabled (MMCHS_CMD[BCE] is set
-                                            // to 0) in Multiple block transfers
-                                            // (MMCHS_CMD[MSBS] is set to 1) the
-                                            // module can perform infinite
-                                            // transfer.
-#define MMCHS_CMD_DDIR          0x00000010  // Data transfer Direction Select
-                                            // This bit defines either data
-                                            // transfer will be a read or a
-                                            // write. 0 Data Write (host to
-                                            // card) 1 Data Read (card to host)
-#define MMCHS_CMD_ACEN          0x00000004  // Auto CMD12 Enable SD card only.
-                                            // When this bit is set to 1 the
-                                            // host controller issues a CMD12
-                                            // automatically after the transfer
-                                            // completion of the last block. The
-                                            // Host Driver shall not set this
-                                            // bit to issue commands that do not
-                                            // require CMD12 to stop data
-                                            // transfer. In particular secure
-                                            // commands do not require CMD12. 0
-                                            // Auto CMD12 disable 1 Auto CMD12
-                                            // enable or CCS detection enabled.
-#define MMCHS_CMD_BCE           0x00000002  // Block Count Enable Multiple
-                                            // block transfers only. This bit is
-                                            // used to enable the block count
-                                            // register (MMCHS_BLK[NBLK]). When
-                                            // Block Count is disabled
-                                            // (MMCHS_CMD[BCE] is set to 0) in
-                                            // Multiple block transfers
-                                            // (MMCHS_CMD[MSBS] is set to 1) the
-                                            // module can perform infinite
-                                            // transfer. 0 Block count disabled
-                                            // for infinite transfer. 1 Block
-                                            // count enabled for multiple block
-                                            // transfer with known number of
-                                            // blocks
-#define MMCHS_CMD_DE            0x00000001  // DMA Enable This bit is used to
-                                            // enable DMA mode for host data
-                                            // access. 0 DMA mode disable 1 DMA
-                                            // mode enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP10 register.
-//
-//******************************************************************************
-#define MMCHS_RSP10_RSP1_M      0xFFFF0000  // Command Response [31:16]
-#define MMCHS_RSP10_RSP1_S      16
-#define MMCHS_RSP10_RSP0_M      0x0000FFFF  // Command Response [15:0]
-#define MMCHS_RSP10_RSP0_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP32 register.
-//
-//******************************************************************************
-#define MMCHS_RSP32_RSP3_M      0xFFFF0000  // Command Response [63:48]
-#define MMCHS_RSP32_RSP3_S      16
-#define MMCHS_RSP32_RSP2_M      0x0000FFFF  // Command Response [47:32]
-#define MMCHS_RSP32_RSP2_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP54 register.
-//
-//******************************************************************************
-#define MMCHS_RSP54_RSP5_M      0xFFFF0000  // Command Response [95:80]
-#define MMCHS_RSP54_RSP5_S      16
-#define MMCHS_RSP54_RSP4_M      0x0000FFFF  // Command Response [79:64]
-#define MMCHS_RSP54_RSP4_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP76 register.
-//
-//******************************************************************************
-#define MMCHS_RSP76_RSP7_M      0xFFFF0000  // Command Response [127:112]
-#define MMCHS_RSP76_RSP7_S      16
-#define MMCHS_RSP76_RSP6_M      0x0000FFFF  // Command Response [111:96]
-#define MMCHS_RSP76_RSP6_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_DATA register.
-//
-//******************************************************************************
-#define MMCHS_DATA_DATA_M       0xFFFFFFFF  // Data Register [31:0] In
-                                            // functional mode (MMCHS_CON[MODE]
-                                            // set to the default value 0) A
-                                            // read access to this register is
-                                            // allowed only when the buffer read
-                                            // enable status is set to 1
-                                            // (MMCHS_PSTATE[BRE]) otherwise a
-                                            // bad access (MMCHS_STAT[BADA]) is
-                                            // signaled. A write access to this
-                                            // register is allowed only when the
-                                            // buffer write enable status is set
-                                            // to 1(MMCHS_STATE[BWE]) otherwise
-                                            // a bad access (MMCHS_STAT[BADA])
-                                            // is signaled and the data is not
-                                            // written.
-#define MMCHS_DATA_DATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_PSTATE register.
-//
-//******************************************************************************
-#define MMCHS_PSTATE_CLEV       0x01000000
-#define MMCHS_PSTATE_DLEV_M     0x00F00000  // DAT[3:0] line signal level
-                                            // DAT[3] => bit 23 DAT[2] => bit 22
-                                            // DAT[1] => bit 21 DAT[0] => bit 20
-                                            // This status is used to check DAT
-                                            // line level to recover from errors
-                                            // and for debugging. This is
-                                            // especially useful in detecting
-                                            // the busy signal level from
-                                            // DAT[0]. The value of these
-                                            // registers after reset depends on
-                                            // the DAT lines level at that time.
-#define MMCHS_PSTATE_DLEV_S     20
-#define MMCHS_PSTATE_WP         0x00080000
-#define MMCHS_PSTATE_CDPL       0x00040000
-#define MMCHS_PSTATE_CSS        0x00020000
-#define MMCHS_PSTATE_CINS       0x00010000
-#define MMCHS_PSTATE_BRE        0x00000800
-#define MMCHS_PSTATE_BWE        0x00000400
-#define MMCHS_PSTATE_RTA        0x00000200
-#define MMCHS_PSTATE_WTA        0x00000100
-#define MMCHS_PSTATE_DLA        0x00000004
-#define MMCHS_PSTATE_DATI       0x00000002
-#define MMCHS_PSTATE_CMDI       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_HCTL register.
-//
-//******************************************************************************
-#define MMCHS_HCTL_OBWE         0x08000000  // Wakeup event enable for
-                                            // 'Out-of-Band' Interrupt. This bit
-                                            // enables wakeup events for
-                                            // 'Out-of-Band' assertion. Wakeup
-                                            // is generated if the wakeup
-                                            // feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). The
-                                            // write to this register is ignored
-                                            // when MMCHS_CON[OBIE] is not set.
-                                            // 0 Disable wakeup on 'Out-of-Band'
-                                            // Interrupt 1 Enable wakeup on
-                                            // 'Out-of-Band' Interrupt
-#define MMCHS_HCTL_REM          0x04000000  // Wakeup event enable on SD card
-                                            // removal This bit enables wakeup
-                                            // events for card removal
-                                            // assertion. Wakeup is generated if
-                                            // the wakeup feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). 0
-                                            // Disable wakeup on card removal 1
-                                            // Enable wakeup on card removal
-#define MMCHS_HCTL_INS          0x02000000  // Wakeup event enable on SD card
-                                            // insertion This bit enables wakeup
-                                            // events for card insertion
-                                            // assertion. Wakeup is generated if
-                                            // the wakeup feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). 0
-                                            // Disable wakeup on card insertion
-                                            // 1 Enable wakeup on card insertion
-#define MMCHS_HCTL_IWE          0x01000000  // Wakeup event enable on SD card
-                                            // interrupt This bit enables wakeup
-                                            // events for card interrupt
-                                            // assertion. Wakeup is generated if
-                                            // the wakeup feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). 0
-                                            // Disable wakeup on card interrupt
-                                            // 1 Enable wakeup on card interrupt
-#define MMCHS_HCTL_IBG          0x00080000  // Interrupt block at gap This bit
-                                            // is valid only in 4-bit mode of
-                                            // SDIO card to enable interrupt
-                                            // detection in the interrupt cycle
-                                            // at block gap for a multiple block
-                                            // transfer. For MMC cards and for
-                                            // SD card this bit should be set to
-                                            // 0. 0 Disable interrupt detection
-                                            // at the block gap in 4-bit mode 1
-                                            // Enable interrupt detection at the
-                                            // block gap in 4-bit mode
-#define MMCHS_HCTL_RWC          0x00040000  // Read wait control The read wait
-                                            // function is optional only for
-                                            // SDIO cards. If the card supports
-                                            // read wait this bit must be
-                                            // enabled then requesting a stop at
-                                            // block gap (MMCHS_HCTL[SBGR])
-                                            // generates a read wait period
-                                            // after the current end of block.
-                                            // Be careful if read wait is not
-                                            // supported it may cause a conflict
-                                            // on DAT line. 0 Disable Read Wait
-                                            // Control. Suspend/Resume cannot be
-                                            // supported. 1 Enable Read Wait
-                                            // Control
-#define MMCHS_HCTL_CR           0x00020000  // Continue request This bit is
-                                            // used to restart a transaction
-                                            // that was stopped by requesting a
-                                            // stop at block gap
-                                            // (MMCHS_HCTL[SBGR]). Set this bit
-                                            // to 1 restarts the transfer. The
-                                            // bit is automatically set to 0 by
-                                            // the host controller when transfer
-                                            // has restarted i.e DAT line is
-                                            // active (MMCHS_PSTATE[DLA]) or
-                                            // transferring data
-                                            // (MMCHS_PSTATE[WTA]). The Stop at
-                                            // block gap request must be
-                                            // disabled (MMCHS_HCTL[SBGR]=0)
-                                            // before setting this bit. 0 No
-                                            // affect 1 transfer restart
-#define MMCHS_HCTL_SBGR         0x00010000  // Stop at block gap request This
-                                            // bit is used to stop executing a
-                                            // transaction at the next block
-                                            // gap. The transfer can restart
-                                            // with a continue request
-                                            // (MMHS_HCTL[CR]) or during a
-                                            // suspend/resume sequence. In case
-                                            // of read transfer the card must
-                                            // support read wait control. In
-                                            // case of write transfer the host
-                                            // driver shall set this bit after
-                                            // all block data written. Until the
-                                            // transfer completion
-                                            // (MMCHS_STAT[TC] set to 1) the
-                                            // host driver shall leave this bit
-                                            // set to 1. If this bit is set the
-                                            // local host shall not write to the
-                                            // data register (MMCHS_DATA). 0
-                                            // Transfer mode 1 Stop at block gap
-#define MMCHS_HCTL_SDVS_M       0x00000E00  // SD bus voltage select All cards.
-                                            // The host driver should set to
-                                            // these bits to select the voltage
-                                            // level for the card according to
-                                            // the voltage supported by the
-                                            // system (MMCHS_CAPA[VS18VS30VS33])
-                                            // before starting a transfer. 0x5
-                                            // 1.8V (Typical) 0x6 3.0V (Typical)
-                                            // 0x7 3.3V (Typical)
-#define MMCHS_HCTL_SDVS_S       9
-#define MMCHS_HCTL_SDBP         0x00000100  // SD bus power Before setting this
-                                            // bit the host driver shall select
-                                            // the SD bus voltage
-                                            // (MMCHS_HCTL[SDVS]). If the host
-                                            // controller detects the No card
-                                            // state this bit is automatically
-                                            // set to 0. If the module is power
-                                            // off a write in the command
-                                            // register (MMCHS_CMD) will not
-                                            // start the transfer. A write to
-                                            // this bit has no effect if the
-                                            // selected SD bus voltage
-                                            // MMCHS_HCTL[SDVS] is not supported
-                                            // according to capability register
-                                            // (MMCHS_CAPA[VS*]). 0 Power off 1
-                                            // Power on
-#define MMCHS_HCTL_CDSS         0x00000080  // Card Detect Signal Selection
-                                            // This bit selects source for the
-                                            // card detection.When the source
-                                            // for the card detection is
-                                            // switched the interrupt should be
-                                            // disabled during the switching
-                                            // period by clearing the Interrupt
-                                            // Status/Signal Enable register in
-                                            // order to mask unexpected
-                                            // interrupt being caused by the
-                                            // glitch. The Interrupt
-                                            // Status/Signal Enable should be
-                                            // disabled during over the period
-                                            // of debouncing. 0 SDCD# is
-                                            // selected (for normal use) 1 The
-                                            // Card Detect Test Level is
-                                            // selected (for test purpose)
-#define MMCHS_HCTL_CDTL         0x00000040  // Card Detect Test Level: This bit
-                                            // is enabled while the Card Detect
-                                            // Signal Selection is set to 1 and
-                                            // it indicates card inserted or
-                                            // not. 0 No Card 1 Card Inserted
-#define MMCHS_HCTL_DMAS_M       0x00000018  // DMA Select Mode: One of
-                                            // supported DMA modes can be
-                                            // selected. The host driver shall
-                                            // check support of DMA modes by
-                                            // referring the Capabilities
-                                            // register. Use of selected DMA is
-                                            // determined by DMA Enable of the
-                                            // Transfer Mode register. This
-                                            // register is only meaningful when
-                                            // MADMA_EN is set to 1. When
-                                            // MADMA_EN is set to 0 the bit
-                                            // field is read only and returned
-                                            // value is 0. 0x0 Reserved 0x1
-                                            // Reserved 0x2 32-bit Address ADMA2
-                                            // is selected 0x3 Reserved
-#define MMCHS_HCTL_DMAS_S       3
-#define MMCHS_HCTL_HSPE         0x00000004  // High Speed Enable: Before
-                                            // setting this bit the Host Driver
-                                            // shall check the High Speed
-                                            // Support in the Capabilities
-                                            // register. If this bit is set to 0
-                                            // (default) the Host Controller
-                                            // outputs CMD line and DAT lines at
-                                            // the falling edge of the SD Clock.
-                                            // If this bit is set to 1 the Host
-                                            // Controller outputs CMD line and
-                                            // DAT lines at the rising edge of
-                                            // the SD Clock.This bit shall not
-                                            // be set when dual data rate mode
-                                            // is activated in MMCHS_CON[DDR]. 0
-                                            // Normal speed mode 1 High speed
-                                            // mode
-#define MMCHS_HCTL_DTW          0x00000002  // Data transfer width For MMC card
-                                            // this bit must be set following a
-                                            // valid SWITCH command (CMD6) with
-                                            // the correct value and extend CSD
-                                            // index written in the argument.
-                                            // Prior to this command the MMC
-                                            // card configuration register (CSD
-                                            // and EXT_CSD) must be verified for
-                                            // compliance with MMC standard
-                                            // specification 4.x (see section
-                                            // 3.6). This register has no effect
-                                            // when the MMC 8-bit mode is
-                                            // selected (register MMCHS_CON[DW8]
-                                            // set to1 ) For SD/SDIO cards this
-                                            // bit must be set following a valid
-                                            // SET_BUS_WIDTH command (ACMD6)
-                                            // with the value written in bit 1
-                                            // of the argument. Prior to this
-                                            // command the SD card configuration
-                                            // register (SCR) must be verified
-                                            // for the supported bus width by
-                                            // the SD card. 0 1-bit Data width
-                                            // (DAT[0] used) 1 4-bit Data width
-                                            // (DAT[3:0] used)
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSCTL register.
-//
-//******************************************************************************
-#define MMCHS_SYSCTL_SRD        0x04000000  // Software reset for DAT line This
-                                            // bit is set to 1 for reset and
-                                            // released to 0 when completed. DAT
-                                            // finite state machine in both
-                                            // clock domain are also reset. Here
-                                            // below are the registers cleared
-                                            // by MMCHS_SYSCTL[SRD]: #VALUE! -
-                                            // MMCHS_PSTATE: BRE BWE RTA WTA DLA
-                                            // and DATI - MMCHS_HCTL: SBGR and
-                                            // CR - MMCHS_STAT: BRR BWR BGE and
-                                            // TC OCP and MMC buffer data
-                                            // management is reinitialized. 0
-                                            // Reset completed 1 Software reset
-                                            // for DAT line
-#define MMCHS_SYSCTL_SRC        0x02000000  // Software reset for CMD line This
-                                            // bit is set to 1 for reset and
-                                            // released to 0 when completed. CMD
-                                            // finite state machine in both
-                                            // clock domain are also reset. Here
-                                            // below the registers cleared by
-                                            // MMCHS_SYSCTL[SRC]: -
-                                            // MMCHS_PSTATE: CMDI - MMCHS_STAT:
-                                            // CC OCP and MMC command status
-                                            // management is reinitialized. 0
-                                            // Reset completed 1 Software reset
-                                            // for CMD line
-#define MMCHS_SYSCTL_SRA        0x01000000  // Software reset for all This bit
-                                            // is set to 1 for reset and
-                                            // released to 0 when completed.
-                                            // This reset affects the entire
-                                            // host controller except for the
-                                            // card detection circuit and
-                                            // capabilities registers. 0 Reset
-                                            // completed 1 Software reset for
-                                            // all the design
-#define MMCHS_SYSCTL_DTO_M      0x000F0000  // Data timeout counter value and
-                                            // busy timeout. This value
-                                            // determines the interval by which
-                                            // DAT lines timeouts are detected.
-                                            // The host driver needs to set this
-                                            // bitfield based on - the maximum
-                                            // read access time (NAC) (Refer to
-                                            // the SD Specification Part1
-                                            // Physical Layer) - the data read
-                                            // access time values (TAAC and
-                                            // NSAC) in the card specific data
-                                            // register (CSD) of the card - the
-                                            // timeout clock base frequency
-                                            // (MMCHS_CAPA[TCF]). If the card
-                                            // does not respond within the
-                                            // specified number of cycles a data
-                                            // timeout error occurs
-                                            // (MMCHS_STA[DTO]). The
-                                            // MMCHS_SYSCTL[DTO] register is
-                                            // also used to check busy duration
-                                            // to generate busy timeout for
-                                            // commands with busy response or
-                                            // for busy programming during a
-                                            // write command. Timeout on CRC
-                                            // status is generated if no CRC
-                                            // token is present after a block
-                                            // write. 0x0 TCF x 2^13 0x1 TCF x
-                                            // 2^14 0xE TCF x 2^27 0xF Reserved
-#define MMCHS_SYSCTL_DTO_S      16
-#define MMCHS_SYSCTL_CLKD_M     0x0000FFC0  // Clock frequency select These
-                                            // bits define the ratio between a
-                                            // reference clock frequency (system
-                                            // dependant) and the output clock
-                                            // frequency on the CLK pin of
-                                            // either the memory card (MMC SD or
-                                            // SDIO). 0x000 Clock Ref bypass
-                                            // 0x001 Clock Ref bypass 0x002
-                                            // Clock Ref / 2 0x003 Clock Ref / 3
-                                            // 0x3FF Clock Ref / 1023
-#define MMCHS_SYSCTL_CLKD_S     6
-#define MMCHS_SYSCTL_CEN        0x00000004  // Clock enable This bit controls
-                                            // if the clock is provided to the
-                                            // card or not. 0 The clock is not
-                                            // provided to the card . Clock
-                                            // frequency can be changed . 1 The
-                                            // clock is provided to the card and
-                                            // can be automatically gated when
-                                            // MMCHS_SYSCONFIG[AUTOIDLE] is set
-                                            // to 1 (default value) . The host
-                                            // driver shall wait to set this bit
-                                            // to 1 until the Internal clock is
-                                            // stable (MMCHS_SYSCTL[ICS]).
-#define MMCHS_SYSCTL_ICS        0x00000002
-#define MMCHS_SYSCTL_ICE        0x00000001  // Internal clock enable This
-                                            // register controls the internal
-                                            // clock activity. In very low power
-                                            // state the internal clock is
-                                            // stopped. Note: The activity of
-                                            // the debounce clock (used for
-                                            // wakeup events) and the OCP clock
-                                            // (used for reads and writes to the
-                                            // module register map) are not
-                                            // affected by this register. 0 The
-                                            // internal clock is stopped (very
-                                            // low power state). 1 The internal
-                                            // clock oscillates and can be
-                                            // automatically gated when
-                                            // MMCHS_SYSCONFIG[AUTOIDLE] is set
-                                            // to 1 (default value) .
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_STAT register.
-//
-//******************************************************************************
-#define MMCHS_STAT_BADA         0x20000000
-#define MMCHS_STAT_CERR         0x10000000
-#define MMCHS_STAT_ADMAE        0x02000000
-#define MMCHS_STAT_ACE          0x01000000
-#define MMCHS_STAT_DEB          0x00400000
-#define MMCHS_STAT_DCRC         0x00200000
-#define MMCHS_STAT_DTO          0x00100000
-#define MMCHS_STAT_CIE          0x00080000
-#define MMCHS_STAT_CEB          0x00040000
-#define MMCHS_STAT_CCRC         0x00020000
-#define MMCHS_STAT_CTO          0x00010000
-#define MMCHS_STAT_ERRI         0x00008000
-#define MMCHS_STAT_BSR          0x00000400
-#define MMCHS_STAT_OBI          0x00000200
-#define MMCHS_STAT_CIRQ         0x00000100
-#define MMCHS_STAT_CREM         0x00000080
-#define MMCHS_STAT_CINS         0x00000040
-#define MMCHS_STAT_BRR          0x00000020
-#define MMCHS_STAT_BWR          0x00000010
-#define MMCHS_STAT_DMA          0x00000008
-#define MMCHS_STAT_BGE          0x00000004
-#define MMCHS_STAT_TC           0x00000002
-#define MMCHS_STAT_CC           0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_IE register.
-//
-//******************************************************************************
-#define MMCHS_IE_BADA_ENABLE    0x20000000  // Bad access to data space
-                                            // Interrupt Enable 0 Masked 1
-                                            // Enabled
-#define MMCHS_IE_CERR_ENABLE    0x10000000  // Card error interrupt Enable 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_ADMAE_ENABLE   0x02000000  // ADMA error Interrupt Enable 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_ACE_ENABLE     0x01000000  // Auto CMD12 error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_DEB_ENABLE     0x00400000  // Data end bit error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_DCRC_ENABLE    0x00200000  // Data CRC error Interrupt Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_IE_DTO_ENABLE     0x00100000  // Data timeout error Interrupt
-                                            // Enable 0 The data timeout
-                                            // detection is deactivated. The
-                                            // host controller provides the
-                                            // clock to the card until the card
-                                            // sends the data or the transfer is
-                                            // aborted. 1 The data timeout
-                                            // detection is enabled.
-#define MMCHS_IE_CIE_ENABLE     0x00080000  // Command index error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CEB_ENABLE     0x00040000  // Command end bit error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CCRC_ENABLE    0x00020000  // Command CRC error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CTO_ENABLE     0x00010000  // Command timeout error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_NULL           0x00008000  // Fixed to 0 The host driver shall
-                                            // control error interrupts using
-                                            // the Error Interrupt Signal Enable
-                                            // register. Writes to this bit are
-                                            // ignored
-#define MMCHS_IE_BSR_ENABLE     0x00000400  // Boot status interrupt Enable A
-                                            // write to this register when
-                                            // MMCHS_CON[BOOT_ACK] is set to 0x0
-                                            // is ignored. 0 Masked 1 Enabled
-#define MMCHS_IE_OBI_ENABLE     0x00000200  // Out-of-Band interrupt Enable A
-                                            // write to this register when
-                                            // MMCHS_CON[OBIE] is set to '0' is
-                                            // ignored. 0 Masked 1 Enabled
-#define MMCHS_IE_CIRQ_ENABLE    0x00000100  // Card interrupt Enable A clear of
-                                            // this bit also clears the
-                                            // corresponding status bit. During
-                                            // 1-bit mode if the interrupt
-                                            // routine doesn't remove the source
-                                            // of a card interrupt in the SDIO
-                                            // card the status bit is reasserted
-                                            // when this bit is set to 1. 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_CREM_ENABLE    0x00000080  // Card removal Interrupt Enable 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_CINS_ENABLE    0x00000040  // Card insertion Interrupt Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_IE_BRR_ENABLE     0x00000020  // Buffer Read Ready Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_BWR_ENABLE     0x00000010  // Buffer Write Ready Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_DMA_ENABLE     0x00000008  // DMA interrupt Enable 0 Masked 1
-                                            // Enabled
-#define MMCHS_IE_BGE_ENABLE     0x00000004  // Block Gap Event Interrupt Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_IE_TC_ENABLE      0x00000002  // Transfer completed Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CC_ENABLE      0x00000001  // Command completed Interrupt
-                                            // Enable 0 Masked 1 Enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ISE register.
-//
-//******************************************************************************
-#define MMCHS_ISE_BADA_SIGEN    0x20000000  // Bad access to data space signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CERR_SIGEN    0x10000000  // Card error interrupt signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_ADMAE_SIGEN   0x02000000  // ADMA error signal status Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_ISE_ACE_SIGEN     0x01000000  // Auto CMD12 error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DEB_SIGEN     0x00400000  // Data end bit error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DCRC_SIGEN    0x00200000  // Data CRC error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DTO_SIGEN     0x00100000  // Data timeout error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CIE_SIGEN     0x00080000  // Command index error signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CEB_SIGEN     0x00040000  // Command end bit error signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CCRC_SIGEN    0x00020000  // Command CRC error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CTO_SIGEN     0x00010000  // Command timeout error signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_NULL          0x00008000  // Fixed to 0 The host driver shall
-                                            // control error interrupts using
-                                            // the Error Interrupt Signal Enable
-                                            // register. Writes to this bit are
-                                            // ignored
-#define MMCHS_ISE_BSR_SIGEN     0x00000400  // Boot status signal status
-                                            // EnableA write to this register
-                                            // when MMCHS_CON[BOOT_ACK] is set
-                                            // to 0x0 is ignored. 0 Masked 1
-                                            // Enabled
-#define MMCHS_ISE_OBI_SIGEN     0x00000200  // Out-Of-Band Interrupt signal
-                                            // status Enable A write to this
-                                            // register when MMCHS_CON[OBIE] is
-                                            // set to '0' is ignored. 0 Masked 1
-                                            // Enabled
-#define MMCHS_ISE_CIRQ_SIGEN    0x00000100  // Card interrupt signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CREM_SIGEN    0x00000080  // Card removal signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CINS_SIGEN    0x00000040  // Card insertion signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_BRR_SIGEN     0x00000020  // Buffer Read Ready signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_BWR_SIGEN     0x00000010  // Buffer Write Ready signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DMA_SIGEN     0x00000008  // DMA interrupt Signal status
-                                            // enable 0 Masked 1 Enabled
-#define MMCHS_ISE_BGE_SIGEN     0x00000004  // Black Gap Event signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_TC_SIGEN      0x00000002  // Transfer completed signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CC_SIGEN      0x00000001  // Command completed signal status
-                                            // Enable 0 Masked 1 Enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_AC12 register.
-//
-//******************************************************************************
-#define MMCHS_AC12_CNI          0x00000080
-#define MMCHS_AC12_ACIE         0x00000010
-#define MMCHS_AC12_ACEB         0x00000008
-#define MMCHS_AC12_ACCE         0x00000004
-#define MMCHS_AC12_ACTO         0x00000002
-#define MMCHS_AC12_ACNE         0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CAPA register.
-//
-//******************************************************************************
-#define MMCHS_CAPA_BIT64        0x10000000
-#define MMCHS_CAPA_VS18         0x04000000
-#define MMCHS_CAPA_VS30         0x02000000
-#define MMCHS_CAPA_VS33         0x01000000
-#define MMCHS_CAPA_SRS          0x00800000
-#define MMCHS_CAPA_DS           0x00400000
-#define MMCHS_CAPA_HSS          0x00200000
-#define MMCHS_CAPA_AD2S         0x00080000
-#define MMCHS_CAPA_MBL_M        0x00030000
-#define MMCHS_CAPA_MBL_S        16
-#define MMCHS_CAPA_BCF_M        0x00003F00
-#define MMCHS_CAPA_BCF_S        8
-#define MMCHS_CAPA_TCU          0x00000080
-#define MMCHS_CAPA_TCF_M        0x0000003F
-#define MMCHS_CAPA_TCF_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CUR_CAPA register.
-//
-//******************************************************************************
-#define MMCHS_CUR_CAPA_CUR_1V8_M \
-                                0x00FF0000
-
-#define MMCHS_CUR_CAPA_CUR_1V8_S 16
-#define MMCHS_CUR_CAPA_CUR_3V0_M \
-                                0x0000FF00
-
-#define MMCHS_CUR_CAPA_CUR_3V0_S 8
-#define MMCHS_CUR_CAPA_CUR_3V3_M \
-                                0x000000FF
-
-#define MMCHS_CUR_CAPA_CUR_3V3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_FE register.
-//
-//******************************************************************************
-#define MMCHS_FE_FE_BADA        0x20000000
-#define MMCHS_FE_FE_CERR        0x10000000
-#define MMCHS_FE_FE_ADMAE       0x02000000
-#define MMCHS_FE_FE_ACE         0x01000000
-#define MMCHS_FE_FE_DEB         0x00400000
-#define MMCHS_FE_FE_DCRC        0x00200000
-#define MMCHS_FE_FE_DTO         0x00100000
-#define MMCHS_FE_FE_CIE         0x00080000
-#define MMCHS_FE_FE_CEB         0x00040000
-#define MMCHS_FE_FE_CCRC        0x00020000
-#define MMCHS_FE_FE_CTO         0x00010000
-#define MMCHS_FE_FE_CNI         0x00000080
-#define MMCHS_FE_FE_ACIE        0x00000010
-#define MMCHS_FE_FE_ACEB        0x00000008
-#define MMCHS_FE_FE_ACCE        0x00000004
-#define MMCHS_FE_FE_ACTO        0x00000002
-#define MMCHS_FE_FE_ACNE        0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ADMAES register.
-//
-//******************************************************************************
-#define MMCHS_ADMAES_LME        0x00000004  // ADMA Length Mismatch Error: (1)
-                                            // While Block Count Enable being
-                                            // set the total data length
-                                            // specified by the Descriptor table
-                                            // is different from that specified
-                                            // by the Block Count and Block
-                                            // Length. (2) Total data length can
-                                            // not be divided by the block
-                                            // length. 0 No Error 1 Error
-#define MMCHS_ADMAES_AES_M      0x00000003  // ADMA Error State his field
-                                            // indicates the state of ADMA when
-                                            // error is occurred during ADMA
-                                            // data transfer. "This field never
-                                            // indicates ""10"" because ADMA
-                                            // never stops in this state." 0x0
-                                            // ST_STOP (Stop DMA)Contents of
-                                            // SYS_SDR register 0x1 ST_STOP
-                                            // (Stop DMA)Points the error
-                                            // descriptor 0x2 Never set this
-                                            // state(Not used) 0x3 ST_TFR
-                                            // (Transfer Data)Points the next of
-                                            // the error descriptor
-#define MMCHS_ADMAES_AES_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ADMASAL register.
-//
-//******************************************************************************
-#define MMCHS_ADMASAL_ADMA_A32B_M \
-                                0xFFFFFFFF  // ADMA System address 32 bits.This
-                                            // register holds byte address of
-                                            // executing command of the
-                                            // Descriptor table. 32-bit Address
-                                            // Descriptor uses lower 32-bit of
-                                            // this register. At the start of
-                                            // ADMA the Host Driver shall set
-                                            // start address of the Descriptor
-                                            // table. The ADMA increments this
-                                            // register address which points to
-                                            // next line when every fetching a
-                                            // Descriptor line. When the ADMA
-                                            // Error Interrupt is generated this
-                                            // register shall hold valid
-                                            // Descriptor address depending on
-                                            // the ADMA state. The Host Driver
-                                            // shall program Descriptor Table on
-                                            // 32-bit boundary and set 32-bit
-                                            // boundary address to this
-                                            // register. ADMA2 ignores lower
-                                            // 2-bit of this register and
-                                            // assumes it to be 00b.
-
-#define MMCHS_ADMASAL_ADMA_A32B_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_REV register.
-//
-//******************************************************************************
-#define MMCHS_REV_VREV_M        0xFF000000  // Vendor Version Number: IP
-                                            // revision [7:4] Major revision
-                                            // [3:0] Minor revision Examples:
-                                            // 0x10 for 1.0 0x21 for 2.1
-#define MMCHS_REV_VREV_S        24
-#define MMCHS_REV_SREV_M        0x00FF0000
-#define MMCHS_REV_SREV_S        16
-#define MMCHS_REV_SIS           0x00000001  // Slot Interrupt Status This
-                                            // status bit indicates the inverted
-                                            // state of interrupt signal for the
-                                            // module. By a power on reset or by
-                                            // setting a software reset for all
-                                            // (MMCHS_HCTL[SRA]) the interrupt
-                                            // signal shall be de-asserted and
-                                            // this status shall read 0.
-
-
-
-#endif // __HW_MMCHS_H__
diff --git a/ports/cc3200/hal/inc/hw_nvic.h b/ports/cc3200/hal/inc/hw_nvic.h
deleted file mode 100644
index 1545f22651..0000000000
--- a/ports/cc3200/hal/inc/hw_nvic.h
+++ /dev/null
@@ -1,1710 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// hw_nvic.h - Macros used when accessing the NVIC hardware.
-//
-//*****************************************************************************
-
-#ifndef __HW_NVIC_H__
-#define __HW_NVIC_H__
-
-//*****************************************************************************
-//
-// The following are defines for the NVIC register addresses.
-//
-//*****************************************************************************
-#define NVIC_INT_TYPE           0xE000E004  // Interrupt Controller Type Reg
-#define NVIC_ACTLR              0xE000E008  // Auxiliary Control
-#define NVIC_ST_CTRL            0xE000E010  // SysTick Control and Status
-                                            // Register
-#define NVIC_ST_RELOAD          0xE000E014  // SysTick Reload Value Register
-#define NVIC_ST_CURRENT         0xE000E018  // SysTick Current Value Register
-#define NVIC_ST_CAL             0xE000E01C  // SysTick Calibration Value Reg
-
-#define NVIC_EN0                0xE000E100  // Interrupt 0-31 Set Enable
-#define NVIC_EN1                0xE000E104  // Interrupt 32-54 Set Enable
-#define NVIC_EN2                0xE000E108  // Interrupt 64-95 Set Enable
-#define NVIC_EN3                0xE000E10C  // Interrupt 96-127 Set Enable
-#define NVIC_EN4                0xE000E110  // Interrupt 128-131 Set Enable
-#define NVIC_EN5                0xE000E114  // Interrupt 160-191 Set Enable
-
-#define NVIC_DIS0               0xE000E180  // Interrupt 0-31 Clear Enable
-#define NVIC_DIS1               0xE000E184  // Interrupt 32-54 Clear Enable
-
-#define NVIC_DIS2               0xE000E188  // Interrupt 64-95 Clear Enable
-#define NVIC_DIS3               0xE000E18C  // Interrupt 96-127 Clear Enable
-#define NVIC_DIS4               0xE000E190  // Interrupt 128-131 Clear Enable
-#define NVIC_DIS5               0xE000E194  // Interrupt 160-191 Clear Enable
-
-#define NVIC_PEND0              0xE000E200  // Interrupt 0-31 Set Pending
-#define NVIC_PEND1              0xE000E204  // Interrupt 32-54 Set Pending
-
-#define NVIC_PEND2              0xE000E208  // Interrupt 64-95 Set Pending
-#define NVIC_PEND3              0xE000E20C  // Interrupt 96-127 Set Pending
-#define NVIC_PEND4              0xE000E210  // Interrupt 128-131 Set Pending
-#define NVIC_PEND5              0xE000E214  // Interrupt 160-191 Set Pending
-
-#define NVIC_UNPEND0            0xE000E280  // Interrupt 0-31 Clear Pending
-#define NVIC_UNPEND1            0xE000E284  // Interrupt 32-54 Clear Pending
-
-#define NVIC_UNPEND2            0xE000E288  // Interrupt 64-95 Clear Pending
-#define NVIC_UNPEND3            0xE000E28C  // Interrupt 96-127 Clear Pending
-#define NVIC_UNPEND4            0xE000E290  // Interrupt 128-131 Clear Pending
-#define NVIC_UNPEND5            0xE000E294  // Interrupt 160-191 Clear Pending
-
-#define NVIC_ACTIVE0            0xE000E300  // Interrupt 0-31 Active Bit
-#define NVIC_ACTIVE1            0xE000E304  // Interrupt 32-54 Active Bit
-
-#define NVIC_ACTIVE2            0xE000E308  // Interrupt 64-95 Active Bit
-#define NVIC_ACTIVE3            0xE000E30C  // Interrupt 96-127 Active Bit
-#define NVIC_ACTIVE4            0xE000E310  // Interrupt 128-131 Active Bit
-#define NVIC_ACTIVE5            0xE000E314  // Interrupt 160-191 Active Bit
-
-#define NVIC_PRI0               0xE000E400  // Interrupt 0-3 Priority
-#define NVIC_PRI1               0xE000E404  // Interrupt 4-7 Priority
-#define NVIC_PRI2               0xE000E408  // Interrupt 8-11 Priority
-#define NVIC_PRI3               0xE000E40C  // Interrupt 12-15 Priority
-#define NVIC_PRI4               0xE000E410  // Interrupt 16-19 Priority
-#define NVIC_PRI5               0xE000E414  // Interrupt 20-23 Priority
-#define NVIC_PRI6               0xE000E418  // Interrupt 24-27 Priority
-#define NVIC_PRI7               0xE000E41C  // Interrupt 28-31 Priority
-#define NVIC_PRI8               0xE000E420  // Interrupt 32-35 Priority
-#define NVIC_PRI9               0xE000E424  // Interrupt 36-39 Priority
-#define NVIC_PRI10              0xE000E428  // Interrupt 40-43 Priority
-#define NVIC_PRI11              0xE000E42C  // Interrupt 44-47 Priority
-#define NVIC_PRI12              0xE000E430  // Interrupt 48-51 Priority
-#define NVIC_PRI13              0xE000E434  // Interrupt 52-53 Priority
-
-#define NVIC_PRI14              0xE000E438  // Interrupt 56-59 Priority
-#define NVIC_PRI15              0xE000E43C  // Interrupt 60-63 Priority
-#define NVIC_PRI16              0xE000E440  // Interrupt 64-67 Priority
-#define NVIC_PRI17              0xE000E444  // Interrupt 68-71 Priority
-#define NVIC_PRI18              0xE000E448  // Interrupt 72-75 Priority
-#define NVIC_PRI19              0xE000E44C  // Interrupt 76-79 Priority
-#define NVIC_PRI20              0xE000E450  // Interrupt 80-83 Priority
-#define NVIC_PRI21              0xE000E454  // Interrupt 84-87 Priority
-#define NVIC_PRI22              0xE000E458  // Interrupt 88-91 Priority
-#define NVIC_PRI23              0xE000E45C  // Interrupt 92-95 Priority
-#define NVIC_PRI24              0xE000E460  // Interrupt 96-99 Priority
-#define NVIC_PRI25              0xE000E464  // Interrupt 100-103 Priority
-#define NVIC_PRI26              0xE000E468  // Interrupt 104-107 Priority
-#define NVIC_PRI27              0xE000E46C  // Interrupt 108-111 Priority
-#define NVIC_PRI28              0xE000E470  // Interrupt 112-115 Priority
-#define NVIC_PRI29              0xE000E474  // Interrupt 116-119 Priority
-#define NVIC_PRI30              0xE000E478  // Interrupt 120-123 Priority
-#define NVIC_PRI31              0xE000E47C  // Interrupt 124-127 Priority
-#define NVIC_PRI32              0xE000E480  // Interrupt 128-131 Priority
-#define NVIC_PRI33              0xE000E484  // Interrupt 132-135 Priority
-#define NVIC_PRI34              0xE000E488  // Interrupt 136-139 Priority
-#define NVIC_PRI35              0xE000E48C  // Interrupt 140-143 Priority
-#define NVIC_PRI36              0xE000E490  // Interrupt 144-147 Priority
-#define NVIC_PRI37              0xE000E494  // Interrupt 148-151 Priority
-#define NVIC_PRI38              0xE000E498  // Interrupt 152-155 Priority
-#define NVIC_PRI39              0xE000E49C  // Interrupt 156-159 Priority
-#define NVIC_PRI40              0xE000E4A0  // Interrupt 160-163 Priority
-#define NVIC_PRI41              0xE000E4A4  // Interrupt 164-167 Priority
-#define NVIC_PRI42              0xE000E4A8  // Interrupt 168-171 Priority
-#define NVIC_PRI43              0xE000E4AC  // Interrupt 172-175 Priority
-#define NVIC_PRI44              0xE000E4B0  // Interrupt 176-179 Priority
-#define NVIC_PRI45              0xE000E4B4  // Interrupt 180-183 Priority
-#define NVIC_PRI46              0xE000E4B8  // Interrupt 184-187 Priority
-#define NVIC_PRI47              0xE000E4BC  // Interrupt 188-191 Priority
-#define NVIC_PRI48              0xE000E4C0  // Interrupt 192-195 Priority
-
-
-
-#define NVIC_CPUID              0xE000ED00  // CPU ID Base
-#define NVIC_INT_CTRL           0xE000ED04  // Interrupt Control and State
-#define NVIC_VTABLE             0xE000ED08  // Vector Table Offset
-#define NVIC_APINT              0xE000ED0C  // Application Interrupt and Reset
-                                            // Control
-#define NVIC_SYS_CTRL           0xE000ED10  // System Control
-#define NVIC_CFG_CTRL           0xE000ED14  // Configuration and Control
-#define NVIC_SYS_PRI1           0xE000ED18  // System Handler Priority 1
-#define NVIC_SYS_PRI2           0xE000ED1C  // System Handler Priority 2
-#define NVIC_SYS_PRI3           0xE000ED20  // System Handler Priority 3
-#define NVIC_SYS_HND_CTRL       0xE000ED24  // System Handler Control and State
-#define NVIC_FAULT_STAT         0xE000ED28  // Configurable Fault Status
-#define NVIC_HFAULT_STAT        0xE000ED2C  // Hard Fault Status
-#define NVIC_DEBUG_STAT         0xE000ED30  // Debug Status Register
-#define NVIC_MM_ADDR            0xE000ED34  // Memory Management Fault Address
-#define NVIC_FAULT_ADDR         0xE000ED38  // Bus Fault Address
-#define NVIC_MPU_TYPE           0xE000ED90  // MPU Type
-#define NVIC_MPU_CTRL           0xE000ED94  // MPU Control
-#define NVIC_MPU_NUMBER         0xE000ED98  // MPU Region Number
-#define NVIC_MPU_BASE           0xE000ED9C  // MPU Region Base Address
-#define NVIC_MPU_ATTR           0xE000EDA0  // MPU Region Attribute and Size
-#define NVIC_MPU_BASE1          0xE000EDA4  // MPU Region Base Address Alias 1
-#define NVIC_MPU_ATTR1          0xE000EDA8  // MPU Region Attribute and Size
-                                            // Alias 1
-#define NVIC_MPU_BASE2          0xE000EDAC  // MPU Region Base Address Alias 2
-#define NVIC_MPU_ATTR2          0xE000EDB0  // MPU Region Attribute and Size
-                                            // Alias 2
-#define NVIC_MPU_BASE3          0xE000EDB4  // MPU Region Base Address Alias 3
-#define NVIC_MPU_ATTR3          0xE000EDB8  // MPU Region Attribute and Size
-                                            // Alias 3
-#define NVIC_DBG_CTRL           0xE000EDF0  // Debug Control and Status Reg
-#define NVIC_DBG_XFER           0xE000EDF4  // Debug Core Reg. Transfer Select
-#define NVIC_DBG_DATA           0xE000EDF8  // Debug Core Register Data
-#define NVIC_DBG_INT            0xE000EDFC  // Debug Reset Interrupt Control
-#define NVIC_SW_TRIG            0xE000EF00  // Software Trigger Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_INT_TYPE register.
-//
-//*****************************************************************************
-#define NVIC_INT_TYPE_LINES_M   0x0000001F  // Number of interrupt lines (x32)
-#define NVIC_INT_TYPE_LINES_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTLR register.
-//
-//*****************************************************************************
-#define NVIC_ACTLR_DISFOLD      0x00000004  // Disable IT Folding
-#define NVIC_ACTLR_DISWBUF      0x00000002  // Disable Write Buffer
-#define NVIC_ACTLR_DISMCYC      0x00000001  // Disable Interrupts of Multiple
-                                            // Cycle Instructions
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_ST_CTRL_COUNT      0x00010000  // Count Flag
-#define NVIC_ST_CTRL_CLK_SRC    0x00000004  // Clock Source
-#define NVIC_ST_CTRL_INTEN      0x00000002  // Interrupt Enable
-#define NVIC_ST_CTRL_ENABLE     0x00000001  // Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_RELOAD register.
-//
-//*****************************************************************************
-#define NVIC_ST_RELOAD_M        0x00FFFFFF  // Reload Value
-#define NVIC_ST_RELOAD_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_CURRENT
-// register.
-//
-//*****************************************************************************
-#define NVIC_ST_CURRENT_M       0x00FFFFFF  // Current Value
-#define NVIC_ST_CURRENT_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_CAL register.
-//
-//*****************************************************************************
-#define NVIC_ST_CAL_NOREF       0x80000000  // No reference clock
-#define NVIC_ST_CAL_SKEW        0x40000000  // Clock skew
-#define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  // 1ms reference value
-#define NVIC_ST_CAL_ONEMS_S     0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN0 register.
-//
-//*****************************************************************************
-#define NVIC_EN0_INT_M          0xFFFFFFFF  // Interrupt Enable
-#define NVIC_EN0_INT0           0x00000001  // Interrupt 0 enable
-#define NVIC_EN0_INT1           0x00000002  // Interrupt 1 enable
-#define NVIC_EN0_INT2           0x00000004  // Interrupt 2 enable
-#define NVIC_EN0_INT3           0x00000008  // Interrupt 3 enable
-#define NVIC_EN0_INT4           0x00000010  // Interrupt 4 enable
-#define NVIC_EN0_INT5           0x00000020  // Interrupt 5 enable
-#define NVIC_EN0_INT6           0x00000040  // Interrupt 6 enable
-#define NVIC_EN0_INT7           0x00000080  // Interrupt 7 enable
-#define NVIC_EN0_INT8           0x00000100  // Interrupt 8 enable
-#define NVIC_EN0_INT9           0x00000200  // Interrupt 9 enable
-#define NVIC_EN0_INT10          0x00000400  // Interrupt 10 enable
-#define NVIC_EN0_INT11          0x00000800  // Interrupt 11 enable
-#define NVIC_EN0_INT12          0x00001000  // Interrupt 12 enable
-#define NVIC_EN0_INT13          0x00002000  // Interrupt 13 enable
-#define NVIC_EN0_INT14          0x00004000  // Interrupt 14 enable
-#define NVIC_EN0_INT15          0x00008000  // Interrupt 15 enable
-#define NVIC_EN0_INT16          0x00010000  // Interrupt 16 enable
-#define NVIC_EN0_INT17          0x00020000  // Interrupt 17 enable
-#define NVIC_EN0_INT18          0x00040000  // Interrupt 18 enable
-#define NVIC_EN0_INT19          0x00080000  // Interrupt 19 enable
-#define NVIC_EN0_INT20          0x00100000  // Interrupt 20 enable
-#define NVIC_EN0_INT21          0x00200000  // Interrupt 21 enable
-#define NVIC_EN0_INT22          0x00400000  // Interrupt 22 enable
-#define NVIC_EN0_INT23          0x00800000  // Interrupt 23 enable
-#define NVIC_EN0_INT24          0x01000000  // Interrupt 24 enable
-#define NVIC_EN0_INT25          0x02000000  // Interrupt 25 enable
-#define NVIC_EN0_INT26          0x04000000  // Interrupt 26 enable
-#define NVIC_EN0_INT27          0x08000000  // Interrupt 27 enable
-#define NVIC_EN0_INT28          0x10000000  // Interrupt 28 enable
-#define NVIC_EN0_INT29          0x20000000  // Interrupt 29 enable
-#define NVIC_EN0_INT30          0x40000000  // Interrupt 30 enable
-#define NVIC_EN0_INT31          0x80000000  // Interrupt 31 enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN1 register.
-//
-//*****************************************************************************
-#define NVIC_EN1_INT_M          0x007FFFFF  // Interrupt Enable
-
-#undef NVIC_EN1_INT_M
-#define NVIC_EN1_INT_M          0xFFFFFFFF  // Interrupt Enable
-
-#define NVIC_EN1_INT32          0x00000001  // Interrupt 32 enable
-#define NVIC_EN1_INT33          0x00000002  // Interrupt 33 enable
-#define NVIC_EN1_INT34          0x00000004  // Interrupt 34 enable
-#define NVIC_EN1_INT35          0x00000008  // Interrupt 35 enable
-#define NVIC_EN1_INT36          0x00000010  // Interrupt 36 enable
-#define NVIC_EN1_INT37          0x00000020  // Interrupt 37 enable
-#define NVIC_EN1_INT38          0x00000040  // Interrupt 38 enable
-#define NVIC_EN1_INT39          0x00000080  // Interrupt 39 enable
-#define NVIC_EN1_INT40          0x00000100  // Interrupt 40 enable
-#define NVIC_EN1_INT41          0x00000200  // Interrupt 41 enable
-#define NVIC_EN1_INT42          0x00000400  // Interrupt 42 enable
-#define NVIC_EN1_INT43          0x00000800  // Interrupt 43 enable
-#define NVIC_EN1_INT44          0x00001000  // Interrupt 44 enable
-#define NVIC_EN1_INT45          0x00002000  // Interrupt 45 enable
-#define NVIC_EN1_INT46          0x00004000  // Interrupt 46 enable
-#define NVIC_EN1_INT47          0x00008000  // Interrupt 47 enable
-#define NVIC_EN1_INT48          0x00010000  // Interrupt 48 enable
-#define NVIC_EN1_INT49          0x00020000  // Interrupt 49 enable
-#define NVIC_EN1_INT50          0x00040000  // Interrupt 50 enable
-#define NVIC_EN1_INT51          0x00080000  // Interrupt 51 enable
-#define NVIC_EN1_INT52          0x00100000  // Interrupt 52 enable
-#define NVIC_EN1_INT53          0x00200000  // Interrupt 53 enable
-#define NVIC_EN1_INT54          0x00400000  // Interrupt 54 enable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN2 register.
-//
-//*****************************************************************************
-#define NVIC_EN2_INT_M          0xFFFFFFFF  // Interrupt Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN3 register.
-//
-//*****************************************************************************
-#define NVIC_EN3_INT_M          0xFFFFFFFF  // Interrupt Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN4 register.
-//
-//*****************************************************************************
-#define NVIC_EN4_INT_M          0x0000000F  // Interrupt Enable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS0 register.
-//
-//*****************************************************************************
-#define NVIC_DIS0_INT_M         0xFFFFFFFF  // Interrupt Disable
-#define NVIC_DIS0_INT0          0x00000001  // Interrupt 0 disable
-#define NVIC_DIS0_INT1          0x00000002  // Interrupt 1 disable
-#define NVIC_DIS0_INT2          0x00000004  // Interrupt 2 disable
-#define NVIC_DIS0_INT3          0x00000008  // Interrupt 3 disable
-#define NVIC_DIS0_INT4          0x00000010  // Interrupt 4 disable
-#define NVIC_DIS0_INT5          0x00000020  // Interrupt 5 disable
-#define NVIC_DIS0_INT6          0x00000040  // Interrupt 6 disable
-#define NVIC_DIS0_INT7          0x00000080  // Interrupt 7 disable
-#define NVIC_DIS0_INT8          0x00000100  // Interrupt 8 disable
-#define NVIC_DIS0_INT9          0x00000200  // Interrupt 9 disable
-#define NVIC_DIS0_INT10         0x00000400  // Interrupt 10 disable
-#define NVIC_DIS0_INT11         0x00000800  // Interrupt 11 disable
-#define NVIC_DIS0_INT12         0x00001000  // Interrupt 12 disable
-#define NVIC_DIS0_INT13         0x00002000  // Interrupt 13 disable
-#define NVIC_DIS0_INT14         0x00004000  // Interrupt 14 disable
-#define NVIC_DIS0_INT15         0x00008000  // Interrupt 15 disable
-#define NVIC_DIS0_INT16         0x00010000  // Interrupt 16 disable
-#define NVIC_DIS0_INT17         0x00020000  // Interrupt 17 disable
-#define NVIC_DIS0_INT18         0x00040000  // Interrupt 18 disable
-#define NVIC_DIS0_INT19         0x00080000  // Interrupt 19 disable
-#define NVIC_DIS0_INT20         0x00100000  // Interrupt 20 disable
-#define NVIC_DIS0_INT21         0x00200000  // Interrupt 21 disable
-#define NVIC_DIS0_INT22         0x00400000  // Interrupt 22 disable
-#define NVIC_DIS0_INT23         0x00800000  // Interrupt 23 disable
-#define NVIC_DIS0_INT24         0x01000000  // Interrupt 24 disable
-#define NVIC_DIS0_INT25         0x02000000  // Interrupt 25 disable
-#define NVIC_DIS0_INT26         0x04000000  // Interrupt 26 disable
-#define NVIC_DIS0_INT27         0x08000000  // Interrupt 27 disable
-#define NVIC_DIS0_INT28         0x10000000  // Interrupt 28 disable
-#define NVIC_DIS0_INT29         0x20000000  // Interrupt 29 disable
-#define NVIC_DIS0_INT30         0x40000000  // Interrupt 30 disable
-#define NVIC_DIS0_INT31         0x80000000  // Interrupt 31 disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS1 register.
-//
-//*****************************************************************************
-#define NVIC_DIS1_INT_M         0x00FFFFFF  // Interrupt Disable
-
-#undef NVIC_DIS1_INT_M
-#define NVIC_DIS1_INT_M         0xFFFFFFFF  // Interrupt Disable
-
-#define NVIC_DIS1_INT32         0x00000001  // Interrupt 32 disable
-#define NVIC_DIS1_INT33         0x00000002  // Interrupt 33 disable
-#define NVIC_DIS1_INT34         0x00000004  // Interrupt 34 disable
-#define NVIC_DIS1_INT35         0x00000008  // Interrupt 35 disable
-#define NVIC_DIS1_INT36         0x00000010  // Interrupt 36 disable
-#define NVIC_DIS1_INT37         0x00000020  // Interrupt 37 disable
-#define NVIC_DIS1_INT38         0x00000040  // Interrupt 38 disable
-#define NVIC_DIS1_INT39         0x00000080  // Interrupt 39 disable
-#define NVIC_DIS1_INT40         0x00000100  // Interrupt 40 disable
-#define NVIC_DIS1_INT41         0x00000200  // Interrupt 41 disable
-#define NVIC_DIS1_INT42         0x00000400  // Interrupt 42 disable
-#define NVIC_DIS1_INT43         0x00000800  // Interrupt 43 disable
-#define NVIC_DIS1_INT44         0x00001000  // Interrupt 44 disable
-#define NVIC_DIS1_INT45         0x00002000  // Interrupt 45 disable
-#define NVIC_DIS1_INT46         0x00004000  // Interrupt 46 disable
-#define NVIC_DIS1_INT47         0x00008000  // Interrupt 47 disable
-#define NVIC_DIS1_INT48         0x00010000  // Interrupt 48 disable
-#define NVIC_DIS1_INT49         0x00020000  // Interrupt 49 disable
-#define NVIC_DIS1_INT50         0x00040000  // Interrupt 50 disable
-#define NVIC_DIS1_INT51         0x00080000  // Interrupt 51 disable
-#define NVIC_DIS1_INT52         0x00100000  // Interrupt 52 disable
-#define NVIC_DIS1_INT53         0x00200000  // Interrupt 53 disable
-#define NVIC_DIS1_INT54         0x00400000  // Interrupt 54 disable
-#define NVIC_DIS1_INT55         0x00800000  // Interrupt 55 disable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS2 register.
-//
-//*****************************************************************************
-#define NVIC_DIS2_INT_M         0xFFFFFFFF  // Interrupt Disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS3 register.
-//
-//*****************************************************************************
-#define NVIC_DIS3_INT_M         0xFFFFFFFF  // Interrupt Disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS4 register.
-//
-//*****************************************************************************
-#define NVIC_DIS4_INT_M         0x0000000F  // Interrupt Disable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND0 register.
-//
-//*****************************************************************************
-#define NVIC_PEND0_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-#define NVIC_PEND0_INT0         0x00000001  // Interrupt 0 pend
-#define NVIC_PEND0_INT1         0x00000002  // Interrupt 1 pend
-#define NVIC_PEND0_INT2         0x00000004  // Interrupt 2 pend
-#define NVIC_PEND0_INT3         0x00000008  // Interrupt 3 pend
-#define NVIC_PEND0_INT4         0x00000010  // Interrupt 4 pend
-#define NVIC_PEND0_INT5         0x00000020  // Interrupt 5 pend
-#define NVIC_PEND0_INT6         0x00000040  // Interrupt 6 pend
-#define NVIC_PEND0_INT7         0x00000080  // Interrupt 7 pend
-#define NVIC_PEND0_INT8         0x00000100  // Interrupt 8 pend
-#define NVIC_PEND0_INT9         0x00000200  // Interrupt 9 pend
-#define NVIC_PEND0_INT10        0x00000400  // Interrupt 10 pend
-#define NVIC_PEND0_INT11        0x00000800  // Interrupt 11 pend
-#define NVIC_PEND0_INT12        0x00001000  // Interrupt 12 pend
-#define NVIC_PEND0_INT13        0x00002000  // Interrupt 13 pend
-#define NVIC_PEND0_INT14        0x00004000  // Interrupt 14 pend
-#define NVIC_PEND0_INT15        0x00008000  // Interrupt 15 pend
-#define NVIC_PEND0_INT16        0x00010000  // Interrupt 16 pend
-#define NVIC_PEND0_INT17        0x00020000  // Interrupt 17 pend
-#define NVIC_PEND0_INT18        0x00040000  // Interrupt 18 pend
-#define NVIC_PEND0_INT19        0x00080000  // Interrupt 19 pend
-#define NVIC_PEND0_INT20        0x00100000  // Interrupt 20 pend
-#define NVIC_PEND0_INT21        0x00200000  // Interrupt 21 pend
-#define NVIC_PEND0_INT22        0x00400000  // Interrupt 22 pend
-#define NVIC_PEND0_INT23        0x00800000  // Interrupt 23 pend
-#define NVIC_PEND0_INT24        0x01000000  // Interrupt 24 pend
-#define NVIC_PEND0_INT25        0x02000000  // Interrupt 25 pend
-#define NVIC_PEND0_INT26        0x04000000  // Interrupt 26 pend
-#define NVIC_PEND0_INT27        0x08000000  // Interrupt 27 pend
-#define NVIC_PEND0_INT28        0x10000000  // Interrupt 28 pend
-#define NVIC_PEND0_INT29        0x20000000  // Interrupt 29 pend
-#define NVIC_PEND0_INT30        0x40000000  // Interrupt 30 pend
-#define NVIC_PEND0_INT31        0x80000000  // Interrupt 31 pend
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND1 register.
-//
-//*****************************************************************************
-#define NVIC_PEND1_INT_M        0x00FFFFFF  // Interrupt Set Pending
-
-#undef NVIC_PEND1_INT_M
-#define NVIC_PEND1_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-
-#define NVIC_PEND1_INT32        0x00000001  // Interrupt 32 pend
-#define NVIC_PEND1_INT33        0x00000002  // Interrupt 33 pend
-#define NVIC_PEND1_INT34        0x00000004  // Interrupt 34 pend
-#define NVIC_PEND1_INT35        0x00000008  // Interrupt 35 pend
-#define NVIC_PEND1_INT36        0x00000010  // Interrupt 36 pend
-#define NVIC_PEND1_INT37        0x00000020  // Interrupt 37 pend
-#define NVIC_PEND1_INT38        0x00000040  // Interrupt 38 pend
-#define NVIC_PEND1_INT39        0x00000080  // Interrupt 39 pend
-#define NVIC_PEND1_INT40        0x00000100  // Interrupt 40 pend
-#define NVIC_PEND1_INT41        0x00000200  // Interrupt 41 pend
-#define NVIC_PEND1_INT42        0x00000400  // Interrupt 42 pend
-#define NVIC_PEND1_INT43        0x00000800  // Interrupt 43 pend
-#define NVIC_PEND1_INT44        0x00001000  // Interrupt 44 pend
-#define NVIC_PEND1_INT45        0x00002000  // Interrupt 45 pend
-#define NVIC_PEND1_INT46        0x00004000  // Interrupt 46 pend
-#define NVIC_PEND1_INT47        0x00008000  // Interrupt 47 pend
-#define NVIC_PEND1_INT48        0x00010000  // Interrupt 48 pend
-#define NVIC_PEND1_INT49        0x00020000  // Interrupt 49 pend
-#define NVIC_PEND1_INT50        0x00040000  // Interrupt 50 pend
-#define NVIC_PEND1_INT51        0x00080000  // Interrupt 51 pend
-#define NVIC_PEND1_INT52        0x00100000  // Interrupt 52 pend
-#define NVIC_PEND1_INT53        0x00200000  // Interrupt 53 pend
-#define NVIC_PEND1_INT54        0x00400000  // Interrupt 54 pend
-#define NVIC_PEND1_INT55        0x00800000  // Interrupt 55 pend
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND2 register.
-//
-//*****************************************************************************
-#define NVIC_PEND2_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND3 register.
-//
-//*****************************************************************************
-#define NVIC_PEND3_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND4 register.
-//
-//*****************************************************************************
-#define NVIC_PEND4_INT_M        0x0000000F  // Interrupt Set Pending
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND0 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND0_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-#define NVIC_UNPEND0_INT0       0x00000001  // Interrupt 0 unpend
-#define NVIC_UNPEND0_INT1       0x00000002  // Interrupt 1 unpend
-#define NVIC_UNPEND0_INT2       0x00000004  // Interrupt 2 unpend
-#define NVIC_UNPEND0_INT3       0x00000008  // Interrupt 3 unpend
-#define NVIC_UNPEND0_INT4       0x00000010  // Interrupt 4 unpend
-#define NVIC_UNPEND0_INT5       0x00000020  // Interrupt 5 unpend
-#define NVIC_UNPEND0_INT6       0x00000040  // Interrupt 6 unpend
-#define NVIC_UNPEND0_INT7       0x00000080  // Interrupt 7 unpend
-#define NVIC_UNPEND0_INT8       0x00000100  // Interrupt 8 unpend
-#define NVIC_UNPEND0_INT9       0x00000200  // Interrupt 9 unpend
-#define NVIC_UNPEND0_INT10      0x00000400  // Interrupt 10 unpend
-#define NVIC_UNPEND0_INT11      0x00000800  // Interrupt 11 unpend
-#define NVIC_UNPEND0_INT12      0x00001000  // Interrupt 12 unpend
-#define NVIC_UNPEND0_INT13      0x00002000  // Interrupt 13 unpend
-#define NVIC_UNPEND0_INT14      0x00004000  // Interrupt 14 unpend
-#define NVIC_UNPEND0_INT15      0x00008000  // Interrupt 15 unpend
-#define NVIC_UNPEND0_INT16      0x00010000  // Interrupt 16 unpend
-#define NVIC_UNPEND0_INT17      0x00020000  // Interrupt 17 unpend
-#define NVIC_UNPEND0_INT18      0x00040000  // Interrupt 18 unpend
-#define NVIC_UNPEND0_INT19      0x00080000  // Interrupt 19 unpend
-#define NVIC_UNPEND0_INT20      0x00100000  // Interrupt 20 unpend
-#define NVIC_UNPEND0_INT21      0x00200000  // Interrupt 21 unpend
-#define NVIC_UNPEND0_INT22      0x00400000  // Interrupt 22 unpend
-#define NVIC_UNPEND0_INT23      0x00800000  // Interrupt 23 unpend
-#define NVIC_UNPEND0_INT24      0x01000000  // Interrupt 24 unpend
-#define NVIC_UNPEND0_INT25      0x02000000  // Interrupt 25 unpend
-#define NVIC_UNPEND0_INT26      0x04000000  // Interrupt 26 unpend
-#define NVIC_UNPEND0_INT27      0x08000000  // Interrupt 27 unpend
-#define NVIC_UNPEND0_INT28      0x10000000  // Interrupt 28 unpend
-#define NVIC_UNPEND0_INT29      0x20000000  // Interrupt 29 unpend
-#define NVIC_UNPEND0_INT30      0x40000000  // Interrupt 30 unpend
-#define NVIC_UNPEND0_INT31      0x80000000  // Interrupt 31 unpend
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND1 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND1_INT_M      0x00FFFFFF  // Interrupt Clear Pending
-
-#undef NVIC_UNPEND1_INT_M
-#define NVIC_UNPEND1_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-
-#define NVIC_UNPEND1_INT32      0x00000001  // Interrupt 32 unpend
-#define NVIC_UNPEND1_INT33      0x00000002  // Interrupt 33 unpend
-#define NVIC_UNPEND1_INT34      0x00000004  // Interrupt 34 unpend
-#define NVIC_UNPEND1_INT35      0x00000008  // Interrupt 35 unpend
-#define NVIC_UNPEND1_INT36      0x00000010  // Interrupt 36 unpend
-#define NVIC_UNPEND1_INT37      0x00000020  // Interrupt 37 unpend
-#define NVIC_UNPEND1_INT38      0x00000040  // Interrupt 38 unpend
-#define NVIC_UNPEND1_INT39      0x00000080  // Interrupt 39 unpend
-#define NVIC_UNPEND1_INT40      0x00000100  // Interrupt 40 unpend
-#define NVIC_UNPEND1_INT41      0x00000200  // Interrupt 41 unpend
-#define NVIC_UNPEND1_INT42      0x00000400  // Interrupt 42 unpend
-#define NVIC_UNPEND1_INT43      0x00000800  // Interrupt 43 unpend
-#define NVIC_UNPEND1_INT44      0x00001000  // Interrupt 44 unpend
-#define NVIC_UNPEND1_INT45      0x00002000  // Interrupt 45 unpend
-#define NVIC_UNPEND1_INT46      0x00004000  // Interrupt 46 unpend
-#define NVIC_UNPEND1_INT47      0x00008000  // Interrupt 47 unpend
-#define NVIC_UNPEND1_INT48      0x00010000  // Interrupt 48 unpend
-#define NVIC_UNPEND1_INT49      0x00020000  // Interrupt 49 unpend
-#define NVIC_UNPEND1_INT50      0x00040000  // Interrupt 50 unpend
-#define NVIC_UNPEND1_INT51      0x00080000  // Interrupt 51 unpend
-#define NVIC_UNPEND1_INT52      0x00100000  // Interrupt 52 unpend
-#define NVIC_UNPEND1_INT53      0x00200000  // Interrupt 53 unpend
-#define NVIC_UNPEND1_INT54      0x00400000  // Interrupt 54 unpend
-#define NVIC_UNPEND1_INT55      0x00800000  // Interrupt 55 unpend
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND2 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND2_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND3 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND3_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND4 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND4_INT_M      0x0000000F  // Interrupt Clear Pending
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE0 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE0_INT_M      0xFFFFFFFF  // Interrupt Active
-#define NVIC_ACTIVE0_INT0       0x00000001  // Interrupt 0 active
-#define NVIC_ACTIVE0_INT1       0x00000002  // Interrupt 1 active
-#define NVIC_ACTIVE0_INT2       0x00000004  // Interrupt 2 active
-#define NVIC_ACTIVE0_INT3       0x00000008  // Interrupt 3 active
-#define NVIC_ACTIVE0_INT4       0x00000010  // Interrupt 4 active
-#define NVIC_ACTIVE0_INT5       0x00000020  // Interrupt 5 active
-#define NVIC_ACTIVE0_INT6       0x00000040  // Interrupt 6 active
-#define NVIC_ACTIVE0_INT7       0x00000080  // Interrupt 7 active
-#define NVIC_ACTIVE0_INT8       0x00000100  // Interrupt 8 active
-#define NVIC_ACTIVE0_INT9       0x00000200  // Interrupt 9 active
-#define NVIC_ACTIVE0_INT10      0x00000400  // Interrupt 10 active
-#define NVIC_ACTIVE0_INT11      0x00000800  // Interrupt 11 active
-#define NVIC_ACTIVE0_INT12      0x00001000  // Interrupt 12 active
-#define NVIC_ACTIVE0_INT13      0x00002000  // Interrupt 13 active
-#define NVIC_ACTIVE0_INT14      0x00004000  // Interrupt 14 active
-#define NVIC_ACTIVE0_INT15      0x00008000  // Interrupt 15 active
-#define NVIC_ACTIVE0_INT16      0x00010000  // Interrupt 16 active
-#define NVIC_ACTIVE0_INT17      0x00020000  // Interrupt 17 active
-#define NVIC_ACTIVE0_INT18      0x00040000  // Interrupt 18 active
-#define NVIC_ACTIVE0_INT19      0x00080000  // Interrupt 19 active
-#define NVIC_ACTIVE0_INT20      0x00100000  // Interrupt 20 active
-#define NVIC_ACTIVE0_INT21      0x00200000  // Interrupt 21 active
-#define NVIC_ACTIVE0_INT22      0x00400000  // Interrupt 22 active
-#define NVIC_ACTIVE0_INT23      0x00800000  // Interrupt 23 active
-#define NVIC_ACTIVE0_INT24      0x01000000  // Interrupt 24 active
-#define NVIC_ACTIVE0_INT25      0x02000000  // Interrupt 25 active
-#define NVIC_ACTIVE0_INT26      0x04000000  // Interrupt 26 active
-#define NVIC_ACTIVE0_INT27      0x08000000  // Interrupt 27 active
-#define NVIC_ACTIVE0_INT28      0x10000000  // Interrupt 28 active
-#define NVIC_ACTIVE0_INT29      0x20000000  // Interrupt 29 active
-#define NVIC_ACTIVE0_INT30      0x40000000  // Interrupt 30 active
-#define NVIC_ACTIVE0_INT31      0x80000000  // Interrupt 31 active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE1 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE1_INT_M      0x00FFFFFF  // Interrupt Active
-
-#undef NVIC_ACTIVE1_INT_M
-#define NVIC_ACTIVE1_INT_M      0xFFFFFFFF  // Interrupt Active
-
-#define NVIC_ACTIVE1_INT32      0x00000001  // Interrupt 32 active
-#define NVIC_ACTIVE1_INT33      0x00000002  // Interrupt 33 active
-#define NVIC_ACTIVE1_INT34      0x00000004  // Interrupt 34 active
-#define NVIC_ACTIVE1_INT35      0x00000008  // Interrupt 35 active
-#define NVIC_ACTIVE1_INT36      0x00000010  // Interrupt 36 active
-#define NVIC_ACTIVE1_INT37      0x00000020  // Interrupt 37 active
-#define NVIC_ACTIVE1_INT38      0x00000040  // Interrupt 38 active
-#define NVIC_ACTIVE1_INT39      0x00000080  // Interrupt 39 active
-#define NVIC_ACTIVE1_INT40      0x00000100  // Interrupt 40 active
-#define NVIC_ACTIVE1_INT41      0x00000200  // Interrupt 41 active
-#define NVIC_ACTIVE1_INT42      0x00000400  // Interrupt 42 active
-#define NVIC_ACTIVE1_INT43      0x00000800  // Interrupt 43 active
-#define NVIC_ACTIVE1_INT44      0x00001000  // Interrupt 44 active
-#define NVIC_ACTIVE1_INT45      0x00002000  // Interrupt 45 active
-#define NVIC_ACTIVE1_INT46      0x00004000  // Interrupt 46 active
-#define NVIC_ACTIVE1_INT47      0x00008000  // Interrupt 47 active
-#define NVIC_ACTIVE1_INT48      0x00010000  // Interrupt 48 active
-#define NVIC_ACTIVE1_INT49      0x00020000  // Interrupt 49 active
-#define NVIC_ACTIVE1_INT50      0x00040000  // Interrupt 50 active
-#define NVIC_ACTIVE1_INT51      0x00080000  // Interrupt 51 active
-#define NVIC_ACTIVE1_INT52      0x00100000  // Interrupt 52 active
-#define NVIC_ACTIVE1_INT53      0x00200000  // Interrupt 53 active
-#define NVIC_ACTIVE1_INT54      0x00400000  // Interrupt 54 active
-#define NVIC_ACTIVE1_INT55      0x00800000  // Interrupt 55 active
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE2 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE2_INT_M      0xFFFFFFFF  // Interrupt Active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE3 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE3_INT_M      0xFFFFFFFF  // Interrupt Active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE4 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE4_INT_M      0x0000000F  // Interrupt Active
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI0 register.
-//
-//*****************************************************************************
-#define NVIC_PRI0_INT3_M        0xE0000000  // Interrupt 3 Priority Mask
-#define NVIC_PRI0_INT2_M        0x00E00000  // Interrupt 2 Priority Mask
-#define NVIC_PRI0_INT1_M        0x0000E000  // Interrupt 1 Priority Mask
-#define NVIC_PRI0_INT0_M        0x000000E0  // Interrupt 0 Priority Mask
-#define NVIC_PRI0_INT3_S        29
-#define NVIC_PRI0_INT2_S        21
-#define NVIC_PRI0_INT1_S        13
-#define NVIC_PRI0_INT0_S        5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI1 register.
-//
-//*****************************************************************************
-#define NVIC_PRI1_INT7_M        0xE0000000  // Interrupt 7 Priority Mask
-#define NVIC_PRI1_INT6_M        0x00E00000  // Interrupt 6 Priority Mask
-#define NVIC_PRI1_INT5_M        0x0000E000  // Interrupt 5 Priority Mask
-#define NVIC_PRI1_INT4_M        0x000000E0  // Interrupt 4 Priority Mask
-#define NVIC_PRI1_INT7_S        29
-#define NVIC_PRI1_INT6_S        21
-#define NVIC_PRI1_INT5_S        13
-#define NVIC_PRI1_INT4_S        5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI2 register.
-//
-//*****************************************************************************
-#define NVIC_PRI2_INT11_M       0xE0000000  // Interrupt 11 Priority Mask
-#define NVIC_PRI2_INT10_M       0x00E00000  // Interrupt 10 Priority Mask
-#define NVIC_PRI2_INT9_M        0x0000E000  // Interrupt 9 Priority Mask
-#define NVIC_PRI2_INT8_M        0x000000E0  // Interrupt 8 Priority Mask
-#define NVIC_PRI2_INT11_S       29
-#define NVIC_PRI2_INT10_S       21
-#define NVIC_PRI2_INT9_S        13
-#define NVIC_PRI2_INT8_S        5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI3 register.
-//
-//*****************************************************************************
-#define NVIC_PRI3_INT15_M       0xE0000000  // Interrupt 15 Priority Mask
-#define NVIC_PRI3_INT14_M       0x00E00000  // Interrupt 14 Priority Mask
-#define NVIC_PRI3_INT13_M       0x0000E000  // Interrupt 13 Priority Mask
-#define NVIC_PRI3_INT12_M       0x000000E0  // Interrupt 12 Priority Mask
-#define NVIC_PRI3_INT15_S       29
-#define NVIC_PRI3_INT14_S       21
-#define NVIC_PRI3_INT13_S       13
-#define NVIC_PRI3_INT12_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI4 register.
-//
-//*****************************************************************************
-#define NVIC_PRI4_INT19_M       0xE0000000  // Interrupt 19 Priority Mask
-#define NVIC_PRI4_INT18_M       0x00E00000  // Interrupt 18 Priority Mask
-#define NVIC_PRI4_INT17_M       0x0000E000  // Interrupt 17 Priority Mask
-#define NVIC_PRI4_INT16_M       0x000000E0  // Interrupt 16 Priority Mask
-#define NVIC_PRI4_INT19_S       29
-#define NVIC_PRI4_INT18_S       21
-#define NVIC_PRI4_INT17_S       13
-#define NVIC_PRI4_INT16_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI5 register.
-//
-//*****************************************************************************
-#define NVIC_PRI5_INT23_M       0xE0000000  // Interrupt 23 Priority Mask
-#define NVIC_PRI5_INT22_M       0x00E00000  // Interrupt 22 Priority Mask
-#define NVIC_PRI5_INT21_M       0x0000E000  // Interrupt 21 Priority Mask
-#define NVIC_PRI5_INT20_M       0x000000E0  // Interrupt 20 Priority Mask
-#define NVIC_PRI5_INT23_S       29
-#define NVIC_PRI5_INT22_S       21
-#define NVIC_PRI5_INT21_S       13
-#define NVIC_PRI5_INT20_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI6 register.
-//
-//*****************************************************************************
-#define NVIC_PRI6_INT27_M       0xE0000000  // Interrupt 27 Priority Mask
-#define NVIC_PRI6_INT26_M       0x00E00000  // Interrupt 26 Priority Mask
-#define NVIC_PRI6_INT25_M       0x0000E000  // Interrupt 25 Priority Mask
-#define NVIC_PRI6_INT24_M       0x000000E0  // Interrupt 24 Priority Mask
-#define NVIC_PRI6_INT27_S       29
-#define NVIC_PRI6_INT26_S       21
-#define NVIC_PRI6_INT25_S       13
-#define NVIC_PRI6_INT24_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI7 register.
-//
-//*****************************************************************************
-#define NVIC_PRI7_INT31_M       0xE0000000  // Interrupt 31 Priority Mask
-#define NVIC_PRI7_INT30_M       0x00E00000  // Interrupt 30 Priority Mask
-#define NVIC_PRI7_INT29_M       0x0000E000  // Interrupt 29 Priority Mask
-#define NVIC_PRI7_INT28_M       0x000000E0  // Interrupt 28 Priority Mask
-#define NVIC_PRI7_INT31_S       29
-#define NVIC_PRI7_INT30_S       21
-#define NVIC_PRI7_INT29_S       13
-#define NVIC_PRI7_INT28_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI8 register.
-//
-//*****************************************************************************
-#define NVIC_PRI8_INT35_M       0xE0000000  // Interrupt 35 Priority Mask
-#define NVIC_PRI8_INT34_M       0x00E00000  // Interrupt 34 Priority Mask
-#define NVIC_PRI8_INT33_M       0x0000E000  // Interrupt 33 Priority Mask
-#define NVIC_PRI8_INT32_M       0x000000E0  // Interrupt 32 Priority Mask
-#define NVIC_PRI8_INT35_S       29
-#define NVIC_PRI8_INT34_S       21
-#define NVIC_PRI8_INT33_S       13
-#define NVIC_PRI8_INT32_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI9 register.
-//
-//*****************************************************************************
-#define NVIC_PRI9_INT39_M       0xE0000000  // Interrupt 39 Priority Mask
-#define NVIC_PRI9_INT38_M       0x00E00000  // Interrupt 38 Priority Mask
-#define NVIC_PRI9_INT37_M       0x0000E000  // Interrupt 37 Priority Mask
-#define NVIC_PRI9_INT36_M       0x000000E0  // Interrupt 36 Priority Mask
-#define NVIC_PRI9_INT39_S       29
-#define NVIC_PRI9_INT38_S       21
-#define NVIC_PRI9_INT37_S       13
-#define NVIC_PRI9_INT36_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI10 register.
-//
-//*****************************************************************************
-#define NVIC_PRI10_INT43_M      0xE0000000  // Interrupt 43 Priority Mask
-#define NVIC_PRI10_INT42_M      0x00E00000  // Interrupt 42 Priority Mask
-#define NVIC_PRI10_INT41_M      0x0000E000  // Interrupt 41 Priority Mask
-#define NVIC_PRI10_INT40_M      0x000000E0  // Interrupt 40 Priority Mask
-#define NVIC_PRI10_INT43_S      29
-#define NVIC_PRI10_INT42_S      21
-#define NVIC_PRI10_INT41_S      13
-#define NVIC_PRI10_INT40_S      5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI11 register.
-//
-//*****************************************************************************
-#define NVIC_PRI11_INT47_M      0xE0000000  // Interrupt 47 Priority Mask
-#define NVIC_PRI11_INT46_M      0x00E00000  // Interrupt 46 Priority Mask
-#define NVIC_PRI11_INT45_M      0x0000E000  // Interrupt 45 Priority Mask
-#define NVIC_PRI11_INT44_M      0x000000E0  // Interrupt 44 Priority Mask
-#define NVIC_PRI11_INT47_S      29
-#define NVIC_PRI11_INT46_S      21
-#define NVIC_PRI11_INT45_S      13
-#define NVIC_PRI11_INT44_S      5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI12 register.
-//
-//*****************************************************************************
-#define NVIC_PRI12_INT51_M      0xE0000000  // Interrupt 51 Priority Mask
-#define NVIC_PRI12_INT50_M      0x00E00000  // Interrupt 50 Priority Mask
-#define NVIC_PRI12_INT49_M      0x0000E000  // Interrupt 49 Priority Mask
-#define NVIC_PRI12_INT48_M      0x000000E0  // Interrupt 48 Priority Mask
-#define NVIC_PRI12_INT51_S      29
-#define NVIC_PRI12_INT50_S      21
-#define NVIC_PRI12_INT49_S      13
-#define NVIC_PRI12_INT48_S      5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI13 register.
-//
-//*****************************************************************************
-#define NVIC_PRI13_INT55_M      0xE0000000  // Interrupt 55 Priority Mask
-#define NVIC_PRI13_INT54_M      0x00E00000  // Interrupt 54 Priority Mask
-#define NVIC_PRI13_INT53_M      0x0000E000  // Interrupt 53 Priority Mask
-#define NVIC_PRI13_INT52_M      0x000000E0  // Interrupt 52 Priority Mask
-#define NVIC_PRI13_INT55_S      29
-#define NVIC_PRI13_INT54_S      21
-#define NVIC_PRI13_INT53_S      13
-#define NVIC_PRI13_INT52_S      5
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI14 register.
-//
-//*****************************************************************************
-#define NVIC_PRI14_INTD_M       0xE0000000  // Interrupt 59 Priority Mask
-#define NVIC_PRI14_INTC_M       0x00E00000  // Interrupt 58 Priority Mask
-#define NVIC_PRI14_INTB_M       0x0000E000  // Interrupt 57 Priority Mask
-#define NVIC_PRI14_INTA_M       0x000000E0  // Interrupt 56 Priority Mask
-#define NVIC_PRI14_INTD_S       29
-#define NVIC_PRI14_INTC_S       21
-#define NVIC_PRI14_INTB_S       13
-#define NVIC_PRI14_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI15 register.
-//
-//*****************************************************************************
-#define NVIC_PRI15_INTD_M       0xE0000000  // Interrupt 63 Priority Mask
-#define NVIC_PRI15_INTC_M       0x00E00000  // Interrupt 62 Priority Mask
-#define NVIC_PRI15_INTB_M       0x0000E000  // Interrupt 61 Priority Mask
-#define NVIC_PRI15_INTA_M       0x000000E0  // Interrupt 60 Priority Mask
-#define NVIC_PRI15_INTD_S       29
-#define NVIC_PRI15_INTC_S       21
-#define NVIC_PRI15_INTB_S       13
-#define NVIC_PRI15_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI16 register.
-//
-//*****************************************************************************
-#define NVIC_PRI16_INTD_M       0xE0000000  // Interrupt 67 Priority Mask
-#define NVIC_PRI16_INTC_M       0x00E00000  // Interrupt 66 Priority Mask
-#define NVIC_PRI16_INTB_M       0x0000E000  // Interrupt 65 Priority Mask
-#define NVIC_PRI16_INTA_M       0x000000E0  // Interrupt 64 Priority Mask
-#define NVIC_PRI16_INTD_S       29
-#define NVIC_PRI16_INTC_S       21
-#define NVIC_PRI16_INTB_S       13
-#define NVIC_PRI16_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI17 register.
-//
-//*****************************************************************************
-#define NVIC_PRI17_INTD_M       0xE0000000  // Interrupt 71 Priority Mask
-#define NVIC_PRI17_INTC_M       0x00E00000  // Interrupt 70 Priority Mask
-#define NVIC_PRI17_INTB_M       0x0000E000  // Interrupt 69 Priority Mask
-#define NVIC_PRI17_INTA_M       0x000000E0  // Interrupt 68 Priority Mask
-#define NVIC_PRI17_INTD_S       29
-#define NVIC_PRI17_INTC_S       21
-#define NVIC_PRI17_INTB_S       13
-#define NVIC_PRI17_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI18 register.
-//
-//*****************************************************************************
-#define NVIC_PRI18_INTD_M       0xE0000000  // Interrupt 75 Priority Mask
-#define NVIC_PRI18_INTC_M       0x00E00000  // Interrupt 74 Priority Mask
-#define NVIC_PRI18_INTB_M       0x0000E000  // Interrupt 73 Priority Mask
-#define NVIC_PRI18_INTA_M       0x000000E0  // Interrupt 72 Priority Mask
-#define NVIC_PRI18_INTD_S       29
-#define NVIC_PRI18_INTC_S       21
-#define NVIC_PRI18_INTB_S       13
-#define NVIC_PRI18_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI19 register.
-//
-//*****************************************************************************
-#define NVIC_PRI19_INTD_M       0xE0000000  // Interrupt 79 Priority Mask
-#define NVIC_PRI19_INTC_M       0x00E00000  // Interrupt 78 Priority Mask
-#define NVIC_PRI19_INTB_M       0x0000E000  // Interrupt 77 Priority Mask
-#define NVIC_PRI19_INTA_M       0x000000E0  // Interrupt 76 Priority Mask
-#define NVIC_PRI19_INTD_S       29
-#define NVIC_PRI19_INTC_S       21
-#define NVIC_PRI19_INTB_S       13
-#define NVIC_PRI19_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI20 register.
-//
-//*****************************************************************************
-#define NVIC_PRI20_INTD_M       0xE0000000  // Interrupt 83 Priority Mask
-#define NVIC_PRI20_INTC_M       0x00E00000  // Interrupt 82 Priority Mask
-#define NVIC_PRI20_INTB_M       0x0000E000  // Interrupt 81 Priority Mask
-#define NVIC_PRI20_INTA_M       0x000000E0  // Interrupt 80 Priority Mask
-#define NVIC_PRI20_INTD_S       29
-#define NVIC_PRI20_INTC_S       21
-#define NVIC_PRI20_INTB_S       13
-#define NVIC_PRI20_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI21 register.
-//
-//*****************************************************************************
-#define NVIC_PRI21_INTD_M       0xE0000000  // Interrupt 87 Priority Mask
-#define NVIC_PRI21_INTC_M       0x00E00000  // Interrupt 86 Priority Mask
-#define NVIC_PRI21_INTB_M       0x0000E000  // Interrupt 85 Priority Mask
-#define NVIC_PRI21_INTA_M       0x000000E0  // Interrupt 84 Priority Mask
-#define NVIC_PRI21_INTD_S       29
-#define NVIC_PRI21_INTC_S       21
-#define NVIC_PRI21_INTB_S       13
-#define NVIC_PRI21_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI22 register.
-//
-//*****************************************************************************
-#define NVIC_PRI22_INTD_M       0xE0000000  // Interrupt 91 Priority Mask
-#define NVIC_PRI22_INTC_M       0x00E00000  // Interrupt 90 Priority Mask
-#define NVIC_PRI22_INTB_M       0x0000E000  // Interrupt 89 Priority Mask
-#define NVIC_PRI22_INTA_M       0x000000E0  // Interrupt 88 Priority Mask
-#define NVIC_PRI22_INTD_S       29
-#define NVIC_PRI22_INTC_S       21
-#define NVIC_PRI22_INTB_S       13
-#define NVIC_PRI22_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI23 register.
-//
-//*****************************************************************************
-#define NVIC_PRI23_INTD_M       0xE0000000  // Interrupt 95 Priority Mask
-#define NVIC_PRI23_INTC_M       0x00E00000  // Interrupt 94 Priority Mask
-#define NVIC_PRI23_INTB_M       0x0000E000  // Interrupt 93 Priority Mask
-#define NVIC_PRI23_INTA_M       0x000000E0  // Interrupt 92 Priority Mask
-#define NVIC_PRI23_INTD_S       29
-#define NVIC_PRI23_INTC_S       21
-#define NVIC_PRI23_INTB_S       13
-#define NVIC_PRI23_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI24 register.
-//
-//*****************************************************************************
-#define NVIC_PRI24_INTD_M       0xE0000000  // Interrupt 99 Priority Mask
-#define NVIC_PRI24_INTC_M       0x00E00000  // Interrupt 98 Priority Mask
-#define NVIC_PRI24_INTB_M       0x0000E000  // Interrupt 97 Priority Mask
-#define NVIC_PRI24_INTA_M       0x000000E0  // Interrupt 96 Priority Mask
-#define NVIC_PRI24_INTD_S       29
-#define NVIC_PRI24_INTC_S       21
-#define NVIC_PRI24_INTB_S       13
-#define NVIC_PRI24_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI25 register.
-//
-//*****************************************************************************
-#define NVIC_PRI25_INTD_M       0xE0000000  // Interrupt 103 Priority Mask
-#define NVIC_PRI25_INTC_M       0x00E00000  // Interrupt 102 Priority Mask
-#define NVIC_PRI25_INTB_M       0x0000E000  // Interrupt 101 Priority Mask
-#define NVIC_PRI25_INTA_M       0x000000E0  // Interrupt 100 Priority Mask
-#define NVIC_PRI25_INTD_S       29
-#define NVIC_PRI25_INTC_S       21
-#define NVIC_PRI25_INTB_S       13
-#define NVIC_PRI25_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI26 register.
-//
-//*****************************************************************************
-#define NVIC_PRI26_INTD_M       0xE0000000  // Interrupt 107 Priority Mask
-#define NVIC_PRI26_INTC_M       0x00E00000  // Interrupt 106 Priority Mask
-#define NVIC_PRI26_INTB_M       0x0000E000  // Interrupt 105 Priority Mask
-#define NVIC_PRI26_INTA_M       0x000000E0  // Interrupt 104 Priority Mask
-#define NVIC_PRI26_INTD_S       29
-#define NVIC_PRI26_INTC_S       21
-#define NVIC_PRI26_INTB_S       13
-#define NVIC_PRI26_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI27 register.
-//
-//*****************************************************************************
-#define NVIC_PRI27_INTD_M       0xE0000000  // Interrupt 111 Priority Mask
-#define NVIC_PRI27_INTC_M       0x00E00000  // Interrupt 110 Priority Mask
-#define NVIC_PRI27_INTB_M       0x0000E000  // Interrupt 109 Priority Mask
-#define NVIC_PRI27_INTA_M       0x000000E0  // Interrupt 108 Priority Mask
-#define NVIC_PRI27_INTD_S       29
-#define NVIC_PRI27_INTC_S       21
-#define NVIC_PRI27_INTB_S       13
-#define NVIC_PRI27_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI28 register.
-//
-//*****************************************************************************
-#define NVIC_PRI28_INTD_M       0xE0000000  // Interrupt 115 Priority Mask
-#define NVIC_PRI28_INTC_M       0x00E00000  // Interrupt 114 Priority Mask
-#define NVIC_PRI28_INTB_M       0x0000E000  // Interrupt 113 Priority Mask
-#define NVIC_PRI28_INTA_M       0x000000E0  // Interrupt 112 Priority Mask
-#define NVIC_PRI28_INTD_S       29
-#define NVIC_PRI28_INTC_S       21
-#define NVIC_PRI28_INTB_S       13
-#define NVIC_PRI28_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI29 register.
-//
-//*****************************************************************************
-#define NVIC_PRI29_INTD_M       0xE0000000  // Interrupt 119 Priority Mask
-#define NVIC_PRI29_INTC_M       0x00E00000  // Interrupt 118 Priority Mask
-#define NVIC_PRI29_INTB_M       0x0000E000  // Interrupt 117 Priority Mask
-#define NVIC_PRI29_INTA_M       0x000000E0  // Interrupt 116 Priority Mask
-#define NVIC_PRI29_INTD_S       29
-#define NVIC_PRI29_INTC_S       21
-#define NVIC_PRI29_INTB_S       13
-#define NVIC_PRI29_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI30 register.
-//
-//*****************************************************************************
-#define NVIC_PRI30_INTD_M       0xE0000000  // Interrupt 123 Priority Mask
-#define NVIC_PRI30_INTC_M       0x00E00000  // Interrupt 122 Priority Mask
-#define NVIC_PRI30_INTB_M       0x0000E000  // Interrupt 121 Priority Mask
-#define NVIC_PRI30_INTA_M       0x000000E0  // Interrupt 120 Priority Mask
-#define NVIC_PRI30_INTD_S       29
-#define NVIC_PRI30_INTC_S       21
-#define NVIC_PRI30_INTB_S       13
-#define NVIC_PRI30_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI31 register.
-//
-//*****************************************************************************
-#define NVIC_PRI31_INTD_M       0xE0000000  // Interrupt 127 Priority Mask
-#define NVIC_PRI31_INTC_M       0x00E00000  // Interrupt 126 Priority Mask
-#define NVIC_PRI31_INTB_M       0x0000E000  // Interrupt 125 Priority Mask
-#define NVIC_PRI31_INTA_M       0x000000E0  // Interrupt 124 Priority Mask
-#define NVIC_PRI31_INTD_S       29
-#define NVIC_PRI31_INTC_S       21
-#define NVIC_PRI31_INTB_S       13
-#define NVIC_PRI31_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI32 register.
-//
-//*****************************************************************************
-#define NVIC_PRI32_INTD_M       0xE0000000  // Interrupt 131 Priority Mask
-#define NVIC_PRI32_INTC_M       0x00E00000  // Interrupt 130 Priority Mask
-#define NVIC_PRI32_INTB_M       0x0000E000  // Interrupt 129 Priority Mask
-#define NVIC_PRI32_INTA_M       0x000000E0  // Interrupt 128 Priority Mask
-#define NVIC_PRI32_INTD_S       29
-#define NVIC_PRI32_INTC_S       21
-#define NVIC_PRI32_INTB_S       13
-#define NVIC_PRI32_INTA_S       5
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_CPUID register.
-//
-//*****************************************************************************
-#define NVIC_CPUID_IMP_M        0xFF000000  // Implementer Code
-#define NVIC_CPUID_IMP_ARM      0x41000000  // ARM
-#define NVIC_CPUID_VAR_M        0x00F00000  // Variant Number
-#define NVIC_CPUID_CON_M        0x000F0000  // Constant
-#define NVIC_CPUID_PARTNO_M     0x0000FFF0  // Part Number
-#define NVIC_CPUID_PARTNO_CM3   0x0000C230  // Cortex-M3 processor
-
-#define NVIC_CPUID_PARTNO_CM4   0x0000C240  // Cortex-M4 processor
-
-#define NVIC_CPUID_REV_M        0x0000000F  // Revision Number
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_INT_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_INT_CTRL_NMI_SET   0x80000000  // NMI Set Pending
-#define NVIC_INT_CTRL_PEND_SV   0x10000000  // PendSV Set Pending
-#define NVIC_INT_CTRL_UNPEND_SV 0x08000000  // PendSV Clear Pending
-#define NVIC_INT_CTRL_PENDSTSET 0x04000000  // SysTick Set Pending
-#define NVIC_INT_CTRL_PENDSTCLR 0x02000000  // SysTick Clear Pending
-#define NVIC_INT_CTRL_ISR_PRE   0x00800000  // Debug Interrupt Handling
-#define NVIC_INT_CTRL_ISR_PEND  0x00400000  // Interrupt Pending
-#define NVIC_INT_CTRL_VEC_PEN_M 0x0007F000  // Interrupt Pending Vector Number
-
-#undef NVIC_INT_CTRL_VEC_PEN_M
-#define NVIC_INT_CTRL_VEC_PEN_M 0x000FF000  // Interrupt Pending Vector Number
-
-#define NVIC_INT_CTRL_VEC_PEN_NMI \
-                                0x00002000  // NMI
-#define NVIC_INT_CTRL_VEC_PEN_HARD \
-                                0x00003000  // Hard fault
-#define NVIC_INT_CTRL_VEC_PEN_MEM \
-                                0x00004000  // Memory management fault
-#define NVIC_INT_CTRL_VEC_PEN_BUS \
-                                0x00005000  // Bus fault
-#define NVIC_INT_CTRL_VEC_PEN_USG \
-                                0x00006000  // Usage fault
-#define NVIC_INT_CTRL_VEC_PEN_SVC \
-                                0x0000B000  // SVCall
-#define NVIC_INT_CTRL_VEC_PEN_PNDSV \
-                                0x0000E000  // PendSV
-#define NVIC_INT_CTRL_VEC_PEN_TICK \
-                                0x0000F000  // SysTick
-#define NVIC_INT_CTRL_RET_BASE  0x00000800  // Return to Base
-#define NVIC_INT_CTRL_VEC_ACT_M 0x0000007F  // Interrupt Pending Vector Number
-
-#undef NVIC_INT_CTRL_VEC_ACT_M
-#define NVIC_INT_CTRL_VEC_ACT_M 0x000000FF  // Interrupt Pending Vector Number
-
-#define NVIC_INT_CTRL_VEC_PEN_S 12
-#define NVIC_INT_CTRL_VEC_ACT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_VTABLE register.
-//
-//*****************************************************************************
-#define NVIC_VTABLE_BASE        0x20000000  // Vector Table Base
-#define NVIC_VTABLE_OFFSET_M    0x1FFFFE00  // Vector Table Offset
-
-#undef NVIC_VTABLE_OFFSET_M
-#define NVIC_VTABLE_OFFSET_M    0x1FFFFC00  // Vector Table Offset
-
-#define NVIC_VTABLE_OFFSET_S    9
-
-#undef NVIC_VTABLE_OFFSET_S
-#define NVIC_VTABLE_OFFSET_S    10
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_APINT register.
-//
-//*****************************************************************************
-#define NVIC_APINT_VECTKEY_M    0xFFFF0000  // Register Key
-#define NVIC_APINT_VECTKEY      0x05FA0000  // Vector key
-#define NVIC_APINT_ENDIANESS    0x00008000  // Data Endianess
-#define NVIC_APINT_PRIGROUP_M   0x00000700  // Interrupt Priority Grouping
-#define NVIC_APINT_PRIGROUP_7_1 0x00000000  // Priority group 7.1 split
-#define NVIC_APINT_PRIGROUP_6_2 0x00000100  // Priority group 6.2 split
-#define NVIC_APINT_PRIGROUP_5_3 0x00000200  // Priority group 5.3 split
-#define NVIC_APINT_PRIGROUP_4_4 0x00000300  // Priority group 4.4 split
-#define NVIC_APINT_PRIGROUP_3_5 0x00000400  // Priority group 3.5 split
-#define NVIC_APINT_PRIGROUP_2_6 0x00000500  // Priority group 2.6 split
-#define NVIC_APINT_PRIGROUP_1_7 0x00000600  // Priority group 1.7 split
-#define NVIC_APINT_PRIGROUP_0_8 0x00000700  // Priority group 0.8 split
-#define NVIC_APINT_SYSRESETREQ  0x00000004  // System Reset Request
-#define NVIC_APINT_VECT_CLR_ACT 0x00000002  // Clear Active NMI / Fault
-#define NVIC_APINT_VECT_RESET   0x00000001  // System Reset
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_SYS_CTRL_SEVONPEND 0x00000010  // Wake Up on Pending
-#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  // Deep Sleep Enable
-#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  // Sleep on ISR Exit
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_CFG_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_CFG_CTRL_STKALIGN  0x00000200  // Stack Alignment on Exception
-                                            // Entry
-#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  // Ignore Bus Fault in NMI and
-                                            // Fault
-#define NVIC_CFG_CTRL_DIV0      0x00000010  // Trap on Divide by 0
-#define NVIC_CFG_CTRL_UNALIGNED 0x00000008  // Trap on Unaligned Access
-#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  // Allow Main Interrupt Trigger
-#define NVIC_CFG_CTRL_BASE_THR  0x00000001  // Thread State Control
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
-//
-//*****************************************************************************
-#define NVIC_SYS_PRI1_USAGE_M   0x00E00000  // Usage Fault Priority
-#define NVIC_SYS_PRI1_BUS_M     0x0000E000  // Bus Fault Priority
-#define NVIC_SYS_PRI1_MEM_M     0x000000E0  // Memory Management Fault Priority
-#define NVIC_SYS_PRI1_USAGE_S   21
-#define NVIC_SYS_PRI1_BUS_S     13
-#define NVIC_SYS_PRI1_MEM_S     5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
-//
-//*****************************************************************************
-#define NVIC_SYS_PRI2_SVC_M     0xE0000000  // SVCall Priority
-#define NVIC_SYS_PRI2_SVC_S     29
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
-//
-//*****************************************************************************
-#define NVIC_SYS_PRI3_TICK_M    0xE0000000  // SysTick Exception Priority
-#define NVIC_SYS_PRI3_PENDSV_M  0x00E00000  // PendSV Priority
-#define NVIC_SYS_PRI3_DEBUG_M   0x000000E0  // Debug Priority
-#define NVIC_SYS_PRI3_TICK_S    29
-#define NVIC_SYS_PRI3_PENDSV_S  21
-#define NVIC_SYS_PRI3_DEBUG_S   5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_HND_CTRL
-// register.
-//
-//*****************************************************************************
-#define NVIC_SYS_HND_CTRL_USAGE 0x00040000  // Usage Fault Enable
-#define NVIC_SYS_HND_CTRL_BUS   0x00020000  // Bus Fault Enable
-#define NVIC_SYS_HND_CTRL_MEM   0x00010000  // Memory Management Fault Enable
-#define NVIC_SYS_HND_CTRL_SVC   0x00008000  // SVC Call Pending
-#define NVIC_SYS_HND_CTRL_BUSP  0x00004000  // Bus Fault Pending
-#define NVIC_SYS_HND_CTRL_MEMP  0x00002000  // Memory Management Fault Pending
-#define NVIC_SYS_HND_CTRL_USAGEP \
-                                0x00001000  // Usage Fault Pending
-#define NVIC_SYS_HND_CTRL_TICK  0x00000800  // SysTick Exception Active
-#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  // PendSV Exception Active
-#define NVIC_SYS_HND_CTRL_MON   0x00000100  // Debug Monitor Active
-#define NVIC_SYS_HND_CTRL_SVCA  0x00000080  // SVC Call Active
-#define NVIC_SYS_HND_CTRL_USGA  0x00000008  // Usage Fault Active
-#define NVIC_SYS_HND_CTRL_BUSA  0x00000002  // Bus Fault Active
-#define NVIC_SYS_HND_CTRL_MEMA  0x00000001  // Memory Management Fault Active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_FAULT_STAT
-// register.
-//
-//*****************************************************************************
-#define NVIC_FAULT_STAT_DIV0    0x02000000  // Divide-by-Zero Usage Fault
-#define NVIC_FAULT_STAT_UNALIGN 0x01000000  // Unaligned Access Usage Fault
-#define NVIC_FAULT_STAT_NOCP    0x00080000  // No Coprocessor Usage Fault
-#define NVIC_FAULT_STAT_INVPC   0x00040000  // Invalid PC Load Usage Fault
-#define NVIC_FAULT_STAT_INVSTAT 0x00020000  // Invalid State Usage Fault
-#define NVIC_FAULT_STAT_UNDEF   0x00010000  // Undefined Instruction Usage
-                                            // Fault
-#define NVIC_FAULT_STAT_BFARV   0x00008000  // Bus Fault Address Register Valid
-
-#define NVIC_FAULT_STAT_BLSPERR 0x00002000  // Bus Fault on Floating-Point Lazy
-                                            // State Preservation
-
-#define NVIC_FAULT_STAT_BSTKE   0x00001000  // Stack Bus Fault
-#define NVIC_FAULT_STAT_BUSTKE  0x00000800  // Unstack Bus Fault
-#define NVIC_FAULT_STAT_IMPRE   0x00000400  // Imprecise Data Bus Error
-#define NVIC_FAULT_STAT_PRECISE 0x00000200  // Precise Data Bus Error
-#define NVIC_FAULT_STAT_IBUS    0x00000100  // Instruction Bus Error
-#define NVIC_FAULT_STAT_MMARV   0x00000080  // Memory Management Fault Address
-                                            // Register Valid
-
-#define NVIC_FAULT_STAT_MLSPERR 0x00000020  // Memory Management Fault on
-                                            // Floating-Point Lazy State
-                                            // Preservation
-
-#define NVIC_FAULT_STAT_MSTKE   0x00000010  // Stack Access Violation
-#define NVIC_FAULT_STAT_MUSTKE  0x00000008  // Unstack Access Violation
-#define NVIC_FAULT_STAT_DERR    0x00000002  // Data Access Violation
-#define NVIC_FAULT_STAT_IERR    0x00000001  // Instruction Access Violation
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_HFAULT_STAT
-// register.
-//
-//*****************************************************************************
-#define NVIC_HFAULT_STAT_DBG    0x80000000  // Debug Event
-#define NVIC_HFAULT_STAT_FORCED 0x40000000  // Forced Hard Fault
-#define NVIC_HFAULT_STAT_VECT   0x00000002  // Vector Table Read Fault
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DEBUG_STAT
-// register.
-//
-//*****************************************************************************
-#define NVIC_DEBUG_STAT_EXTRNL  0x00000010  // EDBGRQ asserted
-#define NVIC_DEBUG_STAT_VCATCH  0x00000008  // Vector catch
-#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  // DWT match
-#define NVIC_DEBUG_STAT_BKPT    0x00000002  // Breakpoint instruction
-#define NVIC_DEBUG_STAT_HALTED  0x00000001  // Halt request
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MM_ADDR register.
-//
-//*****************************************************************************
-#define NVIC_MM_ADDR_M          0xFFFFFFFF  // Fault Address
-#define NVIC_MM_ADDR_S          0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_FAULT_ADDR
-// register.
-//
-//*****************************************************************************
-#define NVIC_FAULT_ADDR_M       0xFFFFFFFF  // Fault Address
-#define NVIC_FAULT_ADDR_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_TYPE register.
-//
-//*****************************************************************************
-#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  // Number of I Regions
-#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  // Number of D Regions
-#define NVIC_MPU_TYPE_SEPARATE  0x00000001  // Separate or Unified MPU
-#define NVIC_MPU_TYPE_IREGION_S 16
-#define NVIC_MPU_TYPE_DREGION_S 8
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004  // MPU Default Region
-#define NVIC_MPU_CTRL_HFNMIENA  0x00000002  // MPU Enabled During Faults
-#define NVIC_MPU_CTRL_ENABLE    0x00000001  // MPU Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_NUMBER
-// register.
-//
-//*****************************************************************************
-#define NVIC_MPU_NUMBER_M       0x00000007  // MPU Region to Access
-#define NVIC_MPU_NUMBER_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE_ADDR_M    0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE_VALID     0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE_REGION_M  0x00000007  // Region Number
-#define NVIC_MPU_BASE_ADDR_S    5
-#define NVIC_MPU_BASE_REGION_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR_M         0xFFFF0000  // Attributes
-#define NVIC_MPU_ATTR_XN        0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR_AP_M      0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR_AP_NO_NO  0x00000000  // prv: no access, usr: no access
-#define NVIC_MPU_ATTR_AP_RW_NO  0x01000000  // prv: rw, usr: none
-#define NVIC_MPU_ATTR_AP_RW_RO  0x02000000  // prv: rw, usr: read-only
-#define NVIC_MPU_ATTR_AP_RW_RW  0x03000000  // prv: rw, usr: rw
-#define NVIC_MPU_ATTR_AP_RO_NO  0x05000000  // prv: ro, usr: none
-#define NVIC_MPU_ATTR_AP_RO_RO  0x06000000  // prv: ro, usr: ro
-#define NVIC_MPU_ATTR_TEX_M     0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR_SHAREABLE 0x00040000  // Shareable
-#define NVIC_MPU_ATTR_CACHEABLE 0x00020000  // Cacheable
-#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000  // Bufferable
-#define NVIC_MPU_ATTR_SRD_M     0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR_SRD_0     0x00000100  // Sub-region 0 disable
-#define NVIC_MPU_ATTR_SRD_1     0x00000200  // Sub-region 1 disable
-#define NVIC_MPU_ATTR_SRD_2     0x00000400  // Sub-region 2 disable
-#define NVIC_MPU_ATTR_SRD_3     0x00000800  // Sub-region 3 disable
-#define NVIC_MPU_ATTR_SRD_4     0x00001000  // Sub-region 4 disable
-#define NVIC_MPU_ATTR_SRD_5     0x00002000  // Sub-region 5 disable
-#define NVIC_MPU_ATTR_SRD_6     0x00004000  // Sub-region 6 disable
-#define NVIC_MPU_ATTR_SRD_7     0x00008000  // Sub-region 7 disable
-#define NVIC_MPU_ATTR_SIZE_M    0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR_SIZE_32B  0x00000008  // Region size 32 bytes
-#define NVIC_MPU_ATTR_SIZE_64B  0x0000000A  // Region size 64 bytes
-#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C  // Region size 128 bytes
-#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E  // Region size 256 bytes
-#define NVIC_MPU_ATTR_SIZE_512B 0x00000010  // Region size 512 bytes
-#define NVIC_MPU_ATTR_SIZE_1K   0x00000012  // Region size 1 Kbytes
-#define NVIC_MPU_ATTR_SIZE_2K   0x00000014  // Region size 2 Kbytes
-#define NVIC_MPU_ATTR_SIZE_4K   0x00000016  // Region size 4 Kbytes
-#define NVIC_MPU_ATTR_SIZE_8K   0x00000018  // Region size 8 Kbytes
-#define NVIC_MPU_ATTR_SIZE_16K  0x0000001A  // Region size 16 Kbytes
-#define NVIC_MPU_ATTR_SIZE_32K  0x0000001C  // Region size 32 Kbytes
-#define NVIC_MPU_ATTR_SIZE_64K  0x0000001E  // Region size 64 Kbytes
-#define NVIC_MPU_ATTR_SIZE_128K 0x00000020  // Region size 128 Kbytes
-#define NVIC_MPU_ATTR_SIZE_256K 0x00000022  // Region size 256 Kbytes
-#define NVIC_MPU_ATTR_SIZE_512K 0x00000024  // Region size 512 Kbytes
-#define NVIC_MPU_ATTR_SIZE_1M   0x00000026  // Region size 1 Mbytes
-#define NVIC_MPU_ATTR_SIZE_2M   0x00000028  // Region size 2 Mbytes
-#define NVIC_MPU_ATTR_SIZE_4M   0x0000002A  // Region size 4 Mbytes
-#define NVIC_MPU_ATTR_SIZE_8M   0x0000002C  // Region size 8 Mbytes
-#define NVIC_MPU_ATTR_SIZE_16M  0x0000002E  // Region size 16 Mbytes
-#define NVIC_MPU_ATTR_SIZE_32M  0x00000030  // Region size 32 Mbytes
-#define NVIC_MPU_ATTR_SIZE_64M  0x00000032  // Region size 64 Mbytes
-#define NVIC_MPU_ATTR_SIZE_128M 0x00000034  // Region size 128 Mbytes
-#define NVIC_MPU_ATTR_SIZE_256M 0x00000036  // Region size 256 Mbytes
-#define NVIC_MPU_ATTR_SIZE_512M 0x00000038  // Region size 512 Mbytes
-#define NVIC_MPU_ATTR_SIZE_1G   0x0000003A  // Region size 1 Gbytes
-#define NVIC_MPU_ATTR_SIZE_2G   0x0000003C  // Region size 2 Gbytes
-#define NVIC_MPU_ATTR_SIZE_4G   0x0000003E  // Region size 4 Gbytes
-#define NVIC_MPU_ATTR_ENABLE    0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE1 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE1_ADDR_M   0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE1_VALID    0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE1_REGION_M 0x00000007  // Region Number
-#define NVIC_MPU_BASE1_ADDR_S   5
-#define NVIC_MPU_BASE1_REGION_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR1 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR1_XN       0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR1_AP_M     0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR1_TEX_M    0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR1_SHAREABLE \
-                                0x00040000  // Shareable
-#define NVIC_MPU_ATTR1_CACHEABLE \
-                                0x00020000  // Cacheable
-#define NVIC_MPU_ATTR1_BUFFRABLE \
-                                0x00010000  // Bufferable
-#define NVIC_MPU_ATTR1_SRD_M    0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR1_SIZE_M   0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR1_ENABLE   0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE2 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE2_ADDR_M   0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE2_VALID    0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE2_REGION_M 0x00000007  // Region Number
-#define NVIC_MPU_BASE2_ADDR_S   5
-#define NVIC_MPU_BASE2_REGION_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR2 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR2_XN       0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR2_AP_M     0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR2_TEX_M    0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR2_SHAREABLE \
-                                0x00040000  // Shareable
-#define NVIC_MPU_ATTR2_CACHEABLE \
-                                0x00020000  // Cacheable
-#define NVIC_MPU_ATTR2_BUFFRABLE \
-                                0x00010000  // Bufferable
-#define NVIC_MPU_ATTR2_SRD_M    0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR2_SIZE_M   0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR2_ENABLE   0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE3 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE3_ADDR_M   0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE3_VALID    0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE3_REGION_M 0x00000007  // Region Number
-#define NVIC_MPU_BASE3_ADDR_S   5
-#define NVIC_MPU_BASE3_REGION_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR3 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR3_XN       0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR3_AP_M     0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR3_TEX_M    0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR3_SHAREABLE \
-                                0x00040000  // Shareable
-#define NVIC_MPU_ATTR3_CACHEABLE \
-                                0x00020000  // Cacheable
-#define NVIC_MPU_ATTR3_BUFFRABLE \
-                                0x00010000  // Bufferable
-#define NVIC_MPU_ATTR3_SRD_M    0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR3_SIZE_M   0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR3_ENABLE   0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  // Debug key mask
-#define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  // Debug key
-#define NVIC_DBG_CTRL_S_RESET_ST \
-                                0x02000000  // Core has reset since last read
-#define NVIC_DBG_CTRL_S_RETIRE_ST \
-                                0x01000000  // Core has executed insruction
-                                            // since last read
-#define NVIC_DBG_CTRL_S_LOCKUP  0x00080000  // Core is locked up
-#define NVIC_DBG_CTRL_S_SLEEP   0x00040000  // Core is sleeping
-#define NVIC_DBG_CTRL_S_HALT    0x00020000  // Core status on halt
-#define NVIC_DBG_CTRL_S_REGRDY  0x00010000  // Register read/write available
-#define NVIC_DBG_CTRL_C_SNAPSTALL \
-                                0x00000020  // Breaks a stalled load/store
-#define NVIC_DBG_CTRL_C_MASKINT 0x00000008  // Mask interrupts when stepping
-#define NVIC_DBG_CTRL_C_STEP    0x00000004  // Step the core
-#define NVIC_DBG_CTRL_C_HALT    0x00000002  // Halt the core
-#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  // Enable debug
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_XFER register.
-//
-//*****************************************************************************
-#define NVIC_DBG_XFER_REG_WNR   0x00010000  // Write or not read
-#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  // Register
-#define NVIC_DBG_XFER_REG_R0    0x00000000  // Register R0
-#define NVIC_DBG_XFER_REG_R1    0x00000001  // Register R1
-#define NVIC_DBG_XFER_REG_R2    0x00000002  // Register R2
-#define NVIC_DBG_XFER_REG_R3    0x00000003  // Register R3
-#define NVIC_DBG_XFER_REG_R4    0x00000004  // Register R4
-#define NVIC_DBG_XFER_REG_R5    0x00000005  // Register R5
-#define NVIC_DBG_XFER_REG_R6    0x00000006  // Register R6
-#define NVIC_DBG_XFER_REG_R7    0x00000007  // Register R7
-#define NVIC_DBG_XFER_REG_R8    0x00000008  // Register R8
-#define NVIC_DBG_XFER_REG_R9    0x00000009  // Register R9
-#define NVIC_DBG_XFER_REG_R10   0x0000000A  // Register R10
-#define NVIC_DBG_XFER_REG_R11   0x0000000B  // Register R11
-#define NVIC_DBG_XFER_REG_R12   0x0000000C  // Register R12
-#define NVIC_DBG_XFER_REG_R13   0x0000000D  // Register R13
-#define NVIC_DBG_XFER_REG_R14   0x0000000E  // Register R14
-#define NVIC_DBG_XFER_REG_R15   0x0000000F  // Register R15
-#define NVIC_DBG_XFER_REG_FLAGS 0x00000010  // xPSR/Flags register
-#define NVIC_DBG_XFER_REG_MSP   0x00000011  // Main SP
-#define NVIC_DBG_XFER_REG_PSP   0x00000012  // Process SP
-#define NVIC_DBG_XFER_REG_DSP   0x00000013  // Deep SP
-#define NVIC_DBG_XFER_REG_CFBP  0x00000014  // Control/Fault/BasePri/PriMask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_DATA register.
-//
-//*****************************************************************************
-#define NVIC_DBG_DATA_M         0xFFFFFFFF  // Data temporary cache
-#define NVIC_DBG_DATA_S         0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_INT register.
-//
-//*****************************************************************************
-#define NVIC_DBG_INT_HARDERR    0x00000400  // Debug trap on hard fault
-#define NVIC_DBG_INT_INTERR     0x00000200  // Debug trap on interrupt errors
-#define NVIC_DBG_INT_BUSERR     0x00000100  // Debug trap on bus error
-#define NVIC_DBG_INT_STATERR    0x00000080  // Debug trap on usage fault state
-#define NVIC_DBG_INT_CHKERR     0x00000040  // Debug trap on usage fault check
-#define NVIC_DBG_INT_NOCPERR    0x00000020  // Debug trap on coprocessor error
-#define NVIC_DBG_INT_MMERR      0x00000010  // Debug trap on mem manage fault
-#define NVIC_DBG_INT_RESET      0x00000008  // Core reset status
-#define NVIC_DBG_INT_RSTPENDCLR 0x00000004  // Clear pending core reset
-#define NVIC_DBG_INT_RSTPENDING 0x00000002  // Core reset is pending
-#define NVIC_DBG_INT_RSTVCATCH  0x00000001  // Reset vector catch
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SW_TRIG register.
-//
-//*****************************************************************************
-#define NVIC_SW_TRIG_INTID_M    0x0000003F  // Interrupt ID
-
-#undef NVIC_SW_TRIG_INTID_M
-#define NVIC_SW_TRIG_INTID_M    0x000000FF  // Interrupt ID
-
-#define NVIC_SW_TRIG_INTID_S    0
-
-#endif // __HW_NVIC_H__
diff --git a/ports/cc3200/hal/inc/hw_ocp_shared.h b/ports/cc3200/hal/inc/hw_ocp_shared.h
deleted file mode 100644
index a52f6901b7..0000000000
--- a/ports/cc3200/hal/inc/hw_ocp_shared.h
+++ /dev/null
@@ -1,3445 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_OCP_SHARED_H__
-#define __HW_OCP_SHARED_H__
-
-//*****************************************************************************
-//
-// The following are defines for the OCP_SHARED register offsets.
-//
-//*****************************************************************************
-#define OCP_SHARED_O_SEMAPHORE1 0x00000000
-#define OCP_SHARED_O_SEMAPHORE2 0x00000004
-#define OCP_SHARED_O_SEMAPHORE3 0x00000008
-#define OCP_SHARED_O_SEMAPHORE4 0x0000000C
-#define OCP_SHARED_O_SEMAPHORE5 0x00000010
-#define OCP_SHARED_O_SEMAPHORE6 0x00000014
-#define OCP_SHARED_O_SEMAPHORE7 0x00000018
-#define OCP_SHARED_O_SEMAPHORE8 0x0000001C
-#define OCP_SHARED_O_SEMAPHORE9 0x00000020
-#define OCP_SHARED_O_SEMAPHORE10 \
-                                0x00000024
-
-#define OCP_SHARED_O_SEMAPHORE11 \
-                                0x00000028
-
-#define OCP_SHARED_O_SEMAPHORE12 \
-                                0x0000002C
-
-#define OCP_SHARED_O_IC_LOCKER_ID \
-                                0x00000030
-
-#define OCP_SHARED_O_MCU_SEMAPHORE_PEND \
-                                0x00000034
-
-#define OCP_SHARED_O_WL_SEMAPHORE_PEND \
-                                0x00000038
-
-#define OCP_SHARED_O_PLATFORM_DETECTION_RD_ONLY \
-                                0x0000003C
-
-#define OCP_SHARED_O_SEMAPHORES_STATUS_RD_ONLY \
-                                0x00000040
-
-#define OCP_SHARED_O_CC3XX_CONFIG_CTRL \
-                                0x00000044
-
-#define OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_LSB \
-                                0x00000048
-
-#define OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_MSB \
-                                0x0000004C
-
-#define OCP_SHARED_O_WLAN_ELP_WAKE_EN \
-                                0x00000050
-
-#define OCP_SHARED_O_DEVINIT_ROM_START_ADDR \
-                                0x00000054
-
-#define OCP_SHARED_O_DEVINIT_ROM_END_ADDR \
-                                0x00000058
-
-#define OCP_SHARED_O_SSBD_SEED  0x0000005C
-#define OCP_SHARED_O_SSBD_CHK   0x00000060
-#define OCP_SHARED_O_SSBD_POLY_SEL \
-                                0x00000064
-
-#define OCP_SHARED_O_SPARE_REG_0 \
-                                0x00000068
-
-#define OCP_SHARED_O_SPARE_REG_1 \
-                                0x0000006C
-
-#define OCP_SHARED_O_SPARE_REG_2 \
-                                0x00000070
-
-#define OCP_SHARED_O_SPARE_REG_3 \
-                                0x00000074
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_0 \
-                                0x000000A0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_1 \
-                                0x000000A4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_2 \
-                                0x000000A8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_3 \
-                                0x000000AC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_4 \
-                                0x000000B0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_5 \
-                                0x000000B4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_6 \
-                                0x000000B8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_7 \
-                                0x000000BC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_8 \
-                                0x000000C0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_9 \
-                                0x000000C4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_10 \
-                                0x000000C8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_11 \
-                                0x000000CC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_12 \
-                                0x000000D0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_13 \
-                                0x000000D4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_14 \
-                                0x000000D8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_15 \
-                                0x000000DC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_16 \
-                                0x000000E0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_17 \
-                                0x000000E4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_18 \
-                                0x000000E8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_19 \
-                                0x000000EC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_20 \
-                                0x000000F0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_21 \
-                                0x000000F4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_22 \
-                                0x000000F8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_23 \
-                                0x000000FC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_24 \
-                                0x00000100
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_25 \
-                                0x00000104
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_26 \
-                                0x00000108
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_27 \
-                                0x0000010C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_28 \
-                                0x00000110
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_29 \
-                                0x00000114
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_30 \
-                                0x00000118
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_31 \
-                                0x0000011C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_32 \
-                                0x00000120
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_33 \
-                                0x00000124
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_34 \
-                                0x00000128
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_35 \
-                                0x0000012C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_36 \
-                                0x00000130
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_37 \
-                                0x00000134
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_38 \
-                                0x00000138
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_39 \
-                                0x0000013C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_40 \
-                                0x00000140
-
-#define OCP_SHARED_O_GPIO_PAD_CMN_CONFIG \
-                                0x00000144  // This register provide control to
-                                            // GPIO_CC3XXV1 IO PAD. Common
-                                            // control signals to all bottom Die
-                                            // IO's are controlled via this.
-
-#define OCP_SHARED_O_D2D_DEV_PAD_CMN_CONFIG \
-                                0x00000148
-
-#define OCP_SHARED_O_D2D_TOSTACK_PAD_CONF \
-                                0x0000014C
-
-#define OCP_SHARED_O_D2D_MISC_PAD_CONF \
-                                0x00000150
-
-#define OCP_SHARED_O_SOP_CONF_OVERRIDE \
-                                0x00000154
-
-#define OCP_SHARED_O_CC3XX_DEBUGSS_STATUS \
-                                0x00000158
-
-#define OCP_SHARED_O_CC3XX_DEBUGMUX_SEL \
-                                0x0000015C
-
-#define OCP_SHARED_O_ALT_PC_VAL_NW \
-                                0x00000160
-
-#define OCP_SHARED_O_ALT_PC_VAL_APPS \
-                                0x00000164
-
-#define OCP_SHARED_O_SPARE_REG_4 \
-                                0x00000168
-
-#define OCP_SHARED_O_SPARE_REG_5 \
-                                0x0000016C
-
-#define OCP_SHARED_O_SH_SPI_CS_MASK \
-                                0x00000170
-
-#define OCP_SHARED_O_CC3XX_DEVICE_TYPE \
-                                0x00000174
-
-#define OCP_SHARED_O_MEM_TOPMUXCTRL_IFORCE \
-                                0x00000178
-
-#define OCP_SHARED_O_CC3XX_DEV_PACKAGE_DETECT \
-                                0x0000017C
-
-#define OCP_SHARED_O_AUTONMS_SPICLK_SEL \
-                                0x00000180
-
-#define OCP_SHARED_O_CC3XX_DEV_PADCONF \
-                                0x00000184
-
-#define OCP_SHARED_O_SPARE_REG_8 \
-                                0x00000188
-
-#define OCP_SHARED_O_SPARE_REG_6 \
-                                0x0000018C
-
-#define OCP_SHARED_O_SPARE_REG_7 \
-                                0x00000190
-
-#define OCP_SHARED_O_APPS_WLAN_ORBIT \
-                                0x00000194
-
-#define OCP_SHARED_O_APPS_WLAN_SCRATCH_PAD \
-                                0x00000198
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE1 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE1_MEM_SEMAPHORE1_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE1_MEM_SEMAPHORE1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE2 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE2_MEM_SEMAPHORE2_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE2_MEM_SEMAPHORE2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE3 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE3_MEM_SEMAPHORE3_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE3_MEM_SEMAPHORE3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE4 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE4_MEM_SEMAPHORE4_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE4_MEM_SEMAPHORE4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE5 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE5_MEM_SEMAPHORE5_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE5_MEM_SEMAPHORE5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE6 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE6_MEM_SEMAPHORE6_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE6_MEM_SEMAPHORE6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE7 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE7_MEM_SEMAPHORE7_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE7_MEM_SEMAPHORE7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE8 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE8_MEM_SEMAPHORE8_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE8_MEM_SEMAPHORE8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE9 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE9_MEM_SEMAPHORE9_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE9_MEM_SEMAPHORE9_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE10 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE10_MEM_SEMAPHORE10_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE10_MEM_SEMAPHORE10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE11 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE11_MEM_SEMAPHORE11_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE11_MEM_SEMAPHORE11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE12 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE12_MEM_SEMAPHORE12_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE12_MEM_SEMAPHORE12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_IC_LOCKER_ID register.
-//
-//******************************************************************************
-#define OCP_SHARED_IC_LOCKER_ID_MEM_IC_LOCKER_ID_M \
-                                0x00000007  // This register is used for
-                                            // allowing only one master OCP to
-                                            // perform write transactions to the
-                                            // OCP slaves. Each bit represents
-                                            // an IP in the following format: {
-                                            // JTAG,WLAN, NWP mcu}. As any of
-                                            // the bits is set to one, the
-                                            // correlating IP is preventing the
-                                            // other IP's from performing write
-                                            // transactions to the slaves. As
-                                            // the Inter Connect is locked, the
-                                            // only the locking IP can write to
-                                            // the register and by that
-                                            // releasing the lock. 3'b000 => IC
-                                            // is not locked. 3'b001 => IC is
-                                            // locked by NWP mcu. 3'b010 => IC
-                                            // is locked by WLAN. 3'b100 => IC
-                                            // is locked by JTAG.
-
-#define OCP_SHARED_IC_LOCKER_ID_MEM_IC_LOCKER_ID_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_MCU_SEMAPHORE_PEND register.
-//
-//******************************************************************************
-#define OCP_SHARED_MCU_SEMAPHORE_PEND_MEM_MCU_SEMAPHORE_PEND_M \
-                                0x0000FFFF  // This register specifies the
-                                            // semaphore for which the NWP mcu
-                                            // is waiting to be released. It is
-                                            // set to the serial number of a
-                                            // given locked semaphore after it
-                                            // was read by the NWP mcu. Only
-                                            // [11:0] is used.
-
-#define OCP_SHARED_MCU_SEMAPHORE_PEND_MEM_MCU_SEMAPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_WL_SEMAPHORE_PEND register.
-//
-//******************************************************************************
-#define OCP_SHARED_WL_SEMAPHORE_PEND_MEM_WL_SEMAPHORE_PEND_M \
-                                0x0000FFFF  // This register specifies the
-                                            // semaphore for which the WLAN is
-                                            // waiting to be released. It is set
-                                            // to the serial number of a given
-                                            // locked semaphore after it was
-                                            // read by the WLAN. Only [11:0] is
-                                            // used.
-
-#define OCP_SHARED_WL_SEMAPHORE_PEND_MEM_WL_SEMAPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_PLATFORM_DETECTION_RD_ONLY register.
-//
-//******************************************************************************
-#define OCP_SHARED_PLATFORM_DETECTION_RD_ONLY_PLATFORM_DETECTION_M \
-                                0x0000FFFF  // This information serves the IPs
-                                            // for knowing in which platform are
-                                            // they integrated at: 0 = CC31XX.
-
-#define OCP_SHARED_PLATFORM_DETECTION_RD_ONLY_PLATFORM_DETECTION_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORES_STATUS_RD_ONLY register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORES_STATUS_RD_ONLY_SEMAPHORES_STATUS_M \
-                                0x00000FFF  // Captured/released semaphores
-                                            // status for the 12 semaphores.
-                                            // Each bit of the 12 bits
-                                            // represents a semaphore. 0 =>
-                                            // Semaphore Free. 1 => Semaphore
-                                            // Captured.
-
-#define OCP_SHARED_SEMAPHORES_STATUS_RD_ONLY_SEMAPHORES_STATUS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_CONFIG_CTRL register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_IC_TO_EN \
-                                0x00000010  // This bit is used to enable
-                                            // timeout mechanism for top_ocp_ic
-                                            // (for debug puropse). When 1 value
-                                            // , in case any ocp slave doesn't
-                                            // give sresponse within 16 cylcles
-                                            // top_ic will give error response
-                                            // itself to avoid bus hange.
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_ALT_PC_EN_APPS \
-                                0x00000008  // 1 bit should be accessible only
-                                            // in devinit. This will enable 0x4
-                                            // hack for apps processor
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_ALT_PC_EN_NW \
-                                0x00000004  // 1 bit, should be accessible only
-                                            // in devinit. This will enable 0x4
-                                            // hack for nw processor
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_EXTEND_NW_ROM \
-                                0x00000002  // When set NW can take over apps
-                                            // rom and flash via IDCODE bus.
-                                            // Apps will able to access this
-                                            // register only during devinit and
-                                            // reset value should be 0.
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_WLAN_HOST_INTF_SEL \
-                                0x00000001  // When this bit is set to 0 WPSI
-                                            // host interface wil be selected,
-                                            // when this bit is set to 1 , WLAN
-                                            // host async bridge will be
-                                            // selected.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_LSB register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_LSB_MEM_SHARED_MEM_SEL_LSB_M \
-                                0x3FFFFFFF  // This register provides memss RAM
-                                            // column configuration for column 0
-                                            // to 9. 3 bits are allocated per
-                                            // column. This register is required
-                                            // to be configured before starting
-                                            // RAM access. Changing register
-                                            // setting while code is running
-                                            // will result into unpredictable
-                                            // memory behaviour. Register is
-                                            // supported to configured ones
-                                            // after core is booted up. 3 bit
-                                            // encoding per column is as
-                                            // follows: when 000 : WLAN, 001:
-                                            // NWP, 010: APPS, 011: PHY, 100:
-                                            // OCLA column 0 select: bit [2:0]
-                                            // :when 000 -> WLAN,001 -> NWP,010
-                                            // -> APPS, 011 -> PHY, 100 -> OCLA
-                                            // column 1 select: bit [5:3]
-                                            // :column 2 select: bit [8 : 6]:
-                                            // column 3 select : bit [11: 9]
-                                            // column 4 select : bit [14:12]
-                                            // column 5 select : bit [17:15]
-                                            // column 6 select : bit [20:18]
-                                            // column 7 select : bit [23:21]
-                                            // column 8 select : bit [26:24]
-                                            // column 9 select : bit [29:27]
-                                            // column 10 select
-
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_LSB_MEM_SHARED_MEM_SEL_LSB_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_MSB register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_MSB_MEM_SHARED_MEM_SEL_MSB_M \
-                                0x00000FFF  // This register provides memss RAM
-                                            // column configuration for column
-                                            // 10 to 15. 3 bits are allocated
-                                            // per column. This register is
-                                            // required to be configured before
-                                            // starting RAM access. Changing
-                                            // register setting while code is
-                                            // running will result into
-                                            // unpredictable memory behaviour.
-                                            // Register is supported to
-                                            // configured ones after core is
-                                            // booted up. 3 bit encoding per
-                                            // column is as follows: when 000 :
-                                            // WLAN, 001: NWP, 010: APPS, 011:
-                                            // PHY, 100: OCLA column 11 select :
-                                            // bit [2:0] column 12 select : bit
-                                            // [5:3] column 13 select : bit [8 :
-                                            // 6] column 14 select :
-
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_MSB_MEM_SHARED_MEM_SEL_MSB_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_WLAN_ELP_WAKE_EN register.
-//
-//******************************************************************************
-#define OCP_SHARED_WLAN_ELP_WAKE_EN_MEM_WLAN_ELP_WAKE_EN \
-                                0x00000001  // when '1' : signal will enabled
-                                            // ELP power doamin when '0': ELP is
-                                            // not powered up.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_DEVINIT_ROM_START_ADDR register.
-//
-//******************************************************************************
-#define OCP_SHARED_DEVINIT_ROM_START_ADDR_MEM_DEVINIT_ROM_START_ADDR_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module. This register is not used
-                                            // , similar register availble in
-                                            // GPRCM space.
-
-#define OCP_SHARED_DEVINIT_ROM_START_ADDR_MEM_DEVINIT_ROM_START_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_DEVINIT_ROM_END_ADDR register.
-//
-//******************************************************************************
-#define OCP_SHARED_DEVINIT_ROM_END_ADDR_MEM_DEVINIT_ROM_END_ADDR_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_DEVINIT_ROM_END_ADDR_MEM_DEVINIT_ROM_END_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SSBD_SEED register.
-//
-//******************************************************************************
-#define OCP_SHARED_SSBD_SEED_MEM_SSBD_SEED_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_SSBD_SEED_MEM_SSBD_SEED_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SSBD_CHK register.
-//
-//******************************************************************************
-#define OCP_SHARED_SSBD_CHK_MEM_SSBD_CHK_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_SSBD_CHK_MEM_SSBD_CHK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SSBD_POLY_SEL register.
-//
-//******************************************************************************
-#define OCP_SHARED_SSBD_POLY_SEL_MEM_SSBD_POLY_SEL_M \
-                                0x00000003  // 2 bit, Writable only during
-                                            // devinit, and whole 2 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_SSBD_POLY_SEL_MEM_SSBD_POLY_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_0 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_0_MEM_SPARE_REG_0_M \
-                                0xFFFFFFFF  // Devinit code should look for
-                                            // whether corresponding fuse is
-                                            // blown and if blown write to the
-                                            // 11th bit of this register to
-                                            // disable flshtst interface
-
-#define OCP_SHARED_SPARE_REG_0_MEM_SPARE_REG_0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_1 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_1_MEM_SPARE_REG_1_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_1_MEM_SPARE_REG_1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_2 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_2_MEM_SPARE_REG_2_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_2_MEM_SPARE_REG_2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_3 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_3_MEM_SPARE_REG_3_M \
-                                0xFFFFFFFF  // APPS Software register
-
-#define OCP_SHARED_SPARE_REG_3_MEM_SPARE_REG_3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_0 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_0_MEM_GPIO_PAD_CONFIG_0_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." "For example in
-                                            // case of I2C Value gets latched at
-                                            // rising edge of RET33.""" """ 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_0_MEM_GPIO_PAD_CONFIG_0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_1 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_1_MEM_GPIO_PAD_CONFIG_1_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_1_MEM_GPIO_PAD_CONFIG_1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_2 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_2_MEM_GPIO_PAD_CONFIG_2_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_2_MEM_GPIO_PAD_CONFIG_2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_3 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_3_MEM_GPIO_PAD_CONFIG_3_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_3_MEM_GPIO_PAD_CONFIG_3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_4 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_4_MEM_GPIO_PAD_CONFIG_4_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_4_MEM_GPIO_PAD_CONFIG_4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_5 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_5_MEM_GPIO_PAD_CONFIG_5_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_5_MEM_GPIO_PAD_CONFIG_5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_6 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_6_MEM_GPIO_PAD_CONFIG_6_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_6_MEM_GPIO_PAD_CONFIG_6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_7 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_7_MEM_GPIO_PAD_CONFIG_7_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_7_MEM_GPIO_PAD_CONFIG_7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_8 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_8_MEM_GPIO_PAD_CONFIG_8_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_8_MEM_GPIO_PAD_CONFIG_8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_9 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_9_MEM_GPIO_PAD_CONFIG_9_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_9_MEM_GPIO_PAD_CONFIG_9_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_10 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_10_MEM_GPIO_PAD_CONFIG_10_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_10_MEM_GPIO_PAD_CONFIG_10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_11 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_11_MEM_GPIO_PAD_CONFIG_11_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_11_MEM_GPIO_PAD_CONFIG_11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_12 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_12_MEM_GPIO_PAD_CONFIG_12_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_12_MEM_GPIO_PAD_CONFIG_12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_13 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_13_MEM_GPIO_PAD_CONFIG_13_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_13_MEM_GPIO_PAD_CONFIG_13_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_14 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_14_MEM_GPIO_PAD_CONFIG_14_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_14_MEM_GPIO_PAD_CONFIG_14_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_15 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_15_MEM_GPIO_PAD_CONFIG_15_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_15_MEM_GPIO_PAD_CONFIG_15_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_16 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_16_MEM_GPIO_PAD_CONFIG_16_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_16_MEM_GPIO_PAD_CONFIG_16_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_17 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_17_MEM_GPIO_PAD_CONFIG_17_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_17_MEM_GPIO_PAD_CONFIG_17_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_18 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_18_MEM_GPIO_PAD_CONFIG_18_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_18_MEM_GPIO_PAD_CONFIG_18_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_19 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_19_MEM_GPIO_PAD_CONFIG_19_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_19_MEM_GPIO_PAD_CONFIG_19_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_20 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_20_MEM_GPIO_PAD_CONFIG_20_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_20_MEM_GPIO_PAD_CONFIG_20_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_21 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_21_MEM_GPIO_PAD_CONFIG_21_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_21_MEM_GPIO_PAD_CONFIG_21_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_22 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_22_MEM_GPIO_PAD_CONFIG_22_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_22_MEM_GPIO_PAD_CONFIG_22_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_23 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_23_MEM_GPIO_PAD_CONFIG_23_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_23_MEM_GPIO_PAD_CONFIG_23_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_24 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_24_MEM_GPIO_PAD_CONFIG_24_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_24_MEM_GPIO_PAD_CONFIG_24_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_25 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_25_MEM_GPIO_PAD_CONFIG_25_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_25_MEM_GPIO_PAD_CONFIG_25_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_26 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_26_MEM_GPIO_PAD_CONFIG_26_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_26_MEM_GPIO_PAD_CONFIG_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_27 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_27_MEM_GPIO_PAD_CONFIG_27_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_27_MEM_GPIO_PAD_CONFIG_27_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_28 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_28_MEM_GPIO_PAD_CONFIG_28_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_28_MEM_GPIO_PAD_CONFIG_28_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_29 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_29_MEM_GPIO_PAD_CONFIG_29_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_29_MEM_GPIO_PAD_CONFIG_29_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_30 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_30_MEM_GPIO_PAD_CONFIG_30_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_30_MEM_GPIO_PAD_CONFIG_30_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_31 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_31_MEM_GPIO_PAD_CONFIG_31_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_31_MEM_GPIO_PAD_CONFIG_31_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_32 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_32_MEM_GPIO_PAD_CONFIG_32_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_32_MEM_GPIO_PAD_CONFIG_32_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_33 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_33_MEM_GPIO_PAD_CONFIG_33_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_33_MEM_GPIO_PAD_CONFIG_33_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_34 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_34_MEM_GPIO_PAD_CONFIG_34_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_34_MEM_GPIO_PAD_CONFIG_34_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_35 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_35_MEM_GPIO_PAD_CONFIG_35_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_35_MEM_GPIO_PAD_CONFIG_35_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_36 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_36_MEM_GPIO_PAD_CONFIG_36_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_36_MEM_GPIO_PAD_CONFIG_36_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_37 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_37_MEM_GPIO_PAD_CONFIG_37_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_37_MEM_GPIO_PAD_CONFIG_37_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_38 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_38_MEM_GPIO_PAD_CONFIG_38_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_38_MEM_GPIO_PAD_CONFIG_38_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_39 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_39_MEM_GPIO_PAD_CONFIG_39_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_39_MEM_GPIO_PAD_CONFIG_39_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_40 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_40_MEM_GPIO_PAD_CONFIG_40_M \
-                                0x0007FFFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." "For example in
-                                            // case of I2C Value gets latched at
-                                            // rising edge of RET33.""" """ 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_40_MEM_GPIO_PAD_CONFIG_40_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CMN_CONFIG register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_D2D_ISO_A_EN \
-                                0x00000080  // when '1' enable ISO A control to
-                                            // D2D Pads else ISO is disabled.
-                                            // For these PADS to be functional
-                                            // this signals should be set 0.
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_D2D_ISO_Y_EN \
-                                0x00000040  // when '1' enable ISO Y control to
-                                            // D2D Pads else ISO is disabled.
-                                            // For these PADS to be functional
-                                            // this signals should be set 0.
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_JTAG_IDIEN \
-                                0x00000020  // If level ‘1’ enables the PAD to
-                                            // ODI path for JTAG PADS [PAD 23,
-                                            // 24, 28, 29]. Else ODI is pulled
-                                            // ‘Low’ regardless of PAD level."
-                                            // "Value gets latched at rising
-                                            // edge of RET33.""" """
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_HYSTVAL_M \
-                                0x00000018  // 00’: hysteriris = 10% of VDDS
-                                            // (difference between upper and
-                                            // lower threshold of the schmit
-                                            // trigger) ‘01’: hysteriris = 20%
-                                            // of VDDS (difference between upper
-                                            // and lower threshold of the schmit
-                                            // trigger) ‘10’: hysteriris = 30%
-                                            // of VDDS (difference between upper
-                                            // and lower threshold of the schmit
-                                            // trigger) ‘11’: hysteriris = 40%
-                                            // of VDDS (difference between upper
-                                            // and lower threshold of the schmit
-                                            // trigger)" """
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_HYSTVAL_S 3
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_HYSTEN \
-                                0x00000004  // If logic ‘0’ there is no
-                                            // hysteresis. Set to ‘1’ to enable
-                                            // hysteresis. Leave the choice to
-                                            // customers"""
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_IBIASEN \
-                                0x00000002  // Normal functional operation set
-                                            // this to logic ‘1’ to increase the
-                                            // speed of the o/p buffer at the
-                                            // cost of 0.2uA static current
-                                            // consumption per IO. During IDDQ
-                                            // test and during Hibernate this
-                                            // would be forced to logic ‘0’.
-                                            // Value is not latched at rising
-                                            // edge of RET33.""
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_IDIEN \
-                                0x00000001  // If level ‘1’ enables the PAD to
-                                            // ODI path. Else ODI is pulled
-                                            // ‘Low’ regardless of PAD level."
-                                            // "Value gets latched at rising
-                                            // edge of RET33.""" """
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_D2D_DEV_PAD_CMN_CONFIG register.
-//
-//******************************************************************************
-#define OCP_SHARED_D2D_DEV_PAD_CMN_CONFIG_MEM_DEV_PAD_CMN_CONF_M \
-                                0x0000003F  // this register implements common
-                                            // IO control to all devement mode
-                                            // PADs; these PADs are DEV_PAD33 to
-                                            // DEV_PAD39. Bit [1:0] : Drive
-                                            // strength control. These 2 bits
-                                            // are connected to DEV PAD drive
-                                            // strength control. possible drive
-                                            // stregnths are 2MA, 4MA and 6 MA
-                                            // for the these IO's. bit 0: when
-                                            // set to logic value '1' enable 2MA
-                                            // drive strength for DEVPAD01 to 07
-                                            // bit 1: when set to logic value
-                                            // '1' enable 4MA drive strength for
-                                            // DEVPAD01 to 07. bit[3:2] : WK
-                                            // PULL UP and PULL down control.
-                                            // These 2 bits provide IWKPUEN and
-                                            // IWKPDEN control for all DEV IO's.
-                                            // bit 2: when set to logic value
-                                            // '1' enable WKPU to DEVPAD01 to 07
-                                            // bit 3: when set to logic value
-                                            // '1' enable WKPD to DEVPAD01 to
-                                            // 07. bit 4: WK PULL control for
-                                            // DEV_PKG_DETECT pin. when '1'
-                                            // pullup enabled else it is
-                                            // disable. bit 5: when set to logic
-                                            // value '1' enable 8MA drive
-                                            // strength for DEVPAD01 to 07.
-
-#define OCP_SHARED_D2D_DEV_PAD_CMN_CONFIG_MEM_DEV_PAD_CMN_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_D2D_TOSTACK_PAD_CONF register.
-//
-//******************************************************************************
-#define OCP_SHARED_D2D_TOSTACK_PAD_CONF_MEM_D2D_TOSTACK_PAD_CONF_M \
-                                0x1FFFFFFF  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-                                            // this register control OEN2X pin
-                                            // of D2D TOSTACK PAD: OEN1X and
-                                            // OEN2X decoding is as follows:
-                                            // "when ""00"" :" "when ""01"" :
-                                            // dirve strength is '1' and output
-                                            // buffer enabled." "when ""10"" :
-                                            // drive strength is 2 and output
-                                            // buffer is disabled." "when ""11""
-                                            // : dirve strength is '3' and
-                                            // output buffer enabled."
-
-#define OCP_SHARED_D2D_TOSTACK_PAD_CONF_MEM_D2D_TOSTACK_PAD_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_D2D_MISC_PAD_CONF register.
-//
-//******************************************************************************
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_POR_RESET_N \
-                                0x00000200  // This register provide OEN2X
-                                            // control to D2D PADS OEN/OEN2X
-                                            // control. When 0 : Act as input
-                                            // buffer else output buffer with
-                                            // drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_RESET_N \
-                                0x00000100  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_HCLK \
-                                0x00000080  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_JTAG_TCK \
-                                0x00000040  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_JTAG_TMS \
-                                0x00000020  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_JTAG_TDI \
-                                0x00000010  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_PIOSC \
-                                0x00000008  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_SPARE_M \
-                                0x00000007  // D2D SPARE PAD OEN/OEN2X control.
-                                            // When 0: Act as input buffer else
-                                            // output buffer with drive strength
-                                            // 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_SPARE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SOP_CONF_OVERRIDE register.
-//
-//******************************************************************************
-#define OCP_SHARED_SOP_CONF_OVERRIDE_MEM_SOP_CONF_OVERRIDE \
-                                0x00000001  // when '1' : signal will ovberride
-                                            // SoP setting of JTAG PADS. when
-                                            // '0': SoP setting will control
-                                            // JTAG PADs [ TDI, TDO, TMS, TCK]
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEBUGSS_STATUS register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_APPS_MCU_JTAGNSW \
-                                0x00000020  // This register contains debug
-                                            // subsystem status bits From APPS
-                                            // MCU status bit to indicates
-                                            // whether serial wire or 4 pins
-                                            // jtag select.
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_CJTAG_BYPASS_STATUS \
-                                0x00000010  // cjtag bypass bit select
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_SW_INTERFACE_SEL_STATUS \
-                                0x00000008  // serial wire interface bit select
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_APPS_TAP_ENABLE_STATUS \
-                                0x00000004  // apps tap enable status
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_TAPS_ENABLE_STATUS \
-                                0x00000002  // tap enable status
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_SSBD_UNLOCK \
-                                0x00000001  // ssbd unlock status
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEBUGMUX_SEL register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEBUGMUX_SEL_MEM_CC3XX_DEBUGMUX_SEL_M \
-                                0x0000FFFF  // debug mux select register. Upper
-                                            // 8 bits are used for debug module
-                                            // selection. Lower 8 bit [7:0] used
-                                            // inside debug module for selecting
-                                            // module specific signals.
-                                            // Bits[15:8: when set x"00" : GPRCM
-                                            // debug bus. When "o1" : SDIO debug
-                                            // debug bus when x"02" :
-                                            // autonoumous SPI when x"03" :
-                                            // TOPIC when x"04": memss when
-                                            // x"25": mcu debug bus : APPS debug
-                                            // when x"45": mcu debug bus : NWP
-                                            // debug when x"65": mcu debug bus :
-                                            // AHB2VBUS debug when x"85": mcu
-                                            // debug bus : VBUS2HAB debug when
-                                            // x"95": mcu debug bus : RCM debug
-                                            // when x"A5": mcu debug bus :
-                                            // crypto debug when x"06": WLAN
-                                            // debug bus when x"07": debugss bus
-                                            // when x"08": ADC debug when x"09":
-                                            // SDIO PHY debug bus then "others"
-                                            // : no debug is selected
-
-#define OCP_SHARED_CC3XX_DEBUGMUX_SEL_MEM_CC3XX_DEBUGMUX_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_ALT_PC_VAL_NW register.
-//
-//******************************************************************************
-#define OCP_SHARED_ALT_PC_VAL_NW_MEM_ALT_PC_VAL_NW_M \
-                                0xFFFFFFFF  // 32 bit. Program counter value
-                                            // for 0x4 address when Alt_pc_en_nw
-                                            // is set.
-
-#define OCP_SHARED_ALT_PC_VAL_NW_MEM_ALT_PC_VAL_NW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_ALT_PC_VAL_APPS register.
-//
-//******************************************************************************
-#define OCP_SHARED_ALT_PC_VAL_APPS_MEM_ALT_PC_VAL_APPS_M \
-                                0xFFFFFFFF  // 32 bit. Program counter value
-                                            // for 0x4 address when
-                                            // Alt_pc_en_apps is set
-
-#define OCP_SHARED_ALT_PC_VAL_APPS_MEM_ALT_PC_VAL_APPS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_4 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_4_MEM_SPARE_REG_4_M \
-                                0xFFFFFFFE  // HW register
-
-#define OCP_SHARED_SPARE_REG_4_MEM_SPARE_REG_4_S 1
-#define OCP_SHARED_SPARE_REG_4_INVERT_D2D_INTERFACE \
-                                0x00000001  // Data to the top die launched at
-                                            // negative edge instead of positive
-                                            // edge.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_5 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_5_MEM_SPARE_REG_5_M \
-                                0xFFFFFFFF  // HW register
-
-#define OCP_SHARED_SPARE_REG_5_MEM_SPARE_REG_5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SH_SPI_CS_MASK register.
-//
-//******************************************************************************
-#define OCP_SHARED_SH_SPI_CS_MASK_MEM_SH_SPI_CS_MASK_M \
-                                0x0000000F  // ( chip select 0 is unmasked
-                                            // after reset. When ‘1’ : CS is
-                                            // unmasked or else masked. Valid
-                                            // configurations are 1000, 0100,
-                                            // 0010 or 0001. Any other setting
-                                            // can lead to unpredictable
-                                            // behavior.
-
-#define OCP_SHARED_SH_SPI_CS_MASK_MEM_SH_SPI_CS_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEVICE_TYPE register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_reserved_M \
-                                0x00000060  // reserved bits tied off "00".
-
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_reserved_S 5
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_M \
-                                0x0000001F  // CC3XX Device type information.
-
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_MEM_TOPMUXCTRL_IFORCE register.
-//
-//******************************************************************************
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE1_M \
-                                0x000000F0  // [4] 1: switch between
-                                            // WLAN_I2C_SCL and
-                                            // TOP_GPIO_PORT4_I2C closes 0:
-                                            // switch opens [5] 1: switch
-                                            // between WLAN_I2C_SCL and
-                                            // TOP_VSENSE_PORT closes 0: switch
-                                            // opens [6] 1: switch between
-                                            // WLAN_I2C_SCL and WLAN_ANA_TP4
-                                            // closes 0: switch opens [7]
-                                            // Reserved
-
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE1_S 4
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE_M \
-                                0x0000000F  // [0] 1: switch between
-                                            // WLAN_I2C_SDA and
-                                            // TOP_GPIO_PORT3_I2C closes 0:
-                                            // switch opens [1] 1: switch
-                                            // between WLAN_I2C_SDA and
-                                            // TOP_IFORCE_PORT closes 0: switch
-                                            // opens [2] 1: switch between
-                                            // WLAN_I2C_SDA and WLAN_ANA_TP3
-                                            // closes 0: switch opens [3]
-                                            // Reserved
-
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEV_PACKAGE_DETECT register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEV_PACKAGE_DETECT_DEV_PKG_DETECT \
-                                0x00000001  // when '0' indicates package type
-                                            // is development.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_AUTONMS_SPICLK_SEL register.
-//
-//******************************************************************************
-#define OCP_SHARED_AUTONMS_SPICLK_SEL_MEM_AUTONOMOUS_BYPASS \
-                                0x00000002  // This bit is used to bypass MCPSI
-                                            // autonomous mode .if this bit is 1
-                                            // autonomous MCSPI logic will be
-                                            // bypassed and it will act as link
-                                            // SPI
-
-#define OCP_SHARED_AUTONMS_SPICLK_SEL_MEM_AUTONMS_SPICLK_SEL \
-                                0x00000001  // This bit is used in SPI
-                                            // Autonomous mode to switch clock
-                                            // from system clock to SPI clk that
-                                            // is coming from PAD. When value 1
-                                            // PAD SPI clk is used as system
-                                            // clock in LPDS mode by SPI as well
-                                            // as autonomous wrapper logic.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEV_PADCONF register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEV_PADCONF_MEM_CC3XX_DEV_PADCONF_M \
-                                0x0000FFFF
-
-#define OCP_SHARED_CC3XX_DEV_PADCONF_MEM_CC3XX_DEV_PADCONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_IDMEM_TIM_UPDATE register.
-//
-//******************************************************************************
-#define OCP_SHARED_IDMEM_TIM_UPDATE_MEM_IDMEM_TIM_UPDATE_M \
-                                0xFFFFFFFF
-
-#define OCP_SHARED_IDMEM_TIM_UPDATE_MEM_IDMEM_TIM_UPDATE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_6 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_6_MEM_SPARE_REG_6_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_6_MEM_SPARE_REG_6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_7 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_7_MEM_SPARE_REG_7_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_7_MEM_SPARE_REG_7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_APPS_WLAN_ORBIT register.
-//
-//******************************************************************************
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_spare_M \
-                                0xFFFFFC00  // Spare bit
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_spare_S 10
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_status \
-                                0x00000200  // A rising edge on this bit
-                                            // indicates that the test case
-                                            // passes. This bit would be brought
-                                            // out on the pin interface during
-                                            // ORBIT.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_exec \
-                                0x00000100  // This register bit is writable by
-                                            // the FW and when set to 1 it
-                                            // indicates the start of a test
-                                            // execution. A failing edge on this
-                                            // bit indicates that the test
-                                            // execution is complete. This bit
-                                            // would be brought out on the pin
-                                            // interface during ORBIT.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_id_M \
-                                0x000000FC  // Implies the test case ID that
-                                            // needs to run.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_id_S 2
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_halt_proc \
-                                0x00000002  // This bit is used to trigger the
-                                            // execution of test cases within
-                                            // the (ROM based) IP.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_mode \
-                                0x00000001  // When this bit is 1 it implies
-                                            // ORBIT mode of operation and the
-                                            // (ROM based) IP start the
-                                            // execution from a test case
-                                            // perspective
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_APPS_WLAN_SCRATCH_PAD register.
-//
-//******************************************************************************
-#define OCP_SHARED_APPS_WLAN_SCRATCH_PAD_MEM_APPS_WLAN_SCRATCH_PAD_M \
-                                0xFFFFFFFF  // scratch pad register.
-
-#define OCP_SHARED_APPS_WLAN_SCRATCH_PAD_MEM_APPS_WLAN_SCRATCH_PAD_S 0
-
-
-
-#endif // __HW_OCP_SHARED_H__
diff --git a/ports/cc3200/hal/inc/hw_shamd5.h b/ports/cc3200/hal/inc/hw_shamd5.h
deleted file mode 100644
index cf6254f5d2..0000000000
--- a/ports/cc3200/hal/inc/hw_shamd5.h
+++ /dev/null
@@ -1,1242 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_SHAMD5_H__
-#define __HW_SHAMD5_H__
-
-//*****************************************************************************
-//
-// The following are defines for the SHAMD5_P register offsets.
-//
-//*****************************************************************************
-#define SHAMD5_O_ODIGEST_A       0x00000000  // WRITE: Outer Digest [127:96] for
-                                            // MD5 [159:128] for SHA-1 [255:224]
-                                            // for SHA-2 / HMAC Key [31:0] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [127:96] for MD5 [159:128] for
-                                            // SHA-1 [255:224] for SHA-2
-#define SHAMD5_O_ODIGEST_B       0x00000004  // WRITE: Outer Digest [95:64] for
-                                            // MD5 [127:96] for SHA-1 [223:192]
-                                            // for SHA-2 / HMAC Key [63:32] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [95:64] for MD5 [127:96] for
-                                            // SHA-1 [223:192] for SHA-2
-#define SHAMD5_O_ODIGEST_C       0x00000008  // WRITE: Outer Digest [63:32] for
-                                            // MD5 [95:64] for SHA-1 [191:160]
-                                            // for SHA-2 / HMAC Key [95:64] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [63:32] for MD5 [95:64] for SHA-1
-                                            // [191:160] for SHA-2
-#define SHAMD5_O_ODIGEST_D       0x0000000C  // WRITE: Outer Digest [31:0] for
-                                            // MD5 [63:31] for SHA-1 [159:128]
-                                            // for SHA-2 / HMAC Key [127:96] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [31:0] for MD5 [63:32] for SHA-1
-                                            // [159:128] for SHA-2
-#define SHAMD5_O_ODIGEST_E       0x00000010  // WRITE: Outer Digest [31:0] for
-                                            // SHA-1 [127:96] for SHA-2 / HMAC
-                                            // Key [159:128] for HMAC key proc
-                                            // READ: Outer Digest [31:0] for
-                                            // SHA-1 [127:96] for SHA-2
-#define SHAMD5_O_ODIGEST_F       0x00000014  // WRITE: Outer Digest [95:64] for
-                                            // SHA-2 / HMAC Key [191:160] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [95:64] for SHA-2
-#define SHAMD5_O_ODIGEST_G       0x00000018  // WRITE: Outer Digest [63:32] for
-                                            // SHA-2 / HMAC Key [223:192] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [63:32] for SHA-2
-#define SHAMD5_O_ODIGEST_H       0x0000001C  // WRITE: Outer Digest [31:0] for
-                                            // SHA-2 / HMAC Key [255:224] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [31:0] for SHA-2
-#define SHAMD5_O_IDIGEST_A       0x00000020  // WRITE: Inner / Initial Digest
-                                            // [127:96] for MD5 [159:128] for
-                                            // SHA-1 [255:224] for SHA-2 / HMAC
-                                            // Key [287:256] for HMAC key proc
-                                            // READ: Intermediate / Inner Digest
-                                            // [127:96] for MD5 [159:128] for
-                                            // SHA-1 [255:224] for SHA-2 /
-                                            // Result Digest/MAC [127:96] for
-                                            // MD5 [159:128] for SHA-1 [223:192]
-                                            // for SHA-2 224 [255:224] for SHA-2
-                                            // 256
-#define SHAMD5_O_IDIGEST_B       0x00000024  // WRITE: Inner / Initial Digest
-                                            // [95:64] for MD5 [127:96] for
-                                            // SHA-1 [223:192] for SHA-2 / HMAC
-                                            // Key [319:288] for HMAC key proc
-                                            // READ: Intermediate / Inner Digest
-                                            // [95:64] for MD5 [127:96] for
-                                            // SHA-1 [223:192] for SHA-2 /
-                                            // Result Digest/MAC [95:64] for MD5
-                                            // [127:96] for SHA-1 [191:160] for
-                                            // SHA-2 224 [223:192] for SHA-2 256
-#define SHAMD5_O_IDIGEST_C       0x00000028  // WRITE: Inner / Initial Digest
-                                            // [63:32] for MD5 [95:64] for SHA-1
-                                            // [191:160] for SHA- 2 / HMAC Key
-                                            // [351:320] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [63:32] for MD5 [95:64] for SHA-1
-                                            // [191:160] for SHA-2 / Result
-                                            // Digest/MAC [63:32] for MD5
-                                            // [95:64] for SHA-1 [159:128] for
-                                            // SHA-2 224 [191:160] for SHA-2 256
-#define SHAMD5_O_IDIGEST_D       0x0000002C  // WRITE: Inner / Initial Digest
-                                            // [31:0] for MD5 [63:32] for SHA-1
-                                            // [159:128] for SHA-2 / HMAC Key
-                                            // [383:352] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [31:0] for MD5 [63:32] for SHA-1
-                                            // [159:128] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for MD5 [63:32]
-                                            // for SHA-1 [127:96] for SHA-2 224
-                                            // [159:128] for SHA-2 256
-#define SHAMD5_O_IDIGEST_E       0x00000030  // WRITE: Inner / Initial Digest
-                                            // [31:0] for SHA-1 [127:96] for
-                                            // SHA-2 / HMAC Key [415:384] for
-                                            // HMAC key proc READ: Intermediate
-                                            // / Inner Digest [31:0] for SHA-1
-                                            // [127:96] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for SHA-1
-                                            // [95:64] for SHA-2 224 [127:96]
-                                            // for SHA-2 256
-#define SHAMD5_O_IDIGEST_F       0x00000034  // WRITE: Inner / Initial Digest
-                                            // [95:64] for SHA-2 / HMAC Key
-                                            // [447:416] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [95:64] for SHA-2 / Result
-                                            // Digest/MAC [63:32] for SHA-2 224
-                                            // [95:64] for SHA-2 256
-#define SHAMD5_O_IDIGEST_G       0x00000038  // WRITE: Inner / Initial Digest
-                                            // [63:32] for SHA-2 / HMAC Key
-                                            // [479:448] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [63:32] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for SHA-2 224
-                                            // [63:32] for SHA-2 256
-#define SHAMD5_O_IDIGEST_H       0x0000003C  // WRITE: Inner / Initial Digest
-                                            // [31:0] for SHA-2 / HMAC Key
-                                            // [511:480] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [31:0] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for SHA-2 256
-#define SHAMD5_O_DIGEST_COUNT    0x00000040  // WRITE: Initial Digest Count
-                                            // ([31:6] only [5:0] assumed 0)
-                                            // READ: Result / IntermediateDigest
-                                            // Count The initial digest byte
-                                            // count for hash/HMAC continue
-                                            // operations (HMAC Key Processing =
-                                            // 0 and Use Algorithm Constants =
-                                            // 0) on the Secure World must be
-                                            // written to this register prior to
-                                            // starting the operation by writing
-                                            // to S_HASH_MODE. When either HMAC
-                                            // Key Processing is 1 or Use
-                                            // Algorithm Constants is 1 this
-                                            // register does not need to be
-                                            // written it will be overwritten
-                                            // with 64 (1 hash block of key XOR
-                                            // ipad) or 0 respectively
-                                            // automatically. When starting a
-                                            // HMAC operation from pre-computes
-                                            // (HMAC Key Processing is 0) then
-                                            // the value 64 must be written here
-                                            // to compensate for the appended
-                                            // key XOR ipad block. Note that the
-                                            // value written should always be a
-                                            // 64 byte multiple the lower 6 bits
-                                            // written are ignored. The updated
-                                            // digest byte count (initial digest
-                                            // byte count + bytes processed) can
-                                            // be read from this register when
-                                            // the status register indicates
-                                            // that the operation is done or
-                                            // suspended due to a context switch
-                                            // request or when a Secure World
-                                            // context out DMA is requested. In
-                                            // Advanced DMA mode when not
-                                            // suspended with a partial result
-                                            // reading the SHAMD5_DIGEST_COUNT
-                                            // register triggers the Hash/HMAC
-                                            // Engine to start the next context
-                                            // input DMA. Therefore reading the
-                                            // SHAMD5_DIGEST_COUNT register
-                                            // should always be the last
-                                            // context-read action if not
-                                            // suspended with a partial result
-                                            // (i.e. PartHashReady interrupt not
-                                            // pending).
-#define SHAMD5_O_MODE            0x00000044  // Register SHAMD5_MODE
-#define SHAMD5_O_LENGTH          0x00000048  // WRITE: Block Length / Remaining
-                                            // Byte Count (bytes) READ:
-                                            // Remaining Byte Count. The value
-                                            // programmed MUST be a 64-byte
-                                            // multiple if Close Hash is set to
-                                            // 0. This register is also the
-                                            // trigger to start processing: once
-                                            // this register is written the core
-                                            // will commence requesting input
-                                            // data via DMA or IRQ (if
-                                            // programmed length > 0) and start
-                                            // processing. The remaining byte
-                                            // count for the active operation
-                                            // can be read from this register
-                                            // when the interrupt status
-                                            // register indicates that the
-                                            // operation is suspended due to a
-                                            // context switch request.
-#define SHAMD5_O_DATA0_IN        0x00000080  // Data input message 0
-#define SHAMD5_O_DATA1_IN        0x00000084  // Data input message 1
-#define SHAMD5_O_DATA2_IN        0x00000088  // Data input message 2
-#define SHAMD5_O_DATA3_IN        0x0000008C  // Data input message 3
-#define SHAMD5_O_DATA4_IN        0x00000090  // Data input message 4
-#define SHAMD5_O_DATA5_IN        0x00000094  // Data input message 5
-#define SHAMD5_O_DATA6_IN        0x00000098  // Data input message 6
-#define SHAMD5_O_DATA7_IN        0x0000009C  // Data input message 7
-#define SHAMD5_O_DATA8_IN        0x000000A0  // Data input message 8
-#define SHAMD5_O_DATA9_IN        0x000000A4  // Data input message 9
-#define SHAMD5_O_DATA10_IN       0x000000A8  // Data input message 10
-#define SHAMD5_O_DATA11_IN       0x000000AC  // Data input message 11
-#define SHAMD5_O_DATA12_IN       0x000000B0  // Data input message 12
-#define SHAMD5_O_DATA13_IN       0x000000B4  // Data input message 13
-#define SHAMD5_O_DATA14_IN       0x000000B8  // Data input message 14
-#define SHAMD5_O_DATA15_IN       0x000000BC  // Data input message 15
-#define SHAMD5_O_REVISION        0x00000100  // Register SHAMD5_REV
-#define SHAMD5_O_SYSCONFIG       0x00000110  // Register SHAMD5_SYSCONFIG
-#define SHAMD5_O_SYSSTATUS       0x00000114  // Register SHAMD5_SYSSTATUS
-#define SHAMD5_O_IRQSTATUS       0x00000118  // Register SHAMD5_IRQSTATUS
-#define SHAMD5_O_IRQENABLE       0x0000011C  // Register SHAMD5_IRQENABLE. The
-                                            // SHAMD5_IRQENABLE register contains
-                                            // an enable bit for each unique
-                                            // interrupt for the public side. An
-                                            // interrupt is enabled when both
-                                            // the global enable in
-                                            // SHAMD5_SYSCONFIG (PIT_en) and the
-                                            // bit in this register are both set
-                                            // to 1. An interrupt that is
-                                            // enabled is propagated to the
-                                            // SINTREQUEST_P output. Please note
-                                            // that the dedicated partial hash
-                                            // output (SINTREQUEST_PART_P) is
-                                            // not affected by this register it
-                                            // is only affected by the global
-                                            // enable SHAMD5_SYSCONFIG (PIT_en).
-#define SHAMD5_O_HASH512_ODIGEST_A \
-                                0x00000200
-
-#define SHAMD5_O_HASH512_ODIGEST_B \
-                                0x00000204
-
-#define SHAMD5_O_HASH512_ODIGEST_C \
-                                0x00000208
-
-#define SHAMD5_O_HASH512_ODIGEST_D \
-                                0x0000020C
-
-#define SHAMD5_O_HASH512_ODIGEST_E \
-                                0x00000210
-
-#define SHAMD5_O_HASH512_ODIGEST_F \
-                                0x00000214
-
-#define SHAMD5_O_HASH512_ODIGEST_G \
-                                0x00000218
-
-#define SHAMD5_O_HASH512_ODIGEST_H \
-                                0x0000021C
-
-#define SHAMD5_O_HASH512_ODIGEST_I \
-                                0x00000220
-
-#define SHAMD5_O_HASH512_ODIGEST_J \
-                                0x00000224
-
-#define SHAMD5_O_HASH512_ODIGEST_K \
-                                0x00000228
-
-#define SHAMD5_O_HASH512_ODIGEST_L \
-                                0x0000022C
-
-#define SHAMD5_O_HASH512_ODIGEST_M \
-                                0x00000230
-
-#define SHAMD5_O_HASH512_ODIGEST_N \
-                                0x00000234
-
-#define SHAMD5_O_HASH512_ODIGEST_O \
-                                0x00000238
-
-#define SHAMD5_O_HASH512_ODIGEST_P \
-                                0x0000023C
-
-#define SHAMD5_O_HASH512_IDIGEST_A \
-                                0x00000240
-
-#define SHAMD5_O_HASH512_IDIGEST_B \
-                                0x00000244
-
-#define SHAMD5_O_HASH512_IDIGEST_C \
-                                0x00000248
-
-#define SHAMD5_O_HASH512_IDIGEST_D \
-                                0x0000024C
-
-#define SHAMD5_O_HASH512_IDIGEST_E \
-                                0x00000250
-
-#define SHAMD5_O_HASH512_IDIGEST_F \
-                                0x00000254
-
-#define SHAMD5_O_HASH512_IDIGEST_G \
-                                0x00000258
-
-#define SHAMD5_O_HASH512_IDIGEST_H \
-                                0x0000025C
-
-#define SHAMD5_O_HASH512_IDIGEST_I \
-                                0x00000260
-
-#define SHAMD5_O_HASH512_IDIGEST_J \
-                                0x00000264
-
-#define SHAMD5_O_HASH512_IDIGEST_K \
-                                0x00000268
-
-#define SHAMD5_O_HASH512_IDIGEST_L \
-                                0x0000026C
-
-#define SHAMD5_O_HASH512_IDIGEST_M \
-                                0x00000270
-
-#define SHAMD5_O_HASH512_IDIGEST_N \
-                                0x00000274
-
-#define SHAMD5_O_HASH512_IDIGEST_O \
-                                0x00000278
-
-#define SHAMD5_O_HASH512_IDIGEST_P \
-                                0x0000027C
-
-#define SHAMD5_O_HASH512_DIGEST_COUNT \
-                                0x00000280
-
-#define SHAMD5_O_HASH512_MODE    0x00000284
-#define SHAMD5_O_HASH512_LENGTH  0x00000288
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_A_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_A_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_B_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_B_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_C_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_C_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_D_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_D_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_E_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_E_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_F_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_F_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_G_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_G_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_H_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_H_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_A_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_A_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_B_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_B_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_C_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_C_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_D_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_D_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_E_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_E_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_F_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_F_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_G_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_G_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_H_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_H_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_DIGEST_COUNT register.
-//
-//******************************************************************************
-#define SHAMD5_DIGEST_COUNT_DATA_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DIGEST_COUNT_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_MODE register.
-//
-//******************************************************************************
-#define SHAMD5_MODE_HMAC_OUTER_HASH \
-                                0x00000080  // The HMAC Outer Hash is performed
-                                            // on the hash digest when the inner
-                                            // hash hash finished (block length
-                                            // exhausted and final hash
-                                            // performed if close_hash is 1).
-                                            // This bit should normally be set
-                                            // together with close_hash to
-                                            // finish the inner hash first or
-                                            // Block Length should be zero (HMAC
-                                            // continue with the just outer hash
-                                            // to be done). Auto cleared
-                                            // internally when outer hash
-                                            // performed. 0 No operation 1 hmac
-                                            // processing
-
-#define SHAMD5_MODE_HMAC_KEY_PROC \
-                                0x00000020  // Performs HMAC key processing on
-                                            // the 512 bit HMAC key loaded into
-                                            // the SHAMD5_IDIGEST_{A to H} and
-                                            // SHAMD5_ODIGEST_{A to H} register
-                                            // block. Once HMAC key processing
-                                            // is finished this bit is
-                                            // automatically cleared and the
-                                            // resulting Inner and Outer digest
-                                            // is available from
-                                            // SHAMD5_IDIGEST_{A to H} and
-                                            // SHAMD5_ODIGEST_{A to H}
-                                            // respectively after which regular
-                                            // hash processing (using
-                                            // SHAMD5_IDIGEST_{A to H} as initial
-                                            // digest) will commence until the
-                                            // Block Length is exhausted. 0 No
-                                            // operation. 1 Hmac processing.
-
-#define SHAMD5_MODE_CLOSE_HASH   0x00000010  // Performs the padding the
-                                            // hash/HMAC will be 'closed' at the
-                                            // end of the block as per
-                                            // MD5/SHA-1/SHA-2 specification
-                                            // (i.e. appropriate padding is
-                                            // added) or no padding is done
-                                            // allowing the hash to be continued
-                                            // later. However if the hash/HMAC
-                                            // is not closed then the Block
-                                            // Length MUST be a multiple of 64
-                                            // bytes to ensure correct
-                                            // operation. Auto cleared
-                                            // internally when hash closed. 0 No
-                                            // padding hash computation can be
-                                            // contimued. 1 Last packet will be
-                                            // padded.
-#define SHAMD5_MODE_ALGO_CONSTANT \
-                                0x00000008  // The initial digest register will
-                                            // be overwritten with the algorithm
-                                            // constants for the selected
-                                            // algorithm when hashing and the
-                                            // initial digest count register
-                                            // will be reset to 0. This will
-                                            // start a normal hash operation.
-                                            // When continuing an existing hash
-                                            // or when performing an HMAC
-                                            // operation this register must be
-                                            // set to 0 and the
-                                            // intermediate/inner digest or HMAC
-                                            // key and digest count need to be
-                                            // written to the context input
-                                            // registers prior to writing
-                                            // SHAMD5_MODE. Auto cleared
-                                            // internally after first block
-                                            // processed. 0 Use pre-calculated
-                                            // digest (from an other operation)
-                                            // 1 Use constants of the selected
-                                            // algo.
-
-#define SHAMD5_MODE_ALGO_M       0x00000006  // These bits select the hash
-                                            // algorithm to be used for
-                                            // processing: 0x0 md5_128 algorithm
-                                            // 0x1 sha1_160 algorithm 0x2
-                                            // sha2_224 algorithm 0x3 sha2_256
-                                            // algorithm
-#define SHAMD5_MODE_ALGO_S       1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_LENGTH register.
-//
-//******************************************************************************
-#define SHAMD5_LENGTH_DATA_M     0xFFFFFFFF  // data
-#define SHAMD5_LENGTH_DATA_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA0_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA0_IN_DATA0_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA0_IN_DATA0_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA1_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA1_IN_DATA1_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA1_IN_DATA1_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA2_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA2_IN_DATA2_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA2_IN_DATA2_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA3_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA3_IN_DATA3_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA3_IN_DATA3_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA4_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA4_IN_DATA4_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA4_IN_DATA4_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA5_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA5_IN_DATA5_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA5_IN_DATA5_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA6_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA6_IN_DATA6_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA6_IN_DATA6_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA7_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA7_IN_DATA7_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA7_IN_DATA7_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA8_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA8_IN_DATA8_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA8_IN_DATA8_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA9_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA9_IN_DATA9_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA9_IN_DATA9_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA10_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA10_IN_DATA10_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA10_IN_DATA10_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA11_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA11_IN_DATA11_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA11_IN_DATA11_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA12_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA12_IN_DATA12_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA12_IN_DATA12_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA13_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA13_IN_DATA13_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA13_IN_DATA13_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA14_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA14_IN_DATA14_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA14_IN_DATA14_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA15_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA15_IN_DATA15_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA15_IN_DATA15_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_REVISION register.
-//
-//******************************************************************************
-#define SHAMD5_REVISION_SCHEME_M 0xC0000000
-#define SHAMD5_REVISION_SCHEME_S 30
-#define SHAMD5_REVISION_FUNC_M   0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define SHAMD5_REVISION_FUNC_S   16
-#define SHAMD5_REVISION_R_RTL_M  0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define SHAMD5_REVISION_R_RTL_S  11
-#define SHAMD5_REVISION_X_MAJOR_M \
-                                0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-
-#define SHAMD5_REVISION_X_MAJOR_S 8
-#define SHAMD5_REVISION_CUSTOM_M 0x000000C0
-#define SHAMD5_REVISION_CUSTOM_S 6
-#define SHAMD5_REVISION_Y_MINOR_M \
-                                0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-
-#define SHAMD5_REVISION_Y_MINOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define SHAMD5_SYSCONFIG_PADVANCED \
-                                0x00000080  // If set to 1 Advanced mode is
-                                            // enabled for the Secure World. If
-                                            // set to 0 Legacy mode is enabled
-                                            // for the Secure World.
-
-#define SHAMD5_SYSCONFIG_PCONT_SWT \
-                                0x00000040  // Finish all pending data and
-                                            // context DMA input requests (but
-                                            // will not assert any new requests)
-                                            // finish processing all data in the
-                                            // module and provide a saved
-                                            // context (partial hash result
-                                            // updated digest count remaining
-                                            // length updated mode information
-                                            // where applicable) for the last
-                                            // operation that was interrupted so
-                                            // that it can be resumed later.
-
-#define SHAMD5_SYSCONFIG_PDMA_EN 0x00000008
-#define SHAMD5_SYSCONFIG_PIT_EN  0x00000004
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define SHAMD5_SYSSTATUS_RESETDONE \
-                                0x00000001  // data
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define SHAMD5_IRQSTATUS_CONTEXT_READY \
-                                0x00000008  // indicates that the secure side
-                                            // context input registers are
-                                            // available for a new context for
-                                            // the next packet to be processed.
-
-#define SHAMD5_IRQSTATUS_PARTHASH_READY \
-                                0x00000004  // After a secure side context
-                                            // switch request this bit will read
-                                            // as 1 indicating that the saved
-                                            // context is available from the
-                                            // secure side context output
-                                            // registers. Note that if the
-                                            // context switch request coincides
-                                            // with a final hash (when hashing)
-                                            // or an outer hash (when doing
-                                            // HMAC) that PartHashReady will not
-                                            // become active but a regular
-                                            // Output Ready will occur instead
-                                            // (indicating that the result is
-                                            // final and therefore no
-                                            // continuation is required).
-
-#define SHAMD5_IRQSTATUS_INPUT_READY \
-                                0x00000002  // indicates that the secure side
-                                            // data FIFO is ready to receive the
-                                            // next 64 byte data block.
-
-#define SHAMD5_IRQSTATUS_OUTPUT_READY \
-                                0x00000001  // Indicates that a (partial)
-                                            // result or saved context is
-                                            // available from the secure side
-                                            // context output registers.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IRQENABLE register.
-//
-//******************************************************************************
-#define SHAMD5_IRQENABLE_M_CONTEXT_READY \
-                                0x00000008  // mask for context ready
-
-#define SHAMD5_IRQENABLE_M_PARTHASH_READY \
-                                0x00000004  // mask for partial hash
-
-#define SHAMD5_IRQENABLE_M_INPUT_READY \
-                                0x00000002  // mask for input_ready
-
-#define SHAMD5_IRQENABLE_M_OUTPUT_READY \
-                                0x00000001  // mask for output_ready
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_A_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_A_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_B_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_B_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_C_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_C_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_D_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_D_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_E_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_E_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_F_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_F_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_G_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_G_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_H_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_H_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_I register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_I_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_I_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_J register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_J_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_J_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_K register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_K_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_K_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_L register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_L_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_L_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_M register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_M_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_M_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_N register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_N_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_N_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_O register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_O_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_O_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_P register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_A_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_A_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_B_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_B_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_C_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_C_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_D_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_D_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_E_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_E_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_F_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_F_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_G_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_G_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_H_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_H_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_I register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_I_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_I_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_J register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_J_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_J_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_K register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_K_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_K_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_L register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_L_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_L_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_M register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_M_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_M_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_N register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_N_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_N_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_O register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_O_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_O_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_P register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_DIGEST_COUNT register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_DIGEST_COUNT_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_DIGEST_COUNT_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_MODE register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_MODE_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_MODE_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_LENGTH register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_LENGTH_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_LENGTH_DATA_S 0
-
-
-
-#endif // __HW_SHAMD5_H__
diff --git a/ports/cc3200/hal/inc/hw_stack_die_ctrl.h b/ports/cc3200/hal/inc/hw_stack_die_ctrl.h
deleted file mode 100644
index eba31e4f07..0000000000
--- a/ports/cc3200/hal/inc/hw_stack_die_ctrl.h
+++ /dev/null
@@ -1,764 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-
-#ifndef __HW_STACK_DIE_CTRL_H__
-#define __HW_STACK_DIE_CTRL_H__
-
-//*****************************************************************************
-//
-// The following are defines for the STACK_DIE_CTRL register offsets.
-//
-//*****************************************************************************
-#define STACK_DIE_CTRL_O_STK_UP_RESET \
-                                0x00000000  // Can be written only by Base
-                                            // Processor. Writing to this
-                                            // register will reset the stack
-                                            // processor reset will be
-                                            // de-asserted upon clearing this
-                                            // register.
-
-#define STACK_DIE_CTRL_O_SR_MASTER_PRIORITY \
-                                0x00000004  // This register defines who among
-                                            // base processor and stack
-                                            // processor have highest priority
-                                            // for Sram Access. Can be written
-                                            // only by Base Processor.
-
-#define STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK2 \
-                                0x00000008  // In Spinlock mode this Register
-                                            // defines who among base processor
-                                            // and stack processor have access
-                                            // to Sram Bank2 right now. In
-                                            // Handshake mode this Register
-                                            // defines who among base processor
-                                            // and stack processor have access
-                                            // to Sram Bank2 and Bank3 right
-                                            // now. Its Clear only register and
-                                            // is set by hardware. Lower bit can
-                                            // be cleared only by Base Processor
-                                            // and Upper bit Cleared only by the
-                                            // Stack processor.
-
-#define STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK2 \
-                                0x0000000C  // In Spinlock mode whenever Base
-                                            // processor wants the access to
-                                            // Sram Bank2 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by Stack
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK2 \
-                                0x00000010  // In Spinlock mode Whenever Stack
-                                            // processor wants the access to
-                                            // Sram Bank2 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by the Base
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK3 \
-                                0x00000014  // Register defines who among base
-                                            // processor and stack processor
-                                            // have access to Sram Bank3 right
-                                            // now. Its Clear only register and
-                                            // is set by hardware. Lower bit can
-                                            // be cleared only by Base Processor
-                                            // and Upper bit Cleared only by the
-                                            // Stack processor.
-
-#define STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK3 \
-                                0x00000018  // In Spinlock mode whenever Base
-                                            // processor wants the access to
-                                            // Sram Bank3 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by Stack
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK3 \
-                                0x0000001C  // In Spinlock mode Whenever Stack
-                                            // processor wants the access to
-                                            // Sram Bank3 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by the Base
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_RDSM_CFG_CPU \
-                                0x00000020  // Read State Machine timing
-                                            // configuration register. Generally
-                                            // Bit 4 and 3 will be identical.
-                                            // For stacked die always 43 are 0
-                                            // and 6:5 == 1 for 120Mhz.
-
-#define STACK_DIE_CTRL_O_RDSM_CFG_EE \
-                                0x00000024  // Read State Machine timing
-                                            // configuration register. Generally
-                                            // Bit 4 and 3 will be identical.
-                                            // For stacked die always 43 are 0
-                                            // and 6:5 == 1 for 120Mhz.
-
-#define STACK_DIE_CTRL_O_BASE_UP_IRQ_LOG \
-                                0x00000028  // Reading this register Base
-                                            // procesor will able to know the
-                                            // reason for the interrupt. This is
-                                            // clear only register - set by HW
-                                            // upon an interrupt to Base
-                                            // processor and can be cleared only
-                                            // by BASE processor.
-
-#define STACK_DIE_CTRL_O_STK_UP_IRQ_LOG \
-                                0x0000002C  // Reading this register Stack
-                                            // procesor will able to know the
-                                            // reason for the interrupt. This is
-                                            // clear only register - set by HW
-                                            // upon an interrupt to Stack
-                                            // processor and can be cleared only
-                                            // by Stack processor.
-
-#define STACK_DIE_CTRL_O_STK_CLK_EN \
-                                0x00000030  // Can be written only by base
-                                            // processor. Controls the enable
-                                            // pin of the cgcs for the clocks
-                                            // going to CM3 dft ctrl block and
-                                            // Sram.
-
-#define STACK_DIE_CTRL_O_SPIN_LOCK_MODE \
-                                0x00000034  // Can be written only by the base
-                                            // processor. Decides the ram
-                                            // sharing mode :: handshake or
-                                            // Spinlock mode.
-
-#define STACK_DIE_CTRL_O_BUS_FAULT_ADDR \
-                                0x00000038  // Stores the last bus fault
-                                            // address.
-
-#define STACK_DIE_CTRL_O_BUS_FAULT_CLR \
-                                0x0000003C  // write only registers on read
-                                            // returns 0.W Write 1 to clear the
-                                            // bust fault to store the new bus
-                                            // fault address
-
-#define STACK_DIE_CTRL_O_RESET_CAUSE \
-                                0x00000040  // Reset cause value captured from
-                                            // the ICR_CLKRST block.
-
-#define STACK_DIE_CTRL_O_WDOG_TIMER_EVENT \
-                                0x00000044  // Watchdog timer event value
-                                            // captured from the ICR_CLKRST
-                                            // block
-
-#define STACK_DIE_CTRL_O_DMA_REQ \
-                                0x00000048  // To send Dma Request to bottom
-                                            // die.
-
-#define STACK_DIE_CTRL_O_SRAM_JUMP_OFFSET_ADDR \
-                                0x0000004C  // Address offset within SRAM to
-                                            // which CM3 should jump after
-                                            // reset.
-
-#define STACK_DIE_CTRL_O_SW_REG1 \
-                                0x00000050  // These are sw registers for
-                                            // topdie processor and bottom die
-                                            // processor to communicate. Both
-                                            // can set and read these registers.
-                                            // In case of write clash bottom
-                                            // die's processor wins and top die
-                                            // processor access is ignored.
-
-#define STACK_DIE_CTRL_O_SW_REG2 \
-                                0x00000054  // These are sw registers for
-                                            // topdie processor and bottom die
-                                            // processor to communicate. Both
-                                            // can set and read these registers.
-                                            // In case of write clash bottom
-                                            // die's processor wins and top die
-                                            // processor access is ignored.
-
-#define STACK_DIE_CTRL_O_FMC_SLEEP_CTL \
-                                0x00000058  // By posting the request Flash can
-                                            // be put into low-power mode
-                                            // (Sleep) without powering down the
-                                            // Flash. Earlier (in Garnet) this
-                                            // was fully h/w controlled and the
-                                            // control for this was coming from
-                                            // SysCtl while entering into Cortex
-                                            // Deep-sleep mode. But for our
-                                            // device the D2D i/f doesnt support
-                                            // this. The Firmware has to program
-                                            // the register in the top-die for
-                                            // entering into this mode and wait
-                                            // for an interrupt.
-
-#define STACK_DIE_CTRL_O_MISC_CTL \
-                                0x0000005C  // Miscellanious control register.
-
-#define STACK_DIE_CTRL_O_SW_DFT_CTL \
-                                0x000000FC  // DFT control and status bits
-
-#define STACK_DIE_CTRL_O_PADN_CTL_0 \
-                                0x00000100  // Mainly for For controlling the
-                                            // pads OEN pins. There are total 60
-                                            // pads and hence 60 control registe
-                                            // i.e n value varies from 0 to 59.
-                                            // Here is the mapping for the
-                                            // pad_ctl register number and the
-                                            // functionality : 0 D2DPAD_DMAREQ1
-                                            // 1 D2DPAD_DMAREQ0 2
-                                            // D2DPAD_INT2BASE 3 D2DPAD_PIOSC 4
-                                            // D2DPAD_RST_N 5 D2DPAD_POR_RST_N 6
-                                            // D2DPAD_HCLK 7 D2DPAD_JTAG_TDO 8
-                                            // D2DPAD_JTAG_TCK 9 D2DPAD_JTAG_TMS
-                                            // 10 D2DPAD_JTAG_TDI 11-27
-                                            // D2DPAD_FROMSTACK[D2D_FROMSTACK_SIZE
-                                            // -1:0] 28-56 D2DPAD_TOSTACK
-                                            // [D2D_TOSTACK_SIZE -1:0] 57-59
-                                            // D2DPAD_SPARE [D2D_SPARE_PAD_SIZE
-                                            // -1:0] 0:00
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_RESET register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_RESET_UP_RESET \
-                                0x00000001  // 1 :Assert Reset 0 : Deassert the
-                                            // Reset
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SR_MASTER_PRIORITY register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SR_MASTER_PRIORITY_PRIORITY_M \
-                                0x00000003  // 00 : Equal Priority 01 : Stack
-                                            // Processor have priority 10 : Base
-                                            // Processor have priority 11 :
-                                            // Unused
-
-#define STACK_DIE_CTRL_SR_MASTER_PRIORITY_PRIORITY_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK2_STK_UP_ACCSS \
-                                0x00000002  // Stack Processor should clear it
-                                            // when it is done with the sram
-                                            // bank usage. Set by HW It is set
-                                            // when Stack Processor is granted
-                                            // the access to this bank
-
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK2_BASE_UP_ACCSS \
-                                0x00000001  // Base Processor should clear it
-                                            // when it is done wth the sram
-                                            // usage. Set by HW It is set when
-                                            // Base Processor is granted the
-                                            // access to this bank
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BASE_UP_ACC_REQ_BK2_ACCSS_REQ \
-                                0x00000001  // Base Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode. In Handshake mode
-                                            // Stack Processor will set to
-                                            // inform Base Processor that it is
-                                            // done with the processing of data
-                                            // in SRAM and is now ready to use
-                                            // by the base processor.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_ACC_REQ_BK2_ACCSS_REQ \
-                                0x00000001  // Stack Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode. In Handshake mode Base
-                                            // Processor will set to inform
-                                            // Stack Processor to start
-                                            // processing the data in the Ram.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK3 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK3_STK_UP_ACCSS \
-                                0x00000002  // Stack Processor should clear it
-                                            // when it is done with the sram
-                                            // bank usage. Set by HW It is set
-                                            // when Stack Processor is granted
-                                            // the access to this bank.
-
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK3_BASE_UP_ACCSS \
-                                0x00000001  // Base Processor should clear it
-                                            // when it is done wth the sram
-                                            // usage. Set by HW it is set when
-                                            // Base Processor is granted the
-                                            // access to this bank.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK3 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BASE_UP_ACC_REQ_BK3_ACCSS_REQ \
-                                0x00000001  // Base Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode. Not used in handshake
-                                            // mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK3 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_ACC_REQ_BK3_ACCSS_REQ \
-                                0x00000001  // Stack Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_RDSM_CFG_CPU register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_FLCLK_PULSE_WIDTH_M \
-                                0x000000C0  // Bank Clock Hi Time 00 : HCLK
-                                            // pulse 01 : 1 cycle of HCLK 10 :
-                                            // 1.5 cycles of HCLK 11 : 2 cycles
-                                            // of HCLK
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_FLCLK_PULSE_WIDTH_S 6
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_FLCLK_SENSE \
-                                0x00000020  // FLCLK 0 : indicates flash clock
-                                            // rise aligns on HCLK rise 1 :
-                                            // indicates flash clock rise aligns
-                                            // on HCLK fall
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_PIPELINE_FLDATA \
-                                0x00000010  // 0 : Always register flash rdata
-                                            // before sending to CPU 1 : Drive
-                                            // Flash rdata directly out on MISS
-                                            // (Both ICODE / DCODE)
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_READ_WAIT_STATE_M \
-                                0x0000000F  // Number of wait states inserted
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_READ_WAIT_STATE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_RDSM_CFG_EE register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_RDSM_CFG_EE_FLCLK_PULSE_WIDTH_M \
-                                0x000000C0  // Bank Clock Hi Time 00 : HCLK
-                                            // pulse 01 : 1 cycle of HCLK 10 :
-                                            // 1.5 cycles of HCLK 11 : 2 cycles
-                                            // of HCLK
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_FLCLK_PULSE_WIDTH_S 6
-#define STACK_DIE_CTRL_RDSM_CFG_EE_FLCLK_SENSE \
-                                0x00000020  // FLCLK 0 : indicates flash clock
-                                            // rise aligns on HCLK rise 1 :
-                                            // indicates flash clock rise aligns
-                                            // on HCLK fall
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_PIPELINE_FLDATA \
-                                0x00000010  // 0 : Always register flash rdata
-                                            // before sending to CPU 1 : Drive
-                                            // Flash rdata directly out on MISS
-                                            // (Both ICODE / DCODE)
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_READ_WAIT_STATE_M \
-                                0x0000000F  // Number of wait states inserted
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_READ_WAIT_STATE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BASE_UP_IRQ_LOG register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK3_REL \
-                                0x00000010  // Set when Relinquish Interrupt
-                                            // sent to Base processor for Bank3.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK2_RELEASE \
-                                0x00000008  // Set when Relinquish Interrupt
-                                            // sent to Base processor for Bank2.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK3_GRANT \
-                                0x00000004  // Set when Bank3 is granted to
-                                            // Base processor.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK2_GRANT \
-                                0x00000002  // Set when Bank2 is granted to
-                                            // BAse processor.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_INVAL_ACCSS \
-                                0x00000001  // Set when there Base processor do
-                                            // an Invalid access to Sram. Ex :
-                                            // Accessing the bank which is not
-                                            // granted for BAse processor.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_IRQ_LOG register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK3_REL \
-                                0x00000008  // Set when Relinquish Interrupt
-                                            // sent to Stack processor for
-                                            // Bank3.
-
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK2_REL \
-                                0x00000004  // Set when Relinquish Interrupt
-                                            // sent to Stack processor for
-                                            // Bank2.
-
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK3_GRANT \
-                                0x00000002  // Set when Bank3 is granted to
-                                            // Stack processor.
-
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK2_GRANT \
-                                0x00000001  // Set when Bank2 is granted to
-                                            // Stack processor.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_CLK_EN register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_CLK_EN_SR_CLK \
-                                0x00000004  // Enable the clock going to sram.
-
-#define STACK_DIE_CTRL_STK_CLK_EN_DFT_CTRL_CLK \
-                                0x00000002  // Enable the clock going to dft
-                                            // control block
-
-#define STACK_DIE_CTRL_STK_CLK_EN_STK_UP_CLK \
-                                0x00000001  // Enable the clock going to Cm3
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SPIN_LOCK_MODE register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SPIN_LOCK_MODE_MODE \
-                                0x00000001  // 0 : Handshake Mode 1 : Spinlock
-                                            // mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BUS_FAULT_ADDR register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BUS_FAULT_ADDR_ADDRESS_M \
-                                0xFFFFFFFF  // Fault Address
-
-#define STACK_DIE_CTRL_BUS_FAULT_ADDR_ADDRESS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BUS_FAULT_CLR register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BUS_FAULT_CLR_CLEAR \
-                                0x00000001  // When set it'll clear the bust
-                                            // fault address register to store
-                                            // the new bus fault address
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_RESET_CAUSE register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_RESET_CAUSE_RST_CAUSE_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_RESET_CAUSE_RST_CAUSE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_WDOG_TIMER_EVENT register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_WDOG_TIMER_EVENT_WDOG_TMR_EVNT_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_WDOG_TIMER_EVENT_WDOG_TMR_EVNT_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_DMA_REQ register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_DMA_REQ_DMAREQ1 \
-                                0x00000002  // Generate DMAREQ1 on setting this
-                                            // bit.
-
-#define STACK_DIE_CTRL_DMA_REQ_DMAREQ0 \
-                                0x00000001  // Generate DMAREQ0 on setting this
-                                            // bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SRAM_JUMP_OFFSET_ADDR register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SRAM_JUMP_OFFSET_ADDR_ADDR_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_SRAM_JUMP_OFFSET_ADDR_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SW_REG1 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SW_REG1_NEWBITFIELD1_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_SW_REG1_NEWBITFIELD1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SW_REG2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SW_REG2_NEWBITFIELD1_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_SW_REG2_NEWBITFIELD1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_FMC_SLEEP_CTL register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_FMC_SLEEP_CTL_FMC_LPM_ACK \
-                                0x00000002  // captures the status of of
-                                            // fmc_lpm_ack
-
-#define STACK_DIE_CTRL_FMC_SLEEP_CTL_FMC_LPM_REQ \
-                                0x00000001  // When set assert
-                                            // iflpe2fmc_lpm_req to FMC.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_MISC_CTL register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_MISC_CTL_WDOG_RESET \
-                                0x00000080  // 1 : will reset the async wdog
-                                            // timer runing on piosc clock
-
-#define STACK_DIE_CTRL_MISC_CTL_FW_IRQ2 \
-                                0x00000020  // Setting this Will send to
-                                            // interttupt to CM3
-
-#define STACK_DIE_CTRL_MISC_CTL_FW_IRQ1 \
-                                0x00000010  // Setting this Will send to
-                                            // interttupt to CM3
-
-#define STACK_DIE_CTRL_MISC_CTL_FW_IRQ0 \
-                                0x00000008  // Setting this Will send to
-                                            // interttupt to CM3
-
-#define STACK_DIE_CTRL_MISC_CTL_FLB_TEST_MUX_CTL_BK3 \
-                                0x00000004  // While testing Flash Setting this
-                                            // bit will Control the
-                                            // CE/STR/AIN/CLKIN going to flash
-                                            // banks 12 and 3. 0 : Control
-                                            // signals coming from FMC for Bank
-                                            // 3 goes to Bank3 1 : Control
-                                            // signals coming from FMC for Bank
-                                            // 0 goes to Bank2
-
-#define STACK_DIE_CTRL_MISC_CTL_FLB_TEST_MUX_CTL_BK2 \
-                                0x00000002  // While testing Flash Setting this
-                                            // bit will Control the
-                                            // CE/STR/AIN/CLKIN going to flash
-                                            // banks 12 and 3. 0 : Control
-                                            // signals coming from FMC for Bank
-                                            // 2 goes to Bank2 1 : Control
-                                            // signals coming from FMC for Bank
-                                            // 0 goes to Bank2
-
-#define STACK_DIE_CTRL_MISC_CTL_FLB_TEST_MUX_CTL_BK1 \
-                                0x00000001  // While testing Flash Setting this
-                                            // bit will Control the
-                                            // CE/STR/AIN/CLKIN going to flash
-                                            // banks 12 and 3. 0 : Control
-                                            // signals coming from FMC for Bank
-                                            // 1 goes to Bank1 1 : Control
-                                            // signals coming from FMC for Bank
-                                            // 0 goes to Bank1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SW_DFT_CTL register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SW_DFT_CTL_FL_CTRL_OWNS \
-                                0x20000000  // when set to '1' all flash
-                                            // control signals switch over to
-                                            // CM3 control when '0' it is under
-                                            // the D2D interface control
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_SWIF_CPU_READ \
-                                0x10000000  // 1 indicates in SWIF mode the
-                                            // control signals to flash are from
-                                            // FMC CPU read controls the clock
-                                            // and address. that is one can give
-                                            // address via FMC and read through
-                                            // IDMEM.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_CPU_DONE \
-                                0x00800000  // 'CPU Done' bit for PBIST. Write
-                                            // '1' to indicate test done.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_CPU_FAIL \
-                                0x00400000  // 'CPU Fail' bit for PBIST. Write
-                                            // '1' to indicate test failed.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK4_OWNS \
-                                0x00001000  // when set to '1' flash bank 4
-                                            // (EEPROM) is owned by the CM3for
-                                            // reads over DCODE bus. When '0'
-                                            // access control given to D2D
-                                            // interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK3_OWNS \
-                                0x00000800  // when set to '1' flash bank 3 is
-                                            // owned by the CM3for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK2_OWNS \
-                                0x00000400  // when set to '1' flash bank 2 is
-                                            // owned by the CM3for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK1_OWNS \
-                                0x00000200  // when set to '1' flash bank 1 is
-                                            // owned by the CM3for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK0_OWNS \
-                                0x00000100  // when set to '1' flash bank 0 is
-                                            // owned by the CM3 for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_PADN_CTL_0 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_PADN_CTL_0_SPARE_PAD_DOUT \
-                                0x00000008  // This bit is valid for only the
-                                            // spare pads ie for n=57 to 59.
-                                            // value to drive at the output of
-                                            // the pad
-
-#define STACK_DIE_CTRL_PADN_CTL_0_SPARE_PAD_DIN \
-                                0x00000004  // This bit is valid for only the
-                                            // spare pads ie for n=57 to 59.
-                                            // captures the 'Y' pin of the pad
-                                            // which is the data being driven
-                                            // into the die
-
-#define STACK_DIE_CTRL_PADN_CTL_0_OEN2X \
-                                0x00000002  // OEN2X control when '1' enables
-                                            // the output with 1x. Total drive
-                                            // strength is decided bu oen1x
-                                            // setting + oen2x setting.
-
-#define STACK_DIE_CTRL_PADN_CTL_0_OEN1X \
-                                0x00000001  // OEN1X control when '1' enables
-                                            // the output with 1x . Total drive
-                                            // strength is decided bu oen1x
-                                            // setting + oen2x setting.
-
-
-
-
-#endif // __HW_STACK_DIE_CTRL_H__
diff --git a/ports/cc3200/hal/inc/hw_timer.h b/ports/cc3200/hal/inc/hw_timer.h
deleted file mode 100644
index b6844ec675..0000000000
--- a/ports/cc3200/hal/inc/hw_timer.h
+++ /dev/null
@@ -1,778 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// hw_timer.h - Defines and macros used when accessing the timer.
-//
-//*****************************************************************************
-
-//##### INTERNAL BEGIN #####
-//
-// This is an auto-generated file.  Do not edit by hand.
-// Created by version 6779 of DriverLib.
-//
-//##### INTERNAL END #####
-
-#ifndef __HW_TIMER_H__
-#define __HW_TIMER_H__
-
-//*****************************************************************************
-//
-// The following are defines for the Timer register offsets.
-//
-//*****************************************************************************
-#define TIMER_O_CFG             0x00000000  // GPTM Configuration
-#define TIMER_O_TAMR            0x00000004  // GPTM Timer A Mode
-#define TIMER_O_TBMR            0x00000008  // GPTM Timer B Mode
-#define TIMER_O_CTL             0x0000000C  // GPTM Control
-//##### GARNET BEGIN #####
-#define TIMER_O_SYNC            0x00000010  // GPTM Synchronize
-//##### GARNET END #####
-#define TIMER_O_IMR             0x00000018  // GPTM Interrupt Mask
-#define TIMER_O_RIS             0x0000001C  // GPTM Raw Interrupt Status
-#define TIMER_O_MIS             0x00000020  // GPTM Masked Interrupt Status
-#define TIMER_O_ICR             0x00000024  // GPTM Interrupt Clear
-#define TIMER_O_TAILR           0x00000028  // GPTM Timer A Interval Load
-#define TIMER_O_TBILR           0x0000002C  // GPTM Timer B Interval Load
-#define TIMER_O_TAMATCHR        0x00000030  // GPTM Timer A Match
-#define TIMER_O_TBMATCHR        0x00000034  // GPTM Timer B Match
-#define TIMER_O_TAPR            0x00000038  // GPTM Timer A Prescale
-#define TIMER_O_TBPR            0x0000003C  // GPTM Timer B Prescale
-#define TIMER_O_TAPMR           0x00000040  // GPTM TimerA Prescale Match
-#define TIMER_O_TBPMR           0x00000044  // GPTM TimerB Prescale Match
-#define TIMER_O_TAR             0x00000048  // GPTM Timer A
-#define TIMER_O_TBR             0x0000004C  // GPTM Timer B
-#define TIMER_O_TAV             0x00000050  // GPTM Timer A Value
-#define TIMER_O_TBV             0x00000054  // GPTM Timer B Value
-#define TIMER_O_RTCPD           0x00000058  // GPTM RTC Predivide
-#define TIMER_O_TAPS            0x0000005C  // GPTM Timer A Prescale Snapshot
-#define TIMER_O_TBPS            0x00000060  // GPTM Timer B Prescale Snapshot
-#define TIMER_O_TAPV            0x00000064  // GPTM Timer A Prescale Value
-#define TIMER_O_TBPV            0x00000068  // GPTM Timer B Prescale Value
-#define TIMER_O_DMAEV           0x0000006C  // GPTM DMA Event
-#define TIMER_O_PP              0x00000FC0  // GPTM Peripheral Properties
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_CFG register.
-//
-//*****************************************************************************
-#define TIMER_CFG_M             0x00000007  // GPTM Configuration
-#define TIMER_CFG_32_BIT_TIMER  0x00000000  // 32-bit timer configuration
-#define TIMER_CFG_32_BIT_RTC    0x00000001  // 32-bit real-time clock (RTC)
-                                            // counter configuration
-#define TIMER_CFG_16_BIT        0x00000004  // 16-bit timer configuration. The
-                                            // function is controlled by bits
-                                            // 1:0 of GPTMTAMR and GPTMTBMR
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAMR_TAPLO        0x00000800  // GPTM Timer A PWM Legacy
-                                            // Operation
-#define TIMER_TAMR_TAMRSU       0x00000400  // GPTM Timer A Match Register
-                                            // Update
-#define TIMER_TAMR_TAPWMIE      0x00000200  // GPTM Timer A PWM Interrupt
-                                            // Enable
-#define TIMER_TAMR_TAILD        0x00000100  // GPTM Timer A Interval Load Write
-//##### GARNET END #####
-#define TIMER_TAMR_TASNAPS      0x00000080  // GPTM Timer A Snap-Shot Mode
-#define TIMER_TAMR_TAWOT        0x00000040  // GPTM Timer A Wait-on-Trigger
-#define TIMER_TAMR_TAMIE        0x00000020  // GPTM Timer A Match Interrupt
-                                            // Enable
-#define TIMER_TAMR_TACDIR       0x00000010  // GPTM Timer A Count Direction
-#define TIMER_TAMR_TAAMS        0x00000008  // GPTM Timer A Alternate Mode
-                                            // Select
-#define TIMER_TAMR_TACMR        0x00000004  // GPTM Timer A Capture Mode
-#define TIMER_TAMR_TAMR_M       0x00000003  // GPTM Timer A Mode
-#define TIMER_TAMR_TAMR_1_SHOT  0x00000001  // One-Shot Timer mode
-#define TIMER_TAMR_TAMR_PERIOD  0x00000002  // Periodic Timer mode
-#define TIMER_TAMR_TAMR_CAP     0x00000003  // Capture mode
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBMR_TBPLO        0x00000800  // GPTM Timer B PWM Legacy
-                                            // Operation
-#define TIMER_TBMR_TBMRSU       0x00000400  // GPTM Timer B Match Register
-                                            // Update
-#define TIMER_TBMR_TBPWMIE      0x00000200  // GPTM Timer B PWM Interrupt
-                                            // Enable
-#define TIMER_TBMR_TBILD        0x00000100  // GPTM Timer B Interval Load Write
-//##### GARNET END #####
-#define TIMER_TBMR_TBSNAPS      0x00000080  // GPTM Timer B Snap-Shot Mode
-#define TIMER_TBMR_TBWOT        0x00000040  // GPTM Timer B Wait-on-Trigger
-#define TIMER_TBMR_TBMIE        0x00000020  // GPTM Timer B Match Interrupt
-                                            // Enable
-#define TIMER_TBMR_TBCDIR       0x00000010  // GPTM Timer B Count Direction
-#define TIMER_TBMR_TBAMS        0x00000008  // GPTM Timer B Alternate Mode
-                                            // Select
-#define TIMER_TBMR_TBCMR        0x00000004  // GPTM Timer B Capture Mode
-#define TIMER_TBMR_TBMR_M       0x00000003  // GPTM Timer B Mode
-#define TIMER_TBMR_TBMR_1_SHOT  0x00000001  // One-Shot Timer mode
-#define TIMER_TBMR_TBMR_PERIOD  0x00000002  // Periodic Timer mode
-#define TIMER_TBMR_TBMR_CAP     0x00000003  // Capture mode
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_CTL register.
-//
-//*****************************************************************************
-#define TIMER_CTL_TBPWML        0x00004000  // GPTM Timer B PWM Output Level
-#define TIMER_CTL_TBOTE         0x00002000  // GPTM Timer B Output Trigger
-                                            // Enable
-#define TIMER_CTL_TBEVENT_M     0x00000C00  // GPTM Timer B Event Mode
-#define TIMER_CTL_TBEVENT_POS   0x00000000  // Positive edge
-#define TIMER_CTL_TBEVENT_NEG   0x00000400  // Negative edge
-#define TIMER_CTL_TBEVENT_BOTH  0x00000C00  // Both edges
-#define TIMER_CTL_TBSTALL       0x00000200  // GPTM Timer B Stall Enable
-#define TIMER_CTL_TBEN          0x00000100  // GPTM Timer B Enable
-#define TIMER_CTL_TAPWML        0x00000040  // GPTM Timer A PWM Output Level
-#define TIMER_CTL_TAOTE         0x00000020  // GPTM Timer A Output Trigger
-                                            // Enable
-#define TIMER_CTL_RTCEN         0x00000010  // GPTM RTC Enable
-#define TIMER_CTL_TAEVENT_M     0x0000000C  // GPTM Timer A Event Mode
-#define TIMER_CTL_TAEVENT_POS   0x00000000  // Positive edge
-#define TIMER_CTL_TAEVENT_NEG   0x00000004  // Negative edge
-#define TIMER_CTL_TAEVENT_BOTH  0x0000000C  // Both edges
-#define TIMER_CTL_TASTALL       0x00000002  // GPTM Timer A Stall Enable
-#define TIMER_CTL_TAEN          0x00000001  // GPTM Timer A Enable
-//##### GARNET BEGIN #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_SYNC register.
-//
-//*****************************************************************************
-#define TIMER_SYNC_SYNC11_M     0x00C00000  // Synchronize GPTM Timer 11
-#define TIMER_SYNC_SYNC11_TA    0x00400000  // A timeout event for Timer A of
-                                            // GPTM11 is triggered
-#define TIMER_SYNC_SYNC11_TB    0x00800000  // A timeout event for Timer B of
-                                            // GPTM11 is triggered
-#define TIMER_SYNC_SYNC11_TATB  0x00C00000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM11 is
-                                            // triggered
-#define TIMER_SYNC_SYNC10_M     0x00300000  // Synchronize GPTM Timer 10
-#define TIMER_SYNC_SYNC10_TA    0x00100000  // A timeout event for Timer A of
-                                            // GPTM10 is triggered
-#define TIMER_SYNC_SYNC10_TB    0x00200000  // A timeout event for Timer B of
-                                            // GPTM10 is triggered
-#define TIMER_SYNC_SYNC10_TATB  0x00300000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM10 is
-                                            // triggered
-#define TIMER_SYNC_SYNC9_M      0x000C0000  // Synchronize GPTM Timer 9
-#define TIMER_SYNC_SYNC9_TA     0x00040000  // A timeout event for Timer A of
-                                            // GPTM9 is triggered
-#define TIMER_SYNC_SYNC9_TB     0x00080000  // A timeout event for Timer B of
-                                            // GPTM9 is triggered
-#define TIMER_SYNC_SYNC9_TATB   0x000C0000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM9 is
-                                            // triggered
-#define TIMER_SYNC_SYNC8_M      0x00030000  // Synchronize GPTM Timer 8
-#define TIMER_SYNC_SYNC8_TA     0x00010000  // A timeout event for Timer A of
-                                            // GPTM8 is triggered
-#define TIMER_SYNC_SYNC8_TB     0x00020000  // A timeout event for Timer B of
-                                            // GPTM8 is triggered
-#define TIMER_SYNC_SYNC8_TATB   0x00030000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM8 is
-                                            // triggered
-#define TIMER_SYNC_SYNC7_M      0x0000C000  // Synchronize GPTM Timer 7
-#define TIMER_SYNC_SYNC7_TA     0x00004000  // A timeout event for Timer A of
-                                            // GPTM7 is triggered
-#define TIMER_SYNC_SYNC7_TB     0x00008000  // A timeout event for Timer B of
-                                            // GPTM7 is triggered
-#define TIMER_SYNC_SYNC7_TATB   0x0000C000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM7 is
-                                            // triggered
-#define TIMER_SYNC_SYNC6_M      0x00003000  // Synchronize GPTM Timer 6
-#define TIMER_SYNC_SYNC6_TA     0x00001000  // A timeout event for Timer A of
-                                            // GPTM6 is triggered
-#define TIMER_SYNC_SYNC6_TB     0x00002000  // A timeout event for Timer B of
-                                            // GPTM6 is triggered
-#define TIMER_SYNC_SYNC6_TATB   0x00003000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM6 is
-                                            // triggered
-#define TIMER_SYNC_SYNC5_M      0x00000C00  // Synchronize GPTM Timer 5
-#define TIMER_SYNC_SYNC5_TA     0x00000400  // A timeout event for Timer A of
-                                            // GPTM5 is triggered
-#define TIMER_SYNC_SYNC5_TB     0x00000800  // A timeout event for Timer B of
-                                            // GPTM5 is triggered
-#define TIMER_SYNC_SYNC5_TATB   0x00000C00  // A timeout event for both Timer A
-                                            // and Timer B of GPTM5 is
-                                            // triggered
-#define TIMER_SYNC_SYNC4_M      0x00000300  // Synchronize GPTM Timer 4
-#define TIMER_SYNC_SYNC4_TA     0x00000100  // A timeout event for Timer A of
-                                            // GPTM4 is triggered
-#define TIMER_SYNC_SYNC4_TB     0x00000200  // A timeout event for Timer B of
-                                            // GPTM4 is triggered
-#define TIMER_SYNC_SYNC4_TATB   0x00000300  // A timeout event for both Timer A
-                                            // and Timer B of GPTM4 is
-                                            // triggered
-#define TIMER_SYNC_SYNC3_M      0x000000C0  // Synchronize GPTM Timer 3
-#define TIMER_SYNC_SYNC3_TA     0x00000040  // A timeout event for Timer A of
-                                            // GPTM3 is triggered
-#define TIMER_SYNC_SYNC3_TB     0x00000080  // A timeout event for Timer B of
-                                            // GPTM3 is triggered
-#define TIMER_SYNC_SYNC3_TATB   0x000000C0  // A timeout event for both Timer A
-                                            // and Timer B of GPTM3 is
-                                            // triggered
-#define TIMER_SYNC_SYNC2_M      0x00000030  // Synchronize GPTM Timer 2
-#define TIMER_SYNC_SYNC2_TA     0x00000010  // A timeout event for Timer A of
-                                            // GPTM2 is triggered
-#define TIMER_SYNC_SYNC2_TB     0x00000020  // A timeout event for Timer B of
-                                            // GPTM2 is triggered
-#define TIMER_SYNC_SYNC2_TATB   0x00000030  // A timeout event for both Timer A
-                                            // and Timer B of GPTM2 is
-                                            // triggered
-#define TIMER_SYNC_SYNC1_M      0x0000000C  // Synchronize GPTM Timer 1
-#define TIMER_SYNC_SYNC1_TA     0x00000004  // A timeout event for Timer A of
-                                            // GPTM1 is triggered
-#define TIMER_SYNC_SYNC1_TB     0x00000008  // A timeout event for Timer B of
-                                            // GPTM1 is triggered
-#define TIMER_SYNC_SYNC1_TATB   0x0000000C  // A timeout event for both Timer A
-                                            // and Timer B of GPTM1 is
-                                            // triggered
-#define TIMER_SYNC_SYNC0_M      0x00000003  // Synchronize GPTM Timer 0
-#define TIMER_SYNC_SYNC0_TA     0x00000001  // A timeout event for Timer A of
-                                            // GPTM0 is triggered
-#define TIMER_SYNC_SYNC0_TB     0x00000002  // A timeout event for Timer B of
-                                            // GPTM0 is triggered
-#define TIMER_SYNC_SYNC0_TATB   0x00000003  // A timeout event for both Timer A
-                                            // and Timer B of GPTM0 is
-                                            // triggered
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_IMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_IMR_WUEIM         0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Interrupt Mask
-//##### GARNET END #####
-#define TIMER_IMR_TBMIM         0x00000800  // GPTM Timer B Mode Match
-                                            // Interrupt Mask
-#define TIMER_IMR_CBEIM         0x00000400  // GPTM Capture B Event Interrupt
-                                            // Mask
-#define TIMER_IMR_CBMIM         0x00000200  // GPTM Capture B Match Interrupt
-                                            // Mask
-#define TIMER_IMR_TBTOIM        0x00000100  // GPTM Timer B Time-Out Interrupt
-                                            // Mask
-#define TIMER_IMR_TAMIM         0x00000010  // GPTM Timer A Mode Match
-                                            // Interrupt Mask
-#define TIMER_IMR_RTCIM         0x00000008  // GPTM RTC Interrupt Mask
-#define TIMER_IMR_CAEIM         0x00000004  // GPTM Capture A Event Interrupt
-                                            // Mask
-#define TIMER_IMR_CAMIM         0x00000002  // GPTM Capture A Match Interrupt
-                                            // Mask
-#define TIMER_IMR_TATOIM        0x00000001  // GPTM Timer A Time-Out Interrupt
-                                            // Mask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_RIS register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_RIS_WUERIS        0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Raw Interrupt Status
-//##### GARNET END #####
-#define TIMER_RIS_TBMRIS        0x00000800  // GPTM Timer B Mode Match Raw
-                                            // Interrupt
-#define TIMER_RIS_CBERIS        0x00000400  // GPTM Capture B Event Raw
-                                            // Interrupt
-#define TIMER_RIS_CBMRIS        0x00000200  // GPTM Capture B Match Raw
-                                            // Interrupt
-#define TIMER_RIS_TBTORIS       0x00000100  // GPTM Timer B Time-Out Raw
-                                            // Interrupt
-#define TIMER_RIS_TAMRIS        0x00000010  // GPTM Timer A Mode Match Raw
-                                            // Interrupt
-#define TIMER_RIS_RTCRIS        0x00000008  // GPTM RTC Raw Interrupt
-#define TIMER_RIS_CAERIS        0x00000004  // GPTM Capture A Event Raw
-                                            // Interrupt
-#define TIMER_RIS_CAMRIS        0x00000002  // GPTM Capture A Match Raw
-                                            // Interrupt
-#define TIMER_RIS_TATORIS       0x00000001  // GPTM Timer A Time-Out Raw
-                                            // Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_MIS register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_MIS_WUEMIS        0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Masked Interrupt Status
-//##### GARNET END #####
-#define TIMER_MIS_TBMMIS        0x00000800  // GPTM Timer B Mode Match Masked
-                                            // Interrupt
-#define TIMER_MIS_CBEMIS        0x00000400  // GPTM Capture B Event Masked
-                                            // Interrupt
-#define TIMER_MIS_CBMMIS        0x00000200  // GPTM Capture B Match Masked
-                                            // Interrupt
-#define TIMER_MIS_TBTOMIS       0x00000100  // GPTM Timer B Time-Out Masked
-                                            // Interrupt
-#define TIMER_MIS_TAMMIS        0x00000010  // GPTM Timer A Mode Match Masked
-                                            // Interrupt
-#define TIMER_MIS_RTCMIS        0x00000008  // GPTM RTC Masked Interrupt
-#define TIMER_MIS_CAEMIS        0x00000004  // GPTM Capture A Event Masked
-                                            // Interrupt
-#define TIMER_MIS_CAMMIS        0x00000002  // GPTM Capture A Match Masked
-                                            // Interrupt
-#define TIMER_MIS_TATOMIS       0x00000001  // GPTM Timer A Time-Out Masked
-                                            // Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_ICR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_ICR_WUECINT       0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Interrupt Clear
-//##### GARNET END #####
-#define TIMER_ICR_TBMCINT       0x00000800  // GPTM Timer B Mode Match
-                                            // Interrupt Clear
-#define TIMER_ICR_CBECINT       0x00000400  // GPTM Capture B Event Interrupt
-                                            // Clear
-#define TIMER_ICR_CBMCINT       0x00000200  // GPTM Capture B Match Interrupt
-                                            // Clear
-#define TIMER_ICR_TBTOCINT      0x00000100  // GPTM Timer B Time-Out Interrupt
-                                            // Clear
-#define TIMER_ICR_TAMCINT       0x00000010  // GPTM Timer A Mode Match
-                                            // Interrupt Clear
-#define TIMER_ICR_RTCCINT       0x00000008  // GPTM RTC Interrupt Clear
-#define TIMER_ICR_CAECINT       0x00000004  // GPTM Capture A Event Interrupt
-                                            // Clear
-#define TIMER_ICR_CAMCINT       0x00000002  // GPTM Capture A Match Interrupt
-                                            // Clear
-#define TIMER_ICR_TATOCINT      0x00000001  // GPTM Timer A Time-Out Raw
-                                            // Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAILR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAILR_M           0xFFFFFFFF  // GPTM Timer A Interval Load
-                                            // Register
-//##### GARNET END #####
-#define TIMER_TAILR_TAILRH_M    0xFFFF0000  // GPTM Timer A Interval Load
-                                            // Register High
-#define TIMER_TAILR_TAILRL_M    0x0000FFFF  // GPTM Timer A Interval Load
-                                            // Register Low
-#define TIMER_TAILR_TAILRH_S    16
-#define TIMER_TAILR_TAILRL_S    0
-//##### GARNET BEGIN #####
-#define TIMER_TAILR_S           0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBILR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBILR_M           0xFFFFFFFF  // GPTM Timer B Interval Load
-                                            // Register
-//##### GARNET END #####
-#define TIMER_TBILR_TBILRL_M    0x0000FFFF  // GPTM Timer B Interval Load
-                                            // Register
-#define TIMER_TBILR_TBILRL_S    0
-//##### GARNET BEGIN #####
-#define TIMER_TBILR_S           0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAMATCHR
-// register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAMATCHR_TAMR_M   0xFFFFFFFF  // GPTM Timer A Match Register
-//##### GARNET END #####
-#define TIMER_TAMATCHR_TAMRH_M  0xFFFF0000  // GPTM Timer A Match Register High
-#define TIMER_TAMATCHR_TAMRL_M  0x0000FFFF  // GPTM Timer A Match Register Low
-#define TIMER_TAMATCHR_TAMRH_S  16
-#define TIMER_TAMATCHR_TAMRL_S  0
-//##### GARNET BEGIN #####
-#define TIMER_TAMATCHR_TAMR_S   0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBMATCHR
-// register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBMATCHR_TBMR_M   0xFFFFFFFF  // GPTM Timer B Match Register
-//##### GARNET END #####
-#define TIMER_TBMATCHR_TBMRL_M  0x0000FFFF  // GPTM Timer B Match Register Low
-//##### GARNET BEGIN #####
-#define TIMER_TBMATCHR_TBMR_S   0
-//##### GARNET END #####
-#define TIMER_TBMATCHR_TBMRL_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAPR_TAPSRH_M     0x0000FF00  // GPTM Timer A Prescale High Byte
-//##### GARNET END #####
-#define TIMER_TAPR_TAPSR_M      0x000000FF  // GPTM Timer A Prescale
-//##### GARNET BEGIN #####
-#define TIMER_TAPR_TAPSRH_S     8
-//##### GARNET END #####
-#define TIMER_TAPR_TAPSR_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBPR_TBPSRH_M     0x0000FF00  // GPTM Timer B Prescale High Byte
-//##### GARNET END #####
-#define TIMER_TBPR_TBPSR_M      0x000000FF  // GPTM Timer B Prescale
-//##### GARNET BEGIN #####
-#define TIMER_TBPR_TBPSRH_S     8
-//##### GARNET END #####
-#define TIMER_TBPR_TBPSR_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAPMR_TAPSMRH_M   0x0000FF00  // GPTM Timer A Prescale Match High
-                                            // Byte
-//##### GARNET END #####
-#define TIMER_TAPMR_TAPSMR_M    0x000000FF  // GPTM TimerA Prescale Match
-//##### GARNET BEGIN #####
-#define TIMER_TAPMR_TAPSMRH_S   8
-//##### GARNET END #####
-#define TIMER_TAPMR_TAPSMR_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBPMR_TBPSMRH_M   0x0000FF00  // GPTM Timer B Prescale Match High
-                                            // Byte
-//##### GARNET END #####
-#define TIMER_TBPMR_TBPSMR_M    0x000000FF  // GPTM TimerB Prescale Match
-//##### GARNET BEGIN #####
-#define TIMER_TBPMR_TBPSMRH_S   8
-//##### GARNET END #####
-#define TIMER_TBPMR_TBPSMR_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAR_M             0xFFFFFFFF  // GPTM Timer A Register
-//##### GARNET END #####
-#define TIMER_TAR_TARH_M        0xFFFF0000  // GPTM Timer A Register High
-#define TIMER_TAR_TARL_M        0x0000FFFF  // GPTM Timer A Register Low
-#define TIMER_TAR_TARH_S        16
-#define TIMER_TAR_TARL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TAR_S             0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBR_M             0xFFFFFFFF  // GPTM Timer B Register
-//##### GARNET END #####
-#define TIMER_TBR_TBRL_M        0x00FFFFFF  // GPTM Timer B
-#define TIMER_TBR_TBRL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TBR_S             0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAV register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAV_M             0xFFFFFFFF  // GPTM Timer A Value
-//##### GARNET END #####
-#define TIMER_TAV_TAVH_M        0xFFFF0000  // GPTM Timer A Value High
-#define TIMER_TAV_TAVL_M        0x0000FFFF  // GPTM Timer A Register Low
-#define TIMER_TAV_TAVH_S        16
-#define TIMER_TAV_TAVL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TAV_S             0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBV register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBV_M             0xFFFFFFFF  // GPTM Timer B Value
-//##### GARNET END #####
-#define TIMER_TBV_TBVL_M        0x0000FFFF  // GPTM Timer B Register
-#define TIMER_TBV_TBVL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TBV_S             0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_RTCPD register.
-//
-//*****************************************************************************
-#define TIMER_RTCPD_RTCPD_M     0x0000FFFF  // RTC Predivide Counter Value
-#define TIMER_RTCPD_RTCPD_S     0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPS register.
-//
-//*****************************************************************************
-#define TIMER_TAPS_PSS_M        0x0000FFFF  // GPTM Timer A Prescaler Snapshot
-#define TIMER_TAPS_PSS_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPS register.
-//
-//*****************************************************************************
-#define TIMER_TBPS_PSS_M        0x0000FFFF  // GPTM Timer A Prescaler Value
-#define TIMER_TBPS_PSS_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPV register.
-//
-//*****************************************************************************
-#define TIMER_TAPV_PSV_M        0x0000FFFF  // GPTM Timer A Prescaler Value
-#define TIMER_TAPV_PSV_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPV register.
-//
-//*****************************************************************************
-#define TIMER_TBPV_PSV_M        0x0000FFFF  // GPTM Timer B Prescaler Value
-#define TIMER_TBPV_PSV_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_PP register.
-//
-//*****************************************************************************
-#define TIMER_PP_SYNCCNT        0x00000020  // Synchronize Start
-#define TIMER_PP_CHAIN          0x00000010  // Chain with Other Timers
-#define TIMER_PP_SIZE_M         0x0000000F  // Count Size
-#define TIMER_PP_SIZE__0        0x00000000  // Timer A and Timer B counters are
-                                            // 16 bits each with an 8-bit
-                                            // prescale counter
-#define TIMER_PP_SIZE__1        0x00000001  // Timer A and Timer B counters are
-                                            // 32 bits each with an 16-bit
-                                            // prescale counter
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following definitions are deprecated.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_CFG
-// register.
-//
-//*****************************************************************************
-#define TIMER_CFG_CFG_MSK       0x00000007  // Configuration options mask
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_CTL
-// register.
-//
-//*****************************************************************************
-#define TIMER_CTL_TBEVENT_MSK   0x00000C00  // TimerB event mode mask
-#define TIMER_CTL_TAEVENT_MSK   0x0000000C  // TimerA event mode mask
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_RIS
-// register.
-//
-//*****************************************************************************
-#define TIMER_RIS_CBEMIS        0x00000400  // CaptureB event masked int status
-#define TIMER_RIS_CBMMIS        0x00000200  // CaptureB match masked int status
-#define TIMER_RIS_TBTOMIS       0x00000100  // TimerB time out masked int stat
-#define TIMER_RIS_RTCMIS        0x00000008  // RTC masked int status
-#define TIMER_RIS_CAEMIS        0x00000004  // CaptureA event masked int status
-#define TIMER_RIS_CAMMIS        0x00000002  // CaptureA match masked int status
-#define TIMER_RIS_TATOMIS       0x00000001  // TimerA time out masked int stat
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TAILR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TAILR_TAILRH      0xFFFF0000  // TimerB load val in 32 bit mode
-#define TIMER_TAILR_TAILRL      0x0000FFFF  // TimerA interval load value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TBILR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TBILR_TBILRL      0x0000FFFF  // TimerB interval load value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the
-// TIMER_O_TAMATCHR register.
-//
-//*****************************************************************************
-#define TIMER_TAMATCHR_TAMRH    0xFFFF0000  // TimerB match val in 32 bit mode
-#define TIMER_TAMATCHR_TAMRL    0x0000FFFF  // TimerA match value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the
-// TIMER_O_TBMATCHR register.
-//
-//*****************************************************************************
-#define TIMER_TBMATCHR_TBMRL    0x0000FFFF  // TimerB match load value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TAR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TAR_TARH          0xFFFF0000  // TimerB val in 32 bit mode
-#define TIMER_TAR_TARL          0x0000FFFF  // TimerA value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TBR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TBR_TBRL          0x0000FFFF  // TimerB value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the reset values of the timer
-// registers.
-//
-//*****************************************************************************
-#define TIMER_RV_TAILR          0xFFFFFFFF  // TimerA interval load reg RV
-#define TIMER_RV_TAR            0xFFFFFFFF  // TimerA register RV
-#define TIMER_RV_TAMATCHR       0xFFFFFFFF  // TimerA match register RV
-#define TIMER_RV_TBILR          0x0000FFFF  // TimerB interval load reg RV
-#define TIMER_RV_TBMATCHR       0x0000FFFF  // TimerB match register RV
-#define TIMER_RV_TBR            0x0000FFFF  // TimerB register RV
-#define TIMER_RV_TAPR           0x00000000  // TimerA prescale register RV
-#define TIMER_RV_CFG            0x00000000  // Configuration register RV
-#define TIMER_RV_TBPMR          0x00000000  // TimerB prescale match regi RV
-#define TIMER_RV_TAPMR          0x00000000  // TimerA prescale match reg RV
-#define TIMER_RV_CTL            0x00000000  // Control register RV
-#define TIMER_RV_ICR            0x00000000  // Interrupt clear register RV
-#define TIMER_RV_TBMR           0x00000000  // TimerB mode register RV
-#define TIMER_RV_MIS            0x00000000  // Masked interrupt status reg RV
-#define TIMER_RV_RIS            0x00000000  // Interrupt status register RV
-#define TIMER_RV_TBPR           0x00000000  // TimerB prescale register RV
-#define TIMER_RV_IMR            0x00000000  // Interrupt mask register RV
-#define TIMER_RV_TAMR           0x00000000  // TimerA mode register RV
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_TnMR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TNMR_TNAMS        0x00000008  // Alternate mode select
-#define TIMER_TNMR_TNCMR        0x00000004  // Capture mode - count or time
-#define TIMER_TNMR_TNTMR_MSK    0x00000003  // Timer mode mask
-#define TIMER_TNMR_TNTMR_1_SHOT 0x00000001  // Mode - one shot
-#define TIMER_TNMR_TNTMR_PERIOD 0x00000002  // Mode - periodic
-#define TIMER_TNMR_TNTMR_CAP    0x00000003  // Mode - capture
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_TnPR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TNPR_TNPSR        0x000000FF  // TimerN prescale value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_TnPMR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TNPMR_TNPSMR      0x000000FF  // TimerN prescale match value
-
-#endif
-
-#endif // __HW_TIMER_H__
diff --git a/ports/cc3200/hal/inc/hw_types.h b/ports/cc3200/hal/inc/hw_types.h
deleted file mode 100644
index d7a6ab4fed..0000000000
--- a/ports/cc3200/hal/inc/hw_types.h
+++ /dev/null
@@ -1,76 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_TYPES_H__
-#define __HW_TYPES_H__
-
-//*****************************************************************************
-//
-// Define a boolean type, and values for true and false.
-//
-//*****************************************************************************
-typedef unsigned char tBoolean;
-
-#ifndef true
-#define true 1
-#endif
-
-#ifndef false
-#define false 0
-#endif
-
-//*****************************************************************************
-//
-// Macros for hardware access, both direct and via the bit-band region.
-//
-//*****************************************************************************
-#define HWREG(x)                                                              \
-        (*((volatile unsigned long *)(x)))
-#define HWREGH(x)                                                             \
-        (*((volatile unsigned short *)(x)))
-#define HWREGB(x)                                                             \
-        (*((volatile unsigned char *)(x)))
-#define HWREGBITW(x, b)                                                       \
-        HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 |                \
-              (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-#define HWREGBITH(x, b)                                                       \
-        HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 |               \
-               (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-#define HWREGBITB(x, b)                                                       \
-        HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 |               \
-               (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-
-
-#endif // __HW_TYPES_H__
diff --git a/ports/cc3200/hal/inc/hw_uart.h b/ports/cc3200/hal/inc/hw_uart.h
deleted file mode 100644
index ae50ac381f..0000000000
--- a/ports/cc3200/hal/inc/hw_uart.h
+++ /dev/null
@@ -1,417 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_UART_H__
-#define __HW_UART_H__
-
-//*****************************************************************************
-//
-// The following are defines for the UART register offsets.
-//
-//*****************************************************************************
-#define UART_O_DR               0x00000000
-#define UART_O_RSR              0x00000004
-#define UART_O_ECR              0x00000004
-#define UART_O_FR               0x00000018
-#define UART_O_ILPR             0x00000020
-#define UART_O_IBRD             0x00000024
-#define UART_O_FBRD             0x00000028
-#define UART_O_LCRH             0x0000002C
-#define UART_O_CTL              0x00000030
-#define UART_O_IFLS             0x00000034
-#define UART_O_IM               0x00000038
-#define UART_O_RIS              0x0000003C
-#define UART_O_MIS              0x00000040
-#define UART_O_ICR              0x00000044
-#define UART_O_DMACTL           0x00000048
-#define UART_O_LCTL             0x00000090
-#define UART_O_LSS              0x00000094
-#define UART_O_LTIM             0x00000098
-#define UART_O_9BITADDR      0x000000A4
-#define UART_O_9BITAMASK     0x000000A8
-#define UART_O_PP               0x00000FC0
-#define UART_O_CC               0x00000FC8
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_DR register.
-//
-//******************************************************************************
-#define UART_DR_OE              0x00000800  // UART Overrun Error
-#define UART_DR_BE              0x00000400  // UART Break Error
-#define UART_DR_PE              0x00000200  // UART Parity Error
-#define UART_DR_FE              0x00000100  // UART Framing Error
-#define UART_DR_DATA_M        0x000000FF  // Data Transmitted or Received
-#define UART_DR_DATA_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_RSR register.
-//
-//******************************************************************************
-#define UART_RSR_OE             0x00000008  // UART Overrun Error
-#define UART_RSR_BE             0x00000004  // UART Break Error
-#define UART_RSR_PE             0x00000002  // UART Parity Error
-#define UART_RSR_FE             0x00000001  // UART Framing Error
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_ECR register.
-//
-//******************************************************************************
-#define UART_ECR_DATA_M       0x000000FF  // Error Clear
-#define UART_ECR_DATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_FR register.
-//
-//******************************************************************************
-#define UART_FR_RI              0x00000100  // Ring Indicator
-#define UART_FR_TXFE            0x00000080  // UART Transmit FIFO Empty
-#define UART_FR_RXFF            0x00000040  // UART Receive FIFO Full
-#define UART_FR_TXFF            0x00000020  // UART Transmit FIFO Full
-#define UART_FR_RXFE            0x00000010  // UART Receive FIFO Empty
-#define UART_FR_BUSY            0x00000008  // UART Busy
-#define UART_FR_DCD             0x00000004  // Data Carrier Detect
-#define UART_FR_DSR             0x00000002  // Data Set Ready
-#define UART_FR_CTS             0x00000001  // Clear To Send
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_ILPR register.
-//
-//******************************************************************************
-#define UART_ILPR_ILPDVSR_M   0x000000FF  // IrDA Low-Power Divisor
-#define UART_ILPR_ILPDVSR_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_IBRD register.
-//
-//******************************************************************************
-#define UART_IBRD_DIVINT_M    0x0000FFFF  // Integer Baud-Rate Divisor
-#define UART_IBRD_DIVINT_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_FBRD register.
-//
-//******************************************************************************
-#define UART_FBRD_DIVFRAC_M   0x0000003F  // Fractional Baud-Rate Divisor
-#define UART_FBRD_DIVFRAC_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LCRH register.
-//
-//******************************************************************************
-#define UART_LCRH_SPS           0x00000080  // UART Stick Parity Select
-#define UART_LCRH_WLEN_M      0x00000060  // UART Word Length 0x00000000 :
-                                            // UART_LCRH_WLEN_5 : 5 bits
-                                            // (default) 0x00000020 :
-                                            // UART_LCRH_WLEN_6 : 6 bits
-                                            // 0x00000040 : UART_LCRH_WLEN_7 : 7
-                                            // bits 0x00000060 :
-                                            // UART_LCRH_WLEN_8 : 8 bits
-#define UART_LCRH_WLEN_S      5
-#define UART_LCRH_FEN           0x00000010  // UART Enable FIFOs
-#define UART_LCRH_STP2          0x00000008  // UART Two Stop Bits Select
-#define UART_LCRH_EPS           0x00000004  // UART Even Parity Select
-#define UART_LCRH_PEN           0x00000002  // UART Parity Enable
-#define UART_LCRH_BRK           0x00000001  // UART Send Break
-#define UART_LCRH_WLEN_M        0x00000060  // UART Word Length
-#define UART_LCRH_WLEN_5        0x00000000  // 5 bits (default)
-#define UART_LCRH_WLEN_6        0x00000020  // 6 bits
-#define UART_LCRH_WLEN_7        0x00000040  // 7 bits
-#define UART_LCRH_WLEN_8        0x00000060  // 8 bits
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_CTL register.
-//
-//******************************************************************************
-#define UART_CTL_CTSEN          0x00008000  // Enable Clear To Send
-#define UART_CTL_RTSEN          0x00004000  // Enable Request to Send
-#define UART_CTL_RI             0x00002000  // Ring Indicator
-#define UART_CTL_DCD            0x00001000  // Data Carrier Detect
-#define UART_CTL_RTS            0x00000800  // Request to Send
-#define UART_CTL_DTR            0x00000400  // Data Terminal Ready
-#define UART_CTL_RXE            0x00000200  // UART Receive Enable
-#define UART_CTL_TXE            0x00000100  // UART Transmit Enable
-#define UART_CTL_LBE            0x00000080  // UART Loop Back Enable
-#define UART_CTL_LIN            0x00000040  // LIN Mode Enable
-#define UART_CTL_HSE            0x00000020  // High-Speed Enable
-#define UART_CTL_EOT            0x00000010  // End of Transmission
-#define UART_CTL_SMART          0x00000008  // ISO 7816 Smart Card Support
-#define UART_CTL_SIRLP          0x00000004  // UART SIR Low-Power Mode
-#define UART_CTL_SIREN          0x00000002  // UART SIR Enable
-#define UART_CTL_UARTEN         0x00000001  // UART Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_IFLS register.
-//
-//******************************************************************************
-#define UART_IFLS_RX_M        0x00000038  // UART Receive Interrupt FIFO
-                                            // Level Select
-#define UART_IFLS_RX_S        3
-#define UART_IFLS_TX_M        0x00000007  // UART Transmit Interrupt FIFO
-                                            // Level Select
-#define UART_IFLS_TX_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_IM register.
-//
-//******************************************************************************
-#define UART_IM_DMATXIM         0x00020000  // Transmit DMA Interrupt Mask
-#define UART_IM_DMARXIM         0x00010000  // Receive DMA Interrupt Mask
-#define UART_IM_LME5IM          0x00008000  // LIN Mode Edge 5 Interrupt Mask
-#define UART_IM_LME1IM          0x00004000  // LIN Mode Edge 1 Interrupt Mask
-#define UART_IM_LMSBIM          0x00002000  // LIN Mode Sync Break Interrupt
-                                            // Mask
-#define UART_IM_9BITIM       0x00001000  // 9-Bit Mode Interrupt Mask
-#define UART_IM_EOTIM           0x00000800  // End of Transmission Interrupt
-                                            // Mask
-#define UART_IM_OEIM            0x00000400  // UART Overrun Error Interrupt
-                                            // Mask
-#define UART_IM_BEIM            0x00000200  // UART Break Error Interrupt Mask
-#define UART_IM_PEIM            0x00000100  // UART Parity Error Interrupt Mask
-#define UART_IM_FEIM            0x00000080  // UART Framing Error Interrupt
-                                            // Mask
-#define UART_IM_RTIM            0x00000040  // UART Receive Time-Out Interrupt
-                                            // Mask
-#define UART_IM_TXIM            0x00000020  // UART Transmit Interrupt Mask
-#define UART_IM_RXIM            0x00000010  // UART Receive Interrupt Mask
-#define UART_IM_DSRMIM          0x00000008  // UART Data Set Ready Modem
-                                            // Interrupt Mask
-#define UART_IM_DCDMIM          0x00000004  // UART Data Carrier Detect Modem
-                                            // Interrupt Mask
-#define UART_IM_CTSMIM          0x00000002  // UART Clear to Send Modem
-                                            // Interrupt Mask
-#define UART_IM_RIMIM           0x00000001  // UART Ring Indicator Modem
-                                            // Interrupt Mask
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_RIS register.
-//
-//******************************************************************************
-#define UART_RIS_DMATXRIS       0x00020000  // Transmit DMA Raw Interrupt
-                                            // Status
-#define UART_RIS_DMARXRIS       0x00010000  // Receive DMA Raw Interrupt Status
-#define UART_RIS_LME5RIS        0x00008000  // LIN Mode Edge 5 Raw Interrupt
-                                            // Status
-#define UART_RIS_LME1RIS        0x00004000  // LIN Mode Edge 1 Raw Interrupt
-                                            // Status
-#define UART_RIS_LMSBRIS        0x00002000  // LIN Mode Sync Break Raw
-                                            // Interrupt Status
-#define UART_RIS_9BITRIS     0x00001000  // 9-Bit Mode Raw Interrupt Status
-#define UART_RIS_EOTRIS         0x00000800  // End of Transmission Raw
-                                            // Interrupt Status
-#define UART_RIS_OERIS          0x00000400  // UART Overrun Error Raw Interrupt
-                                            // Status
-#define UART_RIS_BERIS          0x00000200  // UART Break Error Raw Interrupt
-                                            // Status
-#define UART_RIS_PERIS          0x00000100  // UART Parity Error Raw Interrupt
-                                            // Status
-#define UART_RIS_FERIS          0x00000080  // UART Framing Error Raw Interrupt
-                                            // Status
-#define UART_RIS_RTRIS          0x00000040  // UART Receive Time-Out Raw
-                                            // Interrupt Status
-#define UART_RIS_TXRIS          0x00000020  // UART Transmit Raw Interrupt
-                                            // Status
-#define UART_RIS_RXRIS          0x00000010  // UART Receive Raw Interrupt
-                                            // Status
-#define UART_RIS_DSRRIS         0x00000008  // UART Data Set Ready Modem Raw
-                                            // Interrupt Status
-#define UART_RIS_DCDRIS         0x00000004  // UART Data Carrier Detect Modem
-                                            // Raw Interrupt Status
-#define UART_RIS_CTSRIS         0x00000002  // UART Clear to Send Modem Raw
-                                            // Interrupt Status
-#define UART_RIS_RIRIS          0x00000001  // UART Ring Indicator Modem Raw
-                                            // Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_MIS register.
-//
-//******************************************************************************
-#define UART_MIS_DMATXMIS       0x00020000  // Transmit DMA Masked Interrupt
-                                            // Status
-#define UART_MIS_DMARXMIS       0x00010000  // Receive DMA Masked Interrupt
-                                            // Status
-#define UART_MIS_LME5MIS        0x00008000  // LIN Mode Edge 5 Masked Interrupt
-                                            // Status
-#define UART_MIS_LME1MIS        0x00004000  // LIN Mode Edge 1 Masked Interrupt
-                                            // Status
-#define UART_MIS_LMSBMIS        0x00002000  // LIN Mode Sync Break Masked
-                                            // Interrupt Status
-#define UART_MIS_9BITMIS     0x00001000  // 9-Bit Mode Masked Interrupt
-                                            // Status
-#define UART_MIS_EOTMIS         0x00000800  // End of Transmission Masked
-                                            // Interrupt Status
-#define UART_MIS_OEMIS          0x00000400  // UART Overrun Error Masked
-                                            // Interrupt Status
-#define UART_MIS_BEMIS          0x00000200  // UART Break Error Masked
-                                            // Interrupt Status
-#define UART_MIS_PEMIS          0x00000100  // UART Parity Error Masked
-                                            // Interrupt Status
-#define UART_MIS_FEMIS          0x00000080  // UART Framing Error Masked
-                                            // Interrupt Status
-#define UART_MIS_RTMIS          0x00000040  // UART Receive Time-Out Masked
-                                            // Interrupt Status
-#define UART_MIS_TXMIS          0x00000020  // UART Transmit Masked Interrupt
-                                            // Status
-#define UART_MIS_RXMIS          0x00000010  // UART Receive Masked Interrupt
-                                            // Status
-#define UART_MIS_DSRMIS         0x00000008  // UART Data Set Ready Modem Masked
-                                            // Interrupt Status
-#define UART_MIS_DCDMIS         0x00000004  // UART Data Carrier Detect Modem
-                                            // Masked Interrupt Status
-#define UART_MIS_CTSMIS         0x00000002  // UART Clear to Send Modem Masked
-                                            // Interrupt Status
-#define UART_MIS_RIMIS          0x00000001  // UART Ring Indicator Modem Masked
-                                            // Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_ICR register.
-//
-//******************************************************************************
-#define UART_ICR_DMATXIC        0x00020000  // Transmit DMA Interrupt Clear
-#define UART_ICR_DMARXIC        0x00010000  // Receive DMA Interrupt Clear
-#define UART_ICR_LME5MIC        0x00008000  // LIN Mode Edge 5 Interrupt Clear
-#define UART_ICR_LME1MIC        0x00004000  // LIN Mode Edge 1 Interrupt Clear
-#define UART_ICR_LMSBMIC        0x00002000  // LIN Mode Sync Break Interrupt
-                                            // Clear
-#define UART_ICR_9BITIC      0x00001000  // 9-Bit Mode Interrupt Clear
-#define UART_ICR_EOTIC          0x00000800  // End of Transmission Interrupt
-                                            // Clear
-#define UART_ICR_OEIC           0x00000400  // Overrun Error Interrupt Clear
-#define UART_ICR_BEIC           0x00000200  // Break Error Interrupt Clear
-#define UART_ICR_PEIC           0x00000100  // Parity Error Interrupt Clear
-#define UART_ICR_FEIC           0x00000080  // Framing Error Interrupt Clear
-#define UART_ICR_RTIC           0x00000040  // Receive Time-Out Interrupt Clear
-#define UART_ICR_TXIC           0x00000020  // Transmit Interrupt Clear
-#define UART_ICR_RXIC           0x00000010  // Receive Interrupt Clear
-#define UART_ICR_DSRMIC         0x00000008  // UART Data Set Ready Modem
-                                            // Interrupt Clear
-#define UART_ICR_DCDMIC         0x00000004  // UART Data Carrier Detect Modem
-                                            // Interrupt Clear
-#define UART_ICR_CTSMIC         0x00000002  // UART Clear to Send Modem
-                                            // Interrupt Clear
-#define UART_ICR_RIMIC          0x00000001  // UART Ring Indicator Modem
-                                            // Interrupt Clear
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_DMACTL register.
-//
-//******************************************************************************
-#define UART_DMACTL_DMAERR      0x00000004  // DMA on Error
-#define UART_DMACTL_TXDMAE      0x00000002  // Transmit DMA Enable
-#define UART_DMACTL_RXDMAE      0x00000001  // Receive DMA Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LCTL register.
-//
-//******************************************************************************
-#define UART_LCTL_BLEN_M      0x00000030  // Sync Break Length 0x00000000 :
-                                            // UART_LCTL_BLEN_13T : Sync break
-                                            // length is 13T bits (default)
-                                            // 0x00000010 : UART_LCTL_BLEN_14T :
-                                            // Sync break length is 14T bits
-                                            // 0x00000020 : UART_LCTL_BLEN_15T :
-                                            // Sync break length is 15T bits
-                                            // 0x00000030 : UART_LCTL_BLEN_16T :
-                                            // Sync break length is 16T bits
-#define UART_LCTL_BLEN_S      4
-#define UART_LCTL_MASTER        0x00000001  // LIN Master Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LSS register.
-//
-//******************************************************************************
-#define UART_LSS_TSS_M        0x0000FFFF  // Timer Snap Shot
-#define UART_LSS_TSS_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LTIM register.
-//
-//******************************************************************************
-#define UART_LTIM_TIMER_M     0x0000FFFF  // Timer Value
-#define UART_LTIM_TIMER_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UART_O_9BITADDR register.
-//
-//******************************************************************************
-#define UART_9BITADDR_9BITEN \
-                                0x00008000  // Enable 9-Bit Mode
-
-#define UART_9BITADDR_ADDR_M \
-                                0x000000FF  // Self Address for 9-Bit Mode
-
-#define UART_9BITADDR_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UART_O_9BITAMASK register.
-//
-//******************************************************************************
-#define UART_9BITAMASK_RANGE_M \
-                                0x0000FF00  // Self Address Range for 9-Bit
-                                            // Mode
-
-#define UART_9BITAMASK_RANGE_S 8
-#define UART_9BITAMASK_MASK_M \
-                                0x000000FF  // Self Address Mask for 9-Bit Mode
-
-#define UART_9BITAMASK_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_PP register.
-//
-//******************************************************************************
-#define UART_PP_MSE             0x00000008  // Modem Support Extended
-#define UART_PP_MS              0x00000004  // Modem Support
-#define UART_PP_NB              0x00000002  // 9-Bit Support
-#define UART_PP_SC              0x00000001  // Smart Card Support
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_CC register.
-//
-//******************************************************************************
-#define UART_CC_CS_M          0x0000000F  // UART Baud Clock Source
-                                            // 0x00000005 : UART_CC_CS_PIOSC :
-                                            // PIOSC 0x00000000 :
-                                            // UART_CC_CS_SYSCLK : The system
-                                            // clock (default)
-#define UART_CC_CS_S          0
-
-
-
-#endif // __HW_UART_H__
diff --git a/ports/cc3200/hal/inc/hw_udma.h b/ports/cc3200/hal/inc/hw_udma.h
deleted file mode 100644
index 9a495baea8..0000000000
--- a/ports/cc3200/hal/inc/hw_udma.h
+++ /dev/null
@@ -1,336 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_UDMA_H__
-#define __HW_UDMA_H__
-
-//*****************************************************************************
-//
-// The following are defines for the UDMA register offsets.
-//
-//*****************************************************************************
-#define UDMA_O_STAT             0x00000000
-#define UDMA_O_CFG              0x00000004
-#define UDMA_O_CTLBASE          0x00000008
-#define UDMA_O_ALTBASE          0x0000000C
-#define UDMA_O_WAITSTAT         0x00000010
-#define UDMA_O_SWREQ            0x00000014
-#define UDMA_O_USEBURSTSET      0x00000018
-#define UDMA_O_USEBURSTCLR      0x0000001C
-#define UDMA_O_REQMASKSET       0x00000020
-#define UDMA_O_REQMASKCLR       0x00000024
-#define UDMA_O_ENASET           0x00000028
-#define UDMA_O_ENACLR           0x0000002C
-#define UDMA_O_ALTSET           0x00000030
-#define UDMA_O_ALTCLR           0x00000034
-#define UDMA_O_PRIOSET          0x00000038
-#define UDMA_O_PRIOCLR          0x0000003C
-#define UDMA_O_ERRCLR           0x0000004C
-#define UDMA_O_CHASGN           0x00000500
-#define UDMA_O_CHIS             0x00000504
-#define UDMA_O_CHMAP0           0x00000510
-#define UDMA_O_CHMAP1           0x00000514
-#define UDMA_O_CHMAP2           0x00000518
-#define UDMA_O_CHMAP3           0x0000051C
-#define UDMA_O_PV               0x00000FB0
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_STAT register.
-//
-//******************************************************************************
-#define UDMA_STAT_DMACHANS_M  0x001F0000  // Available uDMA Channels Minus 1
-#define UDMA_STAT_DMACHANS_S  16
-#define UDMA_STAT_STATE_M     0x000000F0  // Control State Machine Status
-                                            // 0x00000090 : UDMA_STAT_STATE_DONE
-                                            // : Done 0x00000000 :
-                                            // UDMA_STAT_STATE_IDLE : Idle
-                                            // 0x00000010 :
-                                            // UDMA_STAT_STATE_RD_CTRL : Reading
-                                            // channel controller data
-                                            // 0x00000030 :
-                                            // UDMA_STAT_STATE_RD_DSTENDP :
-                                            // Reading destination end pointer
-                                            // 0x00000040 :
-                                            // UDMA_STAT_STATE_RD_SRCDAT :
-                                            // Reading source data 0x00000020 :
-                                            // UDMA_STAT_STATE_RD_SRCENDP :
-                                            // Reading source end pointer
-                                            // 0x00000080 :
-                                            // UDMA_STAT_STATE_STALL : Stalled
-                                            // 0x000000A0 :
-                                            // UDMA_STAT_STATE_UNDEF : Undefined
-                                            // 0x00000060 : UDMA_STAT_STATE_WAIT
-                                            // : Waiting for uDMA request to
-                                            // clear 0x00000070 :
-                                            // UDMA_STAT_STATE_WR_CTRL : Writing
-                                            // channel controller data
-                                            // 0x00000050 :
-                                            // UDMA_STAT_STATE_WR_DSTDAT :
-                                            // Writing destination data
-#define UDMA_STAT_STATE_S     4
-#define UDMA_STAT_MASTEN        0x00000001  // Master Enable Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CFG register.
-//
-//******************************************************************************
-#define UDMA_CFG_MASTEN         0x00000001  // Controller Master Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CTLBASE register.
-//
-//******************************************************************************
-#define UDMA_CTLBASE_ADDR_M   0xFFFFFC00  // Channel Control Base Address
-#define UDMA_CTLBASE_ADDR_S   10
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ALTBASE register.
-//
-//******************************************************************************
-#define UDMA_ALTBASE_ADDR_M   0xFFFFFFFF  // Alternate Channel Address
-                                            // Pointer
-#define UDMA_ALTBASE_ADDR_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_WAITSTAT register.
-//
-//******************************************************************************
-#define UDMA_WAITSTAT_WAITREQ_M \
-                                0xFFFFFFFF  // Channel [n] Wait Status
-
-#define UDMA_WAITSTAT_WAITREQ_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_SWREQ register.
-//
-//******************************************************************************
-#define UDMA_SWREQ_M          0xFFFFFFFF  // Channel [n] Software Request
-#define UDMA_SWREQ_S          0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UDMA_O_USEBURSTSET register.
-//
-//******************************************************************************
-#define UDMA_USEBURSTSET_SET_M \
-                                0xFFFFFFFF  // Channel [n] Useburst Set
-
-#define UDMA_USEBURSTSET_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UDMA_O_USEBURSTCLR register.
-//
-//******************************************************************************
-#define UDMA_USEBURSTCLR_CLR_M \
-                                0xFFFFFFFF  // Channel [n] Useburst Clear
-
-#define UDMA_USEBURSTCLR_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_REQMASKSET register.
-//
-//******************************************************************************
-#define UDMA_REQMASKSET_SET_M 0xFFFFFFFF  // Channel [n] Request Mask Set
-#define UDMA_REQMASKSET_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_REQMASKCLR register.
-//
-//******************************************************************************
-#define UDMA_REQMASKCLR_CLR_M 0xFFFFFFFF  // Channel [n] Request Mask Clear
-#define UDMA_REQMASKCLR_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ENASET register.
-//
-//******************************************************************************
-#define UDMA_ENASET_CHENSET_M 0xFFFFFFFF  // Channel [n] Enable Set
-#define UDMA_ENASET_CHENSET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ENACLR register.
-//
-//******************************************************************************
-#define UDMA_ENACLR_CLR_M     0xFFFFFFFF  // Clear Channel [n] Enable Clear
-#define UDMA_ENACLR_CLR_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ALTSET register.
-//
-//******************************************************************************
-#define UDMA_ALTSET_SET_M     0xFFFFFFFF  // Channel [n] Alternate Set
-#define UDMA_ALTSET_SET_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ALTCLR register.
-//
-//******************************************************************************
-#define UDMA_ALTCLR_CLR_M     0xFFFFFFFF  // Channel [n] Alternate Clear
-#define UDMA_ALTCLR_CLR_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_PRIOSET register.
-//
-//******************************************************************************
-#define UDMA_PRIOSET_SET_M    0xFFFFFFFF  // Channel [n] Priority Set
-#define UDMA_PRIOSET_SET_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_PRIOCLR register.
-//
-//******************************************************************************
-#define UDMA_PRIOCLR_CLR_M    0xFFFFFFFF  // Channel [n] Priority Clear
-#define UDMA_PRIOCLR_CLR_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ERRCLR register.
-//
-//******************************************************************************
-#define UDMA_ERRCLR_ERRCLR      0x00000001  // uDMA Bus Error Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHASGN register.
-//
-//******************************************************************************
-#define UDMA_CHASGN_M         0xFFFFFFFF  // Channel [n] Assignment Select
-#define UDMA_CHASGN_S         0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHIS register.
-//
-//******************************************************************************
-#define UDMA_CHIS_M           0xFFFFFFFF  // Channel [n] Interrupt Status
-#define UDMA_CHIS_S           0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP0 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP0_CH7SEL_M  0xF0000000  // uDMA Channel 7 Source Select
-#define UDMA_CHMAP0_CH7SEL_S  28
-#define UDMA_CHMAP0_CH6SEL_M  0x0F000000  // uDMA Channel 6 Source Select
-#define UDMA_CHMAP0_CH6SEL_S  24
-#define UDMA_CHMAP0_CH5SEL_M  0x00F00000  // uDMA Channel 5 Source Select
-#define UDMA_CHMAP0_CH5SEL_S  20
-#define UDMA_CHMAP0_CH4SEL_M  0x000F0000  // uDMA Channel 4 Source Select
-#define UDMA_CHMAP0_CH4SEL_S  16
-#define UDMA_CHMAP0_CH3SEL_M  0x0000F000  // uDMA Channel 3 Source Select
-#define UDMA_CHMAP0_CH3SEL_S  12
-#define UDMA_CHMAP0_CH2SEL_M  0x00000F00  // uDMA Channel 2 Source Select
-#define UDMA_CHMAP0_CH2SEL_S  8
-#define UDMA_CHMAP0_CH1SEL_M  0x000000F0  // uDMA Channel 1 Source Select
-#define UDMA_CHMAP0_CH1SEL_S  4
-#define UDMA_CHMAP0_CH0SEL_M  0x0000000F  // uDMA Channel 0 Source Select
-#define UDMA_CHMAP0_CH0SEL_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP1 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP1_CH15SEL_M 0xF0000000  // uDMA Channel 15 Source Select
-#define UDMA_CHMAP1_CH15SEL_S 28
-#define UDMA_CHMAP1_CH14SEL_M 0x0F000000  // uDMA Channel 14 Source Select
-#define UDMA_CHMAP1_CH14SEL_S 24
-#define UDMA_CHMAP1_CH13SEL_M 0x00F00000  // uDMA Channel 13 Source Select
-#define UDMA_CHMAP1_CH13SEL_S 20
-#define UDMA_CHMAP1_CH12SEL_M 0x000F0000  // uDMA Channel 12 Source Select
-#define UDMA_CHMAP1_CH12SEL_S 16
-#define UDMA_CHMAP1_CH11SEL_M 0x0000F000  // uDMA Channel 11 Source Select
-#define UDMA_CHMAP1_CH11SEL_S 12
-#define UDMA_CHMAP1_CH10SEL_M 0x00000F00  // uDMA Channel 10 Source Select
-#define UDMA_CHMAP1_CH10SEL_S 8
-#define UDMA_CHMAP1_CH9SEL_M  0x000000F0  // uDMA Channel 9 Source Select
-#define UDMA_CHMAP1_CH9SEL_S  4
-#define UDMA_CHMAP1_CH8SEL_M  0x0000000F  // uDMA Channel 8 Source Select
-#define UDMA_CHMAP1_CH8SEL_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP2 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP2_CH23SEL_M 0xF0000000  // uDMA Channel 23 Source Select
-#define UDMA_CHMAP2_CH23SEL_S 28
-#define UDMA_CHMAP2_CH22SEL_M 0x0F000000  // uDMA Channel 22 Source Select
-#define UDMA_CHMAP2_CH22SEL_S 24
-#define UDMA_CHMAP2_CH21SEL_M 0x00F00000  // uDMA Channel 21 Source Select
-#define UDMA_CHMAP2_CH21SEL_S 20
-#define UDMA_CHMAP2_CH20SEL_M 0x000F0000  // uDMA Channel 20 Source Select
-#define UDMA_CHMAP2_CH20SEL_S 16
-#define UDMA_CHMAP2_CH19SEL_M 0x0000F000  // uDMA Channel 19 Source Select
-#define UDMA_CHMAP2_CH19SEL_S 12
-#define UDMA_CHMAP2_CH18SEL_M 0x00000F00  // uDMA Channel 18 Source Select
-#define UDMA_CHMAP2_CH18SEL_S 8
-#define UDMA_CHMAP2_CH17SEL_M 0x000000F0  // uDMA Channel 17 Source Select
-#define UDMA_CHMAP2_CH17SEL_S 4
-#define UDMA_CHMAP2_CH16SEL_M 0x0000000F  // uDMA Channel 16 Source Select
-#define UDMA_CHMAP2_CH16SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP3 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP3_CH31SEL_M 0xF0000000  // uDMA Channel 31 Source Select
-#define UDMA_CHMAP3_CH31SEL_S 28
-#define UDMA_CHMAP3_CH30SEL_M 0x0F000000  // uDMA Channel 30 Source Select
-#define UDMA_CHMAP3_CH30SEL_S 24
-#define UDMA_CHMAP3_CH29SEL_M 0x00F00000  // uDMA Channel 29 Source Select
-#define UDMA_CHMAP3_CH29SEL_S 20
-#define UDMA_CHMAP3_CH28SEL_M 0x000F0000  // uDMA Channel 28 Source Select
-#define UDMA_CHMAP3_CH28SEL_S 16
-#define UDMA_CHMAP3_CH27SEL_M 0x0000F000  // uDMA Channel 27 Source Select
-#define UDMA_CHMAP3_CH27SEL_S 12
-#define UDMA_CHMAP3_CH26SEL_M 0x00000F00  // uDMA Channel 26 Source Select
-#define UDMA_CHMAP3_CH26SEL_S 8
-#define UDMA_CHMAP3_CH25SEL_M 0x000000F0  // uDMA Channel 25 Source Select
-#define UDMA_CHMAP3_CH25SEL_S 4
-#define UDMA_CHMAP3_CH24SEL_M 0x0000000F  // uDMA Channel 24 Source Select
-#define UDMA_CHMAP3_CH24SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_PV register.
-//
-//******************************************************************************
-#define UDMA_PV_MAJOR_M       0x0000FF00  // Major Revision
-#define UDMA_PV_MAJOR_S       8
-#define UDMA_PV_MINOR_M       0x000000FF  // Minor Revision
-#define UDMA_PV_MINOR_S       0
-
-
-
-#endif // __HW_UDMA_H__
diff --git a/ports/cc3200/hal/inc/hw_wdt.h b/ports/cc3200/hal/inc/hw_wdt.h
deleted file mode 100644
index 00b14acbe3..0000000000
--- a/ports/cc3200/hal/inc/hw_wdt.h
+++ /dev/null
@@ -1,131 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_WDT_H__
-#define __HW_WDT_H__
-
-//*****************************************************************************
-//
-// The following are defines for the WDT register offsets.
-//
-//*****************************************************************************
-#define WDT_O_LOAD              0x00000000
-#define WDT_O_VALUE             0x00000004
-#define WDT_O_CTL               0x00000008
-#define WDT_O_ICR               0x0000000C
-#define WDT_O_RIS               0x00000010
-#define WDT_O_MIS               0x00000014
-#define WDT_O_TEST              0x00000418
-#define WDT_O_LOCK              0x00000C00
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_LOAD register.
-//
-//******************************************************************************
-#define WDT_LOAD_M            0xFFFFFFFF  // Watchdog Load Value
-#define WDT_LOAD_S            0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_VALUE register.
-//
-//******************************************************************************
-#define WDT_VALUE_M           0xFFFFFFFF  // Watchdog Value
-#define WDT_VALUE_S           0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_CTL register.
-//
-//******************************************************************************
-#define WDT_CTL_WRC             0x80000000  // Write Complete
-#define WDT_CTL_INTTYPE         0x00000004  // Watchdog Interrupt Type
-#define WDT_CTL_RESEN           0x00000002  // Watchdog Reset Enable. This bit
-                                            // is not used in cc3xx, WDOG shall
-                                            // always generate RESET to system
-                                            // irrespective of this bit setting.
-#define WDT_CTL_INTEN           0x00000001  // Watchdog Interrupt Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_ICR register.
-//
-//******************************************************************************
-#define WDT_ICR_M             0xFFFFFFFF  // Watchdog Interrupt Clear
-#define WDT_ICR_S             0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_RIS register.
-//
-//******************************************************************************
-#define WDT_RIS_WDTRIS          0x00000001  // Watchdog Raw Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_MIS register.
-//
-//******************************************************************************
-#define WDT_MIS_WDTMIS          0x00000001  // Watchdog Masked Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_TEST register.
-//
-//******************************************************************************
-#define WDT_TEST_STALL_EN_M     0x00000C00  // Watchdog stall enable
-#define WDT_TEST_STALL_EN_S     10
-#define WDT_TEST_STALL          0x00000100  // Watchdog Stall Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_LOCK register.
-//
-//******************************************************************************
-#define WDT_LOCK_M            0xFFFFFFFF  // Watchdog Lock
-#define WDT_LOCK_S            0
-#define WDT_LOCK_UNLOCKED     0x00000000  // Unlocked
-#define WDT_LOCK_LOCKED       0x00000001  // Locked
-#define WDT_LOCK_UNLOCK       0x1ACCE551  // Unlocks the watchdog timer
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the WDT_ISR, WDT_RIS, and
-// WDT_MIS registers.
-//
-//*****************************************************************************
-#define WDT_INT_TIMEOUT         0x00000001  // Watchdog timer expired
-
-
-
-
-
-#endif // __HW_WDT_H__
diff --git a/ports/cc3200/hal/interrupt.c b/ports/cc3200/hal/interrupt.c
deleted file mode 100644
index 897ad966ae..0000000000
--- a/ports/cc3200/hal/interrupt.c
+++ /dev/null
@@ -1,769 +0,0 @@
-//*****************************************************************************
-//
-//  interrupt.c
-//
-//  Driver for the NVIC Interrupt Controller.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup interrupt_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_types.h"
-#include "cpu.h"
-#include "debug.h"
-#include "interrupt.h"
-
-//*****************************************************************************
-//
-// This is a mapping between priority grouping encodings and the number of
-// preemption priority bits.
-//
-//*****************************************************************************
-static const unsigned long g_pulPriority[] =
-{
-    NVIC_APINT_PRIGROUP_0_8, NVIC_APINT_PRIGROUP_1_7, NVIC_APINT_PRIGROUP_2_6,
-    NVIC_APINT_PRIGROUP_3_5, NVIC_APINT_PRIGROUP_4_4, NVIC_APINT_PRIGROUP_5_3,
-    NVIC_APINT_PRIGROUP_6_2, NVIC_APINT_PRIGROUP_7_1
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number and the register that contains
-// the priority encoding for that interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulRegs[] =
-{
-    0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, NVIC_PRI0, NVIC_PRI1,
-    NVIC_PRI2, NVIC_PRI3, NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7,
-    NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, NVIC_PRI12, NVIC_PRI13,
-    NVIC_PRI14, NVIC_PRI15, NVIC_PRI16, NVIC_PRI17, NVIC_PRI18, NVIC_PRI19,
-    NVIC_PRI20, NVIC_PRI21, NVIC_PRI22, NVIC_PRI23, NVIC_PRI24, NVIC_PRI25,
-    NVIC_PRI26, NVIC_PRI27, NVIC_PRI28, NVIC_PRI29, NVIC_PRI30, NVIC_PRI31,
-    NVIC_PRI32, NVIC_PRI33, NVIC_PRI34, NVIC_PRI35, NVIC_PRI36, NVIC_PRI37,
-    NVIC_PRI38, NVIC_PRI39, NVIC_PRI40, NVIC_PRI41, NVIC_PRI42, NVIC_PRI43,
-    NVIC_PRI44, NVIC_PRI45, NVIC_PRI46, NVIC_PRI47, NVIC_PRI48
-
-};
-
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt enable for that
-// interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulEnRegs[] =
-{
-    NVIC_EN0, NVIC_EN1, NVIC_EN2, NVIC_EN3, NVIC_EN4, NVIC_EN5
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt disable for that
-// interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulDisRegs[] =
-{
-    NVIC_DIS0, NVIC_DIS1, NVIC_DIS2, NVIC_DIS3, NVIC_DIS4, NVIC_DIS5
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt pend for that interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulPendRegs[] =
-{
-    NVIC_PEND0, NVIC_PEND1, NVIC_PEND2, NVIC_PEND3, NVIC_PEND4, NVIC_PEND5
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt unpend for that
-// interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulUnpendRegs[] =
-{
-    NVIC_UNPEND0, NVIC_UNPEND1, NVIC_UNPEND2, NVIC_UNPEND3, NVIC_UNPEND4,
-    NVIC_UNPEND5
-};
-
-
-//*****************************************************************************
-//
-//! \internal
-//! The default interrupt handler.
-//!
-//! This is the default interrupt handler for all interrupts.  It simply loops
-//! forever so that the system state is preserved for observation by a
-//! debugger.  Since interrupts should be disabled before unregistering the
-//! corresponding handler, this should never be called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-static void
-IntDefaultHandler(void)
-{
-    //
-    // Go into an infinite loop.
-    //
-    while(1)
-    {
-    }
-}
-
-//*****************************************************************************
-//
-//! Enables the processor interrupt.
-//!
-//! Allows the processor to respond to interrupts.  This does not affect the
-//! set of interrupts enabled in the interrupt controller; it just gates the
-//! single interrupt from the controller to the processor.
-//!
-//! \note Previously, this function had no return value.  As such, it was
-//! possible to include interrupt.h and call this function without
-//! having included hw_types.h.  Now that the return is a
-//! tBoolean, a compiler error will occur in this case.  The solution
-//! is to include hw_types.h before including interrupt.h.
-//!
-//! \return Returns \b true if interrupts were disabled when the function was
-//! called or \b false if they were initially enabled.
-//
-//*****************************************************************************
-tBoolean
-IntMasterEnable(void)
-{
-    //
-    // Enable processor interrupts.
-    //
-    return(CPUcpsie());
-}
-
-//*****************************************************************************
-//
-//! Disables the processor interrupt.
-//!
-//! Prevents the processor from receiving interrupts.  This does not affect the
-//! set of interrupts enabled in the interrupt controller; it just gates the
-//! single interrupt from the controller to the processor.
-//!
-//! \note Previously, this function had no return value.  As such, it was
-//! possible to include interrupt.h and call this function without
-//! having included hw_types.h.  Now that the return is a
-//! tBoolean, a compiler error will occur in this case.  The solution
-//! is to include hw_types.h before including interrupt.h.
-//!
-//! \return Returns \b true if interrupts were already disabled when the
-//! function was called or \b false if they were initially enabled.
-//
-//*****************************************************************************
-tBoolean
-IntMasterDisable(void)
-{
-    //
-    // Disable processor interrupts.
-    //
-    return(CPUcpsid());
-}
-//*****************************************************************************
-//
-//! Sets the NVIC VTable base.
-//!
-//! \param ulVtableBase specifies the new base address of VTable
-//!
-//! This function is used to specify a new base address for the VTable.
-//! This function must be called before using IntRegister() for registering
-//! any interrupt handler.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntVTableBaseSet(unsigned long ulVtableBase)
-{
-    HWREG(NVIC_VTABLE) = ulVtableBase;
-}
-
-//*****************************************************************************
-//
-//! Registers a function to be called when an interrupt occurs.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//! \param pfnHandler is a pointer to the function to be called.
-//!
-//! This function is used to specify the handler function to be called when the
-//! given interrupt is asserted to the processor.  When the interrupt occurs,
-//! if it is enabled (via IntEnable()), the handler function will be called in
-//! interrupt context.  Since the handler function can preempt other code, care
-//! must be taken to protect memory or peripherals that are accessed by the
-//! handler and other non-handler code.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void))
-{
-    unsigned long *ulNvicTbl;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    ulNvicTbl = (unsigned long *)HWREG(NVIC_VTABLE);
-    ulNvicTbl[ulInterrupt]= (unsigned long)pfnHandler;
-}
-
-//*****************************************************************************
-//
-//! Unregisters the function to be called when an interrupt occurs.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//!
-//! This function is used to indicate that no handler should be called when the
-//! given interrupt is asserted to the processor.  The interrupt source will be
-//! automatically disabled (via IntDisable()) if necessary.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntUnregister(unsigned long ulInterrupt)
-{
-  unsigned long *ulNvicTbl;
-
-  //
-  // Check the arguments.
-  //
-  ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-  ulNvicTbl = (unsigned long *)HWREG(NVIC_VTABLE);
-  ulNvicTbl[ulInterrupt]= (unsigned long)IntDefaultHandler;
-}
-
-//*****************************************************************************
-//
-//! Sets the priority grouping of the interrupt controller.
-//!
-//! \param ulBits specifies the number of bits of preemptable priority.
-//!
-//! This function specifies the split between preemptable priority levels and
-//! subpriority levels in the interrupt priority specification.  The range of
-//! the grouping values are dependent upon the hardware implementation; on
-//! the CC3200 , three bits are available for hardware interrupt
-//! prioritization and therefore priority grouping values of three through
-//! seven have the same effect.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPriorityGroupingSet(unsigned long ulBits)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulBits < NUM_PRIORITY);
-
-    //
-    // Set the priority grouping.
-    //
-    HWREG(NVIC_APINT) = NVIC_APINT_VECTKEY | g_pulPriority[ulBits];
-}
-
-//*****************************************************************************
-//
-//! Gets the priority grouping of the interrupt controller.
-//!
-//! This function returns the split between preemptable priority levels and
-//! subpriority levels in the interrupt priority specification.
-//!
-//! \return The number of bits of preemptable priority.
-//
-//*****************************************************************************
-unsigned long
-IntPriorityGroupingGet(void)
-{
-    unsigned long ulLoop, ulValue;
-
-    //
-    // Read the priority grouping.
-    //
-    ulValue = HWREG(NVIC_APINT) & NVIC_APINT_PRIGROUP_M;
-
-    //
-    // Loop through the priority grouping values.
-    //
-    for(ulLoop = 0; ulLoop < NUM_PRIORITY; ulLoop++)
-    {
-        //
-        // Stop looping if this value matches.
-        //
-        if(ulValue == g_pulPriority[ulLoop])
-        {
-            break;
-        }
-    }
-
-    //
-    // Return the number of priority bits.
-    //
-    return(ulLoop);
-}
-
-//*****************************************************************************
-//
-//! Sets the priority of an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//! \param ucPriority specifies the priority of the interrupt.
-//!
-//! This function is used to set the priority of an interrupt.  When multiple
-//! interrupts are asserted simultaneously, the ones with the highest priority
-//! are processed before the lower priority interrupts.  Smaller numbers
-//! correspond to higher interrupt priorities; priority 0 is the highest
-//! interrupt priority.
-//!
-//! The hardware priority mechanism will only look at the upper N bits of the
-//! priority level (where N is 3), so any prioritization must be performed in
-//! those bits.  The remaining bits can be used to sub-prioritize the interrupt
-//! sources, and may be used by the hardware priority mechanism on a future
-//! part.  This arrangement allows priorities to migrate to different NVIC
-//! implementations without changing the gross prioritization of the
-//! interrupts.
-//!
-//! The parameter \e ucPriority can be any one of the following
-//! -\b INT_PRIORITY_LVL_0
-//! -\b INT_PRIORITY_LVL_1
-//! -\b INT_PRIORITY_LVL_2
-//! -\b INT_PRIORITY_LVL_3
-//! -\b INT_PRIORITY_LVL_4
-//! -\b INT_PRIORITY_LVL_5
-//! -\b INT_PRIORITY_LVL_6
-//! -\b INT_PRIORITY_LVL_7
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPrioritySet(unsigned long ulInterrupt, unsigned char ucPriority)
-{
-    unsigned long ulTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
-
-    //
-    // Set the interrupt priority.
-    //
-    ulTemp = HWREG(g_pulRegs[ulInterrupt >> 2]);
-    ulTemp &= ~(0xFF << (8 * (ulInterrupt & 3)));
-    ulTemp |= ucPriority << (8 * (ulInterrupt & 3));
-    HWREG(g_pulRegs[ulInterrupt >> 2]) = ulTemp;
-}
-
-//*****************************************************************************
-//
-//! Gets the priority of an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//!
-//! This function gets the priority of an interrupt.  See IntPrioritySet() for
-//! a definition of the priority value.
-//!
-//! \return Returns the interrupt priority, or -1 if an invalid interrupt was
-//! specified.
-//
-//*****************************************************************************
-long
-IntPriorityGet(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
-
-    //
-    // Return the interrupt priority.
-    //
-    return((HWREG(g_pulRegs[ulInterrupt >> 2]) >> (8 * (ulInterrupt & 3))) &
-           0xFF);
-}
-
-//*****************************************************************************
-//
-//! Enables an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be enabled.
-//!
-//! The specified interrupt is enabled in the interrupt controller.  Other
-//! enables for the interrupt (such as at the peripheral level) are unaffected
-//! by this function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntEnable(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to enable.
-    //
-    if(ulInterrupt == FAULT_MPU)
-    {
-        //
-        // Enable the MemManage interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_MEM;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_BUS)
-    {
-        //
-        // Enable the bus fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_BUS;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_USAGE)
-    {
-        //
-        // Enable the usage fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_USAGE;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Enable the System Tick interrupt.
-        //
-        HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Enable the general interrupt.
-        //
-        HWREG(g_pulEnRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-}
-
-//*****************************************************************************
-//
-//! Disables an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be disabled.
-//!
-//! The specified interrupt is disabled in the interrupt controller.  Other
-//! enables for the interrupt (such as at the peripheral level) are unaffected
-//! by this function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntDisable(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to disable.
-    //
-    if(ulInterrupt == FAULT_MPU)
-    {
-        //
-        // Disable the MemManage interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_MEM);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_BUS)
-    {
-        //
-        // Disable the bus fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_BUS);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_USAGE)
-    {
-        //
-        // Disable the usage fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_USAGE);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Disable the System Tick interrupt.
-        //
-        HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Disable the general interrupt.
-        //
-        HWREG(g_pulDisRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-
-}
-
-//*****************************************************************************
-//
-//! Pends an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be pended.
-//!
-//! The specified interrupt is pended in the interrupt controller.  This will
-//! cause the interrupt controller to execute the corresponding interrupt
-//! handler at the next available time, based on the current interrupt state
-//! priorities.  For example, if called by a higher priority interrupt handler,
-//! the specified interrupt handler will not be called until after the current
-//! interrupt handler has completed execution.  The interrupt must have been
-//! enabled for it to be called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPendSet(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to pend.
-    //
-    if(ulInterrupt == FAULT_NMI)
-    {
-        //
-        // Pend the NMI interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_NMI_SET;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_PENDSV)
-    {
-        //
-        // Pend the PendSV interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PEND_SV;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Pend the SysTick interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTSET;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Pend the general interrupt.
-        //
-        HWREG(g_pulPendRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-
-}
-
-//*****************************************************************************
-//
-//! Unpends an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be unpended.
-//!
-//! The specified interrupt is unpended in the interrupt controller.  This will
-//! cause any previously generated interrupts that have not been handled yet
-//! (due to higher priority interrupts or the interrupt no having been enabled
-//! yet) to be discarded.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPendClear(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to unpend.
-    //
-    if(ulInterrupt == FAULT_PENDSV)
-    {
-        //
-        // Unpend the PendSV interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_UNPEND_SV;
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Unpend the SysTick interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTCLR;
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Unpend the general interrupt.
-        //
-        HWREG(g_pulUnpendRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-    }
-}
-
-//*****************************************************************************
-//
-//! Sets the priority masking level
-//!
-//! \param ulPriorityMask is the priority level that will be masked.
-//!
-//! This function sets the interrupt priority masking level so that all
-//! interrupts at the specified or lesser priority level is masked.  This
-//! can be used to globally disable a set of interrupts with priority below
-//! a predetermined threshold.  A value of 0 disables priority
-//! masking.
-//!
-//! Smaller numbers correspond to higher interrupt priorities.  So for example
-//! a priority level mask of 4 will allow interrupts of priority level 0-3,
-//! and interrupts with a numerical priority of 4 and greater will be blocked.
-//!
-//! The hardware priority mechanism will only look at the upper N bits of the
-//! priority level (where N is 3), so any
-//! prioritization must be performed in those bits.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPriorityMaskSet(unsigned long ulPriorityMask)
-{
-    CPUbasepriSet(ulPriorityMask);
-}
-
-//*****************************************************************************
-//
-//! Gets the priority masking level
-//!
-//! This function gets the current setting of the interrupt priority masking
-//! level.  The value returned is the priority level such that all interrupts
-//! of that and lesser priority are masked.  A value of 0 means that priority
-//! masking is disabled.
-//!
-//! Smaller numbers correspond to higher interrupt priorities.  So for example
-//! a priority level mask of 4 will allow interrupts of priority level 0-3,
-//! and interrupts with a numerical priority of 4 and greater will be blocked.
-//!
-//! The hardware priority mechanism will only look at the upper N bits of the
-//! priority level (where N is 3), so any
-//! prioritization must be performed in those bits.
-//!
-//! \return Returns the value of the interrupt priority level mask.
-//
-//*****************************************************************************
-unsigned long
-IntPriorityMaskGet(void)
-{
-    return(CPUbasepriGet());
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/interrupt.h b/ports/cc3200/hal/interrupt.h
deleted file mode 100644
index 941a60f5fe..0000000000
--- a/ports/cc3200/hal/interrupt.h
+++ /dev/null
@@ -1,120 +0,0 @@
-//*****************************************************************************
-//
-//  interrupt.h
-//
-//  Prototypes for the NVIC Interrupt Controller Driver.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __INTERRUPT_H__
-#define __INTERRUPT_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// A union that describes the entries of the vector table.  The union is needed
-// since the first entry is the stack pointer and the remainder are function
-// pointers.
-//
-//*****************************************************************************
-typedef union
-{
-    void (*pfnHandler)(void);
-    unsigned long ulPtr;
-}
-uVectorEntry;
-
-
-//*****************************************************************************
-//
-// Macro to generate an interrupt priority mask based on the number of bits
-// of priority supported by the hardware.
-//
-//*****************************************************************************
-#define INT_PRIORITY_MASK       ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF)
-
-//*****************************************************************************
-// Interrupt priority levels
-//*****************************************************************************
-#define INT_PRIORITY_LVL_0      0x00
-#define INT_PRIORITY_LVL_1      0x20
-#define INT_PRIORITY_LVL_2      0x40
-#define INT_PRIORITY_LVL_3      0x60
-#define INT_PRIORITY_LVL_4      0x80
-#define INT_PRIORITY_LVL_5      0xA0
-#define INT_PRIORITY_LVL_6      0xC0
-#define INT_PRIORITY_LVL_7      0xE0
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern tBoolean IntMasterEnable(void);
-extern tBoolean IntMasterDisable(void);
-extern void IntVTableBaseSet(unsigned long ulVtableBase);
-extern void IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void));
-extern void IntUnregister(unsigned long ulInterrupt);
-extern void IntPriorityGroupingSet(unsigned long ulBits);
-extern unsigned long IntPriorityGroupingGet(void);
-extern void IntPrioritySet(unsigned long ulInterrupt,
-                           unsigned char ucPriority);
-extern long IntPriorityGet(unsigned long ulInterrupt);
-extern void IntEnable(unsigned long ulInterrupt);
-extern void IntDisable(unsigned long ulInterrupt);
-extern void IntPendSet(unsigned long ulInterrupt);
-extern void IntPendClear(unsigned long ulInterrupt);
-extern void IntPriorityMaskSet(unsigned long ulPriorityMask);
-extern unsigned long IntPriorityMaskGet(void);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __INTERRUPT_H__
diff --git a/ports/cc3200/hal/pin.c b/ports/cc3200/hal/pin.c
deleted file mode 100644
index 4130a43f05..0000000000
--- a/ports/cc3200/hal/pin.c
+++ /dev/null
@@ -1,658 +0,0 @@
-//*****************************************************************************
-//
-//  pin.c
-//
-//  Mapping of peripherals to pins.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup pin_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_ocp_shared.h"
-#include "pin.h"
-
-//*****************************************************************************
-// PIN to PAD matrix
-//*****************************************************************************
-static const unsigned long g_ulPinToPadMap[64] =
-{
-	10,11,12,13,14,15,16,17,255,255,18,
-	19,20,21,22,23,24,40,28,29,25,255,
-	255,255,255,255,255,255,255,255,255,255,255,
-	255,255,255,255,255,255,255,255,255,255,255,
-	31,255,255,255,255,0,255,32,30,255,1,
-	255,2,3,4,5,6,7,8,9
-};
-
-
-//*****************************************************************************
-//
-//! Configures pin mux for the specified pin.
-//!
-//! \param ulPin is a valid pin.
-//! \param ulPinMode is one of the valid mode
-//!
-//! This function configures the pin mux that selects the peripheral function
-//! associated with a particular SOC pin. Only one peripheral function at a
-//! time can be associated with a pin, and each peripheral function should
-//! only be associated with a single pin at a time.
-//!
-//! \return none
-//
-//*****************************************************************************
-void PinModeSet(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-  //
-  // Set the mode.
-  //
-  HWREG(ulPad) = (((HWREG(ulPad) & ~PAD_MODE_MASK) |  ulPinMode) & ~(3<<10));
-
-}
-
-//*****************************************************************************
-//
-//! Gets current pin mux configuration of specified pin.
-//!
-//! \param ulPin is a valid pin.
-//!
-//! This function get the current configuration of the pin mux.
-//!
-//! \return Returns current pin mode if \e ulPin is valid, 0xFF otherwise.
-//
-//*****************************************************************************
-unsigned long PinModeGet(unsigned long ulPin)
-{
-
-  unsigned long ulPad;
-
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE) ;
-
-  //
-  // return the mode.
-  //
-  return (HWREG(ulPad) & PAD_MODE_MASK);
-
-}
-
-//*****************************************************************************
-//
-//! Sets the direction of the specified pin(s).
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinIO is the pin direction and/or mode.
-//!
-//! This function configures the specified pin(s) as either input only or
-//! output only or it configures the pin to be under hardware control.
-//!
-//! The parameter \e ulPinIO is an enumerated data type that can be one of
-//! the following values:
-//!
-//! - \b PIN_DIR_MODE_IN
-//! - \b PIN_DIR_MODE_OUT
-//! - \b PIN_DIR_MODE_HW
-//!
-//! where \b PIN_DIR_MODE_IN specifies that the pin is programmed as a
-//! input only, \b PIN_DIR_MODE_OUT specifies that the pin is
-//! programmed output only, and \b PIN_DIR_MODE_HW specifies that the pin is
-//! placed under hardware control.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinDirModeSet(unsigned long ulPin, unsigned long ulPinIO)
-{
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-  //
-  // Set the direction
-  //
-  HWREG(ulPad) = ((HWREG(ulPad) & ~0xC00) | ulPinIO);
-}
-
-//*****************************************************************************
-//
-//! Gets the direction of a pin.
-//!
-//! \param ulPin is one of the valid pin.
-//!
-//! This function gets the direction and control mode for a specified pin on
-//! the selected GPIO port.  The pin can be configured as either an input only
-//! or output only, or it can be under hardware control.  The type of control
-//! and direction are returned as an enumerated data type.
-//!
-//! \return Returns one of the enumerated data types described for
-//! GPIODirModeSet().
-//
-//*****************************************************************************
-unsigned long PinDirModeGet(unsigned long ulPin)
-{
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-  //
-  // Return the direction
-  //
-  return ((HWREG(ulPad) & 0xC00));
-}
-
-//*****************************************************************************
-//
-//! Gets Pin output drive strength and Type
-//!
-//! \param ulPin is one of the valid pin
-//! \param pulPinStrength is pointer to storage for output drive strength
-//! \param pulPinType is pinter to storage for pin type
-//!
-//! This function gets the pin type and output drive strength for the pin
-//! specified by \e ulPin parameter. Parameters \e pulPinStrength and
-//! \e pulPinType corresponds to the values used in PinConfigSet().
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinConfigGet(unsigned long ulPin,unsigned long  *pulPinStrength,
-	       					unsigned long *pulPinType)
-{
-
-  unsigned long ulPad;
-
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-
-  //
-  // Get the type
-  //
-  *pulPinType = (HWREG(ulPad) & PAD_TYPE_MASK);
-
-  //
-  // Get the output drive strength
-  //
-  *pulPinStrength = (HWREG(ulPad) & PAD_STRENGTH_MASK);
-
-}
-
-//*****************************************************************************
-//
-//! Configure Pin output drive strength and Type
-//!
-//! \param ulPin is one of the valid pin
-//! \param ulPinStrength is logical OR of valid output drive strengths.
-//! \param ulPinType is one of the valid pin type.
-//!
-//!  This function sets the pin type and strength for the pin specified by
-//! \e ulPin parameter.
-//!
-//! The parameter \e ulPinStrength should be one of the following
-//! - \b PIN_STRENGTH_2MA
-//! - \b PIN_STRENGTH_4MA
-//! - \b PIN_STRENGTH_6MA
-//!
-//!
-//! The parameter \e ulPinType should be one of the following
-//! For standard type
-//!
-//! - \b PIN_TYPE_STD
-//! - \b PIN_TYPE_STD_PU
-//! - \b PIN_TYPE_STD_PD
-//!
-//! And for Open drain type
-//!
-//! - \b PIN_TYPE_OD
-//! - \b PIN_TYPE_OD_PU
-//! - \b PIN_TYPE_OD_PD
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinConfigSet(unsigned long ulPin,unsigned long  ulPinStrength,
-						unsigned long ulPinType)
-{
-
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Write the register
-  //
-  if(ulPinType == PIN_TYPE_ANALOG)
-  {
-    //
-    // Isolate the input
-    //
-    HWREG(0x4402E144) |= ((0x80 << ulPad) & (0x1E << 8));
-
-    //
-    // Calculate the register address
-    //
-    ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-    //
-    // Isolate the output
-    //
-    HWREG(ulPad) = 0xC00;
-
-  }
-  else
-  {
-    //
-    // Enable the input
-    //
-    HWREG(0x4402E144) &= ~((0x80 << ulPad) & (0x1E << 8));
-
-    //
-    // Calculate the register address
-    //
-    ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-    //
-    // Write the configuration
-    //
-    HWREG(ulPad) = ((HWREG(ulPad) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) |
-		  		(ulPinStrength | ulPinType ));
-  }
-
-
-}
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by UART peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The UART pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin(s); other configurations may work as well depending upon the
-//! board setup (for example, using the on-chip pull-ups).
-//!
-//!
-//! \note This function cannot be used to turn any pin into a UART pin; it
-//! only sets the pin mode and configures it for proper UART operation.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeUART(unsigned long ulPin,unsigned long ulPinMode)
-{
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_STD);
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by I2C peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The I2C pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! the pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a I2C pin; it
-//! only sets the pin mode and configures it for proper I2C operation.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeI2C(unsigned long ulPin,unsigned long ulPinMode)
-{
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for open-drain operation with a weak pull-up.
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_OD_PU);
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by SPI peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The SPI pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a SPI pin; it
-//! only sets the pin mode and configures it for proper SPI operation.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeSPI(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by I2S peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The I2S pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a I2S pin; it
-//! only sets the pin mode and configures it for proper I2S operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeI2S(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by Timer peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The timer PWM pins must be properly configured for the Timer peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin; other configurations may work as well depending upon the
-//! board setup (for example, using the on-chip pull-ups).
-//!
-//!
-//! \note This function cannot be used to turn any pin into a timer PWM pin; it
-//! only sets the pin mode and configures it for proper timer PWM operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeTimer(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by Camera peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The Camera pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a Camera pin; it
-//! only sets the pin mode and configures it for proper Camera operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeCamera(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by GPIO peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//! \param bOpenDrain is one to decide either OpenDrain or STD
-//!
-//! The GPIO pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeGPIO(unsigned long ulPin,unsigned long ulPinMode,tBoolean bOpenDrain)
-{
-
-    //
-    // Set the pin for standard push-pull operation.
-    //
-    if(bOpenDrain)
-    {
-            PinConfigSet(ulPin, PIN_STRENGTH_2MA, PIN_TYPE_OD);
-    }
-    else
-    {
-            PinConfigSet(ulPin, PIN_STRENGTH_2MA, PIN_TYPE_STD);
-    }
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin, ulPinMode);
-
-}
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by ADC
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The ADC pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a ADC pin; it
-//! only sets the pin mode and configures it for proper ADC operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeADC(unsigned long ulPin,unsigned long ulPinMode)
-{
-  //
-  // Configure the Pin
-  //
-  PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_ANALOG);
-}
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by SD Host peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The MMC pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a SD Host pin; it
-//! only sets the pin mode and configures it for proper SD Host operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeSDHost(unsigned long ulPin,unsigned long ulPinMode)
-{
-  //
-  // Set pin mode
-  //
-  PinModeSet(ulPin,ulPinMode);
-
-  //
-  // Configure the Pin
-  //
-  PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_STD);
-
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/pin.h b/ports/cc3200/hal/pin.h
deleted file mode 100644
index 784e9f4635..0000000000
--- a/ports/cc3200/hal/pin.h
+++ /dev/null
@@ -1,183 +0,0 @@
-//*****************************************************************************
-//
-//  pin.h
-//
-//  Defines and Macros for the pin mux module
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __PIN_H__
-#define __PIN_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-// Macros Defining Pins
-//*****************************************************************************
-
-#define PIN_01 	 0x00000000
-#define PIN_02 	 0x00000001
-#define PIN_03   0x00000002
-#define PIN_04 	 0x00000003
-#define PIN_05   0x00000004
-#define PIN_06   0x00000005
-#define PIN_07   0x00000006
-#define PIN_08   0x00000007
-#define PIN_11   0x0000000A
-#define PIN_12   0x0000000B
-#define PIN_13   0x0000000C
-#define PIN_14   0x0000000D
-#define PIN_15   0x0000000E
-#define PIN_16   0x0000000F
-#define PIN_17   0x00000010
-#define PIN_18   0x00000011
-#define PIN_19 	 0x00000012
-#define PIN_20   0x00000013
-#define PIN_21   0x00000014
-#define PIN_45   0x0000002C
-#define PIN_46   0x0000002D
-#define PIN_47   0x0000002E
-#define PIN_48   0x0000002F
-#define PIN_49   0x00000030
-#define PIN_50   0x00000031
-#define PIN_52   0x00000033
-#define PIN_53   0x00000034
-#define PIN_55   0x00000036
-#define PIN_56   0x00000037
-#define PIN_57   0x00000038
-#define PIN_58   0x00000039
-#define PIN_59   0x0000003A
-#define PIN_60   0x0000003B
-#define PIN_61	 0x0000003C
-#define PIN_62	 0x0000003D
-#define PIN_63	 0x0000003E
-#define PIN_64	 0x0000003F
-
-
-
-//*****************************************************************************
-// Macros that can be used with PinConfigSet(), PinTypeGet(), PinStrengthGet()
-//*****************************************************************************
-
-#define PIN_MODE_0	 0x00000000
-#define PIN_MODE_1	 0x00000001
-#define PIN_MODE_2	 0x00000002
-#define PIN_MODE_3	 0x00000003
-#define PIN_MODE_4	 0x00000004
-#define PIN_MODE_5	 0x00000005
-#define PIN_MODE_6	 0x00000006
-#define PIN_MODE_7	 0x00000007
-#define PIN_MODE_8	 0x00000008
-#define PIN_MODE_9	 0x00000009
-#define PIN_MODE_10	 0x0000000A
-#define PIN_MODE_11	 0x0000000B
-#define PIN_MODE_12	 0x0000000C
-#define PIN_MODE_13	 0x0000000D
-#define PIN_MODE_14	 0x0000000E
-#define PIN_MODE_15	 0x0000000F
-// Note : PIN_MODE_255 is a dummy define for pinmux utility code generation
-// PIN_MODE_255 should never be used in any user code.  
-#define PIN_MODE_255 0x000000FF  
-
-//*****************************************************************************
-// Macros that can be used with PinDirModeSet() and returned from
-// PinDirModeGet().
-//*****************************************************************************
-#define PIN_DIR_MODE_IN  0x00000C00 // Pin is input
-#define PIN_DIR_MODE_OUT 0x00000800 // Pin is output
-#define PIN_DIR_MODE_HW  0x00000000 // Pin is peripheral function
-
-//*****************************************************************************
-// Macros that can be used with PinConfigSet()
-//*****************************************************************************
-#define PIN_STRENGTH_2MA  0x00000020
-#define PIN_STRENGTH_4MA  0x00000040
-#define PIN_STRENGTH_6MA  0x00000060
-
-#define PIN_TYPE_STD      0x00000000
-#define PIN_TYPE_STD_PU   0x00000100
-#define PIN_TYPE_STD_PD   0x00000200
-
-#define PIN_TYPE_OD       0x00000010
-#define PIN_TYPE_OD_PU    0x00000110
-#define PIN_TYPE_OD_PD    0x00000210
-#define PIN_TYPE_ANALOG   0x10000000
-
-//*****************************************************************************
-// Macros for mode and type
-//*****************************************************************************
-#define PAD_MODE_MASK       0x0000000F
-#define PAD_STRENGTH_MASK   0x000000E0
-#define PAD_TYPE_MASK       0x00000310
-#define PAD_CONFIG_BASE     ((OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_0))
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void PinModeSet(unsigned long ulPin, unsigned long ulPinMode);
-extern void PinDirModeSet(unsigned long ulPin, unsigned long ulPinIO);
-extern unsigned long PinDirModeGet(unsigned long ulPin);
-extern unsigned long PinModeGet(unsigned long ulPin);
-extern void PinConfigGet(unsigned long ulPin,unsigned long  *pulPinStrength,
-	       					unsigned long *pulPinType);
-extern void PinConfigSet(unsigned long ulPin,unsigned long  ulPinStrength,
-						unsigned long ulPinType);
-extern void PinTypeUART(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeI2C(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeSPI(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeI2S(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeTimer(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeCamera(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeGPIO(unsigned long ulPin,unsigned long ulPinMode,
-                        tBoolean bOpenDrain);
-extern void PinTypeADC(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeSDHost(unsigned long ulPin,unsigned long ulPinMode);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif //__PIN_H__
diff --git a/ports/cc3200/hal/prcm.c b/ports/cc3200/hal/prcm.c
deleted file mode 100644
index 4b66c0ff1e..0000000000
--- a/ports/cc3200/hal/prcm.c
+++ /dev/null
@@ -1,1953 +0,0 @@
-//*****************************************************************************
-//
-//  prcm.c
-//
-//  Driver for the Power, Reset and Clock Module (PRCM)
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup PRCM_Power_Reset_Clock_Module_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_apps_rcm.h"
-#include "inc/hw_gprcm.h"
-#include "inc/hw_hib1p2.h"
-#include "inc/hw_hib3p3.h"
-#include "prcm.h"
-#include "interrupt.h"
-#include "cpu.h"
-#include "utils.h"
-#include "rom_map.h"
-
-
-//*****************************************************************************
-// Macro definition
-//*****************************************************************************
-#define PRCM_SOFT_RESET           0x00000001
-#define PRCM_ENABLE_STATUS        0x00000002
-#define SYS_CLK                   80000000
-#define XTAL_CLK                  40000000
-
-
-//*****************************************************************************
-//    CC3200 does not have a true RTC capability. However, API(s) in this file
-//    provide an effective mechanism to support RTC feature in the device.
-//
-//    The implementation to support RTC has been kept very simple. A set of
-//    HIB Memory Registers in conjunction with Slow Clock Counter are used
-//    to render RTC information to users. Core principle of design involves
-//    two steps (a) establish an association between user provided wall-clock
-//    and slow clock counter. (b) store reference value of this associattion
-//    in HIB Registers. This reference value and SCC value are then combined
-//    to create real-world calendar time.
-//
-//    Across HIB cycles, value stored in HIB Registers is retained and slow
-//    clock counter continues to tick, thereby, this arragement is relevant
-//    and valid as long as device has a (tickle) battery power.
-//
-//    Further, provision also has been made to set an alarm. When it RTC value
-//    matches that of set for alarm, an interrupt is generated.
-//
-//    HIB MEM REG0 and REG1 are reserved for TI.
-//
-//    If RTC feature is not used, then HIB REG2 & REG3 are available to user.
-//
-//    Lower half of REG0 is used for TI HW ECO.
-//*****************************************************************************
-#define RTC_U64MSEC_MK(u32Secs, u16Msec) (((unsigned long long)u32Secs << 10)|\
-                                          (u16Msec & 0x3FF))
-
-#define RTC_SECS_IN_U64MSEC(u64Msec)     ((unsigned long)(u64Msec  >>   10))
-#define RTC_MSEC_IN_U64MSEC(u64Msec)     ((unsigned short)(u64Msec & 0x3FF))
-
-#define RTC_MSEC_U32_REG_ADDR            (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG2)
-#define RTC_SECS_U32_REG_ADDR            (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG3)
-
-//*****************************************************************************
-// Register Access and Updates
-//
-// Tick of SCC has a resolution of 32768Hz, meaning 1 sec is equal to 32768
-// clock ticks. Ideal way of getting time in millisecond will involve floating
-// point arithmetic (division by 32.768). To avoid this, we simply divide it by
-// 32, which will give a range from 0 -1023(instead of 0-999). To use this
-// output correctly we have to take care of this inaccuracy externally.
-// following wrapper can be used to convert the value from cycles to
-// millisecond:
-//
-// CYCLES_U16MS(cycles) ((cycles * 1000) / 1024),
-//
-// Similarly, before setting the value, it must be first converted (from ms to
-// cycles).
-//
-// U16MS_CYCLES(msec)   ((msec * 1024) / 1000)
-//
-// Note: There is a precision loss of 1 ms with the above scheme.
-//
-//
-#define SCC_U64MSEC_GET()                (RTCFastDomainCounterGet() >> 5)
-#define SCC_U64MSEC_MATCH_SET(u64Msec)   (MAP_PRCMSlowClkCtrMatchSet(u64Msec << 5))
-#define SCC_U64MSEC_MATCH_GET()          (MAP_PRCMSlowClkCtrMatchGet() >> 5)
-
-//*****************************************************************************
-//
-// Bit:  31 is used to indicate use of RTC. If set as '1', RTC feature is used.
-// Bit:  30 is used to indicate that a safe boot should be performed.
-// bit:  29 is used to indicate that the last reset was caused by the WDT.
-// bit:  28 is used to indicate that the board is booting for the first time after being programmed in factory.
-// Bits: 27 and 26 are unused.
-// Bits: 25 to 16 are used to save millisecond part of RTC reference.
-// Bits: 15 to 0 are being used for HW Changes / ECO.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-// Set RTC USE Bit
-//*****************************************************************************
-static void RTCUseSet(void)
-{
-  unsigned int uiRegValue;
-
-  uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << 31);
-
-  PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-// Clear RTC USE Bit
-//*****************************************************************************
-static void RTCUseClear(void)
-{
-  unsigned int uiRegValue;
-
-  uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << 31));
-
-  PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-// Checks if RTC-USE bit is set
-//*****************************************************************************
-static tBoolean IsRTCUsed(void)
-{
-  return (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << 31)) ? true : false;
-}
-
-//*****************************************************************************
-// Read 16-bit mSecs
-//*****************************************************************************
-static unsigned short RTCU32MSecRegRead(void)
-{
-  return ((MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) >> 16) & 0x03FF);
-}
-
-//*****************************************************************************
-// Write 16-bit mSecs
-//*****************************************************************************
-static void RTCU32MSecRegWrite(unsigned int u32Msec)
-{
-   unsigned int uiRegValue;
-
-   // read the whole register and clear the msec bits
-   uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(0x03FF << 16));
-
-   // write the msec bits only
-   MAP_PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue | ((u32Msec & 0x03FF) << 16));
-}
-
-//*****************************************************************************
-// Read 32-bit Secs
-//*****************************************************************************
-static unsigned long RTCU32SecRegRead(void)
-{
-  return (MAP_PRCMHIBRegRead(RTC_SECS_U32_REG_ADDR));
-}
-
-//*****************************************************************************
-// Write 32-bit Secs
-//*****************************************************************************
-static void RTCU32SecRegWrite(unsigned long u32Msec)
-{
-  MAP_PRCMHIBRegWrite(RTC_SECS_U32_REG_ADDR, u32Msec);
-}
-
-//*****************************************************************************
-// Fast function to get the most accurate RTC counter value
-//*****************************************************************************
-static unsigned long long RTCFastDomainCounterGet (void) {
-
-    #define BRK_IF_RTC_CTRS_ALIGN(c2, c1)       if (c2 - c1 <= 1) {     \
-                                                    itr++;              \
-                                                    break;              \
-                                                }
-
-    unsigned long long rtc_count1, rtc_count2, rtc_count3;
-    unsigned int itr;
-
-    do {
-        rtc_count1 = PRCMSlowClkCtrFastGet();
-        rtc_count2 = PRCMSlowClkCtrFastGet();
-        rtc_count3 = PRCMSlowClkCtrFastGet();
-        itr = 0;
-
-        BRK_IF_RTC_CTRS_ALIGN(rtc_count2, rtc_count1);
-        BRK_IF_RTC_CTRS_ALIGN(rtc_count3, rtc_count2);
-        BRK_IF_RTC_CTRS_ALIGN(rtc_count3, rtc_count1);
-
-        // Consistent values in two consecutive reads implies a correct
-        // value of the counter. Do note, the counter does not give the
-        // calendar time but a hardware that ticks upwards continuously.
-        // The 48-bit counter operates at 32,768 HZ.
-
-    } while (true);
-
-    return (1 == itr) ? rtc_count2 : rtc_count3;
-}
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define IS_RTC_USED()                   IsRTCUsed()
-#define RTC_USE_SET()                   RTCUseSet()
-#define RTC_USE_CLR()                   RTCUseClear()
-
-#define RTC_U32MSEC_REG_RD()            RTCU32MSecRegRead()
-#define RTC_U32MSEC_REG_WR(u32Msec)     RTCU32MSecRegWrite(u32Msec)
-
-#define RTC_U32SECS_REG_RD()            RTCU32SecRegRead()
-#define RTC_U32SECS_REG_WR(u32Secs)     RTCU32SecRegWrite(u32Secs)
-
-#define SELECT_SCC_U42BITS(u64Msec)     (u64Msec & 0x3ffffffffff)
-
-//*****************************************************************************
-// Global Peripheral clock and rest Registers
-//*****************************************************************************
-static const PRCM_PeriphRegs_t PRCM_PeriphRegsList[] =
-{
-
-	{APPS_RCM_O_CAMERA_CLK_GATING,   APPS_RCM_O_CAMERA_SOFT_RESET   },
-	{APPS_RCM_O_MCASP_CLK_GATING,    APPS_RCM_O_MCASP_SOFT_RESET    },
-	{APPS_RCM_O_MMCHS_CLK_GATING,    APPS_RCM_O_MMCHS_SOFT_RESET    },
-	{APPS_RCM_O_MCSPI_A1_CLK_GATING, APPS_RCM_O_MCSPI_A1_SOFT_RESET },
-	{APPS_RCM_O_MCSPI_A2_CLK_GATING, APPS_RCM_O_MCSPI_A2_SOFT_RESET },
-	{APPS_RCM_O_UDMA_A_CLK_GATING,   APPS_RCM_O_UDMA_A_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_A_CLK_GATING,   APPS_RCM_O_GPIO_A_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_B_CLK_GATING,   APPS_RCM_O_GPIO_B_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_C_CLK_GATING,   APPS_RCM_O_GPIO_C_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_D_CLK_GATING,   APPS_RCM_O_GPIO_D_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_E_CLK_GATING,   APPS_RCM_O_GPIO_E_SOFT_RESET   },
-	{APPS_RCM_O_WDOG_A_CLK_GATING,   APPS_RCM_O_WDOG_A_SOFT_RESET   },
-	{APPS_RCM_O_UART_A0_CLK_GATING,  APPS_RCM_O_UART_A0_SOFT_RESET  },
-	{APPS_RCM_O_UART_A1_CLK_GATING,  APPS_RCM_O_UART_A1_SOFT_RESET  },
-	{APPS_RCM_O_GPT_A0_CLK_GATING ,  APPS_RCM_O_GPT_A0_SOFT_RESET   },
-	{APPS_RCM_O_GPT_A1_CLK_GATING,   APPS_RCM_O_GPT_A1_SOFT_RESET   },
-	{APPS_RCM_O_GPT_A2_CLK_GATING,   APPS_RCM_O_GPT_A2_SOFT_RESET   },
-	{APPS_RCM_O_GPT_A3_CLK_GATING,   APPS_RCM_O_GPT_A3_SOFT_RESET   },
-	{APPS_RCM_O_CRYPTO_CLK_GATING,   APPS_RCM_O_CRYPTO_SOFT_RESET   },
-	{APPS_RCM_O_MCSPI_S0_CLK_GATING, APPS_RCM_O_MCSPI_S0_SOFT_RESET },
-	{APPS_RCM_O_I2C_CLK_GATING,      APPS_RCM_O_I2C_SOFT_RESET      }
-
-};
-
-//*****************************************************************************
-//
-//! Set a special bit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMSetSpecialBit(unsigned char bit)
-{
-    unsigned int uiRegValue;
-
-    uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << bit);
-
-    PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-//
-//! Clear a special bit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMClearSpecialBit(unsigned char bit)
-{
-    unsigned int uiRegValue;
-
-    uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << bit));
-
-    PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-//
-//! Read a special bit
-//!
-//! \return Value of the bit
-//
-//*****************************************************************************
-tBoolean PRCMGetSpecialBit(unsigned char bit)
-{
-    tBoolean value = (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << bit)) ? true : false;
-    // special bits must be cleared immediatelly after reading
-    PRCMClearSpecialBit(bit);
-    return value;
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a SOC
-//!
-//! This function performs a software reset of a SOC
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMSOCReset(void)
-{
-  //
-  // Reset MCU
-  //
-  HWREG(GPRCM_BASE+ GPRCM_O_MCU_GLOBAL_SOFT_RESET) |= 0x1;
-
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a MCU and associated peripherals
-//!
-//! \param bIncludeSubsystem is \b true to reset associated peripherals.
-//!
-//! This function performs a software reset of a MCU and associated peripherals.
-//! To reset the associated peripheral, the parameter \e bIncludeSubsystem
-//! should be set to \b true.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMMCUReset(tBoolean bIncludeSubsystem)
-{
-  if(bIncludeSubsystem)
-  {
-    //
-    // Reset Apps processor and associated peripheral
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SOFT_RESET) = 0x2;
-  }
-  else
-  {
-    //
-    // Reset Apps processor only
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SOFT_RESET) = 0x1;
-  }
-}
-
-//*****************************************************************************
-//
-//! Gets the reason for a reset.
-//!
-//! This function returns the reason(s) for a reset. The reset reason are:-
-//! -\b PRCM_POWER_ON  - Device is powering up.
-//! -\b PRCM_LPDS_EXIT - Device is exiting from LPDS.
-//! -\b PRCM_CORE_RESET - Device is exiting soft core only reset
-//! -\b PRCM_MCU_RESET - Device is exiting soft subsystem reset.
-//! -\b PRCM_WDT_RESET - Device was reset by watchdog.
-//! -\b PRCM_SOC_RESET - Device is exting SOC reset.
-//! -\b PRCM_HIB_EXIT - Device is exiting hibernate.
-//!
-//! \return Returns one of the cause defined above.
-//
-//*****************************************************************************
-unsigned long PRCMSysResetCauseGet(void)
-{
-  unsigned long ulWakeupStatus;
-
-  //
-  // Read the Reset status
-  //
-  ulWakeupStatus = (HWREG(GPRCM_BASE+ GPRCM_O_APPS_RESET_CAUSE) & 0xFF);
-
-  //
-  // For hibernate do additional chaeck.
-  //
-  if(ulWakeupStatus == PRCM_POWER_ON)
-  {
-    if(MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS) & 0x1)
-    {
-      ulWakeupStatus = PRCM_HIB_EXIT;
-    }
-  }
-
-  //
-  // Return status.
-  //
-  return ulWakeupStatus;
-}
-
-//*****************************************************************************
-//
-//! Enable clock(s) to peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripherals
-//! \param ulClkFlags are bitmask of clock(s) to be enabled.
-//!
-//! This function enables the clock for the specified peripheral. Peripherals
-//! are by default clock gated (disabled) and generates a bus fault if
-//! accessed.
-//!
-//! The parameter \e ulClkFlags can be logical OR of the following:
-//! -\b PRCM_RUN_MODE_CLK - Ungates clock to the peripheral
-//! -\b PRCM_SLP_MODE_CLK - Keeps the clocks ungated in sleep.
-//! -\b PRCM_DSLP_MODE_CLK - Keeps the clock ungated in deepsleep.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMPeripheralClkEnable(unsigned long ulPeripheral, unsigned long ulClkFlags)
-{
-  //
-  // Enable the specified peripheral clocks, Nothing to be done for PRCM_ADC
-  // as it is a dummy define for pinmux utility code generation
-  //
-  if(ulPeripheral != PRCM_ADC)
-  {
-    HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulClkReg) |= ulClkFlags;
-  }
-  //
-  // Set the default clock for camera
-  //
-  if(ulPeripheral == PRCM_CAMERA)
-  {
-    HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) = 0x0404;
-  }
-}
-
-//*****************************************************************************
-//
-//! Disables clock(s) to peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripherals
-//! \param ulClkFlags are bitmask of clock(s) to be enabled.
-//!
-//! This function disable the clock for the specified peripheral. Peripherals
-//! are by default clock gated (disabled) and generated a bus fault if
-//! accessed.
-//!
-//! The parameter \e ulClkFlags can be logical OR bit fields as defined in
-//! PRCMEnablePeripheral().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMPeripheralClkDisable(unsigned long ulPeripheral, unsigned long ulClkFlags)
-{
-  //
-  // Disable the specified peripheral clocks
-  //
-  HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulClkReg) &= ~ulClkFlags;
-}
-
-//*****************************************************************************
-//
-//! Gets the input clock for the specified peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripherals.
-//!
-//! This function gets the input clock for the specified peripheral.
-//!
-//! The parameter \e ulPeripheral has the same definition as that in
-//! PRCMPeripheralClkEnable();
-//!
-//! \return Returns input clock frequency for specified peripheral.
-//
-//*****************************************************************************
-unsigned long PRCMPeripheralClockGet(unsigned long ulPeripheral)
-{
-  unsigned long ulClockFreq;
-  unsigned long ulHiPulseDiv;
-  unsigned long ulLoPulseDiv;
-
-  //
-  // Get the clock based on specified peripheral.
-  //
-  if(((ulPeripheral == PRCM_SSPI) | (ulPeripheral == PRCM_LSPI)
-            | (ulPeripheral == PRCM_GSPI)))
-  {
-    return XTAL_CLK;
-  }
-  else if(ulPeripheral == PRCM_CAMERA)
-  {
-    ulHiPulseDiv = ((HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) >> 8) & 0x07);
-    ulLoPulseDiv = (HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN)& 0xFF);
-  }
-  else if(ulPeripheral == PRCM_SDHOST)
-  {
-    ulHiPulseDiv = ((HWREG(ARCM_BASE + APPS_RCM_O_MMCHS_CLK_GEN) >> 8) & 0x07);
-    ulLoPulseDiv = (HWREG(ARCM_BASE + APPS_RCM_O_MMCHS_CLK_GEN)& 0xFF);
-  }
-  else
-  {
-    return SYS_CLK;
-  }
-
-  //
-  // Compute the clock freq. from the divider value
-  //
-  ulClockFreq = (240000000/((ulHiPulseDiv + 1) + (ulLoPulseDiv + 1)));
-
-  //
-  // Return the clock rate.
-  //
-  return ulClockFreq;
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripheral.
-//!
-//! This assert or deassert reset to the specified peripheral based of the
-//! \e bAssert parameter.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMPeripheralReset(unsigned long ulPeripheral)
-{
-  volatile unsigned long ulDelay;
-
-  if( ulPeripheral != PRCM_DTHE)
-  {
-    //
-    // Assert the reset
-    //
-    HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulRstReg)
-                                                         |= PRCM_SOFT_RESET;
-    //
-    // Delay for a little bit.
-    //
-    for(ulDelay = 0; ulDelay < 16; ulDelay++)
-    {
-    }
-
-    //
-    // Deassert the reset
-    //
-    HWREG(ARCM_BASE+PRCM_PeriphRegsList[ulPeripheral].ulRstReg)
-                                                          &= ~PRCM_SOFT_RESET;
-  }
-}
-
-//*****************************************************************************
-//
-//! Determines if a peripheral is ready.
-//!
-//! \param ulPeripheral is one of the valid modules
-//!
-//! This function determines if a particular peripheral is ready to be
-//! accessed. The peripheral may be in a non-ready state if it is not enabled,
-//! is being held in reset, or is in the process of becoming ready after being
-//! enabled or taken out of reset.
-//!
-//! \return Returns \b true if the  peripheral is ready, \b false otherwise.
-//
-//*****************************************************************************
-tBoolean PRCMPeripheralStatusGet(unsigned long ulPeripheral)
-{
-  unsigned long ReadyBit;
-
-  //
-  // Read the ready bit status
-  //
-  ReadyBit = HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulRstReg);
-  ReadyBit = ReadyBit & PRCM_ENABLE_STATUS;
-
-  if (ReadyBit)
-  {
-    //
-    // Module is ready
-    //
-    return(true);
-  }
-  else
-  {
-    //
-    // Module is not ready
-    //
-    return(false);
-  }
-}
-
-//*****************************************************************************
-//
-//! Configure I2S fracactional divider
-//!
-//! \param ulI2CClkFreq is the required input clock for McAPS module
-//!
-//! This function configures I2S fractional divider. By default this
-//! divider is set to output 24 Mhz clock to I2S module.
-//!
-//! The minimum frequency that can be obtained by configuring this divider is
-//!
-//! (240000KHz/1023.99) =  234.377 KHz
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq)
-{
- unsigned long long ullDiv;
-  unsigned short usInteger;
-  unsigned short usFrac;
-
-  ullDiv = (((unsigned long long)240000000 * 65536)/ulI2CClkFreq);
-
-  usInteger = (ullDiv/65536);
-  usFrac    = (ullDiv%65536);
-
-  HWREG(ARCM_BASE + APPS_RCM_O_MCASP_FRAC_CLK_CONFIG0) =
-    ((usInteger & 0x3FF) << 16 | usFrac);
-}
-
-//*****************************************************************************
-//
-//! Sets the LPDS exit PC and SP restore vlaues.
-//!
-//! \param ulStackPtr is the SP restore value.
-//! \param ulProgCntr is the PC restore value
-//!
-//! This function sets the LPDS exit PC and SP restore vlaues. Setting
-//! \e ulProgCntr to a non-zero value, forces bootloader to jump to that
-//! address with Stack Pointer initialized to \e ulStackPtr on LPDS exit,
-//! otherwise the application's vector table entries are used.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr)
-{
-  //
-  // Set The SP Value
-  //
-  HWREG(0x4402E18C) = ulStackPtr;
-
-  //
-  // Set The PC Value
-  //
-  HWREG(0x4402E190) = ulProgCntr;
-}
-
-//*****************************************************************************
-//
-//! Puts the system into Low Power Deel Sleep (LPDS) power mode.
-//!
-//! This function puts the system into Low Power Deel Sleep (LPDS) power mode.
-//! A call to this function never returns and the execution starts from Reset.
-//! \sa PRCMLPDSRestoreInfoSet().
-//!
-//! \return None.
-//!
-//! \note The Test Power Domain is shutdown whenever the system
-//!  enters LPDS (by default). In order to avoid this and allow for
-//!  connecting back the debugger after waking up from LPDS,
-//!  the macro KEEP_TESTPD_ALIVE has to be defined while building the library.
-//!  This is recommended for development purposes only as it adds to
-//!  the current consumption of the system.
-//!
-//
-//*****************************************************************************
-void PRCMLPDSEnter(void)
-{
-#ifndef DEBUG
-  //
-  // Disable TestPD
-  //
-  HWREG(0x4402E168) |= (1<<9);
-#endif
-
-  //
-  // Set bandgap duty cycle to 1
-  //
-  HWREG(HIB1P2_BASE + HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG) = 0x1;
-
-  //
-  // Request LPDS
-  //
-  HWREG(ARCM_BASE + APPS_RCM_O_APPS_LPDS_REQ) = APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ;
-
-  __asm("    nop\n"
-        "    nop\n"
-        "    nop\n"
-        "    nop\n");
-}
-
-//*****************************************************************************
-//
-//! Enable the individual LPDS wakeup source(s).
-//!
-//! \param ulLpdsWakeupSrc is logical OR of wakeup sources.
-//!
-//! This function enable the individual LPDS wakeup source(s) and following
-//! three wakeup sources (\e ulLpdsWakeupSrc ) are supported by the device.
-//! -\b PRCM_LPDS_HOST_IRQ
-//! -\b PRCM_LPDS_GPIO
-//! -\b PRCM_LPDS_TIMER
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc)
-{
-  unsigned long ulRegVal;
-
-  //
-  // Read the current wakup sources
-  //
-  ulRegVal = HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG);
-
-  //
-  // Enable individual wakeup source
-  //
-  ulRegVal = ((ulRegVal | ulLpdsWakeupSrc) & 0x91);
-
-  //
-  // Set the configuration in the register
-  //
-  HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG) = ulRegVal;
-}
-
-//*****************************************************************************
-//
-//! Disable the individual LPDS wakeup source(s).
-//!
-//! \param ulLpdsWakeupSrc is logical OR of wakeup sources.
-//!
-//! This function enable the individual LPDS wakeup source(s) and following
-//! three wake up sources (\e ulLpdsWakeupSrc ) are supported by the device.
-//! -\b PRCM_LPDS_HOST_IRQ
-//! -\b PRCM_LPDS_GPIO
-//! -\b PRCM_LPDS_TIMER
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc)
-{
-  HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG) &= ~ulLpdsWakeupSrc;
-}
-
-
-//*****************************************************************************
-//
-//! Get LPDS wakeup cause
-//!
-//! This function gets LPDS wakeup caouse
-//!
-//! \return Returns values enumerated as described in
-//! PRCMLPDSWakeupSourceEnable().
-//
-//*****************************************************************************
-unsigned long PRCMLPDSWakeupCauseGet(void)
-{
-  return (HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_SRC));
-}
-
-//*****************************************************************************
-//
-//! Sets LPDS wakeup Timer
-//!
-//! \param ulTicks is number of 32.768 KHz clocks
-//!
-//! This function sets internal LPDS wakeup timer running at 32.768 KHz. The
-//! timer is only configured if the parameter \e ulTicks is in valid range i.e.
-//! from 21 to 2^32.
-//!
-//! \return Returns \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-void PRCMLPDSIntervalSet(unsigned long ulTicks)
-{
-  //
-  // Check sleep is atleast for 21 cycles
-  // If not set the sleep time to 21 cycles
-  //
-  if( ulTicks < 21)
-  {
-      ulTicks = 21;
-  }
-
-  HWREG(GPRCM_BASE + GPRCM_O_APPS_LPDS_WAKETIME_WAKE_CFG) = ulTicks;
-  HWREG(GPRCM_BASE + GPRCM_O_APPS_LPDS_WAKETIME_OPP_CFG) = ulTicks-20;
-}
-
-//*****************************************************************************
-//
-//! Selects the GPIO for LPDS wakeup
-//!
-//! \param ulGPIOPin is one of the valid GPIO fro LPDS wakeup.
-//! \param ulType is the wakeup trigger type.
-//!
-//! This function setects the wakeup GPIO for LPDS wakeup and can be
-//! used to select one out of 7 pre-defined GPIO(s).
-//!
-//! The parameter \e ulLpdsGPIOSel should be one of the following:-
-//! -\b PRCM_LPDS_GPIO2
-//! -\b PRCM_LPDS_GPIO4
-//! -\b PRCM_LPDS_GPIO13
-//! -\b PRCM_LPDS_GPIO17
-//! -\b PRCM_LPDS_GPIO11
-//! -\b PRCM_LPDS_GPIO24
-//! -\b PRCM_LPDS_GPIO26
-//!
-//! The parameter \e ulType sets the trigger type and can be one of the
-//! following:
-//! - \b PRCM_LPDS_LOW_LEVEL
-//! - \b PRCM_LPDS_HIGH_LEVEL
-//! - \b PRCM_LPDS_FALL_EDGE
-//! - \b PRCM_LPDS_RISE_EDGE
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin, unsigned long ulType)
-{
-  //
-  // Set the wakeup GPIO
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL, ulGPIOPin);
-
-  //
-  // Set the trigger type.
-  //
-  HWREG(GPRCM_BASE + GPRCM_O_APPS_GPIO_WAKE_CONF) = (ulType & 0x3);
-}
-
-//*****************************************************************************
-//
-//! Puts the system into Sleep.
-//!
-//! This function puts the system into sleep power mode. System exits the power
-//! state on any one of the available interrupt. On exit from sleep mode the
-//! function returns to the calling function with all the processor core
-//! registers retained.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMSleepEnter(void)
-{
-  //
-  // Request Sleep
-  //
-  CPUwfi();
-}
-
-//*****************************************************************************
-//
-//! Puts the system into Deep Sleep power mode.
-//!
-//! This function puts the system into Deep Sleep power mode. System exits the
-//! power state on any one of the available interrupt. On exit from deep
-//! sleep the function returns to the calling function with all the processor
-//! core registers retained.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMDeepSleepEnter(void)
-{
-  //
-  // Set bandgap duty cycle to 1
-  //
-  HWREG(HIB1P2_BASE + HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG) = 0x1;
-
-  //
-  // Enable DSLP in cortex
-  //
-  HWREG(0xE000ED10)|=1<<2;
-
-  //
-  // Request Deep Sleep
-  //
-  CPUwfi();
-
-  //
-  // Disable DSLP in cortex before
-  // returning to the caller
-  //
-  HWREG(0xE000ED10) &= ~(1<<2);
-
-}
-
-//*****************************************************************************
-//
-//! Enable SRAM column retention during Deep Sleep and/or LPDS Power mode(s)
-//!
-//! \param ulSramColSel is bit mask of valid SRAM columns.
-//! \param ulModeFlags is the bit mask of power modes.
-//!
-//! This functions enables the SRAM retention. The device supports configurable
-//! SRAM column retention in Low Power Deep Sleep (LPDS) and Deep Sleep power
-//! modes. Each column is of 64 KB size.
-//!
-//! The parameter \e ulSramColSel should be logical OR of the following:-
-//! -\b PRCM_SRAM_COL_1
-//! -\b PRCM_SRAM_COL_2
-//! -\b PRCM_SRAM_COL_3
-//! -\b PRCM_SRAM_COL_4
-//!
-//! The parameter \e ulModeFlags selects the power modes and sholud be logical
-//! OR of one or more of the following
-//! -\b PRCM_SRAM_DSLP_RET
-//! -\b PRCM_SRAM_LPDS_RET
-//!
-//! \return None.
-//
-//****************************************************************************
-void PRCMSRAMRetentionEnable(unsigned long ulSramColSel, unsigned long ulModeFlags)
-{
-  if(ulModeFlags & PRCM_SRAM_DSLP_RET)
-  {
-    //
-    // Configure deep sleep SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_DSLP_CFG) = (ulSramColSel & 0xF);
-  }
-
-  if(ulModeFlags & PRCM_SRAM_LPDS_RET)
-  {
-    //
-    // Configure LPDS SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_LPDS_CFG) = (ulSramColSel & 0xF);
-  }
-}
-
-//*****************************************************************************
-//
-//! Disable SRAM column retention during Deep Sleep and/or LPDS Power mode(s).
-//!
-//! \param ulSramColSel is bit mask of valid SRAM columns.
-//! \param ulFlags is the bit mask of power modes.
-//!
-//! This functions disable the SRAM retention. The device supports configurable
-//! SRAM column retention in Low Power Deep Sleep (LPDS) and Deep Sleep power
-//! modes. Each column is of 64 KB size.
-//!
-//! The parameter \e ulSramColSel should be logical OR of the following:-
-//! -\b PRCM_SRAM_COL_1
-//! -\b PRCM_SRAM_COL_2
-//! -\b PRCM_SRAM_COL_3
-//! -\b PRCM_SRAM_COL_4
-//!
-//! The parameter \e ulFlags selects the power modes and sholud be logical OR
-//! of one or more of the following
-//! -\b PRCM_SRAM_DSLP_RET
-//! -\b PRCM_SRAM_LPDS_RET
-//!
-//! \return None.
-//
-//****************************************************************************
-void PRCMSRAMRetentionDisable(unsigned long ulSramColSel, unsigned long ulFlags)
-{
-  if(ulFlags & PRCM_SRAM_DSLP_RET)
-  {
-    //
-    // Configure deep sleep SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_DSLP_CFG) &= ~(ulSramColSel & 0xF);
-  }
-
-  if(ulFlags & PRCM_SRAM_LPDS_RET)
-  {
-    //
-    // Configure LPDS SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_LPDS_CFG) &= ~(ulSramColSel & 0xF);
-  }
-}
-
-
-//*****************************************************************************
-//
-//! Enables individual HIB wakeup source(s).
-//!
-//! \param ulHIBWakupSrc is logical OR of valid HIB wakeup sources.
-//!
-//! This function enables individual HIB wakeup source(s). The paramter
-//! \e ulHIBWakupSrc is the bit mask of HIB wakeup sources and should be
-//! logical OR of one or more of the follwoing :-
-//! -\b PRCM_HIB_SLOW_CLK_CTR
-//! -\b PRCM_HIB_GPIO2
-//! -\b PRCM_HIB_GPIO4
-//! -\b PRCM_HIB_GPIO13
-//! -\b PRCM_HIB_GPIO17
-//! -\b PRCM_HIB_GPIO11
-//! -\b PRCM_HIB_GPIO24
-//! -\b PRCM_HIB_GPIO26
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc)
-{
-  unsigned long ulRegValue;
-
-  //
-  // Read the RTC register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN);
-
-  //
-  // Enable the RTC as wakeup source if specified
-  //
-  ulRegValue |= (ulHIBWakupSrc & 0x1);
-
-  //
-  // Enable HIB wakeup sources
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue);
-
-  //
-  // REad the GPIO wakeup configuration register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN);
-
-  //
-  // Enable the specified GPIOs a wakeup sources
-  //
-  ulRegValue |= ((ulHIBWakupSrc>>16)&0xFF);
-
-  //
-  // Write the new register configuration
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue);
-}
-
-//*****************************************************************************
-//
-//! Disable individual HIB wakeup source(s).
-//!
-//! \param ulHIBWakupSrc is logical OR of valid HIB wakeup sources.
-//!
-//! This function disable individual HIB wakeup source(s). The paramter
-//! \e ulHIBWakupSrc is same as bit fileds defined in
-//! PRCMEnableHibernateWakeupSource()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc)
-{
-  unsigned long ulRegValue;
-
-  //
-  // Read the RTC register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN);
-
-  //
-  // Disable the RTC as wakeup source if specified
-  //
-  ulRegValue &= ~(ulHIBWakupSrc & 0x1);
-
-  //
-  // Disable HIB wakeup sources
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue);
-
-  //
-  // Read the GPIO wakeup configuration register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN);
-
-  //
-  // Enable the specified GPIOs a wakeup sources
-  //
-  ulRegValue &= ~((ulHIBWakupSrc>>16)&0xFF);
-
-  //
-  // Write the new register configuration
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue);
-}
-
-
-//*****************************************************************************
-//
-//! Get hibernate wakeup cause
-//!
-//! This function gets the hibernate wakeup cause.
-//!
-//! \return Returns \b PRCM_HIB_WAKEUP_CAUSE_SLOW_CLOCK or
-//! \b PRCM_HIB_WAKEUP_CAUSE_GPIO
-//
-//*****************************************************************************
-unsigned long PRCMHibernateWakeupCauseGet(void)
-{
-  return ((MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS)>>1)&0xF);
-}
-
-//*****************************************************************************
-//
-//! Sets Hibernate wakeup Timer
-//!
-//! \param ullTicks is number of 32.768 KHz clocks
-//!
-//! This function sets internal hibernate wakeup timer running at 32.768 KHz.
-//!
-//! \return Returns \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-void PRCMHibernateIntervalSet(unsigned long long ullTicks)
-{
-  unsigned long long ullRTCVal;
-
-  //
-  // Latch the RTC vlaue
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_READ ,0x1);
-
-  //
-  // Read latched values as 2 32-bit vlaues
-  //
-  ullRTCVal  = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_TIMER_MSW);
-  ullRTCVal  = ullRTCVal << 32;
-  ullRTCVal |= MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_LSW);
-
-  //
-  // Add the interval
-  //
-  ullRTCVal = ullRTCVal + ullTicks;
-
-  //
-  // Set RTC match value
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF,
-                                            (unsigned long)(ullRTCVal));
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF,
-                                           (unsigned long)(ullRTCVal>>32));
-}
-
-
-//*****************************************************************************
-//
-//! Selects the GPIO(s) for hibernate wakeup
-//!
-//! \param ulGPIOBitMap is the bit-map of valid hibernate wakeup GPIO.
-//! \param ulType is the wakeup trigger type.
-//!
-//! This function setects the wakeup GPIO for hibernate and can be
-//! used to select any combination of 7 pre-defined GPIO(s).
-//!
-//! This function enables individual HIB wakeup source(s). The paramter
-//! \e ulGPIOBitMap should be one of the follwoing :-
-//! -\b PRCM_HIB_GPIO2
-//! -\b PRCM_HIB_GPIO4
-//! -\b PRCM_HIB_GPIO13
-//! -\b PRCM_HIB_GPIO17
-//! -\b PRCM_HIB_GPIO11
-//! -\b PRCM_HIB_GPIO24
-//! -\b PRCM_HIB_GPIO26
-//!
-//! The parameter \e ulType sets the trigger type and can be one of the
-//! following:
-//! - \b PRCM_HIB_LOW_LEVEL
-//! - \b PRCM_HIB_HIGH_LEVEL
-//! - \b PRCM_HIB_FALL_EDGE
-//! - \b PRCM_HIB_RISE_EDGE
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMHibernateWakeUpGPIOSelect(unsigned long ulGPIOBitMap, unsigned long ulType)
-{
-  unsigned char ucLoop;
-  unsigned long ulRegValue;
-
-  //
-  // Shift the bits to extract the GPIO selection
-  //
-  ulGPIOBitMap >>= 16;
-
-  //
-  // Set the configuration for each GPIO
-  //
-  for(ucLoop=0; ucLoop < 7; ucLoop++)
-  {
-    if(ulGPIOBitMap & (1<>32));
-}
-
-//*****************************************************************************
-//
-//! Gets slow clock counter match value.
-//!
-//! This function gets the match value for  slow clock counter. This is use
-//! to interrupt the processor when RTC counts to the specified value.
-//!
-//! \return None.
-//
-//*****************************************************************************
-unsigned long long PRCMSlowClkCtrMatchGet(void)
-{
-  unsigned long long ullValue;
-
-  //
-  // Get RTC match value
-  //
-  ullValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF);
-  ullValue = ullValue<<32;
-  ullValue |= MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF);
-
-  //
-  // Return the value
-  //
-  return ullValue;
-}
-
-
-//*****************************************************************************
-//
-//! Write to On-Chip Retention (OCR) register.
-//!
-//! This function writes to On-Chip retention register. The device supports two
-//! 4-byte OCR register which are retained across all power mode.
-//!
-//! The parameter \e ucIndex is an index of the OCR and can be \b 0 or \b 1.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMOCRRegisterWrite(unsigned char ucIndex, unsigned long ulRegValue)
-{
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2+(ucIndex << 2),ulRegValue);
-}
-
-//*****************************************************************************
-//
-//! Read from On-Chip Retention (OCR) register.
-//!
-//! This function reads from On-Chip retention register. The device supports two
-//! 4-byte OCR register which are retained across all power mode.
-//!
-//! The parameter \e ucIndex is an index of the OCR and can be \b 0 or \b 1.
-//!
-//! \return None.
-//
-//*****************************************************************************
-unsigned long PRCMOCRRegisterRead(unsigned char ucIndex)
-{
-  //
-  // Return the read value.
-  //
-  return MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2 + (ucIndex << 2));
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the PRCM.
-//!
-//! \param pfnHandler is a pointer to the function to be called when the
-//! interrupt is activated.
-//!
-//! This function does the actual registering of the interrupt handler.  This
-//! function enables the global interrupt in the interrupt controller;
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMIntRegister(void (*pfnHandler)(void))
-{
-  //
-  // Register the interrupt handler.
-  //
-  IntRegister(INT_PRCM, pfnHandler);
-
-  //
-  // Enable the PRCM interrupt.
-  //
-  IntEnable(INT_PRCM);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the PRCM.
-//!
-//! This function does the actual unregistering of the interrupt handler.  It
-//! clears the handler to be called when a PRCM interrupt occurs.  This
-//! function also masks off the interrupt in the interrupt controller so that
-//! the interrupt handler no longer is called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMIntUnregister(void)
-{
-  //
-  // Enable the UART interrupt.
-  //
-  IntDisable(INT_PRCM);
-
-  //
-  // Register the interrupt handler.
-  //
-  IntUnregister(INT_PRCM);
-}
-
-//*****************************************************************************
-//
-//! Enables individual PRCM interrupt sources.
-//!
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated ARCM interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//! -\b PRCM_INT_SLOW_CLK_CTR
-//!
-//
-//*****************************************************************************
-void PRCMIntEnable(unsigned long ulIntFlags)
-{
-  unsigned long ulRegValue;
-
-  if(ulIntFlags & PRCM_INT_SLOW_CLK_CTR )
-  {
-    //
-    // Enable PRCM interrupt
-    //
-    HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_ENABLE) |= 0x4;
-
-    //
-    // Enable RTC interrupt
-    //
-    ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE);
-    ulRegValue |= 0x1;
-    MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue);
-  }
-}
-
-//*****************************************************************************
-//
-//! Disables individual PRCM interrupt sources.
-//!
-//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
-//!
-//! This function disables the indicated ARCM interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to PRCMEnableInterrupt().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMIntDisable(unsigned long ulIntFlags)
-{
-  unsigned long ulRegValue;
-
-  if(ulIntFlags & PRCM_INT_SLOW_CLK_CTR )
-  {
-    //
-    // Disable PRCM interrupt
-    //
-    HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_ENABLE) &= ~0x4;
-
-    //
-    // Disable RTC interrupt
-    //
-    ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE);
-    ulRegValue &= ~0x1;
-    MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue);
-  }
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! This function returns the PRCM interrupt status of interrupts that are
-//! allowed to reflect to the processor. The interrupts are cleared on read.
-//!
-//! \return Returns the current interrupt status.
-//
-//*****************************************************************************
-unsigned long PRCMIntStatus(void)
-{
-    return HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS);
-}
-
-//*****************************************************************************
-//
-//! Mark the function of RTC as being used
-//!
-//! This function marks in HW that feature to maintain calendar time in device
-//! is being used.
-//!
-//! Specifically, this feature reserves user's HIB Register-1 accessed through
-//! PRCMOCRRegisterWrite(1) for internal work / purpose, therefore, the stated
-//! register is not available to user. Also, users must not excercise the Slow
-//! Clock Counter API(s), if RTC has been set for use.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCInUseSet(void)
-{
-        RTC_USE_SET();
-        return;
-}
-
-//*****************************************************************************
-//
-//! Clear the function of RTC as being used
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCInUseClear(void)
-{
-        RTC_USE_CLR();
-        return;
-}
-
-//*****************************************************************************
-//
-//! Ascertain whether function of RTC is being used
-//!
-//! This function indicates whether function of RTC is being used on the device
-//! or not.
-//!
-//! This routine should be utilized by the application software, when returning
-//! from low-power, to confirm that RTC has been put to use and may not need to
-//! set the value of the RTC.
-//!
-//! The RTC feature, if set or marked, can be only reset either through reboot
-//! or power cycle.
-//!
-//! \return None.
-//
-//*****************************************************************************
-tBoolean PRCMRTCInUseGet(void)
-{
-        return IS_RTC_USED()? true : false;
-}
-
-//*****************************************************************************
-//
-//! Set the calendar time in the device.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function sets the specified calendar time in the device. The calendar
-//! time is outlined in terms of seconds and milliseconds. However, the device
-//! makes no assumption about the origin or reference of the calendar time.
-//!
-//! The device uses the indicated calendar value to update and maintain the
-//! wall-clock time across active and low power states.
-//!
-//! The function PRCMRTCInUseSet() must be invoked prior to use of this feature.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCSet(unsigned long ulSecs, unsigned short usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec = RTC_U64MSEC_MK(ulSecs, usMsec) - SCC_U64MSEC_GET();
-
-                 RTC_U32SECS_REG_WR(RTC_SECS_IN_U64MSEC(ullMsec));
-                 RTC_U32MSEC_REG_WR(RTC_MSEC_IN_U64MSEC(ullMsec));
-        }
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! Get the instantaneous calendar time from the device.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function fetches the instantaneous value of the ticking calendar time
-//! from the device. The calendar time is outlined in terms of seconds and
-//! milliseconds.
-//!
-//! The device provides the calendar value that has been maintained across
-//! active and low power states.
-//!
-//! The function PRCMRTCSet() must have been invoked once to set a reference.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCGet(unsigned long *ulSecs, unsigned short *usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec  = RTC_U64MSEC_MK(RTC_U32SECS_REG_RD(),
-                                          RTC_U32MSEC_REG_RD());
-                ullMsec += SCC_U64MSEC_GET();
-        }
-
-        *ulSecs = RTC_SECS_IN_U64MSEC(ullMsec);
-        *usMsec = RTC_MSEC_IN_U64MSEC(ullMsec);
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! Set a calendar time alarm.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function sets an wall-clock alarm in the device to be reported for  a
-//! futuristic calendar time. The calendar time is outlined in terms of seconds
-//! and milliseconds.
-//!
-//! The device provides uses the calendar value that has been maintained across
-//! active and low power states to report attainment of alarm time.
-//!
-//! The function PRCMRTCSet() must have been invoked once to set a reference.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCMatchSet(unsigned long ulSecs, unsigned short usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec  = RTC_U64MSEC_MK(ulSecs, usMsec);
-                ullMsec -= RTC_U64MSEC_MK(RTC_U32SECS_REG_RD(),
-                                          RTC_U32MSEC_REG_RD());
-                SCC_U64MSEC_MATCH_SET(SELECT_SCC_U42BITS(ullMsec));
-        }
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! Get a previously set calendar time alarm.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function fetches from the device a wall-clock alarm that would  have
-//! been previously set in the device. The calendar time is outlined in terms
-//! of seconds and milliseconds.
-//!
-//! If no alarm was set in the past, then this function would fetch a random
-//! information.
-//!
-//! The function PRCMRTCMatchSet() must have been invoked once to set an alarm.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCMatchGet(unsigned long *ulSecs, unsigned short *usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec  = SCC_U64MSEC_MATCH_GET();
-                ullMsec += RTC_U64MSEC_MK(RTC_U32SECS_REG_RD(),
-                                          RTC_U32MSEC_REG_RD());
-        }
-
-        *ulSecs = RTC_SECS_IN_U64MSEC(ullMsec);
-        *usMsec = RTC_MSEC_IN_U64MSEC(ullMsec);
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! MCU Initialization Routine
-//!
-//! This function sets mandatory configurations for the MCU
-//!
-//! \return None
-//
-//*****************************************************************************
-void PRCMCC3200MCUInit(void)
-{
-    unsigned long ulRegValue;
-
-    //
-    // DIG DCDC LPDS ECO Enable
-    //
-    HWREG(0x4402F064) |= 0x800000;
-
-    //
-    // Enable hibernate ECO for PG 1.32 devices only. With this ECO enabled,
-    // any hibernate wakeup source will be kept masked until the device enters
-    // hibernate completely (analog + digital)
-    //
-    ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE  + HIB3P3_O_MEM_HIB_REG0);
-    MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG0, ulRegValue | (1<<4));
-
-    //
-    // Handling the clock switching (for 1.32 only)
-    //
-    HWREG(0x4402E16C) |= 0x3C;
-
-    //
-    // Enable uDMA
-    //
-    MAP_PRCMPeripheralClkEnable(PRCM_UDMA,PRCM_RUN_MODE_CLK);
-
-    //
-    // Reset uDMA
-    //
-    MAP_PRCMPeripheralReset(PRCM_UDMA);
-
-    //
-    // Disable uDMA
-    //
-    MAP_PRCMPeripheralClkDisable(PRCM_UDMA,PRCM_RUN_MODE_CLK);
-
-    //
-    // Enable RTC
-    //
-    if(MAP_PRCMSysResetCauseGet()== PRCM_POWER_ON)
-    {
-        MAP_PRCMHIBRegWrite(0x4402F804,0x1);
-    }
-
-    //
-    // SWD mode
-    //
-    if (((HWREG(0x4402F0C8) & 0xFF) == 0x2))
-    {
-        HWREG(0x4402E110) = ((HWREG(0x4402E110) & ~0xC0F) | 0x2);
-        HWREG(0x4402E114) = ((HWREG(0x4402E110) & ~0xC0F) | 0x2);
-    }
-
-    //
-    // Override JTAG mux
-    //
-    HWREG(0x4402E184) |= 0x2;
-
-    //
-    // Change UART pins(55,57) mode to PIN_MODE_0 if they are in PIN_MODE_1
-    //
-    if ((HWREG(0x4402E0A4) & 0xF) == 0x1)
-    {
-        HWREG(0x4402E0A4) = ((HWREG(0x4402E0A4) & ~0xF));
-    }
-
-    if ((HWREG(0x4402E0A8) & 0xF) == 0x1)
-    {
-        HWREG(0x4402E0A8) = ((HWREG(0x4402E0A8) & ~0xF));
-    }
-
-    //
-    // DIG DCDC VOUT trim settings based on PROCESS INDICATOR
-    //
-    if (((HWREG(0x4402DC78) >> 22) & 0xF) == 0xE)
-    {
-        HWREG(0x4402F0B0) = ((HWREG(0x4402F0B0) & ~(0x00FC0000))|(0x32 << 18));
-    }
-    else
-    {
-        HWREG(0x4402F0B0) = ((HWREG(0x4402F0B0) & ~(0x00FC0000))|(0x29 << 18));
-    }
-
-    //
-    // Enable SOFT RESTART in case of DIG DCDC collapse
-    //
-    HWREG(0x4402FC74) &= ~(0x10000000);
-
-
-    //
-    // Disable the sleep for ANA DCDC
-    //
-    HWREG(0x4402F0A8) |= 0x00000004 ;
-}
-
-//*****************************************************************************
-//
-//! Reads 32-bit value from register at specified address
-//!
-//! \param ulRegAddr is the address of register to be read.
-//!
-//! This function reads 32-bit value from the register as specified by
-//! \e ulRegAddr.
-//!
-//! \return Return the value of the register.
-//
-//*****************************************************************************
-unsigned long PRCMHIBRegRead(unsigned long ulRegAddr)
-{
-  unsigned long ulValue;
-
-  //
-  // Read the Reg value
-  //
-  ulValue = HWREG(ulRegAddr);
-
-  //
-  // Wait for 200 uSec
-  //
-  UtilsDelay((80*200)/3);
-
-  //
-  // Return the value
-  //
-  return ulValue;
-}
-
-//*****************************************************************************
-//
-//! Writes 32-bit value to register at specified address
-//!
-//! \param ulRegAddr is the address of register to be read.
-//! \param ulValue is the 32-bit value to be written.
-//!
-//! This function writes 32-bit value passed as \e ulValue to the register as
-//! specified by \e ulRegAddr
-//!
-//! \return None
-//
-//*****************************************************************************
-void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue)
-{
-  //
-  // Read the Reg value
-  //
-  HWREG(ulRegAddr) = ulValue;
-
-  //
-  // Wait for 200 uSec
-  //
-  UtilsDelay((80*200)/3);
-}
-
-//*****************************************************************************
-//
-//! \param ulDivider is clock frequency divider value
-//! \param ulWidth is the width of the high pulse
-//!
-//! This function sets the input frequency for camera module.
-//!
-//! The frequency is calculated as follows:
-//!
-//!        f_out = 240MHz/ulDivider;
-//!
-//! The parameter \e ulWidth sets the width of the high pulse.
-//!
-//! For e.g.:
-//!
-//!     ulDivider = 4;
-//!     ulWidth   = 2;
-//!
-//!     f_out = 30 MHz and 50% duty cycle
-//!
-//! And,
-//!
-//!     ulDivider = 4;
-//!     ulWidth   = 1;
-//!
-//!     f_out = 30 MHz and 25% duty cycle
-//!
-//! \return 0 on success, 1 on error
-//
-//*****************************************************************************
-unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth)
-{
-    if(ulDivider > ulWidth && ulWidth != 0 )
-    {
-      //
-      // Set  the hifh pulse width
-      //
-      HWREG(ARCM_BASE +
-            APPS_RCM_O_CAMERA_CLK_GEN) = (((ulWidth & 0x07) -1) << 8);
-
-      //
-      // Set the low pulse width
-      //
-      HWREG(ARCM_BASE +
-            APPS_RCM_O_CAMERA_CLK_GEN) = ((ulDivider - ulWidth - 1) & 0x07);
-      //
-      // Return success
-      //
-      return 0;
-    }
-
-    //
-    // Success;
-    //
-    return 1;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/prcm.h b/ports/cc3200/hal/prcm.h
deleted file mode 100644
index 2f700ae2c6..0000000000
--- a/ports/cc3200/hal/prcm.h
+++ /dev/null
@@ -1,285 +0,0 @@
-//*****************************************************************************
-//
-//  prcm.h
-//
-//  Prototypes for the PRCM control driver.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __PRCM_H__
-#define __PRCM_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Peripheral clock and reset control registers
-//
-//*****************************************************************************
-typedef struct _PRCM_PeripheralRegs_
-{
-
-unsigned char ulClkReg;
-unsigned char ulRstReg;
-
-}PRCM_PeriphRegs_t;
-
-//*****************************************************************************
-// Values that can be passed to PRCMPeripheralEnable() and
-// PRCMPeripheralDisable()
-//*****************************************************************************
-#define PRCM_RUN_MODE_CLK         0x00000001
-#define PRCM_SLP_MODE_CLK         0x00000100
-#define PRCM_DSLP_MODE_CLK        0x00010000
-
-//*****************************************************************************
-// Values that can be passed to PRCMSRAMRetentionEnable() and
-// PRCMSRAMRetentionDisable() as ulSramColSel.
-//*****************************************************************************
-#define PRCM_SRAM_COL_1           0x00000001
-#define PRCM_SRAM_COL_2           0x00000002
-#define PRCM_SRAM_COL_3           0x00000004
-#define PRCM_SRAM_COL_4           0x00000008
-
-//*****************************************************************************
-// Values that can be passed to PRCMSRAMRetentionEnable() and
-// PRCMSRAMRetentionDisable() as ulModeFlags.
-//*****************************************************************************
-#define PRCM_SRAM_DSLP_RET        0x00000001
-#define PRCM_SRAM_LPDS_RET        0x00000002
-
-//*****************************************************************************
-// Values that can be passed to PRCMLPDSWakeupSourceEnable(),
-// PRCMLPDSWakeupCauseGet() and PRCMLPDSWakeupSourceDisable().
-//*****************************************************************************
-#define PRCM_LPDS_HOST_IRQ        0x00000080
-#define PRCM_LPDS_GPIO            0x00000010
-#define PRCM_LPDS_TIMER           0x00000001
-
-//*****************************************************************************
-// Values that can be passed to PRCMLPDSWakeUpGPIOSelect() as Type
-//*****************************************************************************
-#define PRCM_LPDS_LOW_LEVEL       0x00000002
-#define PRCM_LPDS_HIGH_LEVEL      0x00000000
-#define PRCM_LPDS_FALL_EDGE       0x00000001
-#define PRCM_LPDS_RISE_EDGE       0x00000003
-
-//*****************************************************************************
-// Values that can be passed to PRCMLPDSWakeUpGPIOSelect()
-//*****************************************************************************
-#define PRCM_LPDS_GPIO2           0x00000000
-#define PRCM_LPDS_GPIO4           0x00000001
-#define PRCM_LPDS_GPIO13          0x00000002
-#define PRCM_LPDS_GPIO17          0x00000003
-#define PRCM_LPDS_GPIO11          0x00000004
-#define PRCM_LPDS_GPIO24          0x00000005
-#define PRCM_LPDS_GPIO26          0x00000006
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeupSourceEnable(),
-// PRCMHibernateWakeupSourceDisable().
-//*****************************************************************************
-#define PRCM_HIB_SLOW_CLK_CTR     0x00000001
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeUpGPIOSelect() as ulType
-//*****************************************************************************
-#define PRCM_HIB_LOW_LEVEL        0x00000000
-#define PRCM_HIB_HIGH_LEVEL       0x00000001
-#define PRCM_HIB_FALL_EDGE        0x00000002
-#define PRCM_HIB_RISE_EDGE        0x00000003
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeupSourceEnable(),
-// PRCMHibernateWakeupSourceDisable(), PRCMHibernateWakeUpGPIOSelect()
-//*****************************************************************************
-#define PRCM_HIB_GPIO2            0x00010000
-#define PRCM_HIB_GPIO4            0x00020000
-#define PRCM_HIB_GPIO13           0x00040000
-#define PRCM_HIB_GPIO17           0x00080000
-#define PRCM_HIB_GPIO11           0x00100000
-#define PRCM_HIB_GPIO24           0x00200000
-#define PRCM_HIB_GPIO26           0x00400000
-
-//*****************************************************************************
-// Values that will be returned from PRCMSysResetCauseGet().
-//*****************************************************************************
-#define PRCM_POWER_ON             0x00000000
-#define PRCM_LPDS_EXIT            0x00000001
-#define PRCM_CORE_RESET           0x00000003
-#define PRCM_MCU_RESET            0x00000004
-#define PRCM_WDT_RESET            0x00000005
-#define PRCM_SOC_RESET            0x00000006
-#define PRCM_HIB_EXIT             0x00000007
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeupCauseGet().
-//*****************************************************************************
-#define PRCM_HIB_WAKEUP_CAUSE_SLOW_CLOCK  0x00000002
-#define PRCM_HIB_WAKEUP_CAUSE_GPIO        0x00000004
-
-//*****************************************************************************
-// Values that can be passed to PRCMIntEnable
-//*****************************************************************************
-#define PRCM_INT_SLOW_CLK_CTR     0x00004000
-
-//*****************************************************************************
-// Values that can be passed to PRCMPeripheralClkEnable(),
-// PRCMPeripheralClkDisable(), PRCMPeripheralReset()
-//*****************************************************************************
-#define PRCM_CAMERA               0x00000000
-#define PRCM_I2S                  0x00000001
-#define PRCM_SDHOST               0x00000002
-#define PRCM_GSPI                 0x00000003
-#define PRCM_LSPI                 0x00000004
-#define PRCM_UDMA                 0x00000005
-#define PRCM_GPIOA0               0x00000006
-#define PRCM_GPIOA1               0x00000007
-#define PRCM_GPIOA2               0x00000008
-#define PRCM_GPIOA3               0x00000009
-#define PRCM_GPIOA4               0x0000000A
-#define PRCM_WDT                  0x0000000B
-#define PRCM_UARTA0               0x0000000C
-#define PRCM_UARTA1               0x0000000D
-#define PRCM_TIMERA0              0x0000000E
-#define PRCM_TIMERA1              0x0000000F
-#define PRCM_TIMERA2              0x00000010
-#define PRCM_TIMERA3              0x00000011
-#define PRCM_DTHE                 0x00000012
-#define PRCM_SSPI                 0x00000013
-#define PRCM_I2CA0                0x00000014
-// Note : PRCM_ADC is a dummy define for pinmux utility code generation
-// PRCM_ADC should never be used in any user code. 
-#define PRCM_ADC                  0x000000FF 
-
-//*****************************************************************************
-// User bits in the PRCM persistent registers
-//*****************************************************************************
-#define PRCM_SAFE_BOOT_BIT              30
-#define PRCM_WDT_RESET_BIT              29
-#define PRCM_FIRST_BOOT_BIT             28
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void PRCMSetSpecialBit(unsigned char bit);
-extern void PRCMClearSpecialBit(unsigned char bit);
-extern tBoolean PRCMGetSpecialBit(unsigned char bit);
-extern void PRCMSOCReset(void);
-extern void PRCMMCUReset(tBoolean bIncludeSubsystem);
-extern unsigned long PRCMSysResetCauseGet(void);
-
-extern void PRCMPeripheralClkEnable(unsigned long ulPeripheral,
-                                    unsigned long ulClkFlags);
-extern void PRCMPeripheralClkDisable(unsigned long ulPeripheral,
-                                     unsigned long ulClkFlags);
-extern void PRCMPeripheralReset(unsigned long ulPeripheral);
-extern tBoolean PRCMPeripheralStatusGet(unsigned long ulPeripheral);
-
-extern void PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq);
-extern unsigned long PRCMPeripheralClockGet(unsigned long ulPeripheral);
-
-extern void PRCMSleepEnter(void);
-extern void PRCMDeepSleepEnter(void);
-
-extern void PRCMSRAMRetentionEnable(unsigned long ulSramColSel,
-                                    unsigned long ulFlags);
-extern void PRCMSRAMRetentionDisable(unsigned long ulSramColSel,
-                                     unsigned long ulFlags);
-extern void PRCMLPDSRestoreInfoSet(unsigned long ulRestoreSP,
-                                   unsigned long ulRestorePC);
-extern void PRCMLPDSEnter(void);
-extern void PRCMLPDSIntervalSet(unsigned long ulTicks);
-extern void PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc);
-extern unsigned long PRCMLPDSWakeupCauseGet(void);
-extern void PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin,
-                                     unsigned long ulType);
-extern void PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc);
-
-extern void PRCMHibernateEnter(void);
-extern void PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc);
-extern unsigned long PRCMHibernateWakeupCauseGet(void);
-extern void PRCMHibernateWakeUpGPIOSelect(unsigned long ulMultiGPIOBitMap,
-                                          unsigned long ulType);
-extern void PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc);
-extern void PRCMHibernateIntervalSet(unsigned long long ullTicks);
-
-extern unsigned long long PRCMSlowClkCtrGet(void);
-extern unsigned long long PRCMSlowClkCtrFastGet(void);
-extern void PRCMSlowClkCtrMatchSet(unsigned long long ullTicks);
-extern unsigned long long PRCMSlowClkCtrMatchGet(void);
-
-extern void PRCMOCRRegisterWrite(unsigned char ucIndex,
-                                 unsigned long ulRegValue);
-extern unsigned long PRCMOCRRegisterRead(unsigned char ucIndex);
-
-extern void PRCMIntRegister(void (*pfnHandler)(void));
-extern void PRCMIntUnregister(void);
-extern void PRCMIntEnable(unsigned long ulIntFlags);
-extern void PRCMIntDisable(unsigned long ulIntFlags);
-extern unsigned long PRCMIntStatus(void);
-extern void PRCMRTCInUseSet(void);
-extern void PRCMRTCInUseClear(void);
-extern tBoolean PRCMRTCInUseGet(void);
-extern void PRCMRTCSet(unsigned long ulSecs, unsigned short usMsec);
-extern void PRCMRTCGet(unsigned long *ulSecs, unsigned short *usMsec);
-extern void PRCMRTCMatchSet(unsigned long ulSecs, unsigned short usMsec);
-extern void PRCMRTCMatchGet(unsigned long *ulSecs, unsigned short *usMsec);
-extern void PRCMCC3200MCUInit(void);
-extern unsigned long PRCMHIBRegRead(unsigned long ulRegAddr);
-extern void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue);
-extern unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth);
-
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __PRCM_H__
diff --git a/ports/cc3200/hal/rom.h b/ports/cc3200/hal/rom.h
deleted file mode 100644
index 33a18b68fc..0000000000
--- a/ports/cc3200/hal/rom.h
+++ /dev/null
@@ -1,2237 +0,0 @@
-//*****************************************************************************
-//
-//  rom.h
-//
-//  Macros to facilitate calling functions in the ROM.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// THIS IS AN AUTO-GENERATED FILE.  DO NOT EDIT BY HAND.
-//
-//*****************************************************************************
-
-#ifndef __ROM_H__
-#define __ROM_H__
-
-//*****************************************************************************
-//
-// Pointers to the main API tables.
-//
-//*****************************************************************************
-#define ROM_APITABLE            ((unsigned long *)0x0000040C)
-#define ROM_VERSION             (ROM_APITABLE[0])
-#define ROM_UARTTABLE           ((unsigned long *)(ROM_APITABLE[1]))
-#define ROM_TIMERTABLE          ((unsigned long *)(ROM_APITABLE[2]))
-#define ROM_WATCHDOGTABLE       ((unsigned long *)(ROM_APITABLE[3]))
-#define ROM_INTERRUPTTABLE      ((unsigned long *)(ROM_APITABLE[4]))
-#define ROM_UDMATABLE           ((unsigned long *)(ROM_APITABLE[5]))
-#define ROM_PRCMTABLE           ((unsigned long *)(ROM_APITABLE[6]))
-#define ROM_I2CTABLE            ((unsigned long *)(ROM_APITABLE[7]))
-#define ROM_SPITABLE            ((unsigned long *)(ROM_APITABLE[8]))
-#define ROM_CAMERATABLE         ((unsigned long *)(ROM_APITABLE[9]))
-#define ROM_FLASHTABLE          ((unsigned long *)(ROM_APITABLE[10]))
-#define ROM_PINTABLE            ((unsigned long *)(ROM_APITABLE[11]))
-#define ROM_SYSTICKTABLE        ((unsigned long *)(ROM_APITABLE[12]))
-#define ROM_UTILSTABLE          ((unsigned long *)(ROM_APITABLE[13]))
-#define ROM_I2STABLE            ((unsigned long *)(ROM_APITABLE[14]))
-#define ROM_HWSPINLOCKTABLE     ((unsigned long *)(ROM_APITABLE[15]))
-#define ROM_GPIOTABLE           ((unsigned long *)(ROM_APITABLE[16]))
-#define ROM_AESTABLE            ((unsigned long *)(ROM_APITABLE[17]))
-#define ROM_DESTABLE            ((unsigned long *)(ROM_APITABLE[18]))
-#define ROM_SHAMD5TABLE         ((unsigned long *)(ROM_APITABLE[19]))
-#define ROM_CRCTABLE            ((unsigned long *)(ROM_APITABLE[20]))
-#define ROM_SDHOSTTABLE         ((unsigned long *)(ROM_APITABLE[21]))
-#define ROM_ADCTABLE            ((unsigned long *)(ROM_APITABLE[22]))
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Interrupt API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntEnable                                                         \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntMasterEnable                                                   \
-        ((tBoolean (*)(void))ROM_INTERRUPTTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntMasterDisable                                                  \
-        ((tBoolean (*)(void))ROM_INTERRUPTTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntDisable                                                        \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityGroupingSet                                            \
-        ((void (*)(unsigned long ulBits))ROM_INTERRUPTTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityGroupingGet                                            \
-        ((unsigned long (*)(void))ROM_INTERRUPTTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPrioritySet                                                    \
-        ((void (*)(unsigned long ulInterrupt,                                 \
-                   unsigned char ucPriority))ROM_INTERRUPTTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityGet                                                    \
-        ((long (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPendSet                                                        \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPendClear                                                      \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityMaskSet                                                \
-        ((void (*)(unsigned long ulPriorityMask))ROM_INTERRUPTTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityMaskGet                                                \
-        ((unsigned long (*)(void))ROM_INTERRUPTTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntRegister                                                       \
-        ((void (*)(unsigned long ulInterrupt,                                 \
-                   void (*pfnHandler)(void)))ROM_INTERRUPTTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntUnregister                                                     \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntVTableBaseSet                                                  \
-        ((void (*)(unsigned long ulVtableBase))ROM_INTERRUPTTABLE[14])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Timer API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerEnable                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer))ROM_TIMERTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerDisable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer))ROM_TIMERTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerConfigure                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulConfig))ROM_TIMERTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerControlLevel                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   tBoolean bInvert))ROM_TIMERTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerControlEvent                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulEvent))ROM_TIMERTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerControlStall                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   tBoolean bStall))ROM_TIMERTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleSet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleMatchSet                                             \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleMatchGet                                             \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerLoadSet                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerLoadGet                                                      \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerValueGet                                                     \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerMatchSet                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerMatchGet                                                     \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntRegister                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   void (*pfnHandler)(void)))ROM_TIMERTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntUnregister                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer))ROM_TIMERTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntEnable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_TIMERTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntDisable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_TIMERTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntStatus                                                    \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_TIMERTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntClear                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_TIMERTABLE[20])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the UART API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTParityModeSet                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulParity))ROM_UARTTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTParityModeGet                                                 \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFOLevelSet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTxLevel,                                   \
-                   unsigned long ulRxLevel))ROM_UARTTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFOLevelGet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *pulTxLevel,                                 \
-                   unsigned long *pulRxLevel))ROM_UARTTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTConfigSetExpClk                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulUARTClk,                                   \
-                   unsigned long ulBaud,                                      \
-                   unsigned long ulConfig))ROM_UARTTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTConfigGetExpClk                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulUARTClk,                                   \
-                   unsigned long *pulBaud,                                    \
-                   unsigned long *pulConfig))ROM_UARTTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTEnable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTDisable                                                       \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFOEnable                                                    \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFODisable                                                   \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharsAvail                                                    \
-        ((tBoolean (*)(unsigned long ulBase))ROM_UARTTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTSpaceAvail                                                    \
-        ((tBoolean (*)(unsigned long ulBase))ROM_UARTTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharGetNonBlocking                                            \
-        ((long (*)(unsigned long ulBase))ROM_UARTTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharGet                                                       \
-        ((long (*)(unsigned long ulBase))ROM_UARTTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharPutNonBlocking                                            \
-        ((tBoolean (*)(unsigned long ulBase,                                  \
-                       unsigned char ucData))ROM_UARTTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharPut                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned char ucData))ROM_UARTTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTBreakCtl                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   tBoolean bBreakState))ROM_UARTTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTBusy                                                          \
-        ((tBoolean (*)(unsigned long ulBase))ROM_UARTTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntRegister                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void(*pfnHandler)(void)))ROM_UARTTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntUnregister                                                 \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntEnable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_UARTTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntDisable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_UARTTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntStatus                                                     \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_UARTTABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntClear                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_UARTTABLE[23])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTDMAEnable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDMAFlags))ROM_UARTTABLE[24])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTDMADisable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDMAFlags))ROM_UARTTABLE[25])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTRxErrorGet                                                    \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[26])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTRxErrorClear                                                  \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[27])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemControlSet                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulControl))ROM_UARTTABLE[28])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemControlClear                                             \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulControl))ROM_UARTTABLE[29])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemControlGet                                               \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[30])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemStatusGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[31])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFlowControlSet                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulMode))ROM_UARTTABLE[32])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFlowControlGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[33])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTTxIntModeSet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulMode))ROM_UARTTABLE[34])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTTxIntModeGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[35])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the uDMA API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelTransferSet                                            \
-        ((void (*)(unsigned long ulChannelStructIndex,                        \
-                   unsigned long ulMode,                                      \
-                   void *pvSrcAddr,                                           \
-                   void *pvDstAddr,                                           \
-                   unsigned long ulTransferSize))ROM_UDMATABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAEnable                                                        \
-        ((void (*)(void))ROM_UDMATABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMADisable                                                       \
-        ((void (*)(void))ROM_UDMATABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAErrorStatusGet                                                \
-        ((unsigned long (*)(void))ROM_UDMATABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAErrorStatusClear                                              \
-        ((void (*)(void))ROM_UDMATABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelEnable                                                 \
-        ((void (*)(unsigned long ulChannelNum))ROM_UDMATABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelDisable                                                \
-        ((void (*)(unsigned long ulChannelNum))ROM_UDMATABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelIsEnabled                                              \
-        ((tBoolean (*)(unsigned long ulChannelNum))ROM_UDMATABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAControlBaseSet                                                \
-        ((void (*)(void *pControlTable))ROM_UDMATABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAControlBaseGet                                                \
-        ((void * (*)(void))ROM_UDMATABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelRequest                                                \
-        ((void (*)(unsigned long ulChannelNum))ROM_UDMATABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAttributeEnable                                        \
-        ((void (*)(unsigned long ulChannelNum,                                \
-                   unsigned long ulAttr))ROM_UDMATABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAttributeDisable                                       \
-        ((void (*)(unsigned long ulChannelNum,                                \
-                   unsigned long ulAttr))ROM_UDMATABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAttributeGet                                           \
-        ((unsigned long (*)(unsigned long ulChannelNum))ROM_UDMATABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelControlSet                                             \
-        ((void (*)(unsigned long ulChannelStructIndex,                        \
-                   unsigned long ulControl))ROM_UDMATABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelSizeGet                                                \
-        ((unsigned long (*)(unsigned long ulChannelStructIndex))ROM_UDMATABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelModeGet                                                \
-        ((unsigned long (*)(unsigned long ulChannelStructIndex))ROM_UDMATABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntStatus                                                     \
-        ((unsigned long (*)(void))ROM_UDMATABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntClear                                                      \
-        ((void (*)(unsigned long ulChanMask))ROM_UDMATABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAControlAlternateBaseGet                                       \
-        ((void * (*)(void))ROM_UDMATABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelScatterGatherSet                                       \
-        ((void (*)(unsigned long ulChannelNum,                                \
-                   unsigned ulTaskCount,                                      \
-                   void *pvTaskList,                                          \
-                   unsigned long ulIsPeriphSG))ROM_UDMATABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAssign                                                 \
-        ((void (*)(unsigned long ulMapping))ROM_UDMATABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntRegister                                                   \
-        ((void (*)(unsigned long ulIntChannel,                                \
-                   void (*pfnHandler)(void)))ROM_UDMATABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntUnregister                                                 \
-        ((void (*)(unsigned long ulIntChannel))ROM_UDMATABLE[23])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Watchdog API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntClear                                                  \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogRunning                                                   \
-        ((tBoolean (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogEnable                                                    \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogLock                                                      \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogUnlock                                                    \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogLockState                                                 \
-        ((tBoolean (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogReloadSet                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulLoadVal))ROM_WATCHDOGTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogReloadGet                                                 \
-        ((unsigned long (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogValueGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntStatus                                                 \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_WATCHDOGTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogStallEnable                                               \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogStallDisable                                              \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntRegister                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void(*pfnHandler)(void)))ROM_WATCHDOGTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntUnregister                                             \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[14])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the I2C API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CIntRegister                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(pfnHandler)(void)))ROM_I2CTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CIntUnregister                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CTxFIFOConfigSet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CTxFIFOFlush                                                    \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CRxFIFOConfigSet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CRxFIFOFlush                                                    \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFOStatus                                                     \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataPut                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Data))ROM_I2CTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataPutNonBlocking                                         \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       uint8_t ui8Data))ROM_I2CTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataGet                                                    \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataGetNonBlocking                                         \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       uint8_t *pui8Data))ROM_I2CTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBurstLengthSet                                           \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Length))ROM_I2CTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBurstCountGet                                            \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterGlitchFilterConfigSet                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveFIFOEnable                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveFIFODisable                                               \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBusBusy                                                  \
-        ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBusy                                                     \
-        ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterControl                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Cmd))ROM_I2CTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterDataGet                                                  \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterDataPut                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Data))ROM_I2CTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterDisable                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterEnable                                                   \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterErr                                                      \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[23])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntClear                                                 \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[24])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntDisable                                               \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[25])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntEnable                                                \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[26])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntStatus                                                \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   bool bMasked))ROM_I2CTABLE[27])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntEnableEx                                              \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[28])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntDisableEx                                             \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[29])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntStatusEx                                              \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_I2CTABLE[30])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntClearEx                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[31])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterTimeoutSet                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Value))ROM_I2CTABLE[32])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveACKOverride                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   bool bEnable))ROM_I2CTABLE[33])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveACKValueSet                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   bool bACK))ROM_I2CTABLE[34])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterLineStateGet                                             \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[35])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterSlaveAddrSet                                             \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8SlaveAddr,                                      \
-                   bool bReceive))ROM_I2CTABLE[36])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveDataGet                                                   \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[37])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveDataPut                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Data))ROM_I2CTABLE[38])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveDisable                                                   \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[39])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveEnable                                                    \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[40])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveInit                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8SlaveAddr))ROM_I2CTABLE[41])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveAddressSet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8AddrNum,                                        \
-                   uint8_t ui8SlaveAddr))ROM_I2CTABLE[42])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntClear                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[43])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntDisable                                                \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[44])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntEnable                                                 \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[45])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntClearEx                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[46])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntDisableEx                                              \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[47])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntEnableEx                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[48])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntStatus                                                 \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   bool bMasked))ROM_I2CTABLE[49])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntStatusEx                                               \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_I2CTABLE[50])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveStatus                                                    \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[51])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterInitExpClk                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32I2CClk,                                       \
-                   bool bFast))ROM_I2CTABLE[52])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SPI API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIEnable                                                         \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDisable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIReset                                                          \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIConfigSetExpClk                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulSPIClk,                                     \
-                   unsigned long ulBitRate,                                   \
-                   unsigned long ulMode,                                      \
-                   unsigned long ulSubMode,                                   \
-                   unsigned long ulConfig))ROM_SPITABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataGetNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long * pulData))ROM_SPITABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataGet                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *pulData))ROM_SPITABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataPutNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long ulData))ROM_SPITABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataPut                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulData))ROM_SPITABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFOEnable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFODisable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFOLevelSet                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTxLevel,                                   \
-                   unsigned long ulRxLevel))ROM_SPITABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFOLevelGet                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *pulTxLevel,                                 \
-                   unsigned long *pulRxLevel))ROM_SPITABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIWordCountSet                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulWordCount))ROM_SPITABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntRegister                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void(*pfnHandler)(void)))ROM_SPITABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntUnregister                                                  \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_SPITABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_SPITABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntStatus                                                      \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_SPITABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntClear                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_SPITABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDmaEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDmaDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPICSEnable                                                       \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPICSDisable                                                      \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPITransfer                                                       \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned char *ucDout,                                     \
-                   unsigned char *ucDin,                                      \
-                   unsigned long ulSize,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[23])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the CAM API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraReset                                                       \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraParamsConfig                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulHSPol,                                     \
-                   unsigned long ulVSPol,                                     \
-                   unsigned long ulFlags))ROM_CAMERATABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraXClkConfig                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulCamClkIn,                                  \
-                   unsigned long ulXClk))ROM_CAMERATABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraXClkSet                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned char bXClkFlags))ROM_CAMERATABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraDMAEnable                                                   \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraDMADisable                                                  \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraThresholdSet                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulThreshold))ROM_CAMERATABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntRegister                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void (*pfnHandler)(void)))ROM_CAMERATABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntUnregister                                               \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_CAMERATABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntDisable                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_CAMERATABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntStatus                                                   \
-        ((unsigned long (*)(unsigned long ulBase))ROM_CAMERATABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntClear                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_CAMERATABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraCaptureStop                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   tBoolean bImmediate))ROM_CAMERATABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraCaptureStart                                                \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraBufferRead                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long *pBuffer,                                     \
-                   unsigned char ucSize))ROM_CAMERATABLE[15])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the FLASH API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashDisable                                                      \
-        ((void (*)(void))ROM_FLASHTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashErase                                                        \
-        ((long (*)(unsigned long ulAddress))ROM_FLASHTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashMassErase                                                    \
-        ((long (*)(void))ROM_FLASHTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashMassEraseNonBlocking                                         \
-        ((void (*)(void))ROM_FLASHTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashEraseNonBlocking                                             \
-        ((void (*)(unsigned long ulAddress))ROM_FLASHTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashProgram                                                      \
-        ((long (*)(unsigned long *pulData,                                    \
-                   unsigned long ulAddress,                                   \
-                   unsigned long ulCount))ROM_FLASHTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashProgramNonBlocking                                           \
-        ((long (*)(unsigned long *pulData,                                    \
-                   unsigned long ulAddress,                                   \
-                   unsigned long ulCount))ROM_FLASHTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntRegister                                                  \
-        ((void (*)(void (*pfnHandler)(void)))ROM_FLASHTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntUnregister                                                \
-        ((void (*)(void))ROM_FLASHTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntEnable                                                    \
-        ((void (*)(unsigned long ulIntFlags))ROM_FLASHTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntDisable                                                   \
-        ((void (*)(unsigned long ulIntFlags))ROM_FLASHTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntStatus                                                    \
-        ((unsigned long (*)(tBoolean bMasked))ROM_FLASHTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntClear                                                     \
-        ((void (*)(unsigned long ulIntFlags))ROM_FLASHTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashProtectGet                                                   \
-        ((tFlashProtection (*)(unsigned long ulAddress))ROM_FLASHTABLE[13])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Pin API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinModeSet                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                   unsigned long ulPinMode))ROM_PINTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinDirModeSet                                                     \
-        ((void (*)(unsigned long ulPin,                                       \
-                   unsigned long ulPinIO))ROM_PINTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinDirModeGet                                                     \
-        ((unsigned long (*)(unsigned long ulPin))ROM_PINTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinModeGet                                                        \
-        ((unsigned long (*)(unsigned long ulPin))ROM_PINTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinConfigGet                                                      \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long  *pulPinStrength,                             \
-                   unsigned long *pulPinType))ROM_PINTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinConfigSet                                                      \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long  ulPinStrength,                               \
-                   unsigned long ulPinType))ROM_PINTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeUART                                                       \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeI2C                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeSPI                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeI2S                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeTimer                                                      \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeCamera                                                     \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeGPIO                                                       \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode,                                    \
-                   tBoolean bOpenDrain))ROM_PINTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeADC                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeSDHost                                                     \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[14])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SYSTICK API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickEnable                                                     \
-        ((void (*)(void))ROM_SYSTICKTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickDisable                                                    \
-        ((void (*)(void))ROM_SYSTICKTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntRegister                                                \
-        ((void (*)(void (*pfnHandler)(void)))ROM_SYSTICKTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntUnregister                                              \
-        ((void (*)(void))ROM_SYSTICKTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntEnable                                                  \
-        ((void (*)(void))ROM_SYSTICKTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntDisable                                                 \
-        ((void (*)(void))ROM_SYSTICKTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickPeriodSet                                                  \
-        ((void (*)(unsigned long ulPeriod))ROM_SYSTICKTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickPeriodGet                                                  \
-        ((unsigned long (*)(void))ROM_SYSTICKTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickValueGet                                                   \
-        ((unsigned long (*)(void))ROM_SYSTICKTABLE[8])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the UTILS API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_UtilsDelay                                                        \
-        ((void (*)(unsigned long ulCount))ROM_UTILSTABLE[0])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the I2S API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SEnable                                                         \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulMode))ROM_I2STABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDisable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataPut                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long ulData))ROM_I2STABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataPutNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long ulData))ROM_I2STABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataGet                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long *pulData))ROM_I2STABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataGetNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long *pulData))ROM_I2STABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SConfigSetExpClk                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulI2SClk,                                    \
-                   unsigned long ulBitClk,                                    \
-                   unsigned long ulConfig))ROM_I2STABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2STxFIFOEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTxLevel,                                   \
-                   unsigned long ulWordsPerTransfer))ROM_I2STABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2STxFIFODisable                                                  \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SRxFIFOEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulRxLevel,                                   \
-                   unsigned long ulWordsPerTransfer))ROM_I2STABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SRxFIFODisable                                                  \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2STxFIFOStatusGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_I2STABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SRxFIFOStatusGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_I2STABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SSerializerConfig                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long ulSerMode,                                   \
-                   unsigned long ulInActState))ROM_I2STABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_I2STABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_I2STABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntStatus                                                      \
-        ((unsigned long (*)(unsigned long ulBase))ROM_I2STABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntClear                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_I2STABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntRegister                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void (*pfnHandler)(void)))ROM_I2STABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntUnregister                                                  \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[19])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the GPIO API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODirModeSet                                                    \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins,                                      \
-                   unsigned long ulPinIO))ROM_GPIOTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODirModeGet                                                    \
-        ((unsigned long (*)(unsigned long ulPort,                             \
-                            unsigned char ucPin))ROM_GPIOTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntTypeSet                                                    \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins,                                      \
-                   unsigned long ulIntType))ROM_GPIOTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODMATriggerEnable                                              \
-        ((void (*)(unsigned long ulPort))ROM_GPIOTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODMATriggerDisable                                             \
-        ((void (*)(unsigned long ulPort))ROM_GPIOTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntTypeGet                                                    \
-        ((unsigned long (*)(unsigned long ulPort,                             \
-                            unsigned char ucPin))ROM_GPIOTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntEnable                                                     \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned long ulIntFlags))ROM_GPIOTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntDisable                                                    \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned long ulIntFlags))ROM_GPIOTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntStatus                                                     \
-        ((long (*)(unsigned long ulPort,                                      \
-                   tBoolean bMasked))ROM_GPIOTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntClear                                                      \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned long ulIntFlags))ROM_GPIOTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntRegister                                                   \
-        ((void (*)(unsigned long ulPort,                                      \
-                   void (*pfnIntHandler)(void)))ROM_GPIOTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntUnregister                                                 \
-        ((void (*)(unsigned long ulPort))ROM_GPIOTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOPinRead                                                       \
-        ((long (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins))ROM_GPIOTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOPinWrite                                                      \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins,                                      \
-                   unsigned char ucVal))ROM_GPIOTABLE[13])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the AES API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESConfigSet                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_AESTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESKey1Set                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key,                                          \
-                   uint32_t ui32Keysize))ROM_AESTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESKey2Set                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key,                                          \
-                   uint32_t ui32Keysize))ROM_AESTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESKey3Set                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key))ROM_AESTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIVSet                                                          \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8IVdata))ROM_AESTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESTagRead                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8TagData))ROM_AESTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataLengthSet                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint64_t ui64Length))ROM_AESTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESAuthDataLengthSet                                              \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Length))ROM_AESTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataReadNonBlocking                                            \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_AESTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataRead                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_AESTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataWriteNonBlocking                                           \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_AESTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataWrite                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_AESTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataProcess                                                    \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t *pui8Dest,                                         \
-                   uint32_t ui32Length))ROM_AESTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataMAC                                                        \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint32_t ui32Length,                                       \
-                   uint8_t *pui8Tag))ROM_AESTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataProcessAE                                                  \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t *pui8Dest,                                         \
-                   uint32_t ui32Length,                                       \
-                   uint8_t *pui8AuthSrc,                                      \
-                   uint32_t ui32AuthLength,                                   \
-                   uint8_t *pui8Tag))ROM_AESTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntStatus                                                      \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_AESTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_AESTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntDisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_AESTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntClear                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_AESTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntRegister                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(*pfnHandler)(void)))ROM_AESTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntUnregister                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_AESTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDMAEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_AESTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDMADisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_AESTABLE[22])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the DES API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESConfigSet                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_DESTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataRead                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_DESTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataReadNonBlocking                                            \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_DESTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataProcess                                                    \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t *pui8Dest,                                         \
-                   uint32_t ui32Length))ROM_DESTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataWrite                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_DESTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataWriteNonBlocking                                           \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_DESTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDMADisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_DESTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDMAEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_DESTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntClear                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_DESTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntDisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_DESTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_DESTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntRegister                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(*pfnHandler)(void)))ROM_DESTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntStatus                                                      \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_DESTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntUnregister                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_DESTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIVSet                                                          \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8IVdata))ROM_DESTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESKeySet                                                         \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key))ROM_DESTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataLengthSet                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Length))ROM_DESTABLE[16])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SHAMD5 API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5ConfigSet                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Mode))ROM_SHAMD5TABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataProcess                                                 \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8DataSrc,                                      \
-                   uint32_t ui32DataLength,                                   \
-                   uint8_t *pui8HashResult))ROM_SHAMD5TABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataWrite                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataWriteNonBlocking                                        \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DMADisable                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DMAEnable                                                   \
-        ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataLengthSet                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Length))ROM_SHAMD5TABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACKeySet                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACPPKeyGenerate                                           \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key,                                          \
-                   uint8_t *pui8PPKey))ROM_SHAMD5TABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACPPKeySet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACProcess                                                 \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8DataSrc,                                      \
-                   uint32_t ui32DataLength,                                   \
-                   uint8_t *pui8HashResult))ROM_SHAMD5TABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntClear                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_SHAMD5TABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntDisable                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_SHAMD5TABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntEnable                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_SHAMD5TABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntRegister                                                 \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(*pfnHandler)(void)))ROM_SHAMD5TABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntStatus                                                   \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_SHAMD5TABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntUnregister                                               \
-        ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5ResultRead                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest))ROM_SHAMD5TABLE[17])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the CRC API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCConfigSet                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32CRCConfig))ROM_CRCTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCDataProcess                                                    \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       void *puiDataIn,                                       \
-                       uint32_t ui32DataLength,                               \
-                       uint32_t ui32Config))ROM_CRCTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCDataWrite                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Data))ROM_CRCTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCResultRead                                                     \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_CRCTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCSeedSet                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Seed))ROM_CRCTABLE[4])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SDHOST API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostCmdReset                                                    \
-        ((void (*)(unsigned long ulBase))ROM_SDHOSTTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostInit                                                        \
-        ((void (*)(unsigned long ulBase))ROM_SDHOSTTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostCmdSend                                                     \
-        ((long (*)(unsigned long ulBase,                                      \
-                  unsigned long ulCmd,                                        \
-                   unsigned ulArg))ROM_SDHOSTTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntRegister                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void (*pfnHandler)(void)))ROM_SDHOSTTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntUnregister                                               \
-        ((void (*)(unsigned long ulBase))ROM_SDHOSTTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulIntFlags))ROM_SDHOSTTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntDisable                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulIntFlags))ROM_SDHOSTTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntStatus                                                   \
-        ((unsigned long (*)(unsigned long ulBase))ROM_SDHOSTTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntClear                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulIntFlags))ROM_SDHOSTTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostRespStatus                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_SDHOSTTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostRespGet                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulRespnse[4]))ROM_SDHOSTTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostBlockSizeSet                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned short ulBlkSize))ROM_SDHOSTTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostBlockCountSet                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned short ulBlkCount))ROM_SDHOSTTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataNonBlockingWrite                                        \
-        ((tBoolean (*)(unsigned long ulBase,                                  \
-                       unsigned long ulData))ROM_SDHOSTTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataNonBlockingRead                                         \
-        ((tBoolean (*)(unsigned long ulBase,                                  \
-                       unsigned long *pulData))ROM_SDHOSTTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataWrite                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulData))ROM_SDHOSTTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataRead                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *ulData))ROM_SDHOSTTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostSetExpClk                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulSDHostClk,                                 \
-                   unsigned long ulCardClk))ROM_SDHOSTTABLE[17])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the PRCM API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMMCUReset                                                      \
-        ((void (*)(tBoolean bIncludeSubsystem))ROM_PRCMTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSysResetCauseGet                                              \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralClkEnable                                           \
-        ((void (*)(unsigned long ulPeripheral,                                \
-                   unsigned long ulClkFlags))ROM_PRCMTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralClkDisable                                          \
-        ((void (*)(unsigned long ulPeripheral,                                \
-                   unsigned long ulClkFlags))ROM_PRCMTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralReset                                               \
-        ((void (*)(unsigned long ulPeripheral))ROM_PRCMTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralStatusGet                                           \
-        ((tBoolean (*)(unsigned long ulPeripheral))ROM_PRCMTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMI2SClockFreqSet                                               \
-        ((void (*)(unsigned long ulI2CClkFreq))ROM_PRCMTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralClockGet                                            \
-        ((unsigned long (*)(unsigned long ulPeripheral))ROM_PRCMTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSleepEnter                                                    \
-        ((void (*)(void))ROM_PRCMTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMDeepSleepEnter                                                \
-        ((void (*)(void))ROM_PRCMTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSRAMRetentionEnable                                           \
-        ((void (*)(unsigned long ulSramColSel,                                \
-                   unsigned long ulFlags))ROM_PRCMTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSRAMRetentionDisable                                          \
-        ((void (*)(unsigned long ulSramColSel,                                \
-                   unsigned long ulFlags))ROM_PRCMTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSEnter                                                     \
-        ((void (*)(void))ROM_PRCMTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSIntervalSet                                               \
-        ((void (*)(unsigned long ulTicks))ROM_PRCMTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeupSourceEnable                                        \
-        ((void (*)(unsigned long ulLpdsWakeupSrc))ROM_PRCMTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeupCauseGet                                            \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeUpGPIOSelect                                          \
-        ((void (*)(unsigned long ulGPIOPin,                                   \
-                   unsigned long ulType))ROM_PRCMTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeupSourceDisable                                       \
-        ((void (*)(unsigned long ulLpdsWakeupSrc))ROM_PRCMTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateEnter                                                \
-        ((void (*)(void))ROM_PRCMTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeupSourceEnable                                   \
-        ((void (*)(unsigned long ulHIBWakupSrc))ROM_PRCMTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeupCauseGet                                       \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeUpGPIOSelect                                     \
-        ((void (*)(unsigned long ulMultiGPIOBitMap,                           \
-                   unsigned long ulType))ROM_PRCMTABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeupSourceDisable                                  \
-        ((void (*)(unsigned long ulHIBWakupSrc))ROM_PRCMTABLE[23])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateIntervalSet                                          \
-        ((void (*)(unsigned long long ullTicks))ROM_PRCMTABLE[24])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSlowClkCtrGet                                                 \
-        ((unsigned long long (*)(void))ROM_PRCMTABLE[25])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSlowClkCtrMatchSet                                            \
-        ((void (*)(unsigned long long ullTicks))ROM_PRCMTABLE[26])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSlowClkCtrMatchGet                                            \
-        ((unsigned long long (*)(void))ROM_PRCMTABLE[27])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMOCRRegisterWrite                                              \
-        ((void (*)(unsigned char ucIndex,                                     \
-                   unsigned long ulRegValue))ROM_PRCMTABLE[28])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMOCRRegisterRead                                               \
-        ((unsigned long (*)(unsigned char ucIndex))ROM_PRCMTABLE[29])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntRegister                                                   \
-        ((void (*)(void (*pfnHandler)(void)))ROM_PRCMTABLE[30])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntUnregister                                                 \
-        ((void (*)(void))ROM_PRCMTABLE[31])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntEnable                                                     \
-        ((void (*)(unsigned long ulIntFlags))ROM_PRCMTABLE[32])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntDisable                                                    \
-        ((void (*)(unsigned long ulIntFlags))ROM_PRCMTABLE[33])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntStatus                                                     \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[34])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCInUseSet                                                   \
-        ((void (*)(void))ROM_PRCMTABLE[35])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCInUseGet                                                   \
-        ((tBoolean (*)(void))ROM_PRCMTABLE[36])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCSet                                                        \
-        ((void (*)(unsigned long ulSecs,                                      \
-                   unsigned short usMsec))ROM_PRCMTABLE[37])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCGet                                                        \
-        ((void (*)(unsigned long *ulSecs,                                     \
-                   unsigned short *usMsec))ROM_PRCMTABLE[38])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCMatchSet                                                   \
-        ((void (*)(unsigned long ulSecs,                                      \
-                   unsigned short usMsec))ROM_PRCMTABLE[39])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCMatchGet                                                   \
-        ((void (*)(unsigned long *ulSecs,                                     \
-                   unsigned short *usMsec))ROM_PRCMTABLE[40])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSRestoreInfoSet                                            \
-        ((void (*)(unsigned long ulRestoreSP,                                 \
-                   unsigned long ulRestorePC))ROM_PRCMTABLE[41])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the HWSPINLOCK API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockAcquire                                                 \
-        ((void (*)(uint32_t ui32LockID))ROM_HWSPINLOCKTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockTryAcquire                                              \
-        ((int32_t (*)(uint32_t ui32LockID,                                    \
-                      uint32_t ui32Retry))ROM_HWSPINLOCKTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockRelease                                                 \
-        ((void (*)(uint32_t ui32LockID))ROM_HWSPINLOCKTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockTest                                                    \
-        ((uint32_t (*)(uint32_t ui32LockID,                                   \
-                       bool bCurrentStatus))ROM_HWSPINLOCKTABLE[3])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the ADC API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCEnable                                                         \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCDisable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannelEnable                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulChannel))ROM_ADCTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannelDisable                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulChannel))ROM_ADCTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntRegister                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   void (*pfnHandler)(void)))ROM_ADCTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntUnregister                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel))ROM_ADCTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned long ulIntFlags))ROM_ADCTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned long ulIntFlags))ROM_ADCTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntStatus                                                      \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                           unsigned long ulChannel))ROM_ADCTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntClear                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned long ulIntFlags))ROM_ADCTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCDMAEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel))ROM_ADCTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCDMADisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel))ROM_ADCTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannelGainSet                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned char ucGain))ROM_ADCTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannleGainGet                                                 \
-        ((unsigned char (*)(unsigned long ulBase,                             \
-                            unsigned long ulChannel))ROM_ADCTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerConfig                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulValue))ROM_ADCTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerEnable                                                    \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerDisable                                                   \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerReset                                                     \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerValueGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_ADCTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCFIFOLvlGet                                                     \
-        ((unsigned char (*)(unsigned long ulBase,                             \
-                            unsigned long ulChannel))ROM_ADCTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCFIFORead                                                       \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulChannel))ROM_ADCTABLE[20])
-#endif
-
-#endif // __ROM_H__
diff --git a/ports/cc3200/hal/rom_map.h b/ports/cc3200/hal/rom_map.h
deleted file mode 100644
index 86a6c75fca..0000000000
--- a/ports/cc3200/hal/rom_map.h
+++ /dev/null
@@ -1,3177 +0,0 @@
-//*****************************************************************************
-//
-//  rom_map.h
-//
-//  Macros to facilitate calling functions in the ROM when they are
-//  available and in flash otherwise.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// THIS IS AN AUTO-GENERATED FILE.  DO NOT EDIT BY HAND.
-//
-//*****************************************************************************
-
-#ifndef __ROM_MAP_H__
-#define __ROM_MAP_H__
-#ifndef DEBUG
-#include "rom.h"
-#endif
-#include "rom_patch.h"
-
-//*****************************************************************************
-//
-// Macros for the Interrupt API.
-//
-//*****************************************************************************
-#ifdef ROM_IntEnable
-#define MAP_IntEnable \
-        ROM_IntEnable
-#else
-#define MAP_IntEnable \
-        IntEnable
-#endif
-#ifdef ROM_IntMasterEnable
-#define MAP_IntMasterEnable \
-        ROM_IntMasterEnable
-#else
-#define MAP_IntMasterEnable \
-        IntMasterEnable
-#endif
-#ifdef ROM_IntMasterDisable
-#define MAP_IntMasterDisable \
-        ROM_IntMasterDisable
-#else
-#define MAP_IntMasterDisable \
-        IntMasterDisable
-#endif
-#ifdef ROM_IntDisable
-#define MAP_IntDisable \
-        ROM_IntDisable
-#else
-#define MAP_IntDisable \
-        IntDisable
-#endif
-#ifdef ROM_IntPriorityGroupingSet
-#define MAP_IntPriorityGroupingSet \
-        ROM_IntPriorityGroupingSet
-#else
-#define MAP_IntPriorityGroupingSet \
-        IntPriorityGroupingSet
-#endif
-#ifdef ROM_IntPriorityGroupingGet
-#define MAP_IntPriorityGroupingGet \
-        ROM_IntPriorityGroupingGet
-#else
-#define MAP_IntPriorityGroupingGet \
-        IntPriorityGroupingGet
-#endif
-#ifdef ROM_IntPrioritySet
-#define MAP_IntPrioritySet \
-        ROM_IntPrioritySet
-#else
-#define MAP_IntPrioritySet \
-        IntPrioritySet
-#endif
-#ifdef ROM_IntPriorityGet
-#define MAP_IntPriorityGet \
-        ROM_IntPriorityGet
-#else
-#define MAP_IntPriorityGet \
-        IntPriorityGet
-#endif
-#ifdef ROM_IntPendSet
-#define MAP_IntPendSet \
-        ROM_IntPendSet
-#else
-#define MAP_IntPendSet \
-        IntPendSet
-#endif
-#ifdef ROM_IntPendClear
-#define MAP_IntPendClear \
-        ROM_IntPendClear
-#else
-#define MAP_IntPendClear \
-        IntPendClear
-#endif
-#ifdef ROM_IntPriorityMaskSet
-#define MAP_IntPriorityMaskSet \
-        ROM_IntPriorityMaskSet
-#else
-#define MAP_IntPriorityMaskSet \
-        IntPriorityMaskSet
-#endif
-#ifdef ROM_IntPriorityMaskGet
-#define MAP_IntPriorityMaskGet \
-        ROM_IntPriorityMaskGet
-#else
-#define MAP_IntPriorityMaskGet \
-        IntPriorityMaskGet
-#endif
-#ifdef ROM_IntRegister
-#define MAP_IntRegister \
-        ROM_IntRegister
-#else
-#define MAP_IntRegister \
-        IntRegister
-#endif
-#ifdef ROM_IntUnregister
-#define MAP_IntUnregister \
-        ROM_IntUnregister
-#else
-#define MAP_IntUnregister \
-        IntUnregister
-#endif
-#ifdef ROM_IntVTableBaseSet
-#define MAP_IntVTableBaseSet \
-        ROM_IntVTableBaseSet
-#else
-#define MAP_IntVTableBaseSet \
-        IntVTableBaseSet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the Timer API.
-//
-//*****************************************************************************
-#ifdef ROM_TimerEnable
-#define MAP_TimerEnable \
-        ROM_TimerEnable
-#else
-#define MAP_TimerEnable \
-        TimerEnable
-#endif
-#ifdef ROM_TimerDisable
-#define MAP_TimerDisable \
-        ROM_TimerDisable
-#else
-#define MAP_TimerDisable \
-        TimerDisable
-#endif
-#ifdef ROM_TimerConfigure
-#define MAP_TimerConfigure \
-        ROM_TimerConfigure
-#else
-#define MAP_TimerConfigure \
-        TimerConfigure
-#endif
-#ifdef ROM_TimerControlLevel
-#define MAP_TimerControlLevel \
-        ROM_TimerControlLevel
-#else
-#define MAP_TimerControlLevel \
-        TimerControlLevel
-#endif
-#ifdef ROM_TimerControlEvent
-#define MAP_TimerControlEvent \
-        ROM_TimerControlEvent
-#else
-#define MAP_TimerControlEvent \
-        TimerControlEvent
-#endif
-#ifdef ROM_TimerControlStall
-#define MAP_TimerControlStall \
-        ROM_TimerControlStall
-#else
-#define MAP_TimerControlStall \
-        TimerControlStall
-#endif
-#ifdef ROM_TimerPrescaleSet
-#define MAP_TimerPrescaleSet \
-        ROM_TimerPrescaleSet
-#else
-#define MAP_TimerPrescaleSet \
-        TimerPrescaleSet
-#endif
-#ifdef ROM_TimerPrescaleGet
-#define MAP_TimerPrescaleGet \
-        ROM_TimerPrescaleGet
-#else
-#define MAP_TimerPrescaleGet \
-        TimerPrescaleGet
-#endif
-#ifdef ROM_TimerPrescaleMatchSet
-#define MAP_TimerPrescaleMatchSet \
-        ROM_TimerPrescaleMatchSet
-#else
-#define MAP_TimerPrescaleMatchSet \
-        TimerPrescaleMatchSet
-#endif
-#ifdef ROM_TimerPrescaleMatchGet
-#define MAP_TimerPrescaleMatchGet \
-        ROM_TimerPrescaleMatchGet
-#else
-#define MAP_TimerPrescaleMatchGet \
-        TimerPrescaleMatchGet
-#endif
-#ifdef ROM_TimerLoadSet
-#define MAP_TimerLoadSet \
-        ROM_TimerLoadSet
-#else
-#define MAP_TimerLoadSet \
-        TimerLoadSet
-#endif
-#ifdef ROM_TimerLoadGet
-#define MAP_TimerLoadGet \
-        ROM_TimerLoadGet
-#else
-#define MAP_TimerLoadGet \
-        TimerLoadGet
-#endif
-#ifdef ROM_TimerValueGet
-#define MAP_TimerValueGet \
-        ROM_TimerValueGet
-#else
-#define MAP_TimerValueGet \
-        TimerValueGet
-#endif
-#ifdef ROM_TimerMatchSet
-#define MAP_TimerMatchSet \
-        ROM_TimerMatchSet
-#else
-#define MAP_TimerMatchSet \
-        TimerMatchSet
-#endif
-#ifdef ROM_TimerMatchGet
-#define MAP_TimerMatchGet \
-        ROM_TimerMatchGet
-#else
-#define MAP_TimerMatchGet \
-        TimerMatchGet
-#endif
-#ifdef ROM_TimerIntRegister
-#define MAP_TimerIntRegister \
-        ROM_TimerIntRegister
-#else
-#define MAP_TimerIntRegister \
-        TimerIntRegister
-#endif
-#ifdef ROM_TimerIntUnregister
-#define MAP_TimerIntUnregister \
-        ROM_TimerIntUnregister
-#else
-#define MAP_TimerIntUnregister \
-        TimerIntUnregister
-#endif
-#ifdef ROM_TimerIntEnable
-#define MAP_TimerIntEnable \
-        ROM_TimerIntEnable
-#else
-#define MAP_TimerIntEnable \
-        TimerIntEnable
-#endif
-#ifdef ROM_TimerIntDisable
-#define MAP_TimerIntDisable \
-        ROM_TimerIntDisable
-#else
-#define MAP_TimerIntDisable \
-        TimerIntDisable
-#endif
-#ifdef ROM_TimerIntStatus
-#define MAP_TimerIntStatus \
-        ROM_TimerIntStatus
-#else
-#define MAP_TimerIntStatus \
-        TimerIntStatus
-#endif
-#ifdef ROM_TimerIntClear
-#define MAP_TimerIntClear \
-        ROM_TimerIntClear
-#else
-#define MAP_TimerIntClear \
-        TimerIntClear
-#endif
-#ifdef ROM_TimerDMAEventSet
-#define MAP_TimerDMAEventSet \
-        ROM_TimerDMAEventSet
-#else
-#define MAP_TimerDMAEventSet \
-        TimerDMAEventSet
-#endif
-#ifdef ROM_TimerDMAEventGet
-#define MAP_TimerDMAEventGet \
-        ROM_TimerDMAEventGet
-#else
-#define MAP_TimerDMAEventGet \
-        TimerDMAEventGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the UART API.
-//
-//*****************************************************************************
-#ifdef ROM_UARTParityModeSet
-#define MAP_UARTParityModeSet \
-        ROM_UARTParityModeSet
-#else
-#define MAP_UARTParityModeSet \
-        UARTParityModeSet
-#endif
-#ifdef ROM_UARTParityModeGet
-#define MAP_UARTParityModeGet \
-        ROM_UARTParityModeGet
-#else
-#define MAP_UARTParityModeGet \
-        UARTParityModeGet
-#endif
-#ifdef ROM_UARTFIFOLevelSet
-#define MAP_UARTFIFOLevelSet \
-        ROM_UARTFIFOLevelSet
-#else
-#define MAP_UARTFIFOLevelSet \
-        UARTFIFOLevelSet
-#endif
-#ifdef ROM_UARTFIFOLevelGet
-#define MAP_UARTFIFOLevelGet \
-        ROM_UARTFIFOLevelGet
-#else
-#define MAP_UARTFIFOLevelGet \
-        UARTFIFOLevelGet
-#endif
-#ifdef ROM_UARTConfigSetExpClk
-#define MAP_UARTConfigSetExpClk \
-        ROM_UARTConfigSetExpClk
-#else
-#define MAP_UARTConfigSetExpClk \
-        UARTConfigSetExpClk
-#endif
-#ifdef ROM_UARTConfigGetExpClk
-#define MAP_UARTConfigGetExpClk \
-        ROM_UARTConfigGetExpClk
-#else
-#define MAP_UARTConfigGetExpClk \
-        UARTConfigGetExpClk
-#endif
-#ifdef ROM_UARTEnable
-#define MAP_UARTEnable \
-        ROM_UARTEnable
-#else
-#define MAP_UARTEnable \
-        UARTEnable
-#endif
-#ifdef ROM_UARTDisable
-#define MAP_UARTDisable \
-        ROM_UARTDisable
-#else
-#define MAP_UARTDisable \
-        UARTDisable
-#endif
-#ifdef ROM_UARTFIFOEnable
-#define MAP_UARTFIFOEnable \
-        ROM_UARTFIFOEnable
-#else
-#define MAP_UARTFIFOEnable \
-        UARTFIFOEnable
-#endif
-#ifdef ROM_UARTFIFODisable
-#define MAP_UARTFIFODisable \
-        ROM_UARTFIFODisable
-#else
-#define MAP_UARTFIFODisable \
-        UARTFIFODisable
-#endif
-#ifdef ROM_UARTCharsAvail
-#define MAP_UARTCharsAvail \
-        ROM_UARTCharsAvail
-#else
-#define MAP_UARTCharsAvail \
-        UARTCharsAvail
-#endif
-#ifdef ROM_UARTSpaceAvail
-#define MAP_UARTSpaceAvail \
-        ROM_UARTSpaceAvail
-#else
-#define MAP_UARTSpaceAvail \
-        UARTSpaceAvail
-#endif
-#ifdef ROM_UARTCharGetNonBlocking
-#define MAP_UARTCharGetNonBlocking \
-        ROM_UARTCharGetNonBlocking
-#else
-#define MAP_UARTCharGetNonBlocking \
-        UARTCharGetNonBlocking
-#endif
-#ifdef ROM_UARTCharGet
-#define MAP_UARTCharGet \
-        ROM_UARTCharGet
-#else
-#define MAP_UARTCharGet \
-        UARTCharGet
-#endif
-#ifdef ROM_UARTCharPutNonBlocking
-#define MAP_UARTCharPutNonBlocking \
-        ROM_UARTCharPutNonBlocking
-#else
-#define MAP_UARTCharPutNonBlocking \
-        UARTCharPutNonBlocking
-#endif
-#ifdef ROM_UARTCharPut
-#define MAP_UARTCharPut \
-        ROM_UARTCharPut
-#else
-#define MAP_UARTCharPut \
-        UARTCharPut
-#endif
-#ifdef ROM_UARTBreakCtl
-#define MAP_UARTBreakCtl \
-        ROM_UARTBreakCtl
-#else
-#define MAP_UARTBreakCtl \
-        UARTBreakCtl
-#endif
-#ifdef ROM_UARTBusy
-#define MAP_UARTBusy \
-        ROM_UARTBusy
-#else
-#define MAP_UARTBusy \
-        UARTBusy
-#endif
-#ifdef ROM_UARTIntRegister
-#define MAP_UARTIntRegister \
-        ROM_UARTIntRegister
-#else
-#define MAP_UARTIntRegister \
-        UARTIntRegister
-#endif
-#ifdef ROM_UARTIntUnregister
-#define MAP_UARTIntUnregister \
-        ROM_UARTIntUnregister
-#else
-#define MAP_UARTIntUnregister \
-        UARTIntUnregister
-#endif
-#ifdef ROM_UARTIntEnable
-#define MAP_UARTIntEnable \
-        ROM_UARTIntEnable
-#else
-#define MAP_UARTIntEnable \
-        UARTIntEnable
-#endif
-#ifdef ROM_UARTIntDisable
-#define MAP_UARTIntDisable \
-        ROM_UARTIntDisable
-#else
-#define MAP_UARTIntDisable \
-        UARTIntDisable
-#endif
-#ifdef ROM_UARTIntStatus
-#define MAP_UARTIntStatus \
-        ROM_UARTIntStatus
-#else
-#define MAP_UARTIntStatus \
-        UARTIntStatus
-#endif
-#ifdef ROM_UARTIntClear
-#define MAP_UARTIntClear \
-        ROM_UARTIntClear
-#else
-#define MAP_UARTIntClear \
-        UARTIntClear
-#endif
-#ifdef ROM_UARTDMAEnable
-#define MAP_UARTDMAEnable \
-        ROM_UARTDMAEnable
-#else
-#define MAP_UARTDMAEnable \
-        UARTDMAEnable
-#endif
-#ifdef ROM_UARTDMADisable
-#define MAP_UARTDMADisable \
-        ROM_UARTDMADisable
-#else
-#define MAP_UARTDMADisable \
-        UARTDMADisable
-#endif
-#ifdef ROM_UARTRxErrorGet
-#define MAP_UARTRxErrorGet \
-        ROM_UARTRxErrorGet
-#else
-#define MAP_UARTRxErrorGet \
-        UARTRxErrorGet
-#endif
-#ifdef ROM_UARTRxErrorClear
-#define MAP_UARTRxErrorClear \
-        ROM_UARTRxErrorClear
-#else
-#define MAP_UARTRxErrorClear \
-        UARTRxErrorClear
-#endif
-#ifdef ROM_UARTModemControlSet
-#define MAP_UARTModemControlSet \
-        ROM_UARTModemControlSet
-#else
-#define MAP_UARTModemControlSet \
-        UARTModemControlSet
-#endif
-#ifdef ROM_UARTModemControlClear
-#define MAP_UARTModemControlClear \
-        ROM_UARTModemControlClear
-#else
-#define MAP_UARTModemControlClear \
-        UARTModemControlClear
-#endif
-#ifdef ROM_UARTModemControlGet
-#define MAP_UARTModemControlGet \
-        ROM_UARTModemControlGet
-#else
-#define MAP_UARTModemControlGet \
-        UARTModemControlGet
-#endif
-#ifdef ROM_UARTModemStatusGet
-#define MAP_UARTModemStatusGet \
-        ROM_UARTModemStatusGet
-#else
-#define MAP_UARTModemStatusGet \
-        UARTModemStatusGet
-#endif
-#ifdef ROM_UARTFlowControlSet
-#define MAP_UARTFlowControlSet \
-        ROM_UARTFlowControlSet
-#else
-#define MAP_UARTFlowControlSet \
-        UARTFlowControlSet
-#endif
-#ifdef ROM_UARTFlowControlGet
-#define MAP_UARTFlowControlGet \
-        ROM_UARTFlowControlGet
-#else
-#define MAP_UARTFlowControlGet \
-        UARTFlowControlGet
-#endif
-#ifdef ROM_UARTTxIntModeSet
-#define MAP_UARTTxIntModeSet \
-        ROM_UARTTxIntModeSet
-#else
-#define MAP_UARTTxIntModeSet \
-        UARTTxIntModeSet
-#endif
-#ifdef ROM_UARTTxIntModeGet
-#define MAP_UARTTxIntModeGet \
-        ROM_UARTTxIntModeGet
-#else
-#define MAP_UARTTxIntModeGet \
-        UARTTxIntModeGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the uDMA API.
-//
-//*****************************************************************************
-#ifdef ROM_uDMAChannelTransferSet
-#define MAP_uDMAChannelTransferSet \
-        ROM_uDMAChannelTransferSet
-#else
-#define MAP_uDMAChannelTransferSet \
-        uDMAChannelTransferSet
-#endif
-#ifdef ROM_uDMAEnable
-#define MAP_uDMAEnable \
-        ROM_uDMAEnable
-#else
-#define MAP_uDMAEnable \
-        uDMAEnable
-#endif
-#ifdef ROM_uDMADisable
-#define MAP_uDMADisable \
-        ROM_uDMADisable
-#else
-#define MAP_uDMADisable \
-        uDMADisable
-#endif
-#ifdef ROM_uDMAErrorStatusGet
-#define MAP_uDMAErrorStatusGet \
-        ROM_uDMAErrorStatusGet
-#else
-#define MAP_uDMAErrorStatusGet \
-        uDMAErrorStatusGet
-#endif
-#ifdef ROM_uDMAErrorStatusClear
-#define MAP_uDMAErrorStatusClear \
-        ROM_uDMAErrorStatusClear
-#else
-#define MAP_uDMAErrorStatusClear \
-        uDMAErrorStatusClear
-#endif
-#ifdef ROM_uDMAChannelEnable
-#define MAP_uDMAChannelEnable \
-        ROM_uDMAChannelEnable
-#else
-#define MAP_uDMAChannelEnable \
-        uDMAChannelEnable
-#endif
-#ifdef ROM_uDMAChannelDisable
-#define MAP_uDMAChannelDisable \
-        ROM_uDMAChannelDisable
-#else
-#define MAP_uDMAChannelDisable \
-        uDMAChannelDisable
-#endif
-#ifdef ROM_uDMAChannelIsEnabled
-#define MAP_uDMAChannelIsEnabled \
-        ROM_uDMAChannelIsEnabled
-#else
-#define MAP_uDMAChannelIsEnabled \
-        uDMAChannelIsEnabled
-#endif
-#ifdef ROM_uDMAControlBaseSet
-#define MAP_uDMAControlBaseSet \
-        ROM_uDMAControlBaseSet
-#else
-#define MAP_uDMAControlBaseSet \
-        uDMAControlBaseSet
-#endif
-#ifdef ROM_uDMAControlBaseGet
-#define MAP_uDMAControlBaseGet \
-        ROM_uDMAControlBaseGet
-#else
-#define MAP_uDMAControlBaseGet \
-        uDMAControlBaseGet
-#endif
-#ifdef ROM_uDMAChannelRequest
-#define MAP_uDMAChannelRequest \
-        ROM_uDMAChannelRequest
-#else
-#define MAP_uDMAChannelRequest \
-        uDMAChannelRequest
-#endif
-#ifdef ROM_uDMAChannelAttributeEnable
-#define MAP_uDMAChannelAttributeEnable \
-        ROM_uDMAChannelAttributeEnable
-#else
-#define MAP_uDMAChannelAttributeEnable \
-        uDMAChannelAttributeEnable
-#endif
-#ifdef ROM_uDMAChannelAttributeDisable
-#define MAP_uDMAChannelAttributeDisable \
-        ROM_uDMAChannelAttributeDisable
-#else
-#define MAP_uDMAChannelAttributeDisable \
-        uDMAChannelAttributeDisable
-#endif
-#ifdef ROM_uDMAChannelAttributeGet
-#define MAP_uDMAChannelAttributeGet \
-        ROM_uDMAChannelAttributeGet
-#else
-#define MAP_uDMAChannelAttributeGet \
-        uDMAChannelAttributeGet
-#endif
-#ifdef ROM_uDMAChannelControlSet
-#define MAP_uDMAChannelControlSet \
-        ROM_uDMAChannelControlSet
-#else
-#define MAP_uDMAChannelControlSet \
-        uDMAChannelControlSet
-#endif
-#ifdef ROM_uDMAChannelSizeGet
-#define MAP_uDMAChannelSizeGet \
-        ROM_uDMAChannelSizeGet
-#else
-#define MAP_uDMAChannelSizeGet \
-        uDMAChannelSizeGet
-#endif
-#ifdef ROM_uDMAChannelModeGet
-#define MAP_uDMAChannelModeGet \
-        ROM_uDMAChannelModeGet
-#else
-#define MAP_uDMAChannelModeGet \
-        uDMAChannelModeGet
-#endif
-#ifdef ROM_uDMAIntStatus
-#define MAP_uDMAIntStatus \
-        ROM_uDMAIntStatus
-#else
-#define MAP_uDMAIntStatus \
-        uDMAIntStatus
-#endif
-#ifdef ROM_uDMAIntClear
-#define MAP_uDMAIntClear \
-        ROM_uDMAIntClear
-#else
-#define MAP_uDMAIntClear \
-        uDMAIntClear
-#endif
-#ifdef ROM_uDMAControlAlternateBaseGet
-#define MAP_uDMAControlAlternateBaseGet \
-        ROM_uDMAControlAlternateBaseGet
-#else
-#define MAP_uDMAControlAlternateBaseGet \
-        uDMAControlAlternateBaseGet
-#endif
-#ifdef ROM_uDMAChannelScatterGatherSet
-#define MAP_uDMAChannelScatterGatherSet \
-        ROM_uDMAChannelScatterGatherSet
-#else
-#define MAP_uDMAChannelScatterGatherSet \
-        uDMAChannelScatterGatherSet
-#endif
-#ifdef ROM_uDMAChannelAssign
-#define MAP_uDMAChannelAssign \
-        ROM_uDMAChannelAssign
-#else
-#define MAP_uDMAChannelAssign \
-        uDMAChannelAssign
-#endif
-#ifdef ROM_uDMAIntRegister
-#define MAP_uDMAIntRegister \
-        ROM_uDMAIntRegister
-#else
-#define MAP_uDMAIntRegister \
-        uDMAIntRegister
-#endif
-#ifdef ROM_uDMAIntUnregister
-#define MAP_uDMAIntUnregister \
-        ROM_uDMAIntUnregister
-#else
-#define MAP_uDMAIntUnregister \
-        uDMAIntUnregister
-#endif
-
-//*****************************************************************************
-//
-// Macros for the Watchdog API.
-//
-//*****************************************************************************
-#ifdef ROM_WatchdogIntClear
-#define MAP_WatchdogIntClear \
-        ROM_WatchdogIntClear
-#else
-#define MAP_WatchdogIntClear \
-        WatchdogIntClear
-#endif
-#ifdef ROM_WatchdogRunning
-#define MAP_WatchdogRunning \
-        ROM_WatchdogRunning
-#else
-#define MAP_WatchdogRunning \
-        WatchdogRunning
-#endif
-#ifdef ROM_WatchdogEnable
-#define MAP_WatchdogEnable \
-        ROM_WatchdogEnable
-#else
-#define MAP_WatchdogEnable \
-        WatchdogEnable
-#endif
-#ifdef ROM_WatchdogLock
-#define MAP_WatchdogLock \
-        ROM_WatchdogLock
-#else
-#define MAP_WatchdogLock \
-        WatchdogLock
-#endif
-#ifdef ROM_WatchdogUnlock
-#define MAP_WatchdogUnlock \
-        ROM_WatchdogUnlock
-#else
-#define MAP_WatchdogUnlock \
-        WatchdogUnlock
-#endif
-#ifdef ROM_WatchdogLockState
-#define MAP_WatchdogLockState \
-        ROM_WatchdogLockState
-#else
-#define MAP_WatchdogLockState \
-        WatchdogLockState
-#endif
-#ifdef ROM_WatchdogReloadSet
-#define MAP_WatchdogReloadSet \
-        ROM_WatchdogReloadSet
-#else
-#define MAP_WatchdogReloadSet \
-        WatchdogReloadSet
-#endif
-#ifdef ROM_WatchdogReloadGet
-#define MAP_WatchdogReloadGet \
-        ROM_WatchdogReloadGet
-#else
-#define MAP_WatchdogReloadGet \
-        WatchdogReloadGet
-#endif
-#ifdef ROM_WatchdogValueGet
-#define MAP_WatchdogValueGet \
-        ROM_WatchdogValueGet
-#else
-#define MAP_WatchdogValueGet \
-        WatchdogValueGet
-#endif
-#ifdef ROM_WatchdogIntStatus
-#define MAP_WatchdogIntStatus \
-        ROM_WatchdogIntStatus
-#else
-#define MAP_WatchdogIntStatus \
-        WatchdogIntStatus
-#endif
-#ifdef ROM_WatchdogStallEnable
-#define MAP_WatchdogStallEnable \
-        ROM_WatchdogStallEnable
-#else
-#define MAP_WatchdogStallEnable \
-        WatchdogStallEnable
-#endif
-#ifdef ROM_WatchdogStallDisable
-#define MAP_WatchdogStallDisable \
-        ROM_WatchdogStallDisable
-#else
-#define MAP_WatchdogStallDisable \
-        WatchdogStallDisable
-#endif
-#ifdef ROM_WatchdogIntRegister
-#define MAP_WatchdogIntRegister \
-        ROM_WatchdogIntRegister
-#else
-#define MAP_WatchdogIntRegister \
-        WatchdogIntRegister
-#endif
-#ifdef ROM_WatchdogIntUnregister
-#define MAP_WatchdogIntUnregister \
-        ROM_WatchdogIntUnregister
-#else
-#define MAP_WatchdogIntUnregister \
-        WatchdogIntUnregister
-#endif
-
-//*****************************************************************************
-//
-// Macros for the I2C API.
-//
-//*****************************************************************************
-#ifdef ROM_I2CIntRegister
-#define MAP_I2CIntRegister \
-        ROM_I2CIntRegister
-#else
-#define MAP_I2CIntRegister \
-        I2CIntRegister
-#endif
-#ifdef ROM_I2CIntUnregister
-#define MAP_I2CIntUnregister \
-        ROM_I2CIntUnregister
-#else
-#define MAP_I2CIntUnregister \
-        I2CIntUnregister
-#endif
-#ifdef ROM_I2CTxFIFOConfigSet
-#define MAP_I2CTxFIFOConfigSet \
-        ROM_I2CTxFIFOConfigSet
-#else
-#define MAP_I2CTxFIFOConfigSet \
-        I2CTxFIFOConfigSet
-#endif
-#ifdef ROM_I2CTxFIFOFlush
-#define MAP_I2CTxFIFOFlush \
-        ROM_I2CTxFIFOFlush
-#else
-#define MAP_I2CTxFIFOFlush \
-        I2CTxFIFOFlush
-#endif
-#ifdef ROM_I2CRxFIFOConfigSet
-#define MAP_I2CRxFIFOConfigSet \
-        ROM_I2CRxFIFOConfigSet
-#else
-#define MAP_I2CRxFIFOConfigSet \
-        I2CRxFIFOConfigSet
-#endif
-#ifdef ROM_I2CRxFIFOFlush
-#define MAP_I2CRxFIFOFlush \
-        ROM_I2CRxFIFOFlush
-#else
-#define MAP_I2CRxFIFOFlush \
-        I2CRxFIFOFlush
-#endif
-#ifdef ROM_I2CFIFOStatus
-#define MAP_I2CFIFOStatus \
-        ROM_I2CFIFOStatus
-#else
-#define MAP_I2CFIFOStatus \
-        I2CFIFOStatus
-#endif
-#ifdef ROM_I2CFIFODataPut
-#define MAP_I2CFIFODataPut \
-        ROM_I2CFIFODataPut
-#else
-#define MAP_I2CFIFODataPut \
-        I2CFIFODataPut
-#endif
-#ifdef ROM_I2CFIFODataPutNonBlocking
-#define MAP_I2CFIFODataPutNonBlocking \
-        ROM_I2CFIFODataPutNonBlocking
-#else
-#define MAP_I2CFIFODataPutNonBlocking \
-        I2CFIFODataPutNonBlocking
-#endif
-#ifdef ROM_I2CFIFODataGet
-#define MAP_I2CFIFODataGet \
-        ROM_I2CFIFODataGet
-#else
-#define MAP_I2CFIFODataGet \
-        I2CFIFODataGet
-#endif
-#ifdef ROM_I2CFIFODataGetNonBlocking
-#define MAP_I2CFIFODataGetNonBlocking \
-        ROM_I2CFIFODataGetNonBlocking
-#else
-#define MAP_I2CFIFODataGetNonBlocking \
-        I2CFIFODataGetNonBlocking
-#endif
-#ifdef ROM_I2CMasterBurstLengthSet
-#define MAP_I2CMasterBurstLengthSet \
-        ROM_I2CMasterBurstLengthSet
-#else
-#define MAP_I2CMasterBurstLengthSet \
-        I2CMasterBurstLengthSet
-#endif
-#ifdef ROM_I2CMasterBurstCountGet
-#define MAP_I2CMasterBurstCountGet \
-        ROM_I2CMasterBurstCountGet
-#else
-#define MAP_I2CMasterBurstCountGet \
-        I2CMasterBurstCountGet
-#endif
-#ifdef ROM_I2CMasterGlitchFilterConfigSet
-#define MAP_I2CMasterGlitchFilterConfigSet \
-        ROM_I2CMasterGlitchFilterConfigSet
-#else
-#define MAP_I2CMasterGlitchFilterConfigSet \
-        I2CMasterGlitchFilterConfigSet
-#endif
-#ifdef ROM_I2CSlaveFIFOEnable
-#define MAP_I2CSlaveFIFOEnable \
-        ROM_I2CSlaveFIFOEnable
-#else
-#define MAP_I2CSlaveFIFOEnable \
-        I2CSlaveFIFOEnable
-#endif
-#ifdef ROM_I2CSlaveFIFODisable
-#define MAP_I2CSlaveFIFODisable \
-        ROM_I2CSlaveFIFODisable
-#else
-#define MAP_I2CSlaveFIFODisable \
-        I2CSlaveFIFODisable
-#endif
-#ifdef ROM_I2CMasterBusBusy
-#define MAP_I2CMasterBusBusy \
-        ROM_I2CMasterBusBusy
-#else
-#define MAP_I2CMasterBusBusy \
-        I2CMasterBusBusy
-#endif
-#ifdef ROM_I2CMasterBusy
-#define MAP_I2CMasterBusy \
-        ROM_I2CMasterBusy
-#else
-#define MAP_I2CMasterBusy \
-        I2CMasterBusy
-#endif
-#ifdef ROM_I2CMasterControl
-#define MAP_I2CMasterControl \
-        ROM_I2CMasterControl
-#else
-#define MAP_I2CMasterControl \
-        I2CMasterControl
-#endif
-#ifdef ROM_I2CMasterDataGet
-#define MAP_I2CMasterDataGet \
-        ROM_I2CMasterDataGet
-#else
-#define MAP_I2CMasterDataGet \
-        I2CMasterDataGet
-#endif
-#ifdef ROM_I2CMasterDataPut
-#define MAP_I2CMasterDataPut \
-        ROM_I2CMasterDataPut
-#else
-#define MAP_I2CMasterDataPut \
-        I2CMasterDataPut
-#endif
-#ifdef ROM_I2CMasterDisable
-#define MAP_I2CMasterDisable \
-        ROM_I2CMasterDisable
-#else
-#define MAP_I2CMasterDisable \
-        I2CMasterDisable
-#endif
-#ifdef ROM_I2CMasterEnable
-#define MAP_I2CMasterEnable \
-        ROM_I2CMasterEnable
-#else
-#define MAP_I2CMasterEnable \
-        I2CMasterEnable
-#endif
-#ifdef ROM_I2CMasterErr
-#define MAP_I2CMasterErr \
-        ROM_I2CMasterErr
-#else
-#define MAP_I2CMasterErr \
-        I2CMasterErr
-#endif
-#ifdef ROM_I2CMasterIntClear
-#define MAP_I2CMasterIntClear \
-        ROM_I2CMasterIntClear
-#else
-#define MAP_I2CMasterIntClear \
-        I2CMasterIntClear
-#endif
-#ifdef ROM_I2CMasterIntDisable
-#define MAP_I2CMasterIntDisable \
-        ROM_I2CMasterIntDisable
-#else
-#define MAP_I2CMasterIntDisable \
-        I2CMasterIntDisable
-#endif
-#ifdef ROM_I2CMasterIntEnable
-#define MAP_I2CMasterIntEnable \
-        ROM_I2CMasterIntEnable
-#else
-#define MAP_I2CMasterIntEnable \
-        I2CMasterIntEnable
-#endif
-#ifdef ROM_I2CMasterIntStatus
-#define MAP_I2CMasterIntStatus \
-        ROM_I2CMasterIntStatus
-#else
-#define MAP_I2CMasterIntStatus \
-        I2CMasterIntStatus
-#endif
-#ifdef ROM_I2CMasterIntEnableEx
-#define MAP_I2CMasterIntEnableEx \
-        ROM_I2CMasterIntEnableEx
-#else
-#define MAP_I2CMasterIntEnableEx \
-        I2CMasterIntEnableEx
-#endif
-#ifdef ROM_I2CMasterIntDisableEx
-#define MAP_I2CMasterIntDisableEx \
-        ROM_I2CMasterIntDisableEx
-#else
-#define MAP_I2CMasterIntDisableEx \
-        I2CMasterIntDisableEx
-#endif
-#ifdef ROM_I2CMasterIntStatusEx
-#define MAP_I2CMasterIntStatusEx \
-        ROM_I2CMasterIntStatusEx
-#else
-#define MAP_I2CMasterIntStatusEx \
-        I2CMasterIntStatusEx
-#endif
-#ifdef ROM_I2CMasterIntClearEx
-#define MAP_I2CMasterIntClearEx \
-        ROM_I2CMasterIntClearEx
-#else
-#define MAP_I2CMasterIntClearEx \
-        I2CMasterIntClearEx
-#endif
-#ifdef ROM_I2CMasterTimeoutSet
-#define MAP_I2CMasterTimeoutSet \
-        ROM_I2CMasterTimeoutSet
-#else
-#define MAP_I2CMasterTimeoutSet \
-        I2CMasterTimeoutSet
-#endif
-#ifdef ROM_I2CSlaveACKOverride
-#define MAP_I2CSlaveACKOverride \
-        ROM_I2CSlaveACKOverride
-#else
-#define MAP_I2CSlaveACKOverride \
-        I2CSlaveACKOverride
-#endif
-#ifdef ROM_I2CSlaveACKValueSet
-#define MAP_I2CSlaveACKValueSet \
-        ROM_I2CSlaveACKValueSet
-#else
-#define MAP_I2CSlaveACKValueSet \
-        I2CSlaveACKValueSet
-#endif
-#ifdef ROM_I2CMasterLineStateGet
-#define MAP_I2CMasterLineStateGet \
-        ROM_I2CMasterLineStateGet
-#else
-#define MAP_I2CMasterLineStateGet \
-        I2CMasterLineStateGet
-#endif
-#ifdef ROM_I2CMasterSlaveAddrSet
-#define MAP_I2CMasterSlaveAddrSet \
-        ROM_I2CMasterSlaveAddrSet
-#else
-#define MAP_I2CMasterSlaveAddrSet \
-        I2CMasterSlaveAddrSet
-#endif
-#ifdef ROM_I2CSlaveDataGet
-#define MAP_I2CSlaveDataGet \
-        ROM_I2CSlaveDataGet
-#else
-#define MAP_I2CSlaveDataGet \
-        I2CSlaveDataGet
-#endif
-#ifdef ROM_I2CSlaveDataPut
-#define MAP_I2CSlaveDataPut \
-        ROM_I2CSlaveDataPut
-#else
-#define MAP_I2CSlaveDataPut \
-        I2CSlaveDataPut
-#endif
-#ifdef ROM_I2CSlaveDisable
-#define MAP_I2CSlaveDisable \
-        ROM_I2CSlaveDisable
-#else
-#define MAP_I2CSlaveDisable \
-        I2CSlaveDisable
-#endif
-#ifdef ROM_I2CSlaveEnable
-#define MAP_I2CSlaveEnable \
-        ROM_I2CSlaveEnable
-#else
-#define MAP_I2CSlaveEnable \
-        I2CSlaveEnable
-#endif
-#ifdef ROM_I2CSlaveInit
-#define MAP_I2CSlaveInit \
-        ROM_I2CSlaveInit
-#else
-#define MAP_I2CSlaveInit \
-        I2CSlaveInit
-#endif
-#ifdef ROM_I2CSlaveAddressSet
-#define MAP_I2CSlaveAddressSet \
-        ROM_I2CSlaveAddressSet
-#else
-#define MAP_I2CSlaveAddressSet \
-        I2CSlaveAddressSet
-#endif
-#ifdef ROM_I2CSlaveIntClear
-#define MAP_I2CSlaveIntClear \
-        ROM_I2CSlaveIntClear
-#else
-#define MAP_I2CSlaveIntClear \
-        I2CSlaveIntClear
-#endif
-#ifdef ROM_I2CSlaveIntDisable
-#define MAP_I2CSlaveIntDisable \
-        ROM_I2CSlaveIntDisable
-#else
-#define MAP_I2CSlaveIntDisable \
-        I2CSlaveIntDisable
-#endif
-#ifdef ROM_I2CSlaveIntEnable
-#define MAP_I2CSlaveIntEnable \
-        ROM_I2CSlaveIntEnable
-#else
-#define MAP_I2CSlaveIntEnable \
-        I2CSlaveIntEnable
-#endif
-#ifdef ROM_I2CSlaveIntClearEx
-#define MAP_I2CSlaveIntClearEx \
-        ROM_I2CSlaveIntClearEx
-#else
-#define MAP_I2CSlaveIntClearEx \
-        I2CSlaveIntClearEx
-#endif
-#ifdef ROM_I2CSlaveIntDisableEx
-#define MAP_I2CSlaveIntDisableEx \
-        ROM_I2CSlaveIntDisableEx
-#else
-#define MAP_I2CSlaveIntDisableEx \
-        I2CSlaveIntDisableEx
-#endif
-#ifdef ROM_I2CSlaveIntEnableEx
-#define MAP_I2CSlaveIntEnableEx \
-        ROM_I2CSlaveIntEnableEx
-#else
-#define MAP_I2CSlaveIntEnableEx \
-        I2CSlaveIntEnableEx
-#endif
-#ifdef ROM_I2CSlaveIntStatus
-#define MAP_I2CSlaveIntStatus \
-        ROM_I2CSlaveIntStatus
-#else
-#define MAP_I2CSlaveIntStatus \
-        I2CSlaveIntStatus
-#endif
-#ifdef ROM_I2CSlaveIntStatusEx
-#define MAP_I2CSlaveIntStatusEx \
-        ROM_I2CSlaveIntStatusEx
-#else
-#define MAP_I2CSlaveIntStatusEx \
-        I2CSlaveIntStatusEx
-#endif
-#ifdef ROM_I2CSlaveStatus
-#define MAP_I2CSlaveStatus \
-        ROM_I2CSlaveStatus
-#else
-#define MAP_I2CSlaveStatus \
-        I2CSlaveStatus
-#endif
-#ifdef ROM_I2CMasterInitExpClk
-#define MAP_I2CMasterInitExpClk \
-        ROM_I2CMasterInitExpClk
-#else
-#define MAP_I2CMasterInitExpClk \
-        I2CMasterInitExpClk
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SPI API.
-//
-//*****************************************************************************
-#ifdef ROM_SPIEnable
-#define MAP_SPIEnable \
-        ROM_SPIEnable
-#else
-#define MAP_SPIEnable \
-        SPIEnable
-#endif
-#ifdef ROM_SPIDisable
-#define MAP_SPIDisable \
-        ROM_SPIDisable
-#else
-#define MAP_SPIDisable \
-        SPIDisable
-#endif
-#ifdef ROM_SPIReset
-#define MAP_SPIReset \
-        ROM_SPIReset
-#else
-#define MAP_SPIReset \
-        SPIReset
-#endif
-#ifdef ROM_SPIConfigSetExpClk
-#define MAP_SPIConfigSetExpClk \
-        ROM_SPIConfigSetExpClk
-#else
-#define MAP_SPIConfigSetExpClk \
-        SPIConfigSetExpClk
-#endif
-#ifdef ROM_SPIDataGetNonBlocking
-#define MAP_SPIDataGetNonBlocking \
-        ROM_SPIDataGetNonBlocking
-#else
-#define MAP_SPIDataGetNonBlocking \
-        SPIDataGetNonBlocking
-#endif
-#ifdef ROM_SPIDataGet
-#define MAP_SPIDataGet \
-        ROM_SPIDataGet
-#else
-#define MAP_SPIDataGet \
-        SPIDataGet
-#endif
-#ifdef ROM_SPIDataPutNonBlocking
-#define MAP_SPIDataPutNonBlocking \
-        ROM_SPIDataPutNonBlocking
-#else
-#define MAP_SPIDataPutNonBlocking \
-        SPIDataPutNonBlocking
-#endif
-#ifdef ROM_SPIDataPut
-#define MAP_SPIDataPut \
-        ROM_SPIDataPut
-#else
-#define MAP_SPIDataPut \
-        SPIDataPut
-#endif
-#ifdef ROM_SPIFIFOEnable
-#define MAP_SPIFIFOEnable \
-        ROM_SPIFIFOEnable
-#else
-#define MAP_SPIFIFOEnable \
-        SPIFIFOEnable
-#endif
-#ifdef ROM_SPIFIFODisable
-#define MAP_SPIFIFODisable \
-        ROM_SPIFIFODisable
-#else
-#define MAP_SPIFIFODisable \
-        SPIFIFODisable
-#endif
-#ifdef ROM_SPIFIFOLevelSet
-#define MAP_SPIFIFOLevelSet \
-        ROM_SPIFIFOLevelSet
-#else
-#define MAP_SPIFIFOLevelSet \
-        SPIFIFOLevelSet
-#endif
-#ifdef ROM_SPIFIFOLevelGet
-#define MAP_SPIFIFOLevelGet \
-        ROM_SPIFIFOLevelGet
-#else
-#define MAP_SPIFIFOLevelGet \
-        SPIFIFOLevelGet
-#endif
-#ifdef ROM_SPIWordCountSet
-#define MAP_SPIWordCountSet \
-        ROM_SPIWordCountSet
-#else
-#define MAP_SPIWordCountSet \
-        SPIWordCountSet
-#endif
-#ifdef ROM_SPIIntRegister
-#define MAP_SPIIntRegister \
-        ROM_SPIIntRegister
-#else
-#define MAP_SPIIntRegister \
-        SPIIntRegister
-#endif
-#ifdef ROM_SPIIntUnregister
-#define MAP_SPIIntUnregister \
-        ROM_SPIIntUnregister
-#else
-#define MAP_SPIIntUnregister \
-        SPIIntUnregister
-#endif
-#ifdef ROM_SPIIntEnable
-#define MAP_SPIIntEnable \
-        ROM_SPIIntEnable
-#else
-#define MAP_SPIIntEnable \
-        SPIIntEnable
-#endif
-#ifdef ROM_SPIIntDisable
-#define MAP_SPIIntDisable \
-        ROM_SPIIntDisable
-#else
-#define MAP_SPIIntDisable \
-        SPIIntDisable
-#endif
-#ifdef ROM_SPIIntStatus
-#define MAP_SPIIntStatus \
-        ROM_SPIIntStatus
-#else
-#define MAP_SPIIntStatus \
-        SPIIntStatus
-#endif
-#ifdef ROM_SPIIntClear
-#define MAP_SPIIntClear \
-        ROM_SPIIntClear
-#else
-#define MAP_SPIIntClear \
-        SPIIntClear
-#endif
-#ifdef ROM_SPIDmaEnable
-#define MAP_SPIDmaEnable \
-        ROM_SPIDmaEnable
-#else
-#define MAP_SPIDmaEnable \
-        SPIDmaEnable
-#endif
-#ifdef ROM_SPIDmaDisable
-#define MAP_SPIDmaDisable \
-        ROM_SPIDmaDisable
-#else
-#define MAP_SPIDmaDisable \
-        SPIDmaDisable
-#endif
-#ifdef ROM_SPICSEnable
-#define MAP_SPICSEnable \
-        ROM_SPICSEnable
-#else
-#define MAP_SPICSEnable \
-        SPICSEnable
-#endif
-#ifdef ROM_SPICSDisable
-#define MAP_SPICSDisable \
-        ROM_SPICSDisable
-#else
-#define MAP_SPICSDisable \
-        SPICSDisable
-#endif
-#ifdef ROM_SPITransfer
-#define MAP_SPITransfer \
-        ROM_SPITransfer
-#else
-#define MAP_SPITransfer \
-        SPITransfer
-#endif
-
-//*****************************************************************************
-//
-// Macros for the CAM API.
-//
-//*****************************************************************************
-#ifdef ROM_CameraReset
-#define MAP_CameraReset \
-        ROM_CameraReset
-#else
-#define MAP_CameraReset \
-        CameraReset
-#endif
-#ifdef ROM_CameraParamsConfig
-#define MAP_CameraParamsConfig \
-        ROM_CameraParamsConfig
-#else
-#define MAP_CameraParamsConfig \
-        CameraParamsConfig
-#endif
-#ifdef ROM_CameraXClkConfig
-#define MAP_CameraXClkConfig \
-        ROM_CameraXClkConfig
-#else
-#define MAP_CameraXClkConfig \
-        CameraXClkConfig
-#endif
-#ifdef ROM_CameraXClkSet
-#define MAP_CameraXClkSet \
-        ROM_CameraXClkSet
-#else
-#define MAP_CameraXClkSet \
-        CameraXClkSet
-#endif
-#ifdef ROM_CameraDMAEnable
-#define MAP_CameraDMAEnable \
-        ROM_CameraDMAEnable
-#else
-#define MAP_CameraDMAEnable \
-        CameraDMAEnable
-#endif
-#ifdef ROM_CameraDMADisable
-#define MAP_CameraDMADisable \
-        ROM_CameraDMADisable
-#else
-#define MAP_CameraDMADisable \
-        CameraDMADisable
-#endif
-#ifdef ROM_CameraThresholdSet
-#define MAP_CameraThresholdSet \
-        ROM_CameraThresholdSet
-#else
-#define MAP_CameraThresholdSet \
-        CameraThresholdSet
-#endif
-#ifdef ROM_CameraIntRegister
-#define MAP_CameraIntRegister \
-        ROM_CameraIntRegister
-#else
-#define MAP_CameraIntRegister \
-        CameraIntRegister
-#endif
-#ifdef ROM_CameraIntUnregister
-#define MAP_CameraIntUnregister \
-        ROM_CameraIntUnregister
-#else
-#define MAP_CameraIntUnregister \
-        CameraIntUnregister
-#endif
-#ifdef ROM_CameraIntEnable
-#define MAP_CameraIntEnable \
-        ROM_CameraIntEnable
-#else
-#define MAP_CameraIntEnable \
-        CameraIntEnable
-#endif
-#ifdef ROM_CameraIntDisable
-#define MAP_CameraIntDisable \
-        ROM_CameraIntDisable
-#else
-#define MAP_CameraIntDisable \
-        CameraIntDisable
-#endif
-#ifdef ROM_CameraIntStatus
-#define MAP_CameraIntStatus \
-        ROM_CameraIntStatus
-#else
-#define MAP_CameraIntStatus \
-        CameraIntStatus
-#endif
-#ifdef ROM_CameraIntClear
-#define MAP_CameraIntClear \
-        ROM_CameraIntClear
-#else
-#define MAP_CameraIntClear \
-        CameraIntClear
-#endif
-#ifdef ROM_CameraCaptureStop
-#define MAP_CameraCaptureStop \
-        ROM_CameraCaptureStop
-#else
-#define MAP_CameraCaptureStop \
-        CameraCaptureStop
-#endif
-#ifdef ROM_CameraCaptureStart
-#define MAP_CameraCaptureStart \
-        ROM_CameraCaptureStart
-#else
-#define MAP_CameraCaptureStart \
-        CameraCaptureStart
-#endif
-#ifdef ROM_CameraBufferRead
-#define MAP_CameraBufferRead \
-        ROM_CameraBufferRead
-#else
-#define MAP_CameraBufferRead \
-        CameraBufferRead
-#endif
-
-//*****************************************************************************
-//
-// Macros for the FLASH API.
-//
-//*****************************************************************************
-#ifdef ROM_FlashDisable
-#define MAP_FlashDisable \
-        ROM_FlashDisable
-#else
-#define MAP_FlashDisable \
-        FlashDisable
-#endif
-#ifdef ROM_FlashErase
-#define MAP_FlashErase \
-        ROM_FlashErase
-#else
-#define MAP_FlashErase \
-        FlashErase
-#endif
-#ifdef ROM_FlashMassErase
-#define MAP_FlashMassErase \
-        ROM_FlashMassErase
-#else
-#define MAP_FlashMassErase \
-        FlashMassErase
-#endif
-#ifdef ROM_FlashMassEraseNonBlocking
-#define MAP_FlashMassEraseNonBlocking \
-        ROM_FlashMassEraseNonBlocking
-#else
-#define MAP_FlashMassEraseNonBlocking \
-        FlashMassEraseNonBlocking
-#endif
-#ifdef ROM_FlashEraseNonBlocking
-#define MAP_FlashEraseNonBlocking \
-        ROM_FlashEraseNonBlocking
-#else
-#define MAP_FlashEraseNonBlocking \
-        FlashEraseNonBlocking
-#endif
-#ifdef ROM_FlashProgram
-#define MAP_FlashProgram \
-        ROM_FlashProgram
-#else
-#define MAP_FlashProgram \
-        FlashProgram
-#endif
-#ifdef ROM_FlashProgramNonBlocking
-#define MAP_FlashProgramNonBlocking \
-        ROM_FlashProgramNonBlocking
-#else
-#define MAP_FlashProgramNonBlocking \
-        FlashProgramNonBlocking
-#endif
-#ifdef ROM_FlashIntRegister
-#define MAP_FlashIntRegister \
-        ROM_FlashIntRegister
-#else
-#define MAP_FlashIntRegister \
-        FlashIntRegister
-#endif
-#ifdef ROM_FlashIntUnregister
-#define MAP_FlashIntUnregister \
-        ROM_FlashIntUnregister
-#else
-#define MAP_FlashIntUnregister \
-        FlashIntUnregister
-#endif
-#ifdef ROM_FlashIntEnable
-#define MAP_FlashIntEnable \
-        ROM_FlashIntEnable
-#else
-#define MAP_FlashIntEnable \
-        FlashIntEnable
-#endif
-#ifdef ROM_FlashIntDisable
-#define MAP_FlashIntDisable \
-        ROM_FlashIntDisable
-#else
-#define MAP_FlashIntDisable \
-        FlashIntDisable
-#endif
-#ifdef ROM_FlashIntStatus
-#define MAP_FlashIntStatus \
-        ROM_FlashIntStatus
-#else
-#define MAP_FlashIntStatus \
-        FlashIntStatus
-#endif
-#ifdef ROM_FlashIntClear
-#define MAP_FlashIntClear \
-        ROM_FlashIntClear
-#else
-#define MAP_FlashIntClear \
-        FlashIntClear
-#endif
-#ifdef ROM_FlashProtectGet
-#define MAP_FlashProtectGet \
-        ROM_FlashProtectGet
-#else
-#define MAP_FlashProtectGet \
-        FlashProtectGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the Pin API.
-//
-//*****************************************************************************
-#ifdef ROM_PinModeSet
-#define MAP_PinModeSet \
-        ROM_PinModeSet
-#else
-#define MAP_PinModeSet \
-        PinModeSet
-#endif
-#ifdef ROM_PinDirModeSet
-#define MAP_PinDirModeSet \
-        ROM_PinDirModeSet
-#else
-#define MAP_PinDirModeSet \
-        PinDirModeSet
-#endif
-#ifdef ROM_PinDirModeGet
-#define MAP_PinDirModeGet \
-        ROM_PinDirModeGet
-#else
-#define MAP_PinDirModeGet \
-        PinDirModeGet
-#endif
-#ifdef ROM_PinModeGet
-#define MAP_PinModeGet \
-        ROM_PinModeGet
-#else
-#define MAP_PinModeGet \
-        PinModeGet
-#endif
-#ifdef ROM_PinConfigGet
-#define MAP_PinConfigGet \
-        ROM_PinConfigGet
-#else
-#define MAP_PinConfigGet \
-        PinConfigGet
-#endif
-#ifdef ROM_PinConfigSet
-#define MAP_PinConfigSet \
-        ROM_PinConfigSet
-#else
-#define MAP_PinConfigSet \
-        PinConfigSet
-#endif
-#ifdef ROM_PinTypeUART
-#define MAP_PinTypeUART \
-        ROM_PinTypeUART
-#else
-#define MAP_PinTypeUART \
-        PinTypeUART
-#endif
-#ifdef ROM_PinTypeI2C
-#define MAP_PinTypeI2C \
-        ROM_PinTypeI2C
-#else
-#define MAP_PinTypeI2C \
-        PinTypeI2C
-#endif
-#ifdef ROM_PinTypeSPI
-#define MAP_PinTypeSPI \
-        ROM_PinTypeSPI
-#else
-#define MAP_PinTypeSPI \
-        PinTypeSPI
-#endif
-#ifdef ROM_PinTypeI2S
-#define MAP_PinTypeI2S \
-        ROM_PinTypeI2S
-#else
-#define MAP_PinTypeI2S \
-        PinTypeI2S
-#endif
-#ifdef ROM_PinTypeTimer
-#define MAP_PinTypeTimer \
-        ROM_PinTypeTimer
-#else
-#define MAP_PinTypeTimer \
-        PinTypeTimer
-#endif
-#ifdef ROM_PinTypeCamera
-#define MAP_PinTypeCamera \
-        ROM_PinTypeCamera
-#else
-#define MAP_PinTypeCamera \
-        PinTypeCamera
-#endif
-#ifdef ROM_PinTypeGPIO
-#define MAP_PinTypeGPIO \
-        ROM_PinTypeGPIO
-#else
-#define MAP_PinTypeGPIO \
-        PinTypeGPIO
-#endif
-#ifdef ROM_PinTypeADC
-#define MAP_PinTypeADC \
-        ROM_PinTypeADC
-#else
-#define MAP_PinTypeADC \
-        PinTypeADC
-#endif
-#ifdef ROM_PinTypeSDHost
-#define MAP_PinTypeSDHost \
-        ROM_PinTypeSDHost
-#else
-#define MAP_PinTypeSDHost \
-        PinTypeSDHost
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SYSTICK API.
-//
-//*****************************************************************************
-#ifdef ROM_SysTickEnable
-#define MAP_SysTickEnable \
-        ROM_SysTickEnable
-#else
-#define MAP_SysTickEnable \
-        SysTickEnable
-#endif
-#ifdef ROM_SysTickDisable
-#define MAP_SysTickDisable \
-        ROM_SysTickDisable
-#else
-#define MAP_SysTickDisable \
-        SysTickDisable
-#endif
-#ifdef ROM_SysTickIntRegister
-#define MAP_SysTickIntRegister \
-        ROM_SysTickIntRegister
-#else
-#define MAP_SysTickIntRegister \
-        SysTickIntRegister
-#endif
-#ifdef ROM_SysTickIntUnregister
-#define MAP_SysTickIntUnregister \
-        ROM_SysTickIntUnregister
-#else
-#define MAP_SysTickIntUnregister \
-        SysTickIntUnregister
-#endif
-#ifdef ROM_SysTickIntEnable
-#define MAP_SysTickIntEnable \
-        ROM_SysTickIntEnable
-#else
-#define MAP_SysTickIntEnable \
-        SysTickIntEnable
-#endif
-#ifdef ROM_SysTickIntDisable
-#define MAP_SysTickIntDisable \
-        ROM_SysTickIntDisable
-#else
-#define MAP_SysTickIntDisable \
-        SysTickIntDisable
-#endif
-#ifdef ROM_SysTickPeriodSet
-#define MAP_SysTickPeriodSet \
-        ROM_SysTickPeriodSet
-#else
-#define MAP_SysTickPeriodSet \
-        SysTickPeriodSet
-#endif
-#ifdef ROM_SysTickPeriodGet
-#define MAP_SysTickPeriodGet \
-        ROM_SysTickPeriodGet
-#else
-#define MAP_SysTickPeriodGet \
-        SysTickPeriodGet
-#endif
-#ifdef ROM_SysTickValueGet
-#define MAP_SysTickValueGet \
-        ROM_SysTickValueGet
-#else
-#define MAP_SysTickValueGet \
-        SysTickValueGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the UTILS API.
-//
-//*****************************************************************************
-#ifdef ROM_UtilsDelay
-#define MAP_UtilsDelay \
-        ROM_UtilsDelay
-#else
-#define MAP_UtilsDelay \
-        UtilsDelay
-#endif
-
-//*****************************************************************************
-//
-// Macros for the I2S API.
-//
-//*****************************************************************************
-#ifdef ROM_I2SEnable
-#define MAP_I2SEnable \
-        ROM_I2SEnable
-#else
-#define MAP_I2SEnable \
-        I2SEnable
-#endif
-#ifdef ROM_I2SDisable
-#define MAP_I2SDisable \
-        ROM_I2SDisable
-#else
-#define MAP_I2SDisable \
-        I2SDisable
-#endif
-#ifdef ROM_I2SDataPut
-#define MAP_I2SDataPut \
-        ROM_I2SDataPut
-#else
-#define MAP_I2SDataPut \
-        I2SDataPut
-#endif
-#ifdef ROM_I2SDataPutNonBlocking
-#define MAP_I2SDataPutNonBlocking \
-        ROM_I2SDataPutNonBlocking
-#else
-#define MAP_I2SDataPutNonBlocking \
-        I2SDataPutNonBlocking
-#endif
-#ifdef ROM_I2SDataGet
-#define MAP_I2SDataGet \
-        ROM_I2SDataGet
-#else
-#define MAP_I2SDataGet \
-        I2SDataGet
-#endif
-#ifdef ROM_I2SDataGetNonBlocking
-#define MAP_I2SDataGetNonBlocking \
-        ROM_I2SDataGetNonBlocking
-#else
-#define MAP_I2SDataGetNonBlocking \
-        I2SDataGetNonBlocking
-#endif
-#ifdef ROM_I2SConfigSetExpClk
-#define MAP_I2SConfigSetExpClk \
-        ROM_I2SConfigSetExpClk
-#else
-#define MAP_I2SConfigSetExpClk \
-        I2SConfigSetExpClk
-#endif
-#ifdef ROM_I2STxFIFOEnable
-#define MAP_I2STxFIFOEnable \
-        ROM_I2STxFIFOEnable
-#else
-#define MAP_I2STxFIFOEnable \
-        I2STxFIFOEnable
-#endif
-#ifdef ROM_I2STxFIFODisable
-#define MAP_I2STxFIFODisable \
-        ROM_I2STxFIFODisable
-#else
-#define MAP_I2STxFIFODisable \
-        I2STxFIFODisable
-#endif
-#ifdef ROM_I2SRxFIFOEnable
-#define MAP_I2SRxFIFOEnable \
-        ROM_I2SRxFIFOEnable
-#else
-#define MAP_I2SRxFIFOEnable \
-        I2SRxFIFOEnable
-#endif
-#ifdef ROM_I2SRxFIFODisable
-#define MAP_I2SRxFIFODisable \
-        ROM_I2SRxFIFODisable
-#else
-#define MAP_I2SRxFIFODisable \
-        I2SRxFIFODisable
-#endif
-#ifdef ROM_I2STxFIFOStatusGet
-#define MAP_I2STxFIFOStatusGet \
-        ROM_I2STxFIFOStatusGet
-#else
-#define MAP_I2STxFIFOStatusGet \
-        I2STxFIFOStatusGet
-#endif
-#ifdef ROM_I2SRxFIFOStatusGet
-#define MAP_I2SRxFIFOStatusGet \
-        ROM_I2SRxFIFOStatusGet
-#else
-#define MAP_I2SRxFIFOStatusGet \
-        I2SRxFIFOStatusGet
-#endif
-#ifdef ROM_I2SSerializerConfig
-#define MAP_I2SSerializerConfig \
-        ROM_I2SSerializerConfig
-#else
-#define MAP_I2SSerializerConfig \
-        I2SSerializerConfig
-#endif
-#ifdef ROM_I2SIntEnable
-#define MAP_I2SIntEnable \
-        ROM_I2SIntEnable
-#else
-#define MAP_I2SIntEnable \
-        I2SIntEnable
-#endif
-#ifdef ROM_I2SIntDisable
-#define MAP_I2SIntDisable \
-        ROM_I2SIntDisable
-#else
-#define MAP_I2SIntDisable \
-        I2SIntDisable
-#endif
-#ifdef ROM_I2SIntStatus
-#define MAP_I2SIntStatus \
-        ROM_I2SIntStatus
-#else
-#define MAP_I2SIntStatus \
-        I2SIntStatus
-#endif
-#ifdef ROM_I2SIntClear
-#define MAP_I2SIntClear \
-        ROM_I2SIntClear
-#else
-#define MAP_I2SIntClear \
-        I2SIntClear
-#endif
-#ifdef ROM_I2SIntRegister
-#define MAP_I2SIntRegister \
-        ROM_I2SIntRegister
-#else
-#define MAP_I2SIntRegister \
-        I2SIntRegister
-#endif
-#ifdef ROM_I2SIntUnregister
-#define MAP_I2SIntUnregister \
-        ROM_I2SIntUnregister
-#else
-#define MAP_I2SIntUnregister \
-        I2SIntUnregister
-#endif
-
-//*****************************************************************************
-//
-// Macros for the GPIO API.
-//
-//*****************************************************************************
-#ifdef ROM_GPIODirModeSet
-#define MAP_GPIODirModeSet \
-        ROM_GPIODirModeSet
-#else
-#define MAP_GPIODirModeSet \
-        GPIODirModeSet
-#endif
-#ifdef ROM_GPIODirModeGet
-#define MAP_GPIODirModeGet \
-        ROM_GPIODirModeGet
-#else
-#define MAP_GPIODirModeGet \
-        GPIODirModeGet
-#endif
-#ifdef ROM_GPIOIntTypeSet
-#define MAP_GPIOIntTypeSet \
-        ROM_GPIOIntTypeSet
-#else
-#define MAP_GPIOIntTypeSet \
-        GPIOIntTypeSet
-#endif
-#ifdef ROM_GPIODMATriggerEnable
-#define MAP_GPIODMATriggerEnable \
-        ROM_GPIODMATriggerEnable
-#else
-#define MAP_GPIODMATriggerEnable \
-        GPIODMATriggerEnable
-#endif
-#ifdef ROM_GPIODMATriggerDisable
-#define MAP_GPIODMATriggerDisable \
-        ROM_GPIODMATriggerDisable
-#else
-#define MAP_GPIODMATriggerDisable \
-        GPIODMATriggerDisable
-#endif
-#ifdef ROM_GPIOIntTypeGet
-#define MAP_GPIOIntTypeGet \
-        ROM_GPIOIntTypeGet
-#else
-#define MAP_GPIOIntTypeGet \
-        GPIOIntTypeGet
-#endif
-#ifdef ROM_GPIOIntEnable
-#define MAP_GPIOIntEnable \
-        ROM_GPIOIntEnable
-#else
-#define MAP_GPIOIntEnable \
-        GPIOIntEnable
-#endif
-#ifdef ROM_GPIOIntDisable
-#define MAP_GPIOIntDisable \
-        ROM_GPIOIntDisable
-#else
-#define MAP_GPIOIntDisable \
-        GPIOIntDisable
-#endif
-#ifdef ROM_GPIOIntStatus
-#define MAP_GPIOIntStatus \
-        ROM_GPIOIntStatus
-#else
-#define MAP_GPIOIntStatus \
-        GPIOIntStatus
-#endif
-#ifdef ROM_GPIOIntClear
-#define MAP_GPIOIntClear \
-        ROM_GPIOIntClear
-#else
-#define MAP_GPIOIntClear \
-        GPIOIntClear
-#endif
-#ifdef ROM_GPIOIntRegister
-#define MAP_GPIOIntRegister \
-        ROM_GPIOIntRegister
-#else
-#define MAP_GPIOIntRegister \
-        GPIOIntRegister
-#endif
-#ifdef ROM_GPIOIntUnregister
-#define MAP_GPIOIntUnregister \
-        ROM_GPIOIntUnregister
-#else
-#define MAP_GPIOIntUnregister \
-        GPIOIntUnregister
-#endif
-#ifdef ROM_GPIOPinRead
-#define MAP_GPIOPinRead \
-        ROM_GPIOPinRead
-#else
-#define MAP_GPIOPinRead \
-        GPIOPinRead
-#endif
-#ifdef ROM_GPIOPinWrite
-#define MAP_GPIOPinWrite \
-        ROM_GPIOPinWrite
-#else
-#define MAP_GPIOPinWrite \
-        GPIOPinWrite
-#endif
-
-//*****************************************************************************
-//
-// Macros for the AES API.
-//
-//*****************************************************************************
-#ifdef ROM_AESConfigSet
-#define MAP_AESConfigSet \
-        ROM_AESConfigSet
-#else
-#define MAP_AESConfigSet \
-        AESConfigSet
-#endif
-#ifdef ROM_AESKey1Set
-#define MAP_AESKey1Set \
-        ROM_AESKey1Set
-#else
-#define MAP_AESKey1Set \
-        AESKey1Set
-#endif
-#ifdef ROM_AESKey2Set
-#define MAP_AESKey2Set \
-        ROM_AESKey2Set
-#else
-#define MAP_AESKey2Set \
-        AESKey2Set
-#endif
-#ifdef ROM_AESKey3Set
-#define MAP_AESKey3Set \
-        ROM_AESKey3Set
-#else
-#define MAP_AESKey3Set \
-        AESKey3Set
-#endif
-#ifdef ROM_AESIVSet
-#define MAP_AESIVSet \
-        ROM_AESIVSet
-#else
-#define MAP_AESIVSet \
-        AESIVSet
-#endif
-#ifdef ROM_AESTagRead
-#define MAP_AESTagRead \
-        ROM_AESTagRead
-#else
-#define MAP_AESTagRead \
-        AESTagRead
-#endif
-#ifdef ROM_AESDataLengthSet
-#define MAP_AESDataLengthSet \
-        ROM_AESDataLengthSet
-#else
-#define MAP_AESDataLengthSet \
-        AESDataLengthSet
-#endif
-#ifdef ROM_AESAuthDataLengthSet
-#define MAP_AESAuthDataLengthSet \
-        ROM_AESAuthDataLengthSet
-#else
-#define MAP_AESAuthDataLengthSet \
-        AESAuthDataLengthSet
-#endif
-#ifdef ROM_AESDataReadNonBlocking
-#define MAP_AESDataReadNonBlocking \
-        ROM_AESDataReadNonBlocking
-#else
-#define MAP_AESDataReadNonBlocking \
-        AESDataReadNonBlocking
-#endif
-#ifdef ROM_AESDataRead
-#define MAP_AESDataRead \
-        ROM_AESDataRead
-#else
-#define MAP_AESDataRead \
-        AESDataRead
-#endif
-#ifdef ROM_AESDataWriteNonBlocking
-#define MAP_AESDataWriteNonBlocking \
-        ROM_AESDataWriteNonBlocking
-#else
-#define MAP_AESDataWriteNonBlocking \
-        AESDataWriteNonBlocking
-#endif
-#ifdef ROM_AESDataWrite
-#define MAP_AESDataWrite \
-        ROM_AESDataWrite
-#else
-#define MAP_AESDataWrite \
-        AESDataWrite
-#endif
-#ifdef ROM_AESDataProcess
-#define MAP_AESDataProcess \
-        ROM_AESDataProcess
-#else
-#define MAP_AESDataProcess \
-        AESDataProcess
-#endif
-#ifdef ROM_AESDataMAC
-#define MAP_AESDataMAC \
-        ROM_AESDataMAC
-#else
-#define MAP_AESDataMAC \
-        AESDataMAC
-#endif
-#ifdef ROM_AESDataProcessAE
-#define MAP_AESDataProcessAE \
-        ROM_AESDataProcessAE
-#else
-#define MAP_AESDataProcessAE \
-        AESDataProcessAE
-#endif
-#ifdef ROM_AESIntStatus
-#define MAP_AESIntStatus \
-        ROM_AESIntStatus
-#else
-#define MAP_AESIntStatus \
-        AESIntStatus
-#endif
-#ifdef ROM_AESIntEnable
-#define MAP_AESIntEnable \
-        ROM_AESIntEnable
-#else
-#define MAP_AESIntEnable \
-        AESIntEnable
-#endif
-#ifdef ROM_AESIntDisable
-#define MAP_AESIntDisable \
-        ROM_AESIntDisable
-#else
-#define MAP_AESIntDisable \
-        AESIntDisable
-#endif
-#ifdef ROM_AESIntClear
-#define MAP_AESIntClear \
-        ROM_AESIntClear
-#else
-#define MAP_AESIntClear \
-        AESIntClear
-#endif
-#ifdef ROM_AESIntRegister
-#define MAP_AESIntRegister \
-        ROM_AESIntRegister
-#else
-#define MAP_AESIntRegister \
-        AESIntRegister
-#endif
-#ifdef ROM_AESIntUnregister
-#define MAP_AESIntUnregister \
-        ROM_AESIntUnregister
-#else
-#define MAP_AESIntUnregister \
-        AESIntUnregister
-#endif
-#ifdef ROM_AESDMAEnable
-#define MAP_AESDMAEnable \
-        ROM_AESDMAEnable
-#else
-#define MAP_AESDMAEnable \
-        AESDMAEnable
-#endif
-#ifdef ROM_AESDMADisable
-#define MAP_AESDMADisable \
-        ROM_AESDMADisable
-#else
-#define MAP_AESDMADisable \
-        AESDMADisable
-#endif
-
-//*****************************************************************************
-//
-// Macros for the DES API.
-//
-//*****************************************************************************
-#ifdef ROM_DESConfigSet
-#define MAP_DESConfigSet \
-        ROM_DESConfigSet
-#else
-#define MAP_DESConfigSet \
-        DESConfigSet
-#endif
-#ifdef ROM_DESDataRead
-#define MAP_DESDataRead \
-        ROM_DESDataRead
-#else
-#define MAP_DESDataRead \
-        DESDataRead
-#endif
-#ifdef ROM_DESDataReadNonBlocking
-#define MAP_DESDataReadNonBlocking \
-        ROM_DESDataReadNonBlocking
-#else
-#define MAP_DESDataReadNonBlocking \
-        DESDataReadNonBlocking
-#endif
-#ifdef ROM_DESDataProcess
-#define MAP_DESDataProcess \
-        ROM_DESDataProcess
-#else
-#define MAP_DESDataProcess \
-        DESDataProcess
-#endif
-#ifdef ROM_DESDataWrite
-#define MAP_DESDataWrite \
-        ROM_DESDataWrite
-#else
-#define MAP_DESDataWrite \
-        DESDataWrite
-#endif
-#ifdef ROM_DESDataWriteNonBlocking
-#define MAP_DESDataWriteNonBlocking \
-        ROM_DESDataWriteNonBlocking
-#else
-#define MAP_DESDataWriteNonBlocking \
-        DESDataWriteNonBlocking
-#endif
-#ifdef ROM_DESDMADisable
-#define MAP_DESDMADisable \
-        ROM_DESDMADisable
-#else
-#define MAP_DESDMADisable \
-        DESDMADisable
-#endif
-#ifdef ROM_DESDMAEnable
-#define MAP_DESDMAEnable \
-        ROM_DESDMAEnable
-#else
-#define MAP_DESDMAEnable \
-        DESDMAEnable
-#endif
-#ifdef ROM_DESIntClear
-#define MAP_DESIntClear \
-        ROM_DESIntClear
-#else
-#define MAP_DESIntClear \
-        DESIntClear
-#endif
-#ifdef ROM_DESIntDisable
-#define MAP_DESIntDisable \
-        ROM_DESIntDisable
-#else
-#define MAP_DESIntDisable \
-        DESIntDisable
-#endif
-#ifdef ROM_DESIntEnable
-#define MAP_DESIntEnable \
-        ROM_DESIntEnable
-#else
-#define MAP_DESIntEnable \
-        DESIntEnable
-#endif
-#ifdef ROM_DESIntRegister
-#define MAP_DESIntRegister \
-        ROM_DESIntRegister
-#else
-#define MAP_DESIntRegister \
-        DESIntRegister
-#endif
-#ifdef ROM_DESIntStatus
-#define MAP_DESIntStatus \
-        ROM_DESIntStatus
-#else
-#define MAP_DESIntStatus \
-        DESIntStatus
-#endif
-#ifdef ROM_DESIntUnregister
-#define MAP_DESIntUnregister \
-        ROM_DESIntUnregister
-#else
-#define MAP_DESIntUnregister \
-        DESIntUnregister
-#endif
-#ifdef ROM_DESIVSet
-#define MAP_DESIVSet \
-        ROM_DESIVSet
-#else
-#define MAP_DESIVSet \
-        DESIVSet
-#endif
-#ifdef ROM_DESKeySet
-#define MAP_DESKeySet \
-        ROM_DESKeySet
-#else
-#define MAP_DESKeySet \
-        DESKeySet
-#endif
-#ifdef ROM_DESDataLengthSet
-#define MAP_DESDataLengthSet \
-        ROM_DESDataLengthSet
-#else
-#define MAP_DESDataLengthSet \
-        DESDataLengthSet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SHAMD5 API.
-//
-//*****************************************************************************
-#ifdef ROM_SHAMD5ConfigSet
-#define MAP_SHAMD5ConfigSet \
-        ROM_SHAMD5ConfigSet
-#else
-#define MAP_SHAMD5ConfigSet \
-        SHAMD5ConfigSet
-#endif
-#ifdef ROM_SHAMD5DataProcess
-#define MAP_SHAMD5DataProcess \
-        ROM_SHAMD5DataProcess
-#else
-#define MAP_SHAMD5DataProcess \
-        SHAMD5DataProcess
-#endif
-#ifdef ROM_SHAMD5DataWrite
-#define MAP_SHAMD5DataWrite \
-        ROM_SHAMD5DataWrite
-#else
-#define MAP_SHAMD5DataWrite \
-        SHAMD5DataWrite
-#endif
-#ifdef ROM_SHAMD5DataWriteNonBlocking
-#define MAP_SHAMD5DataWriteNonBlocking \
-        ROM_SHAMD5DataWriteNonBlocking
-#else
-#define MAP_SHAMD5DataWriteNonBlocking \
-        SHAMD5DataWriteNonBlocking
-#endif
-#ifdef ROM_SHAMD5DMADisable
-#define MAP_SHAMD5DMADisable \
-        ROM_SHAMD5DMADisable
-#else
-#define MAP_SHAMD5DMADisable \
-        SHAMD5DMADisable
-#endif
-#ifdef ROM_SHAMD5DMAEnable
-#define MAP_SHAMD5DMAEnable \
-        ROM_SHAMD5DMAEnable
-#else
-#define MAP_SHAMD5DMAEnable \
-        SHAMD5DMAEnable
-#endif
-#ifdef ROM_SHAMD5DataLengthSet
-#define MAP_SHAMD5DataLengthSet \
-        ROM_SHAMD5DataLengthSet
-#else
-#define MAP_SHAMD5DataLengthSet \
-        SHAMD5DataLengthSet
-#endif
-#ifdef ROM_SHAMD5HMACKeySet
-#define MAP_SHAMD5HMACKeySet \
-        ROM_SHAMD5HMACKeySet
-#else
-#define MAP_SHAMD5HMACKeySet \
-        SHAMD5HMACKeySet
-#endif
-#ifdef ROM_SHAMD5HMACPPKeyGenerate
-#define MAP_SHAMD5HMACPPKeyGenerate \
-        ROM_SHAMD5HMACPPKeyGenerate
-#else
-#define MAP_SHAMD5HMACPPKeyGenerate \
-        SHAMD5HMACPPKeyGenerate
-#endif
-#ifdef ROM_SHAMD5HMACPPKeySet
-#define MAP_SHAMD5HMACPPKeySet \
-        ROM_SHAMD5HMACPPKeySet
-#else
-#define MAP_SHAMD5HMACPPKeySet \
-        SHAMD5HMACPPKeySet
-#endif
-#ifdef ROM_SHAMD5HMACProcess
-#define MAP_SHAMD5HMACProcess \
-        ROM_SHAMD5HMACProcess
-#else
-#define MAP_SHAMD5HMACProcess \
-        SHAMD5HMACProcess
-#endif
-#ifdef ROM_SHAMD5IntClear
-#define MAP_SHAMD5IntClear \
-        ROM_SHAMD5IntClear
-#else
-#define MAP_SHAMD5IntClear \
-        SHAMD5IntClear
-#endif
-#ifdef ROM_SHAMD5IntDisable
-#define MAP_SHAMD5IntDisable \
-        ROM_SHAMD5IntDisable
-#else
-#define MAP_SHAMD5IntDisable \
-        SHAMD5IntDisable
-#endif
-#ifdef ROM_SHAMD5IntEnable
-#define MAP_SHAMD5IntEnable \
-        ROM_SHAMD5IntEnable
-#else
-#define MAP_SHAMD5IntEnable \
-        SHAMD5IntEnable
-#endif
-#ifdef ROM_SHAMD5IntRegister
-#define MAP_SHAMD5IntRegister \
-        ROM_SHAMD5IntRegister
-#else
-#define MAP_SHAMD5IntRegister \
-        SHAMD5IntRegister
-#endif
-#ifdef ROM_SHAMD5IntStatus
-#define MAP_SHAMD5IntStatus \
-        ROM_SHAMD5IntStatus
-#else
-#define MAP_SHAMD5IntStatus \
-        SHAMD5IntStatus
-#endif
-#ifdef ROM_SHAMD5IntUnregister
-#define MAP_SHAMD5IntUnregister \
-        ROM_SHAMD5IntUnregister
-#else
-#define MAP_SHAMD5IntUnregister \
-        SHAMD5IntUnregister
-#endif
-#ifdef ROM_SHAMD5ResultRead
-#define MAP_SHAMD5ResultRead \
-        ROM_SHAMD5ResultRead
-#else
-#define MAP_SHAMD5ResultRead \
-        SHAMD5ResultRead
-#endif
-
-//*****************************************************************************
-//
-// Macros for the CRC API.
-//
-//*****************************************************************************
-#ifdef ROM_CRCConfigSet
-#define MAP_CRCConfigSet \
-        ROM_CRCConfigSet
-#else
-#define MAP_CRCConfigSet \
-        CRCConfigSet
-#endif
-#ifdef ROM_CRCDataProcess
-#define MAP_CRCDataProcess \
-        ROM_CRCDataProcess
-#else
-#define MAP_CRCDataProcess \
-        CRCDataProcess
-#endif
-#ifdef ROM_CRCDataWrite
-#define MAP_CRCDataWrite \
-        ROM_CRCDataWrite
-#else
-#define MAP_CRCDataWrite \
-        CRCDataWrite
-#endif
-#ifdef ROM_CRCResultRead
-#define MAP_CRCResultRead \
-        ROM_CRCResultRead
-#else
-#define MAP_CRCResultRead \
-        CRCResultRead
-#endif
-#ifdef ROM_CRCSeedSet
-#define MAP_CRCSeedSet \
-        ROM_CRCSeedSet
-#else
-#define MAP_CRCSeedSet \
-        CRCSeedSet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SDHOST API.
-//
-//*****************************************************************************
-#ifdef ROM_SDHostCmdReset
-#define MAP_SDHostCmdReset \
-        ROM_SDHostCmdReset
-#else
-#define MAP_SDHostCmdReset \
-        SDHostCmdReset
-#endif
-#ifdef ROM_SDHostInit
-#define MAP_SDHostInit \
-        ROM_SDHostInit
-#else
-#define MAP_SDHostInit \
-        SDHostInit
-#endif
-#ifdef ROM_SDHostCmdSend
-#define MAP_SDHostCmdSend \
-        ROM_SDHostCmdSend
-#else
-#define MAP_SDHostCmdSend \
-        SDHostCmdSend
-#endif
-#ifdef ROM_SDHostIntRegister
-#define MAP_SDHostIntRegister \
-        ROM_SDHostIntRegister
-#else
-#define MAP_SDHostIntRegister \
-        SDHostIntRegister
-#endif
-#ifdef ROM_SDHostIntUnregister
-#define MAP_SDHostIntUnregister \
-        ROM_SDHostIntUnregister
-#else
-#define MAP_SDHostIntUnregister \
-        SDHostIntUnregister
-#endif
-#ifdef ROM_SDHostIntEnable
-#define MAP_SDHostIntEnable \
-        ROM_SDHostIntEnable
-#else
-#define MAP_SDHostIntEnable \
-        SDHostIntEnable
-#endif
-#ifdef ROM_SDHostIntDisable
-#define MAP_SDHostIntDisable \
-        ROM_SDHostIntDisable
-#else
-#define MAP_SDHostIntDisable \
-        SDHostIntDisable
-#endif
-#ifdef ROM_SDHostIntStatus
-#define MAP_SDHostIntStatus \
-        ROM_SDHostIntStatus
-#else
-#define MAP_SDHostIntStatus \
-        SDHostIntStatus
-#endif
-#ifdef ROM_SDHostIntClear
-#define MAP_SDHostIntClear \
-        ROM_SDHostIntClear
-#else
-#define MAP_SDHostIntClear \
-        SDHostIntClear
-#endif
-#ifdef ROM_SDHostRespStatus
-#define MAP_SDHostRespStatus \
-        ROM_SDHostRespStatus
-#else
-#define MAP_SDHostRespStatus \
-        SDHostRespStatus
-#endif
-#ifdef ROM_SDHostRespGet
-#define MAP_SDHostRespGet \
-        ROM_SDHostRespGet
-#else
-#define MAP_SDHostRespGet \
-        SDHostRespGet
-#endif
-#ifdef ROM_SDHostBlockSizeSet
-#define MAP_SDHostBlockSizeSet \
-        ROM_SDHostBlockSizeSet
-#else
-#define MAP_SDHostBlockSizeSet \
-        SDHostBlockSizeSet
-#endif
-#ifdef ROM_SDHostBlockCountSet
-#define MAP_SDHostBlockCountSet \
-        ROM_SDHostBlockCountSet
-#else
-#define MAP_SDHostBlockCountSet \
-        SDHostBlockCountSet
-#endif
-#ifdef ROM_SDHostDataNonBlockingWrite
-#define MAP_SDHostDataNonBlockingWrite \
-        ROM_SDHostDataNonBlockingWrite
-#else
-#define MAP_SDHostDataNonBlockingWrite \
-        SDHostDataNonBlockingWrite
-#endif
-#ifdef ROM_SDHostDataNonBlockingRead
-#define MAP_SDHostDataNonBlockingRead \
-        ROM_SDHostDataNonBlockingRead
-#else
-#define MAP_SDHostDataNonBlockingRead \
-        SDHostDataNonBlockingRead
-#endif
-#ifdef ROM_SDHostDataWrite
-#define MAP_SDHostDataWrite \
-        ROM_SDHostDataWrite
-#else
-#define MAP_SDHostDataWrite \
-        SDHostDataWrite
-#endif
-#ifdef ROM_SDHostDataRead
-#define MAP_SDHostDataRead \
-        ROM_SDHostDataRead
-#else
-#define MAP_SDHostDataRead \
-        SDHostDataRead
-#endif
-#ifdef ROM_SDHostSetExpClk
-#define MAP_SDHostSetExpClk \
-        ROM_SDHostSetExpClk
-#else
-#define MAP_SDHostSetExpClk \
-        SDHostSetExpClk
-#endif
-
-//*****************************************************************************
-//
-// Macros for the PRCM API.
-//
-//*****************************************************************************
-#ifdef ROM_PRCMMCUReset
-#define MAP_PRCMMCUReset \
-        ROM_PRCMMCUReset
-#else
-#define MAP_PRCMMCUReset \
-        PRCMMCUReset
-#endif
-#ifdef ROM_PRCMSysResetCauseGet
-#define MAP_PRCMSysResetCauseGet \
-        ROM_PRCMSysResetCauseGet
-#else
-#define MAP_PRCMSysResetCauseGet \
-        PRCMSysResetCauseGet
-#endif
-#ifdef ROM_PRCMPeripheralClkEnable
-#define MAP_PRCMPeripheralClkEnable \
-        ROM_PRCMPeripheralClkEnable
-#else
-#define MAP_PRCMPeripheralClkEnable \
-        PRCMPeripheralClkEnable
-#endif
-#ifdef ROM_PRCMPeripheralClkDisable
-#define MAP_PRCMPeripheralClkDisable \
-        ROM_PRCMPeripheralClkDisable
-#else
-#define MAP_PRCMPeripheralClkDisable \
-        PRCMPeripheralClkDisable
-#endif
-#ifdef ROM_PRCMPeripheralReset
-#define MAP_PRCMPeripheralReset \
-        ROM_PRCMPeripheralReset
-#else
-#define MAP_PRCMPeripheralReset \
-        PRCMPeripheralReset
-#endif
-#ifdef ROM_PRCMPeripheralStatusGet
-#define MAP_PRCMPeripheralStatusGet \
-        ROM_PRCMPeripheralStatusGet
-#else
-#define MAP_PRCMPeripheralStatusGet \
-        PRCMPeripheralStatusGet
-#endif
-#ifdef ROM_PRCMI2SClockFreqSet
-#define MAP_PRCMI2SClockFreqSet \
-        ROM_PRCMI2SClockFreqSet
-#else
-#define MAP_PRCMI2SClockFreqSet \
-        PRCMI2SClockFreqSet
-#endif
-#ifdef ROM_PRCMPeripheralClockGet
-#define MAP_PRCMPeripheralClockGet \
-        ROM_PRCMPeripheralClockGet
-#else
-#define MAP_PRCMPeripheralClockGet \
-        PRCMPeripheralClockGet
-#endif
-#ifdef ROM_PRCMSleepEnter
-#define MAP_PRCMSleepEnter \
-        ROM_PRCMSleepEnter
-#else
-#define MAP_PRCMSleepEnter \
-        PRCMSleepEnter
-#endif
-#ifdef ROM_PRCMDeepSleepEnter
-#define MAP_PRCMDeepSleepEnter \
-        ROM_PRCMDeepSleepEnter
-#else
-#define MAP_PRCMDeepSleepEnter \
-        PRCMDeepSleepEnter
-#endif
-#ifdef ROM_PRCMSRAMRetentionEnable
-#define MAP_PRCMSRAMRetentionEnable \
-        ROM_PRCMSRAMRetentionEnable
-#else
-#define MAP_PRCMSRAMRetentionEnable \
-        PRCMSRAMRetentionEnable
-#endif
-#ifdef ROM_PRCMSRAMRetentionDisable
-#define MAP_PRCMSRAMRetentionDisable \
-        ROM_PRCMSRAMRetentionDisable
-#else
-#define MAP_PRCMSRAMRetentionDisable \
-        PRCMSRAMRetentionDisable
-#endif
-#ifdef ROM_PRCMLPDSEnter
-#define MAP_PRCMLPDSEnter \
-        ROM_PRCMLPDSEnter
-#else
-#define MAP_PRCMLPDSEnter \
-        PRCMLPDSEnter
-#endif
-#ifdef ROM_PRCMLPDSIntervalSet
-#define MAP_PRCMLPDSIntervalSet \
-        ROM_PRCMLPDSIntervalSet
-#else
-#define MAP_PRCMLPDSIntervalSet \
-        PRCMLPDSIntervalSet
-#endif
-#ifdef ROM_PRCMLPDSWakeupSourceEnable
-#define MAP_PRCMLPDSWakeupSourceEnable \
-        ROM_PRCMLPDSWakeupSourceEnable
-#else
-#define MAP_PRCMLPDSWakeupSourceEnable \
-        PRCMLPDSWakeupSourceEnable
-#endif
-#ifdef ROM_PRCMLPDSWakeupCauseGet
-#define MAP_PRCMLPDSWakeupCauseGet \
-        ROM_PRCMLPDSWakeupCauseGet
-#else
-#define MAP_PRCMLPDSWakeupCauseGet \
-        PRCMLPDSWakeupCauseGet
-#endif
-#ifdef ROM_PRCMLPDSWakeUpGPIOSelect
-#define MAP_PRCMLPDSWakeUpGPIOSelect \
-        ROM_PRCMLPDSWakeUpGPIOSelect
-#else
-#define MAP_PRCMLPDSWakeUpGPIOSelect \
-        PRCMLPDSWakeUpGPIOSelect
-#endif
-#ifdef ROM_PRCMLPDSWakeupSourceDisable
-#define MAP_PRCMLPDSWakeupSourceDisable \
-        ROM_PRCMLPDSWakeupSourceDisable
-#else
-#define MAP_PRCMLPDSWakeupSourceDisable \
-        PRCMLPDSWakeupSourceDisable
-#endif
-#ifdef ROM_PRCMHibernateEnter
-#define MAP_PRCMHibernateEnter \
-        ROM_PRCMHibernateEnter
-#else
-#define MAP_PRCMHibernateEnter \
-        PRCMHibernateEnter
-#endif
-#ifdef ROM_PRCMHibernateWakeupSourceEnable
-#define MAP_PRCMHibernateWakeupSourceEnable \
-        ROM_PRCMHibernateWakeupSourceEnable
-#else
-#define MAP_PRCMHibernateWakeupSourceEnable \
-        PRCMHibernateWakeupSourceEnable
-#endif
-#ifdef ROM_PRCMHibernateWakeupCauseGet
-#define MAP_PRCMHibernateWakeupCauseGet \
-        ROM_PRCMHibernateWakeupCauseGet
-#else
-#define MAP_PRCMHibernateWakeupCauseGet \
-        PRCMHibernateWakeupCauseGet
-#endif
-#ifdef ROM_PRCMHibernateWakeUpGPIOSelect
-#define MAP_PRCMHibernateWakeUpGPIOSelect \
-        ROM_PRCMHibernateWakeUpGPIOSelect
-#else
-#define MAP_PRCMHibernateWakeUpGPIOSelect \
-        PRCMHibernateWakeUpGPIOSelect
-#endif
-#ifdef ROM_PRCMHibernateWakeupSourceDisable
-#define MAP_PRCMHibernateWakeupSourceDisable \
-        ROM_PRCMHibernateWakeupSourceDisable
-#else
-#define MAP_PRCMHibernateWakeupSourceDisable \
-        PRCMHibernateWakeupSourceDisable
-#endif
-#ifdef ROM_PRCMHibernateIntervalSet
-#define MAP_PRCMHibernateIntervalSet \
-        ROM_PRCMHibernateIntervalSet
-#else
-#define MAP_PRCMHibernateIntervalSet \
-        PRCMHibernateIntervalSet
-#endif
-#ifdef ROM_PRCMSlowClkCtrGet
-#define MAP_PRCMSlowClkCtrGet \
-        ROM_PRCMSlowClkCtrGet
-#else
-#define MAP_PRCMSlowClkCtrGet \
-        PRCMSlowClkCtrGet
-#endif
-#ifdef ROM_PRCMSlowClkCtrMatchSet
-#define MAP_PRCMSlowClkCtrMatchSet \
-        ROM_PRCMSlowClkCtrMatchSet
-#else
-#define MAP_PRCMSlowClkCtrMatchSet \
-        PRCMSlowClkCtrMatchSet
-#endif
-#ifdef ROM_PRCMSlowClkCtrMatchGet
-#define MAP_PRCMSlowClkCtrMatchGet \
-        ROM_PRCMSlowClkCtrMatchGet
-#else
-#define MAP_PRCMSlowClkCtrMatchGet \
-        PRCMSlowClkCtrMatchGet
-#endif
-#ifdef ROM_PRCMOCRRegisterWrite
-#define MAP_PRCMOCRRegisterWrite \
-        ROM_PRCMOCRRegisterWrite
-#else
-#define MAP_PRCMOCRRegisterWrite \
-        PRCMOCRRegisterWrite
-#endif
-#ifdef ROM_PRCMOCRRegisterRead
-#define MAP_PRCMOCRRegisterRead \
-        ROM_PRCMOCRRegisterRead
-#else
-#define MAP_PRCMOCRRegisterRead \
-        PRCMOCRRegisterRead
-#endif
-#ifdef ROM_PRCMIntRegister
-#define MAP_PRCMIntRegister \
-        ROM_PRCMIntRegister
-#else
-#define MAP_PRCMIntRegister \
-        PRCMIntRegister
-#endif
-#ifdef ROM_PRCMIntUnregister
-#define MAP_PRCMIntUnregister \
-        ROM_PRCMIntUnregister
-#else
-#define MAP_PRCMIntUnregister \
-        PRCMIntUnregister
-#endif
-#ifdef ROM_PRCMIntEnable
-#define MAP_PRCMIntEnable \
-        ROM_PRCMIntEnable
-#else
-#define MAP_PRCMIntEnable \
-        PRCMIntEnable
-#endif
-#ifdef ROM_PRCMIntDisable
-#define MAP_PRCMIntDisable \
-        ROM_PRCMIntDisable
-#else
-#define MAP_PRCMIntDisable \
-        PRCMIntDisable
-#endif
-#ifdef ROM_PRCMIntStatus
-#define MAP_PRCMIntStatus \
-        ROM_PRCMIntStatus
-#else
-#define MAP_PRCMIntStatus \
-        PRCMIntStatus
-#endif
-#ifdef ROM_PRCMRTCInUseSet
-#define MAP_PRCMRTCInUseSet \
-        ROM_PRCMRTCInUseSet
-#else
-#define MAP_PRCMRTCInUseSet \
-        PRCMRTCInUseSet
-#endif
-#ifdef ROM_PRCMRTCInUseGet
-#define MAP_PRCMRTCInUseGet \
-        ROM_PRCMRTCInUseGet
-#else
-#define MAP_PRCMRTCInUseGet \
-        PRCMRTCInUseGet
-#endif
-#ifdef ROM_PRCMRTCSet
-#define MAP_PRCMRTCSet \
-        ROM_PRCMRTCSet
-#else
-#define MAP_PRCMRTCSet \
-        PRCMRTCSet
-#endif
-#ifdef ROM_PRCMRTCGet
-#define MAP_PRCMRTCGet \
-        ROM_PRCMRTCGet
-#else
-#define MAP_PRCMRTCGet \
-        PRCMRTCGet
-#endif
-#ifdef ROM_PRCMRTCMatchSet
-#define MAP_PRCMRTCMatchSet \
-        ROM_PRCMRTCMatchSet
-#else
-#define MAP_PRCMRTCMatchSet \
-        PRCMRTCMatchSet
-#endif
-#ifdef ROM_PRCMRTCMatchGet
-#define MAP_PRCMRTCMatchGet \
-        ROM_PRCMRTCMatchGet
-#else
-#define MAP_PRCMRTCMatchGet \
-        PRCMRTCMatchGet
-#endif
-#ifdef ROM_PRCMLPDSRestoreInfoSet
-#define MAP_PRCMLPDSRestoreInfoSet \
-        ROM_PRCMLPDSRestoreInfoSet
-#else
-#define MAP_PRCMLPDSRestoreInfoSet \
-        PRCMLPDSRestoreInfoSet
-#endif
-
-#ifdef ROM_PRCMHIBRegRead
-#define MAP_PRCMHIBRegRead \
-        ROM_PRCMHIBRegRead
-#else
-#define MAP_PRCMHIBRegRead \
-        PRCMHIBRegRead
-#endif
-
-#ifdef ROM_PRCMHIBRegWrite
-#define MAP_PRCMHIBRegWrite \
-        ROM_PRCMHIBRegWrite
-#else
-#define MAP_PRCMHIBRegWrite \
-        PRCMHIBRegWrite
-#endif
-
-//*****************************************************************************
-//
-// Macros for the HWSPINLOCK API.
-//
-//*****************************************************************************
-#ifdef ROM_HwSpinLockAcquire
-#define MAP_HwSpinLockAcquire \
-        ROM_HwSpinLockAcquire
-#else
-#define MAP_HwSpinLockAcquire \
-        HwSpinLockAcquire
-#endif
-#ifdef ROM_HwSpinLockTryAcquire
-#define MAP_HwSpinLockTryAcquire \
-        ROM_HwSpinLockTryAcquire
-#else
-#define MAP_HwSpinLockTryAcquire \
-        HwSpinLockTryAcquire
-#endif
-#ifdef ROM_HwSpinLockRelease
-#define MAP_HwSpinLockRelease \
-        ROM_HwSpinLockRelease
-#else
-#define MAP_HwSpinLockRelease \
-        HwSpinLockRelease
-#endif
-#ifdef ROM_HwSpinLockTest
-#define MAP_HwSpinLockTest \
-        ROM_HwSpinLockTest
-#else
-#define MAP_HwSpinLockTest \
-        HwSpinLockTest
-#endif
-
-//*****************************************************************************
-//
-// Macros for the ADC API.
-//
-//*****************************************************************************
-#ifdef ROM_ADCEnable
-#define MAP_ADCEnable \
-        ROM_ADCEnable
-#else
-#define MAP_ADCEnable \
-        ADCEnable
-#endif
-#ifdef ROM_ADCDisable
-#define MAP_ADCDisable \
-        ROM_ADCDisable
-#else
-#define MAP_ADCDisable \
-        ADCDisable
-#endif
-#ifdef ROM_ADCChannelEnable
-#define MAP_ADCChannelEnable \
-        ROM_ADCChannelEnable
-#else
-#define MAP_ADCChannelEnable \
-        ADCChannelEnable
-#endif
-#ifdef ROM_ADCChannelDisable
-#define MAP_ADCChannelDisable \
-        ROM_ADCChannelDisable
-#else
-#define MAP_ADCChannelDisable \
-        ADCChannelDisable
-#endif
-#ifdef ROM_ADCIntRegister
-#define MAP_ADCIntRegister \
-        ROM_ADCIntRegister
-#else
-#define MAP_ADCIntRegister \
-        ADCIntRegister
-#endif
-#ifdef ROM_ADCIntUnregister
-#define MAP_ADCIntUnregister \
-        ROM_ADCIntUnregister
-#else
-#define MAP_ADCIntUnregister \
-        ADCIntUnregister
-#endif
-#ifdef ROM_ADCIntEnable
-#define MAP_ADCIntEnable \
-        ROM_ADCIntEnable
-#else
-#define MAP_ADCIntEnable \
-        ADCIntEnable
-#endif
-#ifdef ROM_ADCIntDisable
-#define MAP_ADCIntDisable \
-        ROM_ADCIntDisable
-#else
-#define MAP_ADCIntDisable \
-        ADCIntDisable
-#endif
-#ifdef ROM_ADCIntStatus
-#define MAP_ADCIntStatus \
-        ROM_ADCIntStatus
-#else
-#define MAP_ADCIntStatus \
-        ADCIntStatus
-#endif
-#ifdef ROM_ADCIntClear
-#define MAP_ADCIntClear \
-        ROM_ADCIntClear
-#else
-#define MAP_ADCIntClear \
-        ADCIntClear
-#endif
-#ifdef ROM_ADCDMAEnable
-#define MAP_ADCDMAEnable \
-        ROM_ADCDMAEnable
-#else
-#define MAP_ADCDMAEnable \
-        ADCDMAEnable
-#endif
-#ifdef ROM_ADCDMADisable
-#define MAP_ADCDMADisable \
-        ROM_ADCDMADisable
-#else
-#define MAP_ADCDMADisable \
-        ADCDMADisable
-#endif
-#ifdef ROM_ADCChannelGainSet
-#define MAP_ADCChannelGainSet \
-        ROM_ADCChannelGainSet
-#else
-#define MAP_ADCChannelGainSet \
-        ADCChannelGainSet
-#endif
-#ifdef ROM_ADCChannleGainGet
-#define MAP_ADCChannleGainGet \
-        ROM_ADCChannleGainGet
-#else
-#define MAP_ADCChannleGainGet \
-        ADCChannleGainGet
-#endif
-#ifdef ROM_ADCTimerConfig
-#define MAP_ADCTimerConfig \
-        ROM_ADCTimerConfig
-#else
-#define MAP_ADCTimerConfig \
-        ADCTimerConfig
-#endif
-#ifdef ROM_ADCTimerEnable
-#define MAP_ADCTimerEnable \
-        ROM_ADCTimerEnable
-#else
-#define MAP_ADCTimerEnable \
-        ADCTimerEnable
-#endif
-#ifdef ROM_ADCTimerDisable
-#define MAP_ADCTimerDisable \
-        ROM_ADCTimerDisable
-#else
-#define MAP_ADCTimerDisable \
-        ADCTimerDisable
-#endif
-#ifdef ROM_ADCTimerReset
-#define MAP_ADCTimerReset \
-        ROM_ADCTimerReset
-#else
-#define MAP_ADCTimerReset \
-        ADCTimerReset
-#endif
-#ifdef ROM_ADCTimerValueGet
-#define MAP_ADCTimerValueGet \
-        ROM_ADCTimerValueGet
-#else
-#define MAP_ADCTimerValueGet \
-        ADCTimerValueGet
-#endif
-#ifdef ROM_ADCFIFOLvlGet
-#define MAP_ADCFIFOLvlGet \
-        ROM_ADCFIFOLvlGet
-#else
-#define MAP_ADCFIFOLvlGet \
-        ADCFIFOLvlGet
-#endif
-#ifdef ROM_ADCFIFORead
-#define MAP_ADCFIFORead \
-        ROM_ADCFIFORead
-#else
-#define MAP_ADCFIFORead \
-        ADCFIFORead
-#endif
-
-#endif // __ROM_MAP_H__
diff --git a/ports/cc3200/hal/rom_patch.h b/ports/cc3200/hal/rom_patch.h
deleted file mode 100644
index 9fb8017f8e..0000000000
--- a/ports/cc3200/hal/rom_patch.h
+++ /dev/null
@@ -1,98 +0,0 @@
-//*****************************************************************************
-//
-//  rom_patch.h
-//
-//  Macros to facilitate patching driverlib API's in the ROM.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// List of API's in the ROM that need to be patched.
-// For e.g. to patch ROM_UARTCharPut add the line #undef ROM_UARTCharPut
-//*****************************************************************************
-#undef ROM_ADCIntClear
-#undef ROM_IntEnable
-#undef ROM_IntDisable
-#undef ROM_IntPendSet
-#undef ROM_SDHostCardErrorMaskSet
-#undef ROM_SDHostCardErrorMaskGet
-#undef ROM_TimerConfigure
-#undef ROM_TimerDMAEventSet
-#undef ROM_TimerDMAEventGet
-#undef ROM_SDHostDataNonBlockingWrite
-#undef ROM_SDHostDataWrite
-#undef ROM_SDHostDataRead
-#undef ROM_SDHostDataNonBlockingRead
-#undef ROM_PRCMSysResetCauseGet
-#undef ROM_PRCMPeripheralClkEnable
-#undef ROM_PRCMLPDSWakeUpGPIOSelect
-#undef ROM_PRCMHibernateWakeupSourceEnable
-#undef ROM_PRCMHibernateWakeupSourceDisable
-#undef ROM_PRCMHibernateWakeupCauseGet
-#undef ROM_PRCMHibernateIntervalSet
-#undef ROM_PRCMHibernateWakeUpGPIOSelect
-#undef ROM_PRCMHibernateEnter
-#undef ROM_PRCMSlowClkCtrGet
-#undef ROM_PRCMSlowClkCtrMatchSet
-#undef ROM_PRCMSlowClkCtrMatchGet
-#undef ROM_PRCMOCRRegisterWrite
-#undef ROM_PRCMOCRRegisterRead
-#undef ROM_PRCMIntEnable
-#undef ROM_PRCMIntDisable
-#undef ROM_PRCMRTCInUseSet
-#undef ROM_PRCMRTCInUseGet
-#undef ROM_PRCMRTCSet
-#undef ROM_PRCMRTCGet
-#undef ROM_PRCMRTCMatchSet
-#undef ROM_PRCMRTCMatchGet
-#undef ROM_PRCMPeripheralClkDisable
-#undef ROM_PRCMPeripheralReset
-#undef ROM_PRCMPeripheralStatusGet
-#undef ROM_SPIConfigSetExpClk
-#undef ROM_GPIODirModeGet
-#undef ROM_GPIOIntTypeGet
-#undef ROM_I2CMasterInitExpClk
-#undef ROM_AESDataProcess
-#undef ROM_DESDataProcess
-#undef ROM_I2SEnable
-#undef ROM_I2SConfigSetExpClk
-#undef ROM_PinConfigSet
-#undef ROM_PRCMLPDSEnter
-#undef ROM_PRCMCC3200MCUInit
-#undef ROM_SDHostIntStatus
-#undef ROM_SDHostBlockCountSet
-#undef ROM_UARTModemControlSet
-#undef ROM_UARTModemControlClear
-
diff --git a/ports/cc3200/hal/sdhost.c b/ports/cc3200/hal/sdhost.c
deleted file mode 100644
index ba98e359ea..0000000000
--- a/ports/cc3200/hal/sdhost.c
+++ /dev/null
@@ -1,744 +0,0 @@
-//*****************************************************************************
-//
-//  sdhost.c
-//
-//  Driver for the SD Host (SDHost) Interface
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup Secure_Digital_Host_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_mmchs.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_apps_config.h"
-#include "interrupt.h"
-#include "sdhost.h"
-
-
-//*****************************************************************************
-//
-//! Configures SDHost module.
-//!
-//! \param ulBase is the base address of SDHost module.
-//!
-//! This function configures the SDHost module, enabling internal sub-modules.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostInit(unsigned long ulBase)
-{
-  //
-  // Assert module reset
-  //
-  HWREG(ulBase + MMCHS_O_SYSCONFIG) = 0x2;
-
-  //
-  // Wait for soft reset to complete
-  //
-  while( !(HWREG(ulBase + MMCHS_O_SYSCONFIG) & 0x1) )
-  {
-
-  }
-
-  //
-  // Assert internal reset
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= (1 << 24);
-
-  //
-  // Wait for Reset to complete
-  //
-  while( (HWREG(ulBase + MMCHS_O_SYSCTL) & (0x1 << 24)) )
-  {
-
-  }
-
-  //
-  // Set capability register, 1.8 and 3.0 V
-  //
-  HWREG(ulBase + MMCHS_O_CAPA) = (0x7 <<24);
-
-  //
-  // Select bus voltage, 3.0 V
-  //
-  HWREG(ulBase + MMCHS_O_HCTL) |= 0x7 << 9;
-
-  //
-  // Power up the bus
-  //
-  HWREG(ulBase + MMCHS_O_HCTL) |= 1 << 8;
-
-  //
-  // Wait for power on
-  //
-  while( !(HWREG(ulBase + MMCHS_O_HCTL) & (1<<8)) )
-  {
-
-  }
-
-  HWREG(ulBase + MMCHS_O_CON) |= 1 << 21;
-
-  //
-  // Un-mask all events
-  //
-  HWREG(ulBase + MMCHS_O_IE) = 0xFFFFFFFF;
-}
-
-
-//*****************************************************************************
-//
-//! Resets SDHost command line
-//!
-//! \param ulBase is the base address of SDHost module.
-//!
-//! This function assers a soft reset for the command line
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostCmdReset(unsigned long ulBase)
-{
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 1 << 25;
-  while( (HWREG(ulBase + MMCHS_O_SYSCTL) & (1 << 25)) )
-  {
-
-  }
-}
-
-//*****************************************************************************
-//
-//! Sends command over SDHost interface
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulCmd is the command to send.
-//! \param ulArg is the argument for the command.
-//!
-//! This function send command to the attached card over the SDHost interface.
-//!
-//! The \e ulCmd parameter can be one of \b SDHOST_CMD_0 to \b SDHOST_CMD_63.
-//! It can be logically ORed with one or more of the following:
-//! - \b SDHOST_MULTI_BLK for multi-block transfer
-//! - \b SDHOST_WR_CMD          if command is followed by write data
-//! - \b SDHOST_RD_CMD          if command is followed by read data
-//! - \b SDHOST_DMA_EN          if SDHost need to generate DMA request.
-//! - \b SDHOST_RESP_LEN_136    if 136 bit response is expected
-//! - \b SDHOST_RESP_LEN_48     if 48 bit response is expected
-//! - \b SDHOST_RESP_LEN_48B    if 48 bit response with busy bit is expected
-//!
-//! The parameter \e ulArg is the argument for the command
-//!
-//! \return Returns 0 on success, -1 otherwise.
-//
-//*****************************************************************************
-long
-SDHostCmdSend(unsigned long ulBase, unsigned long ulCmd, unsigned ulArg)
-{
-  //
-  // Set Data Timeout
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 0x000E0000;
-
-  //
-  // Check for cmd inhabit
-  //
-  if( (HWREG(ulBase + MMCHS_O_PSTATE) & 0x1))
-  {
-    return -1;
-  }
-
-  //
-  // Set the argument
-  //
-  HWREG(ulBase + MMCHS_O_ARG) = ulArg;
-
-  //
-  // Send the command
-  //
-  HWREG(ulBase + MMCHS_O_CMD) = ulCmd;
-
-  return 0;
-}
-
-//*****************************************************************************
-//
-//! Writes a data word into the SDHost write buffer.
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulData is data word to be transfered.
-//!
-//! This function writes a single data word into the SDHost write buffer. The
-//! function returns \b true if there was a space available in the buffer else
-//! returns \b false.
-//!
-//! \return Return \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-tBoolean
-SDHostDataNonBlockingWrite(unsigned long ulBase, unsigned long ulData)
-{
-
-  //
-  // See if there is a space in the write buffer
-  //
-  if( (HWREG(ulBase + MMCHS_O_PSTATE) & (1<<10)) )
-  {
-    //
-    // Write the data into the buffer
-    //
-    HWREG(ulBase + MMCHS_O_DATA) = ulData;
-
-    //
-    // Success.
-    //
-    return(true);
-  }
-  else
-  {
-    //
-    // No free sapce, failure.
-    //
-    return(false);
-  }
-}
-
-//*****************************************************************************
-//
-//! Waits to write a data word into the SDHost write buffer.
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulData is data word to be transfered.
-//!
-//! This function writes \e ulData into the SDHost write buffer. If there is no
-//! space in the write buffer this function waits until there is a space
-//! available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostDataWrite(unsigned long ulBase, unsigned long ulData)
-{
-  //
-  // Wait until space is available
-  //
-  while( !(HWREG(ulBase + MMCHS_O_PSTATE) & (1<<10)) )
-  {
-
-  }
-
-  //
-  // Write the data
-  //
-  HWREG(ulBase + MMCHS_O_DATA) = ulData;
-}
-
-
-//*****************************************************************************
-//
-//! Waits for a data word from the SDHost read buffer
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param pulData is pointer to read data variable.
-//!
-//! This function reads a single data word from the SDHost read buffer. If there
-//! is no data available in the buffer the function will wait until a data
-//! word is received before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostDataRead(unsigned long ulBase, unsigned long *pulData)
-{
-  //
-  // Wait until data is available
-  //
-  while( !(HWREG(ulBase + MMCHS_O_PSTATE) & (1<<11)) )
-  {
-
-  }
-
-  //
-  // Read the data
-  //
-  *pulData = HWREG(ulBase + MMCHS_O_DATA);
-}
-
-//*****************************************************************************
-//
-//! Reads single data word from the SDHost read buffer
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param pulData is pointer to read data variable.
-//!
-//! This function reads a data word from the SDHost read buffer. The
-//! function returns \b true if there was data available in to buffer else
-//! returns \b false.
-//!
-//! \return Return \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-tBoolean
-SDHostDataNonBlockingRead(unsigned long ulBase, unsigned long *pulData)
-{
-
-  //
-  // See if there is any data in the read buffer.
-  //
-  if( (HWREG(ulBase + MMCHS_O_PSTATE) & (1<11)) )
-  {
-    //
-    // Read the data word.
-    //
-    *pulData = HWREG(ulBase + MMCHS_O_DATA);
-
-    //
-    // Success
-    //
-    return(true);
-  }
-  else
-  {
-    //
-    // No data available, failure.
-    //
-    return(false);
-  }
-}
-
-
-//*****************************************************************************
-//
-//! Registers the interrupt handler for SDHost interrupt
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param pfnHandler is a pointer to the function to be called when the
-//! SDHost interrupt occurs.
-//!
-//! This function does the actual registering of the interrupt handler.  This
-//! function enables the global interrupt in the interrupt controller; specific
-//! SDHost interrupts must be enabled via SDHostIntEnable(). It is the
-//! interrupt handler's responsibility to clear the interrupt source.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
-  //
-  // Register the interrupt handler.
-  //
-  IntRegister(INT_MMCHS, pfnHandler);
-
-  //
-  // Enable the SDHost interrupt.
-  //
-  IntEnable(INT_MMCHS);
-}
-
-//*****************************************************************************
-//
-//! Unregisters the interrupt handler for SDHost interrupt
-//!
-//! \param ulBase is the base address of SDHost module
-//!
-//! This function does the actual unregistering of the interrupt handler.  It
-//! clears the handler to be called when a SDHost interrupt occurs.  This
-//! function also masks off the interrupt in the interrupt controller so that
-//! the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntUnregister(unsigned long ulBase)
-{
-  //
-  // Disable the SDHost interrupt.
-  //
-  IntDisable(INT_MMCHS);
-
-  //
-  // Unregister the interrupt handler.
-  //
-  IntUnregister(INT_MMCHS);
-}
-
-//*****************************************************************************
-//
-//! Enable individual interrupt source for the specified SDHost
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated SDHost interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//! - \b SDHOST_INT_CC    Command Complete interrupt
-//! - \b SDHOST_INT_TC    Transfer Complete interrupt
-//! - \b SDHOST_INT_BWR   Buffer Write Ready interrupt
-//! - \b SDHOST_INT_BRR   Buffer Read Ready interrupt
-//! - \b SDHOST_INT_ERRI  Error interrupt
-//! - \b SDHOST_INT_CTO   Command Timeout error interrupt
-//! - \b SDHOST_INT_CEB   Command End Bit error interrupt
-//! - \b SDHOST_INT_DTO   Data Timeout error interrupt
-//! - \b SDHOST_INT_DCRC  Data CRC error interrupt
-//! - \b SDHOST_INT_DEB   Data End Bit error
-//! - \b SDHOST_INT_CERR  Cart Status Error interrupt
-//! - \b SDHOST_INT_BADA  Bad Data error interrupt
-//! - \b SDHOST_INT_DMARD Read DMA done interrupt
-//! - \b SDHOST_INT_DMAWR Write DMA done interrupt
-//!
-//!     Note that SDHOST_INT_ERRI can only be used with \sa SDHostIntStatus()
-//! and is internally logical OR of all error status bits. Setting this bit
-//! alone as \e ulIntFlags doesn't generates any interrupt.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntEnable(unsigned long ulBase,unsigned long ulIntFlags)
-{
-  //
-  // Enable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) =
-                                                          (ulIntFlags >> 30);
-
-  //
-  // Enable the individual interrupt sources
-  //
-  HWREG(ulBase + MMCHS_O_ISE) |= (ulIntFlags & 0x3FFFFFFF);
-}
-
-//*****************************************************************************
-//
-//! Enable individual interrupt source for the specified SDHost
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
-//!
-//! This function disables the indicated SDHost interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to SDHostIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntDisable(unsigned long ulBase,unsigned long ulIntFlags)
-{
-  //
-  // Disable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) =
-                                                          (ulIntFlags >> 30);
-  //
-  // Disable the individual interrupt sources
-  //
-  HWREG(ulBase + MMCHS_O_ISE) &= ~(ulIntFlags & 0x3FFFFFFF);
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase is the base address of SDHost module.
-//!
-//! This function returns the interrupt status for the specified SDHost.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in SDHostIntEnable().
-//
-//*****************************************************************************
-unsigned long
-SDHostIntStatus(unsigned long ulBase)
-{
-  unsigned long ulIntStatus;
-
-  //
-  // Get DMA done interrupt status
-  //
-  ulIntStatus = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW);
-  ulIntStatus = (ulIntStatus << 30);
-
-  //
-  // Return the status of individual interrupt sources
-  //
-  ulIntStatus |= (HWREG(ulBase + MMCHS_O_STAT) & 0x3FFFFFFF);
-
-  return(ulIntStatus);
-}
-
-//*****************************************************************************
-//
-//! Clears the individual interrupt sources.
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified SDHost interrupt sources are cleared, so that they no longer
-//! assert.  This function must be called in the interrupt handler to keep the
-//! interrupt from being recognized again immediately upon exit.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to SDHostIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntClear(unsigned long ulBase,unsigned long ulIntFlags)
-{
-  //
-  // Clear DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) =
-                                                          (ulIntFlags >> 30);
-  //
-  // Clear the individual interrupt sources
-  //
-  HWREG(ulBase + MMCHS_O_STAT) = (ulIntFlags & 0x3FFFFFFF);
-}
-
-//*****************************************************************************
-//
-//! Sets the card status error mask.
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulErrMask is the bit mask of card status errors to be enabled
-//!
-//! This function sets the card status error mask for response type R1, R1b,
-//! R5, R5b and R6 response. The parameter \e ulErrMask is the bit mask of card
-//! status errors to be enabled, if the corresponding bits in the 'card status'
-//! field of a respose are set then the host controller indicates a card error
-//! interrupt status. Only bits referenced as type E (error) in status field in
-//! the response can set a card status error.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SDHostCardErrorMaskSet(unsigned long ulBase, unsigned long ulErrMask)
-{
-  //
-  // Set the card status error mask
-  //
-  HWREG(ulBase + MMCHS_O_CSRE) = ulErrMask;
-}
-
-
-//*****************************************************************************
-//
-//! Gets the card status error mask.
-//!
-//! \param ulBase is the base address of SDHost module
-//!
-//! This function gets the card status error mask for response type R1, R1b,
-//! R5, R5b and R6 response.
-//!
-//! \return Returns the current card status error.
-//
-//*****************************************************************************
-unsigned long
-SDHostCardErrorMaskGet(unsigned long ulBase)
-{
-  //
-  // Return the card status error mask
-  //
-  return(HWREG(ulBase + MMCHS_O_CSRE));
-}
-
-//*****************************************************************************
-//
-//! Sets the SD Card clock.
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulSDHostClk is the rate of clock supplied to SDHost module
-//! \param ulCardClk is the required SD interface clock
-//!
-//! This function configures the SDHost interface to supply the specified clock
-//! to the connected card.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostSetExpClk(unsigned long ulBase, unsigned long ulSDHostClk,
-             unsigned long ulCardClk)
-{
-  unsigned long ulDiv;
-
-  //
-  // Disable card clock
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) &= ~0x4;
-
-  //
-  // Enable internal clock
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 0x1;
-
-  ulDiv = ((ulSDHostClk/ulCardClk) & 0x3FF);
-
-  //
-  // Set clock divider,
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) = ((HWREG(ulBase + MMCHS_O_SYSCTL) &
-                                     ~0x0000FFC0)| (ulDiv) << 6);
-
-  //
-  // Wait for clock to stablize
-  //
-  while( !(HWREG(ulBase + MMCHS_O_SYSCTL) & 0x2) )
-  {
-
-  }
-
-  //
-  // Enable card clock
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 0x4;
-}
-
-//*****************************************************************************
-//
-//! Get the response for the last command.
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulRespnse is 128-bit response.
-//!
-//! This function gets the response from the SD card for the last command
-//! send.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostRespGet(unsigned long ulBase, unsigned long ulRespnse[4])
-{
-
-  //
-  // Read the responses.
-  //
-  ulRespnse[0] = HWREG(ulBase + MMCHS_O_RSP10);
-  ulRespnse[1] = HWREG(ulBase + MMCHS_O_RSP32);
-  ulRespnse[2] = HWREG(ulBase + MMCHS_O_RSP54);
-  ulRespnse[3] = HWREG(ulBase + MMCHS_O_RSP76);
-
-}
-
-//*****************************************************************************
-//
-//! Set the block size for data transfer
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulBlkSize is the transfer block size in bytes
-//!
-//! This function sets the block size the data transfer.
-//!
-//! The parameter \e ulBlkSize is size of each data block in bytes.
-//! This should be in range 0 - 2^10.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostBlockSizeSet(unsigned long ulBase, unsigned short ulBlkSize)
-{
-  //
-  // Set the block size
-  //
-  HWREG(ulBase + MMCHS_O_BLK) = ((HWREG(ulBase + MMCHS_O_BLK) & 0x00000FFF)|
-                                  (ulBlkSize & 0xFFF));
-}
-
-//*****************************************************************************
-//
-//! Set the block size and count for data transfer
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulBlkCount is the number of blocks
-//!
-//! This function sets block count for the data transfer. This needs to be set
-//! for each block transfer. \sa SDHostBlockSizeSet()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostBlockCountSet(unsigned long ulBase, unsigned short ulBlkCount)
-{
-  unsigned long ulRegVal;
-
-  //
-  // Read the current value
-  //
-  ulRegVal = HWREG(ulBase + MMCHS_O_BLK);
-
-  //
-  // Set the number of blocks
-  //
-  HWREG(ulBase + MMCHS_O_BLK) = ((ulRegVal & 0x0000FFFF)|
-                                  (ulBlkCount << 16));
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/sdhost.h b/ports/cc3200/hal/sdhost.h
deleted file mode 100644
index d0d3984973..0000000000
--- a/ports/cc3200/hal/sdhost.h
+++ /dev/null
@@ -1,204 +0,0 @@
-//*****************************************************************************
-//
-//  sdhost.h
-//
-//  Defines and Macros for the SDHost.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __SDHOST_H__
-#define __SDHOST_H__
-
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-//{
-#endif
-
-
-//*****************************************************************************
-// Values that can be passed to SDHostRespGet().
-//*****************************************************************************
-#define SDHOST_RESP_10 0x00000003
-#define SDHOST_RESP_32 0x00000002
-#define SDHOST_RESP_54 0x00000001
-#define SDHOST_RESP_76 0x00000000
-
-
-//*****************************************************************************
-// Values that can be passed to SDHostIntEnable(), SDHostIntDisable(),
-// SDHostIntClear() ,and returned from SDHostIntStatus().
-//*****************************************************************************
-#define SDHOST_INT_CC    0x00000001
-#define SDHOST_INT_TC    0x00000002
-#define SDHOST_INT_BWR   0x00000010
-#define SDHOST_INT_BRR   0x00000020
-#define SDHOST_INT_ERRI  0x00008000
-#define SDHOST_INT_CTO   0x00010000
-#define SDHOST_INT_CEB   0x00040000
-#define SDHOST_INT_DTO   0x00100000
-#define SDHOST_INT_DCRC  0x00200000
-#define SDHOST_INT_DEB   0x00400000
-#define SDHOST_INT_CERR  0x10000000
-#define SDHOST_INT_BADA  0x20000000
-#define SDHOST_INT_DMARD 0x40000000
-#define SDHOST_INT_DMAWR 0x80000000
-
-//*****************************************************************************
-// Values that can be passed to SDHostCmdSend().
-//*****************************************************************************
-#define SDHOST_CMD_0     0x00000000
-#define SDHOST_CMD_1     0x01000000
-#define SDHOST_CMD_2     0x02000000
-#define SDHOST_CMD_3     0x03000000
-#define SDHOST_CMD_4     0x04000000
-#define SDHOST_CMD_5     0x05000000
-#define SDHOST_CMD_6     0x06000000
-#define SDHOST_CMD_7     0x07000000
-#define SDHOST_CMD_8     0x08000000
-#define SDHOST_CMD_9     0x09000000
-#define SDHOST_CMD_10    0x0A000000
-#define SDHOST_CMD_11    0x0B000000
-#define SDHOST_CMD_12    0x0C000000
-#define SDHOST_CMD_13    0x0D000000
-#define SDHOST_CMD_14    0x0E000000
-#define SDHOST_CMD_15    0x0F000000
-#define SDHOST_CMD_16    0x10000000
-#define SDHOST_CMD_17    0x11000000
-#define SDHOST_CMD_18    0x12000000
-#define SDHOST_CMD_19    0x13000000
-#define SDHOST_CMD_20    0x14000000
-#define SDHOST_CMD_21    0x15000000
-#define SDHOST_CMD_22    0x16000000
-#define SDHOST_CMD_23    0x17000000
-#define SDHOST_CMD_24    0x18000000
-#define SDHOST_CMD_25    0x19000000
-#define SDHOST_CMD_26    0x1A000000
-#define SDHOST_CMD_27    0x1B000000
-#define SDHOST_CMD_28    0x1C000000
-#define SDHOST_CMD_29    0x1D000000
-#define SDHOST_CMD_30    0x1E000000
-#define SDHOST_CMD_31    0x1F000000
-#define SDHOST_CMD_32    0x20000000
-#define SDHOST_CMD_33    0x21000000
-#define SDHOST_CMD_34    0x22000000
-#define SDHOST_CMD_35    0x23000000
-#define SDHOST_CMD_36    0x24000000
-#define SDHOST_CMD_37    0x25000000
-#define SDHOST_CMD_38    0x26000000
-#define SDHOST_CMD_39    0x27000000
-#define SDHOST_CMD_40    0x28000000
-#define SDHOST_CMD_41    0x29000000
-#define SDHOST_CMD_42    0x2A000000
-#define SDHOST_CMD_43    0x2B000000
-#define SDHOST_CMD_44    0x2C000000
-#define SDHOST_CMD_45    0x2D000000
-#define SDHOST_CMD_46    0x2E000000
-#define SDHOST_CMD_47    0x2F000000
-#define SDHOST_CMD_48    0x30000000
-#define SDHOST_CMD_49    0x31000000
-#define SDHOST_CMD_50    0x32000000
-#define SDHOST_CMD_51    0x33000000
-#define SDHOST_CMD_52    0x34000000
-#define SDHOST_CMD_53    0x35000000
-#define SDHOST_CMD_54    0x36000000
-#define SDHOST_CMD_55    0x37000000
-#define SDHOST_CMD_56    0x38000000
-#define SDHOST_CMD_57    0x39000000
-#define SDHOST_CMD_58    0x3A000000
-#define SDHOST_CMD_59    0x3B000000
-#define SDHOST_CMD_60    0x3C000000
-#define SDHOST_CMD_61    0x3D000000
-#define SDHOST_CMD_62    0x3E000000
-#define SDHOST_CMD_63    0x3F000000
-
-//*****************************************************************************
-// Values that can be logically ORed with ulCmd parameter for SDHostCmdSend().
-//*****************************************************************************
-#define SDHOST_MULTI_BLK    0x00000022
-#define SDHOST_DMA_EN       0x00000001
-#define SDHOST_WR_CMD       0x00200000
-#define SDHOST_RD_CMD       0x00200010
-#define SDHOST_RESP_LEN_136 0x00010000
-#define SDHOST_RESP_LEN_48  0x00020000
-#define SDHOST_RESP_LEN_48B 0x00030000
-
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void SDHostCmdReset(unsigned long ulBase);
-extern void SDHostInit(unsigned long ulBase);
-extern long SDHostCmdSend(unsigned long ulBase,unsigned long ulCmd,
-                       unsigned ulArg);
-extern void SDHostIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
-extern void SDHostIntUnregister(unsigned long ulBase);
-extern void SDHostIntEnable(unsigned long ulBase,unsigned long ulIntFlags);
-extern void SDHostIntDisable(unsigned long ulBase,unsigned long ulIntFlags);
-extern unsigned long SDHostIntStatus(unsigned long ulBase);
-extern void SDHostIntClear(unsigned long ulBase,unsigned long ulIntFlags);
-extern void SDHostCardErrorMaskSet(unsigned long ulBase,
-                                   unsigned long ulErrMask);
-extern unsigned long SDHostCardErrorMaskGet(unsigned long ulBase);
-extern void SDHostSetExpClk(unsigned long ulBase, unsigned long ulSDHostClk,
-              unsigned long ulCardClk);
-extern void SDHostRespGet(unsigned long ulBase, unsigned long ulRespnse[4]);
-extern void SDHostBlockSizeSet(unsigned long ulBase, unsigned short ulBlkSize);
-extern void SDHostBlockCountSet(unsigned long ulBase,
-                                unsigned short ulBlkCount);
-extern tBoolean SDHostDataNonBlockingWrite(unsigned long ulBase,
-                                        unsigned long ulData);
-extern tBoolean SDHostDataNonBlockingRead(unsigned long ulBase,
-                                   unsigned long *pulData);
-extern void SDHostDataWrite(unsigned long ulBase, unsigned long ulData);
-extern void SDHostDataRead(unsigned long ulBase, unsigned long *ulData);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-//}
-#endif
-
-#endif // __SDHOST_H__
diff --git a/ports/cc3200/hal/shamd5.c b/ports/cc3200/hal/shamd5.c
deleted file mode 100644
index 6a3cc1cc30..0000000000
--- a/ports/cc3200/hal/shamd5.c
+++ /dev/null
@@ -1,1085 +0,0 @@
-//*****************************************************************************
-//
-//  shamd5.c
-//
-//  Driver for the SHA/MD5 module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup SHA_Secure_Hash_Algorithm_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_dthe.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_shamd5.h"
-#include "inc/hw_types.h"
-#include "debug.h"
-#include "interrupt.h"
-#include "shamd5.h"
-#include "rom_map.h"
-
-#define SHAMD5_MODE_ALGO_MD5         0x00000000  // MD5
-#define SHAMD5_MODE_ALGO_SHA1        0x00000002  // SHA-1
-#define SHAMD5_MODE_ALGO_SHA224      0x00000004  // SHA-224
-#define SHAMD5_MODE_ALGO_SHA256      0x00000006  // SHA-256
-
-//*****************************************************************************
-//
-//! Enables the uDMA requests in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//!
-//! This function configures the DMA options of the SHA/MD5 module.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SHAMD5DMAEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Write the new configuration into the register.
-    //
-    HWREG(ui32Base + SHAMD5_O_SYSCONFIG) |=
-        SHAMD5_SYSCONFIG_PADVANCED | SHAMD5_SYSCONFIG_PDMA_EN;
-}
-
-//*****************************************************************************
-//
-//! Disables the uDMA requests in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//!
-//! This function configures the DMA options of the SHA/MD5 module.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SHAMD5DMADisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Write the new configuration into the register.
-    //
-    HWREG(ui32Base + SHAMD5_O_SYSCONFIG) &=
-        ~(SHAMD5_SYSCONFIG_PADVANCED | SHAMD5_SYSCONFIG_PDMA_EN);
-}
-
-//*****************************************************************************
-//
-//! Get the interrupt status of the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param bMasked is \b false if the raw interrupt status is required and
-//! \b true if the masked interrupt status is required.
-//!
-//! This function returns the current value of the IRQSTATUS register.  The
-//! value will be a logical OR of the following:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return Interrupt status
-//
-//*****************************************************************************
-uint32_t
-SHAMD5IntStatus(uint32_t ui32Base, bool bMasked)
-{
-    uint32_t ui32Temp;
-    uint32_t ui32IrqEnable;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Return the value of the IRQSTATUS register.
-    //
-    if(bMasked)
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_SHA_MIS);
-        ui32IrqEnable = HWREG(ui32Base + SHAMD5_O_IRQENABLE);
-        return((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) &
-                ui32IrqEnable) | (ui32Temp & 0x00000007) << 16);
-    }
-    else
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_SHA_RIS);
-        return(HWREG(ui32Base + SHAMD5_O_IRQSTATUS) |
-               (ui32Temp & 0x00000007) << 16);
-
-    }
-}
-
-//*****************************************************************************
-//
-//! Enable interrupt sources in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32IntFlags contains desired interrupts to enable.
-//!
-//! This function enables interrupt sources in the SHA/MD5 module.
-//! ui32IntFlags must be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32IntFlags == SHAMD5_INT_CONTEXT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_PARTHASH_READY) ||
-           (ui32IntFlags == SHAMD5_INT_INPUT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_OUTPUT_READY));
-
-    //
-    // Enable the interrupt sources.
-    //
-    HWREG(DTHE_BASE + DTHE_O_SHA_IM) &= ~((ui32IntFlags & 0x00070000) >> 16);
-    HWREG(ui32Base + SHAMD5_O_IRQENABLE) |= ui32IntFlags & 0x0000ffff;
-
-    //
-    // Enable all interrupts.
-    //
-    HWREG(ui32Base + SHAMD5_O_SYSCONFIG) |= SHAMD5_SYSCONFIG_PIT_EN;
-}
-
-//*****************************************************************************
-//
-//! Disable interrupt sources in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32IntFlags contains desired interrupts to disable.
-//!
-//! \e ui32IntFlags must be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32IntFlags == SHAMD5_INT_CONTEXT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_PARTHASH_READY) ||
-           (ui32IntFlags == SHAMD5_INT_INPUT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_OUTPUT_READY));
-
-    //
-    // Clear the corresponding flags disabling the interrupt sources.
-    //
-    HWREG(DTHE_BASE + DTHE_O_SHA_IM) |= ((ui32IntFlags & 0x00070000) >> 16);
-    HWREG(ui32Base + SHAMD5_O_IRQENABLE) &= ~(ui32IntFlags & 0x0000ffff);
-
-    //
-    // If there are no interrupts enabled, then disable all interrupts.
-    //
-    if(HWREG(ui32Base + SHAMD5_O_IRQENABLE) == 0x0)
-    {
-        HWREG(ui32Base + SHAMD5_O_SYSCONFIG) &= ~SHAMD5_SYSCONFIG_PIT_EN;
-    }
-}
-
-//*****************************************************************************
-//
-//! Clears interrupt sources in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32IntFlags contains desired interrupts to disable.
-//!
-//! \e ui32IntFlags must be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32IntFlags == SHAMD5_INT_CONTEXT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_PARTHASH_READY) ||
-           (ui32IntFlags == SHAMD5_INT_INPUT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_OUTPUT_READY));
-
-    //
-    // Clear the corresponding flags disabling the interrupt sources.
-    //
-    HWREG(DTHE_BASE + DTHE_O_SHA_IC) = ((ui32IntFlags & 0x00070000) >> 16);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! enabled SHA/MD5 interrupts occur.
-//!
-//! This function registers the interrupt handler in the interrupt vector
-//! table, and enables SHA/MD5 interrupts on the interrupt controller;
-//! specific SHA/MD5 interrupt sources must be enabled using
-//! SHAMD5IntEnable().  The interrupt handler being registered must clear
-//! the source of the interrupt using SHAMD5IntClear().
-//!
-//! If the application is using a static interrupt vector table stored in
-//! flash, then it is not necessary to register the interrupt handler this way.
-//! Instead, IntEnable() should be used to enable SHA/MD5 interrupts on the
-//! interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(INT_SHA, pfnHandler);
-
-    //
-    // Enable the interrupt
-    //
-    IntEnable(INT_SHA);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//!
-//! This function unregisters the previously registered interrupt handler and
-//! disables the interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntUnregister(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(INT_SHA);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(INT_SHA);
-}
-
-//*****************************************************************************
-//
-//! Write the hash length to the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32Length is the hash length in bytes.
-//!
-//! This function writes the length of the hash data of the current operation
-//! to the SHA/MD5 module.  The value must be a multiple of 64 if the close
-//! hash is not set in the mode register.
-//!
-//! \note When this register is written, hash processing is triggered.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5DataLengthSet(uint32_t ui32Base, uint32_t ui32Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Set the LENGTH register and start processing.
-    //
-    HWREG(ui32Base + SHAMD5_O_LENGTH) = ui32Length;
-}
-
-//*****************************************************************************
-//
-//! Writes the mode in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32Mode is the mode of the SHA/MD5 module.
-//!
-//! This function writes the mode register configuring the SHA/MD5 module.
-//!
-//! The ui32Mode paramerter is a bit-wise OR of values:
-//!
-//! - \b SHAMD5_ALGO_MD5 - Regular hash with MD5
-//! - \b SHAMD5_ALGO_SHA1 - Regular hash with SHA-1
-//! - \b SHAMD5_ALGO_SHA224 - Regular hash with SHA-224
-//! - \b SHAMD5_ALGO_SHA256 - Regular hash with SHA-256
-//! - \b SHAMD5_ALGO_HMAC_MD5 - HMAC with MD5
-//! - \b SHAMD5_ALGO_HMAC_SHA1 - HMAC with SHA-1
-//! - \b SHAMD5_ALGO_HMAC_SHA224 - HMAC with SHA-224
-//! - \b SHAMD5_ALGO_HMAC_SHA256 - HMAC with SHA-256
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32Mode == SHAMD5_ALGO_MD5) ||
-           (ui32Mode == SHAMD5_ALGO_SHA1) ||
-           (ui32Mode == SHAMD5_ALGO_SHA224) ||
-           (ui32Mode == SHAMD5_ALGO_SHA256) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_MD5) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_SHA1) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_SHA224) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_SHA256));
-
-    //
-    // Write the value in the MODE register.
-    //
-    HWREG(ui32Base + SHAMD5_O_MODE) = ui32Mode;
-}
-
-//*****************************************************************************
-//
-//! Perform a non-blocking write of 16 words of data to the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8Src is the pointer to the 16-word array of data that will be
-//! written.
-//!
-//! This function writes 16 words of data into the data register.
-//!
-//! \return This function returns true if the write completed successfully.
-//! It returns false if the module was not ready.
-//
-//*****************************************************************************
-bool
-SHAMD5DataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src)
-{
-    uint32_t ui8Counter;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Check that the SHA/MD5 module is ready for data.  If not, return false.
-    //
-    if((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_INPUT_READY) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Write the 16 words of data.
-    //
-    for(ui8Counter = 0; ui8Counter < 64; ui8Counter += 4)
-    {
-        HWREG(ui32Base + SHAMD5_O_DATA0_IN + ui8Counter) = *((uint32_t *)(pui8Src + ui8Counter));
-    }
-
-    //
-    // Return true as a sign of successfully completing the function.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Perform a blocking write of 64 bytes of data to the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8Src is the pointer to the 64-byte array of data that will be
-//! written.
-//!
-//! This function does not return until the module is ready to accept data and
-//! the data has been written.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5DataWrite(uint32_t ui32Base, uint8_t *pui8Src)
-{
-    uint8_t ui8Counter;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Wait for the module to be ready to accept data.
-    //
-    while((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_INPUT_READY) == 0)
-    {
-    }
-
-    //
-    // Write the 64 bytes of data.
-    //
-    for(ui8Counter = 0; ui8Counter < 64; ui8Counter += 4)
-    {
-        HWREG(ui32Base + SHAMD5_O_DATA0_IN + ui8Counter) =
-                                        *((uint32_t *) (pui8Src + ui8Counter));
-    }
-}
-
-
-//*****************************************************************************
-//
-//! Reads the result of a hashing operation.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8Dest is the pointer to the byte array of data that will be
-//! written.
-//!
-//! This function does not return until the module is ready to accept data and
-//! the data has been written.
-//! -----------------------------------------
-//! | Algorithm | Number of Words in Result |
-//! -----------------------------------------
-//! | MD5       | 16 Bytes (128 bits)        |
-//! | SHA-1     | 20 Bytes (160 bits)        |
-//! | SHA-224   | 28 Bytes (224 bits)        |
-//! | SHA-256   | 32 Bytes (256 bits)        |
-//! -----------------------------------------
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5ResultRead(uint32_t ui32Base, uint8_t *pui8Dest)
-{
-    uint32_t ui32Idx, ui32Count;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Determine the number of bytes in the result, based on the hash type.
-    //
-    switch(HWREG(ui32Base + SHAMD5_O_MODE) & SHAMD5_MODE_ALGO_M)
-    {
-        //
-        // The MD5 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_MD5:
-        {
-            //
-            // There are 16 bytes in the MD5 hash.
-            //
-            ui32Count = 16;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The SHA-1 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_SHA1:
-        {
-            //
-            // There are 20 bytes in the SHA-1 hash.
-            //
-            ui32Count = 20;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The SHA-224 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_SHA224:
-        {
-            //
-            // There are 28 bytes in the SHA-224 hash.
-            //
-            ui32Count = 28;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The SHA-256 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_SHA256:
-        {
-            //
-            // There are 32 bytes in the SHA-256 hash.
-            //
-            ui32Count = 32;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The hash type is not recognized.
-        //
-        default:
-        {
-            //
-            // Return without reading a result since the hardware appears to be
-            // misconfigured.
-            //
-            return;
-        }
-    }
-
-    //
-    // Read the hash result.
-    //
-    for(ui32Idx = 0; ui32Idx < ui32Count; ui32Idx += 4)
-    {
-    	*((uint32_t *)(pui8Dest+ui32Idx)) =
-                                HWREG(ui32Base + SHAMD5_O_IDIGEST_A + ui32Idx);
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes multiple words of data into the SHA/MD5 data registers.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8DataSrc is a pointer to an array of data to be written.
-//! \param ui32DataLength is the length of the data to be written in bytes.
-//!
-//! This function writes a variable number of words into the SHA/MD5 data
-//! registers.  The function waits for each block of data to be processed
-//! before another is written.
-//!
-//! \note This function is used by SHAMD5HashCompute(), SHAMD5HMACWithKPP(),
-//! and SHAMD5HMACNoKPP() to process data.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5DataWriteMultiple(uint8_t *pui8DataSrc, uint32_t ui32DataLength)
-{
-    uint32_t ui32Idx, ui32Count, ui32Lastword, ui32TempData = 0;
-    uint8_t * ui8TempData;
-
-
-    //
-    // Calculate the number of blocks of data.
-    //
-    ui32Count = ui32DataLength / 64;
-
-    //
-    // Loop through all the blocks and write them into the data registers
-    // making sure to block additional operations until we can write the
-    // next 16 words.
-    //
-    for (ui32Idx = 0; ui32Idx < ui32Count; ui32Idx++)
-    {
-        //
-        // Write the block of data.
-        //
-        MAP_SHAMD5DataWrite(SHAMD5_BASE, pui8DataSrc);
-        //
-        // Increment the pointer to next block of data.
-        //
-        pui8DataSrc += 64;
-    }
-
-    //
-    // Calculate the remaining bytes of data that don't make up a full block.
-    //
-    ui32Count = ui32DataLength % 64;
-
-    //
-    // If there are bytes that do not make up a whole block, then
-    // write them separately.
-    //
-    if(ui32Count)
-    {
-        //
-        // Wait until the engine has finished processing the previous block.
-        //
-        while ((HWREG(SHAMD5_BASE + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_INPUT_READY) == 0);
-
-        //
-        // Loop through the remaining words.
-        //
-        ui32Count = ui32Count / 4;
-        for (ui32Idx = 0; ui32Idx < ui32Count; ui32Idx ++)
-        {
-            //
-            // Write the word into the data register.
-            //
-            HWREG(SHAMD5_BASE + SHAMD5_O_DATA0_IN + (ui32Idx * 4)) =* ( (uint32_t *) pui8DataSrc);
-            pui8DataSrc +=4;
-        }
-        //
-        // Loop through the remaining bytes
-        //
-        ui32Count = ui32DataLength % 4;
-        ui8TempData = (uint8_t *) &ui32TempData;
-        if(ui32Count)
-        {
-        	ui32Lastword = 0;
-        	if(ui32Idx)
-        	{
-        		ui32Lastword = (ui32Idx-1) *4;
-        	}
-        	for(ui32Idx=0 ; ui32Idx
-//! Polarity Phase  Sub-Mode
-//!   0       0        0
-//!   0       1        1
-//!   1       0        2
-//!   1       1        3
-//!
-//! -//! Required sub mode can be select by setting \e ulSubMode parameter to one -//! of the following -//! - \b SPI_SUB_MODE_0 -//! - \b SPI_SUB_MODE_1 -//! - \b SPI_SUB_MODE_2 -//! - \b SPI_SUB_MODE_3 -//! -//! The parameter \e ulConfig is logical OR of five values: the word length, -//! active level for chip select, software or hardware controled chip select, -//! 3 or 4 pin mode and turbo mode. -//! mode. -//! -//! SPI support 8, 16 and 32 bit word lengths defined by:- -//! - \b SPI_WL_8 -//! - \b SPI_WL_16 -//! - \b SPI_WL_32 -//! -//! Active state of Chip Select can be defined by:- -//! - \b SPI_CS_ACTIVELOW -//! - \b SPI_CS_ACTIVEHIGH -//! -//! SPI chip select can be configured to be controlled either by hardware or -//! software:- -//! - \b SPI_SW_CS -//! - \b SPI_HW_CS -//! -//! The module can work in 3 or 4 pin mode defined by:- -//! - \b SPI_3PIN_MODE -//! - \b SPI_4PIN_MODE -//! -//! Turbo mode can be set on or turned off using:- -//! - \b SPI_TURBO_MODE_ON -//! - \b SPI_TURBO_MODE_OFF -//! -//! \return None. -// -//***************************************************************************** -void -SPIConfigSetExpClk(unsigned long ulBase,unsigned long ulSPIClk, - unsigned long ulBitRate, unsigned long ulMode, - unsigned long ulSubMode, unsigned long ulConfig) -{ - - unsigned long ulRegData; - unsigned long ulDivider; - - // - // Read MODULCTRL register - // - ulRegData = HWREG(ulBase + MCSPI_O_MODULCTRL); - - // - // Set Master mode with h/w chip select - // - ulRegData &= ~(MCSPI_MODULCTRL_MS | - MCSPI_MODULCTRL_SINGLE); - - // - // Enable software control Chip Select, Init delay - // and 3-pin mode - // - ulRegData |= (((ulConfig >> 24) | ulMode) & 0xFF); - - // - // Write the configuration - // - HWREG(ulBase + MCSPI_O_MODULCTRL) = ulRegData; - - // - // Set IS, DPE0, DPE1 based on master or slave mode - // - if(ulMode == SPI_MODE_MASTER) - { - ulRegData = 0x1 << 16; - } - else - { - ulRegData = 0x6 << 16; - } - - // - // set clock divider granularity to 1 cycle - // - ulRegData |= MCSPI_CH0CONF_CLKG; - - // - // Get the divider value - // - ulDivider = ((ulSPIClk/ulBitRate) - 1); - - // - // The least significant four bits of the divider is used to configure - // CLKD in MCSPI_CHCONF next eight least significant bits are used to - // configure the EXTCLK in MCSPI_CHCTRL - // - ulRegData |= ((ulDivider & 0x0000000F) << 2); - HWREG(ulBase + MCSPI_O_CH0CTRL) = ((ulDivider & 0x00000FF0) << 4); - - // - // Set the protocol, CS polarity, word length - // and turbo mode - // - ulRegData = ((ulRegData | - ulSubMode) | (ulConfig & 0x0008FFFF)); - - // - // Write back the CONF register - // - HWREG(ulBase + MCSPI_O_CH0CONF) = ulRegData; - -} - -//***************************************************************************** -// -//! Receives a word from the specified port. -//! -//! \param ulBase is the base address of the SPI module. -//! \param pulData is pointer to receive data variable. -//! -//! This function gets a SPI word from the receive FIFO for the specified -//! port. -//! -//! \return Returns the number of elements read from the receive FIFO. -// -//***************************************************************************** -long -SPIDataGetNonBlocking(unsigned long ulBase, unsigned long *pulData) -{ - unsigned long ulRegVal; - - // - // Read register status register - // - ulRegVal = HWREG(ulBase + MCSPI_O_CH0STAT); - - // - // Check is data is available - // - if(ulRegVal & MCSPI_CH0STAT_RXS) - { - *pulData = HWREG(ulBase + MCSPI_O_RX0); - return(1); - } - - return(0); -} - -//***************************************************************************** -// -//! Waits for the word to be received on the specified port. -//! -//! \param ulBase is the base address of the SPI module. -//! \param pulData is pointer to receive data variable. -//! -//! This function gets a SPI word from the receive FIFO for the specified -//! port. If there is no word available, this function waits until a -//! word is received before returning. -//! -//! \return Returns the word read from the specified port, cast as an -//! \e unsigned long. -// -//***************************************************************************** -void -SPIDataGet(unsigned long ulBase, unsigned long *pulData) -{ - // - // Wait for Rx data - // - while(!(HWREG(ulBase + MCSPI_O_CH0STAT) & MCSPI_CH0STAT_RXS)) - { - } - - // - // Read the value - // - *pulData = HWREG(ulBase + MCSPI_O_RX0); -} - -//***************************************************************************** -// -//! Transmits a word on the specified port. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulData is data to be transmitted. -//! -//! This function transmits a SPI word on the transmit FIFO for the specified -//! port. -//! -//! \return Returns the number of elements written to the transmit FIFO. -//! -//***************************************************************************** -long -SPIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData) -{ - unsigned long ulRegVal; - - // - // Read status register - // - ulRegVal = HWREG(ulBase + MCSPI_O_CH0STAT); - - // - // Write value into Tx register/FIFO - // if space is available - // - if(ulRegVal & MCSPI_CH0STAT_TXS) - { - HWREG(ulBase + MCSPI_O_TX0) = ulData; - return(1); - } - - return(0); -} - -//***************************************************************************** -// -//! Waits until the word is transmitted on the specified port. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulData is data to be transmitted. -//! -//! This function transmits a SPI word on the transmit FIFO for the specified -//! port. This function waits until the space is available on transmit FIFO -//! -//! \return None -//! -//***************************************************************************** -void -SPIDataPut(unsigned long ulBase, unsigned long ulData) -{ - // - // Wait for space in FIFO - // - while(!(HWREG(ulBase + MCSPI_O_CH0STAT)&MCSPI_CH0STAT_TXS)) - { - } - - // - // Write the data - // - HWREG(ulBase + MCSPI_O_TX0) = ulData; -} - -//***************************************************************************** -// -//! Enables the transmit and/or receive FIFOs. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulFlags selects the FIFO(s) to be enabled -//! -//! This function enables the transmit and/or receive FIFOs as specified by -//! \e ulFlags. -//! The parameter \e ulFlags shoulde be logical OR of one or more of the -//! following: -//! - \b SPI_TX_FIFO -//! - \b SPI_RX_FIFO -//! -//! \return None. -// -//***************************************************************************** -void -SPIFIFOEnable(unsigned long ulBase, unsigned long ulFlags) -{ - // - // Set FIFO enable bits. - // - HWREG(ulBase + MCSPI_O_CH0CONF) |= ulFlags; -} - -//***************************************************************************** -// -//! Disables the transmit and/or receive FIFOs. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulFlags selects the FIFO(s) to be enabled -//! -//! This function disables transmit and/or receive FIFOs. as specified by -//! \e ulFlags. -//! The parameter \e ulFlags shoulde be logical OR of one or more of the -//! following: -//! - \b SPI_TX_FIFO -//! - \b SPI_RX_FIFO -//! -//! \return None. -// -//***************************************************************************** -void -SPIFIFODisable(unsigned long ulBase, unsigned long ulFlags) -{ - // - // Reset FIFO Enable bits. - // - HWREG(ulBase + MCSPI_O_CH0CONF) &= ~(ulFlags); -} - -//***************************************************************************** -// -//! Sets the FIFO level at which DMA requests or interrupts are generated. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulTxLevel is the Almost Empty Level for transmit FIFO. -//! \param ulRxLevel is the Almost Full Level for the receive FIFO. -//! -//! This function Sets the FIFO level at which DMA requests or interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void SPIFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel) -{ - unsigned long ulRegVal; - - // - // Read the current configuration - // - ulRegVal = HWREG(ulBase + MCSPI_O_XFERLEVEL); - - // - // Mask and set new FIFO thresholds. - // - ulRegVal = ((ulRegVal & 0xFFFF0000) | (((ulRxLevel-1) << 8) | (ulTxLevel-1))); - - // - // Set the transmit and receive FIFO thresholds. - // - HWREG(ulBase + MCSPI_O_XFERLEVEL) = ulRegVal; - -} - -//***************************************************************************** -// -//! Gets the FIFO level at which DMA requests or interrupts are generated. -//! -//! \param ulBase is the base address of the SPI module -//! \param pulTxLevel is a pointer to storage for the transmit FIFO level -//! \param pulRxLevel is a pointer to storage for the receive FIFO level -//! -//! This function gets the FIFO level at which DMA requests or interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void -SPIFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel) -{ - unsigned long ulRegVal; - - // - // Read the current configuration - // - ulRegVal = HWREG(ulBase + MCSPI_O_XFERLEVEL); - - *pulTxLevel = (ulRegVal & 0xFF); - - *pulRxLevel = ((ulRegVal >> 8) & 0xFF); - -} - -//***************************************************************************** -// -//! Sets the word count. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulWordCount is number of SPI words to be transmitted. -//! -//! This function sets the word count, which is the number of SPI word to -//! be transferred on channel when using the FIFO buffer. -//! -//! \return None. -// -//***************************************************************************** -void -SPIWordCountSet(unsigned long ulBase, unsigned long ulWordCount) -{ - unsigned long ulRegVal; - - // - // Read the current configuration - // - ulRegVal = HWREG(ulBase + MCSPI_O_XFERLEVEL); - - // - // Mask and set the word count - // - HWREG(ulBase + MCSPI_O_XFERLEVEL) = ((ulRegVal & 0x0000FFFF)| - (ulWordCount & 0xFFFF) << 16); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for a SPI interrupt. -//! -//! \param ulBase is the base address of the SPI module -//! \param pfnHandler is a pointer to the function to be called when the -//! SPI interrupt occurs. -//! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! SPI interrupts must be enabled via SPIIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntRegister(unsigned long ulBase, void(*pfnHandler)(void)) -{ - unsigned long ulInt; - - // - // Determine the interrupt number based on the SPI module - // - ulInt = SPIIntNumberGet(ulBase); - - // - // Register the interrupt handler. - // - IntRegister(ulInt, pfnHandler); - - // - // Enable the SPI interrupt. - // - IntEnable(ulInt); -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for a SPI interrupt. -//! -//! \param ulBase is the base address of the SPI module -//! -//! This function does the actual unregistering of the interrupt handler. It -//! clears the handler to be called when a SPI interrupt occurs. This -//! function also masks off the interrupt in the interrupt controller so that -//! the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntUnregister(unsigned long ulBase) -{ - unsigned long ulInt; - - // - // Determine the interrupt number based on the SPI module - // - ulInt = SPIIntNumberGet(ulBase); - - // - // Disable the interrupt. - // - IntDisable(ulInt); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulInt); -} - -//***************************************************************************** -// -//! Enables individual SPI interrupt sources. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled. -//! -//! This function enables the indicated SPI interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter is the logical OR of any of the following: -//! -//! - \b SPI_INT_DMATX -//! - \b SPI_INT_DMARX -//! - \b SPI_INT_EOW -//! - \b SPI_INT_RX_OVRFLOW -//! - \b SPI_INT_RX_FULL -//! - \b SPI_INT_TX_UDRFLOW -//! - \b SPI_INT_TX_EMPTY -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags) -{ - unsigned long ulDmaMsk; - - // - // Enable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMATX) - { - ulDmaMsk = SPIDmaMaskGet(ulBase); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) = ulDmaMsk; - } - - // - // Enable DMA Rx Interrupt - // - if(ulIntFlags & SPI_INT_DMARX) - { - ulDmaMsk = (SPIDmaMaskGet(ulBase) >> 1); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) = ulDmaMsk; - } - - // - // Enable the specific Interrupts - // - HWREG(ulBase + MCSPI_O_IRQENABLE) |= (ulIntFlags & 0x0003000F); -} - - -//***************************************************************************** -// -//! Disables individual SPI interrupt sources. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled. -//! -//! This function disables the indicated SPI interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to SPIIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntDisable(unsigned long ulBase, unsigned long ulIntFlags) -{ - unsigned long ulDmaMsk; - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMATX) - { - ulDmaMsk = SPIDmaMaskGet(ulBase); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) = ulDmaMsk; - } - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMARX) - { - ulDmaMsk = (SPIDmaMaskGet(ulBase) >> 1); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) = ulDmaMsk; - } - - // - // Disable the specific Interrupts - // - HWREG(ulBase + MCSPI_O_IRQENABLE) &= ~(ulIntFlags & 0x0003000F); -} - -//***************************************************************************** -// -//! Gets the current interrupt status. -//! -//! \param ulBase is the base address of the SPI module -//! \param bMasked is \b false if the raw interrupt status is required and -//! \b true if the masked interrupt status is required. -//! -//! This function returns the interrupt status for the specified SPI. -//! The status of interrupts that are allowed to reflect to the processor can -//! be returned. -//! -//! \return Returns the current interrupt status, enumerated as a bit field of -//! values described in SPIIntEnable(). -// -//***************************************************************************** -unsigned long -SPIIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - unsigned long ulIntStat; - unsigned long ulIntFlag; - unsigned long ulDmaMsk; - - // - // Get SPI interrupt status - // - ulIntFlag = HWREG(ulBase + MCSPI_O_IRQSTATUS) & 0x0003000F; - - if(bMasked) - { - ulIntFlag &= HWREG(ulBase + MCSPI_O_IRQENABLE); - } - - // - // Get the interrupt bit - // - ulDmaMsk = SPIDmaMaskGet(ulBase); - - // - // Get the DMA interrupt status - // - if(bMasked) - { - ulIntStat = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED); - } - else - { - ulIntStat = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW); - } - - // - // Get SPI Tx DMA done status - // - if(ulIntStat & ulDmaMsk) - { - ulIntFlag |= SPI_INT_DMATX; - } - - // - // Get SPI Rx DMA done status - // - if(ulIntStat & (ulDmaMsk >> 1)) - { - ulIntFlag |= SPI_INT_DMARX; - } - - // - // Return status - // - return(ulIntFlag); -} - -//***************************************************************************** -// -//! Clears SPI interrupt sources. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared. -//! -//! The specified SPI interrupt sources are cleared, so that they no longer -//! assert. This function must be called in the interrupt handler to keep the -//! interrupt from being recognized again immediately upon exit. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to SPIIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntClear(unsigned long ulBase, unsigned long ulIntFlags) -{ - unsigned long ulDmaMsk; - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMATX) - { - ulDmaMsk = SPIDmaMaskGet(ulBase); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) = ulDmaMsk; - } - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMARX) - { - ulDmaMsk = (SPIDmaMaskGet(ulBase) >> 1); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) = ulDmaMsk; - } - - // - // Clear Interrupts - // - HWREG(ulBase + MCSPI_O_IRQSTATUS) = (ulIntFlags & 0x0003000F); -} - -//***************************************************************************** -// -//! Enables the chip select in software controlled mode -//! -//! \param ulBase is the base address of the SPI module. -//! -//! This function enables the Chip select in software controlled mode. The -//! active state of CS will depend on the configuration done via -//! \sa SPIConfigExpClkSet(). -//! -//! \return None. -// -//***************************************************************************** -void SPICSEnable(unsigned long ulBase) -{ - // - // Set Chip Select enable bit. - // - HWREG( ulBase+MCSPI_O_CH0CONF) |= MCSPI_CH0CONF_FORCE; -} - -//***************************************************************************** -// -//! Disables the chip select in software controlled mode -//! -//! \param ulBase is the base address of the SPI module. -//! -//! This function disables the Chip select in software controlled mode. The -//! active state of CS will depend on the configuration done via -//! sa SPIConfigSetExpClk(). -//! -//! \return None. -// -//***************************************************************************** -void SPICSDisable(unsigned long ulBase) -{ - // - // Reset Chip Select enable bit. - // - HWREG( ulBase+MCSPI_O_CH0CONF) &= ~MCSPI_CH0CONF_FORCE; -} - -//***************************************************************************** -// -//! Send/Receive data buffer over SPI channel -//! -//! \param ulBase is the base address of SPI module -//! \param ucDout is the pointer to Tx data buffer or 0. -//! \param ucDin is pointer to Rx data buffer or 0 -//! \param ulCount is the size of data in bytes. -//! \param ulFlags controlls chip select toggling. -//! -//! This function transfers \e ulCount bytes of data over SPI channel. Since -//! the API sends a SPI word at a time \e ulCount should be a multiple of -//! word length set using SPIConfigSetExpClk(). -//! -//! If the \e ucDout parameter is set to 0, the function will send 0xFF over -//! the SPI MOSI line. -//! -//! If the \e ucDin parameter is set to 0, the function will ignore data on SPI -//! MISO line. -//! -//! The parameter \e ulFlags is logical OR of one or more of the following -//! -//! - \b SPI_CS_ENABLE if CS needs to be enabled at start of transfer. -//! - \b SPI_CS_DISABLE if CS need to be disabled at the end of transfer. -//! -//! This function will not return until data has been transmitted -//! -//! \return Returns 0 on success, -1 otherwise. -// -//***************************************************************************** -long SPITransfer(unsigned long ulBase, unsigned char *ucDout, - unsigned char *ucDin, unsigned long ulCount, - unsigned long ulFlags) -{ - unsigned long ulWordLength; - long lRet; - - // - // Get the word length - // - ulWordLength = (HWREG(ulBase + MCSPI_O_CH0CONF) & MCSPI_CH0CONF_WL_M); - - // - // Check for word length. - // - if( !((ulWordLength == SPI_WL_8) || (ulWordLength == SPI_WL_16) || - (ulWordLength == SPI_WL_32)) ) - { - return -1; - } - - if( ulWordLength == SPI_WL_8 ) - { - // - // Do byte transfer - // - lRet = SPITransfer8(ulBase,ucDout,ucDin,ulCount,ulFlags); - } - else if( ulWordLength == SPI_WL_16 ) - { - - // - // Do half-word transfer - // - lRet = SPITransfer16(ulBase,(unsigned short *)ucDout, - (unsigned short *)ucDin,ulCount,ulFlags); - } - else - { - // - // Do word transfer - // - lRet = SPITransfer32(ulBase,(unsigned long *)ucDout, - (unsigned long *)ucDin,ulCount,ulFlags); - } - - // - // return - // - return lRet; - -} -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/spi.h b/ports/cc3200/hal/spi.h deleted file mode 100644 index 593986bc6d..0000000000 --- a/ports/cc3200/hal/spi.h +++ /dev/null @@ -1,163 +0,0 @@ -//***************************************************************************** -// -// spi.h -// -// Defines and Macros for the SPI. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __SPI_H__ -#define __SPI_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// Values that can be passed to SPIConfigSetExpClk() as ulMode parameter -//***************************************************************************** -#define SPI_MODE_MASTER 0x00000000 -#define SPI_MODE_SLAVE 0x00000004 - -//***************************************************************************** -// Values that can be passed to SPIConfigSetExpClk() as ulSubMode parameter -//***************************************************************************** -#define SPI_SUB_MODE_0 0x00000000 -#define SPI_SUB_MODE_1 0x00000001 -#define SPI_SUB_MODE_2 0x00000002 -#define SPI_SUB_MODE_3 0x00000003 - - -//***************************************************************************** -// Values that can be passed to SPIConfigSetExpClk() as ulConfigFlags parameter -//***************************************************************************** -#define SPI_SW_CTRL_CS 0x01000000 -#define SPI_HW_CTRL_CS 0x00000000 -#define SPI_3PIN_MODE 0x02000000 -#define SPI_4PIN_MODE 0x00000000 -#define SPI_TURBO_ON 0x00080000 -#define SPI_TURBO_OFF 0x00000000 -#define SPI_CS_ACTIVEHIGH 0x00000000 -#define SPI_CS_ACTIVELOW 0x00000040 -#define SPI_WL_8 0x00000380 -#define SPI_WL_16 0x00000780 -#define SPI_WL_32 0x00000F80 - -//***************************************************************************** -// Values that can be passed to SPIFIFOEnable() and SPIFIFODisable() -//***************************************************************************** -#define SPI_TX_FIFO 0x08000000 -#define SPI_RX_FIFO 0x10000000 - -//***************************************************************************** -// Values that can be passed to SPIDMAEnable() and SPIDMADisable() -//***************************************************************************** -#define SPI_RX_DMA 0x00008000 -#define SPI_TX_DMA 0x00004000 - -//***************************************************************************** -// Values that can be passed to SPIIntEnable(), SPIIntDiasble(), -// SPIIntClear() or returned from SPIStatus() -//***************************************************************************** -#define SPI_INT_DMATX 0x20000000 -#define SPI_INT_DMARX 0x10000000 -#define SPI_INT_EOW 0x00020000 -#define SPI_INT_WKS 0x00010000 -#define SPI_INT_RX_OVRFLOW 0x00000008 -#define SPI_INT_RX_FULL 0x00000004 -#define SPI_INT_TX_UDRFLOW 0x00000002 -#define SPI_INT_TX_EMPTY 0x00000001 - -//***************************************************************************** -// Values that can be passed to SPITransfer() -//***************************************************************************** -#define SPI_CS_ENABLE 0x00000001 -#define SPI_CS_DISABLE 0x00000002 - -//***************************************************************************** -// -// API Function prototypes -// -//***************************************************************************** -extern void SPIEnable(unsigned long ulBase); -extern void SPIDisable(unsigned long ulBase); -extern void SPIReset(unsigned long ulBase); -extern void SPIConfigSetExpClk(unsigned long ulBase,unsigned long ulSPIClk, - unsigned long ulBitRate, unsigned long ulMode, - unsigned long ulSubMode, unsigned long ulConfig); -extern long SPIDataGetNonBlocking(unsigned long ulBase, - unsigned long * pulData); -extern void SPIDataGet(unsigned long ulBase, unsigned long *pulData); -extern long SPIDataPutNonBlocking(unsigned long ulBase, - unsigned long ulData); -extern void SPIDataPut(unsigned long ulBase, unsigned long ulData); -extern void SPIFIFOEnable(unsigned long ulBase, unsigned long ulFlags); -extern void SPIFIFODisable(unsigned long ulBase, unsigned long ulFlags); -extern void SPIFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel); -extern void SPIFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel); -extern void SPIWordCountSet(unsigned long ulBase, unsigned long ulWordCount); -extern void SPIIntRegister(unsigned long ulBase, void(*pfnHandler)(void)); -extern void SPIIntUnregister(unsigned long ulBase); -extern void SPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags); -extern void SPIIntDisable(unsigned long ulBase, unsigned long ulIntFlags); -extern unsigned long SPIIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void SPIIntClear(unsigned long ulBase, unsigned long ulIntFlags); -extern void SPIDmaEnable(unsigned long ulBase, unsigned long ulFlags); -extern void SPIDmaDisable(unsigned long ulBase, unsigned long ulFlags); -extern void SPICSEnable(unsigned long ulBase); -extern void SPICSDisable(unsigned long ulBase); -extern long SPITransfer(unsigned long ulBase, unsigned char *ucDout, - unsigned char *ucDin, unsigned long ulSize, - unsigned long ulFlags); - - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __SPI_H__ diff --git a/ports/cc3200/hal/startup_gcc.c b/ports/cc3200/hal/startup_gcc.c deleted file mode 100644 index e173e8fdaf..0000000000 --- a/ports/cc3200/hal/startup_gcc.c +++ /dev/null @@ -1,421 +0,0 @@ -//***************************************************************************** -// startup_gcc.c -// -// Startup code for use with GCC. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#include -#include "inc/hw_nvic.h" -#include "inc/hw_types.h" -#include "fault_registers.h" - -//***************************************************************************** -// -// The following are constructs created by the linker, indicating where the -// the "data" and "bss" segments reside in memory. The initializers for the -// for the "data" segment resides immediately following the "text" segment. -// -//***************************************************************************** -extern uint32_t _data; -extern uint32_t _edata; -extern uint32_t _bss; -extern uint32_t _ebss; -extern uint32_t _estack; - -//***************************************************************************** -// -// Forward declaration of the default fault handlers. -// -//***************************************************************************** -#ifndef BOOTLOADER -__attribute__ ((section (".boot"))) -#endif -void ResetISR(void); -#ifdef DEBUG -static void NmiSR(void) __attribute__( ( naked ) ); -static void FaultISR( void ) __attribute__( ( naked ) ); -void HardFault_HandlerC(uint32_t *pulFaultStackAddress); -static void BusFaultHandler(void) __attribute__( ( naked ) ); -#endif -static void IntDefaultHandler(void) __attribute__( ( naked ) ); - -//***************************************************************************** -// -// External declaration for the freeRTOS handlers -// -//***************************************************************************** -#ifdef USE_FREERTOS -extern void vPortSVCHandler(void); -extern void xPortPendSVHandler(void); -extern void xPortSysTickHandler(void); -#endif - -//***************************************************************************** -// -// The entry point for the application. -// -//***************************************************************************** -extern int main(void); - -//***************************************************************************** -// -// The vector table. Note that the proper constructs must be placed on this to -// ensure that it ends up at physical address 0x0000.0000. -// -//***************************************************************************** -__attribute__ ((section(".intvecs"))) -void (* const g_pfnVectors[256])(void) = -{ - (void (*)(void))((uint32_t)&_estack), // The initial stack pointer - ResetISR, // The reset handler -#ifdef DEBUG - NmiSR, // The NMI handler - FaultISR, // The hard fault handler -#else - IntDefaultHandler, // The NMI handler - IntDefaultHandler, // The hard fault handler -#endif - IntDefaultHandler, // The MPU fault handler -#ifdef DEBUG - BusFaultHandler, // The bus fault handler -#else - IntDefaultHandler, // The bus fault handler -#endif - IntDefaultHandler, // The usage fault handler - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved -#ifdef USE_FREERTOS - vPortSVCHandler, // SVCall handler -#else - IntDefaultHandler, // SVCall handler -#endif - IntDefaultHandler, // Debug monitor handler - 0, // Reserved -#ifdef USE_FREERTOS - xPortPendSVHandler, // The PendSV handler - xPortSysTickHandler, // The SysTick handler -#else - IntDefaultHandler, // The PendSV handler - IntDefaultHandler, // The SysTick handler -#endif - IntDefaultHandler, // GPIO Port A - IntDefaultHandler, // GPIO Port B - IntDefaultHandler, // GPIO Port C - IntDefaultHandler, // GPIO Port D - 0, // Reserved - IntDefaultHandler, // UART0 Rx and Tx - IntDefaultHandler, // UART1 Rx and Tx - 0, // Reserved - IntDefaultHandler, // I2C0 Master and Slave - 0,0,0,0,0, // Reserved - IntDefaultHandler, // ADC Channel 0 - IntDefaultHandler, // ADC Channel 1 - IntDefaultHandler, // ADC Channel 2 - IntDefaultHandler, // ADC Channel 3 - IntDefaultHandler, // Watchdog Timer - IntDefaultHandler, // Timer 0 subtimer A - IntDefaultHandler, // Timer 0 subtimer B - IntDefaultHandler, // Timer 1 subtimer A - IntDefaultHandler, // Timer 1 subtimer B - IntDefaultHandler, // Timer 2 subtimer A - IntDefaultHandler, // Timer 2 subtimer B - 0,0,0,0, // Reserved - IntDefaultHandler, // Flash - 0,0,0,0,0, // Reserved - IntDefaultHandler, // Timer 3 subtimer A - IntDefaultHandler, // Timer 3 subtimer B - 0,0,0,0,0,0,0,0,0, // Reserved - IntDefaultHandler, // uDMA Software Transfer - IntDefaultHandler, // uDMA Error - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - IntDefaultHandler, // SHA - 0,0, // Reserved - IntDefaultHandler, // AES - 0, // Reserved - IntDefaultHandler, // DES - 0,0,0,0,0, // Reserved - IntDefaultHandler, // SDHost - 0, // Reserved - IntDefaultHandler, // I2S - 0, // Reserved - IntDefaultHandler, // Camera - 0,0,0,0,0,0,0, // Reserved - IntDefaultHandler, // NWP to APPS Interrupt - IntDefaultHandler, // Power, Reset and Clock module - 0,0, // Reserved - IntDefaultHandler, // Shared SPI - IntDefaultHandler, // Generic SPI - IntDefaultHandler, // Link SPI - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0 // Reserved -}; - - - -//***************************************************************************** -// -// This is the code that gets called when the processor first starts execution -// following a reset event. Only the absolutely necessary set is performed, -// after which the application supplied entry() routine is called. Any fancy -// actions (such as making decisions based on the reset cause register, and -// resetting the bits in that register) are left solely in the hands of the -// application. -// -//***************************************************************************** - -void ResetISR(void) -{ -#if defined(DEBUG) && !defined(BOOTLOADER) - { - // - // Fill the main stack with a known value so that - // we can measure the main stack high water mark - // - __asm volatile - ( - "ldr r0, =_stack \n" - "ldr r1, =_estack \n" - "mov r2, #0x55555555 \n" - ".thumb_func \n" - "fill_loop: \n" - "cmp r0, r1 \n" - "it lt \n" - "strlt r2, [r0], #4 \n" - "blt fill_loop \n" - ); - } -#endif - - { - // Get the initial stack pointer location from the vector table - // and write this value to the msp register - __asm volatile - ( - "ldr r0, =_text \n" - "ldr r0, [r0] \n" - "msr msp, r0 \n" - ); - } - - { - // - // Zero fill the bss segment. - // - __asm volatile - ( - "ldr r0, =_bss \n" - "ldr r1, =_ebss \n" - "mov r2, #0 \n" - ".thumb_func \n" - "zero_loop: \n" - "cmp r0, r1 \n" - "it lt \n" - "strlt r2, [r0], #4 \n" - "blt zero_loop \n" - ); - } - - { - // - // Call the application's entry point. - // - main(); - } -} - -#ifdef DEBUG -//***************************************************************************** -// -// This is the code that gets called when the processor receives a NMI. This -// simply enters an infinite loop, preserving the system state for examination -// by a debugger. -// -//***************************************************************************** - -static void NmiSR(void) -{ - // Break into the debugger - __asm volatile ("bkpt #0 \n"); - - // - // Enter an infinite loop. - // - for ( ; ; ) - { - } -} - -//***************************************************************************** -// -// This is the code that gets called when the processor receives a hard fault -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** - -static void FaultISR(void) -{ - /* - * Get the appropriate stack pointer, depending on our mode, - * and use it as the parameter to the C handler. This function - * will never return - */ - - __asm volatile - ( - "movs r0, #4 \n" - "mov r1, lr \n" - "tst r0, r1 \n" - "beq _msp \n" - "mrs r0, psp \n" - "b HardFault_HandlerC \n" - "_msp: \n" - "mrs r0, msp \n" - "b HardFault_HandlerC \n" - ) ; -} - -//*********************************************************************************** -// HardFaultHandler_C: -// This is called from the FaultISR with a pointer the Fault stack -// as the parameter. We can then read the values from the stack and place them -// into local variables for ease of reading. -// We then read the various Fault Status and Address Registers to help decode -// cause of the fault. -// The function ends with a BKPT instruction to force control back into the debugger -//*********************************************************************************** -void HardFault_HandlerC(uint32_t *pulFaultStackAddress) -{ - volatile uint32_t r0 ; - volatile uint32_t r1 ; - volatile uint32_t r2 ; - volatile uint32_t r3 ; - volatile uint32_t r12 ; - volatile uint32_t lr ; - volatile uint32_t pc ; - volatile uint32_t psr ; - volatile _CFSR_t _CFSR ; - volatile _HFSR_t _HFSR ; - volatile uint32_t _BFAR ; - - - r0 = pulFaultStackAddress[0]; - r1 = pulFaultStackAddress[1]; - r2 = pulFaultStackAddress[2]; - r3 = pulFaultStackAddress[3]; - r12 = pulFaultStackAddress[4]; - lr = pulFaultStackAddress[5]; - pc = pulFaultStackAddress[6]; - psr = pulFaultStackAddress[7]; - - // Configurable Fault Status Register - // Consists of MMSR, BFSR and UFSR - _CFSR = (*((volatile _CFSR_t *)(0xE000ED28))); - // Hard Fault Status Register - _HFSR = (*((volatile _HFSR_t *)(0xE000ED2C))); - // Bus Fault Address Register - _BFAR = (*((volatile uint32_t *)(0xE000ED38))); - - // Break into the debugger - __asm volatile ("bkpt #0 \n"); - - for ( ; ; ) - { - // Keep the compiler happy - (void)r0, (void)r1, (void)r2, (void)r3, (void)r12, (void)lr, (void)pc, (void)psr; - (void)_CFSR, (void)_HFSR, (void)_BFAR; - } -} - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** - -static void BusFaultHandler(void) -{ - // Break into the debugger - __asm volatile ("bkpt #0 \n"); - - // - // Enter an infinite loop. - // - for ( ; ; ) - { - } -} -#endif - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** -static void IntDefaultHandler(void) -{ -#ifdef DEBUG - // Break into the debugger - __asm volatile ("bkpt #0 \n"); -#endif - - // - // Enter an infinite loop. - // - for ( ; ; ) - { - } -} - diff --git a/ports/cc3200/hal/systick.c b/ports/cc3200/hal/systick.c deleted file mode 100644 index 550e3ed1d2..0000000000 --- a/ports/cc3200/hal/systick.c +++ /dev/null @@ -1,275 +0,0 @@ -//***************************************************************************** -// -// systick.c -// -// Driver for the SysTick timer in NVIC. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup systick_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_types.h" -#include "debug.h" -#include "interrupt.h" -#include "systick.h" - -//***************************************************************************** -// -//! Enables the SysTick counter. -//! -//! This function starts the SysTick counter. If an interrupt handler has been -//! registered, it is called when the SysTick counter rolls over. -//! -//! \note Calling this function causes the SysTick counter to (re)commence -//! counting from its current value. The counter is not automatically reloaded -//! with the period as specified in a previous call to SysTickPeriodSet(). If -//! an immediate reload is required, the \b NVIC_ST_CURRENT register must be -//! written to force the reload. Any write to this register clears the SysTick -//! counter to 0 and causes a reload with the supplied period on the next -//! clock. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickEnable(void) -{ - // - // Enable SysTick. - // - HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE; -} - -//***************************************************************************** -// -//! Disables the SysTick counter. -//! -//! This function stops the SysTick counter. If an interrupt handler has been -//! registered, it is not called until SysTick is restarted. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickDisable(void) -{ - // - // Disable SysTick. - // - HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_ENABLE); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for the SysTick interrupt. -//! -//! \param pfnHandler is a pointer to the function to be called when the -//! SysTick interrupt occurs. -//! -//! This function registers the handler to be called when a SysTick interrupt -//! occurs. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntRegister(void (*pfnHandler)(void)) -{ - // - // Register the interrupt handler, returning an error if an error occurs. - // - IntRegister(FAULT_SYSTICK, pfnHandler); - - // - // Enable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN; -} - -//***************************************************************************** -// -//! Unregisters the interrupt handler for the SysTick interrupt. -//! -//! This function unregisters the handler to be called when a SysTick interrupt -//! occurs. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntUnregister(void) -{ - // - // Disable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN); - - // - // Unregister the interrupt handler. - // - IntUnregister(FAULT_SYSTICK); -} - -//***************************************************************************** -// -//! Enables the SysTick interrupt. -//! -//! This function enables the SysTick interrupt, allowing it to be -//! reflected to the processor. -//! -//! \note The SysTick interrupt handler is not required to clear the SysTick -//! interrupt source because it is cleared automatically by the NVIC when the -//! interrupt handler is called. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntEnable(void) -{ - // - // Enable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN; -} - -//***************************************************************************** -// -//! Disables the SysTick interrupt. -//! -//! This function disables the SysTick interrupt, preventing it from being -//! reflected to the processor. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntDisable(void) -{ - // - // Disable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN); -} - -//***************************************************************************** -// -//! Sets the period of the SysTick counter. -//! -//! \param ulPeriod is the number of clock ticks in each period of the SysTick -//! counter and must be between 1 and 16,777,216, inclusive. -//! -//! This function sets the rate at which the SysTick counter wraps, which -//! equates to the number of processor clocks between interrupts. -//! -//! \note Calling this function does not cause the SysTick counter to reload -//! immediately. If an immediate reload is required, the \b NVIC_ST_CURRENT -//! register must be written. Any write to this register clears the SysTick -//! counter to 0 and causes a reload with the \e ulPeriod supplied here on -//! the next clock after SysTick is enabled. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickPeriodSet(unsigned long ulPeriod) -{ - // - // Check the arguments. - // - ASSERT((ulPeriod > 0) && (ulPeriod <= 16777216)); - - // - // Set the period of the SysTick counter. - // - HWREG(NVIC_ST_RELOAD) = ulPeriod - 1; -} - -//***************************************************************************** -// -//! Gets the period of the SysTick counter. -//! -//! This function returns the rate at which the SysTick counter wraps, which -//! equates to the number of processor clocks between interrupts. -//! -//! \return Returns the period of the SysTick counter. -// -//***************************************************************************** -unsigned long -SysTickPeriodGet(void) -{ - // - // Return the period of the SysTick counter. - // - return(HWREG(NVIC_ST_RELOAD) + 1); -} - -//***************************************************************************** -// -//! Gets the current value of the SysTick counter. -//! -//! This function returns the current value of the SysTick counter, which is -//! a value between the period - 1 and zero, inclusive. -//! -//! \return Returns the current value of the SysTick counter. -// -//***************************************************************************** -unsigned long -SysTickValueGet(void) -{ - // - // Return the current value of the SysTick counter. - // - return(HWREG(NVIC_ST_CURRENT)); -} - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/systick.h b/ports/cc3200/hal/systick.h deleted file mode 100644 index 3d1a33aaa9..0000000000 --- a/ports/cc3200/hal/systick.h +++ /dev/null @@ -1,78 +0,0 @@ -//***************************************************************************** -// -// systick.h -// -// Prototypes for the SysTick driver. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __SYSTICK_H__ -#define __SYSTICK_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** -extern void SysTickEnable(void); -extern void SysTickDisable(void); -extern void SysTickIntRegister(void (*pfnHandler)(void)); -extern void SysTickIntUnregister(void); -extern void SysTickIntEnable(void); -extern void SysTickIntDisable(void); -extern void SysTickPeriodSet(unsigned long ulPeriod); -extern unsigned long SysTickPeriodGet(void); -extern unsigned long SysTickValueGet(void); - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __SYSTICK_H__ diff --git a/ports/cc3200/hal/timer.c b/ports/cc3200/hal/timer.c deleted file mode 100644 index eaa2ed1435..0000000000 --- a/ports/cc3200/hal/timer.c +++ /dev/null @@ -1,1106 +0,0 @@ -//***************************************************************************** -// -// timer.c -// -// Driver for the timer module. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup GPT_General_Purpose_Timer_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_timer.h" -#include "inc/hw_types.h" -#include "debug.h" -#include "interrupt.h" -#include "timer.h" - - -//***************************************************************************** -// -//! \internal -//! Checks a timer base address. -//! -//! \param ulBase is the base address of the timer module. -//! -//! This function determines if a timer module base address is valid. -//! -//! \return Returns \b true if the base address is valid and \b false -//! otherwise. -// -//***************************************************************************** -#ifdef DEBUG -static tBoolean -TimerBaseValid(unsigned long ulBase) -{ - return((ulBase == TIMERA0_BASE) || (ulBase == TIMERA1_BASE) || - (ulBase == TIMERA2_BASE) || (ulBase == TIMERA3_BASE)); -} -#else -#define TimerBaseValid(ulBase) (ulBase) -#endif - -//***************************************************************************** -// -//! Enables the timer(s). -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to enable; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! -//! This function enables operation of the timer module. The timer must be -//! configured before it is enabled. -//! -//! \return None. -// -//***************************************************************************** -void -TimerEnable(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Enable the timer(s) module. - // - HWREG(ulBase + TIMER_O_CTL) |= ulTimer & (TIMER_CTL_TAEN | TIMER_CTL_TBEN); -} - -//***************************************************************************** -// -//! Disables the timer(s). -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to disable; must be one of -//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. -//! -//! This function disables operation of the timer module. -//! -//! \return None. -// -//***************************************************************************** -void -TimerDisable(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Disable the timer module. - // - HWREG(ulBase + TIMER_O_CTL) &= ~(ulTimer & - (TIMER_CTL_TAEN | TIMER_CTL_TBEN)); -} - -//***************************************************************************** -// -//! Configures the timer(s). -//! -//! \param ulBase is the base address of the timer module. -//! \param ulConfig is the configuration for the timer. -//! -//! This function configures the operating mode of the timer(s). The timer -//! module is disabled before being configured, and is left in the disabled -//! state. The 16/32-bit timer is comprised of two 16-bit timers that can -//! operate independently or be concatenated to form a 32-bit timer. -//! -//! The configuration is specified in \e ulConfig as one of the following -//! values: -//! -//! - \b TIMER_CFG_ONE_SHOT - Full-width one-shot timer -//! - \b TIMER_CFG_ONE_SHOT_UP - Full-width one-shot timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_PERIODIC - Full-width periodic timer -//! - \b TIMER_CFG_PERIODIC_UP - Full-width periodic timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_SPLIT_PAIR - Two half-width timers -//! -//! When configured for a pair of half-width timers, each timer is separately -//! configured. The first timer is configured by setting \e ulConfig to -//! the result of a logical OR operation between one of the following values -//! and \e ulConfig: -//! -//! - \b TIMER_CFG_A_ONE_SHOT - Half-width one-shot timer -//! - \b TIMER_CFG_A_ONE_SHOT_UP - Half-width one-shot timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_A_PERIODIC - Half-width periodic timer -//! - \b TIMER_CFG_A_PERIODIC_UP - Half-width periodic timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_A_CAP_COUNT - Half-width edge count capture -//! - \b TIMER_CFG_A_CAP_TIME - Half-width edge time capture -//! - \b TIMER_CFG_A_PWM - Half-width PWM output -//! -//! Similarly, the second timer is configured by setting \e ulConfig to -//! the result of a logical OR operation between one of the corresponding -//! \b TIMER_CFG_B_* values and \e ulConfig. -//! -//! \return None. -// -//***************************************************************************** -void -TimerConfigure(unsigned long ulBase, unsigned long ulConfig) -{ - - ASSERT((ulConfig == TIMER_CFG_ONE_SHOT) || - (ulConfig == TIMER_CFG_ONE_SHOT_UP) || - (ulConfig == TIMER_CFG_PERIODIC) || - (ulConfig == TIMER_CFG_PERIODIC_UP) || - ((ulConfig & 0xff000000) == TIMER_CFG_SPLIT_PAIR)); - ASSERT(((ulConfig & 0xff000000) != TIMER_CFG_SPLIT_PAIR) || - ((((ulConfig & 0x000000ff) == TIMER_CFG_A_ONE_SHOT) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_ONE_SHOT_UP) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_PERIODIC) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_PERIODIC_UP) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_CAP_COUNT) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_CAP_TIME) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_PWM)) && - (((ulConfig & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT_UP) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PERIODIC) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PERIODIC_UP) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_CAP_COUNT) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_CAP_TIME) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PWM)))); - - // - // Enable CCP to IO path - // - HWREG(0x440260B0) = 0xFF; - - // - // Disable the timers. - // - HWREG(ulBase + TIMER_O_CTL) &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN); - - // - // Set the global timer configuration. - // - HWREG(ulBase + TIMER_O_CFG) = ulConfig >> 24; - - // - // Set the configuration of the A and B timers. Note that the B timer - // configuration is ignored by the hardware in 32-bit modes. - // - HWREG(ulBase + TIMER_O_TAMR) = ulConfig & 255; - HWREG(ulBase + TIMER_O_TBMR) = (ulConfig >> 8) & 255; -} - -//***************************************************************************** -// -//! Controls the output level. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param bInvert specifies the output level. -//! -//! This function sets the PWM output level for the specified timer. If the -//! \e bInvert parameter is \b true, then the timer's output is made active -//! low; otherwise, it is made active high. -//! -//! \return None. -// -//***************************************************************************** -void -TimerControlLevel(unsigned long ulBase, unsigned long ulTimer, - tBoolean bInvert) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the output levels as requested. - // - ulTimer &= TIMER_CTL_TAPWML | TIMER_CTL_TBPWML; - HWREG(ulBase + TIMER_O_CTL) = (bInvert ? - (HWREG(ulBase + TIMER_O_CTL) | ulTimer) : - (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer))); -} - -//***************************************************************************** -// -//! Controls the event type. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to be adjusted; must be one of -//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. -//! \param ulEvent specifies the type of event; must be one of -//! \b TIMER_EVENT_POS_EDGE, \b TIMER_EVENT_NEG_EDGE, or -//! \b TIMER_EVENT_BOTH_EDGES. -//! -//! This function sets the signal edge(s) that triggers the timer when in -//! capture mode. -//! -//! \return None. -// -//***************************************************************************** -void -TimerControlEvent(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulEvent) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the event type. - // - ulEvent &= ulTimer & (TIMER_CTL_TAEVENT_M | TIMER_CTL_TBEVENT_M); - HWREG(ulBase + TIMER_O_CTL) = ((HWREG(ulBase + TIMER_O_CTL) & - ~(TIMER_CTL_TAEVENT_M | - TIMER_CTL_TBEVENT_M)) | ulEvent); -} - -//***************************************************************************** -// -//! Controls the stall handling. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to be adjusted; must be one of -//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. -//! \param bStall specifies the response to a stall signal. -//! -//! This function controls the stall response for the specified timer. If the -//! \e bStall parameter is \b true, then the timer stops counting if the -//! processor enters debug mode; otherwise the timer keeps running while in -//! debug mode. -//! -//! \return None. -// -//***************************************************************************** -void -TimerControlStall(unsigned long ulBase, unsigned long ulTimer, - tBoolean bStall) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the stall mode. - // - ulTimer &= TIMER_CTL_TASTALL | TIMER_CTL_TBSTALL; - HWREG(ulBase + TIMER_O_CTL) = (bStall ? - (HWREG(ulBase + TIMER_O_CTL) | ulTimer) : - (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer))); -} - -//***************************************************************************** -// -//! Set the timer prescale value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param ulValue is the timer prescale value which must be between 0 and 255 -//! (inclusive) for 16/32-bit timers. -//! -//! This function sets the value of the input clock prescaler. The prescaler -//! is only operational when in half-width mode and is used to extend the range -//! of the half-width timer modes. -//! -//! \return None. -// -//***************************************************************************** -void -TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - ASSERT(ulValue < 256); - - // - // Set the timer A prescaler if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAPR) = ulValue; - } - - // - // Set the timer B prescaler if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBPR) = ulValue; - } -} - - -//***************************************************************************** -// -//! Get the timer prescale value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. -//! -//! This function gets the value of the input clock prescaler. The prescaler -//! is only operational when in half-width mode and is used to extend the range -//! of the half-width timer modes. -//! -//! \return The value of the timer prescaler. -// -//***************************************************************************** - -unsigned long -TimerPrescaleGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Return the appropriate prescale value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAPR) : - HWREG(ulBase + TIMER_O_TBPR)); -} - -//***************************************************************************** -// -//! Set the timer prescale match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param ulValue is the timer prescale match value which must be between 0 -//! and 255 (inclusive) for 16/32-bit timers. -//! -//! This function sets the value of the input clock prescaler match value. -//! When in a half-width mode that uses the counter match and the prescaler, -//! the prescale match effectively extends the range of the match. -//! -//! \note The availability of the prescaler match varies with the -//! part and timer mode in use. Please consult the datasheet for the part you -//! are using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - ASSERT(ulValue < 256); - - // - // Set the timer A prescale match if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAPMR) = ulValue; - } - - // - // Set the timer B prescale match if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBPMR) = ulValue; - } -} - -//***************************************************************************** -// -//! Get the timer prescale match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. -//! -//! This function gets the value of the input clock prescaler match value. -//! When in a half-width mode that uses the counter match and prescaler, the -//! prescale match effectively extends the range of the match. -//! -//! \note The availability of the prescaler match varies with the -//! part and timer mode in use. Please consult the datasheet for the part you -//! are using to determine whether this support is available. -//! -//! \return The value of the timer prescale match. -// -//***************************************************************************** -unsigned long -TimerPrescaleMatchGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Return the appropriate prescale match value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAPMR) : - HWREG(ulBase + TIMER_O_TBPMR)); -} - -//***************************************************************************** -// -//! Sets the timer load value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used when the -//! timer is configured for full-width operation. -//! \param ulValue is the load value. -//! -//! This function sets the timer load value; if the timer is running then the -//! value is immediately loaded into the timer. -//! -//! \note This function can be used for both full- and half-width modes of -//! 16/32-bit timers. -//! -//! \return None. -// -//***************************************************************************** -void -TimerLoadSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the timer A load value if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAILR) = ulValue; - } - - // - // Set the timer B load value if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBILR) = ulValue; - } -} - -//***************************************************************************** -// -//! Gets the timer load value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for full-width operation. -//! -//! This function gets the currently programmed interval load value for the -//! specified timer. -//! -//! \note This function can be used for both full- and half-width modes of -//! 16/32-bit timers. -//! -//! \return Returns the load value for the timer. -// -//***************************************************************************** -unsigned long -TimerLoadGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Return the appropriate load value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAILR) : - HWREG(ulBase + TIMER_O_TBILR)); -} - -//***************************************************************************** -// -//! Gets the current timer value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for 32-bit operation. -//! -//! This function reads the current value of the specified timer. -//! -//! \return Returns the current value of the timer. -// -//***************************************************************************** -unsigned long -TimerValueGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Return the appropriate timer value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAR) : - HWREG(ulBase + TIMER_O_TBR)); -} - -//***************************************************************************** -// -//! Sets the current timer value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for 32-bit operation. -//! \param ulValue is the new value of the timer to be set. -//! -//! This function sets the current value of the specified timer. -//! -//! \return None. -// -//***************************************************************************** -void -TimerValueSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Set the appropriate timer value. - // - if( (ulTimer == TIMER_A) ) - { - HWREG(ulBase + TIMER_O_TAV) = ulValue; - } - else - { - HWREG(ulBase + TIMER_O_TBV) = ulValue; - } -} - - -//***************************************************************************** -// -//! Sets the timer match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used when the -//! timer is configured for 32-bit operation. -//! \param ulValue is the match value. -//! -//! This function sets the match value for a timer. This is used in capture -//! count mode to determine when to interrupt the processor and in PWM mode to -//! determine the duty cycle of the output signal. -//! -//! \return None. -// -//***************************************************************************** -void -TimerMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the timer A match value if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAMATCHR) = ulValue; - } - - // - // Set the timer B match value if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBMATCHR) = ulValue; - } -} - -//***************************************************************************** -// -//! Gets the timer match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for 32-bit operation. -//! -//! This function gets the match value for the specified timer. -//! -//! \return Returns the match value for the timer. -// -//******************************************************************************** -unsigned long -TimerMatchGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Return the appropriate match value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAMATCHR) : - HWREG(ulBase + TIMER_O_TBMATCHR)); -} - - -//***************************************************************************** -// -//! Registers an interrupt handler for the timer interrupt. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s); must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param pfnHandler is a pointer to the function to be called when the timer -//! interrupt occurs. -//! -//! This function sets the handler to be called when a timer interrupt occurs. -//! In addition, this function enables the global interrupt in the interrupt -//! controller; specific timer interrupts must be enabled via TimerIntEnable(). -//! It is the interrupt handler's responsibility to clear the interrupt source -//! via TimerIntClear(). -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntRegister(unsigned long ulBase, unsigned long ulTimer, - void (*pfnHandler)(void)) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - ulBase = ((ulBase == TIMERA0_BASE) ? INT_TIMERA0A : - ((ulBase == TIMERA1_BASE) ? INT_TIMERA1A : - ((ulBase == TIMERA2_BASE) ? INT_TIMERA2A : INT_TIMERA3A))); - - // - // Register an interrupt handler for timer A if requested. - // - if(ulTimer & TIMER_A) - { - // - // Register the interrupt handler. - // - IntRegister(ulBase, pfnHandler); - - // - // Enable the interrupt. - // - IntEnable(ulBase); - } - - // - // Register an interrupt handler for timer B if requested. - // - if(ulTimer & TIMER_B) - { - // - // Register the interrupt handler. - // - IntRegister(ulBase + 1, pfnHandler); - - // - // Enable the interrupt. - // - IntEnable(ulBase + 1); - } -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for the timer interrupt. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s); must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! -//! This function clears the handler to be called when a timer interrupt -//! occurs. This function also masks off the interrupt in the interrupt -//! controller so that the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Get the interrupt number for this timer module. - // - - ulBase = ((ulBase == TIMERA0_BASE) ? INT_TIMERA0A : - ((ulBase == TIMERA1_BASE) ? INT_TIMERA1A : - ((ulBase == TIMERA2_BASE) ? INT_TIMERA2A : INT_TIMERA3A))); - - - - // - // Unregister the interrupt handler for timer A if requested. - // - if(ulTimer & TIMER_A) - { - // - // Disable the interrupt. - // - IntDisable(ulBase); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulBase); - } - - // - // Unregister the interrupt handler for timer B if requested. - // - if(ulTimer & TIMER_B) - { - // - // Disable the interrupt. - // - IntDisable(ulBase + 1); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulBase + 1); - } -} - -//***************************************************************************** -// -//! Enables individual timer interrupt sources. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled. -//! -//! Enables the indicated timer interrupt sources. Only the sources that are -//! enabled can be reflected to the processor interrupt; disabled sources have -//! no effect on the processor. -//! -//! The \e ulIntFlags parameter must be the logical OR of any combination of -//! the following: -//! -//! - \b TIMER_CAPB_EVENT - Capture B event interrupt -//! - \b TIMER_CAPB_MATCH - Capture B match interrupt -//! - \b TIMER_TIMB_TIMEOUT - Timer B timeout interrupt -//! - \b TIMER_CAPA_EVENT - Capture A event interrupt -//! - \b TIMER_CAPA_MATCH - Capture A match interrupt -//! - \b TIMER_TIMA_TIMEOUT - Timer A timeout interrupt -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Enable the specified interrupts. - // - HWREG(ulBase + TIMER_O_IMR) |= ulIntFlags; -} - -//***************************************************************************** -// -//! Disables individual timer interrupt sources. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled. -//! -//! Disables the indicated timer interrupt sources. Only the sources that are -//! enabled can be reflected to the processor interrupt; disabled sources have -//! no effect on the processor. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to TimerIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Disable the specified interrupts. - // - HWREG(ulBase + TIMER_O_IMR) &= ~(ulIntFlags); -} - -//***************************************************************************** -// -//! Gets the current interrupt status. -//! -//! \param ulBase is the base address of the timer module. -//! \param bMasked is false if the raw interrupt status is required and true if -//! the masked interrupt status is required. -//! -//! This function returns the interrupt status for the timer module. Either -//! the raw interrupt status or the status of interrupts that are allowed to -//! reflect to the processor can be returned. -//! -//! \return The current interrupt status, enumerated as a bit field of -//! values described in TimerIntEnable(). -// -//***************************************************************************** -unsigned long -TimerIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Return either the interrupt status or the raw interrupt status as - // requested. - // - return(bMasked ? HWREG(ulBase + TIMER_O_MIS) : - HWREG(ulBase + TIMER_O_RIS)); -} - -//***************************************************************************** -// -//! Clears timer interrupt sources. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared. -//! -//! The specified timer interrupt sources are cleared, so that they no longer -//! assert. This function must be called in the interrupt handler to keep the -//! interrupt from being triggered again immediately upon exit. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to TimerIntEnable(). -//! -//! \note Because there is a write buffer in the Cortex-M3 processor, it may -//! take several clock cycles before the interrupt source is actually cleared. -//! Therefore, it is recommended that the interrupt source be cleared early in -//! the interrupt handler (as opposed to the very last action) to avoid -//! returning from the interrupt handler before the interrupt source is -//! actually cleared. Failure to do so may result in the interrupt handler -//! being immediately reentered (because the interrupt controller still sees -//! the interrupt source asserted). -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Clear the requested interrupt sources. - // - HWREG(ulBase + TIMER_O_ICR) = ulIntFlags; -} - -//***************************************************************************** -// -//! Enables the events that can trigger a DMA request. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulDMAEvent is a bit mask of the events that can trigger DMA. -//! -//! This function enables the timer events that can trigger the start of a DMA -//! sequence. The DMA trigger events are specified in the \e ui32DMAEvent -//! parameter by passing in the logical OR of the following values: -//! -//! - \b TIMER_DMA_MODEMATCH_B - The mode match DMA trigger for timer B is -//! enabled. -//! - \b TIMER_DMA_CAPEVENT_B - The capture event DMA trigger for timer B is -//! enabled. -//! - \b TIMER_DMA_CAPMATCH_B - The capture match DMA trigger for timer B is -//! enabled. -//! - \b TIMER_DMA_TIMEOUT_B - The timeout DMA trigger for timer B is enabled. -//! - \b TIMER_DMA_MODEMATCH_A - The mode match DMA trigger for timer A is -//! enabled. -//! - \b TIMER_DMA_CAPEVENT_A - The capture event DMA trigger for timer A is -//! enabled. -//! - \b TIMER_DMA_CAPMATCH_A - The capture match DMA trigger for timer A is -//! enabled. -//! - \b TIMER_DMA_TIMEOUT_A - The timeout DMA trigger for timer A is enabled. -//! -//! \return None. -// -//***************************************************************************** -void -TimerDMAEventSet(unsigned long ulBase, unsigned long ulDMAEvent) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Set the DMA triggers. - // - HWREG(ulBase + TIMER_O_DMAEV) = ulDMAEvent; -} - -//***************************************************************************** -// -//! Returns the events that can trigger a DMA request. -//! -//! \param ulBase is the base address of the timer module. -//! -//! This function returns the timer events that can trigger the start of a DMA -//! sequence. The DMA trigger events are the logical OR of the following -//! values: -//! -//! - \b TIMER_DMA_MODEMATCH_B - Enables the mode match DMA trigger for timer -//! B. -//! - \b TIMER_DMA_CAPEVENT_B - Enables the capture event DMA trigger for -//! timer B. -//! - \b TIMER_DMA_CAPMATCH_B - Enables the capture match DMA trigger for -//! timer B. -//! - \b TIMER_DMA_TIMEOUT_B - Enables the timeout DMA trigger for timer B. -//! - \b TIMER_DMA_MODEMATCH_A - Enables the mode match DMA trigger for timer -//! A. -//! - \b TIMER_DMA_CAPEVENT_A - Enables the capture event DMA trigger for -//! timer A. -//! - \b TIMER_DMA_CAPMATCH_A - Enables the capture match DMA trigger for -//! timer A. -//! - \b TIMER_DMA_TIMEOUT_A - Enables the timeout DMA trigger for timer A. -//! -//! \return The timer events that trigger the uDMA. -// -//***************************************************************************** -unsigned long -TimerDMAEventGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Return the current DMA triggers. - // - return(HWREG(ulBase + TIMER_O_DMAEV)); -} -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/timer.h b/ports/cc3200/hal/timer.h deleted file mode 100644 index cbe4d2cb1b..0000000000 --- a/ports/cc3200/hal/timer.h +++ /dev/null @@ -1,210 +0,0 @@ -//***************************************************************************** -// -// timer.h -// -// Prototypes for the timer module -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __TIMER_H__ -#define __TIMER_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// Values that can be passed to TimerConfigure as the ulConfig parameter. -// -//***************************************************************************** - -#define TIMER_CFG_ONE_SHOT 0x00000021 // Full-width one-shot timer -#define TIMER_CFG_ONE_SHOT_UP 0x00000031 // Full-width one-shot up-count - // timer -#define TIMER_CFG_PERIODIC 0x00000022 // Full-width periodic timer -#define TIMER_CFG_PERIODIC_UP 0x00000032 // Full-width periodic up-count - // timer -#define TIMER_CFG_SPLIT_PAIR 0x04000000 // Two half-width timers - -#define TIMER_CFG_A_ONE_SHOT 0x00000021 // Timer A one-shot timer -#define TIMER_CFG_A_ONE_SHOT_UP 0x00000031 // Timer A one-shot up-count timer -#define TIMER_CFG_A_PERIODIC 0x00000022 // Timer A periodic timer -#define TIMER_CFG_A_PERIODIC_UP 0x00000032 // Timer A periodic up-count timer -#define TIMER_CFG_A_CAP_COUNT 0x00000003 // Timer A event counter -#define TIMER_CFG_A_CAP_COUNT_UP 0x00000013 // Timer A event up-counter -#define TIMER_CFG_A_CAP_TIME 0x00000007 // Timer A event timer -#define TIMER_CFG_A_CAP_TIME_UP 0x00000017 // Timer A event up-count timer -#define TIMER_CFG_A_PWM 0x0000000A // Timer A PWM output -#define TIMER_CFG_B_ONE_SHOT 0x00002100 // Timer B one-shot timer -#define TIMER_CFG_B_ONE_SHOT_UP 0x00003100 // Timer B one-shot up-count timer -#define TIMER_CFG_B_PERIODIC 0x00002200 // Timer B periodic timer -#define TIMER_CFG_B_PERIODIC_UP 0x00003200 // Timer B periodic up-count timer -#define TIMER_CFG_B_CAP_COUNT 0x00000300 // Timer B event counter -#define TIMER_CFG_B_CAP_COUNT_UP 0x00001300 // Timer B event up-counter -#define TIMER_CFG_B_CAP_TIME 0x00000700 // Timer B event timer -#define TIMER_CFG_B_CAP_TIME_UP 0x00001700 // Timer B event up-count timer -#define TIMER_CFG_B_PWM 0x00000A00 // Timer B PWM output - -//***************************************************************************** -// -// Values that can be passed to TimerIntEnable, TimerIntDisable, and -// TimerIntClear as the ulIntFlags parameter, and returned from TimerIntStatus. -// -//***************************************************************************** - -#define TIMER_TIMB_DMA 0x00002000 // TimerB DMA Done interrupt -#define TIMER_TIMB_MATCH 0x00000800 // TimerB match interrupt -#define TIMER_CAPB_EVENT 0x00000400 // CaptureB event interrupt -#define TIMER_CAPB_MATCH 0x00000200 // CaptureB match interrupt -#define TIMER_TIMB_TIMEOUT 0x00000100 // TimerB time out interrupt -#define TIMER_TIMA_DMA 0x00000020 // TimerA DMA Done interrupt -#define TIMER_TIMA_MATCH 0x00000010 // TimerA match interrupt -#define TIMER_CAPA_EVENT 0x00000004 // CaptureA event interrupt -#define TIMER_CAPA_MATCH 0x00000002 // CaptureA match interrupt -#define TIMER_TIMA_TIMEOUT 0x00000001 // TimerA time out interrupt - -//***************************************************************************** -// -// Values that can be passed to TimerControlEvent as the ulEvent parameter. -// -//***************************************************************************** -#define TIMER_EVENT_POS_EDGE 0x00000000 // Count positive edges -#define TIMER_EVENT_NEG_EDGE 0x00000404 // Count negative edges -#define TIMER_EVENT_BOTH_EDGES 0x00000C0C // Count both edges - -//***************************************************************************** -// -// Values that can be passed to most of the timer APIs as the ulTimer -// parameter. -// -//***************************************************************************** -#define TIMER_A 0x000000ff // Timer A -#define TIMER_B 0x0000ff00 // Timer B -#define TIMER_BOTH 0x0000ffff // Timer Both - - -//***************************************************************************** -// -// Values that can be passed to TimerSynchronize as the ulTimers parameter. -// -//***************************************************************************** -#define TIMER_0A_SYNC 0x00000001 // Synchronize Timer 0A -#define TIMER_0B_SYNC 0x00000002 // Synchronize Timer 0B -#define TIMER_1A_SYNC 0x00000004 // Synchronize Timer 1A -#define TIMER_1B_SYNC 0x00000008 // Synchronize Timer 1B -#define TIMER_2A_SYNC 0x00000010 // Synchronize Timer 2A -#define TIMER_2B_SYNC 0x00000020 // Synchronize Timer 2B -#define TIMER_3A_SYNC 0x00000040 // Synchronize Timer 3A -#define TIMER_3B_SYNC 0x00000080 // Synchronize Timer 3B - -//***************************************************************************** -// -// Values that can be passed to TimerDMAEventSet() or returned from -// TimerDMAEventGet(). -// -//***************************************************************************** -#define TIMER_DMA_MODEMATCH_B 0x00000800 -#define TIMER_DMA_CAPEVENT_B 0x00000400 -#define TIMER_DMA_CAPMATCH_B 0x00000200 -#define TIMER_DMA_TIMEOUT_B 0x00000100 -#define TIMER_DMA_MODEMATCH_A 0x00000010 -#define TIMER_DMA_CAPEVENT_A 0x00000004 -#define TIMER_DMA_CAPMATCH_A 0x00000002 -#define TIMER_DMA_TIMEOUT_A 0x00000001 - - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** -extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer); -extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer); -extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig); -extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer, - tBoolean bInvert); -extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulEvent); -extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer, - tBoolean bStall); -extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerPrescaleGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerPrescaleMatchGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerLoadSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer); - -extern unsigned long TimerValueGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerValueSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); - -extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerMatchGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer, - void (*pfnHandler)(void)); -extern void TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer); -extern void TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags); -extern void TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags); -extern unsigned long TimerIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags); -extern void TimerDMAEventSet(unsigned long ulBase, unsigned long ulDMAEvent); -extern unsigned long TimerDMAEventGet(unsigned long ulBase); - - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __TIMER_H__ diff --git a/ports/cc3200/hal/uart.c b/ports/cc3200/hal/uart.c deleted file mode 100644 index 33d91414ba..0000000000 --- a/ports/cc3200/hal/uart.c +++ /dev/null @@ -1,1508 +0,0 @@ -//***************************************************************************** -// -// uart.c -// -// Driver for the UART. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup UART_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_types.h" -#include "inc/hw_uart.h" -#include "debug.h" -#include "interrupt.h" -#include "uart.h" - - -//***************************************************************************** -// -// A mapping of UART base address to interupt number. -// -//***************************************************************************** -static const unsigned long g_ppulUARTIntMap[][2] = -{ - { UARTA0_BASE, INT_UARTA0 }, - { UARTA1_BASE, INT_UARTA1 }, -}; - -//***************************************************************************** -// -//! \internal -//! Checks a UART base address. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function determines if a UART port base address is valid. -//! -//! \return Returns \b true if the base address is valid and \b false -//! otherwise. -// -//***************************************************************************** -#ifdef DEBUG -static tBoolean -UARTBaseValid(unsigned long ulBase) -{ - return((ulBase == UARTA0_BASE) || (ulBase == UARTA1_BASE)); -} -#else -#define UARTBaseValid(ulBase) (ulBase) -#endif - -//***************************************************************************** -// -//! \internal -//! Gets the UART interrupt number. -//! -//! \param ulBase is the base address of the UART port. -//! -//! Given a UART base address, returns the corresponding interrupt number. -//! -//! \return Returns a UART interrupt number, or -1 if \e ulBase is invalid. -// -//***************************************************************************** -static long -UARTIntNumberGet(unsigned long ulBase) -{ - unsigned long ulIdx; - - // - // Loop through the table that maps UART base addresses to interrupt - // numbers. - // - for(ulIdx = 0; ulIdx < (sizeof(g_ppulUARTIntMap) / - sizeof(g_ppulUARTIntMap[0])); ulIdx++) - { - // - // See if this base address matches. - // - if(g_ppulUARTIntMap[ulIdx][0] == ulBase) - { - // - // Return the corresponding interrupt number. - // - return(g_ppulUARTIntMap[ulIdx][1]); - } - } - - // - // The base address could not be found, so return an error. - // - return(-1); -} - -//***************************************************************************** -// -//! Sets the type of parity. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulParity specifies the type of parity to use. -//! -//! This function sets the type of parity to use for transmitting and expect -//! when receiving. The \e ulParity parameter must be one of -//! \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD, -//! \b UART_CONFIG_PAR_ONE, or \b UART_CONFIG_PAR_ZERO. The last two allow -//! direct control of the parity bit; it is always either one or zero based on -//! the mode. -//! -//! \return None. -// -//***************************************************************************** -void -UARTParityModeSet(unsigned long ulBase, unsigned long ulParity) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulParity == UART_CONFIG_PAR_NONE) || - (ulParity == UART_CONFIG_PAR_EVEN) || - (ulParity == UART_CONFIG_PAR_ODD) || - (ulParity == UART_CONFIG_PAR_ONE) || - (ulParity == UART_CONFIG_PAR_ZERO)); - - // - // Set the parity mode. - // - HWREG(ulBase + UART_O_LCRH) = ((HWREG(ulBase + UART_O_LCRH) & - ~(UART_LCRH_SPS | UART_LCRH_EPS | - UART_LCRH_PEN)) | ulParity); -} - -//***************************************************************************** -// -//! Gets the type of parity currently being used. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function gets the type of parity used for transmitting data and -//! expected when receiving data. -//! -//! \return Returns the current parity settings, specified as one of -//! \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD, -//! \b UART_CONFIG_PAR_ONE, or \b UART_CONFIG_PAR_ZERO. -// -//***************************************************************************** -unsigned long -UARTParityModeGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the current parity setting. - // - return(HWREG(ulBase + UART_O_LCRH) & - (UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN)); -} - -//***************************************************************************** -// -//! Sets the FIFO level at which interrupts are generated. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulTxLevel is the transmit FIFO interrupt level, specified as one of -//! \b UART_FIFO_TX1_8, \b UART_FIFO_TX2_8, \b UART_FIFO_TX4_8, -//! \b UART_FIFO_TX6_8, or \b UART_FIFO_TX7_8. -//! \param ulRxLevel is the receive FIFO interrupt level, specified as one of -//! \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8, \b UART_FIFO_RX4_8, -//! \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8. -//! -//! This function sets the FIFO level at which transmit and receive interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulTxLevel == UART_FIFO_TX1_8) || - (ulTxLevel == UART_FIFO_TX2_8) || - (ulTxLevel == UART_FIFO_TX4_8) || - (ulTxLevel == UART_FIFO_TX6_8) || - (ulTxLevel == UART_FIFO_TX7_8)); - ASSERT((ulRxLevel == UART_FIFO_RX1_8) || - (ulRxLevel == UART_FIFO_RX2_8) || - (ulRxLevel == UART_FIFO_RX4_8) || - (ulRxLevel == UART_FIFO_RX6_8) || - (ulRxLevel == UART_FIFO_RX7_8)); - - // - // Set the FIFO interrupt levels. - // - HWREG(ulBase + UART_O_IFLS) = ulTxLevel | ulRxLevel; -} - -//***************************************************************************** -// -//! Gets the FIFO level at which interrupts are generated. -//! -//! \param ulBase is the base address of the UART port. -//! \param pulTxLevel is a pointer to storage for the transmit FIFO level, -//! returned as one of \b UART_FIFO_TX1_8, \b UART_FIFO_TX2_8, -//! \b UART_FIFO_TX4_8, \b UART_FIFO_TX6_8, or \b UART_FIFO_TX7_8. -//! \param pulRxLevel is a pointer to storage for the receive FIFO level, -//! returned as one of \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8, -//! \b UART_FIFO_RX4_8, \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8. -//! -//! This function gets the FIFO level at which transmit and receive interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel) -{ - unsigned long ulTemp; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Read the FIFO level register. - // - ulTemp = HWREG(ulBase + UART_O_IFLS); - - // - // Extract the transmit and receive FIFO levels. - // - *pulTxLevel = ulTemp & UART_IFLS_TX_M; - *pulRxLevel = ulTemp & UART_IFLS_RX_M; -} - -//***************************************************************************** -// -//! Sets the configuration of a UART. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulUARTClk is the rate of the clock supplied to the UART module. -//! \param ulBaud is the desired baud rate. -//! \param ulConfig is the data format for the port (number of data bits, -//! number of stop bits, and parity). -//! -//! This function configures the UART for operation in the specified data -//! format. The baud rate is provided in the \e ulBaud parameter and the data -//! format in the \e ulConfig parameter. -//! -//! The \e ulConfig parameter is the logical OR of three values: the number of -//! data bits, the number of stop bits, and the parity. \b UART_CONFIG_WLEN_8, -//! \b UART_CONFIG_WLEN_7, \b UART_CONFIG_WLEN_6, and \b UART_CONFIG_WLEN_5 -//! select from eight to five data bits per byte (respectively). -//! \b UART_CONFIG_STOP_ONE and \b UART_CONFIG_STOP_TWO select one or two stop -//! bits (respectively). \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, -//! \b UART_CONFIG_PAR_ODD, \b UART_CONFIG_PAR_ONE, and \b UART_CONFIG_PAR_ZERO -//! select the parity mode (no parity bit, even parity bit, odd parity bit, -//! parity bit always one, and parity bit always zero, respectively). -//! -//! The peripheral clock is the same as the processor clock. The frequency of -//! the system clock is the value returned by SysCtlClockGet(), or it can be -//! explicitly hard coded if it is constant and known (to save the -//! code/execution overhead of a call to SysCtlClockGet()). -//! -//! -//! \return None. -// -//***************************************************************************** -void -UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long ulBaud, unsigned long ulConfig) -{ - unsigned long ulDiv; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT(ulBaud != 0); - - // - // Stop the UART. - // - UARTDisable(ulBase); - - // - // Is the required baud rate greater than the maximum rate supported - // without the use of high speed mode? - // - if((ulBaud * 16) > ulUARTClk) - { - // - // Enable high speed mode. - // - HWREG(ulBase + UART_O_CTL) |= UART_CTL_HSE; - - // - // Half the supplied baud rate to compensate for enabling high speed - // mode. This allows the following code to be common to both cases. - // - ulBaud /= 2; - } - else - { - // - // Disable high speed mode. - // - HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_HSE); - } - - // - // Compute the fractional baud rate divider. - // - ulDiv = (((ulUARTClk * 8) / ulBaud) + 1) / 2; - - // - // Set the baud rate. - // - HWREG(ulBase + UART_O_IBRD) = ulDiv / 64; - HWREG(ulBase + UART_O_FBRD) = ulDiv % 64; - - // - // Set parity, data length, and number of stop bits. - // - HWREG(ulBase + UART_O_LCRH) = ulConfig; - - // - // Clear the flags register. - // - HWREG(ulBase + UART_O_FR) = 0; - - // - // Start the UART. - // - UARTEnable(ulBase); -} - -//***************************************************************************** -// -//! Gets the current configuration of a UART. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulUARTClk is the rate of the clock supplied to the UART module. -//! \param pulBaud is a pointer to storage for the baud rate. -//! \param pulConfig is a pointer to storage for the data format. -//! -//! The baud rate and data format for the UART is determined, given an -//! explicitly provided peripheral clock (hence the ExpClk suffix). The -//! returned baud rate is the actual baud rate; it may not be the exact baud -//! rate requested or an ``official'' baud rate. The data format returned in -//! \e pulConfig is enumerated the same as the \e ulConfig parameter of -//! UARTConfigSetExpClk(). -//! -//! The peripheral clock is the same as the processor clock. The frequency of -//! the system clock is the value returned by SysCtlClockGet(), or it can be -//! explicitly hard coded if it is constant and known (to save the -//! code/execution overhead of a call to SysCtlClockGet()). -//! -//! -//! \return None. -// -//***************************************************************************** -void -UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long *pulBaud, unsigned long *pulConfig) -{ - unsigned long ulInt, ulFrac; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Compute the baud rate. - // - ulInt = HWREG(ulBase + UART_O_IBRD); - ulFrac = HWREG(ulBase + UART_O_FBRD); - *pulBaud = (ulUARTClk * 4) / ((64 * ulInt) + ulFrac); - - // - // See if high speed mode enabled. - // - if(HWREG(ulBase + UART_O_CTL) & UART_CTL_HSE) - { - // - // High speed mode is enabled so the actual baud rate is actually - // double what was just calculated. - // - *pulBaud *= 2; - } - - // - // Get the parity, data length, and number of stop bits. - // - *pulConfig = (HWREG(ulBase + UART_O_LCRH) & - (UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 | - UART_LCRH_EPS | UART_LCRH_PEN)); -} - -//***************************************************************************** -// -//! Enables transmitting and receiving. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function sets the UARTEN, TXE, and RXE bits, and enables the transmit -//! and receive FIFOs. -//! -//! \return None. -// -//***************************************************************************** -void -UARTEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Enable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN; - - // - // Enable RX, TX, and the UART. - // - HWREG(ulBase + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE | - UART_CTL_RXE); -} - -//***************************************************************************** -// -//! Disables transmitting and receiving. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function clears the UARTEN, TXE, and RXE bits, waits for the end of -//! transmission of the current character, and flushes the transmit FIFO. -//! -//! \return None. -// -//***************************************************************************** -void -UARTDisable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Wait for end of TX. - // - while(HWREG(ulBase + UART_O_FR) & UART_FR_BUSY) - { - } - - // - // Disable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN); - - // - // Disable the UART. - // - HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE | - UART_CTL_RXE); -} - -//***************************************************************************** -// -//! Enables the transmit and receive FIFOs. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This functions enables the transmit and receive FIFOs in the UART. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFOEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Enable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN; -} - -//***************************************************************************** -// -//! Disables the transmit and receive FIFOs. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This functions disables the transmit and receive FIFOs in the UART. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFODisable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Disable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN); -} - -//***************************************************************************** -// -//! Sets the states of the RTS modem control signals. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulControl is a bit-mapped flag indicating which modem control bits -//! should be set. -//! -//! This function sets the states of the RTS modem handshake outputs -//! from the UART. -//! -//! The \e ulControl parameter is the logical OR of any of the following: -//! -//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTModemControlSet(unsigned long ulBase, unsigned long ulControl) -{ - unsigned long ulTemp; - - // - // Check the arguments. - // - - ASSERT(ulBase == UARTA1_BASE); - ASSERT((ulControl & ~(UART_OUTPUT_RTS)) == 0); - - // - // Set the appropriate modem control output bits. - // - ulTemp = HWREG(ulBase + UART_O_CTL); - ulTemp |= (ulControl & (UART_OUTPUT_RTS)); - HWREG(ulBase + UART_O_CTL) = ulTemp; -} - -//***************************************************************************** -// -//! Clears the states of the RTS modem control signals. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulControl is a bit-mapped flag indicating which modem control bits -//! should be set. -//! -//! This function clears the states of the RTS modem handshake outputs -//! from the UART. -//! -//! The \e ulControl parameter is the logical OR of any of the following: -//! -//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTModemControlClear(unsigned long ulBase, unsigned long ulControl) -{ - unsigned long ulTemp; - - // - // Check the arguments. - // - ASSERT(ulBase == UARTA1_BASE); - ASSERT((ulControl & ~(UART_OUTPUT_RTS)) == 0); - - // - // Set the appropriate modem control output bits. - // - ulTemp = HWREG(ulBase + UART_O_CTL); - ulTemp &= ~(ulControl & (UART_OUTPUT_RTS)); - HWREG(ulBase + UART_O_CTL) = ulTemp; -} - -//***************************************************************************** -// -//! Gets the states of the RTS modem control signals. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current states of each of the UART modem -//! control signal, RTS. -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return Returns the states of the handshake output signal. -// -//***************************************************************************** -unsigned long -UARTModemControlGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(ulBase == UARTA1_BASE); - - return(HWREG(ulBase + UART_O_CTL) & (UART_OUTPUT_RTS)); -} - -//***************************************************************************** -// -//! Gets the states of the CTS modem status signal. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current states of the UART modem status signal, -//! CTS. -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return Returns the states of the handshake output signal -// -//***************************************************************************** -unsigned long -UARTModemStatusGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - - ASSERT(ulBase == UARTA1_BASE); - - return(HWREG(ulBase + UART_O_FR) & (UART_INPUT_CTS)); -} - -//***************************************************************************** -// -//! Sets the UART hardware flow control mode to be used. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulMode indicates the flow control modes to be used. This parameter -//! is a logical OR combination of values \b UART_FLOWCONTROL_TX and -//! \b UART_FLOWCONTROL_RX to enable hardware transmit (CTS) and receive (RTS) -//! flow control or \b UART_FLOWCONTROL_NONE to disable hardware flow control. -//! -//! This function sets the required hardware flow control modes. If \e ulMode -//! contains flag \b UART_FLOWCONTROL_TX, data is only transmitted if the -//! incoming CTS signal is asserted. If \e ulMode contains flag -//! \b UART_FLOWCONTROL_RX, the RTS output is controlled by the hardware and is -//! asserted only when there is space available in the receive FIFO. If no -//! hardware flow control is required, \b UART_FLOWCONTROL_NONE should be -//! passed. -//! -//! \note The availability of hardware flow control varies with the -//! part and UART in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode) -{ - // - // Check the arguments. - // - - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulMode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0); - - // - // Set the flow control mode as requested. - // - HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) & - ~(UART_FLOWCONTROL_TX | - UART_FLOWCONTROL_RX)) | ulMode); -} - -//***************************************************************************** -// -//! Returns the UART hardware flow control mode currently in use. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current hardware flow control mode. -//! -//! \note The availability of hardware flow control varies with the -//! part and UART in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return Returns the current flow control mode in use. This is a -//! logical OR combination of values \b UART_FLOWCONTROL_TX if transmit -//! (CTS) flow control is enabled and \b UART_FLOWCONTROL_RX if receive (RTS) -//! flow control is in use. If hardware flow control is disabled, -//! \b UART_FLOWCONTROL_NONE is returned. -// -//***************************************************************************** -unsigned long -UARTFlowControlGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - - ASSERT(UARTBaseValid(ulBase)); - - return(HWREG(ulBase + UART_O_CTL) & (UART_FLOWCONTROL_TX | - UART_FLOWCONTROL_RX)); -} - -//***************************************************************************** -// -//! Sets the operating mode for the UART transmit interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulMode is the operating mode for the transmit interrupt. It may be -//! \b UART_TXINT_MODE_EOT to trigger interrupts when the transmitter is idle -//! or \b UART_TXINT_MODE_FIFO to trigger based on the current transmit FIFO -//! level. -//! -//! This function allows the mode of the UART transmit interrupt to be set. By -//! default, the transmit interrupt is asserted when the FIFO level falls past -//! a threshold set via a call to UARTFIFOLevelSet(). Alternatively, if this -//! function is called with \e ulMode set to \b UART_TXINT_MODE_EOT, the -//! transmit interrupt is asserted once the transmitter is completely idle - -//! the transmit FIFO is empty and all bits, including any stop bits, have -//! cleared the transmitter. -//! -//! \note The availability of end-of-transmission mode varies with the -//! part in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulMode == UART_TXINT_MODE_EOT) || - (ulMode == UART_TXINT_MODE_FIFO)); - - // - // Set or clear the EOT bit of the UART control register as appropriate. - // - HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) & - ~(UART_TXINT_MODE_EOT | - UART_TXINT_MODE_FIFO)) | ulMode); -} - -//***************************************************************************** -// -//! Returns the current operating mode for the UART transmit interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current operating mode for the UART transmit -//! interrupt. The return value is \b UART_TXINT_MODE_EOT if the transmit -//! interrupt is currently set to be asserted once the transmitter is -//! completely idle - the transmit FIFO is empty and all bits, including any -//! stop bits, have cleared the transmitter. The return value is -//! \b UART_TXINT_MODE_FIFO if the interrupt is set to be asserted based upon -//! the level of the transmit FIFO. -//! -//! \note The availability of end-of-transmission mode varies with the -//! part in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return Returns \b UART_TXINT_MODE_FIFO or \b UART_TXINT_MODE_EOT. -// -//***************************************************************************** -unsigned long -UARTTxIntModeGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the current transmit interrupt mode. - // - return(HWREG(ulBase + UART_O_CTL) & (UART_TXINT_MODE_EOT | - UART_TXINT_MODE_FIFO)); -} - -//***************************************************************************** -// -//! Determines if there are any characters in the receive FIFO. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns a flag indicating whether or not there is data -//! available in the receive FIFO. -//! -//! \return Returns \b true if there is data in the receive FIFO or \b false -//! if there is no data in the receive FIFO. -// -//***************************************************************************** -tBoolean -UARTCharsAvail(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the availability of characters. - // - return((HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) ? false : true); -} - -//***************************************************************************** -// -//! Determines if there is any space in the transmit FIFO. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns a flag indicating whether or not there is space -//! available in the transmit FIFO. -//! -//! \return Returns \b true if there is space available in the transmit FIFO -//! or \b false if there is no space available in the transmit FIFO. -// -//***************************************************************************** -tBoolean -UARTSpaceAvail(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the availability of space. - // - return((HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) ? false : true); -} - -//***************************************************************************** -// -//! Receives a character from the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function gets a character from the receive FIFO for the specified -//! port. -//! -//! -//! \return Returns the character read from the specified port, cast as a -//! \e long. A \b -1 is returned if there are no characters present in the -//! receive FIFO. The UARTCharsAvail() function should be called before -//! attempting to call this function. -// -//***************************************************************************** -long -UARTCharGetNonBlocking(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // See if there are any characters in the receive FIFO. - // - if(!(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE)) - { - // - // Read and return the next character. - // - return(HWREG(ulBase + UART_O_DR)); - } - else - { - // - // There are no characters, so return a failure. - // - return(-1); - } -} - -//***************************************************************************** -// -//! Waits for a character from the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function gets a character from the receive FIFO for the specified -//! port. If there are no characters available, this function waits until a -//! character is received before returning. -//! -//! \return Returns the character read from the specified port, cast as a -//! \e long. -// -//***************************************************************************** -long -UARTCharGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Wait until a char is available. - // - while(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) - { - } - - // - // Now get the char. - // - return(HWREG(ulBase + UART_O_DR)); -} - -//***************************************************************************** -// -//! Sends a character to the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! \param ucData is the character to be transmitted. -//! -//! This function writes the character \e ucData to the transmit FIFO for the -//! specified port. This function does not block, so if there is no space -//! available, then a \b false is returned, and the application must retry the -//! function later. -//! -//! \return Returns \b true if the character was successfully placed in the -//! transmit FIFO or \b false if there was no space available in the transmit -//! FIFO. -// -//***************************************************************************** -tBoolean -UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // See if there is space in the transmit FIFO. - // - if(!(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF)) - { - // - // Write this character to the transmit FIFO. - // - HWREG(ulBase + UART_O_DR) = ucData; - - // - // Success. - // - return(true); - } - else - { - // - // There is no space in the transmit FIFO, so return a failure. - // - return(false); - } -} - -//***************************************************************************** -// -//! Waits to send a character from the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! \param ucData is the character to be transmitted. -//! -//! This function sends the character \e ucData to the transmit FIFO for the -//! specified port. If there is no space available in the transmit FIFO, this -//! function waits until there is space available before returning. -//! -//! \return None. -// -//***************************************************************************** -void -UARTCharPut(unsigned long ulBase, unsigned char ucData) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Wait until space is available. - // - while(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) - { - } - - // - // Send the char. - // - HWREG(ulBase + UART_O_DR) = ucData; -} - -//***************************************************************************** -// -//! Causes a BREAK to be sent. -//! -//! \param ulBase is the base address of the UART port. -//! \param bBreakState controls the output level. -//! -//! Calling this function with \e bBreakState set to \b true asserts a break -//! condition on the UART. Calling this function with \e bBreakState set to -//! \b false removes the break condition. For proper transmission of a break -//! command, the break must be asserted for at least two complete frames. -//! -//! \return None. -// -//***************************************************************************** -void -UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Set the break condition as requested. - // - HWREG(ulBase + UART_O_LCRH) = - (bBreakState ? - (HWREG(ulBase + UART_O_LCRH) | UART_LCRH_BRK) : - (HWREG(ulBase + UART_O_LCRH) & ~(UART_LCRH_BRK))); -} - -//***************************************************************************** -// -//! Determines whether the UART transmitter is busy or not. -//! -//! \param ulBase is the base address of the UART port. -//! -//! Allows the caller to determine whether all transmitted bytes have cleared -//! the transmitter hardware. If \b false is returned, the transmit FIFO is -//! empty and all bits of the last transmitted character, including all stop -//! bits, have left the hardware shift register. -//! -//! \return Returns \b true if the UART is transmitting or \b false if all -//! transmissions are complete. -// -//***************************************************************************** -tBoolean -UARTBusy(unsigned long ulBase) -{ - // - // Check the argument. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Determine if the UART is busy. - // - return((HWREG(ulBase + UART_O_FR) & UART_FR_BUSY) ? true : false); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for a UART interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! \param pfnHandler is a pointer to the function to be called when the -//! UART interrupt occurs. -//! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via UARTIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) -{ - unsigned long ulInt; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Determine the interrupt number based on the UART port. - // - - ulInt = UARTIntNumberGet(ulBase); - - // - // Register the interrupt handler. - // - IntRegister(ulInt, pfnHandler); - - // - // Enable the UART interrupt. - // - IntEnable(ulInt); -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for a UART interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function does the actual unregistering of the interrupt handler. It -//! clears the handler to be called when a UART interrupt occurs. This -//! function also masks off the interrupt in the interrupt controller so that -//! the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntUnregister(unsigned long ulBase) -{ - unsigned long ulInt; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Determine the interrupt number based on the UART port. - // - ulInt = UARTIntNumberGet(ulBase); - - // - // Disable the interrupt. - // - IntDisable(ulInt); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulInt); -} - -//***************************************************************************** -// -//! Enables individual UART interrupt sources. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled. -//! -//! This function enables the indicated UART interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter is the logical OR of any of the following: -//! -//! - \b UART_INT_OE - Overrun Error interrupt -//! - \b UART_INT_BE - Break Error interrupt -//! - \b UART_INT_PE - Parity Error interrupt -//! - \b UART_INT_FE - Framing Error interrupt -//! - \b UART_INT_RT - Receive Timeout interrupt -//! - \b UART_INT_TX - Transmit interrupt -//! - \b UART_INT_RX - Receive interrupt -//! - \b UART_INT_CTS - CTS interrupt -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Enable the specified interrupts. - // - HWREG(ulBase + UART_O_IM) |= ulIntFlags; -} - -//***************************************************************************** -// -//! Disables individual UART interrupt sources. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled. -//! -//! This function disables the indicated UART interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to UARTIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Disable the specified interrupts. - // - HWREG(ulBase + UART_O_IM) &= ~(ulIntFlags); -} - -//***************************************************************************** -// -//! Gets the current interrupt status. -//! -//! \param ulBase is the base address of the UART port. -//! \param bMasked is \b false if the raw interrupt status is required and -//! \b true if the masked interrupt status is required. -//! -//! This function returns the interrupt status for the specified UART. Either -//! the raw interrupt status or the status of interrupts that are allowed to -//! reflect to the processor can be returned. -//! -//! \return Returns the current interrupt status, enumerated as a bit field of -//! values described in UARTIntEnable(). -// -//***************************************************************************** -unsigned long -UARTIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return either the interrupt status or the raw interrupt status as - // requested. - // - if(bMasked) - { - return(HWREG(ulBase + UART_O_MIS)); - } - else - { - return(HWREG(ulBase + UART_O_RIS)); - } -} - -//***************************************************************************** -// -//! Clears UART interrupt sources. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared. -//! -//! The specified UART interrupt sources are cleared, so that they no longer -//! assert. This function must be called in the interrupt handler to keep the -//! interrupt from being recognized again immediately upon exit. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to UARTIntEnable(). -//! -//! \note Because there is a write buffer in the Cortex-M3 processor, it may -//! take several clock cycles before the interrupt source is actually cleared. -//! Therefore, it is recommended that the interrupt source be cleared early in -//! the interrupt handler (as opposed to the very last action) to avoid -//! returning from the interrupt handler before the interrupt source is -//! actually cleared. Failure to do so may result in the interrupt handler -//! being immediately reentered (because the interrupt controller still sees -//! the interrupt source asserted). -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Clear the requested interrupt sources. - // - HWREG(ulBase + UART_O_ICR) = ulIntFlags; -} - -//***************************************************************************** -// -//! Enable UART DMA operation. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulDMAFlags is a bit mask of the DMA features to enable. -//! -//! The specified UART DMA features are enabled. The UART can be -//! configured to use DMA for transmit or receive, and to disable -//! receive if an error occurs. The \e ulDMAFlags parameter is the -//! logical OR of any of the following values: -//! -//! - UART_DMA_RX - enable DMA for receive -//! - UART_DMA_TX - enable DMA for transmit -//! - UART_DMA_ERR_RXSTOP - disable DMA receive on UART error -//! -//! \note The uDMA controller must also be set up before DMA can be used -//! with the UART. -//! -//! \return None. -// -//***************************************************************************** -void -UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Set the requested bits in the UART DMA control register. - // - HWREG(ulBase + UART_O_DMACTL) |= ulDMAFlags; -} - -//***************************************************************************** -// -//! Disable UART DMA operation. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulDMAFlags is a bit mask of the DMA features to disable. -//! -//! This function is used to disable UART DMA features that were enabled -//! by UARTDMAEnable(). The specified UART DMA features are disabled. The -//! \e ulDMAFlags parameter is the logical OR of any of the following values: -//! -//! - UART_DMA_RX - disable DMA for receive -//! - UART_DMA_TX - disable DMA for transmit -//! - UART_DMA_ERR_RXSTOP - do not disable DMA receive on UART error -//! -//! \return None. -// -//***************************************************************************** -void -UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Clear the requested bits in the UART DMA control register. - // - HWREG(ulBase + UART_O_DMACTL) &= ~ulDMAFlags; -} - -//***************************************************************************** -// -//! Gets current receiver errors. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current state of each of the 4 receiver error -//! sources. The returned errors are equivalent to the four error bits -//! returned via the previous call to UARTCharGet() or UARTCharGetNonBlocking() -//! with the exception that the overrun error is set immediately the overrun -//! occurs rather than when a character is next read. -//! -//! \return Returns a logical OR combination of the receiver error flags, -//! \b UART_RXERROR_FRAMING, \b UART_RXERROR_PARITY, \b UART_RXERROR_BREAK -//! and \b UART_RXERROR_OVERRUN. -// -//***************************************************************************** -unsigned long -UARTRxErrorGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the current value of the receive status register. - // - return(HWREG(ulBase + UART_O_RSR) & 0x0000000F); -} - -//***************************************************************************** -// -//! Clears all reported receiver errors. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function is used to clear all receiver error conditions reported via -//! UARTRxErrorGet(). If using the overrun, framing error, parity error or -//! break interrupts, this function must be called after clearing the interrupt -//! to ensure that later errors of the same type trigger another interrupt. -//! -//! \return None. -// -//***************************************************************************** -void -UARTRxErrorClear(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Any write to the Error Clear Register will clear all bits which are - // currently set. - // - HWREG(ulBase + UART_O_ECR) = 0; -} - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/uart.h b/ports/cc3200/hal/uart.h deleted file mode 100644 index 503cd2c9e2..0000000000 --- a/ports/cc3200/hal/uart.h +++ /dev/null @@ -1,234 +0,0 @@ -//***************************************************************************** -// -// uart.h -// -// Defines and Macros for the UART. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __UART_H__ -#define __UART_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear -// as the ulIntFlags parameter, and returned from UARTIntStatus. -// -//***************************************************************************** -#define UART_INT_DMATX 0x20000 // DMA Tx Done interrupt Mask -#define UART_INT_DMARX 0x10000 // DMA Rx Done interrupt Mask -#define UART_INT_EOT 0x800 // End of transfer interrupt Mask -#define UART_INT_OE 0x400 // Overrun Error Interrupt Mask -#define UART_INT_BE 0x200 // Break Error Interrupt Mask -#define UART_INT_PE 0x100 // Parity Error Interrupt Mask -#define UART_INT_FE 0x080 // Framing Error Interrupt Mask -#define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask -#define UART_INT_TX 0x020 // Transmit Interrupt Mask -#define UART_INT_RX 0x010 // Receive Interrupt Mask -#define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask - - -//***************************************************************************** -// -// Values that can be passed to UARTConfigSetExpClk as the ulConfig parameter -// and returned by UARTConfigGetExpClk in the pulConfig parameter. -// Additionally, the UART_CONFIG_PAR_* subset can be passed to -// UARTParityModeSet as the ulParity parameter, and are returned by -// UARTParityModeGet. -// -//***************************************************************************** -#define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length -#define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data -#define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data -#define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data -#define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data -#define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits -#define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit -#define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits -#define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity -#define UART_CONFIG_PAR_NONE 0x00000000 // No parity -#define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity -#define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity -#define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one -#define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero - -//***************************************************************************** -// -// Values that can be passed to UARTFIFOLevelSet as the ulTxLevel parameter and -// returned by UARTFIFOLevelGet in the pulTxLevel. -// -//***************************************************************************** -#define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full -#define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full -#define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full -#define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full -#define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full - -//***************************************************************************** -// -// Values that can be passed to UARTFIFOLevelSet as the ulRxLevel parameter and -// returned by UARTFIFOLevelGet in the pulRxLevel. -// -//***************************************************************************** -#define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full -#define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full -#define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full -#define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full -#define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full - -//***************************************************************************** -// -// Values that can be passed to UARTDMAEnable() and UARTDMADisable(). -// -//***************************************************************************** -#define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error -#define UART_DMA_TX 0x00000002 // Enable DMA for transmit -#define UART_DMA_RX 0x00000001 // Enable DMA for receive - -//***************************************************************************** -// -// Values returned from UARTRxErrorGet(). -// -//***************************************************************************** -#define UART_RXERROR_OVERRUN 0x00000008 -#define UART_RXERROR_BREAK 0x00000004 -#define UART_RXERROR_PARITY 0x00000002 -#define UART_RXERROR_FRAMING 0x00000001 - -//***************************************************************************** -// -// Values that can be passed to UARTModemControlSet()and UARTModemControlClear() -// or returned from UARTModemControlGet(). -// -//***************************************************************************** -#define UART_OUTPUT_RTS 0x00000800 - -//***************************************************************************** -// -// Values that can be returned from UARTModemStatusGet(). -// -//***************************************************************************** -#define UART_INPUT_CTS 0x00000001 - -//***************************************************************************** -// -// Values that can be passed to UARTFlowControl() or returned from -// UARTFlowControlGet(). -// -//***************************************************************************** -#define UART_FLOWCONTROL_TX 0x00008000 -#define UART_FLOWCONTROL_RX 0x00004000 -#define UART_FLOWCONTROL_NONE 0x00000000 - -//***************************************************************************** -// -// Values that can be passed to UARTTxIntModeSet() or returned from -// UARTTxIntModeGet(). -// -//***************************************************************************** -#define UART_TXINT_MODE_FIFO 0x00000000 -#define UART_TXINT_MODE_EOT 0x00000010 - - -//***************************************************************************** -// -// API Function prototypes -// -//***************************************************************************** -extern void UARTParityModeSet(unsigned long ulBase, unsigned long ulParity); -extern unsigned long UARTParityModeGet(unsigned long ulBase); -extern void UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel); -extern void UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel); -extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long ulBaud, unsigned long ulConfig); -extern void UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long *pulBaud, - unsigned long *pulConfig); -extern void UARTEnable(unsigned long ulBase); -extern void UARTDisable(unsigned long ulBase); -extern void UARTFIFOEnable(unsigned long ulBase); -extern void UARTFIFODisable(unsigned long ulBase); -extern tBoolean UARTCharsAvail(unsigned long ulBase); -extern tBoolean UARTSpaceAvail(unsigned long ulBase); -extern long UARTCharGetNonBlocking(unsigned long ulBase); -extern long UARTCharGet(unsigned long ulBase); -extern tBoolean UARTCharPutNonBlocking(unsigned long ulBase, - unsigned char ucData); -extern void UARTCharPut(unsigned long ulBase, unsigned char ucData); -extern void UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState); -extern tBoolean UARTBusy(unsigned long ulBase); -extern void UARTIntRegister(unsigned long ulBase, void(*pfnHandler)(void)); -extern void UARTIntUnregister(unsigned long ulBase); -extern void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags); -extern void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags); -extern unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags); -extern void UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags); -extern void UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags); -extern unsigned long UARTRxErrorGet(unsigned long ulBase); -extern void UARTRxErrorClear(unsigned long ulBase); -extern void UARTModemControlSet(unsigned long ulBase, - unsigned long ulControl); -extern void UARTModemControlClear(unsigned long ulBase, - unsigned long ulControl); -extern unsigned long UARTModemControlGet(unsigned long ulBase); -extern unsigned long UARTModemStatusGet(unsigned long ulBase); -extern void UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode); -extern unsigned long UARTFlowControlGet(unsigned long ulBase); -extern void UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode); -extern unsigned long UARTTxIntModeGet(unsigned long ulBase); - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __UART_H__ diff --git a/ports/cc3200/hal/utils.c b/ports/cc3200/hal/utils.c deleted file mode 100644 index d0b13d7bfd..0000000000 --- a/ports/cc3200/hal/utils.c +++ /dev/null @@ -1,104 +0,0 @@ -//***************************************************************************** -// -// utils.c -// -// Utility APIs -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup Utils_api -//! @{ -// -//***************************************************************************** -#include "utils.h" - - -//***************************************************************************** -// -//! Provides a small delay. -//! -//! \param ulCount is the number of delay loop iterations to perform. -//! -//! This function provides a means of generating a constant length delay. It -//! is written in assembly to keep the delay consistent across tool chains, -//! avoiding the need to tune the delay based on the tool chain in use. -//! -//! The loop takes 3 cycles/loop. -//! -//! \return None. -// -//***************************************************************************** -#if defined(ewarm) || defined(DOXYGEN) -void -UtilsDelay(unsigned long ulCount) -{ - __asm(" subs r0, #1\n" - " bne.n UtilsDelay\n"); -} -#endif - -#if defined(gcc) -void __attribute__((naked)) -UtilsDelay(unsigned long ulCount) -{ - __asm(" subs r0, #1\n" - " bne UtilsDelay\n" - " bx lr"); -} -#endif - -// -// For CCS implement this function in pure assembly. This prevents the TI -// compiler from doing funny things with the optimizer. -// -#if defined(ccs) - __asm(" .sect \".text:UtilsDelay\"\n" - " .clink\n" - " .thumbfunc UtilsDelay\n" - " .thumb\n" - " .global UtilsDelay\n" - "UtilsDelay:\n" - " subs r0, #1\n" - " bne.n UtilsDelay\n" - " bx lr\n"); -#endif - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/utils.h b/ports/cc3200/hal/utils.h deleted file mode 100644 index a6fa78dac3..0000000000 --- a/ports/cc3200/hal/utils.h +++ /dev/null @@ -1,71 +0,0 @@ -//***************************************************************************** -// -// utils.h -// -// Prototypes and macros for utility APIs -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __UTILS_H__ -#define __UTILS_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// API Function prototypes -// -//***************************************************************************** -extern void UtilsDelay(unsigned long ulCount); - - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif //__UTILS_H__ diff --git a/ports/cc3200/hal/wdt.c b/ports/cc3200/hal/wdt.c deleted file mode 100644 index 8d8a9e9df6..0000000000 --- a/ports/cc3200/hal/wdt.c +++ /dev/null @@ -1,491 +0,0 @@ -//***************************************************************************** -// -// wdt.c -// -// Driver for the Watchdog Timer Module. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup WDT_Watchdog_Timer_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_types.h" -#include "inc/hw_wdt.h" -#include "debug.h" -#include "interrupt.h" -#include "wdt.h" - -//***************************************************************************** -// -//! Determines if the watchdog timer is enabled. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This will check to see if the watchdog timer is enabled. -//! -//! \return Returns \b true if the watchdog timer is enabled, and \b false -//! if it is not. -// -//***************************************************************************** -tBoolean -WatchdogRunning(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // See if the watchdog timer module is enabled, and return. - // - return(HWREG(ulBase + WDT_O_CTL) & WDT_CTL_INTEN); -} - -//***************************************************************************** -// -//! Enables the watchdog timer. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This will enable the watchdog timer counter and interrupt. -//! -//! \note This function will have no effect if the watchdog timer has -//! been locked. -//! -//! \sa WatchdogLock(), WatchdogUnlock() -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Enable the watchdog timer module. - // - HWREG(ulBase + WDT_O_CTL) |= WDT_CTL_INTEN; -} - -//***************************************************************************** -// -//! Enables the watchdog timer lock mechanism. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! Locks out write access to the watchdog timer configuration registers. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogLock(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Lock out watchdog register writes. Writing anything to the WDT_O_LOCK - // register causes the lock to go into effect. - // - HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_LOCKED; -} - -//***************************************************************************** -// -//! Disables the watchdog timer lock mechanism. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! Enables write access to the watchdog timer configuration registers. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogUnlock(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Unlock watchdog register writes. - // - HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_UNLOCK; -} - -//***************************************************************************** -// -//! Gets the state of the watchdog timer lock mechanism. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! Returns the lock state of the watchdog timer registers. -//! -//! \return Returns \b true if the watchdog timer registers are locked, and -//! \b false if they are not locked. -// -//***************************************************************************** -tBoolean -WatchdogLockState(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Get the lock state. - // - return((HWREG(ulBase + WDT_O_LOCK) == WDT_LOCK_LOCKED) ? true : false); -} - -//***************************************************************************** -// -//! Sets the watchdog timer reload value. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! \param ulLoadVal is the load value for the watchdog timer. -//! -//! This function sets the value to load into the watchdog timer when the count -//! reaches zero for the first time; if the watchdog timer is running when this -//! function is called, then the value will be immediately loaded into the -//! watchdog timer counter. If the \e ulLoadVal parameter is 0, then an -//! interrupt is immediately generated. -//! -//! \note This function will have no effect if the watchdog timer has -//! been locked. -//! -//! \sa WatchdogLock(), WatchdogUnlock(), WatchdogReloadGet() -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Set the load register. - // - HWREG(ulBase + WDT_O_LOAD) = ulLoadVal; -} - -//***************************************************************************** -// -//! Gets the watchdog timer reload value. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function gets the value that is loaded into the watchdog timer when -//! the count reaches zero for the first time. -//! -//! \sa WatchdogReloadSet() -//! -//! \return None. -// -//***************************************************************************** -unsigned long -WatchdogReloadGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Get the load register. - // - return(HWREG(ulBase + WDT_O_LOAD)); -} - -//***************************************************************************** -// -//! Gets the current watchdog timer value. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function reads the current value of the watchdog timer. -//! -//! \return Returns the current value of the watchdog timer. -// -//***************************************************************************** -unsigned long -WatchdogValueGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Get the current watchdog timer register value. - // - return(HWREG(ulBase + WDT_O_VALUE)); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for watchdog timer interrupt. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! \param pfnHandler is a pointer to the function to be called when the -//! watchdog timer interrupt occurs. -//! -//! This function does the actual registering of the interrupt handler. This -//! will enable the global interrupt in the interrupt controller; the watchdog -//! timer interrupt must be enabled via WatchdogEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source via -//! WatchdogIntClear(). -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \note This function will only register the standard watchdog interrupt -//! handler. To register the NMI watchdog handler, use IntRegister() -//! to register the handler for the \b FAULT_NMI interrupt. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Register the interrupt handler and - // Enable the watchdog timer interrupt. - // - IntRegister(INT_WDT, pfnHandler); - IntEnable(INT_WDT); -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for the watchdog timer interrupt. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function does the actual unregistering of the interrupt handler. This -//! function will clear the handler to be called when a watchdog timer -//! interrupt occurs. This will also mask off the interrupt in the interrupt -//! controller so that the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \note This function will only unregister the standard watchdog interrupt -//! handler. To unregister the NMI watchdog handler, use IntUnregister() -//! to unregister the handler for the \b FAULT_NMI interrupt. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogIntUnregister(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Disable the interrupt - IntDisable(INT_WDT); - - // - // Unregister the interrupt handler. - // - IntUnregister(INT_WDT); -} - -//***************************************************************************** -// -//! Gets the current watchdog timer interrupt status. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! \param bMasked is \b false if the raw interrupt status is required and -//! \b true if the masked interrupt status is required. -//! -//! This returns the interrupt status for the watchdog timer module. Either -//! the raw interrupt status or the status of interrupt that is allowed to -//! reflect to the processor can be returned. -//! -//! \return Returns the current interrupt status, where a 1 indicates that the -//! watchdog interrupt is active, and a 0 indicates that it is not active. -// -//***************************************************************************** -unsigned long -WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Return either the interrupt status or the raw interrupt status as - // requested. - // - if(bMasked) - { - return(HWREG(ulBase + WDT_O_MIS)); - } - else - { - return(HWREG(ulBase + WDT_O_RIS)); - } -} - -//***************************************************************************** -// -//! Clears the watchdog timer interrupt. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! The watchdog timer interrupt source is cleared, so that it no longer -//! asserts. -//! -//! \note Because there is a write buffer in the Cortex-M3 processor, it may -//! take several clock cycles before the interrupt source is actually cleared. -//! Therefore, it is recommended that the interrupt source be cleared early in -//! the interrupt handler (as opposed to the very last action) to avoid -//! returning from the interrupt handler before the interrupt source is -//! actually cleared. Failure to do so may result in the interrupt handler -//! being immediately reentered (because the interrupt controller still sees -//! the interrupt source asserted). -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogIntClear(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Clear the interrupt source. - // - HWREG(ulBase + WDT_O_ICR) = WDT_INT_TIMEOUT; -} - -//***************************************************************************** -// -//! Enables stalling of the watchdog timer during debug events. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function allows the watchdog timer to stop counting when the processor -//! is stopped by the debugger. By doing so, the watchdog is prevented from -//! expiring (typically almost immediately from a human time perspective) and -//! resetting the system (if reset is enabled). The watchdog will instead -//! expired after the appropriate number of processor cycles have been executed -//! while debugging (or at the appropriate time after the processor has been -//! restarted). -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogStallEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Enable timer stalling. - // - HWREG(ulBase + WDT_O_TEST) |= WDT_TEST_STALL; -} - -//***************************************************************************** -// -//! Disables stalling of the watchdog timer during debug events. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function disables the debug mode stall of the watchdog timer. By -//! doing so, the watchdog timer continues to count regardless of the processor -//! debug state. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogStallDisable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Disable timer stalling. - // - HWREG(ulBase + WDT_O_TEST) &= ~(WDT_TEST_STALL); -} - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/wdt.h b/ports/cc3200/hal/wdt.h deleted file mode 100644 index 2e52db42be..0000000000 --- a/ports/cc3200/hal/wdt.h +++ /dev/null @@ -1,82 +0,0 @@ -//***************************************************************************** -// -// wdt.h - Prototypes for the Watchdog Timer API -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __WATCHDOG_H__ -#define __WATCHDOG_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** -extern tBoolean WatchdogRunning(unsigned long ulBase); -extern void WatchdogEnable(unsigned long ulBase); -extern void WatchdogLock(unsigned long ulBase); -extern void WatchdogUnlock(unsigned long ulBase); -extern tBoolean WatchdogLockState(unsigned long ulBase); -extern void WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal); -extern unsigned long WatchdogReloadGet(unsigned long ulBase); -extern unsigned long WatchdogValueGet(unsigned long ulBase); -extern void WatchdogIntRegister(unsigned long ulBase, void(*pfnHandler)(void)); -extern void WatchdogIntUnregister(unsigned long ulBase); -extern unsigned long WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void WatchdogIntClear(unsigned long ulBase); -extern void WatchdogStallEnable(unsigned long ulBase); -extern void WatchdogStallDisable(unsigned long ulBase); - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __WATCHDOG_H__ diff --git a/ports/cc3200/main.c b/ports/cc3200/main.c deleted file mode 100644 index e2299e1460..0000000000 --- a/ports/cc3200/main.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/mpconfig.h" -#include "py/mphal.h" -#include "mptask.h" -#include "simplelink.h" -#include "pybwdt.h" -#include "debug.h" -#include "antenna.h" -#include "mperror.h" -#include "task.h" - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ - -// This is the static memory (TCB and stack) for the idle task -static StaticTask_t xIdleTaskTCB __attribute__ ((section (".rtos_heap"))); -static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -#ifdef DEBUG -OsiTaskHandle mpTaskHandle; -#endif - -// This is the FreeRTOS heap, defined here so we can put it in a special segment -uint8_t ucHeap[ configTOTAL_HEAP_SIZE ] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -// This is the static memory (TCB and stack) for the main MicroPython task -StaticTask_t mpTaskTCB __attribute__ ((section (".rtos_heap"))); -StackType_t mpTaskStack[MICROPY_TASK_STACK_LEN] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ - -__attribute__ ((section (".boot"))) -int main (void) { - - // Initialize the clocks and the interrupt system - HAL_SystemInit(); - -#if MICROPY_HW_ANTENNA_DIVERSITY - // configure the antenna selection pins - antenna_init0(); -#endif - - // Init the watchdog - pybwdt_init0(); - -#ifndef DEBUG - OsiTaskHandle mpTaskHandle; -#endif - mpTaskHandle = xTaskCreateStatic(TASK_MicroPython, "MicroPy", - MICROPY_TASK_STACK_LEN, NULL, MICROPY_TASK_PRIORITY, mpTaskStack, &mpTaskTCB); - ASSERT(mpTaskHandle != NULL); - - osi_start(); - - for ( ; ; ); -} - -// We need this when configSUPPORT_STATIC_ALLOCATION is enabled -void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, - StackType_t **ppxIdleTaskStackBuffer, - uint32_t *pulIdleTaskStackSize ) { - *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; - *ppxIdleTaskStackBuffer = uxIdleTaskStack; - *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; -} diff --git a/ports/cc3200/misc/FreeRTOSHooks.c b/ports/cc3200/misc/FreeRTOSHooks.c deleted file mode 100644 index c618279b7e..0000000000 --- a/ports/cc3200/misc/FreeRTOSHooks.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/mpconfig.h" -#include "py/mphal.h" -#include "py/obj.h" -#include "inc/hw_memmap.h" -#include "pybuart.h" -#include "osi.h" -#include "mperror.h" - - -//***************************************************************************** -// -//! \brief Application defined idle task hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationIdleHook (void) -{ - // signal that we are alive and kicking - mperror_heartbeat_signal(); - // gate the processor's clock to save power - __WFI(); -} - -//***************************************************************************** -// -//! \brief Application defined malloc failed hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationMallocFailedHook (void) -{ -#ifdef DEBUG - // break into the debugger - __asm volatile ("bkpt #0 \n"); -#endif - - __fatal_error("FreeRTOS malloc failed!"); -} - -//***************************************************************************** -// -//! \brief Application defined stack overflow hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationStackOverflowHook (OsiTaskHandle *pxTask, signed char *pcTaskName) -{ -#ifdef DEBUG - // Break into the debugger - __asm volatile ("bkpt #0 \n"); -#endif - - __fatal_error("Stack overflow!"); -} - -//***************************************************************************** -// -//! \brief Application defined tick hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationTickHook (void) -{ - HAL_IncrementTick(); -} diff --git a/ports/cc3200/misc/antenna.c b/ports/cc3200/misc/antenna.c deleted file mode 100644 index afeed85e18..0000000000 --- a/ports/cc3200/misc/antenna.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "mpconfigboard.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "gpio.h" -#include "antenna.h" - - -#if MICROPY_HW_ANTENNA_DIVERSITY - -/****************************************************************************** -DEFINE CONSTANTS -******************************************************************************/ -#define REG_PAD_CONFIG_26 (0x4402E108) -#define REG_PAD_CONFIG_27 (0x4402E10C) - -/****************************************************************************** -DEFINE PRIVATE DATA -******************************************************************************/ -static antenna_type_t antenna_type_selected = ANTENNA_TYPE_INTERNAL; - -/****************************************************************************** -DEFINE PUBLIC FUNCTIONS -******************************************************************************/ -void antenna_init0(void) { - // enable the peripheral clock and set the gpio direction for - // both antenna 1 and antenna 2 pins - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_GPIODirModeSet(GPIOA3_BASE, 0x0C, GPIO_DIR_MODE_OUT); - - // configure antenna 1 pin type and strength - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) | (0x00000020 | 0x00000000)); - // set the mode - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~PAD_MODE_MASK) | 0x00000000) & ~(3 << 10); - // set the direction - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~0xC00) | 0x00000800); - - // configure antenna 2 pin type and strength - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) | (0x00000020 | 0x00000000)); - // set the mode - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~PAD_MODE_MASK) | 0x00000000) & ~(3 << 10); - // set the direction - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~0xC00) | 0x00000800); - - // select the currently active antenna - antenna_select(antenna_type_selected); -} - -void antenna_select (antenna_type_t _antenna) { - if (_antenna == ANTENNA_TYPE_INTERNAL) { - MAP_GPIOPinWrite(GPIOA3_BASE, 0x0C, 0x04); - // also configure the pull-up and pull-down accordingly - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PU; - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PD; - } else { - MAP_GPIOPinWrite(GPIOA3_BASE, 0x0C, 0x08); - // also configure the pull-up and pull-down accordingly - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PD; - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PU; - } - antenna_type_selected = _antenna; -} - -#endif - diff --git a/ports/cc3200/misc/antenna.h b/ports/cc3200/misc/antenna.h deleted file mode 100644 index c9d845453e..0000000000 --- a/ports/cc3200/misc/antenna.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_ANTENNA_H -#define MICROPY_INCLUDED_CC3200_MISC_ANTENNA_H - -typedef enum { - ANTENNA_TYPE_INTERNAL = 0, - ANTENNA_TYPE_EXTERNAL -} antenna_type_t; - -extern void antenna_init0 (void); -extern void antenna_select (antenna_type_t antenna_type); - -#endif // MICROPY_INCLUDED_CC3200_MISC_ANTENNA_H diff --git a/ports/cc3200/misc/help.c b/ports/cc3200/misc/help.c deleted file mode 100644 index ea0c9501db..0000000000 --- a/ports/cc3200/misc/help.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char cc3200_help_text[] = "Welcome to MicroPython!\n" - "For online help please visit http://micropython.org/help/.\n" - "For further help on a specific object, type help(obj)\n"; diff --git a/ports/cc3200/misc/mperror.c b/ports/cc3200/misc/mperror.c deleted file mode 100644 index 082d940e2f..0000000000 --- a/ports/cc3200/misc/mperror.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "hw_ints.h" -#include "hw_types.h" -#include "hw_gpio.h" -#include "hw_memmap.h" -#include "hw_gprcm.h" -#include "hw_common_reg.h" -#include "pin.h" -#include "gpio.h" -#ifndef BOOTLOADER -#include "pybpin.h" -#include "pins.h" -#endif -#include "rom_map.h" -#include "prcm.h" -#include "pybuart.h" -#include "utils.h" -#include "mperror.h" - - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define MPERROR_TOOGLE_MS (50) -#define MPERROR_SIGNAL_ERROR_MS (1200) -#define MPERROR_HEARTBEAT_ON_MS (80) -#define MPERROR_HEARTBEAT_OFF_MS (3920) - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -struct mperror_heart_beat { - uint32_t off_time; - uint32_t on_time; - bool beating; - bool enabled; - bool do_disable; -} mperror_heart_beat = {.off_time = 0, .on_time = 0, .beating = false, .enabled = false, .do_disable = false}; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void mperror_init0 (void) { -#ifdef BOOTLOADER - // enable the system led and the safe boot pin peripheral clocks - MAP_PRCMPeripheralClkEnable(MICROPY_SYS_LED_PRCM, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralClkEnable(MICROPY_SAFE_BOOT_PRCM, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // configure the safe boot pin - MAP_PinTypeGPIO(MICROPY_SAFE_BOOT_PIN_NUM, PIN_MODE_0, false); - MAP_PinConfigSet(MICROPY_SAFE_BOOT_PIN_NUM, PIN_STRENGTH_4MA, PIN_TYPE_STD_PD); - MAP_GPIODirModeSet(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN, GPIO_DIR_MODE_IN); - // configure the bld - MAP_PinTypeGPIO(MICROPY_SYS_LED_PIN_NUM, PIN_MODE_0, false); - MAP_PinConfigSet(MICROPY_SYS_LED_PIN_NUM, PIN_STRENGTH_6MA, PIN_TYPE_STD); - MAP_GPIODirModeSet(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, GPIO_DIR_MODE_OUT); -#else - // configure the system led - pin_config ((pin_obj_t *)&MICROPY_SYS_LED_GPIO, PIN_MODE_0, GPIO_DIR_MODE_OUT, PIN_TYPE_STD, 0, PIN_STRENGTH_6MA); -#endif - mperror_heart_beat.enabled = true; - mperror_heartbeat_switch_off(); -} - -void mperror_bootloader_check_reset_cause (void) { - // if we are recovering from a WDT reset, trigger - // a hibernate cycle for a clean boot - if (MAP_PRCMSysResetCauseGet() == PRCM_WDT_RESET) { - HWREG(0x400F70B8) = 1; - UtilsDelay(800000/5); - HWREG(0x400F70B0) = 1; - UtilsDelay(800000/5); - - HWREG(0x4402E16C) |= 0x2; - UtilsDelay(800); - HWREG(0x4402F024) &= 0xF7FFFFFF; - - // since the reset cause will be changed, we must store the right reason - // so that the application knows it when booting for the next time - PRCMSetSpecialBit(PRCM_WDT_RESET_BIT); - - MAP_PRCMHibernateWakeupSourceEnable(PRCM_HIB_SLOW_CLK_CTR); - // set the sleep interval to 10ms - MAP_PRCMHibernateIntervalSet(330); - MAP_PRCMHibernateEnter(); - } -} - -void mperror_deinit_sfe_pin (void) { - // disable the pull-down - MAP_PinConfigSet(MICROPY_SAFE_BOOT_PIN_NUM, PIN_STRENGTH_4MA, PIN_TYPE_STD); -} - -void mperror_signal_error (void) { - uint32_t count = 0; - while ((MPERROR_TOOGLE_MS * count++) < MPERROR_SIGNAL_ERROR_MS) { - // toogle the led - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, ~MAP_GPIOPinRead(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN)); - UtilsDelay(UTILS_DELAY_US_TO_COUNT(MPERROR_TOOGLE_MS * 1000)); - } -} - -void mperror_heartbeat_switch_off (void) { - if (mperror_heart_beat.enabled) { - mperror_heart_beat.on_time = 0; - mperror_heart_beat.off_time = 0; - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, 0); - } -} - -void mperror_heartbeat_signal (void) { - if (mperror_heart_beat.do_disable) { - mperror_heart_beat.do_disable = false; - } else if (mperror_heart_beat.enabled) { - if (!mperror_heart_beat.beating) { - if ((mperror_heart_beat.on_time = mp_hal_ticks_ms()) - mperror_heart_beat.off_time > MPERROR_HEARTBEAT_OFF_MS) { - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, MICROPY_SYS_LED_PORT_PIN); - mperror_heart_beat.beating = true; - } - } else { - if ((mperror_heart_beat.off_time = mp_hal_ticks_ms()) - mperror_heart_beat.on_time > MPERROR_HEARTBEAT_ON_MS) { - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, 0); - mperror_heart_beat.beating = false; - } - } - } -} - -void NORETURN __fatal_error(const char *msg) { -#ifdef DEBUG - if (msg != NULL) { - // wait for 20ms - UtilsDelay(UTILS_DELAY_US_TO_COUNT(20000)); - mp_hal_stdout_tx_str("\r\nFATAL ERROR:"); - mp_hal_stdout_tx_str(msg); - mp_hal_stdout_tx_str("\r\n"); - } -#endif - // signal the crash with the system led - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, MICROPY_SYS_LED_PORT_PIN); - for ( ;; ) {__WFI();} -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) { - (void) func; - printf("Assertion failed: %s, file %s, line %d\n", expr, file, line); - __fatal_error(NULL); -} - -void nlr_jump_fail(void *val) { -#ifdef DEBUG - char msg[64]; - snprintf(msg, sizeof(msg), "uncaught exception %p\n", val); - __fatal_error(msg); -#else - __fatal_error(NULL); -#endif -} - -void mperror_enable_heartbeat (bool enable) { - if (enable) { - #ifndef BOOTLOADER - // configure the led again - pin_config ((pin_obj_t *)&MICROPY_SYS_LED_GPIO, PIN_MODE_0, GPIO_DIR_MODE_OUT, PIN_TYPE_STD, 0, PIN_STRENGTH_6MA); - #endif - mperror_heart_beat.enabled = true; - mperror_heart_beat.do_disable = false; - mperror_heartbeat_switch_off(); - } else { - mperror_heart_beat.do_disable = true; - mperror_heart_beat.enabled = false; - } -} - -bool mperror_is_heartbeat_enabled (void) { - return mperror_heart_beat.enabled; -} diff --git a/ports/cc3200/misc/mperror.h b/ports/cc3200/misc/mperror.h deleted file mode 100644 index 1c3eb62697..0000000000 --- a/ports/cc3200/misc/mperror.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_MPERROR_H -#define MICROPY_INCLUDED_CC3200_MISC_MPERROR_H - -extern void NORETURN __fatal_error(const char *msg); - -void mperror_init0 (void); -void mperror_bootloader_check_reset_cause (void); -void mperror_deinit_sfe_pin (void); -void mperror_signal_error (void); -void mperror_heartbeat_switch_off (void); -void mperror_heartbeat_signal (void); -void mperror_enable_heartbeat (bool enable); -bool mperror_is_heartbeat_enabled (void); - -#endif // MICROPY_INCLUDED_CC3200_MISC_MPERROR_H diff --git a/ports/cc3200/misc/mpexception.c b/ports/cc3200/misc/mpexception.c deleted file mode 100644 index 72d4a155fa..0000000000 --- a/ports/cc3200/misc/mpexception.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "mpexception.h" - - -/****************************************************************************** -DECLARE EXPORTED DATA - ******************************************************************************/ -const char mpexception_value_invalid_arguments[] = "invalid argument(s) value"; -const char mpexception_num_type_invalid_arguments[] = "invalid argument(s) num/type"; -const char mpexception_uncaught[] = "uncaught exception"; diff --git a/ports/cc3200/misc/mpexception.h b/ports/cc3200/misc/mpexception.h deleted file mode 100644 index e84a1edb21..0000000000 --- a/ports/cc3200/misc/mpexception.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_MPEXCEPTION_H -#define MICROPY_INCLUDED_CC3200_MISC_MPEXCEPTION_H - -extern const char mpexception_value_invalid_arguments[]; -extern const char mpexception_num_type_invalid_arguments[]; -extern const char mpexception_uncaught[]; - -#endif // MICROPY_INCLUDED_CC3200_MISC_MPEXCEPTION_H diff --git a/ports/cc3200/misc/mpirq.c b/ports/cc3200/misc/mpirq.c deleted file mode 100644 index d54e7465b1..0000000000 --- a/ports/cc3200/misc/mpirq.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "inc/hw_types.h" -#include "interrupt.h" -#include "pybsleep.h" -#include "mpexception.h" -#include "mperror.h" -#include "mpirq.h" - - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -const mp_arg_t mp_irq_init_args[] = { - { MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_priority, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, // the lowest priority - { MP_QSTR_handler, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_wake, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, -}; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC uint8_t mp_irq_priorities[] = { INT_PRIORITY_LVL_7, INT_PRIORITY_LVL_6, INT_PRIORITY_LVL_5, INT_PRIORITY_LVL_4, - INT_PRIORITY_LVL_3, INT_PRIORITY_LVL_2, INT_PRIORITY_LVL_1 }; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void mp_irq_init0 (void) { - // initialize the callback objects list - mp_obj_list_init(&MP_STATE_PORT(mp_irq_obj_list), 0); -} - -mp_obj_t mp_irq_new (mp_obj_t parent, mp_obj_t handler, const mp_irq_methods_t *methods) { - mp_irq_obj_t *self = m_new_obj(mp_irq_obj_t); - self->base.type = &mp_irq_type; - self->handler = handler; - self->parent = parent; - self->methods = (mp_irq_methods_t *)methods; - self->isenabled = true; - // remove it in case it was already registered - mp_irq_remove(parent); - mp_obj_list_append(&MP_STATE_PORT(mp_irq_obj_list), self); - return self; -} - -mp_irq_obj_t *mp_irq_find (mp_obj_t parent) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_irq_obj_list).len; i++) { - mp_irq_obj_t *callback_obj = ((mp_irq_obj_t *)(MP_STATE_PORT(mp_irq_obj_list).items[i])); - if (callback_obj->parent == parent) { - return callback_obj; - } - } - return NULL; -} - -void mp_irq_wake_all (void) { - // re-enable all active callback objects one by one - for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_irq_obj_list).len; i++) { - mp_irq_obj_t *callback_obj = ((mp_irq_obj_t *)(MP_STATE_PORT(mp_irq_obj_list).items[i])); - if (callback_obj->isenabled) { - callback_obj->methods->enable(callback_obj->parent); - } - } -} - -void mp_irq_disable_all (void) { - // re-enable all active callback objects one by one - for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_irq_obj_list).len; i++) { - mp_irq_obj_t *callback_obj = ((mp_irq_obj_t *)(MP_STATE_PORT(mp_irq_obj_list).items[i])); - callback_obj->methods->disable(callback_obj->parent); - } -} - -void mp_irq_remove (const mp_obj_t parent) { - mp_irq_obj_t *callback_obj; - if ((callback_obj = mp_irq_find(parent))) { - mp_obj_list_remove(&MP_STATE_PORT(mp_irq_obj_list), callback_obj); - } -} - -uint mp_irq_translate_priority (uint priority) { - if (priority < 1 || priority > MP_ARRAY_SIZE(mp_irq_priorities)) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return mp_irq_priorities[priority - 1]; -} - -void mp_irq_handler (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - if (self && self->handler != mp_const_none) { - // when executing code within a handler we must lock the GC to prevent - // any memory allocations. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(self->handler, self->parent); - nlr_pop(); - } - else { - // uncaught exception; disable the callback so that it doesn't run again - self->methods->disable (self->parent); - self->handler = mp_const_none; - // signal the error using the heart beat led and - // by printing a message - printf("Uncaught exception in callback handler\n"); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - mperror_signal_error(); - } - gc_unlock(); - } -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC mp_obj_t mp_irq_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_irq_obj_t *self = pos_args[0]; - // this is a bit of a hack, but it let us reuse the callback_create method from our parent - ((mp_obj_t *)pos_args)[0] = self->parent; - self->methods->init (n_args, pos_args, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_irq_init_obj, 1, mp_irq_init); - -STATIC mp_obj_t mp_irq_enable (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - self->methods->enable(self->parent); - self->isenabled = true; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_irq_enable_obj, mp_irq_enable); - -STATIC mp_obj_t mp_irq_disable (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - self->methods->disable(self->parent); - self->isenabled = false; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_irq_disable_obj, mp_irq_disable); - -STATIC mp_obj_t mp_irq_flags (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - return mp_obj_new_int(self->methods->flags(self->parent)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_irq_flags_obj, mp_irq_flags); - -STATIC mp_obj_t mp_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 0, false); - mp_irq_handler (self_in); - return mp_const_none; -} - -STATIC const mp_rom_map_elem_t mp_irq_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&mp_irq_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&mp_irq_enable_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&mp_irq_disable_obj) }, - { MP_ROM_QSTR(MP_QSTR_flags), MP_ROM_PTR(&mp_irq_flags_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_irq_locals_dict, mp_irq_locals_dict_table); - -const mp_obj_type_t mp_irq_type = { - { &mp_type_type }, - .name = MP_QSTR_irq, - .call = mp_irq_call, - .locals_dict = (mp_obj_t)&mp_irq_locals_dict, -}; - diff --git a/ports/cc3200/misc/mpirq.h b/ports/cc3200/misc/mpirq.h deleted file mode 100644 index 223a34cae2..0000000000 --- a/ports/cc3200/misc/mpirq.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_MPIRQ_H -#define MICROPY_INCLUDED_CC3200_MISC_MPIRQ_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define mp_irq_INIT_NUM_ARGS 4 - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef mp_obj_t (*mp_irq_init_t) (size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); -typedef void (*mp_irq_void_method_t) (mp_obj_t self); -typedef int (*mp_irq_int_method_t) (mp_obj_t self); - -typedef struct { - mp_irq_init_t init; - mp_irq_void_method_t enable; - mp_irq_void_method_t disable; - mp_irq_int_method_t flags; -} mp_irq_methods_t; - -typedef struct { - mp_obj_base_t base; - mp_obj_t parent; - mp_obj_t handler; - mp_irq_methods_t *methods; - bool isenabled; -} mp_irq_obj_t; - -/****************************************************************************** - DECLARE EXPORTED DATA - ******************************************************************************/ -extern const mp_arg_t mp_irq_init_args[]; -extern const mp_obj_type_t mp_irq_type; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void mp_irq_init0 (void); -mp_obj_t mp_irq_new (mp_obj_t parent, mp_obj_t handler, const mp_irq_methods_t *methods); -mp_irq_obj_t *mp_irq_find (mp_obj_t parent); -void mp_irq_wake_all (void); -void mp_irq_disable_all (void); -void mp_irq_remove (const mp_obj_t parent); -void mp_irq_handler (mp_obj_t self_in); -uint mp_irq_translate_priority (uint priority); - -#endif // MICROPY_INCLUDED_CC3200_MISC_MPIRQ_H diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c deleted file mode 100644 index 6051497e30..0000000000 --- a/ports/cc3200/mods/modmachine.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "irq.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_uart.h" -#include "rom_map.h" -#include "prcm.h" -#include "pybuart.h" -#include "pybpin.h" -#include "pybrtc.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "moduos.h" -#include "FreeRTOS.h" -#include "portable.h" -#include "task.h" -#include "mpexception.h" -#include "random.h" -#include "pybadc.h" -#include "pybi2c.h" -#include "pybsd.h" -#include "pybwdt.h" -#include "pybsleep.h" -#include "pybspi.h" -#include "pybtimer.h" -#include "utils.h" -#include "gccollect.h" - - -#ifdef DEBUG -extern OsiTaskHandle mpTaskHandle; -extern OsiTaskHandle svTaskHandle; -extern OsiTaskHandle xSimpleLinkSpawnTaskHndl; -#endif - - -/// \module machine - functions related to the SoC -/// - -/******************************************************************************/ -// MicroPython bindings; - -STATIC mp_obj_t machine_reset(void) { - // disable wlan - wlan_stop(SL_STOP_TIMEOUT_LONG); - // reset the cpu and it's peripherals - MAP_PRCMMCUReset(true); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -#ifdef DEBUG -STATIC mp_obj_t machine_info(uint n_args, const mp_obj_t *args) { - // FreeRTOS info - { - printf("---------------------------------------------\n"); - printf("FreeRTOS\n"); - printf("---------------------------------------------\n"); - printf("Total heap: %u\n", configTOTAL_HEAP_SIZE); - printf("Free heap: %u\n", xPortGetFreeHeapSize()); - printf("MpTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark((TaskHandle_t)mpTaskHandle)); - printf("ServersTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark((TaskHandle_t)svTaskHandle)); - printf("SlTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark(xSimpleLinkSpawnTaskHndl)); - printf("IdleTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark(xTaskGetIdleTaskHandle())); - - uint32_t *pstack = (uint32_t *)&_stack; - while (*pstack == 0x55555555) { - pstack++; - } - printf("MAIN min free stack: %u\n", pstack - ((uint32_t *)&_stack)); - printf("---------------------------------------------\n"); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info); -#endif - -STATIC mp_obj_t machine_freq(void) { - return mp_obj_new_int(HAL_FCPU_HZ); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_freq_obj, machine_freq); - -STATIC mp_obj_t machine_unique_id(void) { - uint8_t mac[SL_BSSID_LENGTH]; - wlan_get_mac (mac); - return mp_obj_new_bytes(mac, SL_BSSID_LENGTH); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -STATIC mp_obj_t machine_main(mp_obj_t main) { - if (MP_OBJ_IS_STR(main)) { - MP_STATE_PORT(machine_config_main) = main; - } else { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_main_obj, machine_main); - -STATIC mp_obj_t machine_idle(void) { - __WFI(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle); - -STATIC mp_obj_t machine_sleep (void) { - pyb_sleep_sleep(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep (void) { - pyb_sleep_deepsleep(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -STATIC mp_obj_t machine_reset_cause (void) { - return mp_obj_new_int(pyb_sleep_get_reset_cause()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC mp_obj_t machine_wake_reason (void) { - return mp_obj_new_int(pyb_sleep_get_wake_reason()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_wake_reason_obj, machine_wake_reason); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, -#ifdef DEBUG - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&machine_main_obj) }, - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&machine_rng_get_obj) }, - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) }, - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type) }, - { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sd_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IDLE), MP_ROM_INT(PYB_PWR_MODE_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(PYB_PWR_MODE_LPDS) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) }, - { MP_ROM_QSTR(MP_QSTR_POWER_ON), MP_ROM_INT(PYB_SLP_PWRON_RESET) }, // legacy constant - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_SLP_PWRON_RESET) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_SLP_HARD_RESET) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_SLP_WDT_RESET) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_SLP_HIB_RESET) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_SLP_SOFT_RESET) }, - { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) }, - { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) }, - { MP_ROM_QSTR(MP_QSTR_RTC_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t machine_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; diff --git a/ports/cc3200/mods/modnetwork.c b/ports/cc3200/mods/modnetwork.c deleted file mode 100644 index 37dffe731f..0000000000 --- a/ports/cc3200/mods/modnetwork.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "modnetwork.h" -#include "mpexception.h" -#include "serverstask.h" -#include "simplelink.h" - - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; -} network_server_obj_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC network_server_obj_t network_server_obj; -STATIC const mp_obj_type_t network_server_type; - -/// \module network - network configuration -/// -/// This module provides network drivers and server configuration. - -void mod_network_init0(void) { -} - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) -STATIC mp_obj_t network_server_init_helper(mp_obj_t self, const mp_arg_val_t *args) { - const char *user = SERVERS_DEF_USER; - const char *pass = SERVERS_DEF_PASS; - if (args[0].u_obj != MP_OBJ_NULL) { - mp_obj_t *login; - mp_obj_get_array_fixed_n(args[0].u_obj, 2, &login); - user = mp_obj_str_get_str(login[0]); - pass = mp_obj_str_get_str(login[1]); - } - - uint32_t timeout = SERVERS_DEF_TIMEOUT_MS / 1000; - if (args[1].u_obj != MP_OBJ_NULL) { - timeout = mp_obj_get_int(args[1].u_obj); - } - - // configure the new login - servers_set_login ((char *)user, (char *)pass); - - // configure the timeout - servers_set_timeout(timeout * 1000); - - // start the servers - servers_start(); - - return mp_const_none; -} - -STATIC const mp_arg_t network_server_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_login, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t network_server_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(network_server_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), network_server_args, args); - - // check the server id - if (args[0].u_obj != MP_OBJ_NULL) { - if (mp_obj_get_int(args[0].u_obj) != 0) { - mp_raise_OSError(MP_ENODEV); - } - } - - // setup the object and initialize it - network_server_obj_t *self = &network_server_obj; - self->base.type = &network_server_type; - network_server_init_helper(self, &args[1]); - - return (mp_obj_t)self; -} - -STATIC mp_obj_t network_server_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(network_server_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &network_server_args[1], args); - return network_server_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(network_server_init_obj, 1, network_server_init); - -// timeout value given in seconds -STATIC mp_obj_t network_server_timeout(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - uint32_t timeout = mp_obj_get_int(args[1]); - servers_set_timeout(timeout * 1000); - return mp_const_none; - } else { - // get - return mp_obj_new_int(servers_get_timeout() / 1000); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(network_server_timeout_obj, 1, 2, network_server_timeout); - -STATIC mp_obj_t network_server_running(mp_obj_t self_in) { - // get - return mp_obj_new_bool(servers_are_enabled()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(network_server_running_obj, network_server_running); - -STATIC mp_obj_t network_server_deinit(mp_obj_t self_in) { - // simply stop the servers - servers_stop(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(network_server_deinit_obj, network_server_deinit); -#endif - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&mod_network_nic_type_wlan) }, - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - { MP_ROM_QSTR(MP_QSTR_Server), MP_ROM_PTR(&network_server_type) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t mp_module_network = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) -STATIC const mp_rom_map_elem_t network_server_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&network_server_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&network_server_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&network_server_timeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_isrunning), MP_ROM_PTR(&network_server_running_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(network_server_locals_dict, network_server_locals_dict_table); - -STATIC const mp_obj_type_t network_server_type = { - { &mp_type_type }, - .name = MP_QSTR_Server, - .make_new = network_server_make_new, - .locals_dict = (mp_obj_t)&network_server_locals_dict, -}; -#endif diff --git a/ports/cc3200/mods/modnetwork.h b/ports/cc3200/mods/modnetwork.h deleted file mode 100644 index 6ec90a2bac..0000000000 --- a/ports/cc3200/mods/modnetwork.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODNETWORK_H -#define MICROPY_INCLUDED_CC3200_MODS_MODNETWORK_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define MOD_NETWORK_IPV4ADDR_BUF_SIZE (4) - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct _mod_network_nic_type_t { - mp_obj_type_t base; -} mod_network_nic_type_t; - -typedef struct _mod_network_socket_base_t { - union { - struct { - // this order is important so that fileno gets > 0 once - // the socket descriptor is assigned after being created. - uint8_t domain; - int8_t fileno; - uint8_t type; - uint8_t proto; - } u_param; - int16_t sd; - }; - uint32_t timeout_ms; // 0 for no timeout - bool cert_req; -} mod_network_socket_base_t; - -typedef struct _mod_network_socket_obj_t { - mp_obj_base_t base; - mod_network_socket_base_t sock_base; -} mod_network_socket_obj_t; - -/****************************************************************************** - EXPORTED DATA - ******************************************************************************/ -extern const mod_network_nic_type_t mod_network_nic_type_wlan; - -/****************************************************************************** - DECLARE FUNCTIONS - ******************************************************************************/ -void mod_network_init0(void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODNETWORK_H diff --git a/ports/cc3200/mods/modubinascii.c b/ports/cc3200/mods/modubinascii.c deleted file mode 100644 index 6b020ab393..0000000000 --- a/ports/cc3200/mods/modubinascii.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Paul Sokolovsky - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/binary.h" -#include "extmod/modubinascii.h" -#include "modubinascii.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_dthe.h" -#include "hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "crc.h" -#include "cryptohash.h" -#include "mpexception.h" - - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_rom_map_elem_t mp_module_binascii_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ubinascii) }, - { MP_ROM_QSTR(MP_QSTR_hexlify), MP_ROM_PTR(&mod_binascii_hexlify_obj) }, - { MP_ROM_QSTR(MP_QSTR_unhexlify), MP_ROM_PTR(&mod_binascii_unhexlify_obj) }, - { MP_ROM_QSTR(MP_QSTR_a2b_base64), MP_ROM_PTR(&mod_binascii_a2b_base64_obj) }, - { MP_ROM_QSTR(MP_QSTR_b2a_base64), MP_ROM_PTR(&mod_binascii_b2a_base64_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_binascii_globals, mp_module_binascii_globals_table); - -const mp_obj_module_t mp_module_ubinascii = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_binascii_globals, -}; diff --git a/ports/cc3200/mods/moduhashlib.c b/ports/cc3200/mods/moduhashlib.c deleted file mode 100644 index 96f5149273..0000000000 --- a/ports/cc3200/mods/moduhashlib.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Paul Sokolovsky - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mpconfig.h" -#include MICROPY_HAL_H -#include "py/runtime.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_shamd5.h" -#include "inc/hw_dthe.h" -#include "hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "shamd5.h" -#include "cryptohash.h" -#include "mpexception.h" - - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct _mp_obj_hash_t { - mp_obj_base_t base; - uint8_t *buffer; - uint32_t b_size; - uint32_t c_size; - uint8_t algo; - uint8_t h_size; - bool fixedlen; - bool digested; - uint8_t hash[32]; -} mp_obj_hash_t; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void hash_update_internal(mp_obj_t self_in, mp_obj_t data, bool digest); -STATIC mp_obj_t hash_read (mp_obj_t self_in); - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void hash_update_internal(mp_obj_t self_in, mp_obj_t data, bool digest) { - mp_obj_hash_t *self = self_in; - mp_buffer_info_t bufinfo; - - if (data) { - mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); - } - - if (digest) { - CRYPTOHASH_SHAMD5Start (self->algo, self->b_size); - } - - if (self->c_size < self->b_size || !data || !self->fixedlen) { - if (digest || self->fixedlen) { - // no data means we want to process our internal buffer - CRYPTOHASH_SHAMD5Update (data ? bufinfo.buf : self->buffer, data ? bufinfo.len : self->b_size); - self->c_size += data ? bufinfo.len : 0; - } else { - self->buffer = m_renew(byte, self->buffer, self->b_size, self->b_size + bufinfo.len); - mp_seq_copy((byte*)self->buffer + self->b_size, bufinfo.buf, bufinfo.len, byte); - self->b_size += bufinfo.len; - self->digested = false; - } - } else { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC mp_obj_t hash_read (mp_obj_t self_in) { - mp_obj_hash_t *self = self_in; - - if (!self->fixedlen) { - if (!self->digested) { - hash_update_internal(self, MP_OBJ_NULL, true); - } - } else if (self->c_size < self->b_size) { - // it's a fixed len block which is still incomplete - mp_raise_OSError(MP_EPERM); - } - - if (!self->digested) { - CRYPTOHASH_SHAMD5Read ((uint8_t *)self->hash); - self->digested = true; - } - return mp_obj_new_bytes(self->hash, self->h_size); -} - -/******************************************************************************/ -// MicroPython bindings - -/// \classmethod \constructor([data[, block_size]]) -/// initial data must be given if block_size wants to be passed -STATIC mp_obj_t hash_make_new(mp_obj_t type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 2, false); - mp_obj_hash_t *self = m_new0(mp_obj_hash_t, 1); - self->base.type = type_in; - if (self->base.type->name == MP_QSTR_sha1) { - self->algo = SHAMD5_ALGO_SHA1; - self->h_size = 20; - } else /* if (self->base.type->name == MP_QSTR_sha256) */ { - self->algo = SHAMD5_ALGO_SHA256; - self->h_size = 32; - } /* else { - self->algo = SHAMD5_ALGO_MD5; - self->h_size = 32; - } */ - - if (n_args) { - // CPython extension to avoid buffering the data before digesting it - // Note: care must be taken to provide all intermediate blocks as multiple - // of four bytes, otherwise the resulting hash will be incorrect. - // the final block can be of any length - if (n_args > 1) { - // block size given, we will feed the data directly into the hash engine - self->fixedlen = true; - self->b_size = mp_obj_get_int(args[1]); - hash_update_internal(self, args[0], true); - } else { - hash_update_internal(self, args[0], false); - } - } - return self; -} - -STATIC mp_obj_t hash_update(mp_obj_t self_in, mp_obj_t arg) { - mp_obj_hash_t *self = self_in; - hash_update_internal(self, arg, false); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(hash_update_obj, hash_update); - -STATIC mp_obj_t hash_digest(mp_obj_t self_in) { - return hash_read(self_in); -} -MP_DEFINE_CONST_FUN_OBJ_1(hash_digest_obj, hash_digest); - -STATIC const mp_rom_map_elem_t hash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&hash_update_obj) }, - { MP_ROM_QSTR(MP_QSTR_digest), MP_ROM_PTR(&hash_digest_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(hash_locals_dict, hash_locals_dict_table); - -//STATIC const mp_obj_type_t md5_type = { -// { &mp_type_type }, -// .name = MP_QSTR_md5, -// .make_new = hash_make_new, -// .locals_dict = (mp_obj_t)&hash_locals_dict, -//}; - -STATIC const mp_obj_type_t sha1_type = { - { &mp_type_type }, - .name = MP_QSTR_sha1, - .make_new = hash_make_new, - .locals_dict = (mp_obj_t)&hash_locals_dict, -}; - -STATIC const mp_obj_type_t sha256_type = { - { &mp_type_type }, - .name = MP_QSTR_sha256, - .make_new = hash_make_new, - .locals_dict = (mp_obj_t)&hash_locals_dict, -}; - -STATIC const mp_rom_map_elem_t mp_module_hashlib_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uhashlib) }, - //{ MP_ROM_QSTR(MP_QSTR_md5), MP_ROM_PTR(&md5_type) }, - { MP_ROM_QSTR(MP_QSTR_sha1), MP_ROM_PTR(&sha1_type) }, - { MP_ROM_QSTR(MP_QSTR_sha256), MP_ROM_PTR(&sha256_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_hashlib_globals, mp_module_hashlib_globals_table); - -const mp_obj_module_t mp_module_uhashlib = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_hashlib_globals, -}; - diff --git a/ports/cc3200/mods/moduos.c b/ports/cc3200/mods/moduos.c deleted file mode 100644 index 7d99c8e80d..0000000000 --- a/ports/cc3200/mods/moduos.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/objtuple.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "lib/timeutils/timeutils.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "genhdr/mpversion.h" -#include "moduos.h" -#include "sflash_diskio.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "random.h" -#include "mpexception.h" -#include "version.h" -#include "pybsd.h" -#include "pybuart.h" - -/// \module os - basic "operating system" services -/// -/// The `os` module contains functions for filesystem access and `urandom`. -/// -/// The filesystem has `/` as the root directory, and the available physical -/// drives are accessible from here. They are currently: -/// -/// /flash -- the serial flash filesystem -/// -/// On boot up, the current directory is `/flash`. - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC os_term_dup_obj_t os_term_dup_obj; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ - -void osmount_unmount_all (void) { - //TODO - /* - for (mp_uint_t i = 0; i < MP_STATE_PORT(mount_obj_list).len; i++) { - os_fs_mount_t *mount_obj = ((os_fs_mount_t *)(MP_STATE_PORT(mount_obj_list).items[i])); - unmount(mount_obj); - } - */ -} - -/******************************************************************************/ -// MicroPython bindings -// - -STATIC const qstr os_uname_info_fields[] = { - MP_QSTR_sysname, MP_QSTR_nodename, - MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine -}; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, WIPY_SW_VERSION_NUMBER); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); -STATIC MP_DEFINE_ATTRTUPLE( - os_uname_info_obj, - os_uname_info_fields, - 5, - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - (mp_obj_t)&os_uname_info_release_obj, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj -); - -STATIC mp_obj_t os_uname(void) { - return (mp_obj_t)&os_uname_info_obj; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname); - -STATIC mp_obj_t os_sync(void) { - sflash_disk_flush(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_sync_obj, os_sync); - -STATIC mp_obj_t os_urandom(mp_obj_t num) { - mp_int_t n = mp_obj_get_int(num); - vstr_t vstr; - vstr_init_len(&vstr, n); - for (int i = 0; i < n; i++) { - vstr.buf[i] = rng_get(); - } - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom); - -STATIC mp_obj_t os_dupterm(uint n_args, const mp_obj_t *args) { - if (n_args == 0) { - if (MP_STATE_PORT(os_term_dup_obj) == MP_OBJ_NULL) { - return mp_const_none; - } else { - return MP_STATE_PORT(os_term_dup_obj)->stream_o; - } - } else { - mp_obj_t stream_o = args[0]; - if (stream_o == mp_const_none) { - MP_STATE_PORT(os_term_dup_obj) = MP_OBJ_NULL; - } else { - if (!MP_OBJ_IS_TYPE(stream_o, &pyb_uart_type)) { - // must be a stream-like object providing at least read and write methods - mp_load_method(stream_o, MP_QSTR_read, os_term_dup_obj.read); - mp_load_method(stream_o, MP_QSTR_write, os_term_dup_obj.write); - } - os_term_dup_obj.stream_o = stream_o; - MP_STATE_PORT(os_term_dup_obj) = &os_term_dup_obj; - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(os_dupterm_obj, 0, 1, os_dupterm); - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - - { MP_ROM_QSTR(MP_QSTR_uname), MP_ROM_PTR(&os_uname_obj) }, - - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&mp_vfs_rename_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_unlink), MP_ROM_PTR(&mp_vfs_remove_obj) }, // unlink aliases to remove - - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&os_sync_obj) }, - { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&os_urandom_obj) }, - - // MicroPython additions - // removed: mkfs - // renamed: unmount -> umount - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, - { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, - { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&os_dupterm_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t mp_module_uos = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/cc3200/mods/moduos.h b/ports/cc3200/mods/moduos.h deleted file mode 100644 index f183715c90..0000000000 --- a/ports/cc3200/mods/moduos.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODUOS_H -#define MICROPY_INCLUDED_CC3200_MODS_MODUOS_H - -#include "py/obj.h" - -/****************************************************************************** - DEFINE PUBLIC TYPES - ******************************************************************************/ - -typedef struct _os_term_dup_obj_t { - mp_obj_t stream_o; - mp_obj_t read[3]; - mp_obj_t write[3]; -} os_term_dup_obj_t; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void osmount_unmount_all (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODUOS_H diff --git a/ports/cc3200/mods/modusocket.c b/ports/cc3200/mods/modusocket.c deleted file mode 100644 index 286b1fb02b..0000000000 --- a/ports/cc3200/mods/modusocket.c +++ /dev/null @@ -1,819 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "simplelink.h" -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "mpexception.h" - -/******************************************************************************/ -// The following set of macros and functions provide a glue between the CC3100 -// simplelink layer and the functions/methods provided by the usocket module. -// They were historically in a separate file because usocket was designed to -// work with multiple NICs, and the wlan_XXX functions just provided one -// particular NIC implementation (that of the CC3100). But the CC3200 port only -// supports a single NIC (being the CC3100) so it's unnecessary and inefficient -// to provide an intermediate wrapper layer. Hence the wlan_XXX functions -// are provided below as static functions so they can be inlined directly by -// the corresponding usocket calls. - -#define WLAN_MAX_RX_SIZE 16000 -#define WLAN_MAX_TX_SIZE 1476 - -#define MAKE_SOCKADDR(addr, ip, port) SlSockAddr_t addr; \ - addr.sa_family = SL_AF_INET; \ - addr.sa_data[0] = port >> 8; \ - addr.sa_data[1] = port; \ - addr.sa_data[2] = ip[3]; \ - addr.sa_data[3] = ip[2]; \ - addr.sa_data[4] = ip[1]; \ - addr.sa_data[5] = ip[0]; - -#define UNPACK_SOCKADDR(addr, ip, port) port = (addr.sa_data[0] << 8) | addr.sa_data[1]; \ - ip[0] = addr.sa_data[5]; \ - ip[1] = addr.sa_data[4]; \ - ip[2] = addr.sa_data[3]; \ - ip[3] = addr.sa_data[2]; - -#define SOCKET_TIMEOUT_QUANTA_MS (20) - -STATIC int convert_sl_errno(int sl_errno) { - return -sl_errno; -} - -// This function is left as non-static so it's not inlined. -int check_timedout(mod_network_socket_obj_t *s, int ret, uint32_t *timeout_ms, int *_errno) { - if (*timeout_ms == 0 || ret != SL_EAGAIN) { - if (s->sock_base.timeout_ms > 0 && ret == SL_EAGAIN) { - *_errno = MP_ETIMEDOUT; - } else { - *_errno = convert_sl_errno(ret); - } - return -1; - } - mp_hal_delay_ms(SOCKET_TIMEOUT_QUANTA_MS); - if (*timeout_ms < SOCKET_TIMEOUT_QUANTA_MS) { - *timeout_ms = 0; - } else { - *timeout_ms -= SOCKET_TIMEOUT_QUANTA_MS; - } - return 0; -} - -STATIC int wlan_gethostbyname(const char *name, mp_uint_t len, uint8_t *out_ip, uint8_t family) { - uint32_t ip; - int result = sl_NetAppDnsGetHostByName((_i8 *)name, (_u16)len, (_u32*)&ip, (_u8)family); - out_ip[0] = ip; - out_ip[1] = ip >> 8; - out_ip[2] = ip >> 16; - out_ip[3] = ip >> 24; - return result; -} - -STATIC int wlan_socket_socket(mod_network_socket_obj_t *s, int *_errno) { - int16_t sd = sl_Socket(s->sock_base.u_param.domain, s->sock_base.u_param.type, s->sock_base.u_param.proto); - if (sd < 0) { - *_errno = sd; - return -1; - } - s->sock_base.sd = sd; - return 0; -} - -STATIC void wlan_socket_close(mod_network_socket_obj_t *s) { - // this is to prevent the finalizer to close a socket that failed when being created - if (s->sock_base.sd >= 0) { - modusocket_socket_delete(s->sock_base.sd); - sl_Close(s->sock_base.sd); - s->sock_base.sd = -1; - } -} - -STATIC int wlan_socket_bind(mod_network_socket_obj_t *s, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = sl_Bind(s->sock_base.sd, &addr, sizeof(addr)); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int wlan_socket_listen(mod_network_socket_obj_t *s, mp_int_t backlog, int *_errno) { - int ret = sl_Listen(s->sock_base.sd, backlog); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int wlan_socket_accept(mod_network_socket_obj_t *s, mod_network_socket_obj_t *s2, byte *ip, mp_uint_t *port, int *_errno) { - // accept incoming connection - int16_t sd; - SlSockAddr_t addr; - SlSocklen_t addr_len = sizeof(addr); - - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - sd = sl_Accept(s->sock_base.sd, &addr, &addr_len); - if (sd >= 0) { - // save the socket descriptor - s2->sock_base.sd = sd; - // return ip and port - UNPACK_SOCKADDR(addr, ip, *port); - return 0; - } - if (check_timedout(s, sd, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_connect(mod_network_socket_obj_t *s, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - uint32_t timeout_ms = s->sock_base.timeout_ms; - - // For a non-blocking connect the CC3100 will return SL_EALREADY while the - // connection is in progress. - - for (;;) { - int ret = sl_Connect(s->sock_base.sd, &addr, sizeof(addr)); - if (ret == 0) { - return 0; - } - - // Check if we are in non-blocking mode and the connection is in progress - if (s->sock_base.timeout_ms == 0 && ret == SL_EALREADY) { - // To match BSD we return EINPROGRESS here - *_errno = MP_EINPROGRESS; - return -1; - } - - // We are in blocking mode, so if the connection isn't in progress then error out - if (ret != SL_EALREADY) { - *_errno = convert_sl_errno(ret); - return -1; - } - - if (check_timedout(s, SL_EAGAIN, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_send(mod_network_socket_obj_t *s, const byte *buf, mp_uint_t len, int *_errno) { - if (len == 0) { - return 0; - } - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_Send(s->sock_base.sd, (const void *)buf, len, 0); - if (ret > 0) { - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_recv(mod_network_socket_obj_t *s, byte *buf, mp_uint_t len, int *_errno) { - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_Recv(s->sock_base.sd, buf, MIN(len, WLAN_MAX_RX_SIZE), 0); - if (ret >= 0) { - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_sendto( mod_network_socket_obj_t *s, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_SendTo(s->sock_base.sd, (byte*)buf, len, 0, (SlSockAddr_t*)&addr, sizeof(addr)); - if (ret >= 0) { - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_recvfrom(mod_network_socket_obj_t *s, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { - SlSockAddr_t addr; - SlSocklen_t addr_len = sizeof(addr); - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_RecvFrom(s->sock_base.sd, buf, MIN(len, WLAN_MAX_RX_SIZE), 0, &addr, &addr_len); - if (ret >= 0) { - UNPACK_SOCKADDR(addr, ip, *port); - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_setsockopt(mod_network_socket_obj_t *s, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { - int ret = sl_SetSockOpt(s->sock_base.sd, level, opt, optval, optlen); - if (ret < 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int wlan_socket_settimeout(mod_network_socket_obj_t *s, mp_uint_t timeout_s, int *_errno) { - SlSockNonblocking_t option; - if (timeout_s == 0 || timeout_s == -1) { - if (timeout_s == 0) { - // set non-blocking mode - option.NonblockingEnabled = 1; - } else { - // set blocking mode - option.NonblockingEnabled = 0; - } - timeout_s = 0; - } else { - // synthesize timeout via non-blocking behaviour with a loop - option.NonblockingEnabled = 1; - } - - int ret = sl_SetSockOpt(s->sock_base.sd, SL_SOL_SOCKET, SL_SO_NONBLOCKING, &option, sizeof(option)); - if (ret != 0) { - *_errno = convert_sl_errno(ret); - return -1; - } - - s->sock_base.timeout_ms = timeout_s * 1000; - return 0; -} - -STATIC int wlan_socket_ioctl (mod_network_socket_obj_t *s, mp_uint_t request, mp_uint_t arg, int *_errno) { - mp_int_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - int32_t sd = s->sock_base.sd; - - // init fds - SlFdSet_t rfds, wfds, xfds; - SL_FD_ZERO(&rfds); - SL_FD_ZERO(&wfds); - SL_FD_ZERO(&xfds); - - // set fds if needed - if (flags & MP_STREAM_POLL_RD) { - SL_FD_SET(sd, &rfds); - } - if (flags & MP_STREAM_POLL_WR) { - SL_FD_SET(sd, &wfds); - } - if (flags & MP_STREAM_POLL_HUP) { - SL_FD_SET(sd, &xfds); - } - - // call simplelink's select with minimum timeout - SlTimeval_t tv; - tv.tv_sec = 0; - tv.tv_usec = 1; - int32_t nfds = sl_Select(sd + 1, &rfds, &wfds, &xfds, &tv); - - // check for errors - if (nfds == -1) { - *_errno = nfds; - return -1; - } - - // check return of select - if (SL_FD_ISSET(sd, &rfds)) { - ret |= MP_STREAM_POLL_RD; - } - if (SL_FD_ISSET(sd, &wfds)) { - ret |= MP_STREAM_POLL_WR; - } - if (SL_FD_ISSET(sd, &xfds)) { - ret |= MP_STREAM_POLL_HUP; - } - } else if (request == MP_STREAM_CLOSE) { - wlan_socket_close(s); - ret = 0; - } else { - *_errno = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -/****************************************************************************** - DEFINE PRIVATE CONSTANTS - ******************************************************************************/ -#define MOD_NETWORK_MAX_SOCKETS 10 - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct { - int16_t sd; - bool user; -} modusocket_sock_t; - -/****************************************************************************** - DEFINE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_obj_type_t socket_type; -STATIC OsiLockObj_t modusocket_LockObj; -STATIC modusocket_sock_t modusocket_sockets[MOD_NETWORK_MAX_SOCKETS] = {{.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}, - {.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}}; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -void modusocket_pre_init (void) { - // create the wlan lock - ASSERT(OSI_OK == sl_LockObjCreate(&modusocket_LockObj, "SockLock")); - sl_LockObjUnlock (&modusocket_LockObj); -} - -void modusocket_socket_add (int16_t sd, bool user) { - sl_LockObjLock (&modusocket_LockObj, SL_OS_WAIT_FOREVER); - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - if (modusocket_sockets[i].sd < 0) { - modusocket_sockets[i].sd = sd; - modusocket_sockets[i].user = user; - break; - } - } - sl_LockObjUnlock (&modusocket_LockObj); -} - -void modusocket_socket_delete (int16_t sd) { - sl_LockObjLock (&modusocket_LockObj, SL_OS_WAIT_FOREVER); - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - if (modusocket_sockets[i].sd == sd) { - modusocket_sockets[i].sd = -1; - break; - } - } - sl_LockObjUnlock (&modusocket_LockObj); -} - -void modusocket_enter_sleep (void) { - SlFdSet_t socketset; - int16_t maxfd = 0; - - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - int16_t sd; - if ((sd = modusocket_sockets[i].sd) >= 0) { - SL_FD_SET(sd, &socketset); - maxfd = (maxfd > sd) ? maxfd : sd; - } - } - - if (maxfd > 0) { - // wait for any of the sockets to become ready... - sl_Select(maxfd + 1, &socketset, NULL, NULL, NULL); - } -} - -void modusocket_close_all_user_sockets (void) { - sl_LockObjLock (&modusocket_LockObj, SL_OS_WAIT_FOREVER); - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - if (modusocket_sockets[i].sd >= 0 && modusocket_sockets[i].user) { - sl_Close(modusocket_sockets[i].sd); - modusocket_sockets[i].sd = -1; - } - } - sl_LockObjUnlock (&modusocket_LockObj); -} - -/******************************************************************************/ -// socket class - -// constructor socket(family=AF_INET, type=SOCK_STREAM, proto=IPPROTO_TCP, fileno=None) -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 4, false); - - // create socket object - mod_network_socket_obj_t *s = m_new_obj_with_finaliser(mod_network_socket_obj_t); - s->base.type = (mp_obj_t)&socket_type; - s->sock_base.u_param.domain = SL_AF_INET; - s->sock_base.u_param.type = SL_SOCK_STREAM; - s->sock_base.u_param.proto = SL_IPPROTO_TCP; - s->sock_base.u_param.fileno = -1; - s->sock_base.timeout_ms = 0; - s->sock_base.cert_req = false; - - if (n_args > 0) { - s->sock_base.u_param.domain = mp_obj_get_int(args[0]); - if (n_args > 1) { - s->sock_base.u_param.type = mp_obj_get_int(args[1]); - if (n_args > 2) { - s->sock_base.u_param.proto = mp_obj_get_int(args[2]); - if (n_args > 3) { - s->sock_base.u_param.fileno = mp_obj_get_int(args[3]); - } - } - } - } - - // create the socket - int _errno; - if (wlan_socket_socket(s, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - // add the socket to the list - modusocket_socket_add(s->sock_base.sd, true); - return s; -} - -// method socket.bind(address) -STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_LITTLE); - - // call the NIC to bind the socket - int _errno = 0; - if (wlan_socket_bind(self, ip, port, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -// method socket.listen([backlog]) -STATIC mp_obj_t socket_listen(size_t n_args, const mp_obj_t *args) { - mod_network_socket_obj_t *self = args[0]; - - int32_t backlog = 0; - if (n_args > 1) { - backlog = mp_obj_get_int(args[1]); - backlog = (backlog < 0) ? 0 : backlog; - } - - int _errno; - if (wlan_socket_listen(self, backlog, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_listen_obj, 1, 2, socket_listen); - -// method socket.accept() -STATIC mp_obj_t socket_accept(mp_obj_t self_in) { - mod_network_socket_obj_t *self = self_in; - - // create new socket object - mod_network_socket_obj_t *socket2 = m_new_obj_with_finaliser(mod_network_socket_obj_t); - // the new socket inherits all properties from its parent - memcpy (socket2, self, sizeof(mod_network_socket_obj_t)); - - // accept the incoming connection - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = 0; - int _errno = 0; - if (wlan_socket_accept(self, socket2, ip, &port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - // add the socket to the list - modusocket_socket_add(socket2->sock_base.sd, true); - - // make the return value - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = socket2; - client->items[1] = netutils_format_inet_addr(ip, port, NETUTILS_LITTLE); - return client; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -// method socket.connect(address) -STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_LITTLE); - - // connect the socket - int _errno; - if (wlan_socket_connect(self, ip, port, &_errno) != 0) { - if (!self->sock_base.cert_req && _errno == SL_ESECSNOVERIFY) { - return mp_const_none; - } - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -// method socket.send(bytes) -STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { - mod_network_socket_obj_t *self = self_in; - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - int _errno; - mp_int_t ret = wlan_socket_send(self, bufinfo.buf, bufinfo.len, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - return mp_obj_new_int_from_uint(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -// method socket.recv(bufsize) -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - mp_int_t len = mp_obj_get_int(len_in); - vstr_t vstr; - vstr_init_len(&vstr, len); - int _errno; - mp_int_t ret = wlan_socket_recv(self, (byte*)vstr.buf, len, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - if (ret == 0) { - return mp_const_empty_bytes; - } - vstr.len = ret; - vstr.buf[vstr.len] = '\0'; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -// method socket.sendto(bytes, address) -STATIC mp_obj_t socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get the data - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data_in, &bufinfo, MP_BUFFER_READ); - - // get address - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_LITTLE); - - // call the nic to sendto - int _errno = 0; - mp_int_t ret = wlan_socket_sendto(self, bufinfo.buf, bufinfo.len, ip, port, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - return mp_obj_new_int(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(socket_sendto_obj, socket_sendto); - -// method socket.recvfrom(bufsize) -STATIC mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(len_in)); - byte ip[4]; - mp_uint_t port = 0; - int _errno = 0; - mp_int_t ret = wlan_socket_recvfrom(self, (byte*)vstr.buf, vstr.len, ip, &port, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - mp_obj_t tuple[2]; - if (ret == 0) { - tuple[0] = mp_const_empty_bytes; - } else { - vstr.len = ret; - vstr.buf[vstr.len] = '\0'; - tuple[0] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } - tuple[1] = netutils_format_inet_addr(ip, port, NETUTILS_LITTLE); - return mp_obj_new_tuple(2, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom); - -// method socket.setsockopt(level, optname, value) -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - mod_network_socket_obj_t *self = args[0]; - - mp_int_t level = mp_obj_get_int(args[1]); - mp_int_t opt = mp_obj_get_int(args[2]); - - const void *optval; - mp_uint_t optlen; - mp_int_t val; - if (mp_obj_is_integer(args[3])) { - val = mp_obj_get_int_truncated(args[3]); - optval = &val; - optlen = sizeof(val); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); - optval = bufinfo.buf; - optlen = bufinfo.len; - } - - int _errno; - if (wlan_socket_setsockopt(self, level, opt, optval, optlen, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -// method socket.settimeout(value) -// timeout=0 means non-blocking -// timeout=None means blocking -// otherwise, timeout is in seconds -STATIC mp_obj_t socket_settimeout(mp_obj_t self_in, mp_obj_t timeout_in) { - mod_network_socket_obj_t *self = self_in; - mp_uint_t timeout; - if (timeout_in == mp_const_none) { - timeout = -1; - } else { - timeout = mp_obj_get_int(timeout_in); - } - int _errno = 0; - if (wlan_socket_settimeout(self, timeout, &_errno) != 0) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_settimeout_obj, socket_settimeout); - -// method socket.setblocking(flag) -STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t blocking) { - if (mp_obj_is_true(blocking)) { - return socket_settimeout(self_in, mp_const_none); - } else { - return socket_settimeout(self_in, MP_OBJ_NEW_SMALL_INT(0)); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); - -STATIC mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) { - (void)n_args; - return args[0]; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 6, socket_makefile); - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendall), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, - { MP_ROM_QSTR(MP_QSTR_recvfrom), MP_ROM_PTR(&socket_recvfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - { MP_ROM_QSTR(MP_QSTR_settimeout), MP_ROM_PTR(&socket_settimeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, - { MP_ROM_QSTR(MP_QSTR_makefile), MP_ROM_PTR(&socket_makefile_obj) }, - - // stream methods - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read1_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, -}; - -MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -STATIC mp_uint_t socket_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { - mod_network_socket_obj_t *self = self_in; - mp_int_t ret = wlan_socket_recv(self, buf, size, errcode); - if (ret < 0) { - // we need to ignore the socket closed error here because a read() without params - // only returns when the socket is closed by the other end - if (*errcode != -SL_ESECCLOSED) { - ret = MP_STREAM_ERROR; - } else { - ret = 0; - } - } - return ret; -} - -STATIC mp_uint_t socket_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - mod_network_socket_obj_t *self = self_in; - mp_int_t ret = wlan_socket_send(self, buf, size, errcode); - if (ret < 0) { - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC mp_uint_t socket_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - mod_network_socket_obj_t *self = self_in; - return wlan_socket_ioctl(self, request, arg, errcode); -} - -const mp_stream_p_t socket_stream_p = { - .read = socket_read, - .write = socket_write, - .ioctl = socket_ioctl, - .is_text = false, -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .make_new = socket_make_new, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -/******************************************************************************/ -// usocket module - -// function usocket.getaddrinfo(host, port) -/// \function getaddrinfo(host, port) -STATIC mp_obj_t mod_usocket_getaddrinfo(mp_obj_t host_in, mp_obj_t port_in) { - size_t hlen; - const char *host = mp_obj_str_get_data(host_in, &hlen); - mp_int_t port = mp_obj_get_int(port_in); - - // ipv4 only - uint8_t out_ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - int32_t result = wlan_gethostbyname(host, hlen, out_ip, SL_AF_INET); - if (result < 0) { - mp_raise_OSError(-result); - } - mp_obj_tuple_t *tuple = mp_obj_new_tuple(5, NULL); - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(SL_AF_INET); - tuple->items[1] = MP_OBJ_NEW_SMALL_INT(SL_SOCK_STREAM); - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); - tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); - tuple->items[4] = netutils_format_inet_addr(out_ip, port, NETUTILS_LITTLE); - return mp_obj_new_list(1, (mp_obj_t*)&tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_usocket_getaddrinfo_obj, mod_usocket_getaddrinfo); - -STATIC const mp_rom_map_elem_t mp_module_usocket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&mod_usocket_getaddrinfo_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(SL_AF_INET) }, - - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(SL_SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(SL_SOCK_DGRAM) }, - - { MP_ROM_QSTR(MP_QSTR_IPPROTO_SEC), MP_ROM_INT(SL_SEC_SOCKET) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(SL_IPPROTO_TCP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_UDP), MP_ROM_INT(SL_IPPROTO_UDP) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_usocket_globals, mp_module_usocket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_usocket_globals, -}; diff --git a/ports/cc3200/mods/modusocket.h b/ports/cc3200/mods/modusocket.h deleted file mode 100644 index aaee04ce19..0000000000 --- a/ports/cc3200/mods/modusocket.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODUSOCKET_H -#define MICROPY_INCLUDED_CC3200_MODS_MODUSOCKET_H - -#include "py/stream.h" - -extern const mp_obj_dict_t socket_locals_dict; -extern const mp_stream_p_t socket_stream_p; - -extern void modusocket_pre_init (void); -extern void modusocket_socket_add (int16_t sd, bool user); -extern void modusocket_socket_delete (int16_t sd); -extern void modusocket_enter_sleep (void); -extern void modusocket_close_all_user_sockets (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODUSOCKET_H diff --git a/ports/cc3200/mods/modussl.c b/ports/cc3200/mods/modussl.c deleted file mode 100644 index 3211570499..0000000000 --- a/ports/cc3200/mods/modussl.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "simplelink.h" -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "mpexception.h" - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define SSL_CERT_NONE (0) -#define SSL_CERT_OPTIONAL (1) -#define SSL_CERT_REQUIRED (2) - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct _mp_obj_ssl_socket_t { - mp_obj_base_t base; - mod_network_socket_base_t sock_base; - mp_obj_t o_sock; -} mp_obj_ssl_socket_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_obj_type_t ssl_socket_type; - -/******************************************************************************/ -// MicroPython bindings; SSL class - -// ssl sockets inherit from normal socket, so we take its -// locals and stream methods -STATIC const mp_obj_type_t ssl_socket_type = { - { &mp_type_type }, - .name = MP_QSTR_ussl, - .getiter = NULL, - .iternext = NULL, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -STATIC mp_obj_t mod_ssl_wrap_socket(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t allowed_args[] = { - { MP_QSTR_sock, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_keyfile, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_certfile, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_server_side, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_cert_reqs, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SSL_CERT_NONE} }, - { MP_QSTR_ssl_version, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SL_SO_SEC_METHOD_TLSV1} }, - { MP_QSTR_ca_certs, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse arguments - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // chech if ca validation is required - if (args[4].u_int != SSL_CERT_NONE && args[5].u_obj == mp_const_none) { - goto arg_error; - } - - // retrieve the file paths (with an 6 byte offset in order to strip it from the '/flash' prefix) - const char *keyfile = (args[1].u_obj == mp_const_none) ? NULL : &(mp_obj_str_get_str(args[1].u_obj)[6]); - const char *certfile = (args[2].u_obj == mp_const_none) ? NULL : &(mp_obj_str_get_str(args[2].u_obj)[6]); - const char *cafile = (args[6].u_obj == mp_const_none || args[4].u_int != SSL_CERT_REQUIRED) ? - NULL : &(mp_obj_str_get_str(args[6].u_obj)[6]); - - // server side requires both certfile and keyfile - if (args[3].u_bool && (!keyfile || !certfile)) { - goto arg_error; - } - - _i16 _errno; - _i16 sd = ((mod_network_socket_obj_t *)args[0].u_obj)->sock_base.sd; - - // set the requested SSL method - _u8 method = args[5].u_int; - if ((_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECMETHOD, &method, sizeof(method))) < 0) { - goto socket_error; - } - if (keyfile && (_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECURE_FILES_PRIVATE_KEY_FILE_NAME, keyfile, strlen(keyfile))) < 0) { - goto socket_error; - } - if (certfile && (_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECURE_FILES_CERTIFICATE_FILE_NAME, certfile, strlen(certfile))) < 0) { - goto socket_error; - } - if (cafile && (_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECURE_FILES_CA_FILE_NAME, cafile, strlen(cafile))) < 0) { - goto socket_error; - } - - // create the ssl socket - mp_obj_ssl_socket_t *ssl_sock = m_new_obj(mp_obj_ssl_socket_t); - // ssl sockets inherit all properties from the original socket - memcpy (&ssl_sock->sock_base, &((mod_network_socket_obj_t *)args[0].u_obj)->sock_base, sizeof(mod_network_socket_base_t)); - ssl_sock->base.type = &ssl_socket_type; - ssl_sock->sock_base.cert_req = (args[4].u_int == SSL_CERT_REQUIRED) ? true : false; - ssl_sock->o_sock = args[0].u_obj; - - return ssl_sock; - -socket_error: - mp_raise_OSError(_errno); - -arg_error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(mod_ssl_wrap_socket_obj, 0, mod_ssl_wrap_socket); - -STATIC const mp_rom_map_elem_t mp_module_ussl_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ussl) }, - { MP_ROM_QSTR(MP_QSTR_wrap_socket), MP_ROM_PTR(&mod_ssl_wrap_socket_obj) }, - - // class exceptions - { MP_ROM_QSTR(MP_QSTR_SSLError), MP_ROM_PTR(&mp_type_OSError) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_CERT_NONE), MP_ROM_INT(SSL_CERT_NONE) }, - { MP_ROM_QSTR(MP_QSTR_CERT_OPTIONAL), MP_ROM_INT(SSL_CERT_OPTIONAL) }, - { MP_ROM_QSTR(MP_QSTR_CERT_REQUIRED), MP_ROM_INT(SSL_CERT_REQUIRED) }, - - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_SSLv3), MP_ROM_INT(SL_SO_SEC_METHOD_SSLV3) }, - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLSv1), MP_ROM_INT(SL_SO_SEC_METHOD_TLSV1) }, - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLSv1_1), MP_ROM_INT(SL_SO_SEC_METHOD_TLSV1_1) }, - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLSv1_2), MP_ROM_INT(SL_SO_SEC_METHOD_TLSV1_2) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_ussl_globals, mp_module_ussl_globals_table); - -const mp_obj_module_t mp_module_ussl = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_ussl_globals, -}; - diff --git a/ports/cc3200/mods/modutime.c b/ports/cc3200/mods/modutime.c deleted file mode 100644 index 13750f96b5..0000000000 --- a/ports/cc3200/mods/modutime.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mpconfig.h" -#include "py/runtime.h" -#include "py/obj.h" -#include "py/smallint.h" -#include "py/mphal.h" -#include "lib/timeutils/timeutils.h" -#include "extmod/utime_mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "systick.h" -#include "pybrtc.h" -#include "mpexception.h" -#include "utils.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -/******************************************************************************/ -// MicroPython bindings - -/// \function localtime([secs]) -/// Convert a time expressed in seconds since Jan 1, 2000 into an 8-tuple which -/// contains: (year, month, mday, hour, minute, second, weekday, yearday) -/// If secs is not provided or None, then the current time from the RTC is used. -/// year includes the century (for example 2015) -/// month is 1-12 -/// mday is 1-31 -/// hour is 0-23 -/// minute is 0-59 -/// second is 0-59 -/// weekday is 0-6 for Mon-Sun. -/// yearday is 1-366 -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - if (n_args == 0 || args[0] == mp_const_none) { - timeutils_struct_time_t tm; - - // get the seconds from the RTC - timeutils_seconds_since_2000_to_struct_time(pyb_rtc_get_seconds(), &tm); - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(tm.tm_wday), - mp_obj_new_int(tm.tm_yday) - }; - return mp_obj_new_tuple(8, tuple); - } else { - mp_int_t seconds = mp_obj_get_int(args[0]); - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - size_t len; - mp_obj_t *elem; - - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - mp_raise_TypeError(mpexception_num_type_invalid_arguments); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), - mp_obj_get_int(elem[3]), mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -STATIC mp_obj_t time_time(void) { - return mp_obj_new_int(pyb_rtc_get_seconds()); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC mp_obj_t time_sleep(mp_obj_t seconds_o) { - int32_t sleep_s = mp_obj_get_int(seconds_o); - if (sleep_s > 0) { - mp_hal_delay_ms(sleep_s * 1000); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(time_sleep_obj, time_sleep); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&time_sleep_obj) }, - - // MicroPython additions - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t mp_module_utime = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/cc3200/mods/modwipy.c b/ports/cc3200/mods/modwipy.c deleted file mode 100644 index 0f16e73018..0000000000 --- a/ports/cc3200/mods/modwipy.c +++ /dev/null @@ -1,30 +0,0 @@ -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "mperror.h" - - -/******************************************************************************/ -// MicroPython bindings - -STATIC mp_obj_t mod_wipy_heartbeat(size_t n_args, const mp_obj_t *args) { - if (n_args) { - mperror_enable_heartbeat (mp_obj_is_true(args[0])); - return mp_const_none; - } else { - return mp_obj_new_bool(mperror_is_heartbeat_enabled()); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_wipy_heartbeat_obj, 0, 1, mod_wipy_heartbeat); - -STATIC const mp_rom_map_elem_t wipy_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_wipy) }, - { MP_ROM_QSTR(MP_QSTR_heartbeat), MP_ROM_PTR(&mod_wipy_heartbeat_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wipy_module_globals, wipy_module_globals_table); - -const mp_obj_module_t wipy_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&wipy_module_globals, -}; diff --git a/ports/cc3200/mods/modwlan.c b/ports/cc3200/mods/modwlan.c deleted file mode 100644 index c27e993bc0..0000000000 --- a/ports/cc3200/mods/modwlan.c +++ /dev/null @@ -1,1304 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "simplelink.h" -#include "py/ioctl.h" -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "lib/timeutils/timeutils.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "modwlan.h" -#include "pybrtc.h" -#include "debug.h" -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) -#include "serverstask.h" -#endif -#include "mpexception.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "antenna.h" - - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -// Status bits - These are used to set/reset the corresponding bits in a given variable -typedef enum{ - STATUS_BIT_NWP_INIT = 0, // If this bit is set: Network Processor is - // powered up - - STATUS_BIT_CONNECTION, // If this bit is set: the device is connected to - // the AP or client is connected to device (AP) - - STATUS_BIT_IP_LEASED, // If this bit is set: the device has leased IP to - // any connected client - - STATUS_BIT_IP_ACQUIRED, // If this bit is set: the device has acquired an IP - - STATUS_BIT_SMARTCONFIG_START, // If this bit is set: the SmartConfiguration - // process is started from SmartConfig app - - STATUS_BIT_P2P_DEV_FOUND, // If this bit is set: the device (P2P mode) - // found any p2p-device in scan - - STATUS_BIT_P2P_REQ_RECEIVED, // If this bit is set: the device (P2P mode) - // found any p2p-negotiation request - - STATUS_BIT_CONNECTION_FAILED, // If this bit is set: the device(P2P mode) - // connection to client(or reverse way) is failed - - STATUS_BIT_PING_DONE // If this bit is set: the device has completed - // the ping operation -} e_StatusBits; - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define CLR_STATUS_BIT_ALL(status) (status = 0) -#define SET_STATUS_BIT(status, bit) (status |= ( 1 << (bit))) -#define CLR_STATUS_BIT(status, bit) (status &= ~(1 << (bit))) -#define GET_STATUS_BIT(status, bit) (0 != (status & (1 << (bit)))) - -#define IS_NW_PROCSR_ON(status) GET_STATUS_BIT(status, STATUS_BIT_NWP_INIT) -#define IS_CONNECTED(status) GET_STATUS_BIT(status, STATUS_BIT_CONNECTION) -#define IS_IP_LEASED(status) GET_STATUS_BIT(status, STATUS_BIT_IP_LEASED) -#define IS_IP_ACQUIRED(status) GET_STATUS_BIT(status, STATUS_BIT_IP_ACQUIRED) -#define IS_SMART_CFG_START(status) GET_STATUS_BIT(status, STATUS_BIT_SMARTCONFIG_START) -#define IS_P2P_DEV_FOUND(status) GET_STATUS_BIT(status, STATUS_BIT_P2P_DEV_FOUND) -#define IS_P2P_REQ_RCVD(status) GET_STATUS_BIT(status, STATUS_BIT_P2P_REQ_RECEIVED) -#define IS_CONNECT_FAILED(status) GET_STATUS_BIT(status, STATUS_BIT_CONNECTION_FAILED) -#define IS_PING_DONE(status) GET_STATUS_BIT(status, STATUS_BIT_PING_DONE) - -#define MODWLAN_SL_SCAN_ENABLE 1 -#define MODWLAN_SL_SCAN_DISABLE 0 -#define MODWLAN_SL_MAX_NETWORKS 20 - -#define MODWLAN_MAX_NETWORKS 20 -#define MODWLAN_SCAN_PERIOD_S 3600 // 1 hour -#define MODWLAN_WAIT_FOR_SCAN_MS 1050 -#define MODWLAN_CONNECTION_WAIT_MS 2 - -#define ASSERT_ON_ERROR(x) ASSERT((x) >= 0) - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC wlan_obj_t wlan_obj = { - .mode = -1, - .status = 0, - .ip = 0, - .auth = MICROPY_PORT_WLAN_AP_SECURITY, - .channel = MICROPY_PORT_WLAN_AP_CHANNEL, - .ssid = MICROPY_PORT_WLAN_AP_SSID, - .key = MICROPY_PORT_WLAN_AP_KEY, - .mac = {0}, - //.ssid_o = {0}, - //.bssid = {0}, - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - .servers_enabled = false, - #endif -}; - -STATIC const mp_irq_methods_t wlan_irq_methods; - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -#ifdef SL_PLATFORM_MULTI_THREADED -OsiLockObj_t wlan_LockObj; -#endif - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void wlan_clear_data (void); -STATIC void wlan_reenable (SlWlanMode_t mode); -STATIC void wlan_servers_start (void); -STATIC void wlan_servers_stop (void); -STATIC void wlan_reset (void); -STATIC void wlan_validate_mode (uint mode); -STATIC void wlan_set_mode (uint mode); -STATIC void wlan_validate_ssid_len (uint32_t len); -STATIC void wlan_set_ssid (const char *ssid, uint8_t len, bool add_mac); -STATIC void wlan_validate_security (uint8_t auth, const char *key, uint8_t len); -STATIC void wlan_set_security (uint8_t auth, const char *key, uint8_t len); -STATIC void wlan_validate_channel (uint8_t channel); -STATIC void wlan_set_channel (uint8_t channel); -#if MICROPY_HW_ANTENNA_DIVERSITY -STATIC void wlan_validate_antenna (uint8_t antenna); -STATIC void wlan_set_antenna (uint8_t antenna); -#endif -STATIC void wlan_sl_disconnect (void); -STATIC modwlan_Status_t wlan_do_connect (const char* ssid, uint32_t ssid_len, const char* bssid, uint8_t sec, - const char* key, uint32_t key_len, int32_t timeout); -STATIC void wlan_get_sl_mac (void); -STATIC void wlan_wep_key_unhexlify (const char *key, char *key_out); -STATIC void wlan_lpds_irq_enable (mp_obj_t self_in); -STATIC void wlan_lpds_irq_disable (mp_obj_t self_in); -STATIC bool wlan_scan_result_is_unique (const mp_obj_list_t *nets, _u8 *bssid); - -//***************************************************************************** -// -//! \brief The Function Handles WLAN Events -//! -//! \param[in] pWlanEvent - Pointer to WLAN Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkWlanEventHandler(SlWlanEvent_t *pWlanEvent) { - if (!pWlanEvent) { - return; - } - - switch(pWlanEvent->Event) - { - case SL_WLAN_CONNECT_EVENT: - { - //slWlanConnectAsyncResponse_t *pEventData = &pWlanEvent->EventData.STAandP2PModeWlanConnected; - // copy the new connection data - //memcpy(wlan_obj.bssid, pEventData->bssid, SL_BSSID_LENGTH); - //memcpy(wlan_obj.ssid_o, pEventData->ssid_name, pEventData->ssid_len); - //wlan_obj.ssid_o[pEventData->ssid_len] = '\0'; - SET_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // we must reset the servers in case that the last connection - // was lost without any notification being received - servers_reset(); - #endif - } - break; - case SL_WLAN_DISCONNECT_EVENT: - CLR_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - CLR_STATUS_BIT(wlan_obj.status, STATUS_BIT_IP_ACQUIRED); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - servers_reset(); - servers_wlan_cycle_power(); - #endif - break; - case SL_WLAN_STA_CONNECTED_EVENT: - { - //slPeerInfoAsyncResponse_t *pEventData = &pWlanEvent->EventData.APModeStaConnected; - // get the mac address and name of the connected device - //memcpy(wlan_obj.bssid, pEventData->mac, SL_BSSID_LENGTH); - //memcpy(wlan_obj.ssid_o, pEventData->go_peer_device_name, pEventData->go_peer_device_name_len); - //wlan_obj.ssid_o[pEventData->go_peer_device_name_len] = '\0'; - SET_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // we must reset the servers in case that the last connection - // was lost without any notification being received - servers_reset(); - #endif - } - break; - case SL_WLAN_STA_DISCONNECTED_EVENT: - CLR_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - servers_reset(); - servers_wlan_cycle_power(); - #endif - break; - case SL_WLAN_P2P_DEV_FOUND_EVENT: - // TODO - break; - case SL_WLAN_P2P_NEG_REQ_RECEIVED_EVENT: - // TODO - break; - case SL_WLAN_CONNECTION_FAILED_EVENT: - // TODO - break; - default: - break; - } -} - -//***************************************************************************** -// -//! \brief This function handles network events such as IP acquisition, IP -//! leased, IP released etc. -//! -//! \param[in] pNetAppEvent - Pointer to NetApp Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkNetAppEventHandler(SlNetAppEvent_t *pNetAppEvent) { - if(!pNetAppEvent) { - return; - } - - switch(pNetAppEvent->Event) - { - case SL_NETAPP_IPV4_IPACQUIRED_EVENT: - { - SlIpV4AcquiredAsync_t *pEventData = NULL; - - SET_STATUS_BIT(wlan_obj.status, STATUS_BIT_IP_ACQUIRED); - - // Ip Acquired Event Data - pEventData = &pNetAppEvent->EventData.ipAcquiredV4; - - // Get the ip - wlan_obj.ip = pEventData->ip; - } - break; - case SL_NETAPP_IPV6_IPACQUIRED_EVENT: - break; - case SL_NETAPP_IP_LEASED_EVENT: - break; - case SL_NETAPP_IP_RELEASED_EVENT: - break; - default: - break; - } -} - -//***************************************************************************** -// -//! \brief This function handles HTTP server events -//! -//! \param[in] pServerEvent - Contains the relevant event information -//! \param[in] pServerResponse - Should be filled by the user with the -//! relevant response information -//! -//! \return None -//! -//**************************************************************************** -void SimpleLinkHttpServerCallback(SlHttpServerEvent_t *pHttpEvent, SlHttpServerResponse_t *pHttpResponse) { - if (!pHttpEvent) { - return; - } - - switch (pHttpEvent->Event) { - case SL_NETAPP_HTTPGETTOKENVALUE_EVENT: - break; - case SL_NETAPP_HTTPPOSTTOKENVALUE_EVENT: - break; - default: - break; - } -} - -//***************************************************************************** -// -//! \brief This function handles General Events -//! -//! \param[in] pDevEvent - Pointer to General Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkGeneralEventHandler(SlDeviceEvent_t *pDevEvent) { - if (!pDevEvent) { - return; - } -} - -//***************************************************************************** -// -//! This function handles socket events indication -//! -//! \param[in] pSock - Pointer to Socket Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkSockEventHandler(SlSockEvent_t *pSock) { - if (!pSock) { - return; - } - - switch( pSock->Event ) { - case SL_SOCKET_TX_FAILED_EVENT: - switch( pSock->socketAsyncEvent.SockTxFailData.status) { - case SL_ECLOSE: - break; - default: - break; - } - break; - case SL_SOCKET_ASYNC_EVENT: - switch(pSock->socketAsyncEvent.SockAsyncData.type) { - case SSL_ACCEPT: - break; - case RX_FRAGMENTATION_TOO_BIG: - break; - case OTHER_SIDE_CLOSE_SSL_DATA_NOT_ENCRYPTED: - break; - default: - break; - } - break; - default: - break; - } -} - -//***************************************************************************** -// SimpleLink Asynchronous Event Handlers -- End -//***************************************************************************** - -__attribute__ ((section (".boot"))) -void wlan_pre_init (void) { - // create the wlan lock - #ifdef SL_PLATFORM_MULTI_THREADED - ASSERT(OSI_OK == sl_LockObjCreate(&wlan_LockObj, "WlanLock")); - #endif -} - -void wlan_first_start (void) { - if (wlan_obj.mode < 0) { - CLR_STATUS_BIT_ALL(wlan_obj.status); - wlan_obj.mode = sl_Start(0, 0, 0); - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjUnlock (&wlan_LockObj); - #endif - } - - // get the mac address - wlan_get_sl_mac(); -} - -void wlan_sl_init (int8_t mode, const char *ssid, uint8_t ssid_len, uint8_t auth, const char *key, uint8_t key_len, - uint8_t channel, uint8_t antenna, bool add_mac) { - - // stop the servers - wlan_servers_stop(); - - // do a basic start - wlan_first_start(); - - // close any active connections - wlan_sl_disconnect(); - - // Remove all profiles - ASSERT_ON_ERROR(sl_WlanProfileDel(0xFF)); - - // Enable the DHCP client - uint8_t value = 1; - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_STA_P2P_CL_DHCP_ENABLE, 1, 1, &value)); - - // Set PM policy to normal - ASSERT_ON_ERROR(sl_WlanPolicySet(SL_POLICY_PM, SL_NORMAL_POLICY, NULL, 0)); - - // Unregister mDNS services - ASSERT_ON_ERROR(sl_NetAppMDNSUnRegisterService(0, 0)); - - // Stop the internal HTTP server - sl_NetAppStop(SL_NET_APP_HTTP_SERVER_ID); - - // Remove all 64 filters (8 * 8) - _WlanRxFilterOperationCommandBuff_t RxFilterIdMask; - memset ((void *)&RxFilterIdMask, 0 ,sizeof(RxFilterIdMask)); - memset(RxFilterIdMask.FilterIdMask, 0xFF, 8); - ASSERT_ON_ERROR(sl_WlanRxFilterSet(SL_REMOVE_RX_FILTER, (_u8 *)&RxFilterIdMask, sizeof(_WlanRxFilterOperationCommandBuff_t))); - -#if MICROPY_HW_ANTENNA_DIVERSITY - // set the antenna type - wlan_set_antenna (antenna); -#endif - - // switch to the requested mode - wlan_set_mode(mode); - - // stop and start again (we need to in the propper mode from now on) - wlan_reenable(mode); - - // Set Tx power level for station or AP mode - // Number between 0-15, as dB offset from max power - 0 will set max power - uint8_t ucPower = 0; - if (mode == ROLE_AP) { - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_GENERAL_PARAM_ID, WLAN_GENERAL_PARAM_OPT_AP_TX_POWER, sizeof(ucPower), - (unsigned char *)&ucPower)); - - // configure all parameters - wlan_set_ssid (ssid, ssid_len, add_mac); - wlan_set_security (auth, key, key_len); - wlan_set_channel (channel); - - // set the country - _u8* country = (_u8*)"EU"; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_GENERAL_PARAM_ID, WLAN_GENERAL_PARAM_OPT_COUNTRY_CODE, 2, country)); - - SlNetCfgIpV4Args_t ipV4; - ipV4.ipV4 = (_u32)SL_IPV4_VAL(192,168,1,1); // _u32 IP address - ipV4.ipV4Mask = (_u32)SL_IPV4_VAL(255,255,255,0); // _u32 Subnet mask for this AP - ipV4.ipV4Gateway = (_u32)SL_IPV4_VAL(192,168,1,1); // _u32 Default gateway address - ipV4.ipV4DnsServer = (_u32)SL_IPV4_VAL(192,168,1,1); // _u32 DNS server address - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_AP_P2P_GO_STATIC_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, - sizeof(SlNetCfgIpV4Args_t), (_u8 *)&ipV4)); - - SlNetAppDhcpServerBasicOpt_t dhcpParams; - dhcpParams.lease_time = 4096; // lease time (in seconds) of the IP Address - dhcpParams.ipv4_addr_start = SL_IPV4_VAL(192,168,1,2); // first IP Address for allocation. - dhcpParams.ipv4_addr_last = SL_IPV4_VAL(192,168,1,254); // last IP Address for allocation. - ASSERT_ON_ERROR(sl_NetAppStop(SL_NET_APP_DHCP_SERVER_ID)); // Stop DHCP server before settings - ASSERT_ON_ERROR(sl_NetAppSet(SL_NET_APP_DHCP_SERVER_ID, NETAPP_SET_DHCP_SRV_BASIC_OPT, - sizeof(SlNetAppDhcpServerBasicOpt_t), (_u8* )&dhcpParams)); // set parameters - ASSERT_ON_ERROR(sl_NetAppStart(SL_NET_APP_DHCP_SERVER_ID)); // Start DHCP server with new settings - - // stop and start again - wlan_reenable(mode); - } else { // STA and P2P modes - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_GENERAL_PARAM_ID, WLAN_GENERAL_PARAM_OPT_STA_TX_POWER, - sizeof(ucPower), (unsigned char *)&ucPower)); - // set connection policy to Auto + Fast (tries to connect to the last connected AP) - ASSERT_ON_ERROR(sl_WlanPolicySet(SL_POLICY_CONNECTION, SL_CONNECTION_POLICY(1, 1, 0, 0, 0), NULL, 0)); - } - - // set current time and date (needed to validate certificates) - wlan_set_current_time (pyb_rtc_get_seconds()); - - // start the servers before returning - wlan_servers_start(); -} - -void wlan_update(void) { -#ifndef SL_PLATFORM_MULTI_THREADED - _SlTaskEntry(); -#endif -} - -void wlan_stop (uint32_t timeout) { - wlan_servers_stop(); - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER); - #endif - sl_Stop(timeout); - wlan_clear_data(); - wlan_obj.mode = -1; -} - -void wlan_get_mac (uint8_t *macAddress) { - if (macAddress) { - memcpy (macAddress, wlan_obj.mac, SL_MAC_ADDR_LEN); - } -} - -void wlan_get_ip (uint32_t *ip) { - if (ip) { - *ip = IS_IP_ACQUIRED(wlan_obj.status) ? wlan_obj.ip : 0; - } -} - -bool wlan_is_connected (void) { - return (GET_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION) && - (GET_STATUS_BIT(wlan_obj.status, STATUS_BIT_IP_ACQUIRED) || wlan_obj.mode != ROLE_STA)); -} - -void wlan_set_current_time (uint32_t seconds_since_2000) { - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(seconds_since_2000, &tm); - - SlDateTime_t sl_datetime = {0}; - sl_datetime.sl_tm_day = tm.tm_mday; - sl_datetime.sl_tm_mon = tm.tm_mon; - sl_datetime.sl_tm_year = tm.tm_year; - sl_datetime.sl_tm_hour = tm.tm_hour; - sl_datetime.sl_tm_min = tm.tm_min; - sl_datetime.sl_tm_sec = tm.tm_sec; - sl_DevSet(SL_DEVICE_GENERAL_CONFIGURATION, SL_DEVICE_GENERAL_CONFIGURATION_DATE_TIME, sizeof(SlDateTime_t), (_u8 *)(&sl_datetime)); -} - -void wlan_off_on (void) { - // no need to lock the WLAN object on every API call since the servers and the MicroPtyhon - // task have the same priority - wlan_reenable(wlan_obj.mode); -} - -//***************************************************************************** -// DEFINE STATIC FUNCTIONS -//***************************************************************************** - -STATIC void wlan_clear_data (void) { - CLR_STATUS_BIT_ALL(wlan_obj.status); - wlan_obj.ip = 0; - //memset(wlan_obj.ssid_o, 0, sizeof(wlan_obj.ssid)); - //memset(wlan_obj.bssid, 0, sizeof(wlan_obj.bssid)); -} - -STATIC void wlan_reenable (SlWlanMode_t mode) { - // stop and start again - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER); - #endif - sl_Stop(SL_STOP_TIMEOUT); - wlan_clear_data(); - wlan_obj.mode = sl_Start(0, 0, 0); - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjUnlock (&wlan_LockObj); - #endif - ASSERT (wlan_obj.mode == mode); -} - -STATIC void wlan_servers_start (void) { -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // start the servers if they were enabled before - if (wlan_obj.servers_enabled) { - servers_start(); - } -#endif -} - -STATIC void wlan_servers_stop (void) { -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // Stop all other processes using the wlan engine - if ((wlan_obj.servers_enabled = servers_are_enabled())) { - servers_stop(); - } -#endif -} - -STATIC void wlan_reset (void) { - wlan_servers_stop(); - wlan_reenable (wlan_obj.mode); - wlan_servers_start(); -} - -STATIC void wlan_validate_mode (uint mode) { - if (mode != ROLE_STA && mode != ROLE_AP) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_mode (uint mode) { - wlan_obj.mode = mode; - ASSERT_ON_ERROR(sl_WlanSetMode(mode)); -} - -STATIC void wlan_validate_ssid_len (uint32_t len) { - if (len > MODWLAN_SSID_LEN_MAX) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_ssid (const char *ssid, uint8_t len, bool add_mac) { - if (ssid != NULL) { - // save the ssid - memcpy(&wlan_obj.ssid, ssid, len); - // append the last 2 bytes of the MAC address, since the use of this functionality is under our control - // we can assume that the lenght of the ssid is less than (32 - 5) - if (add_mac) { - snprintf((char *)&wlan_obj.ssid[len], sizeof(wlan_obj.ssid) - len, "-%02x%02x", wlan_obj.mac[4], wlan_obj.mac[5]); - len += 5; - } - wlan_obj.ssid[len] = '\0'; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_SSID, len, (unsigned char *)wlan_obj.ssid)); - } -} - -STATIC void wlan_validate_security (uint8_t auth, const char *key, uint8_t len) { - if (auth != SL_SEC_TYPE_WEP && auth != SL_SEC_TYPE_WPA_WPA2) { - goto invalid_args; - } - if (auth == SL_SEC_TYPE_WEP) { - for (mp_uint_t i = strlen(key); i > 0; i--) { - if (!unichar_isxdigit(*key++)) { - goto invalid_args; - } - } - } - return; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC void wlan_set_security (uint8_t auth, const char *key, uint8_t len) { - wlan_obj.auth = auth; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_SECURITY_TYPE, sizeof(uint8_t), &auth)); - if (key != NULL) { - memcpy(&wlan_obj.key, key, len); - wlan_obj.key[len] = '\0'; - if (auth == SL_SEC_TYPE_WEP) { - _u8 wep_key[32]; - wlan_wep_key_unhexlify(key, (char *)&wep_key); - key = (const char *)&wep_key; - len /= 2; - } - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_PASSWORD, len, (unsigned char *)key)); - } else { - wlan_obj.key[0] = '\0'; - } -} - -STATIC void wlan_validate_channel (uint8_t channel) { - if (channel < 1 || channel > 11) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_channel (uint8_t channel) { - wlan_obj.channel = channel; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_CHANNEL, 1, &channel)); -} - -#if MICROPY_HW_ANTENNA_DIVERSITY -STATIC void wlan_validate_antenna (uint8_t antenna) { - if (antenna != ANTENNA_TYPE_INTERNAL && antenna != ANTENNA_TYPE_EXTERNAL) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_antenna (uint8_t antenna) { - wlan_obj.antenna = antenna; - antenna_select(antenna); -} -#endif - -STATIC void wlan_sl_disconnect (void) { - // Device in station-mode. Disconnect previous connection if any - // The function returns 0 if 'Disconnected done', negative number if already - // disconnected Wait for 'disconnection' event if 0 is returned, Ignore - // other return-codes - if (0 == sl_WlanDisconnect()) { - while (IS_CONNECTED(wlan_obj.status)) { - mp_hal_delay_ms(MODWLAN_CONNECTION_WAIT_MS); - wlan_update(); - } - } -} - -STATIC modwlan_Status_t wlan_do_connect (const char* ssid, uint32_t ssid_len, const char* bssid, uint8_t sec, - const char* key, uint32_t key_len, int32_t timeout) { - SlSecParams_t secParams; - secParams.Key = (_i8*)key; - secParams.KeyLen = ((key != NULL) ? key_len : 0); - secParams.Type = sec; - - // first close any active connections - wlan_sl_disconnect(); - - if (!sl_WlanConnect((_i8*)ssid, ssid_len, (_u8*)bssid, &secParams, NULL)) { - // wait for the WLAN Event - uint32_t waitForConnectionMs = 0; - while (timeout && !IS_CONNECTED(wlan_obj.status)) { - mp_hal_delay_ms(MODWLAN_CONNECTION_WAIT_MS); - waitForConnectionMs += MODWLAN_CONNECTION_WAIT_MS; - if (timeout > 0 && waitForConnectionMs > timeout) { - return MODWLAN_ERROR_TIMEOUT; - } - wlan_update(); - } - return MODWLAN_OK; - } - return MODWLAN_ERROR_INVALID_PARAMS; -} - -STATIC void wlan_get_sl_mac (void) { - // Get the MAC address - uint8_t macAddrLen = SL_MAC_ADDR_LEN; - sl_NetCfgGet(SL_MAC_ADDRESS_GET, NULL, &macAddrLen, wlan_obj.mac); -} - -STATIC void wlan_wep_key_unhexlify (const char *key, char *key_out) { - byte hex_byte = 0; - for (mp_uint_t i = strlen(key); i > 0 ; i--) { - hex_byte += unichar_xdigit_value(*key++); - if (i & 1) { - hex_byte <<= 4; - } else { - *key_out++ = hex_byte; - hex_byte = 0; - } - } -} - -STATIC void wlan_lpds_irq_enable (mp_obj_t self_in) { - wlan_obj_t *self = self_in; - self->irq_enabled = true; -} - -STATIC void wlan_lpds_irq_disable (mp_obj_t self_in) { - wlan_obj_t *self = self_in; - self->irq_enabled = false; -} - -STATIC int wlan_irq_flags (mp_obj_t self_in) { - wlan_obj_t *self = self_in; - return self->irq_flags; -} - -STATIC bool wlan_scan_result_is_unique (const mp_obj_list_t *nets, _u8 *bssid) { - for (int i = 0; i < nets->len; i++) { - // index 1 in the list is the bssid - mp_obj_str_t *_bssid = (mp_obj_str_t *)((mp_obj_tuple_t *)nets->items[i])->items[1]; - if (!memcmp (_bssid->data, bssid, SL_BSSID_LENGTH)) { - return false; - } - } - return true; -} - -/******************************************************************************/ -// MicroPython bindings; WLAN class - -/// \class WLAN - WiFi driver - -STATIC mp_obj_t wlan_init_helper(wlan_obj_t *self, const mp_arg_val_t *args) { - // get the mode - int8_t mode = args[0].u_int; - wlan_validate_mode(mode); - - // get the ssid - size_t ssid_len = 0; - const char *ssid = NULL; - if (args[1].u_obj != NULL) { - ssid = mp_obj_str_get_data(args[1].u_obj, &ssid_len); - wlan_validate_ssid_len(ssid_len); - } - - // get the auth config - uint8_t auth = SL_SEC_TYPE_OPEN; - size_t key_len = 0; - const char *key = NULL; - if (args[2].u_obj != mp_const_none) { - mp_obj_t *sec; - mp_obj_get_array_fixed_n(args[2].u_obj, 2, &sec); - auth = mp_obj_get_int(sec[0]); - key = mp_obj_str_get_data(sec[1], &key_len); - wlan_validate_security(auth, key, key_len); - } - - // get the channel - uint8_t channel = args[3].u_int; - wlan_validate_channel(channel); - - // get the antenna type - uint8_t antenna = 0; -#if MICROPY_HW_ANTENNA_DIVERSITY - antenna = args[4].u_int; - wlan_validate_antenna(antenna); -#endif - - // initialize the wlan subsystem - wlan_sl_init(mode, (const char *)ssid, ssid_len, auth, (const char *)key, key_len, channel, antenna, false); - - return mp_const_none; -} - -STATIC const mp_arg_t wlan_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_mode, MP_ARG_INT, {.u_int = ROLE_STA} }, - { MP_QSTR_ssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_auth, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_channel, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - #if MICROPY_HW_ANTENNA_DIVERSITY - { MP_QSTR_antenna, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = ANTENNA_TYPE_INTERNAL} }, - #endif -}; -STATIC mp_obj_t wlan_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(wlan_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), wlan_init_args, args); - - // setup the object - wlan_obj_t *self = &wlan_obj; - self->base.type = (mp_obj_t)&mod_network_nic_type_wlan; - - // give it to the sleep module - pyb_sleep_set_wlan_obj(self); - - if (n_args > 1 || n_kw > 0) { - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - // start the peripheral - wlan_init_helper(self, &args[1]); - } - - return (mp_obj_t)self; -} - -STATIC mp_obj_t wlan_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(wlan_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &wlan_init_args[1], args); - return wlan_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_init_obj, 1, wlan_init); - -STATIC mp_obj_t wlan_scan(mp_obj_t self_in) { - STATIC const qstr wlan_scan_info_fields[] = { - MP_QSTR_ssid, MP_QSTR_bssid, MP_QSTR_sec, MP_QSTR_channel, MP_QSTR_rssi - }; - - // check for correct wlan mode - if (wlan_obj.mode == ROLE_AP) { - mp_raise_OSError(MP_EPERM); - } - - Sl_WlanNetworkEntry_t wlanEntry; - mp_obj_t nets = mp_obj_new_list(0, NULL); - uint8_t _index = 0; - - // trigger a new network scan - uint32_t scanSeconds = MODWLAN_SCAN_PERIOD_S; - ASSERT_ON_ERROR(sl_WlanPolicySet(SL_POLICY_SCAN , MODWLAN_SL_SCAN_ENABLE, (_u8 *)&scanSeconds, sizeof(scanSeconds))); - - // wait for the scan to complete - mp_hal_delay_ms(MODWLAN_WAIT_FOR_SCAN_MS); - - do { - if (sl_WlanGetNetworkList(_index++, 1, &wlanEntry) <= 0) { - break; - } - - // we must skip any duplicated results - if (!wlan_scan_result_is_unique(nets, wlanEntry.bssid)) { - continue; - } - - mp_obj_t tuple[5]; - tuple[0] = mp_obj_new_str((const char *)wlanEntry.ssid, wlanEntry.ssid_len); - tuple[1] = mp_obj_new_bytes((const byte *)wlanEntry.bssid, SL_BSSID_LENGTH); - // 'normalize' the security type - if (wlanEntry.sec_type > 2) { - wlanEntry.sec_type = 2; - } - tuple[2] = mp_obj_new_int(wlanEntry.sec_type); - tuple[3] = mp_const_none; - tuple[4] = mp_obj_new_int(wlanEntry.rssi); - - // add the network to the list - mp_obj_list_append(nets, mp_obj_new_attrtuple(wlan_scan_info_fields, 5, tuple)); - - } while (_index < MODWLAN_SL_MAX_NETWORKS); - - return nets; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_scan_obj, wlan_scan); - -STATIC mp_obj_t wlan_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t allowed_args[] = { - { MP_QSTR_ssid, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_auth, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // check for the correct wlan mode - if (wlan_obj.mode == ROLE_AP) { - mp_raise_OSError(MP_EPERM); - } - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the ssid - size_t ssid_len; - const char *ssid = mp_obj_str_get_data(args[0].u_obj, &ssid_len); - wlan_validate_ssid_len(ssid_len); - - // get the auth config - uint8_t auth = SL_SEC_TYPE_OPEN; - size_t key_len = 0; - const char *key = NULL; - if (args[1].u_obj != mp_const_none) { - mp_obj_t *sec; - mp_obj_get_array_fixed_n(args[1].u_obj, 2, &sec); - auth = mp_obj_get_int(sec[0]); - key = mp_obj_str_get_data(sec[1], &key_len); - wlan_validate_security(auth, key, key_len); - - // convert the wep key if needed - if (auth == SL_SEC_TYPE_WEP) { - _u8 wep_key[32]; - wlan_wep_key_unhexlify(key, (char *)&wep_key); - key = (const char *)&wep_key; - key_len /= 2; - } - } - - // get the bssid - const char *bssid = NULL; - if (args[2].u_obj != mp_const_none) { - bssid = mp_obj_str_get_str(args[2].u_obj); - } - - // get the timeout - int32_t timeout = -1; - if (args[3].u_obj != mp_const_none) { - timeout = mp_obj_get_int(args[3].u_obj); - } - - // connect to the requested access point - modwlan_Status_t status; - status = wlan_do_connect (ssid, ssid_len, bssid, auth, key, key_len, timeout); - if (status == MODWLAN_ERROR_TIMEOUT) { - mp_raise_OSError(MP_ETIMEDOUT); - } else if (status == MODWLAN_ERROR_INVALID_PARAMS) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_connect_obj, 1, wlan_connect); - -STATIC mp_obj_t wlan_disconnect(mp_obj_t self_in) { - wlan_sl_disconnect(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_disconnect_obj, wlan_disconnect); - -STATIC mp_obj_t wlan_isconnected(mp_obj_t self_in) { - return wlan_is_connected() ? mp_const_true : mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_isconnected_obj, wlan_isconnected); - -STATIC mp_obj_t wlan_ifconfig(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t wlan_ifconfig_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_config, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(wlan_ifconfig_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), wlan_ifconfig_args, args); - - // check the interface id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_EPERM); - } - - // get the configuration - if (args[1].u_obj == MP_OBJ_NULL) { - // get - unsigned char len = sizeof(SlNetCfgIpV4Args_t); - unsigned char dhcpIsOn; - SlNetCfgIpV4Args_t ipV4; - sl_NetCfgGet(SL_IPV4_STA_P2P_CL_GET_INFO, &dhcpIsOn, &len, (uint8_t *)&ipV4); - - mp_obj_t ifconfig[4] = { - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4, NETUTILS_LITTLE), - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4Mask, NETUTILS_LITTLE), - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4Gateway, NETUTILS_LITTLE), - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4DnsServer, NETUTILS_LITTLE) - }; - return mp_obj_new_tuple(4, ifconfig); - } else { // set the configuration - if (MP_OBJ_IS_TYPE(args[1].u_obj, &mp_type_tuple)) { - // set a static ip - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1].u_obj, 4, &items); - - SlNetCfgIpV4Args_t ipV4; - netutils_parse_ipv4_addr(items[0], (uint8_t *)&ipV4.ipV4, NETUTILS_LITTLE); - netutils_parse_ipv4_addr(items[1], (uint8_t *)&ipV4.ipV4Mask, NETUTILS_LITTLE); - netutils_parse_ipv4_addr(items[2], (uint8_t *)&ipV4.ipV4Gateway, NETUTILS_LITTLE); - netutils_parse_ipv4_addr(items[3], (uint8_t *)&ipV4.ipV4DnsServer, NETUTILS_LITTLE); - - if (wlan_obj.mode == ROLE_AP) { - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_AP_P2P_GO_STATIC_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, sizeof(SlNetCfgIpV4Args_t), (_u8 *)&ipV4)); - SlNetAppDhcpServerBasicOpt_t dhcpParams; - dhcpParams.lease_time = 4096; // lease time (in seconds) of the IP Address - dhcpParams.ipv4_addr_start = ipV4.ipV4 + 1; // first IP Address for allocation. - dhcpParams.ipv4_addr_last = (ipV4.ipV4 & 0xFFFFFF00) + 254; // last IP Address for allocation. - ASSERT_ON_ERROR(sl_NetAppStop(SL_NET_APP_DHCP_SERVER_ID)); // stop DHCP server before settings - ASSERT_ON_ERROR(sl_NetAppSet(SL_NET_APP_DHCP_SERVER_ID, NETAPP_SET_DHCP_SRV_BASIC_OPT, - sizeof(SlNetAppDhcpServerBasicOpt_t), (_u8* )&dhcpParams)); // set parameters - ASSERT_ON_ERROR(sl_NetAppStart(SL_NET_APP_DHCP_SERVER_ID)); // start DHCP server with new settings - } else { - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_STA_P2P_CL_STATIC_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, sizeof(SlNetCfgIpV4Args_t), (_u8 *)&ipV4)); - } - } else { - // check for the correct string - const char *mode = mp_obj_str_get_str(args[1].u_obj); - if (strcmp("dhcp", mode)) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - - // only if we are not in AP mode - if (wlan_obj.mode != ROLE_AP) { - _u8 val = 1; - sl_NetCfgSet(SL_IPV4_STA_P2P_CL_DHCP_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, 1, &val); - } - } - // config values have changed, so reset - wlan_reset(); - // set current time and date (needed to validate certificates) - wlan_set_current_time (pyb_rtc_get_seconds()); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_ifconfig_obj, 1, wlan_ifconfig); - -STATIC mp_obj_t wlan_mode(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->mode); - } else { - uint mode = mp_obj_get_int(args[1]); - wlan_validate_mode(mode); - wlan_set_mode(mode); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_mode_obj, 1, 2, wlan_mode); - -STATIC mp_obj_t wlan_ssid(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_str((const char *)self->ssid, strlen((const char *)self->ssid)); - } else { - size_t len; - const char *ssid = mp_obj_str_get_data(args[1], &len); - wlan_validate_ssid_len(len); - wlan_set_ssid(ssid, len, false); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_ssid_obj, 1, 2, wlan_ssid); - -STATIC mp_obj_t wlan_auth(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - if (self->auth == SL_SEC_TYPE_OPEN) { - return mp_const_none; - } else { - mp_obj_t security[2]; - security[0] = mp_obj_new_int(self->auth); - security[1] = mp_obj_new_str((const char *)self->key, strlen((const char *)self->key)); - return mp_obj_new_tuple(2, security); - } - } else { - // get the auth config - uint8_t auth = SL_SEC_TYPE_OPEN; - size_t key_len = 0; - const char *key = NULL; - if (args[1] != mp_const_none) { - mp_obj_t *sec; - mp_obj_get_array_fixed_n(args[1], 2, &sec); - auth = mp_obj_get_int(sec[0]); - key = mp_obj_str_get_data(sec[1], &key_len); - wlan_validate_security(auth, key, key_len); - } - wlan_set_security(auth, key, key_len); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_auth_obj, 1, 2, wlan_auth); - -STATIC mp_obj_t wlan_channel(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->channel); - } else { - uint8_t channel = mp_obj_get_int(args[1]); - wlan_validate_channel(channel); - wlan_set_channel(channel); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_channel_obj, 1, 2, wlan_channel); - -STATIC mp_obj_t wlan_antenna(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->antenna); - } else { - #if MICROPY_HW_ANTENNA_DIVERSITY - uint8_t antenna = mp_obj_get_int(args[1]); - wlan_validate_antenna(antenna); - wlan_set_antenna(antenna); - #endif - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_antenna_obj, 1, 2, wlan_antenna); - -STATIC mp_obj_t wlan_mac(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_bytes((const byte *)self->mac, SL_BSSID_LENGTH); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); - if (bufinfo.len != 6) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - memcpy(self->mac, bufinfo.buf, SL_MAC_ADDR_LEN); - sl_NetCfgSet(SL_MAC_ADDRESS_SET, 1, SL_MAC_ADDR_LEN, (_u8 *)self->mac); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_mac_obj, 1, 2, wlan_mac); - -STATIC mp_obj_t wlan_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - - wlan_obj_t *self = pos_args[0]; - - // check the trigger, only one type is supported - if (mp_obj_get_int(args[0].u_obj) != MODWLAN_WIFI_EVENT_ANY) { - goto invalid_args; - } - - // check the power mode - if (mp_obj_get_int(args[3].u_obj) != PYB_PWR_MODE_LPDS) { - goto invalid_args; - } - - // create the callback - mp_obj_t _irq = mp_irq_new (self, args[2].u_obj, &wlan_irq_methods); - self->irq_obj = _irq; - - // enable the irq just before leaving - wlan_lpds_irq_enable(self); - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_irq_obj, 1, wlan_irq); - -//STATIC mp_obj_t wlan_connections (mp_obj_t self_in) { -// mp_obj_t device[2]; -// mp_obj_t connections = mp_obj_new_list(0, NULL); -// -// if (wlan_is_connected()) { -// device[0] = mp_obj_new_str((const char *)wlan_obj.ssid_o, strlen((const char *)wlan_obj.ssid_o)); -// device[1] = mp_obj_new_bytes((const byte *)wlan_obj.bssid, SL_BSSID_LENGTH); -// // add the device to the list -// mp_obj_list_append(connections, mp_obj_new_tuple(MP_ARRAY_SIZE(device), device)); -// } -// return connections; -//} -//STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_connections_obj, wlan_connections); - -//STATIC mp_obj_t wlan_urn (uint n_args, const mp_obj_t *args) { -// char urn[MAX_DEVICE_URN_LEN]; -// uint8_t len = MAX_DEVICE_URN_LEN; -// -// // an URN is given, so set it -// if (n_args == 2) { -// const char *p = mp_obj_str_get_str(args[1]); -// uint8_t len = strlen(p); -// -// // the call to sl_NetAppSet corrupts the input string URN=args[1], so we copy into a local buffer -// if (len > MAX_DEVICE_URN_LEN) { -// mp_raise_ValueError(mpexception_value_invalid_arguments); -// } -// strcpy(urn, p); -// -// if (sl_NetAppSet(SL_NET_APP_DEVICE_CONFIG_ID, NETAPP_SET_GET_DEV_CONF_OPT_DEVICE_URN, len, (unsigned char *)urn) < 0) { -// mp_raise_OSError(MP_EIO); -// } -// } -// else { -// // get the URN -// if (sl_NetAppGet(SL_NET_APP_DEVICE_CONFIG_ID, NETAPP_SET_GET_DEV_CONF_OPT_DEVICE_URN, &len, (uint8_t *)urn) < 0) { -// mp_raise_OSError(MP_EIO); -// } -// return mp_obj_new_str(urn, (len - 1)); -// } -// -// return mp_const_none; -//} -//STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_urn_obj, 1, 2, wlan_urn); - -STATIC mp_obj_t wlan_print_ver(void) { - SlVersionFull ver; - byte config_opt = SL_DEVICE_GENERAL_VERSION; - byte config_len = sizeof(ver); - sl_DevGet(SL_DEVICE_GENERAL_CONFIGURATION, &config_opt, &config_len, (byte*)&ver); - printf("NWP: %d.%d.%d.%d\n", (int)ver.NwpVersion[0], (int)ver.NwpVersion[1], (int)ver.NwpVersion[2], (int)ver.NwpVersion[3]); - printf("MAC: %d.%d.%d.%d\n", (int)ver.ChipFwAndPhyVersion.FwVersion[0], (int)ver.ChipFwAndPhyVersion.FwVersion[1], - (int)ver.ChipFwAndPhyVersion.FwVersion[2], (int)ver.ChipFwAndPhyVersion.FwVersion[3]); - printf("PHY: %d.%d.%d.%d\n", ver.ChipFwAndPhyVersion.PhyVersion[0], ver.ChipFwAndPhyVersion.PhyVersion[1], - ver.ChipFwAndPhyVersion.PhyVersion[2], ver.ChipFwAndPhyVersion.PhyVersion[3]); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(wlan_print_ver_fun_obj, wlan_print_ver); -STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(wlan_print_ver_obj, MP_ROM_PTR(&wlan_print_ver_fun_obj)); - -STATIC const mp_rom_map_elem_t wlan_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&wlan_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&wlan_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&wlan_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&wlan_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&wlan_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&wlan_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&wlan_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_ssid), MP_ROM_PTR(&wlan_ssid_obj) }, - { MP_ROM_QSTR(MP_QSTR_auth), MP_ROM_PTR(&wlan_auth_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&wlan_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_antenna), MP_ROM_PTR(&wlan_antenna_obj) }, - { MP_ROM_QSTR(MP_QSTR_mac), MP_ROM_PTR(&wlan_mac_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&wlan_irq_obj) }, - //{ MP_ROM_QSTR(MP_QSTR_connections), MP_ROM_PTR(&wlan_connections_obj) }, - //{ MP_ROM_QSTR(MP_QSTR_urn), MP_ROM_PTR(&wlan_urn_obj) }, - { MP_ROM_QSTR(MP_QSTR_print_ver), MP_ROM_PTR(&wlan_print_ver_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_STA), MP_ROM_INT(ROLE_STA) }, - { MP_ROM_QSTR(MP_QSTR_AP), MP_ROM_INT(ROLE_AP) }, - { MP_ROM_QSTR(MP_QSTR_WEP), MP_ROM_INT(SL_SEC_TYPE_WEP) }, - { MP_ROM_QSTR(MP_QSTR_WPA), MP_ROM_INT(SL_SEC_TYPE_WPA_WPA2) }, - { MP_ROM_QSTR(MP_QSTR_WPA2), MP_ROM_INT(SL_SEC_TYPE_WPA_WPA2) }, - #if MICROPY_HW_ANTENNA_DIVERSITY - { MP_ROM_QSTR(MP_QSTR_INT_ANT), MP_ROM_INT(ANTENNA_TYPE_INTERNAL) }, - { MP_ROM_QSTR(MP_QSTR_EXT_ANT), MP_ROM_INT(ANTENNA_TYPE_EXTERNAL) }, - #endif - { MP_ROM_QSTR(MP_QSTR_ANY_EVENT), MP_ROM_INT(MODWLAN_WIFI_EVENT_ANY) }, -}; -STATIC MP_DEFINE_CONST_DICT(wlan_locals_dict, wlan_locals_dict_table); - -const mod_network_nic_type_t mod_network_nic_type_wlan = { - .base = { - { &mp_type_type }, - .name = MP_QSTR_WLAN, - .make_new = wlan_make_new, - .locals_dict = (mp_obj_t)&wlan_locals_dict, - }, -}; - -STATIC const mp_irq_methods_t wlan_irq_methods = { - .init = wlan_irq, - .enable = wlan_lpds_irq_enable, - .disable = wlan_lpds_irq_disable, - .flags = wlan_irq_flags, -}; diff --git a/ports/cc3200/mods/modwlan.h b/ports/cc3200/mods/modwlan.h deleted file mode 100644 index b806644f55..0000000000 --- a/ports/cc3200/mods/modwlan.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODWLAN_H -#define MICROPY_INCLUDED_CC3200_MODS_MODWLAN_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define SIMPLELINK_SPAWN_TASK_PRIORITY 3 -#define SIMPLELINK_TASK_STACK_SIZE 2048 -#define SL_STOP_TIMEOUT 35 -#define SL_STOP_TIMEOUT_LONG 575 - -#define MODWLAN_WIFI_EVENT_ANY 0x01 - -#define MODWLAN_SSID_LEN_MAX 32 - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef enum { - MODWLAN_OK = 0, - MODWLAN_ERROR_INVALID_PARAMS = -1, - MODWLAN_ERROR_TIMEOUT = -2, - MODWLAN_ERROR_UNKNOWN = -3, -} modwlan_Status_t; - -typedef struct _wlan_obj_t { - mp_obj_base_t base; - mp_obj_t irq_obj; - uint32_t status; - - uint32_t ip; - - int8_t mode; - uint8_t auth; - uint8_t channel; - uint8_t antenna; - - // my own ssid, key and mac - uint8_t ssid[(MODWLAN_SSID_LEN_MAX + 1)]; - uint8_t key[65]; - uint8_t mac[SL_MAC_ADDR_LEN]; - - // the sssid (or name) and mac of the other device - uint8_t ssid_o[33]; - uint8_t bssid[6]; - uint8_t irq_flags; - bool irq_enabled; - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - bool servers_enabled; -#endif -} wlan_obj_t; - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -extern _SlLockObj_t wlan_LockObj; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void wlan_pre_init (void); -extern void wlan_sl_init (int8_t mode, const char *ssid, uint8_t ssid_len, uint8_t auth, const char *key, uint8_t key_len, - uint8_t channel, uint8_t antenna, bool add_mac); -extern void wlan_first_start (void); -extern void wlan_update(void); -extern void wlan_stop (uint32_t timeout); -extern void wlan_get_mac (uint8_t *macAddress); -extern void wlan_get_ip (uint32_t *ip); -extern bool wlan_is_connected (void); -extern void wlan_set_current_time (uint32_t seconds_since_2000); -extern void wlan_off_on (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODWLAN_H diff --git a/ports/cc3200/mods/pybadc.c b/ports/cc3200/mods/pybadc.c deleted file mode 100644 index c73b8c149a..0000000000 --- a/ports/cc3200/mods/pybadc.c +++ /dev/null @@ -1,310 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/binary.h" -#include "py/gc.h" -#include "py/mperrno.h" -#include "bufhelper.h" -#include "inc/hw_types.h" -#include "inc/hw_adc.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "interrupt.h" -#include "pin.h" -#include "gpio.h" -#include "prcm.h" -#include "adc.h" -#include "pybadc.h" -#include "pybpin.h" -#include "pybsleep.h" -#include "pins.h" -#include "mpexception.h" - - -/****************************************************************************** - DECLARE CONSTANTS - ******************************************************************************/ -#define PYB_ADC_NUM_CHANNELS 4 - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; - bool enabled; -} pyb_adc_obj_t; - -typedef struct { - mp_obj_base_t base; - pin_obj_t *pin; - byte channel; - byte id; - bool enabled; -} pyb_adc_channel_obj_t; - - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_adc_channel_obj_t pyb_adc_channel_obj[PYB_ADC_NUM_CHANNELS] = { {.pin = &pin_GP2, .channel = ADC_CH_0, .id = 0, .enabled = false}, - {.pin = &pin_GP3, .channel = ADC_CH_1, .id = 1, .enabled = false}, - {.pin = &pin_GP4, .channel = ADC_CH_2, .id = 2, .enabled = false}, - {.pin = &pin_GP5, .channel = ADC_CH_3, .id = 3, .enabled = false} }; -STATIC pyb_adc_obj_t pyb_adc_obj = {.enabled = false}; - -STATIC const mp_obj_type_t pyb_adc_channel_type; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC mp_obj_t adc_channel_deinit(mp_obj_t self_in); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -STATIC void pyb_adc_init (pyb_adc_obj_t *self) { - // enable and configure the timer - MAP_ADCTimerConfig(ADC_BASE, (1 << 17) - 1); - MAP_ADCTimerEnable(ADC_BASE); - // enable the ADC peripheral - MAP_ADCEnable(ADC_BASE); - self->enabled = true; -} - -STATIC void pyb_adc_check_init(void) { - // not initialized - if (!pyb_adc_obj.enabled) { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC void pyb_adc_channel_init (pyb_adc_channel_obj_t *self) { - // the ADC block must be enabled first - pyb_adc_check_init(); - // configure the pin in analog mode - pin_config (self->pin, -1, PIN_TYPE_ANALOG, PIN_TYPE_STD, -1, PIN_STRENGTH_2MA); - // enable the ADC channel - MAP_ADCChannelEnable(ADC_BASE, self->channel); - self->enabled = true; -} - -STATIC void pyb_adc_deinit_all_channels (void) { - for (int i = 0; i < PYB_ADC_NUM_CHANNELS; i++) { - adc_channel_deinit(&pyb_adc_channel_obj[i]); - } -} - -/******************************************************************************/ -/* MicroPython bindings : adc object */ - -STATIC void adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_adc_obj_t *self = self_in; - if (self->enabled) { - mp_printf(print, "ADC(0, bits=12)"); - } else { - mp_printf(print, "ADC(0)"); - } -} - -STATIC const mp_arg_t pyb_adc_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 12} }, -}; -STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_adc_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_adc_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // check the number of bits - if (args[1].u_int != 12) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - - // setup the object - pyb_adc_obj_t *self = &pyb_adc_obj; - self->base.type = &pyb_adc_type; - - // initialize and register with the sleep module - pyb_adc_init(self); - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pyb_adc_init); - return self; -} - -STATIC mp_obj_t adc_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_adc_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_adc_init_args[1], args); - // check the number of bits - if (args[0].u_int != 12) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - pyb_adc_init(pos_args[0]); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(adc_init_obj, 1, adc_init); - -STATIC mp_obj_t adc_deinit(mp_obj_t self_in) { - pyb_adc_obj_t *self = self_in; - // first deinit all channels - pyb_adc_deinit_all_channels(); - MAP_ADCDisable(ADC_BASE); - self->enabled = false; - // unregister it with the sleep module - pyb_sleep_remove ((const mp_obj_t)self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_deinit_obj, adc_deinit); - -STATIC mp_obj_t adc_channel(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_adc_channel_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_adc_channel_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_adc_channel_args, args); - - uint ch_id; - if (args[0].u_obj != MP_OBJ_NULL) { - ch_id = mp_obj_get_int(args[0].u_obj); - if (ch_id >= PYB_ADC_NUM_CHANNELS) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } else if (args[1].u_obj != mp_const_none) { - uint pin_ch_id = pin_find_peripheral_type (args[1].u_obj, PIN_FN_ADC, 0); - if (ch_id != pin_ch_id) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - } - } else { - ch_id = pin_find_peripheral_type (args[1].u_obj, PIN_FN_ADC, 0); - } - - // setup the object - pyb_adc_channel_obj_t *self = &pyb_adc_channel_obj[ch_id]; - self->base.type = &pyb_adc_channel_type; - pyb_adc_channel_init (self); - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pyb_adc_channel_init); - return self; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(adc_channel_obj, 1, adc_channel); - -STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&adc_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&adc_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&adc_channel_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(adc_locals_dict, adc_locals_dict_table); - -const mp_obj_type_t pyb_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .print = adc_print, - .make_new = adc_make_new, - .locals_dict = (mp_obj_t)&adc_locals_dict, -}; - -STATIC void adc_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_adc_channel_obj_t *self = self_in; - if (self->enabled) { - mp_printf(print, "ADCChannel(%u, pin=%q)", self->id, self->pin->name); - } else { - mp_printf(print, "ADCChannel(%u)", self->id); - } -} - -STATIC mp_obj_t adc_channel_init(mp_obj_t self_in) { - pyb_adc_channel_obj_t *self = self_in; - // re-enable it - pyb_adc_channel_init(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_channel_init_obj, adc_channel_init); - -STATIC mp_obj_t adc_channel_deinit(mp_obj_t self_in) { - pyb_adc_channel_obj_t *self = self_in; - - MAP_ADCChannelDisable(ADC_BASE, self->channel); - // unregister it with the sleep module - pyb_sleep_remove ((const mp_obj_t)self); - self->enabled = false; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_channel_deinit_obj, adc_channel_deinit); - -STATIC mp_obj_t adc_channel_value(mp_obj_t self_in) { - pyb_adc_channel_obj_t *self = self_in; - uint32_t value; - - // the channel must be enabled - if (!self->enabled) { - mp_raise_OSError(MP_EPERM); - } - - // wait until a new value is available - while (!MAP_ADCFIFOLvlGet(ADC_BASE, self->channel)); - // read the sample - value = MAP_ADCFIFORead(ADC_BASE, self->channel); - // the 12 bit sampled value is stored in bits [13:2] - return MP_OBJ_NEW_SMALL_INT((value & 0x3FFF) >> 2); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_channel_value_obj, adc_channel_value); - -STATIC mp_obj_t adc_channel_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 0, false); - return adc_channel_value (self_in); -} - -STATIC const mp_rom_map_elem_t adc_channel_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&adc_channel_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&adc_channel_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&adc_channel_value_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(adc_channel_locals_dict, adc_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_adc_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_ADCChannel, - .print = adc_channel_print, - .call = adc_channel_call, - .locals_dict = (mp_obj_t)&adc_channel_locals_dict, -}; diff --git a/ports/cc3200/mods/pybadc.h b/ports/cc3200/mods/pybadc.h deleted file mode 100644 index db04b006bc..0000000000 --- a/ports/cc3200/mods/pybadc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBADC_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBADC_H - -extern const mp_obj_type_t pyb_adc_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBADC_H diff --git a/ports/cc3200/mods/pybflash.c b/ports/cc3200/mods/pybflash.c deleted file mode 100644 index 51f4cb5172..0000000000 --- a/ports/cc3200/mods/pybflash.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//#include -//#include - -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/vfs_fat.h" - -#include "fatfs/src/drivers/sflash_diskio.h" -#include "mods/pybflash.h" - -/******************************************************************************/ -// MicroPython bindings to expose the internal flash as an object with the -// block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t pyb_flash_obj = {&pyb_flash_type}; - -STATIC mp_obj_t pyb_flash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&pyb_flash_obj; -} - -STATIC mp_obj_t pyb_flash_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - DRESULT res = sflash_disk_read(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SFLASH_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_readblocks_obj, pyb_flash_readblocks); - -STATIC mp_obj_t pyb_flash_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - DRESULT res = sflash_disk_write(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SFLASH_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_writeblocks_obj, pyb_flash_writeblocks); - -STATIC mp_obj_t pyb_flash_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: return MP_OBJ_NEW_SMALL_INT(sflash_disk_init() != RES_OK); - case BP_IOCTL_DEINIT: sflash_disk_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SYNC: sflash_disk_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(SFLASH_SECTOR_COUNT); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(SFLASH_SECTOR_SIZE); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_ioctl_obj, pyb_flash_ioctl); - -STATIC const mp_rom_map_elem_t pyb_flash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_flash_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_flash_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_flash_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_flash_locals_dict, pyb_flash_locals_dict_table); - -const mp_obj_type_t pyb_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_Flash, - .make_new = pyb_flash_make_new, - .locals_dict = (mp_obj_t)&pyb_flash_locals_dict, -}; - -void pyb_flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->readblocks[0] = (mp_obj_t)&pyb_flash_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->readblocks[2] = (mp_obj_t)sflash_disk_read; // native version - vfs->writeblocks[0] = (mp_obj_t)&pyb_flash_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)sflash_disk_write; // native version - vfs->u.ioctl[0] = (mp_obj_t)&pyb_flash_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&pyb_flash_obj; -} diff --git a/ports/cc3200/mods/pybi2c.c b/ports/cc3200/mods/pybi2c.c deleted file mode 100644 index d08627fa49..0000000000 --- a/ports/cc3200/mods/pybi2c.c +++ /dev/null @@ -1,531 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "bufhelper.h" -#include "inc/hw_types.h" -#include "inc/hw_i2c.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "i2c.h" -#include "pybi2c.h" -#include "mpexception.h" -#include "pybsleep.h" -#include "utils.h" -#include "pybpin.h" -#include "pins.h" - -/// \moduleref pyb -/// \class I2C - a two-wire serial protocol - -typedef struct _pyb_i2c_obj_t { - mp_obj_base_t base; - uint baudrate; -} pyb_i2c_obj_t; - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define PYBI2C_MIN_BAUD_RATE_HZ (50000) -#define PYBI2C_MAX_BAUD_RATE_HZ (400000) - -#define PYBI2C_TRANSC_TIMEOUT_MS (20) -#define PYBI2C_TRANSAC_WAIT_DELAY_US (10) - -#define PYBI2C_TIMEOUT_TO_COUNT(to_us, baud) (((baud) * to_us) / 16000000) - -#define RET_IF_ERR(Func) { \ - if (!Func) { \ - return false; \ - } \ - } - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_i2c_obj_t pyb_i2c_obj = {.baudrate = 0}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC bool pyb_i2c_write(byte addr, byte *data, uint len, bool stop); - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -// only master mode is available for the moment -STATIC void i2c_init (pyb_i2c_obj_t *self) { - // Enable the I2C Peripheral - MAP_PRCMPeripheralClkEnable(PRCM_I2CA0, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(PRCM_I2CA0); - // Configure I2C module with the specified baudrate - MAP_I2CMasterInitExpClk(I2CA0_BASE, self->baudrate); -} - -STATIC bool pyb_i2c_transaction(uint cmd) { - // Convert the timeout to microseconds - int32_t timeout = PYBI2C_TRANSC_TIMEOUT_MS * 1000; - // Sanity check, t_timeout must be between 1 and 255 - uint t_timeout = MIN(PYBI2C_TIMEOUT_TO_COUNT(timeout, pyb_i2c_obj.baudrate), 255); - // Clear all interrupts - MAP_I2CMasterIntClearEx(I2CA0_BASE, MAP_I2CMasterIntStatusEx(I2CA0_BASE, false)); - // Set the time-out in terms of clock cycles. Not to be used with breakpoints. - MAP_I2CMasterTimeoutSet(I2CA0_BASE, t_timeout); - // Initiate the transfer. - MAP_I2CMasterControl(I2CA0_BASE, cmd); - // Wait until the current byte has been transferred. - // Poll on the raw interrupt status. - while ((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & (I2C_MASTER_INT_DATA | I2C_MASTER_INT_TIMEOUT)) == 0) { - if (timeout < 0) { - // the peripheral is not responding, so stop - return false; - } - // wait for a few microseconds - UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBI2C_TRANSAC_WAIT_DELAY_US)); - timeout -= PYBI2C_TRANSAC_WAIT_DELAY_US; - } - - // Check for any errors in the transfer - if (MAP_I2CMasterErr(I2CA0_BASE) != I2C_MASTER_ERR_NONE) { - switch(cmd) { - case I2C_MASTER_CMD_BURST_SEND_START: - case I2C_MASTER_CMD_BURST_SEND_CONT: - case I2C_MASTER_CMD_BURST_SEND_STOP: - MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_SEND_ERROR_STOP); - break; - case I2C_MASTER_CMD_BURST_RECEIVE_START: - case I2C_MASTER_CMD_BURST_RECEIVE_CONT: - case I2C_MASTER_CMD_BURST_RECEIVE_FINISH: - MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP); - break; - default: - break; - } - return false; - } - return true; -} - -STATIC void pyb_i2c_check_init(pyb_i2c_obj_t *self) { - // not initialized - if (!self->baudrate) { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC bool pyb_i2c_scan_device(byte devAddr) { - bool ret = false; - // Set the I2C slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, devAddr, true); - // Initiate the transfer. - if (pyb_i2c_transaction(I2C_MASTER_CMD_SINGLE_RECEIVE)) { - ret = true; - } - // Send the stop bit to cancel the read transaction - MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_SEND_ERROR_STOP); - if (!ret) { - uint8_t data = 0; - if (pyb_i2c_write(devAddr, &data, sizeof(data), true)) { - ret = true; - } - } - return ret; -} - -STATIC bool pyb_i2c_mem_addr_write (byte addr, byte *mem_addr, uint mem_addr_len) { - // Set I2C codec slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, addr, false); - // Write the first byte to the controller. - MAP_I2CMasterDataPut(I2CA0_BASE, *mem_addr++); - // Initiate the transfer. - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_START)); - - // Loop until the completion of transfer or error - while (--mem_addr_len) { - // Write the next byte of data - MAP_I2CMasterDataPut(I2CA0_BASE, *mem_addr++); - // Transact over I2C to send the next byte - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_CONT)); - } - return true; -} - -STATIC bool pyb_i2c_mem_write (byte addr, byte *mem_addr, uint mem_addr_len, byte *data, uint data_len) { - if (pyb_i2c_mem_addr_write (addr, mem_addr, mem_addr_len)) { - // Loop until the completion of transfer or error - while (data_len--) { - // Write the next byte of data - MAP_I2CMasterDataPut(I2CA0_BASE, *data++); - // Transact over I2C to send the byte - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_CONT)); - } - // send the stop bit - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_STOP)); - return true; - } - return false; -} - -STATIC bool pyb_i2c_write(byte addr, byte *data, uint len, bool stop) { - // Set I2C codec slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, addr, false); - // Write the first byte to the controller. - MAP_I2CMasterDataPut(I2CA0_BASE, *data++); - // Initiate the transfer. - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_START)); - - // Loop until the completion of transfer or error - while (--len) { - // Write the next byte of data - MAP_I2CMasterDataPut(I2CA0_BASE, *data++); - // Transact over I2C to send the byte - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_CONT)); - } - - // If a stop bit is to be sent, do it. - if (stop) { - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_STOP)); - } - return true; -} - -STATIC bool pyb_i2c_read(byte addr, byte *data, uint len) { - // Initiate a burst or single receive sequence - uint cmd = --len > 0 ? I2C_MASTER_CMD_BURST_RECEIVE_START : I2C_MASTER_CMD_SINGLE_RECEIVE; - // Set I2C codec slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, addr, true); - // Initiate the transfer. - RET_IF_ERR(pyb_i2c_transaction(cmd)); - // Loop until the completion of reception or error - while (len) { - // Receive the byte over I2C - *data++ = MAP_I2CMasterDataGet(I2CA0_BASE); - if (--len) { - // Continue with reception - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_RECEIVE_CONT)); - } else { - // Complete the last reception - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_RECEIVE_FINISH)); - } - } - - // Receive the last byte over I2C - *data = MAP_I2CMasterDataGet(I2CA0_BASE); - return true; -} - -STATIC void pyb_i2c_read_into (mp_arg_val_t *args, vstr_t *vstr) { - pyb_i2c_check_init(&pyb_i2c_obj); - // get the buffer to receive into - pyb_buf_get_for_recv(args[1].u_obj, vstr); - - // receive the data - if (!pyb_i2c_read(args[0].u_int, (byte *)vstr->buf, vstr->len)) { - mp_raise_OSError(MP_EIO); - } -} - -STATIC void pyb_i2c_readmem_into (mp_arg_val_t *args, vstr_t *vstr) { - pyb_i2c_check_init(&pyb_i2c_obj); - // get the buffer to receive into - pyb_buf_get_for_recv(args[2].u_obj, vstr); - - // get the addresses - mp_uint_t i2c_addr = args[0].u_int; - mp_uint_t mem_addr = args[1].u_int; - // determine the width of mem_addr (1 or 2 bytes) - mp_uint_t mem_addr_size = args[3].u_int >> 3; - - // write the register address to be read from - if (pyb_i2c_mem_addr_write (i2c_addr, (byte *)&mem_addr, mem_addr_size)) { - // Read the specified length of data - if (!pyb_i2c_read (i2c_addr, (byte *)vstr->buf, vstr->len)) { - mp_raise_OSError(MP_EIO); - } - } else { - mp_raise_OSError(MP_EIO); - } -} - -/******************************************************************************/ -/* MicroPython bindings */ -/******************************************************************************/ -STATIC void pyb_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_i2c_obj_t *self = self_in; - if (self->baudrate > 0) { - mp_printf(print, "I2C(0, baudrate=%u)", self->baudrate); - } else { - mp_print_str(print, "I2C(0)"); - } -} - -STATIC mp_obj_t pyb_i2c_init_helper(pyb_i2c_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_scl, ARG_sda, ARG_freq }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 100000} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // make sure the baudrate is between the valid range - self->baudrate = MIN(MAX(args[ARG_freq].u_int, PYBI2C_MIN_BAUD_RATE_HZ), PYBI2C_MAX_BAUD_RATE_HZ); - - // assign the pins - mp_obj_t pins[2] = {&pin_GP13, &pin_GP23}; // default (SDA, SCL) pins - if (args[ARG_scl].u_obj != MP_OBJ_NULL) { - pins[1] = args[ARG_scl].u_obj; - } - if (args[ARG_sda].u_obj != MP_OBJ_NULL) { - pins[0] = args[ARG_sda].u_obj; - } - pin_assign_pins_af(pins, 2, PIN_TYPE_STD_PU, PIN_FN_I2C, 0); - - // init the I2C bus - i2c_init(self); - - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)i2c_init); - - return mp_const_none; -} - -STATIC mp_obj_t pyb_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // check the id argument, if given - if (n_args > 0) { - if (all_args[0] != MP_OBJ_NEW_SMALL_INT(0)) { - mp_raise_OSError(MP_ENODEV); - } - --n_args; - ++all_args; - } - - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - - // setup the object - pyb_i2c_obj_t *self = &pyb_i2c_obj; - self->base.type = &pyb_i2c_type; - - // start the peripheral - pyb_i2c_init_helper(self, n_args, all_args, &kw_args); - - return (mp_obj_t)self; -} - -STATIC mp_obj_t pyb_i2c_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - return pyb_i2c_init_helper(pos_args[0], n_args - 1, pos_args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_init_obj, 1, pyb_i2c_init); - -STATIC mp_obj_t pyb_i2c_deinit(mp_obj_t self_in) { - // disable the peripheral - MAP_I2CMasterDisable(I2CA0_BASE); - MAP_PRCMPeripheralClkDisable(PRCM_I2CA0, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // invalidate the baudrate - pyb_i2c_obj.baudrate = 0; - // unregister it with the sleep module - pyb_sleep_remove ((const mp_obj_t)self_in); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_deinit_obj, pyb_i2c_deinit); - -STATIC mp_obj_t pyb_i2c_scan(mp_obj_t self_in) { - pyb_i2c_check_init(&pyb_i2c_obj); - mp_obj_t list = mp_obj_new_list(0, NULL); - for (uint addr = 0x08; addr <= 0x77; addr++) { - for (int i = 0; i < 3; i++) { - if (pyb_i2c_scan_device(addr)) { - mp_obj_list_append(list, mp_obj_new_int(addr)); - break; - } - } - } - return list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_scan_obj, pyb_i2c_scan); - -STATIC mp_obj_t pyb_i2c_readfrom(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_readfrom_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_nbytes, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_args, args); - - vstr_t vstr; - pyb_i2c_read_into(args, &vstr); - - // return the received data - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_obj, 3, pyb_i2c_readfrom); - -STATIC mp_obj_t pyb_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_readfrom_into_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_into_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_into_args, args); - - vstr_t vstr; - pyb_i2c_read_into(args, &vstr); - - // return the number of bytes received - return mp_obj_new_int(vstr.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_into_obj, 1, pyb_i2c_readfrom_into); - -STATIC mp_obj_t pyb_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_writeto_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_writeto_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_writeto_args, args); - - pyb_i2c_check_init(&pyb_i2c_obj); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[1].u_obj, &bufinfo, data); - - // send the data - if (!pyb_i2c_write(args[0].u_int, bufinfo.buf, bufinfo.len, args[2].u_bool)) { - mp_raise_OSError(MP_EIO); - } - - // return the number of bytes written - return mp_obj_new_int(bufinfo.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_writeto_obj, 1, pyb_i2c_writeto); - -STATIC mp_obj_t pyb_i2c_readfrom_mem(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_readfrom_mem_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_nbytes, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_mem_args, args); - - vstr_t vstr; - pyb_i2c_readmem_into (args, &vstr); - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_mem_obj, 1, pyb_i2c_readfrom_mem); - -STATIC const mp_arg_t pyb_i2c_readfrom_mem_into_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, -}; - -STATIC mp_obj_t pyb_i2c_readfrom_mem_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_into_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_mem_into_args, args); - - // get the buffer to read into - vstr_t vstr; - pyb_i2c_readmem_into (args, &vstr); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_mem_into_obj, 1, pyb_i2c_readfrom_mem_into); - -STATIC mp_obj_t pyb_i2c_writeto_mem(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_into_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_into_args), pyb_i2c_readfrom_mem_into_args, args); - - pyb_i2c_check_init(&pyb_i2c_obj); - - // get the buffer to write from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[2].u_obj, &bufinfo, data); - - // get the addresses - mp_uint_t i2c_addr = args[0].u_int; - mp_uint_t mem_addr = args[1].u_int; - // determine the width of mem_addr (1 or 2 bytes) - mp_uint_t mem_addr_size = args[3].u_int >> 3; - - // write the register address to write to. - if (pyb_i2c_mem_write (i2c_addr, (byte *)&mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len)) { - return mp_const_none; - } - - mp_raise_OSError(MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_writeto_mem_obj, 1, pyb_i2c_writeto_mem); - -STATIC const mp_rom_map_elem_t pyb_i2c_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_i2c_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_i2c_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&pyb_i2c_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom), MP_ROM_PTR(&pyb_i2c_readfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_into), MP_ROM_PTR(&pyb_i2c_readfrom_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeto), MP_ROM_PTR(&pyb_i2c_writeto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_mem), MP_ROM_PTR(&pyb_i2c_readfrom_mem_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_mem_into), MP_ROM_PTR(&pyb_i2c_readfrom_mem_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeto_mem), MP_ROM_PTR(&pyb_i2c_writeto_mem_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_i2c_locals_dict, pyb_i2c_locals_dict_table); - -const mp_obj_type_t pyb_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = pyb_i2c_print, - .make_new = pyb_i2c_make_new, - .locals_dict = (mp_obj_t)&pyb_i2c_locals_dict, -}; diff --git a/ports/cc3200/mods/pybi2c.h b/ports/cc3200/mods/pybi2c.h deleted file mode 100644 index dcc3f0468c..0000000000 --- a/ports/cc3200/mods/pybi2c.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBI2C_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBI2C_H - -extern const mp_obj_type_t pyb_i2c_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBI2C_H diff --git a/ports/cc3200/mods/pybpin.c b/ports/cc3200/mods/pybpin.c deleted file mode 100644 index c877433e92..0000000000 --- a/ports/cc3200/mods/pybpin.c +++ /dev/null @@ -1,962 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "gpio.h" -#include "interrupt.h" -#include "pybpin.h" -#include "mpirq.h" -#include "pins.h" -#include "pybsleep.h" -#include "mpexception.h" -#include "mperror.h" - - -/// \moduleref pyb -/// \class Pin - control I/O pins -/// -/****************************************************************************** -DECLARE PRIVATE FUNCTIONS -******************************************************************************/ -STATIC pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name); -STATIC pin_obj_t *pin_find_pin_by_port_bit (const mp_obj_dict_t *named_pins, uint port, uint bit); -STATIC int8_t pin_obj_find_af (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type); -STATIC void pin_free_af_from_pins (uint8_t fn, uint8_t unit, uint8_t type); -STATIC void pin_deassign (pin_obj_t* pin); -STATIC void pin_obj_configure (const pin_obj_t *self); -STATIC void pin_get_hibernate_pin_and_idx (const pin_obj_t *self, uint *wake_pin, uint *idx); -STATIC void pin_irq_enable (mp_obj_t self_in); -STATIC void pin_irq_disable (mp_obj_t self_in); -STATIC void pin_extint_register(pin_obj_t *self, uint32_t intmode, uint32_t priority); -STATIC void pin_validate_mode (uint mode); -STATIC void pin_validate_pull (uint pull); -STATIC void pin_validate_drive (uint strength); -STATIC void pin_validate_af(const pin_obj_t* pin, int8_t idx, uint8_t *fn, uint8_t *unit, uint8_t *type); -STATIC uint8_t pin_get_value(const pin_obj_t* self); -STATIC void GPIOA0IntHandler (void); -STATIC void GPIOA1IntHandler (void); -STATIC void GPIOA2IntHandler (void); -STATIC void GPIOA3IntHandler (void); -STATIC void EXTI_Handler(uint port); - -/****************************************************************************** -DEFINE CONSTANTS -******************************************************************************/ -#define PYBPIN_NUM_WAKE_PINS (6) -#define PYBPIN_WAKES_NOT (-1) - -#define GPIO_DIR_MODE_ALT 0x00000002 // Pin is NOT controlled by the PGIO module -#define GPIO_DIR_MODE_ALT_OD 0x00000003 // Pin is NOT controlled by the PGIO module and is in open drain mode - -#define PYB_PIN_FALLING_EDGE 0x01 -#define PYB_PIN_RISING_EDGE 0x02 -#define PYB_PIN_LOW_LEVEL 0x04 -#define PYB_PIN_HIGH_LEVEL 0x08 - -/****************************************************************************** -DEFINE TYPES -******************************************************************************/ -typedef struct { - bool active; - int8_t lpds; - int8_t hib; -} pybpin_wake_pin_t; - -/****************************************************************************** -DECLARE PRIVATE DATA -******************************************************************************/ -STATIC const mp_irq_methods_t pin_irq_methods; -STATIC pybpin_wake_pin_t pybpin_wake_pin[PYBPIN_NUM_WAKE_PINS] = - { {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT} } ; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void pin_init0(void) { -// this initalization also reconfigures the JTAG/SWD pins -#ifndef DEBUG - // assign all pins to the GPIO module so that peripherals can be connected to any - // pins without conflicts after a soft reset - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - for (uint i = 0; i < named_map->used - 1; i++) { - pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value; - pin_deassign (pin); - } -#endif -} - -// C API used to convert a user-supplied pin name into an ordinal pin number. -pin_obj_t *pin_find(mp_obj_t user_obj) { - pin_obj_t *pin_obj; - - // if a pin was provided, use it - if (MP_OBJ_IS_TYPE(user_obj, &pin_type)) { - pin_obj = user_obj; - return pin_obj; - } - - // otherwise see if the pin name matches a cpu pin - pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj); - if (pin_obj) { - return pin_obj; - } - - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -void pin_config (pin_obj_t *self, int af, uint mode, uint pull, int value, uint strength) { - self->mode = mode, self->pull = pull, self->strength = strength; - // if af is -1, then we want to keep it as it is - if (af != -1) { - self->af = af; - } - - // if value is -1, then we want to keep it as it is - if (value != -1) { - self->value = value; - } - - // mark the pin as used - self->used = true; - pin_obj_configure ((const pin_obj_t *)self); - - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pin_obj_configure); -} - -void pin_assign_pins_af (mp_obj_t *pins, uint32_t n_pins, uint32_t pull, uint32_t fn, uint32_t unit) { - for (int i = 0; i < n_pins; i++) { - pin_free_af_from_pins(fn, unit, i); - if (pins[i] != mp_const_none) { - pin_obj_t *pin = pin_find(pins[i]); - pin_config (pin, pin_find_af_index(pin, fn, unit, i), 0, pull, -1, PIN_STRENGTH_2MA); - } - } -} - -uint8_t pin_find_peripheral_unit (const mp_obj_t pin, uint8_t fn, uint8_t type) { - pin_obj_t *pin_o = pin_find(pin); - for (int i = 0; i < pin_o->num_afs; i++) { - if (pin_o->af_list[i].fn == fn && pin_o->af_list[i].type == type) { - return pin_o->af_list[i].unit; - } - } - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -uint8_t pin_find_peripheral_type (const mp_obj_t pin, uint8_t fn, uint8_t unit) { - pin_obj_t *pin_o = pin_find(pin); - for (int i = 0; i < pin_o->num_afs; i++) { - if (pin_o->af_list[i].fn == fn && pin_o->af_list[i].unit == unit) { - return pin_o->af_list[i].type; - } - } - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -int8_t pin_find_af_index (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type) { - int8_t af = pin_obj_find_af(pin, fn, unit, type); - if (af < 0) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return af; -} - -/****************************************************************************** -DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - mp_map_elem_t *named_elem = mp_map_lookup(named_map, name, MP_MAP_LOOKUP); - if (named_elem != NULL && named_elem->value != NULL) { - return named_elem->value; - } - return NULL; -} - -STATIC pin_obj_t *pin_find_pin_by_port_bit (const mp_obj_dict_t *named_pins, uint port, uint bit) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - for (uint i = 0; i < named_map->used; i++) { - if ((((pin_obj_t *)named_map->table[i].value)->port == port) && - (((pin_obj_t *)named_map->table[i].value)->bit == bit)) { - return named_map->table[i].value; - } - } - return NULL; -} - -STATIC int8_t pin_obj_find_af (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type) { - for (int i = 0; i < pin->num_afs; i++) { - if (pin->af_list[i].fn == fn && pin->af_list[i].unit == unit && pin->af_list[i].type == type) { - return pin->af_list[i].idx; - } - } - return -1; -} - -STATIC void pin_free_af_from_pins (uint8_t fn, uint8_t unit, uint8_t type) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - for (uint i = 0; i < named_map->used - 1; i++) { - pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value; - // af is different than GPIO - if (pin->af > PIN_MODE_0) { - // check if the pin supports the target af - int af = pin_obj_find_af(pin, fn, unit, type); - if (af > 0 && af == pin->af) { - // the pin supports the target af, de-assign it - pin_deassign (pin); - } - } - } -} - -STATIC void pin_deassign (pin_obj_t* pin) { - pin_config (pin, PIN_MODE_0, GPIO_DIR_MODE_IN, PIN_TYPE_STD, -1, PIN_STRENGTH_4MA); - pin->used = false; -} - -STATIC void pin_obj_configure (const pin_obj_t *self) { - uint32_t type; - if (self->mode == PIN_TYPE_ANALOG) { - type = PIN_TYPE_ANALOG; - } else { - type = self->pull; - uint32_t direction = self->mode; - if (direction == PIN_TYPE_OD || direction == GPIO_DIR_MODE_ALT_OD) { - direction = GPIO_DIR_MODE_OUT; - type |= PIN_TYPE_OD; - } - if (self->mode != GPIO_DIR_MODE_ALT && self->mode != GPIO_DIR_MODE_ALT_OD) { - // enable the peripheral clock for the GPIO port of this pin - switch (self->port) { - case PORT_A0: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA0, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - case PORT_A1: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - case PORT_A2: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA2, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - case PORT_A3: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - default: - break; - } - // configure the direction - MAP_GPIODirModeSet(self->port, self->bit, direction); - // set the pin value - if (self->value) { - MAP_GPIOPinWrite(self->port, self->bit, self->bit); - } else { - MAP_GPIOPinWrite(self->port, self->bit, 0); - } - } - // now set the alternate function - MAP_PinModeSet (self->pin_num, self->af); - } - MAP_PinConfigSet(self->pin_num, self->strength, type); -} - -STATIC void pin_get_hibernate_pin_and_idx (const pin_obj_t *self, uint *hib_pin, uint *idx) { - // pin_num is actually : (package_pin - 1) - switch (self->pin_num) { - case 56: // GP2 - *hib_pin = PRCM_HIB_GPIO2; - *idx = 0; - break; - case 58: // GP4 - *hib_pin = PRCM_HIB_GPIO4; - *idx = 1; - break; - case 3: // GP13 - *hib_pin = PRCM_HIB_GPIO13; - *idx = 2; - break; - case 7: // GP17 - *hib_pin = PRCM_HIB_GPIO17; - *idx = 3; - break; - case 1: // GP11 - *hib_pin = PRCM_HIB_GPIO11; - *idx = 4; - break; - case 16: // GP24 - *hib_pin = PRCM_HIB_GPIO24; - *idx = 5; - break; - default: - *idx = 0xFF; - break; - } -} - -STATIC void pin_irq_enable (mp_obj_t self_in) { - const pin_obj_t *self = self_in; - uint hib_pin, idx; - - pin_get_hibernate_pin_and_idx (self, &hib_pin, &idx); - if (idx < PYBPIN_NUM_WAKE_PINS) { - if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) { - // enable GPIO as a wake source during LPDS - MAP_PRCMLPDSWakeUpGPIOSelect(idx, pybpin_wake_pin[idx].lpds); - MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_GPIO); - } - - if (pybpin_wake_pin[idx].hib != PYBPIN_WAKES_NOT) { - // enable GPIO as a wake source during hibernate - MAP_PRCMHibernateWakeUpGPIOSelect(hib_pin, pybpin_wake_pin[idx].hib); - MAP_PRCMHibernateWakeupSourceEnable(hib_pin); - } - else { - MAP_PRCMHibernateWakeupSourceDisable(hib_pin); - } - } - // if idx is invalid, the pin supports active interrupts for sure - if (idx >= PYBPIN_NUM_WAKE_PINS || pybpin_wake_pin[idx].active) { - MAP_GPIOIntClear(self->port, self->bit); - MAP_GPIOIntEnable(self->port, self->bit); - } - // in case it was enabled before - else if (idx < PYBPIN_NUM_WAKE_PINS && !pybpin_wake_pin[idx].active) { - MAP_GPIOIntDisable(self->port, self->bit); - } -} - -STATIC void pin_irq_disable (mp_obj_t self_in) { - const pin_obj_t *self = self_in; - uint hib_pin, idx; - - pin_get_hibernate_pin_and_idx (self, &hib_pin, &idx); - if (idx < PYBPIN_NUM_WAKE_PINS) { - if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) { - // disable GPIO as a wake source during LPDS - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_GPIO); - } - if (pybpin_wake_pin[idx].hib != PYBPIN_WAKES_NOT) { - // disable GPIO as a wake source during hibernate - MAP_PRCMHibernateWakeupSourceDisable(hib_pin); - } - } - // not need to check for the active flag, it's safe to disable it anyway - MAP_GPIOIntDisable(self->port, self->bit); -} - -STATIC int pin_irq_flags (mp_obj_t self_in) { - const pin_obj_t *self = self_in; - return self->irq_flags; -} - -STATIC void pin_extint_register(pin_obj_t *self, uint32_t intmode, uint32_t priority) { - void *handler; - uint32_t intnum; - - // configure the interrupt type - MAP_GPIOIntTypeSet(self->port, self->bit, intmode); - switch (self->port) { - case GPIOA0_BASE: - handler = GPIOA0IntHandler; - intnum = INT_GPIOA0; - break; - case GPIOA1_BASE: - handler = GPIOA1IntHandler; - intnum = INT_GPIOA1; - break; - case GPIOA2_BASE: - handler = GPIOA2IntHandler; - intnum = INT_GPIOA2; - break; - case GPIOA3_BASE: - default: - handler = GPIOA3IntHandler; - intnum = INT_GPIOA3; - break; - } - MAP_GPIOIntRegister(self->port, handler); - // set the interrupt to the lowest priority, to make sure that - // no other ISRs will be preemted by this one - MAP_IntPrioritySet(intnum, priority); -} - -STATIC void pin_validate_mode (uint mode) { - if (mode != GPIO_DIR_MODE_IN && mode != GPIO_DIR_MODE_OUT && mode != PIN_TYPE_OD && - mode != GPIO_DIR_MODE_ALT && mode != GPIO_DIR_MODE_ALT_OD) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} -STATIC void pin_validate_pull (uint pull) { - if (pull != PIN_TYPE_STD && pull != PIN_TYPE_STD_PU && pull != PIN_TYPE_STD_PD) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void pin_validate_drive(uint strength) { - if (strength != PIN_STRENGTH_2MA && strength != PIN_STRENGTH_4MA && strength != PIN_STRENGTH_6MA) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void pin_validate_af(const pin_obj_t* pin, int8_t idx, uint8_t *fn, uint8_t *unit, uint8_t *type) { - for (int i = 0; i < pin->num_afs; i++) { - if (pin->af_list[i].idx == idx) { - *fn = pin->af_list[i].fn; - *unit = pin->af_list[i].unit; - *type = pin->af_list[i].type; - return; - } - } - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC uint8_t pin_get_value (const pin_obj_t* self) { - uint32_t value; - bool setdir = false; - if (self->mode == PIN_TYPE_OD || self->mode == GPIO_DIR_MODE_ALT_OD) { - setdir = true; - // configure the direction to IN for a moment in order to read the pin value - MAP_GPIODirModeSet(self->port, self->bit, GPIO_DIR_MODE_IN); - } - // now get the value - value = MAP_GPIOPinRead(self->port, self->bit); - if (setdir) { - // set the direction back to output - MAP_GPIODirModeSet(self->port, self->bit, GPIO_DIR_MODE_OUT); - if (self->value) { - MAP_GPIOPinWrite(self->port, self->bit, self->bit); - } else { - MAP_GPIOPinWrite(self->port, self->bit, 0); - } - } - // return it - return value ? 1 : 0; -} - -STATIC void GPIOA0IntHandler (void) { - EXTI_Handler(GPIOA0_BASE); -} - -STATIC void GPIOA1IntHandler (void) { - EXTI_Handler(GPIOA1_BASE); -} - -STATIC void GPIOA2IntHandler (void) { - EXTI_Handler(GPIOA2_BASE); -} - -STATIC void GPIOA3IntHandler (void) { - EXTI_Handler(GPIOA3_BASE); -} - -// common interrupt handler -STATIC void EXTI_Handler(uint port) { - uint32_t bits = MAP_GPIOIntStatus(port, true); - MAP_GPIOIntClear(port, bits); - - // might be that we have more than one pin interrupt pending - // therefore we must loop through all of the 8 possible bits - for (int i = 0; i < 8; i++) { - uint32_t bit = (1 << i); - if (bit & bits) { - pin_obj_t *self = (pin_obj_t *)pin_find_pin_by_port_bit(&pin_board_pins_locals_dict, port, bit); - if (self->irq_trigger == (PYB_PIN_FALLING_EDGE | PYB_PIN_RISING_EDGE)) { - // read the pin value (hoping that the pin level has remained stable) - self->irq_flags = MAP_GPIOPinRead(self->port, self->bit) ? PYB_PIN_RISING_EDGE : PYB_PIN_FALLING_EDGE; - } else { - // same as the triggers - self->irq_flags = self->irq_trigger; - } - mp_irq_handler(mp_irq_find(self)); - // always clear the flags after leaving the user handler - self->irq_flags = 0; - } - } -} - - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_arg_t pin_init_args[] = { - { MP_QSTR_mode, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_drive, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PIN_STRENGTH_4MA} }, - { MP_QSTR_alt, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, -}; -#define pin_INIT_NUM_ARGS MP_ARRAY_SIZE(pin_init_args) - -STATIC mp_obj_t pin_obj_init_helper(pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[pin_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args, pos_args, kw_args, pin_INIT_NUM_ARGS, pin_init_args, args); - - // get the io mode - uint mode; - // default is input - if (args[0].u_obj == MP_OBJ_NULL) { - mode = GPIO_DIR_MODE_IN; - } else { - mode = mp_obj_get_int(args[0].u_obj); - pin_validate_mode (mode); - } - - // get the pull type - uint pull; - if (args[1].u_obj == mp_const_none) { - pull = PIN_TYPE_STD; - } else { - pull = mp_obj_get_int(args[1].u_obj); - pin_validate_pull (pull); - } - - // get the value - int value = -1; - if (args[2].u_obj != MP_OBJ_NULL) { - if (mp_obj_is_true(args[2].u_obj)) { - value = 1; - } else { - value = 0; - } - } - - // get the strenght - uint strength = args[3].u_int; - pin_validate_drive(strength); - - // get the alternate function - int af = args[4].u_int; - if (mode != GPIO_DIR_MODE_ALT && mode != GPIO_DIR_MODE_ALT_OD) { - if (af == -1) { - af = 0; - } else { - goto invalid_args; - } - } else if (af < -1 || af > 15) { - goto invalid_args; - } - - // check for a valid af and then free it from any other pins - if (af > PIN_MODE_0) { - uint8_t fn, unit, type; - pin_validate_af (self, af, &fn, &unit, &type); - pin_free_af_from_pins(fn, unit, type); - } - pin_config (self, af, mode, pull, value, strength); - - return mp_const_none; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_obj_t *self = self_in; - uint32_t pull = self->pull; - uint32_t drive = self->strength; - - // pin name - mp_printf(print, "Pin('%q'", self->name); - - // pin mode - qstr mode_qst; - uint32_t mode = self->mode; - if (mode == GPIO_DIR_MODE_IN) { - mode_qst = MP_QSTR_IN; - } else if (mode == GPIO_DIR_MODE_OUT) { - mode_qst = MP_QSTR_OUT; - } else if (mode == GPIO_DIR_MODE_ALT) { - mode_qst = MP_QSTR_ALT; - } else if (mode == GPIO_DIR_MODE_ALT_OD) { - mode_qst = MP_QSTR_ALT_OPEN_DRAIN; - } else { - mode_qst = MP_QSTR_OPEN_DRAIN; - } - mp_printf(print, ", mode=Pin.%q", mode_qst); - - // pin pull - qstr pull_qst; - if (pull == PIN_TYPE_STD) { - mp_printf(print, ", pull=%q", MP_QSTR_None); - } else { - if (pull == PIN_TYPE_STD_PU) { - pull_qst = MP_QSTR_PULL_UP; - } else { - pull_qst = MP_QSTR_PULL_DOWN; - } - mp_printf(print, ", pull=Pin.%q", pull_qst); - } - - // pin drive - qstr drv_qst; - if (drive == PIN_STRENGTH_2MA) { - drv_qst = MP_QSTR_LOW_POWER; - } else if (drive == PIN_STRENGTH_4MA) { - drv_qst = MP_QSTR_MED_POWER; - } else { - drv_qst = MP_QSTR_HIGH_POWER; - } - mp_printf(print, ", drive=Pin.%q", drv_qst); - - // pin af - int alt = (self->af == 0) ? -1 : self->af; - mp_printf(print, ", alt=%d)", alt); -} - -STATIC mp_obj_t pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // Run an argument through the mapper and return the result. - pin_obj_t *pin = (pin_obj_t *)pin_find(args[0]); - - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - - return (mp_obj_t)pin; -} - -STATIC mp_obj_t pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init); - -STATIC mp_obj_t pin_value(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - // get the value - return MP_OBJ_NEW_SMALL_INT(pin_get_value(self)); - } else { - // set the pin value - if (mp_obj_is_true(args[1])) { - self->value = 1; - MAP_GPIOPinWrite(self->port, self->bit, self->bit); - } else { - self->value = 0; - MAP_GPIOPinWrite(self->port, self->bit, 0); - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value); - -STATIC mp_obj_t pin_id(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_QSTR(self->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_id_obj, pin_id); - -STATIC mp_obj_t pin_mode(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->mode); - } else { - uint32_t mode = mp_obj_get_int(args[1]); - pin_validate_mode (mode); - self->mode = mode; - pin_obj_configure(self); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_mode_obj, 1, 2, pin_mode); - -STATIC mp_obj_t pin_pull(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - if (self->pull == PIN_TYPE_STD) { - return mp_const_none; - } - return mp_obj_new_int(self->pull); - } else { - uint32_t pull; - if (args[1] == mp_const_none) { - pull = PIN_TYPE_STD; - } else { - pull = mp_obj_get_int(args[1]); - pin_validate_pull (pull); - } - self->pull = pull; - pin_obj_configure(self); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_pull_obj, 1, 2, pin_pull); - -STATIC mp_obj_t pin_drive(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->strength); - } else { - uint32_t strength = mp_obj_get_int(args[1]); - pin_validate_drive (strength); - self->strength = strength; - pin_obj_configure(self); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_drive_obj, 1, 2, pin_drive); - -STATIC mp_obj_t pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - mp_obj_t _args[2] = {self_in, *args}; - return pin_value (n_args + 1, _args); -} - -STATIC mp_obj_t pin_alt_list(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t af[2]; - mp_obj_t afs = mp_obj_new_list(0, NULL); - - for (int i = 0; i < self->num_afs; i++) { - af[0] = MP_OBJ_NEW_QSTR(self->af_list[i].name); - af[1] = mp_obj_new_int(self->af_list[i].idx); - mp_obj_list_append(afs, mp_obj_new_tuple(MP_ARRAY_SIZE(af), af)); - } - return afs; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_alt_list_obj, pin_alt_list); - -/// \method irq(trigger, priority, handler, wake) -STATIC mp_obj_t pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - pin_obj_t *self = pos_args[0]; - - // convert the priority to the correct value - uint priority = mp_irq_translate_priority (args[1].u_int); - - // verify and translate the interrupt mode - uint mp_trigger = mp_obj_get_int(args[0].u_obj); - uint trigger; - if (mp_trigger == (PYB_PIN_FALLING_EDGE | PYB_PIN_RISING_EDGE)) { - trigger = GPIO_BOTH_EDGES; - } else { - switch (mp_trigger) { - case PYB_PIN_FALLING_EDGE: - trigger = GPIO_FALLING_EDGE; - break; - case PYB_PIN_RISING_EDGE: - trigger = GPIO_RISING_EDGE; - break; - case PYB_PIN_LOW_LEVEL: - trigger = GPIO_LOW_LEVEL; - break; - case PYB_PIN_HIGH_LEVEL: - trigger = GPIO_HIGH_LEVEL; - break; - default: - goto invalid_args; - } - } - - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (pwrmode > (PYB_PWR_MODE_ACTIVE | PYB_PWR_MODE_LPDS | PYB_PWR_MODE_HIBERNATE)) { - goto invalid_args; - } - - // get the wake info from this pin - uint hib_pin, idx; - pin_get_hibernate_pin_and_idx ((const pin_obj_t *)self, &hib_pin, &idx); - if (pwrmode & PYB_PWR_MODE_LPDS) { - if (idx >= PYBPIN_NUM_WAKE_PINS) { - goto invalid_args; - } - // wake modes are different in LDPS - uint wake_mode; - switch (trigger) { - case GPIO_FALLING_EDGE: - wake_mode = PRCM_LPDS_FALL_EDGE; - break; - case GPIO_RISING_EDGE: - wake_mode = PRCM_LPDS_RISE_EDGE; - break; - case GPIO_LOW_LEVEL: - wake_mode = PRCM_LPDS_LOW_LEVEL; - break; - case GPIO_HIGH_LEVEL: - wake_mode = PRCM_LPDS_HIGH_LEVEL; - break; - default: - goto invalid_args; - break; - } - - // first clear the lpds value from all wake-able pins - for (uint i = 0; i < PYBPIN_NUM_WAKE_PINS; i++) { - pybpin_wake_pin[i].lpds = PYBPIN_WAKES_NOT; - } - - // enable this pin as a wake-up source during LPDS - pybpin_wake_pin[idx].lpds = wake_mode; - } else if (idx < PYBPIN_NUM_WAKE_PINS) { - // this pin was the previous LPDS wake source, so disable it completely - if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) { - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_GPIO); - } - pybpin_wake_pin[idx].lpds = PYBPIN_WAKES_NOT; - } - - if (pwrmode & PYB_PWR_MODE_HIBERNATE) { - if (idx >= PYBPIN_NUM_WAKE_PINS) { - goto invalid_args; - } - // wake modes are different in hibernate - uint wake_mode; - switch (trigger) { - case GPIO_FALLING_EDGE: - wake_mode = PRCM_HIB_FALL_EDGE; - break; - case GPIO_RISING_EDGE: - wake_mode = PRCM_HIB_RISE_EDGE; - break; - case GPIO_LOW_LEVEL: - wake_mode = PRCM_HIB_LOW_LEVEL; - break; - case GPIO_HIGH_LEVEL: - wake_mode = PRCM_HIB_HIGH_LEVEL; - break; - default: - goto invalid_args; - break; - } - - // enable this pin as wake-up source during hibernate - pybpin_wake_pin[idx].hib = wake_mode; - } else if (idx < PYBPIN_NUM_WAKE_PINS) { - pybpin_wake_pin[idx].hib = PYBPIN_WAKES_NOT; - } - - // we need to update the callback atomically, so we disable the - // interrupt before we update anything. - pin_irq_disable(self); - if (pwrmode & PYB_PWR_MODE_ACTIVE) { - // register the interrupt - pin_extint_register((pin_obj_t *)self, trigger, priority); - if (idx < PYBPIN_NUM_WAKE_PINS) { - pybpin_wake_pin[idx].active = true; - } - } else if (idx < PYBPIN_NUM_WAKE_PINS) { - pybpin_wake_pin[idx].active = false; - } - - // all checks have passed, we can create the irq object - mp_obj_t _irq = mp_irq_new (self, args[2].u_obj, &pin_irq_methods); - if (pwrmode & PYB_PWR_MODE_LPDS) { - pyb_sleep_set_gpio_lpds_callback (_irq); - } - - // save the mp_trigge for later - self->irq_trigger = mp_trigger; - - // enable the interrupt just before leaving - pin_irq_enable(self); - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_irq_obj, 1, pin_irq); - -STATIC const mp_rom_map_elem_t pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_id), MP_ROM_PTR(&pin_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&pin_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_pull), MP_ROM_PTR(&pin_pull_obj) }, - { MP_ROM_QSTR(MP_QSTR_drive), MP_ROM_PTR(&pin_drive_obj) }, - { MP_ROM_QSTR(MP_QSTR_alt_list), MP_ROM_PTR(&pin_alt_list_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pin_irq_obj) }, - - // class attributes - { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&pin_board_pins_obj_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_DIR_MODE_IN) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_DIR_MODE_OUT) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(PIN_TYPE_OD) }, - { MP_ROM_QSTR(MP_QSTR_ALT), MP_ROM_INT(GPIO_DIR_MODE_ALT) }, - { MP_ROM_QSTR(MP_QSTR_ALT_OPEN_DRAIN), MP_ROM_INT(GPIO_DIR_MODE_ALT_OD) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(PIN_TYPE_STD_PU) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(PIN_TYPE_STD_PD) }, - { MP_ROM_QSTR(MP_QSTR_LOW_POWER), MP_ROM_INT(PIN_STRENGTH_2MA) }, - { MP_ROM_QSTR(MP_QSTR_MED_POWER), MP_ROM_INT(PIN_STRENGTH_4MA) }, - { MP_ROM_QSTR(MP_QSTR_HIGH_POWER), MP_ROM_INT(PIN_STRENGTH_6MA) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(PYB_PIN_FALLING_EDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(PYB_PIN_RISING_EDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_LOW_LEVEL), MP_ROM_INT(PYB_PIN_LOW_LEVEL) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_HIGH_LEVEL), MP_ROM_INT(PYB_PIN_HIGH_LEVEL) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pin_locals_dict, pin_locals_dict_table); - -const mp_obj_type_t pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pin_print, - .make_new = pin_make_new, - .call = pin_call, - .locals_dict = (mp_obj_t)&pin_locals_dict, -}; - -STATIC const mp_irq_methods_t pin_irq_methods = { - .init = pin_irq, - .enable = pin_irq_enable, - .disable = pin_irq_disable, - .flags = pin_irq_flags, -}; - -STATIC void pin_named_pins_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_named_pins_obj_t *self = self_in; - mp_printf(print, "", self->name); -} - -const mp_obj_type_t pin_board_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_board, - .print = pin_named_pins_obj_print, - .locals_dict = (mp_obj_t)&pin_board_pins_locals_dict, -}; - diff --git a/ports/cc3200/mods/pybpin.h b/ports/cc3200/mods/pybpin.h deleted file mode 100644 index 74f0af2b3c..0000000000 --- a/ports/cc3200/mods/pybpin.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBPIN_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBPIN_H - -enum { - PORT_A0 = GPIOA0_BASE, - PORT_A1 = GPIOA1_BASE, - PORT_A2 = GPIOA2_BASE, - PORT_A3 = GPIOA3_BASE, -}; - -enum { - PIN_FN_UART = 0, - PIN_FN_SPI, - PIN_FN_I2S, - PIN_FN_I2C, - PIN_FN_TIM, - PIN_FN_SD, - PIN_FN_ADC, -}; - -enum { - PIN_TYPE_UART_TX = 0, - PIN_TYPE_UART_RX, - PIN_TYPE_UART_RTS, - PIN_TYPE_UART_CTS, -}; - -enum { - PIN_TYPE_SPI_CLK = 0, - PIN_TYPE_SPI_MOSI, - PIN_TYPE_SPI_MISO, - PIN_TYPE_SPI_CS0, -}; - -enum { - PIN_TYPE_I2S_CLK = 0, - PIN_TYPE_I2S_FS, - PIN_TYPE_I2S_DAT0, - PIN_TYPE_I2S_DAT1, -}; - -enum { - PIN_TYPE_I2C_SDA = 0, - PIN_TYPE_I2C_SCL, -}; - -enum { - PIN_TYPE_TIM_PWM = 0, -}; - -enum { - PIN_TYPE_SD_CLK = 0, - PIN_TYPE_SD_CMD, - PIN_TYPE_SD_DAT0, -}; - -enum { - PIN_TYPE_ADC_CH0 = 0, - PIN_TYPE_ADC_CH1, - PIN_TYPE_ADC_CH2, - PIN_TYPE_ADC_CH3, -}; - -typedef struct { - qstr name; - int8_t idx; - uint8_t fn; - uint8_t unit; - uint8_t type; -} pin_af_t; - -typedef struct { - const mp_obj_base_t base; - const qstr name; - const uint32_t port; - const pin_af_t *af_list; - uint16_t pull; - const uint8_t bit; - const uint8_t pin_num; - int8_t af; - uint8_t strength; - uint8_t mode; // this is now a combination of type and mode - const uint8_t num_afs; // 255 AFs - uint8_t value; - uint8_t used; - uint8_t irq_trigger; - uint8_t irq_flags; -} pin_obj_t; - -extern const mp_obj_type_t pin_type; - -typedef struct { - const char *name; - const pin_obj_t *pin; -} pin_named_pin_t; - -typedef struct { - mp_obj_base_t base; - qstr name; - const pin_named_pin_t *named_pins; -} pin_named_pins_obj_t; - -extern const mp_obj_type_t pin_board_pins_obj_type; -extern const mp_obj_dict_t pin_board_pins_locals_dict; - -void pin_init0(void); -void pin_config(pin_obj_t *self, int af, uint mode, uint type, int value, uint strength); -pin_obj_t *pin_find(mp_obj_t user_obj); -void pin_assign_pins_af (mp_obj_t *pins, uint32_t n_pins, uint32_t pull, uint32_t fn, uint32_t unit); -uint8_t pin_find_peripheral_unit (const mp_obj_t pin, uint8_t fn, uint8_t type); -uint8_t pin_find_peripheral_type (const mp_obj_t pin, uint8_t fn, uint8_t unit); -int8_t pin_find_af_index (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type);; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBPIN_H diff --git a/ports/cc3200/mods/pybrtc.c b/ports/cc3200/mods/pybrtc.c deleted file mode 100644 index e7b9cf258f..0000000000 --- a/ports/cc3200/mods/pybrtc.c +++ /dev/null @@ -1,485 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "lib/timeutils/timeutils.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "pybrtc.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "mpexception.h" - -/// \moduleref pyb -/// \class RTC - real time clock - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_irq_methods_t pyb_rtc_irq_methods; -STATIC pyb_rtc_obj_t pyb_rtc_obj; - -/****************************************************************************** - FUNCTION-LIKE MACROS - ******************************************************************************/ -#define RTC_U16MS_CYCLES(msec) ((msec * 1024) / 1000) -#define RTC_CYCLES_U16MS(cycles) ((cycles * 1000) / 1024) - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_rtc_set_time (uint32_t secs, uint16_t msecs); -STATIC uint32_t pyb_rtc_reset (void); -STATIC void pyb_rtc_disable_interupt (void); -STATIC void pyb_rtc_irq_enable (mp_obj_t self_in); -STATIC void pyb_rtc_irq_disable (mp_obj_t self_in); -STATIC int pyb_rtc_irq_flags (mp_obj_t self_in); -STATIC uint pyb_rtc_datetime_s_us(const mp_obj_t datetime, uint32_t *seconds); -STATIC mp_obj_t pyb_rtc_datetime(mp_obj_t self, const mp_obj_t datetime); -STATIC void pyb_rtc_set_alarm (pyb_rtc_obj_t *self, uint32_t seconds, uint16_t mseconds); -STATIC void rtc_msec_add(uint16_t msecs_1, uint32_t *secs, uint16_t *msecs_2); - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -void pyb_rtc_pre_init(void) { - // only if comming out of a power-on reset - if (MAP_PRCMSysResetCauseGet() == PRCM_POWER_ON) { - // Mark the RTC in use first - MAP_PRCMRTCInUseSet(); - // reset the time and date - pyb_rtc_reset(); - } -} - -void pyb_rtc_get_time (uint32_t *secs, uint16_t *msecs) { - uint16_t cycles; - MAP_PRCMRTCGet (secs, &cycles); - *msecs = RTC_CYCLES_U16MS(cycles); -} - -uint32_t pyb_rtc_get_seconds (void) { - uint32_t seconds; - uint16_t mseconds; - pyb_rtc_get_time(&seconds, &mseconds); - return seconds; -} - -void pyb_rtc_calc_future_time (uint32_t a_mseconds, uint32_t *f_seconds, uint16_t *f_mseconds) { - uint32_t c_seconds; - uint16_t c_mseconds; - // get the current time - pyb_rtc_get_time(&c_seconds, &c_mseconds); - // calculate the future seconds - *f_seconds = c_seconds + (a_mseconds / 1000); - // calculate the "remaining" future mseconds - *f_mseconds = a_mseconds % 1000; - // add the current milliseconds - rtc_msec_add (c_mseconds, f_seconds, f_mseconds); -} - -void pyb_rtc_repeat_alarm (pyb_rtc_obj_t *self) { - if (self->repeat) { - uint32_t f_seconds, c_seconds; - uint16_t f_mseconds, c_mseconds; - - pyb_rtc_get_time(&c_seconds, &c_mseconds); - - // substract the time elapsed between waking up and setting up the alarm again - int32_t wake_ms = ((c_seconds * 1000) + c_mseconds) - ((self->alarm_time_s * 1000) + self->alarm_time_ms); - int32_t next_alarm = self->alarm_ms - wake_ms; - next_alarm = next_alarm > 0 ? next_alarm : PYB_RTC_MIN_ALARM_TIME_MS; - pyb_rtc_calc_future_time (next_alarm, &f_seconds, &f_mseconds); - - // now configure the alarm - pyb_rtc_set_alarm (self, f_seconds, f_mseconds); - } -} - -void pyb_rtc_disable_alarm (void) { - pyb_rtc_obj.alarmset = false; - pyb_rtc_disable_interupt(); -} - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_rtc_set_time (uint32_t secs, uint16_t msecs) { - // add the RTC access time - rtc_msec_add(RTC_ACCESS_TIME_MSEC, &secs, &msecs); - // convert from mseconds to cycles - msecs = RTC_U16MS_CYCLES(msecs); - // now set the time - MAP_PRCMRTCSet(secs, msecs); -} - -STATIC uint32_t pyb_rtc_reset (void) { - // fresh reset; configure the RTC Calendar - // set the date to 1st Jan 2015 - // set the time to 00:00:00 - uint32_t seconds = timeutils_seconds_since_2000(2015, 1, 1, 0, 0, 0); - // disable any running alarm - pyb_rtc_disable_alarm(); - // Now set the RTC calendar time - pyb_rtc_set_time(seconds, 0); - return seconds; -} - -STATIC void pyb_rtc_disable_interupt (void) { - uint primsk = disable_irq(); - MAP_PRCMIntDisable(PRCM_INT_SLOW_CLK_CTR); - (void)MAP_PRCMIntStatus(); - enable_irq(primsk); -} - -STATIC void pyb_rtc_irq_enable (mp_obj_t self_in) { - pyb_rtc_obj_t *self = self_in; - // we always need interrupts if repeat is enabled - if ((self->pwrmode & PYB_PWR_MODE_ACTIVE) || self->repeat) { - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - } else { // just in case it was already enabled before - MAP_PRCMIntDisable(PRCM_INT_SLOW_CLK_CTR); - } - self->irq_enabled = true; -} - -STATIC void pyb_rtc_irq_disable (mp_obj_t self_in) { - pyb_rtc_obj_t *self = self_in; - self->irq_enabled = false; - if (!self->repeat) { // we always need interrupts if repeat is enabled - pyb_rtc_disable_interupt(); - } -} - -STATIC int pyb_rtc_irq_flags (mp_obj_t self_in) { - pyb_rtc_obj_t *self = self_in; - return self->irq_flags; -} - -STATIC uint pyb_rtc_datetime_s_us(const mp_obj_t datetime, uint32_t *seconds) { - timeutils_struct_time_t tm; - uint32_t useconds; - - // set date and time - mp_obj_t *items; - size_t len; - mp_obj_get_array(datetime, &len, &items); - - // verify the tuple - if (len < 3 || len > 8) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - - tm.tm_year = mp_obj_get_int(items[0]); - tm.tm_mon = mp_obj_get_int(items[1]); - tm.tm_mday = mp_obj_get_int(items[2]); - if (len < 7) { - useconds = 0; - } else { - useconds = mp_obj_get_int(items[6]); - } - if (len < 6) { - tm.tm_sec = 0; - } else { - tm.tm_sec = mp_obj_get_int(items[5]); - } - if (len < 5) { - tm.tm_min = 0; - } else { - tm.tm_min = mp_obj_get_int(items[4]); - } - if (len < 4) { - tm.tm_hour = 0; - } else { - tm.tm_hour = mp_obj_get_int(items[3]); - } - *seconds = timeutils_seconds_since_2000(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); - return useconds; -} - -/// The 8-tuple has the same format as CPython's datetime object: -/// -/// (year, month, day, hours, minutes, seconds, milliseconds, tzinfo=None) -/// -STATIC mp_obj_t pyb_rtc_datetime(mp_obj_t self_in, const mp_obj_t datetime) { - uint32_t seconds; - uint32_t useconds; - - if (datetime != MP_OBJ_NULL) { - useconds = pyb_rtc_datetime_s_us(datetime, &seconds); - pyb_rtc_set_time (seconds, useconds / 1000); - } else { - seconds = pyb_rtc_reset(); - } - - // set WLAN time and date, this is needed to verify certificates - wlan_set_current_time(seconds); - return mp_const_none; -} - -STATIC void pyb_rtc_set_alarm (pyb_rtc_obj_t *self, uint32_t seconds, uint16_t mseconds) { - // disable the interrupt before updating anything - if (self->irq_enabled) { - MAP_PRCMIntDisable(PRCM_INT_SLOW_CLK_CTR); - } - // set the match value - MAP_PRCMRTCMatchSet(seconds, RTC_U16MS_CYCLES(mseconds)); - self->alarmset = true; - self->alarm_time_s = seconds; - self->alarm_time_ms = mseconds; - // enabled the interrupts again if applicable - if (self->irq_enabled || self->repeat) { - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - } -} - -STATIC void rtc_msec_add (uint16_t msecs_1, uint32_t *secs, uint16_t *msecs_2) { - if (msecs_1 + *msecs_2 >= 1000) { // larger than one second - *msecs_2 = (msecs_1 + *msecs_2) - 1000; - *secs += 1; // carry flag - } else { - // simply add the mseconds - *msecs_2 = msecs_1 + *msecs_2; - } -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_arg_t pyb_rtc_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_datetime, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_rtc_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_rtc_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // setup the object - pyb_rtc_obj_t *self = &pyb_rtc_obj; - self->base.type = &pyb_rtc_type; - - // set the time and date - pyb_rtc_datetime((mp_obj_t)&pyb_rtc_obj, args[1].u_obj); - - // pass it to the sleep module - pyb_sleep_set_rtc_obj (self); - - // return constant object - return (mp_obj_t)&pyb_rtc_obj; -} - -STATIC mp_obj_t pyb_rtc_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_rtc_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_rtc_init_args[1], args); - return pyb_rtc_datetime(pos_args[0], args[0].u_obj); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_init_obj, 1, pyb_rtc_init); - -STATIC mp_obj_t pyb_rtc_now (mp_obj_t self_in) { - timeutils_struct_time_t tm; - uint32_t seconds; - uint16_t mseconds; - - // get the time from the RTC - pyb_rtc_get_time(&seconds, &mseconds); - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(mseconds * 1000), - mp_const_none - }; - return mp_obj_new_tuple(8, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_now_obj, pyb_rtc_now); - -STATIC mp_obj_t pyb_rtc_deinit (mp_obj_t self_in) { - pyb_rtc_reset(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_deinit_obj, pyb_rtc_deinit); - -STATIC mp_obj_t pyb_rtc_alarm(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_time, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_repeat, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - pyb_rtc_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); - - // check the alarm id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - uint32_t f_seconds; - uint16_t f_mseconds; - bool repeat = args[2].u_bool; - if (MP_OBJ_IS_TYPE(args[1].u_obj, &mp_type_tuple)) { // datetime tuple given - // repeat cannot be used with a datetime tuple - if (repeat) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - f_mseconds = pyb_rtc_datetime_s_us (args[1].u_obj, &f_seconds) / 1000; - } else { // then it must be an integer - self->alarm_ms = mp_obj_get_int(args[1].u_obj); - pyb_rtc_calc_future_time (self->alarm_ms, &f_seconds, &f_mseconds); - } - - // store the repepat flag - self->repeat = repeat; - - // now configure the alarm - pyb_rtc_set_alarm (self, f_seconds, f_mseconds); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_alarm_obj, 1, pyb_rtc_alarm); - -STATIC mp_obj_t pyb_rtc_alarm_left(size_t n_args, const mp_obj_t *args) { - pyb_rtc_obj_t *self = args[0]; - int32_t ms_left; - uint32_t c_seconds; - uint16_t c_mseconds; - - // only alarm id 0 is available - if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // get the current time - pyb_rtc_get_time(&c_seconds, &c_mseconds); - - // calculate the ms left - ms_left = ((self->alarm_time_s * 1000) + self->alarm_time_ms) - ((c_seconds * 1000) + c_mseconds); - if (!self->alarmset || ms_left < 0) { - ms_left = 0; - } - return mp_obj_new_int(ms_left); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_alarm_left_obj, 1, 2, pyb_rtc_alarm_left); - -STATIC mp_obj_t pyb_rtc_alarm_cancel(size_t n_args, const mp_obj_t *args) { - // only alarm id 0 is available - if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { - mp_raise_OSError(MP_ENODEV); - } - // disable the alarm - pyb_rtc_disable_alarm(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_alarm_cancel_obj, 1, 2, pyb_rtc_alarm_cancel); - -/// \method irq(trigger, priority, handler, wake) -STATIC mp_obj_t pyb_rtc_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - pyb_rtc_obj_t *self = pos_args[0]; - - // save the power mode data for later - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (pwrmode > (PYB_PWR_MODE_ACTIVE | PYB_PWR_MODE_LPDS | PYB_PWR_MODE_HIBERNATE)) { - goto invalid_args; - } - - // check the trigger - if (mp_obj_get_int(args[0].u_obj) == PYB_RTC_ALARM0) { - self->pwrmode = pwrmode; - pyb_rtc_irq_enable((mp_obj_t)self); - } else { - goto invalid_args; - } - - // the interrupt priority is ignored since it's already set to to highest level by the sleep module - // to make sure that the wakeup irqs are always called first when resuming from sleep - - // create the callback - mp_obj_t _irq = mp_irq_new ((mp_obj_t)self, args[2].u_obj, &pyb_rtc_irq_methods); - self->irq_obj = _irq; - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_irq_obj, 1, pyb_rtc_irq); - -STATIC const mp_rom_map_elem_t pyb_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_rtc_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_rtc_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_now), MP_ROM_PTR(&pyb_rtc_now_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&pyb_rtc_alarm_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm_left), MP_ROM_PTR(&pyb_rtc_alarm_left_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm_cancel), MP_ROM_PTR(&pyb_rtc_alarm_cancel_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_rtc_irq_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_ALARM0), MP_ROM_INT(PYB_RTC_ALARM0) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_rtc_locals_dict, pyb_rtc_locals_dict_table); - -const mp_obj_type_t pyb_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = pyb_rtc_make_new, - .locals_dict = (mp_obj_t)&pyb_rtc_locals_dict, -}; - -STATIC const mp_irq_methods_t pyb_rtc_irq_methods = { - .init = pyb_rtc_irq, - .enable = pyb_rtc_irq_enable, - .disable = pyb_rtc_irq_disable, - .flags = pyb_rtc_irq_flags -}; diff --git a/ports/cc3200/mods/pybrtc.h b/ports/cc3200/mods/pybrtc.h deleted file mode 100644 index f73de3f5a7..0000000000 --- a/ports/cc3200/mods/pybrtc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBRTC_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBRTC_H - -// RTC triggers -#define PYB_RTC_ALARM0 (0x01) - -#define RTC_ACCESS_TIME_MSEC (5) -#define PYB_RTC_MIN_ALARM_TIME_MS (RTC_ACCESS_TIME_MSEC * 2) - -typedef struct _pyb_rtc_obj_t { - mp_obj_base_t base; - mp_obj_t irq_obj; - uint32_t irq_flags; - uint32_t alarm_ms; - uint32_t alarm_time_s; - uint16_t alarm_time_ms; - byte pwrmode; - bool alarmset; - bool repeat; - bool irq_enabled; -} pyb_rtc_obj_t; - -extern const mp_obj_type_t pyb_rtc_type; - -extern void pyb_rtc_pre_init(void); -extern void pyb_rtc_get_time (uint32_t *secs, uint16_t *msecs); -extern uint32_t pyb_rtc_get_seconds (void); -extern void pyb_rtc_calc_future_time (uint32_t a_mseconds, uint32_t *f_seconds, uint16_t *f_mseconds); -extern void pyb_rtc_repeat_alarm (pyb_rtc_obj_t *self); -extern void pyb_rtc_disable_alarm (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBRTC_H diff --git a/ports/cc3200/mods/pybsd.c b/ports/cc3200/mods/pybsd.c deleted file mode 100644 index c47d4e9451..0000000000 --- a/ports/cc3200/mods/pybsd.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/vfs_fat.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "gpio.h" -#include "sdhost.h" -#include "sd_diskio.h" -#include "pybsd.h" -#include "mpexception.h" -#include "pybsleep.h" -#include "pybpin.h" -#include "pins.h" - -/****************************************************************************** - DEFINE PRIVATE CONSTANTS - ******************************************************************************/ -#define PYBSD_FREQUENCY_HZ 15000000 // 15MHz - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -pybsd_obj_t pybsd_obj; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_obj_t pyb_sd_def_pin[3] = {&pin_GP10, &pin_GP11, &pin_GP15}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_sd_hw_init (pybsd_obj_t *self); -STATIC mp_obj_t pyb_sd_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args); -STATIC mp_obj_t pyb_sd_deinit (mp_obj_t self_in); - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -/// Initalizes the sd card hardware driver -STATIC void pyb_sd_hw_init (pybsd_obj_t *self) { - if (self->pin_clk) { - // Configure the clock pin as output only - MAP_PinDirModeSet(((pin_obj_t *)(self->pin_clk))->pin_num, PIN_DIR_MODE_OUT); - } - // Enable SD peripheral clock - MAP_PRCMPeripheralClkEnable(PRCM_SDHOST, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // Reset MMCHS - MAP_PRCMPeripheralReset(PRCM_SDHOST); - // Initialize MMCHS - MAP_SDHostInit(SDHOST_BASE); - // Configure the card clock - MAP_SDHostSetExpClk(SDHOST_BASE, MAP_PRCMPeripheralClockGet(PRCM_SDHOST), PYBSD_FREQUENCY_HZ); - // Set card rd/wr block len - MAP_SDHostBlockSizeSet(SDHOST_BASE, SD_SECTOR_SIZE); - self->enabled = true; -} - -STATIC mp_obj_t pyb_sd_init_helper (pybsd_obj_t *self, const mp_arg_val_t *args) { - // assign the pins - mp_obj_t pins_o = args[0].u_obj; - if (pins_o != mp_const_none) { - mp_obj_t *pins; - if (pins_o == MP_OBJ_NULL) { - // use the default pins - pins = (mp_obj_t *)pyb_sd_def_pin; - } else { - mp_obj_get_array_fixed_n(pins_o, MP_ARRAY_SIZE(pyb_sd_def_pin), &pins); - } - pin_assign_pins_af (pins, MP_ARRAY_SIZE(pyb_sd_def_pin), PIN_TYPE_STD_PU, PIN_FN_SD, 0); - // save the pins clock - self->pin_clk = pin_find(pins[0]); - } - - pyb_sd_hw_init (self); - if (sd_disk_init() != 0) { - mp_raise_OSError(MP_EIO); - } - - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pyb_sd_hw_init); - return mp_const_none; -} - -/******************************************************************************/ -// MicroPython bindings -// - -STATIC const mp_arg_t pyb_sd_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pins, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_sd_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_sd_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_sd_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // setup and initialize the object - mp_obj_t self = &pybsd_obj; - pybsd_obj.base.type = &pyb_sd_type; - pyb_sd_init_helper (self, &args[1]); - return self; -} - -STATIC mp_obj_t pyb_sd_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_sd_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_sd_init_args[1], args); - return pyb_sd_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_sd_init_obj, 1, pyb_sd_init); - -STATIC mp_obj_t pyb_sd_deinit (mp_obj_t self_in) { - pybsd_obj_t *self = self_in; - // disable the peripheral - self->enabled = false; - MAP_PRCMPeripheralClkDisable(PRCM_SDHOST, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // de-initialze the sd card at diskio level - sd_disk_deinit(); - // unregister it from the sleep module - pyb_sleep_remove (self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_sd_deinit_obj, pyb_sd_deinit); - -STATIC mp_obj_t pyb_sd_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - DRESULT res = sd_disk_read(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SD_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sd_readblocks_obj, pyb_sd_readblocks); - -STATIC mp_obj_t pyb_sd_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - DRESULT res = sd_disk_write(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SD_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sd_writeblocks_obj, pyb_sd_writeblocks); - -STATIC mp_obj_t pyb_sd_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: - case BP_IOCTL_DEINIT: - case BP_IOCTL_SYNC: - // nothing to do - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_SEC_COUNT: - return MP_OBJ_NEW_SMALL_INT(sd_disk_info.ulNofBlock * (sd_disk_info.ulBlockSize / 512)); - - case BP_IOCTL_SEC_SIZE: - return MP_OBJ_NEW_SMALL_INT(SD_SECTOR_SIZE); - - default: // unknown command - return MP_OBJ_NEW_SMALL_INT(-1); // error - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sd_ioctl_obj, pyb_sd_ioctl); - -STATIC const mp_rom_map_elem_t pyb_sd_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_sd_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_sd_deinit_obj) }, - // block device protocol - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_sd_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_sd_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_sd_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_sd_locals_dict, pyb_sd_locals_dict_table); - -const mp_obj_type_t pyb_sd_type = { - { &mp_type_type }, - .name = MP_QSTR_SD, - .make_new = pyb_sd_make_new, - .locals_dict = (mp_obj_t)&pyb_sd_locals_dict, -}; diff --git a/ports/cc3200/mods/pybsd.h b/ports/cc3200/mods/pybsd.h deleted file mode 100644 index af942084d7..0000000000 --- a/ports/cc3200/mods/pybsd.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBSD_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBSD_H - -/****************************************************************************** - DEFINE PUBLIC TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; - mp_obj_t pin_clk; - bool enabled; -} pybsd_obj_t; - -/****************************************************************************** - DECLARE EXPORTED DATA - ******************************************************************************/ -extern pybsd_obj_t pybsd_obj; -extern const mp_obj_type_t pyb_sd_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBSD_H diff --git a/ports/cc3200/mods/pybsleep.c b/ports/cc3200/mods/pybsleep.c deleted file mode 100644 index 798c6538be..0000000000 --- a/ports/cc3200/mods/pybsleep.c +++ /dev/null @@ -1,656 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_common_reg.h" -#include "inc/hw_memmap.h" -#include "cc3200_asm.h" -#include "rom_map.h" -#include "interrupt.h" -#include "systick.h" -#include "prcm.h" -#include "spi.h" -#include "pin.h" -#include "pybsleep.h" -#include "mpirq.h" -#include "pybpin.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "osi.h" -#include "debug.h" -#include "mpexception.h" -#include "mperror.h" -#include "sleeprestore.h" -#include "serverstask.h" -#include "antenna.h" -#include "cryptohash.h" -#include "pybrtc.h" - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ -#define SPIFLASH_INSTR_READ_STATUS (0x05) -#define SPIFLASH_INSTR_DEEP_POWER_DOWN (0xB9) -#define SPIFLASH_STATUS_BUSY (0x01) - -#define LPDS_UP_TIME (425) // 13 msec -#define LPDS_DOWN_TIME (98) // 3 msec -#define USER_OFFSET (131) // 4 smec -#define WAKEUP_TIME_LPDS (LPDS_UP_TIME + LPDS_DOWN_TIME + USER_OFFSET) // 20 msec -#define WAKEUP_TIME_HIB (32768) // 1 s - -#define FORCED_TIMER_INTERRUPT_MS (PYB_RTC_MIN_ALARM_TIME_MS) -#define FAILED_SLEEP_DELAY_MS (FORCED_TIMER_INTERRUPT_MS * 3) - -/****************************************************************************** - DECLARE PRIVATE TYPES - ******************************************************************************/ -// storage memory for Cortex M4 registers -typedef struct { - uint32_t msp; - uint32_t psp; - uint32_t psr; - uint32_t primask; - uint32_t faultmask; - uint32_t basepri; - uint32_t control; -} arm_cm4_core_regs_t; - -// storage memory for the NVIC registers -typedef struct { - uint32_t vector_table; // Vector Table Offset - uint32_t aux_ctrl; // Auxiliary control register - uint32_t int_ctrl_state; // Interrupt Control and State - uint32_t app_int; // Application Interrupt Reset control - uint32_t sys_ctrl; // System control - uint32_t config_ctrl; // Configuration control - uint32_t sys_pri_1; // System Handler Priority 1 - uint32_t sys_pri_2; // System Handler Priority 2 - uint32_t sys_pri_3; // System Handler Priority 3 - uint32_t sys_hcrs; // System Handler control and state register - uint32_t systick_ctrl; // SysTick Control Status - uint32_t systick_reload; // SysTick Reload - uint32_t systick_calib; // SysTick Calibration - uint32_t int_en[6]; // Interrupt set enable - uint32_t int_priority[49]; // Interrupt priority -} nvic_reg_store_t; - -typedef struct { - mp_obj_base_t base; - mp_obj_t obj; - WakeUpCB_t wakeup; -} pyb_sleep_obj_t; - -typedef struct { - mp_obj_t gpio_lpds_wake_cb; - wlan_obj_t *wlan_obj; - pyb_rtc_obj_t *rtc_obj; -} pybsleep_data_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC nvic_reg_store_t *nvic_reg_store; -STATIC pybsleep_data_t pybsleep_data = {NULL, NULL, NULL}; -volatile arm_cm4_core_regs_t vault_arm_registers; -STATIC pybsleep_reset_cause_t pybsleep_reset_cause = PYB_SLP_PWRON_RESET; -STATIC pybsleep_wake_reason_t pybsleep_wake_reason = PYB_SLP_WAKED_PWRON; -STATIC const mp_obj_type_t pyb_sleep_type = { - { &mp_type_type }, - .name = MP_QSTR_sleep, -}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC pyb_sleep_obj_t *pyb_sleep_find (mp_obj_t obj); -STATIC void pyb_sleep_flash_powerdown (void); -STATIC NORETURN void pyb_sleep_suspend_enter (void); -void pyb_sleep_suspend_exit (void); -STATIC void pyb_sleep_obj_wakeup (void); -STATIC void PRCMInterruptHandler (void); -STATIC void pyb_sleep_iopark (bool hibernate); -STATIC bool setup_timer_lpds_wake (void); -STATIC bool setup_timer_hibernate_wake (void); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -void pyb_sleep_pre_init (void) { - // allocate memory for nvic registers vault - ASSERT ((nvic_reg_store = mem_Malloc(sizeof(nvic_reg_store_t))) != NULL); -} - -void pyb_sleep_init0 (void) { - // initialize the sleep objects list - mp_obj_list_init(&MP_STATE_PORT(pyb_sleep_obj_list), 0); - - // register and enable the PRCM interrupt - osi_InterruptRegister(INT_PRCM, (P_OSI_INTR_ENTRY)PRCMInterruptHandler, INT_PRIORITY_LVL_1); - - // disable all LPDS and hibernate wake up sources (WLAN is disabed/enabled before entering LDPS mode) - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_GPIO); - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - MAP_PRCMHibernateWakeupSourceDisable(PRCM_HIB_SLOW_CLK_CTR | PRCM_HIB_GPIO2 | PRCM_HIB_GPIO4 | PRCM_HIB_GPIO13 | - PRCM_HIB_GPIO17 | PRCM_HIB_GPIO11 | PRCM_HIB_GPIO24 | PRCM_HIB_GPIO26); - - // check the reset casue (if it's soft reset, leave it as it is) - if (pybsleep_reset_cause != PYB_SLP_SOFT_RESET) { - switch (MAP_PRCMSysResetCauseGet()) { - case PRCM_POWER_ON: - pybsleep_reset_cause = PYB_SLP_PWRON_RESET; - break; - case PRCM_CORE_RESET: - case PRCM_MCU_RESET: - case PRCM_SOC_RESET: - pybsleep_reset_cause = PYB_SLP_HARD_RESET; - break; - case PRCM_WDT_RESET: - pybsleep_reset_cause = PYB_SLP_WDT_RESET; - break; - case PRCM_HIB_EXIT: - if (PRCMGetSpecialBit(PRCM_WDT_RESET_BIT)) { - pybsleep_reset_cause = PYB_SLP_WDT_RESET; - } - else { - pybsleep_reset_cause = PYB_SLP_HIB_RESET; - // set the correct wake reason - switch (MAP_PRCMHibernateWakeupCauseGet()) { - case PRCM_HIB_WAKEUP_CAUSE_SLOW_CLOCK: - pybsleep_wake_reason = PYB_SLP_WAKED_BY_RTC; - // TODO repeat the alarm - break; - case PRCM_HIB_WAKEUP_CAUSE_GPIO: - pybsleep_wake_reason = PYB_SLP_WAKED_BY_GPIO; - break; - default: - break; - } - } - break; - default: - break; - } - } -} - -void pyb_sleep_signal_soft_reset (void) { - pybsleep_reset_cause = PYB_SLP_SOFT_RESET; -} - -void pyb_sleep_add (const mp_obj_t obj, WakeUpCB_t wakeup) { - pyb_sleep_obj_t *sleep_obj = m_new_obj(pyb_sleep_obj_t); - sleep_obj->base.type = &pyb_sleep_type; - sleep_obj->obj = obj; - sleep_obj->wakeup = wakeup; - // remove it in case it was already registered - pyb_sleep_remove (obj); - mp_obj_list_append(&MP_STATE_PORT(pyb_sleep_obj_list), sleep_obj); -} - -void pyb_sleep_remove (const mp_obj_t obj) { - pyb_sleep_obj_t *sleep_obj; - if ((sleep_obj = pyb_sleep_find(obj))) { - mp_obj_list_remove(&MP_STATE_PORT(pyb_sleep_obj_list), sleep_obj); - } -} - -void pyb_sleep_set_gpio_lpds_callback (mp_obj_t cb_obj) { - pybsleep_data.gpio_lpds_wake_cb = cb_obj; -} - -void pyb_sleep_set_wlan_obj (mp_obj_t wlan_obj) { - pybsleep_data.wlan_obj = (wlan_obj_t *)wlan_obj; -} - -void pyb_sleep_set_rtc_obj (mp_obj_t rtc_obj) { - pybsleep_data.rtc_obj = (pyb_rtc_obj_t *)rtc_obj; -} - -void pyb_sleep_sleep (void) { - nlr_buf_t nlr; - - // check if we should enable timer wake-up - if (pybsleep_data.rtc_obj->irq_enabled && (pybsleep_data.rtc_obj->pwrmode & PYB_PWR_MODE_LPDS)) { - if (!setup_timer_lpds_wake()) { - // lpds entering is not possible, wait for the forced interrupt and return - mp_hal_delay_ms(FAILED_SLEEP_DELAY_MS); - return; - } - } else { - // disable the timer as wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - } - - // do we need network wake-up? - if (pybsleep_data.wlan_obj->irq_enabled) { - MAP_PRCMLPDSWakeupSourceEnable (PRCM_LPDS_HOST_IRQ); - server_sleep_sockets(); - } else { - MAP_PRCMLPDSWakeupSourceDisable (PRCM_LPDS_HOST_IRQ); - } - - // entering and exiting suspended mode must be an atomic operation - // therefore interrupts need to be disabled - uint primsk = disable_irq(); - if (nlr_push(&nlr) == 0) { - pyb_sleep_suspend_enter(); - nlr_pop(); - } - - // an exception is always raised when exiting suspend mode - enable_irq(primsk); -} - -void pyb_sleep_deepsleep (void) { - // check if we should enable timer wake-up - if (pybsleep_data.rtc_obj->irq_enabled && (pybsleep_data.rtc_obj->pwrmode & PYB_PWR_MODE_HIBERNATE)) { - if (!setup_timer_hibernate_wake()) { - // hibernating is not possible, wait for the forced interrupt and return - mp_hal_delay_ms(FAILED_SLEEP_DELAY_MS); - return; - } - } else { - // disable the timer as hibernate wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_HIB_SLOW_CLK_CTR); - } - - wlan_stop(SL_STOP_TIMEOUT); - pyb_sleep_flash_powerdown(); - // must be done just before entering hibernate mode - pyb_sleep_iopark(true); - MAP_PRCMHibernateEnter(); -} - -pybsleep_reset_cause_t pyb_sleep_get_reset_cause (void) { - return pybsleep_reset_cause; -} - -pybsleep_wake_reason_t pyb_sleep_get_wake_reason (void) { - return pybsleep_wake_reason; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC pyb_sleep_obj_t *pyb_sleep_find (mp_obj_t obj) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(pyb_sleep_obj_list).len; i++) { - // search for the object and then remove it - pyb_sleep_obj_t *sleep_obj = ((pyb_sleep_obj_t *)(MP_STATE_PORT(pyb_sleep_obj_list).items[i])); - if (sleep_obj->obj == obj) { - return sleep_obj; - } - } - return NULL; -} - -STATIC void pyb_sleep_flash_powerdown (void) { - uint32_t status; - - // Enable clock for SSPI module - MAP_PRCMPeripheralClkEnable(PRCM_SSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // Reset SSPI at PRCM level and wait for reset to complete - MAP_PRCMPeripheralReset(PRCM_SSPI); - while(!MAP_PRCMPeripheralStatusGet(PRCM_SSPI)); - - // Reset SSPI at module level - MAP_SPIReset(SSPI_BASE); - // Configure SSPI module - MAP_SPIConfigSetExpClk (SSPI_BASE, PRCMPeripheralClockGet(PRCM_SSPI), - 20000000, SPI_MODE_MASTER,SPI_SUB_MODE_0, - (SPI_SW_CTRL_CS | - SPI_4PIN_MODE | - SPI_TURBO_OFF | - SPI_CS_ACTIVELOW | - SPI_WL_8)); - - // Enable SSPI module - MAP_SPIEnable(SSPI_BASE); - // Enable chip select for the spi flash. - MAP_SPICSEnable(SSPI_BASE); - // Wait for the spi flash - do { - // Send the status register read instruction and read back a dummy byte. - MAP_SPIDataPut(SSPI_BASE, SPIFLASH_INSTR_READ_STATUS); - MAP_SPIDataGet(SSPI_BASE, &status); - - // Write a dummy byte then read back the actual status. - MAP_SPIDataPut(SSPI_BASE, 0xFF); - MAP_SPIDataGet(SSPI_BASE, &status); - } while ((status & 0xFF) == SPIFLASH_STATUS_BUSY); - - // Disable chip select for the spi flash. - MAP_SPICSDisable(SSPI_BASE); - // Start another CS enable sequence for Power down command. - MAP_SPICSEnable(SSPI_BASE); - // Send Deep Power Down command to spi flash - MAP_SPIDataPut(SSPI_BASE, SPIFLASH_INSTR_DEEP_POWER_DOWN); - // Disable chip select for the spi flash. - MAP_SPICSDisable(SSPI_BASE); -} - -STATIC NORETURN void pyb_sleep_suspend_enter (void) { - // enable full RAM retention - MAP_PRCMSRAMRetentionEnable(PRCM_SRAM_COL_1 | PRCM_SRAM_COL_2 | PRCM_SRAM_COL_3 | PRCM_SRAM_COL_4, PRCM_SRAM_LPDS_RET); - - // save the NVIC control registers - nvic_reg_store->vector_table = HWREG(NVIC_VTABLE); - nvic_reg_store->aux_ctrl = HWREG(NVIC_ACTLR); - nvic_reg_store->int_ctrl_state = HWREG(NVIC_INT_CTRL); - nvic_reg_store->app_int = HWREG(NVIC_APINT); - nvic_reg_store->sys_ctrl = HWREG(NVIC_SYS_CTRL); - nvic_reg_store->config_ctrl = HWREG(NVIC_CFG_CTRL); - nvic_reg_store->sys_pri_1 = HWREG(NVIC_SYS_PRI1); - nvic_reg_store->sys_pri_2 = HWREG(NVIC_SYS_PRI2); - nvic_reg_store->sys_pri_3 = HWREG(NVIC_SYS_PRI3); - nvic_reg_store->sys_hcrs = HWREG(NVIC_SYS_HND_CTRL); - - // save the systick registers - nvic_reg_store->systick_ctrl = HWREG(NVIC_ST_CTRL); - nvic_reg_store->systick_reload = HWREG(NVIC_ST_RELOAD); - nvic_reg_store->systick_calib = HWREG(NVIC_ST_CAL); - - // save the interrupt enable registers - uint32_t *base_reg_addr = (uint32_t *)NVIC_EN0; - for(int32_t i = 0; i < (sizeof(nvic_reg_store->int_en) / 4); i++) { - nvic_reg_store->int_en[i] = base_reg_addr[i]; - } - - // save the interrupt priority registers - base_reg_addr = (uint32_t *)NVIC_PRI0; - for(int32_t i = 0; i < (sizeof(nvic_reg_store->int_priority) / 4); i++) { - nvic_reg_store->int_priority[i] = base_reg_addr[i]; - } - - // switch off the heartbeat led (this makes sure it will blink as soon as we wake up) - mperror_heartbeat_switch_off(); - - // park the gpio pins - pyb_sleep_iopark(false); - - // store the cpu registers - sleep_store(); - - // save the restore info and enter LPDS - MAP_PRCMLPDSRestoreInfoSet(vault_arm_registers.psp, (uint32_t)sleep_restore); - MAP_PRCMLPDSEnter(); - - // let the cpu fade away... - for ( ; ; ); -} - -void pyb_sleep_suspend_exit (void) { - // take the I2C semaphore - uint32_t reg = HWREG(COMMON_REG_BASE + COMMON_REG_O_I2C_Properties_Register); - reg = (reg & ~0x3) | 0x1; - HWREG(COMMON_REG_BASE + COMMON_REG_O_I2C_Properties_Register) = reg; - - // take the GPIO semaphore - reg = HWREG(COMMON_REG_BASE + COMMON_REG_O_GPIO_properties_register); - reg = (reg & ~0x3FF) | 0x155; - HWREG(COMMON_REG_BASE + COMMON_REG_O_GPIO_properties_register) = reg; - - // restore de NVIC control registers - HWREG(NVIC_VTABLE) = nvic_reg_store->vector_table; - HWREG(NVIC_ACTLR) = nvic_reg_store->aux_ctrl; - HWREG(NVIC_INT_CTRL) = nvic_reg_store->int_ctrl_state; - HWREG(NVIC_APINT) = nvic_reg_store->app_int; - HWREG(NVIC_SYS_CTRL) = nvic_reg_store->sys_ctrl; - HWREG(NVIC_CFG_CTRL) = nvic_reg_store->config_ctrl; - HWREG(NVIC_SYS_PRI1) = nvic_reg_store->sys_pri_1; - HWREG(NVIC_SYS_PRI2) = nvic_reg_store->sys_pri_2; - HWREG(NVIC_SYS_PRI3) = nvic_reg_store->sys_pri_3; - HWREG(NVIC_SYS_HND_CTRL) = nvic_reg_store->sys_hcrs; - - // restore the systick register - HWREG(NVIC_ST_CTRL) = nvic_reg_store->systick_ctrl; - HWREG(NVIC_ST_RELOAD) = nvic_reg_store->systick_reload; - HWREG(NVIC_ST_CAL) = nvic_reg_store->systick_calib; - - // restore the interrupt priority registers - uint32_t *base_reg_addr = (uint32_t *)NVIC_PRI0; - for (uint32_t i = 0; i < (sizeof(nvic_reg_store->int_priority) / 4); i++) { - base_reg_addr[i] = nvic_reg_store->int_priority[i]; - } - - // restore the interrupt enable registers - base_reg_addr = (uint32_t *)NVIC_EN0; - for(uint32_t i = 0; i < (sizeof(nvic_reg_store->int_en) / 4); i++) { - base_reg_addr[i] = nvic_reg_store->int_en[i]; - } - - HAL_INTRODUCE_SYNC_BARRIER(); - - // ungate the clock to the shared spi bus - MAP_PRCMPeripheralClkEnable(PRCM_SSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - -#if MICROPY_HW_ANTENNA_DIVERSITY - // re-configure the antenna selection pins - antenna_init0(); -#endif - - // reinitialize simplelink's interface - sl_IfOpen (NULL, 0); - - // restore the configuration of all active peripherals - pyb_sleep_obj_wakeup(); - - // reconfigure all the previously enabled interrupts - mp_irq_wake_all(); - - // we need to init the crypto hash engine again - //CRYPTOHASH_Init(); - - // trigger a sw interrupt - MAP_IntPendSet(INT_PRCM); - - // force an exception to go back to the point where suspend mode was entered - nlr_raise(mp_obj_new_exception(&mp_type_SystemExit)); -} - -STATIC void PRCMInterruptHandler (void) { - // reading the interrupt status automatically clears the interrupt - if (PRCM_INT_SLOW_CLK_CTR == MAP_PRCMIntStatus()) { - // reconfigure it again (if repeat is true) - pyb_rtc_repeat_alarm (pybsleep_data.rtc_obj); - pybsleep_data.rtc_obj->irq_flags = PYB_RTC_ALARM0; - // need to check if irq's are enabled from the user point of view - if (pybsleep_data.rtc_obj->irq_enabled && (pybsleep_data.rtc_obj->pwrmode & PYB_PWR_MODE_ACTIVE)) { - mp_irq_handler(pybsleep_data.rtc_obj->irq_obj); - } - pybsleep_data.rtc_obj->irq_flags = 0; - } else { - // interrupt has been triggered while waking up from LPDS - switch (MAP_PRCMLPDSWakeupCauseGet()) { - case PRCM_LPDS_HOST_IRQ: - pybsleep_data.wlan_obj->irq_flags = MODWLAN_WIFI_EVENT_ANY; - mp_irq_handler(pybsleep_data.wlan_obj->irq_obj); - pybsleep_wake_reason = PYB_SLP_WAKED_BY_WLAN; - pybsleep_data.wlan_obj->irq_flags = 0; - break; - case PRCM_LPDS_GPIO: - mp_irq_handler(pybsleep_data.gpio_lpds_wake_cb); - pybsleep_wake_reason = PYB_SLP_WAKED_BY_GPIO; - break; - case PRCM_LPDS_TIMER: - // reconfigure it again if repeat is true - pyb_rtc_repeat_alarm (pybsleep_data.rtc_obj); - pybsleep_data.rtc_obj->irq_flags = PYB_RTC_ALARM0; - // next one clears the wake cause flag - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - mp_irq_handler(pybsleep_data.rtc_obj->irq_obj); - pybsleep_data.rtc_obj->irq_flags = 0; - pybsleep_wake_reason = PYB_SLP_WAKED_BY_RTC; - break; - default: - break; - } - } -} - -STATIC void pyb_sleep_obj_wakeup (void) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(pyb_sleep_obj_list).len; i++) { - pyb_sleep_obj_t *sleep_obj = ((pyb_sleep_obj_t *)MP_STATE_PORT(pyb_sleep_obj_list).items[i]); - sleep_obj->wakeup(sleep_obj->obj); - } -} - -STATIC void pyb_sleep_iopark (bool hibernate) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - for (uint i = 0; i < named_map->used; i++) { - pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value; - switch (pin->pin_num) { -#ifdef DEBUG - // skip the JTAG pins - case PIN_16: - case PIN_17: - case PIN_19: - case PIN_20: - break; -#endif - default: - // enable a weak pull-up if the pin is unused - if (!pin->used) { - MAP_PinConfigSet(pin->pin_num, pin->strength, PIN_TYPE_STD_PU); - } - if (hibernate) { - // make it an input - MAP_PinDirModeSet(pin->pin_num, PIN_DIR_MODE_IN); - } - break; - } - } - - // park the sflash pins - HWREG(0x4402E0E8) &= ~(0x3 << 8); - HWREG(0x4402E0E8) |= (0x2 << 8); - HWREG(0x4402E0EC) &= ~(0x3 << 8); - HWREG(0x4402E0EC) |= (0x2 << 8); - HWREG(0x4402E0F0) &= ~(0x3 << 8); - HWREG(0x4402E0F0) |= (0x2 << 8); - HWREG(0x4402E0F4) &= ~(0x3 << 8); - HWREG(0x4402E0F4) |= (0x1 << 8); - - // if the board has antenna diversity, only park the antenna - // selection pins when going into hibernation -#if MICROPY_HW_ANTENNA_DIVERSITY - if (hibernate) { -#endif - // park the antenna selection pins - // (tri-stated with pull down enabled) - HWREG(0x4402E108) = 0x00000E61; - HWREG(0x4402E10C) = 0x00000E61; -#if MICROPY_HW_ANTENNA_DIVERSITY - } else { - // park the antenna selection pins - // (tri-stated without changing the pull up/down resistors) - HWREG(0x4402E108) &= ~0x000000FF; - HWREG(0x4402E108) |= 0x00000C61; - HWREG(0x4402E10C) &= ~0x000000FF; - HWREG(0x4402E10C) |= 0x00000C61; - } -#endif -} - -STATIC bool setup_timer_lpds_wake (void) { - uint64_t t_match, t_curr; - int64_t t_remaining; - - // get the time remaining for the RTC timer to expire - t_match = MAP_PRCMSlowClkCtrMatchGet(); - t_curr = MAP_PRCMSlowClkCtrGet(); - - // get the time remaining in terms of slow clocks - t_remaining = (t_match - t_curr); - if (t_remaining > WAKEUP_TIME_LPDS) { - // subtract the time it takes to wakeup from lpds - t_remaining -= WAKEUP_TIME_LPDS; - t_remaining = (t_remaining > 0xFFFFFFFF) ? 0xFFFFFFFF: t_remaining; - // setup the LPDS wake time - MAP_PRCMLPDSIntervalSet((uint32_t)t_remaining); - // enable the wake source - MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_TIMER); - return true; - } - - // disable the timer as wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - - uint32_t f_seconds; - uint16_t f_mseconds; - // setup a timer interrupt immediately - pyb_rtc_calc_future_time (FORCED_TIMER_INTERRUPT_MS, &f_seconds, &f_mseconds); - MAP_PRCMRTCMatchSet(f_seconds, f_mseconds); - // LPDS wake by timer was not possible, force an interrupt in active mode instead - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - - return false; -} - -STATIC bool setup_timer_hibernate_wake (void) { - uint64_t t_match, t_curr; - int64_t t_remaining; - - // get the time remaining for the RTC timer to expire - t_match = MAP_PRCMSlowClkCtrMatchGet(); - t_curr = MAP_PRCMSlowClkCtrGet(); - - // get the time remaining in terms of slow clocks - t_remaining = (t_match - t_curr); - if (t_remaining > WAKEUP_TIME_HIB) { - // subtract the time it takes for wakeup from hibernate - t_remaining -= WAKEUP_TIME_HIB; - // setup the LPDS wake time - MAP_PRCMHibernateIntervalSet((uint32_t)t_remaining); - // enable the wake source - MAP_PRCMHibernateWakeupSourceEnable(PRCM_HIB_SLOW_CLK_CTR); - return true; - } - - - // disable the timer as wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_HIB_SLOW_CLK_CTR); - - uint32_t f_seconds; - uint16_t f_mseconds; - // setup a timer interrupt immediately - pyb_rtc_calc_future_time (FORCED_TIMER_INTERRUPT_MS, &f_seconds, &f_mseconds); - MAP_PRCMRTCMatchSet(f_seconds, f_mseconds); - // LPDS wake by timer was not possible, force an interrupt in active mode instead - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - - return false; -} - diff --git a/ports/cc3200/mods/pybsleep.h b/ports/cc3200/mods/pybsleep.h deleted file mode 100644 index e98636178d..0000000000 --- a/ports/cc3200/mods/pybsleep.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBSLEEP_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBSLEEP_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define PYB_PWR_MODE_ACTIVE (0x01) -#define PYB_PWR_MODE_LPDS (0x02) -#define PYB_PWR_MODE_HIBERNATE (0x04) - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef enum { - PYB_SLP_PWRON_RESET = 0, - PYB_SLP_HARD_RESET, - PYB_SLP_WDT_RESET, - PYB_SLP_HIB_RESET, - PYB_SLP_SOFT_RESET -} pybsleep_reset_cause_t; - -typedef enum { - PYB_SLP_WAKED_PWRON = 0, - PYB_SLP_WAKED_BY_WLAN, - PYB_SLP_WAKED_BY_GPIO, - PYB_SLP_WAKED_BY_RTC -} pybsleep_wake_reason_t; - -typedef void (*WakeUpCB_t)(const mp_obj_t self); - -/****************************************************************************** - DECLARE FUNCTIONS - ******************************************************************************/ -void pyb_sleep_pre_init (void); -void pyb_sleep_init0 (void); -void pyb_sleep_signal_soft_reset (void); -void pyb_sleep_add (const mp_obj_t obj, WakeUpCB_t wakeup); -void pyb_sleep_remove (const mp_obj_t obj); -void pyb_sleep_set_gpio_lpds_callback (mp_obj_t cb_obj); -void pyb_sleep_set_wlan_obj (mp_obj_t wlan_obj); -void pyb_sleep_set_rtc_obj (mp_obj_t rtc_obj); -void pyb_sleep_sleep (void); -void pyb_sleep_deepsleep (void); -pybsleep_reset_cause_t pyb_sleep_get_reset_cause (void); -pybsleep_wake_reason_t pyb_sleep_get_wake_reason (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBSLEEP_H diff --git a/ports/cc3200/mods/pybspi.c b/ports/cc3200/mods/pybspi.c deleted file mode 100644 index 27591e4f4c..0000000000 --- a/ports/cc3200/mods/pybspi.c +++ /dev/null @@ -1,387 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "bufhelper.h" -#include "inc/hw_types.h" -#include "inc/hw_mcspi.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "spi.h" -#include "pybspi.h" -#include "mpexception.h" -#include "pybsleep.h" -#include "pybpin.h" -#include "pins.h" - -/// \moduleref pyb -/// \class SPI - a master-driven serial protocol - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct _pyb_spi_obj_t { - mp_obj_base_t base; - uint baudrate; - uint config; - byte polarity; - byte phase; - byte submode; - byte wlen; -} pyb_spi_obj_t; - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define PYBSPI_FIRST_BIT_MSB 0 - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_spi_obj_t pyb_spi_obj = {.baudrate = 0}; - -STATIC const mp_obj_t pyb_spi_def_pin[3] = {&pin_GP14, &pin_GP16, &pin_GP30}; - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -// only master mode is available for the moment -STATIC void pybspi_init (const pyb_spi_obj_t *self) { - // enable the peripheral clock - MAP_PRCMPeripheralClkEnable(PRCM_GSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(PRCM_GSPI); - MAP_SPIReset(GSPI_BASE); - - // configure the interface (only master mode supported) - MAP_SPIConfigSetExpClk (GSPI_BASE, MAP_PRCMPeripheralClockGet(PRCM_GSPI), - self->baudrate, SPI_MODE_MASTER, self->submode, self->config); - - // enable the interface - MAP_SPIEnable(GSPI_BASE); -} - -STATIC void pybspi_tx (pyb_spi_obj_t *self, const void *data) { - uint32_t txdata; - switch (self->wlen) { - case 1: - txdata = (uint8_t)(*(char *)data); - break; - case 2: - txdata = (uint16_t)(*(uint16_t *)data); - break; - case 4: - txdata = (uint32_t)(*(uint32_t *)data); - break; - default: - return; - } - MAP_SPIDataPut (GSPI_BASE, txdata); -} - -STATIC void pybspi_rx (pyb_spi_obj_t *self, void *data) { - uint32_t rxdata; - MAP_SPIDataGet (GSPI_BASE, &rxdata); - if (data) { - switch (self->wlen) { - case 1: - *(char *)data = rxdata; - break; - case 2: - *(uint16_t *)data = rxdata; - break; - case 4: - *(uint32_t *)data = rxdata; - break; - default: - return; - } - } -} - -STATIC void pybspi_transfer (pyb_spi_obj_t *self, const char *txdata, char *rxdata, uint32_t len, uint32_t *txchar) { - if (!self->baudrate) { - mp_raise_OSError(MP_EPERM); - } - // send and receive the data - MAP_SPICSEnable(GSPI_BASE); - for (int i = 0; i < len; i += self->wlen) { - pybspi_tx(self, txdata ? (const void *)&txdata[i] : txchar); - pybspi_rx(self, rxdata ? (void *)&rxdata[i] : NULL); - } - MAP_SPICSDisable(GSPI_BASE); -} - -/******************************************************************************/ -/* MicroPython bindings */ -/******************************************************************************/ -STATIC void pyb_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_spi_obj_t *self = self_in; - if (self->baudrate > 0) { - mp_printf(print, "SPI(0, baudrate=%u, bits=%u, polarity=%u, phase=%u, firstbit=SPI.MSB)", - self->baudrate, (self->wlen * 8), self->polarity, self->phase); - } else { - mp_print_str(print, "SPI(0)"); - } -} - -STATIC mp_obj_t pyb_spi_init_helper(pyb_spi_obj_t *self, const mp_arg_val_t *args) { - uint bits; - switch (args[1].u_int) { - case 8: - bits = SPI_WL_8; - break; - case 16: - bits = SPI_WL_16; - break; - case 32: - bits = SPI_WL_32; - break; - default: - goto invalid_args; - break; - } - - uint polarity = args[2].u_int; - uint phase = args[3].u_int; - if (polarity > 1 || phase > 1) { - goto invalid_args; - } - - uint firstbit = args[4].u_int; - if (firstbit != PYBSPI_FIRST_BIT_MSB) { - goto invalid_args; - } - - // build the configuration - self->baudrate = args[0].u_int; - self->wlen = args[1].u_int >> 3; - self->config = bits | SPI_CS_ACTIVELOW | SPI_SW_CTRL_CS | SPI_4PIN_MODE | SPI_TURBO_OFF; - self->polarity = polarity; - self->phase = phase; - self->submode = (polarity << 1) | phase; - - // assign the pins - mp_obj_t pins_o = args[5].u_obj; - if (pins_o != mp_const_none) { - mp_obj_t *pins; - if (pins_o == MP_OBJ_NULL) { - // use the default pins - pins = (mp_obj_t *)pyb_spi_def_pin; - } else { - mp_obj_get_array_fixed_n(pins_o, 3, &pins); - } - pin_assign_pins_af (pins, 3, PIN_TYPE_STD_PU, PIN_FN_SPI, 0); - } - - // init the bus - pybspi_init((const pyb_spi_obj_t *)self); - - // register it with the sleep module - pyb_sleep_add((const mp_obj_t)self, (WakeUpCB_t)pybspi_init); - - return mp_const_none; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -static const mp_arg_t pyb_spi_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000000} }, // 1MHz - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PYBSPI_FIRST_BIT_MSB} }, - { MP_QSTR_pins, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_spi_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_spi_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // setup the object - pyb_spi_obj_t *self = &pyb_spi_obj; - self->base.type = &pyb_spi_type; - - // start the peripheral - pyb_spi_init_helper(self, &args[1]); - - return self; -} - -STATIC mp_obj_t pyb_spi_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_spi_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_spi_init_args[1], args); - return pyb_spi_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_init_obj, 1, pyb_spi_init); - -/// \method deinit() -/// Turn off the spi bus. -STATIC mp_obj_t pyb_spi_deinit(mp_obj_t self_in) { - // disable the peripheral - MAP_SPIDisable(GSPI_BASE); - MAP_PRCMPeripheralClkDisable(PRCM_GSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // invalidate the baudrate - pyb_spi_obj.baudrate = 0; - // unregister it with the sleep module - pyb_sleep_remove((const mp_obj_t)self_in); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_spi_deinit_obj, pyb_spi_deinit); - -STATIC mp_obj_t pyb_spi_write (mp_obj_t self_in, mp_obj_t buf) { - // parse args - pyb_spi_obj_t *self = self_in; - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(buf, &bufinfo, data); - - // just send - pybspi_transfer(self, (const char *)bufinfo.buf, NULL, bufinfo.len, NULL); - - // return the number of bytes written - return mp_obj_new_int(bufinfo.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_spi_write_obj, pyb_spi_write); - -STATIC mp_obj_t pyb_spi_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_nbytes, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_write, MP_ARG_INT, {.u_int = 0x00} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // just receive - uint32_t write = args[1].u_int; - pybspi_transfer(self, NULL, vstr.buf, vstr.len, &write); - - // return the received data - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_read_obj, 1, pyb_spi_read); - -STATIC mp_obj_t pyb_spi_readinto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_write, MP_ARG_INT, {.u_int = 0x00} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // just receive - uint32_t write = args[1].u_int; - pybspi_transfer(self, NULL, vstr.buf, vstr.len, &write); - - // return the number of bytes received - return mp_obj_new_int(vstr.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_readinto_obj, 1, pyb_spi_readinto); - -STATIC mp_obj_t pyb_spi_write_readinto (mp_obj_t self, mp_obj_t writebuf, mp_obj_t readbuf) { - // get buffers to write from/read to - mp_buffer_info_t bufinfo_write; - uint8_t data_send[1]; - mp_buffer_info_t bufinfo_read; - - if (writebuf == readbuf) { - // same object for writing and reading, it must be a r/w buffer - mp_get_buffer_raise(writebuf, &bufinfo_write, MP_BUFFER_RW); - bufinfo_read = bufinfo_write; - } else { - // get the buffer to write from - pyb_buf_get_for_send(writebuf, &bufinfo_write, data_send); - - // get the read buffer - mp_get_buffer_raise(readbuf, &bufinfo_read, MP_BUFFER_WRITE); - if (bufinfo_read.len != bufinfo_write.len) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - } - - // send and receive - pybspi_transfer(self, (const char *)bufinfo_write.buf, bufinfo_read.buf, bufinfo_write.len, NULL); - - // return the number of transferred bytes - return mp_obj_new_int(bufinfo_write.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_spi_write_readinto_obj, pyb_spi_write_readinto); - -STATIC const mp_rom_map_elem_t pyb_spi_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_spi_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_spi_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_spi_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&pyb_spi_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&pyb_spi_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&pyb_spi_write_readinto_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(PYBSPI_FIRST_BIT_MSB) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_spi_locals_dict, pyb_spi_locals_dict_table); - -const mp_obj_type_t pyb_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = pyb_spi_print, - .make_new = pyb_spi_make_new, - .locals_dict = (mp_obj_t)&pyb_spi_locals_dict, -}; diff --git a/ports/cc3200/mods/pybspi.h b/ports/cc3200/mods/pybspi.h deleted file mode 100644 index b0fce88703..0000000000 --- a/ports/cc3200/mods/pybspi.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBSPI_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBSPI_H - -extern const mp_obj_type_t pyb_spi_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBSPI_H diff --git a/ports/cc3200/mods/pybtimer.c b/ports/cc3200/mods/pybtimer.c deleted file mode 100644 index ea795b8480..0000000000 --- a/ports/cc3200/mods/pybtimer.c +++ /dev/null @@ -1,732 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_timer.h" -#include "rom_map.h" -#include "interrupt.h" -#include "prcm.h" -#include "timer.h" -#include "pin.h" -#include "pybtimer.h" -#include "pybpin.h" -#include "pins.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "mpexception.h" - - -/// \moduleref pyb -/// \class Timer - generate periodic events, count events, and create PWM signals. -/// -/// Each timer consists of a counter that counts up at a certain rate. The rate -/// at which it counts is the peripheral clock frequency (in Hz) divided by the -/// timer prescaler. When the counter reaches the timer period it triggers an -/// event, and the counter resets back to zero. By using the irq method, -/// the timer event can call a Python function. - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ -#define PYBTIMER_NUM_TIMERS (4) -#define PYBTIMER_POLARITY_POS (0x01) -#define PYBTIMER_POLARITY_NEG (0x02) - -#define PYBTIMER_TIMEOUT_TRIGGER (0x01) -#define PYBTIMER_MATCH_TRIGGER (0x02) - -#define PYBTIMER_SRC_FREQ_HZ HAL_FCPU_HZ - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct _pyb_timer_obj_t { - mp_obj_base_t base; - uint32_t timer; - uint32_t config; - uint16_t irq_trigger; - uint16_t irq_flags; - uint8_t peripheral; - uint8_t id; -} pyb_timer_obj_t; - -typedef struct _pyb_timer_channel_obj_t { - mp_obj_base_t base; - struct _pyb_timer_obj_t *timer; - uint32_t frequency; - uint32_t period; - uint16_t channel; - uint16_t duty_cycle; - uint8_t polarity; -} pyb_timer_channel_obj_t; - -/****************************************************************************** - DEFINE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_irq_methods_t pyb_timer_channel_irq_methods; -STATIC pyb_timer_obj_t pyb_timer_obj[PYBTIMER_NUM_TIMERS] = {{.timer = TIMERA0_BASE, .peripheral = PRCM_TIMERA0}, - {.timer = TIMERA1_BASE, .peripheral = PRCM_TIMERA1}, - {.timer = TIMERA2_BASE, .peripheral = PRCM_TIMERA2}, - {.timer = TIMERA3_BASE, .peripheral = PRCM_TIMERA3}}; -STATIC const mp_obj_type_t pyb_timer_channel_type; -STATIC const mp_obj_t pyb_timer_pwm_pin[8] = {&pin_GP24, MP_OBJ_NULL, &pin_GP25, MP_OBJ_NULL, MP_OBJ_NULL, &pin_GP9, &pin_GP10, &pin_GP11}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC mp_obj_t pyb_timer_channel_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); -STATIC void timer_disable (pyb_timer_obj_t *tim); -STATIC void timer_channel_init (pyb_timer_channel_obj_t *ch); -STATIC void TIMER0AIntHandler(void); -STATIC void TIMER0BIntHandler(void); -STATIC void TIMER1AIntHandler(void); -STATIC void TIMER1BIntHandler(void); -STATIC void TIMER2AIntHandler(void); -STATIC void TIMER2BIntHandler(void); -STATIC void TIMER3AIntHandler(void); -STATIC void TIMER3BIntHandler(void); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void timer_init0 (void) { - mp_obj_list_init(&MP_STATE_PORT(pyb_timer_channel_obj_list), 0); -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_timer_channel_irq_enable (mp_obj_t self_in) { - pyb_timer_channel_obj_t *self = self_in; - MAP_TimerIntClear(self->timer->timer, self->timer->irq_trigger & self->channel); - MAP_TimerIntEnable(self->timer->timer, self->timer->irq_trigger & self->channel); -} - -STATIC void pyb_timer_channel_irq_disable (mp_obj_t self_in) { - pyb_timer_channel_obj_t *self = self_in; - MAP_TimerIntDisable(self->timer->timer, self->timer->irq_trigger & self->channel); -} - -STATIC int pyb_timer_channel_irq_flags (mp_obj_t self_in) { - pyb_timer_channel_obj_t *self = self_in; - return self->timer->irq_flags; -} - -STATIC pyb_timer_channel_obj_t *pyb_timer_channel_find (uint32_t timer, uint16_t channel_n) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(pyb_timer_channel_obj_list).len; i++) { - pyb_timer_channel_obj_t *ch = ((pyb_timer_channel_obj_t *)(MP_STATE_PORT(pyb_timer_channel_obj_list).items[i])); - // any 32-bit timer must be matched by any of its 16-bit versions - if (ch->timer->timer == timer && ((ch->channel & TIMER_A) == channel_n || (ch->channel & TIMER_B) == channel_n)) { - return ch; - } - } - return MP_OBJ_NULL; -} - -STATIC void pyb_timer_channel_remove (pyb_timer_channel_obj_t *ch) { - pyb_timer_channel_obj_t *channel; - if ((channel = pyb_timer_channel_find(ch->timer->timer, ch->channel))) { - mp_obj_list_remove(&MP_STATE_PORT(pyb_timer_channel_obj_list), channel); - // unregister it with the sleep module - pyb_sleep_remove((const mp_obj_t)channel); - } -} - -STATIC void pyb_timer_channel_add (pyb_timer_channel_obj_t *ch) { - // remove it in case it already exists - pyb_timer_channel_remove(ch); - mp_obj_list_append(&MP_STATE_PORT(pyb_timer_channel_obj_list), ch); - // register it with the sleep module - pyb_sleep_add((const mp_obj_t)ch, (WakeUpCB_t)timer_channel_init); -} - -STATIC void timer_disable (pyb_timer_obj_t *tim) { - // disable all timers and it's interrupts - MAP_TimerDisable(tim->timer, TIMER_A | TIMER_B); - MAP_TimerIntDisable(tim->timer, tim->irq_trigger); - MAP_TimerIntClear(tim->timer, tim->irq_trigger); - pyb_timer_channel_obj_t *ch; - // disable its channels - if ((ch = pyb_timer_channel_find (tim->timer, TIMER_A))) { - pyb_sleep_remove(ch); - } - if ((ch = pyb_timer_channel_find (tim->timer, TIMER_B))) { - pyb_sleep_remove(ch); - } - MAP_PRCMPeripheralClkDisable(tim->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); -} - -// computes prescaler period and match value so timer triggers at freq-Hz -STATIC uint32_t compute_prescaler_period_and_match_value(pyb_timer_channel_obj_t *ch, uint32_t *period_out, uint32_t *match_out) { - uint32_t maxcount = (ch->channel == (TIMER_A | TIMER_B)) ? 0xFFFFFFFF : 0xFFFF; - uint32_t prescaler; - uint32_t period_c = (ch->frequency > 0) ? PYBTIMER_SRC_FREQ_HZ / ch->frequency : ((PYBTIMER_SRC_FREQ_HZ / 1000000) * ch->period); - - period_c = MAX(1, period_c) - 1; - if (period_c == 0) { - goto error; - } - - prescaler = period_c >> 16; // The prescaler is an extension of the timer counter - *period_out = period_c; - - if (prescaler > 0xFF && maxcount == 0xFFFF) { - goto error; - } - // check limit values for the duty cycle - if (ch->duty_cycle == 0) { - *match_out = period_c - 1; - } else { - if (period_c > 0xFFFF) { - uint32_t match = (period_c * 100) / 10000; - *match_out = period_c - ((match * ch->duty_cycle) / 100); - } else { - *match_out = period_c - ((period_c * ch->duty_cycle) / 10000); - } - } - return prescaler; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC void timer_init (pyb_timer_obj_t *tim) { - MAP_PRCMPeripheralClkEnable(tim->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(tim->peripheral); - MAP_TimerConfigure(tim->timer, tim->config); -} - -STATIC void timer_channel_init (pyb_timer_channel_obj_t *ch) { - // calculate the period, the prescaler and the match value - uint32_t period_c; - uint32_t match; - uint32_t prescaler = compute_prescaler_period_and_match_value(ch, &period_c, &match); - - // set the prescaler - MAP_TimerPrescaleSet(ch->timer->timer, ch->channel, (prescaler < 0xFF) ? prescaler : 0); - - // set the load value - MAP_TimerLoadSet(ch->timer->timer, ch->channel, period_c); - - // configure the pwm if we are in such mode - if ((ch->timer->config & 0x0F) == TIMER_CFG_A_PWM) { - // invert the timer output if required - MAP_TimerControlLevel(ch->timer->timer, ch->channel, (ch->polarity == PYBTIMER_POLARITY_NEG) ? true : false); - // set the match value (which is simply the duty cycle translated to ticks) - MAP_TimerMatchSet(ch->timer->timer, ch->channel, match); - MAP_TimerPrescaleMatchSet(ch->timer->timer, ch->channel, match >> 16); - } - -#ifdef DEBUG - // stall the timer when the processor is halted while debugging - MAP_TimerControlStall(ch->timer->timer, ch->channel, true); -#endif - - // now enable the timer channel - MAP_TimerEnable(ch->timer->timer, ch->channel); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_obj_t *tim = self_in; - uint32_t mode = tim->config & 0xFF; - - // timer mode - qstr mode_qst = MP_QSTR_PWM; - switch(mode) { - case TIMER_CFG_A_ONE_SHOT_UP: - mode_qst = MP_QSTR_ONE_SHOT; - break; - case TIMER_CFG_A_PERIODIC_UP: - mode_qst = MP_QSTR_PERIODIC; - break; - default: - break; - } - mp_printf(print, "Timer(%u, mode=Timer.%q)", tim->id, mode_qst); -} - -STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *tim, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 16} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // check the mode - uint32_t _mode = args[0].u_int; - if (_mode != TIMER_CFG_A_ONE_SHOT_UP && _mode != TIMER_CFG_A_PERIODIC_UP && _mode != TIMER_CFG_A_PWM) { - goto error; - } - - // check the width - if (args[1].u_int != 16 && args[1].u_int != 32) { - goto error; - } - bool is16bit = (args[1].u_int == 16); - - if (!is16bit && _mode == TIMER_CFG_A_PWM) { - // 32-bit mode is only available when in free running modes - goto error; - } - tim->config = is16bit ? ((_mode | (_mode << 8)) | TIMER_CFG_SPLIT_PAIR) : _mode; - - timer_init(tim); - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)tim, (WakeUpCB_t)timer_init); - - return mp_const_none; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // create a new Timer object - int32_t timer_idx = mp_obj_get_int(args[0]); - if (timer_idx < 0 || timer_idx > (PYBTIMER_NUM_TIMERS - 1)) { - mp_raise_OSError(MP_ENODEV); - } - - pyb_timer_obj_t *tim = &pyb_timer_obj[timer_idx]; - tim->base.type = &pyb_timer_type; - tim->id = timer_idx; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args); - } - return (mp_obj_t)tim; -} - -STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init); - -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - timer_disable(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit); - -STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PYBTIMER_POLARITY_POS} }, - { MP_QSTR_duty_cycle, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - - pyb_timer_obj_t *tim = pos_args[0]; - mp_int_t channel_n = mp_obj_get_int(pos_args[1]); - - // verify that the timer has been already initialized - if (!tim->config) { - mp_raise_OSError(MP_EPERM); - } - if (channel_n != TIMER_A && channel_n != TIMER_B && channel_n != (TIMER_A | TIMER_B)) { - // invalid channel - goto error; - } - if (channel_n == (TIMER_A | TIMER_B) && (tim->config & TIMER_CFG_SPLIT_PAIR)) { - // 32-bit channel selected when the timer is in 16-bit mode - goto error; - } - - // if only the channel number is given return the previously - // allocated channel (or None if no previous channel) - if (n_args == 2 && kw_args->used == 0) { - pyb_timer_channel_obj_t *ch; - if ((ch = pyb_timer_channel_find(tim->timer, channel_n))) { - return ch; - } - return mp_const_none; - } - - // parse the arguments - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // throw an exception if both frequency and period are given - if (args[0].u_int != 0 && args[1].u_int != 0) { - goto error; - } - // check that at least one of them has a valid value - if (args[0].u_int <= 0 && args[1].u_int <= 0) { - goto error; - } - // check that the polarity is not 'both' in pwm mode - if ((tim->config & TIMER_A) == TIMER_CFG_A_PWM && args[2].u_int == (PYBTIMER_POLARITY_POS | PYBTIMER_POLARITY_NEG)) { - goto error; - } - - // allocate a new timer channel - pyb_timer_channel_obj_t *ch = m_new_obj(pyb_timer_channel_obj_t); - ch->base.type = &pyb_timer_channel_type; - ch->timer = tim; - ch->channel = channel_n; - - // get the frequency the polarity and the duty cycle - ch->frequency = args[0].u_int; - ch->period = args[1].u_int; - ch->polarity = args[2].u_int; - ch->duty_cycle = MIN(10000, MAX(0, args[3].u_int)); - - timer_channel_init(ch); - - // assign the pin - if ((ch->timer->config & 0x0F) == TIMER_CFG_A_PWM) { - uint32_t ch_idx = (ch->channel == TIMER_A) ? 0 : 1; - // use the default pin if available - mp_obj_t pin_o = (mp_obj_t)pyb_timer_pwm_pin[(ch->timer->id * 2) + ch_idx]; - if (pin_o != MP_OBJ_NULL) { - pin_obj_t *pin = pin_find(pin_o); - pin_config (pin, pin_find_af_index(pin, PIN_FN_TIM, ch->timer->id, PIN_TYPE_TIM_PWM), - 0, PIN_TYPE_STD, -1, PIN_STRENGTH_4MA); - } - } - - // add the timer to the list - pyb_timer_channel_add(ch); - - return ch; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel); - -STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_A), MP_ROM_INT(TIMER_A) }, - { MP_ROM_QSTR(MP_QSTR_B), MP_ROM_INT(TIMER_B) }, - { MP_ROM_QSTR(MP_QSTR_ONE_SHOT), MP_ROM_INT(TIMER_CFG_A_ONE_SHOT_UP) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(TIMER_CFG_A_PERIODIC_UP) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_INT(TIMER_CFG_A_PWM) }, - { MP_ROM_QSTR(MP_QSTR_POSITIVE), MP_ROM_INT(PYBTIMER_POLARITY_POS) }, - { MP_ROM_QSTR(MP_QSTR_NEGATIVE), MP_ROM_INT(PYBTIMER_POLARITY_NEG) }, - { MP_ROM_QSTR(MP_QSTR_TIMEOUT), MP_ROM_INT(PYBTIMER_TIMEOUT_TRIGGER) }, - { MP_ROM_QSTR(MP_QSTR_MATCH), MP_ROM_INT(PYBTIMER_MATCH_TRIGGER) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table); - -const mp_obj_type_t pyb_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = pyb_timer_print, - .make_new = pyb_timer_make_new, - .locals_dict = (mp_obj_t)&pyb_timer_locals_dict, -}; - -STATIC const mp_irq_methods_t pyb_timer_channel_irq_methods = { - .init = pyb_timer_channel_irq, - .enable = pyb_timer_channel_irq_enable, - .disable = pyb_timer_channel_irq_disable, - .flags = pyb_timer_channel_irq_flags, -}; - -STATIC void TIMERGenericIntHandler(uint32_t timer, uint16_t channel) { - pyb_timer_channel_obj_t *self; - uint32_t status; - if ((self = pyb_timer_channel_find(timer, channel))) { - status = MAP_TimerIntStatus(self->timer->timer, true) & self->channel; - MAP_TimerIntClear(self->timer->timer, status); - mp_irq_handler(mp_irq_find(self)); - } -} - -STATIC void TIMER0AIntHandler(void) { - TIMERGenericIntHandler(TIMERA0_BASE, TIMER_A); -} - -STATIC void TIMER0BIntHandler(void) { - TIMERGenericIntHandler(TIMERA0_BASE, TIMER_B); -} - -STATIC void TIMER1AIntHandler(void) { - TIMERGenericIntHandler(TIMERA1_BASE, TIMER_A); -} - -STATIC void TIMER1BIntHandler(void) { - TIMERGenericIntHandler(TIMERA1_BASE, TIMER_B); -} - -STATIC void TIMER2AIntHandler(void) { - TIMERGenericIntHandler(TIMERA2_BASE, TIMER_A); -} - -STATIC void TIMER2BIntHandler(void) { - TIMERGenericIntHandler(TIMERA2_BASE, TIMER_B); -} - -STATIC void TIMER3AIntHandler(void) { - TIMERGenericIntHandler(TIMERA3_BASE, TIMER_A); -} - -STATIC void TIMER3BIntHandler(void) { - TIMERGenericIntHandler(TIMERA3_BASE, TIMER_B); -} - -STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_channel_obj_t *ch = self_in; - char *ch_id = "AB"; - // timer channel - if (ch->channel == TIMER_A) { - ch_id = "A"; - } else if (ch->channel == TIMER_B) { - ch_id = "B"; - } - - mp_printf(print, "timer.channel(Timer.%s, %q=%u", ch_id, MP_QSTR_freq, ch->frequency); - - uint32_t mode = ch->timer->config & 0xFF; - if (mode == TIMER_CFG_A_PWM) { - mp_printf(print, ", %q=Timer.", MP_QSTR_polarity); - switch (ch->polarity) { - case PYBTIMER_POLARITY_POS: - mp_printf(print, "POSITIVE"); - break; - case PYBTIMER_POLARITY_NEG: - mp_printf(print, "NEGATIVE"); - break; - default: - mp_printf(print, "BOTH"); - break; - } - mp_printf(print, ", %q=%u.%02u", MP_QSTR_duty_cycle, ch->duty_cycle / 100, ch->duty_cycle % 100); - } - mp_printf(print, ")"); -} - -STATIC mp_obj_t pyb_timer_channel_freq(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *ch = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(ch->frequency); - } else { - // set - int32_t _frequency = mp_obj_get_int(args[1]); - if (_frequency <= 0) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - ch->frequency = _frequency; - ch->period = 1000000 / _frequency; - timer_channel_init(ch); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_freq_obj, 1, 2, pyb_timer_channel_freq); - -STATIC mp_obj_t pyb_timer_channel_period(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *ch = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(ch->period); - } else { - // set - int32_t _period = mp_obj_get_int(args[1]); - if (_period <= 0) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - ch->period = _period; - ch->frequency = 1000000 / _period; - timer_channel_init(ch); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_period_obj, 1, 2, pyb_timer_channel_period); - -STATIC mp_obj_t pyb_timer_channel_duty_cycle(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *ch = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(ch->duty_cycle); - } else { - // duty cycle must be converted from percentage to ticks - // calculate the period, the prescaler and the match value - uint32_t period_c; - uint32_t match; - ch->duty_cycle = MIN(10000, MAX(0, mp_obj_get_int(args[1]))); - compute_prescaler_period_and_match_value(ch, &period_c, &match); - if (n_args == 3) { - // set the new polarity if requested - ch->polarity = mp_obj_get_int(args[2]); - MAP_TimerControlLevel(ch->timer->timer, ch->channel, (ch->polarity == PYBTIMER_POLARITY_NEG) ? true : false); - } - MAP_TimerMatchSet(ch->timer->timer, ch->channel, match); - MAP_TimerPrescaleMatchSet(ch->timer->timer, ch->channel, match >> 16); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_duty_cycle_obj, 1, 3, pyb_timer_channel_duty_cycle); - -STATIC mp_obj_t pyb_timer_channel_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - pyb_timer_channel_obj_t *ch = pos_args[0]; - - // convert the priority to the correct value - uint priority = mp_irq_translate_priority (args[1].u_int); - - // validate the power mode - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (pwrmode != PYB_PWR_MODE_ACTIVE) { - goto invalid_args; - } - - // get the trigger - uint trigger = mp_obj_get_int(args[0].u_obj); - - // disable the callback first - pyb_timer_channel_irq_disable(ch); - - uint8_t shift = (ch->channel == TIMER_B) ? 8 : 0; - uint32_t _config = (ch->channel == TIMER_B) ? ((ch->timer->config & TIMER_B) >> 8) : (ch->timer->config & TIMER_A); - switch (_config) { - case TIMER_CFG_A_ONE_SHOT_UP: - case TIMER_CFG_A_PERIODIC_UP: - ch->timer->irq_trigger |= TIMER_TIMA_TIMEOUT << shift; - if (trigger != PYBTIMER_TIMEOUT_TRIGGER) { - goto invalid_args; - } - break; - case TIMER_CFG_A_PWM: - // special case for the PWM match interrupt - ch->timer->irq_trigger |= ((ch->channel & TIMER_A) == TIMER_A) ? TIMER_TIMA_MATCH : TIMER_TIMB_MATCH; - if (trigger != PYBTIMER_MATCH_TRIGGER) { - goto invalid_args; - } - break; - default: - break; - } - // special case for a 32-bit timer - if (ch->channel == (TIMER_A | TIMER_B)) { - ch->timer->irq_trigger |= (ch->timer->irq_trigger << 8); - } - - void (*pfnHandler)(void); - uint32_t intregister; - switch (ch->timer->timer) { - case TIMERA0_BASE: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER0BIntHandler; - intregister = INT_TIMERA0B; - } else { - pfnHandler = &TIMER0AIntHandler; - intregister = INT_TIMERA0A; - } - break; - case TIMERA1_BASE: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER1BIntHandler; - intregister = INT_TIMERA1B; - } else { - pfnHandler = &TIMER1AIntHandler; - intregister = INT_TIMERA1A; - } - break; - case TIMERA2_BASE: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER2BIntHandler; - intregister = INT_TIMERA2B; - } else { - pfnHandler = &TIMER2AIntHandler; - intregister = INT_TIMERA2A; - } - break; - default: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER3BIntHandler; - intregister = INT_TIMERA3B; - } else { - pfnHandler = &TIMER3AIntHandler; - intregister = INT_TIMERA3A; - } - break; - } - - // register the interrupt and configure the priority - MAP_IntPrioritySet(intregister, priority); - MAP_TimerIntRegister(ch->timer->timer, ch->channel, pfnHandler); - - // create the callback - mp_obj_t _irq = mp_irq_new (ch, args[2].u_obj, &pyb_timer_channel_irq_methods); - - // enable the callback before returning - pyb_timer_channel_irq_enable(ch); - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_irq_obj, 1, pyb_timer_channel_irq); - -STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_timer_channel_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_channel_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_duty_cycle), MP_ROM_PTR(&pyb_timer_channel_duty_cycle_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_timer_channel_irq_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_timer_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_TimerChannel, - .print = pyb_timer_channel_print, - .locals_dict = (mp_obj_t)&pyb_timer_channel_locals_dict, -}; - diff --git a/ports/cc3200/mods/pybtimer.h b/ports/cc3200/mods/pybtimer.h deleted file mode 100644 index 0af0864ca1..0000000000 --- a/ports/cc3200/mods/pybtimer.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBTIMER_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBTIMER_H - -/****************************************************************************** - DECLARE EXPORTED DATA - ******************************************************************************/ -extern const mp_obj_type_t pyb_timer_type; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void timer_init0 (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBTIMER_H diff --git a/ports/cc3200/mods/pybuart.c b/ports/cc3200/mods/pybuart.c deleted file mode 100644 index 35c0de9f95..0000000000 --- a/ports/cc3200/mods/pybuart.c +++ /dev/null @@ -1,669 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/objlist.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "lib/utils/interrupt_char.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_uart.h" -#include "rom_map.h" -#include "interrupt.h" -#include "prcm.h" -#include "uart.h" -#include "pybuart.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "mpexception.h" -#include "osi.h" -#include "utils.h" -#include "pin.h" -#include "pybpin.h" -#include "pins.h" -#include "moduos.h" - -/// \moduleref pyb -/// \class UART - duplex serial communication bus - -/****************************************************************************** - DEFINE CONSTANTS - *******-***********************************************************************/ -#define PYBUART_FRAME_TIME_US(baud) ((11 * 1000000) / baud) -#define PYBUART_2_FRAMES_TIME_US(baud) (PYBUART_FRAME_TIME_US(baud) * 2) -#define PYBUART_RX_TIMEOUT_US(baud) (PYBUART_2_FRAMES_TIME_US(baud) * 8) // we need at least characters in the FIFO - -#define PYBUART_TX_WAIT_US(baud) ((PYBUART_FRAME_TIME_US(baud)) + 1) -#define PYBUART_TX_MAX_TIMEOUT_MS (5) - -#define PYBUART_RX_BUFFER_LEN (256) - -// interrupt triggers -#define UART_TRIGGER_RX_ANY (0x01) -#define UART_TRIGGER_RX_HALF (0x02) -#define UART_TRIGGER_RX_FULL (0x04) -#define UART_TRIGGER_TX_DONE (0x08) - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void uart_init (pyb_uart_obj_t *self); -STATIC bool uart_rx_wait (pyb_uart_obj_t *self); -STATIC void uart_check_init(pyb_uart_obj_t *self); -STATIC mp_obj_t uart_irq_new (pyb_uart_obj_t *self, byte trigger, mp_int_t priority, mp_obj_t handler); -STATIC void UARTGenericIntHandler(uint32_t uart_id); -STATIC void UART0IntHandler(void); -STATIC void UART1IntHandler(void); -STATIC void uart_irq_enable (mp_obj_t self_in); -STATIC void uart_irq_disable (mp_obj_t self_in); - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -struct _pyb_uart_obj_t { - mp_obj_base_t base; - pyb_uart_id_t uart_id; - uint reg; - uint baudrate; - uint config; - uint flowcontrol; - byte *read_buf; // read buffer pointer - volatile uint16_t read_buf_head; // indexes first empty slot - uint16_t read_buf_tail; // indexes first full slot (not full if equals head) - byte peripheral; - byte irq_trigger; - bool irq_enabled; - byte irq_flags; -}; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_uart_obj_t pyb_uart_obj[PYB_NUM_UARTS] = { {.reg = UARTA0_BASE, .baudrate = 0, .read_buf = NULL, .peripheral = PRCM_UARTA0}, - {.reg = UARTA1_BASE, .baudrate = 0, .read_buf = NULL, .peripheral = PRCM_UARTA1} }; -STATIC const mp_irq_methods_t uart_irq_methods; - -STATIC const mp_obj_t pyb_uart_def_pin[PYB_NUM_UARTS][2] = { {&pin_GP1, &pin_GP2}, {&pin_GP3, &pin_GP4} }; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void uart_init0 (void) { - // save references of the UART objects, to prevent the read buffers from being trashed by the gc - MP_STATE_PORT(pyb_uart_objs)[0] = &pyb_uart_obj[0]; - MP_STATE_PORT(pyb_uart_objs)[1] = &pyb_uart_obj[1]; -} - -uint32_t uart_rx_any(pyb_uart_obj_t *self) { - if (self->read_buf_tail != self->read_buf_head) { - // buffering via irq - return (self->read_buf_head > self->read_buf_tail) ? self->read_buf_head - self->read_buf_tail : - PYBUART_RX_BUFFER_LEN - self->read_buf_tail + self->read_buf_head; - } - return MAP_UARTCharsAvail(self->reg) ? 1 : 0; -} - -int uart_rx_char(pyb_uart_obj_t *self) { - if (self->read_buf_tail != self->read_buf_head) { - // buffering via irq - int data = self->read_buf[self->read_buf_tail]; - self->read_buf_tail = (self->read_buf_tail + 1) % PYBUART_RX_BUFFER_LEN; - return data; - } else { - // no buffering - return MAP_UARTCharGetNonBlocking(self->reg); - } -} - -bool uart_tx_char(pyb_uart_obj_t *self, int c) { - uint32_t timeout = 0; - while (!MAP_UARTCharPutNonBlocking(self->reg, c)) { - if (timeout++ > ((PYBUART_TX_MAX_TIMEOUT_MS * 1000) / PYBUART_TX_WAIT_US(self->baudrate))) { - return false; - } - UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBUART_TX_WAIT_US(self->baudrate))); - } - return true; -} - -bool uart_tx_strn(pyb_uart_obj_t *self, const char *str, uint len) { - for (const char *top = str + len; str < top; str++) { - if (!uart_tx_char(self, *str)) { - return false; - } - } - return true; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -// assumes init parameters have been set up correctly -STATIC void uart_init (pyb_uart_obj_t *self) { - // Enable the peripheral clock - MAP_PRCMPeripheralClkEnable(self->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - // Reset the uart - MAP_PRCMPeripheralReset(self->peripheral); - - // re-allocate the read buffer after resetting the uart (which automatically disables any irqs) - self->read_buf_head = 0; - self->read_buf_tail = 0; - self->read_buf = MP_OBJ_NULL; // free the read buffer before allocating again - self->read_buf = m_new(byte, PYBUART_RX_BUFFER_LEN); - - // Initialize the UART - MAP_UARTConfigSetExpClk(self->reg, MAP_PRCMPeripheralClockGet(self->peripheral), - self->baudrate, self->config); - - // Enable the FIFO - MAP_UARTFIFOEnable(self->reg); - - // Configure the FIFO interrupt levels - MAP_UARTFIFOLevelSet(self->reg, UART_FIFO_TX4_8, UART_FIFO_RX4_8); - - // Configure the flow control mode - UARTFlowControlSet(self->reg, self->flowcontrol); -} - -// Waits at most timeout microseconds for at least 1 char to become ready for -// reading (from buf or for direct reading). -// Returns true if something available, false if not. -STATIC bool uart_rx_wait (pyb_uart_obj_t *self) { - int timeout = PYBUART_RX_TIMEOUT_US(self->baudrate); - for ( ; ; ) { - if (uart_rx_any(self)) { - return true; // we have at least 1 char ready for reading - } - if (timeout > 0) { - UtilsDelay(UTILS_DELAY_US_TO_COUNT(1)); - timeout--; - } - else { - return false; - } - } -} - -STATIC mp_obj_t uart_irq_new (pyb_uart_obj_t *self, byte trigger, mp_int_t priority, mp_obj_t handler) { - // disable the uart interrupts before updating anything - uart_irq_disable (self); - - if (self->uart_id == PYB_UART_0) { - MAP_IntPrioritySet(INT_UARTA0, priority); - MAP_UARTIntRegister(self->reg, UART0IntHandler); - } else { - MAP_IntPrioritySet(INT_UARTA1, priority); - MAP_UARTIntRegister(self->reg, UART1IntHandler); - } - - // create the callback - mp_obj_t _irq = mp_irq_new ((mp_obj_t)self, handler, &uart_irq_methods); - - // enable the interrupts now - self->irq_trigger = trigger; - uart_irq_enable (self); - return _irq; -} - -STATIC void UARTGenericIntHandler(uint32_t uart_id) { - pyb_uart_obj_t *self; - uint32_t status; - - self = &pyb_uart_obj[uart_id]; - status = MAP_UARTIntStatus(self->reg, true); - // receive interrupt - if (status & (UART_INT_RX | UART_INT_RT)) { - // set the flags - self->irq_flags = UART_TRIGGER_RX_ANY; - MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT); - while (UARTCharsAvail(self->reg)) { - int data = MAP_UARTCharGetNonBlocking(self->reg); - if (MP_STATE_PORT(os_term_dup_obj) && MP_STATE_PORT(os_term_dup_obj)->stream_o == self && data == mp_interrupt_char) { - // raise an exception when interrupts are finished - mp_keyboard_interrupt(); - } else { // there's always a read buffer available - uint16_t next_head = (self->read_buf_head + 1) % PYBUART_RX_BUFFER_LEN; - if (next_head != self->read_buf_tail) { - // only store data if room in buf - self->read_buf[self->read_buf_head] = data; - self->read_buf_head = next_head; - } - } - } - } - - // check the flags to see if the user handler should be called - if ((self->irq_trigger & self->irq_flags) && self->irq_enabled) { - // call the user defined handler - mp_irq_handler(mp_irq_find(self)); - } - - // clear the flags - self->irq_flags = 0; -} - -STATIC void uart_check_init(pyb_uart_obj_t *self) { - // not initialized - if (!self->baudrate) { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC void UART0IntHandler(void) { - UARTGenericIntHandler(0); -} - -STATIC void UART1IntHandler(void) { - UARTGenericIntHandler(1); -} - -STATIC void uart_irq_enable (mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - // check for any of the rx interrupt types - if (self->irq_trigger & (UART_TRIGGER_RX_ANY | UART_TRIGGER_RX_HALF | UART_TRIGGER_RX_FULL)) { - MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT); - MAP_UARTIntEnable(self->reg, UART_INT_RX | UART_INT_RT); - } - self->irq_enabled = true; -} - -STATIC void uart_irq_disable (mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - self->irq_enabled = false; -} - -STATIC int uart_irq_flags (mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - return self->irq_flags; -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = self_in; - if (self->baudrate > 0) { - mp_printf(print, "UART(%u, baudrate=%u, bits=", self->uart_id, self->baudrate); - switch (self->config & UART_CONFIG_WLEN_MASK) { - case UART_CONFIG_WLEN_5: - mp_print_str(print, "5"); - break; - case UART_CONFIG_WLEN_6: - mp_print_str(print, "6"); - break; - case UART_CONFIG_WLEN_7: - mp_print_str(print, "7"); - break; - case UART_CONFIG_WLEN_8: - mp_print_str(print, "8"); - break; - default: - break; - } - if ((self->config & UART_CONFIG_PAR_MASK) == UART_CONFIG_PAR_NONE) { - mp_print_str(print, ", parity=None"); - } else { - mp_printf(print, ", parity=UART.%q", (self->config & UART_CONFIG_PAR_MASK) == UART_CONFIG_PAR_EVEN ? MP_QSTR_EVEN : MP_QSTR_ODD); - } - mp_printf(print, ", stop=%u)", (self->config & UART_CONFIG_STOP_MASK) == UART_CONFIG_STOP_ONE ? 1 : 2); - } - else { - mp_printf(print, "UART(%u)", self->uart_id); - } -} - -STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, const mp_arg_val_t *args) { - // get the baudrate - if (args[0].u_int <= 0) { - goto error; - } - uint baudrate = args[0].u_int; - uint config; - switch (args[1].u_int) { - case 5: - config = UART_CONFIG_WLEN_5; - break; - case 6: - config = UART_CONFIG_WLEN_6; - break; - case 7: - config = UART_CONFIG_WLEN_7; - break; - case 8: - config = UART_CONFIG_WLEN_8; - break; - default: - goto error; - break; - } - // parity - if (args[2].u_obj == mp_const_none) { - config |= UART_CONFIG_PAR_NONE; - } else { - uint parity = mp_obj_get_int(args[2].u_obj); - if (parity == 0) { - config |= UART_CONFIG_PAR_EVEN; - } else if (parity == 1) { - config |= UART_CONFIG_PAR_ODD; - } else { - goto error; - } - } - // stop bits - config |= (args[3].u_int == 1 ? UART_CONFIG_STOP_ONE : UART_CONFIG_STOP_TWO); - - // assign the pins - mp_obj_t pins_o = args[4].u_obj; - uint flowcontrol = UART_FLOWCONTROL_NONE; - if (pins_o != mp_const_none) { - mp_obj_t *pins; - size_t n_pins = 2; - if (pins_o == MP_OBJ_NULL) { - // use the default pins - pins = (mp_obj_t *)pyb_uart_def_pin[self->uart_id]; - } else { - mp_obj_get_array(pins_o, &n_pins, &pins); - if (n_pins != 2 && n_pins != 4) { - goto error; - } - if (n_pins == 4) { - if (pins[PIN_TYPE_UART_RTS] != mp_const_none && pins[PIN_TYPE_UART_RX] == mp_const_none) { - goto error; // RTS pin given in TX only mode - } else if (pins[PIN_TYPE_UART_CTS] != mp_const_none && pins[PIN_TYPE_UART_TX] == mp_const_none) { - goto error; // CTS pin given in RX only mode - } else { - if (pins[PIN_TYPE_UART_RTS] != mp_const_none) { - flowcontrol |= UART_FLOWCONTROL_RX; - } - if (pins[PIN_TYPE_UART_CTS] != mp_const_none) { - flowcontrol |= UART_FLOWCONTROL_TX; - } - } - } - } - pin_assign_pins_af (pins, n_pins, PIN_TYPE_STD_PU, PIN_FN_UART, self->uart_id); - } - - self->baudrate = baudrate; - self->config = config; - self->flowcontrol = flowcontrol; - - // initialize and enable the uart - uart_init (self); - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)uart_init); - // enable the callback - uart_irq_new (self, UART_TRIGGER_RX_ANY, INT_PRIORITY_LVL_3, mp_const_none); - // disable the irq (from the user point of view) - uart_irq_disable(self); - - return mp_const_none; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC const mp_arg_t pyb_uart_init_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_pins, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_uart_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_uart_init_args, args); - - // work out the uart id - uint uart_id; - if (args[0].u_obj == MP_OBJ_NULL) { - if (args[5].u_obj != MP_OBJ_NULL) { - mp_obj_t *pins; - size_t n_pins = 2; - mp_obj_get_array(args[5].u_obj, &n_pins, &pins); - // check the Tx pin (or the Rx if Tx is None) - if (pins[0] == mp_const_none) { - uart_id = pin_find_peripheral_unit(pins[1], PIN_FN_UART, PIN_TYPE_UART_RX); - } else { - uart_id = pin_find_peripheral_unit(pins[0], PIN_FN_UART, PIN_TYPE_UART_TX); - } - } else { - // default id - uart_id = 0; - } - } else { - uart_id = mp_obj_get_int(args[0].u_obj); - } - - if (uart_id > PYB_UART_1) { - mp_raise_OSError(MP_ENODEV); - } - - // get the correct uart instance - pyb_uart_obj_t *self = &pyb_uart_obj[uart_id]; - self->base.type = &pyb_uart_type; - self->uart_id = uart_id; - - // start the peripheral - pyb_uart_init_helper(self, &args[1]); - - return self; -} - -STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_uart_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_uart_init_args[1], args); - return pyb_uart_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - - // unregister it with the sleep module - pyb_sleep_remove (self); - // invalidate the baudrate - self->baudrate = 0; - // free the read buffer - m_del(byte, self->read_buf, PYBUART_RX_BUFFER_LEN); - MAP_UARTIntDisable(self->reg, UART_INT_RX | UART_INT_RT); - MAP_UARTDisable(self->reg); - MAP_PRCMPeripheralClkDisable(self->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); - -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - uart_check_init(self); - return mp_obj_new_int(uart_rx_any(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - uart_check_init(self); - // send a break signal for at least 2 complete frames - MAP_UARTBreakCtl(self->reg, true); - UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBUART_2_FRAMES_TIME_US(self->baudrate))); - MAP_UARTBreakCtl(self->reg, false); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak); - -/// \method irq(trigger, priority, handler, wake) -STATIC mp_obj_t pyb_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - - // check if any parameters were passed - pyb_uart_obj_t *self = pos_args[0]; - uart_check_init(self); - - // convert the priority to the correct value - uint priority = mp_irq_translate_priority (args[1].u_int); - - // check the power mode - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (PYB_PWR_MODE_ACTIVE != pwrmode) { - goto invalid_args; - } - - // check the trigger - uint trigger = mp_obj_get_int(args[0].u_obj); - if (!trigger || trigger > (UART_TRIGGER_RX_ANY | UART_TRIGGER_RX_HALF | UART_TRIGGER_RX_FULL | UART_TRIGGER_TX_DONE)) { - goto invalid_args; - } - - // register a new callback - return uart_irq_new (self, trigger, priority, args[2].u_obj); - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_irq_obj, 1, pyb_uart_irq); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_uart_irq_obj) }, - - /// \method read([nbytes]) - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - /// \method readline() - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - /// \method readinto(buf[, nbytes]) - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - /// \method write(buf) - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_RX_ANY), MP_ROM_INT(UART_TRIGGER_RX_ANY) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - byte *buf = buf_in; - uart_check_init(self); - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // wait for first char to become available - if (!uart_rx_wait(self)) { - // return MP_EAGAIN error to indicate non-blocking (then read() method returns None) - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // read the data - byte *orig_buf = buf; - for ( ; ; ) { - *buf++ = uart_rx_char(self); - if (--size == 0 || !uart_rx_wait(self)) { - // return number of bytes read - return buf - orig_buf; - } - } -} - -STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - const char *buf = buf_in; - uart_check_init(self); - - // write the data - if (!uart_tx_strn(self, buf, size)) { - mp_raise_OSError(MP_EIO); - } - return size; -} - -STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_uart_obj_t *self = self_in; - mp_uint_t ret; - uart_check_init(self); - - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && MAP_UARTSpaceAvail(self->reg)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = pyb_uart_read, - .write = pyb_uart_write, - .ioctl = pyb_uart_ioctl, - .is_text = false, -}; - -STATIC const mp_irq_methods_t uart_irq_methods = { - .init = pyb_uart_irq, - .enable = uart_irq_enable, - .disable = uart_irq_disable, - .flags = uart_irq_flags -}; - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_t)&pyb_uart_locals_dict, -}; diff --git a/ports/cc3200/mods/pybuart.h b/ports/cc3200/mods/pybuart.h deleted file mode 100644 index d481242f1f..0000000000 --- a/ports/cc3200/mods/pybuart.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBUART_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBUART_H - -typedef enum { - PYB_UART_0 = 0, - PYB_UART_1 = 1, - PYB_NUM_UARTS -} pyb_uart_id_t; - -typedef struct _pyb_uart_obj_t pyb_uart_obj_t; -extern const mp_obj_type_t pyb_uart_type; - -void uart_init0(void); -uint32_t uart_rx_any(pyb_uart_obj_t *uart_obj); -int uart_rx_char(pyb_uart_obj_t *uart_obj); -bool uart_tx_char(pyb_uart_obj_t *self, int c); -bool uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBUART_H diff --git a/ports/cc3200/mods/pybwdt.c b/ports/cc3200/mods/pybwdt.c deleted file mode 100644 index 4a9fafc4a9..0000000000 --- a/ports/cc3200/mods/pybwdt.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "wdt.h" -#include "prcm.h" -#include "utils.h" -#include "pybwdt.h" -#include "mpexception.h" -#include "mperror.h" - - -/****************************************************************************** - DECLARE CONSTANTS - ******************************************************************************/ -#define PYBWDT_MILLISECONDS_TO_TICKS(ms) ((80000000 / 1000) * (ms)) -#define PYBWDT_MIN_TIMEOUT_MS (1000) - -/****************************************************************************** - DECLARE TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; - bool servers; - bool servers_sleeping; - bool simplelink; - bool running; -} pyb_wdt_obj_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_wdt_obj_t pyb_wdt_obj = {.servers = false, .servers_sleeping = false, .simplelink = false, .running = false}; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -// must be called in main.c just after initializing the hal -__attribute__ ((section (".boot"))) -void pybwdt_init0 (void) { -} - -void pybwdt_srv_alive (void) { - pyb_wdt_obj.servers = true; -} - -void pybwdt_srv_sleeping (bool state) { - pyb_wdt_obj.servers_sleeping = state; -} - -void pybwdt_sl_alive (void) { - pyb_wdt_obj.simplelink = true; -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_arg_t pyb_wdt_init_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} }, // 5 s -}; -STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // check the arguments - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_wdt_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_wdt_init_args, args); - - if (args[0].u_obj != mp_const_none && mp_obj_get_int(args[0].u_obj) > 0) { - mp_raise_OSError(MP_ENODEV); - } - uint timeout_ms = args[1].u_int; - if (timeout_ms < PYBWDT_MIN_TIMEOUT_MS) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - if (pyb_wdt_obj.running) { - mp_raise_OSError(MP_EPERM); - } - - // Enable the WDT peripheral clock - MAP_PRCMPeripheralClkEnable(PRCM_WDT, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - // Unlock to be able to configure the registers - MAP_WatchdogUnlock(WDT_BASE); - -#ifdef DEBUG - // make the WDT stall when the debugger stops on a breakpoint - MAP_WatchdogStallEnable (WDT_BASE); -#endif - - // set the watchdog timer reload value - // the WDT trigger a system reset after the second timeout - // so, divide by 2 the timeout value received - MAP_WatchdogReloadSet(WDT_BASE, PYBWDT_MILLISECONDS_TO_TICKS(timeout_ms / 2)); - - // start the timer. Once it's started, it cannot be disabled. - MAP_WatchdogEnable(WDT_BASE); - pyb_wdt_obj.base.type = &pyb_wdt_type; - pyb_wdt_obj.running = true; - - return (mp_obj_t)&pyb_wdt_obj; -} - -STATIC mp_obj_t pyb_wdt_feed(mp_obj_t self_in) { - pyb_wdt_obj_t *self = self_in; - if ((self->servers || self->servers_sleeping) && self->simplelink && self->running) { - self->servers = false; - self->simplelink = false; - MAP_WatchdogIntClear(WDT_BASE); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_wdt_feed_obj, pyb_wdt_feed); - -STATIC const mp_rom_map_elem_t pybwdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&pyb_wdt_feed_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pybwdt_locals_dict, pybwdt_locals_dict_table); - -const mp_obj_type_t pyb_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = pyb_wdt_make_new, - .locals_dict = (mp_obj_t)&pybwdt_locals_dict, -}; - diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h deleted file mode 100644 index ee9a226e5c..0000000000 --- a/ports/cc3200/mpconfigport.h +++ /dev/null @@ -1,235 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#ifndef BOOTLOADER -#include "FreeRTOS.h" -#include "semphr.h" -#endif - -// options to control how MicroPython is built - -#define MICROPY_ALLOC_PATH_MAX (128) -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_STACK_CHECK (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) -#define MICROPY_OPT_COMPUTED_GOTO (0) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (0) -#define MICROPY_READER_VFS (1) -#ifndef DEBUG // we need ram on the launchxl while debugging -#define MICROPY_CPYTHON_COMPAT (1) -#else -#define MICROPY_CPYTHON_COMPAT (0) -#endif -#define MICROPY_QSTR_BYTES_IN_HASH (1) - -// fatfs configuration used in ffconf.h -#define MICROPY_FATFS_ENABLE_LFN (2) -#define MICROPY_FATFS_MAX_LFN (MICROPY_ALLOC_PATH_MAX) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) // 1=SFN/ANSI 437=LFN/U.S.(OEM) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_REENTRANT (1) -#define MICROPY_FATFS_TIMEOUT (2500) -#define MICROPY_FATFS_SYNC_T SemaphoreHandle_t - -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_VFS (1) -#define MICROPY_VFS_FAT (1) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT cc3200_help_text -#ifndef DEBUG -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_EXECFILE (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#else -#define MICROPY_PY_BUILTINS_STR_UNICODE (0) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_EXECFILE (0) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (0) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) -#endif -#define MICROPY_PY_MICROPYTHON_MEM_INFO (0) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UERRNO_ERRORCODE (0) -#define MICROPY_PY_THREAD (1) -#define MICROPY_PY_THREAD_GIL (1) -#define MICROPY_PY_UBINASCII (0) -#define MICROPY_PY_UCTYPES (0) -#define MICROPY_PY_UZLIB (0) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (0) -#define MICROPY_PY_UHASHLIB (0) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIME_MP_HAL (1) - -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) -#define MICROPY_KBD_EXCEPTION (1) - -// We define our own list of errno constants to include in uerrno module -#define MICROPY_PY_UERRNO_LIST \ - X(EPERM) \ - X(EIO) \ - X(ENODEV) \ - X(EINVAL) \ - X(ETIMEDOUT) \ - -// TODO these should be generic, not bound to fatfs -#define mp_type_fileio mp_type_vfs_fat_fileio -#define mp_type_textio mp_type_vfs_fat_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, \ - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t machine_module; -extern const struct _mp_obj_module_t wipy_module; -extern const struct _mp_obj_module_t mp_module_ure; -extern const struct _mp_obj_module_t mp_module_ujson; -extern const struct _mp_obj_module_t mp_module_uos; -extern const struct _mp_obj_module_t mp_module_utime; -extern const struct _mp_obj_module_t mp_module_uselect; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_network; -extern const struct _mp_obj_module_t mp_module_ubinascii; -extern const struct _mp_obj_module_t mp_module_ussl; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_wipy), MP_ROM_PTR(&wipy_module) }, \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_utime) }, \ - { MP_ROM_QSTR(MP_QSTR_uselect), MP_ROM_PTR(&mp_module_uselect) }, \ - { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) }, \ - { MP_ROM_QSTR(MP_QSTR_network), MP_ROM_PTR(&mp_module_network) }, \ - { MP_ROM_QSTR(MP_QSTR_ubinascii), MP_ROM_PTR(&mp_module_ubinascii) }, \ - { MP_ROM_QSTR(MP_QSTR_ussl), MP_ROM_PTR(&mp_module_ussl) }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, \ - { MP_ROM_QSTR(MP_QSTR_struct), MP_ROM_PTR(&mp_module_ustruct) }, \ - { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, \ - { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, \ - { MP_ROM_QSTR(MP_QSTR_os), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mp_module_utime) }, \ - { MP_ROM_QSTR(MP_QSTR_select), MP_ROM_PTR(&mp_module_uselect) }, \ - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_usocket) }, \ - { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, \ - { MP_ROM_QSTR(MP_QSTR_ssl), MP_ROM_PTR(&mp_module_ussl) }, \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&machine_module) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - -// vm state and root pointers for the gc -#define MP_STATE_PORT MP_STATE_VM -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t mp_const_user_interrupt; \ - mp_obj_t machine_config_main; \ - mp_obj_list_t pyb_sleep_obj_list; \ - mp_obj_list_t mp_irq_obj_list; \ - mp_obj_list_t pyb_timer_channel_obj_list; \ - struct _pyb_uart_obj_t *pyb_uart_objs[2]; \ - struct _os_term_dup_obj_t *os_term_dup_obj; \ - - -// type definitions for the specific machine -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) -#define MP_SSIZE_MAX (0x7FFFFFFF) - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq() -#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state) -#define MICROPY_EVENT_POLL_HOOK __WFI(); - -// assembly functions to handle critical sections, interrupt -// disabling/enabling and sleep mode enter/exit -#include "cc3200_asm.h" - -// We need to provide a declaration/definition of alloca() -#include - -// Include board specific configuration -#include "mpconfigboard.h" - -#define MICROPY_MPHALPORT_H "cc3200_hal.h" -#define MICROPY_PORT_HAS_TELNET (1) -#define MICROPY_PORT_HAS_FTP (1) -#define MICROPY_PY_SYS_PLATFORM "WiPy" - -#define MICROPY_PORT_WLAN_AP_SSID "wipy-wlan" -#define MICROPY_PORT_WLAN_AP_KEY "www.wipy.io" -#define MICROPY_PORT_WLAN_AP_SECURITY SL_SEC_TYPE_WPA_WPA2 -#define MICROPY_PORT_WLAN_AP_CHANNEL 5 diff --git a/ports/cc3200/mptask.c b/ports/cc3200/mptask.c deleted file mode 100644 index 81048d1e7e..0000000000 --- a/ports/cc3200/mptask.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/stackctrl.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "lib/mp-readline/readline.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "inc/hw_memmap.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "interrupt.h" -#include "pybuart.h" -#include "pybpin.h" -#include "pybrtc.h" -#include "lib/utils/pyexec.h" -#include "gccollect.h" -#include "gchelper.h" -#include "mperror.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "modwlan.h" -#include "serverstask.h" -#include "telnet.h" -#include "debug.h" -#include "sflash_diskio.h" -#include "random.h" -#include "pybi2c.h" -#include "pins.h" -#include "mods/pybflash.h" -#include "pybsleep.h" -#include "pybtimer.h" -#include "cryptohash.h" -#include "mpirq.h" -#include "updater.h" -#include "moduos.h" -#include "antenna.h" -#include "task.h" - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void mptask_pre_init (void); -STATIC void mptask_init_sflash_filesystem (void); -STATIC void mptask_enter_ap_mode (void); -STATIC void mptask_create_main_py (void); - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -#ifdef DEBUG -OsiTaskHandle svTaskHandle; -#endif - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -static fs_user_mount_t *sflash_vfs_fat; - -static const char fresh_main_py[] = "# main.py -- put your code here!\r\n"; -static const char fresh_boot_py[] = "# boot.py -- run on boot-up\r\n" - "# can run arbitrary Python, but best to keep it minimal\r\n" - #if MICROPY_STDIO_UART - "import os, machine\r\n" - "os.dupterm(machine.UART(0, " MP_STRINGIFY(MICROPY_STDIO_UART_BAUD) "))\r\n" - #endif - ; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ - -void TASK_MicroPython (void *pvParameters) { - // get the top of the stack to initialize the garbage collector - uint32_t sp = gc_helper_get_sp(); - - bool safeboot = false; - mptask_pre_init(); - -#ifndef DEBUG - safeboot = PRCMGetSpecialBit(PRCM_SAFE_BOOT_BIT); -#endif - -soft_reset: - - // Thread init - #if MICROPY_PY_THREAD - mp_thread_init(); - #endif - - // initialise the stack pointer for the main thread (must be done after mp_thread_init) - mp_stack_set_top((void*)sp); - - // GC init - gc_init(&_boot, &_eheap); - - // MicroPython init - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_init(mp_sys_argv, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - - // execute all basic initializations - mp_irq_init0(); - pyb_sleep_init0(); - pin_init0(); - mperror_init0(); - uart_init0(); - timer_init0(); - readline_init0(); - mod_network_init0(); - rng_init0(); - - pybsleep_reset_cause_t rstcause = pyb_sleep_get_reset_cause(); - if (rstcause < PYB_SLP_SOFT_RESET) { - if (rstcause == PYB_SLP_HIB_RESET) { - // when waking up from hibernate we just want - // to enable simplelink and leave it as is - wlan_first_start(); - } - else { - // only if not comming out of hibernate or a soft reset - mptask_enter_ap_mode(); - } - - // enable telnet and ftp - servers_start(); - } - - // initialize the serial flash file system - mptask_init_sflash_filesystem(); - - // append the flash paths to the system path - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash_slash_lib)); - - // reset config variables; they should be set by boot.py - MP_STATE_PORT(machine_config_main) = MP_OBJ_NULL; - - if (!safeboot) { - // run boot.py - int ret = pyexec_file("boot.py", NULL); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - // flash the system led - mperror_signal_error(); - } - } - - // now we initialise sub-systems that need configuration from boot.py, - // or whose initialisation can be safely deferred until after running - // boot.py. - - // at this point everything is fully configured and initialised. - - if (!safeboot) { - // run the main script from the current directory. - if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) { - const char *main_py; - if (MP_STATE_PORT(machine_config_main) == MP_OBJ_NULL) { - main_py = "main.py"; - } else { - main_py = mp_obj_str_get_str(MP_STATE_PORT(machine_config_main)); - } - int ret = pyexec_file(main_py, NULL); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - // flash the system led - mperror_signal_error(); - } - } - } - - // main script is finished, so now go into REPL mode. - // the REPL mode can change, or it can request a soft reset. - for ( ; ; ) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - -soft_reset_exit: - - // soft reset - pyb_sleep_signal_soft_reset(); - mp_printf(&mp_plat_print, "PYB: soft reboot\n"); - - // disable all callbacks to avoid undefined behaviour - // when coming out of a soft reset - mp_irq_disable_all(); - - // cancel the RTC alarm which might be running independent of the irq state - pyb_rtc_disable_alarm(); - - // flush the serial flash buffer - sflash_disk_flush(); - - // clean-up the user socket space - modusocket_close_all_user_sockets(); - - // unmount all user file systems - osmount_unmount_all(); - - // wait for pending transactions to complete - mp_hal_delay_ms(20); - - goto soft_reset; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -STATIC void mptask_pre_init (void) { - // this one only makes sense after a poweron reset - pyb_rtc_pre_init(); - - // Create the simple link spawn task - ASSERT (OSI_OK == VStartSimpleLinkSpawnTask(SIMPLELINK_SPAWN_TASK_PRIORITY)); - - // Allocate memory for the flash file system - ASSERT ((sflash_vfs_fat = mem_Malloc(sizeof(*sflash_vfs_fat))) != NULL); - - // this one allocates memory for the nvic vault - pyb_sleep_pre_init(); - - // this one allocates memory for the WLAN semaphore - wlan_pre_init(); - - // this one allocates memory for the updater semaphore - updater_pre_init(); - - // this one allocates memory for the socket semaphore - modusocket_pre_init(); - - //CRYPTOHASH_Init(); - -#ifndef DEBUG - OsiTaskHandle svTaskHandle; -#endif - svTaskHandle = xTaskCreateStatic(TASK_Servers, "Servers", - SERVERS_STACK_LEN, NULL, SERVERS_PRIORITY, svTaskStack, &svTaskTCB); - ASSERT(svTaskHandle != NULL); -} - -STATIC void mptask_init_sflash_filesystem (void) { - FILINFO fno; - - // Initialise the local flash filesystem. - // init the vfs object - fs_user_mount_t *vfs_fat = sflash_vfs_fat; - vfs_fat->flags = 0; - pyb_flash_init_vfs(vfs_fat); - - // Create it if needed, and mount in on /flash. - FRESULT res = f_mount(&vfs_fat->fatfs); - if (res == FR_NO_FILESYSTEM) { - // no filesystem, so create a fresh one - uint8_t working_buf[_MAX_SS]; - res = f_mkfs(&vfs_fat->fatfs, FM_FAT | FM_SFD, 0, working_buf, sizeof(working_buf)); - if (res == FR_OK) { - // success creating fresh LFS - } else { - __fatal_error("failed to create /flash"); - } - // create empty main.py - mptask_create_main_py(); - } else if (res == FR_OK) { - // mount sucessful - if (FR_OK != f_stat(&vfs_fat->fatfs, "/main.py", &fno)) { - // create empty main.py - mptask_create_main_py(); - } - } else { - fail: - __fatal_error("failed to create /flash"); - } - - // mount the flash device (there should be no other devices mounted at this point) - // we allocate this structure on the heap because vfs->next is a root pointer - mp_vfs_mount_t *vfs = m_new_obj_maybe(mp_vfs_mount_t); - if (vfs == NULL) { - goto fail; - } - vfs->str = "/flash"; - vfs->len = 6; - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - MP_STATE_VM(vfs_mount_table) = vfs; - - // The current directory is used as the boot up directory. - // It is set to the internal flash filesystem by default. - MP_STATE_PORT(vfs_cur) = vfs; - - // create /flash/sys, /flash/lib and /flash/cert if they don't exist - if (FR_OK != f_chdir(&vfs_fat->fatfs, "/sys")) { - f_mkdir(&vfs_fat->fatfs, "/sys"); - } - if (FR_OK != f_chdir(&vfs_fat->fatfs, "/lib")) { - f_mkdir(&vfs_fat->fatfs, "/lib"); - } - if (FR_OK != f_chdir(&vfs_fat->fatfs, "/cert")) { - f_mkdir(&vfs_fat->fatfs, "/cert"); - } - - f_chdir(&vfs_fat->fatfs, "/"); - - // make sure we have a /flash/boot.py. Create it if needed. - res = f_stat(&vfs_fat->fatfs, "/boot.py", &fno); - if (res == FR_OK) { - if (fno.fattrib & AM_DIR) { - // exists as a directory - // TODO handle this case - // see http://elm-chan.org/fsw/ff/img/app2.c for a "rm -rf" implementation - } else { - // exists as a file, good! - } - } else { - // doesn't exist, create fresh file - FIL fp; - f_open(&vfs_fat->fatfs, &fp, "/boot.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_boot_py, sizeof(fresh_boot_py) - 1 /* don't count null terminator */, &n); - // TODO check we could write n bytes - f_close(&fp); - } -} - -STATIC void mptask_enter_ap_mode (void) { - // append the mac only if it's not the first boot - bool add_mac = !PRCMGetSpecialBit(PRCM_FIRST_BOOT_BIT); - // enable simplelink in ap mode (use the MAC address to make the ssid unique) - wlan_sl_init (ROLE_AP, MICROPY_PORT_WLAN_AP_SSID, strlen(MICROPY_PORT_WLAN_AP_SSID), - MICROPY_PORT_WLAN_AP_SECURITY, MICROPY_PORT_WLAN_AP_KEY, strlen(MICROPY_PORT_WLAN_AP_KEY), - MICROPY_PORT_WLAN_AP_CHANNEL, ANTENNA_TYPE_INTERNAL, add_mac); -} - -STATIC void mptask_create_main_py (void) { - // create empty main.py - FIL fp; - f_open(&sflash_vfs_fat->fatfs, &fp, "/main.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_main_py, sizeof(fresh_main_py) - 1 /* don't count null terminator */, &n); - f_close(&fp); -} diff --git a/ports/cc3200/mptask.h b/ports/cc3200/mptask.h deleted file mode 100644 index a1c3eb2cbf..0000000000 --- a/ports/cc3200/mptask.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MPTASK_H -#define MICROPY_INCLUDED_CC3200_MPTASK_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define MICROPY_TASK_PRIORITY (2) -#define MICROPY_TASK_STACK_SIZE ((6 * 1024) + 512) // in bytes -#define MICROPY_TASK_STACK_LEN (MICROPY_TASK_STACK_SIZE / sizeof(StackType_t)) - -/****************************************************************************** - EXPORTED DATA - ******************************************************************************/ -extern StackType_t mpTaskStack[]; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void TASK_MicroPython (void *pvParameters); - -#endif // MICROPY_INCLUDED_CC3200_MPTASK_H diff --git a/ports/cc3200/mpthreadport.c b/ports/cc3200/mpthreadport.c deleted file mode 100644 index 9dbc518e06..0000000000 --- a/ports/cc3200/mpthreadport.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George on behalf of Pycom Ltd - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mpthread.h" -#include "py/mphal.h" -#include "mptask.h" -#include "task.h" -#include "irq.h" - -#if MICROPY_PY_THREAD - -// this structure forms a linked list, one node per active thread -typedef struct _thread_t { - TaskHandle_t id; // system id of thread - int ready; // whether the thread is ready and running - void *arg; // thread Python args, a GC root pointer - void *stack; // pointer to the stack - size_t stack_len; // number of words in the stack - struct _thread_t *next; -} thread_t; - -// the mutex controls access to the linked list -STATIC mp_thread_mutex_t thread_mutex; -STATIC thread_t thread_entry0; -STATIC thread_t *thread; // root pointer, handled bp mp_thread_gc_others - -void mp_thread_init(void) { - mp_thread_mutex_init(&thread_mutex); - mp_thread_set_state(&mp_state_ctx.thread); - - // create first entry in linked list of all threads - thread = &thread_entry0; - thread->id = xTaskGetCurrentTaskHandle(); - thread->ready = 1; - thread->arg = NULL; - thread->stack = mpTaskStack; - thread->stack_len = MICROPY_TASK_STACK_LEN; - thread->next = NULL; -} - -void mp_thread_gc_others(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - gc_collect_root((void**)&th, 1); - gc_collect_root(&th->arg, 1); // probably not needed - if (th->id == xTaskGetCurrentTaskHandle()) { - continue; - } - if (!th->ready) { - continue; - } - gc_collect_root(th->stack, th->stack_len); // probably not needed - } - mp_thread_mutex_unlock(&thread_mutex); -} - -mp_state_thread_t *mp_thread_get_state(void) { - return pvTaskGetThreadLocalStoragePointer(NULL, 0); -} - -void mp_thread_set_state(void *state) { - vTaskSetThreadLocalStoragePointer(NULL, 0, state); -} - -void mp_thread_start(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - if (th->id == xTaskGetCurrentTaskHandle()) { - th->ready = 1; - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -STATIC void *(*ext_thread_entry)(void*) = NULL; - -STATIC void freertos_entry(void *arg) { - if (ext_thread_entry) { - ext_thread_entry(arg); - } - vTaskDelete(NULL); - for (;;) { - } -} - -void mp_thread_create(void *(*entry)(void*), void *arg, size_t *stack_size) { - // store thread entry function into a global variable so we can access it - ext_thread_entry = entry; - - if (*stack_size == 0) { - *stack_size = 4096; // default stack size - } else if (*stack_size < 2048) { - *stack_size = 2048; // minimum stack size - } - - // allocate TCB, stack and linked-list node (must be outside thread_mutex lock) - StaticTask_t *tcb = m_new(StaticTask_t, 1); - StackType_t *stack = m_new(StackType_t, *stack_size / sizeof(StackType_t)); - thread_t *th = m_new_obj(thread_t); - - mp_thread_mutex_lock(&thread_mutex, 1); - - // create thread - TaskHandle_t id = xTaskCreateStatic(freertos_entry, "Thread", *stack_size / sizeof(void*), arg, 2, stack, tcb); - if (id == NULL) { - mp_thread_mutex_unlock(&thread_mutex); - mp_raise_msg(&mp_type_OSError, "can't create thread"); - } - - // add thread to linked list of all threads - th->id = id; - th->ready = 0; - th->arg = arg; - th->stack = stack; - th->stack_len = *stack_size / sizeof(StackType_t); - th->next = thread; - thread = th; - - mp_thread_mutex_unlock(&thread_mutex); - - // adjust stack_size to provide room to recover from hitting the limit - *stack_size -= 512; -} - -void mp_thread_finish(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - // TODO unlink from list - for (thread_t *th = thread; th != NULL; th = th->next) { - if (th->id == xTaskGetCurrentTaskHandle()) { - th->ready = 0; - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -void mp_thread_mutex_init(mp_thread_mutex_t *mutex) { - mutex->handle = xSemaphoreCreateMutexStatic(&mutex->buffer); -} - -// To allow hard interrupts to work with threading we only take/give the semaphore -// if we are not within an interrupt context and interrupts are enabled. - -int mp_thread_mutex_lock(mp_thread_mutex_t *mutex, int wait) { - if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) { - int ret = xSemaphoreTake(mutex->handle, wait ? portMAX_DELAY : 0); - return ret == pdTRUE; - } else { - return 1; - } -} - -void mp_thread_mutex_unlock(mp_thread_mutex_t *mutex) { - if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) { - xSemaphoreGive(mutex->handle); - // TODO check return value - } -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/cc3200/mpthreadport.h b/ports/cc3200/mpthreadport.h deleted file mode 100644 index dc9ba99204..0000000000 --- a/ports/cc3200/mpthreadport.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George on behalf of Pycom Ltd - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef BOOTLOADER -#include "FreeRTOS.h" -#endif - -typedef struct _mp_thread_mutex_t { - #ifndef BOOTLOADER - SemaphoreHandle_t handle; - StaticSemaphore_t buffer; - #endif -} mp_thread_mutex_t; - -void mp_thread_init(void); -void mp_thread_gc_others(void); diff --git a/ports/cc3200/qstrdefsport.h b/ports/cc3200/qstrdefsport.h deleted file mode 100644 index d5f22d70a8..0000000000 --- a/ports/cc3200/qstrdefsport.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// for machine module -Q(/) -// entries for sys.path -Q(/flash) -Q(/flash/lib) diff --git a/ports/cc3200/serverstask.c b/ports/cc3200/serverstask.c deleted file mode 100644 index 100b8d33b0..0000000000 --- a/ports/cc3200/serverstask.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mpconfig.h" -#include "py/misc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "serverstask.h" -#include "simplelink.h" -#include "debug.h" -#include "telnet.h" -#include "ftp.h" -#include "pybwdt.h" -#include "modusocket.h" -#include "mpexception.h" -#include "modnetwork.h" -#include "modwlan.h" - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct { - uint32_t timeout; - bool enabled; - bool do_disable; - bool do_enable; - bool do_reset; - bool do_wlan_cycle_power; -} servers_data_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -static servers_data_t servers_data = {.timeout = SERVERS_DEF_TIMEOUT_MS}; -static volatile bool sleep_sockets = false; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ - -// This is the static memory (TCB and stack) for the servers task -StaticTask_t svTaskTCB __attribute__ ((section (".rtos_heap"))); -StackType_t svTaskStack[SERVERS_STACK_LEN] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -char servers_user[SERVERS_USER_PASS_LEN_MAX + 1]; -char servers_pass[SERVERS_USER_PASS_LEN_MAX + 1]; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void TASK_Servers (void *pvParameters) { - - bool cycle = false; - - strcpy (servers_user, SERVERS_DEF_USER); - strcpy (servers_pass, SERVERS_DEF_PASS); - - telnet_init(); - ftp_init(); - - for ( ;; ) { - - if (servers_data.do_enable) { - // enable network services - telnet_enable(); - ftp_enable(); - // now set/clear the flags - servers_data.enabled = true; - servers_data.do_enable = false; - } - else if (servers_data.do_disable) { - // disable network services - telnet_disable(); - ftp_disable(); - // now clear the flags - servers_data.do_disable = false; - servers_data.enabled = false; - } - else if (servers_data.do_reset) { - // resetting the servers is needed to prevent half-open sockets - servers_data.do_reset = false; - if (servers_data.enabled) { - telnet_reset(); - ftp_reset(); - } - // and we should also close all user sockets. We do it here - // for convinience and to save on code size. - modusocket_close_all_user_sockets(); - } - - if (cycle) { - telnet_run(); - } - else { - ftp_run(); - } - - if (sleep_sockets) { - pybwdt_srv_sleeping(true); - modusocket_enter_sleep(); - pybwdt_srv_sleeping(false); - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS * 2); - if (servers_data.do_wlan_cycle_power) { - servers_data.do_wlan_cycle_power = false; - wlan_off_on(); - } - sleep_sockets = false; - - } - - // set the alive flag for the wdt - pybwdt_srv_alive(); - - // move to the next cycle - cycle = cycle ? false : true; - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS); - } -} - -void servers_start (void) { - servers_data.do_enable = true; - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS * 3); -} - -void servers_stop (void) { - servers_data.do_disable = true; - do { - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS); - } while (servers_are_enabled()); - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS * 3); -} - -void servers_reset (void) { - servers_data.do_reset = true; -} - -void servers_wlan_cycle_power (void) { - servers_data.do_wlan_cycle_power = true; -} - -bool servers_are_enabled (void) { - return servers_data.enabled; -} - -void server_sleep_sockets (void) { - sleep_sockets = true; - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS + 1); -} - -void servers_close_socket (int16_t *sd) { - if (*sd > 0) { - modusocket_socket_delete(*sd); - sl_Close(*sd); - *sd = -1; - } -} - -void servers_set_login (char *user, char *pass) { - if (strlen(user) > SERVERS_USER_PASS_LEN_MAX || strlen(pass) > SERVERS_USER_PASS_LEN_MAX) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - memcpy(servers_user, user, SERVERS_USER_PASS_LEN_MAX); - memcpy(servers_pass, pass, SERVERS_USER_PASS_LEN_MAX); -} - -void servers_set_timeout (uint32_t timeout) { - if (timeout < SERVERS_MIN_TIMEOUT_MS) { - // timeout is too low - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - servers_data.timeout = timeout; -} - -uint32_t servers_get_timeout (void) { - return servers_data.timeout; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ diff --git a/ports/cc3200/serverstask.h b/ports/cc3200/serverstask.h deleted file mode 100644 index c4533d7174..0000000000 --- a/ports/cc3200/serverstask.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_SERVERSTASK_H -#define MICROPY_INCLUDED_CC3200_SERVERSTASK_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define SERVERS_PRIORITY 2 -#define SERVERS_STACK_SIZE 1024 // in bytes -#define SERVERS_STACK_LEN (SERVERS_STACK_SIZE / sizeof(StackType_t)) - -#define SERVERS_SSID_LEN_MAX 16 -#define SERVERS_KEY_LEN_MAX 16 - -#define SERVERS_USER_PASS_LEN_MAX 32 - -#define SERVERS_CYCLE_TIME_MS 2 - -#define SERVERS_DEF_USER "micro" -#define SERVERS_DEF_PASS "python" -#define SERVERS_DEF_TIMEOUT_MS 300000 // 5 minutes -#define SERVERS_MIN_TIMEOUT_MS 5000 // 5 seconds - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ - -/****************************************************************************** - EXPORTED DATA - ******************************************************************************/ -extern StaticTask_t svTaskTCB; -extern StackType_t svTaskStack[]; -extern char servers_user[]; -extern char servers_pass[]; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void TASK_Servers (void *pvParameters); -extern void servers_start (void); -extern void servers_stop (void); -extern void servers_reset (void); -extern void servers_wlan_cycle_power (void); -extern bool servers_are_enabled (void); -extern void servers_close_socket (int16_t *sd); -extern void servers_set_login (char *user, char *pass); -extern void server_sleep_sockets (void); -extern void servers_set_timeout (uint32_t timeout); -extern uint32_t servers_get_timeout (void); - -#endif // MICROPY_INCLUDED_CC3200_SERVERSTASK_H diff --git a/ports/cc3200/simplelink/cc_pal.c b/ports/cc3200/simplelink/cc_pal.c deleted file mode 100644 index 7b0be5d13e..0000000000 --- a/ports/cc3200/simplelink/cc_pal.c +++ /dev/null @@ -1,517 +0,0 @@ -//***************************************************************************** -// cc_pal.c -// -// simplelink abstraction file for CC3200 -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//Simplelink includes -#include -#include - -//Driverlib includes -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -#define REG_INT_MASK_SET 0x400F7088 -#define REG_INT_MASK_CLR 0x400F708C -#define APPS_SOFT_RESET_REG 0x4402D000 -#define OCP_SHARED_MAC_RESET_REG 0x4402E168 - -#define SPI_RATE_20M 20000000 - -#define UNUSED(x) (x = x) - -// -// GLOBAL VARIABLES -- Start -// -volatile Fd_t g_SpiFd =0; -P_EVENT_HANDLER g_pHostIntHdl = NULL; - -// -// GLOBAL VARIABLES -- End -// - - -//**************************************************************************** -// LOCAL FUNCTION PROTOTYPES -//**************************************************************************** -static int spi_Read_CPU(unsigned char *pBuff, int len); -static int spi_Write_CPU(unsigned char *pBuff, int len); - -//**************************************************************************** -// LOCAL FUNCTION DEFINITIONS -//**************************************************************************** - -/*! - \brief attempts to read up to len bytes from SPI channel into a buffer starting at pBuff. - - \param pBuff - points to first location to start writing the data - - \param len - number of bytes to read from the SPI channel - - \return upon successful completion, the function shall return Read Size. - Otherwise, -1 shall be returned - - \sa spi_Read_CPU , spi_Write_CPU - \note - \warning -*/ -int spi_Read_CPU(unsigned char *pBuff, int len) -{ - unsigned long ulCnt; - unsigned long ulStatusReg; - unsigned long *ulDataIn; - unsigned long ulTxReg; - unsigned long ulRxReg; - - MAP_SPICSEnable(LSPI_BASE); - - // - // Initialize local variable. - // - ulDataIn = (unsigned long *)pBuff; - ulCnt = (len + 3) >> 2; - ulStatusReg = LSPI_BASE+MCSPI_O_CH0STAT; - ulTxReg = LSPI_BASE + MCSPI_O_TX0; - ulRxReg = LSPI_BASE + MCSPI_O_RX0; - - // - // Reading loop - // - while(ulCnt--) - { - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_TXS )); - HWREG(ulTxReg) = 0xFFFFFFFF; - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_RXS )); - *ulDataIn = HWREG(ulRxReg); - ulDataIn++; - } - - MAP_SPICSDisable(LSPI_BASE); - - return len; -} - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param pBuff - points to first location to start getting the data from - - \param len - number of bytes to write to the SPI channel - - \return upon successful completion, the function shall return write size. - Otherwise, -1 shall be returned - - \sa spi_Read_CPU , spi_Write_CPU - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked untill - the entire buffer write would be completed - \warning -*/ -int spi_Write_CPU(unsigned char *pBuff, int len) -{ - unsigned long ulCnt; - unsigned long ulStatusReg; - unsigned long *ulDataOut; - unsigned long ulDataIn; - unsigned long ulTxReg; - unsigned long ulRxReg; - - - MAP_SPICSEnable(LSPI_BASE); - - // - // Initialize local variable. - // - ulDataOut = (unsigned long *)pBuff; - ulCnt = (len +3 ) >> 2; - ulStatusReg = LSPI_BASE+MCSPI_O_CH0STAT; - ulTxReg = LSPI_BASE + MCSPI_O_TX0; - ulRxReg = LSPI_BASE + MCSPI_O_RX0; - - // - // Writing Loop - // - while(ulCnt--) - { - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_TXS )); - HWREG(ulTxReg) = *ulDataOut; - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_RXS )); - ulDataIn = HWREG(ulRxReg); - ulDataOut++; - } - - MAP_SPICSDisable(LSPI_BASE); - - UNUSED(ulDataIn); - return len; -} - -/*! - \brief open spi communication port to be used for communicating with a SimpleLink device - - Given an interface name and option flags, this function opens the spi communication port - and creates a file descriptor. This file descriptor can be used afterwards to read and - write data from and to this specific spi channel. - The SPI speed, clock polarity, clock phase, chip select and all other attributes are all - set to hardcoded values in this function. - - \param ifName - points to the interface name/path. The interface name is an - optional attributes that the simple link driver receives - on opening the device. in systems that the spi channel is - not implemented as part of the os device drivers, this - parameter could be NULL. - \param flags - option flags - - \return upon successful completion, the function shall open the spi channel and return - a non-negative integer representing the file descriptor. - Otherwise, -1 shall be returned - - \sa spi_Close , spi_Read , spi_Write - \note - \warning -*/ - -Fd_t spi_Open(char *ifName, unsigned long flags) -{ - unsigned long ulBase; - unsigned long ulSpiBitRate = SPI_RATE_20M; - - //NWP master interface - ulBase = LSPI_BASE; - - //Enable MCSPIA2 - MAP_PRCMPeripheralClkEnable(PRCM_LSPI,PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - //Disable Chip Select - MAP_SPICSDisable(ulBase); - - //Disable SPI Channel - MAP_SPIDisable(ulBase); - - // Reset SPI - MAP_SPIReset(ulBase); - - // - // Configure SPI interface - // - - MAP_SPIConfigSetExpClk(ulBase,MAP_PRCMPeripheralClockGet(PRCM_LSPI), - ulSpiBitRate,SPI_MODE_MASTER,SPI_SUB_MODE_0, - (SPI_SW_CTRL_CS | - SPI_4PIN_MODE | - SPI_TURBO_OFF | - SPI_CS_ACTIVEHIGH | - SPI_WL_32)); - - MAP_SPIEnable(ulBase); - - g_SpiFd = 1; - return g_SpiFd; -} -/*! - \brief closes an opened spi communication port - - \param fd - file descriptor of an opened SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open - \note - \warning -*/ -int spi_Close(Fd_t fd) -{ - unsigned long ulBase = LSPI_BASE; - - g_SpiFd = 0; - - //Disable Chip Select - MAP_SPICSDisable(LSPI_BASE); - - - //Disable SPI Channel - MAP_SPIDisable(ulBase); - - // Reset SPI - MAP_SPIReset(ulBase); - - // Disable SPI Peripheral - MAP_PRCMPeripheralClkDisable(PRCM_LSPI,PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - return 0; -} - -/*! - \brief closes an opened spi communication port - - \param fd - file descriptor of an opened SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open - \note - \warning -*/ - -int spi_Read(Fd_t fd, unsigned char *pBuff, int len) -{ - if (fd != 1 || g_SpiFd != 1) { - return -1; - } - - return spi_Read_CPU(pBuff, len); -} - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param fd - file descriptor of an opened SPI channel - - \param pBuff - points to first location to start getting the data from - - \param len - number of bytes to write to the SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open , spi_Read - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked untill - the entire buffer write would be completed - \warning -*/ -int spi_Write(Fd_t fd, unsigned char *pBuff, int len) -{ - if (fd != 1 || g_SpiFd != 1) { - return -1; - } - - return spi_Write_CPU(pBuff,len); -} - -/*! - \brief register an interrupt handler for the host IRQ - - \param InterruptHdl - pointer to interrupt handler function - - \param pValue - pointer to a memory strcuture that is passed to the interrupt handler. - - \return upon successful registration, the function shall return 0. - Otherwise, -1 shall be returned - - \sa - \note If there is already registered interrupt handler, the function should overwrite the old handler - with the new one - \warning -*/ - -int NwpRegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void* pValue) -{ - - if(InterruptHdl == NULL) - { - //De-register Interprocessor communication interrupt between App and NWP - #ifdef SL_PLATFORM_MULTI_THREADED - osi_InterruptDeRegister(INT_NWPIC); - #else - MAP_IntDisable(INT_NWPIC); - MAP_IntUnregister(INT_NWPIC); - MAP_IntPendClear(INT_NWPIC); - #endif - } - else - { - #ifdef SL_PLATFORM_MULTI_THREADED - MAP_IntPendClear(INT_NWPIC); - osi_InterruptRegister(INT_NWPIC, (P_OSI_INTR_ENTRY)InterruptHdl,INT_PRIORITY_LVL_1); - #else - MAP_IntRegister(INT_NWPIC, InterruptHdl); - MAP_IntPrioritySet(INT_NWPIC, INT_PRIORITY_LVL_1); - MAP_IntPendClear(INT_NWPIC); - MAP_IntEnable(INT_NWPIC); - #endif - } - - return 0; -} - - -/*! - \brief Masks host IRQ - - - \sa NwpUnMaskInterrupt - - \warning -*/ -void NwpMaskInterrupt() -{ - (*(unsigned long *)REG_INT_MASK_SET) = 0x1; -} - - -/*! - \brief Unmasks host IRQ - - - \sa NwpMaskInterrupt - - \warning -*/ -void NwpUnMaskInterrupt() -{ - (*(unsigned long *)REG_INT_MASK_CLR) = 0x1; -} - -#ifdef DEBUG -/*! - \brief Preamble to the enabling the Network Processor. - Placeholder to implement any pre-process operations - before enabling networking operations. - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec - -*/ -void NwpPowerOnPreamble(void) -{ - #define MAX_RETRY_COUNT 1000 - - unsigned int sl_stop_ind, apps_int_sts_raw, nwp_lpds_wake_cfg; - unsigned int retry_count; - /* Perform the sl_stop equivalent to ensure network services - are turned off if active */ - HWREG(0x400F70B8) = 1; /* APPs to NWP interrupt */ - UtilsDelay(800000/5); - - retry_count = 0; - nwp_lpds_wake_cfg = HWREG(0x4402D404); - sl_stop_ind = HWREG(0x4402E16C); - - if((nwp_lpds_wake_cfg != 0x20) && /* Check for NWP POR condition */ - !(sl_stop_ind & 0x2)) /* Check if sl_stop was executed */ - { - /* Loop until APPs->NWP interrupt is cleared or timeout */ - while(retry_count < MAX_RETRY_COUNT) - { - apps_int_sts_raw = HWREG(0x400F70C0); - if(apps_int_sts_raw & 0x1) - { - UtilsDelay(800000/5); - retry_count++; - } - else - { - break; - } - } - } - HWREG(0x400F70B0) = 1; /* Clear APPs to NWP interrupt */ - UtilsDelay(800000/5); - - /* Stop the networking services */ - NwpPowerOff(); -} -#endif - -/*! - \brief Enable the Network Processor - - \sa sl_DeviceDisable - - \note belongs to \ref ported_sec - -*/ -void NwpPowerOn(void) -{ - //bring the 1.32 eco out of reset - HWREG(0x4402E16C) &= 0xFFFFFFFD; - - //NWP Wakeup - HWREG(0x44025118) = 1; -#ifdef DEBUG - UtilsDelay(8000000); -#endif - - //UnMask Host Interrupt - NwpUnMaskInterrupt(); -} - - -/*! - \brief Disable the Network Processor - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec -*/ -void NwpPowerOff(void) -{ - //Must delay 300 usec to enable the NWP to finish all sl_stop activities - UtilsDelay(300*80/3); - - //Mask Host Interrupt - NwpMaskInterrupt(); - - //Switch to PFM Mode - HWREG(0x4402F024) &= 0xF7FFFFFF; - - //sl_stop eco for PG1.32 devices - HWREG(0x4402E16C) |= 0x2; - - UtilsDelay(800000); -} diff --git a/ports/cc3200/simplelink/cc_pal.h b/ports/cc3200/simplelink/cc_pal.h deleted file mode 100644 index 1cf83e7710..0000000000 --- a/ports/cc3200/simplelink/cc_pal.h +++ /dev/null @@ -1,202 +0,0 @@ -//***************************************************************************** -// cc_pal.h -// -// Simplelink abstraction header file for CC3200 -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __CC31xx_PAL_H__ -#define __CC31xx_PAL_H__ - -#ifdef __cplusplus -extern "C" { -#endif - - - - -/*! - \brief type definition for the spi channel file descriptor - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. -*/ -typedef int Fd_t; - - -/*! - \brief type definition for the host interrupt handler - - \param pValue - pointer to any memory strcuture. The value of this pointer is givven on - registration of a new interrupt handler - - \note -*/ - -typedef void (*SL_P_EVENT_HANDLER)(void); - -#define P_EVENT_HANDLER SL_P_EVENT_HANDLER - -/*! - \brief open spi communication port to be used for communicating with a SimpleLink device - - Given an interface name and option flags, this function opens the spi communication port - and creates a file descriptor. This file descriptor can be used afterwards to read and - write data from and to this specific spi channel. - The SPI speed, clock polarity, clock phase, chip select and all other attributes are all - set to hardcoded values in this function. - - \param ifName - points to the interface name/path. The interface name is an - optional attributes that the simple link driver receives - on opening the device. in systems that the spi channel is - not implemented as part of the os device drivers, this - parameter could be NULL. - \param flags - option flags - - \return upon successful completion, the function shall open the spi channel and return - a non-negative integer representing the file descriptor. - Otherwise, -1 shall be returned - - \sa spi_Close , spi_Read , spi_Write - \note - \warning -*/ -Fd_t spi_Open(char *ifName, unsigned long flags); - -/*! - \brief closes an opened spi communication port - - \param fd - file descriptor of an opened SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open - \note - \warning -*/ -int spi_Close(Fd_t fd); - -/*! - \brief attempts to read up to len bytes from SPI channel into a buffer starting at pBuff. - - \param fd - file descriptor of an opened SPI channel - - \param pBuff - points to first location to start writing the data - - \param len - number of bytes to read from the SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open , spi_Write - \note - \warning -*/ -int spi_Read(Fd_t fd, unsigned char *pBuff, int len); - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param fd - file descriptor of an opened SPI channel - - \param pBuff - points to first location to start getting the data from - - \param len - number of bytes to write to the SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open , spi_Read - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked untill - the entire buffer write would be completed - \warning -*/ -int spi_Write(Fd_t fd, unsigned char *pBuff, int len); - -/*! - \brief register an interrupt handler for the host IRQ - - \param InterruptHdl - pointer to interrupt handler function - - \param pValue - pointer to a memory strcuture that is passed to the interrupt handler. - - \return upon successful registration, the function shall return 0. - Otherwise, -1 shall be returned - - \sa - \note If there is already registered interrupt handler, the function should overwrite the old handler - with the new one - \warning -*/ -int NwpRegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void* pValue); - - -/*! - \brief Masks host IRQ - - - \sa NwpUnMaskInterrupt - - \warning -*/ -void NwpMaskInterrupt(); - - -/*! - \brief Unmasks host IRQ - - - \sa NwpMaskInterrupt - - \warning -*/ -void NwpUnMaskInterrupt(); - -void NwpPowerOnPreamble(void); - -void NwpPowerOff(void); - -void NwpPowerOn(void); - - -#ifdef __cplusplus -} -#endif // __cplusplus - - -#endif - diff --git a/ports/cc3200/simplelink/oslib/osi.h b/ports/cc3200/simplelink/oslib/osi.h deleted file mode 100644 index 11fe61bb63..0000000000 --- a/ports/cc3200/simplelink/oslib/osi.h +++ /dev/null @@ -1,580 +0,0 @@ -//***************************************************************************** -// osi.h -// -// MACRO and Function prototypes for TI-RTOS and Free-RTOS API calls -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list zof conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __OSI_H__ -#define __OSI_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define OSI_WAIT_FOREVER (0xFFFFFFFF) - -#define OSI_NO_WAIT (0) - -typedef enum -{ - OSI_OK = 0, - OSI_FAILURE = -1, - OSI_OPERATION_FAILED = -2, - OSI_ABORTED = -3, - OSI_INVALID_PARAMS = -4, - OSI_MEMORY_ALLOCATION_FAILURE = -5, - OSI_TIMEOUT = -6, - OSI_EVENTS_IN_USE = -7, - OSI_EVENT_OPEARTION_FAILURE = -8 -}OsiReturnVal_e; - - -//#define ENTER_CRITICAL_SECTION osi_EnterCritical() -//#define EXIT_CRITICAL_SECTION osi_ExitCritical() - -typedef void* OsiMsgQ_t; - - /*! - \brief type definition for a time value - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. -*/ -//typedef unsigned int OsiTime_t; -typedef unsigned int OsiTime_t; -/*! - \brief type definition for a sync object container - - Sync object is object used to synchronize between two threads or thread and interrupt handler. - One thread is waiting on the object and the other thread send a signal, which then - release the waiting thread. - The signal must be able to be sent from interrupt context. - This object is generally implemented by binary semaphore or events. - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. -*/ -//typedef unsigned int OsiSyncObj_t; -typedef void * OsiSyncObj_t; - -/*! - \brief type definition for a locking object container - - Locking object are used to protect a resource from mutual accesses of two or more threads. - The locking object should support re-entrant locks by a signal thread. - This object is generally implemented by mutex semaphore - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. -*/ -//typedef unsigned int OsiLockObj_t; -typedef void * OsiLockObj_t; - -/*! - \brief type definition for a spawn entry callback - - the spawn mechanism enable to run a function on different context. - This mechanism allow to transfer the execution context from interrupt context to thread context - or changing the context from an unknown user thread to general context. - The implementation of the spawn mechanism depends on the user's system requirements and could varies - from implementation of serialized execution using single thread to creating thread per call - - \note The stack size of the execution thread must be at least of TBD bytes! -*/ -typedef void (*P_OSI_SPAWN_ENTRY)(void* pValue); - -typedef void (*P_OSI_EVENT_HANDLER)(void* pValue); - -typedef void (*P_OSI_TASK_ENTRY)(void* pValue); - -typedef void (*P_OSI_INTR_ENTRY)(void); - -typedef void* OsiTaskHandle; - -/*! - \brief This function registers an interrupt in NVIC table - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param iIntrNum - Interrupt number to register - \param pEntry - Pointer to the interrupt handler - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_InterruptRegister(int iIntrNum,P_OSI_INTR_ENTRY pEntry,unsigned char ucPriority); - -/*! - \brief This function De-registers an interrupt in NVIC table - - \param iIntrNum - Interrupt number to register - \param pEntry - Pointer to the interrupt handler - - \return upon successful creation the function should return Positive number - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -void osi_InterruptDeRegister(int iIntrNum); - - -/*! - \brief This function creates a sync object - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param pSyncObj - pointer to the sync object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjCreate(OsiSyncObj_t* pSyncObj); - - -/*! - \brief This function deletes a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjDelete(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function generates a sync signal for the object. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signalling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignal(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function generates a sync signal for the object. - from ISR context. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signalling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function is called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignalFromISR(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function waits for a sync signal of the specific sync object - - \param pSyncObj - pointer to the sync object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the sync signal - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - \return upon successful reception of the signal within the timeout window return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjWait(OsiSyncObj_t* pSyncObj , OsiTime_t Timeout); - -/*! - \brief This function clears a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful clearing the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjClear(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function creates a locking object. - - The locking object is used for protecting a shared resources between different - threads. - - \param pLockObj - pointer to the locking object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_LockObjCreate(OsiLockObj_t* pLockObj); - -/*! - \brief This function deletes a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -#define osi_LockObjDelete osi_SyncObjDelete - -/*! - \brief This function locks a locking object. - - All other threads that call this function before this thread calls - the osi_LockObjUnlock would be suspended - - \param pLockObj - pointer to the locking object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the locking object - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - - \return upon successful reception of the locking object the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -#define osi_LockObjLock osi_SyncObjWait - -/*! - \brief This function unlock a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -#define osi_LockObjUnlock osi_SyncObjSignal - - -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -/*! - \brief This function creates a Task. - - Creates a new Task and add it to the last of tasks that are ready to run - - \param pEntry - pointer to the Task Function - \param pcName - Task Name String - \param usStackDepth - Stack Size Stack Size in 32-bit long words - \param pvParameters - pointer to structure to be passed to the Task Function - \param uxPriority - Task Priority - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_TaskCreate(P_OSI_TASK_ENTRY pEntry,const signed char * const pcName,unsigned short usStackDepth,void *pvParameters,unsigned long uxPriority,OsiTaskHandle *pTaskHandle); - -/*! - \brief This function Deletes a Task. - - Deletes a Task and remove it from list of running task - - \param pTaskHandle - Task Handle - - \note - \warning -*/ -void osi_TaskDelete(OsiTaskHandle* pTaskHandle); - -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_Spawn(P_OSI_SPAWN_ENTRY pEntry , void* pValue , unsigned long flags); - - -/******************************************************************************* - -This function creates a message queue that is typically used for inter thread -communication. - -Parameters: - - pMsgQ - pointer to the message queue control block - pMsgQName - pointer to the name of the message queue - MsgSize - the size of the message. - - NOTICE: THE MESSGAE SIZE MUST BE SMALLER THAN 16 - - MaxMsgs - maximum number of messages. - -Please note that this function allocates the entire memory required -for the maximum number of messages (MsgSize * MaxMsgs). - -********************************************************************************/ -OsiReturnVal_e osi_MsgQCreate(OsiMsgQ_t* pMsgQ , - char* pMsgQName, - unsigned long MsgSize, - unsigned long MaxMsgs); - -/******************************************************************************* - -This function deletes a specific message queue. -All threads suspended waiting for a message from this queue are resumed with -an error return value. - -Parameters: - - pMsgQ - pointer to the message queue control block - -********************************************************************************/ -OsiReturnVal_e osi_MsgQDelete(OsiMsgQ_t* pMsgQ); - - -/******************************************************************************* - -This function writes a message to a specific message queue. - -Notice that the message is copied to the queue from the memory area specified -by pMsg pointer. - --------------------------------------------------------------------------------- -THIS FUNCTION COULD BE CALLED FROM ISR AS LONG AS THE TIMEOUT PARAMETER IS -SET TO "OSI_NO_WAIT" --------------------------------------------------------------------------------- - -Parameters: - - pMsgQ - pointer to the message queue control block - pMsg - pointer to the message - Timeout - numeric value specifies the maximum number of mSec to stay - suspended while waiting for available space for the message - -********************************************************************************/ -OsiReturnVal_e osi_MsgQWrite(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout); - - -/******************************************************************************* - -This function retrieves a message from the specified message queue. The -retrieved message is copied from the queue into the memory area specified by -the pMsg pointer - -Parameters: - - pMsgQ - pointer to the message queue control block - pMsg - pointer that specify the location where to copy the message - Timeout - numeric value specifies the maximum number of mSec to stay - suspended while waiting for a message to be available - -********************************************************************************/ -OsiReturnVal_e osi_MsgQRead(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout); - -/*! - \brief This function starts the OS Scheduler - \param - void - \return - void - \note - \warning -*/ -void osi_start(); - -/*! - \brief Allocates Memory on Heap - \param Size - Size of the Buffer to be allocated - \sa - \note - \warning -*/ -void * mem_Malloc(unsigned long Size); - - -/*! - \brief Deallocates Memory - \param pMem - Pointer to the Buffer to be freed - \return void - \sa - \note - \warning -*/ -void mem_Free(void *pMem); - - -/*! - \brief Set Memory - \param pBuf - Pointer to the Buffer - \param Val - Value to be set - \param Size - Size of the memory to be set - \sa - \note - \warning -*/ -void mem_set(void *pBuf,int Val,size_t Size); - -/*! - \brief Copy Memory - \param pDst - Pointer to the Destination Buffer - \param pSrc - Pointer to the Source Buffer - \param Size - Size of the memory to be copied - \return void - \note - \warning -*/ -void mem_copy(void *pDst, void *pSrc,size_t Size); - -/*! - \brief Enter Critical Section - \sa - \note - \warning -*/ -void osi_EnterCritical(void); - -/*! - \brief Exit Critical Section - \sa - \note - \warning -*/ -void osi_ExitCritical(void); - -/*! - \brief This function used to save the os context before sleep - \param void - \return void - \note - \warning -*/ -void osi_ContextSave(); -/*! - \brief This function used to retrieve the context after sleep - \param void - \return void - \note - \warning -*/ -void osi_ContextRestore(); - -/*! - \brief This function used to suspend the task for the specified number of milli secs - \param MilliSecs - Time in millisecs to suspend the task - \return void - \note - \warning -*/ -void osi_Sleep(unsigned int MilliSecs); - -/*! - \brief This function used to disable the tasks - \param - void - \return - void - \note - \warning -*/ -void osi_TaskDisable(void); - -/*! - \brief This function used to enable all tasks - \param - void - \return - void - \note - \warning -*/ -void osi_TaskEnable(void); - -/*! - \brief structure definition for simple link spawn message - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. -*/ -typedef struct -{ - P_OSI_SPAWN_ENTRY pEntry; - void* pValue; -}tSimpleLinkSpawnMsg; - -/* The queue used to send message to simple link spawn task. */ -extern void* xSimpleLinkSpawnQueue; - -/* API for SL Task*/ -OsiReturnVal_e VStartSimpleLinkSpawnTask(unsigned long uxPriority); -void VDeleteSimpleLinkSpawnTask( void ); - - - -#ifdef __cplusplus -} -#endif // __cplusplus - -#endif diff --git a/ports/cc3200/simplelink/oslib/osi_freertos.c b/ports/cc3200/simplelink/oslib/osi_freertos.c deleted file mode 100644 index 53822add73..0000000000 --- a/ports/cc3200/simplelink/oslib/osi_freertos.c +++ /dev/null @@ -1,747 +0,0 @@ -//***************************************************************************** -// osi_freertos.c -// -// Interface APIs for free-rtos function calls -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - - -#include -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "semphr.h" -#include "portmacro.h" -#include "osi.h" -#include "rom_map.h" -#include "inc/hw_types.h" -#include "interrupt.h" -#include "pybwdt.h" -#include "debug.h" - -portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; -//Local function definition -static void vSimpleLinkSpawnTask( void *pvParameters ); -//Queue Handler -QueueHandle_t xSimpleLinkSpawnQueue = NULL; -TaskHandle_t xSimpleLinkSpawnTaskHndl = NULL; -// Queue size -#define slQUEUE_SIZE ( 3 ) -#define SL_SPAWN_MAX_WAIT_MS ( 200 ) - -// This is the static memory (TCB and stack) for the SL spawn task -static StaticTask_t spawnTaskTCB __attribute__ ((section (".rtos_heap"))); -static portSTACK_TYPE spawnTaskStack[896 / sizeof(portSTACK_TYPE)] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -/*! - \brief This function registers an interrupt in NVIC table - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param iIntrNum - Interrupt number to register - \param pEntry - Pointer to the interrupt handler - \param ucPriority - priority of the interrupt - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_InterruptRegister(int iIntrNum,P_OSI_INTR_ENTRY pEntry,unsigned char ucPriority) -{ - MAP_IntRegister(iIntrNum,(void(*)(void))pEntry); - MAP_IntPrioritySet(iIntrNum, ucPriority); - MAP_IntEnable(iIntrNum); - return OSI_OK; -} - -/*! - \brief This function De registers an interrupt in NVIC table - - - \param iIntrNum - Interrupt number to De register - - \return none - \note - \warning -*/ - -void osi_InterruptDeRegister(int iIntrNum) -{ - MAP_IntDisable(iIntrNum); - MAP_IntUnregister(iIntrNum); -} - -/*! - \brief This function creates a sync object - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param pSyncObj - pointer to the sync object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjCreate(OsiSyncObj_t* pSyncObj) -{ - SemaphoreHandle_t *pl_SyncObj = (SemaphoreHandle_t *)pSyncObj; - - *pl_SyncObj = xSemaphoreCreateBinary(); - - ASSERT (*pSyncObj != NULL); - - return OSI_OK; -} - -/*! - \brief This function deletes a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjDelete(OsiSyncObj_t* pSyncObj) -{ - vSemaphoreDelete(*pSyncObj ); - return OSI_OK; -} - -/*! - \brief This function generates a sync signal for the object. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signaling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignal(OsiSyncObj_t* pSyncObj) -{ - xSemaphoreGive( *pSyncObj ); - return OSI_OK; -} -/*! - \brief This function generates a sync signal for the object - from ISR context. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signalling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function is called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignalFromISR(OsiSyncObj_t* pSyncObj) -{ - xHigherPriorityTaskWoken = pdFALSE; - if(pdTRUE == xSemaphoreGiveFromISR( *pSyncObj, &xHigherPriorityTaskWoken )) - { - if( xHigherPriorityTaskWoken ) - { - taskYIELD (); - } - } - return OSI_OK; -} - -/*! - \brief This function waits for a sync signal of the specific sync object - - \param pSyncObj - pointer to the sync object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the sync signal - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - \return upon successful reception of the signal within the timeout window return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjWait(OsiSyncObj_t* pSyncObj , OsiTime_t Timeout) -{ - if(pdTRUE == xSemaphoreTake( (SemaphoreHandle_t)*pSyncObj, ( TickType_t )Timeout)) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function clears a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful clearing the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjClear(OsiSyncObj_t* pSyncObj) -{ - if (OSI_OK == osi_SyncObjWait(pSyncObj,0) ) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function creates a locking object. - - The locking object is used for protecting a shared resources between different - threads. - - \param pLockObj - pointer to the locking object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_LockObjCreate(OsiLockObj_t* pLockObj) -{ - SemaphoreHandle_t *pl_LockObj = (SemaphoreHandle_t *)pLockObj; - - vSemaphoreCreateBinary(*pl_LockObj); - - ASSERT (*pLockObj != NULL); - - return OSI_OK; -} - -/*! - \brief This function creates a Task. - - Creates a new Task and add it to the last of tasks that are ready to run - - \param pEntry - pointer to the Task Function - \param pcName - Task Name String - \param usStackDepth - Stack Size in bytes - \param pvParameters - pointer to structure to be passed to the Task Function - \param uxPriority - Task Priority - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_TaskCreate(P_OSI_TASK_ENTRY pEntry,const signed char * const pcName, - unsigned short usStackDepth, void *pvParameters, - unsigned long uxPriority,OsiTaskHandle* pTaskHandle) -{ - ASSERT (pdPASS == xTaskCreate( pEntry, (char const*)pcName, - (usStackDepth/(sizeof( portSTACK_TYPE ))), - pvParameters,(unsigned portBASE_TYPE)uxPriority, - (TaskHandle_t*)pTaskHandle )); - return OSI_OK; -} - - -/*! - \brief This function Deletes a Task. - - Deletes a Task and remove it from list of running task - - \param pTaskHandle - Task Handle - - \note - \warning -*/ -void osi_TaskDelete(OsiTaskHandle* pTaskHandle) -{ - vTaskDelete((TaskHandle_t)*pTaskHandle); -} - - - -/*! - \brief This function deletes a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e _osi_LockObjDelete(OsiLockObj_t* pLockObj) -{ - vSemaphoreDelete((SemaphoreHandle_t)*pLockObj ); - return OSI_OK; -} - -/*! - \brief This function locks a locking object. - - All other threads that call this function before this thread calls - the osi_LockObjUnlock would be suspended - - \param pLockObj - pointer to the locking object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the locking object - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - - \return upon successful reception of the locking object the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e _osi_LockObjLock(OsiLockObj_t* pLockObj , OsiTime_t Timeout) -{ - //Take Semaphore - if(pdTRUE == xSemaphoreTake( *pLockObj, ( TickType_t ) Timeout )) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function unlock a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e _osi_LockObjUnlock(OsiLockObj_t* pLockObj) -{ - //Release Semaphore - if(pdTRUE == xSemaphoreGive( *pLockObj )) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - - -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ - -OsiReturnVal_e osi_Spawn(P_OSI_SPAWN_ENTRY pEntry , void* pValue , unsigned long flags) -{ - - tSimpleLinkSpawnMsg Msg; - Msg.pEntry = pEntry; - Msg.pValue = pValue; - xHigherPriorityTaskWoken = pdFALSE; - - if(pdTRUE == xQueueSendFromISR( xSimpleLinkSpawnQueue, &Msg, &xHigherPriorityTaskWoken )) - { - if( xHigherPriorityTaskWoken ) - { - taskYIELD (); - } - return OSI_OK; - } - return OSI_OPERATION_FAILED; -} - - -/*! - \brief This is the simplelink spawn task to call SL callback from a different context - - \param pvParameters - pointer to the task parameter - - \return void - \note - \warning -*/ -void vSimpleLinkSpawnTask(void *pvParameters) -{ - tSimpleLinkSpawnMsg Msg; - portBASE_TYPE ret; - - for(;;) - { - ret = xQueueReceive( xSimpleLinkSpawnQueue, &Msg, SL_SPAWN_MAX_WAIT_MS); - if(ret == pdPASS) - { - Msg.pEntry(Msg.pValue); - } - // set the alive flag for the wdt - pybwdt_sl_alive(); - } -} - -/*! - \brief This is the API to create SL spawn task and create the SL queue - - \param uxPriority - task priority - - \return void - \note - \warning -*/ -__attribute__ ((section (".boot"))) -OsiReturnVal_e VStartSimpleLinkSpawnTask(unsigned portBASE_TYPE uxPriority) -{ - xSimpleLinkSpawnQueue = xQueueCreate( slQUEUE_SIZE, sizeof( tSimpleLinkSpawnMsg ) ); - ASSERT (xSimpleLinkSpawnQueue != NULL); - - /* - // This is the original code to create a task dynamically - ASSERT (pdPASS == xTaskCreate( vSimpleLinkSpawnTask, ( portCHAR * ) "SLSPAWN",\ - 896 / sizeof(portSTACK_TYPE), NULL, uxPriority, &xSimpleLinkSpawnTaskHndl )); - */ - - // This code creates the task using static memory for the TCB and stack - xSimpleLinkSpawnTaskHndl = xTaskCreateStatic( - vSimpleLinkSpawnTask, ( portCHAR * ) "SLSPAWN", - 896 / sizeof(portSTACK_TYPE), NULL, uxPriority, - spawnTaskStack, &spawnTaskTCB); - - ASSERT(xSimpleLinkSpawnTaskHndl != NULL); - - return OSI_OK; -} - -/*! - \brief This is the API to delete SL spawn task and delete the SL queue - - \param none - - \return void - \note - \warning -*/ -void VDeleteSimpleLinkSpawnTask( void ) -{ - if(xSimpleLinkSpawnTaskHndl) - { - vTaskDelete( xSimpleLinkSpawnTaskHndl ); - xSimpleLinkSpawnTaskHndl = 0; - } - - if(xSimpleLinkSpawnQueue) - { - vQueueDelete( xSimpleLinkSpawnQueue ); - xSimpleLinkSpawnQueue = 0; - } -} - -/*! - \brief This function is used to create the MsgQ - - \param pMsgQ - pointer to the message queue - \param pMsgQName - msg queue name - \param MsgSize - size of message on the queue - \param MaxMsgs - max. number of msgs that the queue can hold - - \return - OsiReturnVal_e - \note - \warning -*/ -OsiReturnVal_e osi_MsgQCreate(OsiMsgQ_t* pMsgQ , - char* pMsgQName, - unsigned long MsgSize, - unsigned long MaxMsgs) -{ - QueueHandle_t handle; - - //Create Queue - handle = xQueueCreate( MaxMsgs, MsgSize ); - ASSERT (handle != NULL); - - *pMsgQ = (OsiMsgQ_t)handle; - return OSI_OK; -} -/*! - \brief This function is used to delete the MsgQ - - \param pMsgQ - pointer to the message queue - - \return - OsiReturnVal_e - \note - \warning -*/ -OsiReturnVal_e osi_MsgQDelete(OsiMsgQ_t* pMsgQ) -{ - vQueueDelete((QueueHandle_t) *pMsgQ ); - return OSI_OK; -} -/*! - \brief This function is used to write data to the MsgQ - - \param pMsgQ - pointer to the message queue - \param pMsg - pointer to the Msg strut to read into - \param Timeout - timeout to wait for the Msg to be available - - \return - OsiReturnVal_e - \note - \warning -*/ - -OsiReturnVal_e osi_MsgQWrite(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout) -{ - xHigherPriorityTaskWoken = pdFALSE; - if(pdPASS == xQueueSendFromISR((QueueHandle_t) *pMsgQ, pMsg, &xHigherPriorityTaskWoken )) - { - taskYIELD (); - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} -/*! - \brief This function is used to read data from the MsgQ - - \param pMsgQ - pointer to the message queue - \param pMsg - pointer to the Msg strut to read into - \param Timeout - timeout to wait for the Msg to be available - - \return - OsiReturnVal_e - \note - \warning -*/ - -OsiReturnVal_e osi_MsgQRead(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout) -{ - //Receive Item from Queue - if( pdTRUE == xQueueReceive((QueueHandle_t)*pMsgQ,pMsg,Timeout) ) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function to call the memory de-allocation function of the FREERTOS - - \param Size - size of memory to alloc in bytes - - \return - void * - \note - \warning -*/ - -void * mem_Malloc(unsigned long Size) -{ - return ( void * ) pvPortMalloc( (size_t)Size ); -} - -/*! - \brief This function to call the memory de-allocation function of the FREERTOS - - \param pMem - pointer to the memory which needs to be freed - - \return - void - \note - \warning -*/ -void mem_Free(void *pMem) -{ - vPortFree( pMem ); -} - -/*! - \brief This function call the memset function - \param pBuf - pointer to the memory to be fill - \param Val - Value to be fill - \param Size - Size of the memory which needs to be fill - \return - void - \note - \warning -*/ - -void mem_set(void *pBuf,int Val,size_t Size) -{ - memset( pBuf,Val,Size); -} - -/*! - \brief This function call the memcopy function - \param pDst - pointer to the destination - \param pSrc - pointer to the source - \param Size - Size of the memory which needs to be copy - - \return - void - \note - \warning -*/ -void mem_copy(void *pDst, void *pSrc,size_t Size) -{ - memcpy(pDst,pSrc,Size); -} - - -/*! - \brief This function use to entering into critical section - \param void - \return - void - \note - \warning -*/ - -void osi_EnterCritical(void) -{ - vPortEnterCritical(); -} - -/*! - \brief This function use to exit critical section - \param void - \return - void - \note - \warning -*/ - -void osi_ExitCritical(void) -{ - vPortExitCritical(); -} -/*! - \brief This function used to start the scheduler - \param void - \return - void - \note - \warning -*/ -__attribute__ ((section (".boot"))) -void osi_start() -{ - vTaskStartScheduler(); -} -/*! - \brief This function used to suspend the task for the specified number of milli secs - \param MilliSecs - Time in millisecs to suspend the task - \return - void - \note - \warning -*/ -void osi_Sleep(unsigned int MilliSecs) -{ - vTaskDelay(MilliSecs); -} - - -/*! - \brief This function used to disable the tasks - \param - void - \return - Key with the suspended tasks - \note - \warning -*/ -void osi_TaskDisable(void) -{ - vTaskSuspendAll(); -} - - -/*! - \brief This function used to resume all the tasks - \param key - returned from suspend tasks - \return - void - \note - \warning -*/ -void osi_TaskEnable(void) -{ - xTaskResumeAll(); -} - -/*! - \brief This function used to save the OS context before sleep - \param void - \return - void - \note - \warning -*/ -void osi_ContextSave() -{ - -} -/*! - \brief This function used to restore the OS context after sleep - \param void - \return - void - \note - \warning -*/ -void osi_ContextRestore() -{ - -} diff --git a/ports/cc3200/simplelink/user.h b/ports/cc3200/simplelink/user.h deleted file mode 100644 index d3f6d4adfb..0000000000 --- a/ports/cc3200/simplelink/user.h +++ /dev/null @@ -1,1063 +0,0 @@ -/* - * user.h - CC31xx/CC32xx Host Driver Implementation - * - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * -*/ - - - -#ifndef __USER_H__ -#define __USER_H__ - -#ifdef __cplusplus -extern "C" { -#endif - - - - - -/*! - ****************************************************************************** - - \defgroup porting_user_include Porting - User Include Files - - This section IS NOT REQUIRED in case user provided primitives are handled - in makefiles or project configurations (IDE) - - PORTING ACTION: - - Include all required header files for the definition of: - -# Transport layer library API (e.g. SPI, UART) - -# OS primitives definitions (e.g. Task spawn, Semaphores) - -# Memory management primitives (e.g. alloc, free) - - ****************************************************************************** - */ - -#include -#include "cc_pal.h" -#include "debug.h" - -/*! - \def MAX_CONCURRENT_ACTIONS - - \brief Defines the maximum number of concurrent action in the system - Min:1 , Max: 32 - - Actions which has async events as return, can be - - \sa - - \note In case there are not enough resources for the actions needed in the system, - error is received: POOL_IS_EMPTY - one option is to increase MAX_CONCURRENT_ACTIONS - (improves performance but results in memory consumption) - Other option is to call the API later (decrease performance) - - \warning In case of setting to one, recommend to use non-blocking recv\recvfrom to allow - multiple socket recv -*/ -#define MAX_CONCURRENT_ACTIONS 10 -/*! - \def CPU_FREQ_IN_MHZ - \brief Defines CPU frequency for Host side, for better accuracy of busy loops, if any - \sa - \note - - \warning If not set the default CPU frequency is set to 200MHz - This option will be deprecated in future release -*/ - -#define CPU_FREQ_IN_MHZ 80 - - -/*! - ****************************************************************************** - - \defgroup porting_capabilities Porting - Capabilities Set - - This section IS NOT REQUIRED in case one of the following pre defined - capabilities set is in use: - - SL_TINY - - SL_SMALL - - SL_FULL - - PORTING ACTION: - - Define one of the pre-defined capabilities set or uncomment the - relevant definitions below to select the required capabilities - - @{ - - ******************************************************************************* -*/ - -/*! - \def SL_INC_ARG_CHECK - - \brief Defines whether the SimpleLink driver perform argument check - or not - - When defined, the SimpleLink driver perform argument check on - function call. Removing this define could reduce some code - size and improve slightly the performances but may impact in - unpredictable behavior in case of invalid arguments - - \sa - - \note belongs to \ref proting_sec - - \warning Removing argument check may cause unpredictable behavior in - case of invalid arguments. - In this case the user is responsible to argument validity - (for example all handlers must not be NULL) -*/ -#define SL_INC_ARG_CHECK - - -/*! - \def SL_INC_STD_BSD_API_NAMING - - \brief Defines whether SimpleLink driver should expose standard BSD - APIs or not - - When defined, the SimpleLink driver in addtion to its alternative - BSD APIs expose also standard BSD APIs. - Stadrad BSD API includs the following functions: - socket , close , accept , bind , listen , connect , select , - setsockopt , getsockopt , recv , recvfrom , write , send , sendto , - gethostbyname - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -/* #define SL_INC_STD_BSD_API_NAMING */ - - -/*! - \brief Defines whether to include extended API in SimpleLink driver - or not - - When defined, the SimpleLink driver will include also all - exteded API of the included packages - - \sa ext_api - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_EXT_API - -/*! - \brief Defines whether to include WLAN package in SimpleLink driver - or not - - When defined, the SimpleLink driver will include also - the WLAN package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_WLAN_PKG - -/*! - \brief Defines whether to include SOCKET package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also - the SOCKET package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCKET_PKG - -/*! - \brief Defines whether to include NET_APP package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also the - NET_APP package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_NET_APP_PKG - -/*! - \brief Defines whether to include NET_CFG package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also - the NET_CFG package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_NET_CFG_PKG - -/*! - \brief Defines whether to include NVMEM package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also the - NVMEM package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_NVMEM_PKG - -/*! - \brief Defines whether to include socket server side APIs - in SimpleLink driver or not - - When defined, the SimpleLink driver will include also socket - server side APIs - - \sa server_side - - \note - - \warning -*/ -#define SL_INC_SOCK_SERVER_SIDE_API - -/*! - \brief Defines whether to include socket client side APIs in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also socket - client side APIs - - \sa client_side - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCK_CLIENT_SIDE_API - -/*! - \brief Defines whether to include socket receive APIs in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also socket - receive side APIs - - \sa recv_api - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCK_RECV_API - -/*! - \brief Defines whether to include socket send APIs in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also socket - send side APIs - - \sa send_api - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCK_SEND_API - -/*! - - Close the Doxygen group. - @} - - */ - - -/*! - ****************************************************************************** - - \defgroup ported_enable_device Ported on CC32XX - Device Enable/Disable - - The enable/disable API provide mechanism to enable/disable the network processor - - - PORTING ACTION: - - None - @{ - - ****************************************************************************** - */ - -/*! - \brief Preamble to the enabling the Network Processor. - Placeholder to implement any pre-process operations - before enabling networking operations. - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec - -*/ -#ifdef DEBUG -#define sl_DeviceEnablePreamble() NwpPowerOnPreamble() -#else -#define sl_DeviceEnablePreamble() -#endif - -/*! - \brief Enable the Network Processor - - \sa sl_DeviceDisable - - \note belongs to \ref ported_sec - -*/ -#define sl_DeviceEnable() NwpPowerOn() - -/*! - \brief Disable the Network Processor - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec -*/ -#define sl_DeviceDisable() NwpPowerOff() - -/*! - - Close the Doxygen group. - @} - - */ - -/*! - ****************************************************************************** - - \defgroup ported_interface Ported on CC32XX - Communication Interface - - The simple link device can work with different communication - channels (e.g. spi/uart). Texas Instruments provides single driver - that can work with all these types. This section bind between the - physical communication interface channel and the SimpleLink driver - - - \note Correct and efficient implementation of this driver is critical - for the performances of the SimpleLink device on this platform. - - - PORTING ACTION: - - None - - @{ - - ****************************************************************************** -*/ - -#define _SlFd_t Fd_t - -/*! - \brief Opens an interface communication port to be used for communicating - with a SimpleLink device - - Given an interface name and option flags, this function opens - the communication port and creates a file descriptor. - This file descriptor is used afterwards to read and write - data from and to this specific communication channel. - The speed, clock polarity, clock phase, chip select and all other - specific attributes of the channel are all should be set to hardcoded - in this function. - - \param ifName - points to the interface name/path. The interface name is an - optional attributes that the simple link driver receives - on opening the driver (sl_Start). - In systems that the spi channel is not implemented as - part of the os device drivers, this parameter could be NULL. - - \param flags - optional flags parameters for future use - - \return upon successful completion, the function shall open the channel - and return a non-negative integer representing the file descriptor. - Otherwise, -1 shall be returned - - \sa sl_IfClose , sl_IfRead , sl_IfWrite - - \note The prototype of the function is as follow: - Fd_t xxx_IfOpen(char* pIfName , unsigned long flags); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfOpen spi_Open - -/*! - \brief Closes an opened interface communication port - - \param fd - file descriptor of opened communication channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa sl_IfOpen , sl_IfRead , sl_IfWrite - - \note The prototype of the function is as follow: - int xxx_IfClose(Fd_t Fd); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfClose spi_Close - -/*! - \brief Attempts to read up to len bytes from an opened communication channel - into a buffer starting at pBuff. - - \param fd - file descriptor of an opened communication channel - - \param pBuff - pointer to the first location of a buffer that contains enough - space for all expected data - - \param len - number of bytes to read from the communication channel - - \return upon successful completion, the function shall return the number of read bytes. - Otherwise, 0 shall be returned - - \sa sl_IfClose , sl_IfOpen , sl_IfWrite - - - \note The prototype of the function is as follow: - int xxx_IfRead(Fd_t Fd , char* pBuff , int Len); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfRead spi_Read - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param fd - file descriptor of an opened communication channel - - \param pBuff - pointer to the first location of a buffer that contains - the data to send over the communication channel - - \param len - number of bytes to write to the communication channel - - \return upon successful completion, the function shall return the number of sent bytes. - therwise, 0 shall be returned - - \sa sl_IfClose , sl_IfOpen , sl_IfRead - - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked until - the entire buffer write would be completed - - The prototype of the function is as follow: - int xxx_IfWrite(Fd_t Fd , char* pBuff , int Len); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfWrite spi_Write - -/*! - \brief register an interrupt handler routine for the host IRQ - - \param InterruptHdl - pointer to interrupt handler routine - - \param pValue - pointer to a memory structure that is passed - to the interrupt handler. - - \return upon successful registration, the function shall return 0. - Otherwise, -1 shall be returned - - \sa - - \note If there is already registered interrupt handler, the function - should overwrite the old handler with the new one - - \note If the handler is a null pointer, the function should un-register the - interrupt handler, and the interrupts can be disabled. - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfRegIntHdlr(InterruptHdl , pValue) NwpRegisterInterruptHandler(InterruptHdl , pValue) - -/*! - \brief Masks the Host IRQ - - \sa sl_IfUnMaskIntHdlr - - - - \note belongs to \ref ported_sec - - \warning -*/ - - -#define sl_IfMaskIntHdlr() NwpMaskInterrupt() - -/*! - \brief Unmasks the Host IRQ - - \sa sl_IfMaskIntHdlr - - - - \note belongs to \ref ported_sec - - \warning -*/ - -#define sl_IfUnMaskIntHdlr() NwpUnMaskInterrupt() - -/*! - \brief Write Handers for statistics debug on write - - \param interface handler - pointer to interrupt handler routine - - - \return no return value - - \sa - - \note An optional hooks for monitoring before and after write info - - \note belongs to \ref ported_sec - - \warning -*/ -/* #define SL_START_WRITE_STAT */ - - -/*! - - Close the Doxygen group. - @} - -*/ - -/*! - ****************************************************************************** - - \defgroup ported_os Ported on CC32XX - Operating System - - The simple link driver can run on multi-threaded environment as well - as non-os environment (mail loop) - - This section IS NOT REQUIRED in case you are working on non-os environment. - - If you choose to work in multi-threaded environment under any operating system - you will have to provide some basic adaptation routines to allow the driver - to protect access to resources from different threads (locking object) and - to allow synchronization between threads (sync objects). - - PORTING ACTION: - -# Uncomment SL_PLATFORM_MULTI_THREADED define - -# Bind locking object routines - -# Bind synchronization object routines - -# Optional - Bind spawn thread routine - - @{ - - ****************************************************************************** -*/ - -#define SL_PLATFORM_MULTI_THREADED - - -#ifdef SL_PLATFORM_MULTI_THREADED -#include "osi.h" - - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define SL_OS_RET_CODE_OK ((int)OSI_OK) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define SL_OS_WAIT_FOREVER ((OsiTime_t)OSI_WAIT_FOREVER) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define SL_OS_NO_WAIT ((OsiTime_t)OSI_NO_WAIT) - -/*! - \brief type definition for a time value - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. - - \note belongs to \ref ported_sec -*/ -#define _SlTime_t OsiTime_t - -/*! - \brief type definition for a sync object container - - Sync object is object used to synchronize between two threads or thread and interrupt handler. - One thread is waiting on the object and the other thread send a signal, which then - release the waiting thread. - The signal must be able to be sent from interrupt context. - This object is generally implemented by binary semaphore or events. - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. - - \note belongs to \ref ported_sec -*/ -typedef OsiSyncObj_t _SlSyncObj_t; - - -/*! - \brief This function creates a sync object - - The sync object is used for synchronization between diffrent thread or ISR and - a thread. - - \param pSyncObj - pointer to the sync object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - - \note belongs to \ref ported_sec - \warning -*/ -#define sl_SyncObjCreate(pSyncObj,pName) osi_SyncObjCreate(pSyncObj) - - -/*! - \brief This function deletes a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_SyncObjDelete(pSyncObj) osi_SyncObjDelete(pSyncObj) - - -/*! - \brief This function generates a sync signal for the object. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signaling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -#define sl_SyncObjSignal(pSyncObj) osi_SyncObjSignal(pSyncObj) - -/*! - \brief This function generates a sync signal for the object from Interrupt - - This is for RTOS that should signal from IRQ using a dedicated API - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signaling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -#define sl_SyncObjSignalFromIRQ(pSyncObj) osi_SyncObjSignalFromISR(pSyncObj) - -/*! - \brief This function waits for a sync signal of the specific sync object - - \param pSyncObj - pointer to the sync object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the sync signal - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - \return upon successful reception of the signal within the timeout window return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_SyncObjWait(pSyncObj,Timeout) osi_SyncObjWait(pSyncObj,Timeout) - -/*! - \brief type definition for a locking object container - - Locking object are used to protect a resource from mutual accesses of two or more threads. - The locking object should suppurt reentrant locks by a signal thread. - This object is generally implemented by mutex semaphore - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. - \note belongs to \ref ported_sec -*/ -typedef OsiLockObj_t _SlLockObj_t; - -/*! - \brief This function creates a locking object. - - The locking object is used for protecting a shared resources between different - threads. - - \param pLockObj - pointer to the locking object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjCreate(pLockObj,pName) osi_LockObjCreate(pLockObj) - -/*! - \brief This function deletes a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjDelete(pLockObj) osi_LockObjDelete(pLockObj) - -/*! - \brief This function locks a locking object. - - All other threads that call this function before this thread calls - the osi_LockObjUnlock would be suspended - - \param pLockObj - pointer to the locking object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the locking object - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - - \return upon successful reception of the locking object the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjLock(pLockObj,Timeout) osi_LockObjLock(pLockObj,Timeout) - -/*! - \brief This function unlock a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjUnlock(pLockObj) osi_LockObjUnlock(pLockObj) - -#endif -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define SL_PLATFORM_EXTERNAL_SPAWN - -#ifdef SL_PLATFORM_EXTERNAL_SPAWN -#define sl_Spawn(pEntry,pValue,flags) osi_Spawn(pEntry,pValue,flags) -#endif - -/*! - - Close the Doxygen group. - @} - - */ -/*! - ****************************************************************************** - - \defgroup porting_mem_mgm Porting - Memory Management - - This section declare in which memory management model the SimpleLink driver - will run: - -# Static - -# Dynamic - - This section IS NOT REQUIRED in case Static model is selected. - - The default memory model is Static - - PORTING ACTION: - - If dynamic model is selected, define the alloc and free functions. - - @{ - - ***************************************************************************** -*/ - -/*! - \brief Defines whether the SimpleLink driver is working in dynamic - memory model or not - - When defined, the SimpleLink driver use dynamic allocations - if dynamic allocation is selected malloc and free functions - must be retrieved - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define SL_MEMORY_MGMT_DYNAMIC 1 -#define SL_MEMORY_MGMT_STATIC 0 - -#define SL_MEMORY_MGMT SL_MEMORY_MGMT_DYNAMIC - -#ifdef SL_MEMORY_MGMT_DYNAMIC -#ifdef SL_PLATFORM_MULTI_THREADED - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Malloc(Size) mem_Malloc(Size) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Free(pMem) mem_Free(pMem) -#else -#include -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Malloc(Size) malloc(Size) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Free(pMem) free(pMem) -#endif -#endif -/*! - - Close the Doxygen group. - @} - - */ - - -/*! - ****************************************************************************** - - \defgroup porting_events Porting - Event Handlers - - This section includes the asynchronous event handlers routines - - PORTING ACTION: - -Uncomment the required handler and define your routine as the value - of this handler - - @{ - - ****************************************************************************** - */ - -/*! - \brief - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_GeneralEvtHdlr SimpleLinkGeneralEventHandler - - -/*! - \brief An event handler for WLAN connection or disconnection indication - This event handles async WLAN events. - Possible events are: - SL_WLAN_CONNECT_EVENT - indicates WLAN is connected - SL_WLAN_DISCONNECT_EVENT - indicates WLAN is disconnected - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_WlanEvtHdlr SimpleLinkWlanEventHandler - - -/*! - \brief An event handler for IP address asynchronous event. Usually accepted after new WLAN connection. - This event handles networking events. - Possible events are: - SL_NETAPP_IPV4_ACQUIRED - IP address was acquired (DHCP or Static) - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_NetAppEvtHdlr SimpleLinkNetAppEventHandler - -/*! - \brief A callback for HTTP server events. - Possible events are: - SL_NETAPP_HTTPGETTOKENVALUE - NWP requests to get the value of a specific token - SL_NETAPP_HTTPPOSTTOKENVALUE - NWP post to the host a new value for a specific token - - \param pServerEvent - Contains the relevant event information (SL_NETAPP_HTTPGETTOKENVALUE or SL_NETAPP_HTTPPOSTTOKENVALUE) - - \param pServerResponse - Should be filled by the user with the relevant response information (i.e SL_NETAPP_HTTPSETTOKENVALUE as a response to SL_NETAPP_HTTPGETTOKENVALUE event) - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_HttpServerCallback SimpleLinkHttpServerCallback -/*! - \brief - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_SockEvtHdlr SimpleLinkSockEventHandler - - - -#define _SL_USER_TYPES -#define _u8 unsigned char -#define _i8 signed char - -#define _u16 unsigned short -#define _i16 signed short - -#define _u32 unsigned int -#define _i32 signed int -#define _volatile volatile -#define _const const - - - -/*! - - Close the Doxygen group. - @} - - */ - - -#ifdef __cplusplus -} -#endif // __cplusplus - -#endif // __USER_H__ diff --git a/ports/cc3200/telnet/telnet.c b/ports/cc3200/telnet/telnet.c deleted file mode 100644 index dbb77cd6d7..0000000000 --- a/ports/cc3200/telnet/telnet.c +++ /dev/null @@ -1,498 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/mphal.h" -#include "lib/utils/interrupt_char.h" -#include "telnet.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "modusocket.h" -#include "debug.h" -#include "mpexception.h" -#include "serverstask.h" -#include "genhdr/mpversion.h" -#include "irq.h" - -/****************************************************************************** - DEFINE PRIVATE CONSTANTS - ******************************************************************************/ -#define TELNET_PORT 23 -// rxRindex and rxWindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 -#define TELNET_RX_BUFFER_SIZE 256 -#define TELNET_MAX_CLIENTS 1 -#define TELNET_TX_RETRIES_MAX 50 -#define TELNET_WAIT_TIME_MS 5 -#define TELNET_LOGIN_RETRIES_MAX 3 -#define TELNET_CYCLE_TIME_MS (SERVERS_CYCLE_TIME_MS * 2) - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef enum { - E_TELNET_RESULT_OK = 0, - E_TELNET_RESULT_AGAIN, - E_TELNET_RESULT_FAILED -} telnet_result_t; - -typedef enum { - E_TELNET_STE_DISABLED = 0, - E_TELNET_STE_START, - E_TELNET_STE_LISTEN, - E_TELNET_STE_CONNECTED, - E_TELNET_STE_LOGGED_IN -} telnet_state_t; - -typedef enum { - E_TELNET_STE_SUB_WELCOME, - E_TELNET_STE_SUB_SND_USER_OPTIONS, - E_TELNET_STE_SUB_REQ_USER, - E_TELNET_STE_SUB_GET_USER, - E_TELNET_STE_SUB_REQ_PASSWORD, - E_TELNET_STE_SUB_SND_PASSWORD_OPTIONS, - E_TELNET_STE_SUB_GET_PASSWORD, - E_TELNET_STE_SUB_INVALID_LOGGIN, - E_TELNET_STE_SUB_SND_REPL_OPTIONS, - E_TELNET_STE_SUB_LOGGIN_SUCCESS -} telnet_connected_substate_t; - -typedef union { - telnet_connected_substate_t connected; -} telnet_substate_t; - -typedef struct { - uint8_t *rxBuffer; - uint32_t timeout; - telnet_state_t state; - telnet_substate_t substate; - int16_t sd; - int16_t n_sd; - - // rxRindex and rxWindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 - uint8_t rxWindex; - uint8_t rxRindex; - - uint8_t txRetries; - uint8_t logginRetries; - bool enabled; - bool credentialsValid; -} telnet_data_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -static telnet_data_t telnet_data; -static const char* telnet_welcome_msg = "MicroPython " MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE "; " MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME "\r\n"; -static const char* telnet_request_user = "Login as: "; -static const char* telnet_request_password = "Password: "; -static const char* telnet_invalid_loggin = "\r\nInvalid credentials, try again.\r\n"; -static const char* telnet_loggin_success = "\r\nLogin succeeded!\r\nType \"help()\" for more information.\r\n"; -static const uint8_t telnet_options_user[] = // IAC WONT ECHO IAC WONT SUPPRESS_GO_AHEAD IAC WILL LINEMODE - { 255, 252, 1, 255, 252, 3, 255, 251, 34 }; -static const uint8_t telnet_options_pass[] = // IAC WILL ECHO IAC WONT SUPPRESS_GO_AHEAD IAC WILL LINEMODE - { 255, 251, 1, 255, 252, 3, 255, 251, 34 }; -static const uint8_t telnet_options_repl[] = // IAC WILL ECHO IAC WILL SUPPRESS_GO_AHEAD IAC WONT LINEMODE - { 255, 251, 1, 255, 251, 3, 255, 252, 34 }; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -static void telnet_wait_for_enabled (void); -static bool telnet_create_socket (void); -static void telnet_wait_for_connection (void); -static void telnet_send_and_proceed (void *data, _i16 Len, telnet_connected_substate_t next_state); -static telnet_result_t telnet_send_non_blocking (void *data, _i16 Len); -static telnet_result_t telnet_recv_text_non_blocking (void *buff, _i16 Maxlen, _i16 *rxLen); -static void telnet_process (void); -static int telnet_process_credential (char *credential, _i16 rxLen); -static void telnet_parse_input (uint8_t *str, int16_t *len); -static bool telnet_send_with_retries (int16_t sd, const void *pBuf, int16_t len); -static void telnet_reset_buffer (void); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void telnet_init (void) { - // Allocate memory for the receive buffer (from the RTOS heap) - ASSERT ((telnet_data.rxBuffer = mem_Malloc(TELNET_RX_BUFFER_SIZE)) != NULL); - telnet_data.state = E_TELNET_STE_DISABLED; -} - -void telnet_run (void) { - _i16 rxLen; - switch (telnet_data.state) { - case E_TELNET_STE_DISABLED: - telnet_wait_for_enabled(); - break; - case E_TELNET_STE_START: - if (wlan_is_connected() && telnet_create_socket()) { - telnet_data.state = E_TELNET_STE_LISTEN; - } - break; - case E_TELNET_STE_LISTEN: - telnet_wait_for_connection(); - break; - case E_TELNET_STE_CONNECTED: - switch (telnet_data.substate.connected) { - case E_TELNET_STE_SUB_WELCOME: - telnet_send_and_proceed((void *)telnet_welcome_msg, strlen(telnet_welcome_msg), E_TELNET_STE_SUB_SND_USER_OPTIONS); - break; - case E_TELNET_STE_SUB_SND_USER_OPTIONS: - telnet_send_and_proceed((void *)telnet_options_user, sizeof(telnet_options_user), E_TELNET_STE_SUB_REQ_USER); - break; - case E_TELNET_STE_SUB_REQ_USER: - // to catch any left over characters from the previous actions - telnet_recv_text_non_blocking(telnet_data.rxBuffer, TELNET_RX_BUFFER_SIZE, &rxLen); - telnet_send_and_proceed((void *)telnet_request_user, strlen(telnet_request_user), E_TELNET_STE_SUB_GET_USER); - break; - case E_TELNET_STE_SUB_GET_USER: - if (E_TELNET_RESULT_OK == telnet_recv_text_non_blocking(telnet_data.rxBuffer + telnet_data.rxWindex, - TELNET_RX_BUFFER_SIZE - telnet_data.rxWindex, - &rxLen)) { - int result; - if ((result = telnet_process_credential (servers_user, rxLen))) { - telnet_data.credentialsValid = result > 0 ? true : false; - telnet_data.substate.connected = E_TELNET_STE_SUB_REQ_PASSWORD; - } - } - break; - case E_TELNET_STE_SUB_REQ_PASSWORD: - telnet_send_and_proceed((void *)telnet_request_password, strlen(telnet_request_password), E_TELNET_STE_SUB_SND_PASSWORD_OPTIONS); - break; - case E_TELNET_STE_SUB_SND_PASSWORD_OPTIONS: - // to catch any left over characters from the previous actions - telnet_recv_text_non_blocking(telnet_data.rxBuffer, TELNET_RX_BUFFER_SIZE, &rxLen); - telnet_send_and_proceed((void *)telnet_options_pass, sizeof(telnet_options_pass), E_TELNET_STE_SUB_GET_PASSWORD); - break; - case E_TELNET_STE_SUB_GET_PASSWORD: - if (E_TELNET_RESULT_OK == telnet_recv_text_non_blocking(telnet_data.rxBuffer + telnet_data.rxWindex, - TELNET_RX_BUFFER_SIZE - telnet_data.rxWindex, - &rxLen)) { - int result; - if ((result = telnet_process_credential (servers_pass, rxLen))) { - if ((telnet_data.credentialsValid = telnet_data.credentialsValid && (result > 0 ? true : false))) { - telnet_data.substate.connected = E_TELNET_STE_SUB_SND_REPL_OPTIONS; - } - else { - telnet_data.substate.connected = E_TELNET_STE_SUB_INVALID_LOGGIN; - } - } - } - break; - case E_TELNET_STE_SUB_INVALID_LOGGIN: - if (E_TELNET_RESULT_OK == telnet_send_non_blocking((void *)telnet_invalid_loggin, strlen(telnet_invalid_loggin))) { - telnet_data.credentialsValid = true; - if (++telnet_data.logginRetries >= TELNET_LOGIN_RETRIES_MAX) { - telnet_reset(); - } - else { - telnet_data.substate.connected = E_TELNET_STE_SUB_SND_USER_OPTIONS; - } - } - break; - case E_TELNET_STE_SUB_SND_REPL_OPTIONS: - telnet_send_and_proceed((void *)telnet_options_repl, sizeof(telnet_options_repl), E_TELNET_STE_SUB_LOGGIN_SUCCESS); - break; - case E_TELNET_STE_SUB_LOGGIN_SUCCESS: - if (E_TELNET_RESULT_OK == telnet_send_non_blocking((void *)telnet_loggin_success, strlen(telnet_loggin_success))) { - // clear the current line and force the prompt - telnet_reset_buffer(); - telnet_data.state= E_TELNET_STE_LOGGED_IN; - } - default: - break; - } - break; - case E_TELNET_STE_LOGGED_IN: - telnet_process(); - break; - default: - break; - } - - if (telnet_data.state >= E_TELNET_STE_CONNECTED) { - if (telnet_data.timeout++ > (servers_get_timeout() / TELNET_CYCLE_TIME_MS)) { - telnet_reset(); - } - } -} - -void telnet_tx_strn (const char *str, int len) { - if (telnet_data.n_sd > 0 && telnet_data.state == E_TELNET_STE_LOGGED_IN && len > 0) { - telnet_send_with_retries(telnet_data.n_sd, str, len); - } -} - -bool telnet_rx_any (void) { - return (telnet_data.n_sd > 0) ? (telnet_data.rxRindex != telnet_data.rxWindex && - telnet_data.state == E_TELNET_STE_LOGGED_IN) : false; -} - -int telnet_rx_char (void) { - int rx_char = -1; - if (telnet_data.rxRindex != telnet_data.rxWindex) { - // rxRindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 so that it wraps around automatically - rx_char = (int)telnet_data.rxBuffer[telnet_data.rxRindex++]; - } - return rx_char; -} - -void telnet_enable (void) { - telnet_data.enabled = true; -} - -void telnet_disable (void) { - telnet_reset(); - telnet_data.enabled = false; - telnet_data.state = E_TELNET_STE_DISABLED; -} - -void telnet_reset (void) { - // close the connection and start all over again - servers_close_socket(&telnet_data.n_sd); - servers_close_socket(&telnet_data.sd); - telnet_data.state = E_TELNET_STE_START; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -static void telnet_wait_for_enabled (void) { - // Init telnet's data - telnet_data.n_sd = -1; - telnet_data.sd = -1; - - // Check if the telnet service has been enabled - if (telnet_data.enabled) { - telnet_data.state = E_TELNET_STE_START; - } -} - -static bool telnet_create_socket (void) { - SlSockNonblocking_t nonBlockingOption; - SlSockAddrIn_t sServerAddress; - _i16 result; - - // Open a socket for telnet - ASSERT ((telnet_data.sd = sl_Socket(SL_AF_INET, SL_SOCK_STREAM, SL_IPPROTO_TCP)) > 0); - if (telnet_data.sd > 0) { - // add the socket to the network administration - modusocket_socket_add(telnet_data.sd, false); - - // Enable non-blocking mode - nonBlockingOption.NonblockingEnabled = 1; - ASSERT ((result = sl_SetSockOpt(telnet_data.sd, SL_SOL_SOCKET, SL_SO_NONBLOCKING, &nonBlockingOption, sizeof(nonBlockingOption))) == SL_SOC_OK); - - // Bind the socket to a port number - sServerAddress.sin_family = SL_AF_INET; - sServerAddress.sin_addr.s_addr = SL_INADDR_ANY; - sServerAddress.sin_port = sl_Htons(TELNET_PORT); - - ASSERT ((result |= sl_Bind(telnet_data.sd, (const SlSockAddr_t *)&sServerAddress, sizeof(sServerAddress))) == SL_SOC_OK); - - // Start listening - ASSERT ((result |= sl_Listen (telnet_data.sd, TELNET_MAX_CLIENTS)) == SL_SOC_OK); - - if (result == SL_SOC_OK) { - return true; - } - servers_close_socket(&telnet_data.sd); - } - - return false; -} - -static void telnet_wait_for_connection (void) { - SlSocklen_t in_addrSize; - SlSockAddrIn_t sClientAddress; - - // accepts a connection from a TCP client, if there is any, otherwise returns SL_EAGAIN - telnet_data.n_sd = sl_Accept(telnet_data.sd, (SlSockAddr_t *)&sClientAddress, (SlSocklen_t *)&in_addrSize); - if (telnet_data.n_sd == SL_EAGAIN) { - return; - } - else { - if (telnet_data.n_sd <= 0) { - // error - telnet_reset(); - return; - } - - // close the listening socket, we don't need it anymore - servers_close_socket(&telnet_data.sd); - - // add the new socket to the network administration - modusocket_socket_add(telnet_data.n_sd, false); - - // client connected, so go on - telnet_data.rxWindex = 0; - telnet_data.rxRindex = 0; - telnet_data.txRetries = 0; - - telnet_data.state = E_TELNET_STE_CONNECTED; - telnet_data.substate.connected = E_TELNET_STE_SUB_WELCOME; - telnet_data.credentialsValid = true; - telnet_data.logginRetries = 0; - telnet_data.timeout = 0; - } -} - -static void telnet_send_and_proceed (void *data, _i16 Len, telnet_connected_substate_t next_state) { - if (E_TELNET_RESULT_OK == telnet_send_non_blocking(data, Len)) { - telnet_data.substate.connected = next_state; - } -} - -static telnet_result_t telnet_send_non_blocking (void *data, _i16 Len) { - int16_t result = sl_Send(telnet_data.n_sd, data, Len, 0); - - if (result > 0) { - telnet_data.txRetries = 0; - return E_TELNET_RESULT_OK; - } - else if ((TELNET_TX_RETRIES_MAX >= ++telnet_data.txRetries) && (result == SL_EAGAIN)) { - return E_TELNET_RESULT_AGAIN; - } - else { - // error - telnet_reset(); - return E_TELNET_RESULT_FAILED; - } -} - -static telnet_result_t telnet_recv_text_non_blocking (void *buff, _i16 Maxlen, _i16 *rxLen) { - *rxLen = sl_Recv(telnet_data.n_sd, buff, Maxlen, 0); - // if there's data received, parse it - if (*rxLen > 0) { - telnet_data.timeout = 0; - telnet_parse_input (buff, rxLen); - if (*rxLen > 0) { - return E_TELNET_RESULT_OK; - } - } - else if (*rxLen != SL_EAGAIN) { - // error - telnet_reset(); - return E_TELNET_RESULT_FAILED; - } - return E_TELNET_RESULT_AGAIN; -} - -static void telnet_process (void) { - _i16 rxLen; - _i16 maxLen = (telnet_data.rxWindex >= telnet_data.rxRindex) ? (TELNET_RX_BUFFER_SIZE - telnet_data.rxWindex) : - ((telnet_data.rxRindex - telnet_data.rxWindex) - 1); - // to avoid an overrrun - maxLen = (telnet_data.rxRindex == 0) ? (maxLen - 1) : maxLen; - - if (maxLen > 0) { - if (E_TELNET_RESULT_OK == telnet_recv_text_non_blocking(&telnet_data.rxBuffer[telnet_data.rxWindex], maxLen, &rxLen)) { - // rxWindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 so that it wraps around automatically - telnet_data.rxWindex = telnet_data.rxWindex + rxLen; - } - } -} - -static int telnet_process_credential (char *credential, _i16 rxLen) { - telnet_data.rxWindex += rxLen; - if (telnet_data.rxWindex >= SERVERS_USER_PASS_LEN_MAX) { - telnet_data.rxWindex = SERVERS_USER_PASS_LEN_MAX; - } - - uint8_t *p = telnet_data.rxBuffer + SERVERS_USER_PASS_LEN_MAX; - // if a '\r' is found, or the length exceeds the max username length - if ((p = memchr(telnet_data.rxBuffer, '\r', telnet_data.rxWindex)) || (telnet_data.rxWindex >= SERVERS_USER_PASS_LEN_MAX)) { - uint8_t len = p - telnet_data.rxBuffer; - - telnet_data.rxWindex = 0; - if ((len > 0) && (memcmp(credential, telnet_data.rxBuffer, MAX(len, strlen(credential))) == 0)) { - return 1; - } - return -1; - } - return 0; -} - -static void telnet_parse_input (uint8_t *str, int16_t *len) { - int16_t b_len = *len; - uint8_t *b_str = str; - - for (uint8_t *_str = b_str; _str < b_str + b_len; ) { - if (*_str <= 127) { - if (telnet_data.state == E_TELNET_STE_LOGGED_IN && *_str == mp_interrupt_char) { - // raise a keyboard exception - mp_keyboard_interrupt(); - (*len)--; - _str++; - } - else if (*_str > 0) { - *str++ = *_str++; - } - else { - _str++; - *len -= 1; - } - } - else { - // in case we have received an incomplete telnet option, unlikely, but possible - _str += MIN(3, *len); - *len -= MIN(3, *len); - } - } -} - -static bool telnet_send_with_retries (int16_t sd, const void *pBuf, int16_t len) { - int32_t retries = 0; - uint32_t delay = TELNET_WAIT_TIME_MS; - // only if we are not within interrupt context and interrupts are enabled - if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) { - do { - _i16 result = sl_Send(sd, pBuf, len, 0); - if (result > 0) { - return true; - } - else if (SL_EAGAIN != result) { - return false; - } - // start with the default delay and increment it on each retry - mp_hal_delay_ms(delay++); - } while (++retries <= TELNET_TX_RETRIES_MAX); - } - return false; -} - -static void telnet_reset_buffer (void) { - // erase any characters present in the current line - memset (telnet_data.rxBuffer, '\b', TELNET_RX_BUFFER_SIZE / 2); - telnet_data.rxWindex = TELNET_RX_BUFFER_SIZE / 2; - // fake an "enter" key pressed to display the prompt - telnet_data.rxBuffer[telnet_data.rxWindex++] = '\r'; -} - diff --git a/ports/cc3200/telnet/telnet.h b/ports/cc3200/telnet/telnet.h deleted file mode 100644 index 51c5691041..0000000000 --- a/ports/cc3200/telnet/telnet.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_TELNET_TELNET_H -#define MICROPY_INCLUDED_CC3200_TELNET_TELNET_H - -/****************************************************************************** - DECLARE EXPORTED FUNCTIONS - ******************************************************************************/ -extern void telnet_init (void); -extern void telnet_run (void); -extern void telnet_tx_strn (const char *str, int len); -extern bool telnet_rx_any (void); -extern int telnet_rx_char (void); -extern void telnet_enable (void); -extern void telnet_disable (void); -extern void telnet_reset (void); - -#endif // MICROPY_INCLUDED_CC3200_TELNET_TELNET_H diff --git a/ports/cc3200/tools/smoke.py b/ports/cc3200/tools/smoke.py deleted file mode 100644 index 3ade11cf87..0000000000 --- a/ports/cc3200/tools/smoke.py +++ /dev/null @@ -1,76 +0,0 @@ -from machine import Pin -from machine import RTC -import time -import os - -""" -Execute it like this: - -python3 run-tests --target wipy --device 192.168.1.1 ../cc3200/tools/smoke.py -""" - -pin_map = [23, 24, 11, 12, 13, 14, 15, 16, 17, 22, 28, 10, 9, 8, 7, 6, 30, 31, 3, 0, 4, 5] -test_bytes = os.urandom(1024) - -def test_pin_read (pull): - # enable the pull resistor on all pins, then read the value - for p in pin_map: - pin = Pin('GP' + str(p), mode=Pin.IN, pull=pull) - # read the pin value - print(pin()) - -def test_pin_shorts (pull): - if pull == Pin.PULL_UP: - pull_inverted = Pin.PULL_DOWN - else: - pull_inverted = Pin.PULL_UP - # enable all pulls of the specified type - for p in pin_map: - pin = Pin('GP' + str(p), mode=Pin.IN, pull=pull_inverted) - # then change the pull one pin at a time and read its value - i = 0 - while i < len(pin_map): - pin = Pin('GP' + str(pin_map[i]), mode=Pin.IN, pull=pull) - Pin('GP' + str(pin_map[i - 1]), mode=Pin.IN, pull=pull_inverted) - i += 1 - # read the pin value - print(pin()) - -test_pin_read(Pin.PULL_UP) -test_pin_read(Pin.PULL_DOWN) -test_pin_shorts(Pin.PULL_UP) -test_pin_shorts(Pin.PULL_DOWN) - -# create a test directory -os.mkdir('/flash/test') -os.chdir('/flash/test') -print(os.getcwd()) -# create a new file -f = open('test.txt', 'w') -n_w = f.write(test_bytes) -print(n_w == len(test_bytes)) -f.close() -f = open('test.txt', 'r') -r = bytes(f.read(), 'ascii') -# check that we can write and read it correctly -print(r == test_bytes) -f.close() -os.remove('test.txt') -os.chdir('..') -os.rmdir('test') - -ls = os.listdir() -print('test' not in ls) -print(ls) - -# test the real time clock -rtc = RTC() -while rtc.now()[6] > 800: - pass - -time1 = rtc.now() -time.sleep_ms(1000) -time2 = rtc.now() -print(time2[5] - time1[5] == 1) -print(time2[6] - time1[6] < 5000) # microseconds - diff --git a/ports/cc3200/tools/smoke.py.exp b/ports/cc3200/tools/smoke.py.exp deleted file mode 100644 index fdc958c850..0000000000 --- a/ports/cc3200/tools/smoke.py.exp +++ /dev/null @@ -1,95 +0,0 @@ -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -/flash/test -True -True -True -['main.py', 'sys', 'lib', 'cert', 'boot.py'] -True -True diff --git a/ports/cc3200/tools/uniflash.py b/ports/cc3200/tools/uniflash.py deleted file mode 100644 index 21da46a56f..0000000000 --- a/ports/cc3200/tools/uniflash.py +++ /dev/null @@ -1,81 +0,0 @@ -#!/usr/bin/env python - -""" -Flash the WiPy (format, update service pack and program). - -Example: - -> python uniflash.py -u "C:\ti\uniflash_3.2\uniflashCLI.bat" -c "C:\VirtualBoxShared\GitHub\wipy_uniflash.usf" -p 8 -s "C:\ti\CC31xx_CC32xx_ServicePack_1.0.0.10.0\servicepack_1.0.0.10.0.bin" - -or: - -> python uniflash.py -u "C:\ti\uniflash_3.2\uniflashCLI.bat" -c "C:\VirtualBoxShared\GitHub\launchxl_uniflash.usf" -p 8 -s "C:\ti\CC31xx_CC32xx_ServicePack_1.0.0.10.0\servicepack_1.0.0.10.0.bin" - -""" - -import sys -import argparse -import subprocess - - -def print_exception(e): - print ('Exception: {}, on line {}'.format(e, sys.exc_info()[-1].tb_lineno)) - - -def execute(command): - process = subprocess.Popen(command, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - cmd_log = "" - - # Poll process for new output until finished - while True: - nextline = process.stdout.readline() - if nextline == '' and process.poll() != None: - break - sys.stdout.write(nextline) - sys.stdout.flush() - cmd_log += nextline - - output = process.communicate()[0] - exitCode = process.returncode - - if exitCode == 0: - return cmd_log - else: - raise ProcessException(command, exitCode, output) - -def main(): - cmd_parser = argparse.ArgumentParser(description='Flash the WiPy and optionally run a small test on it.') - cmd_parser.add_argument('-u', '--uniflash', default=None, help='the path to the uniflash cli executable') - cmd_parser.add_argument('-c', '--config', default=None, help='the path to the uniflash config file') - cmd_parser.add_argument('-p', '--port', default=8, help='the com serial port') - cmd_parser.add_argument('-s', '--servicepack', default=None, help='the path to the servicepack file') - args = cmd_parser.parse_args() - - output = "" - com_port = 'com=' + str(args.port) - servicepack_path = 'spPath=' + args.servicepack - - try: - if args.uniflash == None or args.config == None: - raise ValueError('uniflash path and config path are mandatory') - if args.servicepack == None: - output += execute([args.uniflash, '-config', args.config, '-setOptions', com_port, '-operations', 'format', 'program']) - else: - output += execute([args.uniflash, '-config', args.config, '-setOptions', com_port, servicepack_path, '-operations', 'format', 'servicePackUpdate', 'program']) - except Exception as e: - print_exception(e) - output = "" - finally: - if "Finish Executing operation: program" in output: - print("======================================") - print("Board programmed OK") - print("======================================") - sys.exit(0) - else: - print("======================================") - print("ERROR: Programming failed!") - print("======================================") - sys.exit(1) - -if __name__ == "__main__": - main() diff --git a/ports/cc3200/tools/update-wipy.py b/ports/cc3200/tools/update-wipy.py deleted file mode 100644 index 2d5fe57c2f..0000000000 --- a/ports/cc3200/tools/update-wipy.py +++ /dev/null @@ -1,200 +0,0 @@ -#!/usr/bin/env python - -""" -The WiPy firmware update script. Transmits the specified firmware file -over FTP, and then resets the WiPy and optionally verifies that software -was correctly updated. - -Usage: - - ./update-wipy.py --file "path_to_mcuimg.bin" --verify - -Or: - - python update-wipy.py --file "path_to_mcuimg.bin" -""" - -import sys -import argparse -import time -import socket -from ftplib import FTP -from telnetlib import Telnet - - -def print_exception(e): - print ('Exception: {}, on line {}'.format(e, sys.exc_info()[-1].tb_lineno)) - - -def ftp_directory_exists(ftpobj, directory_name): - filelist = [] - ftpobj.retrlines('LIST',filelist.append) - for f in filelist: - if f.split()[-1] == directory_name: - return True - return False - - -def transfer_file(args): - with FTP(args.ip, timeout=20) as ftp: - print ('FTP connection established') - - if '230' in ftp.login(args.user, args.password): - print ('Login successful') - - if '250' in ftp.cwd('/flash'): - if not ftp_directory_exists(ftp, 'sys'): - print ('/flash/sys directory does not exist') - if not '550' in ftp.mkd('sys'): - print ('/flash/sys directory created') - else: - print ('Error: cannot create /flash/sys directory') - return False - if '250' in ftp.cwd('sys'): - print ("Entered '/flash/sys' directory") - with open(args.file, "rb") as fwfile: - print ('Firmware image found, initiating transfer...') - if '226' in ftp.storbinary("STOR " + 'mcuimg.bin', fwfile, 512): - print ('File transfer complete') - return True - else: - print ('Error: file transfer failed') - else: - print ('Error: cannot enter /flash/sys directory') - else: - print ('Error: cannot enter /flash directory') - else: - print ('Error: ftp login failed') - - return False - - -def reset_board(args): - success = False - - try: - tn = Telnet(args.ip, timeout=5) - print("Connected via Telnet, trying to login now") - - if b'Login as:' in tn.read_until(b"Login as:", timeout=5): - tn.write(bytes(args.user, 'ascii') + b"\r\n") - - if b'Password:' in tn.read_until(b"Password:", timeout=5): - # needed because of internal implementation details of the WiPy's telnet server - time.sleep(0.2) - tn.write(bytes(args.password, 'ascii') + b"\r\n") - - if b'Type "help()" for more information.' in tn.read_until(b'Type "help()" for more information.', timeout=5): - print("Telnet login succeeded") - tn.write(b'\r\x03\x03') # ctrl-C twice: interrupt any running program - time.sleep(1) - tn.write(b'\r\x02') # ctrl-B: enter friendly REPL - if b'Type "help()" for more information.' in tn.read_until(b'Type "help()" for more information.', timeout=5): - tn.write(b"import machine\r\n") - tn.write(b"machine.reset()\r\n") - time.sleep(2) - print("Reset performed") - success = True - else: - print("Error: cannot enter friendly REPL") - else: - print("Error: telnet login failed") - - except Exception as e: - print_exception(e) - finally: - try: - tn.close() - except Exception as e: - pass - return success - - -def verify_update(args): - success = False - firmware_tag = '' - - def find_tag (tag): - if tag in firmware_tag: - print("Verification passed") - return True - else: - print("Error: verification failed, the git tag doesn't match") - return False - - retries = 0 - while True: - try: - # Specify a longer time out value here because the board has just been - # reset and the wireless connection might not be fully established yet - tn = Telnet(args.ip, timeout=10) - print("Connected via telnet again, lets check the git tag") - break - except socket.timeout: - if retries < 5: - print("Timeout while connecting via telnet, retrying...") - retries += 1 - else: - print('Error: Telnet connection timed out!') - return False - - try: - firmware_tag = tn.read_until (b'with CC3200') - tag_file_path = args.file.rstrip('mcuimg.bin') + 'genhdr/mpversion.h' - - if args.tag is not None: - success = find_tag(bytes(args.tag, 'ascii')) - else: - with open(tag_file_path) as tag_file: - for line in tag_file: - bline = bytes(line, 'ascii') - if b'MICROPY_GIT_HASH' in bline: - bline = bline.lstrip(b'#define MICROPY_GIT_HASH ').replace(b'"', b'').replace(b'\r', b'').replace(b'\n', b'') - success = find_tag(bline) - break - - except Exception as e: - print_exception(e) - finally: - try: - tn.close() - except Exception as e: - pass - return success - - -def main(): - cmd_parser = argparse.ArgumentParser(description='Update the WiPy firmware with the specified image file') - cmd_parser.add_argument('-f', '--file', default=None, help='the path of the firmware file') - cmd_parser.add_argument('-u', '--user', default='micro', help='the username') - cmd_parser.add_argument('-p', '--password', default='python', help='the login password') - cmd_parser.add_argument('--ip', default='192.168.1.1', help='the ip address of the WiPy') - cmd_parser.add_argument('--verify', action='store_true', help='verify that the update succeeded') - cmd_parser.add_argument('-t', '--tag', default=None, help='git tag of the firmware image') - args = cmd_parser.parse_args() - - result = 1 - - try: - if args.file is None: - raise ValueError('the image file path must be specified') - if transfer_file(args): - if reset_board(args): - if args.verify: - print ('Waiting for the WiFi connection to come up again...') - # this time is to allow the system's wireless network card to - # connect to the WiPy again. - time.sleep(5) - if verify_update(args): - result = 0 - else: - result = 0 - - except Exception as e: - print_exception(e) - finally: - sys.exit(result) - - -if __name__ == "__main__": - main() diff --git a/ports/cc3200/util/cryptohash.c b/ports/cc3200/util/cryptohash.c deleted file mode 100644 index 909dadc8cf..0000000000 --- a/ports/cc3200/util/cryptohash.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_shamd5.h" -#include "inc/hw_dthe.h" -#include "hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "shamd5.h" -#include "cryptohash.h" - - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void CRYPTOHASH_Init (void) { - // Enable the Data Hashing and Transform Engine - MAP_PRCMPeripheralClkEnable(PRCM_DTHE, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(PRCM_DTHE); -} - -void CRYPTOHASH_SHAMD5Start (uint32_t algo, uint32_t blocklen) { - // wait until the context is ready - while ((HWREG(SHAMD5_BASE + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_CONTEXT_READY) == 0); - - // Configure the SHA/MD5 module algorithm - MAP_SHAMD5ConfigSet(SHAMD5_BASE, algo); - - // if not a multiple of 64 bytes, close the hash - if (blocklen % 64) { - HWREG(SHAMD5_BASE + SHAMD5_O_MODE) |= SHAMD5_MODE_CLOSE_HASH; - } - - // set the lenght - HWREG(SHAMD5_BASE + SHAMD5_O_LENGTH) = blocklen; -} - -void CRYPTOHASH_SHAMD5Update (uint8_t *data, uint32_t datalen) { - // write the data - SHAMD5DataWriteMultiple(data, datalen); -} - -void CRYPTOHASH_SHAMD5Read (uint8_t *hash) { - // wait for the output to be ready - while((HWREG(SHAMD5_BASE + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_OUTPUT_READY) == 0); - // read the result - MAP_SHAMD5ResultRead(SHAMD5_BASE, hash); -} diff --git a/ports/cc3200/util/cryptohash.h b/ports/cc3200/util/cryptohash.h deleted file mode 100644 index 15d46b705b..0000000000 --- a/ports/cc3200/util/cryptohash.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_CRYPTOHASH_H -#define MICROPY_INCLUDED_CC3200_UTIL_CRYPTOHASH_H - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void CRYPTOHASH_Init (void); -extern void CRYPTOHASH_SHAMD5Start (uint32_t algo, uint32_t blocklen); -extern void CRYPTOHASH_SHAMD5Update (uint8_t *data, uint32_t datalen); -extern void CRYPTOHASH_SHAMD5Read (uint8_t *hash); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_CRYPTOHASH_H diff --git a/ports/cc3200/util/fifo.c b/ports/cc3200/util/fifo.c deleted file mode 100644 index 421f837100..0000000000 --- a/ports/cc3200/util/fifo.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "fifo.h" - - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void FIFO_Init (FIFO_t *fifo, unsigned int uiElementsMax, - void (*pfElmentPush)(void * const pvFifo, const void * const pvElement), - void (*pfElementPop)(void * const pvFifo, void * const pvElement)) { - if (fifo) { - fifo->uiFirst = 0; - fifo->uiLast = uiElementsMax - 1; - fifo->uiElementCount = 0; - fifo->uiElementsMax = uiElementsMax; - fifo->pfElementPush = pfElmentPush; - fifo->pfElementPop = pfElementPop; - } -} - -bool FIFO_bPushElement (FIFO_t *fifo, const void * const pvElement) { - if (!fifo) { - return false; - } - // Check if the queue is full - if (true == FIFO_IsFull (fifo)) { - return false; - } - - // Increment the element count - if (fifo->uiElementsMax > fifo->uiElementCount) { - fifo->uiElementCount++; - } - fifo->uiLast++; - if (fifo->uiLast == fifo->uiElementsMax) { - fifo->uiLast = 0; - } - // Insert the element into the queue - fifo->pfElementPush(fifo, pvElement); - return true; -} - -bool FIFO_bPopElement (FIFO_t *fifo, void * const pvElement) { - if (!fifo) { - return false; - } - // Check if the queue is empty - if (true == FIFO_IsEmpty (fifo)) { - return false; - } - - // Get the element from the queue - fifo->pfElementPop(fifo, pvElement); - // Decrement the element count - if (fifo->uiElementCount > 0) { - fifo->uiElementCount--; - } - fifo->uiFirst++; - if (fifo->uiFirst == fifo->uiElementsMax) { - fifo->uiFirst = 0; - } - return true; -} - -bool FIFO_bPeekElement (FIFO_t *fifo, void * const pvElement) { - if (!fifo) { - return false; - } - // Check if the queue is empty - if (true == FIFO_IsEmpty (fifo)) { - return false; - } - // Get the element from the queue - fifo->pfElementPop(fifo, pvElement); - return true; -} - -bool FIFO_IsEmpty (FIFO_t *fifo) { - if (fifo) { - return ((fifo->uiElementCount == 0) ? true : false); - } - return false; -} - -bool FIFO_IsFull (FIFO_t *fifo) { - if (fifo) { - return ((fifo->uiElementCount < fifo->uiElementsMax) ? false : true); - } - return false; -} - -void FIFO_Flush (FIFO_t *fifo) { - if (fifo) { - fifo->uiElementCount = 0; - fifo->uiFirst = 0; - fifo->uiLast = fifo->uiElementsMax - 1; - } -} diff --git a/ports/cc3200/util/fifo.h b/ports/cc3200/util/fifo.h deleted file mode 100644 index 6ede57e1e5..0000000000 --- a/ports/cc3200/util/fifo.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_FIFO_H -#define MICROPY_INCLUDED_CC3200_UTIL_FIFO_H - -typedef struct { - void *pvElements; - unsigned int uiElementCount; - unsigned int uiElementsMax; - unsigned int uiFirst; - unsigned int uiLast; - void (*pfElementPush)(void * const pvFifo, const void * const pvElement); - void (*pfElementPop)(void * const pvFifo, void * const pvElement); -}FIFO_t; - -extern void FIFO_Init (FIFO_t *fifo, unsigned int uiElementsMax, -void (*pfElmentPush)(void * const pvFifo, const void * const pvElement), -void (*pfElementPop)(void * const pvFifo, void * const pvElement)); -extern bool FIFO_bPushElement (FIFO_t *fifo, const void * const pvElement); -extern bool FIFO_bPopElement (FIFO_t *fifo, void * const pvElement); -extern bool FIFO_bPeekElement (FIFO_t *fifo, void * const pvElement); -extern bool FIFO_IsEmpty (FIFO_t *fifo); -extern bool FIFO_IsFull (FIFO_t *fifo); -extern void FIFO_Flush (FIFO_t *fifo); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_FIFO_H diff --git a/ports/cc3200/util/gccollect.c b/ports/cc3200/util/gccollect.c deleted file mode 100644 index 6e2a9081c8..0000000000 --- a/ports/cc3200/util/gccollect.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" -#include "gchelper.h" - -/****************************************************************************** -DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ - -void gc_collect(void) { - // start the GC - gc_collect_start(); - - // get the registers and the sp - mp_uint_t regs[10]; - mp_uint_t sp = gc_helper_get_regs_and_sp(regs); - - // trace the stack, including the registers (since they live on the stack in this function) - gc_collect_root((void**)sp, ((mp_uint_t)MP_STATE_THREAD(stack_top) - sp) / sizeof(uint32_t)); - - // trace root pointers from any threads - #if MICROPY_PY_THREAD - mp_thread_gc_others(); - #endif - - // end the GC - gc_collect_end(); -} diff --git a/ports/cc3200/util/gccollect.h b/ports/cc3200/util/gccollect.h deleted file mode 100644 index 08d43d2837..0000000000 --- a/ports/cc3200/util/gccollect.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_GCCOLLECT_H -#define MICROPY_INCLUDED_CC3200_UTIL_GCCOLLECT_H - -// variables defining memory layout -extern uint32_t _etext; -extern uint32_t _data; -extern uint32_t _edata; -extern uint32_t _boot; -extern uint32_t _eboot; -extern uint32_t _bss; -extern uint32_t _ebss; -extern uint32_t _heap; -extern uint32_t _eheap; -extern uint32_t _stack; -extern uint32_t _estack; - -void gc_collect(void); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_GCCOLLECT_H diff --git a/ports/cc3200/util/gchelper.h b/ports/cc3200/util/gchelper.h deleted file mode 100644 index 48e81bc61d..0000000000 --- a/ports/cc3200/util/gchelper.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_GCHELPER_H -#define MICROPY_INCLUDED_CC3200_UTIL_GCHELPER_H - -extern mp_uint_t gc_helper_get_sp(void); -extern mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_GCHELPER_H diff --git a/ports/cc3200/util/gchelper.s b/ports/cc3200/util/gchelper.s deleted file mode 100644 index aa8fb499e9..0000000000 --- a/ports/cc3200/util/gchelper.s +++ /dev/null @@ -1,41 +0,0 @@ - .syntax unified - .cpu cortex-m4 - .thumb - .text - .align 2 - - - -@ uint gc_helper_get_sp(void) - .global gc_helper_get_sp - .thumb - .thumb_func - .type gc_helper_get_sp, %function -gc_helper_get_sp: - @ return the sp - mov r0, sp - bx lr - - - -@ uint gc_helper_get_regs_and_sp(r0=uint regs[10]) - .global gc_helper_get_regs_and_sp - .thumb - .thumb_func - .type gc_helper_get_regs_and_sp, %function -gc_helper_get_regs_and_sp: - @ store registers into given array - str r4, [r0], #4 - str r5, [r0], #4 - str r6, [r0], #4 - str r7, [r0], #4 - str r8, [r0], #4 - str r9, [r0], #4 - str r10, [r0], #4 - str r11, [r0], #4 - str r12, [r0], #4 - str r13, [r0], #4 - - @ return the sp - mov r0, sp - bx lr diff --git a/ports/cc3200/util/random.c b/ports/cc3200/util/random.c deleted file mode 100644 index f8e9cdf0cb..0000000000 --- a/ports/cc3200/util/random.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pybrtc.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "random.h" -#include "debug.h" - -/****************************************************************************** -* LOCAL TYPES -******************************************************************************/ -typedef union _rng_id_t { - uint32_t id32; - uint16_t id16[3]; - uint8_t id8[6]; -} rng_id_t; - -/****************************************************************************** -* LOCAL VARIABLES -******************************************************************************/ -static uint32_t s_seed; - -/****************************************************************************** -* LOCAL FUNCTION DECLARATIONS -******************************************************************************/ -STATIC uint32_t lfsr (uint32_t input); - -/****************************************************************************** -* PRIVATE FUNCTIONS -******************************************************************************/ -STATIC uint32_t lfsr (uint32_t input) { - assert( input != 0 ); - return (input >> 1) ^ (-(input & 0x01) & 0x00E10000); -} - -/******************************************************************************/ -// MicroPython bindings; - -STATIC mp_obj_t machine_rng_get(void) { - return mp_obj_new_int(rng_get()); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_rng_get_obj, machine_rng_get); - -/****************************************************************************** -* PUBLIC FUNCTIONS -******************************************************************************/ -void rng_init0 (void) { - rng_id_t juggler; - uint32_t seconds; - uint16_t mseconds; - - // get the seconds and the milliseconds from the RTC - pyb_rtc_get_time(&seconds, &mseconds); - - wlan_get_mac (juggler.id8); - - // flatten the 48-bit board identification to 24 bits - juggler.id16[0] ^= juggler.id16[2]; - - juggler.id8[0] ^= juggler.id8[3]; - juggler.id8[1] ^= juggler.id8[4]; - juggler.id8[2] ^= juggler.id8[5]; - - s_seed = juggler.id32 & 0x00FFFFFF; - s_seed += (seconds & 0x000FFFFF) + mseconds; - - // the seed must not be zero - if (s_seed == 0) { - s_seed = 1; - } -} - -uint32_t rng_get (void) { - s_seed = lfsr( s_seed ); - return s_seed; -} diff --git a/ports/cc3200/util/sleeprestore.h b/ports/cc3200/util/sleeprestore.h deleted file mode 100644 index e178f4c2d0..0000000000 --- a/ports/cc3200/util/sleeprestore.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_SLEEPRESTORE_H -#define MICROPY_INCLUDED_CC3200_UTIL_SLEEPRESTORE_H - -extern void sleep_store(void); -extern void sleep_restore(void); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_SLEEPRESTORE_H diff --git a/ports/cc3200/util/sleeprestore.s b/ports/cc3200/util/sleeprestore.s deleted file mode 100644 index c7b0c7da21..0000000000 --- a/ports/cc3200/util/sleeprestore.s +++ /dev/null @@ -1,61 +0,0 @@ - .syntax unified - .cpu cortex-m4 - .thumb - .text - .align 2 - -@ global variable with the backup registers - .extern vault_arm_registers -@ global function that performs the wake up actions - .extern pyb_sleep_suspend_exit - -@ uint sleep_store(void) - .global sleep_store - .thumb - .thumb_func - .type sleep_store, %function -sleep_store: - dsb - isb - push {r0-r12, lr} - ldr r1, =vault_arm_registers - mrs r0, msp - str r0, [r1] - mrs r0, psp - str r0, [r1, #4] - mrs r0, primask - str r0, [r1, #12] - mrs r0, faultmask - str r0, [r1, #16] - mrs r0, basepri - str r0, [r1, #20] - mrs r0, control - str r0, [r1, #24] - dsb - isb - bx lr - -@ uint sleep_restore(void) - .global sleep_restore - .thumb - .thumb_func - .type sleep_restore, %function -sleep_restore: - dsb - isb - mrs r0, msp - msr psp, r0 - ldr r1, =vault_arm_registers - ldr r0, [r1, #24] - msr control, r0 - ldr r0, [r1] - msr msp, r0 - ldr r0, [r1, #12] - msr primask, r0 - ldr r0, [r1, #16] - msr faultmask, r0 - ldr r0, [r1, #20] - msr basepri, r0 - dsb - isb - bl pyb_sleep_suspend_exit diff --git a/ports/cc3200/util/socketfifo.c b/ports/cc3200/util/socketfifo.c deleted file mode 100644 index d0a7150485..0000000000 --- a/ports/cc3200/util/socketfifo.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "osi.h" -#include "fifo.h" -#include "socketfifo.h" - - -/*---------------------------------------------------------------------------- - ** Declare private functions - */ -static void socketfifo_Push (void * const pvFifo, const void * const pvElement); -static void socketfifo_Pop (void * const pvFifo, void * const pvElement); - -/*---------------------------------------------------------------------------- - ** Declare private data - */ -static FIFO_t *socketfifo; - -/*---------------------------------------------------------------------------- - ** Define public functions - */ -void SOCKETFIFO_Init (FIFO_t *fifo, void *elements, uint32_t maxcount) { - // Initialize global data - socketfifo = fifo; - socketfifo->pvElements = elements; - FIFO_Init (socketfifo, maxcount, socketfifo_Push, socketfifo_Pop); -} - -bool SOCKETFIFO_Push (const void * const element) { - return FIFO_bPushElement (socketfifo, element); -} - -bool SOCKETFIFO_Pop (void * const element) { - return FIFO_bPopElement (socketfifo, element); -} - -bool SOCKETFIFO_Peek (void * const element) { - return FIFO_bPeekElement (socketfifo, element); -} - -bool SOCKETFIFO_IsEmpty (void) { - return FIFO_IsEmpty (socketfifo); -} - -bool SOCKETFIFO_IsFull (void) { - return FIFO_IsFull (socketfifo); -} - -void SOCKETFIFO_Flush (void) { - SocketFifoElement_t element; - while (SOCKETFIFO_Pop(&element)) { - if (element.freedata) { - mem_Free(element.data); - } - } -} - -unsigned int SOCKETFIFO_Count (void) { - return socketfifo->uiElementCount; -} - -/*---------------------------------------------------------------------------- - ** Define private functions - */ -static void socketfifo_Push (void * const pvFifo, const void * const pvElement) { - if ((pvFifo != NULL) && (NULL != pvElement)) { - unsigned int uiLast = ((FIFO_t *)pvFifo)->uiLast; - memcpy (&((SocketFifoElement_t *)((FIFO_t *)pvFifo)->pvElements)[uiLast], pvElement, sizeof(SocketFifoElement_t)); - } -} - -static void socketfifo_Pop (void * const pvFifo, void * const pvElement) { - if ((pvFifo != NULL) && (NULL != pvElement)) { - unsigned int uiFirst = ((FIFO_t *)pvFifo)->uiFirst; - memcpy (pvElement, &((SocketFifoElement_t *)((FIFO_t *)pvFifo)->pvElements)[uiFirst], sizeof(SocketFifoElement_t)); - } -} - diff --git a/ports/cc3200/util/socketfifo.h b/ports/cc3200/util/socketfifo.h deleted file mode 100644 index e6cf851b1a..0000000000 --- a/ports/cc3200/util/socketfifo.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_SOCKETFIFO_H -#define MICROPY_INCLUDED_CC3200_UTIL_SOCKETFIFO_H - -/*---------------------------------------------------------------------------- - ** Imports - */ - -/*---------------------------------------------------------------------------- - ** Define constants - */ - -/*---------------------------------------------------------------------------- - ** Define types - */ - -typedef struct { - void *data; - signed short *sd; - unsigned short datasize; - unsigned char closesockets; - bool freedata; - -}SocketFifoElement_t; - -/*---------------------------------------------------------------------------- - ** Declare public functions - */ -extern void SOCKETFIFO_Init (FIFO_t *fifo, void *elements, uint32_t maxcount); -extern bool SOCKETFIFO_Push (const void * const element); -extern bool SOCKETFIFO_Pop (void * const element); -extern bool SOCKETFIFO_Peek (void * const element); -extern bool SOCKETFIFO_IsEmpty (void); -extern bool SOCKETFIFO_IsFull (void); -extern void SOCKETFIFO_Flush (void); -extern unsigned int SOCKETFIFO_Count (void); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_SOCKETFIFO_H diff --git a/ports/cc3200/version.h b/ports/cc3200/version.h deleted file mode 100644 index fccb95c521..0000000000 --- a/ports/cc3200/version.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_VERSION_H -#define MICROPY_INCLUDED_CC3200_VERSION_H - -#define WIPY_SW_VERSION_NUMBER "1.2.0" - -#endif // MICROPY_INCLUDED_CC3200_VERSION_H diff --git a/ports/esp8266/.gitignore b/ports/cxd56/.gitignore similarity index 100% rename from ports/esp8266/.gitignore rename to ports/cxd56/.gitignore diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile new file mode 100644 index 0000000000..d65c2e2666 --- /dev/null +++ b/ports/cxd56/Makefile @@ -0,0 +1,220 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright 2019 Sony Semiconductor Solutions Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk + +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk + +# Port-specific +include mpconfigport.mk + +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = arm-none-eabi- + +SPRESENSE_SDK = spresense-exported-sdk + +FIRMWARE = $(SPRESENSE_SDK)/firmware + +# Platforms are: Linux, Darwin, MSYS, CYGWIN +PLATFORM := $(firstword $(subst _, ,$(shell uname -s 2>/dev/null))) + +ifeq ($(PLATFORM),Darwin) + # macOS + MKSPK = $(SPRESENSE_SDK)/sdk/tools/macos/mkspk +else ifeq ($(PLATFORM),Linux) + # Linux + MKSPK = $(SPRESENSE_SDK)/sdk/tools/linux/mkspk +else + # Cygwin/MSYS2 + MKSPK = $(SPRESENSE_SDK)/sdk/tools/windows/mkspk.exe +endif + +SERIAL ?= /dev/ttyUSB0 + +INC += \ + -I. \ + -I../.. \ + -I../lib/mp-readline \ + -I../lib/timeutils \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ + -Iboards/$(BOARD) \ + -I$(BUILD) \ + -I$(SPRESENSE_SDK)/nuttx/include \ + -I$(SPRESENSE_SDK)/nuttx/arch \ + -I$(SPRESENSE_SDK)/nuttx/arch/chip \ + -I$(SPRESENSE_SDK)/nuttx/arch/os \ + -I$(SPRESENSE_SDK)/sdk/bsp/include \ + -I$(SPRESENSE_SDK)/sdk/bsp/include/sdk \ + +CFLAGS += \ + $(INC) \ + -DCONFIG_WCHAR_BUILTIN \ + -DCONFIG_HAVE_DOUBLE \ + -Dmain=spresense_main \ + -D_estack=__stack \ + -c \ + -Os \ + -pipe \ + -std=gnu11 \ + -mcpu=cortex-m4 \ + -mthumb \ + -mfpu=fpv4-sp-d16 \ + -mfloat-abi=hard \ + -mabi=aapcs \ + -fno-builtin \ + -fno-strict-aliasing \ + -fno-strength-reduce \ + -fomit-frame-pointer \ + -ffunction-sections \ + -fdata-sections \ + -Wall \ + +LIBM = "${shell "$(CC)" $(CFLAGS) -print-file-name=libm.a}" + +LIBGCC = "${shell "$(CC)" $(CFLAGS) -print-libgcc-file-name}" + +LDFLAGS = \ + --entry=__start \ + -nostartfiles \ + -nodefaultlibs \ + -T$(SPRESENSE_SDK)/nuttx/build/ramconfig.ld \ + --gc-sections \ + -Map=$(BUILD)/output.map \ + -o $(BUILD)/firmware.elf \ + --start-group \ + -u spresense_main \ + $(BUILD)/libmpy.a \ + $(SPRESENSE_SDK)/sdk/libs/libapps.a \ + $(SPRESENSE_SDK)/sdk/libs/libsdk.a \ + $(LIBM) \ + $(LIBGCC) \ + --end-group \ + -L$(BUILD) \ + +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_CXD56 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=512 $(CFLAGS_MOD) + +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) + +SRC_S = supervisor/cpu.s + +SRC_C = \ + tick.c \ + background.c \ + fatfs_port.c \ + mphalport.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + lib/utils/stdout_helpers.c \ + lib/utils/pyexec.c \ + lib/libc/string0.c \ + lib/mp-readline/readline.c \ + lib/timeutils/timeutils.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/utils/interrupt_char.c \ + lib/utils/sys_stdio_mphal.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/buffer_helper.c \ + supervisor/shared/memory.c \ + lib/tinyusb/src/portable/sony/cxd56/dcd_cxd56.c \ + +OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) + +# List of sources for qstr extraction +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += + +all: $(BUILD)/firmware.spk + +$(FIRMWARE): + $(ECHO) "" + $(ECHO) "Download the spresense binaries zip archive from:" + $(ECHO) "https://developer.sony.com/file/download/download-spresense-firmware-v1-4-000" + $(ECHO) "Extract spresense binaries to $(FIRMWARE)" + $(ECHO) "" + $(ECHO) "run make flash-bootloader again to flash bootloader." + exit 1 + +$(BUILD)/libmpy.a: $(SPRESENSE_SDK) $(OBJ) + $(ECHO) "AR $@" + $(Q)$(AR) rcs $(BUILD)/libmpy.a $(OBJ) + +$(BUILD)/firmware.elf: $(BUILD)/libmpy.a + $(ECHO) "LD $@" + $(Q)$(LD) $(LDFLAGS) + +$(BUILD)/firmware.spk: $(BUILD)/firmware.elf + $(ECHO) "Creating $@" + $(MKSPK) -c 2 $(BUILD)/firmware.elf nuttx $(BUILD)/firmware.spk + +flash: $(BUILD)/firmware.spk + $(ECHO) "Writing $< to the board" + $(SPRESENSE_SDK)/sdk/tools/flash.sh -c $(SERIAL) $(BUILD)/firmware.spk + +flash-bootloader: $(SPRESENSE_SDK) $(FIRMWARE) + $(ECHO) "Writing loader to the board" + $(SPRESENSE_SDK)/sdk/tools/flash.sh -l $(FIRMWARE) -c $(SERIAL) + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/cxd56/README.md b/ports/cxd56/README.md new file mode 100644 index 0000000000..ec284e7421 --- /dev/null +++ b/ports/cxd56/README.md @@ -0,0 +1,98 @@ +# CircuitPython port to Spresense # + +This directory contains the port of CircuitPython to Spresense. It is a compact +development board based on Sony’s power-efficient multicore microcontroller +CXD5602. + +Board features: + +* Integrated GPS + * The embedded GNSS with support for GPS, QZSS and GLONASS enables applications + where tracking is required. +* Hi-res audio output and multi mic inputs + * Advanced 192kHz/24 bit audio codec and amplifier for audio output, and + support for up to 8 mic input channels. +* Multicore microcontroller + * Spresense is powered by Sony's CXD5602 microcontroller (ARM® Cortex®-M4F × 6 + cores), with a clock speed of 156 MHz. + +Currently, Spresense port does not support GNSS, Audio and Multicore. + +Refer to [developer.sony.com/develop/spresense/](https://developer.sony.com/develop/spresense/) +for further information about this board. + +## Prerequisites ## + +### Linux ### + +Add user to `dialout` group: + + $ sudo usermod -a -G dialout + +### Windows ### + +Download and install USB serial driver + +* [CP210x USB to serial driver for Windows 7/8/8.1](https://www.silabs.com/documents/public/software/CP210x_Windows_Drivers.zip) + +* [CP210x USB to serial driver for Windows 10](https://www.silabs.com/documents/public/software/CP210x_Universal_Windows_Driver.zip) + +### macOS ### + +Download and install USB serial driver + +* [CP210x USB to serial driver for Mac OS X](https://www.silabs.com/documents/public/software/Mac_OSX_VCP_Driver.zip) + +## Build instructions ## + +Pull all submodules into your clone: + + $ git submodule update --init --recursive + +Build the MicroPython cross-compiler: + + $ make -C mpy-cross + +Change directory to cxd56: + + $ cd ports/cxd56 + +To build circuitpython image run: + + $ make BOARD=spresense + +## USB connection ## + +Connect the `Spresense main board` to the PC via the USB cable. + +## Flash the bootloader ## + +The correct bootloader is required for the Spresense board to function. + +Bootloader information: + +* The bootloader has to be flashed the very first time the board is used. + +* You have to accept the End User License Agreement to be able to download and use the Spresense bootloader binary. + +Download the spresense binaries zip archive from: [Spresense firmware v1-4-000](https://developer.sony.com/file/download/download-spresense-firmware-v1-4-000) + +Extract spresense binaries in your PC to ports/spresense/spresense-exported-sdk/firmware/ + +To flash the bootloader run the command: + + $ make BOARD=spresense flash-bootloader + +## Flash the circuitpython image ## + +To flash the firmware run the command: + + $ make BOARD=spresense flash + +## Accessing the board ## + +Connect the `Spresense extension board` to the PC via the USB cable. + +Once built and deployed, access the CircuitPython REPL (the Python prompt) via USB. You can run: + + $ screen /dev/ttyACM0 115200 diff --git a/ports/cxd56/alloca.h b/ports/cxd56/alloca.h new file mode 100644 index 0000000000..aad2f8b5b3 --- /dev/null +++ b/ports/cxd56/alloca.h @@ -0,0 +1,6 @@ +#ifndef _ALLOCA_H +#define _ALLOCA_H + +#define alloca __builtin_alloca + +#endif /* _ALLOCA_H */ diff --git a/ports/esp8266/common-hal/time/__init__.c b/ports/cxd56/background.c similarity index 66% rename from ports/esp8266/common-hal/time/__init__.c rename to ports/cxd56/background.c index 993e89b1c3..ade257dd24 100644 --- a/ports/esp8266/common-hal/time/__init__.c +++ b/ports/cxd56/background.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,17 +24,30 @@ * THE SOFTWARE. */ -#include "py/mphal.h" +#include "background.h" -#include "shared-bindings/time/__init__.h" +#include "supervisor/usb.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/stack.h" -#include "ets_alt_task.h" -#include "user_interface.h" +static bool running_background_tasks = false; -inline uint64_t common_hal_time_monotonic() { - return ((uint64_t)system_time_high_word << 32 | (uint64_t)system_get_time()) / 1000; +void background_tasks_reset(void) { + running_background_tasks = false; } -void common_hal_time_delay_ms(uint32_t delay) { - mp_hal_delay_ms(delay); +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + + assert_heap_ok(); + running_background_tasks = true; + + usb_background(); + filesystem_background(); + + running_background_tasks = false; + assert_heap_ok(); } diff --git a/ports/stm32/rng.h b/ports/cxd56/background.h similarity index 81% rename from ports/stm32/rng.h rename to ports/cxd56/background.h index ed9cc80f2b..a38e3faed4 100644 --- a/ports/stm32/rng.h +++ b/ports/cxd56/background.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,13 +23,11 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32_RNG_H -#define MICROPY_INCLUDED_STM32_RNG_H -#include "py/obj.h" +#ifndef MICROPY_INCLUDED_CXD56_BACKGROUND_H +#define MICROPY_INCLUDED_CXD56_BACKGROUND_H -uint32_t rng_get(void); +void background_tasks_reset(void); +void run_background_tasks(void); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_rng_get_obj); - -#endif // MICROPY_INCLUDED_STM32_RNG_H +#endif // MICROPY_INCLUDED_CXD56_BACKGROUND_H diff --git a/ports/pic16bit/board.h b/ports/cxd56/boards/board.h similarity index 65% rename from ports/pic16bit/board.h rename to ports/cxd56/boards/board.h index f45f875449..597ae72e6a 100644 --- a/ports/pic16bit/board.h +++ b/ports/cxd56/boards/board.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2015 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,21 +23,23 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_PIC16BIT_BOARD_H -#define MICROPY_INCLUDED_PIC16BIT_BOARD_H -void cpu_init(void); +// This file defines board specific functions. -void led_init(void); -void led_state(int led, int state); -void led_toggle(int led); +#ifndef MICROPY_INCLUDED_CXD56_BOARDS_BOARD_H +#define MICROPY_INCLUDED_CXD56_BOARDS_BOARD_H -void switch_init(void); -int switch_get(int sw); +#include -void uart_init(void); -int uart_rx_any(void); -int uart_rx_char(void); -void uart_tx_char(int chr); +// Initializes board related state once on start up. +void board_init(void); -#endif // MICROPY_INCLUDED_PIC16BIT_BOARD_H +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_CXD56_BOARDS_BOARD_H diff --git a/ports/esp8266/qstrdefsport.h b/ports/cxd56/boards/spresense/board.c similarity index 85% rename from ports/esp8266/qstrdefsport.h rename to ports/cxd56/boards/spresense/board.c index 8f301a69c5..2af7cfdcf2 100644 --- a/ports/esp8266/qstrdefsport.h +++ b/ports/cxd56/boards/spresense/board.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2014 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,8 +24,15 @@ * THE SOFTWARE. */ -// qstrs specific to this port, only needed if they aren't auto-generated +#include "boards/board.h" -// Entries for sys.path -Q(/) -Q(/lib) +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/cxd56/boards/spresense/mpconfigboard.h b/ports/cxd56/boards/spresense/mpconfigboard.h new file mode 100644 index 0000000000..0245e20450 --- /dev/null +++ b/ports/cxd56/boards/spresense/mpconfigboard.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define MICROPY_HW_BOARD_NAME "SPRESENSE" +#define MICROPY_HW_MCU_NAME "CXD5602" + +#define DEFAULT_I2C_BUS_SCL (&pin_I2C0_BCK) +#define DEFAULT_I2C_BUS_SDA (&pin_I2C0_BDT) + +#define DEFAULT_SPI_BUS_SCK (&pin_SPI4_SCK) +#define DEFAULT_SPI_BUS_MISO (&pin_SPI4_MISO) +#define DEFAULT_SPI_BUS_MOSI (&pin_SPI4_MOSI) + +#define DEFAULT_UART_BUS_RX (&pin_UART2_RXD) +#define DEFAULT_UART_BUS_TX (&pin_UART2_TXD) diff --git a/ports/cxd56/boards/spresense/mpconfigboard.mk b/ports/cxd56/boards/spresense/mpconfigboard.mk new file mode 100644 index 0000000000..a2d4e5d88c --- /dev/null +++ b/ports/cxd56/boards/spresense/mpconfigboard.mk @@ -0,0 +1,4 @@ +USB_VID = 0x054c +USB_PID = 0x0bc2 +USB_PRODUCT = "Spresense" +USB_MANUFACTURER = "Sony" diff --git a/ports/cxd56/boards/spresense/pins.c b/ports/cxd56/boards/spresense/pins.c new file mode 100644 index 0000000000..fcc854590a --- /dev/null +++ b/ports/cxd56/boards/spresense/pins.c @@ -0,0 +1,80 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_UART2_RXD) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_UART2_TXD) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_HIF_IRQ_OUT) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PWM3) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_SPI2_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PWM1) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PWM0) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_SPI3_CS1_X) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_SPI2_MISO) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PWM2) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_SPI4_CS_X) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_SPI4_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_SPI4_MISO) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_SPI4_SCK) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_I2C0_BDT) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_I2C0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_EMMC_DATA0) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_EMMC_DATA1) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_I2S0_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_I2S0_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_EMMC_DATA2) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_EMMC_DATA3) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_SEN_IRQ_IN) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_EMMC_CLK) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_EMMC_CMD) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_I2S0_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_I2S0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_UART2_CTS) }, + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_UART2_RTS) }, + { MP_ROM_QSTR(MP_QSTR_LED0), MP_ROM_PTR(&pin_I2S1_BCK) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_I2S1_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_I2S1_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_I2S1_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_LPADC0) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_LPADC1) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_LPADC2) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_LPADC3) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_HPADC0) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_HPADC1) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_I2C0_BDT) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_I2C0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_SPI4_SCK) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_SPI4_MISO) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_SPI4_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_UART2_RXD) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_UART2_TXD) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/cxd56/common-hal/analogio/AnalogIn.c b/ports/cxd56/common-hal/analogio/AnalogIn.c new file mode 100644 index 0000000000..e2ca5e4a42 --- /dev/null +++ b/ports/cxd56/common-hal/analogio/AnalogIn.c @@ -0,0 +1,133 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogIn.h" + +typedef struct { + const char* devpath; + const mcu_pin_obj_t *pin; + int fd; +} analogin_dev_t; + +STATIC analogin_dev_t analogin_dev[] = { + {"/dev/lpadc0", &pin_LPADC0, -1}, + {"/dev/lpadc1", &pin_LPADC1, -1}, + {"/dev/lpadc2", &pin_LPADC2, -1}, + {"/dev/lpadc3", &pin_LPADC3, -1}, + {"/dev/hpadc0", &pin_HPADC0, -1}, + {"/dev/hpadc1", &pin_HPADC1, -1}, +}; + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const mcu_pin_obj_t *pin) { + if (!pin->analog) { + mp_raise_ValueError(translate("AnalogIn not supported on given pin")); + } + + self->number = -1; + + for (int i = 0; i < MP_ARRAY_SIZE(analogin_dev); i++) { + if (pin->number == analogin_dev[i].pin->number) { + self->number = i; + break; + } + } + + if (self->number < 0) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + + if (analogin_dev[self->number].fd < 0) { + analogin_dev[self->number].fd = open(analogin_dev[self->number].devpath, O_RDONLY); + if (analogin_dev[self->number].fd < 0) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + } + + // SCU FIFO overwrite + ioctl(analogin_dev[self->number].fd, SCUIOC_SETFIFOMODE, 1); + + // ADC FIFO size + ioctl(analogin_dev[self->number].fd, ANIOC_CXD56_FIFOSIZE, 2); + + // start ADC + ioctl(analogin_dev[self->number].fd, ANIOC_CXD56_START, 0); + + self->pin = pin; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + + // stop ADC + ioctl(analogin_dev[self->number].fd, ANIOC_CXD56_STOP, 0); + close(analogin_dev[self->number].fd); + analogin_dev[self->number].fd = -1; + + self->pin = mp_const_none; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return analogin_dev[self->number].fd < 0; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + uint16_t value = 0; + + read(analogin_dev[self->number].fd, &value, sizeof(value)); + + return value; +} + +// Reference voltage is a fixed value which is depending on the board. +// e.g.) +// - Reference Voltage of A4 and A5 pins on Main Board is 0.7V. +// - Reference Voltage of A0 ~ A5 pins on External Interface board +// is selected 3.3V or 5.0V by a IO Volt jumper pin. +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 0.0f; +} + +void analogin_reset(void) { + for (int i = 0; i < MP_ARRAY_SIZE(analogin_dev); i++) { + if (analogin_dev[i].fd >= 0) { + // stop ADC + ioctl(analogin_dev[i].fd, ANIOC_CXD56_STOP, 0); + close(analogin_dev[i].fd); + analogin_dev[i].fd = -1; + } + } +} diff --git a/ports/esp8266/common-hal/analogio/AnalogIn.h b/ports/cxd56/common-hal/analogio/AnalogIn.h similarity index 80% rename from ports/esp8266/common-hal/analogio/AnalogIn.h rename to ports/cxd56/common-hal/analogio/AnalogIn.h index b20b8cc61e..9cf73003f5 100644 --- a/ports/esp8266/common-hal/analogio/AnalogIn.h +++ b/ports/cxd56/common-hal/analogio/AnalogIn.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,16 +24,19 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGIN_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGIN_H - -#include "common-hal/microcontroller/Pin.h" +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGIN_H #include "py/obj.h" +#include "common-hal/microcontroller/Pin.h" + typedef struct { mp_obj_base_t base; - bool deinited; + const mcu_pin_obj_t *pin; + int8_t number; } analogio_analogin_obj_t; -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGIN_H +void analogin_reset(void); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/esp8266/common-hal/analogio/AnalogOut.c b/ports/cxd56/common-hal/analogio/AnalogOut.c similarity index 77% rename from ports/esp8266/common-hal/analogio/AnalogOut.c rename to ports/cxd56/common-hal/analogio/AnalogOut.c index b01d8edb8a..3f1abe80d1 100644 --- a/ports/esp8266/common-hal/analogio/AnalogOut.c +++ b/ports/cxd56/common-hal/analogio/AnalogOut.c @@ -1,9 +1,9 @@ /* - * This file is part of the Micro Python project, http://micropython.org/ + * This file is part of the MicroPython project, http://micropython.org/ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,28 +24,20 @@ * THE SOFTWARE. */ +#include "py/runtime.h" + #include "shared-bindings/analogio/AnalogOut.h" -#include -#include -#include +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t *self, const mcu_pin_obj_t *pin) { + mp_raise_RuntimeError(translate("AnalogOut functionality not supported")); +} -#include "py/runtime.h" -#include "supervisor/shared/translate.h" - -void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, - const mcu_pin_obj_t *pin) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("No hardware support for analog out."))); +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { return true; } -void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { -} - -void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, - uint16_t value) { +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { } diff --git a/ports/esp8266/common-hal/analogio/AnalogOut.h b/ports/cxd56/common-hal/analogio/AnalogOut.h similarity index 81% rename from ports/esp8266/common-hal/analogio/AnalogOut.h rename to ports/cxd56/common-hal/analogio/AnalogOut.h index 79343a78fe..b0fd65265a 100644 --- a/ports/esp8266/common-hal/analogio/AnalogOut.h +++ b/ports/cxd56/common-hal/analogio/AnalogOut.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,14 +24,13 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGOUT_H #include "py/obj.h" -// Not supported, throws error on construction. typedef struct { mp_obj_base_t base; } analogio_analogout_obj_t; -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/esp8266/common-hal/analogio/__init__.c b/ports/cxd56/common-hal/analogio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/analogio/__init__.c rename to ports/cxd56/common-hal/analogio/__init__.c diff --git a/ports/cxd56/common-hal/board/__init__.c b/ports/cxd56/common-hal/board/__init__.c new file mode 100644 index 0000000000..7a409d503e --- /dev/null +++ b/ports/cxd56/common-hal/board/__init__.c @@ -0,0 +1 @@ +// No board module functions. diff --git a/ports/cxd56/common-hal/busio/I2C.c b/ports/cxd56/common-hal/busio/I2C.c new file mode 100644 index 0000000000..c163c183a9 --- /dev/null +++ b/ports/cxd56/common-hal/busio/I2C.c @@ -0,0 +1,123 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/busio/I2C.h" + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *scl, + const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { + if (frequency != I2C_SPEED_STANDARD && frequency != I2C_SPEED_FAST) { + mp_raise_ValueError(translate("Unsupported baudrate")); + } + + if (scl->number != PIN_I2C0_BCK || sda->number != PIN_I2C0_BDT) { + mp_raise_ValueError(translate("Invalid pins")); + } + + claim_pin(scl); + claim_pin(sda); + + self->scl_pin = scl; + self->sda_pin = sda; + self->frequency = frequency; + self->i2c_dev = cxd56_i2cbus_initialize(0); +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + cxd56_i2cbus_uninitialize(self->i2c_dev); + self->i2c_dev = NULL; + + reset_pin_number(self->scl_pin->number); + reset_pin_number(self->sda_pin->number); +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->i2c_dev == NULL; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + bool grabbed_lock = false; + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + return grabbed_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + struct i2c_msg_s msg; + + msg.frequency = self->frequency; + msg.addr = addr; + msg.flags = 0; + msg.buffer = NULL; + msg.length = 0; + return I2C_TRANSFER(self->i2c_dev, &msg, 1) < 0 ? false : true; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t address, const uint8_t *data, size_t len, bool stop) { + struct i2c_msg_s msg; + + msg.frequency = self->frequency; + msg.addr = address; + msg.flags = (stop ? 0 : I2C_M_NOSTOP); + msg.buffer = (uint8_t *) data; + msg.length = len; + return I2C_TRANSFER(self->i2c_dev, &msg, 1); +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t address, uint8_t *data, size_t len) { + struct i2c_msg_s msg; + + msg.frequency = self->frequency; + msg.addr = address; + msg.flags = I2C_M_READ; + msg.buffer = data; + msg.length = len; + return I2C_TRANSFER(self->i2c_dev, &msg, 1); +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + never_reset_pin_number(self->scl_pin->number); + never_reset_pin_number(self->sda_pin->number); +} diff --git a/ports/esp8266/common-hal/busio/SPI.h b/ports/cxd56/common-hal/busio/I2C.h similarity index 78% rename from ports/esp8266/common-hal/busio/SPI.h rename to ports/cxd56/common-hal/busio/I2C.h index 7b2de082c4..cdef270bfa 100644 --- a/ports/esp8266/common-hal/busio/SPI.h +++ b/ports/cxd56/common-hal/busio/I2C.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,21 +24,20 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_SPI_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_SPI_H - -#include "common-hal/microcontroller/Pin.h" +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_I2C_H #include "py/obj.h" +#include "common-hal/microcontroller/Pin.h" + typedef struct { mp_obj_base_t base; + struct i2c_master_s* i2c_dev; uint32_t frequency; - bool locked; - bool deinited; - const mcu_pin_obj_t * mosi; - const mcu_pin_obj_t * miso; - const mcu_pin_obj_t * clock; -} busio_spi_obj_t; + bool has_lock; + const mcu_pin_obj_t *scl_pin; + const mcu_pin_obj_t *sda_pin; +} busio_i2c_obj_t; -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_SPI_H +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/esp8266/common-hal/busio/OneWire.h b/ports/cxd56/common-hal/busio/OneWire.h similarity index 82% rename from ports/esp8266/common-hal/busio/OneWire.h rename to ports/cxd56/common-hal/busio/OneWire.h index 230474067b..17c1b22375 100644 --- a/ports/esp8266/common-hal/busio/OneWire.h +++ b/ports/cxd56/common-hal/busio/OneWire.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,10 +24,10 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_ONEWIRE_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_ONEWIRE_H +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_ONEWIRE_H -// Use the bitbang wrapper for OneWire +// Use bitbangio. #include "shared-module/busio/OneWire.h" -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_ONEWIRE_H +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/cxd56/common-hal/busio/SPI.c b/ports/cxd56/common-hal/busio/SPI.c new file mode 100644 index 0000000000..9a41011f2a --- /dev/null +++ b/ports/cxd56/common-hal/busio/SPI.c @@ -0,0 +1,155 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/busio/SPI.h" + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *clock, + const mcu_pin_obj_t *mosi, const mcu_pin_obj_t *miso) { + int port = -1; + + if (clock->number == PIN_SPI4_SCK && mosi->number == PIN_SPI4_MOSI && miso->number == PIN_SPI4_MISO) { + port = 4; + } else if (clock->number == PIN_EMMC_CLK && mosi->number == PIN_EMMC_DATA0 && miso->number == PIN_EMMC_DATA1) { + port = 5; + } + + if (port < 0) { + mp_raise_ValueError(translate("Invalid pins")); + } + + claim_pin(clock); + claim_pin(mosi); + claim_pin(miso); + + self->clock_pin = clock; + self->mosi_pin = mosi; + self->miso_pin = miso; + self->spi_dev = cxd56_spibus_initialize(port); +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + + self->spi_dev = NULL; + + reset_pin_number(self->clock_pin->number); + reset_pin_number(self->mosi_pin->number); + reset_pin_number(self->miso_pin->number); +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->spi_dev == NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + uint8_t mode; + + self->frequency = baudrate; + SPI_SETFREQUENCY(self->spi_dev, baudrate); + + if (polarity == 0) { + if (phase == 0) { + mode = SPIDEV_MODE0; + } else { + mode = SPIDEV_MODE1; + } + } else { + if (phase == 0) { + mode = SPIDEV_MODE2; + } else { + mode = SPIDEV_MODE3; + } + } + + self->polarity = polarity; + self->phase = phase; + SPI_SETMODE(self->spi_dev, mode); + + self->bits = bits; + SPI_SETBITS(self->spi_dev, bits); + + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + bool grabbed_lock = false; + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + return grabbed_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { + SPI_EXCHANGE(self->spi_dev, data, NULL, len); + + return true; +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { + SPI_EXCHANGE(self->spi_dev, NULL, data, len); + + return true; +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + SPI_EXCHANGE(self->spi_dev, data_out, data_in, len); + + return true; +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t *self) { + return self->frequency; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return self->phase; +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t *self) { + return self->polarity; +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + never_reset_pin_number(self->clock_pin->number); + never_reset_pin_number(self->mosi_pin->number); + never_reset_pin_number(self->miso_pin->number); +} diff --git a/ports/cxd56/common-hal/busio/SPI.h b/ports/cxd56/common-hal/busio/SPI.h new file mode 100644 index 0000000000..8985a60d9f --- /dev/null +++ b/ports/cxd56/common-hal/busio/SPI.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_SPI_H + +#include + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + struct spi_dev_s* spi_dev; + uint32_t frequency; + uint8_t phase; + uint8_t polarity; + uint8_t bits; + bool has_lock; + const mcu_pin_obj_t *clock_pin; + const mcu_pin_obj_t *mosi_pin; + const mcu_pin_obj_t *miso_pin; +} busio_spi_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/cxd56/common-hal/busio/UART.c b/ports/cxd56/common-hal/busio/UART.c new file mode 100644 index 0000000000..4a1376f19a --- /dev/null +++ b/ports/cxd56/common-hal/busio/UART.c @@ -0,0 +1,198 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "py/mperrno.h" +#include "py/stream.h" +#include "py/runtime.h" + +#include "shared-bindings/busio/UART.h" + +typedef struct { + const char* devpath; + const mcu_pin_obj_t *tx; + const mcu_pin_obj_t *rx; + int fd; +} busio_uart_dev_t; + +STATIC busio_uart_dev_t busio_uart_dev[] = { + {"/dev/ttyS2", &pin_UART2_TXD, &pin_UART2_RXD, -1}, +}; + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t *tx, const mcu_pin_obj_t *rx, uint32_t baudrate, + uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, + uint16_t receiver_buffer_size) { + struct termios tio; + + if (bits != 8) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + + if (parity != PARITY_NONE) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + + if (stop != 1) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + + self->number = -1; + + for (int i = 0; i < MP_ARRAY_SIZE(busio_uart_dev); i++) { + if (tx->number == busio_uart_dev[i].tx->number && + rx->number == busio_uart_dev[i].rx->number) { + self->number = i; + break; + } + } + + if (self->number < 0) { + mp_raise_ValueError(translate("Invalid pins")); + } + + if (busio_uart_dev[self->number].fd < 0) { + busio_uart_dev[self->number].fd = open(busio_uart_dev[self->number].devpath, O_RDWR); + if (busio_uart_dev[self->number].fd < 0) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + } + + ioctl(busio_uart_dev[self->number].fd, TCGETS, (long unsigned int)&tio); + tio.c_speed = baudrate; + ioctl(busio_uart_dev[self->number].fd, TCSETS, (long unsigned int)&tio); + ioctl(busio_uart_dev[self->number].fd, TCFLSH, (long unsigned int)NULL); + + claim_pin(tx); + claim_pin(rx); + + self->tx_pin = tx; + self->rx_pin = rx; + self->baudrate = baudrate; + self->timeout = timeout; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + return; + } + + close(busio_uart_dev[self->number].fd); + busio_uart_dev[self->number].fd = -1; + + reset_pin_number(self->tx_pin->number); + reset_pin_number(self->rx_pin->number); +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return busio_uart_dev[self->number].fd < 0; +} + +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + fd_set rfds; + struct timeval tv; + int retval, bytes_read; + + // make sure we want at least 1 char + if (len == 0) { + return 0; + } + + FD_ZERO(&rfds); + FD_SET(busio_uart_dev[self->number].fd, &rfds); + + tv.tv_sec = 0; + tv.tv_usec = self->timeout * 1000; + + retval = select(busio_uart_dev[self->number].fd + 1, &rfds, NULL, NULL, &tv); + + if (retval) { + bytes_read = read(busio_uart_dev[self->number].fd, data, len); + } else { + *errcode = EAGAIN; + return MP_STREAM_ERROR; + } + + return bytes_read; +} + +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + int bytes_written = write(busio_uart_dev[self->number].fd, data, len); + if (bytes_written < 0) { + *errcode = MP_EAGAIN; + return MP_STREAM_ERROR; + } + + return bytes_written; +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + return self->baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + struct termios tio; + + ioctl(busio_uart_dev[self->number].fd, TCGETS, (long unsigned int)&tio); + tio.c_speed = baudrate; + ioctl(busio_uart_dev[self->number].fd, TCSETS, (long unsigned int)&tio); + ioctl(busio_uart_dev[self->number].fd, TCFLSH, (long unsigned int)NULL); +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + int count = 0; + + ioctl(busio_uart_dev[self->number].fd, FIONREAD, (long unsigned int)&count); + + return count; +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { +} + +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + ioctl(busio_uart_dev[self->number].fd, TCFLSH, (long unsigned int)NULL); + return true; +} + +void busio_uart_reset(void) { + for (int i = 0; i < MP_ARRAY_SIZE(busio_uart_dev); i++) { + if (busio_uart_dev[i].fd >= 0) { + close(busio_uart_dev[i].fd); + busio_uart_dev[i].fd = -1; + } + } +} diff --git a/ports/esp8266/common-hal/busio/UART.h b/ports/cxd56/common-hal/busio/UART.h similarity index 78% rename from ports/esp8266/common-hal/busio/UART.h rename to ports/cxd56/common-hal/busio/UART.h index 9b75b66a33..e1d8161491 100644 --- a/ports/esp8266/common-hal/busio/UART.h +++ b/ports/cxd56/common-hal/busio/UART.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,17 +24,22 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_UART_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_UART_H - -#include "common-hal/microcontroller/Pin.h" +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_UART_H #include "py/obj.h" +#include "common-hal/microcontroller/Pin.h" + typedef struct { mp_obj_base_t base; + int8_t number; + const mcu_pin_obj_t *tx_pin; + const mcu_pin_obj_t *rx_pin; uint32_t baudrate; - bool deinited; + uint32_t timeout; } busio_uart_obj_t; -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_UART_H +void busio_uart_reset(void); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_UART_H diff --git a/ports/esp8266/common-hal/busio/__init__.c b/ports/cxd56/common-hal/busio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/busio/__init__.c rename to ports/cxd56/common-hal/busio/__init__.c diff --git a/ports/cxd56/common-hal/digitalio/DigitalInOut.c b/ports/cxd56/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 0000000000..7b1f6cc031 --- /dev/null +++ b/ports/cxd56/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,136 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" + +#include "shared-bindings/digitalio/DigitalInOut.h" + +digitalinout_result_t common_hal_digitalio_digitalinout_construct(digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + if (pin->analog) { + mp_raise_ValueError(translate("DigitalInOut not supported on given pin")); + } + + claim_pin(pin); + + self->pin = pin; + self->input = true; + self->open_drain = false; + + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, PIN_FLOAT); + + return DIGITALINOUT_OK; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { + return self->pin == mp_const_none; +} + +void common_hal_digitalio_digitalinout_switch_to_input(digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + self->input = true; + self->pull = pull; + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, pull); +} + +void common_hal_digitalio_digitalinout_switch_to_output(digitalio_digitalinout_obj_t *self, bool value, digitalio_drive_mode_t drive_mode) { + self->input = false; + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + + if (self->open_drain) { + board_gpio_write(self->pin->number, 0); + } + common_hal_digitalio_digitalinout_set_value(self, value); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction(digitalio_digitalinout_obj_t *self) { + return self->input ? DIRECTION_INPUT : DIRECTION_OUTPUT; +} + +void common_hal_digitalio_digitalinout_set_value(digitalio_digitalinout_obj_t *self, bool value) { + if (self->open_drain) { + if (value) { + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, PIN_PULLUP); + } else { + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + board_gpio_write(self->pin->number, 0); + } + } else { + board_gpio_write(self->pin->number, value); + } +} + +bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *self) { + return board_gpio_read(self->pin->number); +} + +void common_hal_digitalio_digitalinout_set_drive_mode(digitalio_digitalinout_obj_t *self, digitalio_drive_mode_t drive_mode) { + if (drive_mode == DRIVE_MODE_PUSH_PULL) { + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + self->open_drain = false; + } else { + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + board_gpio_write(self->pin->number, 0); + self->open_drain = true; + } +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode(digitalio_digitalinout_obj_t *self) { + return self->open_drain ? DRIVE_MODE_OPEN_DRAIN : DRIVE_MODE_PUSH_PULL; +} + +void common_hal_digitalio_digitalinout_set_pull(digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + self->pull = pull; + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, pull); +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull(digitalio_digitalinout_obj_t *self) { + return self->pull; +} + +void common_hal_digitalio_digitalinout_never_reset(digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} diff --git a/ports/esp8266/common-hal/digitalio/DigitalInOut.h b/ports/cxd56/common-hal/digitalio/DigitalInOut.h similarity index 80% rename from ports/esp8266/common-hal/digitalio/DigitalInOut.h rename to ports/cxd56/common-hal/digitalio/DigitalInOut.h index 80c23ff9fa..58a11817c8 100644 --- a/ports/esp8266/common-hal/digitalio/DigitalInOut.h +++ b/ports/cxd56/common-hal/digitalio/DigitalInOut.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,17 +24,19 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_DIGITALIO_DIGITALINOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "py/obj.h" #include "common-hal/microcontroller/Pin.h" -#include "py/obj.h" typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t * pin; - bool output; + const mcu_pin_obj_t *pin; + bool input; bool open_drain; + uint8_t pull; } digitalio_digitalinout_obj_t; -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/esp8266/common-hal/digitalio/__init__.c b/ports/cxd56/common-hal/digitalio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/digitalio/__init__.c rename to ports/cxd56/common-hal/digitalio/__init__.c diff --git a/ports/cxd56/common-hal/microcontroller/Pin.c b/ports/cxd56/common-hal/microcontroller/Pin.c new file mode 100644 index 0000000000..23377197c2 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/Pin.c @@ -0,0 +1,162 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include +#include +#include +#include + +#include "shared-bindings/microcontroller/Pin.h" + +typedef struct { + const mcu_pin_obj_t *pin; + bool reset; + bool free; +} pin_status_t; + +const mcu_pin_obj_t pin_UART2_RXD = PIN(PIN_UART2_RXD, false); +const mcu_pin_obj_t pin_UART2_TXD = PIN(PIN_UART2_TXD, false); +const mcu_pin_obj_t pin_HIF_IRQ_OUT = PIN(PIN_HIF_IRQ_OUT, false); +const mcu_pin_obj_t pin_PWM3 = PIN(PIN_PWM3, false); +const mcu_pin_obj_t pin_SPI2_MOSI = PIN(PIN_SPI2_MOSI, false); +const mcu_pin_obj_t pin_PWM1 = PIN(PIN_PWM1, false); +const mcu_pin_obj_t pin_PWM0 = PIN(PIN_PWM0, false); +const mcu_pin_obj_t pin_SPI3_CS1_X = PIN(PIN_SPI3_CS1_X, false); +const mcu_pin_obj_t pin_SPI2_MISO = PIN(PIN_SPI2_MISO, false); +const mcu_pin_obj_t pin_PWM2 = PIN(PIN_PWM2, false); +const mcu_pin_obj_t pin_SPI4_CS_X = PIN(PIN_SPI4_CS_X, false); +const mcu_pin_obj_t pin_SPI4_MOSI = PIN(PIN_SPI4_MOSI, false); +const mcu_pin_obj_t pin_SPI4_MISO = PIN(PIN_SPI4_MISO, false); +const mcu_pin_obj_t pin_SPI4_SCK = PIN(PIN_SPI4_SCK, false); +const mcu_pin_obj_t pin_I2C0_BDT = PIN(PIN_I2C0_BDT, false); +const mcu_pin_obj_t pin_I2C0_BCK = PIN(PIN_I2C0_BCK, false); +const mcu_pin_obj_t pin_EMMC_DATA0 = PIN(PIN_EMMC_DATA0, false); +const mcu_pin_obj_t pin_EMMC_DATA1 = PIN(PIN_EMMC_DATA1, false); +const mcu_pin_obj_t pin_I2S0_DATA_OUT = PIN(PIN_I2S0_DATA_OUT, false); +const mcu_pin_obj_t pin_I2S0_DATA_IN = PIN(PIN_I2S0_DATA_IN, false); +const mcu_pin_obj_t pin_EMMC_DATA2 = PIN(PIN_EMMC_DATA2, false); +const mcu_pin_obj_t pin_EMMC_DATA3 = PIN(PIN_EMMC_DATA3, false); +const mcu_pin_obj_t pin_SEN_IRQ_IN = PIN(PIN_SEN_IRQ_IN, false); +const mcu_pin_obj_t pin_EMMC_CLK = PIN(PIN_EMMC_CLK, false); +const mcu_pin_obj_t pin_EMMC_CMD = PIN(PIN_EMMC_CMD, false); +const mcu_pin_obj_t pin_I2S0_LRCK = PIN(PIN_I2S0_LRCK, false); +const mcu_pin_obj_t pin_I2S0_BCK = PIN(PIN_I2S0_BCK, false); +const mcu_pin_obj_t pin_UART2_CTS = PIN(PIN_UART2_CTS, false); +const mcu_pin_obj_t pin_UART2_RTS = PIN(PIN_UART2_RTS, false); +const mcu_pin_obj_t pin_I2S1_BCK = PIN(PIN_I2S1_BCK, false); +const mcu_pin_obj_t pin_I2S1_LRCK = PIN(PIN_I2S1_LRCK, false); +const mcu_pin_obj_t pin_I2S1_DATA_IN = PIN(PIN_I2S1_DATA_IN, false); +const mcu_pin_obj_t pin_I2S1_DATA_OUT = PIN(PIN_I2S1_DATA_OUT, false); +const mcu_pin_obj_t pin_LPADC0 = PIN(0, true); +const mcu_pin_obj_t pin_LPADC1 = PIN(1, true); +const mcu_pin_obj_t pin_LPADC2 = PIN(2, true); +const mcu_pin_obj_t pin_LPADC3 = PIN(3, true); +const mcu_pin_obj_t pin_HPADC0 = PIN(4, true); +const mcu_pin_obj_t pin_HPADC1 = PIN(5, true); + +STATIC pin_status_t pins[] = { + { &pin_UART2_RXD, true, true }, + { &pin_UART2_TXD, true, true }, + { &pin_HIF_IRQ_OUT, true, true }, + { &pin_PWM3, true, true }, + { &pin_SPI2_MOSI, true, true }, + { &pin_PWM1, true, true }, + { &pin_PWM0, true, true }, + { &pin_SPI3_CS1_X, true, true }, + { &pin_SPI2_MISO, true, true }, + { &pin_PWM2, true, true }, + { &pin_SPI4_CS_X, true, true }, + { &pin_SPI4_MOSI, true, true }, + { &pin_SPI4_MISO, true, true }, + { &pin_SPI4_SCK, true, true }, + { &pin_I2C0_BDT, true, true }, + { &pin_I2C0_BCK, true, true }, + { &pin_EMMC_DATA0, true, true }, + { &pin_EMMC_DATA1, true, true }, + { &pin_I2S0_DATA_OUT, true, true }, + { &pin_I2S0_DATA_IN, true, true }, + { &pin_EMMC_DATA2, true, true }, + { &pin_EMMC_DATA3, true, true }, + { &pin_SEN_IRQ_IN, true, true }, + { &pin_EMMC_CLK, true, true }, + { &pin_EMMC_CMD, true, true }, + { &pin_I2S0_LRCK, true, true }, + { &pin_I2S0_BCK, true, true }, + { &pin_UART2_CTS, true, true }, + { &pin_UART2_RTS, true, true }, + { &pin_I2S1_BCK, true, true }, + { &pin_I2S1_LRCK, true, true }, + { &pin_I2S1_DATA_IN, true, true }, + { &pin_I2S1_DATA_OUT, true, true }, +}; + +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin->number) { + return pins[i].free; + } + } + + return true; +} + +void never_reset_pin_number(uint8_t pin_number) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin_number) { + pins[i].reset = false; + } + } +} + +void reset_pin_number(uint8_t pin_number) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin_number) { + pins[i].free = true; + } + } +} + +void reset_all_pins(void) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (!pins[i].free && pins[i].reset) { + board_gpio_write(pins[i].pin->number, -1); + board_gpio_config(pins[i].pin->number, 0, false, true, PIN_FLOAT); + board_gpio_int(pins[i].pin->number, false); + board_gpio_intconfig(pins[i].pin->number, 0, false, NULL); + pins[i].free = true; + } + } +} + +void claim_pin(const mcu_pin_obj_t *pin) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin->number) { + pins[i].free = false; + } + } +} diff --git a/ports/cxd56/common-hal/microcontroller/Pin.h b/ports/cxd56/common-hal/microcontroller/Pin.h new file mode 100644 index 0000000000..fe6524edb5 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/Pin.h @@ -0,0 +1,92 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PIN_H + +#include "py/obj.h" + +extern const mp_obj_type_t mcu_pin_type; + +#define PIN(pin, a) \ +{ \ + { &mcu_pin_type }, \ + .number = (pin), \ + .analog = (a) \ +} + +typedef struct { + mp_obj_base_t base; + uint8_t number; + bool analog; +} mcu_pin_obj_t; + +extern const mcu_pin_obj_t pin_UART2_RXD; +extern const mcu_pin_obj_t pin_UART2_TXD; +extern const mcu_pin_obj_t pin_HIF_IRQ_OUT; +extern const mcu_pin_obj_t pin_PWM3; +extern const mcu_pin_obj_t pin_SPI2_MOSI; +extern const mcu_pin_obj_t pin_PWM1; +extern const mcu_pin_obj_t pin_PWM0; +extern const mcu_pin_obj_t pin_SPI3_CS1_X; +extern const mcu_pin_obj_t pin_SPI2_MISO; +extern const mcu_pin_obj_t pin_PWM2; +extern const mcu_pin_obj_t pin_SPI4_CS_X; +extern const mcu_pin_obj_t pin_SPI4_MOSI; +extern const mcu_pin_obj_t pin_SPI4_MISO; +extern const mcu_pin_obj_t pin_SPI4_SCK; +extern const mcu_pin_obj_t pin_I2C0_BDT; +extern const mcu_pin_obj_t pin_I2C0_BCK; +extern const mcu_pin_obj_t pin_EMMC_DATA0; +extern const mcu_pin_obj_t pin_EMMC_DATA1; +extern const mcu_pin_obj_t pin_I2S0_DATA_OUT; +extern const mcu_pin_obj_t pin_I2S0_DATA_IN; +extern const mcu_pin_obj_t pin_EMMC_DATA2; +extern const mcu_pin_obj_t pin_EMMC_DATA3; +extern const mcu_pin_obj_t pin_SEN_IRQ_IN; +extern const mcu_pin_obj_t pin_EMMC_CLK; +extern const mcu_pin_obj_t pin_EMMC_CMD; +extern const mcu_pin_obj_t pin_I2S0_LRCK; +extern const mcu_pin_obj_t pin_I2S0_BCK; +extern const mcu_pin_obj_t pin_UART2_CTS; +extern const mcu_pin_obj_t pin_UART2_RTS; +extern const mcu_pin_obj_t pin_I2S1_BCK; +extern const mcu_pin_obj_t pin_I2S1_LRCK; +extern const mcu_pin_obj_t pin_I2S1_DATA_IN; +extern const mcu_pin_obj_t pin_I2S1_DATA_OUT; +extern const mcu_pin_obj_t pin_LPADC0; +extern const mcu_pin_obj_t pin_LPADC1; +extern const mcu_pin_obj_t pin_LPADC2; +extern const mcu_pin_obj_t pin_LPADC3; +extern const mcu_pin_obj_t pin_HPADC0; +extern const mcu_pin_obj_t pin_HPADC1; + +void never_reset_pin_number(uint8_t pin_number); +void reset_pin_number(uint8_t pin_number); +void reset_all_pins(void); +void claim_pin(const mcu_pin_obj_t* pin); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/esp8266/common-hal/microcontroller/Processor.c b/ports/cxd56/common-hal/microcontroller/Processor.c similarity index 82% rename from ports/esp8266/common-hal/microcontroller/Processor.c rename to ports/cxd56/common-hal/microcontroller/Processor.c index 3602228d03..3e6fc3b8aa 100644 --- a/ports/esp8266/common-hal/microcontroller/Processor.c +++ b/ports/cxd56/common-hal/microcontroller/Processor.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,25 +24,24 @@ * THE SOFTWARE. */ -#include "common-hal/microcontroller/Processor.h" +#include +// For NAN: remove when not needed. #include +#include "py/mphal.h" -#include "esp_mphal.h" -#include "user_interface.h" - +uint32_t common_hal_mcu_processor_get_frequency(void) { + return mp_hal_ticks_cpu(); +} float common_hal_mcu_processor_get_temperature(void) { return NAN; } -uint32_t common_hal_mcu_processor_get_frequency(void) { - return mp_hal_get_cpu_freq(); +float common_hal_mcu_processor_get_voltage(void) { + return NAN; } void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { - uint32_t id = system_get_chip_id(); - for (int i=0; i<4; i++){ - raw_id[i] = id >> (i * 8); - } + boardctl(BOARDIOC_UNIQUEID, (uintptr_t) raw_id); } diff --git a/ports/esp8266/common-hal/microcontroller/Processor.h b/ports/cxd56/common-hal/microcontroller/Processor.h similarity index 77% rename from ports/esp8266/common-hal/microcontroller/Processor.h rename to ports/cxd56/common-hal/microcontroller/Processor.h index 7d7861fd57..12555e82c1 100644 --- a/ports/esp8266/common-hal/microcontroller/Processor.h +++ b/ports/cxd56/common-hal/microcontroller/Processor.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,16 +24,17 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H -#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 4 +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH CONFIG_BOARDCTL_UNIQUEID_SIZE #include "py/obj.h" typedef struct { mp_obj_base_t base; - // Stores no state currently. } mcu_processor_obj_t; -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +const mp_obj_type_t mcu_processor_type; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/cxd56/common-hal/microcontroller/__init__.c b/ports/cxd56/common-hal/microcontroller/__init__.c new file mode 100644 index 0000000000..2be74b0069 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/__init__.c @@ -0,0 +1,111 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mphal.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/safe_mode.h" + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +void common_hal_mcu_delay_us(uint32_t delay) { + mp_hal_delay_us(delay); +} + +void common_hal_mcu_disable_interrupts(void) { + __asm volatile ("cpsid i" : : : "memory"); +} + +void common_hal_mcu_enable_interrupts(void) { + __asm volatile ("cpsie i" : : : "memory"); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if(runmode == RUNMODE_BOOTLOADER) { + mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); + } else if(runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); + } +} + +void common_hal_mcu_reset(void) { + filesystem_flush(); + boardctl(BOARDIOC_RESET, 0); +} + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_UART2_RXD), MP_ROM_PTR(&pin_UART2_RXD) }, + { MP_ROM_QSTR(MP_QSTR_UART2_TXD), MP_ROM_PTR(&pin_UART2_TXD) }, + { MP_ROM_QSTR(MP_QSTR_HIF_IRQ_OUT), MP_ROM_PTR(&pin_HIF_IRQ_OUT) }, + { MP_ROM_QSTR(MP_QSTR_PWM3), MP_ROM_PTR(&pin_PWM3) }, + { MP_ROM_QSTR(MP_QSTR_SPI2_MOSI), MP_ROM_PTR(&pin_SPI2_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_PWM1) }, + { MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_PWM0) }, + { MP_ROM_QSTR(MP_QSTR_SPI3_CS1_X), MP_ROM_PTR(&pin_SPI3_CS1_X) }, + { MP_ROM_QSTR(MP_QSTR_SPI2_MISO), MP_ROM_PTR(&pin_SPI2_MISO) }, + { MP_ROM_QSTR(MP_QSTR_PWM2), MP_ROM_PTR(&pin_PWM2) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_CS_X), MP_ROM_PTR(&pin_SPI4_CS_X) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_MOSI), MP_ROM_PTR(&pin_SPI4_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_MISO), MP_ROM_PTR(&pin_SPI4_MISO) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_SCK), MP_ROM_PTR(&pin_SPI4_SCK) }, + { MP_ROM_QSTR(MP_QSTR_I2C0_BDT), MP_ROM_PTR(&pin_I2C0_BDT) }, + { MP_ROM_QSTR(MP_QSTR_I2C0_BCK), MP_ROM_PTR(&pin_I2C0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA0), MP_ROM_PTR(&pin_EMMC_DATA0) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA1), MP_ROM_PTR(&pin_EMMC_DATA1) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_DATA_OUT), MP_ROM_PTR(&pin_I2S0_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_DATA_IN), MP_ROM_PTR(&pin_I2S0_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA2), MP_ROM_PTR(&pin_EMMC_DATA2) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA3), MP_ROM_PTR(&pin_EMMC_DATA3) }, + { MP_ROM_QSTR(MP_QSTR_SEN_IRQ_IN), MP_ROM_PTR(&pin_SEN_IRQ_IN) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_CLK), MP_ROM_PTR(&pin_EMMC_CLK) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_CMD), MP_ROM_PTR(&pin_EMMC_CMD) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_LRCK), MP_ROM_PTR(&pin_I2S0_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_BCK), MP_ROM_PTR(&pin_I2S0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_UART2_CTS), MP_ROM_PTR(&pin_UART2_CTS) }, + { MP_ROM_QSTR(MP_QSTR_UART2_RTS), MP_ROM_PTR(&pin_UART2_RTS) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_BCK), MP_ROM_PTR(&pin_I2S1_BCK) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_LRCK), MP_ROM_PTR(&pin_I2S1_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_DATA_IN), MP_ROM_PTR(&pin_I2S1_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_DATA_OUT), MP_ROM_PTR(&pin_I2S1_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_LPADC0), MP_ROM_PTR(&pin_LPADC0) }, + { MP_ROM_QSTR(MP_QSTR_LPADC1), MP_ROM_PTR(&pin_LPADC1) }, + { MP_ROM_QSTR(MP_QSTR_LPADC2), MP_ROM_PTR(&pin_LPADC2) }, + { MP_ROM_QSTR(MP_QSTR_LPADC3), MP_ROM_PTR(&pin_LPADC3) }, + { MP_ROM_QSTR(MP_QSTR_HPADC0), MP_ROM_PTR(&pin_HPADC0) }, + { MP_ROM_QSTR(MP_QSTR_HPADC1), MP_ROM_PTR(&pin_HPADC1) }, +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/esp8266/common-hal/os/__init__.c b/ports/cxd56/common-hal/os/__init__.c similarity index 62% rename from ports/esp8266/common-hal/os/__init__.c rename to ports/cxd56/common-hal/os/__init__.c index a686964be8..d4b0e23bec 100644 --- a/ports/esp8266/common-hal/os/__init__.c +++ b/ports/cxd56/common-hal/os/__init__.c @@ -3,8 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2015 Josef Gajdusek - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -25,58 +24,49 @@ * THE SOFTWARE. */ -#include +#include -#include "esp_mphal.h" -#include "etshal.h" -#include "py/objtuple.h" -#include "py/objstr.h" -#include "extmod/misc.h" #include "genhdr/mpversion.h" -#include "user_interface.h" +#include "py/objstr.h" +#include "py/objtuple.h" STATIC const qstr os_uname_info_fields[] = { MP_QSTR_sysname, MP_QSTR_nodename, MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine }; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, MICROPY_PY_SYS_PLATFORM); + +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "spresense"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "spresense"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); -STATIC mp_obj_tuple_t os_uname_info_obj = { - .base = {&mp_type_attrtuple}, - .len = 5, - .items = { - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - NULL, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj, - (void *)os_uname_info_fields, - } -}; +STATIC MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj +); mp_obj_t common_hal_os_uname(void) { - // We must populate the "release" field each time in case it was GC'd since the last call. - const char *ver = system_get_sdk_version(); - os_uname_info_obj.items[2] = mp_obj_new_str(ver, strlen(ver)); return (mp_obj_t)&os_uname_info_obj; } -static uint32_t last_random; -bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { +bool common_hal_os_urandom(uint8_t* buffer, mp_uint_t length) { uint32_t i = 0; + while (i < length) { - uint32_t new_random = last_random; - while (new_random == last_random) { - new_random = *WDEV_HWRNG; - } + uint32_t new_random = rand(); for (int j = 0; j < 4 && i < length; j++) { buffer[i] = new_random & 0xff; i++; new_random >>= 8; } } + return true; } diff --git a/ports/cxd56/common-hal/pulseio/PWMOut.c b/ports/cxd56/common-hal/pulseio/PWMOut.c new file mode 100644 index 0000000000..a0b4e79c60 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PWMOut.c @@ -0,0 +1,159 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/pulseio/PWMOut.h" + +typedef struct { + const char* devpath; + const mcu_pin_obj_t *pin; + int fd; + bool reset; +} pwmout_dev_t; + +STATIC pwmout_dev_t pwmout_dev[] = { + {"/dev/pwm0", &pin_PWM0, -1, true}, + {"/dev/pwm1", &pin_PWM1, -1, true}, + {"/dev/pwm2", &pin_PWM2, -1, true}, + {"/dev/pwm3", &pin_PWM3, -1, true} +}; + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t *self, + const mcu_pin_obj_t *pin, uint16_t duty, uint32_t frequency, + bool variable_frequency) { + self->number = -1; + + for (int i = 0; i < MP_ARRAY_SIZE(pwmout_dev); i++) { + if (pin->number == pwmout_dev[i].pin->number) { + self->number = i; + break; + } + } + + if (self->number < 0) { + return PWMOUT_INVALID_PIN; + } + + if (pwmout_dev[self->number].fd < 0) { + pwmout_dev[self->number].fd = open(pwmout_dev[self->number].devpath, O_RDONLY); + if (pwmout_dev[self->number].fd < 0) { + return PWMOUT_INVALID_PIN; + } + } + + self->info.frequency = frequency; + self->info.duty = duty; + self->variable_frequency = variable_frequency; + + if (ioctl(pwmout_dev[self->number].fd, PWMIOC_SETCHARACTERISTICS, (unsigned long)((uintptr_t)&self->info)) < 0) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } + ioctl(pwmout_dev[self->number].fd, PWMIOC_START, 0); + + claim_pin(pin); + + self->pin = pin; + + return PWMOUT_OK; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t *self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + + ioctl(pwmout_dev[self->number].fd, PWMIOC_STOP, 0); + close(pwmout_dev[self->number].fd); + pwmout_dev[self->number].fd = -1; + + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t *self) { + return pwmout_dev[self->number].fd < 0; +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t *self, uint16_t duty) { + self->info.duty = duty; + + ioctl(pwmout_dev[self->number].fd, PWMIOC_SETCHARACTERISTICS, (unsigned long)((uintptr_t)&self->info)); +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t *self) { + return self->info.duty; +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t *self, uint32_t frequency) { + self->info.frequency = frequency; + + if (ioctl(pwmout_dev[self->number].fd, PWMIOC_SETCHARACTERISTICS, (unsigned long)((uintptr_t)&self->info)) < 0) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t *self) { + return self->info.frequency; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t *self) { + return self->variable_frequency; +} + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { + never_reset_pin_number(self->pin->number); + + pwmout_dev[self->number].reset = false; +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + pwmout_dev[self->number].reset = true; +} + +void pwmout_reset(void) { + for (int i = 0; i < MP_ARRAY_SIZE(pwmout_dev); i++) { + if (pwmout_dev[i].fd >= 0 && pwmout_dev[i].reset) { + ioctl(pwmout_dev[i].fd, PWMIOC_STOP, 0); + close(pwmout_dev[i].fd); + pwmout_dev[i].fd = -1; + + reset_pin_number(pwmout_dev[i].pin->number); + } + } +} + +void pwmout_start(uint8_t pwm_num) { + ioctl(pwmout_dev[pwm_num].fd, PWMIOC_START, 0); +} + +void pwmout_stop(uint8_t pwm_num) { + ioctl(pwmout_dev[pwm_num].fd, PWMIOC_STOP, 0); +} diff --git a/ports/esp8266/common-hal/pulseio/PWMOut.h b/ports/cxd56/common-hal/pulseio/PWMOut.h similarity index 73% rename from ports/esp8266/common-hal/pulseio/PWMOut.h rename to ports/cxd56/common-hal/pulseio/PWMOut.h index d40da2632c..57fc4181f0 100644 --- a/ports/esp8266/common-hal/pulseio/PWMOut.h +++ b/ports/cxd56/common-hal/pulseio/PWMOut.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,17 +24,25 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PWMOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PWMOUT_H +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H + +#include #include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + typedef struct { mp_obj_base_t base; - int channel; - const mcu_pin_obj_t* pin; + const mcu_pin_obj_t *pin; + struct pwm_info_s info; + bool variable_frequency; + int8_t number; } pulseio_pwmout_obj_t; void pwmout_reset(void); +void pwmout_start(uint8_t pwm_num); +void pwmout_stop(uint8_t pwm_num); -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PWMOUT_H +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/esp8266/common-hal/pulseio/PulseIn.c b/ports/cxd56/common-hal/pulseio/PulseIn.c similarity index 52% rename from ports/esp8266/common-hal/pulseio/PulseIn.c rename to ports/cxd56/common-hal/pulseio/PulseIn.c index 40ba39e5fe..dd2773d1d0 100644 --- a/ports/esp8266/common-hal/pulseio/PulseIn.c +++ b/ports/cxd56/common-hal/pulseio/PulseIn.c @@ -1,9 +1,9 @@ /* - * This file is part of the Micro Python project, http://micropython.org/ + * This file is part of the MicroPython project, http://micropython.org/ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,129 +24,138 @@ * THE SOFTWARE. */ -#include +#include -#include -#include -#include "esp_mphal.h" - -#include "mpconfigport.h" -#include "py/gc.h" #include "py/runtime.h" -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/pulseio/PulseIn.h" -#include "supervisor/shared/translate.h" -#include "common-hal/microcontroller/__init__.h" +#include "py/mphal.h" -static void pulsein_set_interrupt(pulseio_pulsein_obj_t *self, bool rising, bool falling) { - ETS_GPIO_INTR_DISABLE(); - // Set interrupt mode - GPIO_REG_WRITE( - GPIO_PIN_ADDR(self->pin->gpio_number), - (GPIO_REG_READ(GPIO_PIN_ADDR(self->pin->gpio_number) & ~GPIO_PIN_INT_TYPE_MASK)) | - GPIO_PIN_INT_TYPE_SET( - (rising ? GPIO_PIN_INTR_POSEDGE : 0) | (falling ? GPIO_PIN_INTR_NEGEDGE : 0) - ) - ); - // Clear interrupt status - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << self->pin->gpio_number); - ETS_GPIO_INTR_ENABLE(); +#include "shared-bindings/pulseio/PulseIn.h" +#include "shared-bindings/microcontroller/__init__.h" + +static pulseio_pulsein_obj_t *pulsein_objects[12]; + +static int pulsein_interrupt_handler(int irq, FAR void *context, FAR void *arg); + +static int pulsein_set_config(pulseio_pulsein_obj_t *self, bool first_edge) { + int mode; + + if (!first_edge) { + mode = INT_BOTH_EDGE; + } else if (self->idle_state) { + mode = INT_FALLING_EDGE; + } else { + mode = INT_RISING_EDGE; + } + return board_gpio_intconfig(self->pin->number, mode, false, pulsein_interrupt_handler); } -void pulseio_pulsein_interrupt_handler(void *data) { - pulseio_pulsein_obj_t *self = data; - uint32_t time_us = system_get_time(); +static int pulsein_interrupt_handler(int irq, FAR void *context, FAR void *arg) { + // Grab the current time first. + uint32_t current_us = mp_hal_ticks_us(); + + pulseio_pulsein_obj_t *self = pulsein_objects[irq - CXD56_IRQ_EXDEVICE_0]; + if (self->first_edge) { self->first_edge = false; - pulsein_set_interrupt(self, true, true); + pulsein_set_config(self, false); + board_gpio_int(self->pin->number, true); } else { - uint16_t elapsed_us = (uint16_t)(time_us - self->last_us); + uint32_t us_diff = current_us - self->last_us; + + uint16_t duration = 0xffff; + if (us_diff < duration) { + duration = us_diff; + } + uint16_t i = (self->start + self->len) % self->maxlen; - self->buffer[i] = elapsed_us; + self->buffer[i] = duration; if (self->len < self->maxlen) { self->len++; } else { self->start++; } } - self->last_us = time_us; + self->last_us = current_us; + + return 0; } -void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, - const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { - if (pin->gpio_number == NO_GPIO || pin->gpio_function == SPECIAL_CASE) { - mp_raise_msg_varg(&mp_type_ValueError, translate("No PulseIn support for %q"), pin->name ); - } - PIN_FUNC_SELECT(pin->peripheral, pin->gpio_function); - PIN_PULLUP_DIS(pin->peripheral); - self->pin = pin; - +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t *self, + const mcu_pin_obj_t *pin, uint16_t maxlen, bool idle_state) { self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); if (self->buffer == NULL) { mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); } + self->pin = pin; self->maxlen = maxlen; self->idle_state = idle_state; self->start = 0; self->len = 0; self->first_edge = true; - self->last_us = 0; self->paused = false; - microcontroller_pin_register_intr_handler(self->pin->gpio_number, - pulseio_pulsein_interrupt_handler, (void *)self); - pulsein_set_interrupt(self, !idle_state, idle_state); -} + int irq = pulsein_set_config(self, true); + if (irq < 0) { + mp_raise_RuntimeError(translate("EXTINT channel already in use")); + } else { + pulsein_objects[irq - CXD56_IRQ_EXDEVICE_0] = self; + } -bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { - return self->buffer == NULL; -} + claim_pin(pin); -void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { - pulsein_set_interrupt(self, false, false); - microcontroller_pin_register_intr_handler(self->pin->gpio_number, NULL, NULL); - PIN_FUNC_SELECT(self->pin->peripheral, 0); - m_free(self->buffer); - self->buffer = NULL; + board_gpio_int(self->pin->number, true); } + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t *self) { + if (common_hal_pulseio_pulsein_deinited(self)) { + return; + } -void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { - pulsein_set_interrupt(self, false, false); + board_gpio_int(self->pin->number, false); + board_gpio_intconfig(self->pin->number, 0, false, NULL); + + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t *self) { + return self->pin == mp_const_none; +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t *self) { + board_gpio_int(self->pin->number, false); self->paused = true; } - -void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, - uint16_t trigger_duration) { + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t *self, uint16_t trigger_duration) { // Make sure we're paused. common_hal_pulseio_pulsein_pause(self); // Send the trigger pulse. if (trigger_duration > 0) { - uint32_t mask = 1 << self->pin->gpio_number; - // switch pin to an output with state opposite idle state - gpio_output_set(self->idle_state ? 0 : mask, self->idle_state ? mask : 0, 0, 0); - gpio_output_set(0, 0, mask, 0); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + board_gpio_write(self->pin->number, !self->idle_state); common_hal_mcu_delay_us((uint32_t)trigger_duration); - // switch pin back to an open input - gpio_output_set(0, 0, 0, mask); + board_gpio_write(self->pin->number, self->idle_state); } - common_hal_mcu_disable_interrupts(); + // Reconfigure the pin and make sure its set to detect the first edge. self->first_edge = true; - pulsein_set_interrupt(self, !self->idle_state, self->idle_state); - common_hal_mcu_enable_interrupts(); self->paused = false; -} -void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { + pulsein_set_config(self, true); + board_gpio_int(self->pin->number, true); +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t *self) { common_hal_mcu_disable_interrupts(); self->start = 0; self->len = 0; common_hal_mcu_enable_interrupts(); } - -uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t *self) { if (self->len == 0) { mp_raise_IndexError(translate("pop from an empty PulseIn")); } @@ -158,21 +167,20 @@ uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { return value; } - -uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t *self) { return self->maxlen; } - -bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t *self) { return self->paused; } - -uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t *self) { return self->len; } - -uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, - int16_t index) { + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t *self, int16_t index) { common_hal_mcu_disable_interrupts(); if (index < 0) { index += self->len; @@ -185,3 +193,4 @@ uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, common_hal_mcu_enable_interrupts(); return value; } + \ No newline at end of file diff --git a/ports/cxd56/common-hal/pulseio/PulseIn.h b/ports/cxd56/common-hal/pulseio/PulseIn.h new file mode 100644 index 0000000000..ff31712abc --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PulseIn.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + uint16_t *buffer; + uint16_t maxlen; + uint16_t start; + uint16_t len; + uint32_t last_us; + bool idle_state; + bool first_edge; + bool paused; +} pulseio_pulsein_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/cxd56/common-hal/pulseio/PulseOut.c b/ports/cxd56/common-hal/pulseio/PulseOut.c new file mode 100644 index 0000000000..5e1d5a2ed4 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PulseOut.c @@ -0,0 +1,126 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/pulseio/PulseOut.h" + +static uint16_t *pulse_buffer = NULL; +static uint16_t pulse_index = 0; +static uint16_t pulse_length; +static int pulse_fd = -1; + +static bool pulseout_timer_handler(unsigned int *next_interval_us, void *arg) +{ + uint8_t pwm_num = (uint8_t)(int)arg; + pulse_index++; + + if (pulse_index >= pulse_length) { + return false; + } + + *next_interval_us = pulse_buffer[pulse_index] * 1000; + + if (pulse_index % 2 == 0) { + pwmout_start(pwm_num); + } else { + pwmout_stop(pwm_num); + } + + return true; +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t *self, + const pulseio_pwmout_obj_t *carrier) { + if (pulse_fd < 0) { + pulse_fd = open("/dev/timer0", O_RDONLY); + } + + if (pulse_fd < 0) { + mp_raise_RuntimeError(translate("All timers in use")); + } + + self->pwm_num = carrier->number; +} + +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t *self) { + if (common_hal_pulseio_pulseout_deinited(self)) { + return; + } + + ioctl(pulse_fd, TCIOC_STOP, 0); + close(pulse_fd); + pulse_fd = -1; + + pulse_buffer = NULL; +} + +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t *self) { + return pulse_fd < 0; +} + +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t *self, uint16_t *pulses, uint16_t len) { + if (pulse_buffer != NULL) { + mp_raise_RuntimeError(translate("Another send is already active")); + } + + struct timer_sethandler_s sethandler; + + pulse_buffer = pulses; + pulse_index = 0; + pulse_length = len; + + unsigned long timeout = pulse_buffer[0] * 1000; + + ioctl(pulse_fd, TCIOC_SETTIMEOUT, timeout); + + sethandler.handler = pulseout_timer_handler; + sethandler.arg = (void *)(int)self->pwm_num; + + ioctl(pulse_fd, TCIOC_SETHANDLER, (unsigned long)&sethandler); + ioctl(pulse_fd, TCIOC_START, 0); + + while(pulse_index < len) { + // Do other things while we wait. The interrupts will handle sending the + // signal. + RUN_BACKGROUND_TASKS; + } + + pulse_buffer = NULL; +} + +void pulseout_reset(void) { + ioctl(pulse_fd, TCIOC_STOP, 0); + close(pulse_fd); + pulse_fd = -1; + + pulse_buffer = NULL; +} diff --git a/ports/nrf/common-hal/_bleio/Scanner.h b/ports/cxd56/common-hal/pulseio/PulseOut.h similarity index 77% rename from ports/nrf/common-hal/_bleio/Scanner.h rename to ports/cxd56/common-hal/pulseio/PulseOut.h index 3768a52cb8..61bc175276 100644 --- a/ports/nrf/common-hal/_bleio/Scanner.h +++ b/ports/cxd56/common-hal/pulseio/PulseOut.h @@ -3,8 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -25,16 +24,16 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SCANNER_H -#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SCANNER_H +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEOUT_H #include "py/obj.h" typedef struct { mp_obj_base_t base; - mp_obj_t scan_entries; - uint16_t interval; - uint16_t window; -} bleio_scanner_obj_t; + uint8_t pwm_num; +} pulseio_pulseout_obj_t; -#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SCANNER_H +void pulseout_reset(void); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/esp8266/common-hal/pulseio/__init__.c b/ports/cxd56/common-hal/pulseio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/pulseio/__init__.c rename to ports/cxd56/common-hal/pulseio/__init__.c diff --git a/ports/esp32/fatfs_port.c b/ports/cxd56/common-hal/rtc/RTC.c similarity index 63% rename from ports/esp32/fatfs_port.c rename to ports/cxd56/common-hal/rtc/RTC.c index 880324ed82..ce65e6acde 100644 --- a/ports/esp32/fatfs_port.c +++ b/ports/cxd56/common-hal/rtc/RTC.c @@ -1,11 +1,9 @@ /* * This file is part of the MicroPython project, http://micropython.org/ * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * * The MIT License (MIT) * - * Copyright (c) 2013, 2014, 2016 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -27,15 +25,30 @@ */ #include -#include "lib/oofatfs/ff.h" -#include "timeutils.h" -DWORD get_fattime(void) { +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/rtc/RTC.h" + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { struct timeval tv; - gettimeofday(&tv, NULL); - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(tv.tv_sec, &tm); - return (((DWORD)(tm.tm_year - 1980) << 25) | ((DWORD)tm.tm_mon << 21) | ((DWORD)tm.tm_mday << 16) | - ((DWORD)tm.tm_hour << 11) | ((DWORD)tm.tm_min << 5) | ((DWORD)tm.tm_sec >> 1)); + gettimeofday(&tv, NULL); + timeutils_seconds_since_2000_to_struct_time(tv.tv_sec, tm); +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + struct timeval tv = {0}; + + tv.tv_sec = timeutils_seconds_since_2000(tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); + settimeofday(&tv, NULL); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); } diff --git a/ports/cxd56/common-hal/rtc/RTC.h b/ports/cxd56/common-hal/rtc/RTC.h new file mode 100644 index 0000000000..5647fdcf14 --- /dev/null +++ b/ports/cxd56/common-hal/rtc/RTC.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_RTC_RTC_H + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_RTC_RTC_H diff --git a/ports/cxd56/common-hal/rtc/__init__.c b/ports/cxd56/common-hal/rtc/__init__.c new file mode 100644 index 0000000000..92d25d563e --- /dev/null +++ b/ports/cxd56/common-hal/rtc/__init__.c @@ -0,0 +1 @@ +// No rtc module functions. diff --git a/ports/zephyr/src/zephyr_start.c b/ports/cxd56/common-hal/supervisor/Runtime.c old mode 100644 new mode 100755 similarity index 78% rename from ports/zephyr/src/zephyr_start.c rename to ports/cxd56/common-hal/supervisor/Runtime.c index 452e304cad..a0d9e70ab1 --- a/ports/zephyr/src/zephyr_start.c +++ b/ports/cxd56/common-hal/supervisor/Runtime.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Linaro Limited + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,17 +23,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include -#include -#include "zephyr_getchar.h" -int real_main(void); +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" -void main(void) { -#ifdef CONFIG_CONSOLE_PULL - console_init(); -#else - zephyr_getchar_init(); -#endif - real_main(); +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); } diff --git a/ports/cc3200/mods/pybflash.h b/ports/cxd56/common-hal/supervisor/Runtime.h old mode 100644 new mode 100755 similarity index 79% rename from ports/cc3200/mods/pybflash.h rename to ports/cxd56/common-hal/supervisor/Runtime.h index 6f8ddf2918..f4669c6ab3 --- a/ports/cc3200/mods/pybflash.h +++ b/ports/cxd56/common-hal/supervisor/Runtime.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,13 +23,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBFLASH_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBFLASH_H + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_SUPERVISOR_RUNTIME_H #include "py/obj.h" -extern const mp_obj_type_t pyb_flash_type; +typedef struct { + mp_obj_base_t base; +} super_runtime_obj_t; -void pyb_flash_init_vfs(fs_user_mount_t *vfs); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBFLASH_H +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/esp8266/common-hal/neopixel_write/__init__.c b/ports/cxd56/common-hal/supervisor/__init__.c old mode 100644 new mode 100755 similarity index 74% rename from ports/esp8266/common-hal/neopixel_write/__init__.c rename to ports/cxd56/common-hal/supervisor/__init__.c index 25fb0dcea5..e240525f22 --- a/ports/esp8266/common-hal/neopixel_write/__init__.c +++ b/ports/cxd56/common-hal/supervisor/__init__.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,10 +24,13 @@ * THE SOFTWARE. */ -#include "shared-bindings/neopixel_write/__init__.h" +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" -#include "espneopixel.h" - -void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { - esp_neopixel_write(digitalinout->pin->gpio_number, pixels, numBytes, true /*800 kHz*/); -} +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; diff --git a/ports/cxd56/common-hal/time/__init__.c b/ports/cxd56/common-hal/time/__init__.c new file mode 100644 index 0000000000..8f7326b629 --- /dev/null +++ b/ports/cxd56/common-hal/time/__init__.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" + +#include "tick.h" + +uint64_t common_hal_time_monotonic(void) { + return ticks_ms; +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/esp8266/fatfs_port.c b/ports/cxd56/fatfs_port.c similarity index 67% rename from ports/esp8266/fatfs_port.c rename to ports/cxd56/fatfs_port.c index a8865c817e..e986b4c6eb 100644 --- a/ports/esp8266/fatfs_port.c +++ b/ports/cxd56/fatfs_port.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014, 2016 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,20 +24,23 @@ * THE SOFTWARE. */ -#include "py/obj.h" +#include "py/mphal.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" /* FatFs lower layer API */ +#include "lib/oofatfs/diskio.h" /* FatFs lower layer API */ #include "lib/timeutils/timeutils.h" -#include "lib/oofatfs/ff.h" -#include "modmachine.h" + +#if CIRCUITPY_RTC +#include "shared-bindings/rtc/RTC.h" +#endif DWORD get_fattime(void) { - - // TODO: Optimize division (there's no HW division support on ESP8266, - // so it's expensive). - uint32_t secs = (uint32_t)(pyb_rtc_get_us_since_2000() / 1000000); - +#if CIRCUITPY_RTC timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(secs, &tm); - - return (((DWORD)(tm.tm_year - 1980) << 25) | ((DWORD)tm.tm_mon << 21) | ((DWORD)tm.tm_mday << 16) | - ((DWORD)tm.tm_hour << 11) | ((DWORD)tm.tm_min << 5) | ((DWORD)tm.tm_sec >> 1)); + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif } diff --git a/ports/cc3200/mods/pybwdt.h b/ports/cxd56/mpconfigport.h similarity index 75% rename from ports/cc3200/mods/pybwdt.h rename to ports/cxd56/mpconfigport.h index 275c49435c..df87946b95 100644 --- a/ports/cc3200/mods/pybwdt.h +++ b/ports/cxd56/mpconfigport.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2015 Daniel Campora + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,16 +23,18 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H -#include "py/obj.h" +#ifndef __INCLUDED_MPCONFIGPORT_H +#define __INCLUDED_MPCONFIGPORT_H -extern const mp_obj_type_t pyb_wdt_type; +#define MICROPY_PY_SYS_PLATFORM "CXD56" -void pybwdt_init0 (void); -void pybwdt_srv_alive (void); -void pybwdt_srv_sleeping (bool state); -void pybwdt_sl_alive (void); +// 64kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x10000 -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H +#include "py/circuitpy_mpconfig.h" + +#define MICROPY_PORT_ROOT_POINTERS \ + CIRCUITPY_COMMON_ROOT_POINTERS \ + +#endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/cxd56/mpconfigport.mk b/ports/cxd56/mpconfigport.mk new file mode 100644 index 0000000000..a418ae8e9d --- /dev/null +++ b/ports/cxd56/mpconfigport.mk @@ -0,0 +1,20 @@ +USB_SERIAL_NUMBER_LENGTH = 10 +USB_DEVICES = "CDC,MSC" +USB_MSC_MAX_PACKET_SIZE = 512 +USB_RENUMBER_ENDPOINTS = 0 +USB_CDC_EP_NUM_NOTIFICATION = 3 +USB_CDC_EP_NUM_DATA_OUT = 2 +USB_CDC_EP_NUM_DATA_IN = 1 +USB_MSC_EP_NUM_OUT = 5 +USB_MSC_EP_NUM_IN = 4 + +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 diff --git a/ports/cxd56/mphalport.c b/ports/cxd56/mphalport.c new file mode 100644 index 0000000000..79d93f9759 --- /dev/null +++ b/ports/cxd56/mphalport.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include "py/mpstate.h" + +#include "tick.h" + +#define DELAY_CORRECTION (700) +#define DELAY_INTERVAL (50) + +void mp_hal_init(void) { + boardctl(BOARDIOC_INIT, 0); +} + +mp_uint_t mp_hal_ticks_ms(void) { + struct timeval tv; + gettimeofday(&tv, NULL); + return tv.tv_sec * 1000 + tv.tv_usec / 1000; +} + +mp_uint_t mp_hal_ticks_us(void) { + struct timeval tv; + gettimeofday(&tv, NULL); + return tv.tv_sec * 1000000 + tv.tv_usec; +} + +mp_uint_t mp_hal_ticks_cpu(void) { + return cxd56_get_cpu_baseclk(); +} + +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = ticks_ms; + uint64_t duration = 0; + while (duration < delay) { + #ifdef MICROPY_VM_HOOK_LOOP + MICROPY_VM_HOOK_LOOP + #endif + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (ticks_ms - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +void mp_hal_delay_us(uint32_t us) { + if (us) { + unsigned long long ticks = mp_hal_ticks_cpu() / 1000000L * us; + if (ticks < DELAY_CORRECTION) return; // delay time already used in calculation + + ticks -= DELAY_CORRECTION; + ticks /= 6; + // following loop takes 6 cycles + do { + __asm__ __volatile__("nop"); + } while(--ticks); + } +} diff --git a/ports/stm32/qspi.h b/ports/cxd56/mphalport.h similarity index 80% rename from ports/stm32/qspi.h rename to ports/cxd56/mphalport.h index c774b12582..25bca97ad7 100644 --- a/ports/stm32/qspi.h +++ b/ports/cxd56/mphalport.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2018 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,14 +23,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32_QSPI_H -#define MICROPY_INCLUDED_STM32_QSPI_H -#include "drivers/bus/qspi.h" +#ifndef MICROPY_INCLUDED_CXD56_MPHALPORT_H +#define MICROPY_INCLUDED_CXD56_MPHALPORT_H -extern const mp_qspi_proto_t qspi_proto; +#include -void qspi_init(void); -void qspi_memory_map(void); +#include "lib/utils/interrupt_char.h" -#endif // MICROPY_INCLUDED_STM32_QSPI_H +extern volatile uint64_t ticks_ms; + +#endif // MICROPY_INCLUDED_CXD56_MPHALPORT_H diff --git a/ports/bare-arm/qstrdefsport.h b/ports/cxd56/qstrdefsport.h similarity index 100% rename from ports/bare-arm/qstrdefsport.h rename to ports/cxd56/qstrdefsport.h diff --git a/ports/cxd56/spresense-exported-sdk b/ports/cxd56/spresense-exported-sdk new file mode 160000 index 0000000000..7f6568c7f4 --- /dev/null +++ b/ports/cxd56/spresense-exported-sdk @@ -0,0 +1 @@ +Subproject commit 7f6568c7f4898cdb24a2f06040784a836050686e diff --git a/ports/cxd56/supervisor/cpu.s b/ports/cxd56/supervisor/cpu.s new file mode 100755 index 0000000000..9e6807a5e2 --- /dev/null +++ b/ports/cxd56/supervisor/cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/cxd56/supervisor/internal_flash.c b/ports/cxd56/supervisor/internal_flash.c new file mode 100644 index 0000000000..0c9a61e063 --- /dev/null +++ b/ports/cxd56/supervisor/internal_flash.c @@ -0,0 +1,114 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "supervisor/flash.h" + +/* Prototypes for Remote API */ + +int FM_RawWrite(uint32_t offset, const void *buf, uint32_t size); +int FM_RawVerifyWrite(uint32_t offset, const void *buf, uint32_t size); +int FM_RawRead(uint32_t offset, void *buf, uint32_t size); +int FM_RawEraseSector(uint32_t sector); + +#define CXD56_SPIFLASHSIZE (16 * 1024 * 1024) + +#define SECTOR_SHIFT 12 +#define SECTOR_SIZE (1 << SECTOR_SHIFT) + +#define PAGE_SHIFT 9 +#define PAGE_SIZE (1 << PAGE_SHIFT) + +#define NO_SECTOR 0xffffffff + +uint8_t flash_cache[SECTOR_SIZE]; +uint32_t flash_sector = NO_SECTOR; + +void supervisor_flash_init(void) { +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return CXD56_SPIFLASHSIZE >> PAGE_SHIFT; +} + +void supervisor_flash_flush(void) { + if (flash_sector == NO_SECTOR) { + return; + } + + FM_RawEraseSector(flash_sector); + FM_RawWrite(flash_sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE); + + flash_sector = NO_SECTOR; +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + supervisor_flash_flush(); + + if (FM_RawRead(block << PAGE_SHIFT, dest, num_blocks << PAGE_SHIFT) < 0) { + return 1; + } + + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + uint32_t sector; + uint32_t block_position; + uint32_t current_block = 0; + + while (num_blocks--) { + sector = (lba << PAGE_SHIFT) >> SECTOR_SHIFT; + block_position = lba - 8 * sector; + + if (sector != flash_sector) { + supervisor_flash_flush(); + + if (FM_RawRead(sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE) < 0) { + return 1; + } + + if (memcmp(&flash_cache[block_position << PAGE_SHIFT], &src[current_block << PAGE_SHIFT], PAGE_SIZE) != 0) { + flash_sector = sector; + } + } + + memcpy(&flash_cache[block_position << PAGE_SHIFT], &src[current_block << PAGE_SHIFT], PAGE_SIZE); + + lba++; + current_block++; + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} diff --git a/ports/cxd56/supervisor/internal_flash.h b/ports/cxd56/supervisor/internal_flash.h new file mode 100644 index 0000000000..1580ad3e1e --- /dev/null +++ b/ports/cxd56/supervisor/internal_flash.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_H + +#endif // MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_H diff --git a/ports/cc3200/util/random.h b/ports/cxd56/supervisor/internal_flash_root_pointers.h similarity index 81% rename from ports/cc3200/util/random.h rename to ports/cxd56/supervisor/internal_flash_root_pointers.h index 02cde6b522..126c6af097 100644 --- a/ports/cc3200/util/random.h +++ b/ports/cxd56/supervisor/internal_flash_root_pointers.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2015 Daniel Campora + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,12 +23,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_RANDOM_H -#define MICROPY_INCLUDED_CC3200_UTIL_RANDOM_H +#ifndef MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_ROOT_POINTERS_H -void rng_init0 (void); -uint32_t rng_get (void); +#define FLASH_ROOT_POINTERS -MP_DECLARE_CONST_FUN_OBJ_0(machine_rng_get_obj); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_RANDOM_H +#endif // MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c new file mode 100644 index 0000000000..f061334683 --- /dev/null +++ b/ports/cxd56/supervisor/port.c @@ -0,0 +1,97 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "sched/sched.h" + +#include "boards/board.h" + +#include "supervisor/port.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/analogio/AnalogIn.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/busio/UART.h" + +safe_mode_t port_init(void) { + boardctl(BOARDIOC_INIT, 0); + + board_init(); + + if (board_requests_safe_mode()) { + return USER_SAFE_MODE; + } + + return NO_SAFE_MODE; +} + +void reset_cpu(void) { + boardctl(BOARDIOC_RESET, 0); +} + +void reset_port(void) { +#if CIRCUITPY_ANALOGIO + analogin_reset(); +#endif +#if CIRCUITPY_PULSEIO + pulseout_reset(); + pwmout_reset(); +#endif +#if CIRCUITPY_BUSIO + busio_uart_reset(); +#endif + + reset_all_pins(); +} + +void reset_to_bootloader(void) { +} + +uint32_t *port_stack_get_limit(void) { + struct tcb_s *rtcb = this_task(); + + return rtcb->adj_stack_ptr - (uint32_t)rtcb->adj_stack_size; +} + +uint32_t *port_stack_get_top(void) { + struct tcb_s *rtcb = this_task(); + + return rtcb->adj_stack_ptr; +} + +extern uint32_t _ebss; + +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} diff --git a/ports/pic16bit/pic16bit_mphal.h b/ports/cxd56/supervisor/usb.c similarity index 90% rename from ports/pic16bit/pic16bit_mphal.h rename to ports/cxd56/supervisor/usb.c index f5da6cdc8d..6ad253c6d4 100644 --- a/ports/pic16bit/pic16bit_mphal.h +++ b/ports/cxd56/supervisor/usb.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2015 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,8 +24,7 @@ * THE SOFTWARE. */ -#include "py/mpstate.h" +#include "supervisor/usb.h" -void mp_hal_init(void); - -void mp_hal_set_interrupt_char(int c); +void init_usb_hardware(void) { +} diff --git a/ports/esp32/modnetwork.h b/ports/cxd56/tick.c similarity index 74% rename from ports/esp32/modnetwork.h rename to ports/cxd56/tick.c index b8dc1b8528..6529db7901 100644 --- a/ports/esp32/modnetwork.h +++ b/ports/cxd56/tick.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 "Eric Poulsen" + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,14 +23,23 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP32_MODNETWORK_H -#define MICROPY_INCLUDED_ESP32_MODNETWORK_H -enum { PHY_LAN8720, PHY_TLK110 }; +#include "tick.h" -MP_DECLARE_CONST_FUN_OBJ_KW(get_lan_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(esp_ifconfig_obj); +#include "supervisor/shared/autoreload.h" +#include "supervisor/filesystem.h" -void usocket_events_deinit(void); +// Global millisecond tick count +volatile uint64_t ticks_ms = 0; +void board_timerhook(void) +{ + ticks_ms += 1; + +#if CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS > 0 + filesystem_tick(); #endif +#ifdef CIRCUITPY_AUTORELOAD_DELAY_MS + autoreload_tick(); +#endif +} diff --git a/ports/stm32/accel.h b/ports/cxd56/tick.h similarity index 83% rename from ports/stm32/accel.h rename to ports/cxd56/tick.h index 1fea1249c7..a0d9ee5263 100644 --- a/ports/stm32/accel.h +++ b/ports/cxd56/tick.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright 2019 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,11 +23,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32_ACCEL_H -#define MICROPY_INCLUDED_STM32_ACCEL_H -extern const mp_obj_type_t pyb_accel_type; +#ifndef MICROPY_INCLUDED_CXD56_TICK_H +#define MICROPY_INCLUDED_CXD56_TICK_H -void accel_init(void); +#include "py/mpconfig.h" -#endif // MICROPY_INCLUDED_STM32_ACCEL_H +extern volatile uint64_t ticks_ms; + +#endif // MICROPY_INCLUDED_CXD56_TICK_H diff --git a/ports/esp32/Makefile b/ports/esp32/Makefile deleted file mode 100644 index b0baa0dca1..0000000000 --- a/ports/esp32/Makefile +++ /dev/null @@ -1,786 +0,0 @@ -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -MICROPY_PY_USSL = 0 -MICROPY_SSL_AXTLS = 0 -MICROPY_FATFS = 1 -MICROPY_PY_BTREE = 1 - -#FROZEN_DIR = scripts -FROZEN_MPY_DIR = modules - -# include py core make definitions -include $(TOP)/py/py.mk - -PORT ?= /dev/ttyUSB0 -BAUD ?= 460800 -FLASH_MODE ?= dio -FLASH_FREQ ?= 40m -FLASH_SIZE ?= 4MB -CROSS_COMPILE ?= xtensa-esp32-elf- - -ESPIDF_SUPHASH := 9a55b42f0841b3d38a61089b1dda4bf28135decd - -# paths to ESP IDF and its components -ifeq ($(ESPIDF),) -ifneq ($(IDF_PATH),) -ESPIDF = $(IDF_PATH) -else -$(info The ESPIDF variable has not been set, please set it to the root of the esp-idf repository.) -$(info See README.md for installation instructions.) -$(info Supported git hash: $(ESPIDF_SUPHASH)) -$(error ESPIDF not set) -endif -endif -ESPCOMP = $(ESPIDF)/components -ESPTOOL ?= $(ESPCOMP)/esptool_py/esptool/esptool.py - -# verify the ESP IDF version -ESPIDF_CURHASH := $(shell git -C $(ESPIDF) show -s --pretty=format:'%H') -ifneq ($(ESPIDF_CURHASH),$(ESPIDF_SUPHASH)) -$(info ** WARNING **) -$(info The git hash of ESP IDF does not match the supported version) -$(info The build may complete and the firmware may work but it is not guaranteed) -$(info ESP IDF path: $(ESPIDF)) -$(info Current git hash: $(ESPIDF_CURHASH)) -$(info Supported git hash: $(ESPIDF_SUPHASH)) -endif - -# pretty format of ESP IDF version, used internally by the IDF -IDF_VER := $(shell git -C $(ESPIDF) describe) - -INC += -I. -INC += -I$(TOP) -INC += -I$(TOP)/lib/mp-readline -INC += -I$(TOP)/lib/netutils -INC += -I$(TOP)/lib/timeutils -INC += -I$(BUILD) - -INC_ESPCOMP += -I$(ESPCOMP)/bootloader_support/include -INC_ESPCOMP += -I$(ESPCOMP)/driver/include -INC_ESPCOMP += -I$(ESPCOMP)/driver/include/driver -INC_ESPCOMP += -I$(ESPCOMP)/nghttp/port/include -INC_ESPCOMP += -I$(ESPCOMP)/nghttp/nghttp2/lib/includes -INC_ESPCOMP += -I$(ESPCOMP)/esp32/include -INC_ESPCOMP += -I$(ESPCOMP)/soc/include -INC_ESPCOMP += -I$(ESPCOMP)/soc/esp32/include -INC_ESPCOMP += -I$(ESPCOMP)/ethernet/include -INC_ESPCOMP += -I$(ESPCOMP)/expat/include/expat -INC_ESPCOMP += -I$(ESPCOMP)/expat/port/include -INC_ESPCOMP += -I$(ESPCOMP)/heap/include -INC_ESPCOMP += -I$(ESPCOMP)/json/include -INC_ESPCOMP += -I$(ESPCOMP)/json/port/include -INC_ESPCOMP += -I$(ESPCOMP)/log/include -INC_ESPCOMP += -I$(ESPCOMP)/newlib/include -INC_ESPCOMP += -I$(ESPCOMP)/nvs_flash/include -INC_ESPCOMP += -I$(ESPCOMP)/freertos/include -INC_ESPCOMP += -I$(ESPCOMP)/tcpip_adapter/include -INC_ESPCOMP += -I$(ESPCOMP)/lwip/include/lwip -INC_ESPCOMP += -I$(ESPCOMP)/lwip/include/lwip/port -INC_ESPCOMP += -I$(ESPCOMP)/lwip/include/lwip/posix -INC_ESPCOMP += -I$(ESPCOMP)/mbedtls/mbedtls/include -INC_ESPCOMP += -I$(ESPCOMP)/mbedtls/port/include -INC_ESPCOMP += -I$(ESPCOMP)/spi_flash/include -INC_ESPCOMP += -I$(ESPCOMP)/ulp/include -INC_ESPCOMP += -I$(ESPCOMP)/vfs/include -INC_ESPCOMP += -I$(ESPCOMP)/newlib/platform_include -INC_ESPCOMP += -I$(ESPCOMP)/xtensa-debug-module/include -INC_ESPCOMP += -I$(ESPCOMP)/wpa_supplicant/include -INC_ESPCOMP += -I$(ESPCOMP)/wpa_supplicant/port/include -INC_ESPCOMP += -I$(ESPCOMP)/ethernet/include -INC_ESPCOMP += -I$(ESPCOMP)/app_trace/include -INC_ESPCOMP += -I$(ESPCOMP)/app_update/include -INC_ESPCOMP += -I$(ESPCOMP)/pthread/include -INC_ESPCOMP += -I$(ESPCOMP)/smartconfig_ack/include - -# these flags are common to C and C++ compilation -CFLAGS_COMMON = -Os -ffunction-sections -fdata-sections -fstrict-volatile-bitfields \ - -mlongcalls -nostdlib \ - -Wall -Werror -Wno-error=unused-function -Wno-error=unused-but-set-variable \ - -Wno-error=unused-variable -Wno-error=deprecated-declarations \ - -DESP_PLATFORM - -CFLAGS_BASE = -std=gnu99 $(CFLAGS_COMMON) -DMBEDTLS_CONFIG_FILE='"mbedtls/esp_config.h"' -DHAVE_CONFIG_H -CFLAGS = $(CFLAGS_BASE) $(INC) $(INC_ESPCOMP) -CFLAGS += -DIDF_VER=\"$(IDF_VER)\" -CFLAGS += $(CFLAGS_MOD) - -# this is what ESPIDF uses for c++ compilation -CXXFLAGS = -std=gnu++11 $(CFLAGS_COMMON) $(INC) $(INC_ESPCOMP) - -LDFLAGS = -nostdlib -Map=$(@:.elf=.map) --cref -LDFLAGS += --gc-sections -static -EL -LDFLAGS += -u call_user_start_cpu0 -u uxTopUsedPriority -u ld_include_panic_highint_hdl -LDFLAGS += -u __cxa_guard_dummy # so that implementation of static guards is taken from cxx_guards.o instead of libstdc++.a -LDFLAGS += -L$(ESPCOMP)/esp32/ld -LDFLAGS += -T $(BUILD)/esp32_out.ld -LDFLAGS += -T ./esp32.custom_common.ld -LDFLAGS += -T esp32.rom.ld -LDFLAGS += -T esp32.peripherals.ld - -LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) -LIBSTDCXX_FILE_NAME = $(shell $(CXX) $(CXXFLAGS) -print-file-name=libstdc++.a) - -# Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -COPT = -O0 -else -#CFLAGS += -fdata-sections -ffunction-sections -COPT += -Os -DNDEBUG -#LDFLAGS += --gc-sections -endif - -# Enable SPIRAM support if CONFIG_SPIRAM_SUPPORT=1 -ifeq ($(CONFIG_SPIRAM_SUPPORT),1) -CFLAGS_COMMON += -mfix-esp32-psram-cache-issue -DCONFIG_SPIRAM_SUPPORT=1 -LIBC_LIBM = $(ESPCOMP)/newlib/lib/libc-psram-workaround.a $(ESPCOMP)/newlib/lib/libm-psram-workaround.a -else -LDFLAGS += -T esp32.rom.spiram_incompatible_fns.ld -LIBC_LIBM = $(ESPCOMP)/newlib/lib/libc.a $(ESPCOMP)/newlib/lib/libm.a -endif - -################################################################################ -# List of MicroPython source and object files - -SRC_C = \ - main.c \ - uart.c \ - gccollect.c \ - mphalport.c \ - fatfs_port.c \ - help.c \ - modutime.c \ - moduos.c \ - machine_timer.c \ - machine_pin.c \ - machine_touchpad.c \ - machine_adc.c \ - machine_dac.c \ - machine_pwm.c \ - machine_uart.c \ - modmachine.c \ - modnetwork.c \ - network_lan.c \ - modsocket.c \ - modesp.c \ - esp32_ulp.c \ - modesp32.c \ - espneopixel.c \ - machine_hw_spi.c \ - machine_wdt.c \ - mpthreadport.c \ - machine_rtc.c \ - $(SRC_MOD) - -EXTMOD_SRC_C = $(addprefix extmod/,\ - modonewire.c \ - ) - -LIB_SRC_C = $(addprefix lib/,\ - libm/math.c \ - libm/fmodf.c \ - libm/roundf.c \ - libm/ef_sqrt.c \ - libm/kf_rem_pio2.c \ - libm/kf_sin.c \ - libm/kf_cos.c \ - libm/kf_tan.c \ - libm/ef_rem_pio2.c \ - libm/sf_sin.c \ - libm/sf_cos.c \ - libm/sf_tan.c \ - libm/sf_frexp.c \ - libm/sf_modf.c \ - libm/sf_ldexp.c \ - libm/asinfacosf.c \ - libm/atanf.c \ - libm/atan2f.c \ - mp-readline/readline.c \ - netutils/netutils.c \ - timeutils/timeutils.c \ - utils/pyexec.c \ - utils/interrupt_char.c \ - utils/sys_stdio_mphal.c \ - ) - -ifeq ($(MICROPY_FATFS), 1) -LIB_SRC_C += \ - lib/oofatfs/ff.c \ - lib/oofatfs/option/unicode.c -endif - -DRIVERS_SRC_C = $(addprefix drivers/,\ - bus/softspi.c \ - dht/dht.c \ - ) - -OBJ_MP = -OBJ_MP += $(PY_O) -OBJ_MP += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ_MP += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o)) -OBJ_MP += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) -OBJ_MP += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(EXTMOD_SRC_C) $(LIB_SRC_C) $(DRIVERS_SRC_C) -# Append any auto-generated sources that are needed by sources listed in SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -################################################################################ -# List of object files from the ESP32 IDF components - -ESPIDF_DRIVER_O = $(addprefix $(ESPCOMP)/driver/,\ - uart.o \ - periph_ctrl.o \ - ledc.o \ - gpio.o \ - timer.o \ - spi_master.o \ - spi_common.o \ - rtc_module.o \ - ) - -$(BUILD)/$(ESPCOMP)/esp32/dport_access.o: CFLAGS += -Wno-array-bounds -ESPIDF_ESP32_O = $(addprefix $(ESPCOMP)/esp32/,\ - brownout.o \ - panic.o \ - esp_timer.o \ - esp_timer_esp32.o \ - ets_timer_legacy.o \ - event_default_handlers.o \ - fast_crypto_ops.o \ - task_wdt.o \ - cache_err_int.o \ - clk.o \ - core_dump.o \ - cpu_start.o \ - gdbstub.o \ - crosscore_int.o \ - ipc.o \ - int_wdt.o \ - event_loop.o \ - hwcrypto/sha.o \ - hwcrypto/aes.o \ - lib_printf.o \ - freertos_hooks.o \ - system_api.o \ - hw_random.o \ - phy_init.o \ - intr_alloc.o \ - dport_access.o \ - wifi_init.o \ - wifi_os_adapter.o \ - sleep_modes.o \ - spiram.o \ - spiram_psram.o \ - ) - -ESPIDF_HEAP_O = $(addprefix $(ESPCOMP)/heap/,\ - heap_caps.o \ - heap_caps_init.o \ - multi_heap.o \ - ) - -ESPIDF_SOC_O = $(addprefix $(ESPCOMP)/soc/,\ - esp32/cpu_util.o \ - esp32/rtc_clk.o \ - esp32/rtc_init.o \ - esp32/rtc_pm.o \ - esp32/rtc_sleep.o \ - esp32/rtc_time.o \ - esp32/soc_memory_layout.o \ - esp32/spi_periph.o \ - ) - -ESPIDF_CXX_O = $(addprefix $(ESPCOMP)/cxx/,\ - cxx_guards.o \ - ) - -ESPIDF_ETHERNET_O = $(addprefix $(ESPCOMP)/ethernet/,\ - emac_dev.o \ - emac_main.o \ - eth_phy/phy_tlk110.o \ - eth_phy/phy_lan8720.o \ - eth_phy/phy_common.o \ - ) - -$(BUILD)/$(ESPCOMP)/expat/%.o: CFLAGS += -Wno-unused-function -ESPIDF_EXPAT_O = $(addprefix $(ESPCOMP)/expat/,\ - library/xmltok_ns.o \ - library/xmltok.o \ - library/xmlparse.o \ - library/xmlrole.o \ - library/xmltok_impl.o \ - port/minicheck.o \ - port/expat_element.o \ - port/chardata.o \ - ) - -ESPIDF_PTHREAD_O = $(addprefix $(ESPCOMP)/pthread/,\ - pthread.o \ - pthread_local_storage.o \ - ) - -# Assembler .S files need only basic flags, and in particular should not have -# -Os because that generates subtly different code. -# We also need custom CFLAGS for .c files because FreeRTOS has headers with -# generic names (eg queue.h) which can clash with other files in the port. -CFLAGS_ASM = -I$(ESPCOMP)/esp32/include -I$(ESPCOMP)/soc/esp32/include -I$(ESPCOMP)/freertos/include/freertos -I. -$(BUILD)/$(ESPCOMP)/freertos/portasm.o: CFLAGS = $(CFLAGS_ASM) -$(BUILD)/$(ESPCOMP)/freertos/xtensa_context.o: CFLAGS = $(CFLAGS_ASM) -$(BUILD)/$(ESPCOMP)/freertos/xtensa_intr_asm.o: CFLAGS = $(CFLAGS_ASM) -$(BUILD)/$(ESPCOMP)/freertos/xtensa_vectors.o: CFLAGS = $(CFLAGS_ASM) -$(BUILD)/$(ESPCOMP)/freertos/%.o: CFLAGS = $(CFLAGS_BASE) -I. $(INC_ESPCOMP) -I$(ESPCOMP)/freertos/include/freertos -D_ESP_FREERTOS_INTERNAL -ESPIDF_FREERTOS_O = $(addprefix $(ESPCOMP)/freertos/,\ - croutine.o \ - event_groups.o \ - FreeRTOS-openocd.o \ - list.o \ - portasm.o \ - port.o \ - queue.o \ - ringbuf.o \ - tasks.o \ - timers.o \ - xtensa_context.o \ - xtensa_init.o \ - xtensa_intr_asm.o \ - xtensa_intr.o \ - xtensa_overlay_os_hook.o \ - xtensa_vector_defaults.o \ - xtensa_vectors.o \ - ) - -ESPIDF_VFS_O = $(addprefix $(ESPCOMP)/vfs/,\ - vfs_uart.o \ - vfs.o \ - ) - -ESPIDF_JSON_O = $(addprefix $(ESPCOMP)/json/cJSON/,\ - cJSON.o \ - cJSON_Utils.o \ - ) - -ESPIDF_LOG_O = $(addprefix $(ESPCOMP)/log/,\ - log.o \ - ) - -ESPIDF_XTENSA_DEBUG_MODULE_O = $(addprefix $(ESPCOMP)/xtensa-debug-module/,\ - eri.o \ - trax.o \ - ) - -ESPIDF_TCPIP_ADAPTER_O = $(addprefix $(ESPCOMP)/tcpip_adapter/,\ - tcpip_adapter_lwip.o \ - ) - -ESPIDF_APP_TRACE_O = $(addprefix $(ESPCOMP)/app_trace/,\ - app_trace.o \ - ) - -ESPIDF_APP_UPDATE_O = $(addprefix $(ESPCOMP)/app_update/,\ - esp_ota_ops.o \ - ) - -ESPIDF_NEWLIB_O = $(addprefix $(ESPCOMP)/newlib/,\ - time.o \ - select.o \ - syscalls.o \ - syscall_table.o \ - reent_init.o \ - locks.o \ - ) - -ESPIDF_NGHTTP_O = $(addprefix $(ESPCOMP)/nghttp/,\ - nghttp2/lib/nghttp2_http.o \ - nghttp2/lib/nghttp2_version.o \ - nghttp2/lib/nghttp2_mem.o \ - nghttp2/lib/nghttp2_hd_huffman.o \ - nghttp2/lib/nghttp2_rcbuf.o \ - nghttp2/lib/nghttp2_callbacks.o \ - nghttp2/lib/nghttp2_session.o \ - nghttp2/lib/nghttp2_stream.o \ - nghttp2/lib/nghttp2_hd.o \ - nghttp2/lib/nghttp2_priority_spec.o \ - nghttp2/lib/nghttp2_buf.o \ - nghttp2/lib/nghttp2_option.o \ - nghttp2/lib/nghttp2_npn.o \ - nghttp2/lib/nghttp2_helper.o \ - nghttp2/lib/nghttp2_frame.o \ - nghttp2/lib/nghttp2_outbound_item.o \ - nghttp2/lib/nghttp2_hd_huffman_data.o \ - nghttp2/lib/nghttp2_pq.o \ - nghttp2/lib/nghttp2_queue.o \ - nghttp2/lib/nghttp2_submit.o \ - nghttp2/lib/nghttp2_map.o \ - port/http_parser.o \ - ) - -ESPIDF_NVS_FLASH_O = $(addprefix $(ESPCOMP)/nvs_flash/,\ - src/nvs_types.o \ - src/nvs_page.o \ - src/nvs_item_hash_list.o \ - src/nvs_pagemanager.o \ - src/nvs_storage.o \ - src/nvs_api.o \ - ) - -ESPIDF_OPENSSL_O = $(addprefix $(ESPCOMP)/openssl/,\ - ) - -ESPIDF_SMARTCONFIG_ACK_O = $(addprefix $(ESPCOMP)/smartconfig_ack/,\ - smartconfig_ack.o \ - ) - -ESPIDF_SPI_FLASH_O = $(addprefix $(ESPCOMP)/spi_flash/,\ - flash_mmap.o \ - partition.o \ - spi_flash_rom_patch.o \ - cache_utils.o \ - flash_ops.o \ - ) - -ESPIDF_ULP_O = $(addprefix $(ESPCOMP)/ulp/,\ - ulp.o \ - ) - -$(BUILD)/$(ESPCOMP)/lwip/%.o: CFLAGS += -Wno-address -Wno-unused-variable -Wno-unused-but-set-variable -ESPIDF_LWIP_O = $(addprefix $(ESPCOMP)/lwip/,\ - api/pppapi.o \ - api/netbuf.o \ - api/api_lib.o \ - api/netifapi.o \ - api/tcpip.o \ - api/netdb.o \ - api/err.o \ - api/api_msg.o \ - api/sockets.o \ - apps/sntp/sntp.o \ - apps/dhcpserver.o \ - core/ipv4/ip_frag.o \ - core/ipv4/dhcp.o \ - core/ipv4/ip4_addr.o \ - core/ipv4/igmp.o \ - core/ipv4/ip4.o \ - core/ipv4/autoip.o \ - core/ipv4/icmp.o \ - core/ipv6/ip6_frag.o \ - core/ipv6/dhcp6.o \ - core/ipv6/inet6.o \ - core/ipv6/ip6_addr.o \ - core/ipv6/ip6.o \ - core/ipv6/nd6.o \ - core/ipv6/mld6.o \ - core/ipv6/ethip6.o \ - core/ipv6/icmp6.o \ - core/mem.o \ - core/init.o \ - core/memp.o \ - core/sys.o \ - core/tcp_in.o \ - core/dns.o \ - core/ip.o \ - core/pbuf.o \ - core/raw.o \ - core/tcp.o \ - core/def.o \ - core/netif.o \ - core/stats.o \ - core/timers.o \ - core/inet_chksum.o \ - core/udp.o \ - core/tcp_out.o \ - netif/slipif.o \ - netif/etharp.o \ - netif/ethernet.o \ - netif/lowpan6.o \ - netif/ethernetif.o \ - port/freertos/sys_arch.o \ - port/netif/wlanif.o \ - port/netif/ethernetif.o \ - port/vfs_lwip.o \ - ) - -ESPIDF_MBEDTLS_O = $(addprefix $(ESPCOMP)/mbedtls/,\ - mbedtls/library/entropy.o \ - mbedtls/library/pkcs12.o \ - mbedtls/library/ccm.o \ - mbedtls/library/pk.o \ - mbedtls/library/sha1.o \ - mbedtls/library/x509_csr.o \ - mbedtls/library/ssl_cli.o \ - mbedtls/library/ecp.o \ - mbedtls/library/blowfish.o \ - mbedtls/library/x509.o \ - mbedtls/library/ecp_curves.o \ - mbedtls/library/error.o \ - mbedtls/library/ssl_ticket.o \ - mbedtls/library/entropy_poll.o \ - mbedtls/library/cipher.o \ - mbedtls/library/version_features.o \ - mbedtls/library/ripemd160.o \ - mbedtls/library/rsa.o \ - mbedtls/library/rsa_internal.o \ - mbedtls/library/md.o \ - mbedtls/library/md_wrap.o \ - mbedtls/library/sha256.o \ - mbedtls/library/dhm.o \ - mbedtls/library/ssl_cache.o \ - mbedtls/library/pkwrite.o \ - mbedtls/library/base64.o \ - mbedtls/library/asn1parse.o \ - mbedtls/library/ssl_tls.o \ - mbedtls/library/hmac_drbg.o \ - mbedtls/library/pem.o \ - mbedtls/library/version.o \ - mbedtls/library/gcm.o \ - mbedtls/library/memory_buffer_alloc.o \ - mbedtls/library/md2.o \ - mbedtls/library/ecdsa.o \ - mbedtls/library/ssl_srv.o \ - mbedtls/library/x509_crt.o \ - mbedtls/library/ecdh.o \ - mbedtls/library/asn1write.o \ - mbedtls/library/md4.o \ - mbedtls/library/debug.o \ - mbedtls/library/x509_create.o \ - mbedtls/library/ecjpake.o \ - mbedtls/library/oid.o \ - mbedtls/library/md5.o \ - mbedtls/library/ssl_ciphersuites.o \ - mbedtls/library/sha512.o \ - mbedtls/library/xtea.o \ - mbedtls/library/aes.o \ - mbedtls/library/cipher_wrap.o \ - mbedtls/library/arc4.o \ - mbedtls/library/bignum.o \ - mbedtls/library/pkparse.o \ - mbedtls/library/padlock.o \ - mbedtls/library/threading.o \ - mbedtls/library/x509_crl.o \ - mbedtls/library/pkcs11.o \ - mbedtls/library/aesni.o \ - mbedtls/library/timing.o \ - mbedtls/library/certs.o \ - mbedtls/library/pkcs5.o \ - mbedtls/library/ssl_cookie.o \ - mbedtls/library/camellia.o \ - mbedtls/library/havege.o \ - mbedtls/library/des.o \ - mbedtls/library/x509write_csr.o \ - mbedtls/library/platform.o \ - mbedtls/library/ctr_drbg.o \ - mbedtls/library/x509write_crt.o \ - mbedtls/library/pk_wrap.o \ - port/esp_bignum.o \ - port/esp_hardware.o \ - port/esp_sha1.o \ - port/esp_sha256.o \ - port/esp_sha512.o \ - ) - -$(BUILD)/$(ESPCOMP)/wpa_supplicant/%.o: CFLAGS += -DEMBEDDED_SUPP -DIEEE8021X_EAPOL -DEAP_PEER_METHOD -DEAP_MSCHAPv2 -DEAP_TTLS -DEAP_TLS -DEAP_PEAP -DUSE_WPA2_TASK -DCONFIG_WPS2 -DCONFIG_WPS_PIN -DUSE_WPS_TASK -DESPRESSIF_USE -DESP32_WORKAROUND -D__ets__ -Wno-strict-aliasing -ESPIDF_WPA_SUPPLICANT_O = $(addprefix $(ESPCOMP)/wpa_supplicant/,\ - src/crypto/aes-internal-enc.o \ - src/crypto/sha256-internal.o \ - src/crypto/md5-internal.o \ - src/crypto/aes-internal.o \ - src/crypto/sha1.o \ - src/crypto/aes-internal-dec.o \ - src/crypto/aes-unwrap.o \ - src/crypto/crypto_internal-rsa.o \ - src/crypto/dh_groups.o \ - src/crypto/crypto_internal.o \ - src/crypto/aes-wrap.o \ - src/crypto/sha1-internal.o \ - src/crypto/dh_group5.o \ - src/crypto/sha256.o \ - src/crypto/rc4.o \ - src/crypto/md5.o \ - src/crypto/aes-cbc.o \ - src/crypto/sha1-pbkdf2.o \ - src/crypto/bignum.o \ - src/crypto/crypto_internal-modexp.o \ - src/crypto/crypto_internal-cipher.o \ - src/fast_crypto/fast_aes-unwrap.o \ - src/fast_crypto/fast_aes-wrap.o \ - src/fast_crypto/fast_sha256.o \ - src/fast_crypto/fast_sha256-internal.o \ - port/os_xtensa.o \ - ) - -OBJ_ESPIDF = -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_NEWLIB_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_DRIVER_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_ESP32_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_HEAP_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_SOC_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_CXX_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_ETHERNET_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_EXPAT_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_PTHREAD_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_FREERTOS_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_VFS_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_JSON_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_LOG_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_LWIP_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_MBEDTLS_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_XTENSA_DEBUG_MODULE_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_TCPIP_ADAPTER_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_APP_TRACE_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_APP_UPDATE_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_NGHTTP_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_NVS_FLASH_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_OPENSSL_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_SMARTCONFIG_ACK_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_SPI_FLASH_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_ULP_O)) -OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_WPA_SUPPLICANT_O)) -################################################################################ -# Main targets - -all: $(BUILD)/firmware.bin - -.PHONY: idf-version deploy erase - -idf-version: - $(ECHO) "ESP IDF supported hash: $(ESPIDF_SUPHASH)" - -$(BUILD)/firmware.bin: $(BUILD)/bootloader.bin $(BUILD)/partitions.bin $(BUILD)/application.bin - $(ECHO) "Create $@" - $(Q)$(PYTHON) makeimg.py $^ $@ - -deploy: $(BUILD)/firmware.bin - $(ECHO) "Writing $^ to the board" - $(Q)$(ESPTOOL) --chip esp32 --port $(PORT) --baud $(BAUD) write_flash -z --flash_mode $(FLASH_MODE) --flash_freq $(FLASH_FREQ) 0x1000 $^ - -erase: - $(ECHO) "Erasing flash" - $(Q)$(ESPTOOL) --chip esp32 --port $(PORT) --baud $(BAUD) erase_flash - -################################################################################ -# Declarations to build the application - -OBJ = $(OBJ_MP) $(OBJ_ESPIDF) - -APP_LD_ARGS = -APP_LD_ARGS += $(LDFLAGS_MOD) -APP_LD_ARGS += --start-group -APP_LD_ARGS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc -APP_LD_ARGS += -L$(dir $(LIBSTDCXX_FILE_NAME)) -lstdc++ -APP_LD_ARGS += $(LIBC_LIBM) -APP_LD_ARGS += $(ESPCOMP)/esp32/libhal.a -APP_LD_ARGS += -L$(ESPCOMP)/esp32/lib -lcore -lmesh -lnet80211 -lphy -lrtc -lpp -lwpa -lsmartconfig -lcoexist -lwps -lwpa2 -APP_LD_ARGS += $(OBJ) -APP_LD_ARGS += --end-group - -$(BUILD)/esp32_out.ld: sdkconfig.h - $(Q)$(CC) -I. -C -P -x c -E $(ESPCOMP)/esp32/ld/esp32.ld -o $@ - -$(BUILD)/application.bin: $(BUILD)/application.elf - $(ECHO) "Create $@" - $(Q)$(ESPTOOL) --chip esp32 elf2image --flash_mode $(FLASH_MODE) --flash_freq $(FLASH_FREQ) --flash_size $(FLASH_SIZE) $< - -$(BUILD)/application.elf: $(OBJ) $(BUILD)/esp32_out.ld - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $(APP_LD_ARGS) - $(Q)$(SIZE) $@ - -define compile_cxx -$(ECHO) "CXX $<" -$(Q)$(CXX) $(CXXFLAGS) -c -MD -o $@ $< -@# The following fixes the dependency file. -@# See http://make.paulandlesley.org/autodep.html for details. -@# Regex adjusted from the above to play better with Windows paths, etc. -@$(CP) $(@:.o=.d) $(@:.o=.P); \ - $(SED) -e 's/#.*//' -e 's/^.*: *//' -e 's/ *\\$$//' \ - -e '/^$$/ d' -e 's/$$/ :/' < $(@:.o=.d) >> $(@:.o=.P); \ - $(RM) -f $(@:.o=.d) -endef - -vpath %.cpp . $(TOP) -$(BUILD)/%.o: %.cpp - $(call compile_cxx) - -################################################################################ -# Declarations to build the bootloader - -$(BUILD)/bootloader/$(ESPCOMP)/%.o: CFLAGS += -DBOOTLOADER_BUILD=1 -I$(ESPCOMP)/bootloader_support/include_priv -I$(ESPCOMP)/bootloader_support/include -I$(ESPCOMP)/micro-ecc/micro-ecc -I$(ESPCOMP)/esp32 -Wno-error=format -BOOTLOADER_OBJ = $(addprefix $(BUILD)/bootloader/$(ESPCOMP)/,\ - bootloader_support/src/bootloader_clock.o \ - bootloader_support/src/bootloader_common.o \ - bootloader_support/src/bootloader_flash.o \ - bootloader_support/src/bootloader_init.o \ - bootloader_support/src/bootloader_random.o \ - bootloader_support/src/bootloader_sha.o \ - bootloader_support/src/bootloader_utility.o \ - bootloader_support/src/efuse.o \ - bootloader_support/src/flash_qio_mode.o \ - bootloader_support/src/secure_boot_signatures.o \ - bootloader_support/src/secure_boot.o \ - bootloader_support/src/esp_image_format.o \ - bootloader_support/src/flash_encrypt.o \ - bootloader_support/src/flash_partitions.o \ - log/log.o \ - spi_flash/spi_flash_rom_patch.o \ - soc/esp32/rtc_clk.o \ - soc/esp32/rtc_time.o \ - soc/esp32/cpu_util.o \ - micro-ecc/micro-ecc/uECC.o \ - bootloader/subproject/main/bootloader_start.o \ - ) - -BOOTLOADER_LIBS = -BOOTLOADER_LIBS += -Wl,--start-group -BOOTLOADER_LIBS += $(BOOTLOADER_OBJ) -BOOTLOADER_LIBS += -L$(ESPCOMP)/esp32/lib -lrtc -BOOTLOADER_LIBS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc -BOOTLOADER_LIBS += -Wl,--end-group - -BOOTLOADER_LDFLAGS = -BOOTLOADER_LDFLAGS += -nostdlib -BOOTLOADER_LDFLAGS += -L$(ESPIDF)/lib -BOOTLOADER_LDFLAGS += -L$(ESPIDF)/ld -BOOTLOADER_LDFLAGS += -u call_user_start_cpu0 -BOOTLOADER_LDFLAGS += -Wl,--gc-sections -BOOTLOADER_LDFLAGS += -static -BOOTLOADER_LDFLAGS += -Wl,-EL -BOOTLOADER_LDFLAGS += -Wl,-Map=$(@:.elf=.map) -Wl,--cref -BOOTLOADER_LDFLAGS += -T $(ESPCOMP)/bootloader/subproject/main/esp32.bootloader.ld -BOOTLOADER_LDFLAGS += -T $(ESPCOMP)/bootloader/subproject/main/esp32.bootloader.rom.ld -BOOTLOADER_LDFLAGS += -T $(ESPCOMP)/esp32/ld/esp32.rom.ld -BOOTLOADER_LDFLAGS += -T $(ESPCOMP)/esp32/ld/esp32.rom.spiram_incompatible_fns.ld -BOOTLOADER_LDFLAGS += -T $(ESPCOMP)/esp32/ld/esp32.peripherals.ld - -BOOTLOADER_OBJ_DIRS = $(sort $(dir $(BOOTLOADER_OBJ))) -$(BOOTLOADER_OBJ): | $(BOOTLOADER_OBJ_DIRS) -$(BOOTLOADER_OBJ_DIRS): - $(MKDIR) -p $@ - -$(BUILD)/bootloader/%.o: %.c - $(call compile_c) - -$(BUILD)/bootloader.bin: $(BUILD)/bootloader.elf - $(ECHO) "Create $@" - $(Q)$(ESPTOOL) --chip esp32 elf2image --flash_mode $(FLASH_MODE) --flash_freq $(FLASH_FREQ) --flash_size $(FLASH_SIZE) $< - -$(BUILD)/bootloader.elf: $(BOOTLOADER_OBJ) - $(ECHO) "LINK $@" - $(Q)$(CC) $(BOOTLOADER_LDFLAGS) -o $@ $(BOOTLOADER_LIBS) - -################################################################################ -# Declarations to build the partitions - -PYTHON2 ?= python2 -PART_SRC = partitions.csv - -$(BUILD)/partitions.bin: $(PART_SRC) - $(ECHO) "Create $@" - $(Q)$(PYTHON2) $(ESPCOMP)/partition_table/gen_esp32part.py -q $< $@ - -################################################################################ - -include $(TOP)/py/mkrules.mk diff --git a/ports/esp32/README.md b/ports/esp32/README.md deleted file mode 100644 index 85df001e3f..0000000000 --- a/ports/esp32/README.md +++ /dev/null @@ -1,202 +0,0 @@ -MicroPython port to the ESP32 -============================= - -This is an experimental port of MicroPython to the Espressif ESP32 -microcontroller. It uses the ESP-IDF framework and MicroPython runs as -a task under FreeRTOS. - -Supported features include: -- REPL (Python prompt) over UART0. -- 16k stack for the MicroPython task and 96k Python heap. -- Many of MicroPython's features are enabled: unicode, arbitrary-precision - integers, single-precision floats, complex numbers, frozen bytecode, as - well as many of the internal modules. -- Internal filesystem using the flash (currently 2M in size). -- The machine module with GPIO, UART, SPI, software I2C, ADC, DAC, PWM, - TouchPad, WDT and Timer. -- The network module with WLAN (WiFi) support. - -Development of this ESP32 port was sponsored in part by Microbric Pty Ltd. - -Setting up the toolchain and ESP-IDF ------------------------------------- - -There are two main components that are needed to build the firmware: -- the Xtensa cross-compiler that targets the CPU in the ESP32 (this is - different to the compiler used by the ESP8266) -- the Espressif IDF (IoT development framework, aka SDK) - -The ESP-IDF changes quickly and MicroPython only supports a certain version. The -git hash of this version can be found by running `make` without a configured -`ESPIDF`. Then you can fetch only the given esp-idf using the following command: - - $ git clone https://github.com/espressif/esp-idf.git - $ git checkout - $ git submodule update --init --recursive - -The binary toolchain (binutils, gcc, etc.) can be installed using the following -guides: - - * [Linux installation](https://esp-idf.readthedocs.io/en/latest/get-started/linux-setup.html) - * [MacOS installation](https://esp-idf.readthedocs.io/en/latest/get-started/macos-setup.html) - * [Windows installation](https://esp-idf.readthedocs.io/en/latest/get-started/windows-setup.html) - -If you are on a Windows machine then the -[Windows Subsystem for Linux](https://msdn.microsoft.com/en-au/commandline/wsl/install_guide) -is the most efficient way to install the ESP32 toolchain and build the project. -If you use WSL then follow the -[Linux guidelines](https://esp-idf.readthedocs.io/en/latest/get-started/linux-setup.html) -for the ESP-IDF instead of the Windows ones. - -The Espressif ESP-IDF instructions above only install pyserial for Python 2, -so if you're running Python 3 or a non-system Python you'll also need to -install `pyserial` (or `esptool`) so that the Makefile can flash the board -and set parameters: -```bash -$ pip install pyserial -``` - -Once everything is set up you should have a functioning toolchain with -prefix xtensa-esp32-elf- (or otherwise if you configured it differently) -as well as a copy of the ESP-IDF repository. You will need to update your `PATH` -environment variable to include the ESP32 toolchain. For example, you can issue -the following commands on (at least) Linux: - - $ export PATH=$PATH:$HOME/esp/crosstool-NG/builds/xtensa-esp32-elf/bin - -You can put this command in your `.profile` or `.bash_login`. - -You then need to set the `ESPIDF` environment/makefile variable to point to -the root of the ESP-IDF repository. You can set the variable in your PATH, -or at the command line when calling make, or in your own custom `makefile`. -The last option is recommended as it allows you to easily configure other -variables for the build. In that case, create a new file in the esp32 -directory called `makefile` and add the following lines to that file: -``` -ESPIDF = -#PORT = /dev/ttyUSB0 -#FLASH_MODE = qio -#FLASH_SIZE = 4MB -#CROSS_COMPILE = xtensa-esp32-elf- -#CONFIG_SPIRAM_SUPPORT = 1 - -include Makefile -``` -Be sure to enter the correct path to your local copy of the IDF repository -(and use `$(HOME)`, not tilde, to reference your home directory). -If your filesystem is case-insensitive then you'll need to use `GNUmakefile` -instead of `makefile`. -If the Xtensa cross-compiler is not in your path you can use the -`CROSS_COMPILE` variable to set its location. Other options of interest -are `PORT` for the serial port of your esp32 module, and `FLASH_MODE` -(which may need to be `dio` for some modules) -and `FLASH_SIZE`. See the Makefile for further information. - -Building the firmware ---------------------- - -The MicroPython cross-compiler must be built to pre-compile some of the -built-in scripts to bytecode. This can be done by (from the root of -this repository): -```bash -$ make -C mpy-cross -``` - -The ESP32 port has a dependency on Berkeley DB, which is an external -dependency (git submodule). You'll need to have git initialize that -module using the commands: -```bash -$ git submodule init lib/berkeley-db-1.xx -$ git submodule update -``` - -Then to build MicroPython for the ESP32 run: -```bash -$ cd ports/esp32 -$ make -``` -This will produce binary firmware images in the `build/` subdirectory -(three of them: bootloader.bin, partitions.bin and application.bin). - -To flash the firmware you must have your ESP32 module in the bootloader -mode and connected to a serial port on your PC. Refer to the documentation -for your particular ESP32 module for how to do this. The serial port and -flash settings are set in the `Makefile`, and can be overridden in your -local `makefile`; see above for more details. - -You will also need to have user permissions to access the /dev/ttyUSB0 device. -On Linux, you can enable this by adding your user to the `dialout` group, -and rebooting or logging out and in again. -```bash -$ sudo adduser dialout -``` - -If you are installing MicroPython to your module for the first time, or -after installing any other firmware, you should first erase the flash -completely: -```bash -$ make erase -``` - -To flash the MicroPython firmware to your ESP32 use: -```bash -$ make deploy -``` -This will use the `esptool.py` script (provided by ESP-IDF) to download the -binary images. - -Getting a Python prompt ------------------------ - -You can get a prompt via the serial port, via UART0, which is the same UART -that is used for programming the firmware. The baudrate for the REPL is -115200 and you can use a command such as: -```bash -$ picocom -b 115200 /dev/ttyUSB0 -``` - -Configuring the WiFi and using the board ----------------------------------------- - -The ESP32 port is designed to be (almost) equivalent to the ESP8266 in -terms of the modules and user-facing API. There are some small differences, -notably that the ESP32 does not automatically connect to the last access -point when booting up. But for the most part the documentation and tutorials -for the ESP8266 should apply to the ESP32 (at least for the components that -are implemented). - -See http://docs.micropython.org/en/latest/esp8266/esp8266/quickref.html for -a quick reference, and http://docs.micropython.org/en/latest/esp8266/esp8266/tutorial/intro.html -for a tutorial. - -The following function can be used to connect to a WiFi access point (you can -either pass in your own SSID and password, or change the defaults so you can -quickly call `wlan_connect()` and it just works): -```python -def wlan_connect(ssid='MYSSID', password='MYPASS'): - import network - wlan = network.WLAN(network.STA_IF) - if not wlan.active() or not wlan.isconnected(): - wlan.active(True) - print('connecting to:', ssid) - wlan.connect(ssid, password) - while not wlan.isconnected(): - pass - print('network config:', wlan.ifconfig()) -``` - -Note that some boards require you to configure the WiFi antenna before using -the WiFi. On Pycom boards like the LoPy and WiPy 2.0 you need to execute the -following code to select the internal antenna (best to put this line in your -boot.py file): -```python -import machine -antenna = machine.Pin(16, machine.Pin.OUT, value=0) -``` - -Troubleshooting ---------------- - -* Continuous reboots after programming: Ensure FLASH_MODE is correct for your - board (e.g. ESP-WROOM-32 should be DIO). Then perform a `make clean`, rebuild, - redeploy. diff --git a/ports/esp32/README.ulp.md b/ports/esp32/README.ulp.md deleted file mode 100644 index cbc5771a90..0000000000 --- a/ports/esp32/README.ulp.md +++ /dev/null @@ -1,126 +0,0 @@ -# ULP - -To compile binarys for the ulp you need the ulp toolkit. Download it from https://github.com/espressif/binutils-esp32ulp/wiki#downloads -Then extract it, then add ```esp32ulp-elf-binutils/bin``` to your PATH - -## Example Makefile - -```make -ULP_S_SOURCES := main.S -ULP_APP_NAME := test -ULP_LD_SCRIPT := esp32.ulp.ld - -SRC_PATH := src -BUILD_PATH := build - -include $(ESPIDF)/components/ulp/Makefile.projbuild - -ULP_ELF := $(ULP_APP_NAME).elf -ULP_MAP := $(ULP_ELF:.elf=.map) -ULP_SYM := $(ULP_ELF:.elf=.sym) -ULP_BIN := $(ULP_ELF:.elf=.bin) -ULP_EXPORTS_LD := $(ULP_ELF:.elf=.ld) -ULP_EXPORTS_HEADER := $(ULP_ELF:.elf=.h) - -ULP_OBJECTS := $(notdir $(ULP_S_SOURCES:.S=.ulp.o)) -ULP_DEP := $(notdir $(ULP_S_SOURCES:.S=.ulp.d)) $(ULP_LD_SCRIPT:.ld=.d) -ULP_PREPROCESSED := $(notdir $(ULP_S_SOURCES:.S=.ulp.pS)) -ULP_LISTINGS := $(notdir $(ULP_S_SOURCES:.S=.ulp.lst)) - -.PHONY: all clean - -all: $(BUILD_PATH) $(BUILD_PATH)/$(ULP_BIN) - -clean: - rm -rf $(BUILD_PATH) - -$(BUILD_PATH): - mkdir $@ - -# Generate preprocessed linker file. -$(BUILD_PATH)/$(ULP_APP_NAME).ld: $(SRC_PATH)/$(ULP_LD_SCRIPT) - cpp -P $< -o $@ - -# Generate preprocessed assembly files. -# To inspect these preprocessed files, add a ".PRECIOUS: %.ulp.pS" rule. -$(BUILD_PATH)/%.ulp.pS: $(SRC_PATH)/%.S - cpp $< -o $@ - -# Compiled preprocessed files into object files. -$(BUILD_PATH)/%.ulp.o: $(BUILD_PATH)/%.ulp.pS - $(ULP_AS) -al=$(patsubst %.ulp.o,%.ulp.lst,$@) -o $@ $< - -# Link object files and generate map file -$(BUILD_PATH)/$(ULP_ELF): $(BUILD_PATH)/$(ULP_OBJECTS) $(BUILD_PATH)/$(ULP_APP_NAME).ld - $(ULP_LD) -o $@ -A elf32-esp32ulp -Map=$(BUILD_PATH)/$(ULP_MAP) -T $(BUILD_PATH)/$(ULP_APP_NAME).ld $< - -# Dump the list of global symbols in a convenient format. -$(ULP_SYM): $(ULP_ELF) - $(ULP_NM) -g -f posix $< > $@ - -# Dump the binary for inclusion into the project -$(BUILD_PATH)/$(ULP_BIN): $(BUILD_PATH)/$(ULP_ELF) - $(ULP_OBJCOPY) -O binary $< $@ -``` - -## Example linker script for the ulp -``` -#define ULP_BIN_MAGIC 0x00706c75 -#define HEADER_SIZE 12 -#define CONFIG_ULP_COPROC_RESERVE_MEM 4096 - -MEMORY -{ - ram(RW) : ORIGIN = 0, LENGTH = CONFIG_ULP_COPROC_RESERVE_MEM -} - -SECTIONS -{ - .text : AT(HEADER_SIZE) - { - *(.text) - } >ram - .data : - { - . = ALIGN(4); - *(.data) - } >ram - .bss : - { - . = ALIGN(4); - *(.bss) - } >ram - - .header : AT(0) - { - LONG(ULP_BIN_MAGIC) - SHORT(LOADADDR(.text)) - SHORT(SIZEOF(.text)) - SHORT(SIZEOF(.data)) - SHORT(SIZEOF(.bss)) - } -} -``` - -## Example ulp code -```asm -move R3, 99 -move R0, 10 - -# mem[R0+0] = R3 -st R3, R0, 0 - -HALT -``` - -## Example python code using the ulp -```python -import esp32 -import time - -u = esp32.ULP() -with open('test.bin', 'rb') as f: - b = f.read() -u.load_binary(0,b) -u.run(0) -``` diff --git a/ports/esp32/esp32.custom_common.ld b/ports/esp32/esp32.custom_common.ld deleted file mode 100644 index 716e9ac1d8..0000000000 --- a/ports/esp32/esp32.custom_common.ld +++ /dev/null @@ -1,254 +0,0 @@ -/* Default entry point: */ -ENTRY(call_start_cpu0); - -SECTIONS -{ - /* RTC fast memory holds RTC wake stub code, - including from any source file named rtc_wake_stub*.c - */ - .rtc.text : - { - . = ALIGN(4); - *(.rtc.literal .rtc.text) - *rtc_wake_stub*.o(.literal .text .literal.* .text.*) - } > rtc_iram_seg - - /* RTC slow memory holds RTC wake stub - data/rodata, including from any source file - named rtc_wake_stub*.c - */ - .rtc.data : - { - _rtc_data_start = ABSOLUTE(.); - *(.rtc.data) - *(.rtc.rodata) - *rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*) - _rtc_data_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* RTC bss, from any source file named rtc_wake_stub*.c */ - .rtc.bss (NOLOAD) : - { - _rtc_bss_start = ABSOLUTE(.); - *rtc_wake_stub*.o(.bss .bss.*) - *rtc_wake_stub*.o(COMMON) - _rtc_bss_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* This section holds data that should not be initialized at power up - and will be retained during deep sleep. The section located in - RTC SLOW Memory area. User data marked with RTC_NOINIT_ATTR will be placed - into this section. See the file "esp_attr.h" for more information. - */ - .rtc_noinit (NOLOAD): - { - . = ALIGN(4); - _rtc_noinit_start = ABSOLUTE(.); - *(.rtc_noinit .rtc_noinit.*) - . = ALIGN(4) ; - _rtc_noinit_end = ABSOLUTE(.); - } > rtc_slow_seg - - /* Send .iram0 code to iram */ - .iram0.vectors : - { - /* Vectors go to IRAM */ - _init_start = ABSOLUTE(.); - /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ - . = 0x0; - KEEP(*(.WindowVectors.text)); - . = 0x180; - KEEP(*(.Level2InterruptVector.text)); - . = 0x1c0; - KEEP(*(.Level3InterruptVector.text)); - . = 0x200; - KEEP(*(.Level4InterruptVector.text)); - . = 0x240; - KEEP(*(.Level5InterruptVector.text)); - . = 0x280; - KEEP(*(.DebugExceptionVector.text)); - . = 0x2c0; - KEEP(*(.NMIExceptionVector.text)); - . = 0x300; - KEEP(*(.KernelExceptionVector.text)); - . = 0x340; - KEEP(*(.UserExceptionVector.text)); - . = 0x3C0; - KEEP(*(.DoubleExceptionVector.text)); - . = 0x400; - *(.*Vector.literal) - - *(.UserEnter.literal); - *(.UserEnter.text); - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - _init_end = ABSOLUTE(.); - - /* This goes here, not at top of linker script, so addr2line finds it last, - and uses it in preference to the first symbol in IRAM */ - _iram_start = ABSOLUTE(0); - } > iram0_0_seg - - .iram0.text : - { - /* Code marked as runnning out of IRAM */ - _iram_text_start = ABSOLUTE(.); - *(.iram1 .iram1.*) - *freertos/*(.literal .text .literal.* .text.*) - *heap/multi_heap.o(.literal .text .literal.* .text.*) - *heap/multi_heap_poisoning.o(.literal .text .literal.* .text.*) - *esp32/panic.o(.literal .text .literal.* .text.*) - *esp32/core_dump.o(.literal .text .literal.* .text.*) - *app_trace/*(.literal .text .literal.* .text.*) - *xtensa-debug-module/eri.o(.literal .text .literal.* .text.*) - *librtc.a:(.literal .text .literal.* .text.*) - *soc/esp32/*(.literal .text .literal.* .text.*) - *libhal.a:(.literal .text .literal.* .text.*) - *libgcc.a:lib2funcs.o(.literal .text .literal.* .text.*) - *spi_flash/spi_flash_rom_patch.o(.literal .text .literal.* .text.*) - *libgcov.a:(.literal .text .literal.* .text.*) - INCLUDE esp32.spiram.rom-functions-iram.ld - *py/scheduler.o*(.literal .text .literal.* .text.*) - _iram_text_end = ABSOLUTE(.); - } > iram0_0_seg - - .dram0.data : - { - _data_start = ABSOLUTE(.); - *(.data) - *(.data.*) - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - *(.dram1 .dram1.*) - *esp32/panic.o(.rodata .rodata.*) - *libphy.a:(.rodata .rodata.*) - *soc/esp32/rtc_clk.o(.rodata .rodata.*) - *app_trace/app_trace.o(.rodata .rodata.*) - *libgcov.a:(.rodata .rodata.*) - *heap/multi_heap.o(.rodata .rodata.*) - *heap/multi_heap_poisoning.o(.rodata .rodata.*) - INCLUDE esp32.spiram.rom-functions-dram.ld - _data_end = ABSOLUTE(.); - . = ALIGN(4); - } > dram0_0_seg - - /*This section holds data that should not be initialized at power up. - The section located in Internal SRAM memory region. The macro _NOINIT - can be used as attribute to place data into this section. - See the esp_attr.h file for more information. - */ - .noinit (NOLOAD): - { - . = ALIGN(4); - _noinit_start = ABSOLUTE(.); - *(.noinit .noinit.*) - . = ALIGN(4) ; - _noinit_end = ABSOLUTE(.); - } > dram0_0_seg - - /* Shared RAM */ - .dram0.bss (NOLOAD) : - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - *(.bss) - *(.bss.*) - *(.share.mem) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - /* The heap starts right after end of this section */ - _heap_start = ABSOLUTE(.); - } > dram0_0_seg - - .flash.rodata : - { - _rodata_start = ABSOLUTE(.); - *(.rodata) - *(.rodata.*) - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table .gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - . = (. + 3) & ~ 3; - __eh_frame = ABSOLUTE(.); - KEEP(*(.eh_frame)) - . = (. + 7) & ~ 3; - /* C++ constructor and destructor tables, properly ordered: */ - __init_array_start = ABSOLUTE(.); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - __init_array_end = ABSOLUTE(.); - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - _rodata_end = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - _thread_local_start = ABSOLUTE(.); - *(.tdata) - *(.tdata.*) - *(.tbss) - *(.tbss.*) - _thread_local_end = ABSOLUTE(.); - . = ALIGN(4); - } >drom0_0_seg - - .flash.text : - { - _stext = .; - _text_start = ABSOLUTE(.); - *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - _text_end = ABSOLUTE(.); - _etext = .; - - /* Similar to _iram_start, this symbol goes here so it is - resolved by addr2line in preference to the first symbol in - the flash.text segment. - */ - _flash_cache_start = ABSOLUTE(0); - } >iram0_2_seg -} diff --git a/ports/esp32/esp32_ulp.c b/ports/esp32/esp32_ulp.c deleted file mode 100644 index 3772639f44..0000000000 --- a/ports/esp32/esp32_ulp.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 "Andreas Valder" - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" - -#include "esp32/ulp.h" -#include "esp_err.h" - -typedef struct _esp32_ulp_obj_t { - mp_obj_base_t base; -} esp32_ulp_obj_t; - -const mp_obj_type_t esp32_ulp_type; - -// singleton ULP object -STATIC const esp32_ulp_obj_t esp32_ulp_obj = {{&esp32_ulp_type}}; - -STATIC mp_obj_t esp32_ulp_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return constant object - return (mp_obj_t)&esp32_ulp_obj; -} - -STATIC mp_obj_t esp32_ulp_set_wakeup_period(mp_obj_t self_in, mp_obj_t period_index_in, mp_obj_t period_us_in) { - mp_uint_t period_index = mp_obj_get_int(period_index_in); - mp_uint_t period_us = mp_obj_get_int(period_us_in); - int _errno = ulp_set_wakeup_period(period_index, period_us); - if (_errno != ESP_OK) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(esp32_ulp_set_wakeup_period_obj, esp32_ulp_set_wakeup_period); - -STATIC mp_obj_t esp32_ulp_load_binary(mp_obj_t self_in, mp_obj_t load_addr_in, mp_obj_t program_binary_in) { - mp_uint_t load_addr = mp_obj_get_int(load_addr_in); - - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(program_binary_in, &bufinfo, MP_BUFFER_READ); - - int _errno = ulp_load_binary(load_addr, bufinfo.buf, bufinfo.len/sizeof(uint32_t)); - if (_errno != ESP_OK) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(esp32_ulp_load_binary_obj, esp32_ulp_load_binary); - -STATIC mp_obj_t esp32_ulp_run(mp_obj_t self_in, mp_obj_t entry_point_in) { - mp_uint_t entry_point = mp_obj_get_int(entry_point_in); - int _errno = ulp_run(entry_point/sizeof(uint32_t)); - if (_errno != ESP_OK) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp32_ulp_run_obj, esp32_ulp_run); - -STATIC const mp_rom_map_elem_t esp32_ulp_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_set_wakeup_period), MP_ROM_PTR(&esp32_ulp_set_wakeup_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_load_binary), MP_ROM_PTR(&esp32_ulp_load_binary_obj) }, - { MP_ROM_QSTR(MP_QSTR_run), MP_ROM_PTR(&esp32_ulp_run_obj) }, - { MP_ROM_QSTR(MP_QSTR_RESERVE_MEM), MP_ROM_INT(CONFIG_ULP_COPROC_RESERVE_MEM) }, -}; -STATIC MP_DEFINE_CONST_DICT(esp32_ulp_locals_dict, esp32_ulp_locals_dict_table); - -const mp_obj_type_t esp32_ulp_type = { - { &mp_type_type }, - .name = MP_QSTR_ULP, - .make_new = esp32_ulp_make_new, - .locals_dict = (mp_obj_t)&esp32_ulp_locals_dict, -}; diff --git a/ports/esp32/espneopixel.c b/ports/esp32/espneopixel.c deleted file mode 100644 index 829c8b1c80..0000000000 --- a/ports/esp32/espneopixel.c +++ /dev/null @@ -1,53 +0,0 @@ -// Original version from https://github.com/adafruit/Adafruit_NeoPixel -// Modifications by dpgeorge to support auto-CPU-frequency detection - -// This is a mash-up of the Due show() code + insights from Michael Miller's -// ESP8266 work for the NeoPixelBus library: github.com/Makuna/NeoPixelBus -// Needs to be a separate .c file to enforce ICACHE_RAM_ATTR execution. - -#include "py/mpconfig.h" -#include "py/mphal.h" -#include "modesp.h" - -void IRAM_ATTR esp_neopixel_write(uint8_t pin, uint8_t *pixels, uint32_t numBytes, uint8_t timing) { - uint8_t *p, *end, pix, mask; - uint32_t t, time0, time1, period, c, startTime, pinMask; - - pinMask = 1 << pin; - p = pixels; - end = p + numBytes; - pix = *p++; - mask = 0x80; - startTime = 0; - - uint32_t fcpu = ets_get_cpu_frequency() * 1000000; - - if (timing == 1) { - // 800 KHz - time0 = (fcpu * 0.35) / 1000000; // 0.35us - time1 = (fcpu * 0.8) / 1000000; // 0.8us - period = (fcpu * 1.25) / 1000000; // 1.25us per bit - } else { - // 400 KHz - time0 = (fcpu * 0.5) / 1000000; // 0.35us - time1 = (fcpu * 1.2) / 1000000; // 0.8us - period = (fcpu * 2.5) / 1000000; // 1.25us per bit - } - - uint32_t irq_state = mp_hal_quiet_timing_enter(); - for (t = time0;; t = time0) { - if (pix & mask) t = time1; // Bit high duration - while (((c = mp_hal_ticks_cpu()) - startTime) < period); // Wait for bit start - GPIO_REG_WRITE(GPIO_OUT_W1TS_REG, pinMask); // Set high - startTime = c; // Save start time - while (((c = mp_hal_ticks_cpu()) - startTime) < t); // Wait high duration - GPIO_REG_WRITE(GPIO_OUT_W1TC_REG, pinMask); // Set low - if (!(mask >>= 1)) { // Next bit/byte - if(p >= end) break; - pix = *p++; - mask = 0x80; - } - } - while ((mp_hal_ticks_cpu() - startTime) < period); // Wait for last bit - mp_hal_quiet_timing_exit(irq_state); -} diff --git a/ports/esp32/esponewire.c b/ports/esp32/esponewire.c deleted file mode 100644 index 781616cbe4..0000000000 --- a/ports/esp32/esponewire.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015-2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mphal.h" -#include "esp8266/esponewire.h" - -#define TIMING_RESET1 (0) -#define TIMING_RESET2 (1) -#define TIMING_RESET3 (2) -#define TIMING_READ1 (3) -#define TIMING_READ2 (4) -#define TIMING_READ3 (5) -#define TIMING_WRITE1 (6) -#define TIMING_WRITE2 (7) -#define TIMING_WRITE3 (8) - -uint16_t esp_onewire_timings[9] = {480, 40, 420, 5, 5, 40, 10, 50, 10}; - -#define DELAY_US mp_hal_delay_us_fast - -int esp_onewire_reset(mp_hal_pin_obj_t pin) { - mp_hal_pin_write(pin, 0); - DELAY_US(esp_onewire_timings[TIMING_RESET1]); - uint32_t i = MICROPY_BEGIN_ATOMIC_SECTION(); - mp_hal_pin_write(pin, 1); - DELAY_US(esp_onewire_timings[TIMING_RESET2]); - int status = !mp_hal_pin_read(pin); - MICROPY_END_ATOMIC_SECTION(i); - DELAY_US(esp_onewire_timings[TIMING_RESET3]); - return status; -} - -int esp_onewire_readbit(mp_hal_pin_obj_t pin) { - mp_hal_pin_write(pin, 1); - uint32_t i = MICROPY_BEGIN_ATOMIC_SECTION(); - mp_hal_pin_write(pin, 0); - DELAY_US(esp_onewire_timings[TIMING_READ1]); - mp_hal_pin_write(pin, 1); - DELAY_US(esp_onewire_timings[TIMING_READ2]); - int value = mp_hal_pin_read(pin); - MICROPY_END_ATOMIC_SECTION(i); - DELAY_US(esp_onewire_timings[TIMING_READ3]); - return value; -} - -void esp_onewire_writebit(mp_hal_pin_obj_t pin, int value) { - uint32_t i = MICROPY_BEGIN_ATOMIC_SECTION(); - mp_hal_pin_write(pin, 0); - DELAY_US(esp_onewire_timings[TIMING_WRITE1]); - if (value) { - mp_hal_pin_write(pin, 1); - } - DELAY_US(esp_onewire_timings[TIMING_WRITE2]); - mp_hal_pin_write(pin, 1); - DELAY_US(esp_onewire_timings[TIMING_WRITE3]); - MICROPY_END_ATOMIC_SECTION(i); -} diff --git a/ports/esp32/gccollect.c b/ports/esp32/gccollect.c deleted file mode 100644 index 9843cef008..0000000000 --- a/ports/esp32/gccollect.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * Copyright (c) 2017 Pycom Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/mpstate.h" -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" -#include "soc/cpu.h" -#include "xtensa/hal.h" - - -static void gc_collect_inner(int level) { - if (level < XCHAL_NUM_AREGS / 8) { - gc_collect_inner(level + 1); - if (level != 0) { - return; - } - } - - if (level == XCHAL_NUM_AREGS / 8) { - // get the sp - volatile uint32_t sp = (uint32_t)get_sp(); - gc_collect_root((void**)sp, ((mp_uint_t)MP_STATE_THREAD(stack_top) - sp) / sizeof(uint32_t)); - return; - } - - // trace root pointers from any threads - #if MICROPY_PY_THREAD - mp_thread_gc_others(); - #endif -} - -void gc_collect(void) { - gc_collect_start(); - gc_collect_inner(0); - gc_collect_end(); -} diff --git a/ports/esp32/gccollect.h b/ports/esp32/gccollect.h deleted file mode 100644 index fe02cc62be..0000000000 --- a/ports/esp32/gccollect.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -extern uint32_t _text_start; -extern uint32_t _text_end; -extern uint32_t _irom0_text_start; -extern uint32_t _irom0_text_end; -extern uint32_t _data_start; -extern uint32_t _data_end; -extern uint32_t _rodata_start; -extern uint32_t _rodata_end; -extern uint32_t _bss_start; -extern uint32_t _bss_end; -extern uint32_t _heap_start; -extern uint32_t _heap_end; - -void gc_collect(void); diff --git a/ports/esp32/help.c b/ports/esp32/help.c deleted file mode 100644 index 95d115c563..0000000000 --- a/ports/esp32/help.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char esp32_help_text[] = -"Welcome to MicroPython on the ESP32!\n" -"\n" -"For generic online docs please visit http://docs.micropython.org/\n" -"\n" -"For access to the hardware use the 'machine' module:\n" -"\n" -"import machine\n" -"pin12 = machine.Pin(12, machine.Pin.OUT)\n" -"pin12.value(1)\n" -"pin13 = machine.Pin(13, machine.Pin.IN, machine.Pin.PULL_UP)\n" -"print(pin13.value())\n" -"i2c = machine.I2C(scl=machine.Pin(21), sda=machine.Pin(22))\n" -"i2c.scan()\n" -"i2c.writeto(addr, b'1234')\n" -"i2c.readfrom(addr, 4)\n" -"\n" -"Basic WiFi configuration:\n" -"\n" -"import network\n" -"sta_if = network.WLAN(network.STA_IF); sta_if.active(True)\n" -"sta_if.scan() # Scan for available access points\n" -"sta_if.connect(\"\", \"\") # Connect to an AP\n" -"sta_if.isconnected() # Check for successful connection\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -"For a list of available modules, type help('modules')\n" -; diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c deleted file mode 100644 index d62f362e96..0000000000 --- a/ports/esp32/machine_adc.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Nick Moore - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include - -#include "esp_log.h" - -#include "driver/gpio.h" -#include "driver/adc.h" - -#include "py/runtime.h" -#include "py/mphal.h" -#include "modmachine.h" - -typedef struct _madc_obj_t { - mp_obj_base_t base; - gpio_num_t gpio_id; - adc1_channel_t adc1_id; -} madc_obj_t; - -STATIC const madc_obj_t madc_obj[] = { - {{&machine_adc_type}, GPIO_NUM_36, ADC1_CHANNEL_0}, - {{&machine_adc_type}, GPIO_NUM_37, ADC1_CHANNEL_1}, - {{&machine_adc_type}, GPIO_NUM_38, ADC1_CHANNEL_2}, - {{&machine_adc_type}, GPIO_NUM_39, ADC1_CHANNEL_3}, - {{&machine_adc_type}, GPIO_NUM_32, ADC1_CHANNEL_4}, - {{&machine_adc_type}, GPIO_NUM_33, ADC1_CHANNEL_5}, - {{&machine_adc_type}, GPIO_NUM_34, ADC1_CHANNEL_6}, - {{&machine_adc_type}, GPIO_NUM_35, ADC1_CHANNEL_7}, -}; - -STATIC mp_obj_t madc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, - const mp_obj_t *args) { - - static int initialized = 0; - if (!initialized) { - adc1_config_width(ADC_WIDTH_12Bit); - initialized = 1; - } - - mp_arg_check_num(n_args, n_kw, 1, 1, true); - gpio_num_t pin_id = machine_pin_get_id(args[0]); - const madc_obj_t *self = NULL; - for (int i = 0; i < MP_ARRAY_SIZE(madc_obj); i++) { - if (pin_id == madc_obj[i].gpio_id) { self = &madc_obj[i]; break; } - } - if (!self) mp_raise_ValueError("invalid Pin for ADC"); - esp_err_t err = adc1_config_channel_atten(self->adc1_id, ADC_ATTEN_0db); - if (err == ESP_OK) return MP_OBJ_FROM_PTR(self); - mp_raise_ValueError("Parameter Error"); -} - -STATIC void madc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - madc_obj_t *self = self_in; - mp_printf(print, "ADC(Pin(%u))", self->gpio_id); -} - -STATIC mp_obj_t madc_read(mp_obj_t self_in) { - madc_obj_t *self = self_in; - int val = adc1_get_raw(self->adc1_id); - if (val == -1) mp_raise_ValueError("Parameter Error"); - return MP_OBJ_NEW_SMALL_INT(val); -} -MP_DEFINE_CONST_FUN_OBJ_1(madc_read_obj, madc_read); - -STATIC mp_obj_t madc_atten(mp_obj_t self_in, mp_obj_t atten_in) { - madc_obj_t *self = self_in; - adc_atten_t atten = mp_obj_get_int(atten_in); - esp_err_t err = adc1_config_channel_atten(self->adc1_id, atten); - if (err == ESP_OK) return mp_const_none; - mp_raise_ValueError("Parameter Error"); -} -MP_DEFINE_CONST_FUN_OBJ_2(madc_atten_obj, madc_atten); - -STATIC mp_obj_t madc_width(mp_obj_t cls_in, mp_obj_t width_in) { - adc_bits_width_t width = mp_obj_get_int(width_in); - esp_err_t err = adc1_config_width(width); - if (err == ESP_OK) return mp_const_none; - mp_raise_ValueError("Parameter Error"); -} -MP_DEFINE_CONST_FUN_OBJ_2(madc_width_fun_obj, madc_width); -MP_DEFINE_CONST_CLASSMETHOD_OBJ(madc_width_obj, MP_ROM_PTR(&madc_width_fun_obj)); - -STATIC const mp_rom_map_elem_t madc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&madc_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_atten), MP_ROM_PTR(&madc_atten_obj) }, - { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&madc_width_obj) }, - - { MP_ROM_QSTR(MP_QSTR_ATTN_0DB), MP_ROM_INT(ADC_ATTEN_0db) }, - { MP_ROM_QSTR(MP_QSTR_ATTN_2_5DB), MP_ROM_INT(ADC_ATTEN_2_5db) }, - { MP_ROM_QSTR(MP_QSTR_ATTN_6DB), MP_ROM_INT(ADC_ATTEN_6db) }, - { MP_ROM_QSTR(MP_QSTR_ATTN_11DB), MP_ROM_INT(ADC_ATTEN_11db) }, - - { MP_ROM_QSTR(MP_QSTR_WIDTH_9BIT), MP_ROM_INT(ADC_WIDTH_9Bit) }, - { MP_ROM_QSTR(MP_QSTR_WIDTH_10BIT), MP_ROM_INT(ADC_WIDTH_10Bit) }, - { MP_ROM_QSTR(MP_QSTR_WIDTH_11BIT), MP_ROM_INT(ADC_WIDTH_11Bit) }, - { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(ADC_WIDTH_12Bit) }, -}; - -STATIC MP_DEFINE_CONST_DICT(madc_locals_dict, madc_locals_dict_table); - -const mp_obj_type_t machine_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .print = madc_print, - .make_new = madc_make_new, - .locals_dict = (mp_obj_t)&madc_locals_dict, -}; diff --git a/ports/esp32/machine_dac.c b/ports/esp32/machine_dac.c deleted file mode 100644 index bd0804ec41..0000000000 --- a/ports/esp32/machine_dac.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Nick Moore - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include - -#include "esp_log.h" - -#include "driver/gpio.h" -#include "driver/dac.h" - -#include "py/runtime.h" -#include "py/mphal.h" -#include "modmachine.h" - -typedef struct _mdac_obj_t { - mp_obj_base_t base; - gpio_num_t gpio_id; - dac_channel_t dac_id; -} mdac_obj_t; - -STATIC const mdac_obj_t mdac_obj[] = { - {{&machine_dac_type}, GPIO_NUM_25, DAC_CHANNEL_1}, - {{&machine_dac_type}, GPIO_NUM_26, DAC_CHANNEL_2}, -}; - -STATIC mp_obj_t mdac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, - const mp_obj_t *args) { - - mp_arg_check_num(n_args, n_kw, 1, 1, true); - gpio_num_t pin_id = machine_pin_get_id(args[0]); - const mdac_obj_t *self = NULL; - for (int i = 0; i < MP_ARRAY_SIZE(mdac_obj); i++) { - if (pin_id == mdac_obj[i].gpio_id) { self = &mdac_obj[i]; break; } - } - if (!self) mp_raise_ValueError("invalid Pin for DAC"); - - esp_err_t err = dac_output_enable(self->dac_id); - if (err == ESP_OK) { - err = dac_output_voltage(self->dac_id, 0); - } - if (err == ESP_OK) return MP_OBJ_FROM_PTR(self); - mp_raise_ValueError("Parameter Error"); -} - -STATIC void mdac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - mdac_obj_t *self = self_in; - mp_printf(print, "DAC(Pin(%u))", self->gpio_id); -} - -STATIC mp_obj_t mdac_write(mp_obj_t self_in, mp_obj_t value_in) { - mdac_obj_t *self = self_in; - int value = mp_obj_get_int(value_in); - if (value < 0 || value > 255) mp_raise_ValueError("Value out of range"); - - esp_err_t err = dac_output_voltage(self->dac_id, value); - if (err == ESP_OK) return mp_const_none; - mp_raise_ValueError("Parameter Error"); -} -MP_DEFINE_CONST_FUN_OBJ_2(mdac_write_obj, mdac_write); - -STATIC const mp_rom_map_elem_t mdac_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mdac_write_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mdac_locals_dict, mdac_locals_dict_table); - -const mp_obj_type_t machine_dac_type = { - { &mp_type_type }, - .name = MP_QSTR_DAC, - .print = mdac_print, - .make_new = mdac_make_new, - .locals_dict = (mp_obj_t)&mdac_locals_dict, -}; diff --git a/ports/esp32/machine_hw_spi.c b/ports/esp32/machine_hw_spi.c deleted file mode 100644 index d011ce53e3..0000000000 --- a/ports/esp32/machine_hw_spi.c +++ /dev/null @@ -1,390 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 "Eric Poulsen" - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "extmod/machine_spi.h" -#include "modmachine.h" - -#include "driver/spi_master.h" - -#define MP_HW_SPI_MAX_XFER_BYTES (4092) -#define MP_HW_SPI_MAX_XFER_BITS (MP_HW_SPI_MAX_XFER_BYTES * 8) // Has to be an even multiple of 8 - -typedef struct _machine_hw_spi_obj_t { - mp_obj_base_t base; - spi_host_device_t host; - uint32_t baudrate; - uint8_t polarity; - uint8_t phase; - uint8_t bits; - uint8_t firstbit; - int8_t sck; - int8_t mosi; - int8_t miso; - spi_device_handle_t spi; - enum { - MACHINE_HW_SPI_STATE_NONE, - MACHINE_HW_SPI_STATE_INIT, - MACHINE_HW_SPI_STATE_DEINIT - } state; -} machine_hw_spi_obj_t; - -STATIC void machine_hw_spi_deinit_internal(machine_hw_spi_obj_t *self) { - switch (spi_bus_remove_device(self->spi)) { - case ESP_ERR_INVALID_ARG: - mp_raise_msg(&mp_type_OSError, "invalid configuration"); - return; - - case ESP_ERR_INVALID_STATE: - mp_raise_msg(&mp_type_OSError, "SPI device already freed"); - return; - } - - switch (spi_bus_free(self->host)) { - case ESP_ERR_INVALID_ARG: - mp_raise_msg(&mp_type_OSError, "invalid configuration"); - return; - - case ESP_ERR_INVALID_STATE: - mp_raise_msg(&mp_type_OSError, "SPI bus already freed"); - return; - } - - int8_t pins[3] = {self->miso, self->mosi, self->sck}; - - for (int i = 0; i < 3; i++) { - if (pins[i] != -1) { - gpio_pad_select_gpio(pins[i]); - gpio_matrix_out(pins[i], SIG_GPIO_OUT_IDX, false, false); - gpio_set_direction(pins[i], GPIO_MODE_INPUT); - } - } -} - -STATIC void machine_hw_spi_init_internal( - machine_hw_spi_obj_t *self, - int8_t host, - int32_t baudrate, - int8_t polarity, - int8_t phase, - int8_t bits, - int8_t firstbit, - int8_t sck, - int8_t mosi, - int8_t miso) { - - // if we're not initialized, then we're - // implicitly 'changed', since this is the init routine - bool changed = self->state != MACHINE_HW_SPI_STATE_INIT; - - esp_err_t ret; - - machine_hw_spi_obj_t old_self = *self; - - if (host != -1 && host != self->host) { - self->host = host; - changed = true; - } - - if (baudrate != -1 && baudrate != self->baudrate) { - self->baudrate = baudrate; - changed = true; - } - - if (polarity != -1 && polarity != self->polarity) { - self->polarity = polarity; - changed = true; - } - - if (phase != -1 && phase != self->phase) { - self->phase = phase; - changed = true; - } - - if (bits != -1 && bits != self->bits) { - self->bits = bits; - changed = true; - } - - if (firstbit != -1 && firstbit != self->firstbit) { - self->firstbit = firstbit; - changed = true; - } - - if (sck != -2 && sck != self->sck) { - self->sck = sck; - changed = true; - } - - if (mosi != -2 && mosi != self->mosi) { - self->mosi = mosi; - changed = true; - } - - if (miso != -2 && miso != self->miso) { - self->miso = miso; - changed = true; - } - - if (self->host != HSPI_HOST && self->host != VSPI_HOST) { - mp_raise_ValueError("SPI ID must be either HSPI(1) or VSPI(2)"); - } - - if (changed) { - if (self->state == MACHINE_HW_SPI_STATE_INIT) { - self->state = MACHINE_HW_SPI_STATE_DEINIT; - machine_hw_spi_deinit_internal(&old_self); - } - } else { - return; // no changes - } - - spi_bus_config_t buscfg = { - .miso_io_num = self->miso, - .mosi_io_num = self->mosi, - .sclk_io_num = self->sck, - .quadwp_io_num = -1, - .quadhd_io_num = -1 - }; - - spi_device_interface_config_t devcfg = { - .clock_speed_hz = self->baudrate, - .mode = self->phase | (self->polarity << 1), - .spics_io_num = -1, // No CS pin - .queue_size = 1, - .flags = self->firstbit == MICROPY_PY_MACHINE_SPI_LSB ? SPI_DEVICE_TXBIT_LSBFIRST | SPI_DEVICE_RXBIT_LSBFIRST : 0, - .pre_cb = NULL - }; - - //Initialize the SPI bus - // FIXME: Does the DMA matter? There are two - - ret = spi_bus_initialize(self->host, &buscfg, 1); - switch (ret) { - case ESP_ERR_INVALID_ARG: - mp_raise_msg(&mp_type_OSError, "invalid configuration"); - return; - - case ESP_ERR_INVALID_STATE: - mp_raise_msg(&mp_type_OSError, "SPI device already in use"); - return; - } - - ret = spi_bus_add_device(self->host, &devcfg, &self->spi); - switch (ret) { - case ESP_ERR_INVALID_ARG: - mp_raise_msg(&mp_type_OSError, "invalid configuration"); - spi_bus_free(self->host); - return; - - case ESP_ERR_NO_MEM: - mp_raise_msg(&mp_type_OSError, "out of memory"); - spi_bus_free(self->host); - return; - - case ESP_ERR_NOT_FOUND: - mp_raise_msg(&mp_type_OSError, "no free slots"); - spi_bus_free(self->host); - return; - } - self->state = MACHINE_HW_SPI_STATE_INIT; -} - -STATIC void machine_hw_spi_deinit(mp_obj_base_t *self_in) { - machine_hw_spi_obj_t *self = (machine_hw_spi_obj_t *) self_in; - if (self->state == MACHINE_HW_SPI_STATE_INIT) { - self->state = MACHINE_HW_SPI_STATE_DEINIT; - machine_hw_spi_deinit_internal(self); - } -} - -STATIC void machine_hw_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - machine_hw_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - - if (self->state == MACHINE_HW_SPI_STATE_DEINIT) { - mp_raise_msg(&mp_type_OSError, "transfer on deinitialized SPI"); - return; - } - - struct spi_transaction_t transaction = { 0 }; - - // Round to nearest whole set of bits - int bits_to_send = len * 8 / self->bits * self->bits; - - - if (len <= 4) { - if (src != NULL) { - memcpy(&transaction.tx_data, src, len); - } - - transaction.flags = SPI_TRANS_USE_TXDATA | SPI_TRANS_USE_RXDATA; - transaction.length = bits_to_send; - spi_device_transmit(self->spi, &transaction); - - if (dest != NULL) { - memcpy(dest, &transaction.rx_data, len); - } - } else { - int offset = 0; - int bits_remaining = bits_to_send; - - while (bits_remaining) { - memset(&transaction, 0, sizeof(transaction)); - - transaction.length = - bits_remaining > MP_HW_SPI_MAX_XFER_BITS ? MP_HW_SPI_MAX_XFER_BITS : bits_remaining; - - if (src != NULL) { - transaction.tx_buffer = src + offset; - } - if (dest != NULL) { - transaction.rx_buffer = dest + offset; - } - - spi_device_transmit(self->spi, &transaction); - bits_remaining -= transaction.length; - - // doesn't need ceil(); loop ends when bits_remaining is 0 - offset += transaction.length / 8; - } - } -} - -/******************************************************************************/ -// MicroPython bindings for hw_spi - -STATIC void machine_hw_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hw_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "SPI(id=%u, baudrate=%u, polarity=%u, phase=%u, bits=%u, firstbit=%u, sck=%d, mosi=%d, miso=%d)", - self->host, self->baudrate, self->polarity, - self->phase, self->bits, self->firstbit, - self->sck, self->mosi, self->miso); -} - -STATIC void machine_hw_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - machine_hw_spi_obj_t *self = (machine_hw_spi_obj_t *) self_in; - - enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), - allowed_args, args); - int8_t sck, mosi, miso; - - if (args[ARG_sck].u_obj == MP_OBJ_NULL) { - sck = -2; - } else if (args[ARG_sck].u_obj == mp_const_none) { - sck = -1; - } else { - sck = machine_pin_get_id(args[ARG_sck].u_obj); - } - - if (args[ARG_miso].u_obj == MP_OBJ_NULL) { - miso = -2; - } else if (args[ARG_miso].u_obj == mp_const_none) { - miso = -1; - } else { - miso = machine_pin_get_id(args[ARG_miso].u_obj); - } - - if (args[ARG_mosi].u_obj == MP_OBJ_NULL) { - mosi = -2; - } else if (args[ARG_mosi].u_obj == mp_const_none) { - mosi = -1; - } else { - mosi = machine_pin_get_id(args[ARG_mosi].u_obj); - } - - machine_hw_spi_init_internal(self, args[ARG_id].u_int, args[ARG_baudrate].u_int, - args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int, - args[ARG_firstbit].u_int, sck, mosi, miso); -} - -mp_obj_t machine_hw_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = MICROPY_PY_MACHINE_SPI_MSB} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - machine_hw_spi_obj_t *self = m_new_obj(machine_hw_spi_obj_t); - self->base.type = &machine_hw_spi_type; - - machine_hw_spi_init_internal( - self, - args[ARG_id].u_int, - args[ARG_baudrate].u_int, - args[ARG_polarity].u_int, - args[ARG_phase].u_int, - args[ARG_bits].u_int, - args[ARG_firstbit].u_int, - args[ARG_sck].u_obj == MP_OBJ_NULL ? -1 : machine_pin_get_id(args[ARG_sck].u_obj), - args[ARG_mosi].u_obj == MP_OBJ_NULL ? -1 : machine_pin_get_id(args[ARG_mosi].u_obj), - args[ARG_miso].u_obj == MP_OBJ_NULL ? -1 : machine_pin_get_id(args[ARG_miso].u_obj)); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC const mp_machine_spi_p_t machine_hw_spi_p = { - .init = machine_hw_spi_init, - .deinit = machine_hw_spi_deinit, - .transfer = machine_hw_spi_transfer, -}; - -const mp_obj_type_t machine_hw_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = machine_hw_spi_print, - .make_new = machine_hw_spi_make_new, - .protocol = &machine_hw_spi_p, - .locals_dict = (mp_obj_dict_t *) &mp_machine_spi_locals_dict, -}; diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c deleted file mode 100644 index 2a26d6bfb0..0000000000 --- a/ports/esp32/machine_pin.c +++ /dev/null @@ -1,414 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "driver/gpio.h" - -#include "py/runtime.h" -#include "py/mphal.h" -#include "modmachine.h" -#include "extmod/virtpin.h" -#include "machine_rtc.h" -#include "modesp32.h" - -typedef struct _machine_pin_obj_t { - mp_obj_base_t base; - gpio_num_t id; -} machine_pin_obj_t; - -typedef struct _machine_pin_irq_obj_t { - mp_obj_base_t base; - gpio_num_t id; -} machine_pin_irq_obj_t; - -STATIC const machine_pin_obj_t machine_pin_obj[] = { - {{&machine_pin_type}, GPIO_NUM_0}, - {{&machine_pin_type}, GPIO_NUM_1}, - {{&machine_pin_type}, GPIO_NUM_2}, - {{&machine_pin_type}, GPIO_NUM_3}, - {{&machine_pin_type}, GPIO_NUM_4}, - {{&machine_pin_type}, GPIO_NUM_5}, - {{&machine_pin_type}, GPIO_NUM_6}, - {{&machine_pin_type}, GPIO_NUM_7}, - {{&machine_pin_type}, GPIO_NUM_8}, - {{&machine_pin_type}, GPIO_NUM_9}, - {{&machine_pin_type}, GPIO_NUM_10}, - {{&machine_pin_type}, GPIO_NUM_11}, - {{&machine_pin_type}, GPIO_NUM_12}, - {{&machine_pin_type}, GPIO_NUM_13}, - {{&machine_pin_type}, GPIO_NUM_14}, - {{&machine_pin_type}, GPIO_NUM_15}, - {{&machine_pin_type}, GPIO_NUM_16}, - {{&machine_pin_type}, GPIO_NUM_17}, - {{&machine_pin_type}, GPIO_NUM_18}, - {{&machine_pin_type}, GPIO_NUM_19}, - {{NULL}, -1}, - {{&machine_pin_type}, GPIO_NUM_21}, - {{&machine_pin_type}, GPIO_NUM_22}, - {{&machine_pin_type}, GPIO_NUM_23}, - {{NULL}, -1}, - {{&machine_pin_type}, GPIO_NUM_25}, - {{&machine_pin_type}, GPIO_NUM_26}, - {{&machine_pin_type}, GPIO_NUM_27}, - {{NULL}, -1}, - {{NULL}, -1}, - {{NULL}, -1}, - {{NULL}, -1}, - {{&machine_pin_type}, GPIO_NUM_32}, - {{&machine_pin_type}, GPIO_NUM_33}, - {{&machine_pin_type}, GPIO_NUM_34}, - {{&machine_pin_type}, GPIO_NUM_35}, - {{&machine_pin_type}, GPIO_NUM_36}, - {{&machine_pin_type}, GPIO_NUM_37}, - {{&machine_pin_type}, GPIO_NUM_38}, - {{&machine_pin_type}, GPIO_NUM_39}, -}; - -// forward declaration -STATIC const machine_pin_irq_obj_t machine_pin_irq_object[]; - -void machine_pins_init(void) { - static bool did_install = false; - if (!did_install) { - gpio_install_isr_service(0); - did_install = true; - } - memset(&MP_STATE_PORT(machine_pin_irq_handler[0]), 0, sizeof(MP_STATE_PORT(machine_pin_irq_handler))); -} - -void machine_pins_deinit(void) { - for (int i = 0; i < MP_ARRAY_SIZE(machine_pin_obj); ++i) { - if (machine_pin_obj[i].id != (gpio_num_t)-1) { - gpio_isr_handler_remove(machine_pin_obj[i].id); - } - } -} - -STATIC void IRAM_ATTR machine_pin_isr_handler(void *arg) { - machine_pin_obj_t *self = arg; - mp_obj_t handler = MP_STATE_PORT(machine_pin_irq_handler)[self->id]; - mp_sched_schedule(handler, MP_OBJ_FROM_PTR(self)); -} - -gpio_num_t machine_pin_get_id(mp_obj_t pin_in) { - if (mp_obj_get_type(pin_in) != &machine_pin_type) { - mp_raise_ValueError("expecting a pin"); - } - machine_pin_obj_t *self = pin_in; - return self->id; -} - -STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_pin_obj_t *self = self_in; - mp_printf(print, "Pin(%u)", self->id); -} - -// pin.init(mode, pull=None, *, value) -STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_mode, ARG_pull, ARG_value }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // configure the pin for gpio - gpio_pad_select_gpio(self->id); - - // set initial value (do this before configuring mode/pull) - if (args[ARG_value].u_obj != MP_OBJ_NULL) { - gpio_set_level(self->id, mp_obj_is_true(args[ARG_value].u_obj)); - } - - // configure mode - if (args[ARG_mode].u_obj != mp_const_none) { - mp_int_t pin_io_mode = mp_obj_get_int(args[ARG_mode].u_obj); - if (self->id >= 34 && (pin_io_mode & GPIO_MODE_DEF_OUTPUT)) { - mp_raise_ValueError("pin can only be input"); - } else { - gpio_set_direction(self->id, pin_io_mode); - } - } - - // configure pull - if (args[ARG_pull].u_obj != mp_const_none) { - gpio_set_pull_mode(self->id, mp_obj_get_int(args[ARG_pull].u_obj)); - } - - return mp_const_none; -} - -// constructor(id, ...) -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the wanted pin object - int wanted_pin = mp_obj_get_int(args[0]); - const machine_pin_obj_t *self = NULL; - if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(machine_pin_obj)) { - self = (machine_pin_obj_t*)&machine_pin_obj[wanted_pin]; - } - if (self == NULL || self->base.type == NULL) { - mp_raise_ValueError("invalid pin"); - } - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_pin_obj_init_helper(self, n_args - 1, args + 1, &kw_args); - } - - return MP_OBJ_FROM_PTR(self); -} - -// fast method for getting/setting pin value -STATIC mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - machine_pin_obj_t *self = self_in; - if (n_args == 0) { - // get pin - return MP_OBJ_NEW_SMALL_INT(gpio_get_level(self->id)); - } else { - // set pin - gpio_set_level(self->id, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -// pin.init(mode, pull) -STATIC mp_obj_t machine_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return machine_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_init_obj, 1, machine_pin_obj_init); - -// pin.value([value]) -STATIC mp_obj_t machine_pin_value(size_t n_args, const mp_obj_t *args) { - return machine_pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_pin_value); - -// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING) -STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_handler, ARG_trigger, ARG_wake }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_PIN_INTR_POSEDGE | GPIO_PIN_INTR_NEGEDGE} }, - { MP_QSTR_wake, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - machine_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (n_args > 1 || kw_args->used != 0) { - // configure irq - mp_obj_t handler = args[ARG_handler].u_obj; - uint32_t trigger = args[ARG_trigger].u_int; - mp_obj_t wake_obj = args[ARG_wake].u_obj; - - if ((trigger == GPIO_PIN_INTR_LOLEVEL || trigger == GPIO_PIN_INTR_HILEVEL) && wake_obj != mp_const_none) { - mp_int_t wake; - if (mp_obj_get_int_maybe(wake_obj, &wake)) { - if (wake < 2 || wake > 7) { - mp_raise_ValueError("bad wake value"); - } - } else { - mp_raise_ValueError("bad wake value"); - } - - if (machine_rtc_config.wake_on_touch) { // not compatible - mp_raise_ValueError("no resources"); - } - - if (!RTC_IS_VALID_EXT_PIN(self->id)) { - mp_raise_ValueError("invalid pin for wake"); - } - - if (machine_rtc_config.ext0_pin == -1) { - machine_rtc_config.ext0_pin = self->id; - } else if (machine_rtc_config.ext0_pin != self->id) { - mp_raise_ValueError("no resources"); - } - - machine_rtc_config.ext0_level = trigger == GPIO_PIN_INTR_LOLEVEL ? 0 : 1; - machine_rtc_config.ext0_wake_types = wake; - } else { - if (machine_rtc_config.ext0_pin == self->id) { - machine_rtc_config.ext0_pin = -1; - } - - if (handler == mp_const_none) { - handler = MP_OBJ_NULL; - trigger = 0; - } - gpio_isr_handler_remove(self->id); - MP_STATE_PORT(machine_pin_irq_handler)[self->id] = handler; - gpio_set_intr_type(self->id, trigger); - gpio_isr_handler_add(self->id, machine_pin_isr_handler, (void*)self); - } - } - - // return the irq object - return MP_OBJ_FROM_PTR(&machine_pin_irq_object[self->id]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_irq_obj, 1, machine_pin_irq); - -STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_pin_irq_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_INPUT) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_INPUT_OUTPUT) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_INPUT_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULLUP_ONLY) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULLDOWN_ONLY) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_PIN_INTR_POSEDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_PIN_INTR_NEGEDGE) }, - { MP_ROM_QSTR(MP_QSTR_WAKE_LOW), MP_ROM_INT(GPIO_PIN_INTR_LOLEVEL) }, - { MP_ROM_QSTR(MP_QSTR_WAKE_HIGH), MP_ROM_INT(GPIO_PIN_INTR_HILEVEL) }, -}; - -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - machine_pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - return gpio_get_level(self->id); - } - case MP_PIN_WRITE: { - gpio_set_level(self->id, arg); - return 0; - } - } - return -1; -} - -STATIC MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table); - -STATIC const mp_pin_p_t pin_pin_p = { - .ioctl = pin_ioctl, -}; - -const mp_obj_type_t machine_pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = machine_pin_print, - .make_new = mp_pin_make_new, - .call = machine_pin_call, - .protocol = &pin_pin_p, - .locals_dict = (mp_obj_t)&machine_pin_locals_dict, -}; - -/******************************************************************************/ -// Pin IRQ object - -STATIC const mp_obj_type_t machine_pin_irq_type; - -STATIC const machine_pin_irq_obj_t machine_pin_irq_object[] = { - {{&machine_pin_irq_type}, GPIO_NUM_0}, - {{&machine_pin_irq_type}, GPIO_NUM_1}, - {{&machine_pin_irq_type}, GPIO_NUM_2}, - {{&machine_pin_irq_type}, GPIO_NUM_3}, - {{&machine_pin_irq_type}, GPIO_NUM_4}, - {{&machine_pin_irq_type}, GPIO_NUM_5}, - {{&machine_pin_irq_type}, GPIO_NUM_6}, - {{&machine_pin_irq_type}, GPIO_NUM_7}, - {{&machine_pin_irq_type}, GPIO_NUM_8}, - {{&machine_pin_irq_type}, GPIO_NUM_9}, - {{&machine_pin_irq_type}, GPIO_NUM_10}, - {{&machine_pin_irq_type}, GPIO_NUM_11}, - {{&machine_pin_irq_type}, GPIO_NUM_12}, - {{&machine_pin_irq_type}, GPIO_NUM_13}, - {{&machine_pin_irq_type}, GPIO_NUM_14}, - {{&machine_pin_irq_type}, GPIO_NUM_15}, - {{&machine_pin_irq_type}, GPIO_NUM_16}, - {{&machine_pin_irq_type}, GPIO_NUM_17}, - {{&machine_pin_irq_type}, GPIO_NUM_18}, - {{&machine_pin_irq_type}, GPIO_NUM_19}, - {{NULL}, -1}, - {{&machine_pin_irq_type}, GPIO_NUM_21}, - {{&machine_pin_irq_type}, GPIO_NUM_22}, - {{&machine_pin_irq_type}, GPIO_NUM_23}, - {{NULL}, -1}, - {{&machine_pin_irq_type}, GPIO_NUM_25}, - {{&machine_pin_irq_type}, GPIO_NUM_26}, - {{&machine_pin_irq_type}, GPIO_NUM_27}, - {{NULL}, -1}, - {{NULL}, -1}, - {{NULL}, -1}, - {{NULL}, -1}, - {{&machine_pin_irq_type}, GPIO_NUM_32}, - {{&machine_pin_irq_type}, GPIO_NUM_33}, - {{&machine_pin_irq_type}, GPIO_NUM_34}, - {{&machine_pin_irq_type}, GPIO_NUM_35}, - {{&machine_pin_irq_type}, GPIO_NUM_36}, - {{&machine_pin_irq_type}, GPIO_NUM_37}, - {{&machine_pin_irq_type}, GPIO_NUM_38}, - {{&machine_pin_irq_type}, GPIO_NUM_39}, -}; - -STATIC mp_obj_t machine_pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - machine_pin_irq_obj_t *self = self_in; - mp_arg_check_num(n_args, n_kw, 0, 0, false); - machine_pin_isr_handler((void*)&machine_pin_obj[self->id]); - return mp_const_none; -} - -STATIC mp_obj_t machine_pin_irq_trigger(size_t n_args, const mp_obj_t *args) { - machine_pin_irq_obj_t *self = args[0]; - uint32_t orig_trig = GPIO.pin[self->id].int_type; - if (n_args == 2) { - // set trigger - gpio_set_intr_type(self->id, mp_obj_get_int(args[1])); - } - // return original trigger value - return MP_OBJ_NEW_SMALL_INT(orig_trig); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_irq_trigger_obj, 1, 2, machine_pin_irq_trigger); - -STATIC const mp_rom_map_elem_t machine_pin_irq_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_trigger), MP_ROM_PTR(&machine_pin_irq_trigger_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_pin_irq_locals_dict, machine_pin_irq_locals_dict_table); - -STATIC const mp_obj_type_t machine_pin_irq_type = { - { &mp_type_type }, - .name = MP_QSTR_IRQ, - .call = machine_pin_irq_call, - .locals_dict = (mp_obj_dict_t*)&machine_pin_irq_locals_dict, -}; diff --git a/ports/esp32/machine_pwm.c b/ports/esp32/machine_pwm.c deleted file mode 100644 index 4d6c59f0fa..0000000000 --- a/ports/esp32/machine_pwm.c +++ /dev/null @@ -1,277 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include -#include "driver/ledc.h" -#include "esp_err.h" - -#include "py/nlr.h" -#include "py/runtime.h" -#include "modmachine.h" -#include "mphalport.h" - -// Forward dec'l -extern const mp_obj_type_t machine_pwm_type; - -typedef struct _esp32_pwm_obj_t { - mp_obj_base_t base; - gpio_num_t pin; - uint8_t active; - uint8_t channel; -} esp32_pwm_obj_t; - -// Which channel has which GPIO pin assigned? -// (-1 if not assigned) -STATIC int chan_gpio[LEDC_CHANNEL_MAX]; - -// Params for PW operation -// 5khz -#define PWFREQ (5000) -// High speed mode -#define PWMODE (LEDC_HIGH_SPEED_MODE) -// 10-bit resolution (compatible with esp8266 PWM) -#define PWRES (LEDC_TIMER_10_BIT) -// Timer 1 -#define PWTIMER (LEDC_TIMER_1) - -// Config of timer upon which we run all PWM'ed GPIO pins -STATIC bool pwm_inited = false; -STATIC ledc_timer_config_t timer_cfg = { - .bit_num = PWRES, - .freq_hz = PWFREQ, - .speed_mode = PWMODE, - .timer_num = PWTIMER -}; - -STATIC void pwm_init(void) { - - // Initial condition: no channels assigned - for (int x = 0; x < LEDC_CHANNEL_MAX; ++x) { - chan_gpio[x] = -1; - } - - // Init with default timer params - ledc_timer_config(&timer_cfg); -} - -STATIC int set_freq(int newval) { - int oval = timer_cfg.freq_hz; - - timer_cfg.freq_hz = newval; - if (ledc_timer_config(&timer_cfg) != ESP_OK) { - timer_cfg.freq_hz = oval; - return 0; - } - return 1; -} - -/******************************************************************************/ - -// MicroPython bindings for PWM - -STATIC void esp32_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - esp32_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "PWM(%u", self->pin); - if (self->active) { - mp_printf(print, ", freq=%u, duty=%u", timer_cfg.freq_hz, - ledc_get_duty(PWMODE, self->channel)); - } - mp_printf(print, ")"); -} - -STATIC void esp32_pwm_init_helper(esp32_pwm_obj_t *self, - size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_freq, ARG_duty }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_duty, MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, - MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - int channel; - int avail = -1; - - // Find a free PWM channel, also spot if our pin is - // already mentioned. - for (channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) { - if (chan_gpio[channel] == self->pin) { - break; - } - if ((avail == -1) && (chan_gpio[channel] == -1)) { - avail = channel; - } - } - if (channel >= LEDC_CHANNEL_MAX) { - if (avail == -1) { - mp_raise_ValueError("out of PWM channels"); - } - channel = avail; - } - self->channel = channel; - - // New PWM assignment - self->active = 1; - if (chan_gpio[channel] == -1) { - ledc_channel_config_t cfg = { - .channel = channel, - .duty = (1 << PWRES) / 2, - .gpio_num = self->pin, - .intr_type = LEDC_INTR_DISABLE, - .speed_mode = PWMODE, - .timer_sel = PWTIMER, - }; - if (ledc_channel_config(&cfg) != ESP_OK) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "PWM not supported on pin %d", self->pin)); - } - chan_gpio[channel] = self->pin; - } - - // Maybe change PWM timer - int tval = args[ARG_freq].u_int; - if (tval != -1) { - if (tval != timer_cfg.freq_hz) { - if (!set_freq(tval)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Bad frequency %d", tval)); - } - } - } - - // Set duty cycle? - int dval = args[ARG_duty].u_int; - if (dval != -1) { - dval &= ((1 << PWRES)-1); - ledc_set_duty(PWMODE, channel, dval); - ledc_update_duty(PWMODE, channel); - } -} - -STATIC mp_obj_t esp32_pwm_make_new(const mp_obj_type_t *type, - size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - gpio_num_t pin_id = machine_pin_get_id(args[0]); - - // create PWM object from the given pin - esp32_pwm_obj_t *self = m_new_obj(esp32_pwm_obj_t); - self->base.type = &machine_pwm_type; - self->pin = pin_id; - self->active = 0; - self->channel = -1; - - // start the PWM subsystem if it's not already running - if (!pwm_inited) { - pwm_init(); - pwm_inited = true; - } - - // start the PWM running for this channel - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - esp32_pwm_init_helper(self, n_args - 1, args + 1, &kw_args); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC mp_obj_t esp32_pwm_init(size_t n_args, - const mp_obj_t *args, mp_map_t *kw_args) { - esp32_pwm_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(esp32_pwm_init_obj, 1, esp32_pwm_init); - -STATIC mp_obj_t esp32_pwm_deinit(mp_obj_t self_in) { - esp32_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - int chan = self->channel; - - // Valid channel? - if ((chan >= 0) && (chan < LEDC_CHANNEL_MAX)) { - // Mark it unused, and tell the hardware to stop routing - chan_gpio[chan] = -1; - ledc_stop(PWMODE, chan, 0); - self->active = 0; - self->channel = -1; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp32_pwm_deinit_obj, esp32_pwm_deinit); - -STATIC mp_obj_t esp32_pwm_freq(size_t n_args, const mp_obj_t *args) { - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(timer_cfg.freq_hz); - } - - // set - int tval = mp_obj_get_int(args[1]); - if (!set_freq(tval)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Bad frequency %d", tval)); - } - return mp_const_none; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp32_pwm_freq_obj, 1, 2, esp32_pwm_freq); - -STATIC mp_obj_t esp32_pwm_duty(size_t n_args, const mp_obj_t *args) { - esp32_pwm_obj_t *self = MP_OBJ_TO_PTR(args[0]); - int duty; - - if (n_args == 1) { - // get - duty = ledc_get_duty(PWMODE, self->channel); - return MP_OBJ_NEW_SMALL_INT(duty); - } - - // set - duty = mp_obj_get_int(args[1]); - duty &= ((1 << PWRES)-1); - ledc_set_duty(PWMODE, self->channel, duty); - ledc_update_duty(PWMODE, self->channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp32_pwm_duty_obj, - 1, 2, esp32_pwm_duty); - -STATIC const mp_rom_map_elem_t esp32_pwm_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&esp32_pwm_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&esp32_pwm_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&esp32_pwm_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_duty), MP_ROM_PTR(&esp32_pwm_duty_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(esp32_pwm_locals_dict, - esp32_pwm_locals_dict_table); - -const mp_obj_type_t machine_pwm_type = { - { &mp_type_type }, - .name = MP_QSTR_PWM, - .print = esp32_pwm_print, - .make_new = esp32_pwm_make_new, - .locals_dict = (mp_obj_dict_t*)&esp32_pwm_locals_dict, -}; diff --git a/ports/esp32/machine_rtc.c b/ports/esp32/machine_rtc.c deleted file mode 100644 index b17932da5c..0000000000 --- a/ports/esp32/machine_rtc.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 "Eric Poulsen" - * Copyright (c) 2017 "Tom Manning" - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include -#include -#include "driver/gpio.h" - -#include "py/nlr.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "timeutils.h" -#include "modmachine.h" -#include "machine_rtc.h" - -typedef struct _machine_rtc_obj_t { - mp_obj_base_t base; -} machine_rtc_obj_t; - -#define MEM_MAGIC 0x75507921 -/* There is 8K of rtc_slow_memory, but some is used by the system software - If the USER_MAXLEN is set to high, the following compile error will happen: - region `rtc_slow_seg' overflowed by N bytes - The current system software allows almost 4096 to be used. - To avoid running into issues if the system software uses more, 2048 was picked as a max length -*/ -#define MEM_USER_MAXLEN 2048 -RTC_DATA_ATTR uint32_t rtc_user_mem_magic; -RTC_DATA_ATTR uint32_t rtc_user_mem_len; -RTC_DATA_ATTR uint8_t rtc_user_mem_data[MEM_USER_MAXLEN]; - -// singleton RTC object -STATIC const machine_rtc_obj_t machine_rtc_obj = {{&machine_rtc_type}}; - -machine_rtc_config_t machine_rtc_config = { - .ext1_pins = 0, - .ext0_pin = -1 - }; - -STATIC mp_obj_t machine_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return constant object - return (mp_obj_t)&machine_rtc_obj; -} - -STATIC mp_obj_t machine_rtc_datetime_helper(mp_uint_t n_args, const mp_obj_t *args) { - if (n_args == 1) { - // Get time - - struct timeval tv; - - gettimeofday(&tv, NULL); - timeutils_struct_time_t tm; - - timeutils_seconds_since_2000_to_struct_time(tv.tv_sec, &tm); - - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_wday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(tv.tv_usec) - }; - - return mp_obj_new_tuple(8, tuple); - } else { - // Set time - - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 8, &items); - - struct timeval tv = {0}; - tv.tv_sec = timeutils_seconds_since_2000(mp_obj_get_int(items[0]), mp_obj_get_int(items[1]), mp_obj_get_int(items[2]), mp_obj_get_int(items[4]), mp_obj_get_int(items[5]), mp_obj_get_int(items[6])); - settimeofday(&tv, NULL); - - return mp_const_none; - } -} -STATIC mp_obj_t machine_rtc_datetime(mp_uint_t n_args, const mp_obj_t *args) { - return machine_rtc_datetime_helper(n_args, args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_datetime_obj, 1, 2, machine_rtc_datetime); - -STATIC mp_obj_t machine_rtc_init(mp_obj_t self_in, mp_obj_t date) { - mp_obj_t args[2] = {self_in, date}; - machine_rtc_datetime_helper(2, args); - - if (rtc_user_mem_magic != MEM_MAGIC) { - rtc_user_mem_magic = MEM_MAGIC; - rtc_user_mem_len = 0; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_rtc_init_obj, machine_rtc_init); - -STATIC mp_obj_t machine_rtc_memory(mp_uint_t n_args, const mp_obj_t *args) { - if (n_args == 1) { - // read RTC memory - uint32_t len = rtc_user_mem_len; - uint8_t rtcram[MEM_USER_MAXLEN]; - memcpy( (char *) rtcram, (char *) rtc_user_mem_data, len); - return mp_obj_new_bytes(rtcram, len); - } else { - // write RTC memory - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); - - if (bufinfo.len > MEM_USER_MAXLEN) { - mp_raise_ValueError("buffer too long"); - } - memcpy( (char *) rtc_user_mem_data, (char *) bufinfo.buf, bufinfo.len); - rtc_user_mem_len = bufinfo.len; - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_memory_obj, 1, 2, machine_rtc_memory); - -STATIC const mp_rom_map_elem_t machine_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_rtc_datetime_obj) }, - { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&machine_rtc_datetime_obj) }, - { MP_ROM_QSTR(MP_QSTR_memory), MP_ROM_PTR(&machine_rtc_memory_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_rtc_locals_dict, machine_rtc_locals_dict_table); - -const mp_obj_type_t machine_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = machine_rtc_make_new, - .locals_dict = (mp_obj_t)&machine_rtc_locals_dict, -}; diff --git a/ports/esp32/machine_rtc.h b/ports/esp32/machine_rtc.h deleted file mode 100644 index e34deb9be6..0000000000 --- a/ports/esp32/machine_rtc.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 "Eric Poulsen" - * Copyright (c) 2017 "Tom Manning" - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP32_MACHINE_RTC_H -#define MICROPY_INCLUDED_ESP32_MACHINE_RTC_H - -#include "modmachine.h" - -typedef struct { - uint64_t ext1_pins; // set bit == pin# - int8_t ext0_pin; // just the pin#, -1 == None - bool wake_on_touch : 1; - bool ext0_level : 1; - wake_type_t ext0_wake_types; - bool ext1_level : 1; -} machine_rtc_config_t; - -extern machine_rtc_config_t machine_rtc_config; - -#endif diff --git a/ports/esp32/machine_timer.c b/ports/esp32/machine_timer.c deleted file mode 100644 index 235a502bd3..0000000000 --- a/ports/esp32/machine_timer.c +++ /dev/null @@ -1,192 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "driver/timer.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "modmachine.h" - -#define TIMER_INTR_SEL TIMER_INTR_LEVEL -#define TIMER_DIVIDER 40000 -#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) - -#define TIMER_FLAGS 0 - -typedef struct _machine_timer_obj_t { - mp_obj_base_t base; - mp_uint_t group; - mp_uint_t index; - - mp_uint_t repeat; - mp_uint_t period; - - mp_obj_t callback; - - intr_handle_t handle; -} machine_timer_obj_t; - -const mp_obj_type_t machine_timer_type; - -STATIC esp_err_t check_esp_err(esp_err_t code) { - if (code) { - mp_raise_OSError(code); - } - - return code; -} - -STATIC void machine_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_timer_obj_t *self = self_in; - - timer_config_t config; - mp_printf(print, "Timer(%p; ", self); - - timer_get_config(self->group, self->index, &config); - - mp_printf(print, "alarm_en=%d, ", config.alarm_en); - mp_printf(print, "auto_reload=%d, ", config.auto_reload); - mp_printf(print, "counter_en=%d)", config.counter_en); -} - -STATIC mp_obj_t machine_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - machine_timer_obj_t *self = m_new_obj(machine_timer_obj_t); - self->base.type = &machine_timer_type; - - self->group = (mp_obj_get_int(args[0]) >> 1) & 1; - self->index = mp_obj_get_int(args[0]) & 1; - - return self; -} - -STATIC void machine_timer_disable(machine_timer_obj_t *self) { - if (self->handle) { - timer_pause(self->group, self->index); - esp_intr_free(self->handle); - self->handle = NULL; - } -} - -STATIC void machine_timer_isr(void *self_in) { - machine_timer_obj_t *self = self_in; - timg_dev_t *device = self->group ? &(TIMERG1) : &(TIMERG0); - - device->hw_timer[self->index].update = 1; - if (self->index) { - device->int_clr_timers.t1 = 1; - } else { - device->int_clr_timers.t0 = 1; - } - device->hw_timer[self->index].config.alarm_en = self->repeat; - - mp_sched_schedule(self->callback, self); -} - -STATIC void machine_timer_enable(machine_timer_obj_t *self) { - timer_config_t config; - config.alarm_en = TIMER_ALARM_EN; - config.auto_reload = self->repeat; - config.counter_dir = TIMER_COUNT_UP; - config.divider = TIMER_DIVIDER; - config.intr_type = TIMER_INTR_LEVEL; - config.counter_en = TIMER_PAUSE; - - check_esp_err(timer_init(self->group, self->index, &config)); - check_esp_err(timer_set_counter_value(self->group, self->index, 0x00000000)); - check_esp_err(timer_set_alarm_value(self->group, self->index, self->period)); - check_esp_err(timer_enable_intr(self->group, self->index)); - check_esp_err(timer_isr_register(self->group, self->index, machine_timer_isr, (void*)self, TIMER_FLAGS, &self->handle)); - check_esp_err(timer_start(self->group, self->index)); -} - -STATIC mp_obj_t machine_timer_init_helper(machine_timer_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - machine_timer_disable(self); - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // Timer uses an 80MHz base clock, which is divided by the divider/scalar, we then convert to ms. - self->period = (args[0].u_int * TIMER_BASE_CLK) / (1000 * TIMER_DIVIDER); - self->repeat = args[1].u_int; - self->callback = args[2].u_obj; - self->handle = NULL; - - machine_timer_enable(self); - - return mp_const_none; -} - -STATIC mp_obj_t machine_timer_deinit(mp_obj_t self_in) { - machine_timer_disable(self_in); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_timer_deinit_obj, machine_timer_deinit); - -STATIC mp_obj_t machine_timer_init(mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return machine_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_timer_init_obj, 1, machine_timer_init); - -STATIC mp_obj_t machine_timer_value(mp_obj_t self_in) { - machine_timer_obj_t *self = self_in; - double result; - - timer_get_counter_time_sec(self->group, self->index, &result); - - return MP_OBJ_NEW_SMALL_INT((mp_uint_t)(result * 1000)); // value in ms -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_timer_value_obj, machine_timer_value); - -STATIC const mp_rom_map_elem_t machine_timer_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&machine_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_timer_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_ONE_SHOT), MP_ROM_INT(false) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(true) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_timer_locals_dict, machine_timer_locals_dict_table); - -const mp_obj_type_t machine_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = machine_timer_print, - .make_new = machine_timer_make_new, - .locals_dict = (mp_obj_t)&machine_timer_locals_dict, -}; diff --git a/ports/esp32/machine_touchpad.c b/ports/esp32/machine_touchpad.c deleted file mode 100644 index 96de1a2a1d..0000000000 --- a/ports/esp32/machine_touchpad.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Nick Moore - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include - -#include "esp_log.h" - -#include "driver/gpio.h" -#include "driver/touch_pad.h" - -#include "py/runtime.h" -#include "py/mphal.h" -#include "modmachine.h" - -typedef struct _mtp_obj_t { - mp_obj_base_t base; - gpio_num_t gpio_id; - touch_pad_t touchpad_id; -} mtp_obj_t; - -STATIC const mtp_obj_t touchpad_obj[] = { - {{&machine_touchpad_type}, GPIO_NUM_4, TOUCH_PAD_NUM0}, - {{&machine_touchpad_type}, GPIO_NUM_0, TOUCH_PAD_NUM1}, - {{&machine_touchpad_type}, GPIO_NUM_2, TOUCH_PAD_NUM2}, - {{&machine_touchpad_type}, GPIO_NUM_15, TOUCH_PAD_NUM3}, - {{&machine_touchpad_type}, GPIO_NUM_13, TOUCH_PAD_NUM4}, - {{&machine_touchpad_type}, GPIO_NUM_12, TOUCH_PAD_NUM5}, - {{&machine_touchpad_type}, GPIO_NUM_14, TOUCH_PAD_NUM6}, - {{&machine_touchpad_type}, GPIO_NUM_27, TOUCH_PAD_NUM7}, - {{&machine_touchpad_type}, GPIO_NUM_33, TOUCH_PAD_NUM8}, - {{&machine_touchpad_type}, GPIO_NUM_32, TOUCH_PAD_NUM9}, -}; - -STATIC mp_obj_t mtp_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, - const mp_obj_t *args) { - - mp_arg_check_num(n_args, n_kw, 1, 1, true); - gpio_num_t pin_id = machine_pin_get_id(args[0]); - const mtp_obj_t *self = NULL; - for (int i = 0; i < MP_ARRAY_SIZE(touchpad_obj); i++) { - if (pin_id == touchpad_obj[i].gpio_id) { self = &touchpad_obj[i]; break; } - } - if (!self) mp_raise_ValueError("invalid pin for touchpad"); - - static int initialized = 0; - if (!initialized) { - touch_pad_init(); - initialized = 1; - } - esp_err_t err = touch_pad_config(self->touchpad_id, 0); - if (err == ESP_OK) return MP_OBJ_FROM_PTR(self); - mp_raise_ValueError("Touch pad error"); -} - -STATIC mp_obj_t mtp_config(mp_obj_t self_in, mp_obj_t value_in) { - mtp_obj_t *self = self_in; - uint16_t value = mp_obj_get_int(value_in); - esp_err_t err = touch_pad_config(self->touchpad_id, value); - if (err == ESP_OK) return mp_const_none; - mp_raise_ValueError("Touch pad error"); -} -MP_DEFINE_CONST_FUN_OBJ_2(mtp_config_obj, mtp_config); - -STATIC mp_obj_t mtp_read(mp_obj_t self_in) { - mtp_obj_t *self = self_in; - uint16_t value; - esp_err_t err = touch_pad_read(self->touchpad_id, &value); - if (err == ESP_OK) return MP_OBJ_NEW_SMALL_INT(value); - mp_raise_ValueError("Touch pad error"); -} -MP_DEFINE_CONST_FUN_OBJ_1(mtp_read_obj, mtp_read); - -STATIC const mp_rom_map_elem_t mtp_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&mtp_config_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mtp_read_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mtp_locals_dict, mtp_locals_dict_table); - -const mp_obj_type_t machine_touchpad_type = { - { &mp_type_type }, - .name = MP_QSTR_TouchPad, - .make_new = mtp_make_new, - .locals_dict = (mp_obj_t)&mtp_locals_dict, -}; diff --git a/ports/esp32/machine_uart.c b/ports/esp32/machine_uart.c deleted file mode 100644 index 474764b1b6..0000000000 --- a/ports/esp32/machine_uart.c +++ /dev/null @@ -1,357 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "driver/uart.h" -#include "freertos/FreeRTOS.h" - -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "modmachine.h" - -typedef struct _machine_uart_obj_t { - mp_obj_base_t base; - uart_port_t uart_num; - uint8_t bits; - uint8_t parity; - uint8_t stop; - int8_t tx; - int8_t rx; - int8_t rts; - int8_t cts; - uint16_t timeout; // timeout waiting for first char (in ms) - uint16_t timeout_char; // timeout waiting between chars (in ms) -} machine_uart_obj_t; - -STATIC const char *_parity_name[] = {"None", "1", "0"}; - -/******************************************************************************/ -// MicroPython bindings for UART - -STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - uint32_t baudrate; - uart_get_baudrate(self->uart_num, &baudrate); - mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, tx=%d, rx=%d, rts=%d, cts=%d, timeout=%u, timeout_char=%u)", - self->uart_num, baudrate, self->bits, _parity_name[self->parity], - self->stop, self->tx, self->rx, self->rts, self->cts, self->timeout, self->timeout_char); -} - -STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_tx, ARG_rx, ARG_rts, ARG_cts, ARG_timeout, ARG_timeout_char }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_tx, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_PIN_NO_CHANGE} }, - { MP_QSTR_rx, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_PIN_NO_CHANGE} }, - { MP_QSTR_rts, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_PIN_NO_CHANGE} }, - { MP_QSTR_cts, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_PIN_NO_CHANGE} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // wait for all data to be transmitted before changing settings - uart_wait_tx_done(self->uart_num, pdMS_TO_TICKS(1000)); - - // set baudrate - uint32_t baudrate = 115200; - if (args[ARG_baudrate].u_int > 0) { - uart_set_baudrate(self->uart_num, args[ARG_baudrate].u_int); - uart_get_baudrate(self->uart_num, &baudrate); - } - - uart_set_pin(self->uart_num, args[ARG_tx].u_int, args[ARG_rx].u_int, args[ARG_rts].u_int, args[ARG_cts].u_int); - if (args[ARG_tx].u_int != UART_PIN_NO_CHANGE) { - self->tx = args[ARG_tx].u_int; - } - - if (args[ARG_rx].u_int != UART_PIN_NO_CHANGE) { - self->rx = args[ARG_rx].u_int; - } - - if (args[ARG_rts].u_int != UART_PIN_NO_CHANGE) { - self->rts = args[ARG_rts].u_int; - } - - if (args[ARG_cts].u_int != UART_PIN_NO_CHANGE) { - self->cts = args[ARG_cts].u_int; - } - - // set data bits - switch (args[ARG_bits].u_int) { - case 0: - break; - case 5: - uart_set_word_length(self->uart_num, UART_DATA_5_BITS); - self->bits = 5; - break; - case 6: - uart_set_word_length(self->uart_num, UART_DATA_6_BITS); - self->bits = 6; - break; - case 7: - uart_set_word_length(self->uart_num, UART_DATA_7_BITS); - self->bits = 7; - break; - case 8: - uart_set_word_length(self->uart_num, UART_DATA_8_BITS); - self->bits = 8; - break; - default: - mp_raise_ValueError("invalid data bits"); - break; - } - - // set parity - if (args[ARG_parity].u_obj != MP_OBJ_NULL) { - if (args[ARG_parity].u_obj == mp_const_none) { - uart_set_parity(self->uart_num, UART_PARITY_DISABLE); - self->parity = 0; - } else { - mp_int_t parity = mp_obj_get_int(args[ARG_parity].u_obj); - if (parity & 1) { - uart_set_parity(self->uart_num, UART_PARITY_ODD); - self->parity = 1; - } else { - uart_set_parity(self->uart_num, UART_PARITY_EVEN); - self->parity = 2; - } - } - } - - // set stop bits - switch (args[ARG_stop].u_int) { - // FIXME: ESP32 also supports 1.5 stop bits - case 0: - break; - case 1: - uart_set_stop_bits(self->uart_num, UART_STOP_BITS_1); - self->stop = 1; - break; - case 2: - uart_set_stop_bits(self->uart_num, UART_STOP_BITS_2); - self->stop = 2; - break; - default: - mp_raise_ValueError("invalid stop bits"); - break; - } - - // set timeout - self->timeout = args[ARG_timeout].u_int; - - // set timeout_char - // make sure it is at least as long as a whole character (13 bits to be safe) - self->timeout_char = args[ARG_timeout_char].u_int; - uint32_t min_timeout_char = 13000 / baudrate + 1; - if (self->timeout_char < min_timeout_char) { - self->timeout_char = min_timeout_char; - } -} - -STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get uart id - mp_int_t uart_num = mp_obj_get_int(args[0]); - if (uart_num < 0 || uart_num >= UART_NUM_MAX) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) does not exist", uart_num)); - } - - // Attempts to use UART0 from Python has resulted in all sorts of fun errors. - // FIXME: UART0 is disabled for now. - if (uart_num == UART_NUM_0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) is disabled (dedicated to REPL)", uart_num)); - } - - // Defaults - uart_config_t uartcfg = { - .baud_rate = 115200, - .data_bits = UART_DATA_8_BITS, - .parity = UART_PARITY_DISABLE, - .stop_bits = UART_STOP_BITS_1, - .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .rx_flow_ctrl_thresh = 0 - }; - - // create instance - machine_uart_obj_t *self = m_new_obj(machine_uart_obj_t); - self->base.type = &machine_uart_type; - self->uart_num = uart_num; - self->bits = 8; - self->parity = 0; - self->stop = 1; - self->rts = UART_PIN_NO_CHANGE; - self->cts = UART_PIN_NO_CHANGE; - self->timeout = 0; - self->timeout_char = 0; - - switch (uart_num) { - case UART_NUM_0: - self->rx = UART_PIN_NO_CHANGE; // GPIO 3 - self->tx = UART_PIN_NO_CHANGE; // GPIO 1 - break; - case UART_NUM_1: - self->rx = 9; - self->tx = 10; - break; - case UART_NUM_2: - self->rx = 16; - self->tx = 17; - break; - } - - // Remove any existing configuration - uart_driver_delete(self->uart_num); - - // init the peripheral - // Setup - uart_param_config(self->uart_num, &uartcfg); - - // RX and TX buffers are currently hardcoded at 256 bytes each (IDF minimum). - uart_driver_install(uart_num, 256, 256, 0, NULL, 0); - - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args); - - // Make sure pins are connected. - uart_set_pin(self->uart_num, self->tx, self->rx, self->rts, self->cts); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - machine_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init); - -STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) { - machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - size_t rxbufsize; - uart_get_buffered_data_len(self->uart_num, &rxbufsize); - return MP_OBJ_NEW_SMALL_INT(rxbufsize); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any); - -STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) }, - - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table); - -STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - TickType_t time_to_wait; - if (self->timeout == 0) { - time_to_wait = 0; - } else { - time_to_wait = pdMS_TO_TICKS(self->timeout); - } - - int bytes_read = uart_read_bytes(self->uart_num, buf_in, size, time_to_wait); - - if (bytes_read <= 0) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - return bytes_read; -} - -STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - - int bytes_written = uart_write_bytes(self->uart_num, buf_in, size); - - if (bytes_written < 0) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // return number of bytes written - return bytes_written; -} - -STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - machine_uart_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - size_t rxbufsize; - uart_get_buffered_data_len(self->uart_num, &rxbufsize); - if ((flags & MP_STREAM_POLL_RD) && rxbufsize > 0) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && 1) { // FIXME: uart_tx_any_room(self->uart_num) - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = machine_uart_read, - .write = machine_uart_write, - .ioctl = machine_uart_ioctl, - .is_text = false, -}; - -const mp_obj_type_t machine_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = machine_uart_print, - .make_new = machine_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_dict_t*)&machine_uart_locals_dict, -}; diff --git a/ports/esp32/machine_wdt.c b/ports/esp32/machine_wdt.c deleted file mode 100644 index 88a58f056a..0000000000 --- a/ports/esp32/machine_wdt.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * Copyright (c) 2017 Eric Poulsen - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/nlr.h" -#include "py/obj.h" -#include "py/runtime.h" - -#include "esp_task_wdt.h" - -const mp_obj_type_t machine_wdt_type; - -typedef struct _machine_wdt_obj_t { - mp_obj_base_t base; -} machine_wdt_obj_t; - -STATIC machine_wdt_obj_t wdt_default = {{&machine_wdt_type}}; - -STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - - mp_int_t id = 0; - if (n_args > 0) { - id = mp_obj_get_int(args[0]); - } - - switch (id) { - case 0: - esp_task_wdt_add(NULL); - return &wdt_default; - default: - mp_raise_ValueError(NULL); - } -} - -STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) { - (void)self_in; - esp_task_wdt_reset(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed); - -STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table); - -const mp_obj_type_t machine_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = machine_wdt_make_new, - .locals_dict = (mp_obj_t)&machine_wdt_locals_dict, -}; diff --git a/ports/esp32/main.c b/ports/esp32/main.c deleted file mode 100644 index acbbfdccce..0000000000 --- a/ports/esp32/main.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "esp_system.h" -#include "nvs_flash.h" -#include "esp_task.h" -#include "soc/cpu.h" -#include "esp_log.h" - -#include "py/stackctrl.h" -#include "py/nlr.h" -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "lib/mp-readline/readline.h" -#include "lib/utils/pyexec.h" -#include "uart.h" -#include "modmachine.h" -#include "modnetwork.h" -#include "mpthreadport.h" - -// MicroPython runs as a task under FreeRTOS -#define MP_TASK_PRIORITY (ESP_TASK_PRIO_MIN + 1) -#define MP_TASK_STACK_SIZE (16 * 1024) -#define MP_TASK_STACK_LEN (MP_TASK_STACK_SIZE / sizeof(StackType_t)) - -STATIC StaticTask_t mp_task_tcb; -STATIC StackType_t mp_task_stack[MP_TASK_STACK_LEN] __attribute__((aligned (8))); - -int vprintf_null(const char *format, va_list ap) { - // do nothing: this is used as a log target during raw repl mode - return 0; -} - -void mp_task(void *pvParameter) { - volatile uint32_t sp = (uint32_t)get_sp(); - #if MICROPY_PY_THREAD - mp_thread_init(&mp_task_stack[0], MP_TASK_STACK_LEN); - #endif - uart_init(); - - // Allocate the uPy heap using malloc and get the largest available region - size_t mp_task_heap_size = heap_caps_get_largest_free_block(MALLOC_CAP_8BIT); - void *mp_task_heap = malloc(mp_task_heap_size); - -soft_reset: - // initialise the stack pointer for the main thread - mp_stack_set_top((void *)sp); - mp_stack_set_limit(MP_TASK_STACK_SIZE - 1024); - gc_init(mp_task_heap, mp_task_heap + mp_task_heap_size); - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_lib)); - mp_obj_list_init(mp_sys_argv, 0); - readline_init0(); - - // initialise peripherals - machine_pins_init(); - - // run boot-up scripts - pyexec_frozen_module("_boot.py"); - pyexec_file("boot.py"); - if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) { - pyexec_file("main.py"); - } - - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - vprintf_like_t vprintf_log = esp_log_set_vprintf(vprintf_null); - if (pyexec_raw_repl() != 0) { - break; - } - esp_log_set_vprintf(vprintf_log); - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - #if MICROPY_PY_THREAD - mp_thread_deinit(); - #endif - - gc_sweep_all(); - - mp_hal_stdout_tx_str("PYB: soft reboot\r\n"); - - // deinitialise peripherals - machine_pins_deinit(); - usocket_events_deinit(); - - mp_deinit(); - fflush(stdout); - goto soft_reset; -} - -void app_main(void) { - nvs_flash_init(); - xTaskCreateStaticPinnedToCore(mp_task, "mp_task", MP_TASK_STACK_LEN, NULL, MP_TASK_PRIORITY, - &mp_task_stack[0], &mp_task_tcb, 0); -} - -void nlr_jump_fail(void *val) { - printf("NLR jump failed, val=%p\n", val); - esp_restart(); -} - -// modussl_mbedtls uses this function but it's not enabled in ESP IDF -void mbedtls_debug_set_threshold(int threshold) { - (void)threshold; -} diff --git a/ports/esp32/makeimg.py b/ports/esp32/makeimg.py deleted file mode 100644 index aeedbff7ef..0000000000 --- a/ports/esp32/makeimg.py +++ /dev/null @@ -1,25 +0,0 @@ -import sys - -OFFSET_BOOTLOADER = 0x1000 -OFFSET_PARTITIONS = 0x8000 -OFFSET_APPLICATION = 0x10000 - -files_in = [ - ('bootloader', OFFSET_BOOTLOADER, sys.argv[1]), - ('partitions', OFFSET_PARTITIONS, sys.argv[2]), - ('application', OFFSET_APPLICATION, sys.argv[3]), -] -file_out = sys.argv[4] - -cur_offset = OFFSET_BOOTLOADER -with open(file_out, 'wb') as fout: - for name, offset, file_in in files_in: - assert offset >= cur_offset - fout.write(b'\xff' * (offset - cur_offset)) - cur_offset = offset - with open(file_in, 'rb') as fin: - data = fin.read() - fout.write(data) - cur_offset += len(data) - print('%-12s% 8d' % (name, len(data))) - print('%-12s% 8d' % ('total', cur_offset)) diff --git a/ports/esp32/memory.h b/ports/esp32/memory.h deleted file mode 100644 index f3777b0e39..0000000000 --- a/ports/esp32/memory.h +++ /dev/null @@ -1,2 +0,0 @@ -// this is needed for extmod/crypto-algorithms/sha256.c -#include diff --git a/ports/esp32/modesp.c b/ports/esp32/modesp.c deleted file mode 100644 index e614f77a6a..0000000000 --- a/ports/esp32/modesp.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Paul Sokolovsky - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "rom/gpio.h" -#include "esp_log.h" -#include "esp_spi_flash.h" - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "drivers/dht/dht.h" -#include "modesp.h" - -STATIC mp_obj_t esp_osdebug(size_t n_args, const mp_obj_t *args) { - esp_log_level_t level = LOG_LOCAL_LEVEL; - if (n_args == 2) { - level = mp_obj_get_int(args[1]); - } - if (args[0] == mp_const_none) { - // Disable logging - esp_log_level_set("*", ESP_LOG_ERROR); - } else { - // Enable logging at the given level - // TODO args[0] should set the UART to which debug is sent - esp_log_level_set("*", level); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_osdebug_obj, 1, 2, esp_osdebug); - -STATIC mp_obj_t esp_flash_read(mp_obj_t offset_in, mp_obj_t buf_in) { - mp_int_t offset = mp_obj_get_int(offset_in); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_WRITE); - esp_err_t res = spi_flash_read(offset, bufinfo.buf, bufinfo.len); - if (res != ESP_OK) { - mp_raise_OSError(MP_EIO); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_flash_read_obj, esp_flash_read); - -STATIC mp_obj_t esp_flash_write(mp_obj_t offset_in, mp_obj_t buf_in) { - mp_int_t offset = mp_obj_get_int(offset_in); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - esp_err_t res = spi_flash_write(offset, bufinfo.buf, bufinfo.len); - if (res != ESP_OK) { - mp_raise_OSError(MP_EIO); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_flash_write_obj, esp_flash_write); - -STATIC mp_obj_t esp_flash_erase(mp_obj_t sector_in) { - mp_int_t sector = mp_obj_get_int(sector_in); - esp_err_t res = spi_flash_erase_sector(sector); - if (res != ESP_OK) { - mp_raise_OSError(MP_EIO); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_flash_erase_obj, esp_flash_erase); - -STATIC mp_obj_t esp_flash_size(void) { - return mp_obj_new_int_from_uint(spi_flash_get_chip_size()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_size_obj, esp_flash_size); - -STATIC mp_obj_t esp_flash_user_start(void) { - return MP_OBJ_NEW_SMALL_INT(0x200000); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_user_start_obj, esp_flash_user_start); - -STATIC mp_obj_t esp_gpio_matrix_in(mp_obj_t pin, mp_obj_t sig, mp_obj_t inv) { - gpio_matrix_in(mp_obj_get_int(pin), mp_obj_get_int(sig), mp_obj_get_int(inv)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(esp_gpio_matrix_in_obj, esp_gpio_matrix_in); - -STATIC mp_obj_t esp_gpio_matrix_out(size_t n_args, const mp_obj_t *args) { - (void)n_args; - gpio_matrix_out(mp_obj_get_int(args[0]), mp_obj_get_int(args[1]), mp_obj_get_int(args[2]), mp_obj_get_int(args[3])); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_gpio_matrix_out_obj, 4, 4, esp_gpio_matrix_out); - -STATIC mp_obj_t esp_neopixel_write_(mp_obj_t pin, mp_obj_t buf, mp_obj_t timing) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - esp_neopixel_write(mp_hal_get_pin_obj(pin), - (uint8_t*)bufinfo.buf, bufinfo.len, mp_obj_get_int(timing)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(esp_neopixel_write_obj, esp_neopixel_write_); - -STATIC const mp_rom_map_elem_t esp_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_esp) }, - - { MP_ROM_QSTR(MP_QSTR_osdebug), MP_ROM_PTR(&esp_osdebug_obj) }, - - { MP_ROM_QSTR(MP_QSTR_flash_read), MP_ROM_PTR(&esp_flash_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_write), MP_ROM_PTR(&esp_flash_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_erase), MP_ROM_PTR(&esp_flash_erase_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_size), MP_ROM_PTR(&esp_flash_size_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_user_start), MP_ROM_PTR(&esp_flash_user_start_obj) }, - - { MP_ROM_QSTR(MP_QSTR_gpio_matrix_in), MP_ROM_PTR(&esp_gpio_matrix_in_obj) }, - { MP_ROM_QSTR(MP_QSTR_gpio_matrix_out), MP_ROM_PTR(&esp_gpio_matrix_out_obj) }, - - { MP_ROM_QSTR(MP_QSTR_neopixel_write), MP_ROM_PTR(&esp_neopixel_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) }, - - // Constants for second arg of osdebug() - { MP_ROM_QSTR(MP_QSTR_LOG_NONE), MP_ROM_INT((mp_uint_t)ESP_LOG_NONE)}, - { MP_ROM_QSTR(MP_QSTR_LOG_ERROR), MP_ROM_INT((mp_uint_t)ESP_LOG_ERROR)}, - { MP_ROM_QSTR(MP_QSTR_LOG_WARNING), MP_ROM_INT((mp_uint_t)ESP_LOG_WARN)}, - { MP_ROM_QSTR(MP_QSTR_LOG_INFO), MP_ROM_INT((mp_uint_t)ESP_LOG_INFO)}, - { MP_ROM_QSTR(MP_QSTR_LOG_DEBUG), MP_ROM_INT((mp_uint_t)ESP_LOG_DEBUG)}, - { MP_ROM_QSTR(MP_QSTR_LOG_VERBOSE), MP_ROM_INT((mp_uint_t)ESP_LOG_VERBOSE)}, -}; - -STATIC MP_DEFINE_CONST_DICT(esp_module_globals, esp_module_globals_table); - -const mp_obj_module_t esp_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&esp_module_globals, -}; - diff --git a/ports/esp32/modesp.h b/ports/esp32/modesp.h deleted file mode 100644 index a822c02ecc..0000000000 --- a/ports/esp32/modesp.h +++ /dev/null @@ -1 +0,0 @@ -void esp_neopixel_write(uint8_t pin, uint8_t *pixels, uint32_t numBytes, uint8_t timing); diff --git a/ports/esp32/modesp32.c b/ports/esp32/modesp32.c deleted file mode 100644 index bab78e9543..0000000000 --- a/ports/esp32/modesp32.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 "Eric Poulsen" - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include -#include -#include "driver/gpio.h" - -#include "py/nlr.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "timeutils.h" -#include "modmachine.h" -#include "machine_rtc.h" -#include "modesp32.h" - -STATIC mp_obj_t esp32_wake_on_touch(const mp_obj_t wake) { - - if (machine_rtc_config.ext0_pin != -1) { - mp_raise_ValueError("no resources"); - } - //nlr_raise(mp_obj_new_exception_msg(&mp_type_RuntimeError, "touchpad wakeup not available for this version of ESP-IDF")); - - machine_rtc_config.wake_on_touch = mp_obj_is_true(wake); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp32_wake_on_touch_obj, esp32_wake_on_touch); - -STATIC mp_obj_t esp32_wake_on_ext0(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - - if (machine_rtc_config.wake_on_touch) { - mp_raise_ValueError("no resources"); - } - enum {ARG_pin, ARG_level}; - const mp_arg_t allowed_args[] = { - { MP_QSTR_pin, MP_ARG_OBJ, {.u_obj = mp_obj_new_int(machine_rtc_config.ext0_pin)} }, - { MP_QSTR_level, MP_ARG_BOOL, {.u_bool = machine_rtc_config.ext0_level} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (args[ARG_pin].u_obj == mp_const_none) { - machine_rtc_config.ext0_pin = -1; // "None" - } else { - gpio_num_t pin_id = machine_pin_get_id(args[ARG_pin].u_obj); - if (pin_id != machine_rtc_config.ext0_pin) { - if (!RTC_IS_VALID_EXT_PIN(pin_id)) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "invalid pin")); - } - machine_rtc_config.ext0_pin = pin_id; - } - } - - machine_rtc_config.ext0_level = args[ARG_level].u_bool; - machine_rtc_config.ext0_wake_types = MACHINE_WAKE_SLEEP | MACHINE_WAKE_DEEPSLEEP; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp32_wake_on_ext0_obj, 0, esp32_wake_on_ext0); - -STATIC mp_obj_t esp32_wake_on_ext1(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum {ARG_pins, ARG_level}; - const mp_arg_t allowed_args[] = { - { MP_QSTR_pins, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_level, MP_ARG_BOOL, {.u_bool = machine_rtc_config.ext1_level} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - uint64_t ext1_pins = machine_rtc_config.ext1_pins; - - - // Check that all pins are allowed - if (args[ARG_pins].u_obj != mp_const_none) { - mp_uint_t len = 0; - mp_obj_t *elem; - mp_obj_get_array(args[ARG_pins].u_obj, &len, &elem); - ext1_pins = 0; - - for (int i = 0; i < len; i++) { - - gpio_num_t pin_id = machine_pin_get_id(elem[i]); - if (!RTC_IS_VALID_EXT_PIN(pin_id)) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "invalid pin")); - break; - } - ext1_pins |= (1ll << pin_id); - } - } - - machine_rtc_config.ext1_level = args[ARG_level].u_bool; - machine_rtc_config.ext1_pins = ext1_pins; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp32_wake_on_ext1_obj, 0, esp32_wake_on_ext1); - -STATIC const mp_rom_map_elem_t esp32_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_esp32) }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_wake_on_touch), (mp_obj_t)&esp32_wake_on_touch_obj }, - { MP_OBJ_NEW_QSTR(MP_QSTR_wake_on_ext0), (mp_obj_t)&esp32_wake_on_ext0_obj }, - { MP_OBJ_NEW_QSTR(MP_QSTR_wake_on_ext1), (mp_obj_t)&esp32_wake_on_ext1_obj }, - - { MP_ROM_QSTR(MP_QSTR_ULP), MP_ROM_PTR(&esp32_ulp_type) }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_WAKEUP_ALL_LOW), mp_const_false }, - { MP_OBJ_NEW_QSTR(MP_QSTR_WAKEUP_ANY_HIGH), mp_const_true }, -}; - -STATIC MP_DEFINE_CONST_DICT(esp32_module_globals, esp32_module_globals_table); - -const mp_obj_module_t esp32_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&esp32_module_globals, -}; diff --git a/ports/esp32/modesp32.h b/ports/esp32/modesp32.h deleted file mode 100644 index 1d18cb41fb..0000000000 --- a/ports/esp32/modesp32.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP32_MODESP32_H -#define MICROPY_INCLUDED_ESP32_MODESP32_H - -#define RTC_VALID_EXT_PINS \ -( \ - (1ll << 0) | \ - (1ll << 2) | \ - (1ll << 4) | \ - (1ll << 12) | \ - (1ll << 13) | \ - (1ll << 14) | \ - (1ll << 15) | \ - (1ll << 25) | \ - (1ll << 26) | \ - (1ll << 27) | \ - (1ll << 32) | \ - (1ll << 33) | \ - (1ll << 34) | \ - (1ll << 35) | \ - (1ll << 36) | \ - (1ll << 37) | \ - (1ll << 38) | \ - (1ll << 39) \ -) - -#define RTC_LAST_EXT_PIN 39 -#define RTC_IS_VALID_EXT_PIN(pin_id) ((1ll << (pin_id)) & RTC_VALID_EXT_PINS) - -extern const mp_obj_type_t esp32_ulp_type; - -#endif // MICROPY_INCLUDED_ESP32_MODESP32_H diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c deleted file mode 100644 index 2d59e137ef..0000000000 --- a/ports/esp32/modmachine.c +++ /dev/null @@ -1,269 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "rom/ets_sys.h" -#include "rom/rtc.h" -#include "esp_system.h" -#include "driver/touch_pad.h" - -#include "py/obj.h" -#include "py/runtime.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "extmod/machine_spi.h" -#include "modmachine.h" -#include "machine_rtc.h" - -#if MICROPY_PY_MACHINE - -typedef enum { - MP_PWRON_RESET = 1, - MP_HARD_RESET, - MP_WDT_RESET, - MP_DEEPSLEEP_RESET, - MP_SOFT_RESET -} reset_reason_t; - -STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - // get - return mp_obj_new_int(ets_get_cpu_frequency() * 1000000); - } else { - // set - mp_int_t freq = mp_obj_get_int(args[0]) / 1000000; - if (freq != 80 && freq != 160 && freq != 240) { - mp_raise_ValueError("frequency can only be either 80Mhz, 160MHz or 240MHz"); - } - /* - system_update_cpu_freq(freq); - */ - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq); - -STATIC mp_obj_t machine_sleep_helper(wake_type_t wake_type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - - enum {ARG_sleep_ms}; - const mp_arg_t allowed_args[] = { - { MP_QSTR_sleep_ms, MP_ARG_INT, { .u_int = 0 } }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - - mp_int_t expiry = args[ARG_sleep_ms].u_int; - - if (expiry != 0) { - esp_sleep_enable_timer_wakeup(expiry * 1000); - } - - if (machine_rtc_config.ext0_pin != -1 && (machine_rtc_config.ext0_wake_types & wake_type)) { - esp_sleep_enable_ext0_wakeup(machine_rtc_config.ext0_pin, machine_rtc_config.ext0_level ? 1 : 0); - } - - if (machine_rtc_config.ext1_pins != 0) { - esp_sleep_enable_ext1_wakeup( - machine_rtc_config.ext1_pins, - machine_rtc_config.ext1_level ? ESP_EXT1_WAKEUP_ANY_HIGH : ESP_EXT1_WAKEUP_ALL_LOW); - } - - if (machine_rtc_config.wake_on_touch) { - if (esp_sleep_enable_touchpad_wakeup() != ESP_OK) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_RuntimeError, "esp_sleep_enable_touchpad_wakeup() failed")); - } - } - - switch(wake_type) { - case MACHINE_WAKE_SLEEP: - esp_light_sleep_start(); - break; - case MACHINE_WAKE_DEEPSLEEP: - esp_deep_sleep_start(); - break; - } - return mp_const_none; -} - -STATIC mp_obj_t machine_sleep(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_RuntimeError, "light sleep not available for this version of ESP-IDF")); - return machine_sleep_helper(MACHINE_WAKE_SLEEP, n_args, pos_args, kw_args); -}; -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_sleep_obj, 0, machine_sleep); - -STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - return machine_sleep_helper(MACHINE_WAKE_DEEPSLEEP, n_args, pos_args, kw_args); -}; -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_deepsleep_obj, 0, machine_deepsleep); - -STATIC mp_obj_t machine_reset_cause(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - switch(rtc_get_reset_reason(0)) { - case POWERON_RESET: - return MP_OBJ_NEW_SMALL_INT(MP_PWRON_RESET); - break; - case SW_RESET: - case SW_CPU_RESET: - return MP_OBJ_NEW_SMALL_INT(MP_SOFT_RESET); - break; - case OWDT_RESET: - case TG0WDT_SYS_RESET: - case TG1WDT_SYS_RESET: - case RTCWDT_SYS_RESET: - case RTCWDT_BROWN_OUT_RESET: - case RTCWDT_CPU_RESET: - case RTCWDT_RTC_RESET: - case TGWDT_CPU_RESET: - return MP_OBJ_NEW_SMALL_INT(MP_WDT_RESET); - break; - - case DEEPSLEEP_RESET: - return MP_OBJ_NEW_SMALL_INT(MP_DEEPSLEEP_RESET); - break; - - case EXT_CPU_RESET: - return MP_OBJ_NEW_SMALL_INT(MP_HARD_RESET); - break; - - case NO_MEAN: - case SDIO_RESET: - case INTRUSION_RESET: - default: - return MP_OBJ_NEW_SMALL_INT(0); - break; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_reset_cause_obj, 0, machine_reset_cause); - -STATIC mp_obj_t machine_wake_reason(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - return MP_OBJ_NEW_SMALL_INT(esp_sleep_get_wakeup_cause()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_wake_reason_obj, 0, machine_wake_reason); - -STATIC mp_obj_t machine_reset(void) { - esp_restart(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_unique_id(void) { - uint8_t chipid[6]; - esp_efuse_mac_get_default(chipid); - return mp_obj_new_bytes(chipid, 6); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -STATIC mp_obj_t machine_idle(void) { - taskYIELD(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle); - -STATIC mp_obj_t machine_disable_irq(void) { - uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION(); - return mp_obj_new_int(state); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq); - -STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) { - uint32_t state = mp_obj_get_int(state_in); - MICROPY_END_ATOMIC_SECTION(state); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) }, - - // wake abilities - { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(MACHINE_WAKE_SLEEP) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - { MP_ROM_QSTR(MP_QSTR_TouchPad), MP_ROM_PTR(&machine_touchpad_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) }, - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&mp_machine_soft_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) }, - - // Reset reasons - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(MP_HARD_RESET) }, - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(MP_PWRON_RESET) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(MP_WDT_RESET) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(MP_DEEPSLEEP_RESET) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(MP_SOFT_RESET) }, - - // Wake reasons - { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) }, - { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT0) }, - { MP_ROM_QSTR(MP_QSTR_EXT0_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT0) }, - { MP_ROM_QSTR(MP_QSTR_EXT1_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_EXT1) }, - { MP_ROM_QSTR(MP_QSTR_TIMER_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_TIMER) }, - { MP_ROM_QSTR(MP_QSTR_TOUCHPAD_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_TOUCHPAD) }, - { MP_ROM_QSTR(MP_QSTR_ULP_WAKE), MP_ROM_INT(ESP_SLEEP_WAKEUP_ULP) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - -#endif // MICROPY_PY_MACHINE diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h deleted file mode 100644 index c8513a4711..0000000000 --- a/ports/esp32/modmachine.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP32_MODMACHINE_H -#define MICROPY_INCLUDED_ESP32_MODMACHINE_H - -#include "py/obj.h" - -typedef enum { - //MACHINE_WAKE_IDLE=0x01, - MACHINE_WAKE_SLEEP=0x02, - MACHINE_WAKE_DEEPSLEEP=0x04 -} wake_type_t; - -extern const mp_obj_type_t machine_timer_type; -extern const mp_obj_type_t machine_wdt_type; -extern const mp_obj_type_t machine_pin_type; -extern const mp_obj_type_t machine_touchpad_type; -extern const mp_obj_type_t machine_adc_type; -extern const mp_obj_type_t machine_dac_type; -extern const mp_obj_type_t machine_pwm_type; -extern const mp_obj_type_t machine_hw_spi_type; -extern const mp_obj_type_t machine_uart_type; -extern const mp_obj_type_t machine_rtc_type; - -void machine_pins_init(void); -void machine_pins_deinit(void); - -#endif // MICROPY_INCLUDED_ESP32_MODMACHINE_H diff --git a/ports/esp32/modnetwork.c b/ports/esp32/modnetwork.c deleted file mode 100644 index fdcb6d3cf3..0000000000 --- a/ports/esp32/modnetwork.c +++ /dev/null @@ -1,646 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * and Mnemote Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016, 2017 Nick Moore @mnemote - * Copyright (c) 2017 "Eric Poulsen" - * - * Based on esp8266/modnetwork.c which is Copyright (c) 2015 Paul Sokolovsky - * And the ESP IDF example code which is Public Domain / CC0 - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/nlr.h" -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "py/mperrno.h" -#include "netutils.h" -#include "esp_wifi.h" -#include "esp_wifi_types.h" -#include "esp_log.h" -#include "esp_event_loop.h" -#include "esp_log.h" -#include "lwip/dns.h" -#include "tcpip_adapter.h" - -#include "modnetwork.h" - -#define MODNETWORK_INCLUDE_CONSTANTS (1) - -NORETURN void _esp_exceptions(esp_err_t e) { - switch (e) { - case ESP_ERR_WIFI_NOT_INIT: - mp_raise_msg(&mp_type_OSError, "Wifi Not Initialized"); - case ESP_ERR_WIFI_NOT_STARTED: - mp_raise_msg(&mp_type_OSError, "Wifi Not Started"); - case ESP_ERR_WIFI_NOT_STOPPED: - mp_raise_msg(&mp_type_OSError, "Wifi Not Stopped"); - case ESP_ERR_WIFI_IF: - mp_raise_msg(&mp_type_OSError, "Wifi Invalid Interface"); - case ESP_ERR_WIFI_MODE: - mp_raise_msg(&mp_type_OSError, "Wifi Invalid Mode"); - case ESP_ERR_WIFI_STATE: - mp_raise_msg(&mp_type_OSError, "Wifi Internal State Error"); - case ESP_ERR_WIFI_CONN: - mp_raise_msg(&mp_type_OSError, "Wifi Internal Error"); - case ESP_ERR_WIFI_NVS: - mp_raise_msg(&mp_type_OSError, "Wifi Internal NVS Error"); - case ESP_ERR_WIFI_MAC: - mp_raise_msg(&mp_type_OSError, "Wifi Invalid MAC Address"); - case ESP_ERR_WIFI_SSID: - mp_raise_msg(&mp_type_OSError, "Wifi SSID Invalid"); - case ESP_ERR_WIFI_PASSWORD: - mp_raise_msg(&mp_type_OSError, "Wifi Invalid Password"); - case ESP_ERR_WIFI_TIMEOUT: - mp_raise_OSError(MP_ETIMEDOUT); - case ESP_ERR_WIFI_WAKE_FAIL: - mp_raise_msg(&mp_type_OSError, "Wifi Wakeup Failure"); - case ESP_ERR_WIFI_WOULD_BLOCK: - mp_raise_msg(&mp_type_OSError, "Wifi Would Block"); - case ESP_ERR_WIFI_NOT_CONNECT: - mp_raise_msg(&mp_type_OSError, "Wifi Not Connected"); - case ESP_ERR_TCPIP_ADAPTER_INVALID_PARAMS: - mp_raise_msg(&mp_type_OSError, "TCP/IP Invalid Parameters"); - case ESP_ERR_TCPIP_ADAPTER_IF_NOT_READY: - mp_raise_msg(&mp_type_OSError, "TCP/IP IF Not Ready"); - case ESP_ERR_TCPIP_ADAPTER_DHCPC_START_FAILED: - mp_raise_msg(&mp_type_OSError, "TCP/IP DHCP Client Start Failed"); - case ESP_ERR_TCPIP_ADAPTER_NO_MEM: - mp_raise_OSError(MP_ENOMEM); - default: - nlr_raise(mp_obj_new_exception_msg_varg( - &mp_type_RuntimeError, "Wifi Unknown Error 0x%04x", e - )); - } -} - -static inline void esp_exceptions(esp_err_t e) { - if (e != ESP_OK) _esp_exceptions(e); -} - -#define ESP_EXCEPTIONS(x) do { esp_exceptions(x); } while (0); - -typedef struct _wlan_if_obj_t { - mp_obj_base_t base; - int if_id; -} wlan_if_obj_t; - -const mp_obj_type_t wlan_if_type; -STATIC const wlan_if_obj_t wlan_sta_obj = {{&wlan_if_type}, WIFI_IF_STA}; -STATIC const wlan_if_obj_t wlan_ap_obj = {{&wlan_if_type}, WIFI_IF_AP}; - -//static wifi_config_t wifi_ap_config = {{{0}}}; -static wifi_config_t wifi_sta_config = {{{0}}}; - -// Set to "true" if esp_wifi_start() was called -static bool wifi_started = false; - -// Set to "true" if the STA interface is requested to be connected by the -// user, used for automatic reassociation. -static bool wifi_sta_connect_requested = false; - -// Set to "true" if the STA interface is connected to wifi and has IP address. -static bool wifi_sta_connected = false; - -// This function is called by the system-event task and so runs in a different -// thread to the main MicroPython task. It must not raise any Python exceptions. -static esp_err_t event_handler(void *ctx, system_event_t *event) { - switch(event->event_id) { - case SYSTEM_EVENT_STA_START: - ESP_LOGI("wifi", "STA_START"); - break; - case SYSTEM_EVENT_STA_CONNECTED: - ESP_LOGI("network", "CONNECTED"); - break; - case SYSTEM_EVENT_STA_GOT_IP: - ESP_LOGI("network", "GOT_IP"); - wifi_sta_connected = true; - break; - case SYSTEM_EVENT_STA_DISCONNECTED: { - // This is a workaround as ESP32 WiFi libs don't currently - // auto-reassociate. - system_event_sta_disconnected_t *disconn = &event->event_info.disconnected; - char *message = ""; - switch (disconn->reason) { - case WIFI_REASON_BEACON_TIMEOUT: - // AP has dropped out; try to reconnect. - message = "\nbeacon timeout"; - break; - case WIFI_REASON_NO_AP_FOUND: - // AP may not exist, or it may have momentarily dropped out; try to reconnect. - message = "\nno AP found"; - break; - case WIFI_REASON_AUTH_FAIL: - message = "\nauthentication failed"; - wifi_sta_connect_requested = false; - break; - default: - // Let other errors through and try to reconnect. - break; - } - ESP_LOGI("wifi", "STA_DISCONNECTED, reason:%d%s", disconn->reason, message); - - bool reconnected = false; - if (wifi_sta_connect_requested) { - wifi_mode_t mode; - if (esp_wifi_get_mode(&mode) == ESP_OK) { - if (mode & WIFI_MODE_STA) { - // STA is active so attempt to reconnect. - esp_err_t e = esp_wifi_connect(); - if (e != ESP_OK) { - ESP_LOGI("wifi", "error attempting to reconnect: 0x%04x", e); - } else { - reconnected = true; - } - } - } - } - if (wifi_sta_connected && !reconnected) { - // If already connected and we fail to reconnect - wifi_sta_connected = false; - } - break; - } - default: - ESP_LOGI("network", "event %d", event->event_id); - break; - } - return ESP_OK; -} - -/*void error_check(bool status, const char *msg) { - if (!status) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, msg)); - } -} -*/ - -STATIC void require_if(mp_obj_t wlan_if, int if_no) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(wlan_if); - if (self->if_id != if_no) { - mp_raise_msg(&mp_type_OSError, if_no == WIFI_IF_STA ? "STA required" : "AP required"); - } -} - -STATIC mp_obj_t get_wlan(size_t n_args, const mp_obj_t *args) { - static int initialized = 0; - if (!initialized) { - wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); - ESP_LOGD("modnetwork", "Initializing WiFi"); - ESP_EXCEPTIONS( esp_wifi_init(&cfg) ); - ESP_EXCEPTIONS( esp_wifi_set_storage(WIFI_STORAGE_RAM) ); - ESP_LOGD("modnetwork", "Initialized"); - initialized = 1; - } - - int idx = (n_args > 0) ? mp_obj_get_int(args[0]) : WIFI_IF_STA; - if (idx == WIFI_IF_STA) { - return MP_OBJ_FROM_PTR(&wlan_sta_obj); - } else if (idx == WIFI_IF_AP) { - return MP_OBJ_FROM_PTR(&wlan_ap_obj); - } else { - mp_raise_ValueError("invalid WLAN interface identifier"); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(get_wlan_obj, 0, 1, get_wlan); - -STATIC mp_obj_t esp_initialize() { - static int initialized = 0; - if (!initialized) { - ESP_LOGD("modnetwork", "Initializing TCP/IP"); - tcpip_adapter_init(); - ESP_LOGD("modnetwork", "Initializing Event Loop"); - ESP_EXCEPTIONS( esp_event_loop_init(event_handler, NULL) ); - ESP_LOGD("modnetwork", "esp_event_loop_init done"); - initialized = 1; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_initialize_obj, esp_initialize); - -#if (WIFI_MODE_STA & WIFI_MODE_AP != WIFI_MODE_NULL || WIFI_MODE_STA | WIFI_MODE_AP != WIFI_MODE_APSTA) -#error WIFI_MODE_STA and WIFI_MODE_AP are supposed to be bitfields! -#endif - -STATIC mp_obj_t esp_active(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - - wifi_mode_t mode; - if (!wifi_started) { - mode = WIFI_MODE_NULL; - } else { - ESP_EXCEPTIONS(esp_wifi_get_mode(&mode)); - } - - int bit = (self->if_id == WIFI_IF_STA) ? WIFI_MODE_STA : WIFI_MODE_AP; - - if (n_args > 1) { - bool active = mp_obj_is_true(args[1]); - mode = active ? (mode | bit) : (mode & ~bit); - if (mode == WIFI_MODE_NULL) { - if (wifi_started) { - ESP_EXCEPTIONS(esp_wifi_stop()); - wifi_started = false; - } - } else { - ESP_EXCEPTIONS(esp_wifi_set_mode(mode)); - if (!wifi_started) { - ESP_EXCEPTIONS(esp_wifi_start()); - wifi_started = true; - } - } - } - - return (mode & bit) ? mp_const_true : mp_const_false; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_active_obj, 1, 2, esp_active); - -STATIC mp_obj_t esp_connect(size_t n_args, const mp_obj_t *args) { - - mp_uint_t len; - const char *p; - if (n_args > 1) { - memset(&wifi_sta_config, 0, sizeof(wifi_sta_config)); - p = mp_obj_str_get_data(args[1], &len); - memcpy(wifi_sta_config.sta.ssid, p, MIN(len, sizeof(wifi_sta_config.sta.ssid))); - p = (n_args > 2) ? mp_obj_str_get_data(args[2], &len) : ""; - memcpy(wifi_sta_config.sta.password, p, MIN(len, sizeof(wifi_sta_config.sta.password))); - ESP_EXCEPTIONS( esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_sta_config) ); - } - MP_THREAD_GIL_EXIT(); - ESP_EXCEPTIONS( esp_wifi_connect() ); - MP_THREAD_GIL_ENTER(); - wifi_sta_connect_requested = true; - - return mp_const_none; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_connect_obj, 1, 7, esp_connect); - -STATIC mp_obj_t esp_disconnect(mp_obj_t self_in) { - wifi_sta_connect_requested = false; - ESP_EXCEPTIONS( esp_wifi_disconnect() ); - return mp_const_none; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_disconnect_obj, esp_disconnect); - -STATIC mp_obj_t esp_status(size_t n_args, const mp_obj_t *args) { - if (n_args == 1) { - // no arguments: return None until link status is implemented - return mp_const_none; - } - - // one argument: return status based on query parameter - switch ((uintptr_t)args[1]) { - case (uintptr_t)MP_OBJ_NEW_QSTR(MP_QSTR_stations): { - // return list of connected stations, only if in soft-AP mode - require_if(args[0], WIFI_IF_AP); - wifi_sta_list_t station_list; - ESP_EXCEPTIONS(esp_wifi_ap_get_sta_list(&station_list)); - wifi_sta_info_t *stations = (wifi_sta_info_t*)station_list.sta; - mp_obj_t list = mp_obj_new_list(0, NULL); - for (int i = 0; i < station_list.num; ++i) { - mp_obj_tuple_t *t = mp_obj_new_tuple(1, NULL); - t->items[0] = mp_obj_new_bytes(stations[i].mac, sizeof(stations[i].mac)); - mp_obj_list_append(list, t); - } - return list; - } - - default: - mp_raise_ValueError("unknown status param"); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_status_obj, 1, 2, esp_status); - -STATIC mp_obj_t esp_scan(mp_obj_t self_in) { - // check that STA mode is active - wifi_mode_t mode; - ESP_EXCEPTIONS(esp_wifi_get_mode(&mode)); - if ((mode & WIFI_MODE_STA) == 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "STA must be active")); - } - - mp_obj_t list = mp_obj_new_list(0, NULL); - wifi_scan_config_t config = { 0 }; - // XXX how do we scan hidden APs (and if we can scan them, are they really hidden?) - MP_THREAD_GIL_EXIT(); - esp_err_t status = esp_wifi_scan_start(&config, 1); - MP_THREAD_GIL_ENTER(); - if (status == 0) { - uint16_t count = 0; - ESP_EXCEPTIONS( esp_wifi_scan_get_ap_num(&count) ); - wifi_ap_record_t *wifi_ap_records = calloc(count, sizeof(wifi_ap_record_t)); - ESP_EXCEPTIONS( esp_wifi_scan_get_ap_records(&count, wifi_ap_records) ); - for (uint16_t i = 0; i < count; i++) { - mp_obj_tuple_t *t = mp_obj_new_tuple(6, NULL); - uint8_t *x = memchr(wifi_ap_records[i].ssid, 0, sizeof(wifi_ap_records[i].ssid)); - int ssid_len = x ? x - wifi_ap_records[i].ssid : sizeof(wifi_ap_records[i].ssid); - t->items[0] = mp_obj_new_bytes(wifi_ap_records[i].ssid, ssid_len); - t->items[1] = mp_obj_new_bytes(wifi_ap_records[i].bssid, sizeof(wifi_ap_records[i].bssid)); - t->items[2] = MP_OBJ_NEW_SMALL_INT(wifi_ap_records[i].primary); - t->items[3] = MP_OBJ_NEW_SMALL_INT(wifi_ap_records[i].rssi); - t->items[4] = MP_OBJ_NEW_SMALL_INT(wifi_ap_records[i].authmode); - t->items[5] = mp_const_false; // XXX hidden? - mp_obj_list_append(list, MP_OBJ_FROM_PTR(t)); - } - free(wifi_ap_records); - } - return list; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_scan_obj, esp_scan); - -STATIC mp_obj_t esp_isconnected(mp_obj_t self_in) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (self->if_id == WIFI_IF_STA) { - return mp_obj_new_bool(wifi_sta_connected); - } else { - wifi_sta_list_t sta; - esp_wifi_ap_get_sta_list(&sta); - return mp_obj_new_bool(sta.num != 0); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_isconnected_obj, esp_isconnected); - -STATIC mp_obj_t esp_ifconfig(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - tcpip_adapter_ip_info_t info; - tcpip_adapter_dns_info_t dns_info; - tcpip_adapter_get_ip_info(self->if_id, &info); - tcpip_adapter_get_dns_info(self->if_id, TCPIP_ADAPTER_DNS_MAIN, &dns_info); - if (n_args == 1) { - // get - mp_obj_t tuple[4] = { - netutils_format_ipv4_addr((uint8_t*)&info.ip, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&info.netmask, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&info.gw, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&dns_info.ip, NETUTILS_BIG), - }; - return mp_obj_new_tuple(4, tuple); - } else { - // set - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 4, &items); - netutils_parse_ipv4_addr(items[0], (void*)&info.ip, NETUTILS_BIG); - if (mp_obj_is_integer(items[1])) { - // allow numeric netmask, i.e.: - // 24 -> 255.255.255.0 - // 16 -> 255.255.0.0 - // etc... - uint32_t* m = (uint32_t*)&info.netmask; - *m = htonl(0xffffffff << (32 - mp_obj_get_int(items[1]))); - } else { - netutils_parse_ipv4_addr(items[1], (void*)&info.netmask, NETUTILS_BIG); - } - netutils_parse_ipv4_addr(items[2], (void*)&info.gw, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[3], (void*)&dns_info.ip, NETUTILS_BIG); - // To set a static IP we have to disable DHCP first - if (self->if_id == WIFI_IF_STA || self->if_id == ESP_IF_ETH) { - esp_err_t e = tcpip_adapter_dhcpc_stop(self->if_id); - if (e != ESP_OK && e != ESP_ERR_TCPIP_ADAPTER_DHCP_ALREADY_STOPPED) _esp_exceptions(e); - ESP_EXCEPTIONS(tcpip_adapter_set_ip_info(self->if_id, &info)); - ESP_EXCEPTIONS(tcpip_adapter_set_dns_info(self->if_id, TCPIP_ADAPTER_DNS_MAIN, &dns_info)); - } else if (self->if_id == WIFI_IF_AP) { - esp_err_t e = tcpip_adapter_dhcps_stop(WIFI_IF_AP); - if (e != ESP_OK && e != ESP_ERR_TCPIP_ADAPTER_DHCP_ALREADY_STOPPED) _esp_exceptions(e); - ESP_EXCEPTIONS(tcpip_adapter_set_ip_info(WIFI_IF_AP, &info)); - ESP_EXCEPTIONS(tcpip_adapter_set_dns_info(WIFI_IF_AP, TCPIP_ADAPTER_DNS_MAIN, &dns_info)); - ESP_EXCEPTIONS(tcpip_adapter_dhcps_start(WIFI_IF_AP)); - } - return mp_const_none; - } -} - -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_ifconfig_obj, 1, 2, esp_ifconfig); - -STATIC mp_obj_t esp_config(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - if (n_args != 1 && kwargs->used != 0) { - mp_raise_TypeError("either pos or kw args are allowed"); - } - - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - - // get the config for the interface - wifi_config_t cfg; - ESP_EXCEPTIONS(esp_wifi_get_config(self->if_id, &cfg)); - - if (kwargs->used != 0) { - - for (size_t i = 0; i < kwargs->alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(kwargs, i)) { - int req_if = -1; - - #define QS(x) (uintptr_t)MP_OBJ_NEW_QSTR(x) - switch ((uintptr_t)kwargs->table[i].key) { - case QS(MP_QSTR_mac): { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(kwargs->table[i].value, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len != 6) { - mp_raise_ValueError("invalid buffer length"); - } - ESP_EXCEPTIONS(esp_wifi_set_mac(self->if_id, bufinfo.buf)); - break; - } - case QS(MP_QSTR_essid): { - req_if = WIFI_IF_AP; - mp_uint_t len; - const char *s = mp_obj_str_get_data(kwargs->table[i].value, &len); - len = MIN(len, sizeof(cfg.ap.ssid)); - memcpy(cfg.ap.ssid, s, len); - cfg.ap.ssid_len = len; - break; - } - case QS(MP_QSTR_hidden): { - req_if = WIFI_IF_AP; - cfg.ap.ssid_hidden = mp_obj_is_true(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_authmode): { - req_if = WIFI_IF_AP; - cfg.ap.authmode = mp_obj_get_int(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_password): { - req_if = WIFI_IF_AP; - mp_uint_t len; - const char *s = mp_obj_str_get_data(kwargs->table[i].value, &len); - len = MIN(len, sizeof(cfg.ap.password) - 1); - memcpy(cfg.ap.password, s, len); - cfg.ap.password[len] = 0; - break; - } - case QS(MP_QSTR_channel): { - req_if = WIFI_IF_AP; - cfg.ap.channel = mp_obj_get_int(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_dhcp_hostname): { - const char *s = mp_obj_str_get_str(kwargs->table[i].value); - ESP_EXCEPTIONS(tcpip_adapter_set_hostname(self->if_id, s)); - break; - } - default: - goto unknown; - } - #undef QS - - // We post-check interface requirements to save on code size - if (req_if >= 0) { - require_if(args[0], req_if); - } - } - } - - ESP_EXCEPTIONS(esp_wifi_set_config(self->if_id, &cfg)); - - return mp_const_none; - } - - // Get config - - if (n_args != 2) { - mp_raise_TypeError("can query only one param"); - } - - int req_if = -1; - mp_obj_t val; - - #define QS(x) (uintptr_t)MP_OBJ_NEW_QSTR(x) - switch ((uintptr_t)args[1]) { - case QS(MP_QSTR_mac): { - uint8_t mac[6]; - ESP_EXCEPTIONS(esp_wifi_get_mac(self->if_id, mac)); - return mp_obj_new_bytes(mac, sizeof(mac)); - } - case QS(MP_QSTR_essid): - if (self->if_id == WIFI_IF_STA) { - val = mp_obj_new_str((char*)cfg.sta.ssid, strlen((char*)cfg.sta.ssid)); - } else { - val = mp_obj_new_str((char*)cfg.ap.ssid, cfg.ap.ssid_len); - } - break; - case QS(MP_QSTR_hidden): - req_if = WIFI_IF_AP; - val = mp_obj_new_bool(cfg.ap.ssid_hidden); - break; - case QS(MP_QSTR_authmode): - req_if = WIFI_IF_AP; - val = MP_OBJ_NEW_SMALL_INT(cfg.ap.authmode); - break; - case QS(MP_QSTR_channel): - req_if = WIFI_IF_AP; - val = MP_OBJ_NEW_SMALL_INT(cfg.ap.channel); - break; - case QS(MP_QSTR_dhcp_hostname): { - const char *s; - ESP_EXCEPTIONS(tcpip_adapter_get_hostname(self->if_id, &s)); - val = mp_obj_new_str(s, strlen(s)); - break; - } - default: - goto unknown; - } - #undef QS - - // We post-check interface requirements to save on code size - if (req_if >= 0) { - require_if(args[0], req_if); - } - - return val; - -unknown: - mp_raise_ValueError("unknown config param"); -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_config_obj, 1, esp_config); - -STATIC const mp_rom_map_elem_t wlan_if_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&esp_active_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&esp_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&esp_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&esp_status_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&esp_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&esp_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&esp_config_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&esp_ifconfig_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wlan_if_locals_dict, wlan_if_locals_dict_table); - -const mp_obj_type_t wlan_if_type = { - { &mp_type_type }, - .name = MP_QSTR_WLAN, - .locals_dict = (mp_obj_t)&wlan_if_locals_dict, -}; - -STATIC mp_obj_t esp_phy_mode(size_t n_args, const mp_obj_t *args) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_phy_mode_obj, 0, 1, esp_phy_mode); - - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - { MP_ROM_QSTR(MP_QSTR___init__), MP_ROM_PTR(&esp_initialize_obj) }, - { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&get_wlan_obj) }, - { MP_ROM_QSTR(MP_QSTR_LAN), MP_ROM_PTR(&get_lan_obj) }, - { MP_ROM_QSTR(MP_QSTR_phy_mode), MP_ROM_PTR(&esp_phy_mode_obj) }, - -#if MODNETWORK_INCLUDE_CONSTANTS - { MP_ROM_QSTR(MP_QSTR_STA_IF), MP_ROM_INT(WIFI_IF_STA)}, - { MP_ROM_QSTR(MP_QSTR_AP_IF), MP_ROM_INT(WIFI_IF_AP)}, - - { MP_ROM_QSTR(MP_QSTR_MODE_11B), MP_ROM_INT(WIFI_PROTOCOL_11B) }, - { MP_ROM_QSTR(MP_QSTR_MODE_11G), MP_ROM_INT(WIFI_PROTOCOL_11G) }, - { MP_ROM_QSTR(MP_QSTR_MODE_11N), MP_ROM_INT(WIFI_PROTOCOL_11N) }, - - { MP_ROM_QSTR(MP_QSTR_AUTH_OPEN), MP_ROM_INT(WIFI_AUTH_OPEN) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WEP), MP_ROM_INT(WIFI_AUTH_WEP) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA_PSK), MP_ROM_INT(WIFI_AUTH_WPA_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA2_PSK), MP_ROM_INT(WIFI_AUTH_WPA2_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA_WPA2_PSK), MP_ROM_INT(WIFI_AUTH_WPA_WPA2_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_MAX), MP_ROM_INT(WIFI_AUTH_MAX) }, - - { MP_ROM_QSTR(MP_QSTR_PHY_LAN8720), MP_ROM_INT(PHY_LAN8720) }, - { MP_ROM_QSTR(MP_QSTR_PHY_TLK110), MP_ROM_INT(PHY_TLK110) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t mp_module_network = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; diff --git a/ports/esp32/modsocket.c b/ports/esp32/modsocket.c deleted file mode 100644 index daa77f581c..0000000000 --- a/ports/esp32/modsocket.c +++ /dev/null @@ -1,702 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * and Mnemote Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016, 2017 Nick Moore @mnemote - * - * Based on extmod/modlwip.c - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Galen Hazelwood - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include - -#include "py/runtime0.h" -#include "py/nlr.h" -#include "py/objlist.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "lib/netutils/netutils.h" -#include "tcpip_adapter.h" -#include "modnetwork.h" - -#include "lwip/sockets.h" -#include "lwip/netdb.h" -#include "lwip/ip4.h" -#include "lwip/igmp.h" -#include "esp_log.h" - -#define SOCKET_POLL_US (100000) - -typedef struct _socket_obj_t { - mp_obj_base_t base; - int fd; - uint8_t domain; - uint8_t type; - uint8_t proto; - bool peer_closed; - unsigned int retries; - #if MICROPY_PY_USOCKET_EVENTS - mp_obj_t events_callback; - struct _socket_obj_t *events_next; - #endif -} socket_obj_t; - -void _socket_settimeout(socket_obj_t *sock, uint64_t timeout_ms); - -#if MICROPY_PY_USOCKET_EVENTS -// Support for callbacks on asynchronous socket events (when socket becomes readable) - -// This divisor is used to reduce the load on the system, so it doesn't poll sockets too often -#define USOCKET_EVENTS_DIVISOR (8) - -STATIC uint8_t usocket_events_divisor; -STATIC socket_obj_t *usocket_events_head; - -void usocket_events_deinit(void) { - usocket_events_head = NULL; -} - -// Assumes the socket is not already in the linked list, and adds it -STATIC void usocket_events_add(socket_obj_t *sock) { - sock->events_next = usocket_events_head; - usocket_events_head = sock; -} - -// Assumes the socket is already in the linked list, and removes it -STATIC void usocket_events_remove(socket_obj_t *sock) { - for (socket_obj_t **s = &usocket_events_head;; s = &(*s)->events_next) { - if (*s == sock) { - *s = (*s)->events_next; - return; - } - } -} - -// Polls all registered sockets for readability and calls their callback if they are readable -void usocket_events_handler(void) { - if (usocket_events_head == NULL) { - return; - } - if (--usocket_events_divisor) { - return; - } - usocket_events_divisor = USOCKET_EVENTS_DIVISOR; - - fd_set rfds; - FD_ZERO(&rfds); - int max_fd = 0; - - for (socket_obj_t *s = usocket_events_head; s != NULL; s = s->events_next) { - FD_SET(s->fd, &rfds); - max_fd = MAX(max_fd, s->fd); - } - - // Poll the sockets - struct timeval timeout = { .tv_sec = 0, .tv_usec = 0 }; - int r = select(max_fd + 1, &rfds, NULL, NULL, &timeout); - if (r <= 0) { - return; - } - - // Call the callbacks - for (socket_obj_t *s = usocket_events_head; s != NULL; s = s->events_next) { - if (FD_ISSET(s->fd, &rfds)) { - mp_call_function_1_protected(s->events_callback, s); - } - } -} - -#endif // MICROPY_PY_USOCKET_EVENTS - -NORETURN static void exception_from_errno(int _errno) { - // Here we need to convert from lwip errno values to MicroPython's standard ones - if (_errno == EINPROGRESS) { - _errno = MP_EINPROGRESS; - } - mp_raise_OSError(_errno); -} - -static inline void check_for_exceptions(void) { - mp_handle_pending(); -} - -static int _socket_getaddrinfo2(const mp_obj_t host, const mp_obj_t portx, struct addrinfo **resp) { - const struct addrinfo hints = { - .ai_family = AF_INET, - .ai_socktype = SOCK_STREAM, - }; - - mp_obj_t port = portx; - if (MP_OBJ_IS_SMALL_INT(port)) { - // This is perverse, because lwip_getaddrinfo promptly converts it back to an int, but - // that's the API we have to work with ... - port = mp_obj_str_binary_op(MP_BINARY_OP_MODULO, mp_obj_new_str_via_qstr("%s", 2), port); - } - - const char *host_str = mp_obj_str_get_str(host); - const char *port_str = mp_obj_str_get_str(port); - - if (host_str[0] == '\0') { - // a host of "" is equivalent to the default/all-local IP address - host_str = "0.0.0.0"; - } - - MP_THREAD_GIL_EXIT(); - int res = lwip_getaddrinfo(host_str, port_str, &hints, resp); - MP_THREAD_GIL_ENTER(); - - return res; -} - -int _socket_getaddrinfo(const mp_obj_t addrtuple, struct addrinfo **resp) { - mp_uint_t len = 0; - mp_obj_t *elem; - mp_obj_get_array(addrtuple, &len, &elem); - if (len != 2) return -1; - return _socket_getaddrinfo2(elem[0], elem[1], resp); -} - -STATIC mp_obj_t socket_bind(const mp_obj_t arg0, const mp_obj_t arg1) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - struct addrinfo *res; - _socket_getaddrinfo(arg1, &res); - int r = lwip_bind_r(self->fd, res->ai_addr, res->ai_addrlen); - lwip_freeaddrinfo(res); - if (r < 0) exception_from_errno(errno); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -STATIC mp_obj_t socket_listen(const mp_obj_t arg0, const mp_obj_t arg1) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - int backlog = mp_obj_get_int(arg1); - int r = lwip_listen_r(self->fd, backlog); - if (r < 0) exception_from_errno(errno); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_listen_obj, socket_listen); - -STATIC mp_obj_t socket_accept(const mp_obj_t arg0) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - - struct sockaddr addr; - socklen_t addr_len = sizeof(addr); - - int new_fd = -1; - for (int i=0; i<=self->retries; i++) { - MP_THREAD_GIL_EXIT(); - new_fd = lwip_accept_r(self->fd, &addr, &addr_len); - MP_THREAD_GIL_ENTER(); - if (new_fd >= 0) break; - if (errno != EAGAIN) exception_from_errno(errno); - check_for_exceptions(); - } - if (new_fd < 0) mp_raise_OSError(MP_ETIMEDOUT); - - // create new socket object - socket_obj_t *sock = m_new_obj_with_finaliser(socket_obj_t); - sock->base.type = self->base.type; - sock->fd = new_fd; - sock->domain = self->domain; - sock->type = self->type; - sock->proto = self->proto; - sock->peer_closed = false; - _socket_settimeout(sock, UINT64_MAX); - - // make the return value - uint8_t *ip = (uint8_t*)&((struct sockaddr_in*)&addr)->sin_addr; - mp_uint_t port = lwip_ntohs(((struct sockaddr_in*)&addr)->sin_port); - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = sock; - client->items[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); - - return client; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -STATIC mp_obj_t socket_connect(const mp_obj_t arg0, const mp_obj_t arg1) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - struct addrinfo *res; - _socket_getaddrinfo(arg1, &res); - MP_THREAD_GIL_EXIT(); - int r = lwip_connect_r(self->fd, res->ai_addr, res->ai_addrlen); - MP_THREAD_GIL_ENTER(); - lwip_freeaddrinfo(res); - if (r != 0) { - exception_from_errno(errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - (void)n_args; // always 4 - socket_obj_t *self = MP_OBJ_TO_PTR(args[0]); - - int opt = mp_obj_get_int(args[2]); - - switch (opt) { - // level: SOL_SOCKET - case SO_REUSEADDR: { - int val = mp_obj_get_int(args[3]); - int ret = lwip_setsockopt_r(self->fd, SOL_SOCKET, opt, &val, sizeof(int)); - if (ret != 0) { - exception_from_errno(errno); - } - break; - } - - #if MICROPY_PY_USOCKET_EVENTS - // level: SOL_SOCKET - // special "register callback" option - case 20: { - if (args[3] == mp_const_none) { - if (self->events_callback != MP_OBJ_NULL) { - usocket_events_remove(self); - self->events_callback = MP_OBJ_NULL; - } - } else { - if (self->events_callback == MP_OBJ_NULL) { - usocket_events_add(self); - } - self->events_callback = args[3]; - } - break; - } - #endif - - // level: IPPROTO_IP - case IP_ADD_MEMBERSHIP: { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); - if (bufinfo.len != sizeof(ip4_addr_t) * 2) { - mp_raise_ValueError(NULL); - } - - // POSIX setsockopt has order: group addr, if addr, lwIP has it vice-versa - err_t err = igmp_joingroup((const ip4_addr_t*)bufinfo.buf + 1, bufinfo.buf); - if (err != ERR_OK) { - mp_raise_OSError(-err); - } - break; - } - - default: - mp_printf(&mp_plat_print, "Warning: lwip.setsockopt() option not implemented\n"); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -void _socket_settimeout(socket_obj_t *sock, uint64_t timeout_ms) { - // Rather than waiting for the entire timeout specified, we wait sock->retries times - // for SOCKET_POLL_US each, checking for a MicroPython interrupt between timeouts. - // with SOCKET_POLL_MS == 100ms, sock->retries allows for timeouts up to 13 years. - // if timeout_ms == UINT64_MAX, wait forever. - sock->retries = (timeout_ms == UINT64_MAX) ? UINT_MAX : timeout_ms * 1000 / SOCKET_POLL_US; - - struct timeval timeout = { - .tv_sec = 0, - .tv_usec = timeout_ms ? SOCKET_POLL_US : 0 - }; - lwip_setsockopt_r(sock->fd, SOL_SOCKET, SO_SNDTIMEO, (const void *)&timeout, sizeof(timeout)); - lwip_setsockopt_r(sock->fd, SOL_SOCKET, SO_RCVTIMEO, (const void *)&timeout, sizeof(timeout)); - lwip_fcntl_r(sock->fd, F_SETFL, timeout_ms ? 0 : O_NONBLOCK); -} - -STATIC mp_obj_t socket_settimeout(const mp_obj_t arg0, const mp_obj_t arg1) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - if (arg1 == mp_const_none) _socket_settimeout(self, UINT64_MAX); - else _socket_settimeout(self, mp_obj_get_float(arg1) * 1000L); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_settimeout_obj, socket_settimeout); - -STATIC mp_obj_t socket_setblocking(const mp_obj_t arg0, const mp_obj_t arg1) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - if (mp_obj_is_true(arg1)) _socket_settimeout(self, UINT64_MAX); - else _socket_settimeout(self, 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); - -// XXX this can end up waiting a very long time if the content is dribbled in one character -// at a time, as the timeout resets each time a recvfrom succeeds ... this is probably not -// good behaviour. -STATIC mp_uint_t _socket_read_data(mp_obj_t self_in, void *buf, size_t size, - struct sockaddr *from, socklen_t *from_len, int *errcode) { - socket_obj_t *sock = MP_OBJ_TO_PTR(self_in); - - // If the peer closed the connection then the lwIP socket API will only return "0" once - // from lwip_recvfrom_r and then block on subsequent calls. To emulate POSIX behaviour, - // which continues to return "0" for each call on a closed socket, we set a flag when - // the peer closed the socket. - if (sock->peer_closed) { - return 0; - } - - // XXX Would be nicer to use RTC to handle timeouts - for (int i = 0; i <= sock->retries; ++i) { - MP_THREAD_GIL_EXIT(); - int r = lwip_recvfrom_r(sock->fd, buf, size, 0, from, from_len); - MP_THREAD_GIL_ENTER(); - if (r == 0) { - sock->peer_closed = true; - } - if (r >= 0) { - return r; - } - if (errno != EWOULDBLOCK) { - *errcode = errno; - return MP_STREAM_ERROR; - } - check_for_exceptions(); - } - - *errcode = sock->retries == 0 ? MP_EWOULDBLOCK : MP_ETIMEDOUT; - return MP_STREAM_ERROR; -} - -mp_obj_t _socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in, - struct sockaddr *from, socklen_t *from_len) { - size_t len = mp_obj_get_int(len_in); - vstr_t vstr; - vstr_init_len(&vstr, len); - - int errcode; - mp_uint_t ret = _socket_read_data(self_in, vstr.buf, len, from, from_len, &errcode); - if (ret == MP_STREAM_ERROR) { - exception_from_errno(errcode); - } - - vstr.len = ret; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} - -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - return _socket_recvfrom(self_in, len_in, NULL, NULL); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -STATIC mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) { - struct sockaddr from; - socklen_t fromlen = sizeof(from); - - mp_obj_t tuple[2]; - tuple[0] = _socket_recvfrom(self_in, len_in, &from, &fromlen); - - uint8_t *ip = (uint8_t*)&((struct sockaddr_in*)&from)->sin_addr; - mp_uint_t port = lwip_ntohs(((struct sockaddr_in*)&from)->sin_port); - tuple[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); - - return mp_obj_new_tuple(2, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom); - -int _socket_send(socket_obj_t *sock, const char *data, size_t datalen) { - int sentlen = 0; - for (int i=0; i<=sock->retries && sentlen < datalen; i++) { - MP_THREAD_GIL_EXIT(); - int r = lwip_write_r(sock->fd, data+sentlen, datalen-sentlen); - MP_THREAD_GIL_ENTER(); - if (r < 0 && errno != EWOULDBLOCK) exception_from_errno(errno); - if (r > 0) sentlen += r; - check_for_exceptions(); - } - if (sentlen == 0) mp_raise_OSError(MP_ETIMEDOUT); - return sentlen; -} - -STATIC mp_obj_t socket_send(const mp_obj_t arg0, const mp_obj_t arg1) { - socket_obj_t *sock = MP_OBJ_TO_PTR(arg0); - mp_uint_t datalen; - const char *data = mp_obj_str_get_data(arg1, &datalen); - int r = _socket_send(sock, data, datalen); - return mp_obj_new_int(r); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -STATIC mp_obj_t socket_sendall(const mp_obj_t arg0, const mp_obj_t arg1) { - // XXX behaviour when nonblocking (see extmod/modlwip.c) - // XXX also timeout behaviour. - socket_obj_t *sock = MP_OBJ_TO_PTR(arg0); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(arg1, &bufinfo, MP_BUFFER_READ); - int r = _socket_send(sock, bufinfo.buf, bufinfo.len); - if (r < bufinfo.len) mp_raise_OSError(MP_ETIMEDOUT); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_sendall_obj, socket_sendall); - -STATIC mp_obj_t socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) { - socket_obj_t *self = MP_OBJ_TO_PTR(self_in); - - // get the buffer to send - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data_in, &bufinfo, MP_BUFFER_READ); - - // create the destination address - struct sockaddr_in to; - to.sin_len = sizeof(to); - to.sin_family = AF_INET; - to.sin_port = lwip_htons(netutils_parse_inet_addr(addr_in, (uint8_t*)&to.sin_addr, NETUTILS_BIG)); - - // send the data - for (int i=0; i<=self->retries; i++) { - MP_THREAD_GIL_EXIT(); - int ret = lwip_sendto_r(self->fd, bufinfo.buf, bufinfo.len, 0, (struct sockaddr*)&to, sizeof(to)); - MP_THREAD_GIL_ENTER(); - if (ret > 0) return mp_obj_new_int_from_uint(ret); - if (ret == -1 && errno != EWOULDBLOCK) { - exception_from_errno(errno); - } - check_for_exceptions(); - } - mp_raise_OSError(MP_ETIMEDOUT); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(socket_sendto_obj, socket_sendto); - -STATIC mp_obj_t socket_fileno(const mp_obj_t arg0) { - socket_obj_t *self = MP_OBJ_TO_PTR(arg0); - return mp_obj_new_int(self->fd); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_fileno_obj, socket_fileno); - -STATIC mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) { - (void)n_args; - return args[0]; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 3, socket_makefile); - -STATIC mp_uint_t socket_stream_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { - return _socket_read_data(self_in, buf, size, NULL, NULL, errcode); -} - -STATIC mp_uint_t socket_stream_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - socket_obj_t *sock = self_in; - for (int i=0; i<=sock->retries; i++) { - MP_THREAD_GIL_EXIT(); - int r = lwip_write_r(sock->fd, buf, size); - MP_THREAD_GIL_ENTER(); - if (r > 0) return r; - if (r < 0 && errno != EWOULDBLOCK) { *errcode = errno; return MP_STREAM_ERROR; } - check_for_exceptions(); - } - *errcode = sock->retries == 0 ? MP_EWOULDBLOCK : MP_ETIMEDOUT; - return MP_STREAM_ERROR; -} - -STATIC mp_uint_t socket_stream_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - socket_obj_t * socket = self_in; - if (request == MP_STREAM_POLL) { - - fd_set rfds; FD_ZERO(&rfds); - fd_set wfds; FD_ZERO(&wfds); - fd_set efds; FD_ZERO(&efds); - struct timeval timeout = { .tv_sec = 0, .tv_usec = 0 }; - if (arg & MP_STREAM_POLL_RD) FD_SET(socket->fd, &rfds); - if (arg & MP_STREAM_POLL_WR) FD_SET(socket->fd, &wfds); - if (arg & MP_STREAM_POLL_HUP) FD_SET(socket->fd, &efds); - - int r = select((socket->fd)+1, &rfds, &wfds, &efds, &timeout); - if (r < 0) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - mp_uint_t ret = 0; - if (FD_ISSET(socket->fd, &rfds)) ret |= MP_STREAM_POLL_RD; - if (FD_ISSET(socket->fd, &wfds)) ret |= MP_STREAM_POLL_WR; - if (FD_ISSET(socket->fd, &efds)) ret |= MP_STREAM_POLL_HUP; - return ret; - } else if (request == MP_STREAM_CLOSE) { - if (socket->fd >= 0) { - #if MICROPY_PY_USOCKET_EVENTS - if (socket->events_callback != MP_OBJ_NULL) { - usocket_events_remove(socket); - socket->events_callback = MP_OBJ_NULL; - } - #endif - int ret = lwip_close_r(socket->fd); - if (ret != 0) { - *errcode = errno; - return MP_STREAM_ERROR; - } - socket->fd = -1; - } - return 0; - } - - *errcode = MP_EINVAL; - return MP_STREAM_ERROR; -} - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendall), MP_ROM_PTR(&socket_sendall_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_recvfrom), MP_ROM_PTR(&socket_recvfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - { MP_ROM_QSTR(MP_QSTR_settimeout), MP_ROM_PTR(&socket_settimeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, - { MP_ROM_QSTR(MP_QSTR_makefile), MP_ROM_PTR(&socket_makefile_obj) }, - { MP_ROM_QSTR(MP_QSTR_fileno), MP_ROM_PTR(&socket_fileno_obj) }, - - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -STATIC const mp_stream_p_t socket_stream_p = { - .read = socket_stream_read, - .write = socket_stream_write, - .ioctl = socket_stream_ioctl -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -STATIC mp_obj_t get_socket(size_t n_args, const mp_obj_t *args) { - socket_obj_t *sock = m_new_obj_with_finaliser(socket_obj_t); - sock->base.type = &socket_type; - sock->domain = AF_INET; - sock->type = SOCK_STREAM; - sock->proto = 0; - sock->peer_closed = false; - if (n_args > 0) { - sock->domain = mp_obj_get_int(args[0]); - if (n_args > 1) { - sock->type = mp_obj_get_int(args[1]); - if (n_args > 2) { - sock->proto = mp_obj_get_int(args[2]); - } - } - } - - sock->fd = lwip_socket(sock->domain, sock->type, sock->proto); - if (sock->fd < 0) { - exception_from_errno(errno); - } - _socket_settimeout(sock, UINT64_MAX); - - return MP_OBJ_FROM_PTR(sock); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(get_socket_obj, 0, 3, get_socket); - -STATIC mp_obj_t esp_socket_getaddrinfo(size_t n_args, const mp_obj_t *args) { - // TODO support additional args beyond the first two - - struct addrinfo *res = NULL; - _socket_getaddrinfo2(args[0], args[1], &res); - mp_obj_t ret_list = mp_obj_new_list(0, NULL); - - for (struct addrinfo *resi = res; resi; resi = resi->ai_next) { - mp_obj_t addrinfo_objs[5] = { - mp_obj_new_int(resi->ai_family), - mp_obj_new_int(resi->ai_socktype), - mp_obj_new_int(resi->ai_protocol), - mp_obj_new_str(resi->ai_canonname, strlen(resi->ai_canonname)), - mp_const_none - }; - - if (resi->ai_family == AF_INET) { - struct sockaddr_in *addr = (struct sockaddr_in *)resi->ai_addr; - // This looks odd, but it's really just a u32_t - ip4_addr_t ip4_addr = { .addr = addr->sin_addr.s_addr }; - char buf[16]; - ip4addr_ntoa_r(&ip4_addr, buf, sizeof(buf)); - mp_obj_t inaddr_objs[2] = { - mp_obj_new_str(buf, strlen(buf)), - mp_obj_new_int(ntohs(addr->sin_port)) - }; - addrinfo_objs[4] = mp_obj_new_tuple(2, inaddr_objs); - } - mp_obj_list_append(ret_list, mp_obj_new_tuple(5, addrinfo_objs)); - } - - if (res) lwip_freeaddrinfo(res); - return ret_list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_socket_getaddrinfo_obj, 2, 6, esp_socket_getaddrinfo); - -STATIC mp_obj_t esp_socket_initialize() { - static int initialized = 0; - if (!initialized) { - ESP_LOGI("modsocket", "Initializing"); - tcpip_adapter_init(); - initialized = 1; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_socket_initialize_obj, esp_socket_initialize); - -STATIC const mp_rom_map_elem_t mp_module_socket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - { MP_ROM_QSTR(MP_QSTR___init__), MP_ROM_PTR(&esp_socket_initialize_obj) }, - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&get_socket_obj) }, - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&esp_socket_getaddrinfo_obj) }, - - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(AF_INET) }, - { MP_ROM_QSTR(MP_QSTR_AF_INET6), MP_ROM_INT(AF_INET6) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(SOCK_DGRAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_RAW), MP_ROM_INT(SOCK_RAW) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(IPPROTO_TCP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_UDP), MP_ROM_INT(IPPROTO_UDP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IP), MP_ROM_INT(IPPROTO_IP) }, - { MP_ROM_QSTR(MP_QSTR_SOL_SOCKET), MP_ROM_INT(SOL_SOCKET) }, - { MP_ROM_QSTR(MP_QSTR_SO_REUSEADDR), MP_ROM_INT(SO_REUSEADDR) }, - { MP_ROM_QSTR(MP_QSTR_IP_ADD_MEMBERSHIP), MP_ROM_INT(IP_ADD_MEMBERSHIP) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_socket_globals, mp_module_socket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_socket_globals, -}; diff --git a/ports/esp32/modules/_boot.py b/ports/esp32/modules/_boot.py deleted file mode 100644 index bf40ea3a9f..0000000000 --- a/ports/esp32/modules/_boot.py +++ /dev/null @@ -1,12 +0,0 @@ -import gc -import uos -from flashbdev import bdev - -try: - if bdev: - uos.mount(bdev, '/') -except OSError: - import inisetup - vfs = inisetup.setup() - -gc.collect() diff --git a/ports/esp32/modules/apa106.py b/ports/esp32/modules/apa106.py deleted file mode 100644 index ef971d78ba..0000000000 --- a/ports/esp32/modules/apa106.py +++ /dev/null @@ -1,8 +0,0 @@ -# APA106driver for MicroPython on ESP32 -# MIT license; Copyright (c) 2016 Damien P. George - -from neopixel import NeoPixel - - -class APA106(NeoPixel): - ORDER = (0, 1, 2, 3) diff --git a/ports/esp32/modules/dht.py b/ports/esp32/modules/dht.py deleted file mode 120000 index 2aa2f5cbfe..0000000000 --- a/ports/esp32/modules/dht.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/dht/dht.py \ No newline at end of file diff --git a/ports/esp32/modules/ds18x20.py b/ports/esp32/modules/ds18x20.py deleted file mode 120000 index 9721929a3f..0000000000 --- a/ports/esp32/modules/ds18x20.py +++ /dev/null @@ -1 +0,0 @@ -../../esp8266/modules/ds18x20.py \ No newline at end of file diff --git a/ports/esp32/modules/flashbdev.py b/ports/esp32/modules/flashbdev.py deleted file mode 100644 index 935f5342fc..0000000000 --- a/ports/esp32/modules/flashbdev.py +++ /dev/null @@ -1,34 +0,0 @@ -import esp - -class FlashBdev: - - SEC_SIZE = 4096 - START_SEC = esp.flash_user_start() // SEC_SIZE - - def __init__(self, blocks): - self.blocks = blocks - - def readblocks(self, n, buf): - #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) - esp.flash_read((n + self.START_SEC) * self.SEC_SIZE, buf) - - def writeblocks(self, n, buf): - #print("writeblocks(%s, %x(%d))" % (n, id(buf), len(buf))) - #assert len(buf) <= self.SEC_SIZE, len(buf) - esp.flash_erase(n + self.START_SEC) - esp.flash_write((n + self.START_SEC) * self.SEC_SIZE, buf) - - def ioctl(self, op, arg): - #print("ioctl(%d, %r)" % (op, arg)) - if op == 4: # BP_IOCTL_SEC_COUNT - return self.blocks - if op == 5: # BP_IOCTL_SEC_SIZE - return self.SEC_SIZE - -size = esp.flash_size() -if size < 1024*1024: - # flash too small for a filesystem - bdev = None -else: - # for now we use a fixed size for the filesystem - bdev = FlashBdev(2048 * 1024 // FlashBdev.SEC_SIZE) diff --git a/ports/esp32/modules/inisetup.py b/ports/esp32/modules/inisetup.py deleted file mode 100644 index 0e9c72fe86..0000000000 --- a/ports/esp32/modules/inisetup.py +++ /dev/null @@ -1,42 +0,0 @@ -import uos -from flashbdev import bdev - -def check_bootsec(): - buf = bytearray(bdev.SEC_SIZE) - bdev.readblocks(0, buf) - empty = True - for b in buf: - if b != 0xff: - empty = False - break - if empty: - return True - fs_corrupted() - -def fs_corrupted(): - import time - while 1: - print("""\ -FAT filesystem appears to be corrupted. If you had important data there, you -may want to make a flash snapshot to try to recover it. Otherwise, perform -factory reprogramming of MicroPython firmware (completely erase flash, followed -by firmware programming). -""") - time.sleep(3) - -def setup(): - check_bootsec() - print("Performing initial setup") - uos.VfsFat.mkfs(bdev) - vfs = uos.VfsFat(bdev) - uos.mount(vfs, '/flash') - uos.chdir('/flash') - with open("boot.py", "w") as f: - f.write("""\ -# This file is executed on every boot (including wake-boot from deepsleep) -#import esp -#esp.osdebug(None) -#import webrepl -#webrepl.start() -""") - return vfs diff --git a/ports/esp32/modules/neopixel.py b/ports/esp32/modules/neopixel.py deleted file mode 100644 index 86c1586cdd..0000000000 --- a/ports/esp32/modules/neopixel.py +++ /dev/null @@ -1,33 +0,0 @@ -# NeoPixel driver for MicroPython on ESP32 -# MIT license; Copyright (c) 2016 Damien P. George - -from esp import neopixel_write - - -class NeoPixel: - ORDER = (1, 0, 2, 3) - - def __init__(self, pin, n, bpp=3, timing=0): - self.pin = pin - self.n = n - self.bpp = bpp - self.buf = bytearray(n * bpp) - self.pin.init(pin.OUT) - self.timing = timing - - def __setitem__(self, index, val): - offset = index * self.bpp - for i in range(self.bpp): - self.buf[offset + self.ORDER[i]] = val[i] - - def __getitem__(self, index): - offset = index * self.bpp - return tuple(self.buf[offset + self.ORDER[i]] - for i in range(self.bpp)) - - def fill(self, color): - for i in range(self.n): - self[i] = color - - def write(self): - neopixel_write(self.pin, self.buf, self.timing) diff --git a/ports/esp32/modules/ntptime.py b/ports/esp32/modules/ntptime.py deleted file mode 120000 index e90900d5a9..0000000000 --- a/ports/esp32/modules/ntptime.py +++ /dev/null @@ -1 +0,0 @@ -../../esp8266/modules/ntptime.py \ No newline at end of file diff --git a/ports/esp32/modules/onewire.py b/ports/esp32/modules/onewire.py deleted file mode 120000 index 091629488e..0000000000 --- a/ports/esp32/modules/onewire.py +++ /dev/null @@ -1 +0,0 @@ -../../esp8266/modules/onewire.py \ No newline at end of file diff --git a/ports/esp32/modules/umqtt/robust.py b/ports/esp32/modules/umqtt/robust.py deleted file mode 120000 index 6bfbbcf552..0000000000 --- a/ports/esp32/modules/umqtt/robust.py +++ /dev/null @@ -1 +0,0 @@ -../../../../../micropython-lib/umqtt.robust/umqtt/robust.py \ No newline at end of file diff --git a/ports/esp32/modules/umqtt/simple.py b/ports/esp32/modules/umqtt/simple.py deleted file mode 120000 index 6419a46647..0000000000 --- a/ports/esp32/modules/umqtt/simple.py +++ /dev/null @@ -1 +0,0 @@ -../../../../../micropython-lib/umqtt.simple/umqtt/simple.py \ No newline at end of file diff --git a/ports/esp32/modules/upip.py b/ports/esp32/modules/upip.py deleted file mode 120000 index 130eb69016..0000000000 --- a/ports/esp32/modules/upip.py +++ /dev/null @@ -1 +0,0 @@ -../../../tools/upip.py \ No newline at end of file diff --git a/ports/esp32/modules/upip_utarfile.py b/ports/esp32/modules/upip_utarfile.py deleted file mode 120000 index d9653d6a60..0000000000 --- a/ports/esp32/modules/upip_utarfile.py +++ /dev/null @@ -1 +0,0 @@ -../../../tools/upip_utarfile.py \ No newline at end of file diff --git a/ports/esp32/modules/upysh.py b/ports/esp32/modules/upysh.py deleted file mode 120000 index 12d100c29c..0000000000 --- a/ports/esp32/modules/upysh.py +++ /dev/null @@ -1 +0,0 @@ -../../../../micropython-lib/upysh/upysh.py \ No newline at end of file diff --git a/ports/esp32/modules/urequests.py b/ports/esp32/modules/urequests.py deleted file mode 120000 index 76661112e1..0000000000 --- a/ports/esp32/modules/urequests.py +++ /dev/null @@ -1 +0,0 @@ -../../../../micropython-lib/urequests/urequests.py \ No newline at end of file diff --git a/ports/esp32/modules/webrepl.py b/ports/esp32/modules/webrepl.py deleted file mode 120000 index 2a3987a729..0000000000 --- a/ports/esp32/modules/webrepl.py +++ /dev/null @@ -1 +0,0 @@ -../../esp8266/modules/webrepl.py \ No newline at end of file diff --git a/ports/esp32/modules/webrepl_setup.py b/ports/esp32/modules/webrepl_setup.py deleted file mode 120000 index 999888bf13..0000000000 --- a/ports/esp32/modules/webrepl_setup.py +++ /dev/null @@ -1 +0,0 @@ -../../esp8266/modules/webrepl_setup.py \ No newline at end of file diff --git a/ports/esp32/modules/websocket_helper.py b/ports/esp32/modules/websocket_helper.py deleted file mode 120000 index 4bcf3bcb6a..0000000000 --- a/ports/esp32/modules/websocket_helper.py +++ /dev/null @@ -1 +0,0 @@ -../../esp8266/modules/websocket_helper.py \ No newline at end of file diff --git a/ports/esp32/moduos.c b/ports/esp32/moduos.c deleted file mode 100644 index dc85136f3d..0000000000 --- a/ports/esp32/moduos.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Josef Gajdusek - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "esp_system.h" - -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "extmod/misc.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "genhdr/mpversion.h" - -extern const mp_obj_type_t mp_fat_vfs_type; - -STATIC const qstr os_uname_info_fields[] = { - MP_QSTR_sysname, MP_QSTR_nodename, - MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine -}; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); - -STATIC MP_DEFINE_ATTRTUPLE( - os_uname_info_obj, - os_uname_info_fields, - 5, - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - (mp_obj_t)&os_uname_info_release_obj, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj -); - -STATIC mp_obj_t os_uname(void) { - return (mp_obj_t)&os_uname_info_obj; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname); - -STATIC mp_obj_t os_urandom(mp_obj_t num) { - mp_int_t n = mp_obj_get_int(num); - vstr_t vstr; - vstr_init_len(&vstr, n); - uint32_t r = 0; - for (int i = 0; i < n; i++) { - if ((i & 3) == 0) { - r = esp_random(); // returns 32-bit hardware random number - } - vstr.buf[i] = r; - r >>= 8; - } - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom); - -#if MICROPY_PY_OS_DUPTERM -STATIC mp_obj_t os_dupterm_notify(mp_obj_t obj_in) { - (void)obj_in; - for (;;) { - int c = mp_uos_dupterm_rx_chr(); - if (c < 0) { - break; - } - ringbuf_put(&stdin_ringbuf, c); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_dupterm_notify_obj, os_dupterm_notify); -#endif - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - { MP_ROM_QSTR(MP_QSTR_uname), MP_ROM_PTR(&os_uname_obj) }, - { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&os_urandom_obj) }, - #if MICROPY_PY_OS_DUPTERM - { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&mp_uos_dupterm_obj) }, - { MP_ROM_QSTR(MP_QSTR_dupterm_notify), MP_ROM_PTR(&os_dupterm_notify_obj) }, - #endif - #if MICROPY_VFS - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&mp_vfs_rename_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) }, - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, - #if MICROPY_VFS_FAT - { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, - #endif - #endif -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t uos_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/esp32/modutime.c b/ports/esp32/modutime.c deleted file mode 100644 index 002854298b..0000000000 --- a/ports/esp32/modutime.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "lib/timeutils/timeutils.h" -#include "extmod/utime_mphal.h" - -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - timeutils_struct_time_t tm; - mp_int_t seconds; - if (n_args == 0 || args[0] == mp_const_none) { - struct timeval tv; - gettimeofday(&tv, NULL); - seconds = tv.tv_sec; - } else { - seconds = mp_obj_get_int(args[0]); - } - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - size_t len; - mp_obj_t *elem; - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "mktime needs a tuple of length 8 or 9 (%d given)", len)); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), - mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), mp_obj_get_int(elem[3]), - mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -STATIC mp_obj_t time_time(void) { - struct timeval tv; - gettimeofday(&tv, NULL); - return mp_obj_new_int(tv.tv_sec); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t utime_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h deleted file mode 100644 index 963aca2efa..0000000000 --- a/ports/esp32/mpconfigport.h +++ /dev/null @@ -1,268 +0,0 @@ -// Options to control how MicroPython is built for this port, -// overriding defaults in py/mpconfig.h. - -#include -#include -#include "rom/ets_sys.h" - -// object representation and NLR handling -#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_A) -#define MICROPY_NLR_SETJMP (1) - -// memory allocation policies -#define MICROPY_ALLOC_PATH_MAX (128) - -// emitters -#define MICROPY_PERSISTENT_CODE_LOAD (1) - -// compiler configuration -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (1) - -// optimisations -#define MICROPY_OPT_COMPUTED_GOTO (1) -#define MICROPY_OPT_MPZ_BITWISE (1) - -// Python internal features -#define MICROPY_READER_VFS (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_EMACS_KEYS (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) -#define MICROPY_WARNINGS (1) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_PY_BUILTINS_COMPLEX (1) -#define MICROPY_CPYTHON_COMPAT (1) -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_STREAMS_POSIX_API (1) -#define MICROPY_MODULE_BUILTIN_INIT (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_MODULE_FROZEN_STR (0) -#define MICROPY_MODULE_FROZEN_MPY (1) -#define MICROPY_QSTR_EXTRA_POOL mp_qstr_frozen_const_pool -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_USE_INTERNAL_PRINTF (0) // ESP32 SDK requires its own printf -#define MICROPY_ENABLE_SCHEDULER (1) -#define MICROPY_SCHEDULER_DEPTH (8) -#define MICROPY_VFS (1) -#define MICROPY_VFS_FAT (1) - -// control over Python builtins -#define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_STR_BYTES_CMP_WARN (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_CENTER (1) -#define MICROPY_PY_BUILTINS_STR_PARTITION (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_BYTEARRAY (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_SET (1) -#define MICROPY_PY_BUILTINS_SLICE (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_PROPERTY (1) -#define MICROPY_PY_BUILTINS_RANGE_ATTRS (1) -#define MICROPY_PY_BUILTINS_ROUND_INT (1) -#define MICROPY_PY_BUILTINS_TIMEOUTERROR (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_COMPILE (1) -#define MICROPY_PY_BUILTINS_ENUMERATE (1) -#define MICROPY_PY_BUILTINS_EXECFILE (1) -#define MICROPY_PY_BUILTINS_FILTER (1) -#define MICROPY_PY_BUILTINS_REVERSED (1) -#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_MIN_MAX (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT esp32_help_text -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY___FILE__ (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_ARRAY (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_ATTRTUPLE (1) -#define MICROPY_PY_COLLECTIONS (1) -#define MICROPY_PY_COLLECTIONS_DEQUE (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH (1) -#define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) -#define MICROPY_PY_CMATH (1) -#define MICROPY_PY_GC (1) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_IOBASE (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_IO_BYTESIO (1) -#define MICROPY_PY_IO_BUFFEREDWRITER (1) -#define MICROPY_PY_STRUCT (1) -#define MICROPY_PY_SYS (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_MODULES (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_STDIO_BUFFER (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_THREAD (1) -#define MICROPY_PY_THREAD_GIL (1) -#define MICROPY_PY_THREAD_GIL_VM_DIVISOR (32) - -// extended modules -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UHASHLIB_SHA1 (1) -#define MICROPY_PY_UHASHLIB_SHA256 (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UBINASCII_CRC32 (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_URANDOM_EXTRA_FUNCS (1) -#define MICROPY_PY_OS_DUPTERM (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_SPI (1) -#define MICROPY_PY_MACHINE_SPI_MSB (0) -#define MICROPY_PY_MACHINE_SPI_LSB (1) -#define MICROPY_PY_MACHINE_SPI_MAKE_NEW machine_hw_spi_make_new -#define MICROPY_HW_SOFTSPI_MIN_DELAY (0) -#define MICROPY_HW_SOFTSPI_MAX_BAUDRATE (ets_get_cpu_frequency() * 1000000 / 200) // roughly -#define MICROPY_PY_USSL (1) -#define MICROPY_SSL_MBEDTLS (1) -#define MICROPY_PY_USSL_FINALISER (1) -#define MICROPY_PY_WEBSOCKET (1) -#define MICROPY_PY_WEBREPL (1) -#define MICROPY_PY_FRAMEBUF (1) -#define MICROPY_PY_USOCKET_EVENTS (MICROPY_PY_WEBREPL) - -// fatfs configuration -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_MAX_SS (4096) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define mp_type_fileio mp_type_vfs_fat_fileio -#define mp_type_textio mp_type_vfs_fat_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_OBJ_NEW_QSTR(MP_QSTR_input), (mp_obj_t)&mp_builtin_input_obj }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_open), (mp_obj_t)&mp_builtin_open_obj }, - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t esp_module; -extern const struct _mp_obj_module_t esp32_module; -extern const struct _mp_obj_module_t utime_module; -extern const struct _mp_obj_module_t uos_module; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_machine; -extern const struct _mp_obj_module_t mp_module_network; -extern const struct _mp_obj_module_t mp_module_onewire; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_OBJ_NEW_QSTR(MP_QSTR_esp), (mp_obj_t)&esp_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_esp32), (mp_obj_t)&esp32_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_utime), (mp_obj_t)&utime_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_uos), (mp_obj_t)&uos_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_usocket), (mp_obj_t)&mp_module_usocket }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_machine), (mp_obj_t)&mp_module_machine }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_network), (mp_obj_t)&mp_module_network }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR__onewire), (mp_obj_t)&mp_module_onewire }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_uhashlib), (mp_obj_t)&mp_module_uhashlib }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_OBJ_NEW_QSTR(MP_QSTR_binascii), (mp_obj_t)&mp_module_ubinascii }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_collections), (mp_obj_t)&mp_module_collections }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_errno), (mp_obj_t)&mp_module_uerrno }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_hashlib), (mp_obj_t)&mp_module_uhashlib }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_heapq), (mp_obj_t)&mp_module_uheapq }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_io), (mp_obj_t)&mp_module_io }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_json), (mp_obj_t)&mp_module_ujson }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_os), (mp_obj_t)&uos_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_random), (mp_obj_t)&mp_module_urandom }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_re), (mp_obj_t)&mp_module_ure }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_select), (mp_obj_t)&mp_module_uselect }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_socket), (mp_obj_t)&mp_module_usocket }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_ssl), (mp_obj_t)&mp_module_ussl }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_struct), (mp_obj_t)&mp_module_ustruct }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_time), (mp_obj_t)&utime_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_zlib), (mp_obj_t)&mp_module_uzlib }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t machine_pin_irq_handler[40]; \ - -// type definitions for the specific machine - -#define BYTES_PER_WORD (4) -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p))) -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) -#define MP_SSIZE_MAX (0x7fffffff) - -// Note: these "critical nested" macros do not ensure cross-CPU exclusion, -// the only disable interrupts on the current CPU. To full manage exclusion -// one should use portENTER_CRITICAL/portEXIT_CRITICAL instead. -#include "freertos/FreeRTOS.h" -#define MICROPY_BEGIN_ATOMIC_SECTION() portENTER_CRITICAL_NESTED() -#define MICROPY_END_ATOMIC_SECTION(state) portEXIT_CRITICAL_NESTED(state) - -#if MICROPY_PY_USOCKET_EVENTS -#define MICROPY_PY_USOCKET_EVENTS_HANDLER extern void usocket_events_handler(void); usocket_events_handler(); -#else -#define MICROPY_PY_USOCKET_EVENTS_HANDLER -#endif - -#if MICROPY_PY_THREAD -#define MICROPY_EVENT_POLL_HOOK \ - do { \ - extern void mp_handle_pending(void); \ - mp_handle_pending(); \ - MICROPY_PY_USOCKET_EVENTS_HANDLER \ - MP_THREAD_GIL_EXIT(); \ - MP_THREAD_GIL_ENTER(); \ - } while (0); -#else -#define MICROPY_EVENT_POLL_HOOK \ - do { \ - extern void mp_handle_pending(void); \ - mp_handle_pending(); \ - MICROPY_PY_USOCKET_EVENTS_HANDLER \ - asm("waiti 0"); \ - } while (0); -#endif - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; -// ssize_t, off_t as required by POSIX-signatured functions in stream.h -#include - -// board specifics - -#define MICROPY_HW_BOARD_NAME "ESP32 module" -#define MICROPY_HW_MCU_NAME "ESP32" -#define MICROPY_PY_SYS_PLATFORM "esp32" diff --git a/ports/esp32/mphalport.c b/ports/esp32/mphalport.c deleted file mode 100644 index 353e1343b0..0000000000 --- a/ports/esp32/mphalport.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "rom/uart.h" - -#include "py/obj.h" -#include "py/mpstate.h" -#include "py/mphal.h" -#include "extmod/misc.h" -#include "lib/utils/pyexec.h" - -STATIC uint8_t stdin_ringbuf_array[256]; -ringbuf_t stdin_ringbuf = {stdin_ringbuf_array, sizeof(stdin_ringbuf_array)}; - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - int c = ringbuf_get(&stdin_ringbuf); - if (c != -1) { - return c; - } - MICROPY_EVENT_POLL_HOOK - vTaskDelay(1); - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, uint32_t len) { - MP_THREAD_GIL_EXIT(); - for (uint32_t i = 0; i < len; ++i) { - uart_tx_one_char(str[i]); - } - MP_THREAD_GIL_ENTER(); - mp_uos_dupterm_tx_strn(str, len); -} - -// Efficiently convert "\n" to "\r\n" -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - const char *last = str; - while (len--) { - if (*str == '\n') { - if (str > last) { - mp_hal_stdout_tx_strn(last, str - last); - } - mp_hal_stdout_tx_strn("\r\n", 2); - ++str; - last = str; - } else { - ++str; - } - } - if (str > last) { - mp_hal_stdout_tx_strn(last, str - last); - } -} - -uint32_t mp_hal_ticks_ms(void) { - return esp_timer_get_time() / 1000; -} - -uint32_t mp_hal_ticks_us(void) { - return esp_timer_get_time(); -} - -void mp_hal_delay_ms(uint32_t ms) { - uint64_t us = ms * 1000; - uint64_t dt; - uint64_t t0 = esp_timer_get_time(); - for (;;) { - uint64_t t1 = esp_timer_get_time(); - dt = t1 - t0; - if (dt + portTICK_PERIOD_MS * 1000 >= us) { - // doing a vTaskDelay would take us beyond requested delay time - break; - } - MICROPY_EVENT_POLL_HOOK - vTaskDelay(1); - } - if (dt < us) { - // do the remaining delay accurately - mp_hal_delay_us(us - dt); - } -} - -void mp_hal_delay_us(uint32_t us) { - // these constants are tested for a 240MHz clock - const uint32_t this_overhead = 5; - const uint32_t pend_overhead = 150; - - // return if requested delay is less than calling overhead - if (us < this_overhead) { - return; - } - us -= this_overhead; - - uint64_t t0 = esp_timer_get_time(); - for (;;) { - uint64_t dt = esp_timer_get_time() - t0; - if (dt >= us) { - return; - } - if (dt + pend_overhead < us) { - // we have enough time to service pending events - // (don't use MICROPY_EVENT_POLL_HOOK because it also yields) - mp_handle_pending(); - } - } -} - -// this function could do with improvements (eg use ets_delay_us) -void mp_hal_delay_us_fast(uint32_t us) { - uint32_t delay = ets_get_cpu_frequency() / 19; - while (--us) { - for (volatile uint32_t i = delay; i; --i) { - } - } -} - -/* -extern int mp_stream_errno; -int *__errno() { - return &mp_stream_errno; -} -*/ diff --git a/ports/esp32/mphalport.h b/ports/esp32/mphalport.h deleted file mode 100644 index 3215bc062c..0000000000 --- a/ports/esp32/mphalport.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef INCLUDED_MPHALPORT_H -#define INCLUDED_MPHALPORT_H - -#include "py/ringbuf.h" -#include "lib/utils/interrupt_char.h" - -extern ringbuf_t stdin_ringbuf; - -uint32_t mp_hal_ticks_us(void); -__attribute__((always_inline)) static inline uint32_t mp_hal_ticks_cpu(void) { - uint32_t ccount; - __asm__ __volatile__("rsr %0,ccount":"=a" (ccount)); - return ccount; -} - -void mp_hal_delay_us(uint32_t); -void mp_hal_delay_us_fast(uint32_t); -void mp_hal_set_interrupt_char(int c); -uint32_t mp_hal_get_cpu_freq(void); - -#define mp_hal_quiet_timing_enter() MICROPY_BEGIN_ATOMIC_SECTION() -#define mp_hal_quiet_timing_exit(irq_state) MICROPY_END_ATOMIC_SECTION(irq_state) - -// C-level pin HAL -#include "py/obj.h" -#include "driver/gpio.h" -#define MP_HAL_PIN_FMT "%u" -#define mp_hal_pin_obj_t gpio_num_t -mp_hal_pin_obj_t machine_pin_get_id(mp_obj_t pin_in); -#define mp_hal_get_pin_obj(o) machine_pin_get_id(o) -#define mp_obj_get_pin(o) machine_pin_get_id(o) // legacy name; only to support esp8266/modonewire -#define mp_hal_pin_name(p) (p) -static inline void mp_hal_pin_input(mp_hal_pin_obj_t pin) { - gpio_pad_select_gpio(pin); - gpio_set_direction(pin, GPIO_MODE_INPUT); -} -static inline void mp_hal_pin_output(mp_hal_pin_obj_t pin) { - gpio_pad_select_gpio(pin); - gpio_set_direction(pin, GPIO_MODE_INPUT_OUTPUT); -} -static inline void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin) { - gpio_pad_select_gpio(pin); - gpio_set_direction(pin, GPIO_MODE_INPUT_OUTPUT_OD); -} -static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) { - gpio_set_level(pin, 0); -} -static inline void mp_hal_pin_od_high(mp_hal_pin_obj_t pin) { - gpio_set_level(pin, 1); -} -static inline int mp_hal_pin_read(mp_hal_pin_obj_t pin) { - return gpio_get_level(pin); -} -static inline void mp_hal_pin_write(mp_hal_pin_obj_t pin, int v) { - gpio_set_level(pin, v); -} - -#endif // INCLUDED_MPHALPORT_H diff --git a/ports/esp32/mpthreadport.c b/ports/esp32/mpthreadport.c deleted file mode 100644 index 76d9431c03..0000000000 --- a/ports/esp32/mpthreadport.c +++ /dev/null @@ -1,226 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George on behalf of Pycom Ltd - * Copyright (c) 2017 Pycom Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "stdio.h" - -#include "py/mpconfig.h" -#include "py/mpstate.h" -#include "py/gc.h" -#include "py/mpthread.h" -#include "mpthreadport.h" - -#include "esp_task.h" - -#if MICROPY_PY_THREAD - -#define MP_THREAD_MIN_STACK_SIZE (4 * 1024) -#define MP_THREAD_DEFAULT_STACK_SIZE (MP_THREAD_MIN_STACK_SIZE + 1024) -#define MP_THREAD_PRIORITY (ESP_TASK_PRIO_MIN + 1) - -// this structure forms a linked list, one node per active thread -typedef struct _thread_t { - TaskHandle_t id; // system id of thread - int ready; // whether the thread is ready and running - void *arg; // thread Python args, a GC root pointer - void *stack; // pointer to the stack - StaticTask_t *tcb; // pointer to the Task Control Block - size_t stack_len; // number of words in the stack - struct _thread_t *next; -} thread_t; - -// the mutex controls access to the linked list -STATIC mp_thread_mutex_t thread_mutex; -STATIC thread_t thread_entry0; -STATIC thread_t *thread; // root pointer, handled by mp_thread_gc_others - -void mp_thread_init(void *stack, uint32_t stack_len) { - mp_thread_set_state(&mp_state_ctx.thread); - // create the first entry in the linked list of all threads - thread = &thread_entry0; - thread->id = xTaskGetCurrentTaskHandle(); - thread->ready = 1; - thread->arg = NULL; - thread->stack = stack; - thread->stack_len = stack_len; - thread->next = NULL; - mp_thread_mutex_init(&thread_mutex); -} - -void mp_thread_gc_others(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - gc_collect_root((void**)&th, 1); - gc_collect_root(&th->arg, 1); // probably not needed - if (th->id == xTaskGetCurrentTaskHandle()) { - continue; - } - if (!th->ready) { - continue; - } - gc_collect_root(th->stack, th->stack_len); // probably not needed - } - mp_thread_mutex_unlock(&thread_mutex); -} - -mp_state_thread_t *mp_thread_get_state(void) { - return pvTaskGetThreadLocalStoragePointer(NULL, 1); -} - -void mp_thread_set_state(void *state) { - vTaskSetThreadLocalStoragePointer(NULL, 1, state); -} - -void mp_thread_start(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - if (th->id == xTaskGetCurrentTaskHandle()) { - th->ready = 1; - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -STATIC void *(*ext_thread_entry)(void*) = NULL; - -STATIC void freertos_entry(void *arg) { - if (ext_thread_entry) { - ext_thread_entry(arg); - } - vTaskDelete(NULL); - for (;;); -} - -void mp_thread_create_ex(void *(*entry)(void*), void *arg, size_t *stack_size, int priority, char *name) { - // store thread entry function into a global variable so we can access it - ext_thread_entry = entry; - - if (*stack_size == 0) { - *stack_size = MP_THREAD_DEFAULT_STACK_SIZE; // default stack size - } else if (*stack_size < MP_THREAD_MIN_STACK_SIZE) { - *stack_size = MP_THREAD_MIN_STACK_SIZE; // minimum stack size - } - - // allocate TCB, stack and linked-list node (must be outside thread_mutex lock) - StaticTask_t *tcb = m_new(StaticTask_t, 1); - StackType_t *stack = m_new(StackType_t, *stack_size / sizeof(StackType_t)); - thread_t *th = m_new_obj(thread_t); - - mp_thread_mutex_lock(&thread_mutex, 1); - - // create thread - TaskHandle_t id = xTaskCreateStaticPinnedToCore(freertos_entry, name, *stack_size / sizeof(StackType_t), arg, priority, stack, tcb, 0); - if (id == NULL) { - mp_thread_mutex_unlock(&thread_mutex); - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "can't create thread")); - } - - // adjust the stack_size to provide room to recover from hitting the limit - *stack_size -= 1024; - - // add thread to linked list of all threads - th->id = id; - th->ready = 0; - th->arg = arg; - th->stack = stack; - th->tcb = tcb; - th->stack_len = *stack_size / sizeof(StackType_t); - th->next = thread; - thread = th; - - mp_thread_mutex_unlock(&thread_mutex); -} - -void mp_thread_create(void *(*entry)(void*), void *arg, size_t *stack_size) { - mp_thread_create_ex(entry, arg, stack_size, MP_THREAD_PRIORITY, "mp_thread"); -} - -void mp_thread_finish(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - if (th->id == xTaskGetCurrentTaskHandle()) { - th->ready = 0; - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -void vPortCleanUpTCB(void *tcb) { - thread_t *prev = NULL; - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; prev = th, th = th->next) { - // unlink the node from the list - if (th->tcb == tcb) { - if (prev != NULL) { - prev->next = th->next; - } else { - // move the start pointer - thread = th->next; - } - // explicitly release all its memory - m_del(StaticTask_t, th->tcb, 1); - m_del(StackType_t, th->stack, th->stack_len); - m_del(thread_t, th, 1); - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -void mp_thread_mutex_init(mp_thread_mutex_t *mutex) { - mutex->handle = xSemaphoreCreateMutexStatic(&mutex->buffer); -} - -int mp_thread_mutex_lock(mp_thread_mutex_t *mutex, int wait) { - return (pdTRUE == xSemaphoreTake(mutex->handle, wait ? portMAX_DELAY : 0)); -} - -void mp_thread_mutex_unlock(mp_thread_mutex_t *mutex) { - xSemaphoreGive(mutex->handle); -} - -void mp_thread_deinit(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - // don't delete the current task - if (th->id == xTaskGetCurrentTaskHandle()) { - continue; - } - vTaskDelete(th->id); - } - mp_thread_mutex_unlock(&thread_mutex); - // allow FreeRTOS to clean-up the threads - vTaskDelay(2); -} - -#else - -void vPortCleanUpTCB(void *tcb) { -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/esp32/mpthreadport.h b/ports/esp32/mpthreadport.h deleted file mode 100644 index 54e35d61c3..0000000000 --- a/ports/esp32/mpthreadport.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George on behalf of Pycom Ltd - * Copyright (c) 2017 Pycom Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP32_MPTHREADPORT_H -#define MICROPY_INCLUDED_ESP32_MPTHREADPORT_H - -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "freertos/semphr.h" -#include "freertos/queue.h" - -typedef struct _mp_thread_mutex_t { - SemaphoreHandle_t handle; - StaticSemaphore_t buffer; -} mp_thread_mutex_t; - -void mp_thread_init(void *stack, uint32_t stack_len); -void mp_thread_gc_others(void); -void mp_thread_deinit(void); - -#endif // MICROPY_INCLUDED_ESP32_MPTHREADPORT_H diff --git a/ports/esp32/network_lan.c b/ports/esp32/network_lan.c deleted file mode 100644 index fba4de73ab..0000000000 --- a/ports/esp32/network_lan.c +++ /dev/null @@ -1,203 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 "Eric Poulsen" - * - * Based on the ESP IDF example code which is Public Domain / CC0 - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/mphal.h" - -#include "eth_phy/phy.h" -#include "eth_phy/phy_tlk110.h" -#include "eth_phy/phy_lan8720.h" -#include "tcpip_adapter.h" - -#include "modnetwork.h" - -typedef struct _lan_if_obj_t { - mp_obj_base_t base; - int if_id; // MUST BE FIRST to match wlan_if_obj_t - bool initialized; - bool active; - uint8_t mdc_pin; - uint8_t mdio_pin; - int8_t phy_power_pin; - uint8_t phy_addr; - uint8_t phy_type; - eth_phy_check_link_func link_func; - eth_phy_power_enable_func power_func; -} lan_if_obj_t; - -const mp_obj_type_t lan_if_type; -STATIC lan_if_obj_t lan_obj = {{&lan_if_type}, ESP_IF_ETH, false, false}; - -STATIC void phy_power_enable(bool enable) { - lan_if_obj_t* self = &lan_obj; - - if (self->phy_power_pin != -1) { - - if (!enable) { - // Do the PHY-specific power_enable(false) function before powering down - self->power_func(false); - } - - gpio_pad_select_gpio(self->phy_power_pin); - gpio_set_direction(self->phy_power_pin, GPIO_MODE_OUTPUT); - if (enable) { - gpio_set_level(self->phy_power_pin, 1); - } else { - gpio_set_level(self->phy_power_pin, 0); - } - - // Allow the power up/down to take effect, min 300us - vTaskDelay(1); - - if (enable) { - // Run the PHY-specific power on operations now the PHY has power - self->power_func(true); - } - } -} - -STATIC void init_lan_rmii() { - lan_if_obj_t* self = &lan_obj; - phy_rmii_configure_data_interface_pins(); - phy_rmii_smi_configure_pins(self->mdc_pin, self->mdio_pin); -} - -STATIC mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - lan_if_obj_t* self = &lan_obj; - - if (self->initialized) { - return MP_OBJ_FROM_PTR(&lan_obj); - } - - enum { ARG_id, ARG_mdc, ARG_mdio, ARG_power, ARG_phy_addr, ARG_phy_type }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_mdc, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_mdio, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_power, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_phy_addr, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_phy_type, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (args[ARG_id].u_obj != mp_const_none) { - if (mp_obj_get_int(args[ARG_id].u_obj) != 0) { - mp_raise_ValueError("invalid LAN interface identifier"); - } - } - - self->mdc_pin = machine_pin_get_id(args[ARG_mdc].u_obj); - self->mdio_pin = machine_pin_get_id(args[ARG_mdio].u_obj); - self->phy_power_pin = args[ARG_power].u_obj == mp_const_none ? -1 : machine_pin_get_id(args[ARG_power].u_obj); - - if (args[ARG_phy_addr].u_int < 0x00 || args[ARG_phy_addr].u_int > 0x1f) { - mp_raise_ValueError("invalid phy address"); - } - - if (args[ARG_phy_type].u_int != PHY_LAN8720 && args[ARG_phy_type].u_int != PHY_TLK110) { - mp_raise_ValueError("invalid phy type"); - } - - eth_config_t config; - - switch (args[ARG_phy_type].u_int) { - case PHY_TLK110: - config = phy_tlk110_default_ethernet_config; - break; - case PHY_LAN8720: - config = phy_lan8720_default_ethernet_config; - break; - } - - self->link_func = config.phy_check_link; - - // Replace default power func with our own - self->power_func = config.phy_power_enable; - config.phy_power_enable = phy_power_enable; - - config.phy_addr = args[ARG_phy_addr].u_int; - config.gpio_config = init_lan_rmii; - config.tcpip_input = tcpip_adapter_eth_input; - - if (esp_eth_init(&config) == ESP_OK) { - self->active = false; - self->initialized = true; - } else { - mp_raise_msg(&mp_type_OSError, "esp_eth_init() failed"); - } - return MP_OBJ_FROM_PTR(&lan_obj); -} -MP_DEFINE_CONST_FUN_OBJ_KW(get_lan_obj, 0, get_lan); - -STATIC mp_obj_t lan_active(size_t n_args, const mp_obj_t *args) { - lan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - - if (n_args > 1) { - if (mp_obj_is_true(args[1])) { - self->active = (esp_eth_enable() == ESP_OK); - if (!self->active) { - mp_raise_msg(&mp_type_OSError, "ethernet enable failed"); - } - } else { - self->active = !(esp_eth_disable() == ESP_OK); - if (self->active) { - mp_raise_msg(&mp_type_OSError, "ethernet disable failed"); - } - } - } - return mp_obj_new_bool(self->active); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(lan_active_obj, 1, 2, lan_active); - -STATIC mp_obj_t lan_status(mp_obj_t self_in) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(lan_status_obj, lan_status); - -STATIC mp_obj_t lan_isconnected(mp_obj_t self_in) { - lan_if_obj_t *self = MP_OBJ_TO_PTR(self_in); - return self->active ? mp_obj_new_bool(self->link_func()) : mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(lan_isconnected_obj, lan_isconnected); - -STATIC const mp_rom_map_elem_t lan_if_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&lan_active_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&lan_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&lan_status_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&esp_ifconfig_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(lan_if_locals_dict, lan_if_locals_dict_table); - -const mp_obj_type_t lan_if_type = { - { &mp_type_type }, - .name = MP_QSTR_LAN, - .locals_dict = (mp_obj_dict_t*)&lan_if_locals_dict, -}; diff --git a/ports/esp32/partitions.csv b/ports/esp32/partitions.csv deleted file mode 100644 index 98adcd20a7..0000000000 --- a/ports/esp32/partitions.csv +++ /dev/null @@ -1,5 +0,0 @@ -# Name, Type, SubType, Offset, Size, Flags -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild -nvs, data, nvs, 0x9000, 0x6000, -phy_init, data, phy, 0xf000, 0x1000, -factory, app, factory, 0x10000, 0x180000, diff --git a/ports/esp32/sdkconfig.h b/ports/esp32/sdkconfig.h deleted file mode 100644 index f85257a192..0000000000 --- a/ports/esp32/sdkconfig.h +++ /dev/null @@ -1,191 +0,0 @@ -/* Start bootloader config */ -#define CONFIG_FLASHMODE_DIO 1 -#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1 -/* End bootloader config */ - -#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0 -#define CONFIG_BT_RESERVE_DRAM 0x0 -#define CONFIG_ULP_COPROC_RESERVE_MEM 2040 -#define CONFIG_PHY_DATA_OFFSET 0xf000 -#define CONFIG_APP_OFFSET 0x10000 - -#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 -#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS 1 -#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS 4 - -#define CONFIG_BROWNOUT_DET 1 -#define CONFIG_BROWNOUT_DET_LVL 0 -#define CONFIG_BROWNOUT_DET_LVL_SEL_0 1 - -#define CONFIG_TCPIP_TASK_STACK_SIZE 2560 -#define CONFIG_TCPIP_RECVMBOX_SIZE 32 - -#define CONFIG_ESP32_APPTRACE_DEST_NONE 1 -#define CONFIG_ESP32_PHY_MAX_TX_POWER 20 -#define CONFIG_ESP32_PANIC_PRINT_REBOOT 1 -#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1 -#define CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES 100 -#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240 -#define CONFIG_ESP32_DEFAULT_CPU_FREQ_240 1 -#define CONFIG_ESP32_DEBUG_OCDAWARE 1 -#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 2000 -#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE 1 -#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1 -#define CONFIG_ESP32_WIFI_AMPDU_ENABLED 1 -#define CONFIG_ESP32_WIFI_NVS_ENABLED 1 -#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10 -#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 0 -#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1 -#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1 -#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32 -#define CONFIG_ESP32_WIFI_RX_BA_WIN 6 -#define CONFIG_ESP32_WIFI_TX_BA_WIN 6 -#define CONFIG_ESP32_XTAL_FREQ_AUTO 1 -#define CONFIG_ESP32_XTAL_FREQ 0 -#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES 1024 -#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT 5 -#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048 - -#if CONFIG_SPIRAM_SUPPORT -#define CONFIG_SPIRAM_TYPE_ESPPSRAM32 1 -#define CONFIG_SPIRAM_SIZE 4194304 -#define CONFIG_SPIRAM_SPEED_40M 1 -#define CONFIG_SPIRAM_CACHE_WORKAROUND 1 -#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384 -#define CONFIG_SPIRAM_BOOT_INIT 1 -#define CONFIG_SPIRAM_MEMTEST 1 -#define CONFIG_SPIRAM_USE_MALLOC 1 -#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768 -#define CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY 1 -#endif - -#define CONFIG_FOUR_MAC_ADDRESS_FROM_EFUSE 1 -#define CONFIG_DMA_RX_BUF_NUM 10 -#define CONFIG_DMA_TX_BUF_NUM 10 -#define CONFIG_EMAC_TASK_PRIORITY 20 - -#define CONFIG_INT_WDT 1 -#define CONFIG_INT_WDT_TIMEOUT_MS 300 -#define CONFIG_INT_WDT_CHECK_CPU1 0 -#define CONFIG_TASK_WDT 1 -#define CONFIG_TASK_WDT_PANIC 1 -#define CONFIG_TASK_WDT_TIMEOUT_S 5 -#define CONFIG_TASK_WDT_CHECK_IDLE_TASK 0 -#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 0 - -#define CONFIG_FREERTOS_UNICORE 1 -#define CONFIG_FREERTOS_CORETIMER_0 1 -#define CONFIG_FREERTOS_HZ 100 -#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1 -#define CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION 1 -#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1 -#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 2 -#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1024 -#define CONFIG_FREERTOS_ISR_STACKSIZE 1536 -#define CONFIG_FREERTOS_BREAK_ON_SCHEDULER_START_JTAG 1 -#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16 -#define CONFIG_SUPPORT_STATIC_ALLOCATION 1 -#define CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK 1 - -#define CONFIG_MAIN_TASK_STACK_SIZE 4096 -#define CONFIG_IPC_TASK_STACK_SIZE 1024 -#define CONFIG_BTC_TASK_STACK_SIZE 3072 -#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 4096 -#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32 -#define CONFIG_TIMER_TASK_STACK_SIZE 4096 -#define CONFIG_TIMER_TASK_PRIORITY 1 -#define CONFIG_TIMER_TASK_STACK_DEPTH 2048 -#define CONFIG_TIMER_QUEUE_LENGTH 10 - -#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1 -#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1 -#define CONFIG_PHY_ENABLED 1 -#define CONFIG_WIFI_ENABLED 1 -#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1 -#define CONFIG_MEMMAP_SMP 1 - -#define CONFIG_PARTITION_TABLE_SINGLE_APP 1 -#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv" -#define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000 -#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv" - -#define CONFIG_CONSOLE_UART_BAUDRATE 115200 -#define CONFIG_CONSOLE_UART_NUM 0 -#define CONFIG_CONSOLE_UART_DEFAULT 1 - -#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1 -#define CONFIG_LOG_BOOTLOADER_LEVEL_WARN 1 -#define CONFIG_LOG_DEFAULT_LEVEL 3 -#define CONFIG_LOG_COLORS 1 -#define CONFIG_LOG_BOOTLOADER_LEVEL 2 - -#define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0 -#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1 -#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1 -#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60 -#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8 -#define CONFIG_LWIP_MAX_ACTIVE_TCP 16 -#define CONFIG_LWIP_MAX_SOCKETS 8 -#define CONFIG_LWIP_SO_REUSE 1 -#define CONFIG_LWIP_ETHARP_TRUST_IP_MAC 1 -#define CONFIG_IP_LOST_TIMER_INTERVAL 120 -#define CONFIG_UDP_RECVMBOX_SIZE 6 -#define CONFIG_TCP_MAXRTX 12 -#define CONFIG_TCP_SYNMAXRTX 6 -#define CONFIG_TCP_MSL 60000 -#define CONFIG_TCP_MSS 1436 -#define CONFIG_TCP_SND_BUF_DEFAULT 5744 -#define CONFIG_TCP_WND_DEFAULT 5744 -#define CONFIG_TCP_QUEUE_OOSEQ 1 -#define CONFIG_TCP_OVERSIZE_MSS 1 -#define CONFIG_TCP_RECVMBOX_SIZE 6 - -#define CONFIG_MBEDTLS_AES_C 1 -#define CONFIG_MBEDTLS_CCM_C 1 -#define CONFIG_MBEDTLS_ECDH_C 1 -#define CONFIG_MBEDTLS_ECDSA_C 1 -#define CONFIG_MBEDTLS_ECP_C 1 -#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1 -#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1 -#define CONFIG_MBEDTLS_GCM_C 1 -#define CONFIG_MBEDTLS_HARDWARE_AES 1 -#define CONFIG_MBEDTLS_HAVE_TIME 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1 -#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1 -#define CONFIG_MBEDTLS_PEM_PARSE_C 1 -#define CONFIG_MBEDTLS_PEM_WRITE_C 1 -#define CONFIG_MBEDTLS_RC4_DISABLED 1 -#define CONFIG_MBEDTLS_SSL_ALPN 1 -#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384 -#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1 -#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1 -#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1 -#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1 -#define CONFIG_MBEDTLS_SSL_SESSION_TICKETS 1 -#define CONFIG_MBEDTLS_TLS_CLIENT 1 -#define CONFIG_MBEDTLS_TLS_ENABLED 1 -#define CONFIG_MBEDTLS_TLS_SERVER 1 -#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1 -#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1 -#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1 - -#define CONFIG_MAKE_WARN_UNDEFINED_VARIABLES 1 -#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-" -#define CONFIG_PYTHON "python2" diff --git a/ports/esp32/uart.c b/ports/esp32/uart.c deleted file mode 100644 index 10a4ba462e..0000000000 --- a/ports/esp32/uart.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "driver/uart.h" - -#include "py/mpstate.h" -#include "py/mphal.h" - -STATIC void uart_irq_handler(void *arg); - -void uart_init(void) { - uart_isr_handle_t handle; - uart_isr_register(UART_NUM_0, uart_irq_handler, NULL, ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM, &handle); - uart_enable_rx_intr(UART_NUM_0); -} - -// all code executed in ISR must be in IRAM, and any const data must be in DRAM -STATIC void IRAM_ATTR uart_irq_handler(void *arg) { - volatile uart_dev_t *uart = &UART0; - uart->int_clr.rxfifo_full = 1; - uart->int_clr.frm_err = 1; - uart->int_clr.rxfifo_tout = 1; - while (uart->status.rxfifo_cnt) { - uint8_t c = uart->fifo.rw_byte; - if (c == mp_interrupt_char) { - // inline version of mp_keyboard_interrupt(); - MP_STATE_VM(mp_pending_exception) = MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)); - #if MICROPY_ENABLE_SCHEDULER - if (MP_STATE_VM(sched_state) == MP_SCHED_IDLE) { - MP_STATE_VM(sched_state) = MP_SCHED_PENDING; - } - #endif - } else { - // this is an inline function so will be in IRAM - ringbuf_put(&stdin_ringbuf, c); - } - } -} diff --git a/ports/esp32/uart.h b/ports/esp32/uart.h deleted file mode 100644 index 264c8b8949..0000000000 --- a/ports/esp32/uart.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Development of the code in this file was sponsored by Microbric Pty Ltd - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ESP32_UART_H -#define MICROPY_INCLUDED_ESP32_UART_H - -void uart_init(void); - -#endif // MICROPY_INCLUDED_ESP32_UART_H diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile deleted file mode 100644 index 4f23dfff1e..0000000000 --- a/ports/esp8266/Makefile +++ /dev/null @@ -1,280 +0,0 @@ -# Select the board to build for: if not given on the command line, -# then default to PYBV10. -BOARD ?= feather_huzzah -ifeq ($(wildcard boards/$(BOARD)/.),) -$(error Invalid BOARD specified) -endif - -# If the build directory is not given, make it reflect the board name. -BUILD ?= build-$(BOARD) - -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h #$(BUILD)/pins_qstr.h - -MICROPY_PY_USSL = 1 -MICROPY_SSL_AXTLS = 1 -MICROPY_FATFS = 1 -MICROPY_PY_BTREE = 1 -BTREE_DEFS_EXTRA = -DDEFPSIZE=1024 -DMINCACHE=3 - -FROZEN_DIR ?= scripts -FROZEN_MPY_DIR ?= modules - -# include py core make definitions -include $(TOP)/py/py.mk - -FWBIN = $(BUILD)/firmware.bin -PORT ?= /dev/ttyACM0 -BAUD ?= 115200 -FLASH_MODE ?= qio -FLASH_SIZE ?= detect -CROSS_COMPILE = xtensa-lx106-elf- -ESP_SDK = $(shell $(CC) -print-sysroot)/usr -ESPTOOL = esptool.py - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(ESP_SDK)/include - -# UART for "os" messages. 0 is normal UART as used by MicroPython REPL, -# 1 is debug UART (tx only), -1 to disable. -UART_OS = 0 - -CFLAGS_XTENSA = -fsingle-precision-constant -Wdouble-promotion \ - -D__ets__ -DICACHE_FLASH \ - -fno-inline-functions \ - -Wl,-EL -mlongcalls -mtext-section-literals -mforce-l32 \ - -DLWIP_OPEN_SRC - -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -Wno-strict-aliasing -std=gnu99 -nostdlib -DUART_OS=$(UART_OS) \ - $(CFLAGS_XTENSA) $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA) - -LDSCRIPT = esp8266.ld -LDFLAGS = -nostdlib -T $(LDSCRIPT) -Map=$(@:.elf=.map) --cref -LIBS = -L$(ESP_SDK)/lib -lmain -ljson -llwip_open -lpp -lnet80211 -lwpa -lphy -lnet80211 $(LDFLAGS_MOD) - -LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) -LIBS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc - -# Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -COPT = -O0 -else -CFLAGS += -fdata-sections -ffunction-sections -COPT += -Os -DNDEBUG -LDFLAGS += --gc-sections -endif - -SRC_C = \ - strtoll.c \ - main.c \ - help.c \ - esp_mphal.c \ - esp_init_data.c \ - gccollect.c \ - lexerstr32.c \ - uart.c \ - esppwm.c \ - espneopixel.c \ - intr.c \ - modpyb.c \ - modmachine.c \ - machine_pin.c \ - machine_pwm.c \ - machine_rtc.c \ - machine_adc.c \ - machine_uart.c \ - machine_wdt.c \ - machine_hspi.c \ - modesp.c \ - modnetwork.c \ - ets_alt_task.c \ - fatfs_port.c \ - posix_helpers.c \ - hspi.c \ - boards/$(BOARD)/pins.c \ - supervisor/stub/stack.c \ - supervisor/shared/translate.c \ - $(SRC_MOD) - -SRC_COMMON_HAL = \ - microcontroller/__init__.c \ - microcontroller/Pin.c \ - microcontroller/Processor.c \ - analogio/__init__.c \ - analogio/AnalogIn.c \ - analogio/AnalogOut.c \ - digitalio/__init__.c \ - digitalio/DigitalInOut.c \ - pulseio/__init__.c \ - pulseio/PulseIn.c \ - pulseio/PulseOut.c \ - pulseio/PWMOut.c \ - busio/__init__.c \ - busio/SPI.c \ - busio/UART.c \ - multiterminal/__init__.c \ - neopixel_write/__init__.c \ - os/__init__.c \ - time/__init__.c \ - board/__init__.c - - -# These don't have corresponding files in each port but are still located in -# shared-bindings to make it clear what the contents of the modules are. -SRC_BINDINGS_ENUMS = \ - digitalio/Direction.c \ - digitalio/DriveMode.c \ - digitalio/Pull.c \ - math/__init__.c \ - microcontroller/RunMode.c \ - util.c - -SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ - $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ - $(addprefix common-hal/, $(SRC_COMMON_HAL)) -SRC_SHARED_MODULE = \ - bitbangio/__init__.c \ - bitbangio/I2C.c \ - bitbangio/OneWire.c \ - bitbangio/SPI.c \ - busio/I2C.c \ - busio/OneWire.c \ - multiterminal/__init__.c \ - os/__init__.c \ - random/__init__.c \ - struct/__init__.c - -SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE)) - -EXTMOD_SRC_C = $(addprefix extmod/,\ - modlwip.c \ - modonewire.c \ - ) - -LIB_SRC_C = $(addprefix lib/,\ - libc/string0.c \ - libm/math.c \ - libm/fmodf.c \ - libm/nearbyintf.c \ - libm/ef_sqrt.c \ - libm/kf_rem_pio2.c \ - libm/kf_sin.c \ - libm/kf_cos.c \ - libm/kf_tan.c \ - libm/ef_rem_pio2.c \ - libm/sf_sin.c \ - libm/sf_cos.c \ - libm/sf_tan.c \ - libm/sf_frexp.c \ - libm/sf_modf.c \ - libm/sf_ldexp.c \ - libm/asinfacosf.c \ - libm/atanf.c \ - libm/atan2f.c \ - mp-readline/readline.c \ - netutils/netutils.c \ - timeutils/timeutils.c \ - utils/buffer_helper.c \ - utils/context_manager_helpers.c \ - utils/pyexec.c \ - utils/interrupt_char.c \ - utils/sys_stdio_mphal.c \ - ) - -ifeq ($(MICROPY_FATFS), 1) -LIB_SRC_C += \ - lib/oofatfs/ff.c \ - lib/oofatfs/option/unicode.c -endif - -DRIVERS_SRC_C = $(addprefix drivers/,\ - bus/softspi.c \ - ) - -SRC_S = \ - gchelper.s \ - -OBJ = -OBJ += $(PY_O) -OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(STM_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) $(STM_SRC_C) $(EXTMOD_SRC_C) $(DRIVERS_SRC_C) -# Append any auto-generated sources that are needed by sources listed in SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -all: - @echo "CircuitPython 4.0.0 and later do not support esp8266 boards." - -CONFVARS_FILE = $(BUILD)/confvars - -ifeq ($(wildcard $(CONFVARS_FILE)),) -$(shell $(MKDIR) -p $(BUILD)) -$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE)) -else ifneq ($(shell cat $(CONFVARS_FILE)), $(FROZEN_DIR) $(UART_OS)) -$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE)) -endif - -$(BUILD)/uart.o: $(CONFVARS_FILE) - -FROZEN_EXTRA_DEPS = $(CONFVARS_FILE) - -.PHONY: deploy - -deploy: $(FWBIN) - $(ECHO) "Writing $< to the board" - $(Q)$(ESPTOOL) --port $(PORT) --baud $(BAUD) write_flash --verify --flash_size=$(FLASH_SIZE) --flash_mode=$(FLASH_MODE) 0 $< - -erase: - $(ECHO) "Erase flash" - $(Q)$(ESPTOOL) --port $(PORT) --baud $(BAUD) erase_flash - -reset: - echo -e "\r\nimport machine; machine.reset()\r\n" >$(PORT) - -$(FWBIN): $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(ESPTOOL) elf2image $^ - $(Q)$(PYTHON) makeimg.py $(BUILD)/firmware.elf-0x00000.bin $(BUILD)/firmware.elf-0x[0-5][1-f]000.bin $@ - - -$(BUILD)/firmware.elf: $(OBJ) - $(STEPECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -512k: - $(MAKE) LDSCRIPT=esp8266_512k.ld CFLAGS_EXTRA='-DMP_CONFIGFILE=""' MICROPY_FATFS=0 MICROPY_PY_BTREE=0 - -ota: - rm -f $(BUILD)/firmware.elf $(BUILD)/firmware.elf*.bin - $(MAKE) LDSCRIPT=esp8266_ota.ld FWBIN=$(BUILD)/firmware-ota.bin - -include $(TOP)/py/mkrules.mk - -axtls: $(BUILD)/libaxtls.a - -$(BUILD)/libaxtls.a: - cd $(TOP)/lib/axtls; cp config/upyconfig config/.config - cd $(TOP)/lib/axtls; $(MAKE) ssl/version.h - cd $(TOP)/lib/axtls; $(MAKE) oldconfig -B - cd $(TOP)/lib/axtls; $(MAKE) clean - cd $(TOP)/lib/axtls; $(MAKE) all CC="$(CC)" LD="$(LD)" AR="$(AR)" CFLAGS_EXTRA="$(CFLAGS_XTENSA) -Dabort=abort_ -DRT_MAX_PLAIN_LENGTH=1024 -DRT_EXTRA=4096" - cp $(TOP)/lib/axtls/_stage/libaxtls.a $@ - -clean-modules: - git clean -f -d modules - rm -f $(BUILD)/frozen*.c diff --git a/ports/esp8266/README.md b/ports/esp8266/README.md deleted file mode 100644 index 5f0ad8073e..0000000000 --- a/ports/esp8266/README.md +++ /dev/null @@ -1,171 +0,0 @@ -MicroPython port to ESP8266 -=========================== - -This is an experimental port of MicroPython for the WiFi modules based -on Espressif ESP8266 chip. - -WARNING: The port is experimental and many APIs are subject to change. - -Supported features include: -- REPL (Python prompt) over UART0. -- Garbage collector, exceptions. -- Unicode support. -- Builtin modules: gc, array, collections, io, struct, sys, esp, network, - many more. -- Arbitrary-precision long integers and 30-bit precision floats. -- WiFi support. -- Sockets using modlwip. -- GPIO and bit-banging I2C, SPI support. -- 1-Wire and WS2812 (aka Neopixel) protocols support. -- Internal filesystem using the flash. -- WebREPL over WiFi from a browser (clients at https://github.com/micropython/webrepl). -- Modules for HTTP, MQTT, many other formats and protocols via - https://github.com/micropython/micropython-lib . - -Work-in-progress documentation is available at -http://docs.micropython.org/en/latest/esp8266/ . - -Build instructions ------------------- - -The tool chain required for the build is the OpenSource ESP SDK, which can be -found at . Clone this repository and -run `make` in its directory to build and install the SDK locally. Make sure -to add toolchain bin directory to your PATH. Read esp-open-sdk's README for -additional important information on toolchain setup. - -Travis builds, including releases are actually built using a specific -esp-open-sdk binary. The location of the binary can be seen in the -`.travis.yml` in the top-level directory of CircuitPython. This may be ahead -of or behind the pfalcon repository, depending on the specific needs of -CircuitPython. If your local system is binary-compatible with Travis -(most Ubuntu and Debian based systems are), you can download the binary and -skip building it locally. - -Add the external dependencies to the MicroPython repository checkout: -```bash -$ git submodule update --init -``` -See the README in the repository root for more information about external -dependencies. - -The MicroPython cross-compiler must be built to pre-compile some of the -built-in scripts to bytecode. This can be done using: -```bash -$ make -C mpy-cross -``` - -Then, to build MicroPython for the ESP8266, just run: -```bash -$ cd ports/esp8266 -$ make axtls -$ make -``` -This will produce binary images in the `build/` subdirectory. If you install -MicroPython to your module for the first time, or after installing any other -firmware, you should erase flash completely: - -``` -esptool.py --port /dev/ttyXXX erase_flash -``` - -Erase flash also as a troubleshooting measure, if a module doesn't behave as -expected. - -To flash MicroPython image to your ESP8266, use: -```bash -$ make deploy -``` -This will use the `esptool.py` script to download the images. You must have -your ESP module in the bootloader mode, and connected to a serial port on your PC. -The default serial port is `/dev/ttyACM0`, flash mode is `qio` and flash size is -`detect` (auto-detect based on Flash ID). To specify other values, use, eg (note -that flash size is in megabits): -```bash -$ make PORT=/dev/ttyUSB0 FLASH_MODE=qio FLASH_SIZE=32m deploy -``` - -The image produced is `build/firmware-combined.bin`, to be flashed at 0x00000. - -__512KB FlashROM version__ - -The normal build described above requires modules with at least 1MB of FlashROM -onboard. There's a special configuration for 512KB modules, which can be -built with `make 512k`. This configuration is highly limited, lacks filesystem -support, WebREPL, and has many other features disabled. It's mostly suitable -for advanced users who are interested to fine-tune options to achieve a required -setup. If you are an end user, please consider using a module with at least 1MB -of FlashROM. - -First start ------------ - -Be sure to change ESP8266's WiFi access point password ASAP, see below. - -__Serial prompt__ - -You can access the REPL (Python prompt) over UART (the same as used for -programming). -- Baudrate: 115200 - -Run `help()` for some basic information. - -__WiFi__ - -Initially, the device configures itself as a WiFi access point (AP). -- ESSID: MicroPython-xxxxxx (x’s are replaced with part of the MAC address). -- Password: micropythoN (note the upper-case N). -- IP address of the board: 192.168.4.1. -- DHCP-server is activated. -- Please be sure to change the password to something non-guessable - immediately. `help()` gives information how. - -__WebREPL__ - -Python prompt over WiFi, connecting through a browser. -- Hosted at http://micropython.org/webrepl. -- GitHub repository https://github.com/micropython/webrepl. - Please follow the instructions there. - -__upip__ - -The ESP8266 port comes with builtin `upip` package manager, which can -be used to install additional modules (see the main README for more -information): - -``` ->>> import upip ->>> upip.install("micropython-pystone_lowmem") -[...] ->>> import pystone_lowmem ->>> pystone_lowmem.main() -``` - -Downloading and installing packages may requite a lot of free memory, -if you get an error, retry immediately after the hard reset. - -Documentation -------------- - -More detailed documentation and instructions can be found at -http://docs.micropython.org/en/latest/esp8266/ , which includes Quick -Reference, Tutorial, General Information related to ESP8266 port, and -to MicroPython in general. - -Troubleshooting ---------------- - -While the port is in beta, it's known to be generally stable. If you -experience strange bootloops, crashes, lockups, here's a list to check against: - -- You didn't erase flash before programming MicroPython firmware. -- Firmware can be occasionally flashed incorrectly. Just retry. Recent - esptool.py versions have --verify option. -- Power supply you use doesn't provide enough power for ESP8266 or isn't - stable enough. -- A module/flash may be defective (not unheard of for cheap modules). - -Please consult dedicated ESP8266 forums/resources for hardware-related -problems. - -Additional information may be available by the documentation links above. diff --git a/ports/esp8266/boards/feather_huzzah/pins.c b/ports/esp8266/boards/feather_huzzah/pins.c deleted file mode 100644 index d9f03c266c..0000000000 --- a/ports/esp8266/boards/feather_huzzah/pins.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "common-hal/microcontroller/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pin_TOUT) }, - { MP_ROM_QSTR(MP_QSTR_GPIO16), MP_ROM_PTR(&pin_XPD_DCDC) }, - { MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_MTMS) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_MTMS) }, - { MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_MTDI) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_MTDI) }, - { MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_MTCK) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_MTCK) }, - { MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_MTDO) }, - { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) }, - { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, - { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_U0RXD) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_U0TXD) }, - { MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_DVDD) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_DVDD) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp8266/common-hal/analogio/AnalogIn.c b/ports/esp8266/common-hal/analogio/AnalogIn.c deleted file mode 100644 index 63580c07cb..0000000000 --- a/ports/esp8266/common-hal/analogio/AnalogIn.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/binary.h" -#include "py/mphal.h" -#include "common-hal/microcontroller/__init__.h" -#include "shared-bindings/analogio/AnalogIn.h" -#include "supervisor/shared/translate.h" - -#include "user_interface.h" - -void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, - const mcu_pin_obj_t *pin) { - if (pin != &pin_TOUT) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, translate("Pin %q does not have ADC capabilities"), pin->name)); - } - claim_pin(pin); -} - -bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t* self) { - return self->deinited; -} - -void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t* self) { - if (common_hal_analogio_analogin_deinited(self)) { - return; - } - reset_pin(&pin_TOUT); - self->deinited = true; -} - -uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { - // ADC is 10 bit so shift by 6 to make it 16-bit. - return system_adc_read() << 6; -} - -float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { - return 1.0f; -} diff --git a/ports/esp8266/common-hal/board/__init__.c b/ports/esp8266/common-hal/board/__init__.c deleted file mode 100644 index 9365f0fd96..0000000000 --- a/ports/esp8266/common-hal/board/__init__.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "common-hal/microcontroller/Pin.h" - -// Pins aren't actually defined here. They are in the board specific directory -// such as boards/feather_huzzah/pins.c. diff --git a/ports/esp8266/common-hal/busio/SPI.c b/ports/esp8266/common-hal/busio/SPI.c deleted file mode 100644 index d00997820e..0000000000 --- a/ports/esp8266/common-hal/busio/SPI.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/microcontroller/__init__.h" -#include "common-hal/busio/SPI.h" -#include "py/nlr.h" -#include "supervisor/shared/translate.h" - -#include "eagle_soc.h" -#include "ets_alt_task.h" -#include "c_types.h" -#include "gpio.h" -#include "hspi.h" - -extern const mcu_pin_obj_t pin_MTMS; -extern const mcu_pin_obj_t pin_MTCK; -extern const mcu_pin_obj_t pin_MTDI; - -void busio_spi_init_gpio(uint8_t sysclk_as_spiclk, const mcu_pin_obj_t * clock, - const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - - uint32_t clock_div_flag = 0; - if (sysclk_as_spiclk) { - clock_div_flag = 0x0001; - } - - // Set bit 9 if 80MHz sysclock required - WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div_flag<<9)); - // GPIO12 is HSPI MISO pin (Master Data In) - if (miso == &pin_MTDI) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); - } - // GPIO13 is HSPI MOSI pin (Master Data Out) - if (mosi == &pin_MTCK) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); - } - // GPIO14 is HSPI CLK pin (Clock) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); -} - - -void common_hal_busio_spi_construct(busio_spi_obj_t *self, - const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, - const mcu_pin_obj_t * miso) { - if (clock != &pin_MTMS || !((mosi == &pin_MTCK && miso == MP_OBJ_TO_PTR(mp_const_none)) || - (mosi == MP_OBJ_TO_PTR(mp_const_none) && miso == &pin_MTDI) || - (mosi == &pin_MTCK && miso == &pin_MTDI))) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - translate("Pins not valid for SPI"))); - } - - busio_spi_init_gpio(SPI_CLK_USE_DIV, clock, mosi, miso); - self->clock = clock; - self->mosi = mosi; - self->miso = miso; - - spi_clock(HSPI, SPI_CLK_PREDIV, SPI_CLK_CNTDIV); - self->frequency = SPI_CLK_FREQ; - spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - - SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CS_SETUP|SPI_CS_HOLD); - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_FLASH_MODE); -} - -bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { - return self->deinited; -} - -void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { - if (common_hal_busio_spi_deinited(self)) { - return; - } - - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 0); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDI_U); - - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 0); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTCK_U); - - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 0); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTMS_U); - - // Turn off outputs 12 - 14. - gpio_output_set(0x0, 0x0, 0x0, 0x7 << 12); - - self->deinited = true; -} - -bool common_hal_busio_spi_configure(busio_spi_obj_t *self, - uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { - if (bits != 8) { - return false; - } - if (baudrate == 80000000L) { - // Special case for full speed. - busio_spi_init_gpio(SPI_CLK_80MHZ_NODIV, self->clock, self->mosi, self->miso); - spi_clock(HSPI, 0, 0); - self->frequency = 80000000L; - } else if (baudrate > 40000000L) { - return false; - } else { - uint32_t divider = 40000000L / baudrate; - uint16_t prediv = MIN(divider, SPI_CLKDIV_PRE + 1); - uint16_t cntdiv = (divider / prediv) * 2; // cntdiv has to be even - if (cntdiv > SPI_CLKCNT_N + 1 || cntdiv == 0 || prediv == 0) { - return false; - } - busio_spi_init_gpio(SPI_CLK_USE_DIV, self->clock, self->mosi, self->miso); - spi_clock(HSPI, prediv, cntdiv); - self->frequency = 80000000L / (prediv * cntdiv); - } - spi_mode(HSPI, phase, polarity); - return true; -} - -bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { - bool success = false; - common_hal_mcu_disable_interrupts(); - if (!self->locked) { - self->locked = true; - success = true; - } - common_hal_mcu_enable_interrupts(); - return success; -} - -bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { - return self->locked; -} - -void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { - self->locked = false; -} - -bool common_hal_busio_spi_write(busio_spi_obj_t *self, - const uint8_t * data, size_t len) { - size_t chunk_size = 1024; - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - spi_tx8fast(HSPI, data[i]); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - spi_tx8fast(HSPI, data[i]); - ++i; - } - while (spi_busy(HSPI)) {}; // Wait for SPI to finish the last byte. - return true; -} - -bool common_hal_busio_spi_read(busio_spi_obj_t *self, - uint8_t * data, size_t len, uint8_t write_value) { - // Process data in chunks, let the pending tasks run in between - size_t chunk_size = 1024; // TODO this should depend on baudrate - size_t count = len / chunk_size; - size_t i = 0; - uint32_t long_write_value = ((uint32_t) write_value) << 24 | - write_value << 16 | - write_value << 8 | - write_value; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - data[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, long_write_value, 8, 0); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - data[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, long_write_value, 8, 0); - ++i; - } - return true; -} - -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - // Process data in chunks, let the pending tasks run in between - size_t chunk_size = 1024; // TODO this should depend on baudrate - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - data_in[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, data_out[i], 8, 0); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - data_in[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, data_out[i], 8, 0); - ++i; - } - return true; - -} - -uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { - return self->frequency; -} diff --git a/ports/esp8266/common-hal/busio/UART.c b/ports/esp8266/common-hal/busio/UART.c deleted file mode 100644 index e72dce639c..0000000000 --- a/ports/esp8266/common-hal/busio/UART.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "common-hal/microcontroller/__init__.h" -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/busio/UART.h" -#include "supervisor/shared/translate.h" - -#include "ets_sys.h" -#include "uart.h" - -#include "py/nlr.h" - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size) { - if (rx != mp_const_none || tx != &pin_GPIO2) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, translate("Only tx supported on UART1 (GPIO2)."))); - } - - // set baudrate - UartDev.baut_rate = baudrate; - self->baudrate = baudrate; - - // set data bits - switch (bits) { - case 5: - UartDev.data_bits = UART_FIVE_BITS; - break; - case 6: - UartDev.data_bits = UART_SIX_BITS; - break; - case 7: - UartDev.data_bits = UART_SEVEN_BITS; - break; - case 8: - UartDev.data_bits = UART_EIGHT_BITS; - break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, translate("invalid data bits"))); - break; - } - - if (parity == PARITY_NONE) { - UartDev.parity = UART_NONE_BITS; - UartDev.exist_parity = UART_STICK_PARITY_DIS; - } else { - UartDev.exist_parity = UART_STICK_PARITY_EN; - if (parity == PARITY_ODD) { - UartDev.parity = UART_ODD_BITS; - } else { - UartDev.parity = UART_EVEN_BITS; - } - } - - switch (stop) { - case 1: - UartDev.stop_bits = UART_ONE_STOP_BIT; - break; - case 2: - UartDev.stop_bits = UART_TWO_STOP_BIT; - break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, translate("invalid stop bits"))); - break; - } - - uart_setup(UART1); - self->deinited = false; -} - -bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { - return self->deinited; -} - -void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { - if (common_hal_busio_uart_deinited(self)) { - return; - } - // Switch GPIO2 back to a GPIO pin. - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2); - self->deinited = true; -} - -size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - return 0; -} - -// Write characters. -size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { - // write the data - for (size_t i = 0; i < len; ++i) { - uart_tx_one_char(UART1, *data++); - } - - // return number of bytes written - return len; -} - -uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { - return self->baudrate; -} - -void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { - UartDev.baut_rate = baudrate; - uart_setup(UART1); - self->baudrate = baudrate; -} - -uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { - return 0; -} - -void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { -} - -bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - return true; -} diff --git a/ports/esp8266/common-hal/digitalio/DigitalInOut.c b/ports/esp8266/common-hal/digitalio/DigitalInOut.c deleted file mode 100644 index 80584bb5fe..0000000000 --- a/ports/esp8266/common-hal/digitalio/DigitalInOut.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" - -#include "shared-bindings/digitalio/DigitalInOut.h" -#include "supervisor/shared/translate.h" -#include "common-hal/microcontroller/Pin.h" - -extern volatile bool gpio16_in_use; - -digitalinout_result_t common_hal_digitalio_digitalinout_construct( - digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { - self->pin = pin; - if (self->pin->gpio_number == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); // mux configuration for XPD_DCDC and rtc_gpio0 connection - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); //mux configuration for out enable - WRITE_PERI_REG(RTC_GPIO_ENABLE, READ_PERI_REG(RTC_GPIO_ENABLE) & ~1); //out disable - claim_pin(pin); - } else { - PIN_FUNC_SELECT(self->pin->peripheral, self->pin->gpio_function); - } - return DIGITALINOUT_OK; -} - -bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { - return self->pin == mp_const_none; -} - -void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { - if (common_hal_digitalio_digitalinout_deinited(self)) { - return; - } - if (self->pin->gpio_number < 16) { - uint32_t pin_mask = 1 << self->pin->gpio_number; - gpio_output_set(0x0, 0x0, 0x0, pin_mask); - PIN_FUNC_SELECT(self->pin->peripheral, 0); - PIN_PULLUP_DIS(self->pin->peripheral); - } else { - reset_pin(self->pin); - } - self->pin = mp_const_none; -} - -void common_hal_digitalio_digitalinout_switch_to_input( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { - self->output = false; - - if (self->pin->gpio_number == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - } else { - PIN_PULLUP_DIS(self->pin->peripheral); - gpio_output_set(0, 0, 0, 1 << self->pin->gpio_number); - } - common_hal_digitalio_digitalinout_set_pull(self, pull); -} - -void common_hal_digitalio_digitalinout_switch_to_output( - digitalio_digitalinout_obj_t* self, bool value, - digitalio_drive_mode_t drive_mode) { - self->output = true; - self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; - if (self->pin->gpio_number == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); // output - } else if (!self->open_drain) { - gpio_output_set(0, 0, 1 << self->pin->gpio_number, 0); - PIN_PULLUP_DIS(self->pin->peripheral); - } - common_hal_digitalio_digitalinout_set_value(self, value); -} - -digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( - digitalio_digitalinout_obj_t* self) { - return self->output? DIRECTION_OUTPUT : DIRECTION_INPUT; -} - -void common_hal_digitalio_digitalinout_set_value( - digitalio_digitalinout_obj_t* self, bool value) { - if (self->pin->gpio_number == 16) { - if (self->open_drain && value) { - // configure GPIO16 as input with output register holding 0 - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & 1)); // out=1 - return; - } else { - int out_en = self->output; - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | out_en); - WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1) | value); - return; - } - } - if (value) { - if (self->open_drain) { - // Disable output. - gpio_output_set(0, 0, 0, 1 << self->pin->gpio_number); - } else { - // Set high - gpio_output_set(1 << self->pin->gpio_number, 0, 0, 0); - } - } else { - if (self->open_drain) { - // Enable the output - gpio_output_set(0, 0, 1 << self->pin->gpio_number, 0); - } - // Set low - gpio_output_set(0, 1 << self->pin->gpio_number, 0, 0); - } -} - -// Register addresses taken from: https://github.com/esp8266/esp8266-wiki/wiki/gpio-registers -volatile uint32_t* PIN_DIR = (uint32_t *) 0x6000030C; -volatile uint32_t* PIN_OUT = (uint32_t *) 0x60000300; -bool common_hal_digitalio_digitalinout_get_value( - digitalio_digitalinout_obj_t* self) { - if (!self->output) { - if (self->pin->gpio_number == 16) { - return READ_PERI_REG(RTC_GPIO_IN_DATA) & 1; - } - return GPIO_INPUT_GET(self->pin->gpio_number); - } else { - if (self->pin->gpio_number == 16) { - if (self->open_drain && READ_PERI_REG(RTC_GPIO_ENABLE) == 0) { - return true; - } else { - return READ_PERI_REG(RTC_GPIO_OUT) & 1; - } - } else { - uint32_t pin_mask = 1 << self->pin->gpio_number; - if (self->open_drain && ((*PIN_DIR) & pin_mask) == 0) { - return true; - } else { - return ((*PIN_OUT) & pin_mask) != 0; - } - } - } -} - -void common_hal_digitalio_digitalinout_set_drive_mode( - digitalio_digitalinout_obj_t* self, - digitalio_drive_mode_t drive_mode) { - bool value = common_hal_digitalio_digitalinout_get_value(self); - self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; - // True is implemented differently between modes so reset the value to make - // sure its correct for the new mode. - if (value) { - common_hal_digitalio_digitalinout_set_value(self, value); - } -} - -digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( - digitalio_digitalinout_obj_t* self) { - if (self->open_drain) { - return DRIVE_MODE_OPEN_DRAIN; - } else { - return DRIVE_MODE_PUSH_PULL; - } -} - -void common_hal_digitalio_digitalinout_set_pull( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { - if (pull == PULL_DOWN) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("ESP8266 does not support pull down."))); - return; - } - if (self->pin->gpio_number == 16) { - // PULL_DOWN is the only hardware pull direction available on GPIO16. - // since we don't support pull down, just return without attempting - // to set pull (which won't work anyway). If PULL_UP is requested, - // raise the exception so the user knows PULL_UP is not available - if (pull != PULL_NONE){ - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("GPIO16 does not support pull up."))); - } - return; - } - if (pull == PULL_NONE) { - PIN_PULLUP_DIS(self->pin->peripheral); - } else { - PIN_PULLUP_EN(self->pin->peripheral); - } -} - -digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( - digitalio_digitalinout_obj_t* self) { - if (self->pin->gpio_number < 16 && - (READ_PERI_REG(self->pin->peripheral) & PERIPHS_IO_MUX_PULLUP) != 0) { - return PULL_UP; - } - return PULL_NONE; -} diff --git a/ports/esp8266/common-hal/microcontroller/Pin.c b/ports/esp8266/common-hal/microcontroller/Pin.c deleted file mode 100644 index 4437d58550..0000000000 --- a/ports/esp8266/common-hal/microcontroller/Pin.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/microcontroller/__init__.h" -#include "common-hal/microcontroller/__init__.h" -#include "common-hal/microcontroller/Pin.h" -#include "shared-bindings/microcontroller/Pin.h" - -#include "py/mphal.h" - -#include "eagle_soc.h" - -bool adc_in_use; -bool gpio16_in_use; - -typedef struct { - void (*func)(void *); - void *data; -} pin_intr_handler_t; - -static pin_intr_handler_t _pin_intr_handlers[GPIO_PIN_COUNT]; - -void microcontroller_pin_call_intr_handlers(uint32_t status) { - status &= (1 << GPIO_PIN_COUNT) - 1; - for (int p = 0; status; ++p, status >>= 1) { - if ((status & 1) && _pin_intr_handlers[p].func) { - _pin_intr_handlers[p].func(_pin_intr_handlers[p].data); - } - } -} - -void microcontroller_pin_register_intr_handler(uint8_t gpio_number, void (*func)(void *), void *data) { - common_hal_mcu_disable_interrupts(); - _pin_intr_handlers[gpio_number] = (pin_intr_handler_t){ func, data }; - common_hal_mcu_enable_interrupts(); -} - -bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { - if (pin == &pin_TOUT) { - return !adc_in_use; - } - if (pin == &pin_XPD_DCDC) { - return !gpio16_in_use; - } - if (pin->gpio_number == NO_GPIO) { - return false; - } - return (READ_PERI_REG(pin->peripheral) & - (PERIPHS_IO_MUX_FUNC<gpio_number)) == 0 && - (READ_PERI_REG(pin->peripheral) & PERIPHS_IO_MUX_PULLUP) == 0; -} - -void claim_pin(const mcu_pin_obj_t* pin) { - if (pin == &pin_XPD_DCDC) { - gpio16_in_use = true; - } - if (pin == &pin_TOUT) { - adc_in_use = true; - } -} - -void reset_pin(const mcu_pin_obj_t* pin) { - if (pin == &pin_XPD_DCDC) { - // Set GPIO16 as input - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); // mux configuration for XPD_DCDC and rtc_gpio0 connection - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); //mux configuration for out enable - WRITE_PERI_REG(RTC_GPIO_ENABLE, READ_PERI_REG(RTC_GPIO_ENABLE) & ~1); //out disable - gpio16_in_use = false; - } - if (pin == &pin_TOUT) { - adc_in_use = false; - } -} - -void reset_pins(void) { - for (int i = 0; i < 16; i++) { - // 5 is RXD, 6 is TXD - if ((i > 4 && i < 13) || i == 12) { - continue; - } - uint32_t peripheral = PERIPHS_IO_MUX + i * 4; - PIN_FUNC_SELECT(peripheral, 0); - PIN_PULLUP_DIS(peripheral); - // Disable the pin. - gpio_output_set(0x0, 0x0, 0x0, 1 << i); - } - // Set GPIO16 as input - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); // mux configuration for XPD_DCDC and rtc_gpio0 connection - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); //mux configuration for out enable - WRITE_PERI_REG(RTC_GPIO_ENABLE, READ_PERI_REG(RTC_GPIO_ENABLE) & ~1); //out disable - - adc_in_use = false; - gpio16_in_use = false; -} diff --git a/ports/esp8266/common-hal/microcontroller/Pin.h b/ports/esp8266/common-hal/microcontroller/Pin.h deleted file mode 100644 index b00a4a817e..0000000000 --- a/ports/esp8266/common-hal/microcontroller/Pin.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PIN_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PIN_H - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - qstr name; - uint8_t gpio_number; - uint8_t gpio_function; - uint32_t peripheral; -} mcu_pin_obj_t; - -// Magic values for gpio_number. -#define NO_GPIO 0xff -#define SPECIAL_CASE 0xfe - -void claim_pin(const mcu_pin_obj_t* pin); -void reset_pin(const mcu_pin_obj_t* pin); -void reset_pins(void); - -void microcontroller_pin_register_intr_handler(uint8_t gpio_number, void (*func)(void *), void *data); -void microcontroller_pin_call_intr_handlers(uint32_t status); - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/esp8266/common-hal/microcontroller/__init__.c b/ports/esp8266/common-hal/microcontroller/__init__.c deleted file mode 100644 index de9288a775..0000000000 --- a/ports/esp8266/common-hal/microcontroller/__init__.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" - -#include "common-hal/microcontroller/Pin.h" -#include "common-hal/microcontroller/Processor.h" - -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/microcontroller/Pin.h" -#include "shared-bindings/microcontroller/Processor.h" -#include "supervisor/shared/translate.h" - -#include "eagle_soc.h" -#include "ets_alt_task.h" -#include "etshal.h" -#include "osapi.h" -#include "user_interface.h" -#include "xtirq.h" - -#define ETS_LOOP_ITER_BIT (12) - -void common_hal_mcu_delay_us(uint32_t delay) { - os_delay_us(delay); -} - -static uint16_t saved_interrupt_state; -void common_hal_mcu_disable_interrupts() { - saved_interrupt_state = disable_irq(); - saved_interrupt_state = (saved_interrupt_state & ~(1 << ETS_LOOP_ITER_BIT)) | (ets_loop_iter_disable << ETS_LOOP_ITER_BIT); - ets_loop_iter_disable = 1; -} - -void common_hal_mcu_enable_interrupts() { - ets_loop_iter_disable = (saved_interrupt_state >> ETS_LOOP_ITER_BIT) & 1; - enable_irq(saved_interrupt_state & ~(1 << ETS_LOOP_ITER_BIT)); -} - -void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { - if (runmode == RUNMODE_BOOTLOADER) { - mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); - } else if (runmode == RUNMODE_SAFE_MODE) { - mp_raise_ValueError(translate("ESP8226 does not support safe mode.")); - } -} - -void common_hal_mcu_reset(void) { - system_restart(); -} - -// The singleton microcontroller.Processor object, returned by microcontroller.cpu -// It currently only has properties, and no state. -const mcu_processor_obj_t common_hal_mcu_processor_obj = { - .base = { - .type = &mcu_processor_type, - }, -}; - -// This macro is used to simplify pin definition in boards//pins.c -#define PIN(p_name, p_gpio_number, p_gpio_function, p_peripheral) \ -const mcu_pin_obj_t pin_## p_name = { \ - { &mcu_pin_type }, \ - .name = MP_QSTR_ ## p_name, \ - .gpio_number = p_gpio_number, \ - .gpio_function = p_gpio_function, \ - .peripheral = p_peripheral, \ -} - -// Using microcontroller names from the datasheet. -// https://cdn-shop.adafruit.com/datasheets/ESP8266_Specifications_English.pdf -// PIN(mcu name) // function notes | module name | huzzah name -PIN(TOUT, NO_GPIO, NO_GPIO, NO_GPIO); // adc | ADC | ADC -PIN(XPD_DCDC, 16, SPECIAL_CASE, SPECIAL_CASE); // gpio16 | GPIO16 | GPIO16 -PIN(MTMS, 14, FUNC_GPIO14, PERIPHS_IO_MUX_MTMS_U); // gpio14 / hspi_clk / pwm2 | GPIO14 | GPIO14/SCK -PIN(MTDI, 12, FUNC_GPIO12, PERIPHS_IO_MUX_MTDI_U); // gpio12 / hspi_miso / pwm0 | GPIO12 | GPIO12/MISO -PIN(MTCK, 13, FUNC_GPIO13, PERIPHS_IO_MUX_MTCK_U); // gpio13 / hspi_mosi / U0cts | GPIO13 | GPIO13/MOSI -PIN(MTDO, 15, FUNC_GPIO15, PERIPHS_IO_MUX_MTDO_U); // gpio15 / hspi_cs / u0rts / pwm1 | GPIO15 | GPIO15 -PIN(GPIO2, 2, FUNC_GPIO2, PERIPHS_IO_MUX_GPIO2_U); // U1txd | GPIO2 | GPIO2 -PIN(GPIO0, 0, FUNC_GPIO0, PERIPHS_IO_MUX_GPIO0_U); // spi_Cs2 | GPIO0 | GPIO0 -PIN(GPIO4, 4, FUNC_GPIO4, PERIPHS_IO_MUX_GPIO4_U); // pwm3 on mcu datasheet as vdd which must be wrong | GPIO4 | GPIO4/SDA -PIN(SD_DATA_2, 9, FUNC_GPIO9, PERIPHS_IO_MUX_SD_DATA2_U); // spihd / hspihd / gpio9 | GPIO9 -PIN(SD_DATA_3, 10, FUNC_GPIO10, PERIPHS_IO_MUX_SD_DATA3_U); // spiwp / hspiwp / gpio10 | GPIO10 -PIN(SD_CMD, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_CMD_U); // spi_cs0 / gpio11 | CS0 -PIN(SD_CLK, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_CLK_U); // spi_clk / gpio6 | SCLK -PIN(SD_DATA_0, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_DATA0_U); // spi_miso / gpio7 | MISO -PIN(SD_DATA_1, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_DATA1_U); // spi_mosi / gpio8 / u1rxd | MOSI -PIN(DVDD, 5, FUNC_GPIO5, PERIPHS_IO_MUX_GPIO5_U); // gpio5 | GPIO5 | GPIO5/SCL -PIN(U0RXD, 3, FUNC_GPIO3, PERIPHS_IO_MUX_U0RXD_U); // gpio3 | RXD0 | RXD -PIN(U0TXD, 1, FUNC_GPIO1, PERIPHS_IO_MUX_U0TXD_U); // gpio1 / spi_cs1 | TXD0 | TXD - -// This maps MCU pin names to pin objects. -STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_TOUT), MP_ROM_PTR(&pin_TOUT) }, - { MP_ROM_QSTR(MP_QSTR_XPD_DCDC), MP_ROM_PTR(&pin_XPD_DCDC) }, - { MP_ROM_QSTR(MP_QSTR_MTMS), MP_ROM_PTR(&pin_MTMS) }, - { MP_ROM_QSTR(MP_QSTR_MTDI), MP_ROM_PTR(&pin_MTDI) }, - { MP_ROM_QSTR(MP_QSTR_MTCK), MP_ROM_PTR(&pin_MTCK) }, - { MP_ROM_QSTR(MP_QSTR_MTDO), MP_ROM_PTR(&pin_MTDO) }, - { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) }, - { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, - { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_2), MP_ROM_PTR(&pin_SD_DATA_2) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_3), MP_ROM_PTR(&pin_SD_DATA_3) }, - { MP_ROM_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_SD_CMD) }, - { MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_SD_CLK) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_0), MP_ROM_PTR(&pin_SD_DATA_0) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_1), MP_ROM_PTR(&pin_SD_DATA_1) }, - { MP_ROM_QSTR(MP_QSTR_DVDD), MP_ROM_PTR(&pin_DVDD) }, - { MP_ROM_QSTR(MP_QSTR_U0RXD), MP_ROM_PTR(&pin_U0RXD) }, - { MP_ROM_QSTR(MP_QSTR_U0TXD), MP_ROM_PTR(&pin_U0TXD) }, -}; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/esp8266/common-hal/microcontroller/__init__.h b/ports/esp8266/common-hal/microcontroller/__init__.h deleted file mode 100644 index 89be4cbb03..0000000000 --- a/ports/esp8266/common-hal/microcontroller/__init__.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER___INIT___H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER___INIT___H - -#include "common-hal/microcontroller/Pin.h" - -extern const mcu_pin_obj_t pin_TOUT; -extern const mcu_pin_obj_t pin_XPD_DCDC; -extern const mcu_pin_obj_t pin_MTMS; -extern const mcu_pin_obj_t pin_MTDI; -extern const mcu_pin_obj_t pin_MTCK; -extern const mcu_pin_obj_t pin_MTDO; -extern const mcu_pin_obj_t pin_GPIO2; -extern const mcu_pin_obj_t pin_GPIO0; -extern const mcu_pin_obj_t pin_GPIO4; -extern const mcu_pin_obj_t pin_SD_DATA_2; -extern const mcu_pin_obj_t pin_SD_DATA_3; -extern const mcu_pin_obj_t pin_SD_CMD; -extern const mcu_pin_obj_t pin_SD_CLK; -extern const mcu_pin_obj_t pin_SD_DATA_0; -extern const mcu_pin_obj_t pin_SD_DATA_1; -extern const mcu_pin_obj_t pin_DVDD; -extern const mcu_pin_obj_t pin_U0RXD; -extern const mcu_pin_obj_t pin_U0TXD; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER___INIT___H diff --git a/ports/esp8266/common-hal/pulseio/PWMOut.c b/ports/esp8266/common-hal/pulseio/PWMOut.c deleted file mode 100644 index f3a7bbc5ad..0000000000 --- a/ports/esp8266/common-hal/pulseio/PWMOut.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "esppwm.h" - -#include "py/runtime.h" -#include "shared-bindings/pulseio/PWMOut.h" -#include "supervisor/shared/translate.h" - -#include "eagle_soc.h" -#include "c_types.h" -#include "gpio.h" - -#define PWM_FREQ_MAX 1000 - -// Shared with pybpwm -extern bool pwm_inited; -bool first_channel_variable; - -void pwmout_reset(void) { - first_channel_variable = false; -} - -void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, const mcu_pin_obj_t* pin, uint16_t duty, uint32_t frequency, - bool variable_frequency) { - if (frequency > PWM_FREQ_MAX) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - translate("Maximum PWM frequency is %dhz."), PWM_FREQ_MAX)); - } else if (frequency < 1) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("Minimum PWM frequency is 1hz."))); - } - - // start the PWM subsystem if it's not already running - if (!pwm_inited) { - pwm_init(); - pwm_inited = true; - pwm_set_freq(frequency, 0); - first_channel_variable = variable_frequency; - } else if (first_channel_variable || pwm_get_freq(0) != frequency) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - translate("Multiple PWM frequencies not supported. PWM already set to %dhz."), pwm_get_freq(0))); - } - - self->channel = pwm_add(pin->gpio_number, - pin->peripheral, - pin->gpio_function); - self->pin = pin; - if (self->channel == -1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - translate("PWM not supported on pin %d"), pin->gpio_number)); - } -} - -bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { - return self->pin == mp_const_none; -} - -void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { - if (common_hal_pulseio_pwmout_deinited(self)) { - return; - } - pwm_delete(self->channel); - pwm_start(); - if (self->pin->gpio_number < 16) { - uint32_t pin_mask = 1 << self->pin->gpio_number; - gpio_output_set(0x0, 0x0, 0x0, pin_mask); - PIN_FUNC_SELECT(self->pin->peripheral, 0); - PIN_PULLUP_DIS(self->pin->peripheral); - } - self->pin = mp_const_none; -} - -void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { - // We get 16 bits of duty in but the underlying code is only ten bit. - pwm_set_duty(duty >> 6, self->channel); - pwm_start(); -} - -uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { - return pwm_get_duty(self->channel) << 6; -} - -void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { - if (frequency > PWM_FREQ_MAX) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - translate("Maximum PWM frequency is %dhz."), PWM_FREQ_MAX)); - } else if (frequency < 1) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("Minimum PWM frequency is 1hz."))); - } - pwm_set_freq(frequency, 0); -} - -uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { - return pwm_get_freq(0); -} - -bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { - return first_channel_variable; -} diff --git a/ports/esp8266/common-hal/storage/__init__.c b/ports/esp8266/common-hal/storage/__init__.c deleted file mode 100644 index 71a2aca398..0000000000 --- a/ports/esp8266/common-hal/storage/__init__.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "shared-bindings/storage/__init__.h" -#include "supervisor/shared/translate.h" - -void common_hal_storage_remount(const char* mount_path, bool readonly) { - mp_raise_NotImplementedError(translate("Unable to remount filesystem")); -} - -void common_hal_storage_erase_filesystem() { - mp_raise_NotImplementedError(translate("Use esptool to erase flash and re-upload Python instead")); -} diff --git a/ports/esp8266/eagle.rom.addr.v6.ld b/ports/esp8266/eagle.rom.addr.v6.ld deleted file mode 100644 index 1b3ce55d01..0000000000 --- a/ports/esp8266/eagle.rom.addr.v6.ld +++ /dev/null @@ -1,351 +0,0 @@ -PROVIDE ( Cache_Read_Disable = 0x400047f0 ); -PROVIDE ( Cache_Read_Enable = 0x40004678 ); -PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 ); -PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c ); -PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 ); -PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 ); -PROVIDE ( GetUartDevice = 0x40003f4c ); -PROVIDE ( MD5Final = 0x40009900 ); -PROVIDE ( MD5Init = 0x40009818 ); -PROVIDE ( MD5Update = 0x40009834 ); -PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 ); -PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c ); -PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 ); -PROVIDE ( RcvMsg = 0x40003eac ); -PROVIDE ( SHA1Final = 0x4000b648 ); -PROVIDE ( SHA1Init = 0x4000b584 ); -PROVIDE ( SHA1Transform = 0x4000a364 ); -PROVIDE ( SHA1Update = 0x4000b5a8 ); -PROVIDE ( SPI_read_status = 0x400043c8 ); -PROVIDE ( SPI_write_status = 0x40004400 ); -PROVIDE ( SPI_write_enable = 0x4000443c ); -PROVIDE ( Wait_SPI_Idle = 0x4000448c ); -PROVIDE ( Enable_QMode = 0x400044c0 ); -PROVIDE ( SPIEraseArea = 0x40004b44 ); -PROVIDE ( SPIEraseBlock = 0x400049b4 ); -PROVIDE ( SPIEraseChip = 0x40004984 ); -PROVIDE ( SPIEraseSector = 0x40004a00 ); -PROVIDE ( SPILock = 0x400048a8 ); -PROVIDE ( SPIParamCfg = 0x40004c2c ); -PROVIDE ( SPIRead = 0x40004b1c ); -PROVIDE ( SPIReadModeCnfig = 0x400048ec ); -PROVIDE ( SPIUnlock = 0x40004878 ); -PROVIDE ( SPIWrite = 0x40004a4c ); -PROVIDE ( SelectSpiFunction = 0x40003f58 ); -PROVIDE ( SendMsg = 0x40003cf4 ); -PROVIDE ( UartConnCheck = 0x40003230 ); -PROVIDE ( UartConnectProc = 0x400037a0 ); -PROVIDE ( UartDwnLdProc = 0x40003368 ); -PROVIDE ( UartGetCmdLn = 0x40003ef4 ); -PROVIDE ( UartRegReadProc = 0x4000381c ); -PROVIDE ( UartRegWriteProc = 0x400037ac ); -PROVIDE ( UartRxString = 0x40003c30 ); -PROVIDE ( Uart_Init = 0x40003a14 ); -PROVIDE ( _DebugExceptionVector = 0x40000010 ); -PROVIDE ( _DoubleExceptionVector = 0x40000070 ); -PROVIDE ( _KernelExceptionVector = 0x40000030 ); -PROVIDE ( _NMIExceptionVector = 0x40000020 ); -PROVIDE ( _ResetHandler = 0x400000a4 ); -PROVIDE ( _ResetVector = 0x40000080 ); -PROVIDE ( _UserExceptionVector = 0x40000050 ); -__adddf3 = 0x4000c538; -__addsf3 = 0x4000c180; -__divdf3 = 0x4000cb94; -__divdi3 = 0x4000ce60; -__divsi3 = 0x4000dc88; -__extendsfdf2 = 0x4000cdfc; -__fixdfsi = 0x4000ccb8; -__fixunsdfsi = 0x4000cd00; -__fixunssfsi = 0x4000c4c4; -__floatsidf = 0x4000e2f0; -__floatsisf = 0x4000e2ac; -__floatunsidf = 0x4000e2e8; -__floatunsisf = 0x4000e2a4; -__muldf3 = 0x4000c8f0; -__muldi3 = 0x40000650; -__mulsf3 = 0x4000c3dc; -__subdf3 = 0x4000c688; -__subsf3 = 0x4000c268; -__truncdfsf2 = 0x4000cd5c; -__udivdi3 = 0x4000d310; -__udivsi3 = 0x4000e21c; -__umoddi3 = 0x4000d770; -__umodsi3 = 0x4000e268; -__umulsidi3 = 0x4000dcf0; -PROVIDE ( _rom_store = 0x4000e388 ); -PROVIDE ( _rom_store_table = 0x4000e328 ); -PROVIDE ( _start = 0x4000042c ); -PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 ); -PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 ); -PROVIDE ( _xtos_cause3_handler = 0x40000590 ); -PROVIDE ( _xtos_ints_off = 0x4000bda4 ); -PROVIDE ( _xtos_ints_on = 0x4000bd84 ); -PROVIDE ( _xtos_l1int_handler = 0x4000048c ); -PROVIDE ( _xtos_p_none = 0x4000dbf8 ); -PROVIDE ( _xtos_restore_intlevel = 0x4000056c ); -PROVIDE ( _xtos_return_from_exc = 0x4000dc54 ); -PROVIDE ( _xtos_set_exception_handler = 0x40000454 ); -PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 ); -PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 ); -PROVIDE ( _xtos_set_intlevel = 0x4000dbfc ); -PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 ); -PROVIDE ( _xtos_set_vpri = 0x40000574 ); -PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 ); -PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 ); -PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c ); -PROVIDE ( aes_decrypt = 0x400092d4 ); -PROVIDE ( aes_decrypt_deinit = 0x400092e4 ); -PROVIDE ( aes_decrypt_init = 0x40008ea4 ); -PROVIDE ( aes_unwrap = 0x40009410 ); -PROVIDE ( base64_decode = 0x40009648 ); -PROVIDE ( base64_encode = 0x400094fc ); -PROVIDE ( bzero = 0x4000de84 ); -PROVIDE ( cmd_parse = 0x40000814 ); -PROVIDE ( conv_str_decimal = 0x40000b24 ); -PROVIDE ( conv_str_hex = 0x40000cb8 ); -PROVIDE ( convert_para_str = 0x40000a60 ); -PROVIDE ( dtm_get_intr_mask = 0x400026d0 ); -PROVIDE ( dtm_params_init = 0x4000269c ); -PROVIDE ( dtm_set_intr_mask = 0x400026c8 ); -PROVIDE ( dtm_set_params = 0x400026dc ); -PROVIDE ( eprintf = 0x40001d14 ); -PROVIDE ( eprintf_init_buf = 0x40001cb8 ); -PROVIDE ( eprintf_to_host = 0x40001d48 ); -PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 ); -PROVIDE ( est_reset_printf_buf_len = 0x4000249c ); -PROVIDE ( ets_bzero = 0x40002ae8 ); -PROVIDE ( ets_char2xdigit = 0x40002b74 ); -PROVIDE ( ets_delay_us = 0x40002ecc ); -PROVIDE ( ets_enter_sleep = 0x400027b8 ); -PROVIDE ( ets_external_printf = 0x40002578 ); -PROVIDE ( ets_get_cpu_frequency = 0x40002f0c ); -PROVIDE ( ets_getc = 0x40002bcc ); -PROVIDE ( ets_install_external_printf = 0x40002450 ); -PROVIDE ( ets_install_putc1 = 0x4000242c ); -PROVIDE ( ets_install_putc2 = 0x4000248c ); -PROVIDE ( ets_install_uart_printf = 0x40002438 ); -PROVIDE ( ets_intr_lock = 0x40000f74 ); -PROVIDE ( ets_intr_unlock = 0x40000f80 ); -PROVIDE ( ets_isr_attach = 0x40000f88 ); -PROVIDE ( ets_isr_mask = 0x40000f98 ); -PROVIDE ( ets_isr_unmask = 0x40000fa8 ); -PROVIDE ( ets_memcmp = 0x400018d4 ); -PROVIDE ( ets_memcpy = 0x400018b4 ); -PROVIDE ( ets_memmove = 0x400018c4 ); -PROVIDE ( ets_memset = 0x400018a4 ); -PROVIDE ( _ets_post = 0x40000e24 ); -PROVIDE ( ets_printf = 0x400024cc ); -PROVIDE ( ets_putc = 0x40002be8 ); -PROVIDE ( ets_rtc_int_register = 0x40002a40 ); -PROVIDE ( _ets_run = 0x40000e04 ); -PROVIDE ( _ets_set_idle_cb = 0x40000dc0 ); -PROVIDE ( ets_set_user_start = 0x40000fbc ); -PROVIDE ( ets_str2macaddr = 0x40002af8 ); -PROVIDE ( ets_strcmp = 0x40002aa8 ); -PROVIDE ( ets_strcpy = 0x40002a88 ); -PROVIDE ( ets_strlen = 0x40002ac8 ); -PROVIDE ( ets_strncmp = 0x40002ab8 ); -PROVIDE ( ets_strncpy = 0x40002a98 ); -PROVIDE ( ets_strstr = 0x40002ad8 ); -PROVIDE ( _ets_task = 0x40000dd0 ); -PROVIDE ( ets_timer_arm = 0x40002cc4 ); -PROVIDE ( ets_timer_disarm = 0x40002d40 ); -PROVIDE ( ets_timer_done = 0x40002d80 ); -PROVIDE ( ets_timer_handler_isr = 0x40002da8 ); -PROVIDE ( _ets_timer_init = 0x40002e68 ); -PROVIDE ( ets_timer_setfn = 0x40002c48 ); -PROVIDE ( ets_uart_printf = 0x40002544 ); -PROVIDE ( ets_update_cpu_frequency = 0x40002f04 ); -PROVIDE ( ets_vprintf = 0x40001f00 ); -PROVIDE ( ets_wdt_disable = 0x400030f0 ); -PROVIDE ( ets_wdt_enable = 0x40002fa0 ); -PROVIDE ( ets_wdt_get_mode = 0x40002f34 ); -PROVIDE ( ets_wdt_init = 0x40003170 ); -PROVIDE ( ets_wdt_restore = 0x40003158 ); -PROVIDE ( ets_write_char = 0x40001da0 ); -PROVIDE ( get_first_seg = 0x4000091c ); -PROVIDE ( gpio_init = 0x40004c50 ); -PROVIDE ( gpio_input_get = 0x40004cf0 ); -PROVIDE ( gpio_intr_ack = 0x40004dcc ); -PROVIDE ( gpio_intr_handler_register = 0x40004e28 ); -PROVIDE ( gpio_intr_pending = 0x40004d88 ); -PROVIDE ( gpio_intr_test = 0x40004efc ); -PROVIDE ( gpio_output_set = 0x40004cd0 ); -PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 ); -PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 ); -PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 ); -PROVIDE ( gpio_register_get = 0x40004d5c ); -PROVIDE ( gpio_register_set = 0x40004d04 ); -PROVIDE ( hmac_md5 = 0x4000a2cc ); -PROVIDE ( hmac_md5_vector = 0x4000a160 ); -PROVIDE ( hmac_sha1 = 0x4000ba28 ); -PROVIDE ( hmac_sha1_vector = 0x4000b8b4 ); -PROVIDE ( lldesc_build_chain = 0x40004f40 ); -PROVIDE ( lldesc_num2link = 0x40005050 ); -PROVIDE ( lldesc_set_owner = 0x4000507c ); -PROVIDE ( main = 0x40000fec ); -PROVIDE ( md5_vector = 0x400097ac ); -PROVIDE ( mem_calloc = 0x40001c2c ); -PROVIDE ( mem_free = 0x400019e0 ); -PROVIDE ( mem_init = 0x40001998 ); -PROVIDE ( mem_malloc = 0x40001b40 ); -PROVIDE ( mem_realloc = 0x40001c6c ); -PROVIDE ( mem_trim = 0x40001a14 ); -PROVIDE ( mem_zalloc = 0x40001c58 ); -PROVIDE ( memcmp = 0x4000dea8 ); -PROVIDE ( memcpy = 0x4000df48 ); -PROVIDE ( memmove = 0x4000e04c ); -PROVIDE ( memset = 0x4000e190 ); -PROVIDE ( multofup = 0x400031c0 ); -PROVIDE ( pbkdf2_sha1 = 0x4000b840 ); -PROVIDE ( phy_get_romfuncs = 0x40006b08 ); -PROVIDE ( rand = 0x40000600 ); -PROVIDE ( rc4_skip = 0x4000dd68 ); -PROVIDE ( recv_packet = 0x40003d08 ); -PROVIDE ( remove_head_space = 0x40000a04 ); -PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 ); -PROVIDE ( rijndaelKeySetupEnc = 0x40009300 ); -PROVIDE ( rom_abs_temp = 0x400060c0 ); -PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 ); -PROVIDE ( rom_cal_tos_v50 = 0x40007a28 ); -PROVIDE ( rom_chip_50_set_channel = 0x40006f84 ); -PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 ); -PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec ); -PROVIDE ( rom_chip_v5_rx_init = 0x4000711c ); -PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c ); -PROVIDE ( rom_chip_v5_tx_init = 0x4000718c ); -PROVIDE ( rom_dc_iq_est = 0x4000615c ); -PROVIDE ( rom_en_pwdet = 0x400061b8 ); -PROVIDE ( rom_get_bb_atten = 0x40006238 ); -PROVIDE ( rom_get_corr_power = 0x40006260 ); -PROVIDE ( rom_get_fm_sar_dout = 0x400062dc ); -PROVIDE ( rom_get_noisefloor = 0x40006394 ); -PROVIDE ( rom_get_power_db = 0x400063b0 ); -PROVIDE ( rom_i2c_readReg = 0x40007268 ); -PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c ); -PROVIDE ( rom_i2c_writeReg = 0x400072d8 ); -PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c ); -PROVIDE ( rom_iq_est_disable = 0x40006400 ); -PROVIDE ( rom_iq_est_enable = 0x40006430 ); -PROVIDE ( rom_linear_to_db = 0x40006484 ); -PROVIDE ( rom_mhz2ieee = 0x400065a4 ); -PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 ); -PROVIDE ( rom_pbus_debugmode = 0x4000737c ); -PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 ); -PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 ); -PROVIDE ( rom_pbus_force_test = 0x4000747c ); -PROVIDE ( rom_pbus_rd = 0x400074d8 ); -PROVIDE ( rom_pbus_set_rxgain = 0x4000754c ); -PROVIDE ( rom_pbus_set_txgain = 0x40007610 ); -PROVIDE ( rom_pbus_workmode = 0x40007648 ); -PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 ); -PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc ); -PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc ); -PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 ); -PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 ); -PROVIDE ( rom_phy_reset_req = 0x40007804 ); -PROVIDE ( rom_restart_cal = 0x4000781c ); -PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 ); -PROVIDE ( rom_rfcal_rxiq = 0x4000804c ); -PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 ); -PROVIDE ( rom_rfcal_txcap = 0x40008388 ); -PROVIDE ( rom_rfcal_txiq = 0x40008610 ); -PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 ); -PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 ); -PROVIDE ( rom_rfpll_reset = 0x40007868 ); -PROVIDE ( rom_rfpll_set_freq = 0x40007968 ); -PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c ); -PROVIDE ( rom_rxiq_get_mis = 0x40006628 ); -PROVIDE ( rom_sar_init = 0x40006738 ); -PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c ); -PROVIDE ( rom_set_channel_freq = 0x40006c50 ); -PROVIDE ( rom_set_loopback_gain = 0x400067c8 ); -PROVIDE ( rom_set_noise_floor = 0x40006830 ); -PROVIDE ( rom_set_rxclk_en = 0x40006550 ); -PROVIDE ( rom_set_txbb_atten = 0x40008c6c ); -PROVIDE ( rom_set_txclk_en = 0x4000650c ); -PROVIDE ( rom_set_txiq_cal = 0x40008d34 ); -PROVIDE ( rom_start_noisefloor = 0x40006874 ); -PROVIDE ( rom_start_tx_tone = 0x400068b4 ); -PROVIDE ( rom_stop_tx_tone = 0x4000698c ); -PROVIDE ( rom_tx_mac_disable = 0x40006a98 ); -PROVIDE ( rom_tx_mac_enable = 0x40006ad4 ); -PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c ); -PROVIDE ( rom_write_rfpll_sdm = 0x400078dc ); -PROVIDE ( roundup2 = 0x400031b4 ); -PROVIDE ( rtc_enter_sleep = 0x40002870 ); -PROVIDE ( rtc_get_reset_reason = 0x400025e0 ); -PROVIDE ( rtc_intr_handler = 0x400029ec ); -PROVIDE ( rtc_set_sleep_mode = 0x40002668 ); -PROVIDE ( save_rxbcn_mactime = 0x400027a4 ); -PROVIDE ( save_tsf_us = 0x400027ac ); -PROVIDE ( send_packet = 0x40003c80 ); -PROVIDE ( sha1_prf = 0x4000ba48 ); -PROVIDE ( sha1_vector = 0x4000a2ec ); -PROVIDE ( sip_alloc_to_host_evt = 0x40005180 ); -PROVIDE ( sip_get_ptr = 0x400058a8 ); -PROVIDE ( sip_get_state = 0x40005668 ); -PROVIDE ( sip_init_attach = 0x4000567c ); -PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c ); -PROVIDE ( sip_install_rx_data_cb = 0x4000545c ); -PROVIDE ( sip_post = 0x400050fc ); -PROVIDE ( sip_post_init = 0x400056c4 ); -PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c ); -PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 ); -PROVIDE ( sip_send = 0x40005808 ); -PROVIDE ( sip_to_host_chain_append = 0x40005864 ); -PROVIDE ( sip_to_host_evt_send_done = 0x40005234 ); -PROVIDE ( slc_add_credits = 0x400060ac ); -PROVIDE ( slc_enable = 0x40005d90 ); -PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 ); -PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 ); -PROVIDE ( slc_init_attach = 0x40005c50 ); -PROVIDE ( slc_init_credit = 0x4000608c ); -PROVIDE ( slc_pause_from_host = 0x40006014 ); -PROVIDE ( slc_reattach = 0x40005c1c ); -PROVIDE ( slc_resume_from_host = 0x4000603c ); -PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 ); -PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 ); -PROVIDE ( slc_send_to_host_chain = 0x40005de4 ); -PROVIDE ( slc_set_host_io_max_window = 0x40006068 ); -PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 ); -PROVIDE ( software_reset = 0x4000264c ); -PROVIDE ( spi_flash_attach = 0x40004644 ); -PROVIDE ( srand = 0x400005f0 ); -PROVIDE ( strcmp = 0x4000bdc8 ); -PROVIDE ( strcpy = 0x4000bec8 ); -PROVIDE ( strlen = 0x4000bf4c ); -PROVIDE ( strncmp = 0x4000bfa8 ); -PROVIDE ( strncpy = 0x4000c0a0 ); -PROVIDE ( strstr = 0x4000e1e0 ); -PROVIDE ( timer_insert = 0x40002c64 ); -PROVIDE ( uartAttach = 0x4000383c ); -PROVIDE ( uart_baudrate_detect = 0x40003924 ); -PROVIDE ( uart_buff_switch = 0x400038a4 ); -PROVIDE ( uart_div_modify = 0x400039d8 ); -PROVIDE ( uart_rx_intr_handler = 0x40003bbc ); -PROVIDE ( uart_rx_one_char = 0x40003b8c ); -PROVIDE ( uart_rx_one_char_block = 0x40003b64 ); -PROVIDE ( uart_rx_readbuff = 0x40003ec8 ); -PROVIDE ( uart_tx_one_char = 0x40003b30 ); -PROVIDE ( wepkey_128 = 0x4000bc40 ); -PROVIDE ( wepkey_64 = 0x4000bb3c ); -PROVIDE ( xthal_bcopy = 0x40000688 ); -PROVIDE ( xthal_copy123 = 0x4000074c ); -PROVIDE ( xthal_get_ccompare = 0x4000dd4c ); -PROVIDE ( xthal_get_ccount = 0x4000dd38 ); -PROVIDE ( xthal_get_interrupt = 0x4000dd58 ); -PROVIDE ( xthal_get_intread = 0x4000dd58 ); -PROVIDE ( xthal_memcpy = 0x400006c4 ); -PROVIDE ( xthal_set_ccompare = 0x4000dd40 ); -PROVIDE ( xthal_set_intclear = 0x4000dd60 ); -PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 ); -PROVIDE ( xthal_window_spill = 0x4000e324 ); -PROVIDE ( xthal_window_spill_nw = 0x4000e320 ); - -PROVIDE ( Te0 = 0x3fffccf0 ); -PROVIDE ( Td0 = 0x3fffd100 ); -PROVIDE ( Td4s = 0x3fffd500); -PROVIDE ( rcons = 0x3fffd0f0); -PROVIDE ( UartDev = 0x3fffde10 ); -PROVIDE ( flashchip = 0x3fffc714); diff --git a/ports/esp8266/esp8266.ld b/ports/esp8266/esp8266.ld deleted file mode 100644 index 3d244f6ad8..0000000000 --- a/ports/esp8266/esp8266.ld +++ /dev/null @@ -1,12 +0,0 @@ -/* GNU linker script for ESP8266 */ - -MEMORY -{ - dport0_0_seg : org = 0x3ff00000, len = 0x10 - dram0_0_seg : org = 0x3ffe8000, len = 0x14000 - iram1_0_seg : org = 0x40100000, len = 0x8000 - irom0_0_seg : org = 0x40209000, len = 0x91000 -} - -/* define common sections and symbols */ -INCLUDE esp8266_common.ld diff --git a/ports/esp8266/esp8266_512k.ld b/ports/esp8266/esp8266_512k.ld deleted file mode 100644 index 0ae663db11..0000000000 --- a/ports/esp8266/esp8266_512k.ld +++ /dev/null @@ -1,12 +0,0 @@ -/* GNU linker script for ESP8266 */ - -MEMORY -{ - dport0_0_seg : org = 0x3ff00000, len = 0x10 - dram0_0_seg : org = 0x3ffe8000, len = 0x14000 - iram1_0_seg : org = 0x40100000, len = 0x8000 - irom0_0_seg : org = 0x40209000, len = 0x72000 -} - -/* define common sections and symbols */ -INCLUDE esp8266_common.ld diff --git a/ports/esp8266/esp8266_common.ld b/ports/esp8266/esp8266_common.ld deleted file mode 100644 index c355105ff4..0000000000 --- a/ports/esp8266/esp8266_common.ld +++ /dev/null @@ -1,315 +0,0 @@ -/* GNU linker script for ESP8266, common sections and symbols */ - -/* define the top of RAM */ -_heap_end = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); - -PHDRS -{ - dport0_0_phdr PT_LOAD; - dram0_0_phdr PT_LOAD; - dram0_0_bss_phdr PT_LOAD; - iram1_0_phdr PT_LOAD; - irom0_0_phdr PT_LOAD; -} - -ENTRY(firmware_start) -EXTERN(_DebugExceptionVector) -EXTERN(_DoubleExceptionVector) -EXTERN(_KernelExceptionVector) -EXTERN(_NMIExceptionVector) -EXTERN(_UserExceptionVector) - -_firmware_size = ORIGIN(irom0_0_seg) + LENGTH(irom0_0_seg) - 0x40200000; - -PROVIDE(_memmap_vecbase_reset = 0x40000000); - -/* Various memory-map dependent cache attribute settings: */ -_memmap_cacheattr_wb_base = 0x00000110; -_memmap_cacheattr_wt_base = 0x00000110; -_memmap_cacheattr_bp_base = 0x00000220; -_memmap_cacheattr_unused_mask = 0xFFFFF00F; -_memmap_cacheattr_wb_trapnull = 0x2222211F; -_memmap_cacheattr_wba_trapnull = 0x2222211F; -_memmap_cacheattr_wbna_trapnull = 0x2222211F; -_memmap_cacheattr_wt_trapnull = 0x2222211F; -_memmap_cacheattr_bp_trapnull = 0x2222222F; -_memmap_cacheattr_wb_strict = 0xFFFFF11F; -_memmap_cacheattr_wt_strict = 0xFFFFF11F; -_memmap_cacheattr_bp_strict = 0xFFFFF22F; -_memmap_cacheattr_wb_allvalid = 0x22222112; -_memmap_cacheattr_wt_allvalid = 0x22222112; -_memmap_cacheattr_bp_allvalid = 0x22222222; -PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); - -SECTIONS -{ - - .dport0.rodata : ALIGN(4) - { - _dport0_rodata_start = ABSOLUTE(.); - *(.dport0.rodata) - *(.dport.rodata) - _dport0_rodata_end = ABSOLUTE(.); - } >dport0_0_seg :dport0_0_phdr - - .dport0.literal : ALIGN(4) - { - _dport0_literal_start = ABSOLUTE(.); - *(.dport0.literal) - *(.dport.literal) - _dport0_literal_end = ABSOLUTE(.); - } >dport0_0_seg :dport0_0_phdr - - .dport0.data : ALIGN(4) - { - _dport0_data_start = ABSOLUTE(.); - *(.dport0.data) - *(.dport.data) - _dport0_data_end = ABSOLUTE(.); - } >dport0_0_seg :dport0_0_phdr - - .irom0.text : ALIGN(4) - { - _irom0_text_start = ABSOLUTE(.); - *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) - - /* Vendor SDK in v2.1.0-7-gb8fd588 started to build these with - -ffunction-sections -fdata-sections, and require routing to - irom via linker: - https://github.com/espressif/ESP8266_NONOS_SDK/commit/b8fd588a33f0319dc135523b51655e97b483b205 - */ - - *libcrypto.a:(.literal.* .text.*) - *libnet80211.a:(.literal.* .text.*) - *libwpa.a:(.literal.* .text.*) - *libwpa2.a:(.literal.* .text.*) - - /* we put some specific text in this section */ - - *common-hal/*.o*(.literal* .text*) - *shared-bindings/*.o*(.literal* .text*) - *shared-module/*.o*(.literal* .text*) - *supervisor/*.o*(.literal* .text*) - - *py/argcheck.o*(.literal* .text*) - *py/asm*.o*(.literal* .text*) - *py/bc.o*(.literal* .text*) - *py/binary.o*(.literal* .text*) - *py/builtin*.o*(.literal* .text*) - *py/compile.o*(.literal* .text*) - *py/emit*.o*(.literal* .text*) - *py/persistentcode*.o*(.literal* .text*) - *py/formatfloat.o*(.literal* .text*) - *py/frozenmod.o*(.literal* .text*) - *py/gc.o*(.literal* .text*) - *py/reader*.o*(.literal* .text*) - *py/lexer*.o*(.literal* .text*) - *py/malloc*.o*(.literal* .text*) - *py/map*.o*(.literal* .text*) - *py/mod*.o*(.literal* .text*) - *py/mpprint.o*(.literal* .text*) - *py/mpstate.o*(.literal* .text*) - *py/mpz.o*(.literal* .text*) - *py/native*.o*(.literal* .text*) - *py/nlr*.o*(.literal* .text*) - *py/obj*.o*(.literal* .text*) - *py/opmethods.o*(.literal* .text*) - *py/parse*.o*(.literal* .text*) - *py/qstr.o*(.literal* .text*) - *py/repl.o*(.literal* .text*) - *py/runtime.o*(.literal* .text*) - *py/scheduler.o*(.literal* .text*) - *py/scope.o*(.literal* .text*) - *py/sequence.o*(.literal* .text*) - *py/showbc.o*(.literal* .text*) - *py/smallint.o*(.literal* .text*) - *py/stackctrl.o*(.literal* .text*) - *py/stream.o*(.literal* .text*) - *py/unicode.o*(.literal* .text*) - *py/vm.o*(.literal* .text*) - *py/vstr.o*(.literal* .text*) - *py/warning.o*(.literal* .text*) - - *extmod/*.o*(.literal* .text*) - - *lib/oofatfs/*.o*(.literal*, .text*) - */libaxtls.a:(.literal*, .text*) - *lib/berkeley-db-1.xx/*.o(.literal*, .text*) - *lib/libm/*.o*(.literal*, .text*) - *lib/mp-readline/*.o(.literal*, .text*) - *lib/netutils/*.o*(.literal*, .text*) - *lib/timeutils/*.o*(.literal*, .text*) - *lib/utils/*.o*(.literal*, .text*) - *drivers/bus/*.o(.literal* .text*) - - build*/main.o(.literal* .text*) - *gccollect.o(.literal* .text*) - *gchelper.o(.literal* .text*) - *help.o(.literal* .text*) - *lexerstr32.o(.literal* .text*) - *utils.o(.literal* .text*) - *modpyb.o(.literal*, .text*) - *machine_pin.o(.literal*, .text*) - *machine_pwm.o(.literal*, .text*) - *machine_rtc.o(.literal*, .text*) - *machine_adc.o(.literal*, .text*) - *machine_uart.o(.literal*, .text*) - *modpybi2c.o(.literal*, .text*) - *modmachine.o(.literal*, .text*) - *machine_wdt.o(.literal*, .text*) - *machine_spi.o(.literal*, .text*) - *machine_hspi.o(.literal*, .text*) - *hspi.o(.literal*, .text*) - *modesp.o(.literal* .text*) - *modnetwork.o(.literal* .text*) - *moduos.o(.literal* .text*) - *modutime.o(.literal* .text*) - *modlwip.o(.literal* .text*) - *modsocket.o(.literal* .text*) - *modonewire.o(.literal* .text*) - - /* we put as much rodata as possible in this section */ - /* note that only rodata accessed as a machine word is allowed here */ - *py/qstr.o(.rodata.const_pool) - *.o(.rodata.mp_type_*) /* catches type: mp_obj_type_t */ - *.o(.rodata.*_locals_dict*) /* catches types: mp_obj_dict_t, mp_map_elem_t */ - *.o(.rodata.mp_module_*) /* catches types: mp_obj_module_t, mp_obj_dict_t, mp_map_elem_t */ - */frozen.o(.rodata.mp_frozen_sizes) /* frozen modules */ - */frozen.o(.rodata.mp_frozen_content) /* frozen modules */ - - /* for -mforce-l32 */ - build*/*.o(.rodata*) - - _irom0_text_end = ABSOLUTE(.); - } >irom0_0_seg :irom0_0_phdr - - .text : ALIGN(4) - { - _stext = .; - _text_start = ABSOLUTE(.); - *(.UserEnter.text) - . = ALIGN(16); - *(.DebugExceptionVector.text) - . = ALIGN(16); - *(.NMIExceptionVector.text) - . = ALIGN(16); - *(.KernelExceptionVector.text) - LONG(0) - LONG(0) - LONG(0) - LONG(0) - . = ALIGN(16); - *(.UserExceptionVector.text) - LONG(0) - LONG(0) - LONG(0) - LONG(0) - . = ALIGN(16); - *(.DoubleExceptionVector.text) - LONG(0) - LONG(0) - LONG(0) - LONG(0) - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - *(.literal .text .literal.* .text.* .iram0.literal .iram0.text .iram0.text.*.literal .iram0.text.*) - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.fini.literal) - *(.fini) - *(.gnu.version) - _text_end = ABSOLUTE(.); - _etext = .; - } >iram1_0_seg :iram1_0_phdr - - .lit4 : ALIGN(4) - { - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - } >iram1_0_seg :iram1_0_phdr - - .data : ALIGN(4) - { - _data_start = ABSOLUTE(.); - *(.data) - *(.data.*) - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - _data_end = ABSOLUTE(.); - } >dram0_0_seg :dram0_0_phdr - - .rodata : ALIGN(4) - { - _rodata_start = ABSOLUTE(.); - *(.sdk.version) - *(.rodata) - *(.rodata.*) - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - *(.eh_frame) - /* C++ constructor and destructor tables, properly ordered: */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - . = ALIGN(4); /* this table MUST be 4-byte aligned */ - _bss_table_start = ABSOLUTE(.); - LONG(_bss_start) - LONG(_bss_end) - _bss_table_end = ABSOLUTE(.); - _rodata_end = ABSOLUTE(.); - } >dram0_0_seg :dram0_0_phdr - - .bss ALIGN(8) (NOLOAD) : ALIGN(4) - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - *(.bss) - *(.bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - _heap_start = ABSOLUTE(.); - } >dram0_0_seg :dram0_0_bss_phdr -} - -/* get ROM code address */ -INCLUDE "eagle.rom.addr.v6.ld" diff --git a/ports/esp8266/esp8266_ota.ld b/ports/esp8266/esp8266_ota.ld deleted file mode 100644 index 604480a0a9..0000000000 --- a/ports/esp8266/esp8266_ota.ld +++ /dev/null @@ -1,13 +0,0 @@ -/* GNU linker script for ESP8266 */ - -MEMORY -{ - dport0_0_seg : org = 0x3ff00000, len = 0x10 - dram0_0_seg : org = 0x3ffe8000, len = 0x14000 - iram1_0_seg : org = 0x40100000, len = 0x8000 - /* 0x3c000 is size of bootloader, 0x9000 is size of packed RAM segments */ - irom0_0_seg : org = 0x40200000 + 0x3c000 + 0x9000, len = 0x8f000 -} - -/* define common sections and symbols */ -INCLUDE esp8266_common.ld diff --git a/ports/esp8266/esp_init_data.c b/ports/esp8266/esp_init_data.c deleted file mode 100644 index b14de573a7..0000000000 --- a/ports/esp8266/esp_init_data.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "ets_sys.h" -#include "etshal.h" -#include "esp_mphal.h" -#include "user_interface.h" -#include "extmod/misc.h" - -NORETURN void call_user_start(void); -void ets_printf(const char *fmt, ...); -extern char flashchip; - -static const uint8_t default_init_data[] __attribute__((aligned(4))) = { -0x05, 0x00, 0x04, 0x02, 0x05, 0x05, 0x05, 0x02, 0x05, 0x00, 0x04, 0x05, 0x05, 0x04, 0x05, 0x05, -0x04, 0xfe, 0xfd, 0xff, 0xf0, 0xf0, 0xf0, 0xe0, 0xe0, 0xe0, 0xe1, 0x0a, 0xff, 0xff, 0xf8, 0x00, -0xf8, 0xf8, 0x52, 0x4e, 0x4a, 0x44, 0x40, 0x38, 0x00, 0x00, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05, -0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0xe1, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x93, 0x43, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -void firmware_start(void) { - // For SDK 1.5.2, either address has shifted and not mirrored in - // eagle.rom.addr.v6.ld, or extra initial member was added. - SpiFlashChip *flash = (SpiFlashChip*)(&flashchip + 4); - - char buf[128]; - SPIRead(flash->chip_size - 4 * 0x1000, buf, sizeof(buf)); - /*for (int i = 0; i < sizeof(buf); i++) { - static char hexf[] = "%x "; - ets_printf(hexf, buf[i]); - }*/ - - bool inited = false; - for (int i = 0; i < sizeof(buf); i++) { - if (buf[i] != 0xff) { - inited = true; - break; - } - } - - if (!inited) { - static char msg[] = "Writing init data\n"; - ets_printf(msg); - SPIRead((uint32_t)&default_init_data - 0x40200000, buf, sizeof(buf)); - SPIWrite(flash->chip_size - 4 * 0x1000, buf, sizeof(buf)); - } - - asm("j call_user_start"); -} diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c deleted file mode 100644 index 33d7f2d847..0000000000 --- a/ports/esp8266/esp_mphal.c +++ /dev/null @@ -1,215 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "ets_sys.h" -#include "etshal.h" -#include "uart.h" -#include "esp_mphal.h" -#include "user_interface.h" -#include "ets_alt_task.h" -#include "py/runtime.h" -#include "extmod/misc.h" -#include "lib/utils/pyexec.h" -#include "supervisor/shared/translate.h" - -STATIC byte input_buf_array[256]; -ringbuf_t stdin_ringbuf = {input_buf_array, sizeof(input_buf_array)}; -void mp_hal_debug_tx_strn_cooked(void *env, const char *str, uint32_t len); -const mp_print_t mp_debug_print = {NULL, mp_hal_debug_tx_strn_cooked}; - -void mp_hal_init(void) { - //ets_wdt_disable(); // it's a pain while developing - mp_hal_rtc_init(); - uart_init(UART_BIT_RATE_115200, UART_BIT_RATE_115200); -} - -void mp_hal_delay_us(uint32_t us) { - uint32_t start = system_get_time(); - while (system_get_time() - start < us) { - ets_event_poll(); - } -} - -uint32_t mp_hal_get_cpu_freq(void) { - return system_get_cpu_freq() * 1000000; -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - int c = ringbuf_get(&stdin_ringbuf); - if (c != -1) { - return c; - } - #if 0 - // Idles CPU but need more testing before enabling - if (!ets_loop_iter()) { - asm("waiti 0"); - } - #else - mp_hal_delay_us(1); - #endif - } -} - -#if 0 -void mp_hal_debug_str(const char *str) { - while (*str) { - uart_tx_one_char(UART0, *str++); - } - uart_flush(UART0); -} -#endif - -void mp_hal_stdout_tx_str(const char *str) { - const char *last = str; - while (*str) { - uart_tx_one_char(UART0, *str++); - } - mp_uos_dupterm_tx_strn(last, str - last); -} - -void mp_hal_stdout_tx_strn(const char *str, uint32_t len) { - const char *last = str; - while (len--) { - uart_tx_one_char(UART0, *str++); - } - mp_uos_dupterm_tx_strn(last, str - last); -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, uint32_t len) { - const char *last = str; - while (len--) { - if (*str == '\n') { - if (str > last) { - mp_uos_dupterm_tx_strn(last, str - last); - } - uart_tx_one_char(UART0, '\r'); - uart_tx_one_char(UART0, '\n'); - mp_uos_dupterm_tx_strn("\r\n", 2); - ++str; - last = str; - } else { - uart_tx_one_char(UART0, *str++); - } - } - if (str > last) { - mp_uos_dupterm_tx_strn(last, str - last); - } -} - -void mp_hal_debug_tx_strn_cooked(void *env, const char *str, uint32_t len) { - (void)env; - while (len--) { - if (*str == '\n') { - uart_tx_one_char(UART0, '\r'); - } - uart_tx_one_char(UART0, *str++); - } -} - -uint32_t mp_hal_ticks_ms(void) { - return ((uint64_t)system_time_high_word << 32 | (uint64_t)system_get_time()) / 1000; -} - -uint32_t mp_hal_ticks_us(void) { - return system_get_time(); -} - -void mp_hal_delay_ms(uint32_t delay) { - mp_hal_delay_us(delay * 1000); -} - -void ets_event_poll(void) { - ets_loop_iter(); - mp_handle_pending(); -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("assert:%s:%d:%s: %s\n", file, line, func, expr); - nlr_raise(mp_obj_new_exception_msg(&mp_type_AssertionError, - translate("C-level assert"))); -} - -void mp_hal_signal_input(void) { - #if MICROPY_REPL_EVENT_DRIVEN - system_os_post(UART_TASK_ID, 0, 0); - #endif -} - -STATIC void dupterm_task_handler(os_event_t *evt) { - static byte lock; - if (lock) { - return; - } - lock = 1; - while (1) { - int c = mp_uos_dupterm_rx_chr(); - if (c < 0) { - break; - } - ringbuf_put(&stdin_ringbuf, c); - } - mp_hal_signal_input(); - lock = 0; -} - -STATIC os_event_t dupterm_evt_queue[4]; - -void dupterm_task_init() { - system_os_task(dupterm_task_handler, DUPTERM_TASK_ID, dupterm_evt_queue, MP_ARRAY_SIZE(dupterm_evt_queue)); -} - -void mp_hal_signal_dupterm_input(void) { - system_os_post(DUPTERM_TASK_ID, 0, 0); -} - -// Get pointer to esf_buf bookkeeping structure -void *ets_get_esf_buf_ctlblk(void) { - // Get literal ptr before start of esf_rx_buf_alloc func - extern void *esf_rx_buf_alloc(); - return ((void**)esf_rx_buf_alloc)[-1]; -} - -// Get number of esf_buf free buffers of given type, as encoded by index -// idx 0 corresponds to buf types 1, 2; 1 - 4; 2 - 5; 3 - 7; 4 - 8 -// Only following buf types appear to be used: -// 1 - tx buffer, 5 - management frame tx buffer; 8 - rx buffer -int ets_esf_free_bufs(int idx) { - uint32_t *p = ets_get_esf_buf_ctlblk(); - uint32_t *b = (uint32_t*)p[idx]; - int cnt = 0; - while (b) { - b = (uint32_t*)b[0x20 / 4]; - cnt++; - } - return cnt; -} - -extern int mp_stream_errno; -int *__errno() { - return &mp_stream_errno; -} diff --git a/ports/esp8266/esp_mphal.h b/ports/esp8266/esp_mphal.h deleted file mode 100644 index 5ecd392a6b..0000000000 --- a/ports/esp8266/esp_mphal.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/ringbuf.h" -#include "lib/utils/interrupt_char.h" -#include "xtirq.h" - -void mp_keyboard_interrupt(void); - -struct _mp_print_t; -// Structure for UART-only output via mp_printf() -extern const struct _mp_print_t mp_debug_print; - -extern ringbuf_t stdin_ringbuf; -// Call this after putting data to stdin_ringbuf -void mp_hal_signal_input(void); -// Call this when data is available in dupterm object -void mp_hal_signal_dupterm_input(void); - -void mp_hal_init(void); -void mp_hal_rtc_init(void); - -uint32_t mp_hal_ticks_us(void); -__attribute__((always_inline)) static inline uint32_t mp_hal_ticks_cpu(void) { - uint32_t ccount; - __asm__ __volatile__("rsr %0,ccount":"=a" (ccount)); - return ccount; -} - -void mp_hal_delay_us(uint32_t); -void mp_hal_set_interrupt_char(int c); -uint32_t mp_hal_get_cpu_freq(void); - -#define UART_TASK_ID 0 -#define DUPTERM_TASK_ID 1 -void uart_task_init(); -void dupterm_task_init(); - -void ets_event_poll(void); -#define ETS_POLL_WHILE(cond) { while (cond) ets_event_poll(); } - -// needed for machine.I2C -#include "osapi.h" -#define mp_hal_delay_us_fast(us) os_delay_us(us) - -#define mp_hal_quiet_timing_enter() disable_irq() -#define mp_hal_quiet_timing_exit(irq_state) enable_irq(irq_state) - -// C-level pin HAL -#include "etshal.h" -#include "gpio.h" -#include "modmachine.h" -#define MP_HAL_PIN_FMT "%u" -#define mp_hal_pin_obj_t uint32_t -#define mp_hal_get_pin_obj(o) mp_obj_get_pin(o) -#define mp_hal_pin_name(p) (p) -void mp_hal_pin_input(mp_hal_pin_obj_t pin); -void mp_hal_pin_output(mp_hal_pin_obj_t pin); -void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin); -#define mp_hal_pin_od_low(p) do { \ - if ((p) == 16) { WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); } \ - else { gpio_output_set(0, 1 << (p), 1 << (p), 0); } \ - } while (0) -#define mp_hal_pin_od_high(p) do { \ - if ((p) == 16) { WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); } \ - else { gpio_output_set(0, 0, 0, 1 << (p)); /* set as input to avoid glitches */ } \ - } while (0) -#define mp_hal_pin_read(p) pin_get(p) -#define mp_hal_pin_write(p, v) pin_set((p), (v)) - -void *ets_get_esf_buf_ctlblk(void); -int ets_esf_free_bufs(int idx); diff --git a/ports/esp8266/espneopixel.c b/ports/esp8266/espneopixel.c deleted file mode 100644 index 6c76591865..0000000000 --- a/ports/esp8266/espneopixel.c +++ /dev/null @@ -1,65 +0,0 @@ -// Original version from https://github.com/adafruit/Adafruit_NeoPixel -// Modifications by dpgeorge to support auto-CPU-frequency detection - -// This is a mash-up of the Due show() code + insights from Michael Miller's -// ESP8266 work for the NeoPixelBus library: github.com/Makuna/NeoPixelBus -// Needs to be a separate .c file to enforce ICACHE_RAM_ATTR execution. - -#include "py/mpconfig.h" -#if MICROPY_ESP8266_NEOPIXEL - -#include "c_types.h" -#include "eagle_soc.h" -#include "user_interface.h" -#include "espneopixel.h" -#include "esp_mphal.h" - -#define NEO_KHZ400 (1) - -void /*ICACHE_RAM_ATTR*/ esp_neopixel_write(uint8_t pin, uint8_t *pixels, uint32_t numBytes, bool is800KHz) { - - uint8_t *p, *end, pix, mask; - uint32_t t, time0, time1, period, c, startTime, pinMask; - - pinMask = 1 << pin; - p = pixels; - end = p + numBytes; - pix = *p++; - mask = 0x80; - startTime = 0; - - uint32_t fcpu = system_get_cpu_freq() * 1000000; - -#ifdef NEO_KHZ400 - if(is800KHz) { -#endif - time0 = fcpu / 2857143; // 0.35us - time1 = fcpu / 1250000; // 0.8us - period = fcpu / 800000; // 1.25us per bit -#ifdef NEO_KHZ400 - } else { // 400 KHz bitstream - time0 = fcpu / 2000000; // 0.5uS - time1 = fcpu / 833333; // 1.2us - period = fcpu / 400000; // 2.5us per bit - } -#endif - - uint32_t irq_state = mp_hal_quiet_timing_enter(); - for(t = time0;; t = time0) { - if(pix & mask) t = time1; // Bit high duration - while(((c = mp_hal_ticks_cpu()) - startTime) < period); // Wait for bit start - GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, pinMask); // Set high - startTime = c; // Save start time - while(((c = mp_hal_ticks_cpu()) - startTime) < t); // Wait high duration - GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, pinMask); // Set low - if(!(mask >>= 1)) { // Next bit/byte - if(p >= end) break; - pix = *p++; - mask = 0x80; - } - } - while((mp_hal_ticks_cpu() - startTime) < period); // Wait for last bit - mp_hal_quiet_timing_exit(irq_state); -} - -#endif // MICROPY_ESP8266_NEOPIXEL diff --git a/ports/esp8266/espneopixel.h b/ports/esp8266/espneopixel.h deleted file mode 100644 index c444740ff9..0000000000 --- a/ports/esp8266/espneopixel.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_ESPNEOPIXEL_H -#define MICROPY_INCLUDED_ESP8266_ESPNEOPIXEL_H - -void esp_neopixel_write(uint8_t pin, uint8_t *pixels, uint32_t numBytes, bool is800KHz); - -#endif // MICROPY_INCLUDED_ESP8266_ESPNEOPIXEL_H diff --git a/ports/esp8266/esppwm.c b/ports/esp8266/esppwm.c deleted file mode 100644 index 33eaf3b9a1..0000000000 --- a/ports/esp8266/esppwm.c +++ /dev/null @@ -1,421 +0,0 @@ -/****************************************************************************** - * Copyright 2013-2014 Espressif Systems (Wuxi) - * - * FileName: pwm.c - * - * Description: pwm driver - * - * Modification history: - * 2014/5/1, v1.0 create this file. - * 2016/3/2: Modifications by dpgeorge to suit MicroPython -*******************************************************************************/ -#include -#include - -#include "etshal.h" -#include "os_type.h" -#include "gpio.h" - -#include "esppwm.h" - -#include "py/mpprint.h" -#define PWM_DBG(...) -//#define PWM_DBG(...) mp_printf(&mp_plat_print, __VA_ARGS__) - -#define ICACHE_RAM_ATTR // __attribute__((section(".text"))) - -#define PWM_CHANNEL 8 -#define PWM_DEPTH 1023 -#define PWM_FREQ_MAX 1000 -#define PWM_1S 1000000 - -struct pwm_single_param { - uint16_t gpio_set; - uint16_t gpio_clear; - uint32_t h_time; -}; - -struct pwm_param { - uint32_t period; - uint16_t freq; - uint16_t duty[PWM_CHANNEL]; -}; - -STATIC const uint8_t pin_num[PWM_CHANNEL] = {0, 2, 4, 5, 12, 13, 14, 15}; - -STATIC struct pwm_single_param pwm_single_toggle[2][PWM_CHANNEL + 1]; -STATIC struct pwm_single_param *pwm_single; - -STATIC struct pwm_param pwm; - -STATIC int8_t pwm_out_io_num[PWM_CHANNEL] = {-1, -1, -1, -1, -1, -1, -1, -1}; - -STATIC uint8_t pwm_channel_toggle[2]; -STATIC uint8_t *pwm_channel; -STATIC uint8_t pwm_toggle = 1; -STATIC uint8_t pwm_timer_down = 1; -STATIC uint8_t pwm_current_channel = 0; -STATIC uint16_t pwm_gpio = 0; -STATIC uint8_t pwm_channel_num = 0; - -//XXX: 0xffffffff/(80000000/16)=35A -#define US_TO_RTC_TIMER_TICKS(t) \ - ((t) ? \ - (((t) > 0x35A) ? \ - (((t)>>2) * ((APB_CLK_FREQ>>4)/250000) + ((t)&0x3) * ((APB_CLK_FREQ>>4)/1000000)) : \ - (((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \ - 0) - -//FRC1 -#define FRC1_ENABLE_TIMER BIT7 - -typedef enum { - DIVDED_BY_1 = 0, - DIVDED_BY_16 = 4, - DIVDED_BY_256 = 8, -} TIMER_PREDIVED_MODE; - -typedef enum { - TM_LEVEL_INT = 1, - TM_EDGE_INT = 0, -} TIMER_INT_MODE; - -STATIC void ICACHE_FLASH_ATTR -pwm_insert_sort(struct pwm_single_param pwm[], uint8 n) -{ - uint8 i; - - for (i = 1; i < n; i++) { - if (pwm[i].h_time < pwm[i - 1].h_time) { - int8 j = i - 1; - struct pwm_single_param tmp; - - memcpy(&tmp, &pwm[i], sizeof(struct pwm_single_param)); - memcpy(&pwm[i], &pwm[i - 1], sizeof(struct pwm_single_param)); - - while (tmp.h_time < pwm[j].h_time) { - memcpy(&pwm[j + 1], &pwm[j], sizeof(struct pwm_single_param)); - j--; - if (j < 0) { - break; - } - } - - memcpy(&pwm[j + 1], &tmp, sizeof(struct pwm_single_param)); - } - } -} - -STATIC volatile uint8 critical = 0; - -#define LOCK_PWM(c) do { \ - while( (c)==1 ); \ - (c) = 1; \ -} while (0) - -#define UNLOCK_PWM(c) do { \ - (c) = 0; \ -} while (0) - -void ICACHE_FLASH_ATTR -pwm_start(void) -{ - uint8 i, j; - PWM_DBG("--Function pwm_start() is called\n"); - PWM_DBG("pwm_gpio:%x,pwm_channel_num:%d\n",pwm_gpio,pwm_channel_num); - PWM_DBG("pwm_out_io_num[0]:%d,[1]:%d,[2]:%d\n",pwm_out_io_num[0],pwm_out_io_num[1],pwm_out_io_num[2]); - PWM_DBG("pwm.period:%d,pwm.duty[0]:%d,[1]:%d,[2]:%d\n",pwm.period,pwm.duty[0],pwm.duty[1],pwm.duty[2]); - - LOCK_PWM(critical); // enter critical - - struct pwm_single_param *local_single = pwm_single_toggle[pwm_toggle ^ 0x01]; - uint8 *local_channel = &pwm_channel_toggle[pwm_toggle ^ 0x01]; - - // step 1: init PWM_CHANNEL+1 channels param - for (i = 0; i < pwm_channel_num; i++) { - uint32 us = pwm.period * pwm.duty[i] / PWM_DEPTH; - local_single[i].h_time = US_TO_RTC_TIMER_TICKS(us); - PWM_DBG("i:%d us:%d ht:%d\n",i,us,local_single[i].h_time); - local_single[i].gpio_set = 0; - local_single[i].gpio_clear = 1 << pin_num[pwm_out_io_num[i]]; - } - - local_single[pwm_channel_num].h_time = US_TO_RTC_TIMER_TICKS(pwm.period); - local_single[pwm_channel_num].gpio_set = pwm_gpio; - local_single[pwm_channel_num].gpio_clear = 0; - PWM_DBG("i:%d period:%d ht:%d\n",pwm_channel_num,pwm.period,local_single[pwm_channel_num].h_time); - // step 2: sort, small to big - pwm_insert_sort(local_single, pwm_channel_num + 1); - - *local_channel = pwm_channel_num + 1; - PWM_DBG("1channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n",*local_channel,local_single[0].h_time,local_single[1].h_time,local_single[2].h_time,local_single[3].h_time); - // step 3: combine same duty channels - for (i = pwm_channel_num; i > 0; i--) { - if (local_single[i].h_time == local_single[i - 1].h_time) { - local_single[i - 1].gpio_set |= local_single[i].gpio_set; - local_single[i - 1].gpio_clear |= local_single[i].gpio_clear; - - for (j = i + 1; j < *local_channel; j++) { - memcpy(&local_single[j - 1], &local_single[j], sizeof(struct pwm_single_param)); - } - - (*local_channel)--; - } - } - PWM_DBG("2channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n",*local_channel,local_single[0].h_time,local_single[1].h_time,local_single[2].h_time,local_single[3].h_time); - // step 4: cacl delt time - for (i = *local_channel - 1; i > 0; i--) { - local_single[i].h_time -= local_single[i - 1].h_time; - } - - // step 5: last channel needs to clean - local_single[*local_channel-1].gpio_clear = 0; - - // step 6: if first channel duty is 0, remove it - if (local_single[0].h_time == 0) { - local_single[*local_channel - 1].gpio_set &= ~local_single[0].gpio_clear; - local_single[*local_channel - 1].gpio_clear |= local_single[0].gpio_clear; - - for (i = 1; i < *local_channel; i++) { - memcpy(&local_single[i - 1], &local_single[i], sizeof(struct pwm_single_param)); - } - - (*local_channel)--; - } - - // if timer is down, need to set gpio and start timer - if (pwm_timer_down == 1) { - pwm_channel = local_channel; - pwm_single = local_single; - // start - gpio_output_set(local_single[0].gpio_set, local_single[0].gpio_clear, pwm_gpio, 0); - - pwm_timer_down = 0; - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, local_single[0].h_time); - } - - if (pwm_toggle == 1) { - pwm_toggle = 0; - } else { - pwm_toggle = 1; - } - - UNLOCK_PWM(critical); // leave critical - PWM_DBG("3channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n",*local_channel,local_single[0].h_time,local_single[1].h_time,local_single[2].h_time,local_single[3].h_time); -} - -/****************************************************************************** - * FunctionName : pwm_set_duty - * Description : set each channel's duty params - * Parameters : int16_t duty : 0 ~ PWM_DEPTH - * uint8 channel : channel index - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -pwm_set_duty(int16_t duty, uint8 channel) -{ - uint8 i; - for(i=0;i= PWM_DEPTH) { - pwm.duty[channel] = PWM_DEPTH; - } else { - pwm.duty[channel] = duty; - } - UNLOCK_PWM(critical); // leave critical -} - -/****************************************************************************** - * FunctionName : pwm_set_freq - * Description : set pwm frequency - * Parameters : uint16 freq : 100hz typically - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -pwm_set_freq(uint16 freq, uint8 channel) -{ - LOCK_PWM(critical); // enter critical - if (freq > PWM_FREQ_MAX) { - pwm.freq = PWM_FREQ_MAX; - } else if (freq < 1) { - pwm.freq = 1; - } else { - pwm.freq = freq; - } - - pwm.period = PWM_1S / pwm.freq; - UNLOCK_PWM(critical); // leave critical -} - -/****************************************************************************** - * FunctionName : pwm_get_duty - * Description : get duty of each channel - * Parameters : uint8 channel : channel index - * Returns : NONE -*******************************************************************************/ -uint16 ICACHE_FLASH_ATTR -pwm_get_duty(uint8 channel) -{ - uint8 i; - for(i=0;i= (*pwm_channel - 1)) { // *pwm_channel may change outside - pwm_single = pwm_single_toggle[local_toggle]; - pwm_channel = &pwm_channel_toggle[local_toggle]; - - gpio_output_set(pwm_single[*pwm_channel - 1].gpio_set, - pwm_single[*pwm_channel - 1].gpio_clear, - pwm_gpio, - 0); - - pwm_current_channel = 0; - - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, pwm_single[pwm_current_channel].h_time); - } else { - gpio_output_set(pwm_single[pwm_current_channel].gpio_set, - pwm_single[pwm_current_channel].gpio_clear, - pwm_gpio, 0); - - pwm_current_channel++; - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, pwm_single[pwm_current_channel].h_time); - } -} - -/****************************************************************************** - * FunctionName : pwm_init - * Description : pwm gpio, params and timer initialization - * Parameters : uint16 freq : pwm freq param - * uint16 *duty : each channel's duty - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -pwm_init(void) -{ - uint8 i; - - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, //FRC2_AUTO_RELOAD| - DIVDED_BY_16 - | FRC1_ENABLE_TIMER - | TM_EDGE_INT); - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, 0); - - for (i = 0; i < PWM_CHANNEL; i++) { - pwm_gpio = 0; - pwm.duty[i] = 0; - } - - pwm_set_freq(500, 0); - pwm_start(); - - ETS_FRC_TIMER1_INTR_ATTACH(pwm_tim1_intr_handler, NULL); - TM1_EDGE_INT_ENABLE(); - ETS_FRC1_INTR_ENABLE(); -} - -int ICACHE_FLASH_ATTR -pwm_add(uint8_t pin_id, uint32_t pin_mux, uint32_t pin_func){ - PWM_DBG("--Function pwm_add() is called. channel:%d\n", channel); - PWM_DBG("pwm_gpio:%x,pwm_channel_num:%d\n",pwm_gpio,pwm_channel_num); - PWM_DBG("pwm_out_io_num[0]:%d,[1]:%d,[2]:%d\n",pwm_out_io_num[0],pwm_out_io_num[1],pwm_out_io_num[2]); - PWM_DBG("pwm.duty[0]:%d,[1]:%d,[2]:%d\n",pwm.duty[0],pwm.duty[1],pwm.duty[2]); - int channel = -1; - for (int i = 0; i < PWM_CHANNEL; ++i) { - if (pin_num[i] == pin_id) { - channel = i; - break; - } - } - if (channel == -1) { - return -1; - } - uint8 i; - for(i=0;i -#include - -void pwm_init(void); -void pwm_start(void); - -void pwm_set_duty(int16_t duty, uint8_t channel); -uint16_t pwm_get_duty(uint8_t channel); -void pwm_set_freq(uint16_t freq, uint8_t channel); -uint16_t pwm_get_freq(uint8_t channel); -int pwm_add(uint8_t pin_id, uint32_t pin_mux, uint32_t pin_func); -bool pwm_delete(uint8_t channel); - -#endif // MICROPY_INCLUDED_ESP8266_ESPPWM_H diff --git a/ports/esp8266/ets_alt_task.c b/ports/esp8266/ets_alt_task.c deleted file mode 100644 index ff7dba1869..0000000000 --- a/ports/esp8266/ets_alt_task.c +++ /dev/null @@ -1,214 +0,0 @@ -#include -#include "osapi.h" -#include "os_type.h" -#include "ets_sys.h" -#include -#include "etshal.h" -#include "user_interface.h" -#include "ets_alt_task.h" - -// Use standard ets_task or alternative impl -#define USE_ETS_TASK 0 - -#define MP_ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) - -struct task_entry { - os_event_t *queue; - os_task_t task; - uint8_t qlen; - uint8_t prio; - int8_t i_get; - int8_t i_put; -}; - -static void (*idle_cb)(void *); -static void *idle_arg; - -#if ESP_SDK_VERSION >= 010500 -# define FIRST_PRIO 0 -#else -# define FIRST_PRIO 0x14 -#endif -#define LAST_PRIO 0x20 -#define PRIO2ID(prio) ((prio) - FIRST_PRIO) - -volatile struct task_entry emu_tasks[PRIO2ID(LAST_PRIO) + 1]; - -static inline int prio2id(uint8_t prio) { - int id = PRIO2ID(prio); - if (id < 0 || id >= MP_ARRAY_SIZE(emu_tasks)) { - printf("task prio out of range: %d\n", prio); - while (1); - } - return id; -} - -#if DEBUG -void dump_task(int prio, volatile struct task_entry *t) { - printf("q for task %d: queue: %p, get ptr: %d, put ptr: %d, qlen: %d\n", - prio, t->queue, t->i_get, t->i_put, t->qlen); -} - -void dump_tasks(void) { - for (int i = 0; i < MP_ARRAY_SIZE(emu_tasks); i++) { - if (emu_tasks[i].qlen) { - dump_task(i + FIRST_PRIO, &emu_tasks[i]); - } - } - printf("====\n"); -} -#endif - -bool ets_task(os_task_t task, uint8 prio, os_event_t *queue, uint8 qlen) { - static unsigned cnt; - printf("#%d ets_task(%p, %d, %p, %d)\n", cnt++, task, prio, queue, qlen); -#if USE_ETS_TASK - return _ets_task(task, prio, queue, qlen); -#else - int id = prio2id(prio); - emu_tasks[id].task = task; - emu_tasks[id].queue = queue; - emu_tasks[id].qlen = qlen; - emu_tasks[id].i_get = 0; - emu_tasks[id].i_put = 0; - return true; -#endif -} - -bool ets_post(uint8 prio, os_signal_t sig, os_param_t param) { -// static unsigned cnt; printf("#%d ets_post(%d, %x, %x)\n", cnt++, prio, sig, param); -#if USE_ETS_TASK - return _ets_post(prio, sig, param); -#else - ets_intr_lock(); - - const int id = prio2id(prio); - os_event_t *q = emu_tasks[id].queue; - if (emu_tasks[id].i_put == -1) { - // queue is full - printf("ets_post: task %d queue full\n", prio); - return 1; - } - q = &q[emu_tasks[id].i_put++]; - q->sig = sig; - q->par = param; - if (emu_tasks[id].i_put == emu_tasks[id].qlen) { - emu_tasks[id].i_put = 0; - } - if (emu_tasks[id].i_put == emu_tasks[id].i_get) { - // queue got full - emu_tasks[id].i_put = -1; - } - //printf("after ets_post: "); dump_task(prio, &emu_tasks[id]); - //dump_tasks(); - - ets_intr_unlock(); - - return 0; -#endif -} - -int ets_loop_iter_disable = 0; - -// to implement a 64-bit wide microsecond counter -static uint32_t system_time_prev = 0; -uint32_t system_time_high_word = 0; - -bool ets_loop_iter(void) { - if (ets_loop_iter_disable) { - return false; - } - - // handle overflow of system microsecond counter - ets_intr_lock(); - uint32_t system_time_cur = system_get_time(); - if (system_time_cur < system_time_prev) { - system_time_high_word += 1; // record overflow of low 32-bits - } - system_time_prev = system_time_cur; - ets_intr_unlock(); - - //static unsigned cnt; - bool progress = false; - for (volatile struct task_entry *t = emu_tasks; t < &emu_tasks[MP_ARRAY_SIZE(emu_tasks)]; t++) { - system_soft_wdt_feed(); - ets_intr_lock(); - //printf("etc_loop_iter: "); dump_task(t - emu_tasks + FIRST_PRIO, t); - if (t->i_get != t->i_put) { - progress = true; - //printf("#%d Calling task %d(%p) (%x, %x)\n", cnt++, - // t - emu_tasks + FIRST_PRIO, t->task, t->queue[t->i_get].sig, t->queue[t->i_get].par); - int idx = t->i_get; - if (t->i_put == -1) { - t->i_put = t->i_get; - } - if (++t->i_get == t->qlen) { - t->i_get = 0; - } - //ets_intr_unlock(); - t->task(&t->queue[idx]); - //ets_intr_lock(); - //printf("Done calling task %d\n", t - emu_tasks + FIRST_PRIO); - } - ets_intr_unlock(); - } - return progress; -} - -#if SDK_BELOW_1_1_1 -void my_timer_isr(void *arg) { -// uart0_write_char('+'); - ets_post(0x1f, 0, 0); -} - -// Timer init func is in ROM, and calls ets_task by relative addr directly in ROM -// so, we have to re-init task using our handler -void ets_timer_init() { - printf("ets_timer_init\n"); -// _ets_timer_init(); - ets_isr_attach(10, my_timer_isr, NULL); - SET_PERI_REG_MASK(0x3FF00004, 4); - ETS_INTR_ENABLE(10); - ets_task((os_task_t)0x40002E3C, 0x1f, (os_event_t*)0x3FFFDDC0, 4); - - WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + 0x30, 0); - WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + 0x28, 0x88); - WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + 0x30, 0); - printf("Installed timer ISR\n"); -} -#endif - -bool ets_run(void) { -#if USE_ETS_TASK - #if SDK_BELOW_1_1_1 - ets_isr_attach(10, my_timer_isr, NULL); - #endif - _ets_run(); -#else -// ets_timer_init(); - *(char*)0x3FFFC6FC = 0; - ets_intr_lock(); - printf("ets_alt_task: ets_run\n"); -#if DEBUG - dump_tasks(); -#endif - ets_intr_unlock(); - while (1) { - if (!ets_loop_iter()) { - //printf("idle\n"); - ets_intr_lock(); - if (idle_cb) { - idle_cb(idle_arg); - } - asm("waiti 0"); - ets_intr_unlock(); - } - } -#endif -} - -void ets_set_idle_cb(void (*handler)(void *), void *arg) { - //printf("ets_set_idle_cb(%p, %p)\n", handler, arg); - idle_cb = handler; - idle_arg = arg; -} diff --git a/ports/esp8266/ets_alt_task.h b/ports/esp8266/ets_alt_task.h deleted file mode 100644 index 62f0025a89..0000000000 --- a/ports/esp8266/ets_alt_task.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_ETS_ALT_TASK_H -#define MICROPY_INCLUDED_ESP8266_ETS_ALT_TASK_H - -#include -#include - -extern int ets_loop_iter_disable; -extern uint32_t system_time_high_word; - -bool ets_loop_iter(void); - -#endif // MICROPY_INCLUDED_ESP8266_ETS_ALT_TASK_H diff --git a/ports/esp8266/etshal.h b/ports/esp8266/etshal.h deleted file mode 100644 index 8d64573119..0000000000 --- a/ports/esp8266/etshal.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_ETSHAL_H -#define MICROPY_INCLUDED_ESP8266_ETSHAL_H - -#include - -// see http://esp8266-re.foogod.com/wiki/Random_Number_Generator -#define WDEV_HWRNG ((volatile uint32_t*)0x3ff20e44) - -void ets_delay_us(uint16_t us); -void ets_intr_lock(void); -void ets_intr_unlock(void); -void ets_isr_mask(uint32_t mask); -void ets_isr_unmask(uint32_t mask); -void ets_isr_attach(int irq_no, void (*handler)(void *), void *arg); -void ets_install_putc1(); -void uart_div_modify(uint8_t uart, uint32_t divisor); -void ets_set_idle_cb(void (*handler)(void *), void *arg); - -void ets_timer_arm_new(os_timer_t *tim, uint32_t millis, bool repeat, bool is_milli_timer); -void ets_timer_setfn(os_timer_t *tim, ETSTimerFunc callback, void *cb_data); -void ets_timer_disarm(os_timer_t *tim); - -extern void ets_wdt_disable(void); -extern void wdt_feed(void); - -// Opaque structure -#ifndef MD5_CTX -typedef char MD5_CTX[88]; -#endif - -void MD5Init(MD5_CTX *context); -void MD5Update(MD5_CTX *context, const void *data, unsigned int len); -void MD5Final(unsigned char digest[16], MD5_CTX *context); - -// These prototypes are for recent SDKs with "malloc tracking" -void *pvPortMalloc(size_t sz, const char *fname, unsigned line); -void *pvPortZalloc(size_t sz, const char *fname, unsigned line); -void *pvPortRealloc(void *p, unsigned sz, const char *fname, unsigned line); -void vPortFree(void *p, const char *fname, unsigned line); - -uint32_t SPIRead(uint32_t offset, void *buf, uint32_t len); -uint32_t SPIWrite(uint32_t offset, const void *buf, uint32_t len); -uint32_t SPIEraseSector(int sector); - -#endif // MICROPY_INCLUDED_ESP8266_ETSHAL_H diff --git a/ports/esp8266/gccollect.c b/ports/esp8266/gccollect.c deleted file mode 100644 index cd5d4932c5..0000000000 --- a/ports/esp8266/gccollect.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "gccollect.h" - -// As we do not have control over the application entry point, there is no way -// to figure out the real stack base on runtime, so it needs to be hardcoded -#define STACK_END 0x40000000 - -mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs); - -void gc_collect(void) { - // start the GC - gc_collect_start(); - - // get the registers and the sp - mp_uint_t regs[8]; - mp_uint_t sp = gc_helper_get_regs_and_sp(regs); - - // trace the stack, including the registers (since they live on the stack in this function) - gc_collect_root((void**)sp, (STACK_END - sp) / sizeof(uint32_t)); - - #if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - // trace any native code because it can contain pointers to the heap - esp_native_code_gc_collect(); - #endif - - // end the GC - gc_collect_end(); -} diff --git a/ports/esp8266/gccollect.h b/ports/esp8266/gccollect.h deleted file mode 100644 index 5735d8a390..0000000000 --- a/ports/esp8266/gccollect.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ESP8266_GCCOLLECT_H -#define MICROPY_INCLUDED_ESP8266_GCCOLLECT_H - -extern uint32_t _text_start; -extern uint32_t _text_end; -extern uint32_t _irom0_text_start; -extern uint32_t _irom0_text_end; -extern uint32_t _data_start; -extern uint32_t _data_end; -extern uint32_t _rodata_start; -extern uint32_t _rodata_end; -extern uint32_t _bss_start; -extern uint32_t _bss_end; -extern uint32_t _heap_start; -extern uint32_t _heap_end; - -void gc_collect(void); -void esp_native_code_gc_collect(void); - -#endif // MICROPY_INCLUDED_ESP8266_GCCOLLECT_H diff --git a/ports/esp8266/gchelper.s b/ports/esp8266/gchelper.s deleted file mode 100644 index cf543be800..0000000000 --- a/ports/esp8266/gchelper.s +++ /dev/null @@ -1,22 +0,0 @@ - .file "gchelper.s" - .text - - .align 4 - .global gc_helper_get_regs_and_sp - .type gc_helper_get_regs_and_sp, @function -gc_helper_get_regs_and_sp: - # store regs into given array - s32i.n a8, a2, 0 - s32i.n a9, a2, 4 - s32i.n a10, a2, 8 - s32i.n a11, a2, 12 - s32i.n a12, a2, 16 - s32i.n a13, a2, 20 - s32i.n a14, a2, 24 - s32i.n a15, a2, 28 - - # return the sp - mov a2, a1 - ret.n - - .size gc_helper_get_regs_and_sp, .-gc_helper_get_regs_and_sp diff --git a/ports/esp8266/help.c b/ports/esp8266/help.c deleted file mode 100644 index 0a851f4c48..0000000000 --- a/ports/esp8266/help.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char esp_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online docs please visit http://docs.micropython.org/en/latest/esp8266/ .\n" -"For diagnostic information to include in bug reports execute 'import port_diag'.\n" -"\n" -"Basic WiFi configuration:\n" -"\n" -"import network\n" -"sta_if = network.WLAN(network.STA_IF); sta_if.active(True)\n" -"sta_if.scan() # Scan for available access points\n" -"sta_if.connect(\"\", \"\") # Connect to an AP\n" -"sta_if.isconnected() # Check for successful connection\n" -"# Change name/password of ESP8266's AP:\n" -"ap_if = network.WLAN(network.AP_IF)\n" -"ap_if.config(essid=\"\", authmode=network.AUTH_WPA_WPA2_PSK, password=\"\")\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/esp8266/hspi.c b/ports/esp8266/hspi.c deleted file mode 100644 index 554a50460f..0000000000 --- a/ports/esp8266/hspi.c +++ /dev/null @@ -1,331 +0,0 @@ -/* -* The MIT License (MIT) -* -* Copyright (c) 2015 David Ogilvy (MetalPhreak) -* Modified 2016 by Radomir Dopieralski -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all -* copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -* SOFTWARE. -*/ - -#include "hspi.h" - -/* -Wrapper to setup HSPI/SPI GPIO pins and default SPI clock - spi_no - SPI (0) or HSPI (1) -Not used in MicroPython. -*/ -void spi_init(uint8_t spi_no) { - spi_init_gpio(spi_no, SPI_CLK_USE_DIV); - spi_clock(spi_no, SPI_CLK_PREDIV, SPI_CLK_CNTDIV); - spi_tx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW); - spi_rx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW); - - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD); - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE); -} - - -/* -Configures SPI mode parameters for clock edge and clock polarity. - spi_no - SPI (0) or HSPI (1) - spi_cpha - (0) Data is valid on clock leading edge - (1) Data is valid on clock trailing edge - spi_cpol - (0) Clock is low when inactive - (1) Clock is high when inactive -For MicroPython this version is different from original. -*/ -void spi_mode(uint8_t spi_no, uint8_t spi_cpha, uint8_t spi_cpol) { - if (spi_cpol) { - SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_IDLE_EDGE); - } else { - CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_IDLE_EDGE); - } - if (spi_cpha == spi_cpol) { - // Mode 3 - MOSI is set on falling edge of clock - // Mode 0 - MOSI is set on falling edge of clock - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE); - SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_I_EDGE); - } else { - // Mode 2 - MOSI is set on rising edge of clock - // Mode 1 - MOSI is set on rising edge of clock - SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE); - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_I_EDGE); - } -} - - -/* -Initialise the GPIO pins for use as SPI pins. - spi_no - SPI (0) or HSPI (1) - sysclk_as_spiclk - - SPI_CLK_80MHZ_NODIV (1) if using 80MHz for SPI clock. - SPI_CLK_USE_DIV (0) if using divider for lower speed. -*/ -void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk) { - uint32_t clock_div_flag = 0; - if (sysclk_as_spiclk) { - clock_div_flag = 0x0001; - } - if (spi_no == SPI) { - // Set bit 8 if 80MHz sysclock required - WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005 | (clock_div_flag<<8)); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1); - } else if (spi_no == HSPI) { - // Set bit 9 if 80MHz sysclock required - WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div_flag<<9)); - // GPIO12 is HSPI MISO pin (Master Data In) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); - // GPIO13 is HSPI MOSI pin (Master Data Out) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); - // GPIO14 is HSPI CLK pin (Clock) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); - // GPIO15 is HSPI CS pin (Chip Select / Slave Select) - // In MicroPython, we are handling CS ourself in drivers. - // PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); - } -} - - -/* -Set up the control registers for the SPI clock - spi_no - SPI (0) or HSPI (1) - prediv - predivider value (actual division value) - cntdiv - postdivider value (actual division value) -Set either divider to 0 to disable all division (80MHz sysclock) -*/ -void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv) { - if (prediv == 0 || cntdiv == 0) { - WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK); - } else { - WRITE_PERI_REG(SPI_CLOCK(spi_no), - (((prediv - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) | - (((cntdiv - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) | - (((cntdiv >> 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) | - ((0 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S) - ); - } -} - - -/* -Setup the byte order for shifting data out of buffer - spi_no - SPI (0) or HSPI (1) - byte_order - - SPI_BYTE_ORDER_HIGH_TO_LOW (1) - Data is sent out starting with Bit31 and down to Bit0 - SPI_BYTE_ORDER_LOW_TO_HIGH (0) - Data is sent out starting with the lowest BYTE, from MSB to LSB, - followed by the second lowest BYTE, from MSB to LSB, followed by - the second highest BYTE, from MSB to LSB, followed by the highest - BYTE, from MSB to LSB 0xABCDEFGH would be sent as 0xGHEFCDAB. -*/ -void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order) { - if (byte_order) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER); - } -} - - -/* -Setup the byte order for shifting data into buffer - spi_no - SPI (0) or HSPI (1) - byte_order - - SPI_BYTE_ORDER_HIGH_TO_LOW (1) - Data is read in starting with Bit31 and down to Bit0 - SPI_BYTE_ORDER_LOW_TO_HIGH (0) - Data is read in starting with the lowest BYTE, from MSB to LSB, - followed by the second lowest BYTE, from MSB to LSB, followed by - the second highest BYTE, from MSB to LSB, followed by the highest - BYTE, from MSB to LSB 0xABCDEFGH would be read as 0xGHEFCDAB -*/ -void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order) { - if (byte_order) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER); - } -} - - -/* -SPI transaction function - spi_no - SPI (0) or HSPI (1) - cmd_bits - actual number of bits to transmit - cmd_data - command data - addr_bits - actual number of bits to transmit - addr_data - address data - dout_bits - actual number of bits to transmit - dout_data - output data - din_bits - actual number of bits to receive -Returns: read data - uint32_t containing read in data only if RX was set - 0 - something went wrong (or actual read data was 0) - 1 - data sent ok (or actual read data is 1) -Note: all data is assumed to be stored in the lower bits of the data variables -(for anything <32 bits). -*/ -uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data, - uint32_t addr_bits, uint32_t addr_data, - uint32_t dout_bits, uint32_t dout_data, - uint32_t din_bits, uint32_t dummy_bits) { - while (spi_busy(spi_no)) {}; // Wait for SPI to be ready - -// Enable SPI Functions - // Disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set. - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO | - SPI_USR_COMMAND | SPI_USR_ADDR | SPI_USR_DUMMY); - - // Enable functions based on number of bits. 0 bits = disabled. - // This is rather inefficient but allows for a very generic function. - // CMD ADDR and MOSI are set below to save on an extra if statement. - if (din_bits) { - if (dout_bits) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_DOUTDIN); - } else { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO); - } - } - if (dummy_bits) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_DUMMY); - } - -// Setup Bitlengths - WRITE_PERI_REG(SPI_USER1(spi_no), - // Number of bits in Address - ((addr_bits - 1) & SPI_USR_ADDR_BITLEN) << SPI_USR_ADDR_BITLEN_S | - // Number of bits to Send - ((dout_bits - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S | - // Number of bits to receive - ((din_bits - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S | - // Number of Dummy bits to insert - ((dummy_bits - 1) & SPI_USR_DUMMY_CYCLELEN) << SPI_USR_DUMMY_CYCLELEN_S); - -// Setup Command Data - if (cmd_bits) { - // Enable COMMAND function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND); - // Align command data to high bits - uint16_t command = cmd_data << (16-cmd_bits); - // Swap byte order - command = ((command>>8)&0xff) | ((command<<8)&0xff00); - WRITE_PERI_REG(SPI_USER2(spi_no), ( - (((cmd_bits - 1) & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) | - (command & SPI_USR_COMMAND_VALUE) - )); - } - -// Setup Address Data - if (addr_bits) { - // Enable ADDRess function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR); - // Align address data to high bits - WRITE_PERI_REG(SPI_ADDR(spi_no), addr_data << (32 - addr_bits)); - } - -// Setup DOUT data - if (dout_bits) { - // Enable MOSI function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); - // Copy data to W0 - if (READ_PERI_REG(SPI_USER(spi_no))&SPI_WR_BYTE_ORDER) { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data << (32 - dout_bits)); - } else { - uint8_t dout_extra_bits = dout_bits%8; - - if (dout_extra_bits) { - // If your data isn't a byte multiple (8/16/24/32 bits) and you - // don't have SPI_WR_BYTE_ORDER set, you need this to move the - // non-8bit remainder to the MSBs. Not sure if there's even a use - // case for this, but it's here if you need it... For example, - // 0xDA4 12 bits without SPI_WR_BYTE_ORDER would usually be output - // as if it were 0x0DA4, of which 0xA4, and then 0x0 would be - // shifted out (first 8 bits of low byte, then 4 MSB bits of high - // byte - ie reverse byte order). - // The code below shifts it out as 0xA4 followed by 0xD as you - // might require. - WRITE_PERI_REG(SPI_W0(spi_no), ( - (0xFFFFFFFF << (dout_bits - dout_extra_bits) & dout_data) - << (8-dout_extra_bits) | - ((0xFFFFFFFF >> (32 - (dout_bits - dout_extra_bits))) - & dout_data) - )); - } else { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data); - } - } -} - -// Begin SPI Transaction - SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); - -// Return DIN data - if (din_bits) { - while (spi_busy(spi_no)) {}; // Wait for SPI transaction to complete - if (READ_PERI_REG(SPI_USER(spi_no))&SPI_RD_BYTE_ORDER) { - // Assuming data in is written to MSB. TBC - return READ_PERI_REG(SPI_W0(spi_no)) >> (32 - din_bits); - } else { - // Read in the same way as DOUT is sent. Note existing contents of - // SPI_W0 remain unless overwritten! - return READ_PERI_REG(SPI_W0(spi_no)); - } - return 0; // Something went wrong - } - - // Transaction completed - return 1; // Success -} - - -/* -Just do minimal work needed to send 8 bits. -*/ -inline void spi_tx8fast(uint8_t spi_no, uint8_t dout_data) { - while (spi_busy(spi_no)) {}; // Wait for SPI to be ready - -// Enable SPI Functions - // Disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set. - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO | - SPI_USR_COMMAND | SPI_USR_ADDR | SPI_USR_DUMMY); - -// Setup Bitlengths - WRITE_PERI_REG(SPI_USER1(spi_no), - // Number of bits to Send - ((8 - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S | - // Number of bits to receive - ((8 - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S); - - -// Setup DOUT data - // Enable MOSI function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); - // Copy data to W0 - if (READ_PERI_REG(SPI_USER(spi_no)) & SPI_WR_BYTE_ORDER) { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data << (32 - 8)); - } else { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data); - } - -// Begin SPI Transaction - SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); -} diff --git a/ports/esp8266/hspi.h b/ports/esp8266/hspi.h deleted file mode 100644 index c68366ef44..0000000000 --- a/ports/esp8266/hspi.h +++ /dev/null @@ -1,79 +0,0 @@ -/* -* The MIT License (MIT) -* -* Copyright (c) 2015 David Ogilvy (MetalPhreak) -* Modified 2016 by Radomir Dopieralski -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all -* copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -* SOFTWARE. -*/ - -#ifndef SPI_APP_H -#define SPI_APP_H - -#include "hspi_register.h" -#include "ets_sys.h" -#include "osapi.h" -#include "os_type.h" - -// Define SPI hardware modules -#define SPI 0 -#define HSPI 1 - -#define SPI_CLK_USE_DIV 0 -#define SPI_CLK_80MHZ_NODIV 1 - -#define SPI_BYTE_ORDER_HIGH_TO_LOW 1 -#define SPI_BYTE_ORDER_LOW_TO_HIGH 0 - -#ifndef CPU_CLK_FREQ //Should already be defined in eagle_soc.h -#define CPU_CLK_FREQ (80 * 1000000) -#endif - -// Define some default SPI clock settings -#define SPI_CLK_PREDIV 10 -#define SPI_CLK_CNTDIV 2 -#define SPI_CLK_FREQ (CPU_CLK_FREQ / (SPI_CLK_PREDIV * SPI_CLK_CNTDIV)) -// 80 / 20 = 4 MHz - -void spi_init(uint8_t spi_no); -void spi_mode(uint8_t spi_no, uint8_t spi_cpha,uint8_t spi_cpol); -void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk); -void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv); -void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order); -void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order); -uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data, - uint32_t addr_bits, uint32_t addr_data, - uint32_t dout_bits, uint32_t dout_data, - uint32_t din_bits, uint32_t dummy_bits); -void spi_tx8fast(uint8_t spi_no, uint8_t dout_data); - -// Expansion Macros -#define spi_busy(spi_no) READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR - -#define spi_txd(spi_no, bits, data) spi_transaction(spi_no, 0, 0, 0, 0, bits, (uint32_t) data, 0, 0) -#define spi_tx8(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 8, (uint32_t) data, 0, 0) -#define spi_tx16(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 16, (uint32_t) data, 0, 0) -#define spi_tx32(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 32, (uint32_t) data, 0, 0) - -#define spi_rxd(spi_no, bits) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, bits, 0) -#define spi_rx8(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 8, 0) -#define spi_rx16(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 16, 0) -#define spi_rx32(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 32, 0) - -#endif diff --git a/ports/esp8266/hspi_register.h b/ports/esp8266/hspi_register.h deleted file mode 100644 index 4dd335b400..0000000000 --- a/ports/esp8266/hspi_register.h +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Copyright (c) 2010 - 2011 Espressif System - * Modified by David Ogilvy (MetalPhreak) - * Based on original file included in SDK 1.0.0 - * - * Missing defines from previous SDK versions have - * been added and are noted with comments. The - * names of these defines are likely to change. - */ - -#ifndef SPI_REGISTER_H_INCLUDED -#define SPI_REGISTER_H_INCLUDED - -#define REG_SPI_BASE(i) (0x60000200-i*0x100) - -#define SPI_CMD(i) (REG_SPI_BASE(i) + 0x0) -#define SPI_FLASH_READ (BIT(31)) //From previous SDK -#define SPI_FLASH_WREN (BIT(30)) //From previous SDK -#define SPI_FLASH_WRDI (BIT(29)) //From previous SDK -#define SPI_FLASH_RDID (BIT(28)) //From previous SDK -#define SPI_FLASH_RDSR (BIT(27)) //From previous SDK -#define SPI_FLASH_WRSR (BIT(26)) //From previous SDK -#define SPI_FLASH_PP (BIT(25)) //From previous SDK -#define SPI_FLASH_SE (BIT(24)) //From previous SDK -#define SPI_FLASH_BE (BIT(23)) //From previous SDK -#define SPI_FLASH_CE (BIT(22)) //From previous SDK -#define SPI_FLASH_DP (BIT(21)) //From previous SDK -#define SPI_FLASH_RES (BIT(20)) //From previous SDK -#define SPI_FLASH_HPM (BIT(19)) //From previous SDK -#define SPI_USR (BIT(18)) - -#define SPI_ADDR(i) (REG_SPI_BASE(i) + 0x4) - -#define SPI_CTRL(i) (REG_SPI_BASE(i) + 0x8) -#define SPI_WR_BIT_ORDER (BIT(26)) -#define SPI_RD_BIT_ORDER (BIT(25)) -#define SPI_QIO_MODE (BIT(24)) -#define SPI_DIO_MODE (BIT(23)) -#define SPI_TWO_BYTE_STATUS_EN (BIT(22)) //From previous SDK -#define SPI_WP_REG (BIT(21)) //From previous SDK -#define SPI_QOUT_MODE (BIT(20)) -#define SPI_SHARE_BUS (BIT(19)) //From previous SDK -#define SPI_HOLD_MODE (BIT(18)) //From previous SDK -#define SPI_ENABLE_AHB (BIT(17)) //From previous SDK -#define SPI_SST_AAI (BIT(16)) //From previous SDK -#define SPI_RESANDRES (BIT(15)) //From previous SDK -#define SPI_DOUT_MODE (BIT(14)) -#define SPI_FASTRD_MODE (BIT(13)) - -#define SPI_CTRL1(i) (REG_SPI_BASE (i) + 0xC) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_CS_HOLD_DELAY 0x0000000F //Espressif BBS -#define SPI_CS_HOLD_DELAY_S 28 //Espressif BBS -#define SPI_CS_HOLD_DELAY_RES 0x00000FFF //Espressif BBS -#define SPI_CS_HOLD_DELAY_RES_S 16 //Espressif BBS -#define SPI_BUS_TIMER_LIMIT 0x0000FFFF //From previous SDK -#define SPI_BUS_TIMER_LIMIT_S 0 //From previous SDK - - -#define SPI_RD_STATUS(i) (REG_SPI_BASE(i) + 0x10) -#define SPI_STATUS_EXT 0x000000FF //From previous SDK -#define SPI_STATUS_EXT_S 24 //From previous SDK -#define SPI_WB_MODE 0x000000FF //From previous SDK -#define SPI_WB_MODE_S 16 //From previous SDK -#define SPI_FLASH_STATUS_PRO_FLAG (BIT(7)) //From previous SDK -#define SPI_FLASH_TOP_BOT_PRO_FLAG (BIT(5)) //From previous SDK -#define SPI_FLASH_BP2 (BIT(4)) //From previous SDK -#define SPI_FLASH_BP1 (BIT(3)) //From previous SDK -#define SPI_FLASH_BP0 (BIT(2)) //From previous SDK -#define SPI_FLASH_WRENABLE_FLAG (BIT(1)) //From previous SDK -#define SPI_FLASH_BUSY_FLAG (BIT(0)) //From previous SDK - -#define SPI_CTRL2(i) (REG_SPI_BASE(i) + 0x14) -#define SPI_CS_DELAY_NUM 0x0000000F -#define SPI_CS_DELAY_NUM_S 28 -#define SPI_CS_DELAY_MODE 0x00000003 -#define SPI_CS_DELAY_MODE_S 26 -#define SPI_MOSI_DELAY_NUM 0x00000007 -#define SPI_MOSI_DELAY_NUM_S 23 -#define SPI_MOSI_DELAY_MODE 0x00000003 //mode 0 : posedge; data set at positive edge of clk - //mode 1 : negedge + 1 cycle delay, only if freq<10MHz ; data set at negitive edge of clk - //mode 2 : Do not use this mode. -#define SPI_MOSI_DELAY_MODE_S 21 -#define SPI_MISO_DELAY_NUM 0x00000007 -#define SPI_MISO_DELAY_NUM_S 18 -#define SPI_MISO_DELAY_MODE 0x00000003 -#define SPI_MISO_DELAY_MODE_S 16 -#define SPI_CK_OUT_HIGH_MODE 0x0000000F -#define SPI_CK_OUT_HIGH_MODE_S 12 -#define SPI_CK_OUT_LOW_MODE 0x0000000F -#define SPI_CK_OUT_LOW_MODE_S 8 -#define SPI_HOLD_TIME 0x0000000F -#define SPI_HOLD_TIME_S 4 -#define SPI_SETUP_TIME 0x0000000F -#define SPI_SETUP_TIME_S 0 - -#define SPI_CLOCK(i) (REG_SPI_BASE(i) + 0x18) -#define SPI_CLK_EQU_SYSCLK (BIT(31)) -#define SPI_CLKDIV_PRE 0x00001FFF -#define SPI_CLKDIV_PRE_S 18 -#define SPI_CLKCNT_N 0x0000003F -#define SPI_CLKCNT_N_S 12 -#define SPI_CLKCNT_H 0x0000003F -#define SPI_CLKCNT_H_S 6 -#define SPI_CLKCNT_L 0x0000003F -#define SPI_CLKCNT_L_S 0 - -#define SPI_USER(i) (REG_SPI_BASE(i) + 0x1C) -#define SPI_USR_COMMAND (BIT(31)) -#define SPI_USR_ADDR (BIT(30)) -#define SPI_USR_DUMMY (BIT(29)) -#define SPI_USR_MISO (BIT(28)) -#define SPI_USR_MOSI (BIT(27)) -#define SPI_USR_DUMMY_IDLE (BIT(26)) //From previous SDK -#define SPI_USR_MOSI_HIGHPART (BIT(25)) -#define SPI_USR_MISO_HIGHPART (BIT(24)) -#define SPI_USR_PREP_HOLD (BIT(23)) //From previous SDK -#define SPI_USR_CMD_HOLD (BIT(22)) //From previous SDK -#define SPI_USR_ADDR_HOLD (BIT(21)) //From previous SDK -#define SPI_USR_DUMMY_HOLD (BIT(20)) //From previous SDK -#define SPI_USR_DIN_HOLD (BIT(19)) //From previous SDK -#define SPI_USR_DOUT_HOLD (BIT(18)) //From previous SDK -#define SPI_USR_HOLD_POL (BIT(17)) //From previous SDK -#define SPI_SIO (BIT(16)) -#define SPI_FWRITE_QIO (BIT(15)) -#define SPI_FWRITE_DIO (BIT(14)) -#define SPI_FWRITE_QUAD (BIT(13)) -#define SPI_FWRITE_DUAL (BIT(12)) -#define SPI_WR_BYTE_ORDER (BIT(11)) -#define SPI_RD_BYTE_ORDER (BIT(10)) -#define SPI_AHB_ENDIAN_MODE 0x00000003 //From previous SDK -#define SPI_AHB_ENDIAN_MODE_S 8 //From previous SDK -#define SPI_CK_OUT_EDGE (BIT(7)) -#define SPI_CK_I_EDGE (BIT(6)) -#define SPI_CS_SETUP (BIT(5)) -#define SPI_CS_HOLD (BIT(4)) -#define SPI_AHB_USR_COMMAND (BIT(3)) //From previous SDK -#define SPI_FLASH_MODE (BIT(2)) -#define SPI_AHB_USR_COMMAND_4BYTE (BIT(1)) //From previous SDK -#define SPI_DOUTDIN (BIT(0)) //From previous SDK - -//AHB = http://en.wikipedia.org/wiki/Advanced_Microcontroller_Bus_Architecture ? - - -#define SPI_USER1(i) (REG_SPI_BASE(i) + 0x20) -#define SPI_USR_ADDR_BITLEN 0x0000003F -#define SPI_USR_ADDR_BITLEN_S 26 -#define SPI_USR_MOSI_BITLEN 0x000001FF -#define SPI_USR_MOSI_BITLEN_S 17 -#define SPI_USR_MISO_BITLEN 0x000001FF -#define SPI_USR_MISO_BITLEN_S 8 -#define SPI_USR_DUMMY_CYCLELEN 0x000000FF -#define SPI_USR_DUMMY_CYCLELEN_S 0 - -#define SPI_USER2(i) (REG_SPI_BASE(i) + 0x24) -#define SPI_USR_COMMAND_BITLEN 0x0000000F -#define SPI_USR_COMMAND_BITLEN_S 28 -#define SPI_USR_COMMAND_VALUE 0x0000FFFF -#define SPI_USR_COMMAND_VALUE_S 0 - -#define SPI_WR_STATUS(i) (REG_SPI_BASE(i) + 0x28) - //previously defined as SPI_FLASH_USER3. No further info available. - -#define SPI_PIN(i) (REG_SPI_BASE(i) + 0x2C) -#define SPI_IDLE_EDGE (BIT(29)) -#define SPI_CS2_DIS (BIT(2)) -#define SPI_CS1_DIS (BIT(1)) -#define SPI_CS0_DIS (BIT(0)) - -#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30) -#define SPI_SYNC_RESET (BIT(31)) -#define SPI_SLAVE_MODE (BIT(30)) -#define SPI_SLV_WR_RD_BUF_EN (BIT(29)) -#define SPI_SLV_WR_RD_STA_EN (BIT(28)) -#define SPI_SLV_CMD_DEFINE (BIT(27)) -#define SPI_TRANS_CNT 0x0000000F -#define SPI_TRANS_CNT_S 23 -#define SPI_SLV_LAST_STATE 0x00000007 //From previous SDK -#define SPI_SLV_LAST_STATE_S 20 //From previous SDK -#define SPI_SLV_LAST_COMMAND 0x00000007 //From previous SDK -#define SPI_SLV_LAST_COMMAND_S 17 //From previous SDK -#define SPI_CS_I_MODE 0x00000003 //From previous SDK -#define SPI_CS_I_MODE_S 10 //From previous SDK -#define SPI_TRANS_DONE_EN (BIT(9)) -#define SPI_SLV_WR_STA_DONE_EN (BIT(8)) -#define SPI_SLV_RD_STA_DONE_EN (BIT(7)) -#define SPI_SLV_WR_BUF_DONE_EN (BIT(6)) -#define SPI_SLV_RD_BUF_DONE_EN (BIT(5)) -#define SLV_SPI_INT_EN 0x0000001f -#define SLV_SPI_INT_EN_S 5 -#define SPI_TRANS_DONE (BIT(4)) -#define SPI_SLV_WR_STA_DONE (BIT(3)) -#define SPI_SLV_RD_STA_DONE (BIT(2)) -#define SPI_SLV_WR_BUF_DONE (BIT(1)) -#define SPI_SLV_RD_BUF_DONE (BIT(0)) - -#define SPI_SLAVE1(i) (REG_SPI_BASE(i) + 0x34) -#define SPI_SLV_STATUS_BITLEN 0x0000001F -#define SPI_SLV_STATUS_BITLEN_S 27 -#define SPI_SLV_STATUS_FAST_EN (BIT(26)) //From previous SDK -#define SPI_SLV_STATUS_READBACK (BIT(25)) //From previous SDK -#define SPI_SLV_BUF_BITLEN 0x000001FF -#define SPI_SLV_BUF_BITLEN_S 16 -#define SPI_SLV_RD_ADDR_BITLEN 0x0000003F -#define SPI_SLV_RD_ADDR_BITLEN_S 10 -#define SPI_SLV_WR_ADDR_BITLEN 0x0000003F -#define SPI_SLV_WR_ADDR_BITLEN_S 4 -#define SPI_SLV_WRSTA_DUMMY_EN (BIT(3)) -#define SPI_SLV_RDSTA_DUMMY_EN (BIT(2)) -#define SPI_SLV_WRBUF_DUMMY_EN (BIT(1)) -#define SPI_SLV_RDBUF_DUMMY_EN (BIT(0)) - - - -#define SPI_SLAVE2(i) (REG_SPI_BASE(i) + 0x38) -#define SPI_SLV_WRBUF_DUMMY_CYCLELEN 0X000000FF -#define SPI_SLV_WRBUF_DUMMY_CYCLELEN_S 24 -#define SPI_SLV_RDBUF_DUMMY_CYCLELEN 0X000000FF -#define SPI_SLV_RDBUF_DUMMY_CYCLELEN_S 16 -#define SPI_SLV_WRSTR_DUMMY_CYCLELEN 0X000000FF -#define SPI_SLV_WRSTR_DUMMY_CYCLELEN_S 8 -#define SPI_SLV_RDSTR_DUMMY_CYCLELEN 0x000000FF -#define SPI_SLV_RDSTR_DUMMY_CYCLELEN_S 0 - -#define SPI_SLAVE3(i) (REG_SPI_BASE(i) + 0x3C) -#define SPI_SLV_WRSTA_CMD_VALUE 0x000000FF -#define SPI_SLV_WRSTA_CMD_VALUE_S 24 -#define SPI_SLV_RDSTA_CMD_VALUE 0x000000FF -#define SPI_SLV_RDSTA_CMD_VALUE_S 16 -#define SPI_SLV_WRBUF_CMD_VALUE 0x000000FF -#define SPI_SLV_WRBUF_CMD_VALUE_S 8 -#define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF -#define SPI_SLV_RDBUF_CMD_VALUE_S 0 - -//Previous SDKs referred to these following registers as SPI_C0 etc. - -#define SPI_W0(i) (REG_SPI_BASE(i) +0x40) -#define SPI_W1(i) (REG_SPI_BASE(i) +0x44) -#define SPI_W2(i) (REG_SPI_BASE(i) +0x48) -#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C) -#define SPI_W4(i) (REG_SPI_BASE(i) +0x50) -#define SPI_W5(i) (REG_SPI_BASE(i) +0x54) -#define SPI_W6(i) (REG_SPI_BASE(i) +0x58) -#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C) -#define SPI_W8(i) (REG_SPI_BASE(i) +0x60) -#define SPI_W9(i) (REG_SPI_BASE(i) +0x64) -#define SPI_W10(i) (REG_SPI_BASE(i) +0x68) -#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C) -#define SPI_W12(i) (REG_SPI_BASE(i) +0x70) -#define SPI_W13(i) (REG_SPI_BASE(i) +0x74) -#define SPI_W14(i) (REG_SPI_BASE(i) +0x78) -#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C) - - // +0x80 to +0xBC could be SPI_W16 through SPI_W31? - - // +0xC0 to +0xEC not currently defined. - -#define SPI_EXT0(i) (REG_SPI_BASE(i) + 0xF0) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_T_PP_ENA (BIT(31)) //From previous SDK -#define SPI_T_PP_SHIFT 0x0000000F //From previous SDK -#define SPI_T_PP_SHIFT_S 16 //From previous SDK -#define SPI_T_PP_TIME 0x00000FFF //From previous SDK -#define SPI_T_PP_TIME_S 0 //From previous SDK - -#define SPI_EXT1(i) (REG_SPI_BASE(i) + 0xF4) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_T_ERASE_ENA (BIT(31)) //From previous SDK -#define SPI_T_ERASE_SHIFT 0x0000000F //From previous SDK -#define SPI_T_ERASE_SHIFT_S 16 //From previous SDK -#define SPI_T_ERASE_TIME 0x00000FFF //From previous SDK -#define SPI_T_ERASE_TIME_S 0 //From previous SDK - -#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_ST 0x00000007 //From previous SDK -#define SPI_ST_S 0 //From previous SDK - -#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC) -#define SPI_INT_HOLD_ENA 0x00000003 -#define SPI_INT_HOLD_ENA_S 0 -#endif // SPI_REGISTER_H_INCLUDED diff --git a/ports/esp8266/intr.c b/ports/esp8266/intr.c deleted file mode 100644 index 8064171749..0000000000 --- a/ports/esp8266/intr.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "etshal.h" -#include "ets_alt_task.h" - -#include "modmachine.h" -#include "common-hal/pulseio/PulseIn.h" - -// this is in a separate file so it can go in iRAM -void pin_intr_handler_iram(void *arg) { - uint32_t status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, status); - - // machine.Pin handlers - pin_intr_handler(status); - - // microcontroller.Pin handlers - microcontroller_pin_call_intr_handlers(status); -} diff --git a/ports/esp8266/lexerstr32.c b/ports/esp8266/lexerstr32.c deleted file mode 100644 index 6fb84bb74e..0000000000 --- a/ports/esp8266/lexerstr32.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/lexer.h" - -#if MICROPY_ENABLE_COMPILER - -typedef struct _mp_lexer_str32_buf_t { - const uint32_t *src_cur; - uint32_t val; - uint8_t byte_off; -} mp_lexer_str32_buf_t; - -STATIC mp_uint_t str32_buf_next_byte(void *sb_in) { - mp_lexer_str32_buf_t *sb = (mp_lexer_str32_buf_t*)sb_in; - byte c = sb->val & 0xff; - if (c == 0) { - return MP_READER_EOF; - } - - if (++sb->byte_off > 3) { - sb->byte_off = 0; - sb->val = *sb->src_cur++; - } else { - sb->val >>= 8; - } - - return c; -} - -STATIC void str32_buf_free(void *sb_in) { - mp_lexer_str32_buf_t *sb = (mp_lexer_str32_buf_t*)sb_in; - m_del_obj(mp_lexer_str32_buf_t, sb); -} - -mp_lexer_t *mp_lexer_new_from_str32(qstr src_name, const char *str, mp_uint_t len, mp_uint_t free_len) { - mp_lexer_str32_buf_t *sb = m_new_obj(mp_lexer_str32_buf_t); - sb->byte_off = (uint32_t)str & 3; - sb->src_cur = (uint32_t*)(str - sb->byte_off); - sb->val = *sb->src_cur++ >> sb->byte_off * 8; - mp_reader_t reader = {sb, str32_buf_next_byte, str32_buf_free}; - return mp_lexer_new(src_name, reader); -} - -#endif // MICROPY_ENABLE_COMPILER diff --git a/ports/esp8266/machine_adc.c b/ports/esp8266/machine_adc.c deleted file mode 100644 index 2d31ed8ea0..0000000000 --- a/ports/esp8266/machine_adc.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Josef Gajdusek - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "supervisor/shared/translate.h" -#include "user_interface.h" - -const mp_obj_type_t pyb_adc_type; - -typedef struct _pyb_adc_obj_t { - mp_obj_base_t base; - bool isvdd; -} pyb_adc_obj_t; - -STATIC pyb_adc_obj_t pyb_adc_vdd3 = {{&pyb_adc_type}, true}; -STATIC pyb_adc_obj_t pyb_adc_adc = {{&pyb_adc_type}, false}; - -STATIC mp_obj_t pyb_adc_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, - const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - mp_int_t chn = mp_obj_get_int(args[0]); - - switch (chn) { - case 0: - return &pyb_adc_adc; - case 1: - return &pyb_adc_vdd3; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - translate("not a valid ADC Channel: %d"), chn)); - } -} - -STATIC mp_obj_t pyb_adc_read(mp_obj_t self_in) { - pyb_adc_obj_t *adc = self_in; - - if (adc->isvdd) { - return mp_obj_new_int(system_get_vdd33()); - } else { - return mp_obj_new_int(system_adc_read()); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_adc_read_obj, pyb_adc_read); - -STATIC const mp_rom_map_elem_t pyb_adc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&pyb_adc_read_obj) } -}; -STATIC MP_DEFINE_CONST_DICT(pyb_adc_locals_dict, pyb_adc_locals_dict_table); - -const mp_obj_type_t pyb_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .make_new = pyb_adc_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_adc_locals_dict, -}; diff --git a/ports/esp8266/machine_hspi.c b/ports/esp8266/machine_hspi.c deleted file mode 100644 index ac464da456..0000000000 --- a/ports/esp8266/machine_hspi.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "ets_sys.h" -#include "etshal.h" -#include "ets_alt_task.h" - -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "extmod/machine_spi.h" -#include "modmachine.h" -#include "supervisor/shared/translate.h" -#include "hspi.h" - -#if MICROPY_PY_MACHINE_SPI - -typedef struct _machine_hspi_obj_t { - mp_obj_base_t base; - uint32_t baudrate; - uint8_t polarity; - uint8_t phase; -} machine_hspi_obj_t; - -STATIC void machine_hspi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - (void)self_in; - - if (dest == NULL) { - // fast case when we only need to write data - size_t chunk_size = 1024; - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - spi_tx8fast(HSPI, src[i]); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - spi_tx8fast(HSPI, src[i]); - ++i; - } - // wait for SPI transaction to complete - while (spi_busy(HSPI)) { - } - } else { - // we need to read and write data - - // Process data in chunks, let the pending tasks run in between - size_t chunk_size = 1024; // TODO this should depend on baudrate - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - dest[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, src[i], 8, 0); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - dest[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, src[i], 8, 0); - ++i; - } - } -} - -/******************************************************************************/ -// MicroPython bindings for HSPI - -STATIC void machine_hspi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hspi_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "HSPI(id=1, baudrate=%u, polarity=%u, phase=%u)", - self->baudrate, self->polarity, self->phase); -} - -STATIC void machine_hspi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - machine_hspi_obj_t *self = (machine_hspi_obj_t*)self_in; - - enum { ARG_baudrate, ARG_polarity, ARG_phase }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), - allowed_args, args); - - if (args[ARG_baudrate].u_int != -1) { - self->baudrate = args[ARG_baudrate].u_int; - } - if (args[ARG_polarity].u_int != -1) { - self->polarity = args[ARG_polarity].u_int; - } - if (args[ARG_phase].u_int != -1) { - self->phase = args[ARG_phase].u_int; - } - if (self->baudrate == 80000000L) { - // Special case for full speed. - spi_init_gpio(HSPI, SPI_CLK_80MHZ_NODIV); - spi_clock(HSPI, 0, 0); - } else if (self->baudrate > 40000000L) { - mp_raise_ValueError(translate("impossible baudrate")); - } else { - uint32_t divider = 40000000L / self->baudrate; - uint16_t prediv = MIN(divider, SPI_CLKDIV_PRE + 1); - uint16_t cntdiv = (divider / prediv) * 2; // cntdiv has to be even - if (cntdiv > SPI_CLKCNT_N + 1 || cntdiv == 0 || prediv == 0) { - mp_raise_ValueError(translate("impossible baudrate")); - } - self->baudrate = 80000000L / (prediv * cntdiv); - spi_init_gpio(HSPI, SPI_CLK_USE_DIV); - spi_clock(HSPI, prediv, cntdiv); - } - // TODO: Make the byte order configurable too (discuss param names) - spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_FLASH_MODE | SPI_USR_MISO | - SPI_USR_ADDR | SPI_USR_COMMAND | SPI_USR_DUMMY); - // Clear Dual or Quad lines transmission mode - CLEAR_PERI_REG_MASK(SPI_CTRL(HSPI), SPI_QIO_MODE | SPI_DIO_MODE | - SPI_DOUT_MODE | SPI_QOUT_MODE); - spi_mode(HSPI, self->phase, self->polarity); -} - -mp_obj_t machine_hspi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // args[0] holds the id of the peripheral - if (args[0] != MP_OBJ_NEW_SMALL_INT(1)) { - // FlashROM is on SPI0, so far we don't support its usage - mp_raise_ValueError(NULL); - } - - machine_hspi_obj_t *self = m_new_obj(machine_hspi_obj_t); - self->base.type = &machine_hspi_type; - // set defaults - self->baudrate = 80000000L; - self->polarity = 0; - self->phase = 0; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_hspi_init((mp_obj_base_t*)self, n_args - 1, args + 1, &kw_args); - return MP_OBJ_FROM_PTR(self); -} - -STATIC const mp_machine_spi_p_t machine_hspi_p = { - .init = machine_hspi_init, - .transfer = machine_hspi_transfer, -}; - -const mp_obj_type_t machine_hspi_type = { - { &mp_type_type }, - .name = MP_QSTR_HSPI, - .print = machine_hspi_print, - .make_new = mp_machine_spi_make_new, // delegate to master constructor - .protocol = &machine_hspi_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_spi_locals_dict, -}; - -#endif // MICROPY_PY_MACHINE_SPI diff --git a/ports/esp8266/machine_pin.c b/ports/esp8266/machine_pin.c deleted file mode 100644 index 0467ffb4bd..0000000000 --- a/ports/esp8266/machine_pin.c +++ /dev/null @@ -1,520 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "etshal.h" -#include "c_types.h" -#include "user_interface.h" -#include "gpio.h" - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "extmod/virtpin.h" -#include "modmachine.h" - -#include "supervisor/shared/translate.h" - -#define GET_TRIGGER(phys_port) \ - GPIO_PIN_INT_TYPE_GET(GPIO_REG_READ(GPIO_PIN_ADDR(phys_port))) -#define SET_TRIGGER(phys_port, trig) \ - (GPIO_REG_WRITE(GPIO_PIN_ADDR(phys_port), \ - (GPIO_REG_READ(GPIO_PIN_ADDR(phys_port)) & ~GPIO_PIN_INT_TYPE_MASK) \ - | GPIO_PIN_INT_TYPE_SET(trig))) \ - -#define GPIO_MODE_INPUT (0) -#define GPIO_MODE_OUTPUT (1) -#define GPIO_MODE_OPEN_DRAIN (2) // synthesised -#define GPIO_PULL_NONE (0) -#define GPIO_PULL_UP (1) -// Removed in SDK 1.1.0 -//#define GPIO_PULL_DOWN (2) - -typedef struct _pin_irq_obj_t { - mp_obj_base_t base; - uint16_t phys_port; -} pin_irq_obj_t; - -const pyb_pin_obj_t pyb_pin_obj[16 + 1] = { - {{&pyb_pin_type}, 0, FUNC_GPIO0, PERIPHS_IO_MUX_GPIO0_U}, - {{&pyb_pin_type}, 1, FUNC_GPIO1, PERIPHS_IO_MUX_U0TXD_U}, - {{&pyb_pin_type}, 2, FUNC_GPIO2, PERIPHS_IO_MUX_GPIO2_U}, - {{&pyb_pin_type}, 3, FUNC_GPIO3, PERIPHS_IO_MUX_U0RXD_U}, - {{&pyb_pin_type}, 4, FUNC_GPIO4, PERIPHS_IO_MUX_GPIO4_U}, - {{&pyb_pin_type}, 5, FUNC_GPIO5, PERIPHS_IO_MUX_GPIO5_U}, - {{NULL}, 0, 0, 0}, - {{NULL}, 0, 0, 0}, - {{NULL}, 0, 0, 0}, - {{&pyb_pin_type}, 9, FUNC_GPIO9, PERIPHS_IO_MUX_SD_DATA2_U}, - {{&pyb_pin_type}, 10, FUNC_GPIO10, PERIPHS_IO_MUX_SD_DATA3_U}, - {{NULL}, 0, 0, 0}, - {{&pyb_pin_type}, 12, FUNC_GPIO12, PERIPHS_IO_MUX_MTDI_U}, - {{&pyb_pin_type}, 13, FUNC_GPIO13, PERIPHS_IO_MUX_MTCK_U}, - {{&pyb_pin_type}, 14, FUNC_GPIO14, PERIPHS_IO_MUX_MTMS_U}, - {{&pyb_pin_type}, 15, FUNC_GPIO15, PERIPHS_IO_MUX_MTDO_U}, - // GPIO16 is special, belongs to different register set, and - // otherwise handled specially. - {{&pyb_pin_type}, 16, -1, -1}, -}; - -STATIC uint8_t pin_mode[16 + 1]; - -// forward declaration -STATIC const pin_irq_obj_t pin_irq_obj[16]; - -// whether the irq is hard or soft -STATIC bool pin_irq_is_hard[16]; - -void pin_init0(void) { - ETS_GPIO_INTR_DISABLE(); - ETS_GPIO_INTR_ATTACH(pin_intr_handler_iram, NULL); - // disable all interrupts - memset(&MP_STATE_PORT(pin_irq_handler)[0], 0, 16 * sizeof(mp_obj_t)); - memset(pin_irq_is_hard, 0, sizeof(pin_irq_is_hard)); - for (int p = 0; p < 16; ++p) { - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << p); - SET_TRIGGER(p, 0); - } - ETS_GPIO_INTR_ENABLE(); -} - -void pin_intr_handler(uint32_t status) { - mp_sched_lock(); - gc_lock(); - status &= 0xffff; - for (int p = 0; status; ++p, status >>= 1) { - if (status & 1) { - mp_obj_t handler = MP_STATE_PORT(pin_irq_handler)[p]; - if (handler != MP_OBJ_NULL) { - if (pin_irq_is_hard[p]) { - mp_call_function_1_protected(handler, MP_OBJ_FROM_PTR(&pyb_pin_obj[p])); - } else { - mp_sched_schedule(handler, MP_OBJ_FROM_PTR(&pyb_pin_obj[p])); - } - } - } - } - gc_unlock(); - mp_sched_unlock(); -} - -pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in) { - if (mp_obj_get_type(pin_in) != &pyb_pin_type) { - mp_raise_ValueError(translate("expecting a pin")); - } - pyb_pin_obj_t *self = pin_in; - return self; -} - -uint mp_obj_get_pin(mp_obj_t pin_in) { - return mp_obj_get_pin_obj(pin_in)->phys_port; -} - -void mp_hal_pin_input(mp_hal_pin_obj_t pin_id) { - pin_mode[pin_id] = GPIO_MODE_INPUT; - if (pin_id == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - } else { - const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id]; - PIN_FUNC_SELECT(self->periph, self->func); - PIN_PULLUP_DIS(self->periph); - gpio_output_set(0, 0, 0, 1 << self->phys_port); - } -} - -void mp_hal_pin_output(mp_hal_pin_obj_t pin_id) { - pin_mode[pin_id] = GPIO_MODE_OUTPUT; - if (pin_id == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); // output - } else { - const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id]; - PIN_FUNC_SELECT(self->periph, self->func); - PIN_PULLUP_DIS(self->periph); - gpio_output_set(0, 0, 1 << self->phys_port, 0); - } -} - -void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin_id) { - const pyb_pin_obj_t *pin = &pyb_pin_obj[pin_id]; - - if (pin->phys_port == 16) { - // configure GPIO16 as input with output register holding 0 - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1)); // out=0 - return; - } - - ETS_GPIO_INTR_DISABLE(); - PIN_FUNC_SELECT(pin->periph, pin->func); - GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(pin->phys_port)), - GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(pin->phys_port))) - | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); // open drain - GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, - GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << pin->phys_port)); - ETS_GPIO_INTR_ENABLE(); -} - -int pin_get(uint pin) { - if (pin == 16) { - return READ_PERI_REG(RTC_GPIO_IN_DATA) & 1; - } - return GPIO_INPUT_GET(pin); -} - -void pin_set(uint pin, int value) { - if (pin == 16) { - int out_en = (pin_mode[pin] == GPIO_MODE_OUTPUT); - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | out_en); - WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1) | value); - return; - } - - uint32_t enable = 0; - uint32_t disable = 0; - switch (pin_mode[pin]) { - case GPIO_MODE_INPUT: - value = -1; - disable = 1; - break; - - case GPIO_MODE_OUTPUT: - enable = 1; - break; - - case GPIO_MODE_OPEN_DRAIN: - if (value == -1) { - return; - } else if (value == 0) { - enable = 1; - } else { - value = -1; - disable = 1; - } - break; - } - - enable <<= pin; - disable <<= pin; - if (value == -1) { - gpio_output_set(0, 0, enable, disable); - } else { - gpio_output_set(value << pin, (1 - value) << pin, enable, disable); - } -} - -STATIC void pyb_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_pin_obj_t *self = self_in; - - // pin name - mp_printf(print, "Pin(%u)", self->phys_port); -} - -// pin.init(mode, pull=None, *, value) -STATIC mp_obj_t pyb_pin_obj_init_helper(pyb_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_mode, ARG_pull, ARG_value }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get io mode - uint mode = args[ARG_mode].u_int; - - // get pull mode - uint pull = GPIO_PULL_NONE; - if (args[ARG_pull].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[ARG_pull].u_obj); - } - - // get initial value - int value; - if (args[ARG_value].u_obj == MP_OBJ_NULL) { - value = -1; - } else { - value = mp_obj_is_true(args[ARG_value].u_obj); - } - - // save the mode - pin_mode[self->phys_port] = mode; - - // configure the GPIO as requested - if (self->phys_port == 16) { - // only pull-down seems to be supported by the hardware, and - // we only expose pull-up behaviour in software - if (pull != GPIO_PULL_NONE) { - mp_raise_ValueError(translate("Pin(16) doesn't support pull")); - } - } else { - PIN_FUNC_SELECT(self->periph, self->func); - #if 0 - // Removed in SDK 1.1.0 - if ((pull & GPIO_PULL_DOWN) == 0) { - PIN_PULLDWN_DIS(self->periph); - } - #endif - if ((pull & GPIO_PULL_UP) == 0) { - PIN_PULLUP_DIS(self->periph); - } - #if 0 - if ((pull & GPIO_PULL_DOWN) != 0) { - PIN_PULLDWN_EN(self->periph); - } - #endif - if ((pull & GPIO_PULL_UP) != 0) { - PIN_PULLUP_EN(self->periph); - } - } - - pin_set(self->phys_port, value); - - return mp_const_none; -} - -// constructor(id, ...) -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the wanted pin object - int wanted_pin = mp_obj_get_int(args[0]); - pyb_pin_obj_t *pin = NULL; - if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(pyb_pin_obj)) { - pin = (pyb_pin_obj_t*)&pyb_pin_obj[wanted_pin]; - } - if (pin == NULL || pin->base.type == NULL) { - mp_raise_ValueError(translate("invalid pin")); - } - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t pyb_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - pyb_pin_obj_t *self = self_in; - if (n_args == 0) { - // get pin - return MP_OBJ_NEW_SMALL_INT(pin_get(self->phys_port)); - } else { - // set pin - pin_set(self->phys_port, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -// pin.init(mode, pull) -STATIC mp_obj_t pyb_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_init_obj, 1, pyb_pin_obj_init); - -// pin.value([value]) -STATIC mp_obj_t pyb_pin_value(size_t n_args, const mp_obj_t *args) { - return pyb_pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pin_value_obj, 1, 2, pyb_pin_value); - -STATIC mp_obj_t pyb_pin_off(mp_obj_t self_in) { - pyb_pin_obj_t *self = self_in; - pin_set(self->phys_port, 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_off_obj, pyb_pin_off); - -STATIC mp_obj_t pyb_pin_on(mp_obj_t self_in) { - pyb_pin_obj_t *self = self_in; - pin_set(self->phys_port, 1); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_on_obj, pyb_pin_on); - -// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False) -STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_handler, ARG_trigger, ARG_hard }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_PIN_INTR_POSEDGE | GPIO_PIN_INTR_NEGEDGE} }, - { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} }, - }; - pyb_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (self->phys_port >= 16) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, translate("pin does not have IRQ capabilities"))); - } - - if (n_args > 1 || kw_args->used != 0) { - // configure irq - mp_obj_t handler = args[ARG_handler].u_obj; - uint32_t trigger = args[ARG_trigger].u_int; - if (handler == mp_const_none) { - handler = MP_OBJ_NULL; - trigger = 0; - } - ETS_GPIO_INTR_DISABLE(); - MP_STATE_PORT(pin_irq_handler)[self->phys_port] = handler; - pin_irq_is_hard[self->phys_port] = args[ARG_hard].u_bool; - SET_TRIGGER(self->phys_port, trigger); - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << self->phys_port); - ETS_GPIO_INTR_ENABLE(); - } - - // return the irq object - return MP_OBJ_FROM_PTR(&pin_irq_obj[self->phys_port]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_irq_obj, 1, pyb_pin_irq); - -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode); -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - pyb_pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - return pin_get(self->phys_port); - } - case MP_PIN_WRITE: { - pin_set(self->phys_port, arg); - return 0; - } - } - return -1; -} - -STATIC const mp_rom_map_elem_t pyb_pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pyb_pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pyb_pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_pin_irq_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_INPUT) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_OUTPUT) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OPEN_DRAIN) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULL_UP) }, - //{ MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULL_DOWN) }, - - // IRQ triggers, can be or'd together - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_PIN_INTR_POSEDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_PIN_INTR_NEGEDGE) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_pin_locals_dict, pyb_pin_locals_dict_table); - -STATIC const mp_pin_p_t pin_pin_p = { - .ioctl = pin_ioctl, -}; - -const mp_obj_type_t pyb_pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pyb_pin_print, - .make_new = mp_pin_make_new, - .call = pyb_pin_call, - .protocol = &pin_pin_p, - .locals_dict = (mp_obj_dict_t*)&pyb_pin_locals_dict, -}; - -/******************************************************************************/ -// Pin IRQ object - -STATIC const mp_obj_type_t pin_irq_type; - -STATIC const pin_irq_obj_t pin_irq_obj[16] = { - {{&pin_irq_type}, 0}, - {{&pin_irq_type}, 1}, - {{&pin_irq_type}, 2}, - {{&pin_irq_type}, 3}, - {{&pin_irq_type}, 4}, - {{&pin_irq_type}, 5}, - {{&pin_irq_type}, 6}, - {{&pin_irq_type}, 7}, - {{&pin_irq_type}, 8}, - {{&pin_irq_type}, 9}, - {{&pin_irq_type}, 10}, - {{&pin_irq_type}, 11}, - {{&pin_irq_type}, 12}, - {{&pin_irq_type}, 13}, - {{&pin_irq_type}, 14}, - {{&pin_irq_type}, 15}, -}; - -STATIC mp_obj_t pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - pin_irq_obj_t *self = self_in; - mp_arg_check_num(n_args, n_kw, 0, 0, false); - pin_intr_handler(1 << self->phys_port); - return mp_const_none; -} - -STATIC mp_obj_t pin_irq_trigger(size_t n_args, const mp_obj_t *args) { - pin_irq_obj_t *self = args[0]; - uint32_t orig_trig = GET_TRIGGER(self->phys_port); - if (n_args == 2) { - // set trigger - SET_TRIGGER(self->phys_port, mp_obj_get_int(args[1])); - } - // return original trigger value - return MP_OBJ_NEW_SMALL_INT(orig_trig); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_irq_trigger_obj, 1, 2, pin_irq_trigger); - -STATIC const mp_rom_map_elem_t pin_irq_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_trigger), MP_ROM_PTR(&pin_irq_trigger_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pin_irq_locals_dict, pin_irq_locals_dict_table); - -STATIC const mp_obj_type_t pin_irq_type = { - { &mp_type_type }, - .name = MP_QSTR_IRQ, - .call = pin_irq_call, - .locals_dict = (mp_obj_dict_t*)&pin_irq_locals_dict, -}; diff --git a/ports/esp8266/machine_pwm.c b/ports/esp8266/machine_pwm.c deleted file mode 100644 index a117a41d52..0000000000 --- a/ports/esp8266/machine_pwm.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "esppwm.h" - -#include "py/runtime.h" -#include "modmachine.h" -#include "supervisor/shared/translate.h" - -typedef struct _pyb_pwm_obj_t { - mp_obj_base_t base; - pyb_pin_obj_t *pin; - uint8_t active; - uint8_t channel; -} pyb_pwm_obj_t; - -bool pwm_inited = false; - -/******************************************************************************/ -// MicroPython bindings for PWM - -STATIC void pyb_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "PWM(%u", self->pin->phys_port); - if (self->active) { - mp_printf(print, ", freq=%u, duty=%u", - pwm_get_freq(self->channel), pwm_get_duty(self->channel)); - } - mp_printf(print, ")"); -} - -STATIC void pyb_pwm_init_helper(pyb_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_freq, ARG_duty }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_duty, MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - int channel = pwm_add(self->pin->phys_port, self->pin->periph, self->pin->func); - if (channel == -1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - translate("PWM not supported on pin %d"), self->pin->phys_port)); - } - - self->channel = channel; - self->active = 1; - if (args[ARG_freq].u_int != -1) { - pwm_set_freq(args[ARG_freq].u_int, self->channel); - } - if (args[ARG_duty].u_int != -1) { - pwm_set_duty(args[ARG_duty].u_int, self->channel); - } - - pwm_start(); -} - -STATIC mp_obj_t pyb_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - pyb_pin_obj_t *pin = mp_obj_get_pin_obj(args[0]); - - // create PWM object from the given pin - pyb_pwm_obj_t *self = m_new_obj(pyb_pwm_obj_t); - self->base.type = &pyb_pwm_type; - self->pin = pin; - self->active = 0; - self->channel = -1; - - // start the PWM subsystem if it's not already running - if (!pwm_inited) { - pwm_init(); - pwm_inited = true; - } - - // start the PWM running for this channel - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_pwm_init_helper(self, n_args - 1, args + 1, &kw_args); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC mp_obj_t pyb_pwm_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - pyb_pwm_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pwm_init_obj, 1, pyb_pwm_init); - -STATIC mp_obj_t pyb_pwm_deinit(mp_obj_t self_in) { - pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - pwm_delete(self->channel); - self->active = 0; - pwm_start(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pwm_deinit_obj, pyb_pwm_deinit); - -STATIC mp_obj_t pyb_pwm_freq(size_t n_args, const mp_obj_t *args) { - //pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(args[0]); - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(pwm_get_freq(0)); - } else { - // set - pwm_set_freq(mp_obj_get_int(args[1]), 0); - pwm_start(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pwm_freq_obj, 1, 2, pyb_pwm_freq); - -STATIC mp_obj_t pyb_pwm_duty(size_t n_args, const mp_obj_t *args) { - pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(args[0]); - if (!self->active) { - pwm_add(self->pin->phys_port, self->pin->periph, self->pin->func); - self->active = 1; - } - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(pwm_get_duty(self->channel)); - } else { - // set - pwm_set_duty(mp_obj_get_int(args[1]), self->channel); - pwm_start(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pwm_duty_obj, 1, 2, pyb_pwm_duty); - -STATIC const mp_rom_map_elem_t pyb_pwm_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_pwm_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_pwm_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_pwm_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_duty), MP_ROM_PTR(&pyb_pwm_duty_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_pwm_locals_dict, pyb_pwm_locals_dict_table); - -const mp_obj_type_t pyb_pwm_type = { - { &mp_type_type }, - .name = MP_QSTR_PWM, - .print = pyb_pwm_print, - .make_new = pyb_pwm_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_pwm_locals_dict, -}; diff --git a/ports/esp8266/machine_rtc.c b/ports/esp8266/machine_rtc.c deleted file mode 100644 index 9197efb7a8..0000000000 --- a/ports/esp8266/machine_rtc.c +++ /dev/null @@ -1,271 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Josef Gajdusek - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "lib/timeutils/timeutils.h" -#include "supervisor/shared/translate.h" -#include "user_interface.h" -#include "modmachine.h" - -typedef struct _pyb_rtc_obj_t { - mp_obj_base_t base; -} pyb_rtc_obj_t; - -#define MEM_MAGIC 0x75507921 -#define MEM_DELTA_ADDR 64 -#define MEM_CAL_ADDR (MEM_DELTA_ADDR + 2) -#define MEM_USER_MAGIC_ADDR (MEM_CAL_ADDR + 1) -#define MEM_USER_LEN_ADDR (MEM_USER_MAGIC_ADDR + 1) -#define MEM_USER_DATA_ADDR (MEM_USER_LEN_ADDR + 1) -#define MEM_USER_MAXLEN (512 - (MEM_USER_DATA_ADDR - MEM_DELTA_ADDR) * 4) - -// singleton RTC object -STATIC const pyb_rtc_obj_t pyb_rtc_obj = {{&pyb_rtc_type}}; - -// ALARM0 state -uint32_t pyb_rtc_alarm0_wake; // see MACHINE_WAKE_xxx constants -uint64_t pyb_rtc_alarm0_expiry; // in microseconds - -// RTC overflow checking -STATIC uint32_t rtc_last_ticks; - -void mp_hal_rtc_init(void) { - uint32_t magic; - - system_rtc_mem_read(MEM_USER_MAGIC_ADDR, &magic, sizeof(magic)); - if (magic != MEM_MAGIC) { - magic = MEM_MAGIC; - system_rtc_mem_write(MEM_USER_MAGIC_ADDR, &magic, sizeof(magic)); - uint32_t cal = system_rtc_clock_cali_proc(); - int64_t delta = 0; - system_rtc_mem_write(MEM_CAL_ADDR, &cal, sizeof(cal)); - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); - uint32_t len = 0; - system_rtc_mem_write(MEM_USER_LEN_ADDR, &len, sizeof(len)); - } - // system_get_rtc_time() is always 0 after reset/deepsleep - rtc_last_ticks = system_get_rtc_time(); - - // reset ALARM0 state - pyb_rtc_alarm0_wake = 0; - pyb_rtc_alarm0_expiry = 0; -} - -STATIC mp_obj_t pyb_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return constant object - return (mp_obj_t)&pyb_rtc_obj; -} - -void pyb_rtc_set_us_since_2000(uint64_t nowus) { - uint32_t cal = system_rtc_clock_cali_proc(); - // Save RTC ticks for overflow detection. - rtc_last_ticks = system_get_rtc_time(); - int64_t delta = nowus - (((uint64_t)rtc_last_ticks * cal) >> 12); - - // As the calibration value jitters quite a bit, to make the - // clock at least somewhat practically usable, we need to store it - system_rtc_mem_write(MEM_CAL_ADDR, &cal, sizeof(cal)); - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); -}; - -uint64_t pyb_rtc_get_us_since_2000() { - uint32_t cal; - int64_t delta; - uint32_t rtc_ticks; - - system_rtc_mem_read(MEM_CAL_ADDR, &cal, sizeof(cal)); - system_rtc_mem_read(MEM_DELTA_ADDR, &delta, sizeof(delta)); - - // ESP-SDK system_get_rtc_time() only returns uint32 and therefore - // overflow about every 7:45h. Thus, we have to check for - // overflow and handle it. - rtc_ticks = system_get_rtc_time(); - if (rtc_ticks < rtc_last_ticks) { - // Adjust delta because of RTC overflow. - delta += (uint64_t)cal << 20; - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); - } - rtc_last_ticks = rtc_ticks; - - return (((uint64_t)rtc_ticks * cal) >> 12) + delta; -}; - -void rtc_prepare_deepsleep(uint64_t sleep_us) { - // RTC time will reset at wake up. Let's be preared for this. - int64_t delta = pyb_rtc_get_us_since_2000() + sleep_us; - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); -} - -STATIC mp_obj_t pyb_rtc_datetime(size_t n_args, const mp_obj_t *args) { - if (n_args == 1) { - // Get time - uint64_t msecs = pyb_rtc_get_us_since_2000() / 1000; - - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(msecs / 1000, &tm); - - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_wday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(msecs % 1000) - }; - - return mp_obj_new_tuple(8, tuple); - } else { - // Set time - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 8, &items); - - pyb_rtc_set_us_since_2000( - ((uint64_t)timeutils_seconds_since_2000( - mp_obj_get_int(items[0]), - mp_obj_get_int(items[1]), - mp_obj_get_int(items[2]), - mp_obj_get_int(items[4]), - mp_obj_get_int(items[5]), - mp_obj_get_int(items[6])) * 1000 + mp_obj_get_int(items[7])) * 1000); - - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_datetime_obj, 1, 2, pyb_rtc_datetime); - -STATIC mp_obj_t pyb_rtc_memory(size_t n_args, const mp_obj_t *args) { - uint8_t rtcram[MEM_USER_MAXLEN]; - uint32_t len; - - if (n_args == 1) { - // read RTC memory - - system_rtc_mem_read(MEM_USER_LEN_ADDR, &len, sizeof(len)); - system_rtc_mem_read(MEM_USER_DATA_ADDR, rtcram, (len + 3) & ~3); - - return mp_obj_new_bytes(rtcram, len); - } else { - // write RTC memory - - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); - - if (bufinfo.len > MEM_USER_MAXLEN) { - mp_raise_ValueError(translate("buffer too long")); - } - - len = bufinfo.len; - system_rtc_mem_write(MEM_USER_LEN_ADDR, &len, sizeof(len)); - - int i = 0; - for (; i < bufinfo.len; i++) { - rtcram[i] = ((uint8_t *)bufinfo.buf)[i]; - } - - system_rtc_mem_write(MEM_USER_DATA_ADDR, rtcram, (len + 3) & ~3); - - return mp_const_none; - } - -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_memory_obj, 1, 2, pyb_rtc_memory); - -STATIC mp_obj_t pyb_rtc_alarm(mp_obj_t self_in, mp_obj_t alarm_id, mp_obj_t time_in) { - (void)self_in; // unused - - // check we want alarm0 - if (mp_obj_get_int(alarm_id) != 0) { - mp_raise_ValueError(translate("invalid alarm")); - } - - // set expiry time (in microseconds) - pyb_rtc_alarm0_expiry = pyb_rtc_get_us_since_2000() + (uint64_t)mp_obj_get_int(time_in) * 1000; - - return mp_const_none; - -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_rtc_alarm_obj, pyb_rtc_alarm); - -STATIC mp_obj_t pyb_rtc_alarm_left(size_t n_args, const mp_obj_t *args) { - // check we want alarm0 - if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { - mp_raise_ValueError(translate("invalid alarm")); - } - - uint64_t now = pyb_rtc_get_us_since_2000(); - if (pyb_rtc_alarm0_expiry <= now) { - return MP_OBJ_NEW_SMALL_INT(0); - } else { - return mp_obj_new_int((pyb_rtc_alarm0_expiry - now) / 1000); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_alarm_left_obj, 1, 2, pyb_rtc_alarm_left); - -STATIC mp_obj_t pyb_rtc_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_trigger, ARG_wake }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_wake, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // check we want alarm0 - if (args[ARG_trigger].u_int != 0) { - mp_raise_ValueError(translate("invalid alarm")); - } - - // set the wake value - pyb_rtc_alarm0_wake = args[ARG_wake].u_int; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_irq_obj, 1, pyb_rtc_irq); - -STATIC const mp_rom_map_elem_t pyb_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&pyb_rtc_datetime_obj) }, - { MP_ROM_QSTR(MP_QSTR_memory), MP_ROM_PTR(&pyb_rtc_memory_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&pyb_rtc_alarm_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm_left), MP_ROM_PTR(&pyb_rtc_alarm_left_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_rtc_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_ALARM0), MP_ROM_INT(0) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_rtc_locals_dict, pyb_rtc_locals_dict_table); - -const mp_obj_type_t pyb_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = pyb_rtc_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_rtc_locals_dict, -}; diff --git a/ports/esp8266/machine_uart.c b/ports/esp8266/machine_uart.c deleted file mode 100644 index c6a4e1ba12..0000000000 --- a/ports/esp8266/machine_uart.c +++ /dev/null @@ -1,300 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "ets_sys.h" -#include "uart.h" - -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "supervisor/shared/translate.h" -#include "modmachine.h" - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -typedef struct _pyb_uart_obj_t { - mp_obj_base_t base; - uint8_t uart_id; - uint8_t bits; - uint8_t parity; - uint8_t stop; - uint32_t baudrate; - uint16_t timeout; // timeout waiting for first char (in ms) - uint16_t timeout_char; // timeout waiting between chars (in ms) -} pyb_uart_obj_t; - -STATIC const char *_parity_name[] = {"None", "1", "0"}; - -/******************************************************************************/ -// MicroPython bindings for UART - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, timeout=%u, timeout_char=%u)", - self->uart_id, self->baudrate, self->bits, _parity_name[self->parity], - self->stop, self->timeout, self->timeout_char); -} - -STATIC void pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_timeout_char }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 0} }, - //{ MP_QSTR_tx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - //{ MP_QSTR_rx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set baudrate - if (args[ARG_baudrate].u_int > 0) { - self->baudrate = args[ARG_baudrate].u_int; - UartDev.baut_rate = self->baudrate; // Sic! - } - - // set data bits - switch (args[ARG_bits].u_int) { - case 0: - break; - case 5: - UartDev.data_bits = UART_FIVE_BITS; - self->bits = 5; - break; - case 6: - UartDev.data_bits = UART_SIX_BITS; - self->bits = 6; - break; - case 7: - UartDev.data_bits = UART_SEVEN_BITS; - self->bits = 7; - break; - case 8: - UartDev.data_bits = UART_EIGHT_BITS; - self->bits = 8; - break; - default: - mp_raise_ValueError(translate("invalid data bits")); - break; - } - - // set parity - if (args[ARG_parity].u_obj != MP_OBJ_NULL) { - if (args[ARG_parity].u_obj == mp_const_none) { - UartDev.parity = UART_NONE_BITS; - UartDev.exist_parity = UART_STICK_PARITY_DIS; - self->parity = 0; - } else { - mp_int_t parity = mp_obj_get_int(args[ARG_parity].u_obj); - UartDev.exist_parity = UART_STICK_PARITY_EN; - if (parity & 1) { - UartDev.parity = UART_ODD_BITS; - self->parity = 1; - } else { - UartDev.parity = UART_EVEN_BITS; - self->parity = 2; - } - } - } - - // set stop bits - switch (args[ARG_stop].u_int) { - case 0: - break; - case 1: - UartDev.stop_bits = UART_ONE_STOP_BIT; - self->stop = 1; - break; - case 2: - UartDev.stop_bits = UART_TWO_STOP_BIT; - self->stop = 2; - break; - default: - mp_raise_ValueError(translate("invalid stop bits")); - break; - } - - // set timeout - self->timeout = args[ARG_timeout].u_int; - - // set timeout_char - // make sure it is at least as long as a whole character (13 bits to be safe) - self->timeout_char = args[ARG_timeout_char].u_int; - uint32_t min_timeout_char = 13000 / self->baudrate + 1; - if (self->timeout_char < min_timeout_char) { - self->timeout_char = min_timeout_char; - } - - // setup - uart_setup(self->uart_id); -} - -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get uart id - mp_int_t uart_id = mp_obj_get_int(args[0]); - if (uart_id != 0 && uart_id != 1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, translate("UART(%d) does not exist"), uart_id)); - } - - // create instance - pyb_uart_obj_t *self = m_new_obj(pyb_uart_obj_t); - self->base.type = &pyb_uart_type; - self->uart_id = uart_id; - self->baudrate = 115200; - self->bits = 8; - self->parity = 0; - self->stop = 1; - self->timeout = 0; - self->timeout_char = 0; - - // init the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self->uart_id)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - - if (self->uart_id == 1) { - mp_raise_msg(&mp_type_OSError, translate("UART(1) can't read")); - } - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // wait for first char to become available - if (!uart_rx_wait(self->timeout * 1000)) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // read the data - uint8_t *buf = buf_in; - for (;;) { - *buf++ = uart_rx_char(); - if (--size == 0 || !uart_rx_wait(self->timeout_char * 1000)) { - // return number of bytes read - return buf - (uint8_t*)buf_in; - } - } -} - -STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - const byte *buf = buf_in; - - /* TODO implement non-blocking - // wait to be able to write the first character - if (!uart_tx_wait(self, timeout)) { - *errcode = EAGAIN; - return MP_STREAM_ERROR; - } - */ - - // write the data - for (size_t i = 0; i < size; ++i) { - uart_tx_one_char(self->uart_id, *buf++); - } - - // return number of bytes written - return size; -} - -STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_uart_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self->uart_id)) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && uart_tx_any_room(self->uart_id)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = pyb_uart_read, - .write = pyb_uart_write, - .ioctl = pyb_uart_ioctl, - .is_text = false, -}; - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_uart_locals_dict, -}; diff --git a/ports/esp8266/machine_wdt.c b/ports/esp8266/machine_wdt.c deleted file mode 100644 index 4432297fa8..0000000000 --- a/ports/esp8266/machine_wdt.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//#include -#include - -#include "py/runtime.h" -#include "user_interface.h" -#include "etshal.h" - -const mp_obj_type_t esp_wdt_type; - -typedef struct _machine_wdt_obj_t { - mp_obj_base_t base; -} machine_wdt_obj_t; - -STATIC machine_wdt_obj_t wdt_default = {{&esp_wdt_type}}; - -STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - - mp_int_t id = 0; - if (n_args > 0) { - id = mp_obj_get_int(args[0]); - } - - switch (id) { - case 0: - return &wdt_default; - default: - mp_raise_ValueError(NULL); - } -} - -STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) { - (void)self_in; - system_soft_wdt_feed(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed); - -STATIC mp_obj_t machine_wdt_deinit(mp_obj_t self_in) { - (void)self_in; - ets_wdt_disable(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_deinit_obj, machine_wdt_deinit); - -STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_wdt_deinit_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table); - -const mp_obj_type_t esp_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = machine_wdt_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_wdt_locals_dict, -}; diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c deleted file mode 100644 index 969d35bbf9..0000000000 --- a/ports/esp8266/main.c +++ /dev/null @@ -1,195 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/compile.h" -#include "py/frozenmod.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "py/gc.h" -#include "lib/oofatfs/ff.h" -#include "lib/mp-readline/readline.h" -#include "lib/utils/pyexec.h" -#include "gccollect.h" -#include "user_interface.h" -#include "common-hal/microcontroller/Pin.h" -#include "common-hal/pulseio/PWMOut.h" - -STATIC char heap[36 * 1024]; - -bool maybe_run(const char* filename, pyexec_result_t* exec_result) { - mp_import_stat_t stat = mp_import_stat(filename); - if (stat != MP_IMPORT_STAT_FILE) { - return false; - } - mp_hal_stdout_tx_str(filename); - mp_hal_stdout_tx_str(" output:\r\n"); - pyexec_file(filename, exec_result); - return true; -} - -bool serial_active = false; - -STATIC bool start_mp(void) { - pyexec_frozen_module("_boot.py"); - - pyexec_result_t result; - bool found_boot = maybe_run("settings.txt", &result) || - maybe_run("settings.py", &result) || - maybe_run("boot.py", &result) || - maybe_run("boot.txt", &result); - - if (!found_boot || !(result.return_code & PYEXEC_FORCED_EXIT)) { - maybe_run("code.txt", &result) || - maybe_run("code.py", &result) || - maybe_run("main.py", &result) || - maybe_run("main.txt", &result); - } - - if (result.return_code & PYEXEC_FORCED_EXIT) { - return false; - } - - // We can't detect connections so we wait for any character to mark the serial active. - if (!serial_active) { - mp_hal_stdin_rx_chr(); - serial_active = true; - } - mp_hal_stdout_tx_str("\r\n\r\n"); - mp_hal_stdout_tx_str("Press any key to enter the REPL. Use CTRL-D to soft reset.\r\n"); - return mp_hal_stdin_rx_chr() == CHAR_CTRL_D; -} - -STATIC void mp_reset(void) { - mp_stack_set_top((void*)0x40000000); - mp_stack_set_limit(8192); - mp_hal_init(); - gc_init(heap, heap + sizeof(heap)); - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_)); - // Frozen modules are in their own pseudo-dir, e.g., ".frozen". - // Prioritize .frozen over /lib. - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_FROZEN_FAKE_DIR_QSTR)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_lib)); - - mp_obj_list_init(mp_sys_argv, 0); - - reset_pins(); - #if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - extern void esp_native_code_init(void); - esp_native_code_init(); - #endif - pin_init0(); - readline_init0(); - dupterm_task_init(); - pwmout_reset(); -} - -bool soft_reset(void) { - gc_sweep_all(); - mp_hal_stdout_tx_str("PYB: soft reboot\r\n"); - mp_hal_delay_us(10000); // allow UART to flush output - mp_reset(); - mp_hal_delay_us(1000); // Give the RTOS time to do housekeeping. - return start_mp(); -} - -void init_done(void) { - mp_reset(); - mp_hal_delay_us(1000); // Give the RTOS time to do housekeeping. - bool skip_repl = start_mp(); - mp_hal_stdout_tx_str("\r\n"); - - int exit_code = PYEXEC_FORCED_EXIT; - while (true) { - if (!skip_repl) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - exit_code = pyexec_raw_repl(); - } else { - exit_code = pyexec_friendly_repl(); - } - } - if (exit_code == PYEXEC_FORCED_EXIT) { - skip_repl = soft_reset(); - } else if (exit_code != 0) { - break; - } - } -} - -void user_init(void) { - system_init_done_cb(init_done); -} - -#if !MICROPY_VFS -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - (void)path; - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -#endif - -void MP_FASTCODE(nlr_jump_fail)(void *val) { - printf("NLR jump failed\n"); - for (;;) { - } -} - -//void __assert(const char *file, int line, const char *func, const char *expr) { -void __assert(const char *file, int line, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - for (;;) { - } -} - -#if !MICROPY_DEBUG_PRINTERS -// With MICROPY_DEBUG_PRINTERS disabled DEBUG_printf is not defined but it -// is still needed by esp-open-lwip for debugging output, so define it here. -#include -int mp_vprintf(const mp_print_t *print, const char *fmt, va_list args); -int DEBUG_printf(const char *fmt, ...) { - va_list ap; - va_start(ap, fmt); - int ret = mp_vprintf(&MICROPY_DEBUG_PRINTER_DEST, fmt, ap); - va_end(ap); - return ret; -} -#endif diff --git a/ports/esp8266/makeimg.py b/ports/esp8266/makeimg.py deleted file mode 100644 index 1071f83e17..0000000000 --- a/ports/esp8266/makeimg.py +++ /dev/null @@ -1,41 +0,0 @@ -import sys -import struct -import hashlib - -SEGS_MAX_SIZE = 0x9000 - -assert len(sys.argv) == 4 - -md5 = hashlib.md5() - -with open(sys.argv[3], 'wb') as fout: - - with open(sys.argv[1], 'rb') as f: - data_flash = f.read() - fout.write(data_flash) - # First 4 bytes include flash size, etc. which may be changed - # by esptool.py, etc. - md5.update(data_flash[4:]) - print('flash ', len(data_flash)) - - with open(sys.argv[2], 'rb') as f: - data_rom = f.read() - - print(SEGS_MAX_SIZE, len(data_flash)) - pad = b'\xff' * (SEGS_MAX_SIZE - len(data_flash)) - assert len(pad) >= 4 - fout.write(pad[:-4]) - md5.update(pad[:-4]) - len_data = struct.pack("I", SEGS_MAX_SIZE + len(data_rom)) - fout.write(len_data) - md5.update(len_data) - print('padding ', len(pad)) - - fout.write(data_rom) - md5.update(data_rom) - print('irom0text', len(data_rom)) - - fout.write(md5.digest()) - - print('total ', SEGS_MAX_SIZE + len(data_rom)) - print('md5 ', md5.hexdigest()) diff --git a/ports/esp8266/modesp.c b/ports/esp8266/modesp.c deleted file mode 100644 index b1b30cd8ba..0000000000 --- a/ports/esp8266/modesp.c +++ /dev/null @@ -1,361 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "supervisor/shared/translate.h" -#include "uart.h" -#include "user_interface.h" -#include "mem.h" -#include "modmachine.h" - -#define MODESP_INCLUDE_CONSTANTS (1) - -void error_check(bool status, const compressed_string_t *msg) { - if (!status) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, msg)); - } -} - -STATIC mp_obj_t esp_osdebug(mp_obj_t val) { - if (val == mp_const_none) { - uart_os_config(-1); - } else { - uart_os_config(mp_obj_get_int(val)); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_osdebug_obj, esp_osdebug); - -STATIC mp_obj_t esp_sleep_type(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - return mp_obj_new_int(wifi_get_sleep_type()); - } else { - wifi_set_sleep_type(mp_obj_get_int(args[0])); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_sleep_type_obj, 0, 1, esp_sleep_type); - -STATIC mp_obj_t esp_deepsleep(size_t n_args, const mp_obj_t *args) { - uint32_t sleep_us = n_args > 0 ? mp_obj_get_int(args[0]) : 0; - // prepare for RTC reset at wake up - rtc_prepare_deepsleep(sleep_us); - system_deep_sleep_set_option(n_args > 1 ? mp_obj_get_int(args[1]) : 0); - system_deep_sleep(sleep_us); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_deepsleep_obj, 0, 2, esp_deepsleep); - -STATIC mp_obj_t esp_flash_id() { - return mp_obj_new_int(spi_flash_get_id()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_id_obj, esp_flash_id); - -STATIC mp_obj_t esp_flash_read(mp_obj_t offset_in, mp_obj_t len_or_buf_in) { - mp_int_t offset = mp_obj_get_int(offset_in); - - mp_int_t len; - byte *buf; - bool alloc_buf = MP_OBJ_IS_INT(len_or_buf_in); - - if (alloc_buf) { - len = mp_obj_get_int(len_or_buf_in); - buf = m_new(byte, len); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(len_or_buf_in, &bufinfo, MP_BUFFER_WRITE); - len = bufinfo.len; - buf = bufinfo.buf; - } - - // We know that allocation will be 4-byte aligned for sure - SpiFlashOpResult res = spi_flash_read(offset, (uint32_t*)buf, len); - if (res == SPI_FLASH_RESULT_OK) { - if (alloc_buf) { - return mp_obj_new_bytes(buf, len); - } - return mp_const_none; - } - if (alloc_buf) { - m_del(byte, buf, len); - } - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_flash_read_obj, esp_flash_read); - -STATIC mp_obj_t esp_flash_write(mp_obj_t offset_in, const mp_obj_t buf_in) { - mp_int_t offset = mp_obj_get_int(offset_in); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len & 0x3) { - mp_raise_ValueError(translate("len must be multiple of 4")); - } - SpiFlashOpResult res = spi_flash_write(offset, bufinfo.buf, bufinfo.len); - if (res == SPI_FLASH_RESULT_OK) { - return mp_const_none; - } - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_flash_write_obj, esp_flash_write); - -STATIC mp_obj_t esp_flash_erase(mp_obj_t sector_in) { - mp_int_t sector = mp_obj_get_int(sector_in); - SpiFlashOpResult res = spi_flash_erase_sector(sector); - if (res == SPI_FLASH_RESULT_OK) { - return mp_const_none; - } - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_flash_erase_obj, esp_flash_erase); - -STATIC mp_obj_t esp_flash_size(void) { - extern char flashchip; - // For SDK 1.5.2, either address has shifted and not mirrored in - // eagle.rom.addr.v6.ld, or extra initial member was added. - SpiFlashChip *flash = (SpiFlashChip*)(&flashchip + 4); - #if 0 - printf("deviceId: %x\n", flash->deviceId); - printf("chip_size: %u\n", flash->chip_size); - printf("block_size: %u\n", flash->block_size); - printf("sector_size: %u\n", flash->sector_size); - printf("page_size: %u\n", flash->page_size); - printf("status_mask: %u\n", flash->status_mask); - #endif - return mp_obj_new_int_from_uint(flash->chip_size); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_size_obj, esp_flash_size); - -// If there's just 1 loadable segment at the start of flash, -// we assume there's a yaota8266 bootloader. -#define IS_OTA_FIRMWARE() ((*(uint32_t*)0x40200000 & 0xff00) == 0x100) - -extern byte _firmware_size[]; - -STATIC mp_obj_t esp_flash_user_start(void) { - return MP_OBJ_NEW_SMALL_INT((uint32_t)_firmware_size); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_user_start_obj, esp_flash_user_start); - -STATIC mp_obj_t esp_check_fw(void) { - MD5_CTX ctx; - char *fw_start = (char*)0x40200000; - if (IS_OTA_FIRMWARE()) { - // Skip yaota8266 bootloader - fw_start += 0x3c000; - } - - uint32_t size = *(uint32_t*)(fw_start + 0x8ffc); - printf("size: %d\n", size); - if (size > 1024 * 1024) { - printf("Invalid size\n"); - return mp_const_false; - } - MD5Init(&ctx); - MD5Update(&ctx, fw_start + 4, size - 4); - unsigned char digest[16]; - MD5Final(digest, &ctx); - printf("md5: "); - for (int i = 0; i < 16; i++) { - printf("%02x", digest[i]); - } - printf("\n"); - return mp_obj_new_bool(memcmp(digest, fw_start + size, sizeof(digest)) == 0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_check_fw_obj, esp_check_fw); - -STATIC mp_obj_t esp_freemem() { - return MP_OBJ_NEW_SMALL_INT(system_get_free_heap_size()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_freemem_obj, esp_freemem); - -STATIC mp_obj_t esp_meminfo() { - system_print_meminfo(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_meminfo_obj, esp_meminfo); - -STATIC mp_obj_t esp_malloc(mp_obj_t size_in) { - return MP_OBJ_NEW_SMALL_INT((mp_uint_t)os_malloc(mp_obj_get_int(size_in))); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_malloc_obj, esp_malloc); - -STATIC mp_obj_t esp_free(mp_obj_t addr_in) { - os_free((void*)mp_obj_get_int(addr_in)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_free_obj, esp_free); - -STATIC mp_obj_t esp_esf_free_bufs(mp_obj_t idx_in) { - return MP_OBJ_NEW_SMALL_INT(ets_esf_free_bufs(mp_obj_get_int(idx_in))); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_esf_free_bufs_obj, esp_esf_free_bufs); - -#if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - -// We provide here a way of committing executable data to a region from -// which it can be executed by the CPU. There are 2 such writable regions: -// - iram1, which may have some space left at the end of it -// - memory-mapped flash rom -// -// By default the iram1 region (the space at the end of it) is used. The -// user can select iram1 or a section of flash by calling the -// esp.set_native_code_location() function; see below. If flash is selected -// then it is erased as needed. - -#include "gccollect.h" - -#define IRAM1_END (0x40108000) -#define FLASH_START (0x40200000) -#define FLASH_END (0x40300000) -#define FLASH_SEC_SIZE (4096) - -#define ESP_NATIVE_CODE_IRAM1 (0) -#define ESP_NATIVE_CODE_FLASH (1) - -extern uint32_t _lit4_end; -STATIC uint32_t esp_native_code_location; -STATIC uint32_t esp_native_code_start; -STATIC uint32_t esp_native_code_end; -STATIC uint32_t esp_native_code_cur; -STATIC uint32_t esp_native_code_erased; - -void esp_native_code_init(void) { - esp_native_code_location = ESP_NATIVE_CODE_IRAM1; - esp_native_code_start = (uint32_t)&_lit4_end; - esp_native_code_end = IRAM1_END; - esp_native_code_cur = esp_native_code_start; - esp_native_code_erased = 0; -} - -void esp_native_code_gc_collect(void) { - void *src; - if (esp_native_code_location == ESP_NATIVE_CODE_IRAM1) { - src = (void*)esp_native_code_start; - } else { - src = (void*)(FLASH_START + esp_native_code_start); - } - gc_collect_root(src, (esp_native_code_end - esp_native_code_start) / sizeof(uint32_t)); -} - -void *esp_native_code_commit(void *buf, size_t len) { - //printf("COMMIT(buf=%p, len=%u, start=%08x, cur=%08x, end=%08x, erased=%08x)\n", buf, len, esp_native_code_start, esp_native_code_cur, esp_native_code_end, esp_native_code_erased); - - len = (len + 3) & ~3; - if (esp_native_code_cur + len > esp_native_code_end) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_MemoryError, - translate("memory allocation failed, allocating %u bytes for native code"), (uint)len)); - } - - void *dest; - if (esp_native_code_location == ESP_NATIVE_CODE_IRAM1) { - dest = (void*)esp_native_code_cur; - memcpy(dest, buf, len); - } else { - SpiFlashOpResult res; - while (esp_native_code_erased < esp_native_code_cur + len) { - res = spi_flash_erase_sector(esp_native_code_erased / FLASH_SEC_SIZE); - if (res != SPI_FLASH_RESULT_OK) { - break; - } - esp_native_code_erased += FLASH_SEC_SIZE; - } - if (res == SPI_FLASH_RESULT_OK) { - res = spi_flash_write(esp_native_code_cur, buf, len); - } - if (res != SPI_FLASH_RESULT_OK) { - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); - } - dest = (void*)(FLASH_START + esp_native_code_cur); - } - - esp_native_code_cur += len; - - return dest; -} - -STATIC mp_obj_t esp_set_native_code_location(mp_obj_t start_in, mp_obj_t len_in) { - if (start_in == mp_const_none && len_in == mp_const_none) { - // use end of iram1 region - esp_native_code_init(); - } else { - // use flash; input params are byte offsets from start of flash - esp_native_code_location = ESP_NATIVE_CODE_FLASH; - esp_native_code_start = mp_obj_get_int(start_in); - esp_native_code_end = esp_native_code_start + mp_obj_get_int(len_in); - esp_native_code_cur = esp_native_code_start; - esp_native_code_erased = esp_native_code_start; - // memory-mapped flash is limited in extents to 1MByte - if (esp_native_code_end > FLASH_END - FLASH_START) { - mp_raise_ValueError(translate("flash location must be below 1MByte")); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_set_native_code_location_obj, esp_set_native_code_location); - -#endif - -STATIC const mp_rom_map_elem_t esp_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_esp) }, - - { MP_ROM_QSTR(MP_QSTR_osdebug), MP_ROM_PTR(&esp_osdebug_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_type), MP_ROM_PTR(&esp_sleep_type_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&esp_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_id), MP_ROM_PTR(&esp_flash_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_read), MP_ROM_PTR(&esp_flash_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_write), MP_ROM_PTR(&esp_flash_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_erase), MP_ROM_PTR(&esp_flash_erase_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_size), MP_ROM_PTR(&esp_flash_size_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_user_start), MP_ROM_PTR(&esp_flash_user_start_obj) }, - { MP_ROM_QSTR(MP_QSTR_freemem), MP_ROM_PTR(&esp_freemem_obj) }, - { MP_ROM_QSTR(MP_QSTR_meminfo), MP_ROM_PTR(&esp_meminfo_obj) }, - { MP_ROM_QSTR(MP_QSTR_check_fw), MP_ROM_PTR(&esp_check_fw_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_info_obj) }, // TODO delete/rename/move elsewhere - { MP_ROM_QSTR(MP_QSTR_malloc), MP_ROM_PTR(&esp_malloc_obj) }, - { MP_ROM_QSTR(MP_QSTR_free), MP_ROM_PTR(&esp_free_obj) }, - { MP_ROM_QSTR(MP_QSTR_esf_free_bufs), MP_ROM_PTR(&esp_esf_free_bufs_obj) }, - #if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - { MP_ROM_QSTR(MP_QSTR_set_native_code_location), MP_ROM_PTR(&esp_set_native_code_location_obj) }, - #endif - -#if MODESP_INCLUDE_CONSTANTS - { MP_ROM_QSTR(MP_QSTR_SLEEP_NONE), MP_ROM_INT(NONE_SLEEP_T) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP_LIGHT), MP_ROM_INT(LIGHT_SLEEP_T) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP_MODEM), MP_ROM_INT(MODEM_SLEEP_T) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(esp_module_globals, esp_module_globals_table); - -const mp_obj_module_t esp_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&esp_module_globals, -}; diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c deleted file mode 100644 index dc7bad1c68..0000000000 --- a/ports/esp8266/modmachine.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/runtime.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "modmachine.h" -#include "supervisor/shared/translate.h" - -#include "xtirq.h" -#include "os_type.h" -#include "osapi.h" -#include "etshal.h" -#include "ets_alt_task.h" -#include "user_interface.h" - -#if MICROPY_PY_MACHINE - -//#define MACHINE_WAKE_IDLE (0x01) -//#define MACHINE_WAKE_SLEEP (0x02) -#define MACHINE_WAKE_DEEPSLEEP (0x04) - -extern const mp_obj_type_t esp_wdt_type; - -STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - // get - return mp_obj_new_int(system_get_cpu_freq() * 1000000); - } else { - // set - mp_int_t freq = mp_obj_get_int(args[0]) / 1000000; - if (freq != 80 && freq != 160) { - mp_raise_ValueError(translate("frequency can only be either 80Mhz or 160MHz")); - } - system_update_cpu_freq(freq); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq); - -STATIC mp_obj_t machine_reset(void) { - system_restart(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_reset_cause(void) { - return MP_OBJ_NEW_SMALL_INT(system_get_rst_info()->reason); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC mp_obj_t machine_unique_id(void) { - uint32_t id = system_get_chip_id(); - return mp_obj_new_bytes((byte*)&id, sizeof(id)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -STATIC mp_obj_t machine_idle(void) { - uint32_t t = mp_hal_ticks_cpu(); - asm("waiti 0"); - t = mp_hal_ticks_cpu() - t; - return MP_OBJ_NEW_SMALL_INT(t); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle); - -STATIC mp_obj_t machine_sleep(void) { - printf("Warning: not yet implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep(void) { - // default to sleep forever - uint32_t sleep_us = 0; - - // see if RTC.ALARM0 should wake the device - if (pyb_rtc_alarm0_wake & MACHINE_WAKE_DEEPSLEEP) { - uint64_t t = pyb_rtc_get_us_since_2000(); - if (pyb_rtc_alarm0_expiry <= t) { - sleep_us = 1; // alarm already expired so wake immediately - } else { - uint64_t delta = pyb_rtc_alarm0_expiry - t; - if (delta <= 0xffffffff) { - // sleep for the desired time - sleep_us = delta; - } else { - // overflow, just set to maximum sleep time - sleep_us = 0xffffffff; - } - } - } - - // prepare for RTC reset at wake up - rtc_prepare_deepsleep(sleep_us); - // put the device in a deep-sleep state - system_deep_sleep_set_option(0); // default power down mode; TODO check this - system_deep_sleep(sleep_us); - - for (;;) { - // we must not return - ets_loop_iter(); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -typedef struct _esp_timer_obj_t { - mp_obj_base_t base; - os_timer_t timer; - mp_obj_t callback; -} esp_timer_obj_t; - -const mp_obj_type_t esp_timer_type; - -STATIC void esp_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - esp_timer_obj_t *self = self_in; - mp_printf(print, "Timer(%p)", &self->timer); -} - -STATIC mp_obj_t esp_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - esp_timer_obj_t *tim = m_new_obj(esp_timer_obj_t); - tim->base.type = &esp_timer_type; - return tim; -} - -STATIC void esp_timer_cb(void *arg) { - esp_timer_obj_t *self = arg; - mp_sched_schedule(self->callback, self); -} - -STATIC mp_obj_t esp_timer_init_helper(esp_timer_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { -// { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - self->callback = args[2].u_obj; - // Be sure to disarm timer before making any changes - os_timer_disarm(&self->timer); - os_timer_setfn(&self->timer, esp_timer_cb, self); - os_timer_arm(&self->timer, args[0].u_int, args[1].u_int); - - return mp_const_none; -} - -STATIC mp_obj_t esp_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return esp_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_timer_init_obj, 1, esp_timer_init); - -STATIC mp_obj_t esp_timer_deinit(mp_obj_t self_in) { - esp_timer_obj_t *self = self_in; - os_timer_disarm(&self->timer); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_timer_deinit_obj, esp_timer_deinit); - -STATIC const mp_rom_map_elem_t esp_timer_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&esp_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&esp_timer_init_obj) }, -// { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&esp_timer_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_ONE_SHOT), MP_ROM_INT(false) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(true) }, -}; -STATIC MP_DEFINE_CONST_DICT(esp_timer_locals_dict, esp_timer_locals_dict_table); - -const mp_obj_type_t esp_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = esp_timer_print, - .make_new = esp_timer_make_new, - .locals_dict = (mp_obj_dict_t*)&esp_timer_locals_dict, -}; - -// this bit is unused in the Xtensa PS register -#define ETS_LOOP_ITER_BIT (12) - -STATIC mp_obj_t machine_disable_irq(void) { - uint32_t state = disable_irq(); - state = (state & ~(1 << ETS_LOOP_ITER_BIT)) | (ets_loop_iter_disable << ETS_LOOP_ITER_BIT); - ets_loop_iter_disable = 1; - return mp_obj_new_int(state); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq); - -STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) { - uint32_t state = mp_obj_get_int(state_in); - ets_loop_iter_disable = (state >> ETS_LOOP_ITER_BIT) & 1; - enable_irq(state & ~(1 << ETS_LOOP_ITER_BIT)); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, - - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&esp_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&esp_wdt_type) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&pyb_pwm_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - #if MICROPY_PY_MACHINE_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, - #endif - #if MICROPY_PY_MACHINE_SPI - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hspi_type) }, - #endif - - // wake abilities - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) }, - - // reset causes - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(REASON_EXT_SYS_RST) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(REASON_DEEP_SLEEP_AWAKE) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(REASON_WDT_RST) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(REASON_SOFT_RESTART) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - -#endif // MICROPY_PY_MACHINE diff --git a/ports/esp8266/modmachine.h b/ports/esp8266/modmachine.h deleted file mode 100644 index eae351f68d..0000000000 --- a/ports/esp8266/modmachine.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_MODMACHINE_H -#define MICROPY_INCLUDED_ESP8266_MODMACHINE_H - -#include "py/obj.h" - -extern const mp_obj_type_t pyb_pin_type; -extern const mp_obj_type_t pyb_pwm_type; -extern const mp_obj_type_t pyb_adc_type; -extern const mp_obj_type_t pyb_rtc_type; -extern const mp_obj_type_t pyb_uart_type; -extern const mp_obj_type_t pyb_i2c_type; -extern const mp_obj_type_t machine_hspi_type; - -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj); - -typedef struct _pyb_pin_obj_t { - mp_obj_base_t base; - uint16_t phys_port; - uint16_t func; - uint32_t periph; -} pyb_pin_obj_t; - -const pyb_pin_obj_t pyb_pin_obj[16 + 1]; - -void pin_init0(void); -void pin_intr_handler_iram(void *arg); -void pin_intr_handler(uint32_t); - -uint mp_obj_get_pin(mp_obj_t pin_in); -pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in); -int pin_get(uint pin); -void pin_set(uint pin, int value); - -extern uint32_t pyb_rtc_alarm0_wake; -extern uint64_t pyb_rtc_alarm0_expiry; - -void pyb_rtc_set_us_since_2000(uint64_t nowus); -uint64_t pyb_rtc_get_us_since_2000(); -void rtc_prepare_deepsleep(uint64_t sleep_us); - -#endif // MICROPY_INCLUDED_ESP8266_MODMACHINE_H diff --git a/ports/esp8266/modnetwork.c b/ports/esp8266/modnetwork.c deleted file mode 100644 index 1a41aa4d61..0000000000 --- a/ports/esp8266/modnetwork.c +++ /dev/null @@ -1,535 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015-2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "supervisor/shared/translate.h" -#include "queue.h" -#include "user_interface.h" -#include "espconn.h" -#include "spi_flash.h" -#include "ets_alt_task.h" -#include "lwip/dns.h" - -#define MODNETWORK_INCLUDE_CONSTANTS (1) - -typedef struct _wlan_if_obj_t { - mp_obj_base_t base; - int if_id; -} wlan_if_obj_t; - -void error_check(bool status, const compressed_string_t *msg); -const mp_obj_type_t wlan_if_type; - -STATIC const wlan_if_obj_t wlan_objs[] = { - {{&wlan_if_type}, STATION_IF}, - {{&wlan_if_type}, SOFTAP_IF}, -}; - -STATIC void require_if(mp_obj_t wlan_if, int if_no) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(wlan_if); - if (self->if_id != if_no) { - error_check(false, if_no == STATION_IF ? translate("STA required") : translate("AP required")); - } -} - -STATIC mp_obj_t get_wlan(size_t n_args, const mp_obj_t *args) { - int idx = 0; - if (n_args > 0) { - idx = mp_obj_get_int(args[0]); - if (idx < 0 || idx >= sizeof(wlan_objs)) { - mp_raise_ValueError(NULL); - } - } - return MP_OBJ_FROM_PTR(&wlan_objs[idx]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(get_wlan_obj, 0, 1, get_wlan); - -STATIC mp_obj_t esp_active(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - uint32_t mode = wifi_get_opmode(); - if (n_args > 1) { - int mask = self->if_id == STATION_IF ? STATION_MODE : SOFTAP_MODE; - if (mp_obj_get_int(args[1]) != 0) { - mode |= mask; - } else { - mode &= ~mask; - } - error_check(wifi_set_opmode(mode), translate("Cannot update i/f status")); - return mp_const_none; - } - - // Get active status - if (self->if_id == STATION_IF) { - return mp_obj_new_bool(mode & STATION_MODE); - } else { - return mp_obj_new_bool(mode & SOFTAP_MODE); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_active_obj, 1, 2, esp_active); - -STATIC mp_obj_t esp_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_ssid, ARG_password, ARG_bssid }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - require_if(pos_args[0], STATION_IF); - struct station_config config = {{0}}; - size_t len; - const char *p; - bool set_config = false; - - // set parameters based on given args - if (args[ARG_ssid].u_obj != mp_const_none) { - p = mp_obj_str_get_data(args[ARG_ssid].u_obj, &len); - len = MIN(len, sizeof(config.ssid)); - memcpy(config.ssid, p, len); - set_config = true; - } - if (args[ARG_password].u_obj != mp_const_none) { - p = mp_obj_str_get_data(args[ARG_password].u_obj, &len); - len = MIN(len, sizeof(config.password)); - memcpy(config.password, p, len); - set_config = true; - } - if (args[ARG_bssid].u_obj != mp_const_none) { - p = mp_obj_str_get_data(args[ARG_bssid].u_obj, &len); - if (len != sizeof(config.bssid)) { - mp_raise_ValueError(NULL); - } - config.bssid_set = 1; - memcpy(config.bssid, p, sizeof(config.bssid)); - set_config = true; - } - - if (set_config) { - error_check(wifi_station_set_config(&config), translate("Cannot set STA config")); - } - error_check(wifi_station_connect(), translate("Cannot connect to AP")); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_connect_obj, 1, esp_connect); - -STATIC mp_obj_t esp_disconnect(mp_obj_t self_in) { - require_if(self_in, STATION_IF); - error_check(wifi_station_disconnect(), translate("Cannot disconnect from AP")); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_disconnect_obj, esp_disconnect); - -STATIC mp_obj_t esp_status(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - if (n_args == 1) { - // Get link status - if (self->if_id == STATION_IF) { - return MP_OBJ_NEW_SMALL_INT(wifi_station_get_connect_status()); - } - return MP_OBJ_NEW_SMALL_INT(-1); - } else { - // Get specific status parameter - switch (mp_obj_str_get_qstr(args[1])) { - case MP_QSTR_rssi: - if (self->if_id == STATION_IF) { - return MP_OBJ_NEW_SMALL_INT(wifi_station_get_rssi()); - } - } - mp_raise_ValueError(translate("unknown status param")); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_status_obj, 1, 2, esp_status); - -STATIC mp_obj_t *esp_scan_list = NULL; - -STATIC void esp_scan_cb(void *result, STATUS status) { - if (esp_scan_list == NULL) { - // called unexpectedly - return; - } - if (result && status == 0) { - // we need to catch any memory errors - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - for (struct bss_info *bs = result; bs; bs = STAILQ_NEXT(bs, next)) { - mp_obj_tuple_t *t = mp_obj_new_tuple(6, NULL); - #if 1 - // struct bss_info::ssid_len is not documented in SDK API Guide, - // but is present in SDK headers since 1.4.0 - t->items[0] = mp_obj_new_bytes(bs->ssid, bs->ssid_len); - #else - t->items[0] = mp_obj_new_bytes(bs->ssid, strlen((char*)bs->ssid)); - #endif - t->items[1] = mp_obj_new_bytes(bs->bssid, sizeof(bs->bssid)); - t->items[2] = MP_OBJ_NEW_SMALL_INT(bs->channel); - t->items[3] = MP_OBJ_NEW_SMALL_INT(bs->rssi); - t->items[4] = MP_OBJ_NEW_SMALL_INT(bs->authmode); - t->items[5] = MP_OBJ_NEW_SMALL_INT(bs->is_hidden); - mp_obj_list_append(*esp_scan_list, MP_OBJ_FROM_PTR(t)); - } - nlr_pop(); - } else { - mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(nlr.ret_val)); - // indicate error - *esp_scan_list = MP_OBJ_NULL; - } - } else { - // indicate error - *esp_scan_list = MP_OBJ_NULL; - } - esp_scan_list = NULL; -} - -STATIC mp_obj_t esp_scan(mp_obj_t self_in) { - require_if(self_in, STATION_IF); - if ((wifi_get_opmode() & STATION_MODE) == 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("STA must be active"))); - } - mp_obj_t list = mp_obj_new_list(0, NULL); - esp_scan_list = &list; - wifi_station_scan(NULL, (scan_done_cb_t)esp_scan_cb); - while (esp_scan_list != NULL) { - // our esp_scan_cb is called via ets_loop_iter so it's safe to set the - // esp_scan_list variable to NULL without disabling interrupts - if (MP_STATE_VM(mp_pending_exception) != NULL) { - esp_scan_list = NULL; - mp_obj_t obj = MP_STATE_VM(mp_pending_exception); - MP_STATE_VM(mp_pending_exception) = MP_OBJ_NULL; - nlr_raise(obj); - } - ets_loop_iter(); - } - if (list == MP_OBJ_NULL) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, translate("scan failed"))); - } - return list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_scan_obj, esp_scan); - -/// \method isconnected() -/// Return True if connected to an AP and an IP address has been assigned, -/// false otherwise. -STATIC mp_obj_t esp_isconnected(mp_obj_t self_in) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (self->if_id == STATION_IF) { - if (wifi_station_get_connect_status() == STATION_GOT_IP) { - return mp_const_true; - } - } else { - if (wifi_softap_get_station_num() > 0) { - return mp_const_true; - } - } - return mp_const_false; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_isconnected_obj, esp_isconnected); - -STATIC mp_obj_t esp_ifconfig(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - struct ip_info info; - ip_addr_t dns_addr; - wifi_get_ip_info(self->if_id, &info); - if (n_args == 1) { - // get - dns_addr = dns_getserver(0); - mp_obj_t tuple[4] = { - netutils_format_ipv4_addr((uint8_t*)&info.ip, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&info.netmask, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&info.gw, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&dns_addr, NETUTILS_BIG), - }; - return mp_obj_new_tuple(4, tuple); - } else { - // set - mp_obj_t *items; - bool restart_dhcp_server = false; - mp_obj_get_array_fixed_n(args[1], 4, &items); - netutils_parse_ipv4_addr(items[0], (void*)&info.ip, NETUTILS_BIG); - if (mp_obj_is_integer(items[1])) { - // allow numeric netmask, i.e.: - // 24 -> 255.255.255.0 - // 16 -> 255.255.0.0 - // etc... - uint32_t* m = (uint32_t*)&info.netmask; - *m = htonl(0xffffffff << (32 - mp_obj_get_int(items[1]))); - } else { - netutils_parse_ipv4_addr(items[1], (void*)&info.netmask, NETUTILS_BIG); - } - netutils_parse_ipv4_addr(items[2], (void*)&info.gw, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[3], (void*)&dns_addr, NETUTILS_BIG); - // To set a static IP we have to disable DHCP first - if (self->if_id == STATION_IF) { - wifi_station_dhcpc_stop(); - } else { - restart_dhcp_server = wifi_softap_dhcps_status(); - wifi_softap_dhcps_stop(); - } - if (!wifi_set_ip_info(self->if_id, &info)) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - translate("wifi_set_ip_info() failed"))); - } - dns_setserver(0, &dns_addr); - if (restart_dhcp_server) { - wifi_softap_dhcps_start(); - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_ifconfig_obj, 1, 2, esp_ifconfig); - -STATIC mp_obj_t esp_config(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - if (n_args != 1 && kwargs->used != 0) { - mp_raise_TypeError(translate("either pos or kw args are allowed")); - } - - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - union { - struct station_config sta; - struct softap_config ap; - } cfg; - - if (self->if_id == STATION_IF) { - error_check(wifi_station_get_config(&cfg.sta), translate("can't get STA config")); - } else { - error_check(wifi_softap_get_config(&cfg.ap), translate("can't get AP config")); - } - - int req_if = -1; - - if (kwargs->used != 0) { - - for (mp_uint_t i = 0; i < kwargs->alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(kwargs, i)) { - #define QS(x) (uintptr_t)MP_OBJ_NEW_QSTR(x) - switch ((uintptr_t)kwargs->table[i].key) { - case QS(MP_QSTR_mac): { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(kwargs->table[i].value, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len != 6) { - mp_raise_ValueError(translate("invalid buffer length")); - } - wifi_set_macaddr(self->if_id, bufinfo.buf); - break; - } - case QS(MP_QSTR_essid): { - req_if = SOFTAP_IF; - size_t len; - const char *s = mp_obj_str_get_data(kwargs->table[i].value, &len); - len = MIN(len, sizeof(cfg.ap.ssid)); - memcpy(cfg.ap.ssid, s, len); - cfg.ap.ssid_len = len; - break; - } - case QS(MP_QSTR_hidden): { - req_if = SOFTAP_IF; - cfg.ap.ssid_hidden = mp_obj_is_true(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_authmode): { - req_if = SOFTAP_IF; - cfg.ap.authmode = mp_obj_get_int(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_password): { - req_if = SOFTAP_IF; - size_t len; - const char *s = mp_obj_str_get_data(kwargs->table[i].value, &len); - len = MIN(len, sizeof(cfg.ap.password) - 1); - memcpy(cfg.ap.password, s, len); - cfg.ap.password[len] = 0; - break; - } - case QS(MP_QSTR_channel): { - req_if = SOFTAP_IF; - cfg.ap.channel = mp_obj_get_int(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_dhcp_hostname): { - req_if = STATION_IF; - if (self->if_id == STATION_IF) { - const char *s = mp_obj_str_get_str(kwargs->table[i].value); - wifi_station_set_hostname((char*)s); - } - break; - } - default: - goto unknown; - } - #undef QS - } - } - - // We post-check interface requirements to save on code size - if (req_if >= 0) { - require_if(args[0], req_if); - } - - if (self->if_id == STATION_IF) { - error_check(wifi_station_set_config(&cfg.sta), translate("can't set STA config")); - } else { - error_check(wifi_softap_set_config(&cfg.ap), translate("can't set AP config")); - } - - return mp_const_none; - } - - // Get config - - if (n_args != 2) { - mp_raise_TypeError(translate("can query only one param")); - } - - mp_obj_t val; - - qstr key = mp_obj_str_get_qstr(args[1]); - switch (key) { - case MP_QSTR_mac: { - uint8_t mac[6]; - wifi_get_macaddr(self->if_id, mac); - return mp_obj_new_bytes(mac, sizeof(mac)); - } - case MP_QSTR_essid: - if (self->if_id == STATION_IF) { - val = mp_obj_new_str((char*)cfg.sta.ssid, strlen((char*)cfg.sta.ssid)); - } else { - val = mp_obj_new_str((char*)cfg.ap.ssid, cfg.ap.ssid_len); - } - break; - case MP_QSTR_hidden: - req_if = SOFTAP_IF; - val = mp_obj_new_bool(cfg.ap.ssid_hidden); - break; - case MP_QSTR_authmode: - req_if = SOFTAP_IF; - val = MP_OBJ_NEW_SMALL_INT(cfg.ap.authmode); - break; - case MP_QSTR_channel: - req_if = SOFTAP_IF; - val = MP_OBJ_NEW_SMALL_INT(cfg.ap.channel); - break; - case MP_QSTR_dhcp_hostname: { - req_if = STATION_IF; - char* s = wifi_station_get_hostname(); - if (s == NULL) { - val = MP_OBJ_NEW_QSTR(MP_QSTR_); - } else { - val = mp_obj_new_str(s, strlen(s)); - } - break; - } - default: - goto unknown; - } - - // We post-check interface requirements to save on code size - if (req_if >= 0) { - require_if(args[0], req_if); - } - - return val; - -unknown: - mp_raise_ValueError(translate("unknown config param")); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_config_obj, 1, esp_config); - -STATIC const mp_rom_map_elem_t wlan_if_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&esp_active_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&esp_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&esp_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&esp_status_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&esp_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&esp_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&esp_config_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&esp_ifconfig_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wlan_if_locals_dict, wlan_if_locals_dict_table); - -const mp_obj_type_t wlan_if_type = { - { &mp_type_type }, - .name = MP_QSTR_WLAN, - .locals_dict = (mp_obj_dict_t*)&wlan_if_locals_dict, -}; - -STATIC mp_obj_t esp_phy_mode(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - return mp_obj_new_int(wifi_get_phy_mode()); - } else { - wifi_set_phy_mode(mp_obj_get_int(args[0])); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_phy_mode_obj, 0, 1, esp_phy_mode); - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&get_wlan_obj) }, - { MP_ROM_QSTR(MP_QSTR_phy_mode), MP_ROM_PTR(&esp_phy_mode_obj) }, - -#if MODNETWORK_INCLUDE_CONSTANTS - { MP_ROM_QSTR(MP_QSTR_STA_IF), MP_ROM_INT(STATION_IF)}, - { MP_ROM_QSTR(MP_QSTR_AP_IF), MP_ROM_INT(SOFTAP_IF)}, - - { MP_ROM_QSTR(MP_QSTR_STAT_IDLE), MP_ROM_INT(STATION_IDLE)}, - { MP_ROM_QSTR(MP_QSTR_STAT_CONNECTING), MP_ROM_INT(STATION_CONNECTING)}, - { MP_ROM_QSTR(MP_QSTR_STAT_WRONG_PASSWORD), MP_ROM_INT(STATION_WRONG_PASSWORD)}, - { MP_ROM_QSTR(MP_QSTR_STAT_NO_AP_FOUND), MP_ROM_INT(STATION_NO_AP_FOUND)}, - { MP_ROM_QSTR(MP_QSTR_STAT_CONNECT_FAIL), MP_ROM_INT(STATION_CONNECT_FAIL)}, - { MP_ROM_QSTR(MP_QSTR_STAT_GOT_IP), MP_ROM_INT(STATION_GOT_IP)}, - - { MP_ROM_QSTR(MP_QSTR_MODE_11B), MP_ROM_INT(PHY_MODE_11B) }, - { MP_ROM_QSTR(MP_QSTR_MODE_11G), MP_ROM_INT(PHY_MODE_11G) }, - { MP_ROM_QSTR(MP_QSTR_MODE_11N), MP_ROM_INT(PHY_MODE_11N) }, - - { MP_ROM_QSTR(MP_QSTR_AUTH_OPEN), MP_ROM_INT(AUTH_OPEN) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WEP), MP_ROM_INT(AUTH_WEP) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA_PSK), MP_ROM_INT(AUTH_WPA_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA2_PSK), MP_ROM_INT(AUTH_WPA2_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA_WPA2_PSK), MP_ROM_INT(AUTH_WPA_WPA2_PSK) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t network_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; diff --git a/ports/esp8266/modpyb.c b/ports/esp8266/modpyb.c deleted file mode 100644 index 0a23f6f9da..0000000000 --- a/ports/esp8266/modpyb.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "gccollect.h" -#include "modmachine.h" - -// The pyb module no longer exists since all functionality now appears -// elsewhere, in more standard places (eg time, machine modules). The -// only remaining function is pyb.info() which has been moved to the -// esp module, pending deletion/renaming/moving elsewhere. - -STATIC mp_obj_t pyb_info(size_t n_args, const mp_obj_t *args) { - // print info about memory - { - printf("_text_start=%p\n", &_text_start); - printf("_text_end=%p\n", &_text_end); - printf("_irom0_text_start=%p\n", &_irom0_text_start); - printf("_irom0_text_end=%p\n", &_irom0_text_end); - printf("_data_start=%p\n", &_data_start); - printf("_data_end=%p\n", &_data_end); - printf("_rodata_start=%p\n", &_rodata_start); - printf("_rodata_end=%p\n", &_rodata_end); - printf("_bss_start=%p\n", &_bss_start); - printf("_bss_end=%p\n", &_bss_end); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - } - - // qstr info - { - mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj, 0, 1, pyb_info); diff --git a/ports/esp8266/modules/_boot.py b/ports/esp8266/modules/_boot.py deleted file mode 100644 index cbaf2aba66..0000000000 --- a/ports/esp8266/modules/_boot.py +++ /dev/null @@ -1,14 +0,0 @@ -import gc -gc.threshold((gc.mem_free() + gc.mem_alloc()) // 4) -from flashbdev import bdev -import storage - -try: - if bdev: - vfs = storage.VfsFat(bdev) - storage.mount(vfs, '/') -except OSError: - import inisetup - inisetup.setup() - -gc.collect() diff --git a/ports/esp8266/modules/flashbdev.py b/ports/esp8266/modules/flashbdev.py deleted file mode 100644 index 40ba655c64..0000000000 --- a/ports/esp8266/modules/flashbdev.py +++ /dev/null @@ -1,35 +0,0 @@ -import esp - -class FlashBdev: - - SEC_SIZE = 4096 - RESERVED_SECS = 1 - START_SEC = esp.flash_user_start() // SEC_SIZE + RESERVED_SECS - NUM_BLK = 0x6b - RESERVED_SECS - - def __init__(self, blocks=NUM_BLK): - self.blocks = blocks - - def readblocks(self, n, buf): - #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) - esp.flash_read((n + self.START_SEC) * self.SEC_SIZE, buf) - - def writeblocks(self, n, buf): - #print("writeblocks(%s, %x(%d))" % (n, id(buf), len(buf))) - #assert len(buf) <= self.SEC_SIZE, len(buf) - esp.flash_erase(n + self.START_SEC) - esp.flash_write((n + self.START_SEC) * self.SEC_SIZE, buf) - - def ioctl(self, op, arg): - #print("ioctl(%d, %r)" % (op, arg)) - if op == 4: # BP_IOCTL_SEC_COUNT - return self.blocks - if op == 5: # BP_IOCTL_SEC_SIZE - return self.SEC_SIZE - -size = esp.flash_size() -if size < 1024*1024: - bdev = None -else: - # 20K at the flash end is reserved for SDK params storage - bdev = FlashBdev((size - 20480) // FlashBdev.SEC_SIZE - FlashBdev.START_SEC) diff --git a/ports/esp8266/modules/inisetup.py b/ports/esp8266/modules/inisetup.py deleted file mode 100644 index 46f0892484..0000000000 --- a/ports/esp8266/modules/inisetup.py +++ /dev/null @@ -1,56 +0,0 @@ -from flashbdev import bdev -import network -import storage - -def wifi(): - try: - import ubinascii as binascii - except ImportError: - import binascii - - ap_if = network.WLAN(network.AP_IF) - essid = b"MicroPython-%s" % binascii.hexlify(ap_if.config("mac")[-3:]) - ap_if.config(essid=essid, authmode=network.AUTH_WPA_WPA2_PSK, password=b"micropythoN") - -def check_bootsec(): - buf = bytearray(bdev.SEC_SIZE) - bdev.readblocks(0, buf) - empty = True - for b in buf: - if b != 0xff: - empty = False - break - if empty: - return True - fs_corrupted() - -def fs_corrupted(): - import time - while 1: - print("""\ -The FAT filesystem starting at sector %d with size %d sectors appears to -be corrupted. If you had important data there, you may want to make a flash -snapshot to try to recover it. Otherwise, perform factory reprogramming -of MicroPython firmware (completely erase flash, followed by firmware -programming). -""" % (bdev.START_SEC, bdev.blocks)) - time.sleep(3) - -def setup(): - check_bootsec() - print("Performing initial setup") - wifi() - storage.VfsFat.mkfs(bdev) - vfs = storage.VfsFat(bdev) - storage.mount(vfs, '/') - with open("boot.py", "w") as f: - f.write("""\ -# This file is executed on every boot (including wake-boot from deepsleep) -#import esp -#esp.osdebug(None) -import gc -#import webrepl -#webrepl.start() -gc.collect() -""") - return vfs diff --git a/ports/esp8266/modules/ntptime.py b/ports/esp8266/modules/ntptime.py deleted file mode 100644 index 85c754af6c..0000000000 --- a/ports/esp8266/modules/ntptime.py +++ /dev/null @@ -1,35 +0,0 @@ -try: - import usocket as socket -except: - import socket -try: - import ustruct as struct -except: - import struct - -# (date(2000, 1, 1) - date(1900, 1, 1)).days * 24*60*60 -NTP_DELTA = 3155673600 - -host = "pool.ntp.org" - -def time(): - NTP_QUERY = bytearray(48) - NTP_QUERY[0] = 0x1b - addr = socket.getaddrinfo(host, 123)[0][-1] - s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) - s.settimeout(1) - res = s.sendto(NTP_QUERY, addr) - msg = s.recv(48) - s.close() - val = struct.unpack("!I", msg[40:44])[0] - return val - NTP_DELTA - -# There's currently no timezone support in MicroPython, so -# utime.localtime() will return UTC time (as if it was .gmtime()) -def settime(): - t = time() - import machine - import utime - tm = utime.localtime(t) - tm = tm[0:3] + (0,) + tm[3:6] + (0,) - machine.RTC().datetime(tm) diff --git a/ports/esp8266/modules/port_diag.py b/ports/esp8266/modules/port_diag.py deleted file mode 100644 index ef8800355a..0000000000 --- a/ports/esp8266/modules/port_diag.py +++ /dev/null @@ -1,33 +0,0 @@ -import esp -import uctypes -import network -import lwip - - -def main(): - - ROM = uctypes.bytearray_at(0x40200000, 16) - fid = esp.flash_id() - - print("FlashROM:") - print("Flash ID: %x (Vendor: %x Device: %x)" % (fid, fid & 0xff, fid & 0xff00 | fid >> 16)) - - print("Flash bootloader data:") - SZ_MAP = {0: "512KB", 1: "256KB", 2: "1MB", 3: "2MB", 4: "4MB"} - FREQ_MAP = {0: "40MHZ", 1: "26MHZ", 2: "20MHz", 0xf: "80MHz"} - print("Byte @2: %02x" % ROM[2]) - print("Byte @3: %02x (Flash size: %s Flash freq: %s)" % (ROM[3], SZ_MAP.get(ROM[3] >> 4, "?"), FREQ_MAP.get(ROM[3] & 0xf))) - print("Firmware checksum:") - print(esp.check_fw()) - - print("\nNetworking:") - print("STA ifconfig:", network.WLAN(network.STA_IF).ifconfig()) - print("AP ifconfig:", network.WLAN(network.AP_IF).ifconfig()) - print("Free WiFi driver buffers of type:") - for i, comm in enumerate(("1,2 TX", "4 Mngmt TX(len: 0x41-0x100)", "5 Mngmt TX (len: 0-0x40)", "7", "8 RX")): - print("%d: %d (%s)" % (i, esp.esf_free_bufs(i), comm)) - print("lwIP PCBs:") - lwip.print_pcbs() - - -main() diff --git a/ports/esp8266/modules/upip.py b/ports/esp8266/modules/upip.py deleted file mode 120000 index 130eb69016..0000000000 --- a/ports/esp8266/modules/upip.py +++ /dev/null @@ -1 +0,0 @@ -../../../tools/upip.py \ No newline at end of file diff --git a/ports/esp8266/modules/upip_utarfile.py b/ports/esp8266/modules/upip_utarfile.py deleted file mode 120000 index d9653d6a60..0000000000 --- a/ports/esp8266/modules/upip_utarfile.py +++ /dev/null @@ -1 +0,0 @@ -../../../tools/upip_utarfile.py \ No newline at end of file diff --git a/ports/esp8266/modules/webrepl.py b/ports/esp8266/modules/webrepl.py deleted file mode 100644 index a6c30e2cac..0000000000 --- a/ports/esp8266/modules/webrepl.py +++ /dev/null @@ -1,77 +0,0 @@ -# This module should be imported from REPL, not run from command line. -import socket -import multiterminal -import network -import websocket -import websocket_helper -import _webrepl - -listen_s = None -client_s = None - -def setup_conn(port, accept_handler): - global listen_s - listen_s = socket.socket() - listen_s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) - - ai = socket.getaddrinfo("0.0.0.0", port) - addr = ai[0][4] - - listen_s.bind(addr) - listen_s.listen(1) - if accept_handler: - listen_s.setsockopt(socket.SOL_SOCKET, 20, accept_handler) - for i in (network.AP_IF, network.STA_IF): - iface = network.WLAN(i) - if iface.active(): - print("WebREPL daemon started on ws://%s:%d" % (iface.ifconfig()[0], port)) - return listen_s - - -def accept_conn(listen_sock): - global client_s - cl, remote_addr = listen_sock.accept() - if multiterminal.get_secondary_terminal(): - print("\nConcurrent WebREPL connection from", remote_addr, "rejected") - cl.close() - return - print("\nWebREPL connection from:", remote_addr) - client_s = cl - websocket_helper.server_handshake(cl) - ws = websocket.websocket(cl, True) - ws = _webrepl._webrepl(ws) - cl.setblocking(False) - # notify REPL on socket incoming data - cl.setsockopt(socket.SOL_SOCKET, 20, multiterminal.schedule_secondary_terminal_read) - multiterminal.set_secondary_terminal(ws) - - -def stop(): - global listen_s, client_s - multiterminal.clear_secondary_terminal() - if client_s: - client_s.close() - if listen_s: - listen_s.close() - - -def start(port=8266, password=None): - stop() - if password is None: - try: - import webrepl_cfg - _webrepl.password(webrepl_cfg.PASS) - setup_conn(port, accept_conn) - print("Started webrepl in normal mode") - except: - print("WebREPL is not configured, run 'import webrepl_setup'") - else: - _webrepl.password(password) - setup_conn(port, accept_conn) - print("Started webrepl in manual override mode") - - -def start_foreground(port=8266): - stop() - s = setup_conn(port, None) - accept_conn(s) diff --git a/ports/esp8266/modules/webrepl_setup.py b/ports/esp8266/modules/webrepl_setup.py deleted file mode 100644 index e87fac99ea..0000000000 --- a/ports/esp8266/modules/webrepl_setup.py +++ /dev/null @@ -1,112 +0,0 @@ -import sys -import os -import machine - -RC = "./boot.py" -CONFIG = "./webrepl_cfg.py" - -def input_choice(prompt, choices): - while 1: - resp = input(prompt) - if resp in choices: - return resp - -def getpass(prompt): - return input(prompt) - -def input_pass(): - while 1: - passwd1 = getpass("New password (4-9 chars): ") - if len(passwd1) < 4 or len(passwd1) > 9: - print("Invalid password length") - continue - passwd2 = getpass("Confirm password: ") - if passwd1 == passwd2: - return passwd1 - print("Passwords do not match") - - -def exists(fname): - try: - with open(fname): - pass - return True - except OSError: - return False - -def copy_stream(s_in, s_out): - buf = bytearray(64) - while 1: - sz = s_in.readinto(buf) - s_out.write(buf, sz) - - -def get_daemon_status(): - with open(RC) as f: - for l in f: - if "webrepl" in l: - if l.startswith("#"): - return False - return True - return None - -def add_daemon(): - with open(RC) as old_f, open(RC + ".tmp", "w") as new_f: - new_f.write("import webrepl\nwebrepl.start()\n") - copy_stream(old_f, new_f) - -def change_daemon(action): - LINES = ("import webrepl", "webrepl.start()") - with open(RC) as old_f, open(RC + ".tmp", "w") as new_f: - found = False - for l in old_f: - for patt in LINES: - if patt in l: - found = True - if action and l.startswith("#"): - l = l[1:] - elif not action and not l.startswith("#"): - l = "#" + l - new_f.write(l) - if not found: - new_f.write("import webrepl\nwebrepl.start()\n") - # FatFs rename() is not POSIX compliant, will raise OSError if - # dest file exists. - os.remove(RC) - os.rename(RC + ".tmp", RC) - - -def main(): - status = get_daemon_status() - - print("WebREPL daemon auto-start status:", "enabled" if status else "disabled") - print("\nWould you like to (E)nable or (D)isable it running on boot?") - print("(Empty line to quit)") - resp = input("> ").upper() - - if resp == "E": - if exists(CONFIG): - resp2 = input_choice("Would you like to change WebREPL password? (y/n) ", ("y", "n", "")) - else: - print("To enable WebREPL, you must set password for it") - resp2 = "y" - - if resp2 == "y": - passwd = input_pass() - with open(CONFIG, "w") as f: - f.write("PASS = %r\n" % passwd) - - - if resp not in ("D", "E") or (resp == "D" and not status) or (resp == "E" and status): - print("No further action required") - sys.exit() - - change_daemon(resp == "E") - - print("Changes will be activated after reboot") - resp = input_choice("Would you like to reboot now? (y/n) ", ("y", "n", "")) - if resp == "y": - print("Rebooting. Please manually reset if it hangs.") - machine.reset() - -main() diff --git a/ports/esp8266/modules/websocket_helper.py b/ports/esp8266/modules/websocket_helper.py deleted file mode 100644 index 9c06db5023..0000000000 --- a/ports/esp8266/modules/websocket_helper.py +++ /dev/null @@ -1,74 +0,0 @@ -import sys -try: - import ubinascii as binascii -except: - import binascii -try: - import uhashlib as hashlib -except: - import hashlib - -DEBUG = 0 - -def server_handshake(sock): - clr = sock.makefile("rwb", 0) - l = clr.readline() - #sys.stdout.write(repr(l)) - - webkey = None - - while 1: - l = clr.readline() - if not l: - raise OSError("EOF in headers") - if l == b"\r\n": - break - # sys.stdout.write(l) - h, v = [x.strip() for x in l.split(b":", 1)] - if DEBUG: - print((h, v)) - if h == b'Sec-WebSocket-Key': - webkey = v - - if not webkey: - raise OSError("Not a websocket request") - - if DEBUG: - print("Sec-WebSocket-Key:", webkey, len(webkey)) - - d = hashlib.sha1(webkey) - d.update(b"258EAFA5-E914-47DA-95CA-C5AB0DC85B11") - respkey = d.digest() - respkey = binascii.b2a_base64(respkey)[:-1] - if DEBUG: - print("respkey:", respkey) - - sock.send(b"""\ -HTTP/1.1 101 Switching Protocols\r -Upgrade: websocket\r -Connection: Upgrade\r -Sec-WebSocket-Accept: """) - sock.send(respkey) - sock.send("\r\n\r\n") - - -# Very simplified client handshake, works for MicroPython's -# websocket server implementation, but probably not for other -# servers. -def client_handshake(sock): - cl = sock.makefile("rwb", 0) - cl.write(b"""\ -GET / HTTP/1.1\r -Host: echo.websocket.org\r -Connection: Upgrade\r -Upgrade: websocket\r -Sec-WebSocket-Key: foo\r -\r -""") - l = cl.readline() -# print(l) - while 1: - l = cl.readline() - if l == b"\r\n": - break -# sys.stdout.write(l) diff --git a/ports/esp8266/modutime.c b/ports/esp8266/modutime.c deleted file mode 100644 index ab9cb7dc23..0000000000 --- a/ports/esp8266/modutime.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Josef Gajdusek - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "py/smallint.h" -#include "lib/timeutils/timeutils.h" -#include "modmachine.h" -#include "user_interface.h" -#include "extmod/utime_mphal.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -/// \function localtime([secs]) -/// Convert a time expressed in seconds since Jan 1, 2000 into an 8-tuple which -/// contains: (year, month, mday, hour, minute, second, weekday, yearday) -/// If secs is not provided or None, then the current time from the RTC is used. -/// year includes the century (for example 2014) -/// month is 1-12 -/// mday is 1-31 -/// hour is 0-23 -/// minute is 0-59 -/// second is 0-59 -/// weekday is 0-6 for Mon-Sun. -/// yearday is 1-366 -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - timeutils_struct_time_t tm; - mp_int_t seconds; - if (n_args == 0 || args[0] == mp_const_none) { - seconds = pyb_rtc_get_us_since_2000() / 1000 / 1000; - } else { - seconds = mp_obj_get_int(args[0]); - } - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - -/// \function mktime() -/// This is inverse function of localtime. It's argument is a full 8-tuple -/// which expresses a time as per localtime. It returns an integer which is -/// the number of seconds since Jan 1, 2000. -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - size_t len; - mp_obj_t *elem; - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "mktime needs a tuple of length 8 or 9 (%d given)", len)); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), - mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), mp_obj_get_int(elem[3]), - mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -/// \function time() -/// Returns the number of seconds, as an integer, since 1/1/2000. -STATIC mp_obj_t time_time(void) { - // get date and time - return mp_obj_new_int(pyb_rtc_get_us_since_2000() / 1000 / 1000); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t utime_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h deleted file mode 100644 index 435f2c5cd2..0000000000 --- a/ports/esp8266/mpconfigport.h +++ /dev/null @@ -1,227 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_C) -#define MICROPY_ALLOC_PATH_MAX (128) -#define MICROPY_ALLOC_LEXER_INDENT_INIT (8) -#define MICROPY_ALLOC_PARSE_RULE_INIT (48) -#define MICROPY_ALLOC_PARSE_RULE_INC (8) -#define MICROPY_ALLOC_PARSE_RESULT_INC (8) -#define MICROPY_ALLOC_PARSE_CHUNK_INIT (64) -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_XTENSA (1) -#define MICROPY_EMIT_INLINE_XTENSA (1) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (1) -#define MICROPY_DEBUG_PRINTER_DEST mp_debug_print -#define MICROPY_READER_VFS (MICROPY_VFS) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (0) -#define MICROPY_ENABLE_SCHEDULER (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_COMPLEX (0) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_BYTEARRAY (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_SET (1) -#define MICROPY_PY_BUILTINS_SLICE (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_BUILTINS_PROPERTY (1) -#define MICROPY_PY_BUILTINS_ROUND_INT (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT esp_help_text -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (1) -#define MICROPY_PY_ARRAY (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_NONSTANDARD_TYPECODES (0) -#define MICROPY_PY_COLLECTIONS (1) -#define MICROPY_PY_COLLECTIONS_DEQUE (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_IOBASE (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_STDIO_BUFFER (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UHASHLIB_SHA1 (MICROPY_PY_USSL && MICROPY_SSL_AXTLS) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URANDOM (0) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_LWIP (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_SPI (1) -#define MICROPY_PY_MACHINE_SPI_MAKE_NEW machine_hspi_make_new -#define MICROPY_PY_WEBSOCKET (1) -#define MICROPY_PY_WEBREPL (1) -#define MICROPY_PY_WEBREPL_DELAY (20) -#define MICROPY_PY_FRAMEBUF (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_OS_DUPTERM (2) -#define MICROPY_CPYTHON_COMPAT (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_FLOAT_HIGH_QUALITY_HASH (1) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) -#define MICROPY_WARNINGS (1) -#define MICROPY_PY_STR_BYTES_CMP_WARN (1) -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_STREAMS_POSIX_API (1) -#define MICROPY_MODULE_FROZEN_STR (1) -#define MICROPY_MODULE_FROZEN_MPY (1) -#define MICROPY_MODULE_FROZEN_LEXER mp_lexer_new_from_str32 -#define MICROPY_QSTR_EXTRA_POOL mp_qstr_frozen_const_pool - -#define MICROPY_VFS (1) -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_MAX_SS (4096) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define MICROPY_VFS_FAT (1) -#define MICROPY_ESP8266_NEOPIXEL (1) - -extern void ets_event_poll(void); -#define MICROPY_EVENT_POLL_HOOK {ets_event_poll();} -#define MICROPY_VM_HOOK_COUNT (10) -#define MICROPY_VM_HOOK_INIT static uint vm_hook_divisor = MICROPY_VM_HOOK_COUNT; -#define MICROPY_VM_HOOK_POLL if (--vm_hook_divisor == 0) { \ - vm_hook_divisor = MICROPY_VM_HOOK_COUNT; \ - extern void ets_loop_iter(void); \ - ets_loop_iter(); \ - } -#define MICROPY_VM_HOOK_LOOP MICROPY_VM_HOOK_POLL -#define MICROPY_VM_HOOK_RETURN MICROPY_VM_HOOK_POLL - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p))) - -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; -typedef uint32_t sys_prot_t; // for modlwip -// ssize_t, off_t as required by POSIX-signatured functions in stream.h -#include - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) -void *esp_native_code_commit(void*, size_t); -#define MP_PLAT_COMMIT_EXEC(buf, len) esp_native_code_commit(buf, len) - -#define mp_type_fileio mp_type_vfs_fat_fileio -#define mp_type_textio mp_type_vfs_fat_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t esp_module; -extern const struct _mp_obj_module_t network_module; -extern const struct _mp_obj_module_t os_module; -extern const struct _mp_obj_module_t random_module; -extern const struct _mp_obj_module_t struct_module; -extern const struct _mp_obj_module_t mp_module_lwip; -extern const struct _mp_obj_module_t mp_module_machine; -extern const struct _mp_obj_module_t mp_module_onewire; -extern const struct _mp_obj_module_t microcontroller_module; -extern const struct _mp_obj_module_t board_module; -extern const struct _mp_obj_module_t math_module; -extern const struct _mp_obj_module_t analogio_module; -extern const struct _mp_obj_module_t digitalio_module; -extern const struct _mp_obj_module_t pulseio_module; -extern const struct _mp_obj_module_t busio_module; -extern const struct _mp_obj_module_t bitbangio_module; -extern const struct _mp_obj_module_t time_module; -extern const struct _mp_obj_module_t multiterminal_module; -extern const struct _mp_obj_module_t neopixel_write_module; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_OBJ_NEW_QSTR(MP_QSTR_esp), (mp_obj_t)&esp_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_socket), (mp_obj_t)&mp_module_lwip }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_usocket), (mp_obj_t)&mp_module_lwip }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_network), (mp_obj_t)&network_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_os), (mp_obj_t)&os_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_machine), (mp_obj_t)&mp_module_machine }, \ - { MP_ROM_QSTR(MP_QSTR__onewire), MP_ROM_PTR(&mp_module_onewire) }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_board), (mp_obj_t)&board_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_analogio), (mp_obj_t)&analogio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_pulseio), (mp_obj_t)&pulseio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_busio), (mp_obj_t)&busio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_bitbangio), (mp_obj_t)&bitbangio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_random), (mp_obj_t)&random_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_struct), (mp_obj_t)&struct_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_math), (mp_obj_t)&math_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_time), (mp_obj_t)&time_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_multiterminal), (mp_obj_t)&multiterminal_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_neopixel_write),(mp_obj_t)&neopixel_write_module }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, \ - { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, \ - { MP_ROM_QSTR(MP_QSTR_select), MP_ROM_PTR(&mp_module_uselect) }, \ - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_lwip) }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t pin_irq_handler[16]; \ - -// We need to provide a declaration/definition of alloca() -#include - -// board specifics - -#define MICROPY_MPHALPORT_H "esp_mphal.h" -#define MICROPY_HW_BOARD_NAME "ESP module" -#define MICROPY_HW_MCU_NAME "ESP8266" -#define MICROPY_PY_SYS_PLATFORM "esp8266" - -#define MP_FASTCODE(n) __attribute__((section(".iram0.text." #n))) n - -#define _assert(expr) ((expr) ? (void)0 : __assert_func(__FILE__, __LINE__, __func__, #expr)) diff --git a/ports/esp8266/mpconfigport_512k.h b/ports/esp8266/mpconfigport_512k.h deleted file mode 100644 index dc97efd35d..0000000000 --- a/ports/esp8266/mpconfigport_512k.h +++ /dev/null @@ -1,37 +0,0 @@ -#include - -#undef MICROPY_EMIT_XTENSA -#define MICROPY_EMIT_XTENSA (0) -#undef MICROPY_EMIT_INLINE_XTENSA -#define MICROPY_EMIT_INLINE_XTENSA (0) - -#undef MICROPY_DEBUG_PRINTERS -#define MICROPY_DEBUG_PRINTERS (0) - -#undef MICROPY_ERROR_REPORTING -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) - -#undef MICROPY_VFS -#define MICROPY_VFS (0) -#undef MICROPY_VFS_FAT -#define MICROPY_VFS_FAT (0) - -#undef MICROPY_PERSISTENT_CODE_LOAD -#define MICROPY_PERSISTENT_CODE_LOAD (0) - -#undef MICROPY_PY_IO_FILEIO -#define MICROPY_PY_IO_FILEIO (0) - -#undef MICROPY_PY_SYS_STDIO_BUFFER -#define MICROPY_PY_SYS_STDIO_BUFFER (0) -#undef MICROPY_PY_BUILTINS_SLICE_ATTRS -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (0) -#undef MICROPY_PY_ALL_SPECIAL_METHODS -#define MICROPY_PY_ALL_SPECIAL_METHODS (0) - -#undef MICROPY_PY_FRAMEBUF -#define MICROPY_PY_FRAMEBUF (0) - -#undef mp_import_stat -#undef mp_builtin_open -#undef mp_builtin_open_obj diff --git a/ports/esp8266/posix_helpers.c b/ports/esp8266/posix_helpers.c deleted file mode 100644 index adb0145e7d..0000000000 --- a/ports/esp8266/posix_helpers.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include "py/mphal.h" -#include "py/gc.h" - -// Functions for external libs like axTLS, BerkeleyDB, etc. - -void *malloc(size_t size) { - void *p = gc_alloc(size, false, false); - if (p == NULL) { - // POSIX requires ENOMEM to be set in case of error - errno = ENOMEM; - } - return p; -} -void free(void *ptr) { - gc_free(ptr); -} -void *calloc(size_t nmemb, size_t size) { - return malloc(nmemb * size); -} -void *realloc(void *ptr, size_t size) { - void *p = gc_realloc(ptr, size, true); - if (p == NULL) { - // POSIX requires ENOMEM to be set in case of error - errno = ENOMEM; - } - return p; -} - -#undef htonl -#undef ntohl -uint32_t ntohl(uint32_t netlong) { - return MP_BE32TOH(netlong); -} -uint32_t htonl(uint32_t netlong) { - return MP_HTOBE32(netlong); -} - -time_t time(time_t *t) { - return mp_hal_ticks_ms() / 1000; -} - -time_t mktime(void *tm) { - return 0; -} diff --git a/ports/esp8266/strtoll.c b/ports/esp8266/strtoll.c deleted file mode 100644 index 4e8a4d0566..0000000000 --- a/ports/esp8266/strtoll.c +++ /dev/null @@ -1,29 +0,0 @@ -#include - -// assumes endptr != NULL -// doesn't check for sign -// doesn't check for base-prefix -long long int strtoll(const char *nptr, char **endptr, int base) { - long long val = 0; - - for (; *nptr; nptr++) { - int v = *nptr; - if ('0' <= v && v <= '9') { - v -= '0'; - } else if ('A' <= v && v <= 'Z') { - v -= 'A' - 10; - } else if ('a' <= v && v <= 'z') { - v -= 'a' - 10; - } else { - break; - } - if (v >= base) { - break; - } - val = val * base + v; - } - - *endptr = (char*)nptr; - - return val; -} diff --git a/ports/esp8266/uart.c b/ports/esp8266/uart.c deleted file mode 100644 index 4a84053373..0000000000 --- a/ports/esp8266/uart.c +++ /dev/null @@ -1,296 +0,0 @@ -/****************************************************************************** - * Copyright 2013-2014 Espressif Systems (Wuxi) - * - * FileName: uart.c - * - * Description: Two UART mode configration and interrupt handler. - * Check your hardware connection while use this mode. - * - * Modification history: - * 2014/3/12, v1.0 create this file. -*******************************************************************************/ -#include "ets_sys.h" -#include "osapi.h" -#include "uart.h" -#include "osapi.h" -#include "uart_register.h" -#include "etshal.h" -#include "c_types.h" -#include "user_interface.h" -#include "esp_mphal.h" - -// seems that this is missing in the Espressif SDK -#define FUNC_U0RXD 0 - -#define UART_REPL UART0 - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -// the uart to which OS messages go; -1 to disable -static int uart_os = UART_OS; - -#if MICROPY_REPL_EVENT_DRIVEN -static os_event_t uart_evt_queue[16]; -#endif - -static void uart0_rx_intr_handler(void *para); - -void soft_reset(void); -void mp_keyboard_interrupt(void); - -/****************************************************************************** - * FunctionName : uart_config - * Description : Internal used function - * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled - * UART1 just used for debug output - * Parameters : uart_no, use UART0 or UART1 defined ahead - * Returns : NONE -*******************************************************************************/ -static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) { - if (uart_no == UART1) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); - } else { - ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD); - } - - uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); - - WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity - | UartDev.parity - | (UartDev.stop_bits << UART_STOP_BIT_NUM_S) - | (UartDev.data_bits << UART_BIT_NUM_S)); - - // clear rx and tx fifo,not ready - SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - - if (uart_no == UART0) { - // set rx fifo trigger - WRITE_PERI_REG(UART_CONF1(uart_no), - ((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | - ((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | - UART_RX_FLOW_EN | - (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | - UART_RX_TOUT_EN); - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA | - UART_FRM_ERR_INT_ENA); - } else { - WRITE_PERI_REG(UART_CONF1(uart_no), - ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); - } - - // clear all interrupt - WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); - // enable rx_interrupt - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA); -} - -/****************************************************************************** - * FunctionName : uart1_tx_one_char - * Description : Internal used function - * Use uart1 interface to transfer one char - * Parameters : uint8 TxChar - character to tx - * Returns : OK -*******************************************************************************/ -void uart_tx_one_char(uint8 uart, uint8 TxChar) { - while (true) { - uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { - break; - } - } - WRITE_PERI_REG(UART_FIFO(uart), TxChar); -} - -void uart_flush(uint8 uart) { - while (true) { - uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0) { - break; - } - } -} - -/****************************************************************************** - * FunctionName : uart1_write_char - * Description : Internal used function - * Do some special deal while tx char is '\r' or '\n' - * Parameters : char c - character to tx - * Returns : NONE -*******************************************************************************/ -static void ICACHE_FLASH_ATTR -uart_os_write_char(char c) { - if (uart_os == -1) { - return; - } - if (c == '\n') { - uart_tx_one_char(uart_os, '\r'); - uart_tx_one_char(uart_os, '\n'); - } else if (c == '\r') { - } else { - uart_tx_one_char(uart_os, c); - } -} - -void ICACHE_FLASH_ATTR -uart_os_config(int uart) { - uart_os = uart; -} - -/****************************************************************************** - * FunctionName : uart0_rx_intr_handler - * Description : Internal used function - * UART0 interrupt handler, add self handle code inside - * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg - * Returns : NONE -*******************************************************************************/ - -static void uart0_rx_intr_handler(void *para) { - /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents - * uart1 and uart0 respectively - */ - - uint8 uart_no = UART_REPL; - - if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) { - // frame error - WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR); - } - - if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) { - // fifo full - goto read_chars; - } else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) { - read_chars: - ETS_UART_INTR_DISABLE(); - - while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) { - uint8 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff; - if (RcvChar == mp_interrupt_char) { - mp_keyboard_interrupt(); - } else { - ringbuf_put(&stdin_ringbuf, RcvChar); - } - } - - mp_hal_signal_input(); - - // Clear pending FIFO interrupts - WRITE_PERI_REG(UART_INT_CLR(UART_REPL), UART_RXFIFO_TOUT_INT_CLR | UART_RXFIFO_FULL_INT_ST); - ETS_UART_INTR_ENABLE(); - } -} - -// Waits at most timeout microseconds for at least 1 char to become ready for reading. -// Returns true if something available, false if not. -bool uart_rx_wait(uint32_t timeout_us) { - uint32_t start = system_get_time(); - for (;;) { - if (stdin_ringbuf.iget != stdin_ringbuf.iput) { - return true; // have at least 1 char ready for reading - } - if (system_get_time() - start >= timeout_us) { - return false; // timeout - } - ets_event_poll(); - } -} - -int uart_rx_any(uint8 uart) { - if (stdin_ringbuf.iget != stdin_ringbuf.iput) { - return true; // have at least 1 char ready for reading - } - return false; -} - -int uart_tx_any_room(uint8 uart) { - uint32_t fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S); - if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) >= 126) { - return false; - } - return true; -} - -// Returns char from the input buffer, else -1 if buffer is empty. -int uart_rx_char(void) { - return ringbuf_get(&stdin_ringbuf); -} - -int uart_rx_one_char(uint8 uart_no) { - if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) { - return READ_PERI_REG(UART_FIFO(uart_no)) & 0xff; - } - return -1; -} - -/****************************************************************************** - * FunctionName : uart_init - * Description : user interface for init uart - * Parameters : UartBautRate uart0_br - uart0 bautrate - * UartBautRate uart1_br - uart1 bautrate - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) { - // rom use 74880 baut_rate, here reinitialize - UartDev.baut_rate = uart0_br; - uart_config(UART0); - UartDev.baut_rate = uart1_br; - uart_config(UART1); - ETS_UART_INTR_ENABLE(); - - // install handler for "os" messages - os_install_putc1((void *)uart_os_write_char); -} - -void ICACHE_FLASH_ATTR uart_reattach() { - uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880); -} - -void ICACHE_FLASH_ATTR uart_setup(uint8 uart) { - ETS_UART_INTR_DISABLE(); - uart_config(uart); - ETS_UART_INTR_ENABLE(); -} - -// Task-based UART interface - -#include "py/obj.h" -#include "lib/utils/pyexec.h" - -#if MICROPY_REPL_EVENT_DRIVEN -void uart_task_handler(os_event_t *evt) { - if (pyexec_repl_active) { - // TODO: Just returning here isn't exactly right. - // What really should be done is something like - // enquing delayed event to itself, for another - // chance to feed data to REPL. Otherwise, there - // can be situation when buffer has bunch of data, - // and sits unprocessed, because we consumed all - // processing signals like this. - return; - } - - int c, ret = 0; - while ((c = ringbuf_get(&stdin_ringbuf)) >= 0) { - if (c == mp_interrupt_char) { - mp_keyboard_interrupt(); - } - ret = pyexec_event_repl_process_char(c); - if (ret & PYEXEC_FORCED_EXIT) { - break; - } - } - - if (ret & PYEXEC_FORCED_EXIT) { - soft_reset(); - } -} - -void uart_task_init() { - system_os_task(uart_task_handler, UART_TASK_ID, uart_evt_queue, sizeof(uart_evt_queue) / sizeof(*uart_evt_queue)); -} -#endif diff --git a/ports/esp8266/uart.h b/ports/esp8266/uart.h deleted file mode 100644 index 684689a0ec..0000000000 --- a/ports/esp8266/uart.h +++ /dev/null @@ -1,106 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_UART_H -#define MICROPY_INCLUDED_ESP8266_UART_H - -#include - -#define UART0 (0) -#define UART1 (1) - -typedef enum { - UART_FIVE_BITS = 0x0, - UART_SIX_BITS = 0x1, - UART_SEVEN_BITS = 0x2, - UART_EIGHT_BITS = 0x3 -} UartBitsNum4Char; - -typedef enum { - UART_ONE_STOP_BIT = 0x1, - UART_ONE_HALF_STOP_BIT = 0x2, - UART_TWO_STOP_BIT = 0x3 -} UartStopBitsNum; - -typedef enum { - UART_NONE_BITS = 0, - UART_ODD_BITS = BIT0, - UART_EVEN_BITS = 0 -} UartParityMode; - -typedef enum { - UART_STICK_PARITY_DIS = 0, - UART_STICK_PARITY_EN = BIT1 -} UartExistParity; - -typedef enum { - UART_BIT_RATE_9600 = 9600, - UART_BIT_RATE_19200 = 19200, - UART_BIT_RATE_38400 = 38400, - UART_BIT_RATE_57600 = 57600, - UART_BIT_RATE_74880 = 74880, - UART_BIT_RATE_115200 = 115200, - UART_BIT_RATE_230400 = 230400, - UART_BIT_RATE_256000 = 256000, - UART_BIT_RATE_460800 = 460800, - UART_BIT_RATE_921600 = 921600 -} UartBautRate; - -typedef enum { - UART_NONE_CTRL, - UART_HARDWARE_CTRL, - UART_XON_XOFF_CTRL -} UartFlowCtrl; - -typedef enum { - UART_EMPTY, - UART_UNDER_WRITE, - UART_WRITE_OVER -} RcvMsgBuffState; - -typedef struct { - uint32 RcvBuffSize; - uint8 *pRcvMsgBuff; - uint8 *pWritePos; - uint8 *pReadPos; - uint8 TrigLvl; //JLU: may need to pad - RcvMsgBuffState BuffState; -} RcvMsgBuff; - -typedef struct { - uint32 TrxBuffSize; - uint8 *pTrxBuff; -} TrxMsgBuff; - -typedef enum { - UART_BAUD_RATE_DET, - UART_WAIT_SYNC_FRM, - UART_SRCH_MSG_HEAD, - UART_RCV_MSG_BODY, - UART_RCV_ESC_CHAR, -} RcvMsgState; - -typedef struct { - UartBautRate baut_rate; - UartBitsNum4Char data_bits; - UartExistParity exist_parity; - UartParityMode parity; // chip size in byte - UartStopBitsNum stop_bits; - UartFlowCtrl flow_ctrl; - RcvMsgBuff rcv_buff; - TrxMsgBuff trx_buff; - RcvMsgState rcv_state; - int received; - int buff_uart_no; //indicate which uart use tx/rx buffer -} UartDevice; - -void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); -int uart0_rx(void); -bool uart_rx_wait(uint32_t timeout_us); -int uart_rx_char(void); -void uart_tx_one_char(uint8 uart, uint8 TxChar); -void uart_flush(uint8 uart); -void uart_os_config(int uart); -void uart_setup(uint8 uart); -// check status of rx/tx -int uart_rx_any(uint8 uart); -int uart_tx_any_room(uint8 uart); - -#endif // MICROPY_INCLUDED_ESP8266_UART_H diff --git a/ports/esp8266/uart_register.h b/ports/esp8266/uart_register.h deleted file mode 100644 index 6398879ee2..0000000000 --- a/ports/esp8266/uart_register.h +++ /dev/null @@ -1,128 +0,0 @@ -//Generated at 2012-07-03 18:44:06 -/* - * Copyright (c) 2010 - 2011 Espressif System - * - */ - -#ifndef UART_REGISTER_H_INCLUDED -#define UART_REGISTER_H_INCLUDED -#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00) -//version value:32'h062000 - -#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0) -#define UART_RXFIFO_RD_BYTE 0x000000FF -#define UART_RXFIFO_RD_BYTE_S 0 - -#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4) -#define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) -#define UART_BRK_DET_INT_RAW (BIT(7)) -#define UART_CTS_CHG_INT_RAW (BIT(6)) -#define UART_DSR_CHG_INT_RAW (BIT(5)) -#define UART_RXFIFO_OVF_INT_RAW (BIT(4)) -#define UART_FRM_ERR_INT_RAW (BIT(3)) -#define UART_PARITY_ERR_INT_RAW (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) -#define UART_RXFIFO_FULL_INT_RAW (BIT(0)) - -#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8) -#define UART_RXFIFO_TOUT_INT_ST (BIT(8)) -#define UART_BRK_DET_INT_ST (BIT(7)) -#define UART_CTS_CHG_INT_ST (BIT(6)) -#define UART_DSR_CHG_INT_ST (BIT(5)) -#define UART_RXFIFO_OVF_INT_ST (BIT(4)) -#define UART_FRM_ERR_INT_ST (BIT(3)) -#define UART_PARITY_ERR_INT_ST (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) -#define UART_RXFIFO_FULL_INT_ST (BIT(0)) - -#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC) -#define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) -#define UART_BRK_DET_INT_ENA (BIT(7)) -#define UART_CTS_CHG_INT_ENA (BIT(6)) -#define UART_DSR_CHG_INT_ENA (BIT(5)) -#define UART_RXFIFO_OVF_INT_ENA (BIT(4)) -#define UART_FRM_ERR_INT_ENA (BIT(3)) -#define UART_PARITY_ERR_INT_ENA (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) -#define UART_RXFIFO_FULL_INT_ENA (BIT(0)) - -#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10) -#define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) -#define UART_BRK_DET_INT_CLR (BIT(7)) -#define UART_CTS_CHG_INT_CLR (BIT(6)) -#define UART_DSR_CHG_INT_CLR (BIT(5)) -#define UART_RXFIFO_OVF_INT_CLR (BIT(4)) -#define UART_FRM_ERR_INT_CLR (BIT(3)) -#define UART_PARITY_ERR_INT_CLR (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) -#define UART_RXFIFO_FULL_INT_CLR (BIT(0)) - -#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14) -#define UART_CLKDIV_CNT 0x000FFFFF -#define UART_CLKDIV_S 0 - -#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18) -#define UART_GLITCH_FILT 0x000000FF -#define UART_GLITCH_FILT_S 8 -#define UART_AUTOBAUD_EN (BIT(0)) - -#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C) -#define UART_TXD (BIT(31)) -#define UART_RTSN (BIT(30)) -#define UART_DTRN (BIT(29)) -#define UART_TXFIFO_CNT 0x000000FF -#define UART_TXFIFO_CNT_S 16 -#define UART_RXD (BIT(15)) -#define UART_CTSN (BIT(14)) -#define UART_DSRN (BIT(13)) -#define UART_RXFIFO_CNT 0x000000FF -#define UART_RXFIFO_CNT_S 0 - -#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20) -#define UART_TXFIFO_RST (BIT(18)) -#define UART_RXFIFO_RST (BIT(17)) -#define UART_IRDA_EN (BIT(16)) -#define UART_TX_FLOW_EN (BIT(15)) -#define UART_LOOPBACK (BIT(14)) -#define UART_IRDA_RX_INV (BIT(13)) -#define UART_IRDA_TX_INV (BIT(12)) -#define UART_IRDA_WCTL (BIT(11)) -#define UART_IRDA_TX_EN (BIT(10)) -#define UART_IRDA_DPLX (BIT(9)) -#define UART_TXD_BRK (BIT(8)) -#define UART_SW_DTR (BIT(7)) -#define UART_SW_RTS (BIT(6)) -#define UART_STOP_BIT_NUM 0x00000003 -#define UART_STOP_BIT_NUM_S 4 -#define UART_BIT_NUM 0x00000003 -#define UART_BIT_NUM_S 2 -#define UART_PARITY_EN (BIT(1)) -#define UART_PARITY (BIT(0)) - -#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24) -#define UART_RX_TOUT_EN (BIT(31)) -#define UART_RX_TOUT_THRHD 0x0000007F -#define UART_RX_TOUT_THRHD_S 24 -#define UART_RX_FLOW_EN (BIT(23)) -#define UART_RX_FLOW_THRHD 0x0000007F -#define UART_RX_FLOW_THRHD_S 16 -#define UART_TXFIFO_EMPTY_THRHD 0x0000007F -#define UART_TXFIFO_EMPTY_THRHD_S 8 -#define UART_RXFIFO_FULL_THRHD 0x0000007F -#define UART_RXFIFO_FULL_THRHD_S 0 - -#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28) -#define UART_LOWPULSE_MIN_CNT 0x000FFFFF -#define UART_LOWPULSE_MIN_CNT_S 0 - -#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C) -#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF -#define UART_HIGHPULSE_MIN_CNT_S 0 - -#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30) -#define UART_PULSE_NUM_CNT 0x0003FF -#define UART_PULSE_NUM_CNT_S 0 - -#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78) -#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C) -#endif // UART_REGISTER_H_INCLUDED diff --git a/ports/esp8266/user_config.h b/ports/esp8266/user_config.h deleted file mode 100644 index 8b1a393741..0000000000 --- a/ports/esp8266/user_config.h +++ /dev/null @@ -1 +0,0 @@ -// empty diff --git a/ports/esp8266/xtirq.h b/ports/esp8266/xtirq.h deleted file mode 100644 index 595052fc73..0000000000 --- a/ports/esp8266/xtirq.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ESP8266_XTIRQ_H -#define MICROPY_INCLUDED_ESP8266_XTIRQ_H - -#include - -// returns the value of "intlevel" from the PS register -static inline uint32_t query_irq(void) { - uint32_t ps; - __asm__ volatile("rsr %0, ps" : "=a" (ps)); - return ps & 0xf; -} - -// irqs with a priority value lower or equal to "intlevel" will be disabled -// "intlevel" should be between 0 and 15 inclusive, and should be an integer -static inline uint32_t raise_irq_pri(uint32_t intlevel) { - uint32_t old_ps; - __asm__ volatile ("rsil %0, %1" : "=a" (old_ps) : "I" (intlevel)); - return old_ps; -} - -// "ps" should be the value returned from raise_irq_pri -static inline void restore_irq_pri(uint32_t ps) { - __asm__ volatile ("wsr %0, ps; rsync" :: "a" (ps)); -} - -static inline uint32_t disable_irq(void) { - return raise_irq_pri(15); -} - -static inline void enable_irq(uint32_t irq_state) { - restore_irq_pri(irq_state); -} - -#endif // MICROPY_INCLUDED_ESP8266_XTIRQ_H diff --git a/ports/minimal/Makefile b/ports/minimal/Makefile deleted file mode 100644 index 64ad3cc0b2..0000000000 --- a/ports/minimal/Makefile +++ /dev/null @@ -1,91 +0,0 @@ -include ../../py/mkenv.mk - -CROSS = 0 - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -ifeq ($(CROSS), 1) -CROSS_COMPILE = arm-none-eabi- -endif - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -ifeq ($(CROSS), 1) -DFU = $(TOP)/tools/dfu.py -PYDFU = $(TOP)/tools/pydfu.py -CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mabi=aapcs-linux -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -Wdouble-promotion -CFLAGS = $(INC) -Wall -Werror -std=c99 -nostdlib $(CFLAGS_CORTEX_M4) $(COPT) -LDFLAGS = -nostdlib -T stm32f405.ld -Map=$@.map --cref --gc-sections -else -LD = gcc -CFLAGS = -m32 $(INC) -Wall -Werror -std=c99 $(COPT) -LDFLAGS = -m32 -Wl,-Map=$@.map,--cref -Wl,--gc-sections -endif - -# Tune for Debugging or Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -O0 -ggdb -else -CFLAGS += -Os -DNDEBUG -CFLAGS += -fdata-sections -ffunction-sections -endif - -LIBS = - -SRC_C = \ - main.c \ - uart_core.c \ - lib/utils/printf.c \ - lib/utils/stdout_helpers.c \ - lib/utils/pyexec.c \ - lib/libc/string0.c \ - lib/mp-readline/readline.c \ - $(BUILD)/_frozen_mpy.c \ - -OBJ = $(PY_CORE_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -ifeq ($(CROSS), 1) -all: $(BUILD)/firmware.dfu -else -all: $(BUILD)/firmware.elf -endif - -$(BUILD)/_frozen_mpy.c: frozentest.mpy $(BUILD)/genhdr/qstrdefs.generated.h - $(ECHO) "MISC freezing bytecode" - $(Q)$(TOP)/tools/mpy-tool.py -f -q $(BUILD)/genhdr/qstrdefs.preprocessed.h -mlongint-impl=none $< > $@ - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -$(BUILD)/firmware.bin: $(BUILD)/firmware.elf - $(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin - -$(BUILD)/firmware.dfu: $(BUILD)/firmware.bin - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(DFU) -b 0x08000000:$(BUILD)/firmware.bin $@ - -deploy: $(BUILD)/firmware.dfu - $(ECHO) "Writing $< to the board" - $(Q)$(PYTHON) $(PYDFU) -u $< - -# Run emulation build on a POSIX system with suitable terminal settings -run: - stty raw opost -echo - build/firmware.elf - @echo Resetting terminal... -# This sleep is useful to spot segfaults - sleep 1 - reset - -test: $(BUILD)/firmware.elf - $(Q)/bin/echo -e "print('hello world!', list(x+1 for x in range(10)), end='eol\\\\n')\\r\\n\\x04" | $(BUILD)/firmware.elf | tail -n2 | grep "^hello world! \\[1, 2, 3, 4, 5, 6, 7, 8, 9, 10\\]eol" - -include $(TOP)/py/mkrules.mk diff --git a/ports/minimal/README.md b/ports/minimal/README.md deleted file mode 100644 index 356fc4b3ef..0000000000 --- a/ports/minimal/README.md +++ /dev/null @@ -1,47 +0,0 @@ -# The minimal port - -This port is intended to be a minimal MicroPython port that actually runs. -It can run under Linux (or similar) and on any STM32F4xx MCU (eg the pyboard). - -## Building and running Linux version - -By default the port will be built for the host machine: - - $ make - -To run the executable and get a basic working REPL do: - - $ make run - -## Building for an STM32 MCU - -The Makefile has the ability to build for a Cortex-M CPU, and by default -includes some start-up code for an STM32F4xx MCU and also enables a UART -for communication. To build: - - $ make CROSS=1 - -If you previously built the Linux version, you will need to first run -`make clean` to get rid of incompatible object files. - -Building will produce the build/firmware.dfu file which can be programmed -to an MCU using: - - $ make CROSS=1 deploy - -This version of the build will work out-of-the-box on a pyboard (and -anything similar), and will give you a MicroPython REPL on UART1 at 9600 -baud. Pin PA13 will also be driven high, and this turns on the red LED on -the pyboard. - -## Building without the built-in MicroPython compiler - -This minimal port can be built with the built-in MicroPython compiler -disabled. This will reduce the firmware by about 20k on a Thumb2 machine, -and by about 40k on 32-bit x86. Without the compiler the REPL will be -disabled, but pre-compiled scripts can still be executed. - -To test out this feature, change the `MICROPY_ENABLE_COMPILER` config -option to "0" in the mpconfigport.h file in this directory. Then -recompile and run the firmware and it will execute the frozentest.py -file. diff --git a/ports/minimal/frozentest.mpy b/ports/minimal/frozentest.mpy deleted file mode 100644 index 7c6809bf65..0000000000 Binary files a/ports/minimal/frozentest.mpy and /dev/null differ diff --git a/ports/minimal/frozentest.py b/ports/minimal/frozentest.py deleted file mode 100644 index 0f99b74297..0000000000 --- a/ports/minimal/frozentest.py +++ /dev/null @@ -1,7 +0,0 @@ -print('uPy') -print('a long string that is not interned') -print('a string that has unicode αβγ chars') -print(b'bytes 1234\x01') -print(123456789) -for i in range(4): - print(i) diff --git a/ports/minimal/main.c b/ports/minimal/main.c deleted file mode 100644 index 5e145dc829..0000000000 --- a/ports/minimal/main.c +++ /dev/null @@ -1,258 +0,0 @@ -#include -#include -#include - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/gc.h" -#include "py/mperrno.h" -#include "lib/utils/pyexec.h" - -#if MICROPY_ENABLE_COMPILER -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} -#endif - -static char *stack_top; -#if MICROPY_ENABLE_GC -static char heap[2048]; -#endif - -int main(int argc, char **argv) { - int stack_dummy; - stack_top = (char*)&stack_dummy; - - #if MICROPY_ENABLE_GC - gc_init(heap, heap + sizeof(heap)); - #endif - mp_init(); - #if MICROPY_ENABLE_COMPILER - #if MICROPY_REPL_EVENT_DRIVEN - pyexec_event_repl_init(); - for (;;) { - int c = mp_hal_stdin_rx_chr(); - if (pyexec_event_repl_process_char(c)) { - break; - } - } - #else - pyexec_friendly_repl(); - #endif - //do_str("print('hello world!', list(x+1 for x in range(10)), end='eol\\n')", MP_PARSE_SINGLE_INPUT); - //do_str("for i in range(10):\r\n print(i)", MP_PARSE_FILE_INPUT); - #else - pyexec_frozen_module("frozentest.py"); - #endif - mp_deinit(); - return 0; -} - -void gc_collect(void) { - // WARNING: This gc_collect implementation doesn't try to get root - // pointers from CPU registers, and thus may function incorrectly. - void *dummy; - gc_collect_start(); - gc_collect_root(&dummy, ((mp_uint_t)stack_top - (mp_uint_t)&dummy) / sizeof(mp_uint_t)); - gc_collect_end(); - gc_dump_info(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - while (1); -} - -void NORETURN __fatal_error(const char *msg) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif - -#if MICROPY_MIN_USE_CORTEX_CPU - -// this is a minimal IRQ and reset framework for any Cortex-M CPU - -extern uint32_t _estack, _sidata, _sdata, _edata, _sbss, _ebss; - -void Reset_Handler(void) __attribute__((naked)); -void Reset_Handler(void) { - // set stack pointer - __asm volatile ("ldr sp, =_estack"); - // copy .data section from flash to RAM - for (uint32_t *src = &_sidata, *dest = &_sdata; dest < &_edata;) { - *dest++ = *src++; - } - // zero out .bss section - for (uint32_t *dest = &_sbss; dest < &_ebss;) { - *dest++ = 0; - } - // jump to board initialisation - void _start(void); - _start(); -} - -void Default_Handler(void) { - for (;;) { - } -} - -const uint32_t isr_vector[] __attribute__((section(".isr_vector"))) = { - (uint32_t)&_estack, - (uint32_t)&Reset_Handler, - (uint32_t)&Default_Handler, // NMI_Handler - (uint32_t)&Default_Handler, // HardFault_Handler - (uint32_t)&Default_Handler, // MemManage_Handler - (uint32_t)&Default_Handler, // BusFault_Handler - (uint32_t)&Default_Handler, // UsageFault_Handler - 0, - 0, - 0, - 0, - (uint32_t)&Default_Handler, // SVC_Handler - (uint32_t)&Default_Handler, // DebugMon_Handler - 0, - (uint32_t)&Default_Handler, // PendSV_Handler - (uint32_t)&Default_Handler, // SysTick_Handler -}; - -void _start(void) { - // when we get here: stack is initialised, bss is clear, data is copied - - // SCB->CCR: enable 8-byte stack alignment for IRQ handlers, in accord with EABI - *((volatile uint32_t*)0xe000ed14) |= 1 << 9; - - // initialise the cpu and peripherals - #if MICROPY_MIN_USE_STM32_MCU - void stm32_init(void); - stm32_init(); - #endif - - // now that we have a basic system up and running we can call main - main(0, NULL); - - // we must not return - for (;;) { - } -} - -#endif - -#if MICROPY_MIN_USE_STM32_MCU - -// this is minimal set-up code for an STM32 MCU - -typedef struct { - volatile uint32_t CR; - volatile uint32_t PLLCFGR; - volatile uint32_t CFGR; - volatile uint32_t CIR; - uint32_t _1[8]; - volatile uint32_t AHB1ENR; - volatile uint32_t AHB2ENR; - volatile uint32_t AHB3ENR; - uint32_t _2; - volatile uint32_t APB1ENR; - volatile uint32_t APB2ENR; -} periph_rcc_t; - -typedef struct { - volatile uint32_t MODER; - volatile uint32_t OTYPER; - volatile uint32_t OSPEEDR; - volatile uint32_t PUPDR; - volatile uint32_t IDR; - volatile uint32_t ODR; - volatile uint16_t BSRRL; - volatile uint16_t BSRRH; - volatile uint32_t LCKR; - volatile uint32_t AFR[2]; -} periph_gpio_t; - -typedef struct { - volatile uint32_t SR; - volatile uint32_t DR; - volatile uint32_t BRR; - volatile uint32_t CR1; -} periph_uart_t; - -#define USART1 ((periph_uart_t*) 0x40011000) -#define GPIOA ((periph_gpio_t*) 0x40020000) -#define GPIOB ((periph_gpio_t*) 0x40020400) -#define RCC ((periph_rcc_t*) 0x40023800) - -// simple GPIO interface -#define GPIO_MODE_IN (0) -#define GPIO_MODE_OUT (1) -#define GPIO_MODE_ALT (2) -#define GPIO_PULL_NONE (0) -#define GPIO_PULL_UP (0) -#define GPIO_PULL_DOWN (1) -void gpio_init(periph_gpio_t *gpio, int pin, int mode, int pull, int alt) { - gpio->MODER = (gpio->MODER & ~(3 << (2 * pin))) | (mode << (2 * pin)); - // OTYPER is left as default push-pull - // OSPEEDR is left as default low speed - gpio->PUPDR = (gpio->PUPDR & ~(3 << (2 * pin))) | (pull << (2 * pin)); - gpio->AFR[pin >> 3] = (gpio->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); -} -#define gpio_get(gpio, pin) ((gpio->IDR >> (pin)) & 1) -#define gpio_set(gpio, pin, value) do { gpio->ODR = (gpio->ODR & ~(1 << (pin))) | (value << pin); } while (0) -#define gpio_low(gpio, pin) do { gpio->BSRRH = (1 << (pin)); } while (0) -#define gpio_high(gpio, pin) do { gpio->BSRRL = (1 << (pin)); } while (0) - -void stm32_init(void) { - // basic MCU config - RCC->CR |= (uint32_t)0x00000001; // set HSION - RCC->CFGR = 0x00000000; // reset all - RCC->CR &= (uint32_t)0xfef6ffff; // reset HSEON, CSSON, PLLON - RCC->PLLCFGR = 0x24003010; // reset PLLCFGR - RCC->CR &= (uint32_t)0xfffbffff; // reset HSEBYP - RCC->CIR = 0x00000000; // disable IRQs - - // leave the clock as-is (internal 16MHz) - - // enable GPIO clocks - RCC->AHB1ENR |= 0x00000003; // GPIOAEN, GPIOBEN - - // turn on an LED! (on pyboard it's the red one) - gpio_init(GPIOA, 13, GPIO_MODE_OUT, GPIO_PULL_NONE, 0); - gpio_high(GPIOA, 13); - - // enable UART1 at 9600 baud (TX=B6, RX=B7) - gpio_init(GPIOB, 6, GPIO_MODE_ALT, GPIO_PULL_NONE, 7); - gpio_init(GPIOB, 7, GPIO_MODE_ALT, GPIO_PULL_NONE, 7); - RCC->APB2ENR |= 0x00000010; // USART1EN - USART1->BRR = (104 << 4) | 3; // 16MHz/(16*104.1875) = 9598 baud - USART1->CR1 = 0x0000200c; // USART enable, tx enable, rx enable -} - -#endif diff --git a/ports/minimal/mpconfigport.h b/ports/minimal/mpconfigport.h deleted file mode 100644 index 8744ca9508..0000000000 --- a/ports/minimal/mpconfigport.h +++ /dev/null @@ -1,97 +0,0 @@ -#include - -// options to control how MicroPython is built - -// You can disable the built-in MicroPython compiler by setting the following -// config option to 0. If you do this then you won't get a REPL prompt, but you -// will still be able to execute pre-compiled scripts, compiled with mpy-cross. -#define MICROPY_ENABLE_COMPILER (1) - -#define MICROPY_QSTR_BYTES_IN_HASH (1) -#define MICROPY_QSTR_EXTRA_POOL mp_qstr_frozen_const_pool -#define MICROPY_ALLOC_PATH_MAX (256) -#define MICROPY_ALLOC_PARSE_CHUNK_INIT (16) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_GC_ALLOC_THRESHOLD (0) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (0) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FILTER (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_BUILTINS_MIN_MAX (0) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (0) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (0) -#define MICROPY_MODULE_FROZEN_MPY (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_NONE) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -// This port is intended to be 32-bit, but unfortunately, int32_t for -// different targets may be defined in different ways - either as int -// or as long. This requires different printf formatting specifiers -// to print such value. So, we avoid int32_t and use int directly. -#define UINT_FMT "%u" -#define INT_FMT "%d" -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size - -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// We need to provide a declaration/definition of alloca() -#include - -#define MICROPY_HW_BOARD_NAME "minimal" -#define MICROPY_HW_MCU_NAME "unknown-cpu" - -#ifdef __linux__ -#define MICROPY_MIN_USE_STDOUT (1) -#endif - -#ifdef __thumb__ -#define MICROPY_MIN_USE_CORTEX_CPU (1) -#define MICROPY_MIN_USE_STM32_MCU (1) -#endif - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; diff --git a/ports/minimal/mphalport.h b/ports/minimal/mphalport.h deleted file mode 100644 index 60d68bd2d6..0000000000 --- a/ports/minimal/mphalport.h +++ /dev/null @@ -1,2 +0,0 @@ -static inline mp_uint_t mp_hal_ticks_ms(void) { return 0; } -static inline void mp_hal_set_interrupt_char(char c) {} diff --git a/ports/minimal/qstrdefsport.h b/ports/minimal/qstrdefsport.h deleted file mode 100644 index 3ba897069b..0000000000 --- a/ports/minimal/qstrdefsport.h +++ /dev/null @@ -1 +0,0 @@ -// qstrs specific to this port diff --git a/ports/minimal/stm32f405.ld b/ports/minimal/stm32f405.ld deleted file mode 100644 index a202294a54..0000000000 --- a/ports/minimal/stm32f405.ld +++ /dev/null @@ -1,63 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 0x010000 /* 64 KiB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x020000 /* 128 KiB */ -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ - } >FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code */ - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/minimal/uart_core.c b/ports/minimal/uart_core.c deleted file mode 100644 index d2d17b4d14..0000000000 --- a/ports/minimal/uart_core.c +++ /dev/null @@ -1,44 +0,0 @@ -#include -#include "py/mpconfig.h" - -/* - * Core UART functions to implement for a port - */ - -#if MICROPY_MIN_USE_STM32_MCU -typedef struct { - volatile uint32_t SR; - volatile uint32_t DR; -} periph_uart_t; -#define USART1 ((periph_uart_t*)0x40011000) -#endif - -// Receive single character -int mp_hal_stdin_rx_chr(void) { - unsigned char c = 0; -#if MICROPY_MIN_USE_STDOUT - int r = read(0, &c, 1); - (void)r; -#elif MICROPY_MIN_USE_STM32_MCU - // wait for RXNE - while ((USART1->SR & (1 << 5)) == 0) { - } - c = USART1->DR; -#endif - return c; -} - -// Send string of given length -void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) { -#if MICROPY_MIN_USE_STDOUT - int r = write(1, str, len); - (void)r; -#elif MICROPY_MIN_USE_STM32_MCU - while (len--) { - // wait for TXE - while ((USART1->SR & (1 << 7)) == 0) { - } - USART1->DR = *str++; - } -#endif -} diff --git a/ports/nrf/background.c b/ports/nrf/background.c index 305f607c5c..629967b3d0 100644 --- a/ports/nrf/background.c +++ b/ports/nrf/background.c @@ -41,6 +41,10 @@ #include "common-hal/audiopwmio/PWMAudioOut.h" #endif +#if CIRCUITPY_BLEIO +#include "supervisor/shared/bluetooth.h" +#endif + static bool running_background_tasks = false; void background_tasks_reset(void) { @@ -62,6 +66,9 @@ void run_background_tasks(void) { i2s_background(); #endif +#if CIRCUITPY_BLEIO + supervisor_bluetooth_background(); +#endif #if CIRCUITPY_DISPLAYIO displayio_background(); diff --git a/ports/nrf/bluetooth/ble_drv.c b/ports/nrf/bluetooth/ble_drv.c index 6b17e7af29..16475e4b3b 100644 --- a/ports/nrf/bluetooth/ble_drv.c +++ b/ports/nrf/bluetooth/ble_drv.c @@ -38,6 +38,8 @@ #include "py/misc.h" #include "py/mpstate.h" +#include "supervisor/shared/bluetooth.h" + nrf_nvic_state_t nrf_nvic_state = { 0 }; // Flag indicating progress of internal flash operation. @@ -52,6 +54,14 @@ void ble_drv_reset() { sd_flash_operation_status = SD_FLASH_OPERATION_DONE; } +void ble_drv_add_event_handler_entry(ble_drv_evt_handler_entry_t* entry, ble_drv_evt_handler_t func, void *param) { + entry->next = MP_STATE_VM(ble_drv_evt_handler_entries); + entry->param = param; + entry->func = func; + + MP_STATE_VM(ble_drv_evt_handler_entries) = entry; +} + void ble_drv_add_event_handler(ble_drv_evt_handler_t func, void *param) { ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries); while (it != NULL) { @@ -64,11 +74,7 @@ void ble_drv_add_event_handler(ble_drv_evt_handler_t func, void *param) { // Add a new handler to the front of the list ble_drv_evt_handler_entry_t *handler = m_new_ll(ble_drv_evt_handler_entry_t, 1); - handler->next = MP_STATE_VM(ble_drv_evt_handler_entries); - handler->param = param; - handler->func = func; - - MP_STATE_VM(ble_drv_evt_handler_entries) = handler; + ble_drv_add_event_handler_entry(handler, func, param); } void ble_drv_remove_event_handler(ble_drv_evt_handler_t func, void *param) { @@ -127,10 +133,20 @@ void SD_EVT_IRQHandler(void) { break; } + ble_evt_t* event = (ble_evt_t *)m_ble_evt_buf; + + if (supervisor_bluetooth_hook(event)) { + continue; + } + ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries); + bool done = false; while (it != NULL) { - it->func((ble_evt_t *)m_ble_evt_buf, it->param); + done = it->func(event, it->param) || done; it = it->next; } + if (!done) { + //mp_printf(&mp_plat_print, "Unhandled ble event: 0x%04x\n", event->header.evt_id); + } } } diff --git a/ports/nrf/bluetooth/ble_drv.h b/ports/nrf/bluetooth/ble_drv.h index a066f588fa..7716cab8be 100644 --- a/ports/nrf/bluetooth/ble_drv.h +++ b/ports/nrf/bluetooth/ble_drv.h @@ -29,6 +29,8 @@ #ifndef MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_DRV_H #define MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_DRV_H +#include + #include "ble.h" #define MAX_TX_IN_PROGRESS 10 @@ -48,7 +50,7 @@ #define UNIT_1_25_MS (1250) #define UNIT_10_MS (10000) -typedef void (*ble_drv_evt_handler_t)(ble_evt_t*, void*); +typedef bool (*ble_drv_evt_handler_t)(ble_evt_t*, void*); typedef enum { SD_FLASH_OPERATION_DONE, @@ -69,4 +71,7 @@ void ble_drv_reset(void); void ble_drv_add_event_handler(ble_drv_evt_handler_t func, void *param); void ble_drv_remove_event_handler(ble_drv_evt_handler_t func, void *param); +// Allow for user provided entries to prevent allocations outside the VM. +void ble_drv_add_event_handler_entry(ble_drv_evt_handler_entry_t* entry, ble_drv_evt_handler_t func, void *param); + #endif // MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_DRV_H diff --git a/ports/nrf/boards/adafruit_nrf52840_s140_v6.ld b/ports/nrf/boards/adafruit_nrf52840_s140_v6.ld index 2587a19e34..756060f960 100644 --- a/ports/nrf/boards/adafruit_nrf52840_s140_v6.ld +++ b/ports/nrf/boards/adafruit_nrf52840_s140_v6.ld @@ -16,6 +16,7 @@ 0x00000000..0x00000FFF (4KB) Master Boot Record */ + /* Specify the memory areas (S140 6.x.x) */ MEMORY { @@ -26,7 +27,10 @@ MEMORY FLASH_FATFS (r) : ORIGIN = 0x000AD000, LENGTH = 0x040000 /* 0x2000000 - RAM:ORIGIN is reserved for Softdevice */ - RAM (xrw) : ORIGIN = 0x20004000, LENGTH = 0x20040000 - 0x20004000 + /* SoftDevice 6.1.0 takes 0x1628 bytes (5.54 kb) minimum. */ + /* To measure the minimum required amount of memory for given configuration, set this number + high enough to work and then check the mutation of the value done by sd_ble_enable. */ + RAM (xrw) : ORIGIN = 0x20000000 + 16K, LENGTH = 256K - 16K } /* produce a link error if there is not this amount of RAM for these sections */ @@ -38,7 +42,8 @@ _minimum_heap_size = 0; /*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ _estack = ORIGIN(RAM) + LENGTH(RAM); -/* RAM extents for the garbage collector */ +/* RAM extents for the garbage collector and soft device init */ +_ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_end = 0x20020000; /* tunable */ diff --git a/ports/nrf/boards/arduino_nano_33_ble/README.md b/ports/nrf/boards/arduino_nano_33_ble/README.md new file mode 100644 index 0000000000..42d7a86184 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/README.md @@ -0,0 +1,27 @@ +# Arduino Nano 33 BLE and Nano 33 BLE Sense + +The [Arduino Nano 33 BLE](https://store.arduino.cc/usa/nano-33-ble-with-headers) and +[Arduino Nano 33 BLE Sense](https://store.arduino.cc/usa/nano-33-ble-sense) and +are built around the NINA B306 module, based on Nordic nRF 52840 and containing +a powerful Cortex M4F. Both include an onboard 9 axis Inertial Measurement Unit (IMU), the LSM9DS1. +The Nano 33 BLE Sense adds an LPS22HB barometric pressure and temperature sensor, +an ADPS-9960 digital proximity, ambient light, RGB, and gensture sensor, +and an MP34DT05 digital microphone. + +Note: the Arduino Nano 33 BLE and BLE Sense do not include a QSPI external +flash. Any Python code will need to be stored on the internal flash +filesystem. + +I2C pins `board.SCL1` and `board.SDA1` are not exposed and are used for onboard peripherals. +Pin `board.R_PULLUP` must be set to high to enable the `SCL1` and `SDA1` pullups for proper operation. + +Pin `board.VDD_ENV` applies power to the LSM9DS1, and must be high for it to be operational. + +Pins `board.MIC_PWR`, `board.PDMDIN`, and `board.PDMCLK` are for the Nano 33 BLE Sense onboard microphone. + +Pin `board.INT_ADPS` is the interrupt pin from the ADPS-9960. + +Pins `board.RGB_LED_R`, `board.RGB_LED_G`, and `board.RGB_LED_B` +are the red, green and blue LEDS in the onboard RGB LED. + +Pins `board.LED_G` and `board.LED_Y` are onboard green and red LEDs. `board.LED_Y` is also `board.SCK`. diff --git a/ports/esp8266/common-hal/multiterminal/__init__.c b/ports/nrf/boards/arduino_nano_33_ble/board.c similarity index 53% rename from ports/esp8266/common-hal/multiterminal/__init__.c rename to ports/nrf/boards/arduino_nano_33_ble/board.c index 492174f0bb..ddfcde2848 100644 --- a/ports/esp8266/common-hal/multiterminal/__init__.c +++ b/ports/nrf/boards/arduino_nano_33_ble/board.c @@ -3,7 +3,6 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Paul Sokolovsky * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -25,24 +24,40 @@ * THE SOFTWARE. */ -#include "esp_mphal.h" +#include "boards/board.h" +#include "nrf.h" +#include "nrf_rtc.h" -#include "shared-bindings/multiterminal/__init__.h" -#include "shared-module/multiterminal/__init__.h" +void board_init(void) { + // Initializations below from Arduino variant.cpp. -void common_hal_multiterminal_schedule_secondary_terminal_read(mp_obj_t socket) { - (void) socket; - mp_hal_signal_dupterm_input(); + // // turn power LED on + // pinMode(LED_PWR, OUTPUT); + // digitalWrite(LED_PWR, HIGH); + + // Errata Nano33BLE - I2C pullup is on SWO line, need to disable TRACE + // was being enabled by nrfx_clock_anomaly_132 + CoreDebug->DEMCR = 0; + NRF_CLOCK->TRACECONFIG = 0; + + // FIXME: bootloader enables interrupt on COMPARE[0], which we don't handle + // Disable it here to avoid getting stuck when OVERFLOW irq is triggered + nrf_rtc_event_disable(NRF_RTC1, NRF_RTC_INT_COMPARE0_MASK); + nrf_rtc_int_disable(NRF_RTC1, NRF_RTC_INT_COMPARE0_MASK); + + // // FIXME: always enable I2C pullup and power @startup + // // Change for maximum powersave + // pinMode(PIN_ENABLE_SENSORS_3V3, OUTPUT); + // pinMode(PIN_ENABLE_I2C_PULLUP, OUTPUT); + + // digitalWrite(PIN_ENABLE_SENSORS_3V3, HIGH); + // digitalWrite(PIN_ENABLE_I2C_PULLUP, HIGH); } -mp_obj_t common_hal_multiterminal_get_secondary_terminal() { - return shared_module_multiterminal_get_secondary_terminal(); +bool board_requests_safe_mode(void) { + return false; } -void common_hal_multiterminal_set_secondary_terminal(mp_obj_t secondary_terminal) { - shared_module_multiterminal_set_secondary_terminal(secondary_terminal); -} +void reset_board(void) { -void common_hal_multiterminal_clear_secondary_terminal() { - shared_module_multiterminal_clear_secondary_terminal(); } diff --git a/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.h b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.h new file mode 100644 index 0000000000..d34a862439 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.h @@ -0,0 +1,16 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Arduino Nano 33 BLE" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_02) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_31) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_13) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_01) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_08) + +#define DEFAULT_UART_BUS_RX (&pin_P1_10) +#define DEFAULT_UART_BUS_TX (&pin_P1_03) diff --git a/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.mk b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.mk new file mode 100644 index 0000000000..9a875ac442 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.mk @@ -0,0 +1,31 @@ +USB_VID = 0x2341 +USB_PID = 0x805A +USB_PRODUCT = "Arduino_Nano_33_BLE" +USB_MANUFACTURER = "Arduino" + +MCU_SERIES = m4 +MCU_VARIANT = nrf52 +MCU_SUB_VARIANT = nrf52840 +MCU_CHIP = nrf52840 +SD ?= s140 +SOFTDEV_VERSION ?= 6.1.0 + +BOOT_SETTING_ADDR = 0xFF000 + +ifeq ($(SD),) + LD_FILE = boards/nrf52840_1M_256k.ld +else + LD_FILE = boards/adafruit_$(MCU_SUB_VARIANT)_$(SD_LOWER)_v$(firstword $(subst ., ,$(SOFTDEV_VERSION))).ld + CIRCUITPY_BLEIO = 1 +endif + +NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 + +INTERNAL_FLASH_FILESYSTEM = 1 + +# Allocate two, not just one I2C peripheral, so that we have both +# on-board and off-board I2C available. +# When SPIM3 becomes available we'll be able to have two I2C and two SPI peripherals. +# We use a CFLAGS define here because there are include order issues +# if we try to include "mpconfigport.h" into nrfx_config.h . +CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2 diff --git a/ports/nrf/boards/arduino_nano_33_ble/pins.c b/ports/nrf/boards/arduino_nano_33_ble/pins.c new file mode 100644 index 0000000000..9cdd369331 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/pins.c @@ -0,0 +1,63 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_08) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_LED_Y), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_RGB_LED_R), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_G), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_B), MP_ROM_PTR(&pin_P0_06) }, + + // Power line to LSM9DS1. + { MP_ROM_QSTR(MP_QSTR_VDD_ENV), MP_ROM_PTR(&pin_P0_22) }, + + // Pullup voltage for SDA1 and SCL1 + { MP_ROM_QSTR(MP_QSTR_R_PULLUP), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_MIC_PWR), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_PDMCLK), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_PDMDIN), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_INT_APDS), MP_ROM_PTR(&pin_P0_19) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index 1e55cd0260..4e37eae0aa 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -29,7 +29,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Circuit Playground Bluefruit" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "CircuitPlaygroundBluefruit" #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (4096) @@ -70,3 +69,5 @@ #define DEFAULT_UART_BUS_RX (&pin_P0_30) #define DEFAULT_UART_BUS_TX (&pin_P0_14) + +#define SPEAKER_ENABLE_PIN (&pin_P1_04) diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk index dbb32629c6..d53e486f9d 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk @@ -24,3 +24,10 @@ NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "GD25Q16C" + +# Allocate two, not just one I2C peripheral for CPB, so that we have both +# on-board and off-board I2C available. +# When SPIM3 becomes available we'll be able to have two I2C and two SPI peripherals. +# We use a CFLAGS define here because there are include order issues +# if we try to include "mpconfigport.h" into nrfx_config.h . +CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2 diff --git a/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h index 21e8c3ef61..6fe969d4ac 100644 --- a/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h +++ b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h @@ -32,7 +32,6 @@ #define MICROPY_HW_BOARD_NAME "Electronut Labs Blip" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "ElectronutLabsPapyr" #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h index 7f5021fdca..6fc1c5fad7 100644 --- a/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h +++ b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h @@ -31,7 +31,6 @@ #define MICROPY_HW_BOARD_NAME "Electronut Labs Papyr" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "ElectronutLabsPapyr" #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h index 70ccffc3f3..b5319032c9 100644 --- a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h @@ -29,7 +29,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Feather nRF52840 Express" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "Feather52840Express" #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (4096) diff --git a/ports/stm32f4/boards/feather_f405/board.c b/ports/nrf/boards/itsybitsy_nrf52840_express/board.c similarity index 100% rename from ports/stm32f4/boards/feather_f405/board.c rename to ports/nrf/boards/itsybitsy_nrf52840_express/board.c diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h new file mode 100644 index 0000000000..2f17460ae7 --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h @@ -0,0 +1,46 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit ItsyBitsy nRF52840 Express" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (4096) + +#define MICROPY_HW_LED_STATUS (&pin_P0_06) + +#define MICROPY_HW_APA102_MOSI (&pin_P0_08) +#define MICROPY_HW_APA102_SCK (&pin_P1_09) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(1, 00) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 23) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_21 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_23 +#endif + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define CIRCUITPY_INTERNAL_NVM_SIZE (4096) + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_14) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_16) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_13) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_15) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_20) + +#define DEFAULT_UART_BUS_RX (&pin_P0_25) +#define DEFAULT_UART_BUS_TX (&pin_P0_24) diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.mk new file mode 100644 index 0000000000..d290077e75 --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.mk @@ -0,0 +1,29 @@ +USB_VID = 0x239A +USB_PID = 0x8052 +USB_PRODUCT = "ItsyBitsy nRF52840 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_SERIES = m4 +MCU_VARIANT = nrf52 +MCU_SUB_VARIANT = nrf52840 +MCU_CHIP = nrf52840 +SD ?= s140 +SOFTDEV_VERSION ?= 6.1.0 + +BOOT_SETTING_ADDR = 0xFF000 + +ifeq ($(SD),) + LD_FILE = boards/nrf52840_1M_256k.ld +else + LD_FILE = boards/adafruit_$(MCU_SUB_VARIANT)_$(SD_LOWER)_v$(firstword $(subst ., ,$(SOFTDEV_VERSION))).ld + CIRCUITPY_BLEIO = 1 +endif + +NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 + +# Don't use up a hardware SPI peripheral for the status DotStar: we only have one or two. +CIRCUITPY_BITBANG_APA102 = 1 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/pins.c b/ports/nrf/boards/itsybitsy_nrf52840_express/pins.c new file mode 100644 index 0000000000..364fbfd470 --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/pins.c @@ -0,0 +1,46 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_20) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h index ed48364942..ce0abe724e 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h @@ -31,7 +31,6 @@ #define MICROPY_HW_BOARD_NAME "MakerDiary nRF52840 MDK" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "MakerDiary52840MDK" #define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(1, 5) #define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(1, 4) diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h index d4096503d7..86c7243e57 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h @@ -31,7 +31,6 @@ #define MICROPY_HW_BOARD_NAME "MakerDiary nRF52840 MDK USB Dongle" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "MakerDiary52840MDKDongle" #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h index 520eef90d9..797cc9668c 100644 --- a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h @@ -29,7 +29,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Metro nRF52840 Express" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "Metro52840Express" #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (4096) diff --git a/ports/nrf/boards/particle_argon/mpconfigboard.h b/ports/nrf/boards/particle_argon/mpconfigboard.h index a4ecb2bb43..1eeb7291bc 100644 --- a/ports/nrf/boards/particle_argon/mpconfigboard.h +++ b/ports/nrf/boards/particle_argon/mpconfigboard.h @@ -29,7 +29,6 @@ #define MICROPY_HW_BOARD_NAME "Particle Argon" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "Particle Argon" #define MICROPY_HW_LED_STATUS (&pin_P1_12) diff --git a/ports/nrf/boards/particle_boron/mpconfigboard.h b/ports/nrf/boards/particle_boron/mpconfigboard.h index 5e817311f9..af69924841 100644 --- a/ports/nrf/boards/particle_boron/mpconfigboard.h +++ b/ports/nrf/boards/particle_boron/mpconfigboard.h @@ -29,7 +29,6 @@ #define MICROPY_HW_BOARD_NAME "Particle Boron" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "Particle Boron" #define MICROPY_HW_LED_STATUS (&pin_P1_12) diff --git a/ports/nrf/boards/particle_xenon/mpconfigboard.h b/ports/nrf/boards/particle_xenon/mpconfigboard.h index 6c8cc7cef2..34ca6421e6 100644 --- a/ports/nrf/boards/particle_xenon/mpconfigboard.h +++ b/ports/nrf/boards/particle_xenon/mpconfigboard.h @@ -29,7 +29,6 @@ #define MICROPY_HW_BOARD_NAME "Particle Xenon" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "Particle Xenon" #define MICROPY_HW_LED_STATUS (&pin_P1_12) diff --git a/ports/nrf/boards/pca10056/mpconfigboard.h b/ports/nrf/boards/pca10056/mpconfigboard.h index 48ef7f1c39..5b30c7fe83 100644 --- a/ports/nrf/boards/pca10056/mpconfigboard.h +++ b/ports/nrf/boards/pca10056/mpconfigboard.h @@ -28,7 +28,6 @@ #define MICROPY_HW_BOARD_NAME "PCA10056 nRF52840-DK" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "nRF52840-DK" #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/pca10059/mpconfigboard.h b/ports/nrf/boards/pca10059/mpconfigboard.h index d5ce212292..b79d3c88f2 100644 --- a/ports/nrf/boards/pca10059/mpconfigboard.h +++ b/ports/nrf/boards/pca10059/mpconfigboard.h @@ -26,7 +26,6 @@ #define MICROPY_HW_BOARD_NAME "PCA10059 nRF52840 Dongle" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "nRF52840-DK" #define MICROPY_HW_LED_STATUS (&pin_P0_06) diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h index a5ed69b2bd..cc7e68864e 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h @@ -28,7 +28,6 @@ #define MICROPY_HW_BOARD_NAME "SparkFun Pro nRF52840 Mini" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "SFE_NRF52840_Mini" #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index a8e1f19059..295a42d63b 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -26,6 +26,7 @@ * THE SOFTWARE. */ +#include #include #include @@ -34,11 +35,18 @@ #include "nrfx_power.h" #include "nrf_nvic.h" #include "nrf_sdm.h" +#include "tick.h" +#include "py/gc.h" #include "py/objstr.h" #include "py/runtime.h" +#include "supervisor/shared/safe_mode.h" #include "supervisor/usb.h" +#include "shared-bindings/_bleio/__init__.h" #include "shared-bindings/_bleio/Adapter.h" #include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/ScanEntry.h" +#include "shared-bindings/time/__init__.h" #define BLE_MIN_CONN_INTERVAL MSEC_TO_UNITS(15, UNIT_0_625_MS) #define BLE_MAX_CONN_INTERVAL MSEC_TO_UNITS(15, UNIT_0_625_MS) @@ -46,10 +54,13 @@ #define BLE_CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) STATIC void softdevice_assert_handler(uint32_t id, uint32_t pc, uint32_t info) { - mp_raise_msg_varg(&mp_type_AssertionError, - translate("Soft device assert, id: 0x%08lX, pc: 0x%08lX"), id, pc); + reset_into_safe_mode(NORDIC_SOFT_DEVICE_ASSERT); } +bleio_connection_internal_t connections[BLEIO_TOTAL_CONNECTION_COUNT]; + +// Linker script provided ram start. +extern uint32_t _ram_start; STATIC uint32_t ble_stack_enable(void) { nrf_clock_lf_cfg_t clock_config = { #if BOARD_HAS_32KHZ_XTAL @@ -78,34 +89,56 @@ STATIC uint32_t ble_stack_enable(void) { // Start with no event handlers, etc. ble_drv_reset(); - uint32_t app_ram_start; - app_ram_start = 0x20004000; + // Set everything up to have one persistent code editing connection and one user managed + // connection. In the future we could move .data and .bss to the other side of the stack and + // dynamically adjust for different memory requirements of the SD based on boot.py + // configuration. + uint32_t app_ram_start = (uint32_t) &_ram_start; ble_cfg_t ble_conf; ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; - ble_conf.conn_cfg.params.gap_conn_cfg.conn_count = BLE_GAP_CONN_COUNT_DEFAULT; + ble_conf.conn_cfg.params.gap_conn_cfg.conn_count = BLEIO_TOTAL_CONNECTION_COUNT; + // Event length here can influence throughput so perhaps make multiple connection profiles + // available. ble_conf.conn_cfg.params.gap_conn_cfg.event_length = BLE_GAP_EVENT_LENGTH_DEFAULT; err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_conf, app_ram_start); - if (err_code != NRF_SUCCESS) + if (err_code != NRF_SUCCESS) { return err_code; + } memset(&ble_conf, 0, sizeof(ble_conf)); - ble_conf.gap_cfg.role_count_cfg.periph_role_count = 1; + ble_conf.gap_cfg.role_count_cfg.adv_set_count = 1; + ble_conf.gap_cfg.role_count_cfg.periph_role_count = 2; ble_conf.gap_cfg.role_count_cfg.central_role_count = 1; err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_conf, app_ram_start); - if (err_code != NRF_SUCCESS) + if (err_code != NRF_SUCCESS) { return err_code; + } memset(&ble_conf, 0, sizeof(ble_conf)); ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = MAX_TX_IN_PROGRESS; err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATTS, &ble_conf, app_ram_start); - if (err_code != NRF_SUCCESS) + if (err_code != NRF_SUCCESS) { return err_code; + } - err_code = sd_ble_enable(&app_ram_start); - if (err_code != NRF_SUCCESS) + // Triple the GATT Server attribute size to accomodate both the CircuitPython built-in service + // and anything the user does. + memset(&ble_conf, 0, sizeof(ble_conf)); + ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 3; + err_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { return err_code; + } + + // TODO set ATT_MTU so that the maximum MTU we can negotiate is higher than the default. + + // This sets app_ram_start to the minimum value needed for the settings set above. + err_code = sd_ble_enable(&app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } ble_gap_conn_params_t gap_conn_params = { .min_conn_interval = BLE_MIN_CONN_INTERVAL, @@ -122,11 +155,109 @@ STATIC uint32_t ble_stack_enable(void) { return err_code; } -void common_hal_bleio_adapter_set_enabled(bool enabled) { - const bool is_enabled = common_hal_bleio_adapter_get_enabled(); +STATIC bool adapter_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { + bleio_adapter_obj_t *self = (bleio_adapter_obj_t*)self_in; + + // For debugging. + // mp_printf(&mp_plat_print, "Adapter event: 0x%04x\n", ble_evt->header.evt_id); + + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_CONNECTED: { + // Find an empty connection. One must always be available because the SD has the same + // total connection limit. + bleio_connection_internal_t *connection; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + connection = &connections[i]; + if (connection->conn_handle == BLE_CONN_HANDLE_INVALID) { + break; + } + } + + // Central has connected. + ble_gap_evt_connected_t* connected = &ble_evt->evt.gap_evt.params.connected; + + connection->conn_handle = ble_evt->evt.gap_evt.conn_handle; + connection->connection_obj = mp_const_none; + ble_drv_add_event_handler_entry(&connection->handler_entry, connection_on_ble_evt, connection); + self->connection_objs = NULL; + + // See if connection interval set by Central is out of range. + // If so, negotiate our preferred range. + ble_gap_conn_params_t conn_params; + sd_ble_gap_ppcp_get(&conn_params); + if (conn_params.min_conn_interval < connected->conn_params.min_conn_interval || + conn_params.min_conn_interval > connected->conn_params.max_conn_interval) { + sd_ble_gap_conn_param_update(ble_evt->evt.gap_evt.conn_handle, &conn_params); + } + self->current_advertising_data = NULL; + break; + } + case BLE_GAP_EVT_DISCONNECTED: { + // Find the connection that was disconnected. + bleio_connection_internal_t *connection; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + connection = &connections[i]; + if (connection->conn_handle == ble_evt->evt.gap_evt.conn_handle) { + break; + } + } + ble_drv_remove_event_handler(connection_on_ble_evt, connection); + connection->conn_handle = BLE_CONN_HANDLE_INVALID; + if (connection->connection_obj != mp_const_none) { + bleio_connection_obj_t* obj = connection->connection_obj; + obj->connection = NULL; + obj->disconnect_reason = ble_evt->evt.gap_evt.params.disconnected.reason; + } + self->connection_objs = NULL; + + break; + } + + case BLE_GAP_EVT_ADV_SET_TERMINATED: + self->current_advertising_data = NULL; + break; + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled adapter event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +STATIC void get_address(bleio_adapter_obj_t *self, ble_gap_addr_t *address) { + uint32_t err_code; + + err_code = sd_ble_gap_addr_get(address); + + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg(translate("Failed to get local address")); + } +} + +char default_ble_name[] = { 'C', 'I', 'R', 'C', 'U', 'I', 'T', 'P', 'Y', 0, 0, 0, 0 , 0}; + +STATIC void bleio_adapter_reset_name(bleio_adapter_obj_t *self) { + uint8_t len = sizeof(default_ble_name) - 1; + + ble_gap_addr_t local_address; + get_address(self, &local_address); + + default_ble_name[len - 4] = nibble_to_hex_lower[local_address.addr[1] >> 4 & 0xf]; + default_ble_name[len - 3] = nibble_to_hex_lower[local_address.addr[1] & 0xf]; + default_ble_name[len - 2] = nibble_to_hex_lower[local_address.addr[0] >> 4 & 0xf]; + default_ble_name[len - 1] = nibble_to_hex_lower[local_address.addr[0] & 0xf]; + default_ble_name[len] = '\0'; // for now we add null for compatibility with C ASCIIZ strings + + common_hal_bleio_adapter_set_name(self, (char*) default_ble_name); +} + +void common_hal_bleio_adapter_set_enabled(bleio_adapter_obj_t *self, bool enabled) { + const bool is_enabled = common_hal_bleio_adapter_get_enabled(self); // Don't enable or disable twice - if ((is_enabled && enabled) || (!is_enabled && !enabled)) { + if (is_enabled == enabled) { return; } @@ -137,22 +268,34 @@ void common_hal_bleio_adapter_set_enabled(bool enabled) { nrfx_power_uninit(); err_code = ble_stack_enable(); - - // Re-init USB hardware - init_usb_hardware(); } else { err_code = sd_softdevice_disable(); - - // Re-init USB hardware - init_usb_hardware(); } + // Re-init USB hardware + init_usb_hardware(); if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg(translate("Failed to change softdevice state")); + mp_raise_OSError_msg_varg(translate("Failed to change softdevice state, NRF_ERROR_%q"), MP_OBJ_QSTR_VALUE(base_error_messages[err_code - NRF_ERROR_BASE_NUM])); + } + + // Add a handler for incoming peripheral connections. + if (enabled) { + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + connection->conn_handle = BLE_CONN_HANDLE_INVALID; + } + bleio_adapter_reset_name(self); + ble_drv_add_event_handler_entry(&self->handler_entry, adapter_on_ble_evt, self); + } else { + ble_drv_reset(); + self->scan_results = NULL; + self->current_advertising_data = NULL; + self->advertising_data = NULL; + self->scan_response_data = NULL; } } -bool common_hal_bleio_adapter_get_enabled(void) { +bool common_hal_bleio_adapter_get_enabled(bleio_adapter_obj_t *self) { uint8_t is_enabled; const uint32_t err_code = sd_softdevice_is_enabled(&is_enabled); @@ -163,22 +306,11 @@ bool common_hal_bleio_adapter_get_enabled(void) { return is_enabled; } -void get_address(ble_gap_addr_t *address) { - uint32_t err_code; - - common_hal_bleio_adapter_set_enabled(true); - err_code = sd_ble_gap_addr_get(address); - - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg(translate("Failed to get local address")); - } -} - -bleio_address_obj_t *common_hal_bleio_adapter_get_address(void) { - common_hal_bleio_adapter_set_enabled(true); +bleio_address_obj_t *common_hal_bleio_adapter_get_address(bleio_adapter_obj_t *self) { + common_hal_bleio_adapter_set_enabled(self, true); ble_gap_addr_t local_address; - get_address(&local_address); + get_address(self, &local_address); bleio_address_obj_t *address = m_new_obj(bleio_address_obj_t); address->base.type = &bleio_address_type; @@ -187,18 +319,326 @@ bleio_address_obj_t *common_hal_bleio_adapter_get_address(void) { return address; } -mp_obj_t common_hal_bleio_adapter_get_default_name(void) { - common_hal_bleio_adapter_set_enabled(true); - - ble_gap_addr_t local_address; - get_address(&local_address); - - char name[] = { 'C', 'I', 'R', 'C', 'U', 'I', 'T', 'P', 'Y', 0, 0, 0, 0 }; - - name[sizeof(name) - 4] = nibble_to_hex_lower[local_address.addr[1] >> 4 & 0xf]; - name[sizeof(name) - 3] = nibble_to_hex_lower[local_address.addr[1] & 0xf]; - name[sizeof(name) - 2] = nibble_to_hex_lower[local_address.addr[0] >> 4 & 0xf]; - name[sizeof(name) - 1] = nibble_to_hex_lower[local_address.addr[0] & 0xf]; - - return mp_obj_new_str(name, sizeof(name)); +mp_obj_str_t* common_hal_bleio_adapter_get_name(bleio_adapter_obj_t *self) { + uint16_t len = 0; + sd_ble_gap_device_name_get(NULL, &len); + uint8_t buf[len]; + uint32_t err_code = sd_ble_gap_device_name_get(buf, &len); + if (err_code != NRF_SUCCESS) { + return NULL; + } + return mp_obj_new_str((char*) buf, len); +} + +void common_hal_bleio_adapter_set_name(bleio_adapter_obj_t *self, const char* name) { + ble_gap_conn_sec_mode_t sec; + sec.lv = 0; + sec.sm = 0; + sd_ble_gap_device_name_set(&sec, (const uint8_t*) name, strlen(name)); +} + +STATIC bool scan_on_ble_evt(ble_evt_t *ble_evt, void *scan_results_in) { + bleio_scanresults_obj_t *scan_results = (bleio_scanresults_obj_t*)scan_results_in; + + if (ble_evt->header.evt_id == BLE_GAP_EVT_TIMEOUT && + ble_evt->evt.gap_evt.params.timeout.src == BLE_GAP_TIMEOUT_SRC_SCAN) { + shared_module_bleio_scanresults_set_done(scan_results, true); + ble_drv_remove_event_handler(scan_on_ble_evt, scan_results); + return true; + } + + if (ble_evt->header.evt_id != BLE_GAP_EVT_ADV_REPORT) { + return false; + } + ble_gap_evt_adv_report_t *report = &ble_evt->evt.gap_evt.params.adv_report; + + shared_module_bleio_scanresults_append(scan_results, + ticks_ms, + report->type.connectable, + report->type.scan_response, + report->rssi, + report->peer_addr.addr, + report->peer_addr.addr_type, + report->data.p_data, + report->data.len); + + const uint32_t err_code = sd_ble_gap_scan_start(NULL, scan_results->common_hal_data); + if (err_code != NRF_SUCCESS) { + // TODO: Pass the error into the scan results so it can throw an exception. + scan_results->done = true; + } + return true; +} + +mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* prefixes, size_t prefix_length, bool extended, mp_int_t buffer_size, mp_float_t timeout, mp_float_t interval, mp_float_t window, mp_int_t minimum_rssi, bool active) { + if (self->scan_results != NULL) { + if (!shared_module_bleio_scanresults_get_done(self->scan_results)) { + mp_raise_RuntimeError(translate("Scan already in progess. Stop with stop_scan.")); + } + self->scan_results = NULL; + } + self->scan_results = shared_module_bleio_new_scanresults(buffer_size, prefixes, prefix_length, minimum_rssi); + size_t max_packet_size = extended ? BLE_GAP_SCAN_BUFFER_EXTENDED_MAX_SUPPORTED : BLE_GAP_SCAN_BUFFER_MAX; + uint8_t *raw_data = m_malloc(sizeof(ble_data_t) + max_packet_size, false); + ble_data_t * sd_data = (ble_data_t *) raw_data; + self->scan_results->common_hal_data = sd_data; + sd_data->len = max_packet_size; + sd_data->p_data = raw_data + sizeof(ble_data_t); + + ble_drv_add_event_handler(scan_on_ble_evt, self->scan_results); + + uint32_t nrf_timeout = SEC_TO_UNITS(timeout, UNIT_10_MS); + if (timeout <= 0.0001) { + nrf_timeout = BLE_GAP_SCAN_TIMEOUT_UNLIMITED; + } + + ble_gap_scan_params_t scan_params = { + .extended = extended, + .interval = SEC_TO_UNITS(interval, UNIT_0_625_MS), + .timeout = nrf_timeout, + .window = SEC_TO_UNITS(window, UNIT_0_625_MS), + .scan_phys = BLE_GAP_PHY_1MBPS, + .active = active + }; + uint32_t err_code; + err_code = sd_ble_gap_scan_start(&scan_params, sd_data); + + if (err_code != NRF_SUCCESS) { + self->scan_results = NULL; + ble_drv_remove_event_handler(scan_on_ble_evt, self->scan_results); + mp_raise_OSError_msg_varg(translate("Failed to start scanning, err 0x%04x"), err_code); + } + + return MP_OBJ_FROM_PTR(self->scan_results); +} + +void common_hal_bleio_adapter_stop_scan(bleio_adapter_obj_t *self) { + sd_ble_gap_scan_stop(); + shared_module_bleio_scanresults_set_done(self->scan_results, true); + ble_drv_remove_event_handler(scan_on_ble_evt, self->scan_results); + self->scan_results = NULL; +} + +typedef struct { + uint16_t conn_handle; + volatile bool done; +} connect_info_t; + +STATIC bool connect_on_ble_evt(ble_evt_t *ble_evt, void *info_in) { + connect_info_t *info = (connect_info_t*)info_in; + + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_CONNECTED: + info->conn_handle = ble_evt->evt.gap_evt.conn_handle; + info->done = true; + + break; + + case BLE_GAP_EVT_TIMEOUT: + // Handle will be invalid. + info->done = true; + break; + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled central event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout, bool pair) { + + ble_gap_addr_t addr; + + addr.addr_type = address->type; + mp_buffer_info_t address_buf_info; + mp_get_buffer_raise(address->bytes, &address_buf_info, MP_BUFFER_READ); + memcpy(addr.addr, (uint8_t *) address_buf_info.buf, NUM_BLEIO_ADDRESS_BYTES); + + ble_gap_scan_params_t scan_params = { + .interval = MSEC_TO_UNITS(100, UNIT_0_625_MS), + .window = MSEC_TO_UNITS(100, UNIT_0_625_MS), + .scan_phys = BLE_GAP_PHY_1MBPS, + // timeout of 0 means no timeout + .timeout = SEC_TO_UNITS(timeout, UNIT_10_MS), + }; + + ble_gap_conn_params_t conn_params = { + .conn_sup_timeout = MSEC_TO_UNITS(4000, UNIT_10_MS), + .min_conn_interval = MSEC_TO_UNITS(15, UNIT_1_25_MS), + .max_conn_interval = MSEC_TO_UNITS(300, UNIT_1_25_MS), + .slave_latency = 0, // number of conn events + }; + + connect_info_t event_info; + ble_drv_add_event_handler(connect_on_ble_evt, &event_info); + event_info.done = false; + + uint32_t err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_CUSTOM); + + if (err_code != NRF_SUCCESS) { + ble_drv_remove_event_handler(connect_on_ble_evt, &event_info); + mp_raise_OSError_msg_varg(translate("Failed to start connecting, error 0x%04x"), err_code); + } + + while (!event_info.done) { + RUN_BACKGROUND_TASKS; + } + + ble_drv_remove_event_handler(connect_on_ble_evt, &event_info); + + if (event_info.conn_handle == BLE_CONN_HANDLE_INVALID) { + mp_raise_OSError_msg(translate("Failed to connect: timeout")); + } + + // Make the connection object and return it. + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + if (connection->conn_handle == event_info.conn_handle) { + return bleio_connection_new_from_internal(connection); + } + } + + mp_raise_OSError_msg(translate("Failed to connect: internal error")); + + return mp_const_none; +} + +// The nRF SD 6.1.0 can only do one concurrent advertisement so share the advertising handle. +uint8_t adv_handle = BLE_GAP_ADV_SET_HANDLE_NOT_SET; + +STATIC void check_data_fit(size_t data_len) { + if (data_len > BLE_GAP_ADV_SET_DATA_SIZE_MAX) { + mp_raise_ValueError(translate("Data too large for advertisement packet")); + } +} + +uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, float interval, uint8_t *advertising_data, uint16_t advertising_data_len, uint8_t *scan_response_data, uint16_t scan_response_data_len) { + if (self->current_advertising_data != NULL && self->current_advertising_data == self->advertising_data) { + return NRF_ERROR_BUSY; + } + + // If the current advertising data isn't owned by the adapter then it must be an internal + // advertisement that we should stop. + if (self->current_advertising_data != NULL) { + common_hal_bleio_adapter_stop_advertising(self); + } + + uint32_t err_code; + ble_gap_adv_params_t adv_params = { + .interval = SEC_TO_UNITS(interval, UNIT_0_625_MS), + .properties.type = connectable ? BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED + : BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED, + .duration = BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED, + .filter_policy = BLE_GAP_ADV_FP_ANY, + .primary_phy = BLE_GAP_PHY_1MBPS, + }; + + const ble_gap_adv_data_t ble_gap_adv_data = { + .adv_data.p_data = advertising_data, + .adv_data.len = advertising_data_len, + .scan_rsp_data.p_data = scan_response_data_len > 0 ? scan_response_data : NULL, + .scan_rsp_data.len = scan_response_data_len, + }; + + err_code = sd_ble_gap_adv_set_configure(&adv_handle, &ble_gap_adv_data, &adv_params); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + err_code = sd_ble_gap_adv_start(adv_handle, BLE_CONN_CFG_TAG_CUSTOM); + if (err_code != NRF_SUCCESS) { + return err_code; + } + self->current_advertising_data = advertising_data; + return NRF_SUCCESS; +} + + +void common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, mp_float_t interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo) { + if (self->current_advertising_data != NULL && self->current_advertising_data == self->advertising_data) { + mp_raise_OSError_msg(translate("Already advertising.")); + } + // interval value has already been validated. + + uint32_t err_code; + + check_data_fit(advertising_data_bufinfo->len); + check_data_fit(scan_response_data_bufinfo->len); + // The advertising data buffers must not move, because the SoftDevice depends on them. + // So make them long-lived and reuse them onwards. + if (self->advertising_data == NULL) { + self->advertising_data = (uint8_t *) gc_alloc(BLE_GAP_ADV_SET_DATA_SIZE_MAX * sizeof(uint8_t), false, true); + } + if (self->scan_response_data == NULL) { + self->scan_response_data = (uint8_t *) gc_alloc(BLE_GAP_ADV_SET_DATA_SIZE_MAX * sizeof(uint8_t), false, true); + } + + memcpy(self->advertising_data, advertising_data_bufinfo->buf, advertising_data_bufinfo->len); + memcpy(self->scan_response_data, scan_response_data_bufinfo->buf, scan_response_data_bufinfo->len); + + err_code = _common_hal_bleio_adapter_start_advertising(self, connectable, interval, self->advertising_data, advertising_data_bufinfo->len, self->scan_response_data, scan_response_data_bufinfo->len); + + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to start advertising, NRF_ERROR_%q"), MP_OBJ_QSTR_VALUE(base_error_messages[err_code - NRF_ERROR_BASE_NUM])); + } +} + +void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self) { + if (adv_handle == BLE_GAP_ADV_SET_HANDLE_NOT_SET) + return; + + // TODO: Don't actually stop. Switch to advertising CircuitPython if we don't already have a connection. + const uint32_t err_code = sd_ble_gap_adv_stop(adv_handle); + self->current_advertising_data = NULL; + + if ((err_code != NRF_SUCCESS) && (err_code != NRF_ERROR_INVALID_STATE)) { + mp_raise_OSError_msg_varg(translate("Failed to stop advertising, NRF_ERROR_%q"), MP_OBJ_QSTR_VALUE(base_error_messages[err_code - NRF_ERROR_BASE_NUM])); + } +} + +bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self) { + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + if (connection->conn_handle != BLE_CONN_HANDLE_INVALID) { + return true; + } + } + return false; +} + +mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self) { + if (self->connection_objs != NULL) { + return self->connection_objs; + } + size_t total_connected = 0; + mp_obj_t items[BLEIO_TOTAL_CONNECTION_COUNT]; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + if (connection->conn_handle != BLE_CONN_HANDLE_INVALID) { + if (connection->connection_obj == mp_const_none) { + connection->connection_obj = bleio_connection_new_from_internal(connection); + } + items[total_connected] = connection->connection_obj; + total_connected++; + } + } + self->connection_objs = mp_obj_new_tuple(total_connected, items); + return self->connection_objs; +} + +void bleio_adapter_gc_collect(bleio_adapter_obj_t* adapter) { + gc_collect_root((void**)adapter, sizeof(bleio_adapter_obj_t) / sizeof(size_t)); + gc_collect_root((void**)connections, sizeof(connections) / sizeof(size_t)); +} + +void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { + common_hal_bleio_adapter_stop_scan(adapter); + common_hal_bleio_adapter_stop_advertising(adapter); + adapter->connection_objs = NULL; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + connection->connection_obj = mp_const_none; + } } diff --git a/ports/nrf/common-hal/_bleio/Adapter.h b/ports/nrf/common-hal/_bleio/Adapter.h index 5dcc625406..dca4439908 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.h +++ b/ports/nrf/common-hal/_bleio/Adapter.h @@ -30,9 +30,27 @@ #define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ADAPTER_H #include "py/obj.h" +#include "py/objtuple.h" + +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/ScanResults.h" + +#define BLEIO_TOTAL_CONNECTION_COUNT 2 + +extern bleio_connection_internal_t connections[BLEIO_TOTAL_CONNECTION_COUNT]; typedef struct { mp_obj_base_t base; -} super_adapter_obj_t; + uint8_t* advertising_data; + uint8_t* scan_response_data; + uint8_t* current_advertising_data; + bleio_scanresults_obj_t* scan_results; + mp_obj_t name; + mp_obj_tuple_t *connection_objs; + ble_drv_evt_handler_entry_t handler_entry; +} bleio_adapter_obj_t; + +void bleio_adapter_gc_collect(bleio_adapter_obj_t* adapter); +void bleio_adapter_reset(bleio_adapter_obj_t* adapter); #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ADAPTER_H diff --git a/ports/nrf/common-hal/_bleio/Central.c b/ports/nrf/common-hal/_bleio/Central.c deleted file mode 100644 index db67b763c6..0000000000 --- a/ports/nrf/common-hal/_bleio/Central.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "ble.h" -#include "ble_drv.h" -#include "ble_hci.h" -#include "nrf_soc.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "shared-bindings/_bleio/__init__.h" -#include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/_bleio/Central.h" - -STATIC void central_on_ble_evt(ble_evt_t *ble_evt, void *central_in) { - bleio_central_obj_t *central = (bleio_central_obj_t*)central_in; - - switch (ble_evt->header.evt_id) { - case BLE_GAP_EVT_CONNECTED: - central->conn_handle = ble_evt->evt.gap_evt.conn_handle; - central->waiting_to_connect = false; - break; - - case BLE_GAP_EVT_TIMEOUT: - // Handle will be invalid. - central->waiting_to_connect = false; - break; - - case BLE_GAP_EVT_DISCONNECTED: - central->conn_handle = BLE_CONN_HANDLE_INVALID; - break; - - case BLE_GAP_EVT_SEC_PARAMS_REQUEST: - sd_ble_gap_sec_params_reply(central->conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL); - break; - - case BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST: { - ble_gap_evt_conn_param_update_request_t *request = - &ble_evt->evt.gap_evt.params.conn_param_update_request; - sd_ble_gap_conn_param_update(central->conn_handle, &request->conn_params); - break; - } - default: - // For debugging. - // mp_printf(&mp_plat_print, "Unhandled central event: 0x%04x\n", ble_evt->header.evt_id); - break; - } -} - -void common_hal_bleio_central_construct(bleio_central_obj_t *self) { - common_hal_bleio_adapter_set_enabled(true); - - self->remote_service_list = mp_obj_new_list(0, NULL); - self->conn_handle = BLE_CONN_HANDLE_INVALID; -} - -void common_hal_bleio_central_connect(bleio_central_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout) { - common_hal_bleio_adapter_set_enabled(true); - ble_drv_add_event_handler(central_on_ble_evt, self); - - ble_gap_addr_t addr; - - addr.addr_type = address->type; - mp_buffer_info_t address_buf_info; - mp_get_buffer_raise(address->bytes, &address_buf_info, MP_BUFFER_READ); - memcpy(addr.addr, (uint8_t *) address_buf_info.buf, NUM_BLEIO_ADDRESS_BYTES); - - ble_gap_scan_params_t scan_params = { - .interval = MSEC_TO_UNITS(100, UNIT_0_625_MS), - .window = MSEC_TO_UNITS(100, UNIT_0_625_MS), - .scan_phys = BLE_GAP_PHY_1MBPS, - // timeout of 0 means no timeout - .timeout = SEC_TO_UNITS(timeout, UNIT_10_MS), - }; - - ble_gap_conn_params_t conn_params = { - .conn_sup_timeout = MSEC_TO_UNITS(4000, UNIT_10_MS), - .min_conn_interval = MSEC_TO_UNITS(15, UNIT_1_25_MS), - .max_conn_interval = MSEC_TO_UNITS(300, UNIT_1_25_MS), - .slave_latency = 0, // number of conn events - }; - - self->waiting_to_connect = true; - - uint32_t err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_CUSTOM); - - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to start connecting, error 0x%04x"), err_code); - } - - while (self->waiting_to_connect) { - RUN_BACKGROUND_TASKS; - } - - if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { - mp_raise_OSError_msg(translate("Failed to connect: timeout")); - } -} - -void common_hal_bleio_central_disconnect(bleio_central_obj_t *self) { - sd_ble_gap_disconnect(self->conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); -} - -bool common_hal_bleio_central_get_connected(bleio_central_obj_t *self) { - return self->conn_handle != BLE_CONN_HANDLE_INVALID; -} - -mp_obj_tuple_t *common_hal_bleio_central_discover_remote_services(bleio_central_obj_t *self, mp_obj_t service_uuids_whitelist) { - common_hal_bleio_device_discover_remote_services(MP_OBJ_FROM_PTR(self), service_uuids_whitelist); - // Convert to a tuple and then clear the list so the callee will take ownership. - mp_obj_tuple_t *services_tuple = mp_obj_new_tuple(self->remote_service_list->len, - self->remote_service_list->items); - mp_obj_list_clear(self->remote_service_list); - return services_tuple; -} - -mp_obj_list_t *common_hal_bleio_central_get_remote_services(bleio_central_obj_t *self) { - return self->remote_service_list; -} diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c index e8454d528c..ab765d1ed3 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.c +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -32,7 +32,7 @@ #include "shared-bindings/_bleio/Descriptor.h" #include "shared-bindings/_bleio/Service.h" -static volatile bleio_characteristic_obj_t *m_read_characteristic; +#include "common-hal/_bleio/Adapter.h" STATIC uint16_t characteristic_get_cccd(uint16_t cccd_handle, uint16_t conn_handle) { uint16_t cccd; @@ -53,27 +53,6 @@ STATIC uint16_t characteristic_get_cccd(uint16_t cccd_handle, uint16_t conn_hand return cccd; } -STATIC void characteristic_on_gattc_read_rsp_evt(ble_evt_t *ble_evt, void *param) { - switch (ble_evt->header.evt_id) { - - // More events may be handled later, so keep this as a switch. - - case BLE_GATTC_EVT_READ_RSP: { - ble_gattc_evt_read_rsp_t *response = &ble_evt->evt.gattc_evt.params.read_rsp; - if (m_read_characteristic) { - m_read_characteristic->value = mp_obj_new_bytearray(response->len, response->data); - } - // Indicate to busy-wait loop that we've read the attribute value. - m_read_characteristic = NULL; - break; - } - - default: - // For debugging. - // mp_printf(&mp_plat_print, "Unhandled characteristic event: 0x%04x\n", ble_evt->header.evt_id); - break; - } -} STATIC void characteristic_gatts_notify_indicate(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, uint16_t hvx_type) { uint16_t hvx_len = bufinfo->len; @@ -103,35 +82,14 @@ STATIC void characteristic_gatts_notify_indicate(uint16_t handle, uint16_t conn_ } } -STATIC void characteristic_gattc_read(bleio_characteristic_obj_t *characteristic) { - const uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(characteristic->service->device); - common_hal_bleio_check_connected(conn_handle); - - // Set to NULL in event loop after event. - m_read_characteristic = characteristic; - - ble_drv_add_event_handler(characteristic_on_gattc_read_rsp_evt, characteristic); - - const uint32_t err_code = sd_ble_gattc_read(conn_handle, characteristic->handle, 0); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to read attribute value, err 0x%04x"), err_code); - } - - while (m_read_characteristic != NULL) { - RUN_BACKGROUND_TASKS; - } - - ble_drv_remove_event_handler(characteristic_on_gattc_read_rsp_evt, characteristic); -} - -void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { +void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, uint16_t handle, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { self->service = service; self->uuid = uuid; self->handle = BLE_GATT_HANDLE_INVALID; self->props = props; self->read_perm = read_perm; self->write_perm = write_perm; - self->descriptor_list = mp_obj_new_list(0, NULL); + self->descriptor_list = NULL; const mp_int_t max_length_max = fixed_length ? BLE_GATTS_FIX_ATTR_LEN_MAX : BLE_GATTS_VAR_ATTR_LEN_MAX; if (max_length < 0 || max_length > max_length_max) { @@ -141,10 +99,18 @@ void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, self->max_length = max_length; self->fixed_length = fixed_length; - common_hal_bleio_characteristic_set_value(self, initial_value_bufinfo); + if (service->is_remote) { + self->handle = handle; + } else { + common_hal_bleio_service_add_characteristic(self->service, self, initial_value_bufinfo); + } + + if (initial_value_bufinfo != NULL) { + common_hal_bleio_characteristic_set_value(self, initial_value_bufinfo); + } } -mp_obj_list_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self) { +bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self) { return self->descriptor_list; } @@ -152,19 +118,19 @@ bleio_service_obj_t *common_hal_bleio_characteristic_get_service(bleio_character return self->service; } -mp_obj_t common_hal_bleio_characteristic_get_value(bleio_characteristic_obj_t *self) { +size_t common_hal_bleio_characteristic_get_value(bleio_characteristic_obj_t *self, uint8_t* buf, size_t len) { // Do GATT operations only if this characteristic has been added to a registered service. if (self->handle != BLE_GATT_HANDLE_INVALID) { - uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(self->service->device); + uint16_t conn_handle = bleio_connection_get_conn_handle(self->service->connection); if (common_hal_bleio_service_get_is_remote(self->service)) { // self->value is set by evt handler. - characteristic_gattc_read(self); + return common_hal_bleio_gattc_read(self->handle, conn_handle, buf, len); } else { - self->value = common_hal_bleio_gatts_read(self->handle, conn_handle); + return common_hal_bleio_gatts_read(self->handle, conn_handle, buf, len); } } - return self->value; + return 0; } void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, mp_buffer_info_t *bufinfo) { @@ -175,39 +141,40 @@ void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, mp_raise_ValueError(translate("Value length > max_length")); } - self->value = mp_obj_new_bytes(bufinfo->buf, bufinfo->len); - // Do GATT operations only if this characteristic has been added to a registered service. if (self->handle != BLE_GATT_HANDLE_INVALID) { - uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(self->service->device); if (common_hal_bleio_service_get_is_remote(self->service)) { + uint16_t conn_handle = bleio_connection_get_conn_handle(self->service->connection); // Last argument is true if write-no-reponse desired. common_hal_bleio_gattc_write(self->handle, conn_handle, bufinfo, (self->props & CHAR_PROP_WRITE_NO_RESPONSE)); } else { + // Always write the value locally even if no connections are active. + common_hal_bleio_gatts_write(self->handle, BLE_CONN_HANDLE_INVALID, bufinfo); + // Check to see if we need to notify or indicate any active connections. + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + uint16_t conn_handle = connection->conn_handle; + if (connection->conn_handle == BLE_CONN_HANDLE_INVALID) { + continue; + } - bool sent = false; - uint16_t cccd = 0; + uint16_t cccd = 0; - const bool notify = self->props & CHAR_PROP_NOTIFY; - const bool indicate = self->props & CHAR_PROP_INDICATE; - if (notify | indicate) { - cccd = characteristic_get_cccd(self->cccd_handle, conn_handle); - } + const bool notify = self->props & CHAR_PROP_NOTIFY; + const bool indicate = self->props & CHAR_PROP_INDICATE; + if (notify | indicate) { + cccd = characteristic_get_cccd(self->cccd_handle, conn_handle); + } - // It's possible that both notify and indicate are set. - if (notify && (cccd & BLE_GATT_HVX_NOTIFICATION)) { - characteristic_gatts_notify_indicate(self->handle, conn_handle, bufinfo, BLE_GATT_HVX_NOTIFICATION); - sent = true; - } - if (indicate && (cccd & BLE_GATT_HVX_INDICATION)) { - characteristic_gatts_notify_indicate(self->handle, conn_handle, bufinfo, BLE_GATT_HVX_INDICATION); - sent = true; - } - - if (!sent) { - common_hal_bleio_gatts_write(self->handle, conn_handle, bufinfo); + // It's possible that both notify and indicate are set. + if (notify && (cccd & BLE_GATT_HVX_NOTIFICATION)) { + characteristic_gatts_notify_indicate(self->handle, conn_handle, bufinfo, BLE_GATT_HVX_NOTIFICATION); + } + if (indicate && (cccd & BLE_GATT_HVX_INDICATION)) { + characteristic_gatts_notify_indicate(self->handle, conn_handle, bufinfo, BLE_GATT_HVX_INDICATION); + } } } } @@ -252,7 +219,8 @@ void common_hal_bleio_characteristic_add_descriptor(bleio_characteristic_obj_t * mp_raise_OSError_msg_varg(translate("Failed to add descriptor, err 0x%04x"), err_code); } - mp_obj_list_append(self->descriptor_list, MP_OBJ_FROM_PTR(descriptor)); + descriptor->next = self->descriptor_list; + self->descriptor_list = descriptor; } void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, bool notify, bool indicate) { @@ -264,7 +232,7 @@ void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, mp_raise_ValueError(translate("Can't set CCCD on local Characteristic")); } - const uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(self->service->device); + const uint16_t conn_handle = bleio_connection_get_conn_handle(self->service->connection); common_hal_bleio_check_connected(conn_handle); uint16_t cccd_value = diff --git a/ports/nrf/common-hal/_bleio/Characteristic.h b/ports/nrf/common-hal/_bleio/Characteristic.h index 3a7691d07f..bb8f28495e 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.h +++ b/ports/nrf/common-hal/_bleio/Characteristic.h @@ -29,11 +29,12 @@ #define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTIC_H #include "shared-bindings/_bleio/Attribute.h" +#include "common-hal/_bleio/Descriptor.h" #include "shared-module/_bleio/Characteristic.h" #include "common-hal/_bleio/Service.h" #include "common-hal/_bleio/UUID.h" -typedef struct { +typedef struct _bleio_characteristic_obj { mp_obj_base_t base; // Will be MP_OBJ_NULL before being assigned to a Service. bleio_service_obj_t *service; @@ -45,7 +46,7 @@ typedef struct { bleio_characteristic_properties_t props; bleio_attribute_security_mode_t read_perm; bleio_attribute_security_mode_t write_perm; - mp_obj_list_t *descriptor_list; + bleio_descriptor_obj_t *descriptor_list; uint16_t user_desc_handle; uint16_t cccd_handle; uint16_t sccd_handle; diff --git a/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c b/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c index 95794feec0..5f280e121f 100644 --- a/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c +++ b/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c @@ -38,6 +38,7 @@ #include "tick.h" #include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Connection.h" #include "common-hal/_bleio/CharacteristicBuffer.h" STATIC void write_to_ringbuf(bleio_characteristic_buffer_obj_t *self, uint8_t *data, uint16_t len) { @@ -50,7 +51,7 @@ STATIC void write_to_ringbuf(bleio_characteristic_buffer_obj_t *self, uint8_t *d sd_nvic_critical_region_exit(is_nested_critical_region); } -STATIC void characteristic_buffer_on_ble_evt(ble_evt_t *ble_evt, void *param) { +STATIC bool characteristic_buffer_on_ble_evt(ble_evt_t *ble_evt, void *param) { bleio_characteristic_buffer_obj_t *self = (bleio_characteristic_buffer_obj_t *) param; switch (ble_evt->header.evt_id) { case BLE_GATTS_EVT_WRITE: { @@ -75,7 +76,11 @@ STATIC void characteristic_buffer_on_ble_evt(ble_evt_t *ble_evt, void *param) { } break; } + default: + return false; + break; } + return true; } // Assumes that timeout and buffer_size have been validated before call. @@ -150,6 +155,7 @@ void common_hal_bleio_characteristic_buffer_deinit(bleio_characteristic_buffer_o bool common_hal_bleio_characteristic_buffer_connected(bleio_characteristic_buffer_obj_t *self) { return self->characteristic != NULL && self->characteristic->service != NULL && - self->characteristic->service->device != NULL && - common_hal_bleio_device_get_conn_handle(self->characteristic->service->device) != BLE_CONN_HANDLE_INVALID; + (!self->characteristic->service->is_remote || + (self->characteristic->service->connection != MP_OBJ_NULL && + common_hal_bleio_connection_get_connected(self->characteristic->service->connection))); } diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c new file mode 100644 index 0000000000..5d3e3ace11 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -0,0 +1,629 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_bleio/Connection.h" + +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "ble_hci.h" +#include "nrf_soc.h" +#include "py/gc.h" +#include "py/objlist.h" +#include "py/objstr.h" +#include "py/qstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Attribute.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +#define BLE_ADV_LENGTH_FIELD_SIZE 1 +#define BLE_ADV_AD_TYPE_FIELD_SIZE 1 +#define BLE_AD_TYPE_FLAGS_DATA_SIZE 1 + +static const ble_gap_sec_params_t pairing_sec_params = { + .bond = 1, + .mitm = 0, + .lesc = 0, + .keypress = 0, + .oob = 0, + .io_caps = BLE_GAP_IO_CAPS_NONE, + .min_key_size = 7, + .max_key_size = 16, + .kdist_own = { .enc = 1, .id = 1}, + .kdist_peer = { .enc = 1, .id = 1}, +}; + +static volatile bool m_discovery_in_process; +static volatile bool m_discovery_successful; + +static bleio_service_obj_t *m_char_discovery_service; +static bleio_characteristic_obj_t *m_desc_discovery_characteristic; + +bool dump_events = false; + +bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { + bleio_connection_internal_t *self = (bleio_connection_internal_t*)self_in; + + if (BLE_GAP_EVT_BASE <= ble_evt->header.evt_id && ble_evt->header.evt_id <= BLE_GAP_EVT_LAST && + ble_evt->evt.gap_evt.conn_handle != self->conn_handle) { + return false; + } + if (BLE_GATTS_EVT_BASE <= ble_evt->header.evt_id && ble_evt->header.evt_id <= BLE_GATTS_EVT_LAST && + ble_evt->evt.gatts_evt.conn_handle != self->conn_handle) { + return false; + } + + // For debugging. + if (dump_events) { + mp_printf(&mp_plat_print, "Connection event: 0x%04x\n", ble_evt->header.evt_id); + } + + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_DISCONNECTED: + break; + case BLE_GAP_EVT_CONN_PARAM_UPDATE: // 0x12 + break; + case BLE_GAP_EVT_PHY_UPDATE_REQUEST: { + ble_gap_phys_t const phys = { + .rx_phys = BLE_GAP_PHY_AUTO, + .tx_phys = BLE_GAP_PHY_AUTO, + }; + sd_ble_gap_phy_update(ble_evt->evt.gap_evt.conn_handle, &phys); + break; + } + + case BLE_GAP_EVT_PHY_UPDATE: // 0x22 + break; + + case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST: + // SoftDevice will respond to a length update request. + sd_ble_gap_data_length_update(self->conn_handle, NULL, NULL); + break; + + case BLE_GAP_EVT_DATA_LENGTH_UPDATE: // 0x24 + break; + + case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST: { + // We only handle MTU of size BLE_GATT_ATT_MTU_DEFAULT. + sd_ble_gatts_exchange_mtu_reply(self->conn_handle, BLE_GATT_ATT_MTU_DEFAULT); + break; + } + + case BLE_GATTS_EVT_SYS_ATTR_MISSING: + sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); + break; + + case BLE_GATTS_EVT_HVN_TX_COMPLETE: // Capture this for now. 0x55 + break; + + case BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST: { + ble_gap_evt_conn_param_update_request_t *request = + &ble_evt->evt.gap_evt.params.conn_param_update_request; + sd_ble_gap_conn_param_update(self->conn_handle, &request->conn_params); + break; + } + case BLE_GAP_EVT_SEC_PARAMS_REQUEST: { + ble_gap_sec_keyset_t keyset = { + .keys_own = { + .p_enc_key = &self->bonding_keys.own_enc, + .p_id_key = NULL, + .p_sign_key = NULL, + .p_pk = NULL + }, + + .keys_peer = { + .p_enc_key = &self->bonding_keys.peer_enc, + .p_id_key = &self->bonding_keys.peer_id, + .p_sign_key = NULL, + .p_pk = NULL + } + }; + + sd_ble_gap_sec_params_reply(self->conn_handle, BLE_GAP_SEC_STATUS_SUCCESS, + &pairing_sec_params, &keyset); + break; + } + + case BLE_GAP_EVT_LESC_DHKEY_REQUEST: + // TODO for LESC pairing: + // sd_ble_gap_lesc_dhkey_reply(...); + break; + + case BLE_GAP_EVT_AUTH_STATUS: { // 0x19 + // Pairing process completed + ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; + if (BLE_GAP_SEC_STATUS_SUCCESS == status->auth_status) { + // TODO _ediv = bonding_keys->own_enc.master_id.ediv; + self->pair_status = PAIR_PAIRED; + } else { + self->pair_status = PAIR_NOT_PAIRED; + } + break; + } + + case BLE_GAP_EVT_SEC_INFO_REQUEST: { // 0x14 + // Peer asks for the stored keys. + // - load key and return if bonded previously. + // - Else return NULL --> Initiate key exchange + ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; + (void) sec_info_request; + //if ( bond_load_keys(_role, sec_req->master_id.ediv, &bkeys) ) { + //sd_ble_gap_sec_info_reply(_conn_hdl, &bkeys.own_enc.enc_info, &bkeys.peer_id.id_info, NULL); + // + //_ediv = bkeys.own_enc.master_id.ediv; + // } else { + sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); + // } + break; + } + + case BLE_GAP_EVT_CONN_SEC_UPDATE: { // 0x1a + ble_gap_conn_sec_t* conn_sec = &ble_evt->evt.gap_evt.params.conn_sec_update.conn_sec; + if (conn_sec->sec_mode.sm <= 1 && conn_sec->sec_mode.lv <= 1) { + // Security setup did not succeed: + // mode 0, level 0 means no access + // mode 1, level 1 means open link + // mode >=1 and/or level >=1 means encryption is set up + self->pair_status = PAIR_NOT_PAIRED; + } else { + //if ( !bond_load_cccd(_role, _conn_hdl, _ediv) ) { + if (true) { // TODO: no bonding yet + // Initialize system attributes fresh. + sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); + } + // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS SUCCESS. + self->ediv = self->bonding_keys.own_enc.master_id.ediv; + } + break; + } + + + default: + // For debugging. + if (dump_events) { + mp_printf(&mp_plat_print, "Unhandled connection event: 0x%04x\n", ble_evt->header.evt_id); + } + + return false; + } + return true; +} + +void bleio_connection_clear(bleio_connection_internal_t *self) { + self->remote_service_list = NULL; + + self->conn_handle = BLE_CONN_HANDLE_INVALID; + self->pair_status = PAIR_NOT_PAIRED; + + memset(&self->bonding_keys, 0, sizeof(self->bonding_keys)); +} + +bool common_hal_bleio_connection_get_connected(bleio_connection_obj_t *self) { + if (self->connection == NULL) { + return false; + } + return self->connection->conn_handle != BLE_CONN_HANDLE_INVALID; +} + +void common_hal_bleio_connection_disconnect(bleio_connection_internal_t *self) { + sd_ble_gap_disconnect(self->conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); +} + +void common_hal_bleio_connection_pair(bleio_connection_internal_t *self) { + self->pair_status = PAIR_WAITING; + + uint32_t err_code = sd_ble_gap_authenticate(self->conn_handle, &pairing_sec_params); + + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to start pairing, NRF_ERROR_%q"), MP_OBJ_QSTR_VALUE(base_error_messages[err_code - NRF_ERROR_BASE_NUM])); + } + + while (self->pair_status == PAIR_WAITING) { + RUN_BACKGROUND_TASKS; + } + + if (self->pair_status == PAIR_NOT_PAIRED) { + mp_raise_OSError_msg(translate("Failed to pair")); + } +} + + +// service_uuid may be NULL, to discover all services. +STATIC bool discover_next_services(bleio_connection_internal_t* connection, uint16_t start_handle, ble_uuid_t *service_uuid) { + m_discovery_successful = false; + m_discovery_in_process = true; + + uint32_t err_code = sd_ble_gattc_primary_services_discover(connection->conn_handle, start_handle, service_uuid); + + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg(translate("Failed to discover services")); + } + + // Wait for a discovery event. + while (m_discovery_in_process) { + MICROPY_VM_HOOK_LOOP; + } + return m_discovery_successful; +} + +STATIC bool discover_next_characteristics(bleio_connection_internal_t* connection, bleio_service_obj_t *service, uint16_t start_handle) { + m_char_discovery_service = service; + + ble_gattc_handle_range_t handle_range; + handle_range.start_handle = start_handle; + handle_range.end_handle = service->end_handle; + + m_discovery_successful = false; + m_discovery_in_process = true; + + uint32_t err_code = sd_ble_gattc_characteristics_discover(connection->conn_handle, &handle_range); + if (err_code != NRF_SUCCESS) { + return false; + } + + // Wait for a discovery event. + while (m_discovery_in_process) { + MICROPY_VM_HOOK_LOOP; + } + return m_discovery_successful; +} + +STATIC bool discover_next_descriptors(bleio_connection_internal_t* connection, bleio_characteristic_obj_t *characteristic, uint16_t start_handle, uint16_t end_handle) { + m_desc_discovery_characteristic = characteristic; + + ble_gattc_handle_range_t handle_range; + handle_range.start_handle = start_handle; + handle_range.end_handle = end_handle; + + m_discovery_successful = false; + m_discovery_in_process = true; + + uint32_t err_code = sd_ble_gattc_descriptors_discover(connection->conn_handle, &handle_range); + if (err_code != NRF_SUCCESS) { + return false; + } + + // Wait for a discovery event. + while (m_discovery_in_process) { + MICROPY_VM_HOOK_LOOP; + } + return m_discovery_successful; +} + +STATIC void on_primary_srv_discovery_rsp(ble_gattc_evt_prim_srvc_disc_rsp_t *response, bleio_connection_internal_t* connection) { + bleio_service_obj_t* tail = connection->remote_service_list; + + for (size_t i = 0; i < response->count; ++i) { + ble_gattc_service_t *gattc_service = &response->services[i]; + + bleio_service_obj_t *service = m_new_obj(bleio_service_obj_t); + service->base.type = &bleio_service_type; + + // Initialize several fields at once. + bleio_service_from_connection(service, bleio_connection_new_from_internal(connection)); + + service->is_remote = true; + service->start_handle = gattc_service->handle_range.start_handle; + service->end_handle = gattc_service->handle_range.end_handle; + service->handle = gattc_service->handle_range.start_handle; + + if (gattc_service->uuid.type != BLE_UUID_TYPE_UNKNOWN) { + // Known service UUID. + bleio_uuid_obj_t *uuid = m_new_obj(bleio_uuid_obj_t); + uuid->base.type = &bleio_uuid_type; + bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_service->uuid); + service->uuid = uuid; + } else { + // The discovery response contained a 128-bit UUID that has not yet been registered with the + // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. + // For now, just set the UUID to NULL. + service->uuid = NULL; + } + + service->next = tail; + tail = service; + } + + connection->remote_service_list = tail; + + if (response->count > 0) { + m_discovery_successful = true; + } + m_discovery_in_process = false; +} + +STATIC void on_char_discovery_rsp(ble_gattc_evt_char_disc_rsp_t *response, bleio_connection_internal_t* connection) { + for (size_t i = 0; i < response->count; ++i) { + ble_gattc_char_t *gattc_char = &response->chars[i]; + + bleio_characteristic_obj_t *characteristic = m_new_obj(bleio_characteristic_obj_t); + characteristic->base.type = &bleio_characteristic_type; + + bleio_uuid_obj_t *uuid = NULL; + + if (gattc_char->uuid.type != BLE_UUID_TYPE_UNKNOWN) { + // Known characteristic UUID. + uuid = m_new_obj(bleio_uuid_obj_t); + uuid->base.type = &bleio_uuid_type; + bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_char->uuid); + } else { + // The discovery response contained a 128-bit UUID that has not yet been registered with the + // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. + // For now, just leave the UUID as NULL. + } + + bleio_characteristic_properties_t props = + (gattc_char->char_props.broadcast ? CHAR_PROP_BROADCAST : 0) | + (gattc_char->char_props.indicate ? CHAR_PROP_INDICATE : 0) | + (gattc_char->char_props.notify ? CHAR_PROP_NOTIFY : 0) | + (gattc_char->char_props.read ? CHAR_PROP_READ : 0) | + (gattc_char->char_props.write ? CHAR_PROP_WRITE : 0) | + (gattc_char->char_props.write_wo_resp ? CHAR_PROP_WRITE_NO_RESPONSE : 0); + + // Call common_hal_bleio_characteristic_construct() to initalize some fields and set up evt handler. + common_hal_bleio_characteristic_construct( + characteristic, m_char_discovery_service, gattc_char->handle_value, uuid, + props, SECURITY_MODE_OPEN, SECURITY_MODE_OPEN, + GATT_MAX_DATA_LENGTH, false, // max_length, fixed_length: values may not matter for gattc + NULL); + + mp_obj_list_append(m_char_discovery_service->characteristic_list, MP_OBJ_FROM_PTR(characteristic)); + } + + if (response->count > 0) { + m_discovery_successful = true; + } + m_discovery_in_process = false; +} + +STATIC void on_desc_discovery_rsp(ble_gattc_evt_desc_disc_rsp_t *response, bleio_connection_internal_t* connection) { + for (size_t i = 0; i < response->count; ++i) { + ble_gattc_desc_t *gattc_desc = &response->descs[i]; + + // Remember handles for certain well-known descriptors. + switch (gattc_desc->uuid.uuid) { + case BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG: + m_desc_discovery_characteristic->cccd_handle = gattc_desc->handle; + break; + + case BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG: + m_desc_discovery_characteristic->sccd_handle = gattc_desc->handle; + break; + + case BLE_UUID_DESCRIPTOR_CHAR_USER_DESC: + m_desc_discovery_characteristic->user_desc_handle = gattc_desc->handle; + break; + + default: + // TODO: sd_ble_gattc_descriptors_discover() can return things that are not descriptors, + // so ignore those. + // https://devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors + break; + } + + bleio_descriptor_obj_t *descriptor = m_new_obj(bleio_descriptor_obj_t); + descriptor->base.type = &bleio_descriptor_type; + + bleio_uuid_obj_t *uuid = NULL; + + if (gattc_desc->uuid.type != BLE_UUID_TYPE_UNKNOWN) { + // Known descriptor UUID. + uuid = m_new_obj(bleio_uuid_obj_t); + uuid->base.type = &bleio_uuid_type; + bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_desc->uuid); + } else { + // The discovery response contained a 128-bit UUID that has not yet been registered with the + // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. + // For now, just leave the UUID as NULL. + } + + common_hal_bleio_descriptor_construct( + descriptor, m_desc_discovery_characteristic, uuid, + SECURITY_MODE_OPEN, SECURITY_MODE_OPEN, + GATT_MAX_DATA_LENGTH, false, mp_const_empty_bytes); + descriptor->handle = gattc_desc->handle; + + mp_obj_list_append(m_desc_discovery_characteristic->descriptor_list, MP_OBJ_FROM_PTR(descriptor)); + } + + if (response->count > 0) { + m_discovery_successful = true; + } + m_discovery_in_process = false; +} + +STATIC bool discovery_on_ble_evt(ble_evt_t *ble_evt, mp_obj_t payload) { + bleio_connection_internal_t* connection = MP_OBJ_TO_PTR(payload); + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_DISCONNECTED: + m_discovery_successful = false; + m_discovery_in_process = false; + break; + + case BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP: + on_primary_srv_discovery_rsp(&ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp, connection); + break; + + case BLE_GATTC_EVT_CHAR_DISC_RSP: + on_char_discovery_rsp(&ble_evt->evt.gattc_evt.params.char_disc_rsp, connection); + break; + + case BLE_GATTC_EVT_DESC_DISC_RSP: + on_desc_discovery_rsp(&ble_evt->evt.gattc_evt.params.desc_disc_rsp, connection); + break; + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled discovery event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +STATIC void discover_remote_services(bleio_connection_internal_t *self, mp_obj_t service_uuids_whitelist) { + ble_drv_add_event_handler(discovery_on_ble_evt, self); + + // Start over with an empty list. + self->remote_service_list = NULL; + + if (service_uuids_whitelist == mp_const_none) { + // List of service UUID's not given, so discover all available services. + + uint16_t next_service_start_handle = BLE_GATT_HANDLE_START; + + while (discover_next_services(self, next_service_start_handle, MP_OBJ_NULL)) { + // discover_next_services() appends to remote_services_list. + + // Get the most recently discovered service, and then ask for services + // whose handles start after the last attribute handle inside that service. + const bleio_service_obj_t *service = self->remote_service_list; + next_service_start_handle = service->end_handle + 1; + } + } else { + mp_obj_iter_buf_t iter_buf; + mp_obj_t iterable = mp_getiter(service_uuids_whitelist, &iter_buf); + mp_obj_t uuid_obj; + while ((uuid_obj = mp_iternext(iterable)) != MP_OBJ_STOP_ITERATION) { + if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { + mp_raise_ValueError(translate("non-UUID found in service_uuids_whitelist")); + } + bleio_uuid_obj_t *uuid = MP_OBJ_TO_PTR(uuid_obj); + + ble_uuid_t nrf_uuid; + bleio_uuid_convert_to_nrf_ble_uuid(uuid, &nrf_uuid); + + // Service might or might not be discovered; that's ok. Caller has to check + // Central.remote_services to find out. + // We only need to call this once for each service to discover. + discover_next_services(self, BLE_GATT_HANDLE_START, &nrf_uuid); + } + } + + + bleio_service_obj_t *service = self->remote_service_list; + while (service != NULL) { + // Skip the service if it had an unknown (unregistered) UUID. + if (service->uuid == NULL) { + service = service->next; + continue; + } + + uint16_t next_char_start_handle = service->start_handle; + + // Stop when we go past the end of the range of handles for this service or + // discovery call returns nothing. + // discover_next_characteristics() appends to the characteristic_list. + while (next_char_start_handle <= service->end_handle && + discover_next_characteristics(self, service, next_char_start_handle)) { + + + // Get the most recently discovered characteristic, and then ask for characteristics + // whose handles start after the last attribute handle inside that characteristic. + const bleio_characteristic_obj_t *characteristic = + MP_OBJ_TO_PTR(service->characteristic_list->items[service->characteristic_list->len - 1]); + + next_char_start_handle = characteristic->handle + 1; + } + + // Got characteristics for this service. Now discover descriptors for each characteristic. + size_t char_list_len = service->characteristic_list->len; + for (size_t char_idx = 0; char_idx < char_list_len; ++char_idx) { + bleio_characteristic_obj_t *characteristic = + MP_OBJ_TO_PTR(service->characteristic_list->items[char_idx]); + const bool last_characteristic = char_idx == char_list_len - 1; + bleio_characteristic_obj_t *next_characteristic = last_characteristic + ? NULL + : MP_OBJ_TO_PTR(service->characteristic_list->items[char_idx + 1]); + + // Skip the characteristic if it had an unknown (unregistered) UUID. + if (characteristic->uuid == NULL) { + continue; + } + + uint16_t next_desc_start_handle = characteristic->handle + 1; + + // Don't run past the end of this service or the beginning of the next characteristic. + uint16_t next_desc_end_handle = next_characteristic == NULL + ? service->end_handle + : next_characteristic->handle - 1; + + // Stop when we go past the end of the range of handles for this service or + // discovery call returns nothing. + // discover_next_descriptors() appends to the descriptor_list. + while (next_desc_start_handle <= service->end_handle && + next_desc_start_handle < next_desc_end_handle && + discover_next_descriptors(self, characteristic, + next_desc_start_handle, next_desc_end_handle)) { + + // Get the most recently discovered descriptor, and then ask for descriptors + // whose handles start after that descriptor's handle. + const bleio_descriptor_obj_t *descriptor = characteristic->descriptor_list; + next_desc_start_handle = descriptor->handle + 1; + } + } + service = service->next; + } + + // This event handler is no longer needed. + ble_drv_remove_event_handler(discovery_on_ble_evt, self); + +} +mp_obj_tuple_t *common_hal_bleio_connection_discover_remote_services(bleio_connection_obj_t *self, mp_obj_t service_uuids_whitelist) { + discover_remote_services(self->connection, service_uuids_whitelist); + // Convert to a tuple and then clear the list so the callee will take ownership. + mp_obj_tuple_t *services_tuple = service_linked_list_to_tuple(self->connection->remote_service_list); + self->connection->remote_service_list = NULL; + + return services_tuple; +} + + +uint16_t bleio_connection_get_conn_handle(bleio_connection_obj_t *self) { + if (self == NULL || self->connection == NULL) { + return BLE_CONN_HANDLE_INVALID; + } + return self->connection->conn_handle; +} + +mp_obj_t bleio_connection_new_from_internal(bleio_connection_internal_t* internal) { + if (internal->connection_obj != mp_const_none) { + return internal->connection_obj; + } + bleio_connection_obj_t *connection = m_new_obj(bleio_connection_obj_t); + connection->base.type = &bleio_connection_type; + connection->connection = internal; + internal->connection_obj = connection; + + return MP_OBJ_FROM_PTR(connection); +} diff --git a/ports/nrf/common-hal/_bleio/Peripheral.h b/ports/nrf/common-hal/_bleio/Connection.h similarity index 67% rename from ports/nrf/common-hal/_bleio/Peripheral.h rename to ports/nrf/common-hal/_bleio/Connection.h index a4f62d288a..2d4aad0c8d 100644 --- a/ports/nrf/common-hal/_bleio/Peripheral.h +++ b/ports/nrf/common-hal/_bleio/Connection.h @@ -25,8 +25,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PERIPHERAL_H -#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PERIPHERAL_H +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CONNECTION_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CONNECTION_H #include @@ -37,6 +37,7 @@ #include "common-hal/_bleio/__init__.h" #include "shared-module/_bleio/Address.h" +#include "common-hal/_bleio/Service.h" typedef enum { PAIR_NOT_PAIRED, @@ -44,24 +45,35 @@ typedef enum { PAIR_PAIRED, } pair_status_t; +// We split the Connection object into two so that the internal mechanics can live outside of the +// VM. If it were one object, then we'd risk user code seeing a connection object of theirs be +// reused. typedef struct { - mp_obj_base_t base; - mp_obj_t name; - volatile uint16_t conn_handle; - // Services provided by this peripheral. - mp_obj_list_t *service_list; + uint16_t conn_handle; + bool is_central; // Remote services discovered when this peripheral is acting as a client. - mp_obj_list_t *remote_service_list; + bleio_service_obj_t *remote_service_list; // The advertising data and scan response buffers are held by us, not by the SD, so we must // maintain them and not change it. If we need to change the contents during advertising, // there are tricks to get the SD to notice (see DevZone - TBS). // EDIV: Encrypted Diversifier: Identifies LTK during legacy pairing. bonding_keys_t bonding_keys; uint16_t ediv; - uint8_t* advertising_data; - uint8_t* scan_response_data; - uint8_t adv_handle; pair_status_t pair_status; -} bleio_peripheral_obj_t; + mp_obj_t connection_obj; + ble_drv_evt_handler_entry_t handler_entry; +} bleio_connection_internal_t; -#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PERIPHERAL_H +typedef struct { + mp_obj_base_t base; + bleio_connection_internal_t* connection; + // The HCI disconnect reason. + uint8_t disconnect_reason; +} bleio_connection_obj_t; + +bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in); + +uint16_t bleio_connection_get_conn_handle(bleio_connection_obj_t *self); +mp_obj_t bleio_connection_new_from_internal(bleio_connection_internal_t* connection); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CONNECTION_H diff --git a/ports/nrf/common-hal/_bleio/Descriptor.c b/ports/nrf/common-hal/_bleio/Descriptor.c index 137f004bab..faf50c658c 100644 --- a/ports/nrf/common-hal/_bleio/Descriptor.c +++ b/ports/nrf/common-hal/_bleio/Descriptor.c @@ -33,8 +33,6 @@ #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/UUID.h" -static volatile bleio_descriptor_obj_t *m_read_descriptor; - void common_hal_bleio_descriptor_construct(bleio_descriptor_obj_t *self, bleio_characteristic_obj_t *characteristic, bleio_uuid_obj_t *uuid, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { self->characteristic = characteristic; self->uuid = uuid; @@ -61,62 +59,18 @@ bleio_characteristic_obj_t *common_hal_bleio_descriptor_get_characteristic(bleio return self->characteristic; } -STATIC void descriptor_on_gattc_read_rsp_evt(ble_evt_t *ble_evt, void *param) { - switch (ble_evt->header.evt_id) { - - // More events may be handled later, so keep this as a switch. - - case BLE_GATTC_EVT_READ_RSP: { - ble_gattc_evt_read_rsp_t *response = &ble_evt->evt.gattc_evt.params.read_rsp; - if (m_read_descriptor) { - m_read_descriptor->value = mp_obj_new_bytearray(response->len, response->data); - } - // Indicate to busy-wait loop that we've read the attribute value. - m_read_descriptor = NULL; - break; - } - - default: - // For debugging. - // mp_printf(&mp_plat_print, "Unhandled descriptor event: 0x%04x\n", ble_evt->header.evt_id); - break; - } -} - -STATIC void descriptor_gattc_read(bleio_descriptor_obj_t *descriptor) { - const uint16_t conn_handle = - common_hal_bleio_device_get_conn_handle(descriptor->characteristic->service->device); - common_hal_bleio_check_connected(conn_handle); - - // Set to NULL in event loop after event. - m_read_descriptor = descriptor; - - ble_drv_add_event_handler(descriptor_on_gattc_read_rsp_evt, descriptor); - - const uint32_t err_code = sd_ble_gattc_read(conn_handle, descriptor->handle, 0); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to read attribute value, err 0x%04x"), err_code); - } - - while (m_read_descriptor != NULL) { - MICROPY_VM_HOOK_LOOP; - } - - ble_drv_remove_event_handler(descriptor_on_gattc_read_rsp_evt, descriptor); -} - -mp_obj_t common_hal_bleio_descriptor_get_value(bleio_descriptor_obj_t *self) { +size_t common_hal_bleio_descriptor_get_value(bleio_descriptor_obj_t *self, uint8_t* buf, size_t len) { // Do GATT operations only if this descriptor has been registered if (self->handle != BLE_GATT_HANDLE_INVALID) { + uint16_t conn_handle = bleio_connection_get_conn_handle(self->characteristic->service->connection); if (common_hal_bleio_service_get_is_remote(self->characteristic->service)) { - descriptor_gattc_read(self); + return common_hal_bleio_gattc_read(self->handle, conn_handle, buf, len); } else { - self->value = common_hal_bleio_gatts_read( - self->handle, common_hal_bleio_device_get_conn_handle(self->characteristic->service->device)); + return common_hal_bleio_gatts_read(self->handle, conn_handle, buf, len); } } - return self->value; + return 0; } void common_hal_bleio_descriptor_set_value(bleio_descriptor_obj_t *self, mp_buffer_info_t *bufinfo) { @@ -131,7 +85,7 @@ void common_hal_bleio_descriptor_set_value(bleio_descriptor_obj_t *self, mp_buff // Do GATT operations only if this descriptor has been registered. if (self->handle != BLE_GATT_HANDLE_INVALID) { - uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(self->characteristic->service->device); + uint16_t conn_handle = bleio_connection_get_conn_handle(self->characteristic->service->connection); if (common_hal_bleio_service_get_is_remote(self->characteristic->service)) { // false means WRITE_REQ, not write-no-response common_hal_bleio_gattc_write(self->handle, conn_handle, bufinfo, false); diff --git a/ports/nrf/common-hal/_bleio/Descriptor.h b/ports/nrf/common-hal/_bleio/Descriptor.h index 3adb0df184..c70547c08e 100644 --- a/ports/nrf/common-hal/_bleio/Descriptor.h +++ b/ports/nrf/common-hal/_bleio/Descriptor.h @@ -31,13 +31,15 @@ #include "py/obj.h" -#include "common-hal/_bleio/Characteristic.h" #include "common-hal/_bleio/UUID.h" -typedef struct { +// Forward declare characteristic because it includes a Descriptor. +struct _bleio_characteristic_obj; + +typedef struct _bleio_descriptor_obj { mp_obj_base_t base; // Will be MP_OBJ_NULL before being assigned to a Characteristic. - bleio_characteristic_obj_t *characteristic; + struct _bleio_characteristic_obj *characteristic; bleio_uuid_obj_t *uuid; mp_obj_t value; uint16_t max_length; @@ -45,6 +47,7 @@ typedef struct { uint16_t handle; bleio_attribute_security_mode_t read_perm; bleio_attribute_security_mode_t write_perm; + struct _bleio_descriptor_obj* next; } bleio_descriptor_obj_t; #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_DESCRIPTOR_H diff --git a/ports/nrf/common-hal/_bleio/Peripheral.c b/ports/nrf/common-hal/_bleio/Peripheral.c deleted file mode 100644 index 9b0f96d48f..0000000000 --- a/ports/nrf/common-hal/_bleio/Peripheral.c +++ /dev/null @@ -1,361 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "ble.h" -#include "ble_drv.h" -#include "ble_hci.h" -#include "nrf_soc.h" -#include "py/gc.h" -#include "py/objlist.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "shared-bindings/_bleio/__init__.h" -#include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/_bleio/Attribute.h" -#include "shared-bindings/_bleio/Characteristic.h" -#include "shared-bindings/_bleio/Peripheral.h" -#include "shared-bindings/_bleio/Service.h" -#include "shared-bindings/_bleio/UUID.h" - -#define BLE_ADV_LENGTH_FIELD_SIZE 1 -#define BLE_ADV_AD_TYPE_FIELD_SIZE 1 -#define BLE_AD_TYPE_FLAGS_DATA_SIZE 1 - -static const ble_gap_sec_params_t pairing_sec_params = { - .bond = 1, - .mitm = 0, - .lesc = 0, - .keypress = 0, - .oob = 0, - .io_caps = BLE_GAP_IO_CAPS_NONE, - .min_key_size = 7, - .max_key_size = 16, - .kdist_own = { .enc = 1, .id = 1}, - .kdist_peer = { .enc = 1, .id = 1}, -}; - -STATIC void check_data_fit(size_t data_len) { - if (data_len > BLE_GAP_ADV_SET_DATA_SIZE_MAX) { - mp_raise_ValueError(translate("Data too large for advertisement packet")); - } -} - -STATIC void peripheral_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { - bleio_peripheral_obj_t *self = (bleio_peripheral_obj_t*)self_in; - - // For debugging. - // mp_printf(&mp_plat_print, "Peripheral event: 0x%04x\n", ble_evt->header.evt_id); - - switch (ble_evt->header.evt_id) { - case BLE_GAP_EVT_CONNECTED: { - // Central has connected. - ble_gap_evt_connected_t* connected = &ble_evt->evt.gap_evt.params.connected; - - self->conn_handle = ble_evt->evt.gap_evt.conn_handle; - - // See if connection interval set by Central is out of range. - // If so, negotiate our preferred range. - ble_gap_conn_params_t conn_params; - sd_ble_gap_ppcp_get(&conn_params); - if (conn_params.min_conn_interval < connected->conn_params.min_conn_interval || - conn_params.min_conn_interval > connected->conn_params.max_conn_interval) { - sd_ble_gap_conn_param_update(ble_evt->evt.gap_evt.conn_handle, &conn_params); - } - break; - } - - case BLE_GAP_EVT_DISCONNECTED: - // Central has disconnected. - self->conn_handle = BLE_CONN_HANDLE_INVALID; - break; - - case BLE_GAP_EVT_PHY_UPDATE_REQUEST: { - ble_gap_phys_t const phys = { - .rx_phys = BLE_GAP_PHY_AUTO, - .tx_phys = BLE_GAP_PHY_AUTO, - }; - sd_ble_gap_phy_update(ble_evt->evt.gap_evt.conn_handle, &phys); - break; - } - - case BLE_GAP_EVT_ADV_SET_TERMINATED: - // TODO: Someday may handle timeouts or limit reached. - break; - - case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST: - // SoftDevice will respond to a length update request. - sd_ble_gap_data_length_update(self->conn_handle, NULL, NULL); - break; - - case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST: { - // We only handle MTU of size BLE_GATT_ATT_MTU_DEFAULT. - sd_ble_gatts_exchange_mtu_reply(self->conn_handle, BLE_GATT_ATT_MTU_DEFAULT); - break; - } - - case BLE_GATTS_EVT_SYS_ATTR_MISSING: - sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); - break; - - case BLE_GAP_EVT_SEC_PARAMS_REQUEST: { - ble_gap_sec_keyset_t keyset = { - .keys_own = { - .p_enc_key = &self->bonding_keys.own_enc, - .p_id_key = NULL, - .p_sign_key = NULL, - .p_pk = NULL - }, - - .keys_peer = { - .p_enc_key = &self->bonding_keys.peer_enc, - .p_id_key = &self->bonding_keys.peer_id, - .p_sign_key = NULL, - .p_pk = NULL - } - }; - - sd_ble_gap_sec_params_reply(self->conn_handle, BLE_GAP_SEC_STATUS_SUCCESS, - &pairing_sec_params, &keyset); - break; - } - - case BLE_GAP_EVT_LESC_DHKEY_REQUEST: - // TODO for LESC pairing: - // sd_ble_gap_lesc_dhkey_reply(...); - break; - - case BLE_GAP_EVT_AUTH_STATUS: { - // Pairing process completed - ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; - if (BLE_GAP_SEC_STATUS_SUCCESS == status->auth_status) { - // TODO _ediv = bonding_keys->own_enc.master_id.ediv; - self->pair_status = PAIR_PAIRED; - } else { - self->pair_status = PAIR_NOT_PAIRED; - } - break; - } - - case BLE_GAP_EVT_SEC_INFO_REQUEST: { - // Peer asks for the stored keys. - // - load key and return if bonded previously. - // - Else return NULL --> Initiate key exchange - ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; - (void) sec_info_request; - //if ( bond_load_keys(_role, sec_req->master_id.ediv, &bkeys) ) { - //sd_ble_gap_sec_info_reply(_conn_hdl, &bkeys.own_enc.enc_info, &bkeys.peer_id.id_info, NULL); - // - //_ediv = bkeys.own_enc.master_id.ediv; - // } else { - sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); - // } - break; - } - - case BLE_GAP_EVT_CONN_SEC_UPDATE: { - ble_gap_conn_sec_t* conn_sec = &ble_evt->evt.gap_evt.params.conn_sec_update.conn_sec; - if (conn_sec->sec_mode.sm <= 1 && conn_sec->sec_mode.lv <= 1) { - // Security setup did not succeed: - // mode 0, level 0 means no access - // mode 1, level 1 means open link - // mode >=1 and/or level >=1 means encryption is set up - self->pair_status = PAIR_NOT_PAIRED; - } else { - //if ( !bond_load_cccd(_role, _conn_hdl, _ediv) ) { - if (true) { // TODO: no bonding yet - // Initialize system attributes fresh. - sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); - } - // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS SUCCESS. - self->ediv = self->bonding_keys.own_enc.master_id.ediv; - } - break; - } - - - default: - // For debugging. - // mp_printf(&mp_plat_print, "Unhandled peripheral event: 0x%04x\n", ble_evt->header.evt_id); - break; - } -} - -void common_hal_bleio_peripheral_construct(bleio_peripheral_obj_t *self, mp_obj_t name) { - common_hal_bleio_adapter_set_enabled(true); - - self->service_list = mp_obj_new_list(0, NULL); - // Used only for discovery when acting as a client. - self->remote_service_list = mp_obj_new_list(0, NULL); - self->name = name; - - self->conn_handle = BLE_CONN_HANDLE_INVALID; - self->adv_handle = BLE_GAP_ADV_SET_HANDLE_NOT_SET; - self->pair_status = PAIR_NOT_PAIRED; - - memset(&self->bonding_keys, 0, sizeof(self->bonding_keys)); -} - -void common_hal_bleio_peripheral_add_service(bleio_peripheral_obj_t *self, bleio_service_obj_t *service) { - ble_uuid_t uuid; - bleio_uuid_convert_to_nrf_ble_uuid(service->uuid, &uuid); - - uint8_t service_type = BLE_GATTS_SRVC_TYPE_PRIMARY; - if (common_hal_bleio_service_get_is_secondary(service)) { - service_type = BLE_GATTS_SRVC_TYPE_SECONDARY; - } - - const uint32_t err_code = sd_ble_gatts_service_add(service_type, &uuid, &service->handle); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to add service, err 0x%04x"), err_code); - } - - mp_obj_list_append(self->service_list, MP_OBJ_FROM_PTR(service)); -} - -mp_obj_list_t *common_hal_bleio_peripheral_get_services(bleio_peripheral_obj_t *self) { - return self->service_list; -} - -bool common_hal_bleio_peripheral_get_connected(bleio_peripheral_obj_t *self) { - return self->conn_handle != BLE_CONN_HANDLE_INVALID; -} - -mp_obj_t common_hal_bleio_peripheral_get_name(bleio_peripheral_obj_t *self) { - return self->name; -} - -void common_hal_bleio_peripheral_start_advertising(bleio_peripheral_obj_t *self, bool connectable, mp_float_t interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo) { - - // interval value has already been validated. - - if (connectable) { - ble_drv_add_event_handler(peripheral_on_ble_evt, self); - } - - common_hal_bleio_adapter_set_enabled(true); - - uint32_t err_code; - - GET_STR_DATA_LEN(self->name, name_data, name_len); - if (name_len > 0) { - // Set device name, and make it available to anyone. - ble_gap_conn_sec_mode_t sec_mode; - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode); - err_code = sd_ble_gap_device_name_set(&sec_mode, name_data, name_len); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to set device name, err 0x%04x"), err_code); - - } - } - - check_data_fit(advertising_data_bufinfo->len); - // The advertising data buffers must not move, because the SoftDevice depends on them. - // So make them long-lived. - self->advertising_data = (uint8_t *) gc_alloc(BLE_GAP_ADV_SET_DATA_SIZE_MAX * sizeof(uint8_t), false, true); - memcpy(self->advertising_data, advertising_data_bufinfo->buf, advertising_data_bufinfo->len); - - check_data_fit(scan_response_data_bufinfo->len); - self->scan_response_data = (uint8_t *) gc_alloc(BLE_GAP_ADV_SET_DATA_SIZE_MAX * sizeof(uint8_t), false, true); - memcpy(self->scan_response_data, scan_response_data_bufinfo->buf, scan_response_data_bufinfo->len); - - - ble_gap_adv_params_t adv_params = { - .interval = SEC_TO_UNITS(interval, UNIT_0_625_MS), - .properties.type = connectable ? BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED - : BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED, - .duration = BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED, - .filter_policy = BLE_GAP_ADV_FP_ANY, - .primary_phy = BLE_GAP_PHY_1MBPS, - }; - - common_hal_bleio_peripheral_stop_advertising(self); - - const ble_gap_adv_data_t ble_gap_adv_data = { - .adv_data.p_data = self->advertising_data, - .adv_data.len = advertising_data_bufinfo->len, - .scan_rsp_data.p_data = scan_response_data_bufinfo-> len > 0 ? self->scan_response_data : NULL, - .scan_rsp_data.len = scan_response_data_bufinfo->len, - }; - - err_code = sd_ble_gap_adv_set_configure(&self->adv_handle, &ble_gap_adv_data, &adv_params); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to configure advertising, err 0x%04x"), err_code); - } - - err_code = sd_ble_gap_adv_start(self->adv_handle, BLE_CONN_CFG_TAG_CUSTOM); - - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to start advertising, err 0x%04x"), err_code); - } -} - -void common_hal_bleio_peripheral_stop_advertising(bleio_peripheral_obj_t *self) { - if (self->adv_handle == BLE_GAP_ADV_SET_HANDLE_NOT_SET) - return; - - const uint32_t err_code = sd_ble_gap_adv_stop(self->adv_handle); - - if ((err_code != NRF_SUCCESS) && (err_code != NRF_ERROR_INVALID_STATE)) { - mp_raise_OSError_msg_varg(translate("Failed to stop advertising, err 0x%04x"), err_code); - } -} - -void common_hal_bleio_peripheral_disconnect(bleio_peripheral_obj_t *self) { - sd_ble_gap_disconnect(self->conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); -} - -mp_obj_tuple_t *common_hal_bleio_peripheral_discover_remote_services(bleio_peripheral_obj_t *self, mp_obj_t service_uuids_whitelist) { - common_hal_bleio_device_discover_remote_services(MP_OBJ_FROM_PTR(self), service_uuids_whitelist); - // Convert to a tuple and then clear the list so the callee will take ownership. - mp_obj_tuple_t *services_tuple = mp_obj_new_tuple(self->remote_service_list->len, - self->remote_service_list->items); - mp_obj_list_clear(self->remote_service_list); - return services_tuple; -} - -void common_hal_bleio_peripheral_pair(bleio_peripheral_obj_t *self) { - self->pair_status = PAIR_WAITING; - - uint32_t err_code = sd_ble_gap_authenticate(self->conn_handle, &pairing_sec_params); - - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to start pairing, error 0x%04x"), err_code); - } - - while (self->pair_status == PAIR_WAITING) { - RUN_BACKGROUND_TASKS; - } - - if (self->pair_status == PAIR_NOT_PAIRED) { - mp_raise_OSError_msg(translate("Failed to pair")); - } - - -} diff --git a/ports/nrf/common-hal/_bleio/Scanner.c b/ports/nrf/common-hal/_bleio/Scanner.c deleted file mode 100644 index ec73f7eb8f..0000000000 --- a/ports/nrf/common-hal/_bleio/Scanner.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "ble_drv.h" -#include "ble_gap.h" -#include "py/mphal.h" -#include "py/objlist.h" -#include "py/runtime.h" -#include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/_bleio/ScanEntry.h" -#include "shared-bindings/_bleio/Scanner.h" -#include "shared-module/_bleio/ScanEntry.h" - -static uint8_t m_scan_buffer_data[BLE_GAP_SCAN_BUFFER_MIN]; - -static ble_data_t m_scan_buffer = { - m_scan_buffer_data, - BLE_GAP_SCAN_BUFFER_MIN -}; - -STATIC void scanner_on_ble_evt(ble_evt_t *ble_evt, void *scanner_in) { - bleio_scanner_obj_t *scanner = (bleio_scanner_obj_t*)scanner_in; - ble_gap_evt_adv_report_t *report = &ble_evt->evt.gap_evt.params.adv_report; - - if (ble_evt->header.evt_id != BLE_GAP_EVT_ADV_REPORT) { - return; - } - - bleio_scanentry_obj_t *entry = m_new_obj(bleio_scanentry_obj_t); - entry->base.type = &bleio_scanentry_type; - entry->rssi = report->rssi; - - bleio_address_obj_t *address = m_new_obj(bleio_address_obj_t); - address->base.type = &bleio_address_type; - common_hal_bleio_address_construct(MP_OBJ_TO_PTR(address), - report->peer_addr.addr, report->peer_addr.addr_type); - entry->address = address; - - entry->data = mp_obj_new_bytes(report->data.p_data, report->data.len); - - mp_obj_list_append(scanner->scan_entries, MP_OBJ_FROM_PTR(entry)); - - const uint32_t err_code = sd_ble_gap_scan_start(NULL, &m_scan_buffer); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to continue scanning, err 0x%04x"), err_code); - } -} - -void common_hal_bleio_scanner_construct(bleio_scanner_obj_t *self) { -} - -mp_obj_t common_hal_bleio_scanner_scan(bleio_scanner_obj_t *self, mp_float_t timeout, mp_float_t interval, mp_float_t window) { - common_hal_bleio_adapter_set_enabled(true); - ble_drv_add_event_handler(scanner_on_ble_evt, self); - - ble_gap_scan_params_t scan_params = { - .interval = SEC_TO_UNITS(interval, UNIT_0_625_MS), - .window = SEC_TO_UNITS(window, UNIT_0_625_MS), - .scan_phys = BLE_GAP_PHY_1MBPS, - }; - - self->scan_entries = mp_obj_new_list(0, NULL); - - uint32_t err_code; - err_code = sd_ble_gap_scan_start(&scan_params, &m_scan_buffer); - - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to start scanning, err 0x%04x"), err_code); - } - - mp_hal_delay_ms(timeout * 1000); - sd_ble_gap_scan_stop(); - - // Return list, and don't hang on to it, so it can be GC'd. - mp_obj_t entries = self->scan_entries; - self->scan_entries = MP_OBJ_NULL; - return entries; -} diff --git a/ports/nrf/common-hal/_bleio/Service.c b/ports/nrf/common-hal/_bleio/Service.c index 650cdc4ec9..3362ed1373 100644 --- a/ports/nrf/common-hal/_bleio/Service.c +++ b/ports/nrf/common-hal/_bleio/Service.c @@ -31,17 +31,44 @@ #include "common-hal/_bleio/__init__.h" #include "shared-bindings/_bleio/Characteristic.h" #include "shared-bindings/_bleio/Descriptor.h" -#include "shared-bindings/_bleio/Peripheral.h" #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/Adapter.h" -void common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_peripheral_obj_t *peripheral, bleio_uuid_obj_t *uuid, bool is_secondary) { - self->device = MP_OBJ_FROM_PTR(peripheral); +uint32_t _common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary, mp_obj_list_t * characteristic_list) { self->handle = 0xFFFF; self->uuid = uuid; - self->characteristic_list = mp_obj_new_list(0, NULL); + self->characteristic_list = characteristic_list; self->is_remote = false; + self->connection = NULL; self->is_secondary = is_secondary; + + ble_uuid_t nordic_uuid; + bleio_uuid_convert_to_nrf_ble_uuid(uuid, &nordic_uuid); + + uint8_t service_type = BLE_GATTS_SRVC_TYPE_PRIMARY; + if (is_secondary) { + service_type = BLE_GATTS_SRVC_TYPE_SECONDARY; + } + + vm_used_ble = true; + + return sd_ble_gatts_service_add(service_type, &nordic_uuid, &self->handle); +} + +void common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary) { + const uint32_t err_code = _common_hal_bleio_service_construct(self, uuid, is_secondary, mp_obj_new_list(0, NULL)); + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to create service, NRF_ERROR_%q"), MP_OBJ_QSTR_VALUE(base_error_messages[err_code - NRF_ERROR_BASE_NUM])); + } +} + +void bleio_service_from_connection(bleio_service_obj_t *self, mp_obj_t connection) { + self->handle = 0xFFFF; + self->uuid = NULL; + self->characteristic_list = mp_obj_new_list(0, NULL); + self->is_remote = true; + self->is_secondary = false; + self->connection = connection; } bleio_uuid_obj_t *common_hal_bleio_service_get_uuid(bleio_service_obj_t *self) { @@ -60,7 +87,9 @@ bool common_hal_bleio_service_get_is_secondary(bleio_service_obj_t *self) { return self->is_secondary; } -void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, bleio_characteristic_obj_t *characteristic) { +void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, + bleio_characteristic_obj_t *characteristic, + mp_buffer_info_t *initial_value_bufinfo) { ble_gatts_char_md_t char_md = { .char_props.broadcast = (characteristic->props & CHAR_PROP_BROADCAST) ? 1 : 0, .char_props.read = (characteristic->props & CHAR_PROP_READ) ? 1 : 0, @@ -93,14 +122,11 @@ void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, blei bleio_attribute_gatts_set_security_mode(&char_attr_md.read_perm, characteristic->read_perm); bleio_attribute_gatts_set_security_mode(&char_attr_md.write_perm, characteristic->write_perm); - mp_buffer_info_t char_value_bufinfo; - mp_get_buffer_raise(characteristic->value, &char_value_bufinfo, MP_BUFFER_READ); - ble_gatts_attr_t char_attr = { .p_uuid = &char_uuid, .p_attr_md = &char_attr_md, - .init_len = char_value_bufinfo.len, - .p_value = char_value_bufinfo.buf, + .init_len = 0, + .p_value = NULL, .init_offs = 0, .max_len = characteristic->max_length, }; @@ -110,7 +136,7 @@ void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, blei uint32_t err_code; err_code = sd_ble_gatts_characteristic_add(self->handle, &char_md, &char_attr, &char_handles); if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to add characteristic, err 0x%04x"), err_code); + mp_raise_OSError_msg_varg(translate("Failed to add characteristic, NRF_ERROR_%q"), MP_OBJ_QSTR_VALUE(base_error_messages[err_code - NRF_ERROR_BASE_NUM])); } characteristic->user_desc_handle = char_handles.user_desc_handle; diff --git a/ports/nrf/common-hal/_bleio/Service.h b/ports/nrf/common-hal/_bleio/Service.h index a4614b9f51..f101bc825b 100644 --- a/ports/nrf/common-hal/_bleio/Service.h +++ b/ports/nrf/common-hal/_bleio/Service.h @@ -31,20 +31,22 @@ #include "py/objlist.h" #include "common-hal/_bleio/UUID.h" -typedef struct { +typedef struct bleio_service_obj { mp_obj_base_t base; - // Handle for this service. + // Handle for the local service. uint16_t handle; // True if created during discovery. bool is_remote; bool is_secondary; bleio_uuid_obj_t *uuid; - // May be a Peripheral, Central, etc. - mp_obj_t device; + mp_obj_t connection; mp_obj_list_t *characteristic_list; - // Range of attribute handles of this service. + // Range of attribute handles of this remote service. uint16_t start_handle; uint16_t end_handle; + struct bleio_service_obj* next; } bleio_service_obj_t; +void bleio_service_from_connection(bleio_service_obj_t *self, mp_obj_t connection); + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SERVICE_H diff --git a/ports/nrf/common-hal/_bleio/UUID.c b/ports/nrf/common-hal/_bleio/UUID.c index 0e65b7d58d..5bf35e6a54 100644 --- a/ports/nrf/common-hal/_bleio/UUID.c +++ b/ports/nrf/common-hal/_bleio/UUID.c @@ -30,6 +30,7 @@ #include "py/runtime.h" #include "common-hal/_bleio/UUID.h" +#include "shared-bindings/_bleio/__init__.h" #include "shared-bindings/_bleio/Adapter.h" #include "ble.h" @@ -39,9 +40,7 @@ // If uuid128 is NULL, this is a Bluetooth SIG 16-bit UUID. // If uuid128 is not NULL, it's a 128-bit (16-byte) UUID, with bytes 12 and 13 zero'd out, where // the 16-bit part goes. Those 16 bits are passed in uuid16. -void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, uint32_t uuid16, uint8_t uuid128[]) { - common_hal_bleio_adapter_set_enabled(true); - +void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, uint32_t uuid16, const uint8_t uuid128[]) { self->nrf_ble_uuid.uuid = uuid16; if (uuid128 == NULL) { self->nrf_ble_uuid.type = BLE_UUID_TYPE_BLE; @@ -54,6 +53,7 @@ void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, uint32_t uuid16, ui if (err_code != NRF_SUCCESS) { mp_raise_OSError_msg_varg(translate("Failed to register Vendor-Specific UUID, err 0x%04x"), err_code); } + vm_used_ble = true; } } @@ -65,25 +65,24 @@ uint32_t common_hal_bleio_uuid_get_uuid16(bleio_uuid_obj_t *self) { return self->nrf_ble_uuid.uuid; } -// True if uuid128 has been successfully filled in. -bool common_hal_bleio_uuid_get_uuid128(bleio_uuid_obj_t *self, uint8_t uuid128[16]) { +void common_hal_bleio_uuid_get_uuid128(bleio_uuid_obj_t *self, uint8_t uuid128[16]) { uint8_t length; const uint32_t err_code = sd_ble_uuid_encode(&self->nrf_ble_uuid, &length, uuid128); if (err_code != NRF_SUCCESS) { mp_raise_OSError_msg_varg(translate("Could not decode ble_uuid, err 0x%04x"), err_code); } - // If not 16 bytes, this is not a 128-bit UUID, so return. - return length == 16; } -// Returns 0 if this is a 16-bit UUID, otherwise returns a non-zero index -// into the 128-bit uuid registration table. -uint32_t common_hal_bleio_uuid_get_uuid128_reference(bleio_uuid_obj_t *self) { - return self->nrf_ble_uuid.type == BLE_UUID_TYPE_BLE ? 0 : self->nrf_ble_uuid.type; +void common_hal_bleio_uuid_pack_into(bleio_uuid_obj_t *self, uint8_t* buf) { + if (self->nrf_ble_uuid.type == BLE_UUID_TYPE_BLE) { + buf[0] = self->nrf_ble_uuid.uuid & 0xff; + buf[1] = self->nrf_ble_uuid.uuid >> 8; + } else { + common_hal_bleio_uuid_get_uuid128(self, buf); + } } - void bleio_uuid_construct_from_nrf_ble_uuid(bleio_uuid_obj_t *self, ble_uuid_t *nrf_ble_uuid) { if (nrf_ble_uuid->type == BLE_UUID_TYPE_UNKNOWN) { mp_raise_RuntimeError(translate("Unexpected nrfx uuid type")); diff --git a/ports/nrf/common-hal/_bleio/__init__.c b/ports/nrf/common-hal/_bleio/__init__.c index 5530441909..1e07ea969c 100644 --- a/ports/nrf/common-hal/_bleio/__init__.c +++ b/ports/nrf/common-hal/_bleio/__init__.c @@ -26,34 +26,58 @@ * THE SOFTWARE. */ +#include + #include "py/runtime.h" #include "shared-bindings/_bleio/__init__.h" #include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/_bleio/Central.h" #include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Connection.h" #include "shared-bindings/_bleio/Descriptor.h" -#include "shared-bindings/_bleio/Peripheral.h" #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/UUID.h" +#include "supervisor/shared/bluetooth.h" #include "common-hal/_bleio/__init__.h" -static volatile bool m_discovery_in_process; -static volatile bool m_discovery_successful; - -static bleio_service_obj_t *m_char_discovery_service; -static bleio_characteristic_obj_t *m_desc_discovery_characteristic; +const mp_obj_t base_error_messages[20] = { + MP_ROM_QSTR(MP_QSTR_SUCCESS), + MP_ROM_QSTR(MP_QSTR_SVC_HANDLER_MISSING), + MP_ROM_QSTR(MP_QSTR_SOFTDEVICE_NOT_ENABLED), + MP_ROM_QSTR(MP_QSTR_INTERNAL), + MP_ROM_QSTR(MP_QSTR_NO_MEM), + MP_ROM_QSTR(MP_QSTR_NOT_FOUND), + MP_ROM_QSTR(MP_QSTR_NOT_SUPPORTED), + MP_ROM_QSTR(MP_QSTR_INVALID_PARAM), + MP_ROM_QSTR(MP_QSTR_INVALID_STATE), + MP_ROM_QSTR(MP_QSTR_INVALID_LENGTH), + MP_ROM_QSTR(MP_QSTR_INVALID_FLAGS), + MP_ROM_QSTR(MP_QSTR_INVALID_DATA), + MP_ROM_QSTR(MP_QSTR_DATA_SIZE), + MP_ROM_QSTR(MP_QSTR_TIMEOUT), + MP_ROM_QSTR(MP_QSTR_NULL), + MP_ROM_QSTR(MP_QSTR_FORBIDDEN), + MP_ROM_QSTR(MP_QSTR_INVALID_ADDR), + MP_ROM_QSTR(MP_QSTR_BUSY), + MP_ROM_QSTR(MP_QSTR_CONN_COUNT), + MP_ROM_QSTR(MP_QSTR_RESOURCES), +}; // Turn off BLE on a reset or reload. void bleio_reset() { - if (common_hal_bleio_adapter_get_enabled()) { - common_hal_bleio_adapter_set_enabled(false); + bleio_adapter_reset(&common_hal_bleio_adapter_obj); + if (!vm_used_ble) { + return; } + if (common_hal_bleio_adapter_get_enabled(&common_hal_bleio_adapter_obj)) { + common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, false); + } + supervisor_start_bluetooth(); } // The singleton _bleio.Adapter object, bound to _bleio.adapter // It currently only has properties and no state -const super_adapter_obj_t common_hal_bleio_adapter_obj = { +bleio_adapter_obj_t common_hal_bleio_adapter_obj = { .base = { .type = &bleio_adapter_type, }, @@ -65,395 +89,22 @@ void common_hal_bleio_check_connected(uint16_t conn_handle) { } } -uint16_t common_hal_bleio_device_get_conn_handle(mp_obj_t device) { - if (MP_OBJ_IS_TYPE(device, &bleio_peripheral_type)) { - return ((bleio_peripheral_obj_t*) MP_OBJ_TO_PTR(device))->conn_handle; - } else if (MP_OBJ_IS_TYPE(device, &bleio_central_type)) { - return ((bleio_central_obj_t*) MP_OBJ_TO_PTR(device))->conn_handle; - } else { - return BLE_CONN_HANDLE_INVALID; - } -} - -mp_obj_list_t *common_hal_bleio_device_get_remote_service_list(mp_obj_t device) { - if (MP_OBJ_IS_TYPE(device, &bleio_peripheral_type)) { - return ((bleio_peripheral_obj_t*) MP_OBJ_TO_PTR(device))->remote_service_list; - } else if (MP_OBJ_IS_TYPE(device, &bleio_central_type)) { - return ((bleio_central_obj_t*) MP_OBJ_TO_PTR(device))->remote_service_list; - } else { - return NULL; - } -} - -// service_uuid may be NULL, to discover all services. -STATIC bool discover_next_services(mp_obj_t device, uint16_t start_handle, ble_uuid_t *service_uuid) { - m_discovery_successful = false; - m_discovery_in_process = true; - - uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(device); - uint32_t err_code = sd_ble_gattc_primary_services_discover(conn_handle, start_handle, service_uuid); - - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg(translate("Failed to discover services")); - } - - // Wait for a discovery event. - while (m_discovery_in_process) { - MICROPY_VM_HOOK_LOOP; - } - return m_discovery_successful; -} - -STATIC bool discover_next_characteristics(mp_obj_t device, bleio_service_obj_t *service, uint16_t start_handle) { - m_char_discovery_service = service; - - ble_gattc_handle_range_t handle_range; - handle_range.start_handle = start_handle; - handle_range.end_handle = service->end_handle; - - m_discovery_successful = false; - m_discovery_in_process = true; - - uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(device); - uint32_t err_code = sd_ble_gattc_characteristics_discover(conn_handle, &handle_range); - if (err_code != NRF_SUCCESS) { - return false; - } - - // Wait for a discovery event. - while (m_discovery_in_process) { - MICROPY_VM_HOOK_LOOP; - } - return m_discovery_successful; -} - -STATIC bool discover_next_descriptors(mp_obj_t device, bleio_characteristic_obj_t *characteristic, uint16_t start_handle, uint16_t end_handle) { - m_desc_discovery_characteristic = characteristic; - - ble_gattc_handle_range_t handle_range; - handle_range.start_handle = start_handle; - handle_range.end_handle = end_handle; - - m_discovery_successful = false; - m_discovery_in_process = true; - - uint16_t conn_handle = common_hal_bleio_device_get_conn_handle(device); - uint32_t err_code = sd_ble_gattc_descriptors_discover(conn_handle, &handle_range); - if (err_code != NRF_SUCCESS) { - return false; - } - - // Wait for a discovery event. - while (m_discovery_in_process) { - MICROPY_VM_HOOK_LOOP; - } - return m_discovery_successful; -} - -STATIC void on_primary_srv_discovery_rsp(ble_gattc_evt_prim_srvc_disc_rsp_t *response, mp_obj_t device) { - for (size_t i = 0; i < response->count; ++i) { - ble_gattc_service_t *gattc_service = &response->services[i]; - - bleio_service_obj_t *service = m_new_obj(bleio_service_obj_t); - service->base.type = &bleio_service_type; - - // Initialize several fields at once. - common_hal_bleio_service_construct(service, device, NULL, false); - - service->is_remote = true; - service->start_handle = gattc_service->handle_range.start_handle; - service->end_handle = gattc_service->handle_range.end_handle; - service->handle = gattc_service->handle_range.start_handle; - - if (gattc_service->uuid.type != BLE_UUID_TYPE_UNKNOWN) { - // Known service UUID. - bleio_uuid_obj_t *uuid = m_new_obj(bleio_uuid_obj_t); - uuid->base.type = &bleio_uuid_type; - bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_service->uuid); - service->uuid = uuid; - } else { - // The discovery response contained a 128-bit UUID that has not yet been registered with the - // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. - // For now, just set the UUID to NULL. - service->uuid = NULL; - } - - mp_obj_list_append(common_hal_bleio_device_get_remote_service_list(device), service); - } - - if (response->count > 0) { - m_discovery_successful = true; - } - m_discovery_in_process = false; -} - -STATIC void on_char_discovery_rsp(ble_gattc_evt_char_disc_rsp_t *response, mp_obj_t device) { - for (size_t i = 0; i < response->count; ++i) { - ble_gattc_char_t *gattc_char = &response->chars[i]; - - bleio_characteristic_obj_t *characteristic = m_new_obj(bleio_characteristic_obj_t); - characteristic->base.type = &bleio_characteristic_type; - - bleio_uuid_obj_t *uuid = NULL; - - if (gattc_char->uuid.type != BLE_UUID_TYPE_UNKNOWN) { - // Known characteristic UUID. - uuid = m_new_obj(bleio_uuid_obj_t); - uuid->base.type = &bleio_uuid_type; - bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_char->uuid); - } else { - // The discovery response contained a 128-bit UUID that has not yet been registered with the - // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. - // For now, just leave the UUID as NULL. - } - - bleio_characteristic_properties_t props = - (gattc_char->char_props.broadcast ? CHAR_PROP_BROADCAST : 0) | - (gattc_char->char_props.indicate ? CHAR_PROP_INDICATE : 0) | - (gattc_char->char_props.notify ? CHAR_PROP_NOTIFY : 0) | - (gattc_char->char_props.read ? CHAR_PROP_READ : 0) | - (gattc_char->char_props.write ? CHAR_PROP_WRITE : 0) | - (gattc_char->char_props.write_wo_resp ? CHAR_PROP_WRITE_NO_RESPONSE : 0); - - // Call common_hal_bleio_characteristic_construct() to initalize some fields and set up evt handler. - common_hal_bleio_characteristic_construct( - characteristic, m_char_discovery_service, uuid, props, SECURITY_MODE_OPEN, SECURITY_MODE_OPEN, - GATT_MAX_DATA_LENGTH, false, // max_length, fixed_length: values may not matter for gattc - mp_obj_new_list(0, NULL)); - characteristic->handle = gattc_char->handle_value; - - mp_obj_list_append(m_char_discovery_service->characteristic_list, MP_OBJ_FROM_PTR(characteristic)); - } - - if (response->count > 0) { - m_discovery_successful = true; - } - m_discovery_in_process = false; -} - -STATIC void on_desc_discovery_rsp(ble_gattc_evt_desc_disc_rsp_t *response, mp_obj_t device) { - for (size_t i = 0; i < response->count; ++i) { - ble_gattc_desc_t *gattc_desc = &response->descs[i]; - - // Remember handles for certain well-known descriptors. - switch (gattc_desc->uuid.uuid) { - case BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG: - m_desc_discovery_characteristic->cccd_handle = gattc_desc->handle; - break; - - case BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG: - m_desc_discovery_characteristic->sccd_handle = gattc_desc->handle; - break; - - case BLE_UUID_DESCRIPTOR_CHAR_USER_DESC: - m_desc_discovery_characteristic->user_desc_handle = gattc_desc->handle; - break; - - default: - // TODO: sd_ble_gattc_descriptors_discover() can return things that are not descriptors, - // so ignore those. - // https://devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors - break; - } - - bleio_descriptor_obj_t *descriptor = m_new_obj(bleio_descriptor_obj_t); - descriptor->base.type = &bleio_descriptor_type; - - bleio_uuid_obj_t *uuid = NULL; - - if (gattc_desc->uuid.type != BLE_UUID_TYPE_UNKNOWN) { - // Known descriptor UUID. - uuid = m_new_obj(bleio_uuid_obj_t); - uuid->base.type = &bleio_uuid_type; - bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_desc->uuid); - } else { - // The discovery response contained a 128-bit UUID that has not yet been registered with the - // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. - // For now, just leave the UUID as NULL. - } - - common_hal_bleio_descriptor_construct( - descriptor, m_desc_discovery_characteristic, uuid, - SECURITY_MODE_OPEN, SECURITY_MODE_OPEN, - GATT_MAX_DATA_LENGTH, false, mp_const_empty_bytes); - descriptor->handle = gattc_desc->handle; - - mp_obj_list_append(m_desc_discovery_characteristic->descriptor_list, MP_OBJ_FROM_PTR(descriptor)); - } - - if (response->count > 0) { - m_discovery_successful = true; - } - m_discovery_in_process = false; -} - -STATIC void discovery_on_ble_evt(ble_evt_t *ble_evt, mp_obj_t device) { - switch (ble_evt->header.evt_id) { - case BLE_GAP_EVT_DISCONNECTED: - m_discovery_successful = false; - m_discovery_in_process = false; - break; - - case BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP: - on_primary_srv_discovery_rsp(&ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp, device); - break; - - case BLE_GATTC_EVT_CHAR_DISC_RSP: - on_char_discovery_rsp(&ble_evt->evt.gattc_evt.params.char_disc_rsp, device); - break; - - case BLE_GATTC_EVT_DESC_DISC_RSP: - on_desc_discovery_rsp(&ble_evt->evt.gattc_evt.params.desc_disc_rsp, device); - break; - - default: - // For debugging. - // mp_printf(&mp_plat_print, "Unhandled discovery event: 0x%04x\n", ble_evt->header.evt_id); - break; - } -} - - -void common_hal_bleio_device_discover_remote_services(mp_obj_t device, mp_obj_t service_uuids_whitelist) { - mp_obj_list_t *remote_services_list = common_hal_bleio_device_get_remote_service_list(device); - - ble_drv_add_event_handler(discovery_on_ble_evt, device); - - // Start over with an empty list. - mp_obj_list_clear(MP_OBJ_FROM_PTR(common_hal_bleio_device_get_remote_service_list(device))); - - if (service_uuids_whitelist == mp_const_none) { - // List of service UUID's not given, so discover all available services. - - uint16_t next_service_start_handle = BLE_GATT_HANDLE_START; - - while (discover_next_services(device, next_service_start_handle, MP_OBJ_NULL)) { - // discover_next_services() appends to remote_services_list. - - // Get the most recently discovered service, and then ask for services - // whose handles start after the last attribute handle inside that service. - const bleio_service_obj_t *service = - MP_OBJ_TO_PTR(remote_services_list->items[remote_services_list->len - 1]); - next_service_start_handle = service->end_handle + 1; - } - } else { - mp_obj_iter_buf_t iter_buf; - mp_obj_t iterable = mp_getiter(service_uuids_whitelist, &iter_buf); - mp_obj_t uuid_obj; - while ((uuid_obj = mp_iternext(iterable)) != MP_OBJ_STOP_ITERATION) { - if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { - mp_raise_ValueError(translate("non-UUID found in service_uuids_whitelist")); - } - bleio_uuid_obj_t *uuid = MP_OBJ_TO_PTR(uuid_obj); - - ble_uuid_t nrf_uuid; - bleio_uuid_convert_to_nrf_ble_uuid(uuid, &nrf_uuid); - - // Service might or might not be discovered; that's ok. Caller has to check - // Central.remote_services to find out. - // We only need to call this once for each service to discover. - discover_next_services(device, BLE_GATT_HANDLE_START, &nrf_uuid); - } - } - - - for (size_t service_idx = 0; service_idx < remote_services_list->len; ++service_idx) { - bleio_service_obj_t *service = MP_OBJ_TO_PTR(remote_services_list->items[service_idx]); - - // Skip the service if it had an unknown (unregistered) UUID. - if (service->uuid == NULL) { - continue; - } - - uint16_t next_char_start_handle = service->start_handle; - - // Stop when we go past the end of the range of handles for this service or - // discovery call returns nothing. - // discover_next_characteristics() appends to the characteristic_list. - while (next_char_start_handle <= service->end_handle && - discover_next_characteristics(device, service, next_char_start_handle)) { - - - // Get the most recently discovered characteristic, and then ask for characteristics - // whose handles start after the last attribute handle inside that characteristic. - const bleio_characteristic_obj_t *characteristic = - MP_OBJ_TO_PTR(service->characteristic_list->items[service->characteristic_list->len - 1]); - next_char_start_handle = characteristic->handle + 1; - } - - // Got characteristics for this service. Now discover descriptors for each characteristic. - size_t char_list_len = service->characteristic_list->len; - for (size_t char_idx = 0; char_idx < char_list_len; ++char_idx) { - bleio_characteristic_obj_t *characteristic = - MP_OBJ_TO_PTR(service->characteristic_list->items[char_idx]); - const bool last_characteristic = char_idx == char_list_len - 1; - bleio_characteristic_obj_t *next_characteristic = last_characteristic - ? NULL - : MP_OBJ_TO_PTR(service->characteristic_list->items[char_idx + 1]); - - // Skip the characteristic if it had an unknown (unregistered) UUID. - if (characteristic->uuid == NULL) { - continue; - } - - uint16_t next_desc_start_handle = characteristic->handle + 1; - - // Don't run past the end of this service or the beginning of the next characteristic. - uint16_t next_desc_end_handle = next_characteristic == NULL - ? service->end_handle - : next_characteristic->handle - 1; - - // Stop when we go past the end of the range of handles for this service or - // discovery call returns nothing. - // discover_next_descriptors() appends to the descriptor_list. - while (next_desc_start_handle <= service->end_handle && - next_desc_start_handle < next_desc_end_handle && - discover_next_descriptors(device, characteristic, - next_desc_start_handle, next_desc_end_handle)) { - - // Get the most recently discovered descriptor, and then ask for descriptors - // whose handles start after that descriptor's handle. - const bleio_descriptor_obj_t *descriptor = - MP_OBJ_TO_PTR(characteristic->descriptor_list->items[characteristic->descriptor_list->len - 1]); - next_desc_start_handle = descriptor->handle + 1; - } - } - } - - // This event handler is no longer needed. - ble_drv_remove_event_handler(discovery_on_ble_evt, device); - -} - // GATTS read of a Characteristic or Descriptor. -mp_obj_t common_hal_bleio_gatts_read(uint16_t handle, uint16_t conn_handle) { +size_t common_hal_bleio_gatts_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len) { // conn_handle might be BLE_CONN_HANDLE_INVALID if we're not connected, but that's OK, because // we can still read and write the local value. - mp_buffer_info_t bufinfo; ble_gatts_value_t gatts_value = { - .p_value = NULL, - .len = 0, + .p_value = buf, + .len = len, }; - // Read once to find out what size buffer we need, then read again to fill buffer. - - mp_obj_t value = mp_const_none; uint32_t err_code = sd_ble_gatts_value_get(conn_handle, handle, &gatts_value); - if (err_code == NRF_SUCCESS) { - value = mp_obj_new_bytearray_of_zeros(gatts_value.len); - mp_get_buffer_raise(value, &bufinfo, MP_BUFFER_WRITE); - gatts_value.p_value = bufinfo.buf; - - // Read again, with the correct size of buffer. - err_code = sd_ble_gatts_value_get(conn_handle, handle, &gatts_value); - } - if (err_code != NRF_SUCCESS) { mp_raise_OSError_msg_varg(translate("Failed to read gatts value, err 0x%04x"), err_code); } - return value; + return gatts_value.len; } void common_hal_bleio_gatts_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo) { @@ -471,6 +122,72 @@ void common_hal_bleio_gatts_write(uint16_t handle, uint16_t conn_handle, mp_buff } } +typedef struct { + uint8_t* buf; + size_t len; + size_t final_len; + uint16_t conn_handle; + volatile uint16_t status; + volatile bool done; +} read_info_t; + +STATIC bool _on_gattc_read_rsp_evt(ble_evt_t *ble_evt, void *param) { + read_info_t* read = param; + switch (ble_evt->header.evt_id) { + + // More events may be handled later, so keep this as a switch. + + case BLE_GATTC_EVT_READ_RSP: { + ble_gattc_evt_t* evt = &ble_evt->evt.gattc_evt; + ble_gattc_evt_read_rsp_t *response = &evt->params.read_rsp; + if (read && evt->conn_handle == read->conn_handle) { + read->status = evt->gatt_status; + size_t len = MIN(read->len, response->len); + memcpy(read->buf, response->data, len); + read->final_len = len; + // Indicate to busy-wait loop that we've read the attribute value. + read->done = true; + } + break; + } + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled characteristic event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +size_t common_hal_bleio_gattc_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len) { + common_hal_bleio_check_connected(conn_handle); + + read_info_t read_info; + read_info.buf = buf; + read_info.len = len; + read_info.final_len = 0; + read_info.conn_handle = conn_handle; + // Set to true by the event handler. + read_info.done = false; + ble_drv_add_event_handler(_on_gattc_read_rsp_evt, &read_info); + + const uint32_t err_code = sd_ble_gattc_read(conn_handle, handle, 0); + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed initiate attribute read, err 0x%04x"), err_code); + } + + while (!read_info.done) { + RUN_BACKGROUND_TASKS; + } + if (read_info.status != BLE_GATT_STATUS_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to read attribute value, err 0x%04x"), read_info.status); + } + + ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info); + return read_info.final_len; +} + void common_hal_bleio_gattc_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, bool write_no_response) { common_hal_bleio_check_connected(conn_handle); @@ -500,3 +217,7 @@ void common_hal_bleio_gattc_write(uint16_t handle, uint16_t conn_handle, mp_buff } } + +void common_hal_bleio_gc_collect(void) { + bleio_adapter_gc_collect(&common_hal_bleio_adapter_obj); +} diff --git a/ports/nrf/common-hal/_bleio/__init__.h b/ports/nrf/common-hal/_bleio/__init__.h index cf1a06945d..5fd2769f26 100644 --- a/ports/nrf/common-hal/_bleio/__init__.h +++ b/ports/nrf/common-hal/_bleio/__init__.h @@ -39,4 +39,9 @@ typedef struct { // 20 bytes max (23 - 3). #define GATT_MAX_DATA_LENGTH (BLE_GATT_ATT_MTU_DEFAULT - 3) +const mp_obj_t base_error_messages[20]; + +// Track if the user code modified the BLE state to know if we need to undo it on reload. +bool vm_used_ble; + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_INIT_H diff --git a/ports/nrf/common-hal/analogio/AnalogIn.c b/ports/nrf/common-hal/analogio/AnalogIn.c index 7cf6a6423b..44ebe9b4df 100644 --- a/ports/nrf/common-hal/analogio/AnalogIn.c +++ b/ports/nrf/common-hal/analogio/AnalogIn.c @@ -29,11 +29,21 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -#include "nrfx_saadc.h" +#include "nrf_saadc.h" #include "nrf_gpio.h" #define CHANNEL_NO 0 +void analogin_init(void) { + // Calibrate the ADC once, on startup. + nrf_saadc_enable(); + nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); + nrf_saadc_task_trigger(NRF_SAADC_TASK_CALIBRATEOFFSET); + while (nrf_saadc_event_check(NRF_SAADC_EVENT_CALIBRATEDONE) == 0) { } + nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); + nrf_saadc_disable(); +} + void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const mcu_pin_obj_t *pin) { if (pin->adc_channel == 0) mp_raise_ValueError(translate("Pin does not have ADC capabilities")); diff --git a/ports/nrf/common-hal/analogio/AnalogIn.h b/ports/nrf/common-hal/analogio/AnalogIn.h index e0e95bad4c..a268bb54e4 100644 --- a/ports/nrf/common-hal/analogio/AnalogIn.h +++ b/ports/nrf/common-hal/analogio/AnalogIn.h @@ -36,4 +36,6 @@ typedef struct { const mcu_pin_obj_t * pin; } analogio_analogin_obj_t; +void analogin_init(void); + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c b/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c index 0321b751ca..9496277b10 100644 --- a/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +++ b/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c @@ -64,23 +64,25 @@ STATIC uint32_t calculate_pwm_parameters(uint32_t sample_rate, uint32_t *top_out } STATIC void activate_audiopwmout_obj(audiopwmio_pwmaudioout_obj_t *self) { - for(size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { - if(!active_audio[i]) { + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + if (!active_audio[i]) { active_audio[i] = self; break; } } } STATIC void deactivate_audiopwmout_obj(audiopwmio_pwmaudioout_obj_t *self) { - for(size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { - if(active_audio[i] == self) + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + if (active_audio[i] == self) { active_audio[i] = NULL; + } } } void audiopwmout_reset() { - for(size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { active_audio[i] = NULL; + } } STATIC void fill_buffers(audiopwmio_pwmaudioout_obj_t *self, int buf) { @@ -97,25 +99,25 @@ STATIC void fill_buffers(audiopwmio_pwmaudioout_obj_t *self, int buf) { } uint32_t num_samples = buffer_length / self->bytes_per_sample / self->spacing; - if(self->bytes_per_sample == 1) { + if (self->bytes_per_sample == 1) { uint8_t offset = self->signed_to_unsigned ? 0x80 : 0; uint16_t scale = self->scale; - for(uint32_t i=0; ispacing; i++) { + for (uint32_t i=0; ispacing; i++) { uint8_t rawval = (*buffer++ + offset); uint16_t val = (uint16_t)(((uint32_t)rawval * (uint32_t)scale) >> 8); *dev_buffer++ = val; - if(self->spacing == 1) + if (self->spacing == 1) *dev_buffer++ = val; } } else { uint16_t offset = self->signed_to_unsigned ? 0x8000 : 0; uint16_t scale = self->scale; uint16_t *buffer16 = (uint16_t*)buffer; - for(uint32_t i=0; ispacing; i++) { + for (uint32_t i=0; ispacing; i++) { uint16_t rawval = (*buffer16++ + offset); uint16_t val = (uint16_t)((rawval * (uint32_t)scale) >> 16); *dev_buffer++ = val; - if(self->spacing == 1) + if (self->spacing == 1) *dev_buffer++ = val; } } @@ -124,30 +126,30 @@ STATIC void fill_buffers(audiopwmio_pwmaudioout_obj_t *self, int buf) { if (self->loop && get_buffer_result == GET_BUFFER_DONE) { audiosample_reset_buffer(self->sample, false, 0); - } else if(get_buffer_result == GET_BUFFER_DONE) { + } else if (get_buffer_result == GET_BUFFER_DONE) { self->pwm->SHORTS = NRF_PWM_SHORT_SEQEND0_STOP_MASK | NRF_PWM_SHORT_SEQEND1_STOP_MASK; self->stopping = true; } } STATIC void audiopwmout_background_obj(audiopwmio_pwmaudioout_obj_t *self) { - if(!common_hal_audiopwmio_pwmaudioout_get_playing(self)) + if (!common_hal_audiopwmio_pwmaudioout_get_playing(self)) return; - if(self->stopping) { + if (self->stopping) { bool stopped = (self->pwm->EVENTS_SEQEND[0] || !self->pwm->EVENTS_SEQSTARTED[0]) && (self->pwm->EVENTS_SEQEND[1] || !self->pwm->EVENTS_SEQSTARTED[1]); - if(stopped) + if (stopped) self->pwm->TASKS_STOP = 1; - } else if(!self->paused && !self->single_buffer) { - if(self->pwm->EVENTS_SEQSTARTED[0]) fill_buffers(self, 1); - if(self->pwm->EVENTS_SEQSTARTED[1]) fill_buffers(self, 0); + } else if (!self->paused && !self->single_buffer) { + if (self->pwm->EVENTS_SEQSTARTED[0]) fill_buffers(self, 1); + if (self->pwm->EVENTS_SEQSTARTED[1]) fill_buffers(self, 0); } } void audiopwmout_background() { - for(size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { - if(!active_audio[i]) continue; + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + if (!active_audio[i]) continue; audiopwmout_background_obj(active_audio[i]); } } @@ -157,7 +159,7 @@ void common_hal_audiopwmio_pwmaudioout_construct(audiopwmio_pwmaudioout_obj_t* s assert_pin_free(left_channel); assert_pin_free(right_channel); self->pwm = pwmout_allocate(256, PWM_PRESCALER_PRESCALER_DIV_1, true, NULL, NULL); - if(!self->pwm) { + if (!self->pwm) { mp_raise_RuntimeError(translate("All timers in use")); } @@ -172,7 +174,7 @@ void common_hal_audiopwmio_pwmaudioout_construct(audiopwmio_pwmaudioout_obj_t* s self->pwm->PSEL.OUT[0] = self->left_channel_number = left_channel->number; claim_pin(left_channel); - if(right_channel) + if (right_channel) { self->pwm->PSEL.OUT[2] = self->right_channel_number = right_channel->number; claim_pin(right_channel); @@ -192,12 +194,14 @@ void common_hal_audiopwmio_pwmaudioout_deinit(audiopwmio_pwmaudioout_obj_t* self if (common_hal_audiopwmio_pwmaudioout_deinited(self)) { return; } + deactivate_audiopwmout_obj(self); + // TODO: ramp the pwm down from quiescent value to 0 self->pwm->ENABLE = 0; - if(self->left_channel_number) + if (self->left_channel_number) reset_pin_number(self->left_channel_number); - if(self->right_channel_number) + if (self->right_channel_number) reset_pin_number(self->right_channel_number); pwmout_free_channel(self->pwm, 0); @@ -230,12 +234,12 @@ void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t* self, audiosample_get_buffer_structure(sample, /* single channel */ false, &self->single_buffer, &self->signed_to_unsigned, &max_buffer_length, &self->spacing); - if(max_buffer_length > UINT16_MAX) { + if (max_buffer_length > UINT16_MAX) { mp_raise_ValueError_varg(translate("Buffer length %d too big. It must be less than %d"), max_buffer_length, UINT16_MAX); } self->buffer_length = (uint16_t)max_buffer_length; self->buffers[0] = m_malloc(self->buffer_length * 2 * sizeof(uint16_t), false); - if(!self->single_buffer) + if (!self->single_buffer) self->buffers[1] = m_malloc(self->buffer_length * 2 * sizeof(uint16_t), false); @@ -274,7 +278,7 @@ void common_hal_audiopwmio_pwmaudioout_stop(audiopwmio_pwmaudioout_obj_t* self) } bool common_hal_audiopwmio_pwmaudioout_get_playing(audiopwmio_pwmaudioout_obj_t* self) { - if(!self->paused && self->pwm->EVENTS_STOPPED) { + if (!self->paused && self->pwm->EVENTS_STOPPED) { self->playing = false; self->pwm->EVENTS_STOPPED = 0; } diff --git a/ports/nrf/common-hal/busio/I2C.c b/ports/nrf/common-hal/busio/I2C.c index 71835d16ad..8a2ebde3bd 100644 --- a/ports/nrf/common-hal/busio/I2C.c +++ b/ports/nrf/common-hal/busio/I2C.c @@ -28,13 +28,12 @@ */ #include "shared-bindings/busio/I2C.h" +#include "shared-bindings/microcontroller/__init__.h" #include "py/mperrno.h" #include "py/runtime.h" #include "supervisor/shared/translate.h" #include "nrfx_twim.h" -#include "nrf_gpio.h" - #include "nrfx_spim.h" #include "nrf_gpio.h" @@ -107,7 +106,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) { if (!twim_peripherals[i].in_use) { self->twim_peripheral = &twim_peripherals[i]; - self->twim_peripheral->in_use = true; + // Mark it as in_use later after other validation is finished. break; } } @@ -116,10 +115,27 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * mp_raise_ValueError(translate("All I2C peripherals are in use")); } + // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) + nrf_gpio_cfg_input(scl->number, NRF_GPIO_PIN_PULLDOWN); + nrf_gpio_cfg_input(sda->number, NRF_GPIO_PIN_PULLDOWN); + + common_hal_mcu_delay_us(10); + + nrf_gpio_cfg_input(scl->number, NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(sda->number, NRF_GPIO_PIN_NOPULL); + + // We must pull up within 3us to achieve 400khz. + common_hal_mcu_delay_us(3); + + if (!nrf_gpio_pin_read(sda->number) || !nrf_gpio_pin_read(scl->number)) { + reset_pin_number(sda->number); + reset_pin_number(scl->number); + mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); + } + nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG; config.scl = scl->number; config.sda = sda->number; - // change freq. only if it's less than the default 400K if (frequency < 100000) { config.frequency = NRF_TWIM_FREQ_100K; @@ -132,6 +148,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * claim_pin(sda); claim_pin(scl); + // About to init. If we fail after this point, common_hal_busio_i2c_deinit() will set in_use to false. + self->twim_peripheral->in_use = true; nrfx_err_t err = nrfx_twim_init(&self->twim_peripheral->twim, &config, NULL, NULL); // A soft reset doesn't uninit the driver so we might end up with a invalid state @@ -152,8 +170,9 @@ bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { } void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { - if (common_hal_busio_i2c_deinited(self)) + if (common_hal_busio_i2c_deinited(self)) { return; + } nrfx_twim_uninit(&self->twim_peripheral->twim); diff --git a/ports/nrf/common-hal/microcontroller/Pin.c b/ports/nrf/common-hal/microcontroller/Pin.c index 3cee784b63..ce55317e54 100644 --- a/ports/nrf/common-hal/microcontroller/Pin.c +++ b/ports/nrf/common-hal/microcontroller/Pin.c @@ -25,6 +25,7 @@ */ #include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" #include "nrf_gpio.h" #include "py/mphal.h" @@ -47,6 +48,19 @@ bool speaker_enable_in_use; STATIC uint32_t claimed_pins[GPIO_COUNT]; STATIC uint32_t never_reset_pins[GPIO_COUNT]; +STATIC void reset_speaker_enable_pin(void) { +#ifdef SPEAKER_ENABLE_PIN + speaker_enable_in_use = false; + nrf_gpio_cfg(SPEAKER_ENABLE_PIN->number, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_H0H1, + NRF_GPIO_PIN_NOSENSE); + nrf_gpio_pin_write(SPEAKER_ENABLE_PIN->number, false); +#endif +} + void reset_all_pins(void) { for (size_t i = 0; i < GPIO_COUNT; i++) { claimed_pins[i] = never_reset_pins[i]; @@ -68,10 +82,7 @@ void reset_all_pins(void) { #endif // After configuring SWD because it may be shared. - #ifdef SPEAKER_ENABLE_PIN - speaker_enable_in_use = false; - // TODO set pin to out and turn off. - #endif + reset_speaker_enable_pin(); } // Mark pin as free and return it to a quiescent state. @@ -91,8 +102,8 @@ void reset_pin_number(uint8_t pin_number) { } #endif #ifdef MICROPY_HW_APA102_MOSI - if (pin == MICROPY_HW_APA102_MOSI->number || - pin == MICROPY_HW_APA102_SCK->number) { + if (pin_number == MICROPY_HW_APA102_MOSI->number || + pin_number == MICROPY_HW_APA102_SCK->number) { apa102_mosi_in_use = apa102_mosi_in_use && pin_number != MICROPY_HW_APA102_MOSI->number; apa102_sck_in_use = apa102_sck_in_use && pin_number != MICROPY_HW_APA102_SCK->number; if (!apa102_sck_in_use && !apa102_mosi_in_use) { @@ -104,10 +115,7 @@ void reset_pin_number(uint8_t pin_number) { #ifdef SPEAKER_ENABLE_PIN if (pin_number == SPEAKER_ENABLE_PIN->number) { - speaker_enable_in_use = false; - common_hal_digitalio_digitalinout_switch_to_output(SPEAKER_ENABLE_PIN, true, DRIVE_MODE_PUSH_PULL); - nrf_gpio_pin_dir_set(pin_number, NRF_GPIO_PIN_DIR_OUTPUT); - nrf_gpio_pin_write(pin_number, false); + reset_speaker_enable_pin(); } #endif } diff --git a/ports/nrf/common-hal/microcontroller/Processor.c b/ports/nrf/common-hal/microcontroller/Processor.c index 836020d159..abfd5b8656 100644 --- a/ports/nrf/common-hal/microcontroller/Processor.c +++ b/ports/nrf/common-hal/microcontroller/Processor.c @@ -28,6 +28,7 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" +#include "nrfx_saadc.h" #ifdef BLUETOOTH_SD #include "nrf_sdm.h" #endif @@ -47,27 +48,73 @@ float common_hal_mcu_processor_get_temperature(void) { if (err_code != NRF_SUCCESS) { mp_raise_OSError_msg(translate("Cannot get temperature")); } - } + return temp / 4.0f; + } // Fall through if SD not enabled. #endif - NRF_TEMP->TASKS_START = 1; - - while (NRF_TEMP->EVENTS_DATARDY == 0) - ; - + while (NRF_TEMP->EVENTS_DATARDY == 0) { } NRF_TEMP->EVENTS_DATARDY = 0; - temp = NRF_TEMP->TEMP; - NRF_TEMP->TASKS_STOP = 1; - return temp / 4.0f; } + + uint32_t common_hal_mcu_processor_get_frequency(void) { return 64000000ul; } +float common_hal_mcu_processor_get_voltage(void) { + nrf_saadc_value_t value; + + const nrf_saadc_channel_config_t config = { + .resistor_p = NRF_SAADC_RESISTOR_DISABLED, + .resistor_n = NRF_SAADC_RESISTOR_DISABLED, + .gain = NRF_SAADC_GAIN1_6, + .reference = NRF_SAADC_REFERENCE_INTERNAL, + .acq_time = NRF_SAADC_ACQTIME_10US, + .mode = NRF_SAADC_MODE_SINGLE_ENDED, + .burst = NRF_SAADC_BURST_DISABLED, + .pin_p = NRF_SAADC_INPUT_VDD, + .pin_n = NRF_SAADC_INPUT_VDD, + }; + + nrf_saadc_resolution_set(NRF_SAADC_RESOLUTION_14BIT); + nrf_saadc_oversample_set(NRF_SAADC_OVERSAMPLE_DISABLED); + nrf_saadc_enable(); + + for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; i++) { + nrf_saadc_channel_input_set(i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); + } + + nrf_saadc_channel_init(0, &config); + nrf_saadc_buffer_init(&value, 1); + + nrf_saadc_task_trigger(NRF_SAADC_TASK_START); + while (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED) == 0) { } + nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); + + nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); + while (nrf_saadc_event_check(NRF_SAADC_EVENT_END) == 0) { } + nrf_saadc_event_clear(NRF_SAADC_EVENT_END); + + nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); + while (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED) == 0) { } + nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); + + nrf_saadc_disable(); + + if (value < 0) { + value = 0; + } + +// The ADC reading we expect if VDD is 3.3V. +#define NOMINAL_VALUE_3_3 (((3.3f/6)/0.6f)*16383) + return (value/NOMINAL_VALUE_3_3) * 3.3f; +} + + void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { for (int i=0; i<2; i++) { ((uint32_t*) raw_id)[i] = NRF_FICR->DEVICEID[i]; diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 0b755a156b..bbe6419a5f 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -30,6 +30,10 @@ #include "ble_drv.h" +#ifdef NRF52840 +#define MICROPY_PY_SYS_PLATFORM "nRF52840" +#endif + #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_FUNCTION_ATTRS (1) #define MICROPY_PY_IO (1) diff --git a/ports/nrf/nrfx_config.h b/ports/nrf/nrfx_config.h index 8fa6721e2c..cafec6aa1d 100644 --- a/ports/nrf/nrfx_config.h +++ b/ports/nrf/nrfx_config.h @@ -5,12 +5,9 @@ #define NRFX_POWER_ENABLED 1 #define NRFX_POWER_CONFIG_IRQ_PRIORITY 7 -// Turn on nrfx supported workarounds for errata in Rev1/Rev2 of nRF52832 -#ifdef NRF52832_XXAA - #define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 -#endif - -// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH; tested on 2019-03-11. +// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH. +// It doesn't work with the SoftDevice. +// See https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session // Turn on nrfx supported workarounds for errata in Rev1 of nRF52840 #ifdef NRF52840_XXAA // #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1 @@ -24,11 +21,26 @@ // so out of the box TWIM0/SPIM0 and TWIM1/SPIM1 cannot be shared // between common-hal/busio/I2C.c and SPI.c. // We could write an interrupt handler that checks whether it's -// being used for SPI or I2C, but perhaps two I2C's and 1-2 SPI's are good enough for now. +// being used for SPI or I2C, but perhaps one I2C and two SPI or two I2C and one SPI +// are good enough for now. + +// CIRCUITPY_NRF_NUM_I2C is 1 or 2 to choose how many I2C (TWIM) peripherals +// to provide. +// This can go away once we have SPIM3 working: then we can have two +// I2C and two SPI. +#ifndef CIRCUITPY_NRF_NUM_I2C +#define CIRCUITPY_NRF_NUM_I2C 1 +#endif + +#if CIRCUITPY_NRF_NUM_I2C != 1 && CIRCUITPY_NRF_NUM_I2C != 2 +# error CIRCUITPY_NRF_NUM_I2C must be 1 or 2 +#endif // Enable SPIM1, SPIM2 and SPIM3 (if available) // No conflict with TWIM0. +#if CIRCUITPY_NRF_NUM_I2C == 1 #define NRFX_SPIM1_ENABLED 1 +#endif #define NRFX_SPIM2_ENABLED 1 // DON'T ENABLE SPIM3 DUE TO ANOMALY WORKAROUND FAILURE (SEE ABOVE). // #ifdef NRF52840_XXAA @@ -45,10 +57,13 @@ // QSPI #define NRFX_QSPI_ENABLED 1 -// TWI aka. I2C; enable a single bus: TWIM0 (no conflict with SPIM1 and SPIM2) +// TWI aka. I2C; always enable TWIM0 (no conflict with SPIM1 and SPIM2) #define NRFX_TWIM_ENABLED 1 #define NRFX_TWIM0_ENABLED 1 -//#define NRFX_TWIM1_ENABLED 1 + +#if CIRCUITPY_NRF_NUM_I2C == 2 +#define NRFX_TWIM1_ENABLED 1 +#endif #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 #define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY NRF_TWIM_FREQ_400K diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index e061c90b09..af858aa4a1 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -39,6 +39,7 @@ #include "shared-module/gamepad/__init__.h" #include "common-hal/microcontroller/Pin.h" #include "common-hal/_bleio/__init__.h" +#include "common-hal/analogio/AnalogIn.h" #include "common-hal/busio/I2C.h" #include "common-hal/busio/SPI.h" #include "common-hal/busio/UART.h" @@ -83,6 +84,10 @@ safe_mode_t port_init(void) { // Configure millisecond timer initialization. tick_init(); +#if CIRCUITPY_ANALOGIO + analogin_init(); +#endif + #if CIRCUITPY_RTC rtc_init(); #endif @@ -102,11 +107,11 @@ void reset_port(void) { spi_reset(); uart_reset(); -#ifdef CIRCUITPY_AUDIOBUSIO +#if CIRCUITPY_AUDIOBUSIO i2s_reset(); #endif -#ifdef CIRCUITPY_AUDIOPWMIO +#if CIRCUITPY_AUDIOPWMIO audiopwmout_reset(); #endif @@ -141,6 +146,14 @@ void reset_cpu(void) { NVIC_SystemReset(); } +uint32_t *port_stack_get_limit(void) { + return &_ebss; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + extern uint32_t _ebss; // Place the word to save just after our BSS section that gets blanked. void port_set_saved_word(uint32_t value) { diff --git a/ports/pic16bit/Makefile b/ports/pic16bit/Makefile deleted file mode 100644 index 970e75d1fb..0000000000 --- a/ports/pic16bit/Makefile +++ /dev/null @@ -1,70 +0,0 @@ -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -XC16 = /opt/microchip/xc16/v1.24 -CROSS_COMPILE = $(XC16)/bin/xc16- - -PARTFAMILY = dsPIC33F -PART = 33FJ256GP506 - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(XC16)/include -INC += -I$(XC16)/support/$(PARTFAMILY)/h - -CFLAGS_PIC16BIT = -mcpu=$(PART) -mlarge-code -CFLAGS = $(INC) -Wall -Werror -std=gnu99 -nostdlib $(CFLAGS_PIC16BIT) $(COPT) - -#Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -O0 -ggdb -else -CFLAGS += -O1 -DNDEBUG -endif - -LDFLAGS = --heap=0 -nostdlib -T $(XC16)/support/$(PARTFAMILY)/gld/p$(PART).gld -Map=$@.map --cref -p$(PART) -LIBS = -L$(XC16)/lib -L$(XC16)/lib/$(PARTFAMILY) -lc -lm -lpic30 -lp$(PART) - -SRC_C = \ - main.c \ - board.c \ - pic16bit_mphal.c \ - modpyb.c \ - modpybled.c \ - modpybswitch.c \ - lib/utils/pyexec.c \ - lib/utils/sys_stdio_mphal.c \ - lib/mp-readline/readline.c \ - -SRC_S = \ -# gchelper.s \ - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o) $(SRC_S:.s=.o)) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -all: $(BUILD)/firmware.hex - -$(BUILD)/firmware.hex: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(CROSS_COMPILE)bin2hex $< - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)size $@ - -$(PY_BUILD)/gc.o: CFLAGS += -O1 -$(PY_BUILD)/vm.o: CFLAGS += -O1 - -include $(TOP)/py/mkrules.mk diff --git a/ports/pic16bit/board.c b/ports/pic16bit/board.c deleted file mode 100644 index 0321b0ee22..0000000000 --- a/ports/pic16bit/board.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "board.h" - -/********************************************************************/ -// CPU - -void cpu_init(void) { - // set oscillator to operate at 40MHz - // Fosc = Fin*M/(N1*N2), Fcy = Fosc/2 - // Fosc = 7.37M*40/(2*2) = 80Mhz for 7.37M input clock - PLLFBD = 41; // M=39 - CLKDIVbits.PLLPOST = 0; // N1=2 - CLKDIVbits.PLLPRE = 0; // N2=2 - OSCTUN = 0; - - // initiate clock switch to FRC with PLL - __builtin_write_OSCCONH(0x01); - __builtin_write_OSCCONL(0x01); - - // wait for clock switch to occur - while (OSCCONbits.COSC != 0x01) { - } - while (!OSCCONbits.LOCK) { - } -} - -/********************************************************************/ -// LEDs - -#define RED_LED_TRIS _TRISC15 -#define YELLOW_LED_TRIS _TRISC13 -#define GREEN_LED_TRIS _TRISC14 - -#define RED_LED _LATC15 -#define YELLOW_LED _LATC13 -#define GREEN_LED _LATC14 - -#define LED_ON (0) -#define LED_OFF (1) - -void led_init(void) { - // set led GPIO as outputs - RED_LED_TRIS = 0; - YELLOW_LED_TRIS = 0; - GREEN_LED_TRIS = 0; - - // turn off the LEDs - RED_LED = LED_OFF; - YELLOW_LED = LED_OFF; - GREEN_LED = LED_OFF; -} - -void led_state(int led, int state) { - int val = state ? LED_ON : LED_OFF; - switch (led) { - case 1: RED_LED = val; break; - case 2: YELLOW_LED = val; break; - case 3: GREEN_LED = val; break; - } -} - -void led_toggle(int led) { - switch (led) { - case 1: RED_LED ^= 1; break; - case 2: YELLOW_LED ^= 1; break; - case 3: GREEN_LED ^= 1; break; - } -} - -/********************************************************************/ -// switches - -#define SWITCH_S1_TRIS _TRISD8 -#define SWITCH_S2_TRIS _TRISD9 - -#define SWITCH_S1 _RD8 -#define SWITCH_S2 _RD9 - -void switch_init(void) { - // set switch GPIO as inputs - SWITCH_S1_TRIS = 1; - SWITCH_S2_TRIS = 1; -} - -int switch_get(int sw) { - int val = 1; - switch (sw) { - case 1: val = SWITCH_S1; break; - case 2: val = SWITCH_S2; break; - } - return val == 0; -} - -/********************************************************************/ -// UART - -/* -// TODO need an irq -void uart_rx_irq(void) { - if (c == interrupt_char) { - MP_STATE_VM(mp_pending_exception) = MP_STATE_PORT(keyboard_interrupt_obj); - } -} -*/ - -void uart_init(void) { - // baudrate = F_CY / 16 (uxbrg + 1) - // F_CY = 40MHz for us - UART1.uxbrg = 64; // 38400 baud - UART1.uxmode = 1 << 15; // UARTEN - UART1.uxsta = 1 << 10; // UTXEN -} - -int uart_rx_any(void) { - return UART1.uxsta & 1; // URXDA -} - -int uart_rx_char(void) { - return UART1.uxrxreg; -} - -void uart_tx_char(int chr) { - while (UART1.uxsta & (1 << 9)) { - // tx fifo is full - } - UART1.uxtxreg = chr; -} diff --git a/ports/pic16bit/main.c b/ports/pic16bit/main.c deleted file mode 100644 index 4a61c5ff53..0000000000 --- a/ports/pic16bit/main.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "py/mperrno.h" -#include "lib/utils/pyexec.h" -#include "lib/mp-readline/readline.h" -#include "board.h" -#include "modpyb.h" - -_FGS(GWRP_OFF & GCP_OFF); -_FOSCSEL(FNOSC_FRC); -_FOSC(FCKSM_CSECMD & OSCIOFNC_ON & POSCMD_NONE); -_FWDT(FWDTEN_OFF); - -// maximum heap for device with 8k RAM -static char heap[4600]; - -int main(int argc, char **argv) { - // init the CPU and the peripherals - cpu_init(); - led_init(); - switch_init(); - uart_init(); - -soft_reset: - - // flash green led for 150ms to indicate boot - led_state(1, 0); - led_state(2, 0); - led_state(3, 1); - mp_hal_delay_ms(150); - led_state(3, 0); - - // init MicroPython runtime - int stack_dummy; - MP_STATE_THREAD(stack_top) = (char*)&stack_dummy; - gc_init(heap, heap + sizeof(heap)); - mp_init(); - mp_hal_init(); - readline_init0(); - - // REPL loop - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - printf("PYB: soft reboot\n"); - mp_deinit(); - goto soft_reset; -} - -void gc_collect(void) { - // TODO possibly need to trace registers - void *dummy; - gc_collect_start(); - // Node: stack is ascending - gc_collect_root(&dummy, ((mp_uint_t)&dummy - (mp_uint_t)MP_STATE_THREAD(stack_top)) / sizeof(mp_uint_t)); - gc_collect_end(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - while (1); -} - -void NORETURN __fatal_error(const char *msg) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif diff --git a/ports/pic16bit/modpyb.c b/ports/pic16bit/modpyb.c deleted file mode 100644 index 6299146336..0000000000 --- a/ports/pic16bit/modpyb.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/obj.h" -#include "py/mphal.h" -#include "modpyb.h" - -STATIC mp_obj_t pyb_millis(void) { - return MP_OBJ_NEW_SMALL_INT(mp_hal_ticks_ms()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_millis_obj, pyb_millis); - -STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) { - uint32_t startMillis = mp_obj_get_int(start); - uint32_t currMillis = mp_hal_ticks_ms(); - return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x1fff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis); - -STATIC mp_obj_t pyb_delay(mp_obj_t ms_in) { - mp_int_t ms = mp_obj_get_int(ms_in); - if (ms >= 0) { - mp_hal_delay_ms(ms); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_delay_obj, pyb_delay); - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - - { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&pyb_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&pyb_delay_obj) }, - - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, - { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/pic16bit/modpyb.h b/ports/pic16bit/modpyb.h deleted file mode 100644 index ac19fd2f36..0000000000 --- a/ports/pic16bit/modpyb.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_PIC16BIT_MODPYB_H -#define MICROPY_INCLUDED_PIC16BIT_MODPYB_H - -extern const mp_obj_type_t pyb_led_type; -extern const mp_obj_type_t pyb_switch_type; -extern const mp_obj_module_t pyb_module; - -#endif // MICROPY_INCLUDED_PIC16BIT_MODPYB_H diff --git a/ports/pic16bit/modpybled.c b/ports/pic16bit/modpybled.c deleted file mode 100644 index 0d200c6039..0000000000 --- a/ports/pic16bit/modpybled.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "board.h" -#include "modpyb.h" - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { - {{&pyb_led_type}}, - {{&pyb_led_type}}, - {{&pyb_led_type}}, -}; - -#define NUM_LED MP_ARRAY_SIZE(pyb_led_obj) -#define LED_ID(obj) ((obj) - &pyb_led_obj[0] + 1) - -void pyb_led_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - mp_printf(print, "LED(%u)", LED_ID(self)); -} - -STATIC mp_obj_t pyb_led_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - mp_int_t led_id = mp_obj_get_int(args[0]); - if (!(1 <= led_id && led_id <= NUM_LED)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED %d does not exist", led_id)); - } - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -mp_obj_t pyb_led_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(LED_ID(self), 1); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_led_on_obj, pyb_led_on); - -mp_obj_t pyb_led_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(LED_ID(self), 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_led_off_obj, pyb_led_off); - -mp_obj_t pyb_led_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(LED_ID(self)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_led_toggle_obj, pyb_led_toggle); - -STATIC const mp_rom_map_elem_t pyb_led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pyb_led_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pyb_led_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&pyb_led_toggle_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_led_locals_dict, pyb_led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = pyb_led_print, - .make_new = pyb_led_make_new, - .locals_dict = (mp_obj_t)&pyb_led_locals_dict, -}; diff --git a/ports/pic16bit/modpybswitch.c b/ports/pic16bit/modpybswitch.c deleted file mode 100644 index 0799ad9e82..0000000000 --- a/ports/pic16bit/modpybswitch.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "board.h" -#include "modpyb.h" - -typedef struct _pyb_switch_obj_t { - mp_obj_base_t base; -} pyb_switch_obj_t; - -STATIC const pyb_switch_obj_t pyb_switch_obj[] = { - {{&pyb_switch_type}}, - {{&pyb_switch_type}}, -}; - -#define NUM_SWITCH MP_ARRAY_SIZE(pyb_switch_obj) -#define SWITCH_ID(obj) ((obj) - &pyb_switch_obj[0] + 1) - -void pyb_switch_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_switch_obj_t *self = self_in; - mp_printf(print, "Switch(%u)", SWITCH_ID(self)); -} - -STATIC mp_obj_t pyb_switch_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - mp_int_t sw_id = mp_obj_get_int(args[0]); - if (!(1 <= sw_id && sw_id <= NUM_SWITCH)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Switch %d does not exist", sw_id)); - } - return (mp_obj_t)&pyb_switch_obj[sw_id - 1]; -} - -mp_obj_t pyb_switch_value(mp_obj_t self_in) { - pyb_switch_obj_t *self = self_in; - return switch_get(SWITCH_ID(self)) ? mp_const_true : mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_switch_value_obj, pyb_switch_value); - -mp_obj_t pyb_switch_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 0, false); - return pyb_switch_value(self_in); -} - -STATIC const mp_rom_map_elem_t pyb_switch_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_switch_value_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_switch_locals_dict, pyb_switch_locals_dict_table); - -const mp_obj_type_t pyb_switch_type = { - { &mp_type_type }, - .name = MP_QSTR_Switch, - .print = pyb_switch_print, - .make_new = pyb_switch_make_new, - .call = pyb_switch_call, - .locals_dict = (mp_obj_t)&pyb_switch_locals_dict, -}; diff --git a/ports/pic16bit/mpconfigport.h b/ports/pic16bit/mpconfigport.h deleted file mode 100644 index 59880dc599..0000000000 --- a/ports/pic16bit/mpconfigport.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -// options to control how MicroPython is built -#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_B) -#define MICROPY_ALLOC_PATH_MAX (64) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (0) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (1) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (0) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) -#define MICROPY_NO_ALLOCA (1) - -// type definitions for the specific machine - -#define MP_ENDIANNESS_LITTLE (1) -#define MPZ_DIG_SIZE (8) - -// The xc16 compiler doesn't seem to respect alignment (!!) so we -// need to use instead an object representation that allows for -// 2-byte aligned pointers (see config setting above). -//#define MICROPY_OBJ_BASE_ALIGNMENT __attribute__((aligned(4))) - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p))) - -#define UINT_FMT "%u" -#define INT_FMT "%d" -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size - -typedef int mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// extra builtin names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra builtin modules to add to the list of known ones -extern const struct _mp_obj_module_t pyb_module; -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - char *readline_hist[8]; \ - mp_obj_t keyboard_interrupt_obj; \ - -#define MICROPY_MPHALPORT_H "pic16bit_mphal.h" -#define MICROPY_HW_BOARD_NAME "dsPICSK" -#define MICROPY_HW_MCU_NAME "dsPIC33" - -// XC16 toolchain doesn't seem to define these -typedef int intptr_t; -typedef unsigned int uintptr_t; diff --git a/ports/pic16bit/pic16bit_mphal.c b/ports/pic16bit/pic16bit_mphal.c deleted file mode 100644 index 35955f2d3e..0000000000 --- a/ports/pic16bit/pic16bit_mphal.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "py/mphal.h" -#include "board.h" - -static int interrupt_char; - -void mp_hal_init(void) { - MP_STATE_PORT(keyboard_interrupt_obj) = mp_obj_new_exception(&mp_type_KeyboardInterrupt); -} - -mp_uint_t mp_hal_ticks_ms(void) { - // TODO - return 0; -} - -void mp_hal_delay_ms(mp_uint_t ms) { - // tuned for fixed CPU frequency - for (int i = ms; i > 0; i--) { - for (volatile int j = 0; j < 5000; j++) { - } - } -} - -void mp_hal_set_interrupt_char(int c) { - interrupt_char = c; -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - if (uart_rx_any()) { - return uart_rx_char(); - } - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - for (; len > 0; --len) { - uart_tx_char(*str++); - } -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - for (; len > 0; --len) { - if (*str == '\n') { - uart_tx_char('\r'); - } - uart_tx_char(*str++); - } -} diff --git a/ports/pic16bit/qstrdefsport.h b/ports/pic16bit/qstrdefsport.h deleted file mode 100644 index 3ba897069b..0000000000 --- a/ports/pic16bit/qstrdefsport.h +++ /dev/null @@ -1 +0,0 @@ -// qstrs specific to this port diff --git a/ports/pic16bit/unistd.h b/ports/pic16bit/unistd.h deleted file mode 100644 index 23c5e54c75..0000000000 --- a/ports/pic16bit/unistd.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef MICROPY_INCLUDED_PIC16BIT_UNISTD_H -#define MICROPY_INCLUDED_PIC16BIT_UNISTD_H - -// XC16 compiler doesn't seem to have unistd.h file - -#define SEEK_SET 0 -#define SEEK_CUR 1 - -typedef int ssize_t; - -#endif // MICROPY_INCLUDED_PIC16BIT_UNISTD_H diff --git a/ports/qemu-arm/Makefile b/ports/qemu-arm/Makefile deleted file mode 100644 index 6c4a74620b..0000000000 --- a/ports/qemu-arm/Makefile +++ /dev/null @@ -1,117 +0,0 @@ -include ../../py/mkenv.mk --include mpconfigport.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -CROSS_COMPILE = arm-none-eabi- - -TINYTEST = $(TOP)/lib/tinytest - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(TINYTEST) - -CFLAGS_CORTEX_M3 = -mthumb -mcpu=cortex-m3 -mfloat-abi=soft -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 $(CFLAGS_CORTEX_M3) $(COPT) \ - -ffunction-sections -fdata-sections - -#Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -DPENDSV_DEBUG -COPT = -O0 -else -COPT += -Os -DNDEBUG -endif - -## With CoudeSourcery it's actually a little different, you just need `-T generic-m-hosted.ld`. -## Although for some reason `$(LD)` will not find that linker script, it works with `$(CC)`. -## It turns out that this is specific to CoudeSourcery, and ARM version of GCC ships something -## else instead and according to the following files, this is what we need to pass to `$(CC). -## - gcc-arm-none-eabi-4_8-2014q1/share/gcc-arm-none-eabi/samples/src/makefile.conf -## - gcc-arm-none-eabi-4_8-2014q1/share/gcc-arm-none-eabi/samples/src/qemu/Makefile -LDFLAGS= --specs=nano.specs --specs=rdimon.specs -Wl,--gc-sections -Wl,-Map=$(@:.elf=.map) - -SRC_COMMON_C = \ - moduos.c \ - modmachine.c \ - -SRC_RUN_C = \ - main.c \ - -SRC_TEST_C = \ - test_main.c \ - -LIB_SRC_C += $(addprefix lib/,\ - libm/math.c \ - libm/fmodf.c \ - libm/nearbyintf.c \ - libm/ef_sqrt.c \ - libm/kf_rem_pio2.c \ - libm/kf_sin.c \ - libm/kf_cos.c \ - libm/kf_tan.c \ - libm/ef_rem_pio2.c \ - libm/sf_sin.c \ - libm/sf_cos.c \ - libm/sf_tan.c \ - libm/sf_frexp.c \ - libm/sf_modf.c \ - libm/sf_ldexp.c \ - libm/asinfacosf.c \ - libm/atanf.c \ - libm/atan2f.c \ - utils/sys_stdio_mphal.c \ - ) - -OBJ_COMMON = -OBJ_COMMON += $(PY_O) -OBJ_COMMON += $(addprefix $(BUILD)/, $(SRC_COMMON_C:.c=.o)) -OBJ_COMMON += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) - -OBJ_RUN = -OBJ_RUN += $(addprefix $(BUILD)/, $(SRC_RUN_C:.c=.o)) - -OBJ_TEST = -OBJ_TEST += $(addprefix $(BUILD)/, $(SRC_TEST_C:.c=.o)) -OBJ_TEST += $(BUILD)/tinytest.o - -# All object files, needed to get dependencies correct -OBJ = $(OBJ_COMMON) $(OBJ_RUN) $(OBJ_TEST) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_COMMON_C) $(SRC_RUN_C) $(LIB_SRC_C) - -all: run - -run: $(BUILD)/firmware.elf - qemu-system-arm -machine integratorcp -cpu cortex-m3 -nographic -monitor null -serial null -semihosting -kernel $(BUILD)/firmware.elf - -test: $(BUILD)/firmware-test.elf - qemu-system-arm -machine integratorcp -cpu cortex-m3 -nographic -monitor null -serial null -semihosting -kernel $(BUILD)/firmware-test.elf > $(BUILD)/console.out - $(Q)tail -n2 $(BUILD)/console.out - $(Q)tail -n1 $(BUILD)/console.out | grep -q "status: 0" - -.PHONY: $(BUILD)/genhdr/tests.h - -$(BUILD)/test_main.o: $(BUILD)/genhdr/tests.h -$(BUILD)/genhdr/tests.h: - $(Q)echo "Generating $@";(cd $(TOP)/tests; ../tools/tinytest-codegen.py) > $@ - -$(BUILD)/tinytest.o: - $(Q)$(CC) $(CFLAGS) -DNO_FORKING -o $@ -c $(TOP)/tools/tinytest/tinytest.c - -## `$(LD)` doesn't seem to like `--specs` for some reason, but we can just use `$(CC)` here. -$(BUILD)/firmware.elf: $(OBJ_COMMON) $(OBJ_RUN) - $(Q)$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -$(BUILD)/firmware-test.elf: $(OBJ_COMMON) $(OBJ_TEST) - $(Q)$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -include $(TOP)/py/mkrules.mk diff --git a/ports/qemu-arm/Makefile.test b/ports/qemu-arm/Makefile.test deleted file mode 100644 index a9aace6d07..0000000000 --- a/ports/qemu-arm/Makefile.test +++ /dev/null @@ -1,24 +0,0 @@ -LIB_SRC_C = lib/upytesthelper/upytesthelper.c - -include Makefile - -CFLAGS += -DTEST - -.PHONY: $(BUILD)/genhdr/tests.h - -$(BUILD)/test_main.o: $(BUILD)/genhdr/tests.h -$(BUILD)/genhdr/tests.h: - (cd $(TOP)/tests; ./run-tests --write-exp) - $(Q)echo "Generating $@";(cd $(TOP)/tests; ../tools/tinytest-codegen.py) > $@ - -$(BUILD)/tinytest.o: - $(Q)$(CC) $(CFLAGS) -DNO_FORKING -o $@ -c $(TINYTEST)/tinytest.c - -$(BUILD)/firmware-test.elf: $(OBJ_COMMON) $(OBJ_TEST) - $(Q)$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -test: $(BUILD)/firmware-test.elf - qemu-system-arm -machine integratorcp -cpu cortex-m3 -nographic -monitor null -serial null -semihosting -kernel $(BUILD)/firmware-test.elf > $(BUILD)/console.out - $(Q)tail -n2 $(BUILD)/console.out - $(Q)tail -n1 $(BUILD)/console.out | grep -q "status: 0" diff --git a/ports/qemu-arm/README.md b/ports/qemu-arm/README.md deleted file mode 100644 index 4f1e79b101..0000000000 --- a/ports/qemu-arm/README.md +++ /dev/null @@ -1,27 +0,0 @@ -This is experimental, community-supported port for Cortex-M emulation as -provided by QEMU (http://qemu.org). - -The purposes of this port are to enable: - -1. Continuous integration - - run tests against architecture-specific parts of code base -2. Experimentation - - simulation & prototyping of anything that has architecture-specific - code - - exploring instruction set in terms of optimising some part of - MicroPython or a module -3. Streamlined debugging - - no need for JTAG or even an MCU chip itself - - no need to use OpenOCD or anything else that might slow down the - process in terms of plugging things together, pressing buttons, etc. - -This port will only work with with [GCC ARM Embedded](launchpad.net/gcc-arm-embedded) -toolchain and not with CodeSourcery toolchain. You will need to modify -`LDFLAGS` if you want to use CodeSourcery's version of `arm-none-eabi`. -The difference is that CodeSourcery needs `-T generic-m-hosted.ld` while -ARM's version requires `--specs=nano.specs --specs=rdimon.specs` to be -passed to the linker. - -To build and run image with builtin testsuite: - - make -f Makefile.test test diff --git a/ports/qemu-arm/main.c b/ports/qemu-arm/main.c deleted file mode 100644 index d23ef576f9..0000000000 --- a/ports/qemu-arm/main.c +++ /dev/null @@ -1,60 +0,0 @@ -#include -#include -#include -#include -#include - -#include "py/obj.h" -#include "py/compile.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/repl.h" -#include "py/mperrno.h" - -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} - -int main(int argc, char **argv) { - mp_stack_ctrl_init(); - mp_stack_set_limit(10240); - void *heap = malloc(16 * 1024); - gc_init(heap, (char*)heap + 16 * 1024); - mp_init(); - do_str("print('hello world!')", MP_PARSE_SINGLE_INPUT); - mp_deinit(); - return 0; -} - -void gc_collect(void) { -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - printf("uncaught NLR\n"); - exit(1); -} diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c deleted file mode 100644 index 0f66349a8b..0000000000 --- a/ports/qemu-arm/modmachine.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "extmod/machine_mem.h" -#include "extmod/machine_pinbase.h" -#include "extmod/machine_signal.h" - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; diff --git a/ports/qemu-arm/moduos.c b/ports/qemu-arm/moduos.c deleted file mode 100644 index a48b51db01..0000000000 --- a/ports/qemu-arm/moduos.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "extmod/vfs.h" - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&mp_vfs_rename_obj) }, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) }, - - // MicroPython extensions - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t mp_module_uos = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/qemu-arm/mpconfigport.h b/ports/qemu-arm/mpconfigport.h deleted file mode 100644 index dbfc395af2..0000000000 --- a/ports/qemu-arm/mpconfigport.h +++ /dev/null @@ -1,79 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_ALLOC_PATH_MAX (512) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (1) -#define MICROPY_EMIT_INLINE_THUMB (1) -#define MICROPY_MALLOC_USES_ALLOCATED_SIZE (1) -#define MICROPY_MEM_STATS (1) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_HELPER_REPL (0) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_WARNINGS (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_USE_INTERNAL_PRINTF (0) -#define MICROPY_VFS (1) - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%lu" -#define INT_FMT "%ld" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#include -#define MP_PLAT_PRINT_STRN(str, len) write(1, str, len) - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra built-in modules to add to the list of known ones -extern const struct _mp_obj_module_t mp_module_uos; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) }, \ - -// We need to provide a declaration/definition of alloca() -#include - -#ifdef TEST -#include "lib/upytesthelper/upytesthelper.h" -#undef MP_PLAT_PRINT_STRN -#define MP_PLAT_PRINT_STRN(str, len) upytest_output(str, len) -#endif diff --git a/ports/qemu-arm/mphalport.h b/ports/qemu-arm/mphalport.h deleted file mode 100644 index d996402ae4..0000000000 --- a/ports/qemu-arm/mphalport.h +++ /dev/null @@ -1,2 +0,0 @@ -#define mp_hal_stdin_rx_chr() (0) -#define mp_hal_stdout_tx_strn_cooked(s, l) write(1, (s), (l)) diff --git a/ports/qemu-arm/qstrdefsport.h b/ports/qemu-arm/qstrdefsport.h deleted file mode 100644 index 3ba897069b..0000000000 --- a/ports/qemu-arm/qstrdefsport.h +++ /dev/null @@ -1 +0,0 @@ -// qstrs specific to this port diff --git a/ports/qemu-arm/test_main.c b/ports/qemu-arm/test_main.c deleted file mode 100644 index adbdf04e18..0000000000 --- a/ports/qemu-arm/test_main.c +++ /dev/null @@ -1,64 +0,0 @@ -#include -#include -#include -#include -#include -#include - -#include "py/obj.h" -#include "py/compile.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/mperrno.h" - -#include "tinytest.h" -#include "tinytest_macros.h" - -#define HEAP_SIZE (128 * 1024) -STATIC void *heap; - -#include "genhdr/tests.h" - -int main() { - mp_stack_ctrl_init(); - mp_stack_set_limit(10240); - heap = malloc(HEAP_SIZE); - upytest_set_heap(heap, (char*)heap + HEAP_SIZE); - int r = tinytest_main(0, NULL, groups); - printf("status: %d\n", r); - return r; -} - -void gc_collect(void) { - gc_collect_start(); - - // get the registers and the sp - jmp_buf env; - setjmp(env); - volatile mp_uint_t dummy; - void *sp = (void*)&dummy; - - // trace the stack, including the registers (since they live on the stack in this function) - gc_collect_root((void**)sp, ((uint32_t)MP_STATE_THREAD(stack_top) - (uint32_t)sp) / sizeof(uint32_t)); - - gc_collect_end(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - printf("uncaught NLR\n"); - exit(1); -} diff --git a/ports/stm32/.gitignore b/ports/stm32/.gitignore deleted file mode 100644 index 414487d53e..0000000000 --- a/ports/stm32/.gitignore +++ /dev/null @@ -1 +0,0 @@ -build-*/ diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile deleted file mode 100644 index bedfa70091..0000000000 --- a/ports/stm32/Makefile +++ /dev/null @@ -1,589 +0,0 @@ -# Select the board to build for: if not given on the command line, -# then default to PYBV10. -BOARD ?= PYBV10 -ifeq ($(wildcard boards/$(BOARD)/.),) -$(error Invalid BOARD specified) -endif - -# If the build directory is not given, make it reflect the board name. -BUILD ?= build-$(BOARD) - -include ../../py/mkenv.mk --include mpconfigport.mk -include boards/$(BOARD)/mpconfigboard.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h $(BUILD)/modstm_qstr.h -QSTR_GLOBAL_DEPENDENCIES = mpconfigboard_common.h boards/$(BOARD)/mpconfigboard.h - -# directory containing scripts to be frozen as bytecode -FROZEN_MPY_DIR ?= modules - -# include py core make definitions -include $(TOP)/py/py.mk - -LD_DIR=boards -CMSIS_DIR=$(TOP)/lib/stm32lib/CMSIS/STM32$(MCU_SERIES_UPPER)xx/Include -MCU_SERIES_UPPER = $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]') -HAL_DIR=lib/stm32lib/STM32$(MCU_SERIES_UPPER)xx_HAL_Driver -USBDEV_DIR=usbdev -#USBHOST_DIR=usbhost -FATFS_DIR=lib/oofatfs -DFU=$(TOP)/tools/dfu.py -# may need to prefix dfu-util with sudo -USE_PYDFU ?= 1 -PYDFU ?= $(TOP)/tools/pydfu.py -DFU_UTIL ?= dfu-util -DEVICE=0483:df11 -STFLASH ?= st-flash -OPENOCD ?= openocd -OPENOCD_CONFIG ?= boards/openocd_stm32f4.cfg -STARTUP_FILE ?= boards/startup_stm32$(MCU_SERIES).o - -CROSS_COMPILE = arm-none-eabi- - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(TOP)/lib/cmsis/inc -INC += -I$(CMSIS_DIR)/ -INC += -I$(TOP)/$(HAL_DIR)/Inc -INC += -I$(USBDEV_DIR)/core/inc -I$(USBDEV_DIR)/class/inc -#INC += -I$(USBHOST_DIR) - -# Basic Cortex-M flags -CFLAGS_CORTEX_M = -mthumb - -# Select hardware floating-point support -ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32F767xx STM32F769xx STM32H743xx)) -CFLAGS_CORTEX_M += -mfpu=fpv5-d16 -mfloat-abi=hard -else -ifeq ($(MCU_SERIES),f0) -CFLAGS_CORTEX_M += -msoft-float -else -CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard -endif -endif - -# Options for particular MCU series -CFLAGS_MCU_f0 = $(CFLAGS_CORTEX_M) -mtune=cortex-m0 -mcpu=cortex-m0 -CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7 -CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -CFLAGS_MCU_h7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7 - -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA) -CFLAGS += -D$(CMSIS_MCU) -CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES)) -CFLAGS += $(COPT) -CFLAGS += -Iboards/$(BOARD) -CFLAGS += -DSTM32_HAL_H='' -CFLAGS += -DMICROPY_HW_VTOR=$(TEXT0_ADDR) - -ifeq ($(MICROPY_FLOAT_IMPL),double) -CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE -else -CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT -CFLAGS += -fsingle-precision-constant -Wdouble-promotion -endif - -LDFLAGS = -nostdlib -L $(LD_DIR) $(addprefix -T,$(LD_FILES)) -Map=$(@:.elf=.map) --cref -LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) - -# Remove uncalled code from the final image. -CFLAGS += -fdata-sections -ffunction-sections -LDFLAGS += --gc-sections - -# Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -DPENDSV_DEBUG -COPT = -O0 -else -COPT += -Os -DNDEBUG -endif - -SRC_LIB = $(addprefix lib/,\ - libc/string0.c \ - oofatfs/ff.c \ - oofatfs/option/unicode.c \ - mp-readline/builtin_input.c \ - mp-readline/readline.c \ - netutils/netutils.c \ - timeutils/timeutils.c \ - utils/pyexec.c \ - utils/interrupt_char.c \ - utils/sys_stdio_mphal.c \ - ) - -ifeq ($(MICROPY_FLOAT_IMPL),double) -SRC_LIBM = $(addprefix lib/libm_dbl/,\ - __cos.c \ - __expo2.c \ - __fpclassify.c \ - __rem_pio2.c \ - __rem_pio2_large.c \ - __signbit.c \ - __sin.c \ - __tan.c \ - acos.c \ - acosh.c \ - asin.c \ - asinh.c \ - atan.c \ - atan2.c \ - atanh.c \ - ceil.c \ - cos.c \ - cosh.c \ - erf.c \ - exp.c \ - expm1.c \ - floor.c \ - fmod.c \ - frexp.c \ - ldexp.c \ - lgamma.c \ - log.c \ - log10.c \ - log1p.c \ - modf.c \ - nearbyint.c \ - pow.c \ - rint.c \ - scalbn.c \ - sin.c \ - sinh.c \ - sqrt.c \ - tan.c \ - tanh.c \ - tgamma.c \ - trunc.c \ - ) -else -SRC_LIBM = $(addprefix lib/libm/,\ - math.c \ - acoshf.c \ - asinfacosf.c \ - asinhf.c \ - atan2f.c \ - atanf.c \ - atanhf.c \ - ef_rem_pio2.c \ - erf_lgamma.c \ - fmodf.c \ - kf_cos.c \ - kf_rem_pio2.c \ - kf_sin.c \ - kf_tan.c \ - log1pf.c \ - nearbyintf.c \ - sf_cos.c \ - sf_erf.c \ - sf_frexp.c \ - sf_ldexp.c \ - sf_modf.c \ - sf_sin.c \ - sf_tan.c \ - wf_lgamma.c \ - wf_tgamma.c \ - ) -ifeq ($(MCU_SERIES),f0) -SRC_LIBM += lib/libm/ef_sqrt.c -else -SRC_LIBM += lib/libm/thumb_vfp_sqrtf.c -endif -endif - -EXTMOD_SRC_C = $(addprefix extmod/,\ - modlwip.c \ - modonewire.c \ - ) - -DRIVERS_SRC_C = $(addprefix drivers/,\ - bus/softspi.c \ - bus/softqspi.c \ - memory/spiflash.c \ - dht/dht.c \ - ) - -SRC_C = \ - main.c \ - stm32_it.c \ - usbd_conf.c \ - usbd_desc.c \ - usbd_cdc_interface.c \ - usbd_hid_interface.c \ - usbd_msc_storage.c \ - mphalport.c \ - mpthreadport.c \ - irq.c \ - pendsv.c \ - systick.c \ - pybthread.c \ - timer.c \ - led.c \ - pin.c \ - pin_defs_stm32.c \ - pin_named_pins.c \ - bufhelper.c \ - dma.c \ - i2c.c \ - pyb_i2c.c \ - spi.c \ - qspi.c \ - uart.c \ - can.c \ - usb.c \ - wdt.c \ - gccollect.c \ - help.c \ - machine_i2c.c \ - modmachine.c \ - modpyb.c \ - modstm.c \ - moduos.c \ - modutime.c \ - modusocket.c \ - modnetwork.c \ - extint.c \ - usrsw.c \ - rng.c \ - rtc.c \ - flash.c \ - flashbdev.c \ - spibdev.c \ - storage.c \ - sdcard.c \ - fatfs_port.c \ - lcd.c \ - accel.c \ - servo.c \ - dac.c \ - adc.c \ - $(wildcard boards/$(BOARD)/*.c) - -ifeq ($(MCU_SERIES),f0) -SRC_O = \ - $(STARTUP_FILE) \ - system_stm32f0.o \ - resethandler_m0.o \ - gchelper_m0.o -else -SRC_O = \ - $(STARTUP_FILE) \ - system_stm32.o \ - resethandler.o \ - gchelper.o -endif - -SRC_HAL = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\ - hal.c \ - hal_adc.c \ - hal_adc_ex.c \ - hal_cortex.c \ - hal_dac.c \ - hal_dac_ex.c \ - hal_dma.c \ - hal_flash.c \ - hal_flash_ex.c \ - hal_gpio.c \ - hal_i2c.c \ - hal_pcd.c \ - hal_pcd_ex.c \ - hal_pwr.c \ - hal_pwr_ex.c \ - hal_rcc.c \ - hal_rcc_ex.c \ - hal_rtc.c \ - hal_rtc_ex.c \ - hal_spi.c \ - hal_tim.c \ - hal_tim_ex.c \ - hal_uart.c \ - ) - -ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 h7 l4)) -SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\ - hal_sd.c \ - ll_sdmmc.c \ - ll_usb.c \ - ) -endif - -ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32H743xx)) - SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_, hal_fdcan.c) -else - SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_, hal_can.c) -endif - -SRC_USBDEV = $(addprefix $(USBDEV_DIR)/,\ - core/src/usbd_core.c \ - core/src/usbd_ctlreq.c \ - core/src/usbd_ioreq.c \ - class/src/usbd_cdc_msc_hid.c \ - class/src/usbd_msc_bot.c \ - class/src/usbd_msc_scsi.c \ - class/src/usbd_msc_data.c \ - ) - -ifneq ($(MICROPY_PY_WIZNET5K),0) -WIZNET5K_DIR=drivers/wiznet5k -INC += -I$(TOP)/$(WIZNET5K_DIR) -CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) -SRC_MOD += network_wiznet5k.c modnwwiznet5k.c -SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ - ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ - ethernet/wizchip_conf.c \ - ethernet/socket.c \ - internet/dns/dns.c \ - ) -endif - -# for CC3000 module -ifeq ($(MICROPY_PY_CC3K),1) -CC3000_DIR=drivers/cc3000 -INC += -I$(TOP)/$(CC3000_DIR)/inc -CFLAGS_MOD += -DMICROPY_PY_CC3K=1 -SRC_MOD += modnwcc3k.c -SRC_MOD += $(addprefix $(CC3000_DIR)/src/,\ - cc3000_common.c \ - evnt_handler.c \ - hci.c \ - netapp.c \ - nvmem.c \ - security.c \ - socket.c \ - wlan.c \ - ccspi.c \ - inet_ntop.c \ - inet_pton.c \ - patch.c \ - patch_prog.c \ - ) -endif - -LWIP_DIR = lib/lwip/src -INC += -I$(TOP)/$(LWIP_DIR)/include -Ilwip_inc -$(BUILD)/$(LWIP_DIR)/core/ipv4/dhcp.o: CFLAGS += -Wno-address -SRC_MOD += $(addprefix $(LWIP_DIR)/,\ - core/def.c \ - core/dns.c \ - core/inet_chksum.c \ - core/init.c \ - core/ip.c \ - core/mem.c \ - core/memp.c \ - core/netif.c \ - core/pbuf.c \ - core/raw.c \ - core/stats.c \ - core/sys.c \ - core/tcp.c \ - core/tcp_in.c \ - core/tcp_out.c \ - core/timeouts.c \ - core/udp.c \ - core/ipv4/autoip.c \ - core/ipv4/dhcp.c \ - core/ipv4/etharp.c \ - core/ipv4/icmp.c \ - core/ipv4/igmp.c \ - core/ipv4/ip4_addr.c \ - core/ipv4/ip4.c \ - core/ipv4/ip4_frag.c \ - core/ipv6/dhcp6.c \ - core/ipv6/ethip6.c \ - core/ipv6/icmp6.c \ - core/ipv6/inet6.c \ - core/ipv6/ip6_addr.c \ - core/ipv6/ip6.c \ - core/ipv6/ip6_frag.c \ - core/ipv6/mld6.c \ - core/ipv6/nd6.c \ - netif/ethernet.c \ - ) - -OBJ = -OBJ += $(PY_O) -OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_O)) -OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) -OBJ += $(BUILD)/pins_$(BOARD).o - -# This file contains performance critical functions so turn up the optimisation -# level. It doesn't add much to the code size and improves performance a bit. -# Don't use -O3 with this file because gcc tries to optimise memset in terms of itself. -$(BUILD)/lib/libc/string0.o: COPT += -O2 - -# We put several files into the first 16K section with the ISRs. -# If we compile these using -O0 then it won't fit. So if you really want these -# to be compiled with -O0, then edit boards/common.ld (in the .isr_vector section) -# and comment out the following lines. -$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os -$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os -$(PY_BUILD)/formatfloat.o: COPT += -Os -$(PY_BUILD)/parsenum.o: COPT += -Os -$(PY_BUILD)/mpprint.o: COPT += -Os - -all: $(TOP)/lib/stm32lib/README.md $(BUILD)/firmware.dfu $(BUILD)/firmware.hex - -# For convenience, automatically fetch required submodules if they don't exist -$(TOP)/lib/stm32lib/README.md: - $(ECHO) "stm32lib submodule not found, fetching it now..." - (cd $(TOP) && git submodule update --init lib/stm32lib) - -ifneq ($(FROZEN_DIR),) -# To use frozen source modules, put your .py files in a subdirectory (eg scripts/) -# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch). -CFLAGS += -DMICROPY_MODULE_FROZEN_STR -endif - -ifneq ($(FROZEN_MPY_DIR),) -# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and -# then invoke make with FROZEN_MPY_DIR=frozen (be sure to build from scratch). -CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool -CFLAGS += -DMICROPY_MODULE_FROZEN_MPY -endif - -.PHONY: deploy - -deploy: $(BUILD)/firmware.dfu - $(ECHO) "Writing $< to the board" -ifeq ($(USE_PYDFU),1) - $(Q)$(PYTHON) $(PYDFU) -u $< -else - $(Q)$(DFU_UTIL) -a 0 -d $(DEVICE) -D $< -endif - -# A board should specify TEXT0_ADDR if to use a different location than the -# default for the firmware memory location. A board can also optionally define -# TEXT1_ADDR to split the firmware into two sections; see below for details. -TEXT0_ADDR ?= 0x08000000 - -ifeq ($(TEXT1_ADDR),) -# No TEXT1_ADDR given so put all firmware at TEXT0_ADDR location - -deploy-stlink: $(BUILD)/firmware.dfu - $(ECHO) "Writing $(BUILD)/firmware.bin to the board via ST-LINK" - $(Q)$(STFLASH) write $(BUILD)/firmware.bin $(TEXT0_ADDR) - -deploy-openocd: $(BUILD)/firmware.dfu - $(ECHO) "Writing $(BUILD)/firmware.bin to the board via ST-LINK using OpenOCD" - $(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware.bin $(TEXT0_ADDR)" - -$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin - $(Q)$(PYTHON) $(DFU) -b $(TEXT0_ADDR):$(BUILD)/firmware.bin $@ - -else -# TEXT0_ADDR and TEXT1_ADDR are specified so split firmware between these locations - -deploy-stlink: $(BUILD)/firmware.dfu - $(ECHO) "Writing $(BUILD)/firmware0.bin to the board via ST-LINK" - $(Q)$(STFLASH) write $(BUILD)/firmware0.bin $(TEXT0_ADDR) - $(ECHO) "Writing $(BUILD)/firmware1.bin to the board via ST-LINK" - $(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin $(TEXT1_ADDR) - -deploy-openocd: $(BUILD)/firmware.dfu - $(ECHO) "Writing $(BUILD)/firmware{0,1}.bin to the board via ST-LINK using OpenOCD" - $(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware0.bin $(TEXT0_ADDR) $(BUILD)/firmware1.bin $(TEXT1_ADDR)" - -$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf - $(ECHO) "GEN $@" - $(Q)$(OBJCOPY) -O binary -j .isr_vector $^ $(BUILD)/firmware0.bin - $(Q)$(OBJCOPY) -O binary -j .text -j .data $^ $(BUILD)/firmware1.bin - $(Q)$(PYTHON) $(DFU) -b $(TEXT0_ADDR):$(BUILD)/firmware0.bin -b $(TEXT1_ADDR):$(BUILD)/firmware1.bin $@ - -endif - -$(BUILD)/firmware.hex: $(BUILD)/firmware.elf - $(ECHO) "GEN $@" - $(Q)$(OBJCOPY) -O ihex $< $@ - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -PLLVALUES = boards/pllvalues.py -MAKE_PINS = boards/make-pins.py -BOARD_PINS = boards/$(BOARD)/pins.csv -PREFIX_FILE = boards/stm32f4xx_prefix.c -GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c -GEN_PINS_HDR = $(HEADER_BUILD)/pins.h -GEN_PINS_QSTR = $(BUILD)/pins_qstr.h -GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h -GEN_PINS_AF_PY = $(BUILD)/pins_af.py - -INSERT_USB_IDS = $(TOP)/tools/insert-usb-ids.py -FILE2H = $(TOP)/tools/file2h.py - -USB_IDS_FILE = usb.h -CDCINF_TEMPLATE = pybcdc.inf_template -GEN_CDCINF_FILE = $(HEADER_BUILD)/pybcdc.inf -GEN_CDCINF_HEADER = $(HEADER_BUILD)/pybcdc_inf.h - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(SRC_MOD) $(SRC_LIB) $(EXTMOD_SRC_C) -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += $(GEN_CDCINF_HEADER) - -# Making OBJ use an order-only depenedency on the generated pins.h file -# has the side effect of making the pins.h file before we actually compile -# any of the objects. The normal dependency generation will deal with the -# case when pins.h is modified. But when it doesn't exist, we don't know -# which source files might need it. -$(OBJ): | $(GEN_PINS_HDR) - -# With conditional pins, we may need to regenerate qstrdefs.h when config -# options change. -$(HEADER_BUILD)/qstrdefs.generated.h: boards/$(BOARD)/mpconfigboard.h - -# main.c can't be even preprocessed without $(GEN_CDCINF_HEADER) -main.c: $(GEN_CDCINF_HEADER) - -# Use a pattern rule here so that make will only call make-pins.py once to make -# both pins_$(BOARD).c and pins.h -$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD) - $(ECHO) "GEN $@" - $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC) - -$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c - $(call compile_c) - -GEN_PLLFREQTABLE_HDR = $(HEADER_BUILD)/pllfreqtable.h -GEN_STMCONST_HDR = $(HEADER_BUILD)/modstm_const.h -GEN_STMCONST_QSTR = $(BUILD)/modstm_qstr.h -GEN_STMCONST_MPZ = $(HEADER_BUILD)/modstm_mpz.h -CMSIS_MCU_LOWER = $(shell echo $(CMSIS_MCU) | tr '[:upper:]' '[:lower:]') -CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h - -modmachine.c: $(GEN_PLLFREQTABLE_HDR) -$(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD) - $(ECHO) "GEN $@" - $(Q)$(PYTHON) $(PLLVALUES) -c file:boards/$(BOARD)/stm32$(MCU_SERIES)xx_hal_conf.h > $@ - -$(BUILD)/modstm.o: $(GEN_STMCONST_HDR) -# Use a pattern rule here so that make will only call make-stmconst.py once to -# make both modstm_const.h and modstm_qstr.h -$(HEADER_BUILD)/%_const.h $(BUILD)/%_qstr.h: $(CMSIS_MCU_HDR) make-stmconst.py | $(HEADER_BUILD) - $(ECHO) "GEN stmconst $@" - $(Q)$(PYTHON) make-stmconst.py --qstr $(GEN_STMCONST_QSTR) --mpz $(GEN_STMCONST_MPZ) $(CMSIS_MCU_HDR) > $(GEN_STMCONST_HDR) - -$(GEN_CDCINF_HEADER): $(GEN_CDCINF_FILE) $(FILE2H) | $(HEADER_BUILD) - $(ECHO) "GEN $@" - $(Q)$(PYTHON) $(FILE2H) $< > $@ - -$(GEN_CDCINF_FILE): $(CDCINF_TEMPLATE) $(INSERT_USB_IDS) $(USB_IDS_FILE) | $(HEADER_BUILD) - $(ECHO) "GEN $@" - $(Q)$(PYTHON) $(INSERT_USB_IDS) $(USB_IDS_FILE) $< > $@ - -include $(TOP)/py/mkrules.mk diff --git a/ports/stm32/README.md b/ports/stm32/README.md deleted file mode 100644 index a0c3b7ff39..0000000000 --- a/ports/stm32/README.md +++ /dev/null @@ -1,121 +0,0 @@ -MicroPython port to STM32 MCUs -============================== - -This directory contains the port of MicroPython to ST's line of STM32 -microcontrollers. Supported MCU series are: STM32F0, STM32F4, STM32F7 and -STM32L4. Parts of the code here utilise the STM32Cube HAL library. - -The officially supported boards are the line of pyboards: PYBv1.0 and PYBv1.1 -(both with STM32F405), and PYBLITEv1.0 (with STM32F411). See -[micropython.org/pyboard](http://www.micropython.org/pyboard/) for further -details. - -Other boards that are supported include ST Discovery and Nucleo boards. -See the boards/ subdirectory, which contains the configuration files used -to build each individual board. - -The STM32H7 series has preliminary support: there is a working REPL via -USB and UART, as well as very basic peripheral support, but some things do -not work and none of the advanced features of the STM32H7 are yet supported, -such as the clock tree. At this point the STM32H7 should be considered as a -fast version of the STM32F7. - -Build instructions ------------------- - -Before building the firmware for a given board the MicroPython cross-compiler -must be built; it will be used to pre-compile some of the built-in scripts to -bytecode. The cross-compiler is built and run on the host machine, using: -```bash -$ make -C mpy-cross -``` -This command should be executed from the root directory of this repository. -All other commands below should be executed from the ports/stm32/ directory. - -An ARM compiler is required for the build, along with the associated binary -utilities. The default compiler is `arm-none-eabi-gcc`, which is available for -Arch Linux via the package `arm-none-eabi-gcc`, for Ubuntu via instructions -[here](https://launchpad.net/~team-gcc-arm-embedded/+archive/ubuntu/ppa), or -see [here](https://launchpad.net/gcc-arm-embedded) for the main GCC ARM -Embedded page. The compiler can be changed using the `CROSS_COMPILE` variable -when invoking `make`. - -To build for a given board, run: - - $ make BOARD=PYBV11 - -The default board is PYBV10 but any of the names of the subdirectories in the -`boards/` directory can be passed as the argument to `BOARD=`. The above command -should produce binary images in the `build-PYBV11/` subdirectory (or the -equivalent directory for the board specified). - -You must then get your board/microcontroller into DFU mode. On the pyboard -connect the 3V3 pin to the P1/DFU pin with a wire (they are next to each -other on the bottom left of the board, second row from the bottom) and then -reset (by pressing the RST button) or power on the board. Then flash the -firmware using the command: - - $ make BOARD=PYBV11 deploy - -This will use the included `tools/pydfu.py` script. You can use instead the -`dfu-util` program (available [here](http://dfu-util.sourceforge.net/)) by -passing `USE_PYDFU=0`: - - $ make BOARD=PYBV11 USE_PYDFU=0 deploy - -If flashing the firmware does not work it may be because you don't have the -correct permissions. Try then: - - $ sudo make BOARD=PYBV11 deploy - -Or using `dfu-util` directly: - - $ sudo dfu-util -a 0 -d 0483:df11 -D build-PYBV11/firmware.dfu - - -### Flashing the Firmware with stlink - -ST Discovery or Nucleo boards have a builtin programmer called ST-LINK. With -these boards and using Linux or OS X, you have the option to upload the -`stm32` firmware using the `st-flash` utility from the -[stlink](https://github.com/texane/stlink) project. To do so, connect the board -with a mini USB cable to its ST-LINK USB port and then use the make target -`deploy-stlink`. For example, if you have the STM32F4DISCOVERY board, you can -run: - - $ make BOARD=STM32F4DISC deploy-stlink - -The `st-flash` program should detect the USB connection to the board -automatically. If not, run `lsusb` to determine its USB bus and device number -and set the `STLINK_DEVICE` environment variable accordingly, using the format -`:`. Example: - - $ lsusb - [...] - Bus 002 Device 035: ID 0483:3748 STMicroelectronics ST-LINK/V2 - $ export STLINK_DEVICE="002:0035" - $ make BOARD=STM32F4DISC deploy-stlink - - -### Flashing the Firmware with OpenOCD - -Another option to deploy the firmware on ST Discovery or Nucleo boards with a -ST-LINK interface uses [OpenOCD](http://openocd.org/). Connect the board with -a mini USB cable to its ST-LINK USB port and then use the make target -`deploy-openocd`. For example, if you have the STM32F4DISCOVERY board: - - $ make BOARD=STM32F4DISC deploy-openocd - -The `openocd` program, which writes the firmware to the target board's flash, -is configured via the file `ports/stm32/boards/openocd_stm32f4.cfg`. This -configuration should work for all boards based on a STM32F4xx MCU with a -ST-LINKv2 interface. You can override the path to this configuration by setting -`OPENOCD_CONFIG` in your Makefile or on the command line. - -Accessing the board -------------------- - -Once built and deployed, access the MicroPython REPL (the Python prompt) via USB -serial or UART, depending on the board. For the pyboard you can try: - - $ picocom /dev/ttyACM0 diff --git a/ports/stm32/accel.c b/ports/stm32/accel.c deleted file mode 100644 index 49674eb2da..0000000000 --- a/ports/stm32/accel.c +++ /dev/null @@ -1,226 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mphal.h" -#include "py/runtime.h" -#include "pin.h" -#include "i2c.h" -#include "accel.h" - -#if MICROPY_HW_HAS_MMA7660 - -/// \moduleref pyb -/// \class Accel - accelerometer control -/// -/// Accel is an object that controls the accelerometer. Example usage: -/// -/// accel = pyb.Accel() -/// for i in range(10): -/// print(accel.x(), accel.y(), accel.z()) -/// -/// Raw values are between -32 and 31. - -#define MMA_ADDR (76) -#define MMA_REG_X (0) -#define MMA_REG_Y (1) -#define MMA_REG_Z (2) -#define MMA_REG_TILT (3) -#define MMA_REG_MODE (7) -#define MMA_AXIS_SIGNED_VALUE(i) (((i) & 0x3f) | ((i) & 0x20 ? (~0x1f) : 0)) - -void accel_init(void) { - // PB5 is connected to AVDD; pull high to enable MMA accel device - mp_hal_pin_low(MICROPY_HW_MMA_AVDD_PIN); // turn off AVDD - mp_hal_pin_output(MICROPY_HW_MMA_AVDD_PIN); -} - -STATIC void accel_start(void) { - // start the I2C bus in master mode - i2c_init(I2C1, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA, 400000); - - // turn off AVDD, wait 30ms, turn on AVDD, wait 30ms again - mp_hal_pin_low(MICROPY_HW_MMA_AVDD_PIN); // turn off - mp_hal_delay_ms(30); - mp_hal_pin_high(MICROPY_HW_MMA_AVDD_PIN); // turn on - mp_hal_delay_ms(30); - - int ret; - for (int i = 0; i < 4; i++) { - ret = i2c_writeto(I2C1, MMA_ADDR, NULL, 0, true); - if (ret == 0) { - break; - } - } - - if (ret != 0) { - mp_raise_msg(&mp_type_OSError, "accelerometer not found"); - } - - // set MMA to active mode - uint8_t data[2] = {MMA_REG_MODE, 1}; // active mode - i2c_writeto(I2C1, MMA_ADDR, data, 2, true); - - // wait for MMA to become active - mp_hal_delay_ms(30); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -#define NUM_AXIS (3) -#define FILT_DEPTH (4) - -typedef struct _pyb_accel_obj_t { - mp_obj_base_t base; - int16_t buf[NUM_AXIS * FILT_DEPTH]; -} pyb_accel_obj_t; - -STATIC pyb_accel_obj_t pyb_accel_obj; - -/// \classmethod \constructor() -/// Create and return an accelerometer object. -/// -/// Note: if you read accelerometer values immediately after creating this object -/// you will get 0. It takes around 20ms for the first sample to be ready, so, -/// unless you have some other code between creating this object and reading its -/// values, you should put a `pyb.delay(20)` after creating it. For example: -/// -/// accel = pyb.Accel() -/// pyb.delay(20) -/// print(accel.x()) -STATIC mp_obj_t pyb_accel_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // init accel object - pyb_accel_obj.base.type = &pyb_accel_type; - accel_start(); - - return &pyb_accel_obj; -} - -STATIC mp_obj_t read_axis(int axis) { - uint8_t data[1] = { axis }; - i2c_writeto(I2C1, MMA_ADDR, data, 1, false); - i2c_readfrom(I2C1, MMA_ADDR, data, 1, true); - return mp_obj_new_int(MMA_AXIS_SIGNED_VALUE(data[0])); -} - -/// \method x() -/// Get the x-axis value. -STATIC mp_obj_t pyb_accel_x(mp_obj_t self_in) { - return read_axis(MMA_REG_X); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_x_obj, pyb_accel_x); - -/// \method y() -/// Get the y-axis value. -STATIC mp_obj_t pyb_accel_y(mp_obj_t self_in) { - return read_axis(MMA_REG_Y); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_y_obj, pyb_accel_y); - -/// \method z() -/// Get the z-axis value. -STATIC mp_obj_t pyb_accel_z(mp_obj_t self_in) { - return read_axis(MMA_REG_Z); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_z_obj, pyb_accel_z); - -/// \method tilt() -/// Get the tilt register. -STATIC mp_obj_t pyb_accel_tilt(mp_obj_t self_in) { - uint8_t data[1] = { MMA_REG_TILT }; - i2c_writeto(I2C1, MMA_ADDR, data, 1, false); - i2c_readfrom(I2C1, MMA_ADDR, data, 1, true); - return mp_obj_new_int(data[0]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_tilt_obj, pyb_accel_tilt); - -/// \method filtered_xyz() -/// Get a 3-tuple of filtered x, y and z values. -STATIC mp_obj_t pyb_accel_filtered_xyz(mp_obj_t self_in) { - pyb_accel_obj_t *self = self_in; - - memmove(self->buf, self->buf + NUM_AXIS, NUM_AXIS * (FILT_DEPTH - 1) * sizeof(int16_t)); - - uint8_t data[NUM_AXIS] = { MMA_REG_X }; - i2c_writeto(I2C1, MMA_ADDR, data, 1, false); - i2c_readfrom(I2C1, MMA_ADDR, data, 3, true); - - mp_obj_t tuple[NUM_AXIS]; - for (int i = 0; i < NUM_AXIS; i++) { - self->buf[NUM_AXIS * (FILT_DEPTH - 1) + i] = MMA_AXIS_SIGNED_VALUE(data[i]); - int32_t val = 0; - for (int j = 0; j < FILT_DEPTH; j++) { - val += self->buf[i + NUM_AXIS * j]; - } - tuple[i] = mp_obj_new_int(val); - } - - return mp_obj_new_tuple(3, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_filtered_xyz_obj, pyb_accel_filtered_xyz); - -STATIC mp_obj_t pyb_accel_read(mp_obj_t self_in, mp_obj_t reg) { - uint8_t data[1] = { mp_obj_get_int(reg) }; - i2c_writeto(I2C1, MMA_ADDR, data, 1, false); - i2c_writeto(I2C1, MMA_ADDR, data, 1, true); - return mp_obj_new_int(data[0]); -} -MP_DEFINE_CONST_FUN_OBJ_2(pyb_accel_read_obj, pyb_accel_read); - -STATIC mp_obj_t pyb_accel_write(mp_obj_t self_in, mp_obj_t reg, mp_obj_t val) { - uint8_t data[2] = { mp_obj_get_int(reg), mp_obj_get_int(val) }; - i2c_writeto(I2C1, MMA_ADDR, data, 2, true); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_3(pyb_accel_write_obj, pyb_accel_write); - -STATIC const mp_rom_map_elem_t pyb_accel_locals_dict_table[] = { - // TODO add init, deinit, and perhaps reset methods - { MP_ROM_QSTR(MP_QSTR_x), MP_ROM_PTR(&pyb_accel_x_obj) }, - { MP_ROM_QSTR(MP_QSTR_y), MP_ROM_PTR(&pyb_accel_y_obj) }, - { MP_ROM_QSTR(MP_QSTR_z), MP_ROM_PTR(&pyb_accel_z_obj) }, - { MP_ROM_QSTR(MP_QSTR_tilt), MP_ROM_PTR(&pyb_accel_tilt_obj) }, - { MP_ROM_QSTR(MP_QSTR_filtered_xyz), MP_ROM_PTR(&pyb_accel_filtered_xyz_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&pyb_accel_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_accel_write_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_accel_locals_dict, pyb_accel_locals_dict_table); - -const mp_obj_type_t pyb_accel_type = { - { &mp_type_type }, - .name = MP_QSTR_Accel, - .make_new = pyb_accel_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_accel_locals_dict, -}; - -#endif // MICROPY_HW_HAS_MMA7660 diff --git a/ports/stm32/adc.c b/ports/stm32/adc.c deleted file mode 100644 index f439503e61..0000000000 --- a/ports/stm32/adc.c +++ /dev/null @@ -1,803 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/binary.h" -#include "py/mphal.h" -#include "adc.h" -#include "pin.h" -#include "timer.h" - -#if MICROPY_HW_ENABLE_ADC - -/// \moduleref pyb -/// \class ADC - analog to digital conversion: read analog values on a pin -/// -/// Usage: -/// -/// adc = pyb.ADC(pin) # create an analog object from a pin -/// val = adc.read() # read an analog value -/// -/// adc = pyb.ADCAll(resolution) # creale an ADCAll object -/// val = adc.read_channel(channel) # read the given channel -/// val = adc.read_core_temp() # read MCU temperature -/// val = adc.read_core_vbat() # read MCU VBAT -/// val = adc.read_core_vref() # read MCU VREF - -/* ADC defintions */ -#if defined(STM32H7) -#define ADCx (ADC3) -#else -#define ADCx (ADC1) -#endif -#define ADCx_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE -#define ADC_NUM_CHANNELS (19) - -#if defined(STM32F0) - -#define ADC_FIRST_GPIO_CHANNEL (0) -#define ADC_LAST_GPIO_CHANNEL (15) -#define ADC_CAL_ADDRESS (0x1ffff7ba) -#define ADC_CAL1 ((uint16_t*)0x1ffff7b8) -#define ADC_CAL2 ((uint16_t*)0x1ffff7c2) - -#elif defined(STM32F4) - -#define ADC_FIRST_GPIO_CHANNEL (0) -#define ADC_LAST_GPIO_CHANNEL (15) -#define ADC_CAL_ADDRESS (0x1fff7a2a) -#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) -#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) - -#elif defined(STM32F7) - -#define ADC_FIRST_GPIO_CHANNEL (0) -#define ADC_LAST_GPIO_CHANNEL (15) -#if defined(STM32F722xx) || defined(STM32F723xx) || \ - defined(STM32F732xx) || defined(STM32F733xx) -#define ADC_CAL_ADDRESS (0x1ff07a2a) -#else -#define ADC_CAL_ADDRESS (0x1ff0f44a) -#endif - -#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) -#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) - -#elif defined(STM32H7) - -#define ADC_FIRST_GPIO_CHANNEL (0) -#define ADC_LAST_GPIO_CHANNEL (16) -#define ADC_CAL_ADDRESS (0x1FF1E860) -#define ADC_CAL1 ((uint16_t*)(0x1FF1E820)) -#define ADC_CAL2 ((uint16_t*)(0x1FF1E840)) -#define ADC_CHANNEL_VBAT ADC_CHANNEL_VBAT_DIV4 - -#elif defined(STM32L4) - -#define ADC_FIRST_GPIO_CHANNEL (1) -#define ADC_LAST_GPIO_CHANNEL (16) -#define ADC_CAL_ADDRESS (0x1fff75aa) -#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS - 2)) -#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 0x20)) - -#else - -#error Unsupported processor - -#endif - -#if defined(STM32F091xC) -#define VBAT_DIV (2) -#elif defined(STM32F405xx) || defined(STM32F415xx) || \ - defined(STM32F407xx) || defined(STM32F417xx) || \ - defined(STM32F401xC) || defined(STM32F401xE) || \ - defined(STM32F411xE) -#define VBAT_DIV (2) -#elif defined(STM32F427xx) || defined(STM32F429xx) || \ - defined(STM32F437xx) || defined(STM32F439xx) || \ - defined(STM32F722xx) || defined(STM32F723xx) || \ - defined(STM32F732xx) || defined(STM32F733xx) || \ - defined(STM32F746xx) || defined(STM32F767xx) || \ - defined(STM32F769xx) || defined(STM32F446xx) -#define VBAT_DIV (4) -#elif defined(STM32H743xx) -#define VBAT_DIV (4) -#elif defined(STM32L475xx) || defined(STM32L476xx) || \ - defined(STM32L496xx) -#define VBAT_DIV (3) -#else -#error Unsupported processor -#endif - -// Timeout for waiting for end-of-conversion, in ms -#define EOC_TIMEOUT (10) - -/* Core temperature sensor definitions */ -#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resoultion) */ -#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resoultion) */ - -// scale and calibration values for VBAT and VREF -#define ADC_SCALE (3.3f / 4095) -#define VREFIN_CAL ((uint16_t *)ADC_CAL_ADDRESS) - -typedef struct _pyb_obj_adc_t { - mp_obj_base_t base; - mp_obj_t pin_name; - int channel; - ADC_HandleTypeDef handle; -} pyb_obj_adc_t; - -// convert user-facing channel number into internal channel number -static inline uint32_t adc_get_internal_channel(uint32_t channel) { - #if defined(STM32F4) || defined(STM32F7) - // on F4 and F7 MCUs we want channel 16 to always be the TEMPSENSOR - // (on some MCUs ADC_CHANNEL_TEMPSENSOR=16, on others it doesn't) - if (channel == 16) { - channel = ADC_CHANNEL_TEMPSENSOR; - } - #endif - return channel; -} - -STATIC bool is_adcx_channel(int channel) { -#if defined(STM32F411xE) - // The HAL has an incorrect IS_ADC_CHANNEL macro for the F411 so we check for temp - return IS_ADC_CHANNEL(channel) || channel == ADC_CHANNEL_TEMPSENSOR; -#elif defined(STM32F0) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - return IS_ADC_CHANNEL(channel); -#elif defined(STM32L4) - ADC_HandleTypeDef handle; - handle.Instance = ADCx; - return IS_ADC_CHANNEL(&handle, channel); -#else - #error Unsupported processor -#endif -} - -STATIC void adc_wait_for_eoc_or_timeout(int32_t timeout) { - uint32_t tickstart = HAL_GetTick(); -#if defined(STM32F4) || defined(STM32F7) - while ((ADCx->SR & ADC_FLAG_EOC) != ADC_FLAG_EOC) { -#elif defined(STM32F0) || defined(STM32H7) || defined(STM32L4) - while (READ_BIT(ADCx->ISR, ADC_FLAG_EOC) != ADC_FLAG_EOC) { -#else - #error Unsupported processor -#endif - if (((HAL_GetTick() - tickstart ) > timeout)) { - break; // timeout - } - } -} - -STATIC void adcx_clock_enable(void) { -#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) - ADCx_CLK_ENABLE(); -#elif defined(STM32H7) - __HAL_RCC_ADC3_CLK_ENABLE(); - __HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_CLKP); -#elif defined(STM32L4) - __HAL_RCC_ADC_CLK_ENABLE(); -#else - #error Unsupported processor -#endif -} - -STATIC void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) { - adcx_clock_enable(); - - adch->Instance = ADCx; - adch->Init.Resolution = resolution; - adch->Init.ContinuousConvMode = DISABLE; - adch->Init.DiscontinuousConvMode = DISABLE; - #if !defined(STM32F0) - adch->Init.NbrOfDiscConversion = 0; - adch->Init.NbrOfConversion = 1; - #endif - adch->Init.EOCSelection = ADC_EOC_SINGLE_CONV; - adch->Init.ExternalTrigConv = ADC_SOFTWARE_START; - adch->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - #if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) - adch->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - adch->Init.ScanConvMode = DISABLE; - adch->Init.DataAlign = ADC_DATAALIGN_RIGHT; - adch->Init.DMAContinuousRequests = DISABLE; - #elif defined(STM32H7) - adch->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - adch->Init.BoostMode = ENABLE; - adch->Init.ScanConvMode = DISABLE; - adch->Init.LowPowerAutoWait = DISABLE; - adch->Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - adch->Init.OversamplingMode = DISABLE; - adch->Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE; - adch->Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR; - #elif defined(STM32L4) - adch->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - adch->Init.ScanConvMode = ADC_SCAN_DISABLE; - adch->Init.LowPowerAutoWait = DISABLE; - adch->Init.Overrun = ADC_OVR_DATA_PRESERVED; - adch->Init.OversamplingMode = DISABLE; - adch->Init.DataAlign = ADC_DATAALIGN_RIGHT; - adch->Init.DMAContinuousRequests = DISABLE; - #else - #error Unsupported processor - #endif - - HAL_ADC_Init(adch); - - #if defined(STM32H7) - HAL_ADCEx_Calibration_Start(adch, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED); - #endif -} - -STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) { - if (!is_adcx_channel(adc_obj->channel)) { - return; - } - - if (ADC_FIRST_GPIO_CHANNEL <= adc_obj->channel && adc_obj->channel <= ADC_LAST_GPIO_CHANNEL) { - // Channels 0-16 correspond to real pins. Configure the GPIO pin in ADC mode. - const pin_obj_t *pin = pin_adc1[adc_obj->channel]; - mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0); - } - - adcx_init_periph(&adc_obj->handle, ADC_RESOLUTION_12B); - -#if defined(STM32L4) - ADC_MultiModeTypeDef multimode; - multimode.Mode = ADC_MODE_INDEPENDENT; - if (HAL_ADCEx_MultiModeConfigChannel(&adc_obj->handle, &multimode) != HAL_OK) - { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Can not set multimode on ADC1 channel: %d", adc_obj->channel)); - } -#endif -} - -STATIC void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel) { - ADC_ChannelConfTypeDef sConfig; - - sConfig.Channel = channel; - sConfig.Rank = 1; -#if defined(STM32F0) - sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5; -#elif defined(STM32F4) || defined(STM32F7) - sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES; -#elif defined(STM32H7) - sConfig.SamplingTime = ADC_SAMPLETIME_8CYCLES_5; - sConfig.SingleDiff = ADC_SINGLE_ENDED; - sConfig.OffsetNumber = ADC_OFFSET_NONE; - sConfig.OffsetRightShift = DISABLE; - sConfig.OffsetSignedSaturation = DISABLE; -#elif defined(STM32L4) - sConfig.SamplingTime = ADC_SAMPLETIME_12CYCLES_5; - sConfig.SingleDiff = ADC_SINGLE_ENDED; - sConfig.OffsetNumber = ADC_OFFSET_NONE; - sConfig.Offset = 0; -#else - #error Unsupported processor -#endif - - HAL_ADC_ConfigChannel(adc_handle, &sConfig); -} - -STATIC uint32_t adc_read_channel(ADC_HandleTypeDef *adcHandle) { - HAL_ADC_Start(adcHandle); - adc_wait_for_eoc_or_timeout(EOC_TIMEOUT); - uint32_t value = ADCx->DR; - HAL_ADC_Stop(adcHandle); - return value; -} - -STATIC uint32_t adc_config_and_read_channel(ADC_HandleTypeDef *adcHandle, uint32_t channel) { - adc_config_channel(adcHandle, channel); - return adc_read_channel(adcHandle); -} - -/******************************************************************************/ -/* MicroPython bindings : adc object (single channel) */ - -STATIC void adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_obj_adc_t *self = self_in; - mp_print_str(print, "pin_name, PRINT_STR); - mp_printf(print, " channel=%u>", self->channel); -} - -/// \classmethod \constructor(pin) -/// Create an ADC object associated with the given pin. -/// This allows you to then read analog values on that pin. -STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // 1st argument is the pin name - mp_obj_t pin_obj = args[0]; - - uint32_t channel; - - if (MP_OBJ_IS_INT(pin_obj)) { - channel = adc_get_internal_channel(mp_obj_get_int(pin_obj)); - } else { - const pin_obj_t *pin = pin_find(pin_obj); - if ((pin->adc_num & PIN_ADC1) == 0) { - // No ADC1 function on that pin - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %q does not have ADC capabilities", pin->name)); - } - channel = pin->adc_channel; - } - - if (!is_adcx_channel(channel)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "not a valid ADC Channel: %d", channel)); - } - - - if (ADC_FIRST_GPIO_CHANNEL <= channel && channel <= ADC_LAST_GPIO_CHANNEL) { - // these channels correspond to physical GPIO ports so make sure they exist - if (pin_adc1[channel] == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "channel %d not available on this board", channel)); - } - } - - pyb_obj_adc_t *o = m_new_obj(pyb_obj_adc_t); - memset(o, 0, sizeof(*o)); - o->base.type = &pyb_adc_type; - o->pin_name = pin_obj; - o->channel = channel; - adc_init_single(o); - - return o; -} - -/// \method read() -/// Read the value on the analog pin and return it. The returned value -/// will be between 0 and 4095. -STATIC mp_obj_t adc_read(mp_obj_t self_in) { - pyb_obj_adc_t *self = self_in; - return mp_obj_new_int(adc_config_and_read_channel(&self->handle, self->channel)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_read_obj, adc_read); - -/// \method read_timed(buf, timer) -/// -/// Read analog values into `buf` at a rate set by the `timer` object. -/// -/// `buf` can be bytearray or array.array for example. The ADC values have -/// 12-bit resolution and are stored directly into `buf` if its element size is -/// 16 bits or greater. If `buf` has only 8-bit elements (eg a bytearray) then -/// the sample resolution will be reduced to 8 bits. -/// -/// `timer` should be a Timer object, and a sample is read each time the timer -/// triggers. The timer must already be initialised and running at the desired -/// sampling frequency. -/// -/// To support previous behaviour of this function, `timer` can also be an -/// integer which specifies the frequency (in Hz) to sample at. In this case -/// Timer(6) will be automatically configured to run at the given frequency. -/// -/// Example using a Timer object (preferred way): -/// -/// adc = pyb.ADC(pyb.Pin.board.X19) # create an ADC on pin X19 -/// tim = pyb.Timer(6, freq=10) # create a timer running at 10Hz -/// buf = bytearray(100) # creat a buffer to store the samples -/// adc.read_timed(buf, tim) # sample 100 values, taking 10s -/// -/// Example using an integer for the frequency: -/// -/// adc = pyb.ADC(pyb.Pin.board.X19) # create an ADC on pin X19 -/// buf = bytearray(100) # create a buffer of 100 bytes -/// adc.read_timed(buf, 10) # read analog values into buf at 10Hz -/// # this will take 10 seconds to finish -/// for val in buf: # loop over all values -/// print(val) # print the value out -/// -/// This function does not allocate any memory. -STATIC mp_obj_t adc_read_timed(mp_obj_t self_in, mp_obj_t buf_in, mp_obj_t freq_in) { - pyb_obj_adc_t *self = self_in; - - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_WRITE); - size_t typesize = mp_binary_get_size('@', bufinfo.typecode, NULL); - - TIM_HandleTypeDef *tim; - #if defined(TIM6) - if (mp_obj_is_integer(freq_in)) { - // freq in Hz given so init TIM6 (legacy behaviour) - tim = timer_tim6_init(mp_obj_get_int(freq_in)); - HAL_TIM_Base_Start(tim); - } else - #endif - { - // use the supplied timer object as the sampling time base - tim = pyb_timer_get_handle(freq_in); - } - - // configure the ADC channel - adc_config_channel(&self->handle, self->channel); - - // This uses the timer in polling mode to do the sampling - // TODO use DMA - - uint nelems = bufinfo.len / typesize; - for (uint index = 0; index < nelems; index++) { - // Wait for the timer to trigger so we sample at the correct frequency - while (__HAL_TIM_GET_FLAG(tim, TIM_FLAG_UPDATE) == RESET) { - } - __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE); - - if (index == 0) { - // for the first sample we need to turn the ADC on - HAL_ADC_Start(&self->handle); - } else { - // for subsequent samples we can just set the "start sample" bit -#if defined(STM32F4) || defined(STM32F7) - ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART; -#elif defined(STM32F0) || defined(STM32H7) || defined(STM32L4) - SET_BIT(ADCx->CR, ADC_CR_ADSTART); -#else - #error Unsupported processor -#endif - } - - // wait for sample to complete - adc_wait_for_eoc_or_timeout(EOC_TIMEOUT); - - // read value - uint value = ADCx->DR; - - // store value in buffer - if (typesize == 1) { - value >>= 4; - } - mp_binary_set_val_array_from_int(bufinfo.typecode, bufinfo.buf, index, value); - } - - // turn the ADC off - HAL_ADC_Stop(&self->handle); - - #if defined(TIM6) - if (mp_obj_is_integer(freq_in)) { - // stop timer if we initialised TIM6 in this function (legacy behaviour) - HAL_TIM_Base_Stop(tim); - } - #endif - - return mp_obj_new_int(bufinfo.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(adc_read_timed_obj, adc_read_timed); - -// read_timed_multi((adcx, adcy, ...), (bufx, bufy, ...), timer) -// -// Read analog values from multiple ADC's into buffers at a rate set by the -// timer. The ADC values have 12-bit resolution and are stored directly into -// the corresponding buffer if its element size is 16 bits or greater, otherwise -// the sample resolution will be reduced to 8 bits. -// -// This function should not allocate any heap memory. -STATIC mp_obj_t adc_read_timed_multi(mp_obj_t adc_array_in, mp_obj_t buf_array_in, mp_obj_t tim_in) { - size_t nadcs, nbufs; - mp_obj_t *adc_array, *buf_array; - mp_obj_get_array(adc_array_in, &nadcs, &adc_array); - mp_obj_get_array(buf_array_in, &nbufs, &buf_array); - - if (nadcs < 1) { - mp_raise_ValueError("need at least 1 ADC"); - } - if (nadcs != nbufs) { - mp_raise_ValueError("length of ADC and buffer lists differ"); - } - - // Get buf for first ADC, get word size, check other buffers match in type - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_array[0], &bufinfo, MP_BUFFER_WRITE); - size_t typesize = mp_binary_get_size('@', bufinfo.typecode, NULL); - void *bufptrs[nbufs]; - for (uint array_index = 0; array_index < nbufs; array_index++) { - mp_buffer_info_t bufinfo_curr; - mp_get_buffer_raise(buf_array[array_index], &bufinfo_curr, MP_BUFFER_WRITE); - if ((bufinfo.len != bufinfo_curr.len) || (bufinfo.typecode != bufinfo_curr.typecode)) { - mp_raise_ValueError("size and type of buffers must match"); - } - bufptrs[array_index] = bufinfo_curr.buf; - } - - // Use the supplied timer object as the sampling time base - TIM_HandleTypeDef *tim; - tim = pyb_timer_get_handle(tim_in); - - // Start adc; this is slow so wait for it to start - pyb_obj_adc_t *adc0 = adc_array[0]; - adc_config_channel(&adc0->handle, adc0->channel); - HAL_ADC_Start(&adc0->handle); - // Wait for sample to complete and discard - adc_wait_for_eoc_or_timeout(EOC_TIMEOUT); - // Read (and discard) value - uint value = ADCx->DR; - - // Ensure first sample is on a timer tick - __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE); - while (__HAL_TIM_GET_FLAG(tim, TIM_FLAG_UPDATE) == RESET) { - } - __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE); - - // Overrun check: assume success - bool success = true; - size_t nelems = bufinfo.len / typesize; - for (size_t elem_index = 0; elem_index < nelems; elem_index++) { - if (__HAL_TIM_GET_FLAG(tim, TIM_FLAG_UPDATE) != RESET) { - // Timer has already triggered - success = false; - } else { - // Wait for the timer to trigger so we sample at the correct frequency - while (__HAL_TIM_GET_FLAG(tim, TIM_FLAG_UPDATE) == RESET) { - } - } - __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE); - - for (size_t array_index = 0; array_index < nadcs; array_index++) { - pyb_obj_adc_t *adc = adc_array[array_index]; - // configure the ADC channel - adc_config_channel(&adc->handle, adc->channel); - // for the first sample we need to turn the ADC on - // ADC is started: set the "start sample" bit - #if defined(STM32F4) || defined(STM32F7) - ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART; - #elif defined(STM32F0) || defined(STM32H7) || defined(STM32L4) - SET_BIT(ADCx->CR, ADC_CR_ADSTART); - #else - #error Unsupported processor - #endif - // wait for sample to complete - adc_wait_for_eoc_or_timeout(EOC_TIMEOUT); - - // read value - value = ADCx->DR; - - // store values in buffer - if (typesize == 1) { - value >>= 4; - } - mp_binary_set_val_array_from_int(bufinfo.typecode, bufptrs[array_index], elem_index, value); - } - } - - // Turn the ADC off - adc0 = adc_array[0]; - HAL_ADC_Stop(&adc0->handle); - - return mp_obj_new_bool(success); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(adc_read_timed_multi_fun_obj, adc_read_timed_multi); -STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(adc_read_timed_multi_obj, MP_ROM_PTR(&adc_read_timed_multi_fun_obj)); - -STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&adc_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_timed), MP_ROM_PTR(&adc_read_timed_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_timed_multi), MP_ROM_PTR(&adc_read_timed_multi_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(adc_locals_dict, adc_locals_dict_table); - -const mp_obj_type_t pyb_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .print = adc_print, - .make_new = adc_make_new, - .locals_dict = (mp_obj_dict_t*)&adc_locals_dict, -}; - -/******************************************************************************/ -/* adc all object */ - -typedef struct _pyb_adc_all_obj_t { - mp_obj_base_t base; - ADC_HandleTypeDef handle; -} pyb_adc_all_obj_t; - -void adc_init_all(pyb_adc_all_obj_t *adc_all, uint32_t resolution, uint32_t en_mask) { - - switch (resolution) { - #if !defined(STM32H7) - case 6: resolution = ADC_RESOLUTION_6B; break; - #endif - case 8: resolution = ADC_RESOLUTION_8B; break; - case 10: resolution = ADC_RESOLUTION_10B; break; - case 12: resolution = ADC_RESOLUTION_12B; break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "resolution %d not supported", resolution)); - } - - for (uint32_t channel = ADC_FIRST_GPIO_CHANNEL; channel <= ADC_LAST_GPIO_CHANNEL; ++channel) { - // only initialise those channels that are selected with the en_mask - if (en_mask & (1 << channel)) { - // Channels 0-16 correspond to real pins. Configure the GPIO pin in - // ADC mode. - const pin_obj_t *pin = pin_adc1[channel]; - if (pin) { - mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0); - } - } - } - - adcx_init_periph(&adc_all->handle, resolution); -} - -int adc_get_resolution(ADC_HandleTypeDef *adcHandle) { - uint32_t res_reg = ADC_GET_RESOLUTION(adcHandle); - - switch (res_reg) { - #if !defined(STM32H7) - case ADC_RESOLUTION_6B: return 6; - #endif - case ADC_RESOLUTION_8B: return 8; - case ADC_RESOLUTION_10B: return 10; - } - return 12; -} - -int adc_read_core_temp(ADC_HandleTypeDef *adcHandle) { - int32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_TEMPSENSOR); - - // Note: constants assume 12-bit resolution, so we scale the raw value to - // be 12-bits. - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - return ((raw_value - CORE_TEMP_V25) / CORE_TEMP_AVG_SLOPE) + 25; -} - -#if MICROPY_PY_BUILTINS_FLOAT -// correction factor for reference value -STATIC volatile float adc_refcor = 1.0f; - -float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) { - int32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_TEMPSENSOR); - - // constants assume 12-bit resolution so we scale the raw value to 12-bits - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; - return (((float)raw_value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; -} - -float adc_read_core_vbat(ADC_HandleTypeDef *adcHandle) { - uint32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_VBAT); - - // Note: constants assume 12-bit resolution, so we scale the raw value to - // be 12-bits. - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - #if defined(STM32F4) || defined(STM32F7) - // ST docs say that (at least on STM32F42x and STM32F43x), VBATE must - // be disabled when TSVREFE is enabled for TEMPSENSOR and VREFINT - // conversions to work. VBATE is enabled by the above call to read - // the channel, and here we disable VBATE so a subsequent call for - // TEMPSENSOR or VREFINT works correctly. - ADC->CCR &= ~ADC_CCR_VBATE; - #endif - - return raw_value * VBAT_DIV * ADC_SCALE * adc_refcor; -} - -float adc_read_core_vref(ADC_HandleTypeDef *adcHandle) { - uint32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_VREFINT); - - // Note: constants assume 12-bit resolution, so we scale the raw value to - // be 12-bits. - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - // update the reference correction factor - adc_refcor = ((float)(*VREFIN_CAL)) / ((float)raw_value); - - return (*VREFIN_CAL) * ADC_SCALE; -} -#endif - -/******************************************************************************/ -/* MicroPython bindings : adc_all object */ - -STATIC mp_obj_t adc_all_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 2, false); - - // make ADCAll object - pyb_adc_all_obj_t *o = m_new_obj(pyb_adc_all_obj_t); - o->base.type = &pyb_adc_all_type; - mp_int_t res = mp_obj_get_int(args[0]); - uint32_t en_mask = 0xffffffff; - if (n_args > 1) { - en_mask = mp_obj_get_int(args[1]); - } - adc_init_all(o, res, en_mask); - - return o; -} - -STATIC mp_obj_t adc_all_read_channel(mp_obj_t self_in, mp_obj_t channel) { - pyb_adc_all_obj_t *self = self_in; - uint32_t chan = adc_get_internal_channel(mp_obj_get_int(channel)); - uint32_t data = adc_config_and_read_channel(&self->handle, chan); - return mp_obj_new_int(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(adc_all_read_channel_obj, adc_all_read_channel); - -STATIC mp_obj_t adc_all_read_core_temp(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - #if MICROPY_PY_BUILTINS_FLOAT - float data = adc_read_core_temp_float(&self->handle); - return mp_obj_new_float(data); - #else - int data = adc_read_core_temp(&self->handle); - return mp_obj_new_int(data); - #endif -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_core_temp_obj, adc_all_read_core_temp); - -#if MICROPY_PY_BUILTINS_FLOAT -STATIC mp_obj_t adc_all_read_core_vbat(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - float data = adc_read_core_vbat(&self->handle); - return mp_obj_new_float(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_core_vbat_obj, adc_all_read_core_vbat); - -STATIC mp_obj_t adc_all_read_core_vref(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - float data = adc_read_core_vref(&self->handle); - return mp_obj_new_float(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_core_vref_obj, adc_all_read_core_vref); - -STATIC mp_obj_t adc_all_read_vref(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - adc_read_core_vref(&self->handle); - return mp_obj_new_float(3.3 * adc_refcor); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_vref_obj, adc_all_read_vref); -#endif - -STATIC const mp_rom_map_elem_t adc_all_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read_channel), MP_ROM_PTR(&adc_all_read_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_core_temp), MP_ROM_PTR(&adc_all_read_core_temp_obj) }, -#if MICROPY_PY_BUILTINS_FLOAT - { MP_ROM_QSTR(MP_QSTR_read_core_vbat), MP_ROM_PTR(&adc_all_read_core_vbat_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_core_vref), MP_ROM_PTR(&adc_all_read_core_vref_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_vref), MP_ROM_PTR(&adc_all_read_vref_obj) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(adc_all_locals_dict, adc_all_locals_dict_table); - -const mp_obj_type_t pyb_adc_all_type = { - { &mp_type_type }, - .name = MP_QSTR_ADCAll, - .make_new = adc_all_make_new, - .locals_dict = (mp_obj_dict_t*)&adc_all_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_ADC diff --git a/ports/stm32/adc.h b/ports/stm32/adc.h deleted file mode 100644 index 4ae6022bc3..0000000000 --- a/ports/stm32/adc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_ADC_H -#define MICROPY_INCLUDED_STM32_ADC_H - -extern const mp_obj_type_t pyb_adc_type; -extern const mp_obj_type_t pyb_adc_all_type; - -#endif // MICROPY_INCLUDED_STM32_ADC_H diff --git a/ports/stm32/autoflash b/ports/stm32/autoflash deleted file mode 100755 index d2240ccb55..0000000000 --- a/ports/stm32/autoflash +++ /dev/null @@ -1,44 +0,0 @@ -#!/bin/sh -# -# This script loops doing the following: -# - wait for DFU device -# - flash DFU device -# - wait for DFU to exit -# - wait for serial port to appear -# - run a terminal - -SERIAL=/dev/ttyACM0 -DEVICE=0483:df11 - -while true; do - echo "waiting for DFU device..." - while true; do - if lsusb | grep -q DFU; then - break - fi - sleep 1s - done - - echo "found DFU device, flashing" - dfu-util -a 0 -d $DEVICE -D build/flash.dfu - - echo "waiting for DFU to exit..." - while true; do - if lsusb | grep -q DFU; then - sleep 1s - continue - fi - break - done - - echo "waiting for $SERIAL..." - while true; do - if ls /dev/tty* | grep -q $SERIAL; then - break - fi - sleep 1s - continue - done - sleep 1s - picocom $SERIAL -done diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h deleted file mode 100644 index 3ab3d5fa17..0000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h +++ /dev/null @@ -1,71 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "B-L475E-IOT01A" -#define MICROPY_HW_MCU_NAME "STM32L475" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV4) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART1 config connected to ST-Link -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -// USART2 config connected to PMOD: Flow control is defined and therfore used -#define MICROPY_HW_UART2_CTS (pin_D3) -#define MICROPY_HW_UART2_RTS (pin_D4) -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -// USART3 config for internal use -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -// USART4 config -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -// USART 1 is connected to the virtual com port on the ST-LINK -#define MICROPY_HW_UART_REPL PYB_UART_1 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) - -#define MICROPY_HW_SPI2_NSS (pin_D0) -#define MICROPY_HW_SPI2_SCK (pin_D1) -#define MICROPY_HW_SPI2_MISO (pin_D3) -#define MICROPY_HW_SPI2_MOSI (pin_D4) - -#define MICROPY_HW_SPI3_NSS (pin_A15) -#define MICROPY_HW_SPI3_SCK (pin_C10) -#define MICROPY_HW_SPI3_MISO (pin_C11) -#define MICROPY_HW_SPI3_MOSI (pin_C12) - -// User and wake-up switch. Pressing the button makes the input go low. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // green -#define MICROPY_HW_LED2 (pin_B14) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk deleted file mode 100644 index 55e443e919..0000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk +++ /dev/null @@ -1,9 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L475xx -# The stm32l475 does not have a LDC controller which is -# the only diffrence to the stm32l476 - so reuse some files. -AF_FILE = boards/stm32l476_af.csv -LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08004000 -OPENOCD_CONFIG = boards/openocd_stm32l4.cfg diff --git a/ports/stm32/boards/B_L475E_IOT01A/pins.csv b/ports/stm32/boards/B_L475E_IOT01A/pins.csv deleted file mode 100644 index afe87b71c4..0000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/pins.csv +++ /dev/null @@ -1,82 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PH0,PH0 -PH1,PH1 diff --git a/ports/stm32/boards/B_L475E_IOT01A/stm32l4xx_hal_conf.h b/ports/stm32/boards/B_L475E_IOT01A/stm32l4xx_hal_conf.h deleted file mode 100644 index 6bfb28118a..0000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,372 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/CERB40/mpconfigboard.h b/ports/stm32/boards/CERB40/mpconfigboard.h deleted file mode 100644 index 7c166922be..0000000000 --- a/ports/stm32/boards/CERB40/mpconfigboard.h +++ /dev/null @@ -1,65 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "Cerb40" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_C9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// The Cerb40 has No LEDs - -// The Cerb40 has No SDCard - -// USB config -#define MICROPY_HW_USB_FS (1) -//#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -//#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/CERB40/mpconfigboard.mk b/ports/stm32/boards/CERB40/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/CERB40/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/CERB40/pins.csv b/ports/stm32/boards/CERB40/pins.csv deleted file mode 100644 index cca0bc0536..0000000000 --- a/ports/stm32/boards/CERB40/pins.csv +++ /dev/null @@ -1,50 +0,0 @@ -JP1,3.3V -JP2,GND -JP3,PA8 -JP4,PA13 -JP5,PA7 -JP6,PA6 -JP7,PC10 -JP8,PA14 -JP9,PC11 -JP10,PB4 -JP11,PB9 -JP12,PB3 -JP13,PD2 -JP14,PC12 -JP15,VBAT -JP16,PB8 -JP17,Loader -JP18,PB7 -JP19,PB6 -JP20,PB5 -JP21,Reset -JP22,PC0 -JP23,PC1 -JP24,PC2 -JP25,PC3 -JP26,PA0 -JP27,PA1 -JP28,PA2 -JP29,PA3 -JP30,PA4 -JP31,PA5 -JP32,PB10 -JP33,PB11 -JP34,PB14 -JP35,PB15 -JP36,PC6 -JP37,PC7 -JP38,PC8 -JP39,PC9 -JP40,VUSB -UART1_TX,PA9 -UART1_RX,PA10 -UART3_TX,PD8 -UART3_RX,PD9 -UART3_RTS,PD12 -UART3_CTS,PD11 -CAN2_TX,PB13 -CAN2_RX,PB12 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/CERB40/stm32f4xx_hal_conf.h b/ports/stm32/boards/CERB40/stm32f4xx_hal_conf.h deleted file mode 100644 index e71ba33697..0000000000 --- a/ports/stm32/boards/CERB40/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.h b/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.h deleted file mode 100644 index 53c7f3cd50..0000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.h +++ /dev/null @@ -1,68 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "Espruino Pico" -#define MICROPY_HW_MCU_NAME "STM32F401CD" - -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_PY_BUILTINS_COMPLEX (0) -#define MICROPY_PY_USOCKET (0) -#define MICROPY_PY_NETWORK (0) - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) -#define MICROPY_HW_ENABLE_SERVO (1) - -// Pico has an 8 MHz HSE and the F401 does 84 MHz max -#define MICROPY_HW_CLK_PLLM (5) -#define MICROPY_HW_CLK_PLLN (210) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (7) - -// does not have a 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (0) - -// UART config -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART6_TX (pin_A11) -#define MICROPY_HW_UART6_RX (pin_A12) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B3) -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_B4) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// BTN1 has no pullup or pulldown; it is active high and broken out on a header -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLDOWN) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// Pico has 2 LEDs -#define MICROPY_HW_LED1 (pin_B2) // red -#define MICROPY_HW_LED2 (pin_B12) // green -#define MICROPY_HW_LED3 (pin_B12) // green -#define MICROPY_HW_LED4 (pin_B12) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) diff --git a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.mk b/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.mk deleted file mode 100644 index 16cacc089e..0000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.mk +++ /dev/null @@ -1,9 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F401xE -AF_FILE = boards/stm32f401_af.csv -LD_FILES = boards/stm32f401xd.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 - -# Don't include default frozen modules because MCU is tight on flash space -FROZEN_MPY_DIR ?= diff --git a/ports/stm32/boards/ESPRUINO_PICO/pins.csv b/ports/stm32/boards/ESPRUINO_PICO/pins.csv deleted file mode 100644 index 636eb2cb3c..0000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/pins.csv +++ /dev/null @@ -1,34 +0,0 @@ -B3,PB3 -B4,PB4 -B5,PB5 -B6,PB6 -B7,PB7 -A8,PA8 -B8,PB8 -B9,PB9 -A10,PA10 -A0,PA0 -A1,PA1 -A2,PA2 -A3,PA3 -A4,PA4 -A5,PA5 -A6,PA6 -A7,PA7 -B1,PB1 -B10,PB10 -B13,PB13 -B14,PB14 -B15,PB15 -B0,PB0 -SW,PC13 -LED_RED,PB2 -LED_GREEN,PB12 -USB_VBUS,PA9 -USB_DM,PA11 -USB_DP,PA12 -OSC32_IN,PC14 -OSC32_OUT,PC15 -NC1,PA13 -NC2,PA14 -NC3,PA15 diff --git a/ports/stm32/boards/ESPRUINO_PICO/stm32f4xx_hal_conf.h b/ports/stm32/boards/ESPRUINO_PICO/stm32f4xx_hal_conf.h deleted file mode 100644 index d27e2e9ef0..0000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/HYDRABUS/mpconfigboard.h b/ports/stm32/boards/HYDRABUS/mpconfigboard.h deleted file mode 100644 index 2e73d3ec88..0000000000 --- a/ports/stm32/boards/HYDRABUS/mpconfigboard.h +++ /dev/null @@ -1,74 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "HydraBus1.0" -#define MICROPY_HW_MCU_NAME "STM32F4" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// USRSW/UBTN (Needs Jumper UBTN) is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// The HydraBus has 1 LED (Needs jumper on ULED) -#define MICROPY_HW_LED1 (pin_A4) // green -#define MICROPY_HW_LED2 (pin_A4) // same as LED1 -#define MICROPY_HW_LED3 (pin_A4) // same as LED1 -#define MICROPY_HW_LED4 (pin_A4) // same as LED1 -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch (not used, always on) -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (1) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/HYDRABUS/mpconfigboard.mk b/ports/stm32/boards/HYDRABUS/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/HYDRABUS/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/HYDRABUS/pins.csv b/ports/stm32/boards/HYDRABUS/pins.csv deleted file mode 100644 index 47e1f43139..0000000000 --- a/ports/stm32/boards/HYDRABUS/pins.csv +++ /dev/null @@ -1,52 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -VUSB,PB13 -USB1D_N,PB14 -USB1D_P,PB15 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PD2,PD2 -BOOT0,BOOT0 -PA15,PA15 -UART3_TX,PD8 -UART3_RX,PD9 -UART3_RTS,PD12 -UART3_CTS,PD11 diff --git a/ports/stm32/boards/HYDRABUS/stm32f4xx_hal_conf.h b/ports/stm32/boards/HYDRABUS/stm32f4xx_hal_conf.h deleted file mode 100644 index daf9b63cec..0000000000 --- a/ports/stm32/boards/HYDRABUS/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/LIMIFROG/board_init.c b/ports/stm32/boards/LIMIFROG/board_init.c deleted file mode 100644 index 67ccf23cc5..0000000000 --- a/ports/stm32/boards/LIMIFROG/board_init.c +++ /dev/null @@ -1,154 +0,0 @@ -// The code is this file allows the user to enter DFU mode when the board -// starts up, by connecting POS10 on the external connector to GND. -// The code itself is taken from the LimiFrog software repository found at -// https://github.com/LimiFrog/LimiFrog-SW, and the original license header -// is copied below. - -#include STM32_HAL_H - -static void LBF_DFU_If_Needed(void); - -void LIMIFROG_board_early_init(void) { - LBF_DFU_If_Needed(); -} - -/******************************************************************************* - * LBF_DFU_If_Needed.c - * - * (c)2015 LimiFrog / CYMEYA - * This program is licensed under the terms of the MIT License. - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND. - * Please refer to the License File LICENSE.txt located at the root of this - * project for full licensing conditions, - * or visit https://opensource.org/licenses/MIT. - ******************************************************************************/ - -#define __LIMIFROG_02 - -/* ==== BTLE (excl UART) ======================================== */ -// PC9 = BT_RST (active high) - -#define BT_RST_PIN GPIO_PIN_9 -#define BT_RST_PORT GPIOC - -// Position 10 -#ifdef __LIMIFROG_01 - #define CONN_POS10_PIN GPIO_PIN_9 - #define CONN_POS10_PORT GPIOB -#else - #define CONN_POS10_PIN GPIO_PIN_8 - #define CONN_POS10_PORT GPIOB -#endif - -static inline void GPIO_HIGH(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - GPIOx->BSRR = (uint32_t)GPIO_Pin; -} - -static inline int IS_GPIO_RESET(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - GPIO_PinState bitstatus; - if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - { - bitstatus = GPIO_PIN_SET; - } - else - { - bitstatus = GPIO_PIN_RESET; - } - return (bitstatus==GPIO_PIN_RESET); -} - -/************************************************************** - RATIONALE FOR THIS FUNCTION : - - - The STM32 embeds in ROM a bootloader that allows to - obtain code and boot from a number of different interfaces, - including USB in a mode called "DFU" (Device Frimware Update) - [see AN3606 from ST for full details] - This bootloader code is executed instead of the regular - application code when pin BOOT0 is pulled-up (which on - LimiFrog0.2 is achieved by pressing the general-purpose - pushbutton switch on the side. - - The bootloader monitors a number of IOs of the STM32 to decide - from which interface it should boot. - - Problem in LimiFrog (up to versions 0.2a at least): upon - power-up the BLE modules generates some activity on UART3, - which is part of the pins monitored by the STM32. - This misleads the bootloader in trying to boot from UART3 - and, as a result, not continuing with booting from USB. - - - This code implements an alternative solution to launch the - bootloader while making sure UART3 remains stable. - - The idea it to start application code with a check, prior to any - other applicative code, of whether USB bootload is required (as - flagged by a GPIO pulled low at reset, in the same way as BOOT0). - The hadware reset pin of BLE is asserted (so that now it won't - generate any acitivity on UART3), and if USB bootload is required : - bootload ROM is remapped at address 0x0, stack pointer is - updated and the code is branched to the start of the bootloader. - - This code is run prior to any applicative configuration of clocks, - IRQs etc. -- the STM32 is therefore still running from MSI - - THIS FUNCTION MAY BE SUPPRESSED IF YOU NEVER NEED TO BOOT DFU MODE - - ********************************************************************/ - -static void LBF_DFU_If_Needed(void) -{ - - - GPIO_InitTypeDef GPIO_InitStruct; - - - // Initialize and assert pin BTLE_RST - // (hw reset to BLE module, so it won't drive UART3) - - __HAL_RCC_GPIOC_CLK_ENABLE(); - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.Pin = BT_RST_PIN; - HAL_GPIO_Init(BT_RST_PORT, &GPIO_InitStruct); - - GPIO_HIGH(BT_RST_PORT, BT_RST_PIN); // assert BTLE reset - - - /* -- Bootloader will be called if position 10 on the extension port - is actively pulled low -- */ - // Note - this is an arbitrary choice, code could be modified to - // monitor another GPIO of the STM32 and/or decide that active level - // is high rather than low - - - // Initialize Extension Port Position 10 = PB8 (bears I2C1_SCL) - // Use weak pull-up to detect if pin is externally pulled low - - __HAL_RCC_GPIOB_CLK_ENABLE(); - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Pin = CONN_POS10_PIN; - HAL_GPIO_Init(CONN_POS10_PORT, &GPIO_InitStruct); - - // If selection pin pulled low... - if ( IS_GPIO_RESET(CONN_POS10_PORT, CONN_POS10_PIN )) - - { - // Remap bootloader ROM (ie System Flash) to address 0x0 - SYSCFG->MEMRMP = 0x00000001; - - // Init stack pointer with value residing at ROM base - asm ( - "LDR R0, =0x00000000\n\t" // load ROM base address" - "LDR SP,[R0, #0]\n\t" // assign main stack pointer" - ); - - // Jump to address pointed by 0x00000004 -- */ - - asm ( - "LDR R0,[R0, #4]\n\t" // load bootloader address - "BX R0\n\t" - ); - - } -} diff --git a/ports/stm32/boards/LIMIFROG/mpconfigboard.h b/ports/stm32/boards/LIMIFROG/mpconfigboard.h deleted file mode 100644 index d27c2e66ef..0000000000 --- a/ports/stm32/boards/LIMIFROG/mpconfigboard.h +++ /dev/null @@ -1,55 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "LIMIFROG" -#define MICROPY_HW_MCU_NAME "STM32L476" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -#define MICROPY_BOARD_EARLY_INIT LIMIFROG_board_early_init -void LIMIFROG_board_early_init(void); - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART config -#define MICROPY_HW_UART3_TX (pin_C10) -#define MICROPY_HW_UART3_RX (pin_C11) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) - -#define MICROPY_HW_SPI3_NSS (pin_A15) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -#define MICROPY_HW_USRSW_PIN (pin_A15) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_C3) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) -// #define MICROPY_HW_USB_OTG_ID_PIN (pin_C12) // This is not the official ID Pin which should be PA10 diff --git a/ports/stm32/boards/LIMIFROG/mpconfigboard.mk b/ports/stm32/boards/LIMIFROG/mpconfigboard.mk deleted file mode 100644 index 2adc98f0b1..0000000000 --- a/ports/stm32/boards/LIMIFROG/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L476xx -AF_FILE = boards/stm32l476_af.csv -LD_FILES = boards/stm32l476xe.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08004000 diff --git a/ports/stm32/boards/LIMIFROG/pins.csv b/ports/stm32/boards/LIMIFROG/pins.csv deleted file mode 100644 index 52f96b669c..0000000000 --- a/ports/stm32/boards/LIMIFROG/pins.csv +++ /dev/null @@ -1,114 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PF0,PF0 -PF1,PF1 -PF2,PF2 -PF3,PF3 -PF4,PF4 -PF5,PF5 -PF6,PF6 -PF7,PF7 -PF8,PF8 -PF9,PF9 -PF10,PF10 -PF11,PF11 -PF12,PF12 -PF13,PF13 -PF14,PF14 -PF15,PF15 -PG0,PG0 -PG1,PG1 -PG2,PG2 -PG3,PG3 -PG4,PG4 -PG5,PG5 -PG6,PG6 -PG7,PG7 -PG8,PG8 -PG9,PG9 -PG10,PG10 -PG11,PG11 -PG12,PG12 -PG13,PG13 -PG14,PG14 -PG15,PG15 -PH0,PH0 -PH1,PH1 diff --git a/ports/stm32/boards/LIMIFROG/stm32l4xx_hal_conf.h b/ports/stm32/boards/LIMIFROG/stm32l4xx_hal_conf.h deleted file mode 100644 index 6bfb28118a..0000000000 --- a/ports/stm32/boards/LIMIFROG/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,372 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/board_init.c b/ports/stm32/boards/NETDUINO_PLUS_2/board_init.c deleted file mode 100644 index 53df72503b..0000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/board_init.c +++ /dev/null @@ -1,24 +0,0 @@ -#include STM32_HAL_H - -void NETDUINO_PLUS_2_board_early_init(void) { - - __HAL_RCC_GPIOB_CLK_ENABLE(); - - // Turn off the backlight. LCD_BL_CTRL = PK3 - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - -#if MICROPY_HW_HAS_SDCARD - // Turn on the power enable for the sdcard (PB1) - GPIO_InitStructure.Pin = GPIO_PIN_1; - HAL_GPIO_Init(GPIOB, &GPIO_InitStructure); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, GPIO_PIN_SET); -#endif - - // Turn on the power for the 5V on the expansion header (PB2) - GPIO_InitStructure.Pin = GPIO_PIN_2; - HAL_GPIO_Init(GPIOB, &GPIO_InitStructure); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_2, GPIO_PIN_SET); -} diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.h b/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.h deleted file mode 100644 index 3125767562..0000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.h +++ /dev/null @@ -1,68 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NetduinoPlus2" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) - -#define MICROPY_HW_HAS_FLASH (1) -// On the netuino, the sdcard appears to be wired up as a 1-bit -// SPI, so the driver needs to be converted to support that before -// we can turn this on. -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_USB (1) -#define MICROPY_HW_ENABLE_SERVO (1) - -void NETDUINO_PLUS_2_board_early_init(void); -#define MICROPY_BOARD_EARLY_INIT NETDUINO_PLUS_2_board_early_init - -// HSE is 25MHz -#define MICROPY_HW_CLK_PLLM (25) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) - -// SPI busses -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_B11) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_A10) // Blue LED -#define MICROPY_HW_LED2 (pin_C13) // White LED (aka Power) -#define MICROPY_HW_LED3 (pin_A10) // Same as Led(1) -#define MICROPY_HW_LED4 (pin_C13) // Same as Led(2) -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.mk b/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/pins.csv b/ports/stm32/boards/NETDUINO_PLUS_2/pins.csv deleted file mode 100644 index 53ffa9d1fe..0000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/pins.csv +++ /dev/null @@ -1,37 +0,0 @@ -D0,PC7 -D1,PC6 -D2,PA3 -D3,PA2 -D4,PB12 -D5,PB8 -D6,PB9 -D7,PA1 -D8,PA0 -D9,PA6 -D10,PB10 -D11,PB15 -D12,PB14 -D13,PB13 -SDA,PB6 -SCL,PB7 -A0,PC0 -A1,PC1 -A2,PC2 -A3,PC3 -A4,PC4 -A5,PC5 -LED,PA10 -SW,PB11 -PWR_LED,PC13 -PWR_SD,PB1 -PWR_HDR,PB2 -PWR_ETH,PC15 -RST_ETH,PD2 -UART1_TX,PA9 -UART3_TX,PD8 -UART3_RX,PD9 -UART3_RTS,PD12 -UART3_CTS,PD11 -UART5_TX,PC12 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/stm32f4xx_hal_conf.h b/ports/stm32/boards/NETDUINO_PLUS_2/stm32f4xx_hal_conf.h deleted file mode 100644 index 4cb5a83e45..0000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.h deleted file mode 100644 index 3546d521bf..0000000000 --- a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.h +++ /dev/null @@ -1,59 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F091RC" -#define MICROPY_HW_MCU_NAME "STM32F091RCT6" - -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_PY_USOCKET (0) -#define MICROPY_PY_NETWORK (0) -#define MICROPY_PY_STM (0) -#define MICROPY_PY_PYB_LEGACY (0) -#define MICROPY_VFS_FAT (0) - -#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_ADC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_HAS_SWITCH (1) - -// For system clock, board uses internal 48MHz, HSI48 - -// The board has an external 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (1) - -// UART config -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) - -// USART2 is connected to the ST-LINK USB VCP -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 3 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B9) // Arduino D14, pin 5 on CN10 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B11) // pin 18 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -// USER B1 has a pull-up and is active low -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (0) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// NUCLEO-64 has one user LED -#define MICROPY_HW_LED1 (pin_A5) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk deleted file mode 100644 index 1d66f7e6b6..0000000000 --- a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = f0 -CMSIS_MCU = STM32F091xC -AF_FILE = boards/stm32f091_af.csv -LD_FILES = boards/stm32f091xc.ld boards/common_basic.ld - -# Don't include default frozen modules because MCU is tight on flash space -FROZEN_MPY_DIR ?= diff --git a/ports/stm32/boards/NUCLEO_F091RC/pins.csv b/ports/stm32/boards/NUCLEO_F091RC/pins.csv deleted file mode 100644 index 36d3141083..0000000000 --- a/ports/stm32/boards/NUCLEO_F091RC/pins.csv +++ /dev/null @@ -1,87 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -RX,PA3 -TX,PA2 -SCL,PB8 -SDA,PB9 -SCK,PA5 -MISO,PA6 -MOSI,PA7 -CS,PB6 -BOOT0,PF11 -SWDIO,PA13 -SWCLK,PA14 -USER_B1,PC13 -LED_GREEN,PA5 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PF0,PF0 -PF1,PF1 -PF11,PF11 diff --git a/ports/stm32/boards/NUCLEO_F091RC/stm32f0xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F091RC/stm32f0xx_hal_conf.h deleted file mode 100644 index 53ea047cbd..0000000000 --- a/ports/stm32/boards/NUCLEO_F091RC/stm32f0xx_hal_conf.h +++ /dev/null @@ -1,312 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_hal_conf_template.h - * @author MCD Application Team - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32f0xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2016 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F0xx_HAL_CONF_H -#define __STM32F0xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -#define HAL_CEC_MODULE_ENABLED -#define HAL_COMP_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_CRC_MODULE_ENABLED -#define HAL_DAC_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -#define HAL_IRDA_MODULE_ENABLED -#define HAL_IWDG_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_SMARTCARD_MODULE_ENABLED -#define HAL_SMBUS_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_TSC_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -#define HAL_WWDG_MODULE_ENABLED - -/* ######################### Oscillator Values adaptation ################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -/** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - * Timeout value - */ -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup - * Timeout value - */ -#if !defined (HSI_STARTUP_TIMEOUT) - #define HSI_STARTUP_TIMEOUT 5000U /*!< Time out for HSI start up */ -#endif /* HSI_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator for ADC (HSI14) value. - */ -#if !defined (HSI14_VALUE) - #define HSI14_VALUE 14000000U /*!< Value of the Internal High Speed oscillator for ADC in Hz. - The real value may vary depending on the variations - in voltage and temperature. */ -#endif /* HSI14_VALUE */ - -/** - * @brief Internal High Speed oscillator for USB (HSI48) value. - */ -#if !defined (HSI48_VALUE) - #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB in Hz. - The real value may vary depending on the variations - in voltage and temperature. */ -#endif /* HSI48_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE 40000U -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -/** - * @brief Time out for LSE start up value in ms. - */ -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE 3300U /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define INSTRUCTION_CACHE_ENABLE 0U -#define DATA_CACHE_ENABLE 0U -#define USE_SPI_CRC 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/*#define USE_FULL_ASSERT 1*/ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f0xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f0xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f0xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f0xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f0xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f0xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f0xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32f0xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f0xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f0xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f0xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f0xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f0xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f0xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f0xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f0xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f0xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f0xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f0xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32f0xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f0xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f0xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32f0xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f0xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f0xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f0xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(char* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F0xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h deleted file mode 100644 index a843d3c35f..0000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h +++ /dev/null @@ -1,57 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F401RE" -#define MICROPY_HW_MCU_NAME "STM32F401xE" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) - -// HSE is 8MHz, CPU freq set to 84MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -// UART 2 connects to the STM32F103 (STLINK) on the Nucleo board -// and this is exposed as a USB Serial port. -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 3 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B9) // D14, pin 5 on CN10 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_I2C3_SCL (pin_A8) // Arduino D7, pin 23 on CN10 -#define MICROPY_HW_I2C3_SDA (pin_C9) // pin 1 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 - -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -#define MICROPY_HW_SPI3_NSS (pin_A4) // Arduino A2, pin 32 on CN7 -#define MICROPY_HW_SPI3_SCK (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_SPI3_MISO (pin_B4) // Arduino D5, pin 27 on CN10 -#define MICROPY_HW_SPI3_MOSI (pin_B5) // Arduino D4, pin 29 on CN10 - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk deleted file mode 100644 index 4c3022f544..0000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F401xE -AF_FILE = boards/stm32f401_af.csv -LD_FILES = boards/stm32f401xe.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NUCLEO_F401RE/pins.csv b/ports/stm32/boards/NUCLEO_F401RE/pins.csv deleted file mode 100644 index 6fbf91e29a..0000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/pins.csv +++ /dev/null @@ -1,75 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED_GREEN,PA5 -LED_ORANGE,PA5 -LED_RED,PA5 -LED_BLUE,PA4 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_F401RE/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F401RE/stm32f4xx_hal_conf.h deleted file mode 100644 index daf9b63cec..0000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.h deleted file mode 100644 index 26b1e0b619..0000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.h +++ /dev/null @@ -1,68 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F411RE" -#define MICROPY_HW_MCU_NAME "STM32F411xE" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) - -// HSE is 8MHz, CPU freq set to 96MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (192) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (4) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -// UART 2 connects to the STM32F103 (STLINK) on the Nucleo board -// and this is exposed as a USB Serial port. -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 3 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B9) // D14, pin 5 on CN10 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_I2C3_SCL (pin_A8) // Arduino D7, pin 23 on CN10 -#define MICROPY_HW_I2C3_SDA (pin_C9) // pin 1 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 - -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -#define MICROPY_HW_SPI3_NSS (pin_A4) // Arduino A2, pin 32 on CN7 -#define MICROPY_HW_SPI3_SCK (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_SPI3_MISO (pin_B4) // Arduino D5, pin 27 on CN10 -#define MICROPY_HW_SPI3_MOSI (pin_B5) // Arduino D4, pin 29 on CN10 - -#define MICROPY_HW_SPI4_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI4_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI4_MISO (pin_A1) // pin 30 on CN7 -#define MICROPY_HW_SPI4_MOSI (pin_A11) // pin 14 on CN10 - - -#define MICROPY_HW_SPI5_NSS (pin_B1) // pin 24 on CN10 -#define MICROPY_HW_SPI5_SCK (pin_A10) // pin 33 on CN10 -#define MICROPY_HW_SPI5_MISO (pin_A12) // pin 12 on CN10 -#define MICROPY_HW_SPI5_MOSI (pin_B0) // pin 34 on CN7 - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk deleted file mode 100644 index df95065225..0000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F411xE -AF_FILE = boards/stm32f411_af.csv -LD_FILES = boards/stm32f411.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NUCLEO_F411RE/pins.csv b/ports/stm32/boards/NUCLEO_F411RE/pins.csv deleted file mode 100644 index 6fbf91e29a..0000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/pins.csv +++ /dev/null @@ -1,75 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED_GREEN,PA5 -LED_ORANGE,PA5 -LED_RED,PA5 -LED_BLUE,PA4 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_F411RE/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F411RE/stm32f4xx_hal_conf.h deleted file mode 100644 index 8f0b663811..0000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h deleted file mode 100644 index 17883a1920..0000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h +++ /dev/null @@ -1,83 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F429ZI" -#define MICROPY_HW_MCU_NAME "STM32F429" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6 - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) - -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) - -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) - -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_C11) - -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) - -#define MICROPY_HW_UART_REPL PYB_UART_3 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_C9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_B3) -#define MICROPY_HW_SPI1_MISO (pin_B4) -#define MICROPY_HW_SPI1_MOSI (pin_B5) - -#define MICROPY_HW_SPI4_NSS (pin_E4) -#define MICROPY_HW_SPI4_SCK (pin_E2) -#define MICROPY_HW_SPI4_MISO (pin_E5) -#define MICROPY_HW_SPI4_MOSI (pin_E6) - -#define MICROPY_HW_SPI5_NSS (pin_F6) -#define MICROPY_HW_SPI5_SCK (pin_F7) -#define MICROPY_HW_SPI5_MISO (pin_F8) -#define MICROPY_HW_SPI5_MOSI (pin_F9) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B0) // green -#define MICROPY_HW_LED2 (pin_B7) // blue -#define MICROPY_HW_LED3 (pin_B14) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk deleted file mode 100644 index d19a35c316..0000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F429xx -AF_FILE = boards/stm32f429_af.csv -LD_FILES = boards/stm32f429.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NUCLEO_F429ZI/pins.csv b/ports/stm32/boards/NUCLEO_F429ZI/pins.csv deleted file mode 100644 index 8a892d3c2f..0000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/pins.csv +++ /dev/null @@ -1,117 +0,0 @@ -PF4,PF4 -PF5,PF5 -PF2,PF2 -PF3,PF3 -PF0,PF0 -PF1,PF1 -PC14,PC14 -PC15,PC15 -PE6,PE6 -PC13,PC13 -PE4,PE4 -PE5,PE5 -PE2,PE2 -PE3,PE3 -PE0,PE0 -PE1,PE1 -PB8,PB8 -PB9,PB9 -PB6,PB6 -PB7,PB7 -PB4,PB4 -PB5,PB5 -PG15,PG15 -PB3,PB3 -PG13,PG13 -PG14,PG14 -PG11,PG11 -PG12,PG12 -PG9,PG9 -PG10,PG10 -PD7,PD7 -PD6,PD6 -PD5,PD5 -PD4,PD4 -PD3,PD3 -PD2,PD2 -PD1,PD1 -PD0,PD0 -PC12,PC12 -PC11,PC11 -PC10,PC10 -PA15,PA15 -PA14,PA14 -PA13,PA13 -PA12,PA12 -PA11,PA11 -PA10,PA10 -PA9,PA9 -PA8,PA8 -PC9,PC9 -PC8,PC8 -PC7,PC7 -PC6,PC6 -PG8,PG8 -PG7,PG7 -PG6,PG6 -PG5,PG5 -PG4,PG4 -PF6,PF6 -PF8,PF8 -PF7,PF7 -PF10,PF10 -PF9,PF9 -PH1,PH1 -PH0,PH0 -PC1,PC1 -PC0,PC0 -PC3,PC3 -PC2,PC2 -PA1,PA1 -PA0,PA0 -PA3,PA3 -PA2,PA2 -PA5,PA5 -PA4,PA4 -PA7,PA7 -PA6,PA6 -PC5,PC5 -PC4,PC4 -PB1,PB1 -PB0,PB0 -PB2,PB2 -PF12,PF12 -PF11,PF11 -PF14,PF14 -PF13,PF13 -PG0,PG0 -PF15,PF15 -PE7,PE7 -PG1,PG1 -PE9,PE9 -PE8,PE8 -PE11,PE11 -PE10,PE10 -PE13,PE13 -PE12,PE12 -PE15,PE15 -PE14,PE14 -PB11,PB11 -PB10,PB10 -PB13,PB13 -PB12,PB12 -PB15,PB15 -PB14,PB14 -PD9,PD9 -PD8,PD8 -PD11,PD11 -PD10,PD10 -PD13,PD13 -PD12,PD12 -PD15,PD15 -PD14,PD14 -PG3,PG3 -PG2,PG2 -SW,PA0 -LED_GREEN,PG13 -LED_RED,PG14 diff --git a/ports/stm32/boards/NUCLEO_F429ZI/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F429ZI/stm32f4xx_hal_conf.h deleted file mode 100644 index 5b5a8a3e43..0000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - - /* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h deleted file mode 100644 index d801fa1885..0000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h +++ /dev/null @@ -1,64 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F446RE" -#define MICROPY_HW_MCU_NAME "STM32F446xx" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) - -// HSE is 8MHz, CPU freq set to 168MHz. Using PLLQ for USB this gives a nice -// 48 MHz clock for USB. To goto 180 MHz, I think that USB would need to be -// configured to use PLLSAI -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -// UART 2 connects to the STM32F103 (STLINK) on the Nucleo board -// and this is exposed as a USB Serial port. -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) // Arduino D10, pin 17 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B7) // pin 21 on CN7 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_I2C3_SCL (pin_A8) // Arduino D7, pin 23 on CN10 -#define MICROPY_HW_I2C3_SDA (pin_C9) // pin 1 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 - -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -#define MICROPY_HW_SPI3_NSS (pin_A4) // Arduino A2, pin 32 on CN7 -#define MICROPY_HW_SPI3_SCK (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_SPI3_MISO (pin_B4) // Arduino D5, pin 27 on CN10 -#define MICROPY_HW_SPI3_MOSI (pin_B5) // Arduino D4, pin 29 on CN10 - -#define MICROPY_HW_SPI4_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI4_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI4_MISO (pin_A1) // pin 30 on CN7 -#define MICROPY_HW_SPI4_MOSI (pin_A11) // pin 14 on CN10 - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk deleted file mode 100644 index 64a80e992b..0000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F446xx -AF_FILE = boards/stm32f429_af.csv -LD_FILES = boards/stm32f411.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NUCLEO_F446RE/pins.csv b/ports/stm32/boards/NUCLEO_F446RE/pins.csv deleted file mode 100644 index 5b09bcc74b..0000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/pins.csv +++ /dev/null @@ -1,72 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED,PA5 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_F446RE/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F446RE/stm32f4xx_hal_conf.h deleted file mode 100644 index 245fb9a06a..0000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.h deleted file mode 100644 index a9fbea5766..0000000000 --- a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.h +++ /dev/null @@ -1,77 +0,0 @@ -// This board is only confirmed to operate using DFU mode and openocd. -// DFU mode can be accessed by setting BOOT0 (see schematics) -// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in -// the make command. - -#define MICROPY_HW_BOARD_NAME "NUCLEO-F746ZG" -#define MICROPY_HW_MCU_NAME "STM32F746" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -// VCOClock = HSE * PLLN / PLLM = 8 MHz * 216 / 4 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (4) -#define MICROPY_HW_CLK_PLLN (216) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -#define MICROPY_HW_UART2_RTS (pin_D4) -#define MICROPY_HW_UART2_CTS (pin_D3) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART6_TX (pin_G14) -#define MICROPY_HW_UART6_RX (pin_G9) -#define MICROPY_HW_UART_REPL PYB_UART_3 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B0) // green -#define MICROPY_HW_LED2 (pin_B7) // blue -#define MICROPY_HW_LED3 (pin_B14) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk deleted file mode 100644 index 160218fd33..0000000000 --- a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F746xx -AF_FILE = boards/stm32f746_af.csv -LD_FILES = boards/stm32f746.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NUCLEO_F746ZG/pins.csv b/ports/stm32/boards/NUCLEO_F746ZG/pins.csv deleted file mode 100644 index aa5143e8c5..0000000000 --- a/ports/stm32/boards/NUCLEO_F746ZG/pins.csv +++ /dev/null @@ -1,68 +0,0 @@ -A0,PA3 -A1,PC0 -A2,PC3 -A3,PF3 -A4,PF5 -A5,PF10 -D0,PG9 -D1,PG14 -D2,PF15 -D3,PE13 -D4,PF14 -D5,PE11 -D6,PE9 -D7,PF13 -D8,PF12 -D9,PD15 -D10,PD14 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -D16,PC6 -D17,PB15 -D18,PB13 -D19,PB12 -D20,PA15 -D21,PC7 -D22,PB5 -D23,PB3 -D24,PA4 -D25,PB4 -LED1,PB0 -LED2,PB7 -LED3,PB14 -SW,PC13 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_SW,PC13 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 -VCP_TX,PD8 -VCP_RX,PD9 -UART2_TX,PD5 -UART2_RX,PD6 -UART2_RTS,PD4 -UART2_CTS,PD3 -UART6_TX,PG14 -UART6_RX,PG9 -SPI_B_NSS,PA4 -SPI_B_SCK,PB3 -SPI_B_MOSI,PB5 diff --git a/ports/stm32/boards/NUCLEO_F746ZG/stm32f7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F746ZG/stm32f7xx_hal_conf.h deleted file mode 100644 index a019ee4ce9..0000000000 --- a/ports/stm32/boards/NUCLEO_F746ZG/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,427 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F767ZI/board_init.c b/ports/stm32/boards/NUCLEO_F767ZI/board_init.c deleted file mode 100644 index 7d25a445d7..0000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/board_init.c +++ /dev/null @@ -1,8 +0,0 @@ -#include "py/mphal.h" - -void NUCLEO_F767ZI_board_early_init(void) { - // Turn off the USB switch - #define USB_PowerSwitchOn pin_G6 - mp_hal_pin_output(USB_PowerSwitchOn); - mp_hal_pin_low(USB_PowerSwitchOn); -} diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h deleted file mode 100644 index 3f23d77d48..0000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h +++ /dev/null @@ -1,80 +0,0 @@ -// This board is only confirmed to operate using DFU mode and openocd. -// DFU mode can be accessed by setting BOOT0 (see schematics) -// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in -// the make command. - -#define MICROPY_HW_BOARD_NAME "NUCLEO-F767ZI" -#define MICROPY_HW_MCU_NAME "STM32F767" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -#define MICROPY_BOARD_EARLY_INIT NUCLEO_F767ZI_board_early_init -void NUCLEO_F767ZI_board_early_init(void); - -// HSE is 25MHz -// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (4) -#define MICROPY_HW_CLK_PLLN (216) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -#define MICROPY_HW_UART2_RTS (pin_D4) -#define MICROPY_HW_UART2_CTS (pin_D3) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART6_TX (pin_G14) -#define MICROPY_HW_UART6_RX (pin_G9) -#define MICROPY_HW_UART_REPL PYB_UART_3 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B0) // green -#define MICROPY_HW_LED2 (pin_B7) // blue -#define MICROPY_HW_LED3 (pin_B14) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk deleted file mode 100644 index b79ee7da20..0000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F767xx -MICROPY_FLOAT_IMPL = double -AF_FILE = boards/stm32f767_af.csv -LD_FILES = boards/stm32f767.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/NUCLEO_F767ZI/pins.csv b/ports/stm32/boards/NUCLEO_F767ZI/pins.csv deleted file mode 100644 index 3cae615dab..0000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/pins.csv +++ /dev/null @@ -1,72 +0,0 @@ -A0,PA3 -A1,PC0 -A2,PC3 -A3,PF3 -A4,PF5 -A5,PF10 -A6,PB1 -A7,PC2 -A8,PF4 -D0,PG9 -D1,PG14 -D2,PF15 -D3,PE13 -D4,PF14 -D5,PE11 -D6,PE9 -D7,PF13 -D8,PF12 -D9,PD15 -D10,PD14 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -D16,PC6 -D17,PB15 -D18,PB13 -D19,PB12 -D20,PA15 -D21,PC7 -D22,PB5 -D23,PB3 -D24,PA4 -D25,PB4 -LED1,PB0 -LED2,PB7 -LED3,PB14 -SW,PC13 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_SW,PC13 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 -USB_POWER,PG6 -VCP_TX,PD8 -VCP_RX,PD9 -UART2_TX,PD5 -UART2_RX,PD6 -UART2_RTS,PD4 -UART2_CTS,PD3 -UART6_TX,PG14 -UART6_RX,PG9 -SPI_B_NSS,PA4 -SPI_B_SCK,PB3 -SPI_B_MOSI,PB5 diff --git a/ports/stm32/boards/NUCLEO_F767ZI/stm32f7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F767ZI/stm32f7xx_hal_conf.h deleted file mode 100644 index a019ee4ce9..0000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,427 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_H743ZI/board_init.c b/ports/stm32/boards/NUCLEO_H743ZI/board_init.c deleted file mode 100644 index 04149c37b8..0000000000 --- a/ports/stm32/boards/NUCLEO_H743ZI/board_init.c +++ /dev/null @@ -1,8 +0,0 @@ -#include "py/mphal.h" - -void NUCLEO_H743ZI_board_early_init(void) { - // Turn off the USB switch - #define USB_PowerSwitchOn pin_G6 - mp_hal_pin_output(USB_PowerSwitchOn); - mp_hal_pin_low(USB_PowerSwitchOn); -} diff --git a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h deleted file mode 100644 index 117e7f3f60..0000000000 --- a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h +++ /dev/null @@ -1,65 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO_H743ZI" -#define MICROPY_HW_MCU_NAME "STM32H743" - -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_ADC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) - -#define MICROPY_BOARD_EARLY_INIT NUCLEO_H743ZI_board_early_init -void NUCLEO_H743ZI_board_early_init(void); - -// The board has an 8MHz HSE, the following gives 400MHz CPU speed -#define MICROPY_HW_CLK_PLLM (4) -#define MICROPY_HW_CLK_PLLN (400) -#define MICROPY_HW_CLK_PLLP (2) -#define MICROPY_HW_CLK_PLLQ (4) -#define MICROPY_HW_CLK_PLLR (2) - -// 4 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// UART config -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART_REPL PYB_UART_3 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_F1) -#define MICROPY_HW_I2C2_SDA (pin_F0) - -// SPI -//#define MICROPY_HW_SPI2_NSS (pin_I0) -//#define MICROPY_HW_SPI2_SCK (pin_I1) -//#define MICROPY_HW_SPI2_MISO (pin_B14) -//#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B0) // green -#define MICROPY_HW_LED2 (pin_B7) // blue -#define MICROPY_HW_LED3 (pin_B14) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_G2) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) diff --git a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk deleted file mode 100644 index 4d3455441f..0000000000 --- a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = h7 -CMSIS_MCU = STM32H743xx -MICROPY_FLOAT_IMPL = double -AF_FILE = boards/stm32h743_af.csv -LD_FILES = boards/stm32h743.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08040000 diff --git a/ports/stm32/boards/NUCLEO_H743ZI/pins.csv b/ports/stm32/boards/NUCLEO_H743ZI/pins.csv deleted file mode 100644 index 30910c4dd5..0000000000 --- a/ports/stm32/boards/NUCLEO_H743ZI/pins.csv +++ /dev/null @@ -1,63 +0,0 @@ -A0,PA0 -A1,PF10 -A2,PF9 -A3,PF8 -A4,PF7 -A5,PF6 -D0,PC7 -D1,PC6 -D2,PG6 -D3,PB4 -D4,PG7 -D5,PA8 -D6,PH6 -D7,PI3 -D8,PI2 -D9,PA15 -D10,PI0 -D11,PB15 -D12,PB14 -D13,PI1 -D14,PB9 -D15,PB8 -DAC1,PA4 -DAC2,PA5 -LED1,PB0 -LED2,PB7 -LED3,PB14 -SW,PC13 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -I2C1_SDA,PB9 -I2C1_SCL,PB8 -I2C2_SDA,PF0 -I2C2_SCL,PF1 -EXT_RST,PG3 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD_SW,PG2 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PJ12 -USB_ID,PA8 -USB_DM,PA11 -USB_DP,PA12 -UART1_TX,PA9 -UART1_RX,PA10 -UART5_TX,PC12 -UART5_RX,PD2 -UART3_TX,PD8 -UART3_RX,PD9 diff --git a/ports/stm32/boards/NUCLEO_H743ZI/stm32h7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_H743ZI/stm32h7xx_hal_conf.h deleted file mode 100644 index 97b141d49f..0000000000 --- a/ports/stm32/boards/NUCLEO_H743ZI/stm32h7xx_hal_conf.h +++ /dev/null @@ -1,434 +0,0 @@ -/** - ****************************************************************************** - * @file stm32h7xx_hal_conf_template.h - * @author MCD Application Team - * @version V1.2.0 - * @date 29-December-2017 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32h7xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32H7xx_HAL_CONF_H -#define __STM32H7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CEC_MODULE_ENABLED -#define HAL_COMP_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_CRC_MODULE_ENABLED -#define HAL_CRYP_MODULE_ENABLED -#define HAL_DAC_MODULE_ENABLED -#define HAL_DCMI_MODULE_ENABLED -#define HAL_DFSDM_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_DMA2D_MODULE_ENABLED -#define HAL_ETH_MODULE_ENABLED -#define HAL_FDCAN_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_GPIO_MODULE_ENABLED -#define HAL_HASH_MODULE_ENABLED -#define HAL_HCD_MODULE_ENABLED -#define HAL_HRTIM_MODULE_ENABLED -#define HAL_HSEM_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -#define HAL_IRDA_MODULE_ENABLED -#define HAL_IWDG_MODULE_ENABLED -#define HAL_JPEG_MODULE_ENABLED -#define HAL_LPTIM_MODULE_ENABLED -#define HAL_LTDC_MODULE_ENABLED -#define HAL_MDIOS_MODULE_ENABLED -#define HAL_MDMA_MODULE_ENABLED -#define HAL_MMC_MODULE_ENABLED -#define HAL_NAND_MODULE_ENABLED -#define HAL_NOR_MODULE_ENABLED -#define HAL_OPAMP_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_QSPI_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_SAI_MODULE_ENABLED -#define HAL_SD_MODULE_ENABLED -#define HAL_SDRAM_MODULE_ENABLED -#define HAL_SMARTCARD_MODULE_ENABLED -#define HAL_SMBUS_MODULE_ENABLED -#define HAL_SPDIFRX_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_SRAM_MODULE_ENABLED -#define HAL_SWPMI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -#define HAL_WWDG_MODULE_ENABLED - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) -#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal oscillator (CSI) default value. - * This value is the default CSI value after Reset. - */ -#if !defined (CSI_VALUE) - #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* CSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ - -/* ########################### Ethernet Configuration ######################### */ -#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */ -#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */ - -#define ETH_MAC_ADDR0 ((uint8_t)0x02) -#define ETH_MAC_ADDR1 ((uint8_t)0x00) -#define ETH_MAC_ADDR2 ((uint8_t)0x00) -#define ETH_MAC_ADDR3 ((uint8_t)0x00) -#define ETH_MAC_ADDR4 ((uint8_t)0x00) -#define ETH_MAC_ADDR5 ((uint8_t)0x00) - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## SPI peripheral configuration ########################## */ -/** - * @brief Used to activate CRC feature inside HAL SPI Driver - * Activated (1U): CRC code is compiled within HAL SPI driver - * Deactivated (0U): CRC code excluded from HAL SPI driver - */ - -#define USE_SPI_CRC 1U - - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32h7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32h7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32h7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32h7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32h7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32h7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32h7xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32h7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32h7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32h7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_FDCAN_MODULE_ENABLED - #include "stm32h7xx_hal_fdcan.h" -#endif /* HAL_FDCAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32h7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32h7xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32h7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32h7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32h7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32h7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_HRTIM_MODULE_ENABLED - #include "stm32h7xx_hal_hrtim.h" -#endif /* HAL_HRTIM_MODULE_ENABLED */ - -#ifdef HAL_HSEM_MODULE_ENABLED - #include "stm32h7xx_hal_hsem.h" -#endif /* HAL_HSEM_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32h7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32h7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32h7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32h7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32h7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32h7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_JPEG_MODULE_ENABLED - #include "stm32h7xx_hal_jpeg.h" -#endif /* HAL_JPEG_MODULE_ENABLED */ - -#ifdef HAL_MDIOS_MODULE_ENABLED - #include "stm32h7xx_hal_mdios.h" -#endif /* HAL_MDIOS_MODULE_ENABLED */ - -#ifdef HAL_MDMA_MODULE_ENABLED - #include "stm32h7xx_hal_mdma.h" -#endif /* HAL_MDMA_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED - #include "stm32h7xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32h7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED -#include "stm32h7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32h7xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32h7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32h7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32h7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32h7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32h7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32h7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32h7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32h7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32h7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32h7xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32h7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32h7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32h7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32h7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32h7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32h7xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32h7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32h7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32h7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32H7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h deleted file mode 100644 index 0d5dab3945..0000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h +++ /dev/null @@ -1,55 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-L476RG" -#define MICROPY_HW_MCU_NAME "STM32L476RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLR (2) -#define MICROPY_HW_CLK_PLLP (7) -#define MICROPY_HW_CLK_PLLQ (4) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) - -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) -#define MICROPY_HW_I2C3_SCL (pin_C0) -#define MICROPY_HW_I2C3_SDA (pin_C1) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_B3) -#define MICROPY_HW_SPI1_MISO (pin_B4) -#define MICROPY_HW_SPI1_MOSI (pin_B5) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk deleted file mode 100644 index 38ae5af212..0000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L476xx -AF_FILE = boards/stm32l476_af.csv -LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08004000 diff --git a/ports/stm32/boards/NUCLEO_L476RG/pins.csv b/ports/stm32/boards/NUCLEO_L476RG/pins.csv deleted file mode 100644 index 035d933f5d..0000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/pins.csv +++ /dev/null @@ -1,76 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED_GREEN,PA5 -LED_ORANGE,PA5 -LED_RED,PA5 -LED_BLUE,PA4 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_L476RG/stm32l4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_L476RG/stm32l4xx_hal_conf.h deleted file mode 100755 index 6bfb28118a..0000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,372 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.h b/ports/stm32/boards/OLIMEX_E407/mpconfigboard.h deleted file mode 100644 index a56f6f79df..0000000000 --- a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.h +++ /dev/null @@ -1,80 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "OLIMEX STM32-E407" -#define MICROPY_HW_MCU_NAME "STM32F407" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#if MICROPY_HW_HAS_SWITCH == 0 -// NOTE: A0 also connects to the user switch. To use UART4 you should -// set MICROPY_HW_HAS_SWITCH to 0, and also remove SB20 (on the back -// of the board near the USER switch). -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#endif -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_C13) -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_C11) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.mk b/ports/stm32/boards/OLIMEX_E407/mpconfigboard.mk deleted file mode 100644 index b154dcfbac..0000000000 --- a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F407xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/OLIMEX_E407/pins.csv b/ports/stm32/boards/OLIMEX_E407/pins.csv deleted file mode 100644 index 81a9bcb853..0000000000 --- a/ports/stm32/boards/OLIMEX_E407/pins.csv +++ /dev/null @@ -1,86 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PC4,PC4 -PC5,PC5 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -LED_GREEN,PC13 -PC14,PC14 -PC15,PC15 -PH0,PH0 -PH1,PH1 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PA0,PA0 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/OLIMEX_E407/stm32f4xx_hal_conf.h b/ports/stm32/boards/OLIMEX_E407/stm32f4xx_hal_conf.h deleted file mode 100644 index 24cc9228b8..0000000000 --- a/ports/stm32/boards/OLIMEX_E407/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBLITEV10/mpconfigboard.h b/ports/stm32/boards/PYBLITEV10/mpconfigboard.h deleted file mode 100644 index 60a6980aaf..0000000000 --- a/ports/stm32/boards/PYBLITEV10/mpconfigboard.h +++ /dev/null @@ -1,84 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBLITEv1.0" -#define MICROPY_HW_MCU_NAME "STM32F411RE" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) -#define MICROPY_HW_ENABLE_SERVO (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (192) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (4) -#define MICROPY_HW_CLK_LAST_FREQ (1) - -// Pyboard lite has an optional 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (1) -#define MICROPY_HW_RTC_USE_US (0) -#define MICROPY_HW_RTC_USE_CALOUT (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_NAME "XA" -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C3_NAME "Y" -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_B8) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_B5) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_A10) diff --git a/ports/stm32/boards/PYBLITEV10/mpconfigboard.mk b/ports/stm32/boards/PYBLITEV10/mpconfigboard.mk deleted file mode 100644 index df95065225..0000000000 --- a/ports/stm32/boards/PYBLITEV10/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F411xE -AF_FILE = boards/stm32f411_af.csv -LD_FILES = boards/stm32f411.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/PYBLITEV10/pins.csv b/ports/stm32/boards/PYBLITEV10/pins.csv deleted file mode 100644 index 838587c1bc..0000000000 --- a/ports/stm32/boards/PYBLITEV10/pins.csv +++ /dev/null @@ -1,60 +0,0 @@ -X1,PA2 -X2,PA3 -X3,PA0 -X4,PA1 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB10 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PA8 -Y10,PB8 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_BLUE,PB4 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -MMA_AVDD,PA10 -MMA_INT,PB2 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD_SW,PB5 -USB_VBUS,PA9 -USB_DM,PA11 -USB_DP,PA12 -USB_ID,PA10 -OSC32_IN,PC14 -OSC32_OUT,PC15 diff --git a/ports/stm32/boards/PYBLITEV10/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBLITEV10/stm32f4xx_hal_conf.h deleted file mode 100644 index 4e96f785ad..0000000000 --- a/ports/stm32/boards/PYBLITEV10/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV10/mpconfigboard.h b/ports/stm32/boards/PYBV10/mpconfigboard.h deleted file mode 100644 index 3439f5a0fb..0000000000 --- a/ports/stm32/boards/PYBV10/mpconfigboard.h +++ /dev/null @@ -1,102 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv1.0" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) -#define MICROPY_HW_CLK_LAST_FREQ (1) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) -#define MICROPY_HW_RTC_USE_US (0) -#define MICROPY_HW_RTC_USE_CALOUT (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_NAME "YB" -#define MICROPY_HW_UART3_TX (pin_B10) -#define MICROPY_HW_UART3_RX (pin_B11) -#define MICROPY_HW_UART3_RTS (pin_B14) -#define MICROPY_HW_UART3_CTS (pin_B13) -#define MICROPY_HW_UART4_NAME "XA" -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_NAME "Y" -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_NAME "YA" -#define MICROPY_HW_CAN1_TX (pin_B9) // Y4 -#define MICROPY_HW_CAN1_RX (pin_B8) // Y3 -#define MICROPY_HW_CAN2_NAME "YB" -#define MICROPY_HW_CAN2_TX (pin_B13) // Y6 -#define MICROPY_HW_CAN2_RX (pin_B12) // Y5 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV10/mpconfigboard.mk b/ports/stm32/boards/PYBV10/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/PYBV10/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/PYBV10/pins.csv b/ports/stm32/boards/PYBV10/pins.csv deleted file mode 100644 index cee80a1aa1..0000000000 --- a/ports/stm32/boards/PYBV10/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -X1,PA0 -X2,PA1 -X3,PA2 -X4,PA3 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB8 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PB10 -Y10,PB11 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -LED_BLUE,PB4 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD,PA8 -SD_SW,PA8 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV10/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV10/stm32f4xx_hal_conf.h deleted file mode 100644 index 4f18ac81e3..0000000000 --- a/ports/stm32/boards/PYBV10/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV11/mpconfigboard.h b/ports/stm32/boards/PYBV11/mpconfigboard.h deleted file mode 100644 index 2c75d0e64f..0000000000 --- a/ports/stm32/boards/PYBV11/mpconfigboard.h +++ /dev/null @@ -1,102 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv1.1" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) -#define MICROPY_HW_CLK_LAST_FREQ (1) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) -#define MICROPY_HW_RTC_USE_US (0) -#define MICROPY_HW_RTC_USE_CALOUT (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_NAME "YB" -#define MICROPY_HW_UART3_TX (pin_B10) -#define MICROPY_HW_UART3_RX (pin_B11) -#define MICROPY_HW_UART3_RTS (pin_B14) -#define MICROPY_HW_UART3_CTS (pin_B13) -#define MICROPY_HW_UART4_NAME "XA" -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_NAME "Y" -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_NAME "YA" -#define MICROPY_HW_CAN1_TX (pin_B9) // Y4 -#define MICROPY_HW_CAN1_RX (pin_B8) // Y3 -#define MICROPY_HW_CAN2_NAME "YB" -#define MICROPY_HW_CAN2_TX (pin_B13) // Y6 -#define MICROPY_HW_CAN2_RX (pin_B12) // Y5 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV11/mpconfigboard.mk b/ports/stm32/boards/PYBV11/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/PYBV11/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/PYBV11/pins.csv b/ports/stm32/boards/PYBV11/pins.csv deleted file mode 100644 index cee80a1aa1..0000000000 --- a/ports/stm32/boards/PYBV11/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -X1,PA0 -X2,PA1 -X3,PA2 -X4,PA3 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB8 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PB10 -Y10,PB11 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -LED_BLUE,PB4 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD,PA8 -SD_SW,PA8 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV11/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV11/stm32f4xx_hal_conf.h deleted file mode 100644 index 24cc9228b8..0000000000 --- a/ports/stm32/boards/PYBV11/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV3/mpconfigboard.h b/ports/stm32/boards/PYBV3/mpconfigboard.h deleted file mode 100644 index 3e457c5e21..0000000000 --- a/ports/stm32/boards/PYBV3/mpconfigboard.h +++ /dev/null @@ -1,92 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv3" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_B10) -#define MICROPY_HW_UART3_RX (pin_B11) -#define MICROPY_HW_UART3_RTS (pin_B14) -#define MICROPY_HW_UART3_CTS (pin_B13) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// X-skin: X9=PB6=SCL, X10=PB7=SDA -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) - -// Y-skin: Y9=PB10=SCL, Y10=PB11=SDA -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) // Y4 -#define MICROPY_HW_CAN1_RX (pin_B8) // Y3 -#define MICROPY_HW_CAN2_TX (pin_B13) // Y6 -#define MICROPY_HW_CAN2_RX (pin_B12) // Y5 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_A13) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED_INVERTED (1) // LEDs are on when pin is driven low -#define MICROPY_HW_LED1 (pin_A8) // R1 - red -#define MICROPY_HW_LED2 (pin_A10) // R2 - red -#define MICROPY_HW_LED3 (pin_C4) // G1 - green -#define MICROPY_HW_LED4 (pin_C5) // G2 - green -#define MICROPY_HW_LED1_PWM { TIM1, 1, TIM_CHANNEL_1, GPIO_AF1_TIM1 } -#define MICROPY_HW_LED2_PWM { TIM1, 1, TIM_CHANNEL_3, GPIO_AF1_TIM1 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_C13) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLDOWN) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_SET) - -// USB VBUS detect pin -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV3/mpconfigboard.mk b/ports/stm32/boards/PYBV3/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/PYBV3/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/PYBV3/pins.csv b/ports/stm32/boards/PYBV3/pins.csv deleted file mode 100644 index 1ddc3f52da..0000000000 --- a/ports/stm32/boards/PYBV3/pins.csv +++ /dev/null @@ -1,48 +0,0 @@ -B13,PB13 -B14,PB14 -B15,PB15 -C6,PC6 -C7,PC7 -A13,PA13 -A14,PA14 -A15,PA15 -B3,PB3 -B4,PB4 -B6,PB6 -B7,PB7 -B8,PB8 -B9,PB9 -C0,PC0 -C1,PC1 -C2,PC2 -C3,PC3 -A0,PA0 -A1,PA1 -A2,PA2 -A3,PA3 -A4,PA4 -A5,PA5 -A6,PA6 -A7,PA7 -B0,PB0 -B1,PB1 -B10,PB10 -B11,PB11 -B12,PB12 -LED_R1,PA8 -LED_R2,PA10 -LED_G1,PC4 -LED_G2,PC5 -SW,PA13 -SD,PC13 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CK,PC12 -SD_CMD,PD2 -UART1_TX,PA9 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV3/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV3/stm32f4xx_hal_conf.h deleted file mode 100644 index daf9b63cec..0000000000 --- a/ports/stm32/boards/PYBV3/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV4/mpconfigboard.h b/ports/stm32/boards/PYBV4/mpconfigboard.h deleted file mode 100644 index 8c05644f6d..0000000000 --- a/ports/stm32/boards/PYBV4/mpconfigboard.h +++ /dev/null @@ -1,99 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv4" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_PORT (GPIOB) -#define MICROPY_HW_UART1_PINS (GPIO_PIN_6 | GPIO_PIN_7) -#define MICROPY_HW_UART2_PORT (GPIOA) -#define MICROPY_HW_UART2_PINS (GPIO_PIN_2 | GPIO_PIN_3) -#define MICROPY_HW_UART2_RTS (GPIO_PIN_1) -#define MICROPY_HW_UART2_CTS (GPIO_PIN_0) -#define MICROPY_HW_UART3_NAME "YB" -#define MICROPY_HW_UART3_PORT (GPIOB) -#define MICROPY_HW_UART3_PINS (GPIO_PIN_10 | GPIO_PIN_11) -#define MICROPY_HW_UART3_RTS (GPIO_PIN_14) -#define MICROPY_HW_UART3_CTS (GPIO_PIN_13) -#define MICROPY_HW_UART4_NAME "XA" -#define MICROPY_HW_UART4_PORT (GPIOA) -#define MICROPY_HW_UART4_PINS (GPIO_PIN_0 | GPIO_PIN_1) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_PORT (GPIOC) -#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_NAME "Y" -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_NAME "YA" -#define MICROPY_HW_CAN1_TX (pin_B9) // Y4 -#define MICROPY_HW_CAN1_RX (pin_B8) // Y3 -#define MICROPY_HW_CAN2_NAME "YB" -#define MICROPY_HW_CAN2_TX (pin_B13) // Y6 -#define MICROPY_HW_CAN2_RX (pin_B12) // Y5 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV4/mpconfigboard.mk b/ports/stm32/boards/PYBV4/mpconfigboard.mk deleted file mode 100644 index 40972b3850..0000000000 --- a/ports/stm32/boards/PYBV4/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/PYBV4/pins.csv b/ports/stm32/boards/PYBV4/pins.csv deleted file mode 100644 index cee80a1aa1..0000000000 --- a/ports/stm32/boards/PYBV4/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -X1,PA0 -X2,PA1 -X3,PA2 -X4,PA3 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB8 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PB10 -Y10,PB11 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -LED_BLUE,PB4 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD,PA8 -SD_SW,PA8 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV4/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV4/stm32f4xx_hal_conf.h deleted file mode 100644 index daf9b63cec..0000000000 --- a/ports/stm32/boards/PYBV4/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F411DISC/mpconfigboard.h b/ports/stm32/boards/STM32F411DISC/mpconfigboard.h deleted file mode 100644 index 13172333b7..0000000000 --- a/ports/stm32/boards/STM32F411DISC/mpconfigboard.h +++ /dev/null @@ -1,64 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "F411DISC" -#define MICROPY_HW_MCU_NAME "STM32F411" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) -#define MICROPY_HW_ENABLE_SERVO (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (5) -#define MICROPY_HW_CLK_PLLN (210) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (7) - -// does not have a 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (0) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B9) -//#define MICROPY_HW_I2C2_SCL (pin_B10) -//#define MICROPY_HW_I2C2_SDA (pin_B11) -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_A9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_D14) // red -#define MICROPY_HW_LED2 (pin_D12) // green -#define MICROPY_HW_LED3 (pin_D13) // orange -#define MICROPY_HW_LED4 (pin_D15) // blue -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32F411DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F411DISC/mpconfigboard.mk deleted file mode 100644 index df95065225..0000000000 --- a/ports/stm32/boards/STM32F411DISC/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F411xE -AF_FILE = boards/stm32f411_af.csv -LD_FILES = boards/stm32f411.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/STM32F411DISC/pins.csv b/ports/stm32/boards/STM32F411DISC/pins.csv deleted file mode 100644 index a747aef3ef..0000000000 --- a/ports/stm32/boards/STM32F411DISC/pins.csv +++ /dev/null @@ -1,86 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PC4,PC4 -PC5,PC5 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PH0,PH0 -PH1,PH1 -LED_GREEN,PD12 -LED_ORANGE,PD13 -LED_RED,PD14 -LED_BLUE,PD15 -SW,PA0 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/STM32F411DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F411DISC/stm32f4xx_hal_conf.h deleted file mode 100644 index 8f0b663811..0000000000 --- a/ports/stm32/boards/STM32F411DISC/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h b/ports/stm32/boards/STM32F429DISC/mpconfigboard.h deleted file mode 100644 index be25d2e772..0000000000 --- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h +++ /dev/null @@ -1,74 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "F429I-DISCO" -#define MICROPY_HW_MCU_NAME "STM32F429" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_D8) -#define MICROPY_HW_UART2_RX (pin_D9) - -// I2C busses -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_C9) - -// SPI busses -//#define MICROPY_HW_SPI1_NSS (pin_A4) -//#define MICROPY_HW_SPI1_SCK (pin_A5) -//#define MICROPY_HW_SPI1_MISO (pin_A6) -//#define MICROPY_HW_SPI1_MOSI (pin_A7) -#if defined(USE_USB_HS_IN_FS) -// The HS USB uses B14 & B15 for D- and D+ -#else -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) -#endif -//#define MICROPY_HW_SPI4_NSS (pin_E11) -//#define MICROPY_HW_SPI4_SCK (pin_E12) -//#define MICROPY_HW_SPI4_MISO (pin_E13) -//#define MICROPY_HW_SPI4_MOSI (pin_E14) -#define MICROPY_HW_SPI5_NSS (pin_F6) -#define MICROPY_HW_SPI5_SCK (pin_F7) -#define MICROPY_HW_SPI5_MISO (pin_F8) -#define MICROPY_HW_SPI5_MOSI (pin_F9) -//#define MICROPY_HW_SPI6_NSS (pin_G8) -//#define MICROPY_HW_SPI6_SCK (pin_G13) -//#define MICROPY_HW_SPI6_MISO (pin_G12) -//#define MICROPY_HW_SPI6_MOSI (pin_G14) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_G14) // red -#define MICROPY_HW_LED2 (pin_G13) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_HS (1) -#define MICROPY_HW_USB_HS_IN_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_B13) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_B12) diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk deleted file mode 100644 index d19a35c316..0000000000 --- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F429xx -AF_FILE = boards/stm32f429_af.csv -LD_FILES = boards/stm32f429.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/STM32F429DISC/pins.csv b/ports/stm32/boards/STM32F429DISC/pins.csv deleted file mode 100644 index 8a892d3c2f..0000000000 --- a/ports/stm32/boards/STM32F429DISC/pins.csv +++ /dev/null @@ -1,117 +0,0 @@ -PF4,PF4 -PF5,PF5 -PF2,PF2 -PF3,PF3 -PF0,PF0 -PF1,PF1 -PC14,PC14 -PC15,PC15 -PE6,PE6 -PC13,PC13 -PE4,PE4 -PE5,PE5 -PE2,PE2 -PE3,PE3 -PE0,PE0 -PE1,PE1 -PB8,PB8 -PB9,PB9 -PB6,PB6 -PB7,PB7 -PB4,PB4 -PB5,PB5 -PG15,PG15 -PB3,PB3 -PG13,PG13 -PG14,PG14 -PG11,PG11 -PG12,PG12 -PG9,PG9 -PG10,PG10 -PD7,PD7 -PD6,PD6 -PD5,PD5 -PD4,PD4 -PD3,PD3 -PD2,PD2 -PD1,PD1 -PD0,PD0 -PC12,PC12 -PC11,PC11 -PC10,PC10 -PA15,PA15 -PA14,PA14 -PA13,PA13 -PA12,PA12 -PA11,PA11 -PA10,PA10 -PA9,PA9 -PA8,PA8 -PC9,PC9 -PC8,PC8 -PC7,PC7 -PC6,PC6 -PG8,PG8 -PG7,PG7 -PG6,PG6 -PG5,PG5 -PG4,PG4 -PF6,PF6 -PF8,PF8 -PF7,PF7 -PF10,PF10 -PF9,PF9 -PH1,PH1 -PH0,PH0 -PC1,PC1 -PC0,PC0 -PC3,PC3 -PC2,PC2 -PA1,PA1 -PA0,PA0 -PA3,PA3 -PA2,PA2 -PA5,PA5 -PA4,PA4 -PA7,PA7 -PA6,PA6 -PC5,PC5 -PC4,PC4 -PB1,PB1 -PB0,PB0 -PB2,PB2 -PF12,PF12 -PF11,PF11 -PF14,PF14 -PF13,PF13 -PG0,PG0 -PF15,PF15 -PE7,PE7 -PG1,PG1 -PE9,PE9 -PE8,PE8 -PE11,PE11 -PE10,PE10 -PE13,PE13 -PE12,PE12 -PE15,PE15 -PE14,PE14 -PB11,PB11 -PB10,PB10 -PB13,PB13 -PB12,PB12 -PB15,PB15 -PB14,PB14 -PD9,PD9 -PD8,PD8 -PD11,PD11 -PD10,PD10 -PD13,PD13 -PD12,PD12 -PD15,PD15 -PD14,PD14 -PG3,PG3 -PG2,PG2 -SW,PA0 -LED_GREEN,PG13 -LED_RED,PG14 diff --git a/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h deleted file mode 100644 index 5b5a8a3e43..0000000000 --- a/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - - /* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F439/mpconfigboard.h b/ports/stm32/boards/STM32F439/mpconfigboard.h deleted file mode 100644 index 4ac5b32138..0000000000 --- a/ports/stm32/boards/STM32F439/mpconfigboard.h +++ /dev/null @@ -1,88 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "CustomPCB" -#define MICROPY_HW_MCU_NAME "STM32F439" - -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) //works with no SD card too -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// SD card detect switch -#if MICROPY_HW_HAS_SDCARD -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (1) -#endif - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) //divide external clock by this to get 1MHz -#define MICROPY_HW_CLK_PLLN (384) //this number is the PLL clock in MHz -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) //divide PLL clock by this to get core clock -#define MICROPY_HW_CLK_PLLQ (8) //divide core clock by this to get 48MHz - -// USB config -#define MICROPY_HW_USB_FS (1) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -#define MICROPY_HW_UART2_RTS (pin_D1) -#define MICROPY_HW_UART2_CTS (pin_D0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_A8) -#define MICROPY_HW_I2C1_SDA (pin_C9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#if MICROPY_HW_USB_HS_IN_FS -// The HS USB uses B14 & B15 for D- and D+ -#else -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) -#endif -#define MICROPY_HW_SPI3_NSS (pin_E11) -#define MICROPY_HW_SPI3_SCK (pin_E12) -#define MICROPY_HW_SPI3_MISO (pin_E13) -#define MICROPY_HW_SPI3_MOSI (pin_E14) -//#define MICROPY_HW_SPI4_NSS (pin_E11) -//#define MICROPY_HW_SPI4_SCK (pin_E12) -//#define MICROPY_HW_SPI4_MISO (pin_E13) -//#define MICROPY_HW_SPI4_MOSI (pin_E14) -//#define MICROPY_HW_SPI5_NSS (pin_F6) -//#define MICROPY_HW_SPI5_SCK (pin_F7) -//#define MICROPY_HW_SPI5_MISO (pin_F8) -//#define MICROPY_HW_SPI5_MOSI (pin_F9) -//#define MICROPY_HW_SPI6_NSS (pin_G8) -//#define MICROPY_HW_SPI6_SCK (pin_G13) -//#define MICROPY_HW_SPI6_MISO (pin_G12) -//#define MICROPY_HW_SPI6_MOSI (pin_G14) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - diff --git a/ports/stm32/boards/STM32F439/mpconfigboard.mk b/ports/stm32/boards/STM32F439/mpconfigboard.mk deleted file mode 100644 index ca97acbf61..0000000000 --- a/ports/stm32/boards/STM32F439/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F439xx -AF_FILE = boards/stm32f439_af.csv -LD_FILES = boards/stm32f439.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/STM32F439/pins.csv b/ports/stm32/boards/STM32F439/pins.csv deleted file mode 100644 index cc9443dea5..0000000000 --- a/ports/stm32/boards/STM32F439/pins.csv +++ /dev/null @@ -1,85 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -VUSB,PB13 -USB1D_N,PB14 -USB1D_P,PB15 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PD2,PD2 -BOOT0,BOOT0 -PA15,PA15 -PA13,PA13 -PA14,PA14 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 diff --git a/ports/stm32/boards/STM32F439/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F439/stm32f4xx_hal_conf.h deleted file mode 100644 index 5b5a8a3e43..0000000000 --- a/ports/stm32/boards/STM32F439/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - - /* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F4DISC/mpconfigboard.h b/ports/stm32/boards/STM32F4DISC/mpconfigboard.h deleted file mode 100644 index 3e4c8261cc..0000000000 --- a/ports/stm32/boards/STM32F4DISC/mpconfigboard.h +++ /dev/null @@ -1,85 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "F4DISC" -#define MICROPY_HW_MCU_NAME "STM32F407" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#if 0 -// A9 is used for USB VBUS detect, and A10 is used for USB_FS_ID. -// UART1 is also on PB6/7 but PB6 is tied to the Audio SCL line. -// Without board modifications, this makes UART1 unusable on this board. -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#endif -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#if MICROPY_HW_HAS_SWITCH == 0 -// NOTE: A0 also connects to the user switch. To use UART4 you should -// set MICROPY_HW_HAS_SWITCH to 0, and also remove SB20 (on the back -// of the board near the USER switch). -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#endif -// NOTE: PC7 is connected to MCLK on the Audio chip. This is an input signal -// so I think as long as you're not using the audio chip then it should -// be fine to use as a UART pin. -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_D14) // red -#define MICROPY_HW_LED2 (pin_D12) // green -#define MICROPY_HW_LED3 (pin_D13) // orange -#define MICROPY_HW_LED4 (pin_D15) // blue -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32F4DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F4DISC/mpconfigboard.mk deleted file mode 100644 index b154dcfbac..0000000000 --- a/ports/stm32/boards/STM32F4DISC/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F407xx -AF_FILE = boards/stm32f405_af.csv -LD_FILES = boards/stm32f405.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/STM32F4DISC/pins.csv b/ports/stm32/boards/STM32F4DISC/pins.csv deleted file mode 100644 index a747aef3ef..0000000000 --- a/ports/stm32/boards/STM32F4DISC/pins.csv +++ /dev/null @@ -1,86 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PC4,PC4 -PC5,PC5 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PH0,PH0 -PH1,PH1 -LED_GREEN,PD12 -LED_ORANGE,PD13 -LED_RED,PD14 -LED_BLUE,PD15 -SW,PA0 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/STM32F4DISC/staccel.py b/ports/stm32/boards/STM32F4DISC/staccel.py deleted file mode 100644 index 2f2561d1cb..0000000000 --- a/ports/stm32/boards/STM32F4DISC/staccel.py +++ /dev/null @@ -1,98 +0,0 @@ -""" -Driver for accelerometer on STM32F4 Discover board. - -Sets accelerometer range at +-2g. -Returns list containing X,Y,Z axis acceleration values in 'g' units (9.8m/s^2). - -See: - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/Components/lis302dl/lis302dl.h - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/Components/lis302dl/lis302dl.c - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery.c - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery.h - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery_accelerometer.c - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery_accelerometer.h - STM32Cube_FW_F4_V1.1.0/Projects/STM32F4-Discovery/Demonstrations/Src/main.c -""" - -from micropython import const -from pyb import Pin -from pyb import SPI - -READWRITE_CMD = const(0x80) -MULTIPLEBYTE_CMD = const(0x40) -WHO_AM_I_ADDR = const(0x0f) -OUT_X_ADDR = const(0x29) -OUT_Y_ADDR = const(0x2b) -OUT_Z_ADDR = const(0x2d) -OUT_T_ADDR = const(0x0c) - -LIS302DL_WHO_AM_I_VAL = const(0x3b) -LIS302DL_CTRL_REG1_ADDR = const(0x20) -# Configuration for 100Hz sampling rate, +-2g range -LIS302DL_CONF = const(0b01000111) - -LIS3DSH_WHO_AM_I_VAL = const(0x3f) -LIS3DSH_CTRL_REG4_ADDR = const(0x20) -LIS3DSH_CTRL_REG5_ADDR = const(0x24) -# Configuration for 100Hz sampling rate, +-2g range -LIS3DSH_CTRL_REG4_CONF = const(0b01100111) -LIS3DSH_CTRL_REG5_CONF = const(0b00000000) - -class STAccel: - def __init__(self): - self.cs_pin = Pin('PE3', Pin.OUT_PP, Pin.PULL_NONE) - self.cs_pin.high() - self.spi = SPI(1, SPI.MASTER, baudrate=328125, polarity=0, phase=1, bits=8) - - self.who_am_i = self.read_id() - - if self.who_am_i == LIS302DL_WHO_AM_I_VAL: - self.write_bytes(LIS302DL_CTRL_REG1_ADDR, bytearray([LIS302DL_CONF])) - self.sensitivity = 18 - elif self.who_am_i == LIS3DSH_WHO_AM_I_VAL: - self.write_bytes(LIS3DSH_CTRL_REG4_ADDR, bytearray([LIS3DSH_CTRL_REG4_CONF])) - self.write_bytes(LIS3DSH_CTRL_REG5_ADDR, bytearray([LIS3DSH_CTRL_REG5_CONF])) - self.sensitivity = 0.06 * 256 - else: - raise Exception('LIS302DL or LIS3DSH accelerometer not present') - - def convert_raw_to_g(self, x): - if x & 0x80: - x = x - 256 - return x * self.sensitivity / 1000 - - def read_bytes(self, addr, nbytes): - if nbytes > 1: - addr |= READWRITE_CMD | MULTIPLEBYTE_CMD - else: - addr |= READWRITE_CMD - self.cs_pin.low() - self.spi.send(addr) - #buf = self.spi.send_recv(bytearray(nbytes * [0])) # read data, MSB first - buf = self.spi.recv(nbytes) - self.cs_pin.high() - return buf - - def write_bytes(self, addr, buf): - if len(buf) > 1: - addr |= MULTIPLEBYTE_CMD - self.cs_pin.low() - self.spi.send(addr) - for b in buf: - self.spi.send(b) - self.cs_pin.high() - - def read_id(self): - return self.read_bytes(WHO_AM_I_ADDR, 1)[0] - - def x(self): - return self.convert_raw_to_g(self.read_bytes(OUT_X_ADDR, 1)[0]) - - def y(self): - return self.convert_raw_to_g(self.read_bytes(OUT_Y_ADDR, 1)[0]) - - def z(self): - return self.convert_raw_to_g(self.read_bytes(OUT_Z_ADDR, 1)[0]) - - def xyz(self): - return (self.x(), self.y(), self.z()) diff --git a/ports/stm32/boards/STM32F4DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F4DISC/stm32f4xx_hal_conf.h deleted file mode 100644 index daf9b63cec..0000000000 --- a/ports/stm32/boards/STM32F4DISC/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h b/ports/stm32/boards/STM32F769DISC/mpconfigboard.h deleted file mode 100644 index 8b29e5773e..0000000000 --- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h +++ /dev/null @@ -1,80 +0,0 @@ -// This board is confirmed to operate using stlink and openocd. -// REPL is on UART(1) and is available through the stlink USB-UART device. -// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in -// the make command. -#define MICROPY_HW_BOARD_NAME "F769DISC" -#define MICROPY_HW_MCU_NAME "STM32F769" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// HSE is 25MHz -// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (25) -#define MICROPY_HW_CLK_PLLN (432) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) -#define MICROPY_HW_UART_REPL PYB_UART_1 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI2_NSS (pin_A11) -#define MICROPY_HW_SPI2_SCK (pin_A12) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_J13) // red -#define MICROPY_HW_LED2 (pin_J5) // green -#define MICROPY_HW_LED3 (pin_A12) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDMMC2_CK (pin_D6) -#define MICROPY_HW_SDMMC2_CMD (pin_D7) -#define MICROPY_HW_SDMMC2_D0 (pin_G9) -#define MICROPY_HW_SDMMC2_D1 (pin_G10) -#define MICROPY_HW_SDMMC2_D2 (pin_B3) -#define MICROPY_HW_SDMMC2_D3 (pin_B4) -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_I15) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_HS (1) -#define MICROPY_HW_USB_HS_IN_FS (1) -/*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/ -#define MICROPY_HW_USB_OTG_ID_PIN (pin_J12) diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk deleted file mode 100644 index 873368ce5d..0000000000 --- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F769xx -MICROPY_FLOAT_IMPL = double -AF_FILE = boards/stm32f767_af.csv -LD_FILES = boards/stm32f769.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/STM32F769DISC/pins.csv b/ports/stm32/boards/STM32F769DISC/pins.csv deleted file mode 100644 index e68ed95366..0000000000 --- a/ports/stm32/boards/STM32F769DISC/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -A0,PA0 -A1,PF10 -A2,PF9 -A3,PF8 -A4,PF7 -A5,PF6 -D0,PC7 -D1,PC6 -D2,PG6 -D3,PB4 -D4,PG7 -D5,PA8 -D6,PH6 -D7,PI3 -D8,PI2 -D9,PA15 -D10,PI0 -D11,PB15 -D12,PB14 -D13,PI1 -D14,PB9 -D15,PB8 -LED1,PJ13 -LED2,PJ5 -LED3,PA12 -SW,PI11 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_D0,PG9 -SD_D1,PG10 -SD_D2,PB3 -SD_D3,PB4 -SD_CK,PD6 -SD_CMD,PD7 -SD_SW,PI15 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PJ12 -USB_ID,PA8 -USB_DM,PA11 -USB_DP,PA12 -UART1_TX,PA9 -UART1_RX,PA10 -UART5_TX,PC12 -UART5_RX,PD2 -CAN2_TX,PB13 -CAN2_RX,PB12 diff --git a/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h b/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h deleted file mode 100644 index ff968bca99..0000000000 --- a/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,427 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F7DISC/board_init.c b/ports/stm32/boards/STM32F7DISC/board_init.c deleted file mode 100644 index dd268fb9c0..0000000000 --- a/ports/stm32/boards/STM32F7DISC/board_init.c +++ /dev/null @@ -1,15 +0,0 @@ -#include STM32_HAL_H - -void STM32F7DISC_board_early_init(void) { - GPIO_InitTypeDef GPIO_InitStructure; - - __HAL_RCC_GPIOK_CLK_ENABLE(); - - // Turn off the backlight. LCD_BL_CTRL = PK3 - GPIO_InitStructure.Pin = GPIO_PIN_3; - GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(GPIOK, &GPIO_InitStructure); - HAL_GPIO_WritePin(GPIOK, GPIO_PIN_3, GPIO_PIN_RESET); -} diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h b/ports/stm32/boards/STM32F7DISC/mpconfigboard.h deleted file mode 100644 index 7b506a3056..0000000000 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h +++ /dev/null @@ -1,80 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "F7DISC" -#define MICROPY_HW_MCU_NAME "STM32F746" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -#define MICROPY_BOARD_EARLY_INIT STM32F7DISC_board_early_init -void STM32F7DISC_board_early_init(void); - -// HSE is 25MHz -// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (25) -#define MICROPY_HW_CLK_PLLN (432) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -#define MICROPY_HW_UART7_TX (pin_F6) -#define MICROPY_HW_UART7_RX (pin_F7) -#define MICROPY_HW_UART_REPL PYB_UART_1 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) - -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI2_NSS (pin_I0) -#define MICROPY_HW_SPI2_SCK (pin_I1) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_I11) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_I1) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_C13) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config (CN13 - USB OTG FS) -// The Hardware VBUS detect only works on pin PA9. The STM32F7 Discovery uses -// PA9 for VCP_TX functionality and connects the VBUS to pin J12 (so software -// only detect). So we don't define the VBUS detect pin since that requires PA9. -#define MICROPY_HW_USB_FS (1) -/*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/ -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk deleted file mode 100644 index 160218fd33..0000000000 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F746xx -AF_FILE = boards/stm32f746_af.csv -LD_FILES = boards/stm32f746.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32/boards/STM32F7DISC/pins.csv b/ports/stm32/boards/STM32F7DISC/pins.csv deleted file mode 100644 index 8b49003f7c..0000000000 --- a/ports/stm32/boards/STM32F7DISC/pins.csv +++ /dev/null @@ -1,55 +0,0 @@ -A0,PA0 -A1,PF10 -A2,PF9 -A3,PF8 -A4,PF7 -A5,PF6 -D0,PC7 -D1,PC6 -D2,PG6 -D3,PB4 -D4,PG7 -D5,PA8 -D6,PH6 -D7,PI3 -D8,PI2 -D9,PA15 -D10,PI0 -D11,PB15 -D12,PB14 -D13,PI1 -D14,PB9 -D15,PB8 -LED,PI1 -SW,PI11 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CK,PC12 -SD_CMD,PD2 -SD_SW,PC13 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PJ12 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 -VCP_TX,PA9 -VCP_RX,PB7 -CAN_TX,PB13 -CAN_RX,PB12 diff --git a/ports/stm32/boards/STM32F7DISC/stm32f7xx_hal_conf.h b/ports/stm32/boards/STM32F7DISC/stm32f7xx_hal_conf.h deleted file mode 100644 index ff968bca99..0000000000 --- a/ports/stm32/boards/STM32F7DISC/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,427 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32L476DISC/bdev.c b/ports/stm32/boards/STM32L476DISC/bdev.c deleted file mode 100644 index 01f06b8b1d..0000000000 --- a/ports/stm32/boards/STM32L476DISC/bdev.c +++ /dev/null @@ -1,24 +0,0 @@ -#include "storage.h" - -// External SPI flash uses standard SPI interface - -STATIC const mp_soft_spi_obj_t soft_spi_bus = { - .delay_half = MICROPY_HW_SOFTSPI_MIN_DELAY, - .polarity = 0, - .phase = 0, - .sck = MICROPY_HW_SPIFLASH_SCK, - .mosi = MICROPY_HW_SPIFLASH_MOSI, - .miso = MICROPY_HW_SPIFLASH_MISO, -}; - -STATIC mp_spiflash_cache_t spi_bdev_cache; - -const mp_spiflash_config_t spiflash_config = { - .bus_kind = MP_SPIFLASH_BUS_SPI, - .bus.u_spi.cs = MICROPY_HW_SPIFLASH_CS, - .bus.u_spi.data = (void*)&soft_spi_bus, - .bus.u_spi.proto = &mp_soft_spi_proto, - .cache = &spi_bdev_cache, -}; - -spi_bdev_t spi_bdev; diff --git a/ports/stm32/boards/STM32L476DISC/board_init.c b/ports/stm32/boards/STM32L476DISC/board_init.c deleted file mode 100644 index eb44f320fe..0000000000 --- a/ports/stm32/boards/STM32L476DISC/board_init.c +++ /dev/null @@ -1,9 +0,0 @@ -#include "py/mphal.h" - -void STM32L476DISC_board_early_init(void) { - // set SPI flash WP and HOLD pins high - mp_hal_pin_output(pin_E14); - mp_hal_pin_output(pin_E15); - mp_hal_pin_write(pin_E14, 1); - mp_hal_pin_write(pin_E15, 1); -} diff --git a/ports/stm32/boards/STM32L476DISC/mpconfigboard.h b/ports/stm32/boards/STM32L476DISC/mpconfigboard.h deleted file mode 100644 index a35dee1182..0000000000 --- a/ports/stm32/boards/STM32L476DISC/mpconfigboard.h +++ /dev/null @@ -1,78 +0,0 @@ -#define MICROPY_BOARD_EARLY_INIT STM32L476DISC_board_early_init -void STM32L476DISC_board_early_init(void); - -#define MICROPY_HW_BOARD_NAME "L476-DISCO" -#define MICROPY_HW_MCU_NAME "STM32L476" - -#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0) -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_USB (1) - -// use external SPI flash for storage -#define MICROPY_HW_SPIFLASH_SIZE_BITS (128 * 1024 * 1024) -#define MICROPY_HW_SPIFLASH_CS (pin_E11) -#define MICROPY_HW_SPIFLASH_SCK (pin_E10) -#define MICROPY_HW_SPIFLASH_MOSI (pin_E12) -#define MICROPY_HW_SPIFLASH_MISO (pin_E13) - -// block device config for SPI flash -extern const struct _mp_spiflash_config_t spiflash_config; -extern struct _spi_bdev_t spi_bdev; -#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \ - (op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \ - (op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \ - spi_bdev_ioctl(&spi_bdev, (op), (arg)) \ -) -#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n)) -#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n)) - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART config -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -// USART 2 is connected to the virtual com port on the ST-LINK -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI2_NSS (pin_D0) -#define MICROPY_HW_SPI2_SCK (pin_D1) -#define MICROPY_HW_SPI2_MISO (pin_D3) -#define MICROPY_HW_SPI2_MOSI (pin_D4) - -// CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) - -// Joystick is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B2) // red -#define MICROPY_HW_LED2 (pin_E8) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_FS (1) -// #define MICROPY_HW_USB_OTG_ID_PIN (pin_C12) // This is not the official ID Pin which should be PA10 diff --git a/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk b/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk deleted file mode 100644 index 2cad9e2e56..0000000000 --- a/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L476xx -AF_FILE = boards/stm32l476_af.csv -LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08004000 -OPENOCD_CONFIG = boards/openocd_stm32l4.cfg diff --git a/ports/stm32/boards/STM32L476DISC/pins.csv b/ports/stm32/boards/STM32L476DISC/pins.csv deleted file mode 100644 index 52f96b669c..0000000000 --- a/ports/stm32/boards/STM32L476DISC/pins.csv +++ /dev/null @@ -1,114 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PF0,PF0 -PF1,PF1 -PF2,PF2 -PF3,PF3 -PF4,PF4 -PF5,PF5 -PF6,PF6 -PF7,PF7 -PF8,PF8 -PF9,PF9 -PF10,PF10 -PF11,PF11 -PF12,PF12 -PF13,PF13 -PF14,PF14 -PF15,PF15 -PG0,PG0 -PG1,PG1 -PG2,PG2 -PG3,PG3 -PG4,PG4 -PG5,PG5 -PG6,PG6 -PG7,PG7 -PG8,PG8 -PG9,PG9 -PG10,PG10 -PG11,PG11 -PG12,PG12 -PG13,PG13 -PG14,PG14 -PG15,PG15 -PH0,PH0 -PH1,PH1 diff --git a/ports/stm32/boards/STM32L476DISC/stm32l4xx_hal_conf.h b/ports/stm32/boards/STM32L476DISC/stm32l4xx_hal_conf.h deleted file mode 100644 index 6bfb28118a..0000000000 --- a/ports/stm32/boards/STM32L476DISC/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,372 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h deleted file mode 100644 index 6a17d74d3a..0000000000 --- a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h +++ /dev/null @@ -1,52 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "L496G-DISCO" -#define MICROPY_HW_MCU_NAME "STM32L496" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_USB (1) - -// MSI is used and is 4MHz, -// Resulting core frequency is 80MHz: -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_D6) -// USART 2 is connected to the virtual com port on the ST-LINK -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_G14) -#define MICROPY_HW_I2C1_SDA (pin_G13) -#define MICROPY_HW_I2C2_SCL (pin_H4) -#define MICROPY_HW_I2C2_SDA (pin_B14) - -// SPI busses -// -> To the arduino connector -#define MICROPY_HW_SPI1_NSS (pin_A15) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_B4) -#define MICROPY_HW_SPI1_MOSI (pin_B5) - -// Use Sel from joystick. Joystick is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLDOWN) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LED (The orange LED is controlled over MFX) -#define MICROPY_HW_LED1 (pin_B13) // Green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin)) -// USB config -#define MICROPY_HW_USB_FS (1) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk deleted file mode 100644 index 3a61746556..0000000000 --- a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L496xx -AF_FILE = boards/stm32l496_af.csv -LD_FILES = boards/stm32l496xg.ld boards/common_ifs.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08004000 -OPENOCD_CONFIG = boards/openocd_stm32l4.cfg diff --git a/ports/stm32/boards/STM32L496GDISC/pins.csv b/ports/stm32/boards/STM32L496GDISC/pins.csv deleted file mode 100644 index 2ee054032b..0000000000 --- a/ports/stm32/boards/STM32L496GDISC/pins.csv +++ /dev/null @@ -1,140 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PF0,PF0 -PF1,PF1 -PF2,PF2 -PF3,PF3 -PF4,PF4 -PF5,PF5 -PF6,PF6 -PF7,PF7 -PF8,PF8 -PF9,PF9 -PF10,PF10 -PF11,PF11 -PF12,PF12 -PF13,PF13 -PF14,PF14 -PF15,PF15 -PG0,PG0 -PG1,PG1 -PG2,PG2 -PG3,PG3 -PG4,PG4 -PG5,PG5 -PG6,PG6 -PG7,PG7 -PG8,PG8 -PG9,PG9 -PG10,PG10 -PG11,PG11 -PG12,PG12 -PG13,PG13 -PG14,PG14 -PG15,PG15 -PH0,PH0 -PH1,PH1 -PH2,PH2 -PH3,PH3 -PH4,PH4 -PH5,PH5 -PH6,PH6 -PH7,PH7 -PH8,PH8 -PH9,PH9 -PH10,PH10 -PH11,PH11 -PH12,PH12 -PH13,PH13 -PH14,PH14 -PH15,PH15 -PI0,PI0 -PI1,PI1 -PI2,PI2 -PI3,PI3 -PI4,PI4 -PI5,PI5 -PI6,PI6 -PI7,PI7 -PI8,PI8 -PI9,PI9 -PI10,PI10 -PI11,PI11 diff --git a/ports/stm32/boards/STM32L496GDISC/stm32l4xx_hal_conf.h b/ports/stm32/boards/STM32L496GDISC/stm32l4xx_hal_conf.h deleted file mode 100644 index 884db5ef1a..0000000000 --- a/ports/stm32/boards/STM32L496GDISC/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,421 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2018 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ - -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -/*#define HAL_CRYP_MODULE_ENABLED */ -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -/*#define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/*#define HAL_DSI_MODULE_ENABLED */ -/*#define HAL_FIREWALL_MODULE_ENABLED */ -/*#define HAL_GFXMMU_MODULE_ENABLED */ -/*#define HAL_HCD_MODULE_ENABLED */ -/*#define HAL_HASH_MODULE_ENABLED */ -/*#define HAL_I2S_MODULE_ENABLED */ -/*#define HAL_IRDA_MODULE_ENABLED */ -/*#define HAL_IWDG_MODULE_ENABLED */ -/*#define HAL_LTDC_MODULE_ENABLED */ -/*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ -/*#define HAL_NAND_MODULE_ENABLED */ -/*#define HAL_NOR_MODULE_ENABLED */ -/*#define HAL_OPAMP_MODULE_ENABLED */ -/*#define HAL_OSPI_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMBUS_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/*#define HAL_SRAM_MODULE_ENABLED */ -/*#define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/*#define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/*#define HAL_USART_MODULE_ENABLED */ -/*#define HAL_WWDG_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - - /** - * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. - * This internal oscillator is mainly dedicated to provide a high precision clock to - * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. - * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency - * which is subject to manufacturing process variations. - */ - #if !defined (HSI48_VALUE) - #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. - The real value my vary depending on manufacturing process variations.*/ - #endif /* HSI48_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver - * Activated: CRC code is present inside driver - * Deactivated: CRC code cleaned from driver - */ - -#define USE_SPI_CRC 0 - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" - #include "stm32l4xx_hal_rcc_ex.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32l4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32l4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32l4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32l4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32l4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED - #include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_OSPI_MODULE_ENABLED - #include "stm32l4xx_hal_ospi.h" -#endif /* HAL_OSPI_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_GFXMMU_MODULE_ENABLED - #include "stm32l4xx_hal_gfxmmu.h" -#endif /* HAL_GFXMMU_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/common_basic.ld b/ports/stm32/boards/common_basic.ld deleted file mode 100644 index 2e428aa62c..0000000000 --- a/ports/stm32/boards/common_basic.ld +++ /dev/null @@ -1,86 +0,0 @@ -/* Memory layout for basic configuration: - - FLASH .isr_vector - FLASH .text - FLASH .data - - RAM .data - RAM .bss - RAM .heap - RAM .stack -*/ - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32/boards/common_bl.ld b/ports/stm32/boards/common_bl.ld deleted file mode 100644 index 52b2a677d7..0000000000 --- a/ports/stm32/boards/common_bl.ld +++ /dev/null @@ -1,86 +0,0 @@ -/* Memory layout for bootloader configuration (this here describes the app part): - - FLASH_APP .isr_vector - FLASH_APP .text - FLASH_APP .data - - RAM .data - RAM .bss - RAM .heap - RAM .stack -*/ - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - . = ALIGN(4); - } >FLASH_APP - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_APP - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_APP - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32/boards/common_ifs.ld b/ports/stm32/boards/common_ifs.ld deleted file mode 100644 index 74b2ffb419..0000000000 --- a/ports/stm32/boards/common_ifs.ld +++ /dev/null @@ -1,103 +0,0 @@ -/* Memory layout for internal flash storage configuration: - - FLASH_ISR .isr_vector - - FLASH_TEXT .text - FLASH_TEXT .data - - RAM .data - RAM .bss - RAM .heap - RAM .stack -*/ - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. So we pull in a couple of object files to pad it - out. */ - - . = ALIGN(4); - - /* NOTE: If you update the list of files contained in .isr_vector, - then be sure to also update smhal/Makefile where it forcibly - builds each of these files with -Os */ - - */ff.o(.text*) - */vfs_fat_*.o(.text*) - */py/formatfloat.o(.text*) - */py/parsenum.o(.text*) - */py/mpprint.o(.text*) - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py deleted file mode 100755 index 70f154fde0..0000000000 --- a/ports/stm32/boards/make-pins.py +++ /dev/null @@ -1,470 +0,0 @@ -#!/usr/bin/env python -"""Creates the pin file for the STM32F4xx.""" - -from __future__ import print_function - -import argparse -import sys -import csv - -SUPPORTED_FN = { - 'TIM' : ['CH1', 'CH2', 'CH3', 'CH4', - 'CH1N', 'CH2N', 'CH3N', 'CH1_ETR', 'ETR', 'BKIN'], - 'I2C' : ['SDA', 'SCL'], - 'I2S' : ['CK', 'MCK', 'SD', 'WS', 'EXTSD'], - 'USART' : ['RX', 'TX', 'CTS', 'RTS', 'CK'], - 'UART' : ['RX', 'TX', 'CTS', 'RTS'], - 'SPI' : ['NSS', 'SCK', 'MISO', 'MOSI'], - 'SDMMC' : ['CK', 'CMD', 'D0', 'D1', 'D2', 'D3'], - 'CAN' : ['TX', 'RX'], -} - -CONDITIONAL_VAR = { - 'I2C' : 'MICROPY_HW_I2C{num}_SCL', - 'I2S' : 'MICROPY_HW_ENABLE_I2S{num}', - 'SPI' : 'MICROPY_HW_SPI{num}_SCK', - 'UART' : 'MICROPY_HW_UART{num}_TX', - 'USART' : 'MICROPY_HW_UART{num}_TX', - 'SDMMC' : 'MICROPY_HW_SDMMC{num}_CK', - 'CAN' : 'MICROPY_HW_CAN{num}_TX', -} - -def parse_port_pin(name_str): - """Parses a string and returns a (port-num, pin-num) tuple.""" - if len(name_str) < 3: - raise ValueError("Expecting pin name to be at least 3 charcters.") - if name_str[0] != 'P': - raise ValueError("Expecting pin name to start with P") - if name_str[1] < 'A' or name_str[1] > 'K': - raise ValueError("Expecting pin port to be between A and K") - port = ord(name_str[1]) - ord('A') - pin_str = name_str[2:] - if not pin_str.isdigit(): - raise ValueError("Expecting numeric pin number.") - return (port, int(pin_str)) - -def split_name_num(name_num): - num = None - for num_idx in range(len(name_num) - 1, -1, -1): - if not name_num[num_idx].isdigit(): - name = name_num[0:num_idx + 1] - num_str = name_num[num_idx + 1:] - if len(num_str) > 0: - num = int(num_str) - break - return name, num - -def conditional_var(name_num): - # Try the specific instance first. For example, if name_num is UART4_RX - # then try UART4 first, and then try UART second. - name, num = split_name_num(name_num) - var = [] - if name in CONDITIONAL_VAR: - var.append(CONDITIONAL_VAR[name].format(num=num)) - if name_num in CONDITIONAL_VAR: - var.append(CONDITIONAL_VAR[name_num]) - return var - -def print_conditional_if(cond_var, file=None): - if cond_var: - cond_str = [] - for var in cond_var: - if var.find('ENABLE') >= 0: - cond_str.append('(defined({0}) && {0})'.format(var)) - else: - cond_str.append('defined({0})'.format(var)) - print('#if ' + ' || '.join(cond_str), file=file) - -def print_conditional_endif(cond_var, file=None): - if cond_var: - print('#endif', file=file) - - -class AlternateFunction(object): - """Holds the information associated with a pins alternate function.""" - - def __init__(self, idx, af_str): - self.idx = idx - # Special case. We change I2S2ext_SD into I2S2_EXTSD so that it parses - # the same way the other peripherals do. - af_str = af_str.replace('ext_', '_EXT') - - self.af_str = af_str - - self.func = '' - self.fn_num = None - self.pin_type = '' - self.supported = False - - af_words = af_str.split('_', 1) - self.func, self.fn_num = split_name_num(af_words[0]) - if len(af_words) > 1: - self.pin_type = af_words[1] - if self.func in SUPPORTED_FN: - pin_types = SUPPORTED_FN[self.func] - if self.pin_type in pin_types: - self.supported = True - - def is_supported(self): - return self.supported - - def ptr(self): - """Returns the numbered function (i.e. USART6) for this AF.""" - if self.fn_num is None: - return self.func - return '{:s}{:d}'.format(self.func, self.fn_num) - - def mux_name(self): - return 'AF{:d}_{:s}'.format(self.idx, self.ptr()) - - def print(self): - """Prints the C representation of this AF.""" - cond_var = None - if self.supported: - cond_var = conditional_var('{}{}'.format(self.func, self.fn_num)) - print_conditional_if(cond_var) - print(' AF', end='') - else: - print(' //', end='') - fn_num = self.fn_num - if fn_num is None: - fn_num = 0 - print('({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}'.format(self.idx, - self.func, fn_num, self.pin_type, self.ptr(), self.af_str)) - print_conditional_endif(cond_var) - - def qstr_list(self): - return [self.mux_name()] - - -class Pin(object): - """Holds the information associated with a pin.""" - - def __init__(self, port, pin): - self.port = port - self.pin = pin - self.alt_fn = [] - self.alt_fn_count = 0 - self.adc_num = 0 - self.adc_channel = 0 - self.board_pin = False - - def port_letter(self): - return chr(self.port + ord('A')) - - def cpu_pin_name(self): - return '{:s}{:d}'.format(self.port_letter(), self.pin) - - def is_board_pin(self): - return self.board_pin - - def set_is_board_pin(self): - self.board_pin = True - - def parse_adc(self, adc_str): - if (adc_str[:3] != 'ADC'): - return - (adc,channel) = adc_str.split('_') - for idx in range(3, len(adc)): - adc_num = int(adc[idx]) # 1, 2, or 3 - self.adc_num |= (1 << (adc_num - 1)) - self.adc_channel = int(channel[2:]) - - def parse_af(self, af_idx, af_strs_in): - if len(af_strs_in) == 0: - return - # If there is a slash, then the slash separates 2 aliases for the - # same alternate function. - af_strs = af_strs_in.split('/') - for af_str in af_strs: - alt_fn = AlternateFunction(af_idx, af_str) - self.alt_fn.append(alt_fn) - if alt_fn.is_supported(): - self.alt_fn_count += 1 - - def alt_fn_name(self, null_if_0=False): - if null_if_0 and self.alt_fn_count == 0: - return 'NULL' - return 'pin_{:s}_af'.format(self.cpu_pin_name()) - - def adc_num_str(self): - str = '' - for adc_num in range(1,4): - if self.adc_num & (1 << (adc_num - 1)): - if len(str) > 0: - str += ' | ' - str += 'PIN_ADC' - str += chr(ord('0') + adc_num) - if len(str) == 0: - str = '0' - return str - - def print(self): - if self.alt_fn_count == 0: - print("// ", end='') - print('const pin_af_obj_t {:s}[] = {{'.format(self.alt_fn_name())) - for alt_fn in self.alt_fn: - alt_fn.print() - if self.alt_fn_count == 0: - print("// ", end='') - print('};') - print('') - print('const pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s}, {:s}, {:d});'.format( - self.cpu_pin_name(), self.port_letter(), self.pin, - self.alt_fn_name(null_if_0=True), - self.adc_num_str(), self.adc_channel)) - print('') - - def print_header(self, hdr_file): - n = self.cpu_pin_name() - hdr_file.write('extern const pin_obj_t pin_{:s}_obj;\n'.format(n)) - hdr_file.write('#define pin_{:s} (&pin_{:s}_obj)\n'.format(n, n)) - if self.alt_fn_count > 0: - hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'.format(n)) - - def qstr_list(self): - result = [] - for alt_fn in self.alt_fn: - if alt_fn.is_supported(): - result += alt_fn.qstr_list() - return result - - -class NamedPin(object): - - def __init__(self, name, pin): - self._name = name - self._pin = pin - - def pin(self): - return self._pin - - def name(self): - return self._name - - -class Pins(object): - - def __init__(self): - self.cpu_pins = [] # list of NamedPin objects - self.board_pins = [] # list of NamedPin objects - - def find_pin(self, port_num, pin_num): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.port == port_num and pin.pin == pin_num: - return pin - - def parse_af_file(self, filename, pinname_col, af_col): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[pinname_col]) - except: - continue - pin = Pin(port_num, pin_num) - for af_idx in range(af_col, len(row)): - if af_idx < af_col + 16: - pin.parse_af(af_idx - af_col, row[af_idx]) - elif af_idx == af_col + 16: - pin.parse_adc(row[af_idx]) - self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin)) - - def parse_board_file(self, filename): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[1]) - except: - continue - pin = self.find_pin(port_num, pin_num) - if pin: - pin.set_is_board_pin() - self.board_pins.append(NamedPin(row[0], pin)) - - def print_named(self, label, named_pins): - print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label)) - for named_pin in named_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}_obj) }},'.format(named_pin.name(), pin.cpu_pin_name())) - print('};') - print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label)); - - def print(self): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print() - self.print_named('cpu', self.cpu_pins) - print('') - self.print_named('board', self.board_pins) - - def print_adc(self, adc_num): - print(''); - print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num)) - for channel in range(17): - if channel == 16: - print('#if defined(STM32L4)') - adc_found = False - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if (pin.is_board_pin() and - (pin.adc_num & (1 << (adc_num - 1))) and (pin.adc_channel == channel)): - print(' &pin_{:s}_obj, // {:d}'.format(pin.cpu_pin_name(), channel)) - adc_found = True - break - if not adc_found: - print(' NULL, // {:d}'.format(channel)) - if channel == 16: - print('#endif') - print('};') - - - def print_header(self, hdr_filename): - with open(hdr_filename, 'wt') as hdr_file: - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print_header(hdr_file) - hdr_file.write('extern const pin_obj_t * const pin_adc1[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc2[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc3[];\n') - # provide #define's mapping board to cpu name - for named_pin in self.board_pins: - hdr_file.write("#define pyb_pin_{:s} pin_{:s}\n".format(named_pin.name(), named_pin.pin().cpu_pin_name())) - - def print_qstr(self, qstr_filename): - with open(qstr_filename, 'wt') as qstr_file: - qstr_set = set([]) - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - qstr_set |= set(pin.qstr_list()) - qstr_set |= set([named_pin.name()]) - for named_pin in self.board_pins: - qstr_set |= set([named_pin.name()]) - for qstr in sorted(qstr_set): - cond_var = None - if qstr.startswith('AF'): - af_words = qstr.split('_') - cond_var = conditional_var(af_words[1]) - print_conditional_if(cond_var, file=qstr_file) - print('Q({})'.format(qstr), file=qstr_file) - print_conditional_endif(cond_var, file=qstr_file) - - def print_af_hdr(self, af_const_filename): - with open(af_const_filename, 'wt') as af_const_file: - af_hdr_set = set([]) - mux_name_width = 0 - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - for af in pin.alt_fn: - if af.is_supported(): - mux_name = af.mux_name() - af_hdr_set |= set([mux_name]) - if len(mux_name) > mux_name_width: - mux_name_width = len(mux_name) - for mux_name in sorted(af_hdr_set): - af_words = mux_name.split('_') # ex mux_name: AF9_I2C2 - cond_var = conditional_var(af_words[1]) - print_conditional_if(cond_var, file=af_const_file) - key = 'MP_ROM_QSTR(MP_QSTR_{}),'.format(mux_name) - val = 'MP_ROM_INT(GPIO_{})'.format(mux_name) - print(' { %-*s %s },' % (mux_name_width + 26, key, val), - file=af_const_file) - print_conditional_endif(cond_var, file=af_const_file) - - def print_af_py(self, af_py_filename): - with open(af_py_filename, 'wt') as af_py_file: - print('PINS_AF = (', file=af_py_file); - for named_pin in self.board_pins: - print(" ('%s', " % named_pin.name(), end='', file=af_py_file) - for af in named_pin.pin().alt_fn: - if af.is_supported(): - print("(%d, '%s'), " % (af.idx, af.af_str), end='', file=af_py_file) - print('),', file=af_py_file) - print(')', file=af_py_file) - - -def main(): - parser = argparse.ArgumentParser( - prog="make-pins.py", - usage="%(prog)s [options] [command]", - description="Generate board specific pin file" - ) - parser.add_argument( - "-a", "--af", - dest="af_filename", - help="Specifies the alternate function file for the chip", - default="stm32f4xx_af.csv" - ) - parser.add_argument( - "--af-const", - dest="af_const_filename", - help="Specifies header file for alternate function constants.", - default="build/pins_af_const.h" - ) - parser.add_argument( - "--af-py", - dest="af_py_filename", - help="Specifies the filename for the python alternate function mappings.", - default="build/pins_af.py" - ) - parser.add_argument( - "-b", "--board", - dest="board_filename", - help="Specifies the board file", - ) - parser.add_argument( - "-p", "--prefix", - dest="prefix_filename", - help="Specifies beginning portion of generated pins file", - default="stm32f4xx_prefix.c" - ) - parser.add_argument( - "-q", "--qstr", - dest="qstr_filename", - help="Specifies name of generated qstr header file", - default="build/pins_qstr.h" - ) - parser.add_argument( - "-r", "--hdr", - dest="hdr_filename", - help="Specifies name of generated pin header file", - default="build/pins.h" - ) - args = parser.parse_args(sys.argv[1:]) - - pins = Pins() - - print('// This file was automatically generated by make-pins.py') - print('//') - if args.af_filename: - print('// --af {:s}'.format(args.af_filename)) - pins.parse_af_file(args.af_filename, 1, 2) - - if args.board_filename: - print('// --board {:s}'.format(args.board_filename)) - pins.parse_board_file(args.board_filename) - - if args.prefix_filename: - print('// --prefix {:s}'.format(args.prefix_filename)) - print('') - with open(args.prefix_filename, 'r') as prefix_file: - print(prefix_file.read()) - pins.print() - pins.print_adc(1) - pins.print_adc(2) - pins.print_adc(3) - pins.print_header(args.hdr_filename) - pins.print_qstr(args.qstr_filename) - pins.print_af_hdr(args.af_const_filename) - pins.print_af_py(args.af_py_filename) - - -if __name__ == "__main__": - main() diff --git a/ports/stm32/boards/openocd_stm32f4.cfg b/ports/stm32/boards/openocd_stm32f4.cfg deleted file mode 100644 index ee96b91bd9..0000000000 --- a/ports/stm32/boards/openocd_stm32f4.cfg +++ /dev/null @@ -1,42 +0,0 @@ -# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger -# and an STM32F4 target microcontroller. -# -# To flash your firmware: -# -# $ openocd -f openocd_stm32f4.cfg \ -# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08020000" -# -# For a gdb server on port 3333: -# -# $ openocd -f openocd_stm32f4.cfg - - -source [find interface/stlink-v2.cfg] -transport select hla_swd -source [find target/stm32f4x.cfg] -reset_config srst_only -init - -proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { - reset halt - sleep 100 - wait_halt 2 - flash write_image erase $BIN0 $ADDR0 - sleep 100 - verify_image $BIN0 $ADDR0 - sleep 100 - flash write_image erase $BIN1 $ADDR1 - sleep 100 - verify_image $BIN1 $ADDR1 - sleep 100 - reset run - shutdown -} - -proc stm_erase {} { - reset halt - sleep 100 - stm32f4x mass_erase 0 - sleep 100 - shutdown -} diff --git a/ports/stm32/boards/openocd_stm32f7.cfg b/ports/stm32/boards/openocd_stm32f7.cfg deleted file mode 100644 index 55b6326503..0000000000 --- a/ports/stm32/boards/openocd_stm32f7.cfg +++ /dev/null @@ -1,42 +0,0 @@ -# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger -# and an STM32F7 target microcontroller. -# -# To flash your firmware: -# -# $ openocd -f openocd_stm32f7.cfg \ -# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08020000" -# -# For a gdb server on port 3333: -# -# $ openocd -f openocd_stm32f7.cfg - - -source [find interface/stlink-v2-1.cfg] -transport select hla_swd -source [find target/stm32f7x.cfg] -reset_config srst_only -init - -proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { - reset halt - sleep 100 - wait_halt 2 - flash write_image erase $BIN0 $ADDR0 - sleep 100 - verify_image $BIN0 $ADDR0 - sleep 100 - flash write_image erase $BIN1 $ADDR1 - sleep 100 - verify_image $BIN1 $ADDR1 - sleep 100 - reset run - shutdown -} - -proc stm_erase {} { - reset halt - sleep 100 - stm32f7x mass_erase 0 - sleep 100 - shutdown -} diff --git a/ports/stm32/boards/openocd_stm32l4.cfg b/ports/stm32/boards/openocd_stm32l4.cfg deleted file mode 100644 index 59e98de038..0000000000 --- a/ports/stm32/boards/openocd_stm32l4.cfg +++ /dev/null @@ -1,42 +0,0 @@ -# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger -# and an STM32L4 target microcontroller. -# -# To flash your firmware: -# -# $ openocd -f openocd_stm32l4.cfg \ -# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08004000" -# -# For a gdb server on port 3333: -# -# $ openocd -f openocd_stm32l4.cfg - - -source [find interface/stlink-v2-1.cfg] -transport select hla_swd -source [find target/stm32l4x.cfg] -reset_config srst_only -init - -proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { - reset halt - sleep 100 - wait_halt 2 - flash write_image erase $BIN0 $ADDR0 - sleep 100 - verify_image $BIN0 $ADDR0 - sleep 100 - flash write_image erase $BIN1 $ADDR1 - sleep 100 - verify_image $BIN1 $ADDR1 - sleep 100 - reset run - shutdown -} - -proc stm_erase {} { - reset halt - sleep 100 - stm32l4x mass_erase 0 - sleep 100 - shutdown -} diff --git a/ports/stm32/boards/pllvalues.py b/ports/stm32/boards/pllvalues.py deleted file mode 100644 index befd6cfa0d..0000000000 --- a/ports/stm32/boards/pllvalues.py +++ /dev/null @@ -1,165 +0,0 @@ -""" -This is an auxiliary script that is used to compute valid PLL values to set -the CPU frequency to a given value. The algorithm here appears as C code -for the machine.freq() function. -""" - -from __future__ import print_function - -def close_int(x): - return abs(x - round(x)) < 0.01 - -# original version that requires N/M to be an integer (for simplicity) -def compute_pll(hse, sys): - for P in (2, 4, 6, 8): # allowed values of P - Q = sys * P / 48 - NbyM = sys * P / hse - # N/M and Q must be integers - if not (close_int(NbyM) and close_int(Q)): - continue - # VCO_OUT must be between 192MHz and 432MHz - if not (192 <= hse * NbyM <= 432): - continue - # compute M - M = int(192 // NbyM) - while hse > 2 * M or NbyM * M < 192: - M += 1 - # VCO_IN must be between 1MHz and 2MHz (2MHz recommended) - if not (M <= hse): - continue - # compute N - N = NbyM * M - # N and Q are restricted - if not (192 <= N <= 432 and 2 <= Q <= 15): - continue - # found valid values - assert NbyM == N // M - return (M, N, P, Q) - # no valid values found - return None - -# improved version that doesn't require N/M to be an integer -def compute_pll2(hse, sys): - # Loop over the allowed values of P, looking for a valid PLL configuration - # that gives the desired "sys" frequency. We use floats for P to force - # floating point arithmetic on Python 2. - for P in (2.0, 4.0, 6.0, 8.0): - Q = sys * P / 48 - # Q must be an integer in a set range - if not (close_int(Q) and 2 <= Q <= 15): - continue - NbyM = sys * P / hse - # VCO_OUT must be between 192MHz and 432MHz - if not (192 <= hse * NbyM <= 432): - continue - # compute M - M = 192 // NbyM # starting value - while hse > 2 * M or NbyM * M < 192 or not close_int(NbyM * M): - M += 1 - # VCO_IN must be between 1MHz and 2MHz (2MHz recommended) - if not (M <= hse): - continue - # compute N - N = NbyM * M - # N must be an integer - if not close_int(N): - continue - # N is restricted - if not (192 <= N <= 432): - continue - # found valid values - return (M, N, P, Q) - # no valid values found - return None - -def compute_derived(hse, pll): - M, N, P, Q = pll - vco_in = hse / M - vco_out = hse * N / M - pllck = hse / M * N / P - pll48ck = hse / M * N / Q - return (vco_in, vco_out, pllck, pll48ck) - -def verify_pll(hse, pll): - M, N, P, Q = pll - vco_in, vco_out, pllck, pll48ck = compute_derived(hse, pll) - - # verify ints - assert close_int(M) - assert close_int(N) - assert close_int(P) - assert close_int(Q) - - # verify range - assert 2 <= M <= 63 - assert 192 <= N <= 432 - assert P in (2, 4, 6, 8) - assert 2 <= Q <= 15 - assert 1 <= vco_in <= 2 - assert 192 <= vco_out <= 432 - -def generate_c_table(hse, valid_plls): - valid_plls = valid_plls + [(16, (0, 0, 2, 0))] - if hse < 16: - valid_plls.append((hse, (1, 0, 2, 0))) - valid_plls.sort() - print("// (M, P/2-1, SYS) values for %u MHz HSE" % hse) - print("static const uint16_t pll_freq_table[%u] = {" % len(valid_plls)) - for sys, (M, N, P, Q) in valid_plls: - print(" (%u << 10) | (%u << 8) | %u," % (M, P // 2 - 1, sys)) - print("};") - -def print_table(hse, valid_plls): - print("HSE =", hse, "MHz") - print("sys : M N P Q : VCO_IN VCO_OUT PLLCK PLL48CK") - out_format = "%3u : %2u %.1f %.2f %.2f : %5.2f %6.2f %6.2f %6.2f" - for sys, pll in valid_plls: - print(out_format % ((sys,) + pll + compute_derived(hse, pll))) - print("found %u valid configurations" % len(valid_plls)) - -def main(): - global out_format - - # parse input args - import sys - argv = sys.argv[1:] - - c_table = False - if argv[0] == '-c': - c_table = True - argv.pop(0) - - if len(argv) != 1: - print("usage: pllvalues.py [-c] ") - sys.exit(1) - - if argv[0].startswith("file:"): - # extract HSE_VALUE from header file - with open(argv[0][5:]) as f: - for line in f: - line = line.strip() - if line.startswith("#define") and line.find("HSE_VALUE") != -1: - idx_start = line.find("((uint32_t)") + 11 - idx_end = line.find(")", idx_start) - hse = int(line[idx_start:idx_end]) // 1000000 - break - else: - raise ValueError("%s does not contain a definition of HSE_VALUE" % argv[0]) - else: - # HSE given directly as an integer - hse = int(argv[0]) - - valid_plls = [] - for sysclk in range(1, 217): - pll = compute_pll2(hse, sysclk) - if pll is not None: - verify_pll(hse, pll) - valid_plls.append((sysclk, pll)) - - if c_table: - generate_c_table(hse, valid_plls) - else: - print_table(hse, valid_plls) - -if __name__ == "__main__": - main() diff --git a/ports/stm32/boards/startup_stm32f0.s b/ports/stm32/boards/startup_stm32f0.s deleted file mode 100644 index eb5c4961e0..0000000000 --- a/ports/stm32/boards/startup_stm32f0.s +++ /dev/null @@ -1,303 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f091xc.s - * @author MCD Application Team - * @brief STM32F091xC devices vector table for GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M0 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m0 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr r0, =_estack - mov sp, r0 /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - ldr r0, =_sdata - ldr r1, =_edata - ldr r2, =_sidata - movs r3, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r4, [r2, r3] - str r4, [r0, r3] - adds r3, r3, #4 - -LoopCopyDataInit: - adds r4, r0, r3 - cmp r4, r1 - bcc CopyDataInit - -/* Zero fill the bss segment. */ - ldr r2, =_sbss - ldr r4, =_ebss - movs r3, #0 - b LoopFillZerobss - -FillZerobss: - str r3, [r2] - adds r2, r2, #4 - -LoopFillZerobss: - cmp r2, r4 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call static constructors */ - /*bl __libc_init_array*/ -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - - -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M0. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word 0 - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */ - .word RTC_IRQHandler /* RTC through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_CRS_IRQHandler /* RCC and CRS */ - .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ - .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ - .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ - .word TSC_IRQHandler /* TSC */ - .word DMA1_Ch1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler /* DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2 */ - .word DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler /* DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5 */ - .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ - .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC */ - .word TIM7_IRQHandler /* TIM7 */ - .word TIM14_IRQHandler /* TIM14 */ - .word TIM15_IRQHandler /* TIM15 */ - .word TIM16_IRQHandler /* TIM16 */ - .word TIM17_IRQHandler /* TIM17 */ - .word I2C1_IRQHandler /* I2C1 */ - .word I2C2_IRQHandler /* I2C2 */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_8_IRQHandler /* USART3, USART4, USART5, USART6, USART7, USART8 */ - .word CEC_CAN_IRQHandler /* CEC and CAN */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_VDDIO2_IRQHandler - .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_CRS_IRQHandler - .thumb_set RCC_CRS_IRQHandler,Default_Handler - - .weak EXTI0_1_IRQHandler - .thumb_set EXTI0_1_IRQHandler,Default_Handler - - .weak EXTI2_3_IRQHandler - .thumb_set EXTI2_3_IRQHandler,Default_Handler - - .weak EXTI4_15_IRQHandler - .thumb_set EXTI4_15_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak DMA1_Ch1_IRQHandler - .thumb_set DMA1_Ch1_IRQHandler,Default_Handler - - .weak DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler - .thumb_set DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler,Default_Handler - - .weak DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler - .thumb_set DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler,Default_Handler - - .weak ADC1_COMP_IRQHandler - .thumb_set ADC1_COMP_IRQHandler,Default_Handler - - .weak TIM1_BRK_UP_TRG_COM_IRQHandler - .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak TIM14_IRQHandler - .thumb_set TIM14_IRQHandler,Default_Handler - - .weak TIM15_IRQHandler - .thumb_set TIM15_IRQHandler,Default_Handler - - .weak TIM16_IRQHandler - .thumb_set TIM16_IRQHandler,Default_Handler - - .weak TIM17_IRQHandler - .thumb_set TIM17_IRQHandler,Default_Handler - - .weak I2C1_IRQHandler - .thumb_set I2C1_IRQHandler,Default_Handler - - .weak I2C2_IRQHandler - .thumb_set I2C2_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_8_IRQHandler - .thumb_set USART3_8_IRQHandler,Default_Handler - - .weak CEC_CAN_IRQHandler - .thumb_set CEC_CAN_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/boards/startup_stm32f4.s b/ports/stm32/boards/startup_stm32f4.s deleted file mode 100644 index 3e29a79a56..0000000000 --- a/ports/stm32/boards/startup_stm32f4.s +++ /dev/null @@ -1,530 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32.S - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief STM32Fxxxxx Devices vector table for Atollic TrueSTUDIO toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4/M7 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m4 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system initialization function.*/ - bl SystemInit -/* Call static constructors */ - /*bl __libc_init_array*/ -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M4/M7. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word 0 /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - .word UART7_IRQHandler /* UART7 */ - .word UART8_IRQHandler /* UART8 */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - - .weak UART7_IRQHandler - .thumb_set UART7_IRQHandler,Default_Handler - - .weak UART8_IRQHandler - .thumb_set UART8_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/startup_stm32f7.s b/ports/stm32/boards/startup_stm32f7.s deleted file mode 100644 index 633ba01e93..0000000000 --- a/ports/stm32/boards/startup_stm32f7.s +++ /dev/null @@ -1,604 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32.S - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief STM32Fxxxxx Devices vector table for Atollic TrueSTUDIO toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4/M7 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m7 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system initialization function.*/ - bl SystemInit -/* Call static constructors */ - /*bl __libc_init_array*/ -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M4/M7. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FMC_IRQHandler /* FMC */ - .word SDMMC1_IRQHandler /* SDMMC1 */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word 0 /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - .word UART7_IRQHandler /* UART7 */ - .word UART8_IRQHandler /* UART8 */ - .word SPI4_IRQHandler /* SPI4 */ - .word SPI5_IRQHandler /* SPI5 */ - .word SPI6_IRQHandler /* SPI6 */ - .word SAI1_IRQHandler /* SAI1 */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word DMA2D_IRQHandler /* DMA2D */ - .word SAI2_IRQHandler /* SAI2 */ - .word QUADSPI_IRQHandler /* QUADSPI */ - .word LPTIM1_IRQHandler /* LPTIM1 */ - .word CEC_IRQHandler /* HDMI_CEC */ - .word I2C4_EV_IRQHandler /* I2C4 Event */ - .word I2C4_ER_IRQHandler /* I2C4 Error */ - .word SPDIF_RX_IRQHandler /* SPDIF_RX */ - .word DSIHOST_IRQHandler /* DSI host */ - .word DFSDM1_FLT0_IRQHandler /* DFSDM1 filter 0 */ - .word DFSDM1_FLT1_IRQHandler /* DFSDM1 filter 1 */ - .word DFSDM1_FLT2_IRQHandler /* DFSDM1 filter 2 */ - .word DFSDM1_FLT3_IRQHandler /* DFSDM1 filter 3 */ - .word SDMMC2_IRQHandler /* SDMMC2 */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FMC_IRQHandler - .thumb_set FMC_IRQHandler,Default_Handler - - .weak SDMMC1_IRQHandler - .thumb_set SDMMC1_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - - .weak UART7_IRQHandler - .thumb_set UART7_IRQHandler,Default_Handler - - .weak UART8_IRQHandler - .thumb_set UART8_IRQHandler,Default_Handler - - .weak SPI4_IRQHandler - .thumb_set SPI4_IRQHandler,Default_Handler - - .weak SPI5_IRQHandler - .thumb_set SPI5_IRQHandler,Default_Handler - - .weak SPI6_IRQHandler - .thumb_set SPI6_IRQHandler,Default_Handler - - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak DMA2D_IRQHandler - .thumb_set DMA2D_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak CEC_IRQHandler - .thumb_set CEC_IRQHandler,Default_Handler - - .weak I2C4_EV_IRQHandler - .thumb_set I2C4_EV_IRQHandler,Default_Handler - - .weak I2C4_ER_IRQHandler - .thumb_set I2C4_ER_IRQHandler,Default_Handler - - .weak SPDIF_RX_IRQHandler - .thumb_set SPDIF_RX_IRQHandler,Default_Handler - - .weak DSIHOST_IRQHandler - .thumb_set DSIHOST_IRQHandler,Default_Handler - - .weak DFSDM1_FLT0_IRQHandler - .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler - - .weak DFSDM1_FLT1_IRQHandler - .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler - - .weak DFSDM1_FLT2_IRQHandler - .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler - - .weak DFSDM1_FLT3_IRQHandler - .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler - - .weak SDMMC2_IRQHandler - .thumb_set SDMMC2_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/startup_stm32h7.s b/ports/stm32/boards/startup_stm32h7.s deleted file mode 100644 index 53d46205fd..0000000000 --- a/ports/stm32/boards/startup_stm32h7.s +++ /dev/null @@ -1,763 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32h743xx.s - * @author MCD Application Team - * @version V1.2.0 - * @date 29-December-2017 - * @brief STM32H743xx Devices vector table for GCC based toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m7 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call static constructors */ -/* bl __libc_init_array */ -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */ - .word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */ - .word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */ - .word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */ - .word TIM1_UP_IRQHandler /* TIM1 Update interrupt */ - .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word 0 /* Reserved */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FMC_IRQHandler /* FMC */ - .word SDMMC1_IRQHandler /* SDMMC1 */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word 0 /* Reserved */ - .word RNG_IRQHandler /* Rng */ - .word FPU_IRQHandler /* FPU */ - .word UART7_IRQHandler /* UART7 */ - .word UART8_IRQHandler /* UART8 */ - .word SPI4_IRQHandler /* SPI4 */ - .word SPI5_IRQHandler /* SPI5 */ - .word SPI6_IRQHandler /* SPI6 */ - .word SAI1_IRQHandler /* SAI1 */ - .word LTDC_IRQHandler /* LTDC */ - .word LTDC_ER_IRQHandler /* LTDC error */ - .word DMA2D_IRQHandler /* DMA2D */ - .word SAI2_IRQHandler /* SAI2 */ - .word QUADSPI_IRQHandler /* QUADSPI */ - .word LPTIM1_IRQHandler /* LPTIM1 */ - .word CEC_IRQHandler /* HDMI_CEC */ - .word I2C4_EV_IRQHandler /* I2C4 Event */ - .word I2C4_ER_IRQHandler /* I2C4 Error */ - .word SPDIF_RX_IRQHandler /* SPDIF_RX */ - .word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */ - .word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */ - .word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */ - .word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */ - .word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */ - .word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */ - .word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */ - .word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */ - .word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */ - .word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */ - .word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */ - .word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */ - .word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */ - .word SAI3_IRQHandler /* SAI3 global Interrupt */ - .word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */ - .word TIM15_IRQHandler /* TIM15 global Interrupt */ - .word TIM16_IRQHandler /* TIM16 global Interrupt */ - .word TIM17_IRQHandler /* TIM17 global Interrupt */ - .word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */ - .word MDIOS_IRQHandler /* MDIOS global Interrupt */ - .word JPEG_IRQHandler /* JPEG global Interrupt */ - .word MDMA_IRQHandler /* MDMA global Interrupt */ - .word 0 /* Reserved */ - .word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */ - .word HSEM1_IRQHandler /* HSEM1 global Interrupt */ - .word 0 /* Reserved */ - .word ADC3_IRQHandler /* ADC3 global Interrupt */ - .word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */ - .word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */ - .word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */ - .word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */ - .word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */ - .word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */ - .word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */ - .word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */ - .word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */ - .word COMP1_IRQHandler /* COMP1 global Interrupt */ - .word LPTIM2_IRQHandler /* LP TIM2 global interrupt */ - .word LPTIM3_IRQHandler /* LP TIM3 global interrupt */ - .word LPTIM4_IRQHandler /* LP TIM4 global interrupt */ - .word LPTIM5_IRQHandler /* LP TIM5 global interrupt */ - .word LPUART1_IRQHandler /* LP UART1 interrupt */ - .word 0 /* Reserved */ - .word CRS_IRQHandler /* Clock Recovery Global Interrupt */ - .word 0 /* Reserved */ - .word SAI4_IRQHandler /* SAI4 global interrupt */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_AVD_IRQHandler - .thumb_set PVD_AVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak FDCAN1_IT0_IRQHandler - .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler - - .weak FDCAN2_IT0_IRQHandler - .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler - - .weak FDCAN1_IT1_IRQHandler - .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler - - .weak FDCAN2_IT1_IRQHandler - .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_IRQHandler - .thumb_set TIM1_BRK_IRQHandler,Default_Handler - - .weak TIM1_UP_IRQHandler - .thumb_set TIM1_UP_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_IRQHandler - .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FMC_IRQHandler - .thumb_set FMC_IRQHandler,Default_Handler - - .weak SDMMC1_IRQHandler - .thumb_set SDMMC1_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak FDCAN_CAL_IRQHandler - .thumb_set FDCAN_CAL_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak RNG_IRQHandler - .thumb_set RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - - .weak UART7_IRQHandler - .thumb_set UART7_IRQHandler,Default_Handler - - .weak UART8_IRQHandler - .thumb_set UART8_IRQHandler,Default_Handler - - .weak SPI4_IRQHandler - .thumb_set SPI4_IRQHandler,Default_Handler - - .weak SPI5_IRQHandler - .thumb_set SPI5_IRQHandler,Default_Handler - - .weak SPI6_IRQHandler - .thumb_set SPI6_IRQHandler,Default_Handler - - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak LTDC_IRQHandler - .thumb_set LTDC_IRQHandler,Default_Handler - - .weak LTDC_ER_IRQHandler - .thumb_set LTDC_ER_IRQHandler,Default_Handler - - .weak DMA2D_IRQHandler - .thumb_set DMA2D_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak CEC_IRQHandler - .thumb_set CEC_IRQHandler,Default_Handler - - .weak I2C4_EV_IRQHandler - .thumb_set I2C4_EV_IRQHandler,Default_Handler - - .weak I2C4_ER_IRQHandler - .thumb_set I2C4_ER_IRQHandler,Default_Handler - - .weak SPDIF_RX_IRQHandler - .thumb_set SPDIF_RX_IRQHandler,Default_Handler - - .weak OTG_FS_EP1_OUT_IRQHandler - .thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_FS_EP1_IN_IRQHandler - .thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMAMUX1_OVR_IRQHandler - .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler - - .weak HRTIM1_Master_IRQHandler - .thumb_set HRTIM1_Master_IRQHandler,Default_Handler - - .weak HRTIM1_TIMA_IRQHandler - .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler - - .weak HRTIM1_TIMB_IRQHandler - .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler - - .weak HRTIM1_TIMC_IRQHandler - .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler - - .weak HRTIM1_TIMD_IRQHandler - .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler - - .weak HRTIM1_TIME_IRQHandler - .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler - - .weak HRTIM1_FLT_IRQHandler - .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler - - .weak DFSDM1_FLT0_IRQHandler - .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler - - .weak DFSDM1_FLT1_IRQHandler - .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler - - .weak DFSDM1_FLT2_IRQHandler - .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler - - .weak DFSDM1_FLT3_IRQHandler - .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler - - .weak SAI3_IRQHandler - .thumb_set SAI3_IRQHandler,Default_Handler - - .weak SWPMI1_IRQHandler - .thumb_set SWPMI1_IRQHandler,Default_Handler - - .weak TIM15_IRQHandler - .thumb_set TIM15_IRQHandler,Default_Handler - - .weak TIM16_IRQHandler - .thumb_set TIM16_IRQHandler,Default_Handler - - .weak TIM17_IRQHandler - .thumb_set TIM17_IRQHandler,Default_Handler - - .weak MDIOS_WKUP_IRQHandler - .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler - - .weak MDIOS_IRQHandler - .thumb_set MDIOS_IRQHandler,Default_Handler - - .weak JPEG_IRQHandler - .thumb_set JPEG_IRQHandler,Default_Handler - - .weak MDMA_IRQHandler - .thumb_set MDMA_IRQHandler,Default_Handler - - .weak SDMMC2_IRQHandler - .thumb_set SDMMC2_IRQHandler,Default_Handler - - .weak HSEM1_IRQHandler - .thumb_set HSEM1_IRQHandler,Default_Handler - - .weak ADC3_IRQHandler - .thumb_set ADC3_IRQHandler,Default_Handler - - .weak DMAMUX2_OVR_IRQHandler - .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler - - .weak BDMA_Channel0_IRQHandler - .thumb_set BDMA_Channel0_IRQHandler,Default_Handler - - .weak BDMA_Channel1_IRQHandler - .thumb_set BDMA_Channel1_IRQHandler,Default_Handler - - .weak BDMA_Channel2_IRQHandler - .thumb_set BDMA_Channel2_IRQHandler,Default_Handler - - .weak BDMA_Channel3_IRQHandler - .thumb_set BDMA_Channel3_IRQHandler,Default_Handler - - .weak BDMA_Channel4_IRQHandler - .thumb_set BDMA_Channel4_IRQHandler,Default_Handler - - .weak BDMA_Channel5_IRQHandler - .thumb_set BDMA_Channel5_IRQHandler,Default_Handler - - .weak BDMA_Channel6_IRQHandler - .thumb_set BDMA_Channel6_IRQHandler,Default_Handler - - .weak BDMA_Channel7_IRQHandler - .thumb_set BDMA_Channel7_IRQHandler,Default_Handler - - .weak COMP1_IRQHandler - .thumb_set COMP1_IRQHandler,Default_Handler - - .weak LPTIM2_IRQHandler - .thumb_set LPTIM2_IRQHandler,Default_Handler - - .weak LPTIM3_IRQHandler - .thumb_set LPTIM3_IRQHandler,Default_Handler - - .weak LPTIM4_IRQHandler - .thumb_set LPTIM4_IRQHandler,Default_Handler - - .weak LPTIM5_IRQHandler - .thumb_set LPTIM5_IRQHandler,Default_Handler - - .weak LPUART1_IRQHandler - .thumb_set LPUART1_IRQHandler,Default_Handler - - .weak CRS_IRQHandler - .thumb_set CRS_IRQHandler,Default_Handler - - .weak SAI4_IRQHandler - .thumb_set SAI4_IRQHandler,Default_Handler - - .weak WAKEUP_PIN_IRQHandler - .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/boards/startup_stm32l4.s b/ports/stm32/boards/startup_stm32l4.s deleted file mode 100644 index 3225723ff5..0000000000 --- a/ports/stm32/boards/startup_stm32l4.s +++ /dev/null @@ -1,549 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32l496xx.s - * @author MCD Application Team - * @brief STM32L496xx devices vector table GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address, - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - * Taken from STM32L4 template code for stm32l496 in STM32Cube_FW_L4_V1.11.0 - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2017 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m4 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -.equ BootRAM, 0xF1E0F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system initialization function.*/ - bl SystemInit -/* Call static constructors */ - /*bl __libc_init_array*/ -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex-M4. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_PVM_IRQHandler /* PVD and PVM through EXTI line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ - .word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ - .word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ - .word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ - .word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ - .word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ - .word ADC1_2_IRQHandler /* ADC1 and ADC2 */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM15_IRQHandler /* TIM1 Break and TIM15 */ - .word TIM1_UP_TIM16_IRQHandler /* TIM1 Update and TIM16 */ - .word TIM1_TRG_COM_TIM17_IRQHandler /* TIM1 Trigger and Commutation and TIM17 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word DFSDM1_FLT3_IRQHandler /* Digital filter 3 for sigma delta modulator */ - .word TIM8_BRK_IRQHandler /* TIM8 Break */ - .word TIM8_UP_IRQHandler /* TIM8 Update */ - .word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word ADC3_IRQHandler /* ADC3 global interrupt */ - .word FMC_IRQHandler /* FMC */ - .word SDMMC1_IRQHandler /* SDMMC1 */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */ - .word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */ - .word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */ - .word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */ - .word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */ - .word DFSDM1_FLT0_IRQHandler /* Digital filter 0 for sigma delta modulator */ - .word DFSDM1_FLT1_IRQHandler /* Digital filter 1 for sigma delta modulator */ - .word DFSDM1_FLT2_IRQHandler /* Digital filter 2 for sigma delta modulator */ - .word COMP_IRQHandler /* Comporator thru EXTI line */ - .word LPTIM1_IRQHandler /* Low power timer 1 */ - .word LPTIM2_IRQHandler /* Low power timer 2 */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */ - .word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */ - .word LPUART1_IRQHandler /* Low power UART */ - .word QUADSPI_IRQHandler /* Quad SPI */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word SAI1_IRQHandler /* Serial audio interface 1 */ - .word SAI2_IRQHandler /* Serial audio interface 2 */ - .word SWPMI1_IRQHandler /* Single wire protocole 1 */ - .word TSC_IRQHandler /* Touch sensig controller */ - .word LCD_IRQHandler /* LCD */ - .word 0 /* CRYP crypto */ - .word RNG_IRQHandler /* Random number generator */ - .word FPU_IRQHandler /* FPU */ - /* Following Handlers are only used on L496/4A6xx devices */ - .word CRS_IRQHandler /* HASH and CRS interrupt */ - .word I2C4_EV_IRQHandler /* I2C4 event interrupt */ - .word I2C4_ER_IRQHandler /* I2C4 error interrupt */ - .word DCMI_IRQHandler /* DCMI global interrupt */ - .word CAN2_TX_IRQHandler /* CAN2 TX interrupt */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 interrupt */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 interrupt */ - .word CAN2_SCE_IRQHandler /* CAN SCE interrupt */ - .word DMA2D_IRQHandler /* DMA2D global interrupt */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_PVM_IRQHandler - .thumb_set PVD_PVM_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM15_IRQHandler - .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM16_IRQHandler - .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM17_IRQHandler - .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak DFSDM1_FLT3_IRQHandler - .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler - - .weak TIM8_BRK_IRQHandler - .thumb_set TIM8_BRK_IRQHandler,Default_Handler - - .weak TIM8_UP_IRQHandler - .thumb_set TIM8_UP_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_IRQHandler - .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak ADC3_IRQHandler - .thumb_set ADC3_IRQHandler,Default_Handler - - .weak FMC_IRQHandler - .thumb_set FMC_IRQHandler,Default_Handler - - .weak SDMMC1_IRQHandler - .thumb_set SDMMC1_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_IRQHandler - .thumb_set DMA2_Channel4_IRQHandler,Default_Handler - - .weak DMA2_Channel5_IRQHandler - .thumb_set DMA2_Channel5_IRQHandler,Default_Handler - - .weak DFSDM1_FLT0_IRQHandler - .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler - - .weak DFSDM1_FLT1_IRQHandler - .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler - - .weak DFSDM1_FLT2_IRQHandler - .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler - - .weak COMP_IRQHandler - .thumb_set COMP_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak LPTIM2_IRQHandler - .thumb_set LPTIM2_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Channel6_IRQHandler - .thumb_set DMA2_Channel6_IRQHandler,Default_Handler - - .weak DMA2_Channel7_IRQHandler - .thumb_set DMA2_Channel7_IRQHandler,Default_Handler - - .weak LPUART1_IRQHandler - .thumb_set LPUART1_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak SWPMI1_IRQHandler - .thumb_set SWPMI1_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak LCD_IRQHandler - .thumb_set LCD_IRQHandler,Default_Handler - - .weak RNG_IRQHandler - .thumb_set RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - - .weak CRS_IRQHandler - .thumb_set CRS_IRQHandler,Default_Handler - - .weak I2C4_EV_IRQHandler - .thumb_set I2C4_EV_IRQHandler,Default_Handler - - .weak I2C4_ER_IRQHandler - .thumb_set I2C4_ER_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak DMA2D_IRQHandler - .thumb_set DMA2D_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/stm32f091_af.csv b/ports/stm32/boards/stm32f091_af.csv deleted file mode 100644 index 38e134f8a9..0000000000 --- a/ports/stm32/boards/stm32f091_af.csv +++ /dev/null @@ -1,89 +0,0 @@ -Port,Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,,,,,,,,, -,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,,,,,,,,,ADC -PortA,PA0,,USART2_CTS,TIM2_CH1_ETR,TSC_G1_IO1,USART4_TX,,,COMP1_OUT,,,,,,,,,ADC1_IN0 -PortA,PA1,EVENTOUT,USART2_RTS,TIM2_CH2,TSC_G1_IO2,USART4_RX,TIM15_CH1N,,,,,,,,,,,ADC1_IN1 -PortA,PA2,TIM15_CH1,USART2_TX,TIM2_CH3,TSC_G1_IO3,,,,COMP2_OUT,,,,,,,,,ADC1_IN2 -PortA,PA3,TIM15_CH2,USART2_RX,TIM2_CH4,TSC_G1_IO4,,,,,,,,,,,,,ADC1_IN3 -PortA,PA4,SPI1_NSS/I2S1_WS,USART2_CK,,TSC_G2_IO1,TIM14_CH1,USART6_TX,,,,,,,,,,,ADC1_IN4 -PortA,PA5,SPI1_SCK/I2S1_CK,CEC,TIM2_CH1_ETR,TSC_G2_IO2,,USART6_RX,,,,,,,,,,,ADC1_IN5 -PortA,PA6,SPI1_MISO/I2S1_MCK,TIM3_CH1,TIM1_BKIN,TSC_G2_IO3,USART3_CTS,TIM16_CH1,EVENTOUT,COMP1_OUT,,,,,,,,,ADC1_IN6 -PortA,PA7,SPI1_MOSI/I2S1_SD,TIM3_CH2,TIM1_CH1N,TSC_G2_IO4,TIM14_CH1,TIM17_CH1,EVENTOUT,COMP2_OUT,,,,,,,,,ADC1_IN7 -PortA,PA8,MCO,USART1_CK,TIM1_CH1,EVENTOUT,CRS_SYNC,,,,,,,,,,,, -PortA,PA9,TIM15_BKIN,USART1_TX,TIM1_CH2,TSC_G4_IO1,I2C1_SCL,MCO,,,,,,,,,,, -PortA,PA10,TIM17_BKIN,USART1_RX,TIM1_CH3,TSC_G4_IO2,I2C1_SDA,,,,,,,,,,,, -PortA,PA11,EVENTOUT,USART1_CTS,TIM1_CH4,TSC_G4_IO3,CAN1_RX,I2C2_SCL,,COMP1_OUT,,,,,,,,, -PortA,PA12,EVENTOUT,USART1_RTS,TIM1_ETR,TSC_G4_IO4,CAN1_TX,I2C2_SDA,,COMP2_OUT,,,,,,,,, -PortA,PA13,SWDIO,IR_OUT,,,,,,,,,,,,,,, -PortA,PA14,SWCLK,USART2_TX,,,,,,,,,,,,,,, -PortA,PA15,SPI1_NSS/I2S1_WS,USART2_RX,TIM2_CH1_ETR,EVENTOUT,USART4_RTS,,,,,,,,,,,, -PortB,PB0,EVENTOUT,TIM3_CH3,TIM1_CH2N,TSC_G3_IO2,USART3_CK,,,,,,,,,,,,ADC1_IN8 -PortB,PB1,TIM14_CH1,TIM3_CH4,TIM1_CH3N,TSC_G3_IO3,USART3_RTS,,,,,,,,,,,,ADC1_IN9 -PortB,PB2,,,,TSC_G3_IO4,,,,,,,,,,,,, -PortB,PB3,SPI1_SCK/I2S1_CK,EVENTOUT,TIM2_CH2,TSC_G5_IO1,USART5_TX,,,,,,,,,, -PortB,PB4,SPI1_MISO/I2S1_MCK,TIM3_CH1,EVENTOUT,TSC_G5_IO2,USART5_RX,TIM17_BKIN,,,,,,,,, -PortB,PB5,SPI1_MOSI/I2S1_SD,TIM3_CH2,TIM16_BKIN,I2C1_SMBA,USART5_CK/USART5_RTS,,,,,,,,,, -PortB,PB6,USART1_TX,I2C1_SCL,TIM16_CH1N,TSC_G5_IO3,,,,,,,,,,, -PortB,PB7,USART1_RX,I2C1_SDA,TIM17_CH1N,TSC_G5_IO4,USART4_CTS,,,,,,,,,, -PortB,PB8,CEC,I2C1_SCL,TIM16_CH1,TSC_SYNC,CAN1_RX,,,,,,,,,, -PortB,PB9,IR_OUT,I2C1_SDA,TIM17_CH1,EVENTOUT,CAN1_TX,SPI2_NSS/I2S2_WS,,,,,,,,, -PortB,PB10,CEC,I2C2_SCL,TIM2_CH3,TSC_SYNC,USART3_TX,SPI2_SCK/I2S2_CK,,,,,,,,, -PortB,PB11,EVENTOUT,I2C2_SDA,TIM2_CH4,TSC_G6_IO1,USART3_RX,,,,,,,,,, -PortB,PB12,SPI2_NSS/I2S2_WS,EVENTOUT,TIM1_BKIN,TSC_G6_IO2,USART3_CK,TIM15_BKIN,,,,,,,,, -PortB,PB13,SPI2_SCK/I2S2_CK,,TIM1_CH1N,TSC_G6_IO3,USART3_CTS,I2C2_SCL,,,,,,,,, -PortB,PB14,SPI2_MISO/I2S2_MCK,TIM15_CH1,TIM1_CH2N,TSC_G6_IO4,USART3_RTS,I2C2_SDA,,,,,,,,, -PortB,PB15,SPI2_MOSI/I2S2_SD,TIM15_CH2,TIM1_CH3N,TIM15_CH1N,,,,,,,,,,, -PortC,PC0,EVENTOUT,USART7_TX,USART6_TX,,,,,,,,,,,,,,ADC1_IN10 -PortC,PC1,EVENTOUT,USART7_RX,USART6_RX,,,,,,,,,,,,,,ADC1_IN11 -PortC,PC2,EVENTOUT,SPI2_MISO/I2S2_MCK,USART8_TX,,,,,,,,,,,,,,ADC1_IN12 -PortC,PC3,EVENTOUT,SPI2_MOSI/I2S2_SD,USART8_RX,,,,,,,,,,,,,,ADC1_IN13 -PortC,PC4,EVENTOUT,USART3_TX,,,,,,,,,,,,,,,ADC1_IN14 -PortC,PC5,TSC_G3_IO1,USART3_RX,,,,,,,,,,,,,,,ADC1_IN15 -PortC,PC6,TIM3_CH1,USART7_TX,,,,,,,,,,,,,,, -PortC,PC7,TIM3_CH2,USART7_RX,,,,,,,,,,,,,,, -PortC,PC8,TIM3_CH3,USART8_TX,,,,,,,,,,,,,,, -PortC,PC9,TIM3_CH4,USART8_RX,,,,,,,,,,,,,,, -PortC,PC10,USART4_TX,USART3_TX,,,,,,,,,,,,,,, -PortC,PC11,USART4_RX,USART3_RX,,,,,,,,,,,,,,, -PortC,PC12,USART4_CK,USART3_CK,USART5_TX,,,,,,,,,,,,,, -PortC,PC13,,,,,,,,,,,,,,,,, -PortC,PC14,,,,,,,,,,,,,,,,, -PortC,PC15,,,,,,,,,,,,,,,,, -PortD,PD0,CAN1_RX,SPI2_NSS/I2S2_WS,,,,,,,,,,,,,,, -PortD,PD1,CAN1_TX,SPI2_SCK/I2S2_CK,,,,,,,,,,,,,,, -PortD,PD2,TIM3_ETR,USART3_RTS,USART5_RX,,,,,,,,,,,,,, -PortD,PD3,USART2_CTS,SPI2_MISO/I2S2_MCK,,,,,,,,,,,,,,, -PortD,PD4,USART2_RTS,SPI2_MOSI/I2S2_SD,,,,,,,,,,,,,,, -PortD,PD5,USART2_TX,,,,,,,,,,,,,,,, -PortD,PD6,USART2_RX,,,,,,,,,,,,,,,, -PortD,PD7,USART2_CK,,,,,,,,,,,,,,,, -PortD,PD8,USART3_TX,,,,,,,,,,,,,,,, -PortD,PD9,USART3_RX,,,,,,,,,,,,,,,, -PortD,PD10,USART3_CK,,,,,,,,,,,,,,,, -PortD,PD11,USART3_CTS,,,,,,,,,,,,,,,, -PortD,PD12,USART3_RTS,TSC_G8_IO1,USART8_CK/USART8_RTS,,,,,,,,,,,,,, -PortD,PD13,USART8_TX,TSC_G8_IO2,,,,,,,,,,,,,,, -PortD,PD14,USART8_RX,TSC_G8_IO3,,,,,,,,,,,,,,, -PortD,PD15,CRS_SYNC,TSC_G8_IO4,USART7_CK/USART7_RTS,,,,,,,,,,,,,, -PortE,PE0,TIM16_CH1,EVENTOUT,,,,,,,,,,,,,,, -PortE,PE1,TIM17_CH1,EVENTOUT,,,,,,,,,,,,,,, -PortE,PE2,TIM3_ETR,TSC_G7_IO1,,,,,,,,,,,,,,, -PortE,PE3,TIM3_CH1,TSC_G7_IO2,,,,,,,,,,,,,,, -PortE,PE4,TIM3_CH2,TSC_G7_IO3,,,,,,,,,,,,,,, -PortE,PE5,TIM3_CH3,TSC_G7_IO4,,,,,,,,,,,,,,, -PortE,PE6,TIM3_CH4,,,,,,,,,,,,,,,, -PortE,PE7,TIM1_ETR,USART5_CK/USART5_RTS,,,,,,,,,,,,,,, -PortE,PE8,TIM1_CH1N,USART4_TX,,,,,,,,,,,,,,, -PortE,PE9,TIM1_CH1,USART4_RX,,,,,,,,,,,,,,, -PortE,PE10,TIM1_CH2N,USART5_TX,,,,,,,,,,,,,,, -PortE,PE11,TIM1_CH2,USART5_RX,,,,,,,,,,,,,,, -PortE,PE12,TIM1_CH3N,SPI1_NSS/I2S1_WS,,,,,,,,,,,,,,, -PortE,PE13,TIM1_CH3,SPI1_SCK/I2S1_CK,,,,,,,,,,,,,,, -PortE,PE14,TIM1_CH4,SPI1_MISO/I2S1_MCK,,,,,,,,,,,,,,, -PortE,PE15,TIM1_BKIN,SPI1_MOSI/I2S1_SD,,,,,,,,,,,,,,, -PortF,PF0,CRS_SYNC,I2C1_SDA,,,,,,,,,,,,,,, -PortF,PF1,,I2C1_SCL,,,,,,,,,,,,,,, -PortF,PF2,EVENTOUT,USART7_TX,USART7_CK/USART7_RTS,,,,,,,,,,,,,, -PortF,PF3,EVENTOUT,USART7_RX,USART6_CK/USART6_RTS,,,,,,,,,,,,,, -PortF,PF6,,,,,,,,,,,,,,,,, -PortF,PF9,TIM15_CH1,USART6_TX,,,,,,,,,,,,,,, -PortF,PF10,TIM15_CH2,USART6_RX,,,,,,,,,,,,,,, diff --git a/ports/stm32/boards/stm32f091xc.ld b/ports/stm32/boards/stm32f091xc.ld deleted file mode 100644 index 73b8442957..0000000000 --- a/ports/stm32/boards/stm32f091xc.ld +++ /dev/null @@ -1,26 +0,0 @@ -/* - GNU linker script for STM32F091xC -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K - FLASH_TEXT (rx) : ORIGIN = 0x08000000, LENGTH = 256K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20006800; /* room for a 6k stack */ diff --git a/ports/stm32/boards/stm32f401_af.csv b/ports/stm32/boards/stm32f401_af.csv deleted file mode 100644 index 1acb8e4313..0000000000 --- a/ports/stm32/boards/stm32f401_af.csv +++ /dev/null @@ -1,83 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/SPI2/I2S2/SPI3/I2S3/SPI4,SPI2/I2S2/SPI3/I2S3,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,OTG1_FS,,SDIO,,,,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK,,,,,,,,,,EVENTOUT,ADC1_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,,,,,,,,,,EVENTOUT,ADC1_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI,,,,,,,,,,EVENTOUT,ADC1_IN7 -PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,OTG_FS_VBUS,,,,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,USART6_TX,,OTG_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,USART6_RX,,OTG_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,,,,,,,,,,EVENTOUT,ADC1_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,,,,,,,,,,EVENTOUT,ADC1_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,I2C2_SDA,,,,,,EVENTOUT, -PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,,,,,,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,,,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,,,,SDIO_D4,,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,,,,SDIO_D5,,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,,,,,,,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10 -PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,ADC1_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN13 -PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14 -PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15 -PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT, -PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT, -PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT, -PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT, -PortE,PE1,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,,,,,,,,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,,,,,,,,,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,,,,,,,,,,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,,,,,,,,,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f401xd.ld b/ports/stm32/boards/stm32f401xd.ld deleted file mode 100644 index 7c0e790185..0000000000 --- a/ports/stm32/boards/stm32f401xd.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for STM32F401xD -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K, 4 is 64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 256K /* sectors 5,6 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ diff --git a/ports/stm32/boards/stm32f401xe.ld b/ports/stm32/boards/stm32f401xe.ld deleted file mode 100644 index e76bbad1c2..0000000000 --- a/ports/stm32/boards/stm32f401xe.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for STM32F401xE -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K, 4 is 64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ diff --git a/ports/stm32/boards/stm32f405.ld b/ports/stm32/boards/stm32f405.ld deleted file mode 100644 index 0375491f65..0000000000 --- a/ports/stm32/boards/stm32f405.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3,4 are for filesystem */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5,6,7,8,9,10,11 */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f405_af.csv b/ports/stm32/boards/stm32f405_af.csv deleted file mode 100644 index e6d8fcc2b5..0000000000 --- a/ports/stm32/boards/stm32f405_af.csv +++ /dev/null @@ -1,142 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/SPI2/I2S2/I2S2ext,SPI3/I2Sext/I2S3,USART1/2/3/I2S3ext,UART4/5/USART6,CAN1/CAN2/TIM12/13/14,OTG_FS/OTG_HS,ETH,FSMC/SDIO/OTG_FS,DCMI,,,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII__REF_CLK,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCK,,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,,DCMI_D10,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FSMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,,,,EVENTOUT,ADC123_IN10 -PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC123_IN14 -PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC123_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,,EVENTOUT, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FSMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FSMC_D3,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,,,,,USART2_CTS,,,,,FSMC_CLK,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FSMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FSMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,,,USART2_RX,,,,,FSMC_NWAIT,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,FSMC_NE1/FSMC_NCE2,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FSMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FSMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FSMC_D15,,,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,,,,FSMC_A16,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FSMC_A17,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,FSMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,FSMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,FSMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,,,,,FSMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,,,,,,,,,,FSMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,,,,,,,ETH_MII_TXD3,FSMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,,,,,,,FSMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,,,,,,,,FSMC_A20,DCMI_D4,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,,,,,,,,FSMC_A21,DCMI_D6,,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,,,,,,,,FSMC_A22,DCMI_D7,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,,,,,FSMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,,,,,FSMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,FSMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FSMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,,,,,,,,FSMC_D8,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,,,,,,,,FSMC_D9,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,,,,,,,,FSMC_D10,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,,,,,,,,FSMC_D11,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FSMC_D12,,,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FSMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FSMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FSMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FSMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FSMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FSMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,,,,,,,,FSMC_NIORD,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,,,,,,,,FSMC_NREG,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,,,,,TIM13_CH1,,,FSMC_NIOWR,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,,,,,TIM14_CH1,,,FSMC_CD,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,FSMC_INTR,,,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,,,,,,,,,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FSMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FSMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FSMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FSMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FSMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FSMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FSMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FSMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FSMC_A14,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FSMC_A15,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FSMC_INT2,,,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FSMC_INT3,,,EVENTOUT, -PortG,PG8,,,,,,,,,USART6_RTS,,,ETH_PPS_OUT,,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,,,,FSMC_NE2/FSMC_NCE3,,,EVENTOUT, -PortG,PG10,,,,,,,,,,,,,FSMC_NCE4_1/FSMC_NE3,,,EVENTOUT, -PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FSMC_NCE4_2,,,EVENTOUT, -PortG,PG12,,,,,,,,,USART6_RTS,,,,FSMC_NE4,,,EVENTOUT, -PortG,PG13,,,,,,,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FSMC_A24,,,EVENTOUT, -PortG,PG14,,,,,,,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FSMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,,,,EVENTOUT, -PortH,PH3,,,,,,,,,,,,ETH_MII_COL,,,,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,,,,,,,,,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,,,,,TIM12_CH1,,ETH_MII_RXD2,,,,EVENTOUT, -PortH,PH7,,,,,I2C3_SCL,,,,,,,ETH_MII_RXD3,,,,EVENTOUT, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,,DCMI_HSYNC,,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,,DCMI_D0,,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,,DCMI_D1,,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,,DCMI_D2,,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,,DCMI_D3,,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,,,,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,,DCMI_D4,,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,,DCMI_D11,,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,,DCMI_D13,,EVENTOUT, -PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,,DCMI_D8,,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,,DCMI_D9,,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,,,,DCMI_D5,,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,,,,DCMI_VSYNC,,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,,,,DCMI_D6,,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,,,,DCMI_D7,,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,,CAN1_RX,,,,,,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,,,,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f411.ld b/ports/stm32/boards/stm32f411.ld deleted file mode 100644 index 9e3e6bc154..0000000000 --- a/ports/stm32/boards/stm32f411.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for STM32F411 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K, 4 is 64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f411_af.csv b/ports/stm32/boards/stm32f411_af.csv deleted file mode 100644 index d5b7a61deb..0000000000 --- a/ports/stm32/boards/stm32f411_af.csv +++ /dev/null @@ -1,84 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3,SPI2/I2S2/SPI3/I2S3/SPI4/I2S4/SPI5/I2S5,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,,,SDIO,,,,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,SPI4_MOSI/I2S4_SD,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,I2S2_CKIN,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,I2S2_MCK,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3 -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK/I2S1_CK,,,,,,,,,,EVENTOUT,ADC1_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,I2S2_MCK,,,,,,SDIO_CMD,,,EVENTOUT,ADC1_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI/I2S1_SD,,,,,,,,,,EVENTOUT,ADC1_IN7 -PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,USB_FS_SOF,,SDIO_D1,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,USB_FS_VBUS,,SDIO_D2,,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,SPI5_MOSI/I2S5_SD,USART1_RX,,,USB_FS_ID,,,,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,SPI4_MISO,USART1_CTS,USART6_TX,,USB_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,SPI5_MISO,USART1_RTS,USART6_RX,,USB_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART1_TX,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,ADC1_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,ADC1_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,USART1_RX,,I2C2_SDA,,,,,,EVENTOUT, -PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,SDIO_D0,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,,,,SDIO_D3,,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,SDIO_D0,,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,SPI5_MOSI/I2S5_SD,,,I2C3_SDA,,,SDIO_D4,,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,I2C2_SDA,,,SDIO_D5,,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,I2S3_MCK,,,,,,SDIO_D7,,,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,I2S2_CKIN,,,,,,,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SPI4_NSS/I2S4_WS,SPI3_SCK/I2S3_CK,,,,,,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,SPI4_SCK/I2S4_CK,,,,,,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,SDIO_D6,,,EVENTOUT, -PortB,PB15,RTC_50Hz,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,SDIO_CK,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10 -PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,ADC1_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN13 -PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14 -PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15 -PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,,,SPI2_SCK/I2S2_CK,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT, -PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT, -PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S2_CKIN,,,,,,,SDIO_D1,,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT, -PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT, -PortE,PE1,,,,,,,,,,,,,,,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f429.ld b/ports/stm32/boards/stm32f429.ld deleted file mode 100644 index d80f7f5416..0000000000 --- a/ports/stm32/boards/stm32f429.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - GNU linker script for STM32F429i-Discovery kit with external 8MByte SDRam -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0, 16 KiB */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1-4: 3*16K+64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K - SDRAM(xrw) : ORIGIN = 0xC0000000, LENGTH = 8192K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f429_af.csv b/ports/stm32/boards/stm32f429_af.csv deleted file mode 100644 index 4ee8edd703..0000000000 --- a/ports/stm32/boards/stm32f429_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS, -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT, -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10 -PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14 -PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,UART8_Rx,,,,FMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,,,,,,UART8_Tx,,,,FMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,UART7_Rx,,,,FMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_Tx,,,,FMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,FMC_D8,,LCD_G3,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,FMC_D9,,LCD_B4,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,FMC_D10,,LCD_DE,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,FMC_D11,,LCD_CLK,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_Rx,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_Tx,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT, -PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT, -PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT, -PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT, -PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT, -PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT, -PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT, -PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT, -PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT, -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT, -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT, -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT, -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT, -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT, -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT, -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT, -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT, -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT, -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT, -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT, -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT, -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT, -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT, -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT, -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT, -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT, -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT, -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT, -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT, -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT, -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT, -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT, -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT, -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT, diff --git a/ports/stm32/boards/stm32f439.ld b/ports/stm32/boards/stm32f439.ld deleted file mode 100644 index 16c606eccc..0000000000 --- a/ports/stm32/boards/stm32f439.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for STM32F439 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 are 128K */ - FLASH_FS (rx) : ORIGIN = 0x08100000, LENGTH = 256K /* sectors 12-17 are 4*16K+64K+128K */ - FLASH_FS2 (rx) : ORIGIN = 0x08140000, LENGTH = 128K /* sector 18 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2002c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f439_af.csv b/ports/stm32/boards/stm32f439_af.csv deleted file mode 100644 index 4fc1f1116c..0000000000 --- a/ports/stm32/boards/stm32f439_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS, -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10 -PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14 -PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,UART8_RX,,,,FMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,,,FMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,,,FMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,SPI3_NSS,,,,,,FMC_D8,,LCD_G3,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,SPI3_SCK,,,,,,FMC_D9,,LCD_B4,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI3_MISO,,,,,,FMC_D10,,LCD_DE,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,SP3_MOSI,,,,,,FMC_D11,,LCD_CLK,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT, -PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT, -PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT, -PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT, -PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT, -PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT, -PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT, -PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT, -PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT, -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT, -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT, -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT, -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT, -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT, -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT, -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT, -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT, -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT, -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT, -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT, -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT, -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT, -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT, -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT, -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT, -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT, -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT, -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT, -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT, -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT, -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT, -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT, -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT, -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT, diff --git a/ports/stm32/boards/stm32f4xx_prefix.c b/ports/stm32/boards/stm32f4xx_prefix.c deleted file mode 100644 index 3bcd6e6410..0000000000 --- a/ports/stm32/boards/stm32f4xx_prefix.c +++ /dev/null @@ -1,32 +0,0 @@ -// stm32f4xx_prefix.c becomes the initial portion of the generated pins file. - -#include - -#include "py/obj.h" -#include "py/mphal.h" -#include "pin.h" - -#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \ -{ \ - { &pin_af_type }, \ - .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \ - .idx = (af_idx), \ - .fn = AF_FN_ ## af_fn, \ - .unit = (af_unit), \ - .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \ - .reg = (af_ptr) \ -} - -#define PIN(p_port, p_pin, p_af, p_adc_num, p_adc_channel) \ -{ \ - { &pin_type }, \ - .name = MP_QSTR_ ## p_port ## p_pin, \ - .port = PORT_ ## p_port, \ - .pin = (p_pin), \ - .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \ - .pin_mask = (1 << ((p_pin) & 0x0f)), \ - .gpio = GPIO ## p_port, \ - .af = p_af, \ - .adc_num = p_adc_num, \ - .adc_channel = p_adc_channel, \ -} diff --git a/ports/stm32/boards/stm32f722.ld b/ports/stm32/boards/stm32f722.ld deleted file mode 100644 index f2a1d85117..0000000000 --- a/ports/stm32/boards/stm32f722.ld +++ /dev/null @@ -1,27 +0,0 @@ -/* - GNU linker script for STM32F722, STM32F723, STM32F732, STM32F733 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sectors 0,1 */ - FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sectors 2-7 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K /* DTCM+SRAM1+SRAM2 */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20038000; /* tunable */ diff --git a/ports/stm32/boards/stm32f722_af.csv b/ports/stm32/boards/stm32f722_af.csv deleted file mode 100644 index 24500f5057..0000000000 --- a/ports/stm32/boards/stm32f722_af.csv +++ /dev/null @@ -1,146 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1,I2C1/2/3/USART1,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5,SPI2/I2S2/SPI3/I2S3/SPI3/I2S3/SAI1/UART4,SPI2/I2S2/SPI3/I2S3/USART1/2/3/UART5,SAI2/USART6/UART4/5/7/8/OTG1_FS,CAN1/TIM12/13/14/QUADSPI/FMC/OTG2_HS,SAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FS,SDMMC2,UART7/FMC/SDMMC1/OTG2_FS,,,SYS,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,,,,,EVENTOUT,ADC123_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,,,,,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,,,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,,,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,,FMC_SDNWE,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,UART4_CTS,,OTG_HS_ULPI_D1,,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,,OTG_HS_ULPI_D2,,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,SDMMC2_D2,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,SDMMC2_D3,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,,OTG_HS_ULPI_D7,,FMC_SDCKE1,,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,QUADSPI_BK1_NCS,,FMC_SDNE1,,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,SDMMC2_D4,,SDMMC1_D4,,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,SDMMC2_D5,,SDMMC1_D5,,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,,,,,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,,OTG_HS_ULPI_D5,,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,,OTG_HS_ULPI_D6,,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10 -PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,,FMC_SDNE0,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,I2S1_MCK,,,,,,,FMC_SDNE0,,,EVENTOUT,ADC12_IN14 -PortC,PC5,,,,,,,,,,,,,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,SDMMC2_D6,,SDMMC1_D6,,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,SDMMC2_D7,,SDMMC1_D7,,,EVENTOUT, -PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,,,EVENTOUT, -PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,,,EVENTOUT, -PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT, -PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,SDMMC2_CK,FMC_NWAIT,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,,,EVENTOUT, -PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,,,EVENTOUT, -PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,,,,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,,,,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,,,EVENTOUT, -PortG,PG8,,,,,,,,,USART6_RTS,,,,FMC_SDCLK,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,,,EVENTOUT, -PortG,PG10,,,,,,,,,,,SAI2_SD_B,SDMMC2_D1,FMC_NE3,,,EVENTOUT, -PortG,PG11,,,,,,,,,,,SDMMC2_D2,,,,,EVENTOUT, -PortG,PG12,,,,LPTIM1_IN1,,,,,USART6_RTS,,,SDMMC2_D3,FMC_NE4,,,EVENTOUT, -PortG,PG13,TRACED0,,,LPTIM1_OUT,,,,,USART6_CTS,,,,FMC_A24,,,EVENTOUT, -PortG,PG14,TRACED1,,,LPTIM1_ETR,,,,,USART6_TX,QUADSPI_BK2_IO3,,,FMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,,FMC_SDCKE0,,,EVENTOUT, -PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,,FMC_SDNE0,,,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,,,EVENTOUT, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,,FMC_SDCKE1,,,EVENTOUT, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,,,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,,,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,,,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,,,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,,,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,,,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,,,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,,,EVENTOUT, -PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,,,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,,,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,,,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,,,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,,,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,,,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,,EVENTOUT, -PortI,PI10,,,,,,,,,,,,,FMC_D31,,,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI15,,,,,,,,,,,,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f746.ld b/ports/stm32/boards/stm32f746.ld deleted file mode 100644 index b5864453dd..0000000000 --- a/ports/stm32/boards/stm32f746.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ - FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K /* SRAM1 = 240K, SRAM2 = 16K */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2004c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f746_af.csv b/ports/stm32/boards/stm32f746_af.csv deleted file mode 100644 index 8069edc7b9..0000000000 --- a/ports/stm32/boards/stm32f746_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15 -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/OTG2_HS/OTG1_FS,ETH/OTG1_FS,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,LCD_R1,EVENTOUT -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT -PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT -PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,,,,,,EVENTOUT -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT -PortB,PB6,,,TIM4_CH1,HDMI_CEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT -PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT -PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT -PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT -PortC,PC4,,,,,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT -PortC,PC5,,,,,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT -PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,DCMI_D2,,EVENTOUT -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,DCMI_D3,,EVENTOUT -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT -PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT -PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT -PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT -PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,,FMC_NE1,,,EVENTOUT -PortD,PD8,,,,,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT -PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT -PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT -PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT -PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT -PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT -PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT -PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT -PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT -PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT -PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT -PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT -PortF,PF10,,,,,,,,,,,,,,DCMI_D11,LCD_DE,EVENTOUT -PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT -PortF,PF13,,,,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT -PortF,PF14,,,,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT -PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT -PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT -PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT -PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT -PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT -PortG,PG11,,,,,,,,SPDIFRX_IN0,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT -PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT -PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT -PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT -PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT -PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT -PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT -PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT -PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT -PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT -PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT -PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT -PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT -PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT diff --git a/ports/stm32/boards/stm32f767.ld b/ports/stm32/boards/stm32f767.ld deleted file mode 100644 index c05fd8021b..0000000000 --- a/ports/stm32/boards/stm32f767.ld +++ /dev/null @@ -1,30 +0,0 @@ -/* - GNU linker script for STM32F767 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ - FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */ - FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* SRAM1 = 368K, SRAM2 = 16K */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20078000; /* tunable */ diff --git a/ports/stm32/boards/stm32f767_af.csv b/ports/stm32/boards/stm32f767_af.csv deleted file mode 100644 index 0c8069ec26..0000000000 --- a/ports/stm32/boards/stm32f767_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,I2C4/UART5/TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/DFSDM1/CEC,I2C1/2/3/4/USART1/CEC,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6,SPI2/I2S2/SPI3/I2S3/SAI1/I2C4/UART4/DFSDM1,SPI2/I2S2/SPI3/I2S3/SPI6/USART1/2/3/UART5/DFSDM1/SPDIF,SPI6/SAI2/USART6/UART4/5/7/8/OTG_FS/SPDIF,CAN1/2/TIM12/13/14/QUADSPI/FMC/LCD,SAI2/QUADSPI/SDMMC2/DFSDM1/OTG2_HS/OTG1_FS/LCD,I2C4/CAN3/SDMMC2/ETH,UART7/FMC/SDMMC1/MDIOS/OTG2_FS,DCMI/LCD/DSI,LCD,SYS,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,MDIOS_MDIO,,LCD_R1,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,SPI6_MISO,TIM13_CH1,,,MDIOS_MDC,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,SPI6_MOSI,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,CAN3_RX,UART7_RX,LCD_B3,LCD_R6,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,LCD_R5,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,LCD_B4,OTG_FS_ID,,MDIOS_MDIO,DCMI_D1,LCD_B1,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS,UART4_RTS,,,CAN3_TX,UART7_TX,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,DFSDM1_CKOUT,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATAIN1,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,DFSDM1_CKIN1,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,SPI6_SCK,,SDMMC2_D2,CAN3_RX,UART7_RX,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,SPI6_MISO,,SDMMC2_D3,CAN3_TX,UART7_TX,,,EVENTOUT, -PortB,PB5,,UART5_RX,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,SPI6_MOSI,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,LCD_G7,EVENTOUT, -PortB,PB6,,UART5_TX,TIM4_CH1,HDMI_CEC,I2C1_SCL,,DFSDM1_DATAIN5,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,I2C4_SCL,FMC_SDNE1,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,DFSDM1_CKIN5,USART1_RX,,,,I2C4_SDA,FMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,I2C4_SCL,TIM4_CH3,TIM10_CH1,I2C1_SCL,,DFSDM1_CKIN7,UART5_RX,,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT, -PortB,PB9,,I2C4_SDA,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,DFSDM1_DATAIN7,UART5_TX,,CAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,DFSDM1_DATAIN7,USART3_TX,,QUADSPI_BK1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DSI_TE,LCD_G5,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,DFSDM1_DATAIN1,USART3_CK,UART5_RX,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,DFSDM1_CKIN1,USART3_CTS,UART5_TX,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,USART1_TX,SPI2_MISO,DFSDM1_DATAIN2,USART3_RTS,UART4_RTS,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SD,DFSDM1_CKIN2,,UART4_CTS,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,DFSDM1_CKIN0,,,DFSDM1_DATAIN4,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT,ADC123_IN10 -PortC,PC1,TRACED0,,,DFSDM1_DATAIN0,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,DFSDM1_CKIN4,ETH_MDC,MDIOS_MDC,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,DFSDM1_CKIN1,,SPI2_MISO,DFSDM1_CKOUT,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,DFSDM1_DATAIN1,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,DFSDM1_CKIN2,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT,ADC12_IN14 -PortC,PC5,,,,DFSDM1_DATAIN2,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT,ADC12_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,DFSDM1_CKIN3,USART6_TX,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,DFSDM1_DATAIN3,USART6_RX,FMC_NE1,SDMMC2_D7,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT, -PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,FMC_NE2/FMC_NCE,,,SDMMC1_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,LCD_G3,,SDMMC1_D1,DCMI_D3,LCD_B2,EVENTOUT, -PortC,PC10,,,,DFSDM1_CKIN5,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT, -PortC,PC11,,,,DFSDM1_DATAIN5,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,DFSDM1_CKIN6,,,DFSDM1_DATAIN7,,UART4_RX,CAN1_RX,,,FMC_D2,,,EVENTOUT, -PortD,PD1,,,,DFSDM1_DATAIN6,,,DFSDM1_CKIN7,,UART4_TX,CAN1_TX,,,FMC_D3,,,EVENTOUT, -PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,DFSDM1_CKOUT,,SPI2_SCK/I2S2_CK,DFSDM1_DATAIN0,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT, -PortD,PD4,,,,,,,DFSDM1_CKIN0,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,,DFSDM1_CKIN4,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,DFSDM1_DATAIN1,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT, -PortD,PD7,,,,DFSDM1_DATAIN4,,SPI1_MOSI/I2S1_SD,DFSDM1_CKIN1,USART2_CK,SPDIFRX_IN0,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT, -PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT, -PortD,PD9,,,,DFSDM1_DATAIN3,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT, -PortD,PD10,,,,DFSDM1_CKOUT,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT, -PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,DFSDM1_DATAIN3,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,DFSDM1_CKIN3,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT, -PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATAIN2,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,DFSDM1_DATAIN4,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,DFSDM1_CKIN4,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,DFSDM1_DATAIN5,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,DFSDM1_CKIN5,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,QUADSPI_CLK,,,,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,,I2C4_SMBA,,DFSDM1_DATAIN6,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,,I2C4_SCL,,DFSDM1_CKIN6,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FMC_NE3,DCMI_D12,LCD_R7,EVENTOUT, -PortG,PG7,,,,,,,SAI1_MCLK_A,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT, -PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT, -PortG,PG9,,,,,,SPI1_MISO,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT, -PortG,PG10,,,,,,SPI1_NSS/I2S1_WS,,,,LCD_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT, -PortG,PG11,,,,,,SPI1_SCK/I2S1_CK,,SPDIFRX_IN0,,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT, -PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,SDMMC2_D3,FMC_NE4,,LCD_B1,EVENTOUT, -PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT, -PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT, -PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,LCD_G5,OTG_HS_ULPI_NXT,,,,LCD_G4,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT, -PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT, -PortI,PI11,,,,,,,,,,LCD_G6,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT, -PortI,PI15,,,,,,,,,,LCD_G2,,,,,LCD_R0,EVENTOUT, -PortJ,PJ0,,,,,,,,,,LCD_R7,,,,,LCD_R1,EVENTOUT, -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT, -PortJ,PJ2,,,,,,,,,,,,,,DSI_TE,LCD_R3,EVENTOUT, -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT, -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT, -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT, -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT, -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT, -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT, -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT, -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT, -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT, -PortJ,PJ12,,,,,,,,,,LCD_G3,,,,,LCD_B0,EVENTOUT, -PortJ,PJ13,,,,,,,,,,LCD_G4,,,,,LCD_B1,EVENTOUT, -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT, -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT, -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT, -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT, -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT, -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT, -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT, -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT, -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT, -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT, diff --git a/ports/stm32/boards/stm32f769.ld b/ports/stm32/boards/stm32f769.ld deleted file mode 100644 index d6da439435..0000000000 --- a/ports/stm32/boards/stm32f769.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - GNU linker script for STM32F769 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ - FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* SRAM1 = 368K, SRAM2 = 16K */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20078000; /* tunable */ diff --git a/ports/stm32/boards/stm32h743.ld b/ports/stm32/boards/stm32h743.ld deleted file mode 100644 index 77bbfacb10..0000000000 --- a/ports/stm32/boards/stm32h743.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - GNU linker script for STM32H743 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* sector 0, 128K */ - FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* sector 1, 128K */ - FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1792K /* sectors 6*128 + 8*128 */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2407C000; /* tunable */ diff --git a/ports/stm32/boards/stm32h743_af.csv b/ports/stm32/boards/stm32h743_af.csv deleted file mode 100644 index d008ba68b6..0000000000 --- a/ports/stm32/boards/stm32h743_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2/16/17/LPTIM1/HRTIM1,SAI1/TIM3/4/5/12/HRTIM1,LPUART/TIM8/LPTIM2/3/4/5/HRTIM1/DFSDM,I2C1/2/3/4/USART1/TIM15/LPTIM2/DFSDM/CEC,SPI1/2/3/4/5/6/CEC,SPI2/3/SAI1/3/I2C4/UART4/DFSDM,SPI2/3/6/USART1/2/3/6/UART7/SDMMC1,SPI6/SAI2/4/UART4/5/8/LPUART/SDMMC1/SPDIFRX,SAI4/FDCAN1/2/TIM13/14/QUADSPI/FMC/SDMMC2/LCD/SPDIFRX,SAI2/4/TIM8/QUADSPI/SDMMC2/OTG1_HS/OTG2_FS/LCD,I2C4/UART7/SWPMI1/TIM1/8/DFSDM/SDMMC2/MDIOS/ETH,TIM1/8/FMC/SDMMC1/MDIOS/OTG1_FS/LCD,TIM1/DCMI/LCD/COMP,UART5/LCD,SYS,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT, -PortA,PA1,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT, -PortA,PA2,,TIM2_CH3,TIM5_CH3,LPTIM4_OUT,TIM15_CH1,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,MDIOS_MDIO,,LCD_R1,EVENTOUT, -PortA,PA3,,TIM2_CH4,TIM5_CH4,LPTIM5_OUT,TIM15_CH2,,,USART2_RX,,LCD_B2,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT, -PortA,PA4,,,TIM5_ETR,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,SPI6_NSS,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT, -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,SPI6_SCK,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT, -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO/I2S1_SDI,,,SPI6_MISO,TIM13_CH1,TIM8_BKIN_COMP12,MDIOS_MDC,TIM1_BKIN_COMP12,DCMI_PIXCLK,LCD_G2,EVENTOUT, -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SDO,,,SPI6_MOSI,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT, -PortA,PA8,MCO1,TIM1_CH1,HRTIM_CHB2,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,UART7_RX,TIM8_BKIN2_COMP12,LCD_B3,LCD_R6,EVENTOUT, -PortA,PA9,,TIM1_CH2,HRTIM_CHC1,LPUART1_TX,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,CAN1_RXFD,,ETH_TX_ER,,DCMI_D0,LCD_R5,EVENTOUT, -PortA,PA10,,TIM1_CH3,HRTIM_CHC2,LPUART1_RX,,,,USART1_RX,,CAN1_TXFD,OTG_FS_ID,MDIOS_MDIO,LCD_B4,DCMI_D1,LCD_B1,EVENTOUT, -PortA,PA11,,TIM1_CH4,HRTIM_CHD1,LPUART1_CTS,,SPI2_NSS/I2S2_WS,UART4_RX,USART1_CTS/USART1_NSS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT, -PortA,PA12,,TIM1_ETR,HRTIM_CHD2,LPUART1_RTS,,SPI2_SCK/I2S2_CK,UART4_TX,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT, -PortA,PA13,JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,HRTIM_FLT1,,HDMI_CEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,SPI6_NSS,UART4_RTS,,,UART7_TX,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,DFSDM_CKOUT,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,LCD_G1,EVENTOUT, -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM_DATIN1,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,LCD_G0,EVENTOUT, -PortB,PB2,,,SAI1_D1,,DFSDM_CKIN1,,SAI1_SD_A,SPI3_MOSI/I2S3_SDO,SAI4_SD_A,QUADSPI_CLK,SAI4_D1,ETH_TX_ER,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,HRTIM_FLT4,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,SPI6_SCK,SDMMC2_D2,,UART7_RX,,,,EVENTOUT, -PortB,PB4,NJTRST,TIM16_BKIN,TIM3_CH1,HRTIM_EEV6,,SPI1_MISO/I2S1_SDI,SPI3_MISO/I2S3_SDI,SPI2_NSS/I2S2_WS,SPI6_MISO,SDMMC2_D3,,UART7_TX,,,,EVENTOUT, -PortB,PB5,,TIM17_BKIN,TIM3_CH2,HRTIM_EEV7,I2C1_SMBA,SPI1_MOSI/I2S1_SDO,I2C4_SMBA,SPI3_MOSI/I2S3_SDO,SPI6_MOSI,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,UART5_RX,EVENTOUT, -PortB,PB6,,TIM16_CH1N,TIM4_CH1,HRTIM_EEV8,I2C1_SCL,HDMI_CEC,I2C4_SCL,USART1_TX,LPUART1_TX,CAN2_TX,QUADSPI_BK1_NCS,DFSDM_DATIN5,FMC_SDNE1,DCMI_D5,UART5_TX,EVENTOUT, -PortB,PB7,,TIM17_CH1N,TIM4_CH2,HRTIM_EEV9,I2C1_SDA,,I2C4_SDA,USART1_RX,LPUART1_RX,CAN2_TXFD,,DFSDM_CKIN5,FMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,TIM16_CH1,TIM4_CH3,DFSDM_CKIN7,I2C1_SCL,,I2C4_SCL,SDMMC1_CKIN,UART4_RX,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT, -PortB,PB9,,TIM17_CH1,TIM4_CH4,DFSDM_DATIN7,I2C1_SDA,SPI2_NSS/I2S2_WS,I2C4_SDA,SDMMC1_CDIR,UART4_TX,CAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT, -PortB,PB10,,TIM2_CH3,HRTIM_SCOUT,LPTIM2_IN1,I2C2_SCL,SPI2_SCK/I2S2_CK,DFSDM_DATIN7,USART3_TX,,QUADSPI_BK1_NCS,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT, -PortB,PB11,,TIM2_CH4,HRTIM_SCIN,LPTIM2_ETR,I2C2_SDA,,DFSDM_CKIN7,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,DFSDM_DATIN1,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,TIM1_BKIN_COMP12,UART5_RX,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,LPTIM2_OUT,,SPI2_SCK/I2S2_CK,DFSDM_CKIN1,USART3_CTS/USART3_NSS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,UART5_TX,EVENTOUT, -PortB,PB14,,TIM1_CH2N,TIM12_CH1,TIM8_CH2N,USART1_TX,SPI2_MISO/I2S2_SDI,DFSDM_DATIN2,USART3_RTS,UART4_RTS,SDMMC2_D0,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,TIM12_CH2,TIM8_CH3N,USART1_RX,SPI2_MOSI/I2S2_SDO,DFSDM_CKIN2,,UART4_CTS,SDMMC2_D1,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,DFSDM_CKIN0,,,DFSDM_DATIN4,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT, -PortC,PC1,TRACED0,,SAI1_D1,DFSDM_DATIN0,DFSDM_CKIN4,SPI2_MOSI/I2S2_SDO,SAI1_SD_A,,SAI4_SD_A,SDMMC2_CK,SAI4_D1,ETH_MDC,MDIOS_MDC,,,EVENTOUT, -PortC,PC2,,,,DFSDM_CKIN1,,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT, -PortC,PC3,,,,DFSDM_DATIN1,,SPI2_MOSI/I2S2_SDO,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT, -PortC,PC4,,,,DFSDM_CKIN2,,I2S1_MCK,,,,SPDIFRX_IN2,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT, -PortC,PC5,,,SAI1_D3,DFSDM_DATIN2,,,,,,SPDIFRX_IN3,SAI4_D3,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,COMP_1_OUT,,EVENTOUT, -PortC,PC6,,HRTIM_CHA1,TIM3_CH1,TIM8_CH1,DFSDM_CKIN3,I2S2_MCK,,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT, -PortC,PC7,TRGIO,HRTIM_CHA2,TIM3_CH2,TIM8_CH2,DFSDM_DATIN3,,I2S3_MCK,USART6_RX,SDMMC1_D123DIR,FMC_NE1,SDMMC2_D7,SWPMI_TX,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT, -PortC,PC8,TRACED1,HRTIM_CHB1,TIM3_CH3,TIM8_CH3,,,,USART6_CK,UART5_RTS,FMC_NE2/FMC_NCE,,SWPMI_RX,SDMMC1_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,UART5_CTS,QUADSPI_BK1_IO0,LCD_G3,SWPMI_SUSPEND,SDMMC1_D1,DCMI_D3,LCD_B2,EVENTOUT, -PortC,PC10,,,HRTIM_EEV1,DFSDM_CKIN5,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT, -PortC,PC11,,,HRTIM_FLT2,DFSDM_DATIN5,,,SPI3_MISO/I2S3_SDI,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,TRACED3,,HRTIM_EEV2,,,,SPI3_MOSI/I2S3_SDO,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,DFSDM_CKIN6,,,SAI3_SCK_A,,UART4_RX,CAN1_RX,,,FMC_D2/FMC_DA2,,,EVENTOUT, -PortD,PD1,,,,DFSDM_DATIN6,,,SAI3_SD_A,,UART4_TX,CAN1_TX,,,FMC_D3/FMC_DA3,,,EVENTOUT, -PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,DFSDM_CKOUT,,SPI2_SCK/I2S2_CK,,USART2_CTS/USART2_NSS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT, -PortD,PD4,,,HRTIM_FLT3,,,,SAI3_FS_A,USART2_RTS,,CAN1_RXFD,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,HRTIM_EEV3,,,,,USART2_TX,,CAN1_TXFD,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,SAI1_D1,DFSDM_CKIN4,DFSDM_DATIN1,SPI3_MOSI/I2S3_SDO,SAI1_SD_A,USART2_RX,SAI4_SD_A,CAN2_RXFD,SAI4_D1,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT, -PortD,PD7,,,,DFSDM_DATIN4,,SPI1_MOSI/I2S1_SDO,DFSDM_CKIN1,USART2_CK,,SPDIFRX_IN0,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT, -PortD,PD8,,,,DFSDM_CKIN3,,,SAI3_SCK_B,USART3_TX,,SPDIFRX_IN1,,,FMC_D13/FMC_DA13,,,EVENTOUT, -PortD,PD9,,,,DFSDM_DATIN3,,,SAI3_SD_B,USART3_RX,,CAN2_RXFD,,,FMC_D14/FMC_DA14,,,EVENTOUT, -PortD,PD10,,,,DFSDM_CKOUT,,,SAI3_FS_B,USART3_CK,,CAN2_TXFD,,,FMC_D15/FMC_DA15,,LCD_B3,EVENTOUT, -PortD,PD11,,,,LPTIM2_IN2,I2C4_SMBA,,,USART3_CTS/USART3_NSS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16,,,EVENTOUT, -PortD,PD12,,LPTIM1_IN1,TIM4_CH1,LPTIM2_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17,,,EVENTOUT, -PortD,PD13,,LPTIM1_OUT,TIM4_CH2,,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,SAI3_MCLK_B,,UART8_CTS,,,,FMC_D0/FMC_DA0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,SAI3_MCLK_A,,UART8_RTS,,,,FMC_D1/FMC_DA1,,,EVENTOUT, -PortE,PE0,,LPTIM1_ETR,TIM4_ETR,HRTIM_SCIN,LPTIM2_ETR,,,,UART8_RX,CAN1_RXFD,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,LPTIM1_IN2,,HRTIM_SCOUT,,,,,UART8_TX,CAN1_TXFD,,,FMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,SAI1_CK1,,,SPI4_SCK,SAI1_MCLK_A,,SAI4_MCLK_A,QUADSPI_BK1_IO2,SAI4_CK1,ETH_MII_TXD3,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,TIM15_BKIN,,SAI1_SD_B,,SAI4_SD_B,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,SAI1_D2,DFSDM_DATIN3,TIM15_CH1N,SPI4_NSS,SAI1_FS_A,,SAI4_FS_A,,SAI4_D2,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT, -PortE,PE5,TRACED2,,SAI1_CK2,DFSDM_CKIN3,TIM15_CH1,SPI4_MISO,SAI1_SCK_A,,SAI4_SCK_A,,SAI4_CK2,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT, -PortE,PE6,TRACED3,TIM1_BKIN2,SAI1_D1,,TIM15_CH2,SPI4_MOSI,SAI1_SD_A,,SAI4_SD_A,SAI4_D1,SAI2_MCK_B,TIM1_BKIN2_COMP12,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT, -PortE,PE7,,TIM1_ETR,,DFSDM_DATIN2,,,,UART7_RX,,,QUADSPI_BK2_IO0,,FMC_D4/FMC_DA4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,DFSDM_CKIN2,,,,UART7_TX,,,QUADSPI_BK2_IO1,,FMC_D5/FMC_DA5,COMP_2_OUT,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,DFSDM_CKOUT,,,,UART7_RTS,,,QUADSPI_BK2_IO2,,FMC_D6/FMC_DA6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,DFSDM_DATIN4,,,,UART7_CTS,,,QUADSPI_BK2_IO3,,FMC_D7/FMC_DA7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,DFSDM_CKIN4,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8/FMC_DA8,,LCD_G3,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,DFSDM_DATIN5,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9/FMC_DA9,COMP_1_OUT,LCD_B4,EVENTOUT, -PortE,PE13,,TIM1_CH3,,DFSDM_CKIN5,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10/FMC_DA10,COMP_2_OUT,LCD_DE,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11/FMC_DA11,,LCD_CLK,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,HDMI__TIM1_BKIN,,,,,,,FMC_D12/FMC_DA12,TIM1_BKIN_COMP12,LCD_R7,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT, -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT, -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT, -PortF,PF6,,TIM16_CH1,,,,SPI5_NSS,SAI1_SD_B,UART7_RX,SAI4_SD_B,QUADSPI_BK1_IO3,,,,,,EVENTOUT, -PortF,PF7,,TIM17_CH1,,,,SPI5_SCK,SAI1_MCLK_B,UART7_TX,SAI4_MCLK_B,QUADSPI_BK1_IO2,,,,,,EVENTOUT, -PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_RTS,SAI4_SCK_B,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT, -PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,SAI4_FS_B,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT, -PortF,PF10,,TIM16_BKIN,SAI1_D3,,,,,,,QUADSPI_CLK,SAI4_D3,,,DCMI_D11,LCD_DE,EVENTOUT, -PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,DFSDM_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,DFSDM_CKIN6,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,TIM8_BKIN,,,,,,,,TIM8_BKIN_COMP12,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,TIM8_BKIN2,,,,,,,,TIM8_BKIN2_COMP12,FMC_A13,,,EVENTOUT, -PortG,PG4,,TIM1_BKIN2,,,,,,,,,,TIM1_BKIN2_COMP12,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,TIM1_ETR,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,TIM17_BKIN,HRTIM_CHE1,,,,,,,,QUADSPI_BK1_NCS,,FMC_NE3,DCMI_D12,LCD_R7,EVENTOUT, -PortG,PG7,,,HRTIM_CHE2,,,,SAI1_MCLK_A,USART6_CK,,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT, -PortG,PG8,,,,TIM8_ETR,,SPI6_NSS,,USART6_RTS,SPDIFRX_IN2,,,ETH_PPS_OUT,FMC_SDCLK,,LCD_G7,EVENTOUT, -PortG,PG9,,,,,,SPI1_MISO/I2S1_SDI,,USART6_RX,SPDIFRX_IN3,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT, -PortG,PG10,,,HRTIM_FLT5,,,SPI1_NSS/I2S1_WS,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT, -PortG,PG11,,,HRTIM_EEV4,,,SPI1_SCK/I2S1_CK,,,SPDIFRX_IN0,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT, -PortG,PG12,,LPTIM1_IN1,HRTIM_EEV5,,,SPI6_MISO,,USART6_RTS,SPDIFRX_IN1,LCD_B4,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_NE4,,LCD_B1,EVENTOUT, -PortG,PG13,TRACED0,LPTIM1_OUT,HRTIM_EEV10,,,SPI6_SCK,,USART6_CTS/USART6_NSS,,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT, -PortG,PG14,TRACED1,LPTIM1_ETR,,,,SPI6_MOSI,,USART6_TX,,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT, -PortG,PG15,,,,,,,,USART6_CTS/USART6_NSS,,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,LPTIM1_IN2,,,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT, -PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,LCD_G5,OTG_HS_ULPI_NXT,,,,LCD_G4,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,TIM12_CH1,,I2C2_SMBA,SPI5_SCK,,,,,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT, -PortH,PH8,,,TIM5_ETR,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT, -PortH,PH9,,,TIM12_CH2,,I2C3_SMBA,,,,,,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,CAN1_RX,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,CAN1_TXFD,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,CAN1_RXFD,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT, -PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,TIM8_BKIN2_COMP12,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO/I2S2_SDI,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SDO,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,TIM8_BKIN_COMP12,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,UART4_RX,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT, -PortI,PI10,,,,,,,,,,CAN1_RXFD,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT, -PortI,PI11,,,,,,,,,,LCD_G6,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,ETH_TX_ER,,,LCD_HSYNC,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT, -PortI,PI15,,,,,,,,,,LCD_G2,,,,,LCD_R0,EVENTOUT, -PortJ,PJ0,,,,,,,,,,LCD_R7,,,,,LCD_R1,EVENTOUT, -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT, -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT, -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT, -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT, -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT, -PortJ,PJ6,,,,TIM8_CH2,,,,,,,,,,,LCD_R7,EVENTOUT, -PortJ,PJ7,TRGIN,,,TIM8_CH2N,,,,,,,,,,,LCD_G0,EVENTOUT, -PortJ,PJ8,,TIM1_CH3N,,TIM8_CH1,,,,,UART8_TX,,,,,,LCD_G1,EVENTOUT, -PortJ,PJ9,,TIM1_CH3,,TIM8_CH1N,,,,,UART8_RX,,,,,,LCD_G2,EVENTOUT, -PortJ,PJ10,,TIM1_CH2N,,TIM8_CH2,,SPI5_MOSI,,,,,,,,,LCD_G3,EVENTOUT, -PortJ,PJ11,,TIM1_CH2,,TIM8_CH2N,,SPI5_MISO,,,,,,,,,LCD_G4,EVENTOUT, -PortJ,PJ12,TRGOUT,,,,,,,,,LCD_G3,,,,,LCD_B0,EVENTOUT, -PortJ,PJ13,,,,,,,,,,LCD_B4,,,,,LCD_B1,EVENTOUT, -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT, -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT, -PortK,PK0,,TIM1_CH1N,,TIM8_CH3,,SPI5_SCK,,,,,,,,,LCD_G5,EVENTOUT, -PortK,PK1,,TIM1_CH1,,TIM8_CH3N,,SPI5_NSS,,,,,,,,,LCD_G6,EVENTOUT, -PortK,PK2,,TIM1_BKIN,,TIM8_BKIN,,,,,,,TIM8_BKIN_COMP12,TIM1_BKIN_COMP12,,,LCD_G7,EVENTOUT, -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT, -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT, -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT, -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT, -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT, diff --git a/ports/stm32/boards/stm32l476_af.csv b/ports/stm32/boards/stm32l476_af.csv deleted file mode 100644 index 01db895725..0000000000 --- a/ports/stm32/boards/stm32l476_af.csv +++ /dev/null @@ -1,116 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,, -,,SYS_AF,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM,USART1/USART2/USART3,UART4/UART5/LPUART1,CAN1/TSC,OTG_FS/QUADSPI,LCD,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC,COMP -PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC12_IN5, -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS/USART2_DE,UART4_RX,,,LCD_SEG0,,,TIM15_CH1N,EVENTOUT,ADC12_IN6, -PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,,,,LCD_SEG1,,SAI2_EXTCLK,TIM15_CH1,EVENTOUT,ADC12_IN7, -PortA,PA3,,TIM2_CH4,TIM5_CH4,,,,,USART2_RX,,,,LCD_SEG2,,,TIM15_CH2,EVENTOUT,ADC12_IN8, -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC12_IN9, -PortA,PA5,,TIM2_CH1,TIM2_ETR,TIM8_CH1N,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC12_IN10, -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,USART3_CTS,,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN_COMP2,TIM8_BKIN_COMP2,TIM16_CH1,EVENTOUT,ADC12_IN11, -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,,,TIM17_CH1,EVENTOUT,ADC12_IN12, -PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,OTG_FS_SOF,LCD_COM0,,,LPTIM2_OUT,EVENTOUT,, -PortA,PA9,,TIM1_CH2,,,,,,USART1_TX,,,,LCD_COM1,,,TIM15_BKIN,EVENTOUT,, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,LCD_COM2,,,TIM17_BKIN,EVENTOUT,, -PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT,, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS/USART1_DE,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,, -PortA,PA13,JTMS/SWDIO,IR_OUT,,,,,,,,,OTG_FS_NOE,,,,,EVENTOUT,, -PortA,PA14,JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT,, -PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,,SPI1_NSS,SPI3_NSS,,UART4_RTS/UART4_DE,TSC_G3_IO1,,LCD_SEG17,,SAI2_FS_B,,EVENTOUT,, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,USART3_CK,,,QUADSPI_BK1_IO1,LCD_SEG5,COMP1_OUT,,,EVENTOUT,ADC12_IN15, -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM_DATIN0,USART3_RTS/USART3_DE,,,QUADSPI_BK1_IO0,LCD_SEG6,,,LPTIM2_IN1,EVENTOUT,ADC12_IN16,COMP1_INN -PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM_CKIN0,,,,,,,,,EVENTOUT,,COMP1_INP -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS/USART1_DE,,,,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,USART1_CTS,UART5_RTS/UART5_DE,TSC_G2_IO1,,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT,,COMP2_INP -PortB,PB5,,LPTIM1_IN1,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,UART5_CTS,TSC_G2_IO2,,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,, -PortB,PB6,,LPTIM1_ETR,TIM4_CH1,TIM8_BKIN2,I2C1_SCL,,DFSDM_DATIN5,USART1_TX,,TSC_G2_IO3,,,TIM8_BKIN2_COMP2,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP -PortB,PB7,,LPTIM1_IN2,TIM4_CH2,TIM8_BKIN,I2C1_SDA,,DFSDM_CKIN5,USART1_RX,UART4_CTS,TSC_G2_IO4,,LCD_SEG21,FMC_NL,TIM8_BKIN_COMP1,TIM17_CH1N,EVENTOUT,,COMP2_INM -PortB,PB8,,,TIM4_CH3,,I2C1_SCL,,DFSDM_DATIN6,,,CAN1_RX,,LCD_SEG16,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,, -PortB,PB9,,IR_OUT,TIM4_CH4,,I2C1_SDA,SPI2_NSS,DFSDM_CKIN6,,,CAN1_TX,,LCD_COM3,SDMMC1_D5,SAI1_FS_A,TIM17_CH1,EVENTOUT,, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK,DFSDM_DATIN7,USART3_TX,LPUART1_RX,,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM_CKIN7,USART3_RX,LPUART1_TX,,QUADSPI_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT,, -PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM_DATIN1,USART3_CK,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,,LCD_SEG12,SWPMI1_IO,SAI2_FS_A,TIM15_BKIN,EVENTOUT,, -PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,,LCD_SEG13,SWPMI1_TX,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2C2_SDA,SPI2_MISO,DFSDM_DATIN2,USART3_RTS_DE,,TSC_G1_IO3,,LCD_SEG14,SWPMI1_RX,SAI2_MCLK_A,TIM15_CH1,EVENTOUT,, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI,DFSDM_CKIN2,,,TSC_G1_IO4,,LCD_SEG15,SWPMI1_SUSPEND,SAI2_SD_A,TIM15_CH2,EVENTOUT,, -PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,DFSDM_DATIN4,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT,ADC123_IN1, -PortC,PC1,,LPTIM1_OUT,,,I2C3_SDA,,DFSDM_CKIN4,,LPUART1_TX,,,LCD_SEG19,,,,EVENTOUT,ADC123_IN2, -PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM_CKOUT,,,,,LCD_SEG20,,,,EVENTOUT,ADC123_IN3, -PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC123_IN4, -PortC,PC4,,,,,,,,USART3_TX,,,,LCD_SEG22,,,,EVENTOUT,ADC12_IN13,COMP1_INM -PortC,PC5,,,,,,,,USART3_RX,,,,LCD_SEG23,,,,EVENTOUT,ADC12_IN14,COMP1_INP -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,,DFSDM_CKIN3,,,TSC_G4_IO1,,LCD_SEG24,SDMMC1_D6,SAI2_MCLK_A,,EVENTOUT,, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,DFSDM_DATIN3,,,TSC_G4_IO2,,LCD_SEG25,SDMMC1_D7,SAI2_MCLK_B,,EVENTOUT,, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,,TSC_G4_IO3,,LCD_SEG26,SDMMC1_D0,,,EVENTOUT,, -PortC,PC9,,TIM8_BKIN2,TIM3_CH4,TIM8_CH4,,,,,,TSC_G4_IO4,OTG_FS_NOE,LCD_SEG27,SDMMC1_D1,SAI2_EXTCLK,TIM8_BKIN2_COMP1,EVENTOUT,, -PortC,PC10,,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2,SAI2_SCK_B,,EVENTOUT,, -PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3,SAI2_MCLK_B,,EVENTOUT,, -PortC,PC12,,,,,,,SPI3_MOSI,USART3_CK,UART5_TX,TSC_G3_IO4,,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK,SAI2_SD_B,,EVENTOUT,, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,, -PortD,PD0,,,,,,SPI2_NSS,DFSDM_DATIN7,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,, -PortD,PD1,,,,,,SPI2_SCK,DFSDM_CKIN7,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,, -PortD,PD2,,,TIM3_ETR,,,,,USART3_RTS/USART3_DE,UART5_RX,TSC_SYNC,,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD,,,EVENTOUT,, -PortD,PD3,,,,,,SPI2_MISO,DFSDM_DATIN0,USART2_CTS,,,,,FMC_CLK,,,EVENTOUT,, -PortD,PD4,,,,,,SPI2_MOSI,DFSDM_CKIN0,USART2_RTS/USART2_DE,,,,,FMC_NOE,,,EVENTOUT,, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,, -PortD,PD6,,,,,,,DFSDM_DATIN1,USART2_RX,,,,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,, -PortD,PD7,,,,,,,DFSDM_CKIN1,USART2_CK,,,,,FMC_NE1,,,EVENTOUT,, -PortD,PD8,,,,,,,,USART3_TX,,,,LCD_SEG28,FMC_D13,,,EVENTOUT,, -PortD,PD9,,,,,,,,USART3_RX,,,,LCD_SEG29,FMC_D14,SAI2_MCLK_A,,EVENTOUT,, -PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,LCD_SEG30,FMC_D15,SAI2_SCK_A,,EVENTOUT,, -PortD,PD11,,,,,,,,USART3_CTS,,TSC_G6_IO2,,LCD_SEG31,FMC_A16,SAI2_SD_A,LPTIM2_ETR,EVENTOUT,, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS/USART3_DE,,TSC_G6_IO3,,LCD_SEG32,FMC_A17,SAI2_FS_A,LPTIM2_IN1,EVENTOUT,, -PortD,PD13,,,TIM4_CH2,,,,,,,TSC_G6_IO4,,LCD_SEG33,FMC_A18,,LPTIM2_OUT,EVENTOUT,, -PortD,PD14,,,TIM4_CH3,,,,,,,,,LCD_SEG34,FMC_D0,,,EVENTOUT,, -PortD,PD15,,,TIM4_CH4,,,,,,,,,LCD_SEG35,FMC_D1,,,EVENTOUT,, -PortE,PE0,,,TIM4_ETR,,,,,,,,,LCD_SEG36,FMC_NBL0,,TIM16_CH1,EVENTOUT,, -PortE,PE1,,,,,,,,,,,,LCD_SEG37,FMC_NBL1,,TIM17_CH1,EVENTOUT,, -PortE,PE2,TRACECLK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,LCD_SEG38,FMC_A23,SAI1_MCLK_A,,EVENTOUT,, -PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,LCD_SEG39,FMC_A19,SAI1_SD_B,,EVENTOUT,, -PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM_DATIN3,,,TSC_G7_IO3,,,FMC_A20,SAI1_FS_A,,EVENTOUT,, -PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM_CKIN3,,,TSC_G7_IO4,,,FMC_A21,SAI1_SCK_A,,EVENTOUT,, -PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,,,FMC_A22,SAI1_SD_A,,EVENTOUT,, -PortE,PE7,,TIM1_ETR,,,,,DFSDM_DATIN2,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,, -PortE,PE8,,TIM1_CH1N,,,,,DFSDM_CKIN2,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,, -PortE,PE9,,TIM1_CH1,,,,,DFSDM_CKOUT,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,, -PortE,PE10,,TIM1_CH2N,,,,,DFSDM_DATIN4,,,TSC_G5_IO1,QUADSPI_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,, -PortE,PE11,,TIM1_CH2,,,,,DFSDM_CKIN4,,,TSC_G5_IO2,QUADSPI_NCS,,FMC_D8,,,EVENTOUT,, -PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,DFSDM_DATIN5,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,FMC_D9,,,EVENTOUT,, -PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,DFSDM_CKIN5,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,FMC_D10,,,EVENTOUT,, -PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,FMC_D11,,,EVENTOUT,, -PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,FMC_D12,,,EVENTOUT,, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN6, -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN7, -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN8, -PortF,PF6,,TIM5_ETR,TIM5_CH1,,,,,,,,,,,SAI1_SD_B,,EVENTOUT,ADC3_IN9, -PortF,PF7,,,TIM5_CH2,,,,,,,,,,,SAI1_MCLK_B,,EVENTOUT,ADC3_IN10, -PortF,PF8,,,TIM5_CH3,,,,,,,,,,,SAI1_SCK_B,,EVENTOUT,ADC3_IN11, -PortF,PF9,,,TIM5_CH4,,,,,,,,,,,SAI1_FS_B,TIM15_CH1,EVENTOUT,ADC3_IN12, -PortF,PF10,,,,,,,,,,,,,,,TIM15_CH2,EVENTOUT,ADC3_IN13, -PortF,PF11,,,,,,,,,,,,,,,,EVENTOUT,, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,, -PortF,PF13,,,,,,,DFSDM_DATIN6,,,,,,FMC_A7,,,EVENTOUT,, -PortF,PF14,,,,,,,DFSDM_CKIN6,,,TSC_G8_IO1,,,FMC_A8,,,EVENTOUT,, -PortF,PF15,,,,,,,,,,TSC_G8_IO2,,,FMC_A9,,,EVENTOUT,, -PortG,PG0,,,,,,,,,,TSC_G8_IO3,,,FMC_A10,,,EVENTOUT,, -PortG,PG1,,,,,,,,,,TSC_G8_IO4,,,FMC_A11,,,EVENTOUT,, -PortG,PG2,,,,,,SPI1_SCK,,,,,,,FMC_A12,SAI2_SCK_B,,EVENTOUT,, -PortG,PG3,,,,,,SPI1_MISO,,,,,,,FMC_A13,SAI2_FS_B,,EVENTOUT,, -PortG,PG4,,,,,,SPI1_MOSI,,,,,,,FMC_A14,SAI2_MCLK_B,,EVENTOUT,, -PortG,PG5,,,,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,SAI2_SD_B,,EVENTOUT,, -PortG,PG6,,,,,I2C3_SMBA,,,,LPUART1_RTS/LPUART1_DE,,,,,,,EVENTOUT,, -PortG,PG7,,,,,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT3,,,EVENTOUT,, -PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,,,,EVENTOUT,, -PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE3/FMC_NE2,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,, -PortG,PG10,,LPTIM1_IN1,,,,,SPI3_MISO,USART1_RX,,,,,FMC_NE3,SAI2_FS_A,TIM15_CH1,EVENTOUT,, -PortG,PG11,,LPTIM1_IN2,,,,,SPI3_MOSI,USART1_CTS,,,,,,SAI2_MCLK_A,TIM15_CH2,EVENTOUT,, -PortG,PG12,,LPTIM1_ETR,,,,,SPI3_NSS,USART1_RTS/USART1_DE,,,,,FMC_NE4,SAI2_SD_A,,EVENTOUT,, -PortG,PG13,,,,,I2C1_SDA,,,USART1_CK,,,,,FMC_A24,,,EVENTOUT,, -PortG,PG14,,,,,I2C1_SCL,,,,,,,,FMC_A25,,,EVENTOUT,, -PortG,PG15,,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,,,,EVENTOUT,, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,, diff --git a/ports/stm32/boards/stm32l476xe.ld b/ports/stm32/boards/stm32l476xe.ld deleted file mode 100644 index 22c4466c66..0000000000 --- a/ports/stm32/boards/stm32l476xe.ld +++ /dev/null @@ -1,35 +0,0 @@ -/* - GNU linker script for STM32L476XE -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */ - FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 368K /* sectors 8-191 */ - FLASH_FS (r) : ORIGIN = 0x08060000, LENGTH = 128K /* sectors 192-255 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K - SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K - FS_CACHE(xrw) : ORIGIN = 0x10007800, LENGTH = 2K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_fs_cache_start = ORIGIN(FS_CACHE); -_ram_fs_cache_block_size = LENGTH(FS_CACHE); -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ - -_flash_fs_start = ORIGIN(FLASH_FS); -_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); diff --git a/ports/stm32/boards/stm32l476xg.ld b/ports/stm32/boards/stm32l476xg.ld deleted file mode 100644 index 40d679ac39..0000000000 --- a/ports/stm32/boards/stm32l476xg.ld +++ /dev/null @@ -1,35 +0,0 @@ -/* - GNU linker script for STM32L476XG -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */ - FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 496K /* sectors 8-255 */ - FLASH_FS (r) : ORIGIN = 0x08080000, LENGTH = 512K /* sectors 256-511 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K - SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K - FS_CACHE(xrw) : ORIGIN = 0x10007800, LENGTH = 2K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_fs_cache_start = ORIGIN(FS_CACHE); -_ram_fs_cache_block_size = LENGTH(FS_CACHE); -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ - -_flash_fs_start = ORIGIN(FLASH_FS); -_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); diff --git a/ports/stm32/boards/stm32l496_af.csv b/ports/stm32/boards/stm32l496_af.csv deleted file mode 100644 index 311770a055..0000000000 --- a/ports/stm32/boards/stm32l496_af.csv +++ /dev/null @@ -1,142 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,,, -,,SYS_AF,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM,USART1/USART2/USART3,UART4/UART5/LPUART1,CAN1/TSC,OTG_FS/QUADSPI,LCD,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC,COMP,DAC -PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC12_IN5,, -PortA,PA1,,TIM2_CH2,TIM5_CH2,,I2C1_SMBA,SPI1_SCK,,USART2_RTS/USART2_DE,UART4_RX,,,LCD_SEG0,,,TIM15_CH1N,EVENTOUT,ADC12_IN6,, -PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,LPUART1_TX,,QUADSPI_BK1_NCS,LCD_SEG1,,SAI2_EXTCLK,TIM15_CH1,EVENTOUT,ADC12_IN7,, -PortA,PA3,,TIM2_CH4,TIM5_CH4,,,,,USART2_RX,LPUART1_RX,,QUADSPI_CLK,LCD_SEG2,,SAI1_MCLK_A,TIM15_CH2,EVENTOUT,ADC12_IN8,, -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,DCMI_HSYNC,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC12_IN9,,DAC1_OUT1 -PortA,PA5,,TIM2_CH1,TIM2_ETR,TIM8_CH1N,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC12_IN10,,DAC1_OUT2 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,DCMI_PIXCLK,SPI1_MISO,,USART3_CTS,LPUART1_CTS,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN_COMP2,TIM8_BKIN_COMP2,TIM16_CH1,EVENTOUT,ADC12_IN11,, -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,I2C3_SCL,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,,,TIM17_CH1,EVENTOUT,ADC12_IN12,, -PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,OTG_FS_SOF,LCD_COM0,SWPMI1_IO,SAI1_SCK_A,LPTIM2_OUT,EVENTOUT,,, -PortA,PA9,,TIM1_CH2,,SPI2_SCK,I2C1_SCL,DCMI_D0,,USART1_TX,,,,LCD_COM1,,SAI1_FS_A,TIM15_BKIN,EVENTOUT,,, -PortA,PA10,,TIM1_CH3,,,I2C1_SDA,DCMI_D1,,USART1_RX,,,OTG_FS_ID,LCD_COM2,,SAI1_SD_A,TIM17_BKIN,EVENTOUT,,, -PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,SPI1_MISO,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT,,, -PortA,PA12,,TIM1_ETR,,,,SPI1_MOSI,,USART1_RTS/USART1_DE,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,,, -PortA,PA13,JTMS/SWDIO,IR_OUT,,,,,,,,,OTG_FS_NOE,,SWPMI1_TX,SAI1_SD_B,,EVENTOUT,,, -PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,I2C4_SMBA,,,,,OTG_FS_SOF,,SWPMI1_RX,SAI1_FS_B,,EVENTOUT,,, -PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,USART2_RX,,SPI1_NSS,SPI3_NSS,USART3_RTS/USART3_DE,UART4_RTS/UART4_DE,TSC_G3_IO1,,LCD_SEG17,SWPMI1_SUSPEND,SAI2_FS_B,,EVENTOUT,,, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,SPI1_NSS,,USART3_CK,,,QUADSPI_BK1_IO1,LCD_SEG5,COMP1_OUT,SAI1_EXTCLK,,EVENTOUT,ADC12_IN15,, -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATIN0,USART3_RTS/USART3_DE,LPUART1_RTS/LPUART1_DE,,QUADSPI_BK1_IO0,LCD_SEG6,,,LPTIM2_IN1,EVENTOUT,ADC12_IN16,COMP1_INM, -PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM1_CKIN0,,,,,LCD_VLCD,,,,EVENTOUT,,COMP1_INP, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS/USART1_DE,,,OTG_FS_CRS_SYNC,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM, -PortB,PB4,NJTRST,,TIM3_CH1,,I2C3_SDA,SPI1_MISO,SPI3_MISO,USART1_CTS,UART5_RTS/UART5_DE,TSC_G2_IO1,DCMI_D12,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT,,COMP2_INP, -PortB,PB5,,LPTIM1_IN1,TIM3_CH2,CAN2_RX,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,UART5_CTS,TSC_G2_IO2,DCMI_D10,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,,, -PortB,PB6,,LPTIM1_ETR,TIM4_CH1,TIM8_BKIN2,I2C1_SCL,I2C4_SCL,DFSDM1_DATIN5,USART1_TX,CAN2_TX,TSC_G2_IO3,DCMI_D5,,TIM8_BKIN2_COMP2,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP, -PortB,PB7,,LPTIM1_IN2,TIM4_CH2,TIM8_BKIN,I2C1_SDA,I2C4_SDA,DFSDM1_CKIN5,USART1_RX,UART4_CTS,TSC_G2_IO4,DCMI_VSYNC,LCD_SEG21,FMC_NL,TIM8_BKIN_COMP1,TIM17_CH1N,EVENTOUT,,COMP2_INM, -PortB,PB8,,,TIM4_CH3,,I2C1_SCL,,DFSDM1_DATIN6,,,CAN1_RX,DCMI_D6,LCD_SEG16,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,,, -PortB,PB9,,IR_OUT,TIM4_CH4,,I2C1_SDA,SPI2_NSS,DFSDM1_CKIN6,,,CAN1_TX,DCMI_D7,LCD_COM3,SDMMC1_D5,SAI1_FS_A,TIM17_CH1,EVENTOUT,,, -PortB,PB10,,TIM2_CH3,,I2C4_SCL,I2C2_SCL,SPI2_SCK,DFSDM1_DATIN7,USART3_TX,LPUART1_RX,TSC_SYNC,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,,, -PortB,PB11,,TIM2_CH4,,I2C4_SDA,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,LPUART1_TX,,QUADSPI_BK1_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT,,, -PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM1_DATIN1,USART3_CK,LPUART1_RTS/LPUART1_DE,TSC_G1_IO1,CAN2_RX,LCD_SEG12,SWPMI1_IO,SAI2_FS_A,TIM15_BKIN,EVENTOUT,,, -PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM1_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,CAN2_TX,LCD_SEG13,SWPMI1_TX,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,,, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2C2_SDA,SPI2_MISO,DFSDM1_DATIN2,USART3_RTS/USART3_DE,,TSC_G1_IO3,,LCD_SEG14,SWPMI1_RX,SAI2_MCLK_A,TIM15_CH1,EVENTOUT,,, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI,DFSDM1_CKIN2,,,TSC_G1_IO4,,LCD_SEG15,SWPMI1_SUSPEND,SAI2_SD_A,TIM15_CH2,EVENTOUT,,, -PortC,PC0,,LPTIM1_IN1,I2C4_SCL,,I2C3_SCL,,DFSDM1_DATIN4,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT,ADC123_IN1,, -PortC,PC1,TRACED0,LPTIM1_OUT,I2C4_SDA,SPI2_MOSI,I2C3_SDA,,DFSDM1_CKIN4,,LPUART1_TX,,QUADSPI_BK2_IO0,LCD_SEG19,,SAI1_SD_A,,EVENTOUT,ADC123_IN2,, -PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM1_CKOUT,,,,QUADSPI_BK2_IO1,LCD_SEG20,,,,EVENTOUT,ADC123_IN3,, -PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,QUADSPI_BK2_IO2,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC123_IN4,, -PortC,PC4,,,,,,,,USART3_TX,,,QUADSPI_BK2_IO3,LCD_SEG22,,,,EVENTOUT,ADC12_IN13,COMP1_INM, -PortC,PC5,,,,,,,,USART3_RX,,,,LCD_SEG23,,,,EVENTOUT,ADC12_IN14,COMP1_INP, -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,,DFSDM1_CKIN3,,,TSC_G4_IO1,DCMI_D0,LCD_SEG24,SDMMC1_D6,SAI2_MCLK_A,,EVENTOUT,,, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,DFSDM1_DATIN3,,,TSC_G4_IO2,DCMI_D1,LCD_SEG25,SDMMC1_D7,SAI2_MCLK_B,,EVENTOUT,,, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,,TSC_G4_IO3,DCMI_D2,LCD_SEG26,SDMMC1_D0,,,EVENTOUT,,, -PortC,PC9,,TIM8_BKIN2,TIM3_CH4,TIM8_CH4,DCMI_D3,,I2C3_SDA,,,TSC_G4_IO4,OTG_FS_NOE,LCD_SEG27,SDMMC1_D1,SAI2_EXTCLK,TIM8_BKIN2_COMP1,EVENTOUT,,, -PortC,PC10,TRACED1,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,DCMI_D8,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2,SAI2_SCK_B,,EVENTOUT,,, -PortC,PC11,,,,,,QUADSPI_BK2_NCS,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,DCMI_D4,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3,SAI2_MCLK_B,,EVENTOUT,,, -PortC,PC12,TRACED3,,,,,,SPI3_MOSI,USART3_CK,UART5_TX,TSC_G3_IO4,DCMI_D9,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK,SAI2_SD_B,,EVENTOUT,,, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,,, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,, -PortD,PD0,,,,,,SPI2_NSS,DFSDM1_DATIN7,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,,, -PortD,PD1,,,,,,SPI2_SCK,DFSDM1_CKIN7,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,,, -PortD,PD2,TRACED2,,TIM3_ETR,,,,,USART3_RTS/USART3_DE,UART5_RX,TSC_SYNC,DCMI_D11,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD,,,EVENTOUT,,, -PortD,PD3,,,,SPI2_SCK,DCMI_D5,SPI2_MISO,DFSDM1_DATIN0,USART2_CTS,,,QUADSPI_BK2_NCS,,FMC_CLK,,,EVENTOUT,,, -PortD,PD4,,,,,,SPI2_MOSI,DFSDM1_CKIN0,USART2_RTS/USART2_DE,,,QUADSPI_BK2_IO0,,FMC_NOE,,,EVENTOUT,,, -PortD,PD5,,,,,,,,USART2_TX,,,QUADSPI_BK2_IO1,,FMC_NWE,,,EVENTOUT,,, -PortD,PD6,,,,,DCMI_D10,QUADSPI_BK2_IO1,DFSDM1_DATIN1,USART2_RX,,,QUADSPI_BK2_IO2,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,,, -PortD,PD7,,,,,,,DFSDM1_CKIN1,USART2_CK,,,QUADSPI_BK2_IO3,,FMC_NE1,,,EVENTOUT,,, -PortD,PD8,,,,,,,,USART3_TX,,,DCMI_HSYNC,LCD_SEG28,FMC_D13,,,EVENTOUT,,, -PortD,PD9,,,,,,,,USART3_RX,,,DCMI_PIXCLK,LCD_SEG29,FMC_D14,SAI2_MCLK_A,,EVENTOUT,,, -PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,LCD_SEG30,FMC_D15,SAI2_SCK_A,,EVENTOUT,,, -PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,TSC_G6_IO2,,LCD_SEG31,FMC_A16,SAI2_SD_A,LPTIM2_ETR,EVENTOUT,,, -PortD,PD12,,,TIM4_CH1,,I2C4_SCL,,,USART3_RTS/USART3_DE,,TSC_G6_IO3,,LCD_SEG32,FMC_A17,SAI2_FS_A,LPTIM2_IN1,EVENTOUT,,, -PortD,PD13,,,TIM4_CH2,,I2C4_SDA,,,,,TSC_G6_IO4,,LCD_SEG33,FMC_A18,,LPTIM2_OUT,EVENTOUT,,, -PortD,PD14,,,TIM4_CH3,,,,,,,,,LCD_SEG34,FMC_D0,,,EVENTOUT,,, -PortD,PD15,,,TIM4_CH4,,,,,,,,,LCD_SEG35,FMC_D1,,,EVENTOUT,,, -PortE,PE0,,,TIM4_ETR,,,,,,,,DCMI_D2,LCD_SEG36,FMC_NBL0,,TIM16_CH1,EVENTOUT,,, -PortE,PE1,,,,,,,,,,,DCMI_D3,LCD_SEG37,FMC_NBL1,,TIM17_CH1,EVENTOUT,,, -PortE,PE2,TRACECLK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,LCD_SEG38,FMC_A23,SAI1_MCLK_A,,EVENTOUT,,, -PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,LCD_SEG39,FMC_A19,SAI1_SD_B,,EVENTOUT,,, -PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM1_DATIN3,,,TSC_G7_IO3,DCMI_D4,,FMC_A20,SAI1_FS_A,,EVENTOUT,,, -PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM1_CKIN3,,,TSC_G7_IO4,DCMI_D6,,FMC_A21,SAI1_SCK_A,,EVENTOUT,,, -PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,DCMI_D7,,FMC_A22,SAI1_SD_A,,EVENTOUT,,, -PortE,PE7,,TIM1_ETR,,,,,DFSDM1_DATIN2,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,,, -PortE,PE8,,TIM1_CH1N,,,,,DFSDM1_CKIN2,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,,, -PortE,PE9,,TIM1_CH1,,,,,DFSDM1_CKOUT,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,,, -PortE,PE10,,TIM1_CH2N,,,,,DFSDM1_DATIN4,,,TSC_G5_IO1,QUADSPI_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,,, -PortE,PE11,,TIM1_CH2,,,,,DFSDM1_CKIN4,,,TSC_G5_IO2,QUADSPI_BK1_NCS,,FMC_D8,,,EVENTOUT,,, -PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,DFSDM1_DATIN5,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,FMC_D9,,,EVENTOUT,,, -PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,DFSDM1_CKIN5,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,FMC_D10,,,EVENTOUT,,, -PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,FMC_D11,,,EVENTOUT,,, -PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,FMC_D12,,,EVENTOUT,,, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,,, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,,, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,,, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN6,, -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN7,, -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN8,, -PortF,PF6,,TIM5_ETR,TIM5_CH1,,,,,,,,QUADSPI_BK1_IO3,,,SAI1_SD_B,,EVENTOUT,ADC3_IN9,, -PortF,PF7,,,TIM5_CH2,,,,,,,,QUADSPI_BK1_IO2,,,SAI1_MCLK_B,,EVENTOUT,ADC3_IN10,, -PortF,PF8,,,TIM5_CH3,,,,,,,,QUADSPI_BK1_IO0,,,SAI1_SCK_B,,EVENTOUT,ADC3_IN11,, -PortF,PF9,,,TIM5_CH4,,,,,,,,QUADSPI_BK1_IO1,,,SAI1_FS_B,TIM15_CH1,EVENTOUT,ADC3_IN12,, -PortF,PF10,,,,QUADSPI_CLK,,,,,,,DCMI_D11,,,,TIM15_CH2,EVENTOUT,ADC3_IN13,, -PortF,PF11,,,,,,,,,,,DCMI_D12,,,,,EVENTOUT,,, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,,, -PortF,PF13,,,,,I2C4_SMBA,,DFSDM1_DATIN6,,,,,,FMC_A7,,,EVENTOUT,,, -PortF,PF14,,,,,I2C4_SCL,,DFSDM1_CKIN6,,,TSC_G8_IO1,,,FMC_A8,,,EVENTOUT,,, -PortF,PF15,,,,,I2C4_SDA,,,,,TSC_G8_IO2,,,FMC_A9,,,EVENTOUT,,, -PortG,PG0,,,,,,,,,,TSC_G8_IO3,,,FMC_A10,,,EVENTOUT,,, -PortG,PG1,,,,,,,,,,TSC_G8_IO4,,,FMC_A11,,,EVENTOUT,,, -PortG,PG2,,,,,,SPI1_SCK,,,,,,,FMC_A12,SAI2_SCK_B,,EVENTOUT,,, -PortG,PG3,,,,,,SPI1_MISO,,,,,,,FMC_A13,SAI2_FS_B,,EVENTOUT,,, -PortG,PG4,,,,,,SPI1_MOSI,,,,,,,FMC_A14,SAI2_MCLK_B,,EVENTOUT,,, -PortG,PG5,,,,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,SAI2_SD_B,,EVENTOUT,,, -PortG,PG6,,,,,I2C3_SMBA,,,,LPUART1_RTS/LPUART1_DE,,,,,,,EVENTOUT,,, -PortG,PG7,,,,,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT,SAI1_MCLK_A,,EVENTOUT,,, -PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,,,,EVENTOUT,,, -PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE/FMC_NE2,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,,, -PortG,PG10,,LPTIM1_IN1,,,,,SPI3_MISO,USART1_RX,,,,,FMC_NE3,SAI2_FS_A,TIM15_CH1,EVENTOUT,,, -PortG,PG11,,LPTIM1_IN2,,,,,SPI3_MOSI,USART1_CTS,,,,,,SAI2_MCLK_A,TIM15_CH2,EVENTOUT,,, -PortG,PG12,,LPTIM1_ETR,,,,,SPI3_NSS,USART1_RTS/USART1_DE,,,,,FMC_NE4,SAI2_SD_A,,EVENTOUT,,, -PortG,PG13,,,,,I2C1_SDA,,,USART1_CK,,,,,FMC_A24,,,EVENTOUT,,, -PortG,PG14,,,,,I2C1_SCL,,,,,,,,FMC_A25,,,EVENTOUT,,, -PortG,PG15,,LPTIM1_OUT,,,I2C1_SMBA,,,,,,DCMI_D13,,,,,EVENTOUT,,, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,,, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,,, -PortH,PH2,,,,QUADSPI_BK2_IO0,,,,,,,,,,,,EVENTOUT,,, -PortH,PH3,,,,,,,,,,,,,,,,EVENTOUT,,, -PortH,PH4,,,,,I2C2_SCL,,,,,,,,,,,EVENTOUT,,, -PortH,PH5,,,,,I2C2_SDA,,,,,,DCMI_PIXCLK,,,,,EVENTOUT,,, -PortH,PH6,,,,,I2C2_SMBA,,,,,,DCMI_D8,,,,,EVENTOUT,,, -PortH,PH7,,,,,I2C3_SCL,,,,,,DCMI_D9,,,,,EVENTOUT,,, -PortH,PH8,,,,,I2C3_SDA,,,,,,DCMI_HSYNC,,,,,EVENTOUT,,, -PortH,PH9,,,,,I2C3_SMBA,,,,,,DCMI_D0,,,,,EVENTOUT,,, -PortH,PH10,,,TIM5_CH1,,,,,,,,DCMI_D1,,,,,EVENTOUT,,, -PortH,PH11,,,TIM5_CH2,,,,,,,,DCMI_D2,,,,,EVENTOUT,,, -PortH,PH12,,,TIM5_CH3,,,,,,,,DCMI_D3,,,,,EVENTOUT,,, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,,,,EVENTOUT,,, -PortH,PH14,,,,TIM8_CH2N,,,,,,,DCMI_D4,,,,,EVENTOUT,,, -PortH,PH15,,,,TIM8_CH3N,,,,,,,DCMI_D11,,,,,EVENTOUT,,, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS,,,,,DCMI_D13,,,,,EVENTOUT,,, -PortI,PI1,,,,,,SPI2_SCK,,,,,DCMI_D8,,,,,EVENTOUT,,, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,DCMI_D9,,,,,EVENTOUT,,, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI,,,,,DCMI_D10,,,,,EVENTOUT,,, -PortI,PI4,,,,TIM8_BKIN,,,,,,,DCMI_D5,,,,,EVENTOUT,,, -PortI,PI5,,,,TIM8_CH1,,,,,,,DCMI_VSYNC,,,,,EVENTOUT,,, -PortI,PI6,,,,TIM8_CH2,,,,,,,DCMI_D6,,,,,EVENTOUT,,, -PortI,PI7,,,,TIM8_CH3,,,,,,,DCMI_D7,,,,,EVENTOUT,,, -PortI,PI8,,,,,,,,,,,DCMI_D12,,,,,EVENTOUT,,, -PortI,PI9,,,,,,,,,,CAN1_RX,,,,,,EVENTOUT,,, -PortI,PI10,,,,,,,,,,,,,,,,EVENTOUT,,, -PortI,PI11,,,,,,,,,,,,,,,,EVENTOUT,,, diff --git a/ports/stm32/boards/stm32l496xg.ld b/ports/stm32/boards/stm32l496xg.ld deleted file mode 100644 index 88221170b4..0000000000 --- a/ports/stm32/boards/stm32l496xg.ld +++ /dev/null @@ -1,35 +0,0 @@ -/* - GNU linker script for STM32L496XG -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */ - FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 596K /* sectors 8-305 */ - FLASH_FS (r) : ORIGIN = 0x08099000, LENGTH = 412K /* sectors 306-511 412 KiB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K - SRAM2 (xrw) : ORIGIN = 0x20040000, LENGTH = 62K /* leave 2K for flash fs cache */ - FS_CACHE(xrw) : ORIGIN = 0x2004f800, LENGTH = 2K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM) + LENGTH(SRAM2); - -/* RAM extents for the garbage collector */ -_ram_fs_cache_start = ORIGIN(FS_CACHE); -_ram_fs_cache_block_size = LENGTH(FS_CACHE); -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM) + LENGTH(SRAM2); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001C000; /* tunable */ - -_flash_fs_start = ORIGIN(FLASH_FS); -_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); diff --git a/ports/stm32/bufhelper.c b/ports/stm32/bufhelper.c deleted file mode 100644 index 79511969b7..0000000000 --- a/ports/stm32/bufhelper.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "bufhelper.h" - -void pyb_buf_get_for_send(mp_obj_t o, mp_buffer_info_t *bufinfo, byte *tmp_data) { - if (MP_OBJ_IS_INT(o)) { - tmp_data[0] = mp_obj_get_int(o); - bufinfo->buf = tmp_data; - bufinfo->len = 1; - bufinfo->typecode = 'B'; - } else { - mp_get_buffer_raise(o, bufinfo, MP_BUFFER_READ); - } -} - -mp_obj_t pyb_buf_get_for_recv(mp_obj_t o, vstr_t *vstr) { - if (MP_OBJ_IS_INT(o)) { - // allocate a new bytearray of given length - vstr_init_len(vstr, mp_obj_get_int(o)); - return MP_OBJ_NULL; - } else { - // get the existing buffer - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(o, &bufinfo, MP_BUFFER_WRITE); - vstr->buf = bufinfo.buf; - vstr->len = bufinfo.len; - return o; - } -} diff --git a/ports/stm32/bufhelper.h b/ports/stm32/bufhelper.h deleted file mode 100644 index 12c79c2fda..0000000000 --- a/ports/stm32/bufhelper.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_BUFHELPER_H -#define MICROPY_INCLUDED_STM32_BUFHELPER_H - -void pyb_buf_get_for_send(mp_obj_t o, mp_buffer_info_t *bufinfo, byte *tmp_data); -mp_obj_t pyb_buf_get_for_recv(mp_obj_t o, vstr_t *vstr); - -#endif // MICROPY_INCLUDED_STM32_BUFHELPER_H diff --git a/ports/stm32/can.c b/ports/stm32/can.c deleted file mode 100644 index 7680b0de42..0000000000 --- a/ports/stm32/can.c +++ /dev/null @@ -1,1093 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objtuple.h" -#include "py/objarray.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "py/binary.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "bufhelper.h" -#include "can.h" -#include "irq.h" - -#if MICROPY_HW_ENABLE_CAN - -#define MASK16 (0) -#define LIST16 (1) -#define MASK32 (2) -#define LIST32 (3) - -enum { - CAN_STATE_STOPPED, - CAN_STATE_ERROR_ACTIVE, - CAN_STATE_ERROR_WARNING, - CAN_STATE_ERROR_PASSIVE, - CAN_STATE_BUS_OFF, -}; - -/// \moduleref pyb -/// \class CAN - controller area network communication bus -/// -/// CAN implements the standard CAN communications protocol. At -/// the physical level it consists of 2 lines: RX and TX. Note that -/// to connect the pyboard to a CAN bus you must use a CAN transceiver -/// to convert the CAN logic signals from the pyboard to the correct -/// voltage levels on the bus. -/// -/// Note that this driver does not yet support filter configuration -/// (it defaults to a single filter that lets through all messages), -/// or bus timing configuration (except for setting the prescaler). -/// -/// Example usage (works without anything connected): -/// -/// from pyb import CAN -/// can = pyb.CAN(1, pyb.CAN.LOOPBACK) -/// can.send('message!', 123) # send message with id 123 -/// can.recv(0) # receive message on FIFO 0 - -typedef enum _rx_state_t { - RX_STATE_FIFO_EMPTY = 0, - RX_STATE_MESSAGE_PENDING, - RX_STATE_FIFO_FULL, - RX_STATE_FIFO_OVERFLOW, -} rx_state_t; - -typedef struct _pyb_can_obj_t { - mp_obj_base_t base; - mp_obj_t rxcallback0; - mp_obj_t rxcallback1; - mp_uint_t can_id : 8; - bool is_enabled : 1; - bool extframe : 1; - byte rx_state0; - byte rx_state1; - uint16_t num_error_warning; - uint16_t num_error_passive; - uint16_t num_bus_off; - CAN_HandleTypeDef can; -} pyb_can_obj_t; - -STATIC mp_obj_t pyb_can_deinit(mp_obj_t self_in); - -STATIC uint8_t can2_start_bank = 14; - -// assumes Init parameters have been set up correctly -STATIC bool can_init(pyb_can_obj_t *can_obj) { - CAN_TypeDef *CANx = NULL; - uint32_t sce_irq = 0; - const pin_obj_t *pins[2]; - - switch (can_obj->can_id) { - #if defined(MICROPY_HW_CAN1_TX) - case PYB_CAN_1: - CANx = CAN1; - sce_irq = CAN1_SCE_IRQn; - pins[0] = MICROPY_HW_CAN1_TX; - pins[1] = MICROPY_HW_CAN1_RX; - __CAN1_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_CAN2_TX) - case PYB_CAN_2: - CANx = CAN2; - sce_irq = CAN2_SCE_IRQn; - pins[0] = MICROPY_HW_CAN2_TX; - pins[1] = MICROPY_HW_CAN2_RX; - __CAN1_CLK_ENABLE(); // CAN2 is a "slave" and needs CAN1 enabled as well - __CAN2_CLK_ENABLE(); - break; - #endif - - default: - return false; - } - - // init GPIO - uint32_t mode = MP_HAL_PIN_MODE_ALT; - uint32_t pull = MP_HAL_PIN_PULL_UP; - for (int i = 0; i < 2; i++) { - if (!mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_CAN, can_obj->can_id)) { - return false; - } - } - - // init CANx - can_obj->can.Instance = CANx; - HAL_CAN_Init(&can_obj->can); - - can_obj->is_enabled = true; - can_obj->num_error_warning = 0; - can_obj->num_error_passive = 0; - can_obj->num_bus_off = 0; - - __HAL_CAN_ENABLE_IT(&can_obj->can, CAN_IT_ERR | CAN_IT_BOF | CAN_IT_EPV | CAN_IT_EWG); - - NVIC_SetPriority(sce_irq, IRQ_PRI_CAN); - HAL_NVIC_EnableIRQ(sce_irq); - - return true; -} - -void can_init0(void) { - for (uint i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) { - MP_STATE_PORT(pyb_can_obj_all)[i] = NULL; - } -} - -void can_deinit(void) { - for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) { - pyb_can_obj_t *can_obj = MP_STATE_PORT(pyb_can_obj_all)[i]; - if (can_obj != NULL) { - pyb_can_deinit(can_obj); - } - } -} - -STATIC void can_clearfilter(uint32_t f) { - CAN_FilterConfTypeDef filter; - - filter.FilterIdHigh = 0; - filter.FilterIdLow = 0; - filter.FilterMaskIdHigh = 0; - filter.FilterMaskIdLow = 0; - filter.FilterFIFOAssignment = CAN_FILTER_FIFO0; - filter.FilterNumber = f; - filter.FilterMode = CAN_FILTERMODE_IDMASK; - filter.FilterScale = CAN_FILTERSCALE_16BIT; - filter.FilterActivation = DISABLE; - filter.BankNumber = can2_start_bank; - - HAL_CAN_ConfigFilter(NULL, &filter); -} - -STATIC int can_receive(CAN_TypeDef *can, int fifo, CanRxMsgTypeDef *msg, uint32_t timeout_ms) { - volatile uint32_t *rfr; - if (fifo == CAN_FIFO0) { - rfr = &can->RF0R; - } else { - rfr = &can->RF1R; - } - - // Wait for a message to become available, with timeout - uint32_t start = HAL_GetTick(); - while ((*rfr & 3) == 0) { - MICROPY_EVENT_POLL_HOOK - if (HAL_GetTick() - start >= timeout_ms) { - return -MP_ETIMEDOUT; - } - } - - // Read message data - CAN_FIFOMailBox_TypeDef *box = &can->sFIFOMailBox[fifo]; - msg->IDE = box->RIR & 4; - if (msg->IDE == CAN_ID_STD) { - msg->StdId = box->RIR >> 21; - } else { - msg->ExtId = box->RIR >> 3; - } - msg->RTR = box->RIR & 2; - msg->DLC = box->RDTR & 0xf; - msg->FMI = box->RDTR >> 8 & 0xff; - uint32_t rdlr = box->RDLR; - msg->Data[0] = rdlr; - msg->Data[1] = rdlr >> 8; - msg->Data[2] = rdlr >> 16; - msg->Data[3] = rdlr >> 24; - uint32_t rdhr = box->RDHR; - msg->Data[4] = rdhr; - msg->Data[5] = rdhr >> 8; - msg->Data[6] = rdhr >> 16; - msg->Data[7] = rdhr >> 24; - - // Release (free) message from FIFO - *rfr |= CAN_RF0R_RFOM0; - - return 0; // success -} - -// We have our own version of CAN transmit so we can handle Timeout=0 correctly. -STATIC HAL_StatusTypeDef CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout) { - uint32_t transmitmailbox; - uint32_t tickstart; - uint32_t rqcpflag; - uint32_t txokflag; - - // Check the parameters - assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE)); - assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR)); - assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC)); - - // Select one empty transmit mailbox - if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) { - transmitmailbox = CAN_TXMAILBOX_0; - rqcpflag = CAN_FLAG_RQCP0; - txokflag = CAN_FLAG_TXOK0; - } else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) { - transmitmailbox = CAN_TXMAILBOX_1; - rqcpflag = CAN_FLAG_RQCP1; - txokflag = CAN_FLAG_TXOK1; - } else if ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) { - transmitmailbox = CAN_TXMAILBOX_2; - rqcpflag = CAN_FLAG_RQCP2; - txokflag = CAN_FLAG_TXOK2; - } else { - transmitmailbox = CAN_TXSTATUS_NOMAILBOX; - } - - if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) { - // Set up the Id - hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ; - if (hcan->pTxMsg->IDE == CAN_ID_STD) { - assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \ - hcan->pTxMsg->RTR); - } else { - assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \ - hcan->pTxMsg->IDE | \ - hcan->pTxMsg->RTR); - } - - // Set up the DLC - hcan->pTxMsg->DLC &= (uint8_t)0x0000000F; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC; - - // Set up the data field - hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) | - ((uint32_t)hcan->pTxMsg->Data[2] << 16) | - ((uint32_t)hcan->pTxMsg->Data[1] << 8) | - ((uint32_t)hcan->pTxMsg->Data[0])); - hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) | - ((uint32_t)hcan->pTxMsg->Data[6] << 16) | - ((uint32_t)hcan->pTxMsg->Data[5] << 8) | - ((uint32_t)hcan->pTxMsg->Data[4])); - // Request transmission - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ; - - if (Timeout == 0) { - return HAL_OK; - } - - // Get tick - tickstart = HAL_GetTick(); - // Check End of transmission flag - while (!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox))) { - // Check for the Timeout - if (Timeout != HAL_MAX_DELAY) { - if ((HAL_GetTick() - tickstart) > Timeout) { - // When the timeout expires, we try to abort the transmission of the packet - __HAL_CAN_CANCEL_TRANSMIT(hcan, transmitmailbox); - while (!__HAL_CAN_GET_FLAG(hcan, rqcpflag)) { - } - if (__HAL_CAN_GET_FLAG(hcan, txokflag)) { - // The abort attempt failed and the message was sent properly - return HAL_OK; - } else { - return HAL_TIMEOUT; - } - } - } - } - return HAL_OK; - } else { - return HAL_BUSY; - } -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC void pyb_can_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_can_obj_t *self = self_in; - if (!self->is_enabled) { - mp_printf(print, "CAN(%u)", self->can_id); - } else { - qstr mode; - switch (self->can.Init.Mode) { - case CAN_MODE_NORMAL: mode = MP_QSTR_NORMAL; break; - case CAN_MODE_LOOPBACK: mode = MP_QSTR_LOOPBACK; break; - case CAN_MODE_SILENT: mode = MP_QSTR_SILENT; break; - case CAN_MODE_SILENT_LOOPBACK: default: mode = MP_QSTR_SILENT_LOOPBACK; break; - } - mp_printf(print, "CAN(%u, CAN.%q, extframe=%q, auto_restart=%q)", - self->can_id, - mode, - self->extframe ? MP_QSTR_True : MP_QSTR_False, - (self->can.Instance->MCR & CAN_MCR_ABOM) ? MP_QSTR_True : MP_QSTR_False); - } -} - -// init(mode, extframe=False, prescaler=100, *, sjw=1, bs1=6, bs2=8) -STATIC mp_obj_t pyb_can_init_helper(pyb_can_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_mode, ARG_extframe, ARG_prescaler, ARG_sjw, ARG_bs1, ARG_bs2, ARG_auto_restart }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = CAN_MODE_NORMAL} }, - { MP_QSTR_extframe, MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_prescaler, MP_ARG_INT, {.u_int = 100} }, - { MP_QSTR_sjw, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_bs1, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 6} }, - { MP_QSTR_bs2, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_auto_restart, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - self->extframe = args[ARG_extframe].u_bool; - - // set the CAN configuration values - memset(&self->can, 0, sizeof(self->can)); - CAN_InitTypeDef *init = &self->can.Init; - init->Mode = args[ARG_mode].u_int << 4; // shift-left so modes fit in a small-int - init->Prescaler = args[ARG_prescaler].u_int; - init->SJW = ((args[ARG_sjw].u_int - 1) & 3) << 24; - init->BS1 = ((args[ARG_bs1].u_int - 1) & 0xf) << 16; - init->BS2 = ((args[ARG_bs2].u_int - 1) & 7) << 20; - init->TTCM = DISABLE; - init->ABOM = args[ARG_auto_restart].u_bool ? ENABLE : DISABLE; - init->AWUM = DISABLE; - init->NART = DISABLE; - init->RFLM = DISABLE; - init->TXFP = DISABLE; - - // init CAN (if it fails, it's because the port doesn't exist) - if (!can_init(self)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "CAN(%d) doesn't exist", self->can_id)); - } - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct a CAN object on the given bus. `bus` can be 1-2, or 'YA' or 'YB'. -/// With no additional parameters, the CAN object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the CAN busses are: -/// -/// - `CAN(1)` is on `YA`: `(RX, TX) = (Y3, Y4) = (PB8, PB9)` -/// - `CAN(2)` is on `YB`: `(RX, TX) = (Y5, Y6) = (PB12, PB13)` -STATIC mp_obj_t pyb_can_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out port - mp_uint_t can_idx; - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { - #ifdef MICROPY_HW_CAN1_NAME - } else if (strcmp(port, MICROPY_HW_CAN1_NAME) == 0) { - can_idx = PYB_CAN_1; - #endif - #ifdef MICROPY_HW_CAN2_NAME - } else if (strcmp(port, MICROPY_HW_CAN2_NAME) == 0) { - can_idx = PYB_CAN_2; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "CAN(%s) doesn't exist", port)); - } - } else { - can_idx = mp_obj_get_int(args[0]); - } - if (can_idx < 1 || can_idx > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all))) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "CAN(%d) doesn't exist", can_idx)); - } - - pyb_can_obj_t *self; - if (MP_STATE_PORT(pyb_can_obj_all)[can_idx - 1] == NULL) { - self = m_new_obj(pyb_can_obj_t); - self->base.type = &pyb_can_type; - self->can_id = can_idx; - self->is_enabled = false; - MP_STATE_PORT(pyb_can_obj_all)[can_idx - 1] = self; - } else { - self = MP_STATE_PORT(pyb_can_obj_all)[can_idx - 1]; - } - - if (!self->is_enabled || n_args > 1) { - if (self->is_enabled) { - // The caller is requesting a reconfiguration of the hardware - // this can only be done if the hardware is in init mode - pyb_can_deinit(self); - } - - self->rxcallback0 = mp_const_none; - self->rxcallback1 = mp_const_none; - self->rx_state0 = RX_STATE_FIFO_EMPTY; - self->rx_state1 = RX_STATE_FIFO_EMPTY; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_can_init_helper(self, n_args - 1, args + 1, &kw_args); - } - } - - return self; -} - -STATIC mp_obj_t pyb_can_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_can_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_init_obj, 1, pyb_can_init); - -/// \method deinit() -/// Turn off the CAN bus. -STATIC mp_obj_t pyb_can_deinit(mp_obj_t self_in) { - pyb_can_obj_t *self = self_in; - self->is_enabled = false; - HAL_CAN_DeInit(&self->can); - if (self->can.Instance == CAN1) { - HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn); - HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn); - HAL_NVIC_DisableIRQ(CAN1_SCE_IRQn); - __CAN1_FORCE_RESET(); - __CAN1_RELEASE_RESET(); - __CAN1_CLK_DISABLE(); - #if defined(CAN2) - } else if (self->can.Instance == CAN2) { - HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn); - HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn); - HAL_NVIC_DisableIRQ(CAN2_SCE_IRQn); - __CAN2_FORCE_RESET(); - __CAN2_RELEASE_RESET(); - __CAN2_CLK_DISABLE(); - #endif - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_can_deinit_obj, pyb_can_deinit); - -// Force a software restart of the controller, to allow transmission after a bus error -STATIC mp_obj_t pyb_can_restart(mp_obj_t self_in) { - pyb_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (!self->is_enabled) { - mp_raise_ValueError(NULL); - } - CAN_TypeDef *can = self->can.Instance; - can->MCR |= CAN_MCR_INRQ; - while ((can->MSR & CAN_MSR_INAK) == 0) { - } - can->MCR &= ~CAN_MCR_INRQ; - while ((can->MSR & CAN_MSR_INAK)) { - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_can_restart_obj, pyb_can_restart); - -// Get the state of the controller -STATIC mp_obj_t pyb_can_state(mp_obj_t self_in) { - pyb_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_int_t state = CAN_STATE_STOPPED; - if (self->is_enabled) { - CAN_TypeDef *can = self->can.Instance; - if (can->ESR & CAN_ESR_BOFF) { - state = CAN_STATE_BUS_OFF; - } else if (can->ESR & CAN_ESR_EPVF) { - state = CAN_STATE_ERROR_PASSIVE; - } else if (can->ESR & CAN_ESR_EWGF) { - state = CAN_STATE_ERROR_WARNING; - } else { - state = CAN_STATE_ERROR_ACTIVE; - } - } - return MP_OBJ_NEW_SMALL_INT(state); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_can_state_obj, pyb_can_state); - -// Get info about error states and TX/RX buffers -STATIC mp_obj_t pyb_can_info(size_t n_args, const mp_obj_t *args) { - pyb_can_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_obj_list_t *list; - if (n_args == 1) { - list = MP_OBJ_TO_PTR(mp_obj_new_list(8, NULL)); - } else { - if (!MP_OBJ_IS_TYPE(args[1], &mp_type_list)) { - mp_raise_TypeError(NULL); - } - list = MP_OBJ_TO_PTR(args[1]); - if (list->len < 8) { - mp_raise_ValueError(NULL); - } - } - CAN_TypeDef *can = self->can.Instance; - uint32_t esr = can->ESR; - list->items[0] = MP_OBJ_NEW_SMALL_INT(esr >> CAN_ESR_TEC_Pos & 0xff); - list->items[1] = MP_OBJ_NEW_SMALL_INT(esr >> CAN_ESR_REC_Pos & 0xff); - list->items[2] = MP_OBJ_NEW_SMALL_INT(self->num_error_warning); - list->items[3] = MP_OBJ_NEW_SMALL_INT(self->num_error_passive); - list->items[4] = MP_OBJ_NEW_SMALL_INT(self->num_bus_off); - int n_tx_pending = 0x01121223 >> ((can->TSR >> CAN_TSR_TME_Pos & 7) << 2) & 0xf; - list->items[5] = MP_OBJ_NEW_SMALL_INT(n_tx_pending); - list->items[6] = MP_OBJ_NEW_SMALL_INT(can->RF0R >> CAN_RF0R_FMP0_Pos & 3); - list->items[7] = MP_OBJ_NEW_SMALL_INT(can->RF1R >> CAN_RF1R_FMP1_Pos & 3); - return MP_OBJ_FROM_PTR(list); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_can_info_obj, 1, 2, pyb_can_info); - -/// \method any(fifo) -/// Return `True` if any message waiting on the FIFO, else `False`. -STATIC mp_obj_t pyb_can_any(mp_obj_t self_in, mp_obj_t fifo_in) { - pyb_can_obj_t *self = self_in; - mp_int_t fifo = mp_obj_get_int(fifo_in); - if (fifo == 0) { - if (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO0) != 0) { - return mp_const_true; - } - } else { - if (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO1) != 0) { - return mp_const_true; - } - } - return mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_any_obj, pyb_can_any); - -/// \method send(send, addr, *, timeout=5000) -/// Send a message on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `addr` is the address to send to -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: `None`. -STATIC mp_obj_t pyb_can_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_data, ARG_id, ARG_timeout, ARG_rtr }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_rtr, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - pyb_can_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[ARG_data].u_obj, &bufinfo, data); - - if (bufinfo.len > 8) { - mp_raise_ValueError("CAN data field too long"); - } - - // send the data - CanTxMsgTypeDef tx_msg; - if (self->extframe) { - tx_msg.ExtId = args[ARG_id].u_int & 0x1FFFFFFF; - tx_msg.IDE = CAN_ID_EXT; - } else { - tx_msg.StdId = args[ARG_id].u_int & 0x7FF; - tx_msg.IDE = CAN_ID_STD; - } - if (args[ARG_rtr].u_bool == false) { - tx_msg.RTR = CAN_RTR_DATA; - } else { - tx_msg.RTR = CAN_RTR_REMOTE; - } - tx_msg.DLC = bufinfo.len; - for (mp_uint_t i = 0; i < bufinfo.len; i++) { - tx_msg.Data[i] = ((byte*)bufinfo.buf)[i]; // Data is uint32_t but holds only 1 byte - } - - self->can.pTxMsg = &tx_msg; - HAL_StatusTypeDef status = CAN_Transmit(&self->can, args[ARG_timeout].u_int); - - if (status != HAL_OK) { - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_send_obj, 1, pyb_can_send); - -/// \method recv(fifo, list=None, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `fifo` is an integer, which is the FIFO to receive on -/// - `list` if not None is a list with at least 4 elements -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: buffer of data bytes. -STATIC mp_obj_t pyb_can_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_fifo, ARG_list, ARG_timeout }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_fifo, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_list, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_can_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // receive the data - CanRxMsgTypeDef rx_msg; - int ret = can_receive(self->can.Instance, args[ARG_fifo].u_int, &rx_msg, args[ARG_timeout].u_int); - if (ret < 0) { - mp_raise_OSError(-ret); - } - - // Manage the rx state machine - mp_int_t fifo = args[ARG_fifo].u_int; - if ((fifo == CAN_FIFO0 && self->rxcallback0 != mp_const_none) || - (fifo == CAN_FIFO1 && self->rxcallback1 != mp_const_none)) { - byte *state = (fifo == CAN_FIFO0) ? &self->rx_state0 : &self->rx_state1; - - switch (*state) { - case RX_STATE_FIFO_EMPTY: - break; - case RX_STATE_MESSAGE_PENDING: - if (__HAL_CAN_MSG_PENDING(&self->can, fifo) == 0) { - // Fifo is empty - __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - *state = RX_STATE_FIFO_EMPTY; - } - break; - case RX_STATE_FIFO_FULL: - __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1); - *state = RX_STATE_MESSAGE_PENDING; - break; - case RX_STATE_FIFO_OVERFLOW: - __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1); - *state = RX_STATE_MESSAGE_PENDING; - break; - } - } - - // Create the tuple, or get the list, that will hold the return values - // Also populate the fourth element, either a new bytes or reuse existing memoryview - mp_obj_t ret_obj = args[ARG_list].u_obj; - mp_obj_t *items; - if (ret_obj == mp_const_none) { - ret_obj = mp_obj_new_tuple(4, NULL); - items = ((mp_obj_tuple_t*)MP_OBJ_TO_PTR(ret_obj))->items; - items[3] = mp_obj_new_bytes(&rx_msg.Data[0], rx_msg.DLC); - } else { - // User should provide a list of length at least 4 to hold the values - if (!MP_OBJ_IS_TYPE(ret_obj, &mp_type_list)) { - mp_raise_TypeError(NULL); - } - mp_obj_list_t *list = MP_OBJ_TO_PTR(ret_obj); - if (list->len < 4) { - mp_raise_ValueError(NULL); - } - items = list->items; - // Fourth element must be a memoryview which we assume points to a - // byte-like array which is large enough, and then we resize it inplace - if (!MP_OBJ_IS_TYPE(items[3], &mp_type_memoryview)) { - mp_raise_TypeError(NULL); - } - mp_obj_array_t *mv = MP_OBJ_TO_PTR(items[3]); - if (!(mv->typecode == (MP_OBJ_ARRAY_TYPECODE_FLAG_RW | BYTEARRAY_TYPECODE) - || (mv->typecode | 0x20) == (MP_OBJ_ARRAY_TYPECODE_FLAG_RW | 'b'))) { - mp_raise_ValueError(NULL); - } - mv->len = rx_msg.DLC; - memcpy(mv->items, &rx_msg.Data[0], rx_msg.DLC); - } - - // Populate the first 3 values of the tuple/list - if (rx_msg.IDE == CAN_ID_STD) { - items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.StdId); - } else { - items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.ExtId); - } - items[1] = rx_msg.RTR == CAN_RTR_REMOTE ? mp_const_true : mp_const_false; - items[2] = MP_OBJ_NEW_SMALL_INT(rx_msg.FMI); - - // Return the result - return ret_obj; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_recv_obj, 1, pyb_can_recv); - -/// \class method initfilterbanks -/// -/// Set up the filterbanks. All filter will be disabled and set to their reset states. -/// -/// - `banks` is an integer that sets how many filter banks that are reserved for CAN1. -/// 0 -> no filters assigned for CAN1 -/// 28 -> all filters are assigned to CAN1 -/// CAN2 will get the rest of the 28 available. -/// -/// Return value: none. -STATIC mp_obj_t pyb_can_initfilterbanks(mp_obj_t self, mp_obj_t bank_in) { - can2_start_bank = mp_obj_get_int(bank_in); - - for (int f = 0; f < 28; f++) { - can_clearfilter(f); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_initfilterbanks_fun_obj, pyb_can_initfilterbanks); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pyb_can_initfilterbanks_obj, (const mp_obj_t)&pyb_can_initfilterbanks_fun_obj); - -STATIC mp_obj_t pyb_can_clearfilter(mp_obj_t self_in, mp_obj_t bank_in) { - pyb_can_obj_t *self = self_in; - mp_int_t f = mp_obj_get_int(bank_in); - if (self->can_id == 2) { - f += can2_start_bank; - } - can_clearfilter(f); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_clearfilter_obj, pyb_can_clearfilter); - -/// Configures a filterbank -/// Return value: `None`. -#define EXTENDED_ID_TO_16BIT_FILTER(id) (((id & 0xC00000) >> 13) | ((id & 0x38000) >> 15)) | 8 -STATIC mp_obj_t pyb_can_setfilter(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_bank, ARG_mode, ARG_fifo, ARG_params, ARG_rtr }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_bank, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_fifo, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = CAN_FILTER_FIFO0} }, - { MP_QSTR_params, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_rtr, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - pyb_can_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - size_t len; - size_t rtr_len; - mp_uint_t rtr_masks[4] = {0, 0, 0, 0}; - mp_obj_t *rtr_flags; - mp_obj_t *params; - mp_obj_get_array(args[ARG_params].u_obj, &len, ¶ms); - if (args[ARG_rtr].u_obj != MP_OBJ_NULL){ - mp_obj_get_array(args[ARG_rtr].u_obj, &rtr_len, &rtr_flags); - } - - CAN_FilterConfTypeDef filter; - if (args[ARG_mode].u_int == MASK16 || args[ARG_mode].u_int == LIST16) { - if (len != 4) { - goto error; - } - filter.FilterScale = CAN_FILTERSCALE_16BIT; - if (self->extframe) { - if (args[ARG_rtr].u_obj != MP_OBJ_NULL) { - if (args[ARG_mode].u_int == MASK16) { - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = 0x02; - rtr_masks[2] = mp_obj_get_int(rtr_flags[1]) ? 0x02 : 0; - rtr_masks[3] = 0x02; - } else { // LIST16 - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = mp_obj_get_int(rtr_flags[1]) ? 0x02 : 0; - rtr_masks[2] = mp_obj_get_int(rtr_flags[2]) ? 0x02 : 0; - rtr_masks[3] = mp_obj_get_int(rtr_flags[3]) ? 0x02 : 0; - } - } - filter.FilterIdLow = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[0])) | rtr_masks[0]; // id1 - filter.FilterMaskIdLow = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[1])) | rtr_masks[1]; // mask1 - filter.FilterIdHigh = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[2])) | rtr_masks[2]; // id2 - filter.FilterMaskIdHigh = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[3])) | rtr_masks[3]; // mask2 - } else { // Basic frames - if (args[ARG_rtr].u_obj != MP_OBJ_NULL) { - if (args[ARG_mode].u_int == MASK16) { - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x10 : 0; - rtr_masks[1] = 0x10; - rtr_masks[2] = mp_obj_get_int(rtr_flags[1]) ? 0x10 : 0; - rtr_masks[3] = 0x10; - } else { // LIST16 - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x10 : 0; - rtr_masks[1] = mp_obj_get_int(rtr_flags[1]) ? 0x10 : 0; - rtr_masks[2] = mp_obj_get_int(rtr_flags[2]) ? 0x10 : 0; - rtr_masks[3] = mp_obj_get_int(rtr_flags[3]) ? 0x10 : 0; - } - } - filter.FilterIdLow = (mp_obj_get_int(params[0]) << 5) | rtr_masks[0]; // id1 - filter.FilterMaskIdLow = (mp_obj_get_int(params[1]) << 5) | rtr_masks[1]; // mask1 - filter.FilterIdHigh = (mp_obj_get_int(params[2]) << 5) | rtr_masks[2]; // id2 - filter.FilterMaskIdHigh = (mp_obj_get_int(params[3]) << 5) | rtr_masks[3]; // mask2 - } - if (args[ARG_mode].u_int == MASK16) { - filter.FilterMode = CAN_FILTERMODE_IDMASK; - } - if (args[ARG_mode].u_int == LIST16) { - filter.FilterMode = CAN_FILTERMODE_IDLIST; - } - } - else if (args[ARG_mode].u_int == MASK32 || args[ARG_mode].u_int == LIST32) { - if (len != 2) { - goto error; - } - filter.FilterScale = CAN_FILTERSCALE_32BIT; - if (args[ARG_rtr].u_obj != MP_OBJ_NULL) { - if (args[ARG_mode].u_int == MASK32) { - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = 0x02; - } else { // LIST32 - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = mp_obj_get_int(rtr_flags[1]) ? 0x02 : 0; - } - } - filter.FilterIdHigh = (mp_obj_get_int(params[0]) & 0x1FFFE000) >> 13; - filter.FilterIdLow = (((mp_obj_get_int(params[0]) & 0x00001FFF) << 3) | 4) | rtr_masks[0]; - filter.FilterMaskIdHigh = (mp_obj_get_int(params[1]) & 0x1FFFE000 ) >> 13; - filter.FilterMaskIdLow = (((mp_obj_get_int(params[1]) & 0x00001FFF) << 3) | 4) | rtr_masks[1]; - if (args[ARG_mode].u_int == MASK32) { - filter.FilterMode = CAN_FILTERMODE_IDMASK; - } - if (args[ARG_mode].u_int == LIST32) { - filter.FilterMode = CAN_FILTERMODE_IDLIST; - } - } else { - goto error; - } - - filter.FilterFIFOAssignment = args[ARG_fifo].u_int; - filter.FilterNumber = args[ARG_bank].u_int; - if (self->can_id == 1) { - if (filter.FilterNumber >= can2_start_bank) { - goto error; - } - } else { - filter.FilterNumber = filter.FilterNumber + can2_start_bank; - if (filter.FilterNumber > 27) { - goto error; - } - } - filter.FilterActivation = ENABLE; - filter.BankNumber = can2_start_bank; - HAL_CAN_ConfigFilter(&self->can, &filter); - - return mp_const_none; - -error: - mp_raise_ValueError("CAN filter parameter error"); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_setfilter_obj, 1, pyb_can_setfilter); - -STATIC mp_obj_t pyb_can_rxcallback(mp_obj_t self_in, mp_obj_t fifo_in, mp_obj_t callback_in) { - pyb_can_obj_t *self = self_in; - mp_int_t fifo = mp_obj_get_int(fifo_in); - mp_obj_t *callback; - - callback = (fifo == 0) ? &self->rxcallback0 : &self->rxcallback1; - if (callback_in == mp_const_none) { - __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FF0 : CAN_IT_FF1); - __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo == CAN_FIFO0) ? CAN_FLAG_FF0 : CAN_FLAG_FF1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo == CAN_FIFO0) ? CAN_FLAG_FOV0 : CAN_FLAG_FOV1); - *callback = mp_const_none; - } else if (*callback != mp_const_none) { - // Rx call backs has already been initialized - // only the callback function should be changed - *callback = callback_in; - } else if (mp_obj_is_callable(callback_in)) { - *callback = callback_in; - uint32_t irq = 0; - if (self->can_id == PYB_CAN_1) { - irq = (fifo == 0) ? CAN1_RX0_IRQn : CAN1_RX1_IRQn; - #if defined(CAN2) - } else { - irq = (fifo == 0) ? CAN2_RX0_IRQn : CAN2_RX1_IRQn; - #endif - } - NVIC_SetPriority(irq, IRQ_PRI_CAN); - HAL_NVIC_EnableIRQ(irq); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FF0 : CAN_IT_FF1); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_can_rxcallback_obj, pyb_can_rxcallback); - -STATIC const mp_rom_map_elem_t pyb_can_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_can_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_can_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_restart), MP_ROM_PTR(&pyb_can_restart_obj) }, - { MP_ROM_QSTR(MP_QSTR_state), MP_ROM_PTR(&pyb_can_state_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_can_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_can_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_can_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_can_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_initfilterbanks), MP_ROM_PTR(&pyb_can_initfilterbanks_obj) }, - { MP_ROM_QSTR(MP_QSTR_setfilter), MP_ROM_PTR(&pyb_can_setfilter_obj) }, - { MP_ROM_QSTR(MP_QSTR_clearfilter), MP_ROM_PTR(&pyb_can_clearfilter_obj) }, - { MP_ROM_QSTR(MP_QSTR_rxcallback), MP_ROM_PTR(&pyb_can_rxcallback_obj) }, - - // class constants - // Note: we use the ST constants >> 4 so they fit in a small-int. The - // right-shift is undone when the constants are used in the init function. - { MP_ROM_QSTR(MP_QSTR_NORMAL), MP_ROM_INT(CAN_MODE_NORMAL >> 4) }, - { MP_ROM_QSTR(MP_QSTR_LOOPBACK), MP_ROM_INT(CAN_MODE_LOOPBACK >> 4) }, - { MP_ROM_QSTR(MP_QSTR_SILENT), MP_ROM_INT(CAN_MODE_SILENT >> 4) }, - { MP_ROM_QSTR(MP_QSTR_SILENT_LOOPBACK), MP_ROM_INT(CAN_MODE_SILENT_LOOPBACK >> 4) }, - { MP_ROM_QSTR(MP_QSTR_MASK16), MP_ROM_INT(MASK16) }, - { MP_ROM_QSTR(MP_QSTR_LIST16), MP_ROM_INT(LIST16) }, - { MP_ROM_QSTR(MP_QSTR_MASK32), MP_ROM_INT(MASK32) }, - { MP_ROM_QSTR(MP_QSTR_LIST32), MP_ROM_INT(LIST32) }, - - // values for CAN.state() - { MP_ROM_QSTR(MP_QSTR_STOPPED), MP_ROM_INT(CAN_STATE_STOPPED) }, - { MP_ROM_QSTR(MP_QSTR_ERROR_ACTIVE), MP_ROM_INT(CAN_STATE_ERROR_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_ERROR_WARNING), MP_ROM_INT(CAN_STATE_ERROR_WARNING) }, - { MP_ROM_QSTR(MP_QSTR_ERROR_PASSIVE), MP_ROM_INT(CAN_STATE_ERROR_PASSIVE) }, - { MP_ROM_QSTR(MP_QSTR_BUS_OFF), MP_ROM_INT(CAN_STATE_BUS_OFF) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_can_locals_dict, pyb_can_locals_dict_table); - -mp_uint_t can_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_can_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) - && ((__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO0) != 0) - || (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO1) != 0))) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && (self->can.Instance->TSR & CAN_TSR_TME)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = -1; - } - return ret; -} - -void can_rx_irq_handler(uint can_id, uint fifo_id) { - mp_obj_t callback; - pyb_can_obj_t *self; - mp_obj_t irq_reason = MP_OBJ_NEW_SMALL_INT(0); - byte *state; - - self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1]; - - if (fifo_id == CAN_FIFO0) { - callback = self->rxcallback0; - state = &self->rx_state0; - } else { - callback = self->rxcallback1; - state = &self->rx_state1; - } - - switch (*state) { - case RX_STATE_FIFO_EMPTY: - __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - irq_reason = MP_OBJ_NEW_SMALL_INT(0); - *state = RX_STATE_MESSAGE_PENDING; - break; - case RX_STATE_MESSAGE_PENDING: - __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FF0 : CAN_FLAG_FF1); - irq_reason = MP_OBJ_NEW_SMALL_INT(1); - *state = RX_STATE_FIFO_FULL; - break; - case RX_STATE_FIFO_FULL: - __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FOV0 : CAN_FLAG_FOV1); - irq_reason = MP_OBJ_NEW_SMALL_INT(2); - *state = RX_STATE_FIFO_OVERFLOW; - break; - case RX_STATE_FIFO_OVERFLOW: - // This should never happen - break; - } - - if (callback != mp_const_none) { - mp_sched_lock(); - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_2(callback, self, irq_reason); - nlr_pop(); - } else { - // Uncaught exception; disable the callback so it doesn't run again. - pyb_can_rxcallback(self, MP_OBJ_NEW_SMALL_INT(fifo_id), mp_const_none); - printf("uncaught exception in CAN(%u) rx interrupt handler\n", self->can_id); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - mp_sched_unlock(); - } -} - -void can_sce_irq_handler(uint can_id) { - pyb_can_obj_t *self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1]; - if (self) { - self->can.Instance->MSR = CAN_MSR_ERRI; - uint32_t esr = self->can.Instance->ESR; - if (esr & CAN_ESR_BOFF) { - ++self->num_bus_off; - } else if (esr & CAN_ESR_EPVF) { - ++self->num_error_passive; - } else if (esr & CAN_ESR_EWGF) { - ++self->num_error_warning; - } - } -} - -STATIC const mp_stream_p_t can_stream_p = { - //.read = can_read, // is read sensible for CAN? - //.write = can_write, // is write sensible for CAN? - .ioctl = can_ioctl, - .is_text = false, -}; - -const mp_obj_type_t pyb_can_type = { - { &mp_type_type }, - .name = MP_QSTR_CAN, - .print = pyb_can_print, - .make_new = pyb_can_make_new, - .protocol = &can_stream_p, - .locals_dict = (mp_obj_t)&pyb_can_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_CAN diff --git a/ports/stm32/can.h b/ports/stm32/can.h deleted file mode 100644 index 54e7deaa5e..0000000000 --- a/ports/stm32/can.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_CAN_H -#define MICROPY_INCLUDED_STM32_CAN_H - -#define PYB_CAN_1 (1) -#define PYB_CAN_2 (2) - -extern const mp_obj_type_t pyb_can_type; - -void can_init0(void); -void can_deinit(void); -void can_rx_irq_handler(uint can_id, uint fifo_id); -void can_sce_irq_handler(uint can_id); - -#endif // MICROPY_INCLUDED_STM32_CAN_H diff --git a/ports/stm32/dac.c b/ports/stm32/dac.c deleted file mode 100644 index 559bb0b0d0..0000000000 --- a/ports/stm32/dac.c +++ /dev/null @@ -1,544 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "timer.h" -#include "dac.h" -#include "dma.h" -#include "pin.h" - -/// \moduleref pyb -/// \class DAC - digital to analog conversion -/// -/// The DAC is used to output analog values (a specific voltage) on pin X5 or pin X6. -/// The voltage will be between 0 and 3.3V. -/// -/// *This module will undergo changes to the API.* -/// -/// Example usage: -/// -/// from pyb import DAC -/// -/// dac = DAC(1) # create DAC 1 on pin X5 -/// dac.write(128) # write a value to the DAC (makes X5 1.65V) -/// -/// To output a continuous sine-wave: -/// -/// import math -/// from pyb import DAC -/// -/// # create a buffer containing a sine-wave -/// buf = bytearray(100) -/// for i in range(len(buf)): -/// buf[i] = 128 + int(127 * math.sin(2 * math.pi * i / len(buf))) -/// -/// # output the sine-wave at 400Hz -/// dac = DAC(1) -/// dac.write_timed(buf, 400 * len(buf), mode=DAC.CIRCULAR) - -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC - -#if defined(STM32H7) -#define DAC DAC1 -#endif - -STATIC DAC_HandleTypeDef DAC_Handle; - -void dac_init(void) { - memset(&DAC_Handle, 0, sizeof DAC_Handle); - DAC_Handle.Instance = DAC; - DAC_Handle.State = HAL_DAC_STATE_RESET; - HAL_DAC_Init(&DAC_Handle); -} - -#if defined(TIM6) -STATIC void TIM6_Config(uint freq) { - // Init TIM6 at the required frequency (in Hz) - TIM_HandleTypeDef *tim = timer_tim6_init(freq); - - // TIM6 TRGO selection - TIM_MasterConfigTypeDef config; - config.MasterOutputTrigger = TIM_TRGO_UPDATE; - config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - HAL_TIMEx_MasterConfigSynchronization(tim, &config); - - // TIM6 start counter - HAL_TIM_Base_Start(tim); -} -#endif - -STATIC uint32_t TIMx_Config(mp_obj_t timer) { - // TRGO selection to trigger DAC - TIM_HandleTypeDef *tim = pyb_timer_get_handle(timer); - TIM_MasterConfigTypeDef config; - config.MasterOutputTrigger = TIM_TRGO_UPDATE; - config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - HAL_TIMEx_MasterConfigSynchronization(tim, &config); - - // work out the trigger channel (only certain ones are supported) - if (tim->Instance == TIM2) { - return DAC_TRIGGER_T2_TRGO; - #if defined(TIM4) - } else if (tim->Instance == TIM4) { - return DAC_TRIGGER_T4_TRGO; - #endif - #if defined(TIM5) - } else if (tim->Instance == TIM5) { - return DAC_TRIGGER_T5_TRGO; - #endif - #if defined(TIM6) - } else if (tim->Instance == TIM6) { - return DAC_TRIGGER_T6_TRGO; - #endif - #if defined(TIM7) - } else if (tim->Instance == TIM7) { - return DAC_TRIGGER_T7_TRGO; - #endif - #if defined(TIM8) - } else if (tim->Instance == TIM8) { - return DAC_TRIGGER_T8_TRGO; - #endif - } else { - mp_raise_ValueError("Timer does not support DAC triggering"); - } -} - -/******************************************************************************/ -// MicroPython bindings - -typedef enum { - DAC_STATE_RESET, - DAC_STATE_WRITE_SINGLE, - DAC_STATE_BUILTIN_WAVEFORM, - DAC_STATE_DMA_WAVEFORM, // should be last enum since we use space beyond it -} pyb_dac_state_t; - -typedef struct _pyb_dac_obj_t { - mp_obj_base_t base; - uint32_t dac_channel; // DAC_CHANNEL_1 or DAC_CHANNEL_2 - const dma_descr_t *tx_dma_descr; - mp_hal_pin_obj_t pin; // pin_A4 or pin_A5 - uint8_t bits; // 8 or 12 - uint8_t state; - uint8_t outbuf_single; - uint8_t outbuf_waveform; -} pyb_dac_obj_t; - -STATIC void pyb_dac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_dac_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "DAC(%u, bits=%u)", - self->dac_channel == DAC_CHANNEL_1 ? 1 : 2, - self->bits); -} - -STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_buffering, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // GPIO configuration - mp_hal_pin_config(self->pin, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0); - - // DAC peripheral clock - #if defined(STM32F4) || defined(STM32F7) - __DAC_CLK_ENABLE(); - #elif defined(STM32H7) - __HAL_RCC_DAC12_CLK_ENABLE(); - #elif defined(STM32F0) || defined(STM32L4) - __HAL_RCC_DAC1_CLK_ENABLE(); - #else - #error Unsupported Processor - #endif - - // stop anything already going on - __HAL_RCC_DMA1_CLK_ENABLE(); - DMA_HandleTypeDef DMA_Handle; - /* Get currently configured dma */ - dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL); - // Need to deinit DMA first - DMA_Handle.State = HAL_DMA_STATE_READY; - HAL_DMA_DeInit(&DMA_Handle); - - HAL_DAC_Stop(&DAC_Handle, self->dac_channel); - if ((self->dac_channel == DAC_CHANNEL_1 && DAC_Handle.DMA_Handle1 != NULL) - || (self->dac_channel == DAC_CHANNEL_2 && DAC_Handle.DMA_Handle2 != NULL)) { - HAL_DAC_Stop_DMA(&DAC_Handle, self->dac_channel); - } - - // set bit resolution - if (args[0].u_int == 8 || args[0].u_int == 12) { - self->bits = args[0].u_int; - } else { - mp_raise_ValueError("unsupported bits"); - } - - // set output buffer config - if (args[1].u_obj == mp_const_none) { - // due to legacy, default values differ for single and waveform outputs - self->outbuf_single = DAC_OUTPUTBUFFER_DISABLE; - self->outbuf_waveform = DAC_OUTPUTBUFFER_ENABLE; - } else if (mp_obj_is_true(args[1].u_obj)) { - self->outbuf_single = DAC_OUTPUTBUFFER_ENABLE; - self->outbuf_waveform = DAC_OUTPUTBUFFER_ENABLE; - } else { - self->outbuf_single = DAC_OUTPUTBUFFER_DISABLE; - self->outbuf_waveform = DAC_OUTPUTBUFFER_DISABLE; - } - - // reset state of DAC - self->state = DAC_STATE_RESET; - - return mp_const_none; -} - -// create the dac object -// currently support either DAC1 on X5 (id = 1) or DAC2 on X6 (id = 2) - -/// \classmethod \constructor(port) -/// Construct a new DAC object. -/// -/// `port` can be a pin object, or an integer (1 or 2). -/// DAC(1) is on pin X5 and DAC(2) is on pin X6. -STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get pin/channel to output on - mp_int_t dac_id; - if (MP_OBJ_IS_INT(args[0])) { - dac_id = mp_obj_get_int(args[0]); - } else { - const pin_obj_t *pin = pin_find(args[0]); - if (pin == pin_A4) { - dac_id = 1; - } else if (pin == pin_A5) { - dac_id = 2; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have DAC capabilities", pin->name)); - } - } - - pyb_dac_obj_t *dac = m_new_obj(pyb_dac_obj_t); - dac->base.type = &pyb_dac_type; - - if (dac_id == 1) { - dac->pin = pin_A4; - dac->dac_channel = DAC_CHANNEL_1; - dac->tx_dma_descr = &dma_DAC_1_TX; - } else if (dac_id == 2) { - dac->pin = pin_A5; - dac->dac_channel = DAC_CHANNEL_2; - dac->tx_dma_descr = &dma_DAC_2_TX; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC(%d) doesn't exist", dac_id)); - } - - // configure the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_dac_init_helper(dac, n_args - 1, args + 1, &kw_args); - - // return object - return dac; -} - -STATIC mp_obj_t pyb_dac_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_dac_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_init_obj, 1, pyb_dac_init); - -/// \method deinit() -/// Turn off the DAC, enable other use of pin. -STATIC mp_obj_t pyb_dac_deinit(mp_obj_t self_in) { - pyb_dac_obj_t *self = self_in; - if (self->dac_channel == DAC_CHANNEL_1) { - DAC_Handle.Instance->CR &= ~DAC_CR_EN1; - #if defined(STM32H7) || defined(STM32L4) - DAC->MCR = (DAC->MCR & ~(7 << DAC_MCR_MODE1_Pos)) | 2 << DAC_MCR_MODE1_Pos; - #else - DAC_Handle.Instance->CR |= DAC_CR_BOFF1; - #endif - } else { - DAC_Handle.Instance->CR &= ~DAC_CR_EN2; - #if defined(STM32H7) || defined(STM32L4) - DAC->MCR = (DAC->MCR & ~(7 << DAC_MCR_MODE2_Pos)) | 2 << DAC_MCR_MODE2_Pos; - #else - DAC_Handle.Instance->CR |= DAC_CR_BOFF2; - #endif - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_dac_deinit_obj, pyb_dac_deinit); - -#if defined(TIM6) -/// \method noise(freq) -/// Generate a pseudo-random noise signal. A new random sample is written -/// to the DAC output at the given frequency. -STATIC mp_obj_t pyb_dac_noise(mp_obj_t self_in, mp_obj_t freq) { - pyb_dac_obj_t *self = self_in; - - // set TIM6 to trigger the DAC at the given frequency - TIM6_Config(mp_obj_get_int(freq)); - - if (self->state != DAC_STATE_BUILTIN_WAVEFORM) { - // configure DAC to trigger via TIM6 - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = DAC_TRIGGER_T6_TRGO; - config.DAC_OutputBuffer = self->outbuf_waveform; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_BUILTIN_WAVEFORM; - } - - // set noise wave generation - HAL_DACEx_NoiseWaveGenerate(&DAC_Handle, self->dac_channel, DAC_LFSRUNMASK_BITS10_0); - HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_L, 0x7ff0); - HAL_DAC_Start(&DAC_Handle, self->dac_channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_noise_obj, pyb_dac_noise); -#endif - -#if defined(TIM6) -/// \method triangle(freq) -/// Generate a triangle wave. The value on the DAC output changes at -/// the given frequency, and the frequence of the repeating triangle wave -/// itself is 256 (or 1024, need to check) times smaller. -STATIC mp_obj_t pyb_dac_triangle(mp_obj_t self_in, mp_obj_t freq) { - pyb_dac_obj_t *self = self_in; - - // set TIM6 to trigger the DAC at the given frequency - TIM6_Config(mp_obj_get_int(freq)); - - if (self->state != DAC_STATE_BUILTIN_WAVEFORM) { - // configure DAC to trigger via TIM6 - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = DAC_TRIGGER_T6_TRGO; - config.DAC_OutputBuffer = self->outbuf_waveform; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_BUILTIN_WAVEFORM; - } - - // set triangle wave generation - HAL_DACEx_TriangleWaveGenerate(&DAC_Handle, self->dac_channel, DAC_TRIANGLEAMPLITUDE_1023); - HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_R, 0x100); - HAL_DAC_Start(&DAC_Handle, self->dac_channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_triangle_obj, pyb_dac_triangle); -#endif - -/// \method write(value) -/// Direct access to the DAC output (8 bit only at the moment). -STATIC mp_obj_t pyb_dac_write(mp_obj_t self_in, mp_obj_t val) { - pyb_dac_obj_t *self = self_in; - - if (self->state != DAC_STATE_WRITE_SINGLE) { - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = DAC_TRIGGER_NONE; - config.DAC_OutputBuffer = self->outbuf_single; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_WRITE_SINGLE; - } - - // DAC output is always 12-bit at the hardware level, and we provide support - // for multiple bit "resolutions" simply by shifting the input value. - HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_R, - mp_obj_get_int(val) << (12 - self->bits)); - - HAL_DAC_Start(&DAC_Handle, self->dac_channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_write_obj, pyb_dac_write); - -#if defined(TIM6) -/// \method write_timed(data, freq, *, mode=DAC.NORMAL) -/// Initiates a burst of RAM to DAC using a DMA transfer. -/// The input data is treated as an array of bytes (8 bit data). -/// -/// `freq` can be an integer specifying the frequency to write the DAC -/// samples at, using Timer(6). Or it can be an already-initialised -/// Timer object which is used to trigger the DAC sample. Valid timers -/// are 2, 4, 5, 6, 7 and 8. -/// -/// `mode` can be `DAC.NORMAL` or `DAC.CIRCULAR`. -/// -// TODO add callback argument, to call when transfer is finished -// TODO add double buffer argument -// -// TODO reconsider API, eg: write_trig(data, *, trig=None, loop=False) -// Then trigger can be timer (preinitialised with desired freq) or pin (extint9), -// and we can reuse the same timer for both DACs (and maybe also ADC) without -// setting the freq twice. -// Can still do 1-liner: dac.write_trig(buf, trig=Timer(6, freq=100), loop=True) -mp_obj_t pyb_dac_write_timed(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DMA_NORMAL} }, - }; - - // parse args - pyb_dac_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the data to write - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[0].u_obj, &bufinfo, MP_BUFFER_READ); - - uint32_t dac_trigger; - if (mp_obj_is_integer(args[1].u_obj)) { - // set TIM6 to trigger the DAC at the given frequency - TIM6_Config(mp_obj_get_int(args[1].u_obj)); - dac_trigger = DAC_TRIGGER_T6_TRGO; - } else { - // set the supplied timer to trigger the DAC (timer should be initialised) - dac_trigger = TIMx_Config(args[1].u_obj); - } - - __HAL_RCC_DMA1_CLK_ENABLE(); - - DMA_HandleTypeDef DMA_Handle; - /* Get currently configured dma */ - dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL); - /* - DMA_Cmd(DMA_Handle->Instance, DISABLE); - while (DMA_GetCmdStatus(DMA_Handle->Instance) != DISABLE) { - } - - DAC_Cmd(self->dac_channel, DISABLE); - */ - - /* - // DAC channel configuration - DAC_InitTypeDef DAC_InitStructure; - DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO; - DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; - DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_TriangleAmplitude_1; // unused, but need to set it to a valid value - DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; - DAC_Init(self->dac_channel, &DAC_InitStructure); - */ - - // Need to deinit DMA first - DMA_Handle.State = HAL_DMA_STATE_READY; - HAL_DMA_DeInit(&DMA_Handle); - - if (self->bits == 8) { - DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - } else { - DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; - DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; - } - DMA_Handle.Init.Mode = args[2].u_int; - HAL_DMA_Init(&DMA_Handle); - - if (self->dac_channel == DAC_CHANNEL_1) { - __HAL_LINKDMA(&DAC_Handle, DMA_Handle1, DMA_Handle); - } else { - __HAL_LINKDMA(&DAC_Handle, DMA_Handle2, DMA_Handle); - } - - DAC_Handle.Instance = DAC; - DAC_Handle.State = HAL_DAC_STATE_RESET; - HAL_DAC_Init(&DAC_Handle); - - if (self->state != DAC_STATE_DMA_WAVEFORM + dac_trigger) { - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = dac_trigger; - config.DAC_OutputBuffer = self->outbuf_waveform; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_DMA_WAVEFORM + dac_trigger; - } - - if (self->bits == 8) { - HAL_DAC_Start_DMA(&DAC_Handle, self->dac_channel, - (uint32_t*)bufinfo.buf, bufinfo.len, DAC_ALIGN_8B_R); - } else { - HAL_DAC_Start_DMA(&DAC_Handle, self->dac_channel, - (uint32_t*)bufinfo.buf, bufinfo.len / 2, DAC_ALIGN_12B_R); - } - - /* - // enable DMA stream - DMA_Cmd(DMA_Handle->Instance, ENABLE); - while (DMA_GetCmdStatus(DMA_Handle->Instance) == DISABLE) { - } - - // enable DAC channel - DAC_Cmd(self->dac_channel, ENABLE); - - // enable DMA for DAC channel - DAC_DMACmd(self->dac_channel, ENABLE); - */ - - //printf("DMA: %p %lu\n", bufinfo.buf, bufinfo.len); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_write_timed_obj, 1, pyb_dac_write_timed); -#endif - -STATIC const mp_rom_map_elem_t pyb_dac_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_dac_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_dac_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_dac_write_obj) }, - #if defined(TIM6) - { MP_ROM_QSTR(MP_QSTR_noise), MP_ROM_PTR(&pyb_dac_noise_obj) }, - { MP_ROM_QSTR(MP_QSTR_triangle), MP_ROM_PTR(&pyb_dac_triangle_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_timed), MP_ROM_PTR(&pyb_dac_write_timed_obj) }, - #endif - - // class constants - { MP_ROM_QSTR(MP_QSTR_NORMAL), MP_ROM_INT(DMA_NORMAL) }, - { MP_ROM_QSTR(MP_QSTR_CIRCULAR), MP_ROM_INT(DMA_CIRCULAR) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_dac_locals_dict, pyb_dac_locals_dict_table); - -const mp_obj_type_t pyb_dac_type = { - { &mp_type_type }, - .name = MP_QSTR_DAC, - .print = pyb_dac_print, - .make_new = pyb_dac_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_dac_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_DAC diff --git a/ports/stm32/dma.c b/ports/stm32/dma.c deleted file mode 100644 index dc1ad6c1cd..0000000000 --- a/ports/stm32/dma.c +++ /dev/null @@ -1,634 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/obj.h" -#include "dma.h" -#include "irq.h" - -typedef enum { - dma_id_not_defined=-1, - dma_id_0, - dma_id_1, - dma_id_2, - dma_id_3, - dma_id_4, - dma_id_5, - dma_id_6, - dma_id_7, - dma_id_8, - dma_id_9, - dma_id_10, - dma_id_11, - dma_id_12, - dma_id_13, - dma_id_14, - dma_id_15, -} dma_id_t; - -struct _dma_descr_t { - #if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - DMA_Stream_TypeDef *instance; - #elif defined(STM32F0) || defined(STM32L4) - DMA_Channel_TypeDef *instance; - #else - #error "Unsupported Processor" - #endif - uint32_t sub_instance; - uint32_t transfer_direction; // periph to memory or vice-versa - dma_id_t id; - const DMA_InitTypeDef *init; -}; - -// Default parameters to dma_init() shared by spi and i2c; Channel and Direction -// vary depending on the peripheral instance so they get passed separately -static const DMA_InitTypeDef dma_init_struct_spi_i2c = { - #if defined(STM32F4) || defined(STM32F7) - .Channel = 0, - #elif defined(STM32L4) - .Request = 0, - #endif - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_BYTE, - .MemDataAlignment = DMA_MDATAALIGN_BYTE, - .Mode = DMA_NORMAL, - .Priority = DMA_PRIORITY_LOW, - #if defined(STM32F4) || defined(STM32F7) - .FIFOMode = DMA_FIFOMODE_DISABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL, - .MemBurst = DMA_MBURST_INC4, - .PeriphBurst = DMA_PBURST_INC4 - #endif -}; - -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD && !defined(STM32H7) -// Parameters to dma_init() for SDIO tx and rx. -static const DMA_InitTypeDef dma_init_struct_sdio = { - #if defined(STM32F4) || defined(STM32F7) - .Channel = 0, - #elif defined(STM32L4) - .Request = 0, - #endif - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_WORD, - .MemDataAlignment = DMA_MDATAALIGN_WORD, - #if defined(STM32F4) || defined(STM32F7) - .Mode = DMA_PFCTRL, - #elif defined(STM32L4) - .Mode = DMA_NORMAL, - #endif - .Priority = DMA_PRIORITY_VERY_HIGH, - #if defined(STM32F4) || defined(STM32F7) - .FIFOMode = DMA_FIFOMODE_ENABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL, - .MemBurst = DMA_MBURST_INC4, - .PeriphBurst = DMA_PBURST_INC4, - #endif -}; -#endif - -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC -// Default parameters to dma_init() for DAC tx -static const DMA_InitTypeDef dma_init_struct_dac = { - #if defined(STM32F4) || defined(STM32F7) - .Channel = 0, - #elif defined(STM32L4) - .Request = 0, - #endif - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_BYTE, - .MemDataAlignment = DMA_MDATAALIGN_BYTE, - .Mode = DMA_NORMAL, - .Priority = DMA_PRIORITY_HIGH, - #if defined(STM32F4) || defined(STM32F7) - .FIFOMode = DMA_FIFOMODE_DISABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL, - .MemBurst = DMA_MBURST_SINGLE, - .PeriphBurst = DMA_PBURST_SINGLE, - #endif -}; -#endif - -#if defined(STM32F0) - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (7) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_channel) (dma_channel) - -#define DMA1_ENABLE_MASK (0x007f) // Bits in dma_enable_mask corresponfing to DMA1 (7 channels) -#define DMA2_ENABLE_MASK (0x0f80) // Bits in dma_enable_mask corresponding to DMA2 (only 5 channels) - -// DMA1 streams -#if MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_1_TX = { DMA1_Channel3, HAL_DMA1_CH3_DAC_CH1, DMA_MEMORY_TO_PERIPH, dma_id_3, &dma_init_struct_dac }; -const dma_descr_t dma_DAC_2_TX = { DMA1_Channel4, HAL_DMA1_CH4_DAC_CH2, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_2_TX = { DMA1_Channel5, HAL_DMA1_CH5_SPI2_TX, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c}; -const dma_descr_t dma_SPI_2_RX = { DMA1_Channel6, HAL_DMA1_CH6_SPI2_RX, DMA_PERIPH_TO_MEMORY, dma_id_6, &dma_init_struct_spi_i2c}; -const dma_descr_t dma_SPI_1_RX = { DMA2_Channel3, HAL_DMA2_CH3_SPI1_RX, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c}; -const dma_descr_t dma_SPI_1_TX = { DMA2_Channel4, HAL_DMA2_CH4_SPI1_TX, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c}; - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Ch1_IRQn, - DMA1_Ch2_3_DMA2_Ch1_2_IRQn, - DMA1_Ch2_3_DMA2_Ch1_2_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - - DMA1_Ch2_3_DMA2_Ch1_2_IRQn, - DMA1_Ch2_3_DMA2_Ch1_2_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - DMA1_Ch4_7_DMA2_Ch3_5_IRQn, - 0, - 0, -}; - -#elif defined(STM32F4) || defined(STM32F7) - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (8) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_channel) (((dma_channel) & DMA_SxCR_CHSEL) >> 25) - -#define DMA1_ENABLE_MASK (0x00ff) // Bits in dma_enable_mask corresponding to DMA1 -#define DMA2_ENABLE_MASK (0xff00) // Bits in dma_enable_mask corresponding to DMA2 - -// These descriptors are ordered by DMAx_Stream number, and within a stream by channel -// number. The duplicate streams are ok as long as they aren't used at the same time. -// -// Currently I2C and SPI are synchronous and they call dma_init/dma_deinit -// around each transfer. - -// DMA1 streams -const dma_descr_t dma_I2C_1_RX = { DMA1_Stream0, DMA_CHANNEL_1, DMA_PERIPH_TO_MEMORY, dma_id_0, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_3_RX = { DMA1_Stream2, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -#if defined(STM32F7) -const dma_descr_t dma_I2C_4_RX = { DMA1_Stream2, DMA_CHANNEL_2, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -#endif -const dma_descr_t dma_I2C_3_RX = { DMA1_Stream2, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_CHANNEL_7, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_TX = { DMA1_Stream4, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -#if defined(STM32F7) -const dma_descr_t dma_I2C_4_TX = { DMA1_Stream5, DMA_CHANNEL_2, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c }; -#endif -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_1_TX = { DMA1_Stream5, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_dac }; -const dma_descr_t dma_DAC_2_TX = { DMA1_Stream6, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_6, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_3_TX = { DMA1_Stream7, DMA_CHANNEL_0, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Stream7, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_TX = { DMA1_Stream7, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -/* not preferred streams -const dma_descr_t dma_SPI_3_RX = { DMA1_Stream0, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_0, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Stream6, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_6, &dma_init_struct_spi_i2c }; -*/ - -// DMA2 streams -#if defined(STM32F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDMMC_2_RX= { DMA2_Stream0, DMA_CHANNEL_11, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_sdio }; -#endif -const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_10, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_RX = { DMA2_Stream3, DMA_CHANNEL_2, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_spi_i2c }; -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDIO_0_RX= { DMA2_Stream3, DMA_CHANNEL_4, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_sdio }; -#endif -const dma_descr_t dma_SPI_4_RX = { DMA2_Stream3, DMA_CHANNEL_5, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_TX = { DMA2_Stream4, DMA_CHANNEL_2, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_CHANNEL_5, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -#if defined(STM32F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDMMC_2_TX= { DMA2_Stream5, DMA_CHANNEL_11, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_sdio }; -#endif -const dma_descr_t dma_SPI_6_RX = { DMA2_Stream6, DMA_CHANNEL_1, DMA_PERIPH_TO_MEMORY, dma_id_14, &dma_init_struct_spi_i2c }; -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDIO_0_TX= { DMA2_Stream6, DMA_CHANNEL_4, DMA_MEMORY_TO_PERIPH, dma_id_14, &dma_init_struct_sdio }; -#endif -/* not preferred streams -const dma_descr_t dma_SPI_1_TX = { DMA2_Stream3, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_11, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_1_RX = { DMA2_Stream0, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_RX = { DMA2_Stream0, DMA_CHANNEL_4, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_TX = { DMA2_Stream1, DMA_CHANNEL_4, DMA_MEMORY_TO_PERIPH, dma_id_9, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_RX = { DMA2_Stream5, DMA_CHANNEL_7, DMA_PERIPH_TO_MEMORY, dma_id_13, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_TX = { DMA2_Stream6, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_14, &dma_init_struct_spi_i2c }; -*/ - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Stream0_IRQn, - DMA1_Stream1_IRQn, - DMA1_Stream2_IRQn, - DMA1_Stream3_IRQn, - DMA1_Stream4_IRQn, - DMA1_Stream5_IRQn, - DMA1_Stream6_IRQn, - DMA1_Stream7_IRQn, - DMA2_Stream0_IRQn, - DMA2_Stream1_IRQn, - DMA2_Stream2_IRQn, - DMA2_Stream3_IRQn, - DMA2_Stream4_IRQn, - DMA2_Stream5_IRQn, - DMA2_Stream6_IRQn, - DMA2_Stream7_IRQn, -}; - -#elif defined(STM32L4) - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (7) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_request) (dma_request) - -#define DMA1_ENABLE_MASK (0x007f) // Bits in dma_enable_mask corresponfing to DMA1 -#define DMA2_ENABLE_MASK (0x3f80) // Bits in dma_enable_mask corresponding to DMA2 - -// These descriptors are ordered by DMAx_Channel number, and within a channel by request -// number. The duplicate streams are ok as long as they aren't used at the same time. - -// DMA1 streams -//const dma_descr_t dma_ADC_1_RX = { DMA1_Channel1, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_0, NULL }; // unused -//const dma_descr_t dma_ADC_2_RX = { DMA1_Channel2, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_1, NULL }; // unused -const dma_descr_t dma_SPI_1_RX = { DMA1_Channel2, DMA_REQUEST_1, DMA_PERIPH_TO_MEMORY, dma_id_1, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_TX = { DMA1_Channel2, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_1, &dma_init_struct_spi_i2c }; -//const dma_descr_t dma_ADC_3_RX = { DMA1_Channel3, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_2, NULL }; // unused -const dma_descr_t dma_SPI_1_TX = { DMA1_Channel3, DMA_REQUEST_1, DMA_MEMORY_TO_PERIPH, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_RX = { DMA1_Channel3, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -#if MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_1_TX = { DMA1_Channel3, DMA_REQUEST_6, DMA_MEMORY_TO_PERIPH, dma_id_2, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_2_RX = { DMA1_Channel4, DMA_REQUEST_1, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_TX = { DMA1_Channel4, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_3, &dma_init_struct_spi_i2c }; -#if MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_2_TX = { DMA1_Channel4, DMA_REQUEST_5, DMA_MEMORY_TO_PERIPH, dma_id_3, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_2_TX = { DMA1_Channel5, DMA_REQUEST_1, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_RX = { DMA1_Channel5, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Channel6, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_RX = { DMA1_Channel7, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_6, &dma_init_struct_spi_i2c }; - -// DMA2 streams -const dma_descr_t dma_SPI_3_RX = { DMA2_Channel1, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_3_TX = { DMA2_Channel2, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_8, &dma_init_struct_spi_i2c }; -/* not preferred streams -const dma_descr_t dma_ADC_1_RX = { DMA2_Channel3, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_9, NULL }; -const dma_descr_t dma_SPI_1_RX = { DMA2_Channel3, DMA_REQUEST_4, DMA_PERIPH_TO_MEMORY, dma_id_9, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_ADC_2_RX = { DMA2_Channel4, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_10, NULL }; -const dma_descr_t dma_DAC_1_TX = { DMA2_Channel4, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_10, &dma_init_struct_dac }; -const dma_descr_t dma_SPI_1_TX = { DMA2_Channel4, DMA_REQUEST_4, DMA_MEMORY_TO_PERIPH, dma_id_10, &dma_init_struct_spi_i2c }; -*/ -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -// defined twice as L4 HAL only needs one channel and can correctly switch direction but sdcard.c needs two channels -const dma_descr_t dma_SDIO_0_TX= { DMA2_Channel4, DMA_REQUEST_7, DMA_MEMORY_TO_PERIPH, dma_id_10, &dma_init_struct_sdio }; -const dma_descr_t dma_SDIO_0_RX= { DMA2_Channel4, DMA_REQUEST_7, DMA_PERIPH_TO_MEMORY, dma_id_10, &dma_init_struct_sdio }; -#endif -/* not preferred streams -const dma_descr_t dma_ADC_3_RX = { DMA2_Channel5, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_11, NULL }; -const dma_descr_t dma_DAC_2_TX = { DMA2_Channel5, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_11, &dma_init_struct_dac }; -const dma_descr_t dma_SDIO_0_TX= { DMA2_Channel5, DMA_REQUEST_7, DMA_MEMORY_TO_PERIPH, dma_id_11, &dma_init_struct_sdio }; -const dma_descr_t dma_I2C_1_RX = { DMA2_Channel6, DMA_REQUEST_5, DMA_PERIPH_TO_MEMORY, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA2_Channel7, DMA_REQUEST_5, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -*/ - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Channel1_IRQn, - DMA1_Channel2_IRQn, - DMA1_Channel3_IRQn, - DMA1_Channel4_IRQn, - DMA1_Channel5_IRQn, - DMA1_Channel6_IRQn, - DMA1_Channel7_IRQn, - DMA2_Channel1_IRQn, - DMA2_Channel2_IRQn, - DMA2_Channel3_IRQn, - DMA2_Channel4_IRQn, - DMA2_Channel5_IRQn, - DMA2_Channel6_IRQn, - DMA2_Channel7_IRQn, -}; - -#elif defined(STM32H7) - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (8) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_channel) (dma_channel) - -#define DMA1_ENABLE_MASK (0x00ff) // Bits in dma_enable_mask corresponding to DMA1 -#define DMA2_ENABLE_MASK (0xff00) // Bits in dma_enable_mask corresponding to DMA2 - -// These descriptors are ordered by DMAx_Stream number, and within a stream by channel -// number. The duplicate streams are ok as long as they aren't used at the same time. -// -// Currently I2C and SPI are synchronous and they call dma_init/dma_deinit -// around each transfer. - -// DMA1 streams -const dma_descr_t dma_I2C_1_RX = { DMA1_Stream0, DMA_REQUEST_I2C1_RX, DMA_PERIPH_TO_MEMORY, dma_id_0, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_3_RX = { DMA1_Stream2, DMA_REQUEST_SPI3_RX, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_4_RX = { DMA1_Stream2, BDMA_REQUEST_I2C4_RX, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_RX = { DMA1_Stream2, DMA_REQUEST_I2C3_RX, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_REQUEST_I2C2_RX, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_REQUEST_SPI2_RX, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_REQUEST_SPI2_TX, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_TX = { DMA1_Stream4, DMA_REQUEST_I2C3_TX, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_4_TX = { DMA1_Stream5, BDMA_REQUEST_I2C4_TX, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c }; -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_1_TX = { DMA1_Stream5, DMA_REQUEST_DAC1_CH1, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_dac }; -const dma_descr_t dma_DAC_2_TX = { DMA1_Stream6, DMA_REQUEST_DAC1_CH2, DMA_MEMORY_TO_PERIPH, dma_id_6, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_3_TX = { DMA1_Stream7, DMA_REQUEST_SPI3_TX, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Stream7, DMA_REQUEST_I2C1_TX, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_TX = { DMA1_Stream7, DMA_REQUEST_I2C2_TX, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; - -// DMA2 streams -const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_REQUEST_SPI1_RX, DMA_PERIPH_TO_MEMORY, dma_id_10, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_RX = { DMA2_Stream3, DMA_REQUEST_SPI5_RX, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_RX = { DMA2_Stream3, DMA_REQUEST_SPI4_RX, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_TX = { DMA2_Stream4, DMA_REQUEST_SPI5_TX, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_REQUEST_SPI4_TX, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, BDMA_REQUEST_SPI6_TX, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_REQUEST_SPI1_TX, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_6_RX = { DMA2_Stream6, BDMA_REQUEST_SPI6_RX, DMA_PERIPH_TO_MEMORY, dma_id_14, &dma_init_struct_spi_i2c }; - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Stream0_IRQn, - DMA1_Stream1_IRQn, - DMA1_Stream2_IRQn, - DMA1_Stream3_IRQn, - DMA1_Stream4_IRQn, - DMA1_Stream5_IRQn, - DMA1_Stream6_IRQn, - DMA1_Stream7_IRQn, - DMA2_Stream0_IRQn, - DMA2_Stream1_IRQn, - DMA2_Stream2_IRQn, - DMA2_Stream3_IRQn, - DMA2_Stream4_IRQn, - DMA2_Stream5_IRQn, - DMA2_Stream6_IRQn, - DMA2_Stream7_IRQn, -}; - -#endif - -static DMA_HandleTypeDef *dma_handle[NSTREAM] = {NULL}; -static uint8_t dma_last_sub_instance[NSTREAM]; -static volatile uint32_t dma_enable_mask = 0; -volatile dma_idle_count_t dma_idle; - -#define DMA_INVALID_CHANNEL 0xff // Value stored in dma_last_channel which means invalid - -#if defined(STM32F0) -#define DMA1_IS_CLK_ENABLED() ((RCC->AHBENR & RCC_AHBENR_DMA1EN) != 0) -#define DMA2_IS_CLK_ENABLED() ((RCC->AHBENR & RCC_AHBENR_DMA2EN) != 0) -#else -#define DMA1_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA1EN) != 0) -#define DMA2_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA2EN) != 0) -#endif - -#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - -void DMA1_Stream0_IRQHandler(void) { IRQ_ENTER(DMA1_Stream0_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Stream0_IRQn); } -void DMA1_Stream1_IRQHandler(void) { IRQ_ENTER(DMA1_Stream1_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Stream1_IRQn); } -void DMA1_Stream2_IRQHandler(void) { IRQ_ENTER(DMA1_Stream2_IRQn); if (dma_handle[dma_id_2] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_2]); } IRQ_EXIT(DMA1_Stream2_IRQn); } -void DMA1_Stream3_IRQHandler(void) { IRQ_ENTER(DMA1_Stream3_IRQn); if (dma_handle[dma_id_3] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_3]); } IRQ_EXIT(DMA1_Stream3_IRQn); } -void DMA1_Stream4_IRQHandler(void) { IRQ_ENTER(DMA1_Stream4_IRQn); if (dma_handle[dma_id_4] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_4]); } IRQ_EXIT(DMA1_Stream4_IRQn); } -void DMA1_Stream5_IRQHandler(void) { IRQ_ENTER(DMA1_Stream5_IRQn); if (dma_handle[dma_id_5] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_5]); } IRQ_EXIT(DMA1_Stream5_IRQn); } -void DMA1_Stream6_IRQHandler(void) { IRQ_ENTER(DMA1_Stream6_IRQn); if (dma_handle[dma_id_6] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_6]); } IRQ_EXIT(DMA1_Stream6_IRQn); } -void DMA1_Stream7_IRQHandler(void) { IRQ_ENTER(DMA1_Stream7_IRQn); if (dma_handle[dma_id_7] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_7]); } IRQ_EXIT(DMA1_Stream7_IRQn); } -void DMA2_Stream0_IRQHandler(void) { IRQ_ENTER(DMA2_Stream0_IRQn); if (dma_handle[dma_id_8] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_8]); } IRQ_EXIT(DMA2_Stream0_IRQn); } -void DMA2_Stream1_IRQHandler(void) { IRQ_ENTER(DMA2_Stream1_IRQn); if (dma_handle[dma_id_9] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_9]); } IRQ_EXIT(DMA2_Stream1_IRQn); } -void DMA2_Stream2_IRQHandler(void) { IRQ_ENTER(DMA2_Stream2_IRQn); if (dma_handle[dma_id_10] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_10]); } IRQ_EXIT(DMA2_Stream2_IRQn); } -void DMA2_Stream3_IRQHandler(void) { IRQ_ENTER(DMA2_Stream3_IRQn); if (dma_handle[dma_id_11] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_11]); } IRQ_EXIT(DMA2_Stream3_IRQn); } -void DMA2_Stream4_IRQHandler(void) { IRQ_ENTER(DMA2_Stream4_IRQn); if (dma_handle[dma_id_12] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_12]); } IRQ_EXIT(DMA2_Stream4_IRQn); } -void DMA2_Stream5_IRQHandler(void) { IRQ_ENTER(DMA2_Stream5_IRQn); if (dma_handle[dma_id_13] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_13]); } IRQ_EXIT(DMA2_Stream5_IRQn); } -void DMA2_Stream6_IRQHandler(void) { IRQ_ENTER(DMA2_Stream6_IRQn); if (dma_handle[dma_id_14] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_14]); } IRQ_EXIT(DMA2_Stream6_IRQn); } -void DMA2_Stream7_IRQHandler(void) { IRQ_ENTER(DMA2_Stream7_IRQn); if (dma_handle[dma_id_15] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_15]); } IRQ_EXIT(DMA2_Stream7_IRQn); } - -#elif defined(STM32L4) - -void DMA1_Channel1_IRQHandler(void) { IRQ_ENTER(DMA1_Channel1_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Channel1_IRQn); } -void DMA1_Channel2_IRQHandler(void) { IRQ_ENTER(DMA1_Channel2_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Channel2_IRQn); } -void DMA1_Channel3_IRQHandler(void) { IRQ_ENTER(DMA1_Channel3_IRQn); if (dma_handle[dma_id_2] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_2]); } IRQ_EXIT(DMA1_Channel3_IRQn); } -void DMA1_Channel4_IRQHandler(void) { IRQ_ENTER(DMA1_Channel4_IRQn); if (dma_handle[dma_id_3] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_3]); } IRQ_EXIT(DMA1_Channel4_IRQn); } -void DMA1_Channel5_IRQHandler(void) { IRQ_ENTER(DMA1_Channel5_IRQn); if (dma_handle[dma_id_4] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_4]); } IRQ_EXIT(DMA1_Channel5_IRQn); } -void DMA1_Channel6_IRQHandler(void) { IRQ_ENTER(DMA1_Channel6_IRQn); if (dma_handle[dma_id_5] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_5]); } IRQ_EXIT(DMA1_Channel6_IRQn); } -void DMA1_Channel7_IRQHandler(void) { IRQ_ENTER(DMA1_Channel7_IRQn); if (dma_handle[dma_id_6] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_6]); } IRQ_EXIT(DMA1_Channel7_IRQn); } -void DMA2_Channel1_IRQHandler(void) { IRQ_ENTER(DMA2_Channel1_IRQn); if (dma_handle[dma_id_7] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_7]); } IRQ_EXIT(DMA2_Channel1_IRQn); } -void DMA2_Channel2_IRQHandler(void) { IRQ_ENTER(DMA2_Channel2_IRQn); if (dma_handle[dma_id_8] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_8]); } IRQ_EXIT(DMA2_Channel2_IRQn); } -void DMA2_Channel3_IRQHandler(void) { IRQ_ENTER(DMA2_Channel3_IRQn); if (dma_handle[dma_id_9] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_9]); } IRQ_EXIT(DMA2_Channel3_IRQn); } -void DMA2_Channel4_IRQHandler(void) { IRQ_ENTER(DMA2_Channel4_IRQn); if (dma_handle[dma_id_10] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_10]);} IRQ_EXIT(DMA2_Channel4_IRQn); } -void DMA2_Channel5_IRQHandler(void) { IRQ_ENTER(DMA2_Channel5_IRQn); if (dma_handle[dma_id_11] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_11]);} IRQ_EXIT(DMA2_Channel5_IRQn); } -void DMA2_Channel6_IRQHandler(void) { IRQ_ENTER(DMA2_Channel6_IRQn); if (dma_handle[dma_id_12] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_12]);} IRQ_EXIT(DMA2_Channel6_IRQn); } -void DMA2_Channel7_IRQHandler(void) { IRQ_ENTER(DMA2_Channel7_IRQn); if (dma_handle[dma_id_13] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_13]);} IRQ_EXIT(DMA2_Channel7_IRQn); } - -#endif - -// Resets the idle counter for the DMA controller associated with dma_id. -static void dma_tickle(dma_id_t dma_id) { - dma_idle.counter[(dma_id < NSTREAMS_PER_CONTROLLER) ? 0 : 1] = 1; -} - -static void dma_enable_clock(dma_id_t dma_id) { - // We don't want dma_tick_handler() to turn off the clock right after we - // enable it, so we need to mark the channel in use in an atomic fashion. - mp_uint_t irq_state = MICROPY_BEGIN_ATOMIC_SECTION(); - uint32_t old_enable_mask = dma_enable_mask; - dma_enable_mask |= (1 << dma_id); - MICROPY_END_ATOMIC_SECTION(irq_state); - - if (dma_id < NSTREAMS_PER_CONTROLLER) { - if (((old_enable_mask & DMA1_ENABLE_MASK) == 0) && !DMA1_IS_CLK_ENABLED()) { - __HAL_RCC_DMA1_CLK_ENABLE(); - - // We just turned on the clock. This means that anything stored - // in dma_last_channel (for DMA1) needs to be invalidated. - - for (int channel = 0; channel < NSTREAMS_PER_CONTROLLER; channel++) { - dma_last_sub_instance[channel] = DMA_INVALID_CHANNEL; - } - } - } else { - if (((old_enable_mask & DMA2_ENABLE_MASK) == 0) && !DMA2_IS_CLK_ENABLED()) { - __HAL_RCC_DMA2_CLK_ENABLE(); - - // We just turned on the clock. This means that anything stored - // in dma_last_channel (for DMA1) needs to be invalidated. - - for (int channel = NSTREAMS_PER_CONTROLLER; channel < NSTREAM; channel++) { - dma_last_sub_instance[channel] = DMA_INVALID_CHANNEL; - } - } - } -} - -static void dma_disable_clock(dma_id_t dma_id) { - // We just mark the clock as disabled here, but we don't actually disable it. - // We wait for the timer to expire first, which means that back-to-back - // transfers don't have to initialize as much. - dma_tickle(dma_id); - dma_enable_mask &= ~(1 << dma_id); -} - -void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data) { - // initialise parameters - dma->Instance = dma_descr->instance; - dma->Init = *dma_descr->init; - dma->Init.Direction = dma_descr->transfer_direction; - #if defined(STM32L4) || defined(STM32H7) - dma->Init.Request = dma_descr->sub_instance; - #else - #if !defined(STM32F0) - dma->Init.Channel = dma_descr->sub_instance; - #endif - #endif - // half of __HAL_LINKDMA(data, xxx, *dma) - // caller must implement other half by doing: data->xxx = dma - dma->Parent = data; -} - -void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data){ - // Some drivers allocate the DMA_HandleTypeDef from the stack - // (i.e. dac, i2c, spi) and for those cases we need to clear the - // structure so we don't get random values from the stack) - memset(dma, 0, sizeof(*dma)); - - if (dma_descr != NULL) { - dma_id_t dma_id = dma_descr->id; - - dma_init_handle(dma, dma_descr, data); - // set global pointer for IRQ handler - dma_handle[dma_id] = dma; - - dma_enable_clock(dma_id); - - #if defined(STM32L4) - // Always reset and configure the L4 DMA peripheral - // (dma->State is set to HAL_DMA_STATE_RESET by memset above) - // TODO: understand how L4 DMA works so this is not needed - HAL_DMA_DeInit(dma); - HAL_DMA_Init(dma); - NVIC_SetPriority(IRQn_NONNEG(dma_irqn[dma_id]), IRQ_PRI_DMA); - #else - // if this stream was previously configured for this channel/request then we - // can skip most of the initialisation - uint8_t sub_inst = DMA_SUB_INSTANCE_AS_UINT8(dma_descr->sub_instance); - if (dma_last_sub_instance[dma_id] != sub_inst) { - dma_last_sub_instance[dma_id] = sub_inst; - - // reset and configure DMA peripheral - // (dma->State is set to HAL_DMA_STATE_RESET by memset above) - HAL_DMA_DeInit(dma); - HAL_DMA_Init(dma); - NVIC_SetPriority(IRQn_NONNEG(dma_irqn[dma_id]), IRQ_PRI_DMA); - #if defined(STM32F0) - if (dma->Instance < DMA2_Channel1) { - __HAL_DMA1_REMAP(dma_descr->sub_instance); - } else { - __HAL_DMA2_REMAP(dma_descr->sub_instance); - } - #endif - } else { - // only necessary initialization - dma->State = HAL_DMA_STATE_READY; -#if defined(STM32F4) || defined(STM32F7) - // calculate DMA base address and bitshift to be used in IRQ handler - extern uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); - DMA_CalcBaseAndBitshift(dma); -#endif - } - #endif - - HAL_NVIC_EnableIRQ(dma_irqn[dma_id]); - } -} - -void dma_deinit(const dma_descr_t *dma_descr) { - if (dma_descr != NULL) { - HAL_NVIC_DisableIRQ(dma_irqn[dma_descr->id]); - dma_handle[dma_descr->id] = NULL; - - dma_disable_clock(dma_descr->id); - } -} - -void dma_invalidate_channel(const dma_descr_t *dma_descr) { - if (dma_descr != NULL) { - dma_id_t dma_id = dma_descr->id; - if (dma_last_sub_instance[dma_id] == DMA_SUB_INSTANCE_AS_UINT8(dma_descr->sub_instance) ) { - dma_last_sub_instance[dma_id] = DMA_INVALID_CHANNEL; - } - } -} - -// Called from the SysTick handler -// We use LSB of tick to select which controller to process -void dma_idle_handler(int tick) { - static const uint32_t controller_mask[] = { - DMA1_ENABLE_MASK, DMA2_ENABLE_MASK - }; - { - int controller = tick & 1; - if (dma_idle.counter[controller] == 0) { - return; - } - if (++dma_idle.counter[controller] > DMA_IDLE_TICK_MAX) { - if ((dma_enable_mask & controller_mask[controller]) == 0) { - // Nothing is active and we've reached our idle timeout, - // Now we'll really disable the clock. - dma_idle.counter[controller] = 0; - if (controller == 0) { - __HAL_RCC_DMA1_CLK_DISABLE(); - } else { - __HAL_RCC_DMA2_CLK_DISABLE(); - } - } else { - // Something is still active, but the counter never got - // reset, so we'll reset the counter here. - dma_idle.counter[controller] = 1; - } - } - } -} diff --git a/ports/stm32/dma.h b/ports/stm32/dma.h deleted file mode 100644 index cacabe9253..0000000000 --- a/ports/stm32/dma.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_DMA_H -#define MICROPY_INCLUDED_STM32_DMA_H - -typedef struct _dma_descr_t dma_descr_t; - -#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - -extern const dma_descr_t dma_I2C_1_RX; -extern const dma_descr_t dma_SPI_3_RX; -extern const dma_descr_t dma_I2C_4_RX; -extern const dma_descr_t dma_I2C_3_RX; -extern const dma_descr_t dma_I2C_2_RX; -extern const dma_descr_t dma_SPI_2_RX; -extern const dma_descr_t dma_SPI_2_TX; -extern const dma_descr_t dma_I2C_3_TX; -extern const dma_descr_t dma_I2C_4_TX; -extern const dma_descr_t dma_DAC_1_TX; -extern const dma_descr_t dma_DAC_2_TX; -extern const dma_descr_t dma_SPI_3_TX; -extern const dma_descr_t dma_I2C_1_TX; -extern const dma_descr_t dma_I2C_2_TX; -extern const dma_descr_t dma_SDMMC_2_RX; -extern const dma_descr_t dma_SPI_1_RX; -extern const dma_descr_t dma_SPI_5_RX; -extern const dma_descr_t dma_SDIO_0_RX; -extern const dma_descr_t dma_SPI_4_RX; -extern const dma_descr_t dma_SPI_5_TX; -extern const dma_descr_t dma_SPI_4_TX; -extern const dma_descr_t dma_SPI_6_TX; -extern const dma_descr_t dma_SPI_1_TX; -extern const dma_descr_t dma_SDMMC_2_TX; -extern const dma_descr_t dma_SPI_6_RX; -extern const dma_descr_t dma_SDIO_0_TX; - -#elif defined(STM32L4) - -extern const dma_descr_t dma_ADC_1_RX; -extern const dma_descr_t dma_ADC_2_RX; -extern const dma_descr_t dma_SPI_1_RX; -extern const dma_descr_t dma_I2C_3_TX; -extern const dma_descr_t dma_ADC_3_RX; -extern const dma_descr_t dma_SPI_1_TX; -extern const dma_descr_t dma_I2C_3_RX; -extern const dma_descr_t dma_DAC_1_TX; -extern const dma_descr_t dma_SPI_2_RX; -extern const dma_descr_t dma_I2C_2_TX; -extern const dma_descr_t dma_DAC_2_TX; -extern const dma_descr_t dma_SPI_2_TX; -extern const dma_descr_t dma_I2C_2_RX; -extern const dma_descr_t dma_I2C_1_TX; -extern const dma_descr_t dma_I2C_1_RX; -extern const dma_descr_t dma_SPI_3_RX; -extern const dma_descr_t dma_SPI_3_TX; -extern const dma_descr_t dma_SDIO_0_TX; -extern const dma_descr_t dma_SDIO_0_RX; - -#endif - -typedef union { - uint16_t enabled; // Used to test if both counters are == 0 - uint8_t counter[2]; -} dma_idle_count_t; -extern volatile dma_idle_count_t dma_idle; -#define DMA_IDLE_ENABLED() (dma_idle.enabled != 0) - -#define DMA_SYSTICK_MASK 0x0e -#define DMA_MSECS_PER_SYSTICK (DMA_SYSTICK_MASK + 1) -#define DMA_IDLE_TICK_MAX (8) // 128 msec -#define DMA_IDLE_TICK(tick) (((tick) & DMA_SYSTICK_MASK) == 0) - - -void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data); -void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data); -void dma_deinit(const dma_descr_t *dma_descr); -void dma_invalidate_channel(const dma_descr_t *dma_descr); -void dma_idle_handler(int controller); - -#endif // MICROPY_INCLUDED_STM32_DMA_H diff --git a/ports/stm32/extint.c b/ports/stm32/extint.c deleted file mode 100644 index 70bf7eae7e..0000000000 --- a/ports/stm32/extint.c +++ /dev/null @@ -1,552 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "pin.h" -#include "extint.h" -#include "irq.h" - -/// \moduleref pyb -/// \class ExtInt - configure I/O pins to interrupt on external events -/// -/// There are a total of 22 interrupt lines. 16 of these can come from GPIO pins -/// and the remaining 6 are from internal sources. -/// -/// For lines 0 thru 15, a given line can map to the corresponding line from an -/// arbitrary port. So line 0 can map to Px0 where x is A, B, C, ... and -/// line 1 can map to Px1 where x is A, B, C, ... -/// -/// def callback(line): -/// print("line =", line) -/// -/// Note: ExtInt will automatically configure the gpio line as an input. -/// -/// extint = pyb.ExtInt(pin, pyb.ExtInt.IRQ_FALLING, pyb.Pin.PULL_UP, callback) -/// -/// Now every time a falling edge is seen on the X1 pin, the callback will be -/// called. Caution: mechanical pushbuttons have "bounce" and pushing or -/// releasing a switch will often generate multiple edges. -/// See: http://www.eng.utah.edu/~cs5780/debouncing.pdf for a detailed -/// explanation, along with various techniques for debouncing. -/// -/// Trying to register 2 callbacks onto the same pin will throw an exception. -/// -/// If pin is passed as an integer, then it is assumed to map to one of the -/// internal interrupt sources, and must be in the range 16 thru 22. -/// -/// All other pin objects go through the pin mapper to come up with one of the -/// gpio pins. -/// -/// extint = pyb.ExtInt(pin, mode, pull, callback) -/// -/// Valid modes are pyb.ExtInt.IRQ_RISING, pyb.ExtInt.IRQ_FALLING, -/// pyb.ExtInt.IRQ_RISING_FALLING, pyb.ExtInt.EVT_RISING, -/// pyb.ExtInt.EVT_FALLING, and pyb.ExtInt.EVT_RISING_FALLING. -/// -/// Only the IRQ_xxx modes have been tested. The EVT_xxx modes have -/// something to do with sleep mode and the WFE instruction. -/// -/// Valid pull values are pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN, pyb.Pin.PULL_NONE. -/// -/// There is also a C API, so that drivers which require EXTI interrupt lines -/// can also use this code. See extint.h for the available functions and -/// usrsw.h for an example of using this. - -// TODO Add python method to change callback object. - -#define EXTI_OFFSET (EXTI_BASE - PERIPH_BASE) - -// Macro used to set/clear the bit corresponding to the line in the IMR/EMR -// register in an atomic fashion by using bitband addressing. -#define EXTI_MODE_BB(mode, line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + (mode)) * 32) + ((line) * 4))) - -#if defined(STM32L4) -// The L4 MCU supports 40 Events/IRQs lines of the type configurable and direct. -// Here we only support configurable line types. Details, see page 330 of RM0351, Rev 1. -// The USB_FS_WAKUP event is a direct type and there is no support for it. -#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR1) -#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR1) -#define EXTI_RTSR EXTI->RTSR1 -#define EXTI_FTSR EXTI->FTSR1 -#elif defined(STM32H7) -#define EXTI_Mode_Interrupt offsetof(EXTI_Core_TypeDef, IMR1) -#define EXTI_Mode_Event offsetof(EXTI_Core_TypeDef, EMR1) -#define EXTI_RTSR EXTI->RTSR1 -#define EXTI_FTSR EXTI->FTSR1 -#else -#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR) -#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR) -#define EXTI_RTSR EXTI->RTSR -#define EXTI_FTSR EXTI->FTSR -#endif - -#define EXTI_SWIER_BB(line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + offsetof(EXTI_TypeDef, SWIER)) * 32) + ((line) * 4))) - -typedef struct { - mp_obj_base_t base; - mp_int_t line; -} extint_obj_t; - -STATIC uint8_t pyb_extint_mode[EXTI_NUM_VECTORS]; -STATIC bool pyb_extint_hard_irq[EXTI_NUM_VECTORS]; - -// The callback arg is a small-int or a ROM Pin object, so no need to scan by GC -STATIC mp_obj_t pyb_extint_callback_arg[EXTI_NUM_VECTORS]; - -#if !defined(ETH) -#define ETH_WKUP_IRQn 62 // Some MCUs don't have ETH, but we want a value to put in our table -#endif -#if !defined(OTG_HS_WKUP_IRQn) -#define OTG_HS_WKUP_IRQn 76 // Some MCUs don't have HS, but we want a value to put in our table -#endif -#if !defined(OTG_FS_WKUP_IRQn) -#define OTG_FS_WKUP_IRQn 42 // Some MCUs don't have FS IRQ, but we want a value to put in our table -#endif - -STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = { - #if defined(STM32F0) - EXTI0_1_IRQn, EXTI0_1_IRQn, EXTI2_3_IRQn, EXTI2_3_IRQn, - EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, - EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, - EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, - #else - EXTI0_IRQn, EXTI1_IRQn, EXTI2_IRQn, EXTI3_IRQn, EXTI4_IRQn, - EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, - EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, - EXTI15_10_IRQn, - #if defined(STM32L4) - PVD_PVM_IRQn, - #else - PVD_IRQn, - #endif - RTC_Alarm_IRQn, - OTG_FS_WKUP_IRQn, - ETH_WKUP_IRQn, - OTG_HS_WKUP_IRQn, - TAMP_STAMP_IRQn, - RTC_WKUP_IRQn, - #endif -}; - -// Set override_callback_obj to true if you want to unconditionally set the -// callback function. -uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj) { - const pin_obj_t *pin = NULL; - uint v_line; - - if (MP_OBJ_IS_INT(pin_obj)) { - // If an integer is passed in, then use it to identify lines 16 thru 22 - // We expect lines 0 thru 15 to be passed in as a pin, so that we can - // get both the port number and line number. - v_line = mp_obj_get_int(pin_obj); - if (v_line < 16) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "ExtInt vector %d < 16, use a Pin object", v_line)); - } - if (v_line >= EXTI_NUM_VECTORS) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "ExtInt vector %d >= max of %d", v_line, EXTI_NUM_VECTORS)); - } - } else { - pin = pin_find(pin_obj); - v_line = pin->pin; - } - if (mode != GPIO_MODE_IT_RISING && - mode != GPIO_MODE_IT_FALLING && - mode != GPIO_MODE_IT_RISING_FALLING && - mode != GPIO_MODE_EVT_RISING && - mode != GPIO_MODE_EVT_FALLING && - mode != GPIO_MODE_EVT_RISING_FALLING) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid ExtInt Mode: %d", mode)); - } - if (pull != GPIO_NOPULL && - pull != GPIO_PULLUP && - pull != GPIO_PULLDOWN) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid ExtInt Pull: %d", pull)); - } - - mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[v_line]; - if (!override_callback_obj && *cb != mp_const_none && callback_obj != mp_const_none) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "ExtInt vector %d is already in use", v_line)); - } - - // We need to update callback atomically, so we disable the line - // before we update anything. - - extint_disable(v_line); - - *cb = callback_obj; - pyb_extint_mode[v_line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000 - EXTI_Mode_Interrupt : EXTI_Mode_Event; - - if (*cb != mp_const_none) { - pyb_extint_hard_irq[v_line] = true; - pyb_extint_callback_arg[v_line] = MP_OBJ_NEW_SMALL_INT(v_line); - - mp_hal_gpio_clock_enable(pin->gpio); - GPIO_InitTypeDef exti; - exti.Pin = pin->pin_mask; - exti.Mode = mode; - exti.Pull = pull; - exti.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(pin->gpio, &exti); - - // Calling HAL_GPIO_Init does an implicit extint_enable - - /* Enable and set NVIC Interrupt to the lowest priority */ - NVIC_SetPriority(IRQn_NONNEG(nvic_irq_channel[v_line]), IRQ_PRI_EXTINT); - HAL_NVIC_EnableIRQ(nvic_irq_channel[v_line]); - } - return v_line; -} - -// This function is intended to be used by the Pin.irq() method -void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj) { - uint32_t line = pin->pin; - - // Check if the ExtInt line is already in use by another Pin/ExtInt - mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line]; - if (*cb != mp_const_none && MP_OBJ_FROM_PTR(pin) != pyb_extint_callback_arg[line]) { - if (MP_OBJ_IS_SMALL_INT(pyb_extint_callback_arg[line])) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "ExtInt vector %d is already in use", line)); - } else { - const pin_obj_t *other_pin = (const pin_obj_t*)pyb_extint_callback_arg[line]; - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "IRQ resource already taken by Pin('%q')", other_pin->name)); - } - } - - extint_disable(line); - - *cb = callback_obj; - pyb_extint_mode[line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000 - EXTI_Mode_Interrupt : EXTI_Mode_Event; - - if (*cb != mp_const_none) { - // Configure and enable the callback - - pyb_extint_hard_irq[line] = hard_irq; - pyb_extint_callback_arg[line] = MP_OBJ_FROM_PTR(pin); - - // Route the GPIO to EXTI - __HAL_RCC_SYSCFG_CLK_ENABLE(); - SYSCFG->EXTICR[line >> 2] = - (SYSCFG->EXTICR[line >> 2] & ~(0x0f << (4 * (line & 0x03)))) - | ((uint32_t)(GPIO_GET_INDEX(pin->gpio)) << (4 * (line & 0x03))); - - // Enable or disable the rising detector - if ((mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING) { - EXTI_RTSR |= 1 << line; - } else { - EXTI_RTSR &= ~(1 << line); - } - - // Enable or disable the falling detector - if ((mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING) { - EXTI_FTSR |= 1 << line; - } else { - EXTI_FTSR &= ~(1 << line); - } - - // Configure the NVIC - NVIC_SetPriority(IRQn_NONNEG(nvic_irq_channel[line]), IRQ_PRI_EXTINT); - HAL_NVIC_EnableIRQ(nvic_irq_channel[line]); - - // Enable the interrupt - extint_enable(line); - } -} - -void extint_enable(uint line) { - if (line >= EXTI_NUM_VECTORS) { - return; - } - #if defined(STM32F0) || defined(STM32F7) || defined(STM32H7) - // The Cortex-M7 doesn't have bitband support. - mp_uint_t irq_state = disable_irq(); - if (pyb_extint_mode[line] == EXTI_Mode_Interrupt) { - #if defined(STM32H7) - EXTI_D1->IMR1 |= (1 << line); - #else - EXTI->IMR |= (1 << line); - #endif - } else { - #if defined(STM32H7) - EXTI_D1->EMR1 |= (1 << line); - #else - EXTI->EMR |= (1 << line); - #endif - } - enable_irq(irq_state); - #else - // Since manipulating IMR/EMR is a read-modify-write, and we want this to - // be atomic, we use the bit-band area to just affect the bit we're - // interested in. - EXTI_MODE_BB(pyb_extint_mode[line], line) = 1; - #endif -} - -void extint_disable(uint line) { - if (line >= EXTI_NUM_VECTORS) { - return; - } - - #if defined(STM32F0) || defined(STM32F7) || defined(STM32H7) - // The Cortex-M7 doesn't have bitband support. - mp_uint_t irq_state = disable_irq(); - #if defined(STM32H7) - EXTI_D1->IMR1 &= ~(1 << line); - EXTI_D1->EMR1 &= ~(1 << line); - #else - EXTI->IMR &= ~(1 << line); - EXTI->EMR &= ~(1 << line); - #endif - enable_irq(irq_state); - #else - // Since manipulating IMR/EMR is a read-modify-write, and we want this to - // be atomic, we use the bit-band area to just affect the bit we're - // interested in. - EXTI_MODE_BB(EXTI_Mode_Interrupt, line) = 0; - EXTI_MODE_BB(EXTI_Mode_Event, line) = 0; - #endif -} - -void extint_swint(uint line) { - if (line >= EXTI_NUM_VECTORS) { - return; - } - // we need 0 to 1 transition to trigger the interrupt -#if defined(STM32L4) || defined(STM32H7) - EXTI->SWIER1 &= ~(1 << line); - EXTI->SWIER1 |= (1 << line); -#else - EXTI->SWIER &= ~(1 << line); - EXTI->SWIER |= (1 << line); -#endif -} - -/// \method line() -/// Return the line number that the pin is mapped to. -STATIC mp_obj_t extint_obj_line(mp_obj_t self_in) { - extint_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->line); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_line_obj, extint_obj_line); - -/// \method enable() -/// Enable a disabled interrupt. -STATIC mp_obj_t extint_obj_enable(mp_obj_t self_in) { - extint_obj_t *self = self_in; - extint_enable(self->line); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_enable_obj, extint_obj_enable); - -/// \method disable() -/// Disable the interrupt associated with the ExtInt object. -/// This could be useful for debouncing. -STATIC mp_obj_t extint_obj_disable(mp_obj_t self_in) { - extint_obj_t *self = self_in; - extint_disable(self->line); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_disable_obj, extint_obj_disable); - -/// \method swint() -/// Trigger the callback from software. -STATIC mp_obj_t extint_obj_swint(mp_obj_t self_in) { - extint_obj_t *self = self_in; - extint_swint(self->line); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_swint_obj, extint_obj_swint); - -// TODO document as a staticmethod -/// \classmethod regs() -/// Dump the values of the EXTI registers. -STATIC mp_obj_t extint_regs(void) { - #if defined(STM32L4) - printf("EXTI_IMR1 %08x\n", (unsigned int)EXTI->IMR1); - printf("EXTI_IMR2 %08x\n", (unsigned int)EXTI->IMR2); - printf("EXTI_EMR1 %08x\n", (unsigned int)EXTI->EMR1); - printf("EXTI_EMR2 %08x\n", (unsigned int)EXTI->EMR2); - printf("EXTI_RTSR1 %08x\n", (unsigned int)EXTI->RTSR1); - printf("EXTI_RTSR2 %08x\n", (unsigned int)EXTI->RTSR2); - printf("EXTI_FTSR1 %08x\n", (unsigned int)EXTI->FTSR1); - printf("EXTI_FTSR2 %08x\n", (unsigned int)EXTI->FTSR2); - printf("EXTI_SWIER1 %08x\n", (unsigned int)EXTI->SWIER1); - printf("EXTI_SWIER2 %08x\n", (unsigned int)EXTI->SWIER2); - printf("EXTI_PR1 %08x\n", (unsigned int)EXTI->PR1); - printf("EXTI_PR2 %08x\n", (unsigned int)EXTI->PR2); - #elif defined(STM32H7) - printf("EXTI_IMR1 %08x\n", (unsigned int)EXTI_D1->IMR1); - printf("EXTI_IMR2 %08x\n", (unsigned int)EXTI_D1->IMR2); - printf("EXTI_IMR3 %08x\n", (unsigned int)EXTI_D1->IMR3); - printf("EXTI_EMR1 %08x\n", (unsigned int)EXTI_D1->EMR1); - printf("EXTI_EMR2 %08x\n", (unsigned int)EXTI_D1->EMR2); - printf("EXTI_EMR3 %08x\n", (unsigned int)EXTI_D1->EMR3); - printf("EXTI_RTSR1 %08x\n", (unsigned int)EXTI->RTSR1); - printf("EXTI_RTSR2 %08x\n", (unsigned int)EXTI->RTSR2); - printf("EXTI_RTSR3 %08x\n", (unsigned int)EXTI->RTSR3); - printf("EXTI_FTSR1 %08x\n", (unsigned int)EXTI->FTSR1); - printf("EXTI_FTSR2 %08x\n", (unsigned int)EXTI->FTSR2); - printf("EXTI_FTSR3 %08x\n", (unsigned int)EXTI->FTSR3); - printf("EXTI_SWIER1 %08x\n", (unsigned int)EXTI->SWIER1); - printf("EXTI_SWIER2 %08x\n", (unsigned int)EXTI->SWIER2); - printf("EXTI_SWIER3 %08x\n", (unsigned int)EXTI->SWIER3); - printf("EXTI_PR1 %08x\n", (unsigned int)EXTI_D1->PR1); - printf("EXTI_PR2 %08x\n", (unsigned int)EXTI_D1->PR2); - printf("EXTI_PR3 %08x\n", (unsigned int)EXTI_D1->PR3); - #else - printf("EXTI_IMR %08x\n", (unsigned int)EXTI->IMR); - printf("EXTI_EMR %08x\n", (unsigned int)EXTI->EMR); - printf("EXTI_RTSR %08x\n", (unsigned int)EXTI->RTSR); - printf("EXTI_FTSR %08x\n", (unsigned int)EXTI->FTSR); - printf("EXTI_SWIER %08x\n", (unsigned int)EXTI->SWIER); - printf("EXTI_PR %08x\n", (unsigned int)EXTI->PR); - #endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(extint_regs_fun_obj, extint_regs); -STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(extint_regs_obj, (mp_obj_t)&extint_regs_fun_obj); - -/// \classmethod \constructor(pin, mode, pull, callback) -/// Create an ExtInt object: -/// -/// - `pin` is the pin on which to enable the interrupt (can be a pin object or any valid pin name). -/// - `mode` can be one of: -/// - `ExtInt.IRQ_RISING` - trigger on a rising edge; -/// - `ExtInt.IRQ_FALLING` - trigger on a falling edge; -/// - `ExtInt.IRQ_RISING_FALLING` - trigger on a rising or falling edge. -/// - `pull` can be one of: -/// - `pyb.Pin.PULL_NONE` - no pull up or down resistors; -/// - `pyb.Pin.PULL_UP` - enable the pull-up resistor; -/// - `pyb.Pin.PULL_DOWN` - enable the pull-down resistor. -/// - `callback` is the function to call when the interrupt triggers. The -/// callback function must accept exactly 1 argument, which is the line that -/// triggered the interrupt. -STATIC const mp_arg_t pyb_extint_make_new_args[] = { - { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pull, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_callback, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -#define PYB_EXTINT_MAKE_NEW_NUM_ARGS MP_ARRAY_SIZE(pyb_extint_make_new_args) - -STATIC mp_obj_t extint_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // type_in == extint_obj_type - - // parse args - mp_arg_val_t vals[PYB_EXTINT_MAKE_NEW_NUM_ARGS]; - mp_arg_parse_all_kw_array(n_args, n_kw, args, PYB_EXTINT_MAKE_NEW_NUM_ARGS, pyb_extint_make_new_args, vals); - - extint_obj_t *self = m_new_obj(extint_obj_t); - self->base.type = type; - self->line = extint_register(vals[0].u_obj, vals[1].u_int, vals[2].u_int, vals[3].u_obj, false); - - return self; -} - -STATIC void extint_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - extint_obj_t *self = self_in; - mp_printf(print, "", self->line); -} - -STATIC const mp_rom_map_elem_t extint_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_line), MP_ROM_PTR(&extint_obj_line_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&extint_obj_enable_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&extint_obj_disable_obj) }, - { MP_ROM_QSTR(MP_QSTR_swint), MP_ROM_PTR(&extint_obj_swint_obj) }, - { MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&extint_regs_obj) }, - - // class constants - /// \constant IRQ_RISING - interrupt on a rising edge - /// \constant IRQ_FALLING - interrupt on a falling edge - /// \constant IRQ_RISING_FALLING - interrupt on a rising or falling edge - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_MODE_IT_RISING) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_MODE_IT_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING_FALLING), MP_ROM_INT(GPIO_MODE_IT_RISING_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_EVT_RISING), MP_ROM_INT(GPIO_MODE_EVT_RISING) }, - { MP_ROM_QSTR(MP_QSTR_EVT_FALLING), MP_ROM_INT(GPIO_MODE_EVT_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_EVT_RISING_FALLING), MP_ROM_INT(GPIO_MODE_EVT_RISING_FALLING) }, -}; - -STATIC MP_DEFINE_CONST_DICT(extint_locals_dict, extint_locals_dict_table); - -const mp_obj_type_t extint_type = { - { &mp_type_type }, - .name = MP_QSTR_ExtInt, - .print = extint_obj_print, - .make_new = extint_make_new, - .locals_dict = (mp_obj_dict_t*)&extint_locals_dict, -}; - -void extint_init0(void) { - for (int i = 0; i < PYB_EXTI_NUM_VECTORS; i++) { - MP_STATE_PORT(pyb_extint_callback)[i] = mp_const_none; - pyb_extint_mode[i] = EXTI_Mode_Interrupt; - } -} - -// Interrupt handler -void Handle_EXTI_Irq(uint32_t line) { - if (__HAL_GPIO_EXTI_GET_FLAG(1 << line)) { - __HAL_GPIO_EXTI_CLEAR_FLAG(1 << line); - if (line < EXTI_NUM_VECTORS) { - mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line]; - if (*cb != mp_const_none) { - // If it's a soft IRQ handler then just schedule callback for later - if (!pyb_extint_hard_irq[line]) { - mp_sched_schedule(*cb, pyb_extint_callback_arg[line]); - return; - } - - mp_sched_lock(); - // When executing code within a handler we must lock the GC to prevent - // any memory allocations. We must also catch any exceptions. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(*cb, pyb_extint_callback_arg[line]); - nlr_pop(); - } else { - // Uncaught exception; disable the callback so it doesn't run again. - *cb = mp_const_none; - extint_disable(line); - printf("Uncaught exception in ExtInt interrupt handler line %u\n", (unsigned int)line); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - mp_sched_unlock(); - } - } - } -} diff --git a/ports/stm32/extint.h b/ports/stm32/extint.h deleted file mode 100644 index c4a4ae6bb9..0000000000 --- a/ports/stm32/extint.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_EXTINT_H -#define MICROPY_INCLUDED_STM32_EXTINT_H - -// Vectors 0-15 are for regular pins -// Vectors 16-22 are for internal sources. -// -// Use the following constants for the internal sources: - -#define EXTI_PVD_OUTPUT (16) -#define EXTI_RTC_ALARM (17) -#define EXTI_USB_OTG_FS_WAKEUP (18) -#define EXTI_ETH_WAKEUP (19) -#define EXTI_USB_OTG_HS_WAKEUP (20) -#define EXTI_RTC_TIMESTAMP (21) -#define EXTI_RTC_WAKEUP (22) -#if defined(STM32F7) -#define EXTI_LPTIM1_ASYNC_EVENT (23) -#endif - -#define EXTI_NUM_VECTORS (PYB_EXTI_NUM_VECTORS) - -#define EXTI_MODE_INTERRUPT (offsetof(EXTI_TypeDef, IMR)) -#define EXTI_MODE_EVENT (offsetof(EXTI_TypeDef, EMR)) - -#define EXTI_TRIGGER_RISING (offsetof(EXTI_TypeDef, RTSR)) -#define EXTI_TRIGGER_FALLING (offsetof(EXTI_TypeDef, FTSR)) -#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING + EXTI_TRIGGER_FALLING) // just different from RISING or FALLING - -void extint_init0(void); - -uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj); -void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj); - -void extint_enable(uint line); -void extint_disable(uint line); -void extint_swint(uint line); - -void Handle_EXTI_Irq(uint32_t line); - -extern const mp_obj_type_t extint_type; - -#endif // MICROPY_INCLUDED_STM32_EXTINT_H diff --git a/ports/stm32/fatfs_port.c b/ports/stm32/fatfs_port.c deleted file mode 100644 index d0e311ed77..0000000000 --- a/ports/stm32/fatfs_port.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "rtc.h" - -DWORD get_fattime(void) { - rtc_init_finalise(); - RTC_TimeTypeDef time; - RTC_DateTypeDef date; - HAL_RTC_GetTime(&RTCHandle, &time, RTC_FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, RTC_FORMAT_BIN); - return ((2000 + date.Year - 1980) << 25) | ((date.Month) << 21) | ((date.Date) << 16) | ((time.Hours) << 11) | ((time.Minutes) << 5) | (time.Seconds / 2); -} diff --git a/ports/stm32/flash.c b/ports/stm32/flash.c deleted file mode 100644 index 26f76a1747..0000000000 --- a/ports/stm32/flash.c +++ /dev/null @@ -1,331 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/misc.h" -#include "flash.h" - -typedef struct { - uint32_t base_address; - uint32_t sector_size; - uint32_t sector_count; -} flash_layout_t; - -#if defined(STM32F0) - -static const flash_layout_t flash_layout[] = { - { FLASH_BASE, FLASH_PAGE_SIZE, (FLASH_BANK1_END + 1 - FLASH_BASE) / FLASH_PAGE_SIZE }, -}; - -#elif defined(STM32F4) - -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x04000, 4 }, - { 0x08010000, 0x10000, 1 }, - { 0x08020000, 0x20000, 3 }, - #if defined(FLASH_SECTOR_8) - { 0x08080000, 0x20000, 4 }, - #endif - #if defined(FLASH_SECTOR_12) - { 0x08100000, 0x04000, 4 }, - { 0x08110000, 0x10000, 1 }, - { 0x08120000, 0x20000, 7 }, - #endif -}; - -#elif defined(STM32F7) - -// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to -// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7 -#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR - -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x08000, 4 }, - { 0x08020000, 0x20000, 1 }, - { 0x08040000, 0x40000, 3 }, -}; - -#elif defined(STM32L4) - -static const flash_layout_t flash_layout[] = { - { (uint32_t)FLASH_BASE, (uint32_t)FLASH_PAGE_SIZE, 512 }, -}; - -#elif defined(STM32H7) - -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x20000, 16 }, -}; - -#else -#error Unsupported processor -#endif - -#if defined(STM32L4) || defined(STM32H7) - -// get the bank of a given flash address -static uint32_t get_bank(uint32_t addr) { - #if defined(STM32H7) - if (READ_BIT(FLASH->OPTCR, FLASH_OPTCR_SWAP_BANK) == 0) { - #else - if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) { - #endif - // no bank swap - if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) { - return FLASH_BANK_1; - } else { - return FLASH_BANK_2; - } - } else { - // bank swap - if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) { - return FLASH_BANK_2; - } else { - return FLASH_BANK_1; - } - } -} - -#if defined(STM32L4) -// get the page of a given flash address -static uint32_t get_page(uint32_t addr) { - if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) { - // bank 1 - return (addr - FLASH_BASE) / FLASH_PAGE_SIZE; - } else { - // bank 2 - return (addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE; - } -} -#endif - -#endif - -uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { - if (addr >= flash_layout[0].base_address) { - uint32_t sector_index = 0; - for (int i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) { - for (int j = 0; j < flash_layout[i].sector_count; ++j) { - uint32_t sector_start_next = flash_layout[i].base_address - + (j + 1) * flash_layout[i].sector_size; - if (addr < sector_start_next) { - if (start_addr != NULL) { - *start_addr = flash_layout[i].base_address - + j * flash_layout[i].sector_size; - } - if (size != NULL) { - *size = flash_layout[i].sector_size; - } - return sector_index; - } - ++sector_index; - } - } - } - return 0; -} - -void flash_erase(uint32_t flash_dest, uint32_t num_word32) { - // check there is something to write - if (num_word32 == 0) { - return; - } - - // unlock - HAL_FLASH_Unlock(); - - FLASH_EraseInitTypeDef EraseInitStruct; - - #if defined(STM32F0) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_WRPERR | FLASH_FLAG_PGERR); - EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; - EraseInitStruct.PageAddress = flash_dest; - EraseInitStruct.NbPages = (4 * num_word32 + FLASH_PAGE_SIZE - 4) / FLASH_PAGE_SIZE; - #elif defined(STM32L4) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS); - - // erase the sector(s) - // The sector returned by flash_get_sector_info can not be used - // as the flash has on each bank 0/1 pages 0..255 - EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; - EraseInitStruct.Banks = get_bank(flash_dest); - EraseInitStruct.Page = get_page(flash_dest); - EraseInitStruct.NbPages = get_page(flash_dest + 4 * num_word32 - 1) - EraseInitStruct.Page + 1;; - #else - // Clear pending flags (if any) - #if defined(STM32H7) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS_BANK1 | FLASH_FLAG_ALL_ERRORS_BANK2); - #else - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR); - #endif - - // erase the sector(s) - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - #if defined(STM32H7) - EraseInitStruct.Banks = get_bank(flash_dest); - #endif - EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL); - EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1; - #endif - - uint32_t SectorError = 0; - if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { - // error occurred during sector erase - HAL_FLASH_Lock(); // lock the flash - return; - } -} - -/* -// erase the sector using an interrupt -void flash_erase_it(uint32_t flash_dest, uint32_t num_word32) { - // check there is something to write - if (num_word32 == 0) { - return; - } - - // unlock - HAL_FLASH_Unlock(); - - // Clear pending flags (if any) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR); - - // erase the sector(s) - FLASH_EraseInitTypeDef EraseInitStruct; - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL); - EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1; - if (HAL_FLASHEx_Erase_IT(&EraseInitStruct) != HAL_OK) { - // error occurred during sector erase - HAL_FLASH_Lock(); // lock the flash - return; - } -} -*/ - -void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) { - #if defined(STM32L4) - - // program the flash uint64 by uint64 - for (int i = 0; i < num_word32 / 2; i++) { - uint64_t val = *(uint64_t*)src; - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, flash_dest, val) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 8; - src += 2; - } - if ((num_word32 & 0x01) == 1) { - uint64_t val = *(uint64_t*)flash_dest; - val = (val & 0xffffffff00000000uL) | (*src); - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, flash_dest, val) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - } - - #elif defined(STM32H7) - - // program the flash 256 bits at a time - for (int i = 0; i < num_word32 / 8; i++) { - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, flash_dest, (uint64_t)(uint32_t)src) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 32; - src += 8; - } - - #else - - // program the flash word by word - for (int i = 0; i < num_word32; i++) { - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 4; - src += 1; - } - - #endif - - // lock the flash - HAL_FLASH_Lock(); -} - -/* - use erase, then write -void flash_erase_and_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) { - // check there is something to write - if (num_word32 == 0) { - return; - } - - // unlock - HAL_FLASH_Unlock(); - - // Clear pending flags (if any) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR); - - // erase the sector(s) - FLASH_EraseInitTypeDef EraseInitStruct; - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL); - EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1; - uint32_t SectorError = 0; - if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { - // error occurred during sector erase - HAL_FLASH_Lock(); // lock the flash - return; - } - - // program the flash word by word - for (int i = 0; i < num_word32; i++) { - if (HAL_FLASH_Program(TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 4; - src += 1; - } - - // lock the flash - HAL_FLASH_Lock(); -} -*/ diff --git a/ports/stm32/flash.h b/ports/stm32/flash.h deleted file mode 100644 index b9edf61061..0000000000 --- a/ports/stm32/flash.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_FLASH_H -#define MICROPY_INCLUDED_STM32_FLASH_H - -uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size); -void flash_erase(uint32_t flash_dest, uint32_t num_word32); -void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32); - -#endif // MICROPY_INCLUDED_STM32_FLASH_H diff --git a/ports/stm32/flashbdev.c b/ports/stm32/flashbdev.c deleted file mode 100644 index 5ae67d1ec2..0000000000 --- a/ports/stm32/flashbdev.c +++ /dev/null @@ -1,269 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/mperrno.h" -#include "led.h" -#include "flash.h" -#include "storage.h" - -#if MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE - -// Here we try to automatically configure the location and size of the flash -// pages to use for the internal storage. We also configure the location of the -// cache used for writing. - -#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k - -// enable this to get an extra 64k of storage (uses the last sector of the flash) -#if 0 -#define FLASH_MEM_SEG2_START_ADDR (0x080e0000) // sector 11 -#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 11: 128k -#endif - -#elif defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) - -STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k -#define CACHE_MEM_START_ADDR (&flash_cache_mem[0]) -#define FLASH_SECTOR_SIZE_MAX (0x4000) // 16k max due to size of cache buffer -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k - -#elif defined(STM32F429xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k - -#elif defined(STM32F439xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08100000) // sector 12 -#define FLASH_MEM_SEG1_NUM_BLOCKS (384) // sectors 12,13,14,15,16,17: 16k+16k+16k+16k+64k+64k(of 128k)=192k -#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18 -#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k) - -#elif defined(STM32F746xx) || defined(STM32F767xx) || defined(STM32F769xx) - -// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this. - -#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max -#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k - -#elif defined(STM32H743xx) - -// The STM32H743 flash sectors are 128K -#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 128k -#define FLASH_SECTOR_SIZE_MAX (0x20000) // 128k max -#define FLASH_MEM_SEG1_START_ADDR (0x08020000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (256) // Sector 1: 128k / 512b = 256 blocks - -#elif defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L496xx) - -extern uint8_t _flash_fs_start; -extern uint8_t _flash_fs_end; -extern uint32_t _ram_fs_cache_start[2048 / 4]; -extern uint32_t _ram_fs_cache_block_size; - -// The STM32L475/6 doesn't have CCRAM, so we use the 32K SRAM2 for this. -#define CACHE_MEM_START_ADDR (&_ram_fs_cache_start) // End of SRAM2 RAM segment-2k -#define FLASH_SECTOR_SIZE_MAX (_ram_fs_cache_block_size) // 2k max -#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start) -#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512) - -#else -#error "no internal flash storage support for this MCU" -#endif - -#if !defined(FLASH_MEM_SEG2_START_ADDR) -#define FLASH_MEM_SEG2_START_ADDR (0) // no second segment -#define FLASH_MEM_SEG2_NUM_BLOCKS (0) // no second segment -#endif - -#define FLASH_FLAG_DIRTY (1) -#define FLASH_FLAG_FORCE_WRITE (2) -#define FLASH_FLAG_ERASED (4) -static __IO uint8_t flash_flags = 0; -static uint32_t flash_cache_sector_id; -static uint32_t flash_cache_sector_start; -static uint32_t flash_cache_sector_size; -static uint32_t flash_tick_counter_last_write; - -static void flash_bdev_irq_handler(void); - -int32_t flash_bdev_ioctl(uint32_t op, uint32_t arg) { - (void)arg; - switch (op) { - case BDEV_IOCTL_INIT: - flash_flags = 0; - flash_cache_sector_id = 0; - flash_tick_counter_last_write = 0; - return 0; - - case BDEV_IOCTL_NUM_BLOCKS: - return FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS; - - case BDEV_IOCTL_IRQ_HANDLER: - flash_bdev_irq_handler(); - return 0; - - case BDEV_IOCTL_SYNC: - if (flash_flags & FLASH_FLAG_DIRTY) { - flash_flags |= FLASH_FLAG_FORCE_WRITE; - while (flash_flags & FLASH_FLAG_DIRTY) { - NVIC->STIR = FLASH_IRQn; - } - } - return 0; - } - return -MP_EINVAL; -} - -static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) { - uint32_t flash_sector_start; - uint32_t flash_sector_size; - uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); - if (flash_sector_size > FLASH_SECTOR_SIZE_MAX) { - flash_sector_size = FLASH_SECTOR_SIZE_MAX; - } - if (flash_cache_sector_id != flash_sector_id) { - flash_bdev_ioctl(BDEV_IOCTL_SYNC, 0); - memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size); - flash_cache_sector_id = flash_sector_id; - flash_cache_sector_start = flash_sector_start; - flash_cache_sector_size = flash_sector_size; - } - flash_flags |= FLASH_FLAG_DIRTY; - led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on - flash_tick_counter_last_write = HAL_GetTick(); - return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; -} - -static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) { - uint32_t flash_sector_start; - uint32_t flash_sector_size; - uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); - if (flash_cache_sector_id == flash_sector_id) { - // in cache, copy from there - return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; - } - // not in cache, copy straight from flash - return (uint8_t*)flash_addr; -} - -static uint32_t convert_block_to_flash_addr(uint32_t block) { - if (block < FLASH_MEM_SEG1_NUM_BLOCKS) { - return FLASH_MEM_SEG1_START_ADDR + block * FLASH_BLOCK_SIZE; - } - if (block < FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) { - return FLASH_MEM_SEG2_START_ADDR + (block - FLASH_MEM_SEG1_NUM_BLOCKS) * FLASH_BLOCK_SIZE; - } - // can add more flash segments here if needed, following above pattern - - // bad block - return -1; -} - -static void flash_bdev_irq_handler(void) { - if (!(flash_flags & FLASH_FLAG_DIRTY)) { - return; - } - - // This code uses interrupts to erase the flash - /* - if (flash_erase_state == 0) { - flash_erase_it(flash_cache_sector_start, flash_cache_sector_size / 4); - flash_erase_state = 1; - return; - } - - if (flash_erase_state == 1) { - // wait for erase - // TODO add timeout - #define flash_erase_done() (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) == RESET) - if (!flash_erase_done()) { - return; - } - flash_erase_state = 2; - } - */ - - // This code erases the flash directly, waiting for it to finish - if (!(flash_flags & FLASH_FLAG_ERASED)) { - flash_erase(flash_cache_sector_start, flash_cache_sector_size / 4); - flash_flags |= FLASH_FLAG_ERASED; - return; - } - - // If not a forced write, wait at least 5 seconds after last write to flush - // On file close and flash unmount we get a forced write, so we can afford to wait a while - if ((flash_flags & FLASH_FLAG_FORCE_WRITE) || HAL_GetTick() - flash_tick_counter_last_write >= 5000) { - // sync the cache RAM buffer by writing it to the flash page - flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); - // clear the flash flags now that we have a clean cache - flash_flags = 0; - // indicate a clean cache with LED off - led_state(PYB_LED_RED, 0); - } -} - -bool flash_bdev_readblock(uint8_t *dest, uint32_t block) { - // non-MBR block, get data from flash memory, possibly via cache - uint32_t flash_addr = convert_block_to_flash_addr(block); - if (flash_addr == -1) { - // bad block number - return false; - } - uint8_t *src = flash_cache_get_addr_for_read(flash_addr); - memcpy(dest, src, FLASH_BLOCK_SIZE); - return true; -} - -bool flash_bdev_writeblock(const uint8_t *src, uint32_t block) { - // non-MBR block, copy to cache - uint32_t flash_addr = convert_block_to_flash_addr(block); - if (flash_addr == -1) { - // bad block number - return false; - } - uint8_t *dest = flash_cache_get_addr_for_write(flash_addr); - memcpy(dest, src, FLASH_BLOCK_SIZE); - return true; -} - -#endif // MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE diff --git a/ports/stm32/gccollect.c b/ports/stm32/gccollect.c deleted file mode 100644 index cdec2a136c..0000000000 --- a/ports/stm32/gccollect.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" -#include "systick.h" - -mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs); - -void gc_collect(void) { - // get current time, in case we want to time the GC - #if 0 - uint32_t start = mp_hal_ticks_us(); - #endif - - // start the GC - gc_collect_start(); - - // get the registers and the sp - mp_uint_t regs[10]; - mp_uint_t sp = gc_helper_get_regs_and_sp(regs); - - // trace the stack, including the registers (since they live on the stack in this function) - #if MICROPY_PY_THREAD - gc_collect_root((void**)sp, ((uint32_t)MP_STATE_THREAD(stack_top) - sp) / sizeof(uint32_t)); - #else - gc_collect_root((void**)sp, ((uint32_t)&_ram_end - sp) / sizeof(uint32_t)); - #endif - - // trace root pointers from any threads - #if MICROPY_PY_THREAD - mp_thread_gc_others(); - #endif - - // end the GC - gc_collect_end(); - - #if 0 - // print GC info - uint32_t ticks = mp_hal_ticks_us() - start; - gc_info_t info; - gc_info(&info); - printf("GC@%lu %lums\n", start, ticks); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - #endif -} diff --git a/ports/stm32/gccollect.h b/ports/stm32/gccollect.h deleted file mode 100644 index 25a74a306a..0000000000 --- a/ports/stm32/gccollect.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_GCCOLLECT_H -#define MICROPY_INCLUDED_STM32_GCCOLLECT_H - -// variables defining memory layout -// (these probably belong somewhere else...) -extern uint32_t _etext; -extern uint32_t _sidata; -extern uint32_t _ram_start; -extern uint32_t _sdata; -extern uint32_t _edata; -extern uint32_t _sbss; -extern uint32_t _ebss; -extern uint32_t _heap_start; -extern uint32_t _heap_end; -extern uint32_t _estack; -extern uint32_t _ram_end; - -#endif // MICROPY_INCLUDED_STM32_GCCOLLECT_H diff --git a/ports/stm32/gchelper.s b/ports/stm32/gchelper.s deleted file mode 100644 index 6baedcdd0e..0000000000 --- a/ports/stm32/gchelper.s +++ /dev/null @@ -1,62 +0,0 @@ - .syntax unified - .cpu cortex-m4 - .thumb - .text - .align 2 - -@ uint gc_helper_get_regs_and_sp(r0=uint regs[10]) - .global gc_helper_get_regs_and_sp - .thumb - .thumb_func - .type gc_helper_get_regs_and_sp, %function -gc_helper_get_regs_and_sp: - @ store registers into given array - str r4, [r0], #4 - str r5, [r0], #4 - str r6, [r0], #4 - str r7, [r0], #4 - str r8, [r0], #4 - str r9, [r0], #4 - str r10, [r0], #4 - str r11, [r0], #4 - str r12, [r0], #4 - str r13, [r0], #4 - - @ return the sp - mov r0, sp - bx lr - - -@ this next function is now obsolete - - .size gc_helper_get_regs_and_clean_stack, .-gc_helper_get_regs_and_clean_stack -@ void gc_helper_get_regs_and_clean_stack(r0=uint regs[10], r1=heap_end) - .global gc_helper_get_regs_and_clean_stack - .thumb - .thumb_func - .type gc_helper_get_regs_and_clean_stack, %function -gc_helper_get_regs_and_clean_stack: - @ store registers into given array - str r4, [r0], #4 - str r5, [r0], #4 - str r6, [r0], #4 - str r7, [r0], #4 - str r8, [r0], #4 - str r9, [r0], #4 - str r10, [r0], #4 - str r11, [r0], #4 - str r12, [r0], #4 - str r13, [r0], #4 - - @ clean the stack from given pointer up to current sp - movs r0, #0 - mov r2, sp - b.n .entry -.loop: - str r0, [r1], #4 -.entry: - cmp r1, r2 - bcc.n .loop - bx lr - - .size gc_helper_get_regs_and_clean_stack, .-gc_helper_get_regs_and_clean_stack diff --git a/ports/stm32/gchelper_m0.s b/ports/stm32/gchelper_m0.s deleted file mode 100644 index db0d9738d1..0000000000 --- a/ports/stm32/gchelper_m0.s +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - .syntax unified - .cpu cortex-m0 - .thumb - - .section .text - .align 2 - - .global gc_helper_get_regs_and_sp - .type gc_helper_get_regs_and_sp, %function - -@ uint gc_helper_get_regs_and_sp(r0=uint regs[10]) -gc_helper_get_regs_and_sp: - @ store registers into given array - str r4, [r0, #0] - str r5, [r0, #4] - str r6, [r0, #8] - str r7, [r0, #12] - mov r1, r8 - str r1, [r0, #16] - mov r1, r9 - str r1, [r0, #20] - mov r1, r10 - str r1, [r0, #24] - mov r1, r11 - str r1, [r0, #28] - mov r1, r12 - str r1, [r0, #32] - mov r1, r13 - str r1, [r0, #36] - - @ return the sp - mov r0, sp - bx lr - - .size gc_helper_get_regs_and_sp, .-gc_helper_get_regs_and_sp diff --git a/ports/stm32/help.c b/ports/stm32/help.c deleted file mode 100644 index f9d97b70d6..0000000000 --- a/ports/stm32/help.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char stm32_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online help please visit http://micropython.org/help/.\n" -"\n" -"Quick overview of commands for the board:\n" -" pyb.info() -- print some general information\n" -" pyb.delay(n) -- wait for n milliseconds\n" -" pyb.millis() -- get number of milliseconds since hard reset\n" -" pyb.Switch() -- create a switch object\n" -" Switch methods: (), callback(f)\n" -" pyb.LED(n) -- create an LED object for LED n (n=1,2,3,4)\n" -" LED methods: on(), off(), toggle(), intensity()\n" -" pyb.Pin(pin) -- get a pin, eg pyb.Pin('X1')\n" -" pyb.Pin(pin, m, [p]) -- get a pin and configure it for IO mode m, pull mode p\n" -" Pin methods: init(..), value([v]), high(), low()\n" -" pyb.ExtInt(pin, m, p, callback) -- create an external interrupt object\n" -" pyb.ADC(pin) -- make an analog object from a pin\n" -" ADC methods: read(), read_timed(buf, freq)\n" -" pyb.DAC(port) -- make a DAC object\n" -" DAC methods: triangle(freq), write(n), write_timed(buf, freq)\n" -" pyb.RTC() -- make an RTC object; methods: datetime([val])\n" -" pyb.rng() -- get a 30-bit hardware random number\n" -" pyb.Servo(n) -- create Servo object for servo n (n=1,2,3,4)\n" -" Servo methods: calibration(..), angle([x, [t]]), speed([x, [t]])\n" -" pyb.Accel() -- create an Accelerometer object\n" -" Accelerometer methods: x(), y(), z(), tilt(), filtered_xyz()\n" -"\n" -"Pins are numbered X1-X12, X17-X22, Y1-Y12, or by their MCU name\n" -"Pin IO modes are: pyb.Pin.IN, pyb.Pin.OUT_PP, pyb.Pin.OUT_OD\n" -"Pin pull modes are: pyb.Pin.PULL_NONE, pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN\n" -"Additional serial bus objects: pyb.I2C(n), pyb.SPI(n), pyb.UART(n)\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -"For a list of available modules, type help('modules')\n" -; diff --git a/ports/stm32/i2c.c b/ports/stm32/i2c.c deleted file mode 100644 index 109b9418f8..0000000000 --- a/ports/stm32/i2c.c +++ /dev/null @@ -1,474 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mperrno.h" -#include "py/mphal.h" -#include "i2c.h" - -#if MICROPY_HW_ENABLE_HW_I2C - -#define I2C_POLL_TIMEOUT_MS (50) - -#if defined(STM32F4) - -int i2c_init(i2c_t *i2c, mp_hal_pin_obj_t scl, mp_hal_pin_obj_t sda, uint32_t freq) { - uint32_t i2c_id = ((uint32_t)i2c - I2C1_BASE) / (I2C2_BASE - I2C1_BASE); - - // Init pins - if (!mp_hal_pin_config_alt(scl, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_UP, AF_FN_I2C, i2c_id + 1)) { - return -MP_EPERM; - } - if (!mp_hal_pin_config_alt(sda, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_UP, AF_FN_I2C, i2c_id + 1)) { - return -MP_EPERM; - } - - // Force reset I2C peripheral - RCC->APB1RSTR |= RCC_APB1RSTR_I2C1RST << i2c_id; - RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST << i2c_id); - - // Enable I2C peripheral clock - RCC->APB1ENR |= RCC_APB1ENR_I2C1EN << i2c_id; - volatile uint32_t tmp = RCC->APB1ENR; // delay after RCC clock enable - (void)tmp; - - uint32_t PCLK1 = HAL_RCC_GetPCLK1Freq(); - - // Initialise I2C peripheral - i2c->CR1 = 0; - i2c->CR2 = PCLK1 / 1000000; - i2c->OAR1 = 0; - i2c->OAR2 = 0; - - freq = MIN(freq, 400000); - - // SM: MAX(4, PCLK1 / (F * 2)) - // FM, 16:9 duty: 0xc000 | MAX(1, (PCLK1 / (F * (16 + 9)))) - if (freq <= 100000) { - i2c->CCR = MAX(4, PCLK1 / (freq * 2)); - } else { - i2c->CCR = 0xc000 | MAX(1, PCLK1 / (freq * 25)); - } - - // SM: 1000ns / (1/PCLK1) + 1 = PCLK1 * 1e-6 + 1 - // FM: 300ns / (1/PCLK1) + 1 = 300e-3 * PCLK1 * 1e-6 + 1 - if (freq <= 100000) { - i2c->TRISE = PCLK1 / 1000000 + 1; // 1000ns rise time in SM - } else { - i2c->TRISE = PCLK1 / 1000000 * 3 / 10 + 1; // 300ns rise time in FM - } - - #if defined(I2C_FLTR_ANOFF) - i2c->FLTR = 0; // analog filter on, digital filter off - #endif - - return 0; -} - -STATIC int i2c_wait_sr1_set(i2c_t *i2c, uint32_t mask) { - uint32_t t0 = HAL_GetTick(); - while (!(i2c->SR1 & mask)) { - if (HAL_GetTick() - t0 >= I2C_POLL_TIMEOUT_MS) { - i2c->CR1 &= ~I2C_CR1_PE; - return -MP_ETIMEDOUT; - } - } - return 0; -} - -STATIC int i2c_wait_stop(i2c_t *i2c) { - uint32_t t0 = HAL_GetTick(); - while (i2c->CR1 & I2C_CR1_STOP) { - if (HAL_GetTick() - t0 >= I2C_POLL_TIMEOUT_MS) { - i2c->CR1 &= ~I2C_CR1_PE; - return -MP_ETIMEDOUT; - } - } - i2c->CR1 &= ~I2C_CR1_PE; - return 0; -} - -// For write: len = 0, 1 or N -// For read: len = 1, 2 or N; stop = true -int i2c_start_addr(i2c_t *i2c, int rd_wrn, uint16_t addr, size_t next_len, bool stop) { - if (!(i2c->CR1 & I2C_CR1_PE) && (i2c->SR2 & I2C_SR2_MSL)) { - // The F4 I2C peripheral can sometimes get into a bad state where it's disabled - // (PE low) but still an active master (MSL high). It seems the best way to get - // out of this is a full reset. - uint32_t i2c_id = ((uint32_t)i2c - I2C1_BASE) / (I2C2_BASE - I2C1_BASE); - RCC->APB1RSTR |= RCC_APB1RSTR_I2C1RST << i2c_id; - RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST << i2c_id); - } - - // It looks like it's possible to terminate the reading by sending a - // START condition instead of STOP condition but we don't support that. - if (rd_wrn) { - if (!stop) { - return -MP_EINVAL; - } - } - - // Repurpose OAR1 to hold stop flag - i2c->OAR1 = stop; - - // Enable peripheral and send START condition - i2c->CR1 |= I2C_CR1_PE; - i2c->CR1 |= I2C_CR1_START; - - // Wait for START to be sent - int ret; - if ((ret = i2c_wait_sr1_set(i2c, I2C_SR1_SB))) { - return ret; - } - - // Send the 7-bit address with read/write bit - i2c->DR = addr << 1 | rd_wrn; - - // Wait for address to be sent - if ((ret = i2c_wait_sr1_set(i2c, I2C_SR1_AF | I2C_SR1_ADDR))) { - return ret; - } - - // Check if the slave responded or not - if (i2c->SR1 & I2C_SR1_AF) { - // Got a NACK - i2c->CR1 |= I2C_CR1_STOP; - i2c_wait_stop(i2c); // Don't leak errors from this call - return -MP_ENODEV; - } - - if (rd_wrn) { - // For reading, set up ACK/NACK control based on number of bytes to read (at least 1 byte) - if (next_len <= 1) { - // NACK next received byte - i2c->CR1 &= ~I2C_CR1_ACK; - } else if (next_len <= 2) { - // NACK second received byte - i2c->CR1 |= I2C_CR1_POS; - i2c->CR1 &= ~I2C_CR1_ACK; - } else { - // ACK next received byte - i2c->CR1 |= I2C_CR1_ACK; - } - } - - // Read SR2 to clear SR1_ADDR - uint32_t sr2 = i2c->SR2; - (void)sr2; - - return 0; -} - -// next_len = 0 or N (>=2) -int i2c_read(i2c_t *i2c, uint8_t *dest, size_t len, size_t next_len) { - if (len == 0) { - return -MP_EINVAL; - } - if (next_len == 1) { - return -MP_EINVAL; - } - - size_t remain = len + next_len; - if (remain == 1) { - // Special case - i2c->CR1 |= I2C_CR1_STOP; - int ret; - if ((ret = i2c_wait_sr1_set(i2c, I2C_SR1_RXNE))) { - return ret; - } - *dest = i2c->DR; - } else { - for (; len; --len) { - remain = len + next_len; - int ret; - if ((ret = i2c_wait_sr1_set(i2c, I2C_SR1_BTF))) { - return ret; - } - if (remain == 2) { - // In this case next_len == 0 (it's not allowed to be 1) - i2c->CR1 |= I2C_CR1_STOP; - *dest++ = i2c->DR; - *dest = i2c->DR; - break; - } else if (remain == 3) { - // NACK next received byte - i2c->CR1 &= ~I2C_CR1_ACK; - } - *dest++ = i2c->DR; - } - } - - if (!next_len) { - // We sent a stop above, just wait for it to be finished - return i2c_wait_stop(i2c); - } - - return 0; -} - -// next_len = 0 or N -int i2c_write(i2c_t *i2c, const uint8_t *src, size_t len, size_t next_len) { - int ret; - if ((ret = i2c_wait_sr1_set(i2c, I2C_SR1_AF | I2C_SR1_TXE))) { - return ret; - } - - // Write out the data - int num_acks = 0; - while (len--) { - i2c->DR = *src++; - if ((ret = i2c_wait_sr1_set(i2c, I2C_SR1_AF | I2C_SR1_BTF))) { - return ret; - } - if (i2c->SR1 & I2C_SR1_AF) { - // Slave did not respond to byte so stop sending - break; - } - ++num_acks; - } - - if (!next_len) { - if (i2c->OAR1) { - // Send a STOP and wait for it to finish - i2c->CR1 |= I2C_CR1_STOP; - if ((ret = i2c_wait_stop(i2c))) { - return ret; - } - } - } - - return num_acks; -} - -#elif defined(STM32F0) || defined(STM32F7) - -int i2c_init(i2c_t *i2c, mp_hal_pin_obj_t scl, mp_hal_pin_obj_t sda, uint32_t freq) { - uint32_t i2c_id = ((uint32_t)i2c - I2C1_BASE) / (I2C2_BASE - I2C1_BASE); - - // Init pins - if (!mp_hal_pin_config_alt(scl, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_UP, AF_FN_I2C, i2c_id + 1)) { - return -MP_EPERM; - } - if (!mp_hal_pin_config_alt(sda, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_UP, AF_FN_I2C, i2c_id + 1)) { - return -MP_EPERM; - } - - // Enable I2C peripheral clock - RCC->APB1ENR |= RCC_APB1ENR_I2C1EN << i2c_id; - volatile uint32_t tmp = RCC->APB1ENR; // delay after RCC clock enable - (void)tmp; - - // Initialise I2C peripheral - i2c->CR1 = 0; - i2c->CR2 = 0; - i2c->OAR1 = 0; - i2c->OAR2 = 0; - - // These timing values are for f_I2CCLK=54MHz and are only approximate - if (freq >= 1000000) { - i2c->TIMINGR = 0x50100103; - } else if (freq >= 400000) { - i2c->TIMINGR = 0x70330309; - } else if (freq >= 100000) { - i2c->TIMINGR = 0xb0420f13; - } else { - return -MP_EINVAL; - } - - i2c->TIMEOUTR = 0; - - return 0; -} - -STATIC int i2c_wait_cr2_clear(i2c_t *i2c, uint32_t mask) { - uint32_t t0 = HAL_GetTick(); - while (i2c->CR2 & mask) { - if (HAL_GetTick() - t0 >= I2C_POLL_TIMEOUT_MS) { - i2c->CR1 &= ~I2C_CR1_PE; - return -MP_ETIMEDOUT; - } - } - return 0; -} - -STATIC int i2c_wait_isr_set(i2c_t *i2c, uint32_t mask) { - uint32_t t0 = HAL_GetTick(); - while (!(i2c->ISR & mask)) { - if (HAL_GetTick() - t0 >= I2C_POLL_TIMEOUT_MS) { - i2c->CR1 &= ~I2C_CR1_PE; - return -MP_ETIMEDOUT; - } - } - return 0; -} - -// len = 0, 1 or N -int i2c_start_addr(i2c_t *i2c, int rd_wrn, uint16_t addr, size_t len, bool stop) { - // Enable the peripheral and send the START condition with slave address - i2c->CR1 |= I2C_CR1_PE; - i2c->CR2 = stop << I2C_CR2_AUTOEND_Pos - | (len > 1) << I2C_CR2_RELOAD_Pos - | (len > 0) << I2C_CR2_NBYTES_Pos - | rd_wrn << I2C_CR2_RD_WRN_Pos - | (addr & 0x7f) << 1; - i2c->CR2 |= I2C_CR2_START; - - // Wait for address to be sent - int ret; - if ((ret = i2c_wait_cr2_clear(i2c, I2C_CR2_START))) { - return ret; - } - - // Check if the slave responded or not - if (i2c->ISR & I2C_ISR_NACKF) { - // If we get a NACK then I2C periph unconditionally sends a STOP - i2c_wait_isr_set(i2c, I2C_ISR_STOPF); // Don't leak errors from this call - i2c->CR1 &= ~I2C_CR1_PE; - return -MP_ENODEV; - } - - // Repurpose OAR1 to indicate that we loaded CR2 - i2c->OAR1 = 1; - - return 0; -} - -STATIC int i2c_check_stop(i2c_t *i2c) { - if (i2c->CR2 & I2C_CR2_AUTOEND) { - // Wait for the STOP condition and then disable the peripheral - int ret; - if ((ret = i2c_wait_isr_set(i2c, I2C_ISR_STOPF))) { - return ret; - } - i2c->CR1 &= ~I2C_CR1_PE; - } - - return 0; -} - -// next_len = 0 or N -int i2c_read(i2c_t *i2c, uint8_t *dest, size_t len, size_t next_len) { - if (i2c->OAR1) { - i2c->OAR1 = 0; - } else { - goto load_cr2; - } - - // Read in the data - while (len--) { - int ret; - if ((ret = i2c_wait_isr_set(i2c, I2C_ISR_RXNE))) { - return ret; - } - *dest++ = i2c->RXDR; - load_cr2: - if (len) { - i2c->CR2 = (i2c->CR2 & I2C_CR2_AUTOEND) - | (len + next_len > 1) << I2C_CR2_RELOAD_Pos - | 1 << I2C_CR2_NBYTES_Pos; - } - } - - if (!next_len) { - int ret; - if ((ret = i2c_check_stop(i2c))) { - return ret; - } - } - - return 0; -} - -// next_len = 0 or N -int i2c_write(i2c_t *i2c, const uint8_t *src, size_t len, size_t next_len) { - int num_acks = 0; - - if (i2c->OAR1) { - i2c->OAR1 = 0; - } else { - goto load_cr2; - } - - // Write out the data - while (len--) { - int ret; - if ((ret = i2c_wait_isr_set(i2c, I2C_ISR_TXE))) { - return ret; - } - i2c->TXDR = *src++; - if ((ret = i2c_wait_isr_set(i2c, I2C_ISR_TCR | I2C_ISR_TC | I2C_ISR_STOPF))) { - return ret; - } - uint32_t isr = i2c->ISR; - if (isr & I2C_ISR_NACKF) { - // Slave did not respond to byte so stop sending - if (!(isr & I2C_ISR_TXE)) { - // The TXDR is still full so the byte previous to that wasn't actually ACK'd - --num_acks; - } - break; - } - ++num_acks; - load_cr2: - if (len) { - i2c->CR2 = (i2c->CR2 & I2C_CR2_AUTOEND) - | (len + next_len > 1) << I2C_CR2_RELOAD_Pos - | 1 << I2C_CR2_NBYTES_Pos; - } - } - - if (!next_len) { - int ret; - if ((ret = i2c_check_stop(i2c))) { - return ret; - } - } - - return num_acks; -} - -#endif - -#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) - -int i2c_readfrom(i2c_t *i2c, uint16_t addr, uint8_t *dest, size_t len, bool stop) { - int ret; - if ((ret = i2c_start_addr(i2c, 1, addr, len, stop))) { - return ret; - } - return i2c_read(i2c, dest, len, 0); -} - -int i2c_writeto(i2c_t *i2c, uint16_t addr, const uint8_t *src, size_t len, bool stop) { - int ret; - if ((ret = i2c_start_addr(i2c, 0, addr, len, stop))) { - return ret; - } - return i2c_write(i2c, src, len, 0); -} - -#endif - -#endif // MICROPY_HW_ENABLE_HW_I2C diff --git a/ports/stm32/i2c.h b/ports/stm32/i2c.h deleted file mode 100644 index 5599f41235..0000000000 --- a/ports/stm32/i2c.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_I2C_H -#define MICROPY_INCLUDED_STM32_I2C_H - -#include "dma.h" - -// use this for OwnAddress1 to configure I2C in master mode -#define PYB_I2C_MASTER_ADDRESS (0xfe) - -typedef struct _pyb_i2c_obj_t { - mp_obj_base_t base; - I2C_HandleTypeDef *i2c; - const dma_descr_t *tx_dma_descr; - const dma_descr_t *rx_dma_descr; - bool *use_dma; -} pyb_i2c_obj_t; - -extern I2C_HandleTypeDef I2CHandle1; -extern I2C_HandleTypeDef I2CHandle2; -extern I2C_HandleTypeDef I2CHandle3; -extern I2C_HandleTypeDef I2CHandle4; -extern const mp_obj_type_t pyb_i2c_type; -extern const pyb_i2c_obj_t pyb_i2c_obj[4]; - -void i2c_init0(void); -void pyb_i2c_init(I2C_HandleTypeDef *i2c); -void pyb_i2c_init_freq(const pyb_i2c_obj_t *self, mp_int_t freq); -uint32_t pyb_i2c_get_baudrate(I2C_HandleTypeDef *i2c); -void i2c_ev_irq_handler(mp_uint_t i2c_id); -void i2c_er_irq_handler(mp_uint_t i2c_id); - -typedef I2C_TypeDef i2c_t; - -int i2c_init(i2c_t *i2c, mp_hal_pin_obj_t scl, mp_hal_pin_obj_t sda, uint32_t freq); -int i2c_start_addr(i2c_t *i2c, int rd_wrn, uint16_t addr, size_t len, bool stop); -int i2c_read(i2c_t *i2c, uint8_t *dest, size_t len, size_t next_len); -int i2c_write(i2c_t *i2c, const uint8_t *src, size_t len, size_t next_len); -int i2c_readfrom(i2c_t *i2c, uint16_t addr, uint8_t *dest, size_t len, bool stop); -int i2c_writeto(i2c_t *i2c, uint16_t addr, const uint8_t *src, size_t len, bool stop); - -#endif // MICROPY_INCLUDED_STM32_I2C_H diff --git a/ports/stm32/i2cslave.c b/ports/stm32/i2cslave.c deleted file mode 100644 index 473f0c8c55..0000000000 --- a/ports/stm32/i2cslave.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "i2cslave.h" - -#if defined(STM32F4) - -void i2c_slave_init_helper(i2c_slave_t *i2c, int addr) { - i2c->CR2 = I2C_CR2_ITBUFEN | I2C_CR2_ITEVTEN | 4 << I2C_CR2_FREQ_Pos; - i2c->OAR1 = 1 << 14 | addr << 1; - i2c->OAR2 = 0; - i2c->CR1 = I2C_CR1_ACK | I2C_CR1_PE; -} - -void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) { - uint32_t sr1 = i2c->SR1; - if (sr1 & I2C_SR1_ADDR) { - // Address matched - // Read of SR1, SR2 needed to clear ADDR bit - sr1 = i2c->SR1; - uint32_t sr2 = i2c->SR2; - i2c_slave_process_addr_match((sr2 >> I2C_SR2_TRA_Pos) & 1); - } - if (sr1 & I2C_SR1_TXE) { - i2c->DR = i2c_slave_process_tx_byte(); - } - if (sr1 & I2C_SR1_RXNE) { - i2c_slave_process_rx_byte(i2c->DR); - } - if (sr1 & I2C_SR1_STOPF) { - // STOPF only set at end of RX mode (in TX mode AF is set on NACK) - // Read of SR1, write CR1 needed to clear STOPF bit - sr1 = i2c->SR1; - i2c->CR1 &= ~I2C_CR1_ACK; - i2c_slave_process_rx_end(); - i2c->CR1 |= I2C_CR1_ACK; - } -} - -#elif defined(STM32F7) - -void i2c_slave_init_helper(i2c_slave_t *i2c, int addr) { - i2c->CR1 = I2C_CR1_STOPIE | I2C_CR1_ADDRIE | I2C_CR1_RXIE | I2C_CR1_TXIE; - i2c->CR2 = 0; - i2c->OAR1 = I2C_OAR1_OA1EN | addr << 1; - i2c->OAR2 = 0; - i2c->CR1 |= I2C_CR1_PE; -} - -void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) { - uint32_t isr = i2c->ISR; - if (isr & I2C_ISR_ADDR) { - // Address matched - // Set TXE so that TXDR is flushed and ready for the first byte - i2c->ISR = I2C_ISR_TXE; - i2c->ICR = I2C_ICR_ADDRCF; - i2c_slave_process_addr_match(0); - } - if (isr & I2C_ISR_TXIS) { - i2c->TXDR = i2c_slave_process_tx_byte(); - } - if (isr & I2C_ISR_RXNE) { - i2c_slave_process_rx_byte(i2c->RXDR); - } - if (isr & I2C_ISR_STOPF) { - // STOPF only set for STOP condition, not a repeated START - i2c->ICR = I2C_ICR_STOPCF; - i2c->OAR1 &= ~I2C_OAR1_OA1EN; - if (i2c->ISR & I2C_ISR_DIR) { - //i2c_slave_process_tx_end(); - } else { - i2c_slave_process_rx_end(); - } - i2c->OAR1 |= I2C_OAR1_OA1EN; - } -} - -#endif diff --git a/ports/stm32/i2cslave.h b/ports/stm32/i2cslave.h deleted file mode 100644 index ac35c0cc82..0000000000 --- a/ports/stm32/i2cslave.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_I2CSLAVE_H -#define MICROPY_INCLUDED_STM32_I2CSLAVE_H - -#include STM32_HAL_H - -typedef I2C_TypeDef i2c_slave_t; - -void i2c_slave_init_helper(i2c_slave_t *i2c, int addr); - -static inline void i2c_slave_init(i2c_slave_t *i2c, int irqn, int irq_pri, int addr) { - int en_bit = RCC_APB1ENR_I2C1EN_Pos + ((uintptr_t)i2c - I2C1_BASE) / (I2C2_BASE - I2C1_BASE); - RCC->APB1ENR |= 1 << en_bit; - volatile uint32_t tmp = RCC->APB1ENR; // Delay after enabling clock - (void)tmp; - - i2c_slave_init_helper(i2c, addr); - - NVIC_SetPriority(irqn, irq_pri); - NVIC_EnableIRQ(irqn); -} - -static inline void i2c_slave_shutdown(i2c_slave_t *i2c, int irqn) { - i2c->CR1 = 0; - NVIC_DisableIRQ(irqn); -} - -void i2c_slave_ev_irq_handler(i2c_slave_t *i2c); - -// These should be provided externally -int i2c_slave_process_addr_match(int rw); -int i2c_slave_process_rx_byte(uint8_t val); -void i2c_slave_process_rx_end(void); -uint8_t i2c_slave_process_tx_byte(void); - -#endif // MICROPY_INCLUDED_STM32_I2CSLAVE_H diff --git a/ports/stm32/irq.c b/ports/stm32/irq.c deleted file mode 100644 index 7298a4b504..0000000000 --- a/ports/stm32/irq.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/mphal.h" -#include "irq.h" - -/// \moduleref pyb - -#if IRQ_ENABLE_STATS -uint32_t irq_stats[FPU_IRQn + 1] = {0}; -#endif - -/// \function wfi() -/// Wait for an interrupt. -/// This executies a `wfi` instruction which reduces power consumption -/// of the MCU until an interrupt occurs, at which point execution continues. -STATIC mp_obj_t pyb_wfi(void) { - __WFI(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_wfi_obj, pyb_wfi); - -/// \function disable_irq() -/// Disable interrupt requests. -/// Returns the previous IRQ state: `False`/`True` for disabled/enabled IRQs -/// respectively. This return value can be passed to enable_irq to restore -/// the IRQ to its original state. -STATIC mp_obj_t pyb_disable_irq(void) { - return mp_obj_new_bool(disable_irq() == IRQ_STATE_ENABLED); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_disable_irq_obj, pyb_disable_irq); - -/// \function enable_irq(state=True) -/// Enable interrupt requests. -/// If `state` is `True` (the default value) then IRQs are enabled. -/// If `state` is `False` then IRQs are disabled. The most common use of -/// this function is to pass it the value returned by `disable_irq` to -/// exit a critical section. -STATIC mp_obj_t pyb_enable_irq(uint n_args, const mp_obj_t *arg) { - enable_irq((n_args == 0 || mp_obj_is_true(arg[0])) ? IRQ_STATE_ENABLED : IRQ_STATE_DISABLED); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_enable_irq_obj, 0, 1, pyb_enable_irq); - -#if IRQ_ENABLE_STATS -// return a memoryview of the irq statistics array -STATIC mp_obj_t pyb_irq_stats(void) { - return mp_obj_new_memoryview(0x80 | 'I', MP_ARRAY_SIZE(irq_stats), &irq_stats[0]); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_irq_stats_obj, pyb_irq_stats); -#endif diff --git a/ports/stm32/irq.h b/ports/stm32/irq.h deleted file mode 100644 index 3fe20867fe..0000000000 --- a/ports/stm32/irq.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_IRQ_H -#define MICROPY_INCLUDED_STM32_IRQ_H - -// Use this macro together with NVIC_SetPriority to indicate that an IRQn is non-negative, -// which helps the compiler optimise the resulting inline function. -#define IRQn_NONNEG(pri) ((pri) & 0x7f) - -// these states correspond to values from query_irq, enable_irq and disable_irq -#define IRQ_STATE_DISABLED (0x00000001) -#define IRQ_STATE_ENABLED (0x00000000) - -// Enable this to get a count for the number of times each irq handler is called, -// accessible via pyb.irq_stats(). -#define IRQ_ENABLE_STATS (0) - -#if IRQ_ENABLE_STATS -extern uint32_t irq_stats[FPU_IRQn + 1]; -#define IRQ_ENTER(irq) ++irq_stats[irq] -#define IRQ_EXIT(irq) -#else -#define IRQ_ENTER(irq) -#define IRQ_EXIT(irq) -#endif - -static inline mp_uint_t query_irq(void) { - return __get_PRIMASK(); -} - -// enable_irq and disable_irq are defined inline in mpconfigport.h - -#if __CORTEX_M >= 0x03 - -// irqs with a priority value greater or equal to "pri" will be disabled -// "pri" should be between 1 and 15 inclusive -static inline uint32_t raise_irq_pri(uint32_t pri) { - uint32_t basepri = __get_BASEPRI(); - // If non-zero, the processor does not process any exception with a - // priority value greater than or equal to BASEPRI. - // When writing to BASEPRI_MAX the write goes to BASEPRI only if either: - // - Rn is non-zero and the current BASEPRI value is 0 - // - Rn is non-zero and less than the current BASEPRI value - pri <<= (8 - __NVIC_PRIO_BITS); - __ASM volatile ("msr basepri_max, %0" : : "r" (pri) : "memory"); - return basepri; -} - -// "basepri" should be the value returned from raise_irq_pri -static inline void restore_irq_pri(uint32_t basepri) { - __set_BASEPRI(basepri); -} - -#endif - -MP_DECLARE_CONST_FUN_OBJ_0(pyb_wfi_obj); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_disable_irq_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_enable_irq_obj); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj); - -// IRQ priority definitions. -// -// Lower number implies higher interrupt priority. -// -// The default priority grouping is set to NVIC_PRIORITYGROUP_4 in the -// HAL_Init function. This corresponds to 4 bits for the priority field -// and 0 bits for the sub-priority field (which means that for all intensive -// purposes that the sub-priorities below are ignored). -// -// While a given interrupt is being processed, only higher priority (lower number) -// interrupts will preempt a given interrupt. If sub-priorities are active -// then the sub-priority determines the order that pending interrupts of -// a given priority are executed. This is only meaningful if 2 or more -// interrupts of the same priority are pending at the same time. -// -// The priority of the SysTick timer is determined from the TICK_INT_PRIORITY -// value which is normally set to 0 in the stm32f4xx_hal_conf.h file. -// -// The following interrupts are arranged from highest priority to lowest -// priority to make it a bit easier to figure out. - -#if __CORTEX_M == 0 - -//#def IRQ_PRI_SYSTICK 0 -#define IRQ_PRI_UART 1 -#define IRQ_PRI_FLASH 1 -#define IRQ_PRI_SDIO 1 -#define IRQ_PRI_DMA 1 -#define IRQ_PRI_OTG_FS 2 -#define IRQ_PRI_OTG_HS 2 -#define IRQ_PRI_TIM5 2 -#define IRQ_PRI_CAN 2 -#define IRQ_PRI_TIMX 2 -#define IRQ_PRI_EXTINT 2 -#define IRQ_PRI_PENDSV 3 -#define IRQ_PRI_RTC_WKUP 3 - -#else - -//#def IRQ_PRI_SYSTICK NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0) - -// The UARTs have no FIFOs, so if they don't get serviced quickly then characters -// get dropped. The handling for each character only consumes about 0.5 usec -#define IRQ_PRI_UART NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 1, 0) - -// Flash IRQ must be higher priority than interrupts of all those components -// that rely on the flash storage. -#define IRQ_PRI_FLASH NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 2, 0) - -// SDIO must be higher priority than DMA for SDIO DMA transfers to work. -#define IRQ_PRI_SDIO NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 4, 0) - -// DMA should be higher priority than USB, since USB Mass Storage calls -// into the sdcard driver which waits for the DMA to complete. -#define IRQ_PRI_DMA NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 5, 0) - -#define IRQ_PRI_OTG_FS NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 6, 0) -#define IRQ_PRI_OTG_HS NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 6, 0) -#define IRQ_PRI_TIM5 NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 6, 0) - -#define IRQ_PRI_CAN NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 7, 0) - -// Interrupt priority for non-special timers. -#define IRQ_PRI_TIMX NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 13, 0) - -#define IRQ_PRI_EXTINT NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 14, 0) - -// PENDSV should be at the lowst priority so that other interrupts complete -// before exception is raised. -#define IRQ_PRI_PENDSV NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 15, 0) -#define IRQ_PRI_RTC_WKUP NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 15, 0) - -#endif - -#endif // MICROPY_INCLUDED_STM32_IRQ_H diff --git a/ports/stm32/lcd.c b/ports/stm32/lcd.c deleted file mode 100644 index 10fb54eb5f..0000000000 --- a/ports/stm32/lcd.c +++ /dev/null @@ -1,527 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mphal.h" -#include "py/runtime.h" - -#if MICROPY_HW_HAS_LCD - -#include "pin.h" -#include "bufhelper.h" -#include "spi.h" -#include "font_petme128_8x8.h" -#include "lcd.h" - -/// \moduleref pyb -/// \class LCD - LCD control for the LCD touch-sensor pyskin -/// -/// The LCD class is used to control the LCD on the LCD touch-sensor pyskin, -/// LCD32MKv1.0. The LCD is a 128x32 pixel monochrome screen, part NHD-C12832A1Z. -/// -/// The pyskin must be connected in either the X or Y positions, and then -/// an LCD object is made using: -/// -/// lcd = pyb.LCD('X') # if pyskin is in the X position -/// lcd = pyb.LCD('Y') # if pyskin is in the Y position -/// -/// Then you can use: -/// -/// lcd.light(True) # turn the backlight on -/// lcd.write('Hello world!\n') # print text to the screen -/// -/// This driver implements a double buffer for setting/getting pixels. -/// For example, to make a bouncing dot, try: -/// -/// x = y = 0 -/// dx = dy = 1 -/// while True: -/// # update the dot's position -/// x += dx -/// y += dy -/// -/// # make the dot bounce of the edges of the screen -/// if x <= 0 or x >= 127: dx = -dx -/// if y <= 0 or y >= 31: dy = -dy -/// -/// lcd.fill(0) # clear the buffer -/// lcd.pixel(x, y, 1) # draw the dot -/// lcd.show() # show the buffer -/// pyb.delay(50) # pause for 50ms - -#define LCD_INSTR (0) -#define LCD_DATA (1) - -#define LCD_CHAR_BUF_W (16) -#define LCD_CHAR_BUF_H (4) - -#define LCD_PIX_BUF_W (128) -#define LCD_PIX_BUF_H (32) -#define LCD_PIX_BUF_BYTE_SIZE (LCD_PIX_BUF_W * LCD_PIX_BUF_H / 8) - -typedef struct _pyb_lcd_obj_t { - mp_obj_base_t base; - - // hardware control for the LCD - const spi_t *spi; - const pin_obj_t *pin_cs1; - const pin_obj_t *pin_rst; - const pin_obj_t *pin_a0; - const pin_obj_t *pin_bl; - - // character buffer for stdout-like output - char char_buffer[LCD_CHAR_BUF_W * LCD_CHAR_BUF_H]; - int line; - int column; - int next_line; - - // double buffering for pixel buffer - byte pix_buf[LCD_PIX_BUF_BYTE_SIZE]; - byte pix_buf2[LCD_PIX_BUF_BYTE_SIZE]; -} pyb_lcd_obj_t; - -STATIC void lcd_delay(void) { - __asm volatile ("nop\nnop"); -} - -STATIC void lcd_out(pyb_lcd_obj_t *lcd, int instr_data, uint8_t i) { - lcd_delay(); - mp_hal_pin_low(lcd->pin_cs1); // CS=0; enable - if (instr_data == LCD_INSTR) { - mp_hal_pin_low(lcd->pin_a0); // A0=0; select instr reg - } else { - mp_hal_pin_high(lcd->pin_a0); // A0=1; select data reg - } - lcd_delay(); - HAL_SPI_Transmit(lcd->spi->spi, &i, 1, 1000); - lcd_delay(); - mp_hal_pin_high(lcd->pin_cs1); // CS=1; disable -} - -// write a string to the LCD at the current cursor location -// output it straight away (doesn't use the pixel buffer) -STATIC void lcd_write_strn(pyb_lcd_obj_t *lcd, const char *str, unsigned int len) { - int redraw_min = lcd->line * LCD_CHAR_BUF_W + lcd->column; - int redraw_max = redraw_min; - for (; len > 0; len--, str++) { - // move to next line if needed - if (lcd->next_line) { - if (lcd->line + 1 < LCD_CHAR_BUF_H) { - lcd->line += 1; - } else { - lcd->line = LCD_CHAR_BUF_H - 1; - for (int i = 0; i < LCD_CHAR_BUF_W * (LCD_CHAR_BUF_H - 1); i++) { - lcd->char_buffer[i] = lcd->char_buffer[i + LCD_CHAR_BUF_W]; - } - for (int i = 0; i < LCD_CHAR_BUF_W; i++) { - lcd->char_buffer[LCD_CHAR_BUF_W * (LCD_CHAR_BUF_H - 1) + i] = ' '; - } - redraw_min = 0; - redraw_max = LCD_CHAR_BUF_W * LCD_CHAR_BUF_H; - } - lcd->next_line = 0; - lcd->column = 0; - } - if (*str == '\n') { - lcd->next_line = 1; - } else if (*str == '\r') { - lcd->column = 0; - } else if (*str == '\b') { - if (lcd->column > 0) { - lcd->column--; - redraw_min = 0; // could optimise this to not redraw everything - } - } else if (lcd->column >= LCD_CHAR_BUF_W) { - lcd->next_line = 1; - str -= 1; - len += 1; - } else { - lcd->char_buffer[lcd->line * LCD_CHAR_BUF_W + lcd->column] = *str; - lcd->column += 1; - int max = lcd->line * LCD_CHAR_BUF_W + lcd->column; - if (max > redraw_max) { - redraw_max = max; - } - } - } - - // we must draw upside down, because the LCD is upside down - for (int i = redraw_min; i < redraw_max; i++) { - uint page = i / LCD_CHAR_BUF_W; - uint offset = 8 * (LCD_CHAR_BUF_W - 1 - (i - (page * LCD_CHAR_BUF_W))); - lcd_out(lcd, LCD_INSTR, 0xb0 | page); // page address set - lcd_out(lcd, LCD_INSTR, 0x10 | ((offset >> 4) & 0x0f)); // column address set upper - lcd_out(lcd, LCD_INSTR, 0x00 | (offset & 0x0f)); // column address set lower - int chr = lcd->char_buffer[i]; - if (chr < 32 || chr > 126) { - chr = 127; - } - const uint8_t *chr_data = &font_petme128_8x8[(chr - 32) * 8]; - for (int j = 7; j >= 0; j--) { - lcd_out(lcd, LCD_DATA, chr_data[j]); - } - } -} - -/// \classmethod \constructor(skin_position) -/// -/// Construct an LCD object in the given skin position. `skin_position` can be 'X' or 'Y', and -/// should match the position where the LCD pyskin is plugged in. -STATIC mp_obj_t pyb_lcd_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get LCD position - const char *lcd_id = mp_obj_str_get_str(args[0]); - - // create lcd object - pyb_lcd_obj_t *lcd = m_new_obj(pyb_lcd_obj_t); - lcd->base.type = &pyb_lcd_type; - - // configure pins - // TODO accept an SPI object and pin objects for full customisation - if ((lcd_id[0] | 0x20) == 'x' && lcd_id[1] == '\0') { - lcd->spi = &spi_obj[0]; - lcd->pin_cs1 = pyb_pin_X3; - lcd->pin_rst = pyb_pin_X4; - lcd->pin_a0 = pyb_pin_X5; - lcd->pin_bl = pyb_pin_X12; - } else if ((lcd_id[0] | 0x20) == 'y' && lcd_id[1] == '\0') { - lcd->spi = &spi_obj[1]; - lcd->pin_cs1 = pyb_pin_Y3; - lcd->pin_rst = pyb_pin_Y4; - lcd->pin_a0 = pyb_pin_Y5; - lcd->pin_bl = pyb_pin_Y12; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LCD(%s) doesn't exist", lcd_id)); - } - - // init the SPI bus - SPI_InitTypeDef *init = &lcd->spi->spi->Init; - init->Mode = SPI_MODE_MASTER; - - // compute the baudrate prescaler from the desired baudrate - // select a prescaler that yields at most the desired baudrate - uint spi_clock; - if (lcd->spi->spi->Instance == SPI1) { - // SPI1 is on APB2 - spi_clock = HAL_RCC_GetPCLK2Freq(); - } else { - // SPI2 and SPI3 are on APB1 - spi_clock = HAL_RCC_GetPCLK1Freq(); - } - uint br_prescale = spi_clock / 16000000; // datasheet says LCD can run at 20MHz, but we go for 16MHz - if (br_prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; } - else if (br_prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; } - else if (br_prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; } - else if (br_prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; } - else if (br_prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; } - else if (br_prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; } - else if (br_prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; } - else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; } - - // data is sent bigendian, latches on rising clock - init->CLKPolarity = SPI_POLARITY_HIGH; - init->CLKPhase = SPI_PHASE_2EDGE; - init->Direction = SPI_DIRECTION_2LINES; - init->DataSize = SPI_DATASIZE_8BIT; - init->NSS = SPI_NSS_SOFT; - init->FirstBit = SPI_FIRSTBIT_MSB; - init->TIMode = SPI_TIMODE_DISABLED; - init->CRCCalculation = SPI_CRCCALCULATION_DISABLED; - init->CRCPolynomial = 0; - - // init the SPI bus - spi_init(lcd->spi, false); - - // set the pins to default values - mp_hal_pin_high(lcd->pin_cs1); - mp_hal_pin_high(lcd->pin_rst); - mp_hal_pin_high(lcd->pin_a0); - mp_hal_pin_low(lcd->pin_bl); - - // init the pins to be push/pull outputs - mp_hal_pin_output(lcd->pin_cs1); - mp_hal_pin_output(lcd->pin_rst); - mp_hal_pin_output(lcd->pin_a0); - mp_hal_pin_output(lcd->pin_bl); - - // init the LCD - mp_hal_delay_ms(1); // wait a bit - mp_hal_pin_low(lcd->pin_rst); // RST=0; reset - mp_hal_delay_ms(1); // wait for reset; 2us min - mp_hal_pin_high(lcd->pin_rst); // RST=1; enable - mp_hal_delay_ms(1); // wait for reset; 2us min - lcd_out(lcd, LCD_INSTR, 0xa0); // ADC select, normal - lcd_out(lcd, LCD_INSTR, 0xc0); // common output mode select, normal (this flips the display) - lcd_out(lcd, LCD_INSTR, 0xa2); // LCD bias set, 1/9 bias - lcd_out(lcd, LCD_INSTR, 0x2f); // power control set, 0b111=(booster on, vreg on, vfollow on) - lcd_out(lcd, LCD_INSTR, 0x21); // v0 voltage regulator internal resistor ratio set, 0b001=small - lcd_out(lcd, LCD_INSTR, 0x81); // electronic volume mode set - lcd_out(lcd, LCD_INSTR, 0x28); // electronic volume register set - lcd_out(lcd, LCD_INSTR, 0x40); // display start line set, 0 - lcd_out(lcd, LCD_INSTR, 0xaf); // LCD display, on - - // clear LCD RAM - for (int page = 0; page < 4; page++) { - lcd_out(lcd, LCD_INSTR, 0xb0 | page); // page address set - lcd_out(lcd, LCD_INSTR, 0x10); // column address set upper - lcd_out(lcd, LCD_INSTR, 0x00); // column address set lower - for (int i = 0; i < 128; i++) { - lcd_out(lcd, LCD_DATA, 0x00); - } - } - - // clear local char buffer - memset(lcd->char_buffer, ' ', LCD_CHAR_BUF_H * LCD_CHAR_BUF_W); - lcd->line = 0; - lcd->column = 0; - lcd->next_line = 0; - - // clear local pixel buffer - memset(lcd->pix_buf, 0, LCD_PIX_BUF_BYTE_SIZE); - memset(lcd->pix_buf2, 0, LCD_PIX_BUF_BYTE_SIZE); - - return lcd; -} - -/// \method command(instr_data, buf) -/// -/// Send an arbitrary command to the LCD. Pass 0 for `instr_data` to send an -/// instruction, otherwise pass 1 to send data. `buf` is a buffer with the -/// instructions/data to send. -STATIC mp_obj_t pyb_lcd_command(mp_obj_t self_in, mp_obj_t instr_data_in, mp_obj_t val) { - pyb_lcd_obj_t *self = self_in; - - // get whether instr or data - int instr_data = mp_obj_get_int(instr_data_in); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(val, &bufinfo, data); - - // send the data - for (uint i = 0; i < bufinfo.len; i++) { - lcd_out(self, instr_data, ((byte*)bufinfo.buf)[i]); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_lcd_command_obj, pyb_lcd_command); - -/// \method contrast(value) -/// -/// Set the contrast of the LCD. Valid values are between 0 and 47. -STATIC mp_obj_t pyb_lcd_contrast(mp_obj_t self_in, mp_obj_t contrast_in) { - pyb_lcd_obj_t *self = self_in; - int contrast = mp_obj_get_int(contrast_in); - if (contrast < 0) { - contrast = 0; - } else if (contrast > 0x2f) { - contrast = 0x2f; - } - lcd_out(self, LCD_INSTR, 0x81); // electronic volume mode set - lcd_out(self, LCD_INSTR, contrast); // electronic volume register set - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_contrast_obj, pyb_lcd_contrast); - -/// \method light(value) -/// -/// Turn the backlight on/off. True or 1 turns it on, False or 0 turns it off. -STATIC mp_obj_t pyb_lcd_light(mp_obj_t self_in, mp_obj_t value) { - pyb_lcd_obj_t *self = self_in; - if (mp_obj_is_true(value)) { - mp_hal_pin_high(self->pin_bl); // set pin high to turn backlight on - } else { - mp_hal_pin_low(self->pin_bl); // set pin low to turn backlight off - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_light_obj, pyb_lcd_light); - -/// \method write(str) -/// -/// Write the string `str` to the screen. It will appear immediately. -STATIC mp_obj_t pyb_lcd_write(mp_obj_t self_in, mp_obj_t str) { - pyb_lcd_obj_t *self = self_in; - size_t len; - const char *data = mp_obj_str_get_data(str, &len); - lcd_write_strn(self, data, len); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_write_obj, pyb_lcd_write); - -/// \method fill(colour) -/// -/// Fill the screen with the given colour (0 or 1 for white or black). -/// -/// This method writes to the hidden buffer. Use `show()` to show the buffer. -STATIC mp_obj_t pyb_lcd_fill(mp_obj_t self_in, mp_obj_t col_in) { - pyb_lcd_obj_t *self = self_in; - int col = mp_obj_get_int(col_in); - if (col) { - col = 0xff; - } - memset(self->pix_buf, col, LCD_PIX_BUF_BYTE_SIZE); - memset(self->pix_buf2, col, LCD_PIX_BUF_BYTE_SIZE); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_fill_obj, pyb_lcd_fill); - -/// \method get(x, y) -/// -/// Get the pixel at the position `(x, y)`. Returns 0 or 1. -/// -/// This method reads from the visible buffer. -STATIC mp_obj_t pyb_lcd_get(mp_obj_t self_in, mp_obj_t x_in, mp_obj_t y_in) { - pyb_lcd_obj_t *self = self_in; - int x = mp_obj_get_int(x_in); - int y = mp_obj_get_int(y_in); - if (0 <= x && x <= 127 && 0 <= y && y <= 31) { - uint byte_pos = x + 128 * ((uint)y >> 3); - if (self->pix_buf[byte_pos] & (1 << (y & 7))) { - return mp_obj_new_int(1); - } - } - return mp_obj_new_int(0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_lcd_get_obj, pyb_lcd_get); - -/// \method pixel(x, y, colour) -/// -/// Set the pixel at `(x, y)` to the given colour (0 or 1). -/// -/// This method writes to the hidden buffer. Use `show()` to show the buffer. -STATIC mp_obj_t pyb_lcd_pixel(size_t n_args, const mp_obj_t *args) { - pyb_lcd_obj_t *self = args[0]; - int x = mp_obj_get_int(args[1]); - int y = mp_obj_get_int(args[2]); - if (0 <= x && x <= 127 && 0 <= y && y <= 31) { - uint byte_pos = x + 128 * ((uint)y >> 3); - if (mp_obj_get_int(args[3]) == 0) { - self->pix_buf2[byte_pos] &= ~(1 << (y & 7)); - } else { - self->pix_buf2[byte_pos] |= 1 << (y & 7); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_lcd_pixel_obj, 4, 4, pyb_lcd_pixel); - -/// \method text(str, x, y, colour) -/// -/// Draw the given text to the position `(x, y)` using the given colour (0 or 1). -/// -/// This method writes to the hidden buffer. Use `show()` to show the buffer. -STATIC mp_obj_t pyb_lcd_text(size_t n_args, const mp_obj_t *args) { - // extract arguments - pyb_lcd_obj_t *self = args[0]; - size_t len; - const char *data = mp_obj_str_get_data(args[1], &len); - int x0 = mp_obj_get_int(args[2]); - int y0 = mp_obj_get_int(args[3]); - int col = mp_obj_get_int(args[4]); - - // loop over chars - for (const char *top = data + len; data < top; data++) { - // get char and make sure its in range of font - uint chr = *(byte*)data; - if (chr < 32 || chr > 127) { - chr = 127; - } - // get char data - const uint8_t *chr_data = &font_petme128_8x8[(chr - 32) * 8]; - // loop over char data - for (uint j = 0; j < 8; j++, x0++) { - if (0 <= x0 && x0 < LCD_PIX_BUF_W) { // clip x - uint vline_data = chr_data[j]; // each byte of char data is a vertical column of 8 pixels, LSB at top - for (int y = y0; vline_data; vline_data >>= 1, y++) { // scan over vertical column - if (vline_data & 1) { // only draw if pixel set - if (0 <= y && y < LCD_PIX_BUF_H) { // clip y - uint byte_pos = x0 + LCD_PIX_BUF_W * ((uint)y >> 3); - if (col == 0) { - // clear pixel - self->pix_buf2[byte_pos] &= ~(1 << (y & 7)); - } else { - // set pixel - self->pix_buf2[byte_pos] |= 1 << (y & 7); - } - } - } - } - } - } - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_lcd_text_obj, 5, 5, pyb_lcd_text); - -/// \method show() -/// -/// Show the hidden buffer on the screen. -STATIC mp_obj_t pyb_lcd_show(mp_obj_t self_in) { - pyb_lcd_obj_t *self = self_in; - memcpy(self->pix_buf, self->pix_buf2, LCD_PIX_BUF_BYTE_SIZE); - for (uint page = 0; page < 4; page++) { - lcd_out(self, LCD_INSTR, 0xb0 | page); // page address set - lcd_out(self, LCD_INSTR, 0x10); // column address set upper; 0 - lcd_out(self, LCD_INSTR, 0x00); // column address set lower; 0 - for (uint i = 0; i < 128; i++) { - lcd_out(self, LCD_DATA, self->pix_buf[128 * page + 127 - i]); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_lcd_show_obj, pyb_lcd_show); - -STATIC const mp_rom_map_elem_t pyb_lcd_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_command), MP_ROM_PTR(&pyb_lcd_command_obj) }, - { MP_ROM_QSTR(MP_QSTR_contrast), MP_ROM_PTR(&pyb_lcd_contrast_obj) }, - { MP_ROM_QSTR(MP_QSTR_light), MP_ROM_PTR(&pyb_lcd_light_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_lcd_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_fill), MP_ROM_PTR(&pyb_lcd_fill_obj) }, - { MP_ROM_QSTR(MP_QSTR_get), MP_ROM_PTR(&pyb_lcd_get_obj) }, - { MP_ROM_QSTR(MP_QSTR_pixel), MP_ROM_PTR(&pyb_lcd_pixel_obj) }, - { MP_ROM_QSTR(MP_QSTR_text), MP_ROM_PTR(&pyb_lcd_text_obj) }, - { MP_ROM_QSTR(MP_QSTR_show), MP_ROM_PTR(&pyb_lcd_show_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_lcd_locals_dict, pyb_lcd_locals_dict_table); - -const mp_obj_type_t pyb_lcd_type = { - { &mp_type_type }, - .name = MP_QSTR_LCD, - .make_new = pyb_lcd_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_lcd_locals_dict, -}; - -#endif // MICROPY_HW_HAS_LCD diff --git a/ports/stm32/lcd.h b/ports/stm32/lcd.h deleted file mode 100644 index 98f904848f..0000000000 --- a/ports/stm32/lcd.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_LCD_H -#define MICROPY_INCLUDED_STM32_LCD_H - -extern const mp_obj_type_t pyb_lcd_type; - -#endif // MICROPY_INCLUDED_STM32_LCD_H diff --git a/ports/stm32/led.c b/ports/stm32/led.c deleted file mode 100644 index 71c674ab96..0000000000 --- a/ports/stm32/led.c +++ /dev/null @@ -1,376 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "timer.h" -#include "led.h" -#include "pin.h" - -#if defined(MICROPY_HW_LED1) - -/// \moduleref pyb -/// \class LED - LED object -/// -/// The LED object controls an individual LED (Light Emitting Diode). - -// the default is that LEDs are not inverted, and pin driven high turns them on -#ifndef MICROPY_HW_LED_INVERTED -#define MICROPY_HW_LED_INVERTED (0) -#endif - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; - mp_uint_t led_id; - const pin_obj_t *led_pin; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { - {{&pyb_led_type}, 1, MICROPY_HW_LED1}, -#if defined(MICROPY_HW_LED2) - {{&pyb_led_type}, 2, MICROPY_HW_LED2}, -#if defined(MICROPY_HW_LED3) - {{&pyb_led_type}, 3, MICROPY_HW_LED3}, -#if defined(MICROPY_HW_LED4) - {{&pyb_led_type}, 4, MICROPY_HW_LED4}, -#endif -#endif -#endif -}; -#define NUM_LEDS MP_ARRAY_SIZE(pyb_led_obj) - -void led_init(void) { - /* Turn off LEDs and initialize */ - for (int led = 0; led < NUM_LEDS; led++) { - const pin_obj_t *led_pin = pyb_led_obj[led].led_pin; - mp_hal_gpio_clock_enable(led_pin->gpio); - MICROPY_HW_LED_OFF(led_pin); - mp_hal_pin_output(led_pin); - } -} - -#if defined(MICROPY_HW_LED1_PWM) \ - || defined(MICROPY_HW_LED2_PWM) \ - || defined(MICROPY_HW_LED3_PWM) \ - || defined(MICROPY_HW_LED4_PWM) - -// The following is semi-generic code to control LEDs using PWM. -// It currently supports TIM1, TIM2 and TIM3, channels 1-4. -// Configure by defining the relevant MICROPY_HW_LEDx_PWM macros in mpconfigboard.h. -// If they are not defined then PWM will not be available for that LED. - -#define LED_PWM_ENABLED (1) - -#ifndef MICROPY_HW_LED1_PWM -#define MICROPY_HW_LED1_PWM { NULL, 0, 0, 0 } -#endif -#ifndef MICROPY_HW_LED2_PWM -#define MICROPY_HW_LED2_PWM { NULL, 0, 0, 0 } -#endif -#ifndef MICROPY_HW_LED3_PWM -#define MICROPY_HW_LED3_PWM { NULL, 0, 0, 0 } -#endif -#ifndef MICROPY_HW_LED4_PWM -#define MICROPY_HW_LED4_PWM { NULL, 0, 0, 0 } -#endif - -#define LED_PWM_TIM_PERIOD (10000) // TIM runs at 1MHz and fires every 10ms - -// this gives the address of the CCR register for channels 1-4 -#define LED_PWM_CCR(pwm_cfg) ((volatile uint32_t*)&(pwm_cfg)->tim->CCR1 + ((pwm_cfg)->tim_channel >> 2)) - -typedef struct _led_pwm_config_t { - TIM_TypeDef *tim; - uint8_t tim_id; - uint8_t tim_channel; - uint8_t alt_func; -} led_pwm_config_t; - -STATIC const led_pwm_config_t led_pwm_config[] = { - MICROPY_HW_LED1_PWM, - MICROPY_HW_LED2_PWM, - MICROPY_HW_LED3_PWM, - MICROPY_HW_LED4_PWM, -}; - -STATIC uint8_t led_pwm_state = 0; - -static inline bool led_pwm_is_enabled(int led) { - return (led_pwm_state & (1 << led)) != 0; -} - -// this function has a large stack so it should not be inlined -STATIC void led_pwm_init(int led) __attribute__((noinline)); -STATIC void led_pwm_init(int led) { - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1]; - - // GPIO configuration - mp_hal_pin_config(led_pin, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, pwm_cfg->alt_func); - - // TIM configuration - switch (pwm_cfg->tim_id) { - case 1: __TIM1_CLK_ENABLE(); break; - case 2: __TIM2_CLK_ENABLE(); break; - case 3: __TIM3_CLK_ENABLE(); break; - default: assert(0); - } - TIM_HandleTypeDef tim = {0}; - tim.Instance = pwm_cfg->tim; - tim.Init.Period = LED_PWM_TIM_PERIOD - 1; - tim.Init.Prescaler = timer_get_source_freq(pwm_cfg->tim_id) / 1000000 - 1; // TIM runs at 1MHz - tim.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - tim.Init.CounterMode = TIM_COUNTERMODE_UP; - tim.Init.RepetitionCounter = 0; - HAL_TIM_PWM_Init(&tim); - - // PWM configuration - TIM_OC_InitTypeDef oc_init; - oc_init.OCMode = TIM_OCMODE_PWM1; - oc_init.Pulse = 0; // off - oc_init.OCPolarity = MICROPY_HW_LED_INVERTED ? TIM_OCPOLARITY_LOW : TIM_OCPOLARITY_HIGH; - oc_init.OCFastMode = TIM_OCFAST_DISABLE; - oc_init.OCNPolarity = TIM_OCNPOLARITY_HIGH; // needed for TIM1 and TIM8 - oc_init.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 - oc_init.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8 - HAL_TIM_PWM_ConfigChannel(&tim, &oc_init, pwm_cfg->tim_channel); - HAL_TIM_PWM_Start(&tim, pwm_cfg->tim_channel); - - // indicate that this LED is using PWM - led_pwm_state |= 1 << led; -} - -STATIC void led_pwm_deinit(int led) { - // make the LED's pin a standard GPIO output pin - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - GPIO_TypeDef *g = led_pin->gpio; - uint32_t pin = led_pin->pin; - static const int mode = 1; // output - static const int alt = 0; // no alt func - g->MODER = (g->MODER & ~(3 << (2 * pin))) | (mode << (2 * pin)); - g->AFR[pin >> 3] = (g->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); - led_pwm_state &= ~(1 << led); -} - -#else -#define LED_PWM_ENABLED (0) -#endif - -void led_state(pyb_led_t led, int state) { - if (led < 1 || led > NUM_LEDS) { - return; - } - - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - //printf("led_state(%d,%d)\n", led, state); - if (state == 0) { - // turn LED off - MICROPY_HW_LED_OFF(led_pin); - } else { - // turn LED on - MICROPY_HW_LED_ON(led_pin); - } - - #if LED_PWM_ENABLED - if (led_pwm_is_enabled(led)) { - led_pwm_deinit(led); - } - #endif -} - -void led_toggle(pyb_led_t led) { - if (led < 1 || led > NUM_LEDS) { - return; - } - - #if LED_PWM_ENABLED - if (led_pwm_is_enabled(led)) { - // if PWM is enabled then LED has non-zero intensity, so turn it off - led_state(led, 0); - return; - } - #endif - - // toggle the output data register to toggle the LED state - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - led_pin->gpio->ODR ^= led_pin->pin_mask; -} - -int led_get_intensity(pyb_led_t led) { - if (led < 1 || led > NUM_LEDS) { - return 0; - } - - #if LED_PWM_ENABLED - if (led_pwm_is_enabled(led)) { - const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1]; - mp_uint_t i = (*LED_PWM_CCR(pwm_cfg) * 255 + LED_PWM_TIM_PERIOD - 2) / (LED_PWM_TIM_PERIOD - 1); - if (i > 255) { - i = 255; - } - return i; - } - #endif - - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - GPIO_TypeDef *gpio = led_pin->gpio; - - if (gpio->ODR & led_pin->pin_mask) { - // pin is high - return MICROPY_HW_LED_INVERTED ? 0 : 255; - } else { - // pin is low - return MICROPY_HW_LED_INVERTED ? 255 : 0; - } -} - -void led_set_intensity(pyb_led_t led, mp_int_t intensity) { - #if LED_PWM_ENABLED - if (intensity > 0 && intensity < 255) { - const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1]; - if (pwm_cfg->tim != NULL) { - // set intensity using PWM pulse width - if (!led_pwm_is_enabled(led)) { - led_pwm_init(led); - } - *LED_PWM_CCR(pwm_cfg) = intensity * (LED_PWM_TIM_PERIOD - 1) / 255; - return; - } - } - #endif - - // intensity not supported for this LED; just turn it on/off - led_state(led, intensity > 0); -} - -void led_debug(int n, int delay) { - led_state(1, n & 1); - led_state(2, n & 2); - led_state(3, n & 4); - led_state(4, n & 8); - mp_hal_delay_ms(delay); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -void led_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - mp_printf(print, "LED(%u)", self->led_id); -} - -/// \classmethod \constructor(id) -/// Create an LED object associated with the given LED: -/// -/// - `id` is the LED number, 1-4. -STATIC mp_obj_t led_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get led number - mp_int_t led_id = mp_obj_get_int(args[0]); - - // check led number - if (!(1 <= led_id && led_id <= NUM_LEDS)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED(%d) doesn't exist", led_id)); - } - - // return static led object - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -/// \method on() -/// Turn the LED on. -mp_obj_t led_obj_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 1); - return mp_const_none; -} - -/// \method off() -/// Turn the LED off. -mp_obj_t led_obj_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 0); - return mp_const_none; -} - -/// \method toggle() -/// Toggle the LED between on and off. -mp_obj_t led_obj_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(self->led_id); - return mp_const_none; -} - -/// \method intensity([value]) -/// Get or set the LED intensity. Intensity ranges between 0 (off) and 255 (full on). -/// If no argument is given, return the LED intensity. -/// If an argument is given, set the LED intensity and return `None`. -mp_obj_t led_obj_intensity(size_t n_args, const mp_obj_t *args) { - pyb_led_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(led_get_intensity(self->led_id)); - } else { - led_set_intensity(self->led_id, mp_obj_get_int(args[1])); - return mp_const_none; - } -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_on_obj, led_obj_on); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_off_obj, led_obj_off); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_toggle_obj, led_obj_toggle); -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(led_obj_intensity_obj, 1, 2, led_obj_intensity); - -STATIC const mp_rom_map_elem_t led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&led_obj_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&led_obj_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&led_obj_toggle_obj) }, - { MP_ROM_QSTR(MP_QSTR_intensity), MP_ROM_PTR(&led_obj_intensity_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(led_locals_dict, led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = led_obj_print, - .make_new = led_obj_make_new, - .locals_dict = (mp_obj_dict_t*)&led_locals_dict, -}; - -#else -// For boards with no LEDs, we leave an empty function here so that we don't -// have to put conditionals everywhere. -void led_init(void) { -} -void led_state(pyb_led_t led, int state) { -} -void led_toggle(pyb_led_t led) { -} -#endif // defined(MICROPY_HW_LED1) diff --git a/ports/stm32/led.h b/ports/stm32/led.h deleted file mode 100644 index 1cc96b75ab..0000000000 --- a/ports/stm32/led.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_LED_H -#define MICROPY_INCLUDED_STM32_LED_H - -typedef enum { - PYB_LED_RED = 1, - PYB_LED_GREEN = 2, - PYB_LED_YELLOW = 3, - PYB_LED_BLUE = 4, -} pyb_led_t; - -void led_init(void); -void led_state(pyb_led_t led, int state); -void led_toggle(pyb_led_t led); -void led_debug(int value, int delay); - -extern const mp_obj_type_t pyb_led_type; - -#endif // MICROPY_INCLUDED_STM32_LED_H diff --git a/ports/stm32/lwip_inc/arch/cc.h b/ports/stm32/lwip_inc/arch/cc.h deleted file mode 100644 index 635b1c8056..0000000000 --- a/ports/stm32/lwip_inc/arch/cc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef MICROPY_INCLUDED_STM32_LWIP_ARCH_CC_H -#define MICROPY_INCLUDED_STM32_LWIP_ARCH_CC_H - -#include -#define LWIP_PLATFORM_DIAG(x) -#define LWIP_PLATFORM_ASSERT(x) { assert(1); } - -#endif // MICROPY_INCLUDED_STM32_LWIP_ARCH_CC_H diff --git a/ports/stm32/lwip_inc/arch/sys_arch.h b/ports/stm32/lwip_inc/arch/sys_arch.h deleted file mode 100644 index 8b1a393741..0000000000 --- a/ports/stm32/lwip_inc/arch/sys_arch.h +++ /dev/null @@ -1 +0,0 @@ -// empty diff --git a/ports/stm32/lwip_inc/lwipopts.h b/ports/stm32/lwip_inc/lwipopts.h deleted file mode 100644 index b8ab8a2ab0..0000000000 --- a/ports/stm32/lwip_inc/lwipopts.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef MICROPY_INCLUDED_STM32_LWIP_LWIPOPTS_H -#define MICROPY_INCLUDED_STM32_LWIP_LWIPOPTS_H - -#include - -#define NO_SYS 1 -#define SYS_LIGHTWEIGHT_PROT 1 -#define MEM_ALIGNMENT 4 - -#define LWIP_CHKSUM_ALGORITHM 3 - -#define LWIP_ARP 1 -#define LWIP_ETHERNET 1 -#define LWIP_NETCONN 0 -#define LWIP_SOCKET 0 -#define LWIP_STATS 0 -#define LWIP_NETIF_HOSTNAME 1 - -#define LWIP_IPV6 0 -#define LWIP_DHCP 1 -#define LWIP_DHCP_CHECK_LINK_UP 1 -#define LWIP_DNS 1 -#define LWIP_IGMP 1 - -#define SO_REUSE 1 - -extern uint32_t rng_get(void); -#define LWIP_RAND() rng_get() - -// default -// lwip takes 15800 bytes; TCP d/l: 380k/s local, 7.2k/s remote -// TCP u/l is very slow - -#if 0 -// lwip takes 19159 bytes; TCP d/l and u/l are around 320k/s on local network -#define MEM_SIZE (5000) -#define TCP_WND (4 * TCP_MSS) -#define TCP_SND_BUF (4 * TCP_MSS) -#endif - -#if 1 -// lwip takes 26700 bytes; TCP dl/ul are around 750/600 k/s on local network -#define MEM_SIZE (8000) -#define TCP_MSS (800) -#define TCP_WND (8 * TCP_MSS) -#define TCP_SND_BUF (8 * TCP_MSS) -#define MEMP_NUM_TCP_SEG (32) -#endif - -#if 0 -// lwip takes 45600 bytes; TCP dl/ul are around 1200/1000 k/s on local network -#define MEM_SIZE (16000) -#define TCP_MSS (1460) -#define TCP_WND (8 * TCP_MSS) -#define TCP_SND_BUF (8 * TCP_MSS) -#define MEMP_NUM_TCP_SEG (32) -#endif - -typedef uint32_t sys_prot_t; - -#endif // MICROPY_INCLUDED_STM32_LWIP_LWIPOPTS_H diff --git a/ports/stm32/machine_i2c.c b/ports/stm32/machine_i2c.c deleted file mode 100644 index b7a9ea69bf..0000000000 --- a/ports/stm32/machine_i2c.c +++ /dev/null @@ -1,256 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "py/mperrno.h" -#include "extmod/machine_i2c.h" -#include "i2c.h" - -#if MICROPY_HW_ENABLE_HW_I2C - -STATIC const mp_obj_type_t machine_hard_i2c_type; - -#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) - -typedef struct _machine_hard_i2c_obj_t { - mp_obj_base_t base; - i2c_t *i2c; - mp_hal_pin_obj_t scl; - mp_hal_pin_obj_t sda; -} machine_hard_i2c_obj_t; - -STATIC const machine_hard_i2c_obj_t machine_hard_i2c_obj[] = { - #if defined(MICROPY_HW_I2C1_SCL) - {{&machine_hard_i2c_type}, I2C1, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA}, - #else - {{NULL}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C2_SCL) - {{&machine_hard_i2c_type}, I2C2, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA}, - #else - {{NULL}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C3_SCL) - {{&machine_hard_i2c_type}, I2C3, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA}, - #else - {{NULL}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C4_SCL) - {{&machine_hard_i2c_type}, I2C4, MICROPY_HW_I2C4_SCL, MICROPY_HW_I2C4_SDA}, - #else - {{NULL}, NULL, NULL, NULL}, - #endif -}; - -STATIC void machine_hard_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - - #if defined(STM32F4) - - uint32_t freq = self->i2c->CR2 & 0x3f; - uint32_t ccr = self->i2c->CCR; - if (ccr & 0x8000) { - // Fast mode, assume duty cycle of 16/9 - freq = freq * 40000 / (ccr & 0xfff); - } else { - // Standard mode - freq = freq * 500000 / (ccr & 0xfff); - } - - mp_printf(print, "I2C(%u, scl=%q, sda=%q, freq=%u)", - self - &machine_hard_i2c_obj[0] + 1, - mp_hal_pin_name(self->scl), mp_hal_pin_name(self->sda), - freq); - - #else - - uint32_t timingr = self->i2c->TIMINGR; - uint32_t presc = timingr >> 28; - uint32_t sclh = timingr >> 8 & 0xff; - uint32_t scll = timingr & 0xff; - uint32_t freq = HAL_RCC_GetPCLK1Freq() / (presc + 1) / (sclh + scll + 2); - mp_printf(print, "I2C(%u, scl=%q, sda=%q, freq=%u, timingr=0x%08x)", - self - &machine_hard_i2c_obj[0] + 1, - mp_hal_pin_name(self->scl), mp_hal_pin_name(self->sda), - freq, timingr); - - #endif -} - -void machine_hard_i2c_init(machine_hard_i2c_obj_t *self, uint32_t freq, uint32_t timeout) { - (void)timeout; - i2c_init(self->i2c, self->scl, self->sda, freq); -} - -int machine_hard_i2c_readfrom(mp_obj_base_t *self_in, uint16_t addr, uint8_t *dest, size_t len, bool stop) { - machine_hard_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - return i2c_readfrom(self->i2c, addr, dest, len, stop); -} - -int machine_hard_i2c_writeto(mp_obj_base_t *self_in, uint16_t addr, const uint8_t *src, size_t len, bool stop) { - machine_hard_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - return i2c_writeto(self->i2c, addr, src, len, stop); -} - -#else - -// No hardware I2C driver for this MCU so use the software implementation - -typedef mp_machine_soft_i2c_obj_t machine_hard_i2c_obj_t; - -STATIC machine_hard_i2c_obj_t machine_hard_i2c_obj[] = { - #if defined(MICROPY_HW_I2C1_SCL) - {{&machine_hard_i2c_type}, 1, 500, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C2_SCL) - {{&machine_hard_i2c_type}, 1, 500, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C3_SCL) - {{&machine_hard_i2c_type}, 1, 500, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C4_SCL) - {{&machine_hard_i2c_type}, 1, 500, MICROPY_HW_I2C4_SCL, MICROPY_HW_I2C4_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif -}; - -STATIC void machine_hard_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "I2C(%u, scl=%q, sda=%q, freq=%u, timeout=%u)", - self - &machine_hard_i2c_obj[0] + 1, - self->scl->name, self->sda->name, 500000 / self->us_delay, self->us_timeout); -} - -STATIC void machine_hard_i2c_init(machine_hard_i2c_obj_t *self, uint32_t freq, uint32_t timeout) { - // set parameters - if (freq >= 1000000) { - // allow fastest possible bit-bang rate - self->us_delay = 0; - } else { - self->us_delay = 500000 / freq; - if (self->us_delay == 0) { - self->us_delay = 1; - } - } - - self->us_timeout = timeout; - - // init pins - mp_hal_pin_open_drain(self->scl); - mp_hal_pin_open_drain(self->sda); -} - -#define machine_hard_i2c_readfrom mp_machine_soft_i2c_readfrom -#define machine_hard_i2c_writeto mp_machine_soft_i2c_writeto - -#endif - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -mp_obj_t machine_hard_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - enum { ARG_id, ARG_scl, ARG_sda, ARG_freq, ARG_timeout }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // work out i2c bus - int i2c_id = 0; - if (MP_OBJ_IS_STR(args[ARG_id].u_obj)) { - const char *port = mp_obj_str_get_str(args[ARG_id].u_obj); - if (0) { - #ifdef MICROPY_HW_I2C1_NAME - } else if (strcmp(port, MICROPY_HW_I2C1_NAME) == 0) { - i2c_id = 1; - #endif - #ifdef MICROPY_HW_I2C2_NAME - } else if (strcmp(port, MICROPY_HW_I2C2_NAME) == 0) { - i2c_id = 2; - #endif - #ifdef MICROPY_HW_I2C3_NAME - } else if (strcmp(port, MICROPY_HW_I2C3_NAME) == 0) { - i2c_id = 3; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%s) doesn't exist", port)); - } - } else { - i2c_id = mp_obj_get_int(args[ARG_id].u_obj); - if (i2c_id < 1 || i2c_id > MP_ARRAY_SIZE(machine_hard_i2c_obj) - || machine_hard_i2c_obj[i2c_id - 1].base.type == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%d) doesn't exist", i2c_id)); - } - } - - // get static peripheral object - machine_hard_i2c_obj_t *self = (machine_hard_i2c_obj_t*)&machine_hard_i2c_obj[i2c_id - 1]; - - // here we would check the scl/sda pins and configure them, but it's not implemented - if (args[ARG_scl].u_obj != MP_OBJ_NULL || args[ARG_sda].u_obj != MP_OBJ_NULL) { - mp_raise_ValueError("explicit choice of scl/sda is not implemented"); - } - - // initialise the I2C peripheral - machine_hard_i2c_init(self, args[ARG_freq].u_int, args[ARG_timeout].u_int); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC const mp_machine_i2c_p_t machine_hard_i2c_p = { - .readfrom = machine_hard_i2c_readfrom, - .writeto = machine_hard_i2c_writeto, -}; - -STATIC const mp_obj_type_t machine_hard_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = machine_hard_i2c_print, - .make_new = machine_hard_i2c_make_new, - .protocol = &machine_hard_i2c_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_soft_i2c_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_HW_I2C diff --git a/ports/stm32/main.c b/ports/stm32/main.c deleted file mode 100644 index c018d2de2a..0000000000 --- a/ports/stm32/main.c +++ /dev/null @@ -1,762 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "lib/mp-readline/readline.h" -#include "lib/utils/pyexec.h" -#include "lib/oofatfs/ff.h" -#include "lwip/init.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" - -#include "systick.h" -#include "pendsv.h" -#include "pybthread.h" -#include "gccollect.h" -#include "modmachine.h" -#include "i2c.h" -#include "spi.h" -#include "uart.h" -#include "timer.h" -#include "led.h" -#include "pin.h" -#include "extint.h" -#include "usrsw.h" -#include "usb.h" -#include "rtc.h" -#include "storage.h" -#include "sdcard.h" -#include "rng.h" -#include "accel.h" -#include "servo.h" -#include "dac.h" -#include "can.h" -#include "modnetwork.h" - -void SystemClock_Config(void); - -pyb_thread_t pyb_thread_main; -fs_user_mount_t fs_user_mount_flash; - -void flash_error(int n) { - for (int i = 0; i < n; i++) { - led_state(PYB_LED_RED, 1); - led_state(PYB_LED_GREEN, 0); - mp_hal_delay_ms(250); - led_state(PYB_LED_RED, 0); - led_state(PYB_LED_GREEN, 1); - mp_hal_delay_ms(250); - } - led_state(PYB_LED_GREEN, 0); -} - -void NORETURN __fatal_error(const char *msg) { - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - led_state(1, 1); - led_state(2, 1); - led_state(3, 1); - led_state(4, 1); - mp_hal_stdout_tx_strn("\nFATAL ERROR:\n", 14); - mp_hal_stdout_tx_strn(msg, strlen(msg)); - for (uint i = 0;;) { - led_toggle(((i++) & 3) + 1); - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - if (i >= 16) { - // to conserve power - __WFI(); - } - } -} - -void nlr_jump_fail(void *val) { - printf("FATAL: uncaught exception %p\n", val); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)val); - __fatal_error(""); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - (void)func; - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error(""); -} -#endif - -STATIC mp_obj_t pyb_main(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_opt, MP_ARG_INT, {.u_int = 0} } - }; - - if (MP_OBJ_IS_STR(pos_args[0])) { - MP_STATE_PORT(pyb_config_main) = pos_args[0]; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - MP_STATE_VM(mp_optimise_value) = args[0].u_int; - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_main_obj, 1, pyb_main); - -#if MICROPY_HW_ENABLE_STORAGE -static const char fresh_boot_py[] = -"# boot.py -- run on boot-up\r\n" -"# can run arbitrary Python, but best to keep it minimal\r\n" -"\r\n" -"import machine\r\n" -"import pyb\r\n" -"#pyb.main('main.py') # main script to run after this one\r\n" -#if MICROPY_HW_ENABLE_USB -"#pyb.usb_mode('VCP+MSC') # act as a serial and a storage device\r\n" -"#pyb.usb_mode('VCP+HID') # act as a serial device and a mouse\r\n" -#endif -; - -static const char fresh_main_py[] = -"# main.py -- put your code here!\r\n" -; - -static const char fresh_pybcdc_inf[] = -#include "genhdr/pybcdc_inf.h" -; - -static const char fresh_readme_txt[] = -"This is a MicroPython board\r\n" -"\r\n" -"You can get started right away by writing your Python code in 'main.py'.\r\n" -"\r\n" -"For a serial prompt:\r\n" -" - Windows: you need to go to 'Device manager', right click on the unknown device,\r\n" -" then update the driver software, using the 'pybcdc.inf' file found on this drive.\r\n" -" Then use a terminal program like Hyperterminal or putty.\r\n" -" - Mac OS X: use the command: screen /dev/tty.usbmodem*\r\n" -" - Linux: use the command: screen /dev/ttyACM0\r\n" -"\r\n" -"Please visit http://micropython.org/help/ for further help.\r\n" -; - -// avoid inlining to avoid stack usage within main() -MP_NOINLINE STATIC bool init_flash_fs(uint reset_mode) { - // init the vfs object - fs_user_mount_t *vfs_fat = &fs_user_mount_flash; - vfs_fat->flags = 0; - pyb_flash_init_vfs(vfs_fat); - - // try to mount the flash - FRESULT res = f_mount(&vfs_fat->fatfs); - - if (reset_mode == 3 || res == FR_NO_FILESYSTEM) { - // no filesystem, or asked to reset it, so create a fresh one - - // LED on to indicate creation of LFS - led_state(PYB_LED_GREEN, 1); - uint32_t start_tick = HAL_GetTick(); - - uint8_t working_buf[_MAX_SS]; - res = f_mkfs(&vfs_fat->fatfs, FM_FAT, 0, working_buf, sizeof(working_buf)); - if (res == FR_OK) { - // success creating fresh LFS - } else { - printf("PYB: can't create flash filesystem\n"); - return false; - } - - // set label - f_setlabel(&vfs_fat->fatfs, MICROPY_HW_FLASH_FS_LABEL); - - // create empty main.py - FIL fp; - f_open(&vfs_fat->fatfs, &fp, "/main.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_main_py, sizeof(fresh_main_py) - 1 /* don't count null terminator */, &n); - // TODO check we could write n bytes - f_close(&fp); - - // create .inf driver file - f_open(&vfs_fat->fatfs, &fp, "/pybcdc.inf", FA_WRITE | FA_CREATE_ALWAYS); - f_write(&fp, fresh_pybcdc_inf, sizeof(fresh_pybcdc_inf) - 1 /* don't count null terminator */, &n); - f_close(&fp); - - // create readme file - f_open(&vfs_fat->fatfs, &fp, "/README.txt", FA_WRITE | FA_CREATE_ALWAYS); - f_write(&fp, fresh_readme_txt, sizeof(fresh_readme_txt) - 1 /* don't count null terminator */, &n); - f_close(&fp); - - // keep LED on for at least 200ms - sys_tick_wait_at_least(start_tick, 200); - led_state(PYB_LED_GREEN, 0); - } else if (res == FR_OK) { - // mount sucessful - } else { - fail: - printf("PYB: can't mount flash\n"); - return false; - } - - // mount the flash device (there should be no other devices mounted at this point) - // we allocate this structure on the heap because vfs->next is a root pointer - mp_vfs_mount_t *vfs = m_new_obj_maybe(mp_vfs_mount_t); - if (vfs == NULL) { - goto fail; - } - vfs->str = "/flash"; - vfs->len = 6; - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - MP_STATE_VM(vfs_mount_table) = vfs; - - // The current directory is used as the boot up directory. - // It is set to the internal flash filesystem by default. - MP_STATE_PORT(vfs_cur) = vfs; - - // Make sure we have a /flash/boot.py. Create it if needed. - FILINFO fno; - res = f_stat(&vfs_fat->fatfs, "/boot.py", &fno); - if (res != FR_OK) { - // doesn't exist, create fresh file - - // LED on to indicate creation of boot.py - led_state(PYB_LED_GREEN, 1); - uint32_t start_tick = HAL_GetTick(); - - FIL fp; - f_open(&vfs_fat->fatfs, &fp, "/boot.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_boot_py, sizeof(fresh_boot_py) - 1 /* don't count null terminator */, &n); - // TODO check we could write n bytes - f_close(&fp); - - // keep LED on for at least 200ms - sys_tick_wait_at_least(start_tick, 200); - led_state(PYB_LED_GREEN, 0); - } - - return true; -} -#endif - -#if MICROPY_HW_HAS_SDCARD -STATIC bool init_sdcard_fs(void) { - bool first_part = true; - for (int part_num = 1; part_num <= 4; ++part_num) { - // create vfs object - fs_user_mount_t *vfs_fat = m_new_obj_maybe(fs_user_mount_t); - mp_vfs_mount_t *vfs = m_new_obj_maybe(mp_vfs_mount_t); - if (vfs == NULL || vfs_fat == NULL) { - break; - } - vfs_fat->flags = FSUSER_FREE_OBJ; - sdcard_init_vfs(vfs_fat, part_num); - - // try to mount the partition - FRESULT res = f_mount(&vfs_fat->fatfs); - - if (res != FR_OK) { - // couldn't mount - m_del_obj(fs_user_mount_t, vfs_fat); - m_del_obj(mp_vfs_mount_t, vfs); - } else { - // mounted via FatFs, now mount the SD partition in the VFS - if (first_part) { - // the first available partition is traditionally called "sd" for simplicity - vfs->str = "/sd"; - vfs->len = 3; - } else { - // subsequent partitions are numbered by their index in the partition table - if (part_num == 2) { - vfs->str = "/sd2"; - } else if (part_num == 2) { - vfs->str = "/sd3"; - } else { - vfs->str = "/sd4"; - } - vfs->len = 4; - } - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - for (mp_vfs_mount_t **m = &MP_STATE_VM(vfs_mount_table);; m = &(*m)->next) { - if (*m == NULL) { - *m = vfs; - break; - } - } - - #if MICROPY_HW_ENABLE_USB - if (pyb_usb_storage_medium == PYB_USB_STORAGE_MEDIUM_NONE) { - // if no USB MSC medium is selected then use the SD card - pyb_usb_storage_medium = PYB_USB_STORAGE_MEDIUM_SDCARD; - } - #endif - - #if MICROPY_HW_ENABLE_USB - // only use SD card as current directory if that's what the USB medium is - if (pyb_usb_storage_medium == PYB_USB_STORAGE_MEDIUM_SDCARD) - #endif - { - if (first_part) { - // use SD card as current directory - MP_STATE_PORT(vfs_cur) = vfs; - } - } - first_part = false; - } - } - - if (first_part) { - printf("PYB: can't mount SD card\n"); - return false; - } else { - return true; - } -} -#endif - -#if !MICROPY_HW_USES_BOOTLOADER -STATIC uint update_reset_mode(uint reset_mode) { - #if MICROPY_HW_HAS_SWITCH - if (switch_get()) { - - // The original method used on the pyboard is appropriate if you have 2 - // or more LEDs. - #if defined(MICROPY_HW_LED2) - for (uint i = 0; i < 3000; i++) { - if (!switch_get()) { - break; - } - mp_hal_delay_ms(20); - if (i % 30 == 29) { - if (++reset_mode > 3) { - reset_mode = 1; - } - led_state(2, reset_mode & 1); - led_state(3, reset_mode & 2); - led_state(4, reset_mode & 4); - } - } - // flash the selected reset mode - for (uint i = 0; i < 6; i++) { - led_state(2, 0); - led_state(3, 0); - led_state(4, 0); - mp_hal_delay_ms(50); - led_state(2, reset_mode & 1); - led_state(3, reset_mode & 2); - led_state(4, reset_mode & 4); - mp_hal_delay_ms(50); - } - mp_hal_delay_ms(400); - - #elif defined(MICROPY_HW_LED1) - - // For boards with only a single LED, we'll flash that LED the - // appropriate number of times, with a pause between each one - for (uint i = 0; i < 10; i++) { - led_state(1, 0); - for (uint j = 0; j < reset_mode; j++) { - if (!switch_get()) { - break; - } - led_state(1, 1); - mp_hal_delay_ms(100); - led_state(1, 0); - mp_hal_delay_ms(200); - } - mp_hal_delay_ms(400); - if (!switch_get()) { - break; - } - if (++reset_mode > 3) { - reset_mode = 1; - } - } - // Flash the selected reset mode - for (uint i = 0; i < 2; i++) { - for (uint j = 0; j < reset_mode; j++) { - led_state(1, 1); - mp_hal_delay_ms(100); - led_state(1, 0); - mp_hal_delay_ms(200); - } - mp_hal_delay_ms(400); - } - #else - #error Need a reset mode update method - #endif - } - #endif - return reset_mode; -} -#endif - -void stm32_main(uint32_t reset_mode) { - // Enable caches and prefetch buffers - - #if defined(STM32F4) - - #if INSTRUCTION_CACHE_ENABLE - __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - #endif - #if DATA_CACHE_ENABLE - __HAL_FLASH_DATA_CACHE_ENABLE(); - #endif - #if PREFETCH_ENABLE - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - #endif - - #elif defined(STM32F7) || defined(STM32H7) - - #if ART_ACCLERATOR_ENABLE - __HAL_FLASH_ART_ENABLE(); - #endif - - SCB_EnableICache(); - SCB_EnableDCache(); - - #elif defined(STM32L4) - - #if !INSTRUCTION_CACHE_ENABLE - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - #endif - #if !DATA_CACHE_ENABLE - __HAL_FLASH_DATA_CACHE_DISABLE(); - #endif - #if PREFETCH_ENABLE - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - #endif - - #endif - - #if __CORTEX_M >= 0x03 - // Set the priority grouping - NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - #endif - - // SysTick is needed by HAL_RCC_ClockConfig (called in SystemClock_Config) - HAL_InitTick(TICK_INT_PRIORITY); - - // set the system clock to be HSE - SystemClock_Config(); - - // enable GPIO clocks - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - - #if defined(STM32F4) || defined(STM32F7) - #if defined(__HAL_RCC_DTCMRAMEN_CLK_ENABLE) - // The STM32F746 doesn't really have CCM memory, but it does have DTCM, - // which behaves more or less like normal SRAM. - __HAL_RCC_DTCMRAMEN_CLK_ENABLE(); - #elif defined(CCMDATARAM_BASE) - // enable the CCM RAM - __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); - #endif - #elif defined(STM32H7) - // Enable D2 SRAM1/2/3 clocks. - __HAL_RCC_D2SRAM1_CLK_ENABLE(); - __HAL_RCC_D2SRAM2_CLK_ENABLE(); - __HAL_RCC_D2SRAM3_CLK_ENABLE(); - #endif - - - #if defined(MICROPY_BOARD_EARLY_INIT) - MICROPY_BOARD_EARLY_INIT(); - #endif - - // basic sub-system init - #if MICROPY_PY_THREAD - pyb_thread_init(&pyb_thread_main); - #endif - pendsv_init(); - led_init(); - #if MICROPY_HW_HAS_SWITCH - switch_init0(); - #endif - machine_init(); - #if MICROPY_HW_ENABLE_RTC - rtc_init_start(false); - #endif - spi_init0(); - #if MICROPY_PY_PYB_LEGACY && MICROPY_HW_ENABLE_HW_I2C - i2c_init0(); - #endif - #if MICROPY_HW_HAS_SDCARD - sdcard_init(); - #endif - #if MICROPY_HW_ENABLE_STORAGE - storage_init(); - #endif - #if MICROPY_PY_LWIP - // lwIP doesn't allow to reinitialise itself by subsequent calls to this function - // because the system timeout list (next_timeout) is only ever reset by BSS clearing. - // So for now we only init the lwIP stack once on power-up. - lwip_init(); - #endif - -soft_reset: - - #if defined(MICROPY_HW_LED2) - led_state(1, 0); - led_state(2, 1); - #else - led_state(1, 1); - led_state(2, 0); - #endif - led_state(3, 0); - led_state(4, 0); - - #if !MICROPY_HW_USES_BOOTLOADER - // check if user switch held to select the reset mode - reset_mode = update_reset_mode(1); - #endif - - // Python threading init - #if MICROPY_PY_THREAD - mp_thread_init(); - #endif - - // Stack limit should be less than real stack size, so we have a chance - // to recover from limit hit. (Limit is measured in bytes.) - // Note: stack control relies on main thread being initialised above - mp_stack_set_top(&_estack); - mp_stack_set_limit((char*)&_estack - (char*)&_heap_end - 1024); - - // GC init - gc_init(&_heap_start, &_heap_end); - - #if MICROPY_ENABLE_PYSTACK - static mp_obj_t pystack[384]; - mp_pystack_init(pystack, &pystack[384]); - #endif - - // MicroPython init - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_init(mp_sys_argv, 0); - - // Initialise low-level sub-systems. Here we need to very basic things like - // zeroing out memory and resetting any of the sub-systems. Following this - // we can run Python scripts (eg boot.py), but anything that is configurable - // by boot.py must be set after boot.py is run. - - readline_init0(); - pin_init0(); - extint_init0(); - timer_init0(); - uart_init0(); - - // Define MICROPY_HW_UART_REPL to be PYB_UART_6 and define - // MICROPY_HW_UART_REPL_BAUD in your mpconfigboard.h file if you want a - // REPL on a hardware UART as well as on USB VCP - #if defined(MICROPY_HW_UART_REPL) - { - mp_obj_t args[2] = { - MP_OBJ_NEW_SMALL_INT(MICROPY_HW_UART_REPL), - MP_OBJ_NEW_SMALL_INT(MICROPY_HW_UART_REPL_BAUD), - }; - MP_STATE_PORT(pyb_stdio_uart) = pyb_uart_type.make_new((mp_obj_t)&pyb_uart_type, MP_ARRAY_SIZE(args), 0, args); - uart_attach_to_repl(MP_STATE_PORT(pyb_stdio_uart), true); - } - #else - MP_STATE_PORT(pyb_stdio_uart) = NULL; - #endif - - #if MICROPY_HW_ENABLE_CAN - can_init0(); - #endif - - #if MICROPY_HW_ENABLE_USB - pyb_usb_init0(); - #endif - - // Initialise the local flash filesystem. - // Create it if needed, mount in on /flash, and set it as current dir. - bool mounted_flash = false; - #if MICROPY_HW_ENABLE_STORAGE - mounted_flash = init_flash_fs(reset_mode); - #endif - - bool mounted_sdcard = false; - #if MICROPY_HW_HAS_SDCARD - // if an SD card is present then mount it on /sd/ - if (sdcard_is_present()) { - // if there is a file in the flash called "SKIPSD", then we don't mount the SD card - if (!mounted_flash || f_stat(&fs_user_mount_flash.fatfs, "/SKIPSD", NULL) != FR_OK) { - mounted_sdcard = init_sdcard_fs(); - } - } - #endif - - #if MICROPY_HW_ENABLE_USB - // if the SD card isn't used as the USB MSC medium then use the internal flash - if (pyb_usb_storage_medium == PYB_USB_STORAGE_MEDIUM_NONE) { - pyb_usb_storage_medium = PYB_USB_STORAGE_MEDIUM_FLASH; - } - #endif - - // set sys.path based on mounted filesystems (/sd is first so it can override /flash) - if (mounted_sdcard) { - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_sd)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_sd_slash_lib)); - } - if (mounted_flash) { - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash_slash_lib)); - } - - // reset config variables; they should be set by boot.py - MP_STATE_PORT(pyb_config_main) = MP_OBJ_NULL; - - // run boot.py, if it exists - // TODO perhaps have pyb.reboot([bootpy]) function to soft-reboot and execute custom boot.py - if (reset_mode == 1 || reset_mode == 3) { - const char *boot_py = "boot.py"; - mp_import_stat_t stat = mp_import_stat(boot_py); - if (stat == MP_IMPORT_STAT_FILE) { - int ret = pyexec_file(boot_py); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - flash_error(4); - } - } - } - - // turn boot-up LEDs off - #if !defined(MICROPY_HW_LED2) - // If there is only one LED on the board then it's used to signal boot-up - // and so we turn it off here. Otherwise LED(1) is used to indicate dirty - // flash cache and so we shouldn't change its state. - led_state(1, 0); - #endif - led_state(2, 0); - led_state(3, 0); - led_state(4, 0); - - // Now we initialise sub-systems that need configuration from boot.py, - // or whose initialisation can be safely deferred until after running - // boot.py. - - #if MICROPY_HW_ENABLE_USB - // init USB device to default setting if it was not already configured - if (!(pyb_usb_flags & PYB_USB_FLAG_USB_MODE_CALLED)) { - pyb_usb_dev_init(USBD_VID, USBD_PID_CDC_MSC, USBD_MODE_CDC_MSC, NULL); - } - #endif - - #if MICROPY_HW_HAS_MMA7660 - // MMA accel: init and reset - accel_init(); - #endif - - #if MICROPY_HW_ENABLE_SERVO - servo_init(); - #endif - - #if MICROPY_HW_ENABLE_DAC - dac_init(); - #endif - - #if MICROPY_PY_NETWORK - mod_network_init(); - #endif - - // At this point everything is fully configured and initialised. - - // Run the main script from the current directory. - if ((reset_mode == 1 || reset_mode == 3) && pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) { - const char *main_py; - if (MP_STATE_PORT(pyb_config_main) == MP_OBJ_NULL) { - main_py = "main.py"; - } else { - main_py = mp_obj_str_get_str(MP_STATE_PORT(pyb_config_main)); - } - mp_import_stat_t stat = mp_import_stat(main_py); - if (stat == MP_IMPORT_STAT_FILE) { - int ret = pyexec_file(main_py); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - flash_error(3); - } - } - } - - // Main script is finished, so now go into REPL mode. - // The REPL mode can change, or it can request a soft reset. - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - -soft_reset_exit: - - // soft reset - - #if MICROPY_HW_ENABLE_STORAGE - printf("PYB: sync filesystems\n"); - storage_flush(); - #endif - - printf("PYB: soft reboot\n"); - #if MICROPY_PY_NETWORK - mod_network_deinit(); - #endif - timer_deinit(); - uart_deinit(); - #if MICROPY_HW_ENABLE_CAN - can_deinit(); - #endif - machine_deinit(); - - #if MICROPY_PY_THREAD - pyb_thread_deinit(); - #endif - - gc_sweep_all(); - - goto soft_reset; -} diff --git a/ports/stm32/make-stmconst.py b/ports/stm32/make-stmconst.py deleted file mode 100644 index d509d00c1c..0000000000 --- a/ports/stm32/make-stmconst.py +++ /dev/null @@ -1,260 +0,0 @@ -""" -This script reads in the given CMSIS device include file (eg stm32f405xx.h), -extracts relevant peripheral constants, and creates qstrs, mpz's and constants -for the stm module. -""" - -from __future__ import print_function - -import argparse -import re - -# Python 2/3 compatibility -import platform -if platform.python_version_tuple()[0] == '2': - def convert_bytes_to_str(b): - return b -elif platform.python_version_tuple()[0] == '3': - def convert_bytes_to_str(b): - try: - return str(b, 'utf8') - except ValueError: - # some files have invalid utf8 bytes, so filter them out - return ''.join(chr(l) for l in b if l <= 126) -# end compatibility code - -# given a list of (name,regex) pairs, find the first one that matches the given line -def re_match_first(regexs, line): - for name, regex in regexs: - match = re.match(regex, line) - if match: - return name, match - return None, None - -class LexerError(Exception): - def __init__(self, line): - self.line = line - -class Lexer: - re_io_reg = r'__IO uint(?P8|16|32)_t +(?P[A-Z0-9]+)' - re_comment = r'(?P[A-Za-z0-9 \-/_()&]+)' - re_addr_offset = r'Address offset: (?P0x[0-9A-Z]{2,3})' - regexs = ( - ('#define hex', re.compile(r'#define +(?P[A-Z0-9_]+) +(?:\(\(uint32_t\))?(?P0x[0-9A-F]+)U?(?:\))?($| +/\*)')), - ('#define X', re.compile(r'#define +(?P[A-Z0-9_]+) +(?P[A-Z0-9_]+)($| +/\*)')), - ('#define X+hex', re.compile(r'#define +(?P[A-Za-z0-9_]+) +\((?P[A-Z0-9_]+) \+ (?P0x[0-9A-F]+)U?\)($| +/\*)')), - ('#define typedef', re.compile(r'#define +(?P[A-Z0-9_]+(ext)?) +\(\([A-Za-z0-9_]+_TypeDef \*\) (?P[A-Za-z0-9_]+)\)($| +/\*)')), - ('typedef struct', re.compile(r'typedef struct$')), - ('{', re.compile(r'{$')), - ('}', re.compile(r'}$')), - ('} TypeDef', re.compile(r'} *(?P[A-Z][A-Za-z0-9_]+)_(?P([A-Za-z0-9_]+)?)TypeDef;$')), - ('IO reg', re.compile(re_io_reg + r'; +/\*!< ' + re_comment + r', +' + re_addr_offset + r' *\*/')), - ('IO reg array', re.compile(re_io_reg + r'\[(?P[2-8])\]; +/\*!< ' + re_comment + r', +' + re_addr_offset + r'-(0x[0-9A-Z]{2,3}) *\*/')), - ) - - def __init__(self, filename): - self.file = open(filename, 'rb') - self.line_number = 0 - - def next_match(self, strictly_next=False): - while True: - line = self.file.readline() - line = convert_bytes_to_str(line) - self.line_number += 1 - if len(line) == 0: - return ('EOF', None) - match = re_match_first(Lexer.regexs, line.strip()) - if strictly_next or match[0] is not None: - return match - - def must_match(self, kind): - match = self.next_match(strictly_next=True) - if match[0] != kind: - raise LexerError(self.line_number) - return match - -def parse_file(filename): - lexer = Lexer(filename) - - reg_defs = {} - consts = {} - periphs = [] - while True: - m = lexer.next_match() - if m[0] == 'EOF': - break - elif m[0] == '#define hex': - d = m[1].groupdict() - consts[d['id']] = int(d['hex'], base=16) - elif m[0] == '#define X': - d = m[1].groupdict() - if d['id2'] in consts: - consts[d['id']] = consts[d['id2']] - elif m[0] == '#define X+hex': - d = m[1].groupdict() - if d['id2'] in consts: - consts[d['id']] = consts[d['id2']] + int(d['hex'], base=16) - elif m[0] == '#define typedef': - d = m[1].groupdict() - if d['id2'] in consts: - periphs.append((d['id'], consts[d['id2']])) - elif m[0] == 'typedef struct': - lexer.must_match('{') - m = lexer.next_match() - regs = [] - while m[0] in ('IO reg', 'IO reg array'): - d = m[1].groupdict() - reg = d['reg'] - offset = int(d['offset'], base=16) - bits = int(d['bits']) - comment = d['comment'] - if m[0] == 'IO reg': - regs.append((reg, offset, bits, comment)) - else: - for i in range(int(d['array'])): - regs.append((reg + str(i), offset + i * bits // 8, bits, comment)) - m = lexer.next_match() - if m[0] == '}': - pass - elif m[0] == '} TypeDef': - reg_defs[m[1].groupdict()['id']] = regs - else: - raise LexerError(lexer.line_number) - - return periphs, reg_defs - -def print_int_obj(val, needed_mpzs): - if -0x40000000 <= val < 0x40000000: - print('MP_ROM_INT(%#x)' % val, end='') - else: - print('MP_ROM_PTR(&mpz_%08x)' % val, end='') - needed_mpzs.add(val) - -def print_periph(periph_name, periph_val, needed_qstrs, needed_mpzs): - qstr = periph_name.upper() - print('{ MP_ROM_QSTR(MP_QSTR_%s), ' % qstr, end='') - print_int_obj(periph_val, needed_mpzs) - print(' },') - needed_qstrs.add(qstr) - -def print_regs(reg_name, reg_defs, needed_qstrs, needed_mpzs): - reg_name = reg_name.upper() - for r in reg_defs: - qstr = reg_name + '_' + r[0] - print('{ MP_ROM_QSTR(MP_QSTR_%s), ' % qstr, end='') - print_int_obj(r[1], needed_mpzs) - print(' }, // %s-bits, %s' % (r[2], r[3])) - needed_qstrs.add(qstr) - -# This version of print regs groups registers together into submodules (eg GPIO submodule). -# This makes the qstrs shorter, and makes the list of constants more manageable (since -# they are not all in one big module) but it is then harder to compile the constants, and -# is more cumbersome to access. -# As such, we don't use this version. -# And for the number of constants we have, this function seems to use about the same amount -# of ROM as print_regs. -def print_regs_as_submodules(reg_name, reg_defs, modules, needed_qstrs): - mod_name_lower = reg_name.lower() + '_' - mod_name_upper = mod_name_lower.upper() - modules.append((mod_name_lower, mod_name_upper)) - - print(""" -STATIC const mp_rom_map_elem_t stm_%s_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_%s) }, -""" % (mod_name_lower, mod_name_upper)) - needed_qstrs.add(mod_name_upper) - - for r in reg_defs: - print(' { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_INT(%#x) }, // %s-bits, %s' % (r[0], r[1], r[2], r[3])) - needed_qstrs.add(r[0]) - - print("""}; - -STATIC MP_DEFINE_CONST_DICT(stm_%s_globals, stm_%s_globals_table); - -const mp_obj_module_t stm_%s_obj = { - .base = { &mp_type_module }, - .name = MP_QSTR_%s, - .globals = (mp_obj_dict_t*)&stm_%s_globals, -}; -""" % (mod_name_lower, mod_name_lower, mod_name_lower, mod_name_upper, mod_name_lower)) - -def main(): - cmd_parser = argparse.ArgumentParser(description='Extract ST constants from a C header file.') - cmd_parser.add_argument('file', nargs=1, help='input file') - cmd_parser.add_argument('-q', '--qstr', dest='qstr_filename', default='build/stmconst_qstr.h', - help='Specified the name of the generated qstr header file') - cmd_parser.add_argument('--mpz', dest='mpz_filename', default='build/stmconst_mpz.h', - help='the destination file of the generated mpz header') - args = cmd_parser.parse_args() - - periphs, reg_defs = parse_file(args.file[0]) - - # add legacy GPIO constants that were removed when upgrading CMSIS - if 'GPIO' in reg_defs and 'stm32f4' in args.file[0]: - reg_defs['GPIO'].append(['BSRRL', 0x18, 16, 'legacy register']) - reg_defs['GPIO'].append(['BSRRH', 0x1a, 16, 'legacy register']) - - modules = [] - needed_qstrs = set() - needed_mpzs = set() - - print("// Automatically generated from %s by make-stmconst.py" % args.file[0]) - print("") - - for periph_name, periph_val in periphs: - print_periph(periph_name, periph_val, needed_qstrs, needed_mpzs) - - for reg in ( - 'ADC', - #'ADC_Common', - #'CAN_TxMailBox', - #'CAN_FIFOMailBox', - #'CAN_FilterRegister', - #'CAN', - 'CRC', - 'DAC', - 'DBGMCU', - 'DMA_Stream', - 'DMA', - 'EXTI', - 'FLASH', - 'GPIO', - 'SYSCFG', - 'I2C', - 'IWDG', - 'PWR', - 'RCC', - 'RTC', - #'SDIO', - 'SPI', - 'TIM', - 'USART', - 'WWDG', - 'RNG', - ): - if reg in reg_defs: - print_regs(reg, reg_defs[reg], needed_qstrs, needed_mpzs) - #print_regs_as_submodules(reg, reg_defs[reg], modules, needed_qstrs) - - #print("#define MOD_STM_CONST_MODULES \\") - #for mod_lower, mod_upper in modules: - # print(" { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_PTR(&stm_%s_obj) }, \\" % (mod_upper, mod_lower)) - - print("") - - with open(args.qstr_filename, 'wt') as qstr_file: - print('#if MICROPY_PY_STM', file=qstr_file) - for qstr in sorted(needed_qstrs): - print('Q({})'.format(qstr), file=qstr_file) - print('#endif // MICROPY_PY_STM', file=qstr_file) - - with open(args.mpz_filename, 'wt') as mpz_file: - for mpz in sorted(needed_mpzs): - assert 0 <= mpz <= 0xffffffff - print('STATIC const mp_obj_int_t mpz_%08x = {{&mp_type_int}, ' - '{.neg=0, .fixed_dig=1, .alloc=2, .len=2, ' '.dig=(uint16_t*)(const uint16_t[]){%#x, %#x}}};' - % (mpz, mpz & 0xffff, (mpz >> 16) & 0xffff), file=mpz_file) - -if __name__ == "__main__": - main() diff --git a/ports/stm32/mboot/Makefile b/ports/stm32/mboot/Makefile deleted file mode 100644 index b9f439482e..0000000000 --- a/ports/stm32/mboot/Makefile +++ /dev/null @@ -1,189 +0,0 @@ -# Select the board to build for: if not given on the command line, -# then default to PYBV10. -BOARD ?= PYBV10 -ifeq ($(wildcard ../boards/$(BOARD)/.),) -$(error Invalid BOARD specified) -endif - -# If the build directory is not given, make it reflect the board name. -BUILD ?= build-$(BOARD) - -include ../../../py/mkenv.mk -include ../boards/$(BOARD)/mpconfigboard.mk - -CMSIS_DIR=$(TOP)/lib/stm32lib/CMSIS/STM32$(MCU_SERIES_UPPER)xx/Include -MCU_SERIES_UPPER = $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]') -HAL_DIR=lib/stm32lib/STM32$(MCU_SERIES_UPPER)xx_HAL_Driver -USBDEV_DIR=usbdev -DFU=$(TOP)/tools/dfu.py -PYDFU ?= $(TOP)/tools/pydfu.py -DEVICE=0483:df11 -STFLASH ?= st-flash -OPENOCD ?= openocd -OPENOCD_CONFIG ?= boards/openocd_stm32f4.cfg - -CROSS_COMPILE = arm-none-eabi- - -INC += -I. -INC += -I.. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(TOP)/lib/cmsis/inc -INC += -I$(CMSIS_DIR)/ -INC += -I$(TOP)/$(HAL_DIR)/Inc -INC += -I../$(USBDEV_DIR)/core/inc -I../$(USBDEV_DIR)/class/inc - -# Basic Cortex-M flags -CFLAGS_CORTEX_M = -mthumb - -# Options for particular MCU series -CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7 -CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 - -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA) -CFLAGS += -D$(CMSIS_MCU) -CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES)) -CFLAGS += $(COPT) -CFLAGS += -I../boards/$(BOARD) -CFLAGS += -DSTM32_HAL_H='' -CFLAGS += -DBOARD_$(BOARD) -CFLAGS += -DAPPLICATION_ADDR=$(TEXT0_ADDR) - -LDFLAGS = -nostdlib -L . -T stm32_generic.ld -Map=$(@:.elf=.map) --cref -LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) - -# Remove uncalled code from the final image. -CFLAGS += -fdata-sections -ffunction-sections -LDFLAGS += --gc-sections - -# Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -DPENDSV_DEBUG -COPT = -O0 -else -COPT += -Os -DNDEBUG -endif - -SRC_LIB = $(addprefix lib/,\ - libc/string0.c \ - ) - -SRC_C = \ - main.c \ - drivers/bus/softspi.c \ - drivers/bus/softqspi.c \ - drivers/memory/spiflash.c \ - ports/stm32/i2cslave.c \ - ports/stm32/qspi.c \ - ports/stm32/flashbdev.c \ - ports/stm32/spibdev.c \ - ports/stm32/usbd_conf.c \ - $(patsubst $(TOP)/%,%,$(wildcard $(TOP)/ports/stm32/boards/$(BOARD)/*.c)) - -SRC_O = \ - ports/stm32/boards/startup_stm32$(MCU_SERIES).o \ - ports/stm32/resethandler.o \ - -SRC_HAL = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\ - hal_cortex.c \ - hal_flash.c \ - hal_flash_ex.c \ - hal_pcd.c \ - hal_pcd_ex.c \ - ll_usb.c \ - ) - -SRC_USBDEV = $(addprefix ports/stm32/$(USBDEV_DIR)/,\ - core/src/usbd_core.c \ - core/src/usbd_ctlreq.c \ - core/src/usbd_ioreq.c \ - ) - -OBJ = -OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_O)) -OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o)) - -all: $(TOP)/lib/stm32lib/README.md $(BUILD)/firmware.dfu $(BUILD)/firmware.hex - -# For convenience, automatically fetch required submodules if they don't exist -$(TOP)/lib/stm32lib/README.md: - $(ECHO) "stm32lib submodule not found, fetching it now..." - (cd $(TOP) && git submodule update --init lib/stm32lib) - -.PHONY: deploy - -deploy: $(BUILD)/firmware.dfu - $(ECHO) "Writing $< to the board" - $(Q)$(PYTHON) $(PYDFU) -u $< - -FLASH_ADDR = 0x08000000 - -$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin - $(Q)$(PYTHON) $(DFU) -b $(FLASH_ADDR):$(BUILD)/firmware.bin $@ - -$(BUILD)/firmware.hex: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(OBJCOPY) -O ihex $< $@ - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -######################################### - -vpath %.S . $(TOP) -$(BUILD)/%.o: %.S - $(ECHO) "CC $<" - $(Q)$(CC) $(CFLAGS) -c -o $@ $< - -vpath %.s . $(TOP) -$(BUILD)/%.o: %.s - $(ECHO) "AS $<" - $(Q)$(AS) -o $@ $< - -define compile_c -$(ECHO) "CC $<" -$(Q)$(CC) $(CFLAGS) -c -MD -o $@ $< -@# The following fixes the dependency file. -@# See http://make.paulandlesley.org/autodep.html for details. -@# Regex adjusted from the above to play better with Windows paths, etc. -@$(CP) $(@:.o=.d) $(@:.o=.P); \ - $(SED) -e 's/#.*//' -e 's/^.*: *//' -e 's/ *\\$$//' \ - -e '/^$$/ d' -e 's/$$/ :/' < $(@:.o=.d) >> $(@:.o=.P); \ - $(RM) -f $(@:.o=.d) -endef - -vpath %.c . $(TOP) -$(BUILD)/%.o: %.c - $(call compile_c) - -# $(sort $(var)) removes duplicates -# -# The net effect of this, is it causes the objects to depend on the -# object directories (but only for existence), and the object directories -# will be created if they don't exist. -OBJ_DIRS = $(sort $(dir $(OBJ))) -$(OBJ): | $(OBJ_DIRS) -$(OBJ_DIRS): - $(MKDIR) -p $@ - -clean: - $(RM) -rf $(BUILD) $(CLEAN_EXTRA) -.PHONY: clean - -########################################### - -$(BUILD)/main.o: $(BUILD)/genhdr/qstrdefs.generated.h - -$(BUILD)/genhdr/qstrdefs.generated.h: - $(MKDIR) -p $(BUILD)/genhdr - $(Q)echo "// empty" > $@ - --include $(OBJ:.o=.P) diff --git a/ports/stm32/mboot/README.md b/ports/stm32/mboot/README.md deleted file mode 100644 index 2ff6101b44..0000000000 --- a/ports/stm32/mboot/README.md +++ /dev/null @@ -1,78 +0,0 @@ -Mboot - MicroPython boot loader -=============================== - -Mboot is a custom bootloader for STM32 MCUs, and currently supports the -STM32F4xx and STM32F7xx families. It can provide a standard USB DFU interface -on either the FS or HS peripherals, as well as a sophisticated, custom I2C -interface. It fits in 16k of flash space. - -How to use ----------- - -1. Configure your board to use a boot loader by editing the mpconfigboard.mk - and mpconfigboard.h files. For example, for an F767 be sure to have these - lines in mpconfigboard.mk: - - LD_FILES = boards/stm32f767.ld boards/common_bl.ld - TEXT0_ADDR = 0x08008000 - - And this in mpconfigboard.h (recommended to put at the end of the file): - - // Bootloader configuration - #define MBOOT_I2C_PERIPH_ID 1 - #define MBOOT_I2C_SCL (pin_B8) - #define MBOOT_I2C_SDA (pin_B9) - #define MBOOT_I2C_ALTFUNC (4) - - To configure a pin to force entry into the boot loader the following - options can be used (with example configuration): - - #define MBOOT_BOOTPIN_PIN (pin_A0) - #define MBOOT_BOOTPIN_PULL (MP_HAL_PIN_PULL_UP) - #define MBOOT_BOOTPIN_ACTIVE (0) - - Mboot supports programming external SPI flash via the DFU and I2C - interfaces. SPI flash will be mapped to an address range. To - configure it use the following options (edit as needed): - - #define MBOOT_SPIFLASH_ADDR (0x80000000) - #define MBOOT_SPIFLASH_BYTE_SIZE (2 * 1024 * 1024) - #define MBOOT_SPIFLASH_LAYOUT "/0x80000000/64*32Kg" - #define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (32 / 4) - #define MBOOT_SPIFLASH_SPIFLASH (&spi_bdev.spiflash) - #define MBOOT_SPIFLASH_CONFIG (&spiflash_config) - - This assumes that the board declares and defines the relevant SPI flash - configuration structs, eg in the board-specific bdev.c file. The - `MBOOT_SPIFLASH2_LAYOUT` string will be seen by the USB DFU utility and - must describe the SPI flash layout. Note that the number of pages in - this layout description (the `64` above) cannot be larger than 99 (it - must fit in two digits) so the reported page size (the `32Kg` above) - must be made large enough so the number of pages fits in two digits. - Alternatively the layout can specify multiple sections like - `32*16Kg,32*16Kg`, in which case `MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE` - must be changed to `16 / 4` to match tho `16Kg` value. - - Mboot supports up to two external SPI flash devices. To configure the - second one use the same configuration names as above but with - `SPIFLASH2`, ie `MBOOT_SPIFLASH2_ADDR` etc. - -2. Build the board's main application firmware as usual. - -3. Build mboot via: - - $ cd mboot - $ make BOARD= - - That should produce a DFU file for mboot. It can be deployed using - USB DFU programming via (it will be placed at location 0x08000000): - - $ make BOARD= deploy - -4. Reset the board while holding USR until all 3 LEDs are lit (the 4th option in - the cycle) and then release USR. LED0 will then blink once per second to - indicate that it's in mboot - -5. Use either USB DFU or I2C to download firmware. The script mboot.py shows how - to communicate with the I2C boot loader interface. It should be run on a - pyboard connected via I2C to the target board. diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c deleted file mode 100644 index 11053971bc..0000000000 --- a/ports/stm32/mboot/main.c +++ /dev/null @@ -1,1341 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mphal.h" -#include "extmod/crypto-algorithms/sha256.c" -#include "usbd_core.h" -#include "storage.h" -#include "i2cslave.h" - -// Using polling is about 10% faster than not using it (and using IRQ instead) -// This DFU code with polling runs in about 70% of the time of the ST bootloader -#define USE_USB_POLLING (1) - -// Using cache probably won't make it faster because we run at 48MHz, and best -// to keep the MCU config as minimal as possible. -#define USE_CACHE (0) - -// IRQ priorities (encoded values suitable for NVIC_SetPriority) -#define IRQ_PRI_SYSTICK (NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0)) -#define IRQ_PRI_I2C (NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 1, 0)) - -// Configure PLL to give a 48MHz CPU freq -#define CORE_PLL_FREQ (48000000) -#undef MICROPY_HW_CLK_PLLM -#undef MICROPY_HW_CLK_PLLN -#undef MICROPY_HW_CLK_PLLP -#undef MICROPY_HW_CLK_PLLQ -#define MICROPY_HW_CLK_PLLM (HSE_VALUE / 1000000) -#define MICROPY_HW_CLK_PLLN (192) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (4) - -// Work out which USB device to use for the USB DFU interface -#if !defined(MICROPY_HW_USB_MAIN_DEV) -#if defined(MICROPY_HW_USB_FS) -#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_FS_ID) -#elif defined(MICROPY_HW_USB_HS) && defined(MICROPY_HW_USB_HS_IN_FS) -#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_HS_ID) -#else -#error Unable to determine proper MICROPY_HW_USB_MAIN_DEV to use -#endif -#endif - -// These bits are used to detect valid application firmware at APPLICATION_ADDR -#define APP_VALIDITY_BITS (0x00000003) - -#define MP_ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) - -static void do_reset(void); - -static uint32_t get_le32(const uint8_t *b) { - return b[0] | b[1] << 8 | b[2] << 16 | b[3] << 24; -} - -void mp_hal_delay_us(mp_uint_t usec) { - // use a busy loop for the delay - // sys freq is always a multiple of 2MHz, so division here won't lose precision - const uint32_t ucount = CORE_PLL_FREQ / 2000000 * usec / 2; - for (uint32_t count = 0; ++count <= ucount;) { - } -} - -static volatile uint32_t systick_ms; - -void mp_hal_delay_ms(mp_uint_t ms) { - if (__get_PRIMASK() == 0) { - // IRQs enabled, use systick - if (ms != 0 && ms != (mp_uint_t)-1) { - ++ms; // account for the fact that systick_ms may roll over immediately - } - uint32_t start = systick_ms; - while (systick_ms - start < ms) { - __WFI(); - } - } else { - // IRQs disabled, so need to use a busy loop for the delay. - // To prevent possible overflow of the counter we use a double loop. - const uint32_t count_1ms = 16000000 / 8000; - for (uint32_t i = 0; i < ms; i++) { - for (volatile uint32_t count = 0; ++count <= count_1ms;) { - } - } - } -} - -// Needed by parts of the HAL -uint32_t HAL_GetTick(void) { - return systick_ms; -} - -// Needed by parts of the HAL -void HAL_Delay(uint32_t ms) { - mp_hal_delay_ms(ms); -} - -static void __fatal_error(const char *msg) { - NVIC_SystemReset(); - for (;;) { - } -} - -/******************************************************************************/ -// CLOCK - -#if defined(STM32F4) || defined(STM32F7) - -#define CONFIG_RCC_CR_1ST (RCC_CR_HSION) -#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON || RCC_CR_CSSON || RCC_CR_PLLON) -#define CONFIG_RCC_PLLCFGR (0x24003010) - -#else -#error Unknown processor -#endif - -void SystemInit(void) { - // Set HSION bit - RCC->CR |= CONFIG_RCC_CR_1ST; - - // Reset CFGR register - RCC->CFGR = 0x00000000; - - // Reset HSEON, CSSON and PLLON bits - RCC->CR &= ~CONFIG_RCC_CR_2ND; - - // Reset PLLCFGR register - RCC->PLLCFGR = CONFIG_RCC_PLLCFGR; - - // Reset HSEBYP bit - RCC->CR &= (uint32_t)0xFFFBFFFF; - - // Disable all interrupts - RCC->CIR = 0x00000000; - - // Set location of vector table - SCB->VTOR = FLASH_BASE; - - // Enable 8-byte stack alignment for IRQ handlers, in accord with EABI - SCB->CCR |= SCB_CCR_STKALIGN_Msk; -} - -void systick_init(void) { - // Configure SysTick as 1ms ticker - SysTick_Config(SystemCoreClock / 1000); - NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_SYSTICK); -} - -void SystemClock_Config(void) { - // This function assumes that HSI is used as the system clock (see RCC->CFGR, SWS bits) - - // Enable Power Control clock - __HAL_RCC_PWR_CLK_ENABLE(); - - // Reduce power consumption - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - - // Turn HSE on - __HAL_RCC_HSE_CONFIG(RCC_HSE_ON); - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) { - } - - // Disable PLL - __HAL_RCC_PLL_DISABLE(); - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) { - } - - // Configure PLL factors and source - RCC->PLLCFGR = - 1 << RCC_PLLCFGR_PLLSRC_Pos // HSE selected as PLL source - | MICROPY_HW_CLK_PLLM << RCC_PLLCFGR_PLLM_Pos - | MICROPY_HW_CLK_PLLN << RCC_PLLCFGR_PLLN_Pos - | ((MICROPY_HW_CLK_PLLP >> 1) - 1) << RCC_PLLCFGR_PLLP_Pos - | MICROPY_HW_CLK_PLLQ << RCC_PLLCFGR_PLLQ_Pos - #ifdef RCC_PLLCFGR_PLLR - | 2 << RCC_PLLCFGR_PLLR_Pos // default PLLR value of 2 - #endif - ; - - // Enable PLL - __HAL_RCC_PLL_ENABLE(); - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) { - } - - #if !defined(MICROPY_HW_FLASH_LATENCY) - #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_1 - #endif - - // Increase latency before changing clock - if (MICROPY_HW_FLASH_LATENCY > (FLASH->ACR & FLASH_ACR_LATENCY)) { - __HAL_FLASH_SET_LATENCY(MICROPY_HW_FLASH_LATENCY); - } - - // Configure AHB divider - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV1); - - // Configure SYSCLK source from PLL - __HAL_RCC_SYSCLK_CONFIG(RCC_SYSCLKSOURCE_PLLCLK); - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) { - } - - // Decrease latency after changing clock - if (MICROPY_HW_FLASH_LATENCY < (FLASH->ACR & FLASH_ACR_LATENCY)) { - __HAL_FLASH_SET_LATENCY(MICROPY_HW_FLASH_LATENCY); - } - - // Set APB clock dividers - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV4); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, RCC_HCLK_DIV2 << 3); - - // Update clock value and reconfigure systick now that the frequency changed - SystemCoreClock = CORE_PLL_FREQ; - systick_init(); - - #if defined(STM32F7) - // The DFU bootloader changes the clocksource register from its default power - // on reset value, so we set it back here, so the clocksources are the same - // whether we were started from DFU or from a power on reset. - RCC->DCKCFGR2 = 0; - #endif -} - -// Needed by HAL_PCD_IRQHandler -uint32_t HAL_RCC_GetHCLKFreq(void) { - return SystemCoreClock; -} - -/******************************************************************************/ -// GPIO - -void mp_hal_pin_config(mp_hal_pin_obj_t port_pin, uint32_t mode, uint32_t pull, uint32_t alt) { - GPIO_TypeDef *gpio = (GPIO_TypeDef*)(port_pin & ~0xf); - - // Enable the GPIO peripheral clock - uint32_t en_bit = RCC_AHB1ENR_GPIOAEN_Pos + ((uintptr_t)gpio - GPIOA_BASE) / (GPIOB_BASE - GPIOA_BASE); - RCC->AHB1ENR |= 1 << en_bit; - volatile uint32_t tmp = RCC->AHB1ENR; // Delay after enabling clock - (void)tmp; - - // Configure the pin - uint32_t pin = port_pin & 0xf; - gpio->MODER = (gpio->MODER & ~(3 << (2 * pin))) | ((mode & 3) << (2 * pin)); - gpio->OTYPER = (gpio->OTYPER & ~(1 << pin)) | ((mode >> 2) << pin); - gpio->OSPEEDR = (gpio->OSPEEDR & ~(3 << (2 * pin))) | (2 << (2 * pin)); // full speed - gpio->PUPDR = (gpio->PUPDR & ~(3 << (2 * pin))) | (pull << (2 * pin)); - gpio->AFR[pin >> 3] = (gpio->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); -} - -void mp_hal_pin_config_speed(uint32_t port_pin, uint32_t speed) { - GPIO_TypeDef *gpio = (GPIO_TypeDef*)(port_pin & ~0xf); - uint32_t pin = port_pin & 0xf; - gpio->OSPEEDR = (gpio->OSPEEDR & ~(3 << (2 * pin))) | (speed << (2 * pin)); -} - -/******************************************************************************/ -// LED - -#define LED0 MICROPY_HW_LED1 -#define LED1 MICROPY_HW_LED2 -#define LED2 MICROPY_HW_LED3 - -void led_init(void) { - mp_hal_pin_output(LED0); - mp_hal_pin_output(LED1); - mp_hal_pin_output(LED2); -} - -void led_state(int led, int val) { - if (led == 1) { - led = LED0; - } - if (val) { - MICROPY_HW_LED_ON(led); - } else { - MICROPY_HW_LED_OFF(led); - } -} - -/******************************************************************************/ -// USR BUTTON - -static void usrbtn_init(void) { - mp_hal_pin_config(MICROPY_HW_USRSW_PIN, MP_HAL_PIN_MODE_INPUT, MICROPY_HW_USRSW_PULL, 0); -} - -static int usrbtn_state(void) { - return mp_hal_pin_read(MICROPY_HW_USRSW_PIN) == MICROPY_HW_USRSW_PRESSED; -} - -/******************************************************************************/ -// FLASH - -#ifndef MBOOT_SPIFLASH_LAYOUT -#define MBOOT_SPIFLASH_LAYOUT "" -#endif - -#ifndef MBOOT_SPIFLASH2_LAYOUT -#define MBOOT_SPIFLASH2_LAYOUT "" -#endif - -typedef struct { - uint32_t base_address; - uint32_t sector_size; - uint32_t sector_count; -} flash_layout_t; - -#if defined(STM32F7) -// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to -// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7 -#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR -#endif - -#if defined(STM32F4) \ - || defined(STM32F722xx) \ - || defined(STM32F723xx) \ - || defined(STM32F732xx) \ - || defined(STM32F733xx) - -#define FLASH_LAYOUT_STR "@Internal Flash /0x08000000/04*016Kg,01*064Kg,07*128Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT - -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x04000, 4 }, - { 0x08010000, 0x10000, 1 }, - { 0x08020000, 0x20000, 3 }, - #if defined(FLASH_SECTOR_8) - { 0x08080000, 0x20000, 4 }, - #endif - #if defined(FLASH_SECTOR_12) - { 0x08100000, 0x04000, 4 }, - { 0x08110000, 0x10000, 1 }, - { 0x08120000, 0x20000, 7 }, - #endif -}; - -#elif defined(STM32F767xx) - -#define FLASH_LAYOUT_STR "@Internal Flash /0x08000000/04*032Kg,01*128Kg,07*256Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT - -// This is for dual-bank mode disabled -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x08000, 4 }, - { 0x08020000, 0x20000, 1 }, - { 0x08040000, 0x40000, 7 }, -}; - -#endif - -static uint32_t flash_get_sector_index(uint32_t addr) { - if (addr >= flash_layout[0].base_address) { - uint32_t sector_index = 0; - for (int i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) { - for (int j = 0; j < flash_layout[i].sector_count; ++j) { - uint32_t sector_start_next = flash_layout[i].base_address - + (j + 1) * flash_layout[i].sector_size; - if (addr < sector_start_next) { - return sector_index; - } - ++sector_index; - } - } - } - return 0; -} - -static int flash_mass_erase(void) { - // TODO - return -1; -} - -static int flash_page_erase(uint32_t addr) { - uint32_t sector = flash_get_sector_index(addr); - if (sector == 0) { - // Don't allow to erase the sector with this bootloader in it - return -1; - } - - HAL_FLASH_Unlock(); - - // Clear pending flags (if any) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR); - - // erase the sector(s) - FLASH_EraseInitTypeDef EraseInitStruct; - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - EraseInitStruct.Sector = sector; - EraseInitStruct.NbSectors = 1; - - uint32_t SectorError = 0; - if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { - // error occurred during sector erase - return -1; - } - - // Check the erase set bits to 1, at least for the first 256 bytes - for (int i = 0; i < 64; ++i) { - if (((volatile uint32_t*)addr)[i] != 0xffffffff) { - return -2; - } - } - - return 0; -} - -static int flash_write(uint32_t addr, const uint8_t *src8, size_t len) { - if (addr >= flash_layout[0].base_address && addr < flash_layout[0].base_address + flash_layout[0].sector_size) { - // Don't allow to write the sector with this bootloader in it - return -1; - } - - const uint32_t *src = (const uint32_t*)src8; - size_t num_word32 = (len + 3) / 4; - HAL_FLASH_Unlock(); - // program the flash word by word - for (size_t i = 0; i < num_word32; i++) { - if (HAL_FLASH_Program(TYPEPROGRAM_WORD, addr, *src) != HAL_OK) { - return -1; - } - addr += 4; - src += 1; - } - - // TODO verify data - - return 0; -} - -/******************************************************************************/ -// Writable address space interface - -static int do_mass_erase(void) { - // TODO - return flash_mass_erase(); -} - -#if defined(MBOOT_SPIFLASH_ADDR) || defined(MBOOT_SPIFLASH2_ADDR) -static int spiflash_page_erase(mp_spiflash_t *spif, uint32_t addr, uint32_t n_blocks) { - for (int i = 0; i < n_blocks; ++i) { - int ret = mp_spiflash_erase_block(spif, addr); - if (ret != 0) { - return ret; - } - addr += MP_SPIFLASH_ERASE_BLOCK_SIZE; - } - return 0; -} -#endif - -static int do_page_erase(uint32_t addr) { - led_state(LED0, 1); - - #if defined(MBOOT_SPIFLASH_ADDR) - if (MBOOT_SPIFLASH_ADDR <= addr && addr < MBOOT_SPIFLASH_ADDR + MBOOT_SPIFLASH_BYTE_SIZE) { - return spiflash_page_erase(MBOOT_SPIFLASH_SPIFLASH, - addr - MBOOT_SPIFLASH_ADDR, MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE); - } - #endif - - #if defined(MBOOT_SPIFLASH2_ADDR) - if (MBOOT_SPIFLASH2_ADDR <= addr && addr < MBOOT_SPIFLASH2_ADDR + MBOOT_SPIFLASH2_BYTE_SIZE) { - return spiflash_page_erase(MBOOT_SPIFLASH2_SPIFLASH, - addr - MBOOT_SPIFLASH2_ADDR, MBOOT_SPIFLASH2_ERASE_BLOCKS_PER_PAGE); - } - #endif - - return flash_page_erase(addr); -} - -static void do_read(uint32_t addr, int len, uint8_t *buf) { - #if defined(MBOOT_SPIFLASH_ADDR) - if (MBOOT_SPIFLASH_ADDR <= addr && addr < MBOOT_SPIFLASH_ADDR + MBOOT_SPIFLASH_BYTE_SIZE) { - mp_spiflash_read(MBOOT_SPIFLASH_SPIFLASH, addr - MBOOT_SPIFLASH_ADDR, len, buf); - return; - } - #endif - #if defined(MBOOT_SPIFLASH2_ADDR) - if (MBOOT_SPIFLASH2_ADDR <= addr && addr < MBOOT_SPIFLASH2_ADDR + MBOOT_SPIFLASH2_BYTE_SIZE) { - mp_spiflash_read(MBOOT_SPIFLASH2_SPIFLASH, addr - MBOOT_SPIFLASH2_ADDR, len, buf); - return; - } - #endif - - // Other addresses, just read directly from memory - memcpy(buf, (void*)addr, len); -} - -static int do_write(uint32_t addr, const uint8_t *src8, size_t len) { - static uint32_t led_tog = 0; - led_state(LED0, (led_tog++) & 4); - - #if defined(MBOOT_SPIFLASH_ADDR) - if (MBOOT_SPIFLASH_ADDR <= addr && addr < MBOOT_SPIFLASH_ADDR + MBOOT_SPIFLASH_BYTE_SIZE) { - return mp_spiflash_write(MBOOT_SPIFLASH_SPIFLASH, addr - MBOOT_SPIFLASH_ADDR, len, src8); - } - #endif - - #if defined(MBOOT_SPIFLASH2_ADDR) - if (MBOOT_SPIFLASH2_ADDR <= addr && addr < MBOOT_SPIFLASH2_ADDR + MBOOT_SPIFLASH2_BYTE_SIZE) { - return mp_spiflash_write(MBOOT_SPIFLASH2_SPIFLASH, addr - MBOOT_SPIFLASH2_ADDR, len, src8); - } - #endif - - return flash_write(addr, src8, len); -} - -/******************************************************************************/ -// I2C slave interface - -#if defined(MBOOT_I2C_SCL) - -#define PASTE2(a, b) a ## b -#define PASTE3(a, b, c) a ## b ## c -#define EVAL_PASTE2(a, b) PASTE2(a, b) -#define EVAL_PASTE3(a, b, c) PASTE3(a, b, c) - -#define MBOOT_I2Cx EVAL_PASTE2(I2C, MBOOT_I2C_PERIPH_ID) -#define I2Cx_EV_IRQn EVAL_PASTE3(I2C, MBOOT_I2C_PERIPH_ID, _EV_IRQn) -#define I2Cx_EV_IRQHandler EVAL_PASTE3(I2C, MBOOT_I2C_PERIPH_ID, _EV_IRQHandler) - -#define I2C_CMD_BUF_LEN (129) - -enum { - I2C_CMD_ECHO = 1, - I2C_CMD_GETID, // () -> u8*12 unique id, ASCIIZ mcu name, ASCIIZ board name - I2C_CMD_GETCAPS, // not implemented - I2C_CMD_RESET, // () -> () - I2C_CMD_CONFIG, // not implemented - I2C_CMD_GETLAYOUT, // () -> ASCII string - I2C_CMD_MASSERASE, // () -> () - I2C_CMD_PAGEERASE, // le32 -> () - I2C_CMD_SETRDADDR, // le32 -> () - I2C_CMD_SETWRADDR, // le32 -> () - I2C_CMD_READ, // u8 -> bytes - I2C_CMD_WRITE, // bytes -> () - I2C_CMD_COPY, // not implemented - I2C_CMD_CALCHASH, // le32 -> u8*32 - I2C_CMD_MARKVALID, // () -> () -}; - -typedef struct _i2c_obj_t { - volatile bool cmd_send_arg; - volatile bool cmd_arg_sent; - volatile int cmd_arg; - volatile uint32_t cmd_rdaddr; - volatile uint32_t cmd_wraddr; - volatile uint16_t cmd_buf_pos; - uint8_t cmd_buf[I2C_CMD_BUF_LEN]; -} i2c_obj_t; - -static i2c_obj_t i2c_obj; - -void i2c_init(int addr) { - i2c_obj.cmd_send_arg = false; - - mp_hal_pin_config(MBOOT_I2C_SCL, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, MBOOT_I2C_ALTFUNC); - mp_hal_pin_config(MBOOT_I2C_SDA, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, MBOOT_I2C_ALTFUNC); - - i2c_slave_init(MBOOT_I2Cx, I2Cx_EV_IRQn, IRQ_PRI_I2C, addr); -} - -int i2c_slave_process_addr_match(int rw) { - if (i2c_obj.cmd_arg_sent) { - i2c_obj.cmd_send_arg = false; - } - i2c_obj.cmd_buf_pos = 0; - return 0; // ACK -} - -int i2c_slave_process_rx_byte(uint8_t val) { - if (i2c_obj.cmd_buf_pos < sizeof(i2c_obj.cmd_buf)) { - i2c_obj.cmd_buf[i2c_obj.cmd_buf_pos++] = val; - } - return 0; // ACK -} - -void i2c_slave_process_rx_end(void) { - if (i2c_obj.cmd_buf_pos == 0) { - return; - } - - int len = i2c_obj.cmd_buf_pos - 1; - uint8_t *buf = i2c_obj.cmd_buf; - - if (buf[0] == I2C_CMD_ECHO) { - ++len; - } else if (buf[0] == I2C_CMD_GETID && len == 0) { - memcpy(buf, (uint8_t*)MP_HAL_UNIQUE_ID_ADDRESS, 12); - memcpy(buf + 12, MICROPY_HW_MCU_NAME, sizeof(MICROPY_HW_MCU_NAME)); - memcpy(buf + 12 + sizeof(MICROPY_HW_MCU_NAME), MICROPY_HW_BOARD_NAME, sizeof(MICROPY_HW_BOARD_NAME) - 1); - len = 12 + sizeof(MICROPY_HW_MCU_NAME) + sizeof(MICROPY_HW_BOARD_NAME) - 1; - } else if (buf[0] == I2C_CMD_RESET && len == 0) { - do_reset(); - } else if (buf[0] == I2C_CMD_GETLAYOUT && len == 0) { - len = strlen(FLASH_LAYOUT_STR); - memcpy(buf, FLASH_LAYOUT_STR, len); - } else if (buf[0] == I2C_CMD_MASSERASE && len == 0) { - len = do_mass_erase(); - } else if (buf[0] == I2C_CMD_PAGEERASE && len == 4) { - len = do_page_erase(get_le32(buf + 1)); - } else if (buf[0] == I2C_CMD_SETRDADDR && len == 4) { - i2c_obj.cmd_rdaddr = get_le32(buf + 1); - len = 0; - } else if (buf[0] == I2C_CMD_SETWRADDR && len == 4) { - i2c_obj.cmd_wraddr = get_le32(buf + 1); - len = 0; - } else if (buf[0] == I2C_CMD_READ && len == 1) { - len = buf[1]; - if (len > I2C_CMD_BUF_LEN) { - len = I2C_CMD_BUF_LEN; - } - do_read(i2c_obj.cmd_rdaddr, len, buf); - i2c_obj.cmd_rdaddr += len; - } else if (buf[0] == I2C_CMD_WRITE) { - if (i2c_obj.cmd_wraddr == APPLICATION_ADDR) { - // Mark the 2 lower bits to indicate invalid app firmware - buf[1] |= APP_VALIDITY_BITS; - } - int ret = do_write(i2c_obj.cmd_wraddr, buf + 1, len); - if (ret < 0) { - len = ret; - } else { - i2c_obj.cmd_wraddr += len; - len = 0; - } - } else if (buf[0] == I2C_CMD_CALCHASH && len == 4) { - uint32_t hashlen = get_le32(buf + 1); - static CRYAL_SHA256_CTX ctx; - sha256_init(&ctx); - sha256_update(&ctx, (const void*)i2c_obj.cmd_rdaddr, hashlen); - i2c_obj.cmd_rdaddr += hashlen; - sha256_final(&ctx, buf); - len = 32; - } else if (buf[0] == I2C_CMD_MARKVALID && len == 0) { - uint32_t buf; - buf = *(volatile uint32_t*)APPLICATION_ADDR; - if ((buf & APP_VALIDITY_BITS) != APP_VALIDITY_BITS) { - len = -1; - } else { - buf &= ~APP_VALIDITY_BITS; - int ret = do_write(APPLICATION_ADDR, (void*)&buf, 4); - if (ret < 0) { - len = ret; - } else { - buf = *(volatile uint32_t*)APPLICATION_ADDR; - if ((buf & APP_VALIDITY_BITS) != 0) { - len = -2; - } else { - len = 0; - } - } - } - } else { - len = -127; - } - i2c_obj.cmd_arg = len; - i2c_obj.cmd_send_arg = true; - i2c_obj.cmd_arg_sent = false; -} - -uint8_t i2c_slave_process_tx_byte(void) { - if (i2c_obj.cmd_send_arg) { - i2c_obj.cmd_arg_sent = true; - return i2c_obj.cmd_arg; - } else if (i2c_obj.cmd_buf_pos < sizeof(i2c_obj.cmd_buf)) { - return i2c_obj.cmd_buf[i2c_obj.cmd_buf_pos++]; - } else { - return 0; - } -} - -#endif // defined(MBOOT_I2C_SCL) - -/******************************************************************************/ -// DFU - -#define DFU_XFER_SIZE (2048) - -enum { - DFU_DNLOAD = 1, - DFU_UPLOAD = 2, - DFU_GETSTATUS = 3, - DFU_CLRSTATUS = 4, - DFU_ABORT = 6, -}; - -enum { - DFU_STATUS_IDLE = 2, - DFU_STATUS_BUSY = 4, - DFU_STATUS_DNLOAD_IDLE = 5, - DFU_STATUS_MANIFEST = 7, - DFU_STATUS_UPLOAD_IDLE = 9, - DFU_STATUS_ERROR = 0xa, -}; - -enum { - DFU_CMD_NONE = 0, - DFU_CMD_EXIT = 1, - DFU_CMD_UPLOAD = 7, - DFU_CMD_DNLOAD = 8, -}; - -typedef struct _dfu_state_t { - int status; - int cmd; - uint16_t wBlockNum; - uint16_t wLength; - uint32_t addr; - uint8_t buf[DFU_XFER_SIZE] __attribute__((aligned(4))); -} dfu_state_t; - -static dfu_state_t dfu_state; - -static void dfu_init(void) { - dfu_state.status = DFU_STATUS_IDLE; - dfu_state.cmd = DFU_CMD_NONE; - dfu_state.addr = 0x08000000; -} - -static int dfu_process_dnload(void) { - int ret = -1; - if (dfu_state.wBlockNum == 0) { - // download control commands - if (dfu_state.wLength >= 1 && dfu_state.buf[0] == 0x41) { - if (dfu_state.wLength == 1) { - // mass erase - ret = do_mass_erase(); - } else if (dfu_state.wLength == 5) { - // erase page - ret = do_page_erase(get_le32(&dfu_state.buf[1])); - } - } else if (dfu_state.wLength >= 1 && dfu_state.buf[0] == 0x21) { - if (dfu_state.wLength == 5) { - // set address - dfu_state.addr = get_le32(&dfu_state.buf[1]); - ret = 0; - } - } - } else if (dfu_state.wBlockNum > 1) { - // write data to memory - ret = do_write(dfu_state.addr, dfu_state.buf, dfu_state.wLength); - } - if (ret == 0) { - return DFU_STATUS_DNLOAD_IDLE; - } else { - return DFU_STATUS_ERROR; - } -} - -static void dfu_handle_rx(int cmd, int arg, int len, const void *buf) { - if (cmd == DFU_CLRSTATUS) { - // clear status - dfu_state.status = DFU_STATUS_IDLE; - dfu_state.cmd = DFU_CMD_NONE; - } else if (cmd == DFU_ABORT) { - // clear status - dfu_state.status = DFU_STATUS_IDLE; - dfu_state.cmd = DFU_CMD_NONE; - } else if (cmd == DFU_DNLOAD) { - if (len == 0) { - // exit DFU - dfu_state.cmd = DFU_CMD_EXIT; - } else { - // download - dfu_state.cmd = DFU_CMD_DNLOAD; - dfu_state.wBlockNum = arg; - dfu_state.wLength = len; - memcpy(dfu_state.buf, buf, len); - } - } -} - -static void dfu_process(void) { - if (dfu_state.status == DFU_STATUS_MANIFEST) { - do_reset(); - } - - if (dfu_state.status == DFU_STATUS_BUSY) { - if (dfu_state.cmd == DFU_CMD_DNLOAD) { - dfu_state.cmd = DFU_CMD_NONE; - dfu_state.status = dfu_process_dnload(); - } - } -} - -static int dfu_handle_tx(int cmd, int arg, int len, uint8_t *buf, int max_len) { - if (cmd == DFU_UPLOAD) { - if (arg >= 2) { - dfu_state.cmd = DFU_CMD_UPLOAD; - uint32_t addr = (arg - 2) * max_len + dfu_state.addr; - do_read(addr, len, buf); - return len; - } - } else if (cmd == DFU_GETSTATUS && len == 6) { - // execute command and get status - switch (dfu_state.cmd) { - case DFU_CMD_NONE: - break; - case DFU_CMD_EXIT: - dfu_state.status = DFU_STATUS_MANIFEST; - break; - case DFU_CMD_UPLOAD: - dfu_state.status = DFU_STATUS_UPLOAD_IDLE; - break; - case DFU_CMD_DNLOAD: - dfu_state.status = DFU_STATUS_BUSY; - break; - } - buf[0] = 0; - buf[1] = dfu_state.cmd; // TODO is this correct? - buf[2] = 0; - buf[3] = 0; - buf[4] = dfu_state.status; - buf[5] = 0; - return 6; - } - return -1; -} - -/******************************************************************************/ -// USB - -#define USB_XFER_SIZE (DFU_XFER_SIZE) - -enum { - USB_PHY_FS_ID = 0, - USB_PHY_HS_ID = 1, -}; - -typedef struct _pyb_usbdd_obj_t { - bool started; - bool tx_pending; - USBD_HandleTypeDef hUSBDDevice; - - uint8_t bRequest; - uint16_t wValue; - uint16_t wLength; - __ALIGN_BEGIN uint8_t rx_buf[USB_XFER_SIZE] __ALIGN_END; - __ALIGN_BEGIN uint8_t tx_buf[USB_XFER_SIZE] __ALIGN_END; - - // RAM to hold the current descriptors, which we configure on the fly - __ALIGN_BEGIN uint8_t usbd_device_desc[USB_LEN_DEV_DESC] __ALIGN_END; - __ALIGN_BEGIN uint8_t usbd_str_desc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; -} pyb_usbdd_obj_t; - -#define USBD_LANGID_STRING (0x409) - -__ALIGN_BEGIN static const uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = { - USB_LEN_LANGID_STR_DESC, - USB_DESC_TYPE_STRING, - LOBYTE(USBD_LANGID_STRING), - HIBYTE(USBD_LANGID_STRING), -}; - -static const uint8_t dev_descr[0x12] = "\x12\x01\x00\x01\x00\x00\x00\x40\x83\x04\x11\xdf\x00\x22\x01\x02\x03\x01"; - -// This may be modified by USBD_GetDescriptor -static uint8_t cfg_descr[9 + 9 + 9] = - "\x09\x02\x1b\x00\x01\x01\x00\xc0\x32" - "\x09\x04\x00\x00\x00\xfe\x01\x02\x04" - "\x09\x21\x0b\xff\x00\x00\x08\x1a\x01" // \x00\x08 goes with USB_XFER_SIZE -; - -static uint8_t *pyb_usbdd_DeviceDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - *length = USB_LEN_DEV_DESC; - return (uint8_t*)dev_descr; -} - -static char get_hex_char(int val) { - val &= 0xf; - if (val <= 9) { - return '0' + val; - } else { - return 'A' + val - 10; - } -} - -static void format_hex(char *buf, int val) { - buf[0] = get_hex_char(val >> 4); - buf[1] = get_hex_char(val); -} - -static uint8_t *pyb_usbdd_StrDescriptor(USBD_HandleTypeDef *pdev, uint8_t idx, uint16_t *length) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - uint8_t *str_desc = self->usbd_str_desc; - switch (idx) { - case USBD_IDX_LANGID_STR: - *length = sizeof(USBD_LangIDDesc); - return (uint8_t*)USBD_LangIDDesc; // the data should only be read from this buf - - case USBD_IDX_MFC_STR: - USBD_GetString((uint8_t*)"USBDevice Manuf", str_desc, length); - return str_desc; - - case USBD_IDX_PRODUCT_STR: - USBD_GetString((uint8_t*)"USBDevice Product", str_desc, length); - return str_desc; - - case USBD_IDX_SERIAL_STR: { - // This document: http://www.usb.org/developers/docs/devclass_docs/usbmassbulk_10.pdf - // says that the serial number has to be at least 12 digits long and that - // the last 12 digits need to be unique. It also stipulates that the valid - // character set is that of upper-case hexadecimal digits. - // - // The onboard DFU bootloader produces a 12-digit serial number based on - // the 96-bit unique ID, so for consistency we go with this algorithm. - // You can see the serial number if you do: - // - // dfu-util -l - // - // See: https://my.st.com/52d187b7 for the algorithim used. - uint8_t *id = (uint8_t*)MP_HAL_UNIQUE_ID_ADDRESS; - char serial_buf[16]; - format_hex(&serial_buf[0], id[11]); - format_hex(&serial_buf[2], id[10] + id[2]); - format_hex(&serial_buf[4], id[9]); - format_hex(&serial_buf[6], id[8] + id[0]); - format_hex(&serial_buf[8], id[7]); - format_hex(&serial_buf[10], id[6]); - serial_buf[12] = '\0'; - - USBD_GetString((uint8_t*)serial_buf, str_desc, length); - return str_desc; - } - - case USBD_IDX_CONFIG_STR: - USBD_GetString((uint8_t*)FLASH_LAYOUT_STR, str_desc, length); - return str_desc; - - default: - return NULL; - } -} - -static const USBD_DescriptorsTypeDef pyb_usbdd_descriptors = { - pyb_usbdd_DeviceDescriptor, - pyb_usbdd_StrDescriptor, -}; - -static uint8_t pyb_usbdd_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - (void)self; - return USBD_OK; -} - -static uint8_t pyb_usbdd_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - (void)self; - return USBD_OK; -} - -static uint8_t pyb_usbdd_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - (void)self; - self->bRequest = req->bRequest; - self->wValue = req->wValue; - self->wLength = req->wLength; - if (req->bmRequest == 0x21) { - // host-to-device request - if (req->wLength == 0) { - // no data, process command straightaway - dfu_handle_rx(self->bRequest, self->wValue, 0, NULL); - } else { - // have data, prepare to receive it - USBD_CtlPrepareRx(pdev, self->rx_buf, req->wLength); - } - } else if (req->bmRequest == 0xa1) { - // device-to-host request - int len = dfu_handle_tx(self->bRequest, self->wValue, self->wLength, self->tx_buf, USB_XFER_SIZE); - if (len >= 0) { - self->tx_pending = true; - USBD_CtlSendData(&self->hUSBDDevice, self->tx_buf, len); - } - } - return USBD_OK; -} - -static uint8_t pyb_usbdd_EP0_TxSent(USBD_HandleTypeDef *pdev) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - self->tx_pending = false; - #if !USE_USB_POLLING - // Process now that we have sent a response - dfu_process(); - #endif - return USBD_OK; -} - -static uint8_t pyb_usbdd_EP0_RxReady(USBD_HandleTypeDef *pdev) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - dfu_handle_rx(self->bRequest, self->wValue, self->wLength, self->rx_buf); - return USBD_OK; -} - -static uint8_t *pyb_usbdd_GetCfgDesc(USBD_HandleTypeDef *pdev, uint16_t *length) { - *length = sizeof(cfg_descr); - return (uint8_t*)cfg_descr; -} - -// this is used only in high-speed mode, which we don't support -static uint8_t *pyb_usbdd_GetDeviceQualifierDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - pyb_usbdd_obj_t *self = (pyb_usbdd_obj_t*)pdev->pClassData; - (void)self; - /* - *length = sizeof(USBD_CDC_MSC_HID_DeviceQualifierDesc); - return USBD_CDC_MSC_HID_DeviceQualifierDesc; - */ - *length = 0; - return NULL; -} - -static const USBD_ClassTypeDef pyb_usbdd_class = { - pyb_usbdd_Init, - pyb_usbdd_DeInit, - pyb_usbdd_Setup, - pyb_usbdd_EP0_TxSent, - pyb_usbdd_EP0_RxReady, - NULL, // pyb_usbdd_DataIn, - NULL, // pyb_usbdd_DataOut, - NULL, // SOF - NULL, // IsoINIncomplete - NULL, // IsoOUTIncomplete - pyb_usbdd_GetCfgDesc, - pyb_usbdd_GetCfgDesc, - pyb_usbdd_GetCfgDesc, - pyb_usbdd_GetDeviceQualifierDescriptor, -}; - -static pyb_usbdd_obj_t pyb_usbdd; - -static void pyb_usbdd_init(pyb_usbdd_obj_t *self, int phy_id) { - self->started = false; - USBD_HandleTypeDef *usbd = &self->hUSBDDevice; - usbd->id = phy_id; - usbd->dev_state = USBD_STATE_DEFAULT; - usbd->pDesc = (USBD_DescriptorsTypeDef*)&pyb_usbdd_descriptors; - usbd->pClass = &pyb_usbdd_class; - usbd->pClassData = self; -} - -static void pyb_usbdd_start(pyb_usbdd_obj_t *self) { - if (!self->started) { - USBD_LL_Init(&self->hUSBDDevice, 0); - USBD_LL_Start(&self->hUSBDDevice); - self->started = true; - } -} - -static void pyb_usbdd_stop(pyb_usbdd_obj_t *self) { - if (self->started) { - USBD_Stop(&self->hUSBDDevice); - self->started = false; - } -} - -static int pyb_usbdd_shutdown(void) { - pyb_usbdd_stop(&pyb_usbdd); - return 0; -} - -/******************************************************************************/ -// main - -#define RESET_MODE_NUM_STATES (4) -#define RESET_MODE_TIMEOUT_CYCLES (8) -#define RESET_MODE_LED_STATES 0x7421 - -static int get_reset_mode(void) { - usrbtn_init(); - int reset_mode = 1; - if (usrbtn_state()) { - // Cycle through reset modes while USR is held - // Timeout is roughly 20s, where reset_mode=1 - systick_init(); - led_init(); - reset_mode = 0; - for (int i = 0; i < (RESET_MODE_NUM_STATES * RESET_MODE_TIMEOUT_CYCLES + 1) * 32; i++) { - if (i % 32 == 0) { - if (++reset_mode > RESET_MODE_NUM_STATES) { - reset_mode = 1; - } - uint8_t l = RESET_MODE_LED_STATES >> ((reset_mode - 1) * 4); - led_state(LED0, l & 1); - led_state(LED1, l & 2); - led_state(LED2, l & 4); - } - if (!usrbtn_state()) { - break; - } - mp_hal_delay_ms(19); - } - // Flash the selected reset mode - for (int i = 0; i < 6; i++) { - led_state(LED0, 0); - led_state(LED1, 0); - led_state(LED2, 0); - mp_hal_delay_ms(50); - uint8_t l = RESET_MODE_LED_STATES >> ((reset_mode - 1) * 4); - led_state(LED0, l & 1); - led_state(LED1, l & 2); - led_state(LED2, l & 4); - mp_hal_delay_ms(50); - } - mp_hal_delay_ms(300); - } - return reset_mode; -} - -static void do_reset(void) { - led_state(LED0, 0); - led_state(LED1, 0); - led_state(LED2, 0); - mp_hal_delay_ms(50); - pyb_usbdd_shutdown(); - #if defined(MBOOT_I2C_SCL) - i2c_slave_shutdown(MBOOT_I2Cx, I2Cx_EV_IRQn); - #endif - mp_hal_delay_ms(50); - NVIC_SystemReset(); -} - -uint32_t SystemCoreClock; - -extern PCD_HandleTypeDef pcd_fs_handle; -extern PCD_HandleTypeDef pcd_hs_handle; - -void stm32_main(int initial_r0) { - #if defined(STM32F4) - #if INSTRUCTION_CACHE_ENABLE - __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - #endif - #if DATA_CACHE_ENABLE - __HAL_FLASH_DATA_CACHE_ENABLE(); - #endif - #if PREFETCH_ENABLE - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - #endif - #elif defined(STM32F7) - #if ART_ACCLERATOR_ENABLE - __HAL_FLASH_ART_ENABLE(); - #endif - #endif - - NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - - #if USE_CACHE && defined(STM32F7) - SCB_EnableICache(); - SCB_EnableDCache(); - #endif - - #ifdef MBOOT_BOOTPIN_PIN - mp_hal_pin_config(MBOOT_BOOTPIN_PIN, MP_HAL_PIN_MODE_INPUT, MBOOT_BOOTPIN_PULL, 0); - if (mp_hal_pin_read(MBOOT_BOOTPIN_PIN) == MBOOT_BOOTPIN_ACTIVE) { - goto enter_bootloader; - } - #endif - - if ((initial_r0 & 0xffffff00) == 0x70ad0000) { - goto enter_bootloader; - } - - // MCU starts up with 16MHz HSI - SystemCoreClock = 16000000; - - int reset_mode = get_reset_mode(); - uint32_t msp = *(volatile uint32_t*)APPLICATION_ADDR; - if (reset_mode != 4 && (msp & APP_VALIDITY_BITS) == 0) { - // not DFU mode so jump to application, passing through reset_mode - // undo our DFU settings - // TODO probably should disable all IRQ sources first - #if USE_CACHE && defined(STM32F7) - SCB_DisableICache(); - SCB_DisableDCache(); - #endif - __set_MSP(msp); - ((void (*)(uint32_t)) *((volatile uint32_t*)(APPLICATION_ADDR + 4)))(reset_mode); - } - -enter_bootloader: - - // Init subsystems (get_reset_mode() may call these, calling them again is ok) - led_init(); - - // set the system clock to be HSE - SystemClock_Config(); - - #if USE_USB_POLLING - // irqs with a priority value greater or equal to "pri" will be disabled - // "pri" should be between 1 and 15 inclusive - uint32_t pri = 2; - pri <<= (8 - __NVIC_PRIO_BITS); - __ASM volatile ("msr basepri_max, %0" : : "r" (pri) : "memory"); - #endif - - #if defined(MBOOT_SPIFLASH_ADDR) - MBOOT_SPIFLASH_SPIFLASH->config = MBOOT_SPIFLASH_CONFIG; - mp_spiflash_init(MBOOT_SPIFLASH_SPIFLASH); - #endif - - #if defined(MBOOT_SPIFLASH2_ADDR) - MBOOT_SPIFLASH2_SPIFLASH->config = MBOOT_SPIFLASH2_CONFIG; - mp_spiflash_init(MBOOT_SPIFLASH2_SPIFLASH); - #endif - - dfu_init(); - - pyb_usbdd_init(&pyb_usbdd, MICROPY_HW_USB_MAIN_DEV); - pyb_usbdd_start(&pyb_usbdd); - - #if defined(MBOOT_I2C_SCL) - initial_r0 &= 0x7f; - if (initial_r0 == 0) { - initial_r0 = 0x23; // Default I2C address - } - i2c_init(initial_r0); - #endif - - led_state(LED0, 0); - led_state(LED1, 0); - led_state(LED2, 0); - - #if USE_USB_POLLING - uint32_t ss = systick_ms; - int ss2 = -1; - #endif - for (;;) { - #if USE_USB_POLLING - #if defined(MICROPY_HW_USB_FS) - if (pcd_fs_handle.Instance->GINTSTS & pcd_fs_handle.Instance->GINTMSK) { - HAL_PCD_IRQHandler(&pcd_fs_handle); - } - #endif - #if defined(MICROPY_HW_USB_HS) - if (pcd_hs_handle.Instance->GINTSTS & pcd_hs_handle.Instance->GINTMSK) { - HAL_PCD_IRQHandler(&pcd_hs_handle); - } - #endif - if (!pyb_usbdd.tx_pending) { - dfu_process(); - } - #endif - - #if USE_USB_POLLING - //__WFI(); // slows it down way too much; might work with 10x faster systick - if (systick_ms - ss > 50) { - ss += 50; - ss2 = (ss2 + 1) % 20; - switch (ss2) { - case 0: led_state(LED0, 1); break; - case 1: led_state(LED0, 0); break; - } - } - #else - led_state(LED0, 1); - mp_hal_delay_ms(50); - led_state(LED0, 0); - mp_hal_delay_ms(950); - #endif - } -} - -void NMI_Handler(void) { -} - -void MemManage_Handler(void) { - while (1) { - __fatal_error("MemManage"); - } -} - -void BusFault_Handler(void) { - while (1) { - __fatal_error("BusFault"); - } -} - -void UsageFault_Handler(void) { - while (1) { - __fatal_error("UsageFault"); - } -} - -void SVC_Handler(void) { -} - -void DebugMon_Handler(void) { -} - -void PendSV_Handler(void) { -} - -void SysTick_Handler(void) { - systick_ms += 1; - - // Read the systick control regster. This has the side effect of clearing - // the COUNTFLAG bit, which makes the logic in mp_hal_ticks_us - // work properly. - SysTick->CTRL; -} - -#if defined(MBOOT_I2C_SCL) -void I2Cx_EV_IRQHandler(void) { - i2c_slave_ev_irq_handler(MBOOT_I2Cx); -} -#endif - -#if !USE_USB_POLLING -#if defined(MICROPY_HW_USB_FS) -void OTG_FS_IRQHandler(void) { - HAL_PCD_IRQHandler(&pcd_fs_handle); -} -#endif -#if defined(MICROPY_HW_USB_HS) -void OTG_HS_IRQHandler(void) { - HAL_PCD_IRQHandler(&pcd_hs_handle); -} -#endif -#endif diff --git a/ports/stm32/mboot/mboot.py b/ports/stm32/mboot/mboot.py deleted file mode 100644 index 39ae0f6f2d..0000000000 --- a/ports/stm32/mboot/mboot.py +++ /dev/null @@ -1,177 +0,0 @@ -# Driver for Mboot, the MicroPython boot loader -# MIT license; Copyright (c) 2018 Damien P. George - -import struct, time, os, hashlib - - -I2C_CMD_ECHO = 1 -I2C_CMD_GETID = 2 -I2C_CMD_GETCAPS = 3 -I2C_CMD_RESET = 4 -I2C_CMD_CONFIG = 5 -I2C_CMD_GETLAYOUT = 6 -I2C_CMD_MASSERASE = 7 -I2C_CMD_PAGEERASE = 8 -I2C_CMD_SETRDADDR = 9 -I2C_CMD_SETWRADDR = 10 -I2C_CMD_READ = 11 -I2C_CMD_WRITE = 12 -I2C_CMD_COPY = 13 -I2C_CMD_CALCHASH = 14 -I2C_CMD_MARKVALID = 15 - - -class Bootloader: - def __init__(self, i2c, addr): - self.i2c = i2c - self.addr = addr - self.buf1 = bytearray(1) - try: - self.i2c.writeto(addr, b'') - except OSError: - raise Exception('no I2C mboot device found') - - def wait_response(self): - start = time.ticks_ms() - while 1: - try: - self.i2c.readfrom_into(self.addr, self.buf1) - n = self.buf1[0] - break - except OSError as er: - time.sleep_us(500) - if time.ticks_diff(time.ticks_ms(), start) > 5000: - raise Exception('timeout') - if n >= 129: - raise Exception(n) - if n == 0: - return b'' - else: - return self.i2c.readfrom(self.addr, n) - - def wait_empty_response(self): - ret = self.wait_response() - if ret: - raise Exception('expected empty response got %r' % ret) - else: - return None - - def echo(self, data): - self.i2c.writeto(self.addr, struct.pack(' - -#define mp_hal_delay_us_fast(us) mp_hal_delay_us(us) - -#define MP_HAL_PIN_MODE_INPUT (0) -#define MP_HAL_PIN_MODE_OUTPUT (1) -#define MP_HAL_PIN_MODE_ALT (2) -#define MP_HAL_PIN_MODE_ANALOG (3) -#define MP_HAL_PIN_MODE_OPEN_DRAIN (5) -#define MP_HAL_PIN_MODE_ALT_OPEN_DRAIN (6) -#define MP_HAL_PIN_PULL_NONE (GPIO_NOPULL) -#define MP_HAL_PIN_PULL_UP (GPIO_PULLUP) -#define MP_HAL_PIN_PULL_DOWN (GPIO_PULLDOWN) - -#define mp_hal_pin_obj_t uint32_t -#define mp_hal_pin_input(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_output(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_open_drain(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_low(p) (((GPIO_TypeDef*)((p) & ~0xf))->BSRR = 0x10000 << ((p) & 0xf)) -#define mp_hal_pin_high(p) (((GPIO_TypeDef*)((p) & ~0xf))->BSRR = 1 << ((p) & 0xf)) -#define mp_hal_pin_od_low(p) mp_hal_pin_low(p) -#define mp_hal_pin_od_high(p) mp_hal_pin_high(p) -#define mp_hal_pin_read(p) ((((GPIO_TypeDef*)((p) & ~0xf))->IDR >> ((p) & 0xf)) & 1) -#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) - -void mp_hal_pin_config(uint32_t port_pin, uint32_t mode, uint32_t pull, uint32_t alt); -void mp_hal_pin_config_speed(uint32_t port_pin, uint32_t speed); - -#define pin_A0 (GPIOA_BASE | 0) -#define pin_A1 (GPIOA_BASE | 1) -#define pin_A2 (GPIOA_BASE | 2) -#define pin_A3 (GPIOA_BASE | 3) -#define pin_A4 (GPIOA_BASE | 4) -#define pin_A5 (GPIOA_BASE | 5) -#define pin_A6 (GPIOA_BASE | 6) -#define pin_A7 (GPIOA_BASE | 7) -#define pin_A8 (GPIOA_BASE | 8) -#define pin_A9 (GPIOA_BASE | 9) -#define pin_A10 (GPIOA_BASE | 10) -#define pin_A11 (GPIOA_BASE | 11) -#define pin_A12 (GPIOA_BASE | 12) -#define pin_A13 (GPIOA_BASE | 13) -#define pin_A14 (GPIOA_BASE | 14) -#define pin_A15 (GPIOA_BASE | 15) - -#define pin_B0 (GPIOB_BASE | 0) -#define pin_B1 (GPIOB_BASE | 1) -#define pin_B2 (GPIOB_BASE | 2) -#define pin_B3 (GPIOB_BASE | 3) -#define pin_B4 (GPIOB_BASE | 4) -#define pin_B5 (GPIOB_BASE | 5) -#define pin_B6 (GPIOB_BASE | 6) -#define pin_B7 (GPIOB_BASE | 7) -#define pin_B8 (GPIOB_BASE | 8) -#define pin_B9 (GPIOB_BASE | 9) -#define pin_B10 (GPIOB_BASE | 10) -#define pin_B11 (GPIOB_BASE | 11) -#define pin_B12 (GPIOB_BASE | 12) -#define pin_B13 (GPIOB_BASE | 13) -#define pin_B14 (GPIOB_BASE | 14) -#define pin_B15 (GPIOB_BASE | 15) - -#define pin_C0 (GPIOC_BASE | 0) -#define pin_C1 (GPIOC_BASE | 1) -#define pin_C2 (GPIOC_BASE | 2) -#define pin_C3 (GPIOC_BASE | 3) -#define pin_C4 (GPIOC_BASE | 4) -#define pin_C5 (GPIOC_BASE | 5) -#define pin_C6 (GPIOC_BASE | 6) -#define pin_C7 (GPIOC_BASE | 7) -#define pin_C8 (GPIOC_BASE | 8) -#define pin_C9 (GPIOC_BASE | 9) -#define pin_C10 (GPIOC_BASE | 10) -#define pin_C11 (GPIOC_BASE | 11) -#define pin_C12 (GPIOC_BASE | 12) -#define pin_C13 (GPIOC_BASE | 13) -#define pin_C14 (GPIOC_BASE | 14) -#define pin_C15 (GPIOC_BASE | 15) - -#define pin_D0 (GPIOD_BASE | 0) -#define pin_D1 (GPIOD_BASE | 1) -#define pin_D2 (GPIOD_BASE | 2) -#define pin_D3 (GPIOD_BASE | 3) -#define pin_D4 (GPIOD_BASE | 4) -#define pin_D5 (GPIOD_BASE | 5) -#define pin_D6 (GPIOD_BASE | 6) -#define pin_D7 (GPIOD_BASE | 7) -#define pin_D8 (GPIOD_BASE | 8) -#define pin_D9 (GPIOD_BASE | 9) -#define pin_D10 (GPIOD_BASE | 10) -#define pin_D11 (GPIOD_BASE | 11) -#define pin_D12 (GPIOD_BASE | 12) -#define pin_D13 (GPIOD_BASE | 13) -#define pin_D14 (GPIOD_BASE | 14) -#define pin_D15 (GPIOD_BASE | 15) - -#define pin_E0 (GPIOE_BASE | 0) -#define pin_E1 (GPIOE_BASE | 1) -#define pin_E2 (GPIOE_BASE | 2) -#define pin_E3 (GPIOE_BASE | 3) -#define pin_E4 (GPIOE_BASE | 4) -#define pin_E5 (GPIOE_BASE | 5) -#define pin_E6 (GPIOE_BASE | 6) -#define pin_E7 (GPIOE_BASE | 7) -#define pin_E8 (GPIOE_BASE | 8) -#define pin_E9 (GPIOE_BASE | 9) -#define pin_E10 (GPIOE_BASE | 10) -#define pin_E11 (GPIOE_BASE | 11) -#define pin_E12 (GPIOE_BASE | 12) -#define pin_E13 (GPIOE_BASE | 13) -#define pin_E14 (GPIOE_BASE | 14) -#define pin_E15 (GPIOE_BASE | 15) - -#define pin_F0 (GPIOF_BASE | 0) -#define pin_F1 (GPIOF_BASE | 1) -#define pin_F2 (GPIOF_BASE | 2) -#define pin_F3 (GPIOF_BASE | 3) -#define pin_F4 (GPIOF_BASE | 4) -#define pin_F5 (GPIOF_BASE | 5) -#define pin_F6 (GPIOF_BASE | 6) -#define pin_F7 (GPIOF_BASE | 7) -#define pin_F8 (GPIOF_BASE | 8) -#define pin_F9 (GPIOF_BASE | 9) -#define pin_F10 (GPIOF_BASE | 10) -#define pin_F11 (GPIOF_BASE | 11) -#define pin_F12 (GPIOF_BASE | 12) -#define pin_F13 (GPIOF_BASE | 13) -#define pin_F14 (GPIOF_BASE | 14) -#define pin_F15 (GPIOF_BASE | 15) diff --git a/ports/stm32/mboot/stm32_generic.ld b/ports/stm32/mboot/stm32_generic.ld deleted file mode 100644 index 8585c68734..0000000000 --- a/ports/stm32/mboot/stm32_generic.ld +++ /dev/null @@ -1,77 +0,0 @@ -/* - GNU linker script for generic STM32xxx MCU -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH_BL (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 (can be 32K) */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -ENTRY(Reset_Handler) - -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH_BL - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) - *(.rodata*) - . = ALIGN(4); - _etext = .; - } >FLASH_BL - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data section */ - .data : - { - . = ALIGN(4); - _sdata = .; - *(.data*) - - . = ALIGN(4); - _edata = .; - } >RAM AT> FLASH_BL - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c deleted file mode 100644 index 158f5f2b34..0000000000 --- a/ports/stm32/modmachine.c +++ /dev/null @@ -1,680 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "modmachine.h" -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "lib/utils/pyexec.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "gccollect.h" -#include "irq.h" -#include "pybthread.h" -#include "rng.h" -#include "storage.h" -#include "pin.h" -#include "timer.h" -#include "usb.h" -#include "rtc.h" -#include "i2c.h" -#include "spi.h" -#include "uart.h" -#include "wdt.h" -#include "genhdr/pllfreqtable.h" - -#if defined(STM32L4) -// L4 does not have a POR, so use BOR instead -#define RCC_CSR_PORRSTF RCC_CSR_BORRSTF -#endif - -#if defined(STM32H7) -#define RCC_SR RSR -#define RCC_SR_IWDGRSTF RCC_RSR_IWDG1RSTF -#define RCC_SR_WWDGRSTF RCC_RSR_WWDG1RSTF -#define RCC_SR_PORRSTF RCC_RSR_PORRSTF -#define RCC_SR_BORRSTF RCC_RSR_BORRSTF -#define RCC_SR_PINRSTF RCC_RSR_PINRSTF -#define RCC_SR_RMVF RCC_RSR_RMVF -#else -#define RCC_SR CSR -#define RCC_SR_IWDGRSTF RCC_CSR_IWDGRSTF -#define RCC_SR_WWDGRSTF RCC_CSR_WWDGRSTF -#define RCC_SR_PORRSTF RCC_CSR_PORRSTF -#define RCC_SR_BORRSTF RCC_CSR_BORRSTF -#define RCC_SR_PINRSTF RCC_CSR_PINRSTF -#define RCC_SR_RMVF RCC_CSR_RMVF -#endif - -#define PYB_RESET_SOFT (0) -#define PYB_RESET_POWER_ON (1) -#define PYB_RESET_HARD (2) -#define PYB_RESET_WDT (3) -#define PYB_RESET_DEEPSLEEP (4) - -STATIC uint32_t reset_cause; - -void machine_init(void) { - #if defined(STM32F4) - if (PWR->CSR & PWR_CSR_SBF) { - // came out of standby - reset_cause = PYB_RESET_DEEPSLEEP; - PWR->CR |= PWR_CR_CSBF; - } else - #elif defined(STM32F7) - if (PWR->CSR1 & PWR_CSR1_SBF) { - // came out of standby - reset_cause = PYB_RESET_DEEPSLEEP; - PWR->CR1 |= PWR_CR1_CSBF; - } else - #elif defined(STM32H7) - if (PWR->CPUCR & PWR_CPUCR_SBF || PWR->CPUCR & PWR_CPUCR_STOPF) { - // came out of standby or stop mode - reset_cause = PYB_RESET_DEEPSLEEP; - PWR->CPUCR |= PWR_CPUCR_CSSF; - } else - #endif - { - // get reset cause from RCC flags - uint32_t state = RCC->RCC_SR; - if (state & RCC_SR_IWDGRSTF || state & RCC_SR_WWDGRSTF) { - reset_cause = PYB_RESET_WDT; - } else if (state & RCC_SR_PORRSTF - #if !defined(STM32F0) - || state & RCC_SR_BORRSTF - #endif - ) { - reset_cause = PYB_RESET_POWER_ON; - } else if (state & RCC_SR_PINRSTF) { - reset_cause = PYB_RESET_HARD; - } else { - // default is soft reset - reset_cause = PYB_RESET_SOFT; - } - } - // clear RCC reset flags - RCC->RCC_SR |= RCC_SR_RMVF; -} - -void machine_deinit(void) { - // we are doing a soft-reset so change the reset_cause - reset_cause = PYB_RESET_SOFT; -} - -// machine.info([dump_alloc_table]) -// Print out lots of information about the board. -STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) { - // get and print unique id; 96 bits - { - byte *id = (byte*)MP_HAL_UNIQUE_ID_ADDRESS; - printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]); - } - - // get and print clock speeds - // SYSCLK=168MHz, HCLK=168MHz, PCLK1=42MHz, PCLK2=84MHz - { - #if defined(STM32F0) - printf("S=%u\nH=%u\nP1=%u\n", - (unsigned int)HAL_RCC_GetSysClockFreq(), - (unsigned int)HAL_RCC_GetHCLKFreq(), - (unsigned int)HAL_RCC_GetPCLK1Freq()); - #else - printf("S=%u\nH=%u\nP1=%u\nP2=%u\n", - (unsigned int)HAL_RCC_GetSysClockFreq(), - (unsigned int)HAL_RCC_GetHCLKFreq(), - (unsigned int)HAL_RCC_GetPCLK1Freq(), - (unsigned int)HAL_RCC_GetPCLK2Freq()); - #endif - } - - // to print info about memory - { - printf("_etext=%p\n", &_etext); - printf("_sidata=%p\n", &_sidata); - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_ram_start=%p\n", &_ram_start); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - printf("_ram_end=%p\n", &_ram_end); - } - - // qstr info - { - mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - // free space on flash - { - #if MICROPY_VFS_FAT - for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) { - if (strncmp("/flash", vfs->str, vfs->len) == 0) { - // assumes that it's a FatFs filesystem - fs_user_mount_t *vfs_fat = MP_OBJ_TO_PTR(vfs->obj); - DWORD nclst; - f_getfree(&vfs_fat->fatfs, &nclst); - printf("LFS free: %u bytes\n", (uint)(nclst * vfs_fat->fatfs.csize * 512)); - break; - } - } - #endif - } - - #if MICROPY_PY_THREAD - pyb_thread_dump(); - #endif - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info); - -// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU. -STATIC mp_obj_t machine_unique_id(void) { - byte *id = (byte*)MP_HAL_UNIQUE_ID_ADDRESS; - return mp_obj_new_bytes(id, 12); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -// Resets the pyboard in a manner similar to pushing the external RESET button. -STATIC mp_obj_t machine_reset(void) { - NVIC_SystemReset(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_soft_reset(void) { - pyexec_system_exit = PYEXEC_FORCED_EXIT; - nlr_raise(mp_obj_new_exception(&mp_type_SystemExit)); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset); - -// Activate the bootloader without BOOT* pins. -STATIC NORETURN mp_obj_t machine_bootloader(void) { - #if MICROPY_HW_ENABLE_USB - pyb_usb_dev_deinit(); - #endif - #if MICROPY_HW_ENABLE_STORAGE - storage_flush(); - #endif - - HAL_RCC_DeInit(); - HAL_DeInit(); - - #if (__MPU_PRESENT == 1) - // MPU must be disabled for bootloader to function correctly - HAL_MPU_Disable(); - #endif - -#if defined(STM32F7) || defined(STM32H7) - // arm-none-eabi-gcc 4.9.0 does not correctly inline this - // MSP function, so we write it out explicitly here. - //__set_MSP(*((uint32_t*) 0x1FF00000)); - __ASM volatile ("movw r3, #0x0000\nmovt r3, #0x1FF0\nldr r3, [r3, #0]\nMSR msp, r3\n" : : : "r3", "sp"); - - ((void (*)(void)) *((uint32_t*) 0x1FF00004))(); -#else - __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH(); - - // arm-none-eabi-gcc 4.9.0 does not correctly inline this - // MSP function, so we write it out explicitly here. - //__set_MSP(*((uint32_t*) 0x00000000)); - __ASM volatile ("movs r3, #0\nldr r3, [r3, #0]\nMSR msp, r3\n" : : : "r3", "sp"); - - ((void (*)(void)) *((uint32_t*) 0x00000004))(); -#endif - - while (1); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_bootloader_obj, machine_bootloader); - -#if !(defined(STM32F0) || defined(STM32L4)) -// get or set the MCU frequencies -STATIC mp_uint_t machine_freq_calc_ahb_div(mp_uint_t wanted_div) { - if (wanted_div <= 1) { return RCC_SYSCLK_DIV1; } - else if (wanted_div <= 2) { return RCC_SYSCLK_DIV2; } - else if (wanted_div <= 4) { return RCC_SYSCLK_DIV4; } - else if (wanted_div <= 8) { return RCC_SYSCLK_DIV8; } - else if (wanted_div <= 16) { return RCC_SYSCLK_DIV16; } - else if (wanted_div <= 64) { return RCC_SYSCLK_DIV64; } - else if (wanted_div <= 128) { return RCC_SYSCLK_DIV128; } - else if (wanted_div <= 256) { return RCC_SYSCLK_DIV256; } - else { return RCC_SYSCLK_DIV512; } -} -STATIC mp_uint_t machine_freq_calc_apb_div(mp_uint_t wanted_div) { - if (wanted_div <= 1) { return RCC_HCLK_DIV1; } - else if (wanted_div <= 2) { return RCC_HCLK_DIV2; } - else if (wanted_div <= 4) { return RCC_HCLK_DIV4; } - else if (wanted_div <= 8) { return RCC_HCLK_DIV8; } - else { return RCC_SYSCLK_DIV16; } -} -#endif - -STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - // get - mp_obj_t tuple[] = { - mp_obj_new_int(HAL_RCC_GetSysClockFreq()), - mp_obj_new_int(HAL_RCC_GetHCLKFreq()), - mp_obj_new_int(HAL_RCC_GetPCLK1Freq()), - #if !defined(STM32F0) - mp_obj_new_int(HAL_RCC_GetPCLK2Freq()), - #endif - }; - return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple); - } else { - // set - - #if defined(STM32F0) || defined(STM32L4) - mp_raise_NotImplementedError("machine.freq set not supported yet"); - #else - - mp_int_t wanted_sysclk = mp_obj_get_int(args[0]) / 1000000; - - // default PLL parameters that give 48MHz on PLL48CK - uint32_t m = HSE_VALUE / 1000000, n = 336, p = 2, q = 7; - uint32_t sysclk_source; - - // search for a valid PLL configuration that keeps USB at 48MHz - for (const uint16_t *pll = &pll_freq_table[MP_ARRAY_SIZE(pll_freq_table) - 1]; pll >= &pll_freq_table[0]; --pll) { - uint32_t sys = *pll & 0xff; - if (sys <= wanted_sysclk) { - m = (*pll >> 10) & 0x3f; - p = ((*pll >> 7) & 0x6) + 2; - if (m == 0) { - // special entry for using HSI directly - sysclk_source = RCC_SYSCLKSOURCE_HSI; - goto set_clk; - } else if (m == 1) { - // special entry for using HSE directly - sysclk_source = RCC_SYSCLKSOURCE_HSE; - goto set_clk; - } else { - // use PLL - sysclk_source = RCC_SYSCLKSOURCE_PLLCLK; - uint32_t vco_out = sys * p; - n = vco_out * m / (HSE_VALUE / 1000000); - q = vco_out / 48; - goto set_clk; - } - } - } - mp_raise_ValueError("can't make valid freq"); - - set_clk: - //printf("%lu %lu %lu %lu %lu\n", sysclk_source, m, n, p, q); - - // let the USB CDC have a chance to process before we change the clock - mp_hal_delay_ms(5); - - // desired system clock source is in sysclk_source - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) { - // set HSE as system clock source to allow modification of the PLL configuration - // we then change to PLL after re-configuring PLL - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - } else { - // directly set the system clock source as desired - RCC_ClkInitStruct.SYSCLKSource = sysclk_source; - } - wanted_sysclk *= 1000000; - if (n_args >= 2) { - // note: AHB freq required to be >= 14.2MHz for USB operation - RCC_ClkInitStruct.AHBCLKDivider = machine_freq_calc_ahb_div(wanted_sysclk / mp_obj_get_int(args[1])); - } else { - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - } - if (n_args >= 3) { - RCC_ClkInitStruct.APB1CLKDivider = machine_freq_calc_apb_div(wanted_sysclk / mp_obj_get_int(args[2])); - } else { - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - } - if (n_args >= 4) { - RCC_ClkInitStruct.APB2CLKDivider = machine_freq_calc_apb_div(wanted_sysclk / mp_obj_get_int(args[3])); - } else { - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - } - #if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - uint32_t h = RCC_ClkInitStruct.AHBCLKDivider >> 4; - uint32_t b1 = RCC_ClkInitStruct.APB1CLKDivider >> 10; - uint32_t b2 = RCC_ClkInitStruct.APB2CLKDivider >> 10; - #endif - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { - goto fail; - } - - // re-configure PLL - // even if we don't use the PLL for the system clock, we still need it for USB, RNG and SDIO - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = MICROPY_HW_CLK_HSE_STATE; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = m; - RCC_OscInitStruct.PLL.PLLN = n; - RCC_OscInitStruct.PLL.PLLP = p; - RCC_OscInitStruct.PLL.PLLQ = q; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - goto fail; - } - - // set PLL as system clock source if wanted - if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) { - uint32_t flash_latency; - #if defined(STM32F7) - // if possible, scale down the internal voltage regulator to save power - // the flash_latency values assume a supply voltage between 2.7V and 3.6V - uint32_t volt_scale; - if (wanted_sysclk <= 90000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE3; - flash_latency = FLASH_LATENCY_2; - } else if (wanted_sysclk <= 120000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE3; - flash_latency = FLASH_LATENCY_3; - } else if (wanted_sysclk <= 144000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE3; - flash_latency = FLASH_LATENCY_4; - } else if (wanted_sysclk <= 180000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE2; - flash_latency = FLASH_LATENCY_5; - } else if (wanted_sysclk <= 210000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE1; - flash_latency = FLASH_LATENCY_6; - } else { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE1; - flash_latency = FLASH_LATENCY_7; - } - if (HAL_PWREx_ControlVoltageScaling(volt_scale) != HAL_OK) { - goto fail; - } - #endif - - #if !defined(STM32F7) - #if !defined(MICROPY_HW_FLASH_LATENCY) - #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5 - #endif - flash_latency = MICROPY_HW_FLASH_LATENCY; - #endif - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, flash_latency) != HAL_OK) { - goto fail; - } - } - - #if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - #if defined(STM32F7) - #define FREQ_BKP BKP31R - #else - #define FREQ_BKP BKP19R - #endif - // qqqqqqqq pppppppp nnnnnnnn nnmmmmmm - // qqqqQQQQ ppppppPP nNNNNNNN NNMMMMMM - // 222111HH HHQQQQPP nNNNNNNN NNMMMMMM - p = (p / 2) - 1; - RTC->FREQ_BKP = m - | (n << 6) | (p << 16) | (q << 18) - | (h << 22) - | (b1 << 26) - | (b2 << 29); - #endif - - return mp_const_none; - - fail:; - void NORETURN __fatal_error(const char *msg); - __fatal_error("can't change freq"); - - #endif - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq); - -STATIC mp_obj_t machine_sleep(void) { - #if defined(STM32L4) - - // Enter Stop 1 mode - __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI); - HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); - - // reconfigure system clock after wakeup - // Enable Power Control clock - __HAL_RCC_PWR_CLK_ENABLE(); - - // Get the Oscillators configuration according to the internal RCC registers - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - HAL_RCC_GetOscConfig(&RCC_OscInitStruct); - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - HAL_RCC_OscConfig(&RCC_OscInitStruct); - - // Get the Clocks configuration according to the internal RCC registers - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - uint32_t pFLatency = 0; - HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency); - - // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, pFLatency); - - #else - - #if !defined(STM32F0) - // takes longer to wake but reduces stop current - HAL_PWREx_EnableFlashPowerDown(); - #endif - - # if defined(STM32F7) - HAL_PWR_EnterSTOPMode((PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_FPDS | PWR_CR1_UDEN), PWR_STOPENTRY_WFI); - # else - HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); - #endif - - // reconfigure the system clock after waking up - - // enable HSE - __HAL_RCC_HSE_CONFIG(MICROPY_HW_CLK_HSE_STATE); - while (!__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY)) { - } - - // enable PLL - __HAL_RCC_PLL_ENABLE(); - while (!__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)) { - } - - // select PLL as system clock source - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK); - #if defined(STM32H7) - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1) { - #else - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) { - #endif - } - - #endif - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep(void) { - rtc_init_finalise(); - -#if defined(STM32L4) - printf("machine.deepsleep not supported yet\n"); -#else - // We need to clear the PWR wake-up-flag before entering standby, since - // the flag may have been set by a previous wake-up event. Furthermore, - // we need to disable the wake-up sources while clearing this flag, so - // that if a source is active it does actually wake the device. - // See section 5.3.7 of RM0090. - - // Note: we only support RTC ALRA, ALRB, WUT and TS. - // TODO support TAMP and WKUP (PA0 external pin). - #if defined(STM32F0) - #define CR_BITS (RTC_CR_ALRAIE | RTC_CR_WUTIE | RTC_CR_TSIE) - #define ISR_BITS (RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TSF) - #else - #define CR_BITS (RTC_CR_ALRAIE | RTC_CR_ALRBIE | RTC_CR_WUTIE | RTC_CR_TSIE) - #define ISR_BITS (RTC_ISR_ALRAF | RTC_ISR_ALRBF | RTC_ISR_WUTF | RTC_ISR_TSF) - #endif - - // save RTC interrupts - uint32_t save_irq_bits = RTC->CR & CR_BITS; - - // disable RTC interrupts - RTC->CR &= ~CR_BITS; - - // clear RTC wake-up flags - RTC->ISR &= ~ISR_BITS; - - #if defined(STM32F7) - // disable wake-up flags - PWR->CSR2 &= ~(PWR_CSR2_EWUP6 | PWR_CSR2_EWUP5 | PWR_CSR2_EWUP4 | PWR_CSR2_EWUP3 | PWR_CSR2_EWUP2 | PWR_CSR2_EWUP1); - // clear global wake-up flag - PWR->CR2 |= PWR_CR2_CWUPF6 | PWR_CR2_CWUPF5 | PWR_CR2_CWUPF4 | PWR_CR2_CWUPF3 | PWR_CR2_CWUPF2 | PWR_CR2_CWUPF1; - #elif defined(STM32H7) - // TODO - #else - // clear global wake-up flag - PWR->CR |= PWR_CR_CWUF; - #endif - - // enable previously-enabled RTC interrupts - RTC->CR |= save_irq_bits; - - // enter standby mode - HAL_PWR_EnterSTANDBYMode(); - // we never return; MCU is reset on exit from standby -#endif - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -STATIC mp_obj_t machine_reset_cause(void) { - return MP_OBJ_NEW_SMALL_INT(reset_cause); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&pyb_wfi_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) }, -#endif - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - -#if 0 - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, -#endif -#if MICROPY_PY_MACHINE_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, -#endif - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_HeartBeat), MP_ROM_PTR(&pyb_heartbeat_type) }, - { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sd_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IDLE), MP_ROM_INT(PYB_PWR_MODE_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(PYB_PWR_MODE_LPDS) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_RESET_POWER_ON) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_RESET_HARD) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_RESET_WDT) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_RESET_DEEPSLEEP) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_RESET_SOFT) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) }, - { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) }, - { MP_ROM_QSTR(MP_QSTR_RTC_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t machine_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h deleted file mode 100644 index 88fe236921..0000000000 --- a/ports/stm32/modmachine.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_MODMACHINE_H -#define MICROPY_INCLUDED_STM32_MODMACHINE_H - -#include "py/obj.h" - -void machine_init(void); -void machine_deinit(void); - -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_bootloader_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_sleep_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_deepsleep_obj); - -#endif // MICROPY_INCLUDED_STM32_MODMACHINE_H diff --git a/ports/stm32/modnetwork.c b/ports/stm32/modnetwork.c deleted file mode 100644 index cf7ecbf3c0..0000000000 --- a/ports/stm32/modnetwork.c +++ /dev/null @@ -1,177 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" - -#if MICROPY_PY_NETWORK - -#if MICROPY_PY_LWIP - -#include "lwip/netif.h" -#include "lwip/timeouts.h" -#include "lwip/dns.h" -#include "lwip/dhcp.h" - -u32_t sys_now(void) { - return mp_hal_ticks_ms(); -} - -void pyb_lwip_poll(void) { - // Poll all the NICs for incoming data - for (struct netif *netif = netif_list; netif != NULL; netif = netif->next) { - if (netif->flags & NETIF_FLAG_LINK_UP) { - mod_network_nic_type_t *nic = netif->state; - nic->poll_callback(nic, netif); - } - } - // Run the lwIP internal updates - sys_check_timeouts(); -} - -#endif - -/// \module network - network configuration -/// -/// This module provides network drivers and routing configuration. - -void mod_network_init(void) { - mp_obj_list_init(&MP_STATE_PORT(mod_network_nic_list), 0); -} - -void mod_network_deinit(void) { -} - -void mod_network_register_nic(mp_obj_t nic) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { - if (MP_STATE_PORT(mod_network_nic_list).items[i] == nic) { - // nic already registered - return; - } - } - // nic not registered so add to list - mp_obj_list_append(&MP_STATE_PORT(mod_network_nic_list), nic); -} - -mp_obj_t mod_network_find_nic(const uint8_t *ip) { - // find a NIC that is suited to given IP address - for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { - mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; - // TODO check IP suitability here - //mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); - return nic; - } - - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "no available NIC")); -} - -STATIC mp_obj_t network_route(void) { - return &MP_STATE_PORT(mod_network_nic_list); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(network_route_obj, network_route); - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - - #if MICROPY_PY_WIZNET5K - { MP_ROM_QSTR(MP_QSTR_WIZNET5K), MP_ROM_PTR(&mod_network_nic_type_wiznet5k) }, - #endif - #if MICROPY_PY_CC3K - { MP_ROM_QSTR(MP_QSTR_CC3K), MP_ROM_PTR(&mod_network_nic_type_cc3k) }, - #endif - - { MP_ROM_QSTR(MP_QSTR_route), MP_ROM_PTR(&network_route_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t mp_module_network = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; - -/*******************************************************************************/ -// Implementations of network methods that can be used by any interface - -#if MICROPY_PY_LWIP - -mp_obj_t mod_network_nic_ifconfig(struct netif *netif, size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - // Get IP addresses - const ip_addr_t *dns = dns_getserver(0); - mp_obj_t tuple[4] = { - netutils_format_ipv4_addr((uint8_t*)&netif->ip_addr, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&netif->netmask, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&netif->gw, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&dns, NETUTILS_BIG), - }; - return mp_obj_new_tuple(4, tuple); - } else if (args[0] == MP_OBJ_NEW_QSTR(MP_QSTR_dhcp)) { - // Start the DHCP client - if (dhcp_supplied_address(netif)) { - dhcp_renew(netif); - } else { - dhcp_stop(netif); - dhcp_start(netif); - } - - // Wait for DHCP to get IP address - uint32_t start = mp_hal_ticks_ms(); - while (!dhcp_supplied_address(netif)) { - if (mp_hal_ticks_ms() - start > 10000) { - mp_raise_msg(&mp_type_OSError, "timeout waiting for DHCP to get IP address"); - } - mp_hal_delay_ms(100); - } - - return mp_const_none; - } else { - // Release and stop any existing DHCP - dhcp_release(netif); - dhcp_stop(netif); - // Set static IP addresses - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[0], 4, &items); - netutils_parse_ipv4_addr(items[0], (uint8_t*)&netif->ip_addr, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[1], (uint8_t*)&netif->netmask, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[2], (uint8_t*)&netif->gw, NETUTILS_BIG); - ip_addr_t dns; - netutils_parse_ipv4_addr(items[3], (uint8_t*)&dns, NETUTILS_BIG); - dns_setserver(0, &dns); - return mp_const_none; - } -} - -#endif - -#endif // MICROPY_PY_NETWORK diff --git a/ports/stm32/modnetwork.h b/ports/stm32/modnetwork.h deleted file mode 100644 index f45e00fbc2..0000000000 --- a/ports/stm32/modnetwork.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_MODNETWORK_H -#define MICROPY_INCLUDED_STM32_MODNETWORK_H - -#define MOD_NETWORK_IPADDR_BUF_SIZE (4) - -#define MOD_NETWORK_AF_INET (2) -#define MOD_NETWORK_AF_INET6 (10) - -#define MOD_NETWORK_SOCK_STREAM (1) -#define MOD_NETWORK_SOCK_DGRAM (2) -#define MOD_NETWORK_SOCK_RAW (3) - -#if MICROPY_PY_LWIP - -struct netif; - -typedef struct _mod_network_nic_type_t { - mp_obj_base_t base; - void (*poll_callback)(void *data, struct netif *netif); -} mod_network_nic_type_t; - -extern const mp_obj_type_t mod_network_nic_type_wiznet5k; - -mp_obj_t mod_network_nic_ifconfig(struct netif *netif, size_t n_args, const mp_obj_t *args); - -#else - -struct _mod_network_socket_obj_t; - -typedef struct _mod_network_nic_type_t { - mp_obj_type_t base; - - // API for non-socket operations - int (*gethostbyname)(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *ip_out); - - // API for socket operations; return -1 on error - int (*socket)(struct _mod_network_socket_obj_t *socket, int *_errno); - void (*close)(struct _mod_network_socket_obj_t *socket); - int (*bind)(struct _mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); - int (*listen)(struct _mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno); - int (*accept)(struct _mod_network_socket_obj_t *socket, struct _mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno); - int (*connect)(struct _mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); - mp_uint_t (*send)(struct _mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno); - mp_uint_t (*recv)(struct _mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno); - mp_uint_t (*sendto)(struct _mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno); - mp_uint_t (*recvfrom)(struct _mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno); - int (*setsockopt)(struct _mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno); - int (*settimeout)(struct _mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno); - int (*ioctl)(struct _mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno); -} mod_network_nic_type_t; - -typedef struct _mod_network_socket_obj_t { - mp_obj_base_t base; - mp_obj_t nic; - mod_network_nic_type_t *nic_type; - union { - struct { - uint8_t domain; - uint8_t type; - int8_t fileno; - } u_param; - mp_uint_t u_state; - }; -} mod_network_socket_obj_t; - -extern const mod_network_nic_type_t mod_network_nic_type_wiznet5k; -extern const mod_network_nic_type_t mod_network_nic_type_cc3k; - -#endif - -void mod_network_init(void); -void mod_network_deinit(void); -void mod_network_register_nic(mp_obj_t nic); -mp_obj_t mod_network_find_nic(const uint8_t *ip); - -#endif // MICROPY_INCLUDED_STM32_MODNETWORK_H diff --git a/ports/stm32/modnwcc3k.c b/ports/stm32/modnwcc3k.c deleted file mode 100644 index 8723994f45..0000000000 --- a/ports/stm32/modnwcc3k.c +++ /dev/null @@ -1,600 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -// CC3000 defines its own ENOBUFS (different to standard one!) -#undef ENOBUFS - -#include "py/objtuple.h" -#include "py/objlist.h" -#include "py/stream.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "pin.h" -#include "spi.h" - -#include "hci.h" -#include "socket.h" -#include "inet_ntop.h" -#include "inet_pton.h" -#include "ccspi.h" -#include "wlan.h" -#include "nvmem.h" -#include "netapp.h" -#include "patch_prog.h" - -#define MAX_ADDRSTRLEN (128) -#define MAX_RX_PACKET (CC3000_RX_BUFFER_SIZE-CC3000_MINIMAL_RX_SIZE-1) -#define MAX_TX_PACKET (CC3000_TX_BUFFER_SIZE-CC3000_MINIMAL_TX_SIZE-1) - -#define MAKE_SOCKADDR(addr, ip, port) \ - sockaddr addr; \ - addr.sa_family = AF_INET; \ - addr.sa_data[0] = port >> 8; \ - addr.sa_data[1] = port; \ - addr.sa_data[2] = ip[0]; \ - addr.sa_data[3] = ip[1]; \ - addr.sa_data[4] = ip[2]; \ - addr.sa_data[5] = ip[3]; - -#define UNPACK_SOCKADDR(addr, ip, port) \ - port = (addr.sa_data[0] << 8) | addr.sa_data[1]; \ - ip[0] = addr.sa_data[2]; \ - ip[1] = addr.sa_data[3]; \ - ip[2] = addr.sa_data[4]; \ - ip[3] = addr.sa_data[5]; - -STATIC int cc3k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno); - -int CC3000_EXPORT(errno); // for cc3000 driver - -STATIC volatile uint32_t fd_closed_state = 0; -STATIC volatile bool wlan_connected = false; -STATIC volatile bool ip_obtained = false; - -STATIC int cc3k_get_fd_closed_state(int fd) { - return fd_closed_state & (1 << fd); -} - -STATIC void cc3k_set_fd_closed_state(int fd) { - fd_closed_state |= 1 << fd; -} - -STATIC void cc3k_reset_fd_closed_state(int fd) { - fd_closed_state &= ~(1 << fd); -} - -STATIC void cc3k_callback(long event_type, char *data, unsigned char length) { - switch (event_type) { - case HCI_EVNT_WLAN_UNSOL_CONNECT: - wlan_connected = true; - break; - case HCI_EVNT_WLAN_UNSOL_DISCONNECT: - // link down - wlan_connected = false; - ip_obtained = false; - break; - case HCI_EVNT_WLAN_UNSOL_DHCP: - ip_obtained = true; - break; - case HCI_EVNT_BSD_TCP_CLOSE_WAIT: - // mark socket for closure - cc3k_set_fd_closed_state(data[0]); - break; - } -} - -STATIC int cc3k_gethostbyname(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *out_ip) { - uint32_t ip; - // CC3000 gethostbyname is unreliable and usually returns -95 on first call - for (int retry = 5; CC3000_EXPORT(gethostbyname)((char*)name, len, &ip) < 0; retry--) { - if (retry == 0 || CC3000_EXPORT(errno) != -95) { - return CC3000_EXPORT(errno); - } - mp_hal_delay_ms(50); - } - - if (ip == 0) { - // unknown host - return -2; - } - - out_ip[0] = ip >> 24; - out_ip[1] = ip >> 16; - out_ip[2] = ip >> 8; - out_ip[3] = ip; - - return 0; -} - -STATIC int cc3k_socket_socket(mod_network_socket_obj_t *socket, int *_errno) { - if (socket->u_param.domain != MOD_NETWORK_AF_INET) { - *_errno = MP_EAFNOSUPPORT; - return -1; - } - - mp_uint_t type; - switch (socket->u_param.type) { - case MOD_NETWORK_SOCK_STREAM: type = SOCK_STREAM; break; - case MOD_NETWORK_SOCK_DGRAM: type = SOCK_DGRAM; break; - case MOD_NETWORK_SOCK_RAW: type = SOCK_RAW; break; - default: *_errno = MP_EINVAL; return -1; - } - - // open socket - int fd = CC3000_EXPORT(socket)(AF_INET, type, 0); - if (fd < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - // clear socket state - cc3k_reset_fd_closed_state(fd); - - // store state of this socket - socket->u_state = fd; - - // make accept blocking by default - int optval = SOCK_OFF; - socklen_t optlen = sizeof(optval); - CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_ACCEPT_NONBLOCK, &optval, optlen); - - return 0; -} - -STATIC void cc3k_socket_close(mod_network_socket_obj_t *socket) { - CC3000_EXPORT(closesocket)(socket->u_state); -} - -STATIC int cc3k_socket_bind(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = CC3000_EXPORT(bind)(socket->u_state, &addr, sizeof(addr)); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int cc3k_socket_listen(mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno) { - int ret = CC3000_EXPORT(listen)(socket->u_state, backlog); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int cc3k_socket_accept(mod_network_socket_obj_t *socket, mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno) { - // accept incoming connection - int fd; - sockaddr addr; - socklen_t addr_len = sizeof(addr); - if ((fd = CC3000_EXPORT(accept)(socket->u_state, &addr, &addr_len)) < 0) { - if (fd == SOC_IN_PROGRESS) { - *_errno = MP_EAGAIN; - } else { - *_errno = -fd; - } - return -1; - } - - // clear socket state - cc3k_reset_fd_closed_state(fd); - - // store state in new socket object - socket2->u_state = fd; - - // return ip and port - // it seems CC3000 returns little endian for accept?? - //UNPACK_SOCKADDR(addr, ip, *port); - *port = (addr.sa_data[1] << 8) | addr.sa_data[0]; - ip[3] = addr.sa_data[2]; - ip[2] = addr.sa_data[3]; - ip[1] = addr.sa_data[4]; - ip[0] = addr.sa_data[5]; - - return 0; -} - -STATIC int cc3k_socket_connect(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = CC3000_EXPORT(connect)(socket->u_state, &addr, sizeof(addr)); - if (ret != 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - return 0; -} - -STATIC mp_uint_t cc3k_socket_send(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno) { - if (cc3k_get_fd_closed_state(socket->u_state)) { - CC3000_EXPORT(closesocket)(socket->u_state); - *_errno = MP_EPIPE; - return -1; - } - - // CC3K does not handle fragmentation, and will overflow, - // split the packet into smaller ones and send them out. - mp_int_t bytes = 0; - while (bytes < len) { - int n = MIN((len - bytes), MAX_TX_PACKET); - n = CC3000_EXPORT(send)(socket->u_state, (uint8_t*)buf + bytes, n, 0); - if (n <= 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - bytes += n; - } - - return bytes; -} - -STATIC mp_uint_t cc3k_socket_recv(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno) { - // check the socket is open - if (cc3k_get_fd_closed_state(socket->u_state)) { - // socket is closed, but CC3000 may have some data remaining in buffer, so check - fd_set rfds; - FD_ZERO(&rfds); - FD_SET(socket->u_state, &rfds); - cc3000_timeval tv; - tv.tv_sec = 0; - tv.tv_usec = 1; - int nfds = CC3000_EXPORT(select)(socket->u_state + 1, &rfds, NULL, NULL, &tv); - if (nfds == -1 || !FD_ISSET(socket->u_state, &rfds)) { - // no data waiting, so close socket and return 0 data - CC3000_EXPORT(closesocket)(socket->u_state); - return 0; - } - } - - // cap length at MAX_RX_PACKET - len = MIN(len, MAX_RX_PACKET); - - // do the recv - int ret = CC3000_EXPORT(recv)(socket->u_state, buf, len, 0); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - return ret; -} - -STATIC mp_uint_t cc3k_socket_sendto(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = CC3000_EXPORT(sendto)(socket->u_state, (byte*)buf, len, 0, (sockaddr*)&addr, sizeof(addr)); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - return ret; -} - -STATIC mp_uint_t cc3k_socket_recvfrom(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { - sockaddr addr; - socklen_t addr_len = sizeof(addr); - mp_int_t ret = CC3000_EXPORT(recvfrom)(socket->u_state, buf, len, 0, &addr, &addr_len); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - UNPACK_SOCKADDR(addr, ip, *port); - return ret; -} - -STATIC int cc3k_socket_setsockopt(mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { - int ret = CC3000_EXPORT(setsockopt)(socket->u_state, level, opt, optval, optlen); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - return 0; -} - -STATIC int cc3k_socket_settimeout(mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno) { - int ret; - if (timeout_ms == 0 || timeout_ms == -1) { - int optval; - socklen_t optlen = sizeof(optval); - if (timeout_ms == 0) { - // set non-blocking mode - optval = SOCK_ON; - } else { - // set blocking mode - optval = SOCK_OFF; - } - ret = CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_RECV_NONBLOCK, &optval, optlen); - if (ret == 0) { - ret = CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_ACCEPT_NONBLOCK, &optval, optlen); - } - } else { - // set timeout - socklen_t optlen = sizeof(timeout_ms); - ret = CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_RECV_TIMEOUT, &timeout_ms, optlen); - } - - if (ret != 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - return 0; -} - -STATIC int cc3k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno) { - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - int fd = socket->u_state; - - // init fds - fd_set rfds, wfds, xfds; - FD_ZERO(&rfds); - FD_ZERO(&wfds); - FD_ZERO(&xfds); - - // set fds if needed - if (flags & MP_STREAM_POLL_RD) { - FD_SET(fd, &rfds); - - // A socked that just closed is available for reading. A call to - // recv() returns 0 which is consistent with BSD. - if (cc3k_get_fd_closed_state(fd)) { - ret |= MP_STREAM_POLL_RD; - } - } - if (flags & MP_STREAM_POLL_WR) { - FD_SET(fd, &wfds); - } - if (flags & MP_STREAM_POLL_HUP) { - FD_SET(fd, &xfds); - } - - // call cc3000 select with minimum timeout - cc3000_timeval tv; - tv.tv_sec = 0; - tv.tv_usec = 1; - int nfds = CC3000_EXPORT(select)(fd + 1, &rfds, &wfds, &xfds, &tv); - - // check for error - if (nfds == -1) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - // check return of select - if (FD_ISSET(fd, &rfds)) { - ret |= MP_STREAM_POLL_RD; - } - if (FD_ISSET(fd, &wfds)) { - ret |= MP_STREAM_POLL_WR; - } - if (FD_ISSET(fd, &xfds)) { - ret |= MP_STREAM_POLL_HUP; - } - } else { - *_errno = MP_EINVAL; - ret = -1; - } - return ret; -} - -/******************************************************************************/ -// MicroPython bindings; CC3K class - -typedef struct _cc3k_obj_t { - mp_obj_base_t base; -} cc3k_obj_t; - -STATIC const cc3k_obj_t cc3k_obj = {{(mp_obj_type_t*)&mod_network_nic_type_cc3k}}; - -// \classmethod \constructor(spi, pin_cs, pin_en, pin_irq) -// Initialise the CC3000 using the given SPI bus and pins and return a CC3K object. -// -// Note: pins were originally hard-coded to: -// PYBv1.0: init(pyb.SPI(2), pyb.Pin.board.Y5, pyb.Pin.board.Y4, pyb.Pin.board.Y3) -// [SPI on Y position; Y6=B13=SCK, Y7=B14=MISO, Y8=B15=MOSI] -// -// STM32F4DISC: init(pyb.SPI(2), pyb.Pin.cpu.A15, pyb.Pin.cpu.B10, pyb.Pin.cpu.B11) -STATIC mp_obj_t cc3k_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 4, 4, false); - - // set the pins to use - SpiInit( - spi_from_mp_obj(args[0])->spi, - pin_find(args[1]), - pin_find(args[2]), - pin_find(args[3]) - ); - - // initialize and start the module - wlan_init(cc3k_callback, NULL, NULL, NULL, - ReadWlanInterruptPin, SpiResumeSpi, SpiPauseSpi, WriteWlanPin); - - if (wlan_start(0) != 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "failed to init CC3000 module")); - } - - // set connection policy. this should be called explicitly by the user - // wlan_ioctl_set_connection_policy(0, 0, 0); - - // Mask out all non-required events from the CC3000 - wlan_set_event_mask(HCI_EVNT_WLAN_KEEPALIVE| - HCI_EVNT_WLAN_UNSOL_INIT| - HCI_EVNT_WLAN_ASYNC_PING_REPORT| - HCI_EVNT_WLAN_ASYNC_SIMPLE_CONFIG_DONE); - - // register with network module - mod_network_register_nic((mp_obj_t)&cc3k_obj); - - return (mp_obj_t)&cc3k_obj; -} - -// method connect(ssid, key=None, *, security=WPA2, bssid=None) -STATIC mp_obj_t cc3k_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_ssid, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_key, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_security, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = WLAN_SEC_WPA2} }, - { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get ssid - size_t ssid_len; - const char *ssid = mp_obj_str_get_data(args[0].u_obj, &ssid_len); - - // get key and sec - size_t key_len = 0; - const char *key = NULL; - mp_uint_t sec = WLAN_SEC_UNSEC; - if (args[1].u_obj != mp_const_none) { - key = mp_obj_str_get_data(args[1].u_obj, &key_len); - sec = args[2].u_int; - } - - // get bssid - const char *bssid = NULL; - if (args[3].u_obj != mp_const_none) { - bssid = mp_obj_str_get_str(args[3].u_obj); - } - - // connect to AP - if (wlan_connect(sec, (char*)ssid, ssid_len, (uint8_t*)bssid, (uint8_t*)key, key_len) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, "could not connect to ssid=%s, sec=%d, key=%s\n", ssid, sec, key)); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(cc3k_connect_obj, 1, cc3k_connect); - -STATIC mp_obj_t cc3k_disconnect(mp_obj_t self_in) { - // should we check return value? - wlan_disconnect(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_disconnect_obj, cc3k_disconnect); - -STATIC mp_obj_t cc3k_isconnected(mp_obj_t self_in) { - return mp_obj_new_bool(wlan_connected && ip_obtained); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_isconnected_obj, cc3k_isconnected); - -STATIC mp_obj_t cc3k_ifconfig(mp_obj_t self_in) { - tNetappIpconfigRetArgs ipconfig; - netapp_ipconfig(&ipconfig); - - // render MAC address - VSTR_FIXED(mac_vstr, 18); - const uint8_t *mac = ipconfig.uaMacAddr; - vstr_printf(&mac_vstr, "%02x:%02x:%02x:%02x:%02x:%02x", mac[5], mac[4], mac[3], mac[2], mac[1], mac[0]); - - // create and return tuple with ifconfig info - mp_obj_t tuple[7] = { - netutils_format_ipv4_addr(ipconfig.aucIP, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucSubnetMask, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucDefaultGateway, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucDNSServer, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucDHCPServer, NETUTILS_LITTLE), - mp_obj_new_str(mac_vstr.buf, mac_vstr.len), - mp_obj_new_str((const char*)ipconfig.uaSSID, strlen((const char*)ipconfig.uaSSID)), - }; - return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_ifconfig_obj, cc3k_ifconfig); - -STATIC mp_obj_t cc3k_patch_version(mp_obj_t self_in) { - uint8_t pver[2]; - mp_obj_tuple_t *t_pver; - - nvmem_read_sp_version(pver); - t_pver = mp_obj_new_tuple(2, NULL); - t_pver->items[0] = mp_obj_new_int(pver[0]); - t_pver->items[1] = mp_obj_new_int(pver[1]); - return t_pver; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_patch_version_obj, cc3k_patch_version); - -STATIC mp_obj_t cc3k_patch_program(mp_obj_t self_in, mp_obj_t key_in) { - const char *key = mp_obj_str_get_str(key_in); - if (key[0] == 'p' && key[1] == 'g' && key[2] == 'm' && key[3] == '\0') { - patch_prog_start(); - } else { - mp_print_str(&mp_plat_print, "pass 'pgm' as argument in order to program\n"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(cc3k_patch_program_obj, cc3k_patch_program); - -STATIC const mp_rom_map_elem_t cc3k_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&cc3k_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&cc3k_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&cc3k_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&cc3k_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_patch_version), MP_ROM_PTR(&cc3k_patch_version_obj) }, - { MP_ROM_QSTR(MP_QSTR_patch_program), MP_ROM_PTR(&cc3k_patch_program_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_WEP), MP_ROM_INT(WLAN_SEC_WEP) }, - { MP_ROM_QSTR(MP_QSTR_WPA), MP_ROM_INT(WLAN_SEC_WPA) }, - { MP_ROM_QSTR(MP_QSTR_WPA2), MP_ROM_INT(WLAN_SEC_WPA2) }, -}; - -STATIC MP_DEFINE_CONST_DICT(cc3k_locals_dict, cc3k_locals_dict_table); - -const mod_network_nic_type_t mod_network_nic_type_cc3k = { - .base = { - { &mp_type_type }, - .name = MP_QSTR_CC3K, - .make_new = cc3k_make_new, - .locals_dict = (mp_obj_dict_t*)&cc3k_locals_dict, - }, - .gethostbyname = cc3k_gethostbyname, - .socket = cc3k_socket_socket, - .close = cc3k_socket_close, - .bind = cc3k_socket_bind, - .listen = cc3k_socket_listen, - .accept = cc3k_socket_accept, - .connect = cc3k_socket_connect, - .send = cc3k_socket_send, - .recv = cc3k_socket_recv, - .sendto = cc3k_socket_sendto, - .recvfrom = cc3k_socket_recvfrom, - .setsockopt = cc3k_socket_setsockopt, - .settimeout = cc3k_socket_settimeout, - .ioctl = cc3k_socket_ioctl, -}; diff --git a/ports/stm32/modnwwiznet5k.c b/ports/stm32/modnwwiznet5k.c deleted file mode 100644 index bf4b72ff21..0000000000 --- a/ports/stm32/modnwwiznet5k.c +++ /dev/null @@ -1,505 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "pin.h" -#include "spi.h" - -#if MICROPY_PY_WIZNET5K && !MICROPY_PY_LWIP - -#include "ethernet/wizchip_conf.h" -#include "ethernet/socket.h" -#include "internet/dns/dns.h" - -/// \moduleref network - -typedef struct _wiznet5k_obj_t { - mp_obj_base_t base; - mp_uint_t cris_state; - const spi_t *spi; - const pin_obj_t *cs; - const pin_obj_t *rst; - uint8_t socket_used; -} wiznet5k_obj_t; - -STATIC wiznet5k_obj_t wiznet5k_obj; - -STATIC void wiz_cris_enter(void) { - wiznet5k_obj.cris_state = MICROPY_BEGIN_ATOMIC_SECTION(); -} - -STATIC void wiz_cris_exit(void) { - MICROPY_END_ATOMIC_SECTION(wiznet5k_obj.cris_state); -} - -STATIC void wiz_cs_select(void) { - mp_hal_pin_low(wiznet5k_obj.cs); -} - -STATIC void wiz_cs_deselect(void) { - mp_hal_pin_high(wiznet5k_obj.cs); -} - -STATIC void wiz_spi_read(uint8_t *buf, uint32_t len) { - HAL_StatusTypeDef status = HAL_SPI_Receive(wiznet5k_obj.spi->spi, buf, len, 5000); - (void)status; -} - -STATIC void wiz_spi_write(const uint8_t *buf, uint32_t len) { - HAL_StatusTypeDef status = HAL_SPI_Transmit(wiznet5k_obj.spi->spi, (uint8_t*)buf, len, 5000); - (void)status; -} - -STATIC int wiznet5k_gethostbyname(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *out_ip) { - uint8_t dns_ip[MOD_NETWORK_IPADDR_BUF_SIZE] = {8, 8, 8, 8}; - uint8_t *buf = m_new(uint8_t, MAX_DNS_BUF_SIZE); - DNS_init(0, buf); - mp_int_t ret = DNS_run(dns_ip, (uint8_t*)name, out_ip); - m_del(uint8_t, buf, MAX_DNS_BUF_SIZE); - if (ret == 1) { - // success - return 0; - } else { - // failure - return -2; - } -} - -STATIC int wiznet5k_socket_socket(mod_network_socket_obj_t *socket, int *_errno) { - if (socket->u_param.domain != MOD_NETWORK_AF_INET) { - *_errno = MP_EAFNOSUPPORT; - return -1; - } - - switch (socket->u_param.type) { - case MOD_NETWORK_SOCK_STREAM: socket->u_param.type = Sn_MR_TCP; break; - case MOD_NETWORK_SOCK_DGRAM: socket->u_param.type = Sn_MR_UDP; break; - default: *_errno = MP_EINVAL; return -1; - } - - if (socket->u_param.fileno == -1) { - // get first unused socket number - for (mp_uint_t sn = 0; sn < _WIZCHIP_SOCK_NUM_; sn++) { - if ((wiznet5k_obj.socket_used & (1 << sn)) == 0) { - wiznet5k_obj.socket_used |= (1 << sn); - socket->u_param.fileno = sn; - break; - } - } - if (socket->u_param.fileno == -1) { - // too many open sockets - *_errno = MP_EMFILE; - return -1; - } - } - - // WIZNET does not have a concept of pure "open socket". You need to know - // if it's a server or client at the time of creation of the socket. - // So, we defer the open until we know what kind of socket we want. - - // use "domain" to indicate that this socket has not yet been opened - socket->u_param.domain = 0; - - return 0; -} - -STATIC void wiznet5k_socket_close(mod_network_socket_obj_t *socket) { - uint8_t sn = (uint8_t)socket->u_param.fileno; - if (sn < _WIZCHIP_SOCK_NUM_) { - wiznet5k_obj.socket_used &= ~(1 << sn); - WIZCHIP_EXPORT(close)(sn); - } -} - -STATIC int wiznet5k_socket_bind(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - // open the socket in server mode (if port != 0) - mp_int_t ret = WIZCHIP_EXPORT(socket)(socket->u_param.fileno, socket->u_param.type, port, 0); - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - - // indicate that this socket has been opened - socket->u_param.domain = 1; - - // success - return 0; -} - -STATIC int wiznet5k_socket_listen(mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno) { - mp_int_t ret = WIZCHIP_EXPORT(listen)(socket->u_param.fileno); - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return 0; -} - -STATIC int wiznet5k_socket_accept(mod_network_socket_obj_t *socket, mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno) { - for (;;) { - int sr = getSn_SR((uint8_t)socket->u_param.fileno); - if (sr == SOCK_ESTABLISHED) { - socket2->u_param = socket->u_param; - getSn_DIPR((uint8_t)socket2->u_param.fileno, ip); - *port = getSn_PORT(socket2->u_param.fileno); - - // WIZnet turns the listening socket into the client socket, so we - // need to re-bind and re-listen on another socket for the server. - // TODO handle errors, especially no-more-sockets error - socket->u_param.domain = MOD_NETWORK_AF_INET; - socket->u_param.fileno = -1; - int _errno2; - if (wiznet5k_socket_socket(socket, &_errno2) != 0) { - //printf("(bad resocket %d)\n", _errno2); - } else if (wiznet5k_socket_bind(socket, NULL, *port, &_errno2) != 0) { - //printf("(bad rebind %d)\n", _errno2); - } else if (wiznet5k_socket_listen(socket, 0, &_errno2) != 0) { - //printf("(bad relisten %d)\n", _errno2); - } - - return 0; - } - if (sr == SOCK_CLOSED || sr == SOCK_CLOSE_WAIT) { - wiznet5k_socket_close(socket); - *_errno = MP_ENOTCONN; // ?? - return -1; - } - mp_hal_delay_ms(1); - } -} - -STATIC int wiznet5k_socket_connect(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - // use "bind" function to open the socket in client mode - if (wiznet5k_socket_bind(socket, ip, 0, _errno) != 0) { - return -1; - } - - // now connect - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(connect)(socket->u_param.fileno, ip, port); - MP_THREAD_GIL_ENTER(); - - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - - // success - return 0; -} - -STATIC mp_uint_t wiznet5k_socket_send(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno) { - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(send)(socket->u_param.fileno, (byte*)buf, len); - MP_THREAD_GIL_ENTER(); - - // TODO convert Wiz errno's to POSIX ones - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC mp_uint_t wiznet5k_socket_recv(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno) { - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(recv)(socket->u_param.fileno, buf, len); - MP_THREAD_GIL_ENTER(); - - // TODO convert Wiz errno's to POSIX ones - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC mp_uint_t wiznet5k_socket_sendto(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { - if (socket->u_param.domain == 0) { - // socket not opened; use "bind" function to open the socket in client mode - if (wiznet5k_socket_bind(socket, ip, 0, _errno) != 0) { - return -1; - } - } - - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(sendto)(socket->u_param.fileno, (byte*)buf, len, ip, port); - MP_THREAD_GIL_ENTER(); - - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC mp_uint_t wiznet5k_socket_recvfrom(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { - uint16_t port2; - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(recvfrom)(socket->u_param.fileno, buf, len, ip, &port2); - MP_THREAD_GIL_ENTER(); - *port = port2; - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC int wiznet5k_socket_setsockopt(mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { - // TODO - *_errno = MP_EINVAL; - return -1; -} - -STATIC int wiznet5k_socket_settimeout(mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno) { - // TODO - *_errno = MP_EINVAL; - return -1; - - /* - if (timeout_ms == 0) { - // set non-blocking mode - uint8_t arg = SOCK_IO_NONBLOCK; - WIZCHIP_EXPORT(ctlsocket)(socket->u_param.fileno, CS_SET_IOMODE, &arg); - } - */ -} - -STATIC int wiznet5k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno) { - if (request == MP_STREAM_POLL) { - int ret = 0; - if (arg & MP_STREAM_POLL_RD && getSn_RX_RSR(socket->u_param.fileno) != 0) { - ret |= MP_STREAM_POLL_RD; - } - if (arg & MP_STREAM_POLL_WR && getSn_TX_FSR(socket->u_param.fileno) != 0) { - ret |= MP_STREAM_POLL_WR; - } - return ret; - } else { - *_errno = MP_EINVAL; - return MP_STREAM_ERROR; - } -} - -#if 0 -STATIC void wiznet5k_socket_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) { - wiznet5k_socket_obj_t *self = self_in; - print(env, "", self->sn, getSn_MR(self->sn)); -} - -STATIC mp_obj_t wiznet5k_socket_disconnect(mp_obj_t self_in) { - mp_int_t ret = WIZCHIP_EXPORT(disconnect)(self->sn); - return 0; -} -#endif - -/******************************************************************************/ -// MicroPython bindings - -/// \classmethod \constructor(spi, pin_cs, pin_rst) -/// Create and return a WIZNET5K object. -STATIC mp_obj_t wiznet5k_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 3, 3, false); - - // init the wiznet5k object - wiznet5k_obj.base.type = (mp_obj_type_t*)&mod_network_nic_type_wiznet5k; - wiznet5k_obj.cris_state = 0; - wiznet5k_obj.spi = spi_from_mp_obj(args[0]); - wiznet5k_obj.cs = pin_find(args[1]); - wiznet5k_obj.rst = pin_find(args[2]); - wiznet5k_obj.socket_used = 0; - - /*!< SPI configuration */ - SPI_InitTypeDef *init = &wiznet5k_obj.spi->spi->Init; - init->Mode = SPI_MODE_MASTER; - init->Direction = SPI_DIRECTION_2LINES; - init->DataSize = SPI_DATASIZE_8BIT; - init->CLKPolarity = SPI_POLARITY_LOW; // clock is low when idle - init->CLKPhase = SPI_PHASE_1EDGE; // data latched on first edge, which is rising edge for low-idle - init->NSS = SPI_NSS_SOFT; - init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; // clock freq = f_PCLK / this_prescale_value; Wiz820i can do up to 80MHz - init->FirstBit = SPI_FIRSTBIT_MSB; - init->TIMode = SPI_TIMODE_DISABLED; - init->CRCCalculation = SPI_CRCCALCULATION_DISABLED; - init->CRCPolynomial = 7; // unused - spi_init(wiznet5k_obj.spi, false); - - mp_hal_pin_output(wiznet5k_obj.cs); - mp_hal_pin_output(wiznet5k_obj.rst); - - mp_hal_pin_low(wiznet5k_obj.rst); - mp_hal_delay_ms(1); // datasheet says 2us - mp_hal_pin_high(wiznet5k_obj.rst); - mp_hal_delay_ms(160); // datasheet says 150ms - - reg_wizchip_cris_cbfunc(wiz_cris_enter, wiz_cris_exit); - reg_wizchip_cs_cbfunc(wiz_cs_select, wiz_cs_deselect); - reg_wizchip_spi_cbfunc(wiz_spi_read, wiz_spi_write); - - uint8_t sn_size[16] = {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}; // 2k buffer for each socket - ctlwizchip(CW_INIT_WIZCHIP, sn_size); - - // set some sensible default values; they are configurable using ifconfig method - wiz_NetInfo netinfo = { - .mac = {0x00, 0x08, 0xdc, 0xab, 0xcd, 0xef}, - .ip = {192, 168, 0, 18}, - .sn = {255, 255, 255, 0}, - .gw = {192, 168, 0, 1}, - .dns = {8, 8, 8, 8}, // Google public DNS - .dhcp = NETINFO_STATIC, - }; - ctlnetwork(CN_SET_NETINFO, (void*)&netinfo); - - // seems we need a small delay after init - mp_hal_delay_ms(250); - - // register with network module - mod_network_register_nic(&wiznet5k_obj); - - // return wiznet5k object - return &wiznet5k_obj; -} - -/// \method regs() -/// Dump WIZNET5K registers. -STATIC mp_obj_t wiznet5k_regs(mp_obj_t self_in) { - //wiznet5k_obj_t *self = self_in; - printf("Wiz CREG:"); - for (int i = 0; i < 0x50; ++i) { - if (i % 16 == 0) { - printf("\n %04x:", i); - } - #if MICROPY_PY_WIZNET5K == 5200 - uint32_t reg = i; - #else - uint32_t reg = _W5500_IO_BASE_ | i << 8; - #endif - printf(" %02x", WIZCHIP_READ(reg)); - } - for (int sn = 0; sn < 4; ++sn) { - printf("\nWiz SREG[%d]:", sn); - for (int i = 0; i < 0x30; ++i) { - if (i % 16 == 0) { - printf("\n %04x:", i); - } - #if MICROPY_PY_WIZNET5K == 5200 - uint32_t reg = WIZCHIP_SREG_ADDR(sn, i); - #else - uint32_t reg = _W5500_IO_BASE_ | i << 8 | WIZCHIP_SREG_BLOCK(sn) << 3; - #endif - printf(" %02x", WIZCHIP_READ(reg)); - } - } - printf("\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_regs_obj, wiznet5k_regs); - -STATIC mp_obj_t wiznet5k_isconnected(mp_obj_t self_in) { - (void)self_in; - return mp_obj_new_bool(wizphy_getphylink() == PHY_LINK_ON); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_isconnected_obj, wiznet5k_isconnected); - -/// \method ifconfig([(ip, subnet, gateway, dns)]) -/// Get/set IP address, subnet mask, gateway and DNS. -STATIC mp_obj_t wiznet5k_ifconfig(size_t n_args, const mp_obj_t *args) { - wiz_NetInfo netinfo; - ctlnetwork(CN_GET_NETINFO, &netinfo); - if (n_args == 1) { - // get - mp_obj_t tuple[4] = { - netutils_format_ipv4_addr(netinfo.ip, NETUTILS_BIG), - netutils_format_ipv4_addr(netinfo.sn, NETUTILS_BIG), - netutils_format_ipv4_addr(netinfo.gw, NETUTILS_BIG), - netutils_format_ipv4_addr(netinfo.dns, NETUTILS_BIG), - }; - return mp_obj_new_tuple(4, tuple); - } else { - // set - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 4, &items); - netutils_parse_ipv4_addr(items[0], netinfo.ip, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[1], netinfo.sn, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[2], netinfo.gw, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[3], netinfo.dns, NETUTILS_BIG); - ctlnetwork(CN_SET_NETINFO, &netinfo); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wiznet5k_ifconfig_obj, 1, 2, wiznet5k_ifconfig); - -STATIC const mp_rom_map_elem_t wiznet5k_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&wiznet5k_regs_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&wiznet5k_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&wiznet5k_isconnected_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wiznet5k_locals_dict, wiznet5k_locals_dict_table); - -const mod_network_nic_type_t mod_network_nic_type_wiznet5k = { - .base = { - { &mp_type_type }, - .name = MP_QSTR_WIZNET5K, - .make_new = wiznet5k_make_new, - .locals_dict = (mp_obj_dict_t*)&wiznet5k_locals_dict, - }, - .gethostbyname = wiznet5k_gethostbyname, - .socket = wiznet5k_socket_socket, - .close = wiznet5k_socket_close, - .bind = wiznet5k_socket_bind, - .listen = wiznet5k_socket_listen, - .accept = wiznet5k_socket_accept, - .connect = wiznet5k_socket_connect, - .send = wiznet5k_socket_send, - .recv = wiznet5k_socket_recv, - .sendto = wiznet5k_socket_sendto, - .recvfrom = wiznet5k_socket_recvfrom, - .setsockopt = wiznet5k_socket_setsockopt, - .settimeout = wiznet5k_socket_settimeout, - .ioctl = wiznet5k_socket_ioctl, -}; - -#endif // MICROPY_PY_WIZNET5K && !MICROPY_PY_LWIP diff --git a/ports/stm32/modpyb.c b/ports/stm32/modpyb.c deleted file mode 100644 index 5afbbc4842..0000000000 --- a/ports/stm32/modpyb.c +++ /dev/null @@ -1,239 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "lib/utils/pyexec.h" -#include "drivers/dht/dht.h" -#include "stm32_it.h" -#include "irq.h" -#include "led.h" -#include "timer.h" -#include "extint.h" -#include "usrsw.h" -#include "rng.h" -#include "rtc.h" -#include "i2c.h" -#include "spi.h" -#include "uart.h" -#include "can.h" -#include "adc.h" -#include "storage.h" -#include "sdcard.h" -#include "accel.h" -#include "servo.h" -#include "dac.h" -#include "lcd.h" -#include "usb.h" -#include "portmodules.h" -#include "modmachine.h" -#include "extmod/vfs.h" -#include "extmod/utime_mphal.h" - -STATIC mp_obj_t pyb_fault_debug(mp_obj_t value) { - pyb_hard_fault_debug = mp_obj_is_true(value); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_fault_debug_obj, pyb_fault_debug); - -#if MICROPY_PY_PYB_LEGACY - -// Returns the number of milliseconds which have elapsed since `start`. -// This function takes care of counter wrap and always returns a positive number. -STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) { - uint32_t startMillis = mp_obj_get_int(start); - uint32_t currMillis = mp_hal_ticks_ms(); - return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis); - -// Returns the number of microseconds which have elapsed since `start`. -// This function takes care of counter wrap and always returns a positive number. -STATIC mp_obj_t pyb_elapsed_micros(mp_obj_t start) { - uint32_t startMicros = mp_obj_get_int(start); - uint32_t currMicros = mp_hal_ticks_us(); - return MP_OBJ_NEW_SMALL_INT((currMicros - startMicros) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_micros_obj, pyb_elapsed_micros); - -#endif - -MP_DECLARE_CONST_FUN_OBJ_KW(pyb_main_obj); // defined in main.c - -// Get or set the UART object that the REPL is repeated on. -// This is a legacy function, use of uos.dupterm is preferred. -STATIC mp_obj_t pyb_repl_uart(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - if (MP_STATE_PORT(pyb_stdio_uart) == NULL) { - return mp_const_none; - } else { - return MP_STATE_PORT(pyb_stdio_uart); - } - } else { - if (args[0] == mp_const_none) { - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - uart_attach_to_repl(MP_STATE_PORT(pyb_stdio_uart), false); - MP_STATE_PORT(pyb_stdio_uart) = NULL; - } - } else if (mp_obj_get_type(args[0]) == &pyb_uart_type) { - MP_STATE_PORT(pyb_stdio_uart) = args[0]; - uart_attach_to_repl(MP_STATE_PORT(pyb_stdio_uart), true); - } else { - mp_raise_ValueError("need a UART object"); - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_repl_uart_obj, 0, 1, pyb_repl_uart); - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - - { MP_ROM_QSTR(MP_QSTR_fault_debug), MP_ROM_PTR(&pyb_fault_debug_obj) }, - - #if MICROPY_PY_PYB_LEGACY - { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, - { MP_ROM_QSTR(MP_QSTR_hard_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - #endif - { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) }, - - { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&pyb_wfi_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - #if IRQ_ENABLE_STATS - { MP_ROM_QSTR(MP_QSTR_irq_stats), MP_ROM_PTR(&pyb_irq_stats_obj) }, - #endif - - #if MICROPY_PY_PYB_LEGACY - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_standby), MP_ROM_PTR(&machine_deepsleep_obj) }, - #endif - { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&pyb_main_obj) }, - { MP_ROM_QSTR(MP_QSTR_repl_uart), MP_ROM_PTR(&pyb_repl_uart_obj) }, - - #if MICROPY_HW_ENABLE_USB - { MP_ROM_QSTR(MP_QSTR_usb_mode), MP_ROM_PTR(&pyb_usb_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid_mouse), MP_ROM_PTR(&pyb_usb_hid_mouse_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid_keyboard), MP_ROM_PTR(&pyb_usb_hid_keyboard_obj) }, - { MP_ROM_QSTR(MP_QSTR_USB_VCP), MP_ROM_PTR(&pyb_usb_vcp_type) }, - { MP_ROM_QSTR(MP_QSTR_USB_HID), MP_ROM_PTR(&pyb_usb_hid_type) }, - #if MICROPY_PY_PYB_LEGACY - // these 2 are deprecated; use USB_VCP.isconnected and USB_HID.send instead - { MP_ROM_QSTR(MP_QSTR_have_cdc), MP_ROM_PTR(&pyb_have_cdc_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid), MP_ROM_PTR(&pyb_hid_send_report_obj) }, - #endif - #endif - - #if MICROPY_PY_PYB_LEGACY - { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_micros), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_micros), MP_ROM_PTR(&pyb_elapsed_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_udelay), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&mod_os_sync_obj) }, - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - #endif - - // This function is not intended to be public and may be moved elsewhere - { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -#endif - -#if MICROPY_HW_ENABLE_RTC - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, -#endif - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_ExtInt), MP_ROM_PTR(&extint_type) }, - -#if MICROPY_HW_ENABLE_SERVO - { MP_ROM_QSTR(MP_QSTR_pwm), MP_ROM_PTR(&pyb_pwm_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_servo), MP_ROM_PTR(&pyb_servo_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_Servo), MP_ROM_PTR(&pyb_servo_type) }, -#endif - -#if MICROPY_HW_HAS_SWITCH - { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) }, -#endif - -#if MICROPY_HW_HAS_FLASH - { MP_ROM_QSTR(MP_QSTR_Flash), MP_ROM_PTR(&pyb_flash_type) }, -#endif - -#if MICROPY_HW_HAS_SDCARD - #if MICROPY_PY_PYB_LEGACY - { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sdcard_obj) }, // now obsolete - #endif - { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&pyb_sdcard_type) }, -#endif - -#if defined(MICROPY_HW_LED1) - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, -#endif - #if MICROPY_PY_PYB_LEGACY && MICROPY_HW_ENABLE_HW_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) }, - #endif - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, -#if MICROPY_HW_ENABLE_CAN - { MP_ROM_QSTR(MP_QSTR_CAN), MP_ROM_PTR(&pyb_can_type) }, -#endif - - #if MICROPY_HW_ENABLE_ADC - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_ADCAll), MP_ROM_PTR(&pyb_adc_all_type) }, - #endif - -#if MICROPY_HW_ENABLE_DAC - { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pyb_dac_type) }, -#endif - -#if MICROPY_HW_HAS_MMA7660 - { MP_ROM_QSTR(MP_QSTR_Accel), MP_ROM_PTR(&pyb_accel_type) }, -#endif - -#if MICROPY_HW_HAS_LCD - { MP_ROM_QSTR(MP_QSTR_LCD), MP_ROM_PTR(&pyb_lcd_type) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/stm32/modstm.c b/ports/stm32/modstm.c deleted file mode 100644 index 3fae3a57c4..0000000000 --- a/ports/stm32/modstm.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/objint.h" -#include "extmod/machine_mem.h" -#include "portmodules.h" - -#if MICROPY_PY_STM - -#include "genhdr/modstm_mpz.h" - -STATIC const mp_rom_map_elem_t stm_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_stm) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - -#include "genhdr/modstm_const.h" -}; - -STATIC MP_DEFINE_CONST_DICT(stm_module_globals, stm_module_globals_table); - -const mp_obj_module_t stm_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&stm_module_globals, -}; - -#endif // MICROPY_PY_STM diff --git a/ports/stm32/modules/dht.py b/ports/stm32/modules/dht.py deleted file mode 120000 index 2aa2f5cbfe..0000000000 --- a/ports/stm32/modules/dht.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/dht/dht.py \ No newline at end of file diff --git a/ports/stm32/modules/lcd160cr.py b/ports/stm32/modules/lcd160cr.py deleted file mode 120000 index 9e63f1d23f..0000000000 --- a/ports/stm32/modules/lcd160cr.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/display/lcd160cr.py \ No newline at end of file diff --git a/ports/stm32/modules/lcd160cr_test.py b/ports/stm32/modules/lcd160cr_test.py deleted file mode 120000 index 5f5bcc1281..0000000000 --- a/ports/stm32/modules/lcd160cr_test.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/display/lcd160cr_test.py \ No newline at end of file diff --git a/ports/stm32/modules/onewire.py b/ports/stm32/modules/onewire.py deleted file mode 120000 index 33f30e84f1..0000000000 --- a/ports/stm32/modules/onewire.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/onewire/onewire.py \ No newline at end of file diff --git a/ports/stm32/moduos.c b/ports/stm32/moduos.c deleted file mode 100644 index 0dde844f30..0000000000 --- a/ports/stm32/moduos.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/objtuple.h" -#include "py/objstr.h" -#include "lib/timeutils/timeutils.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/misc.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "genhdr/mpversion.h" -#include "rng.h" -#include "uart.h" -#include "portmodules.h" - -/// \module os - basic "operating system" services -/// -/// The `os` module contains functions for filesystem access and `urandom`. -/// -/// The filesystem has `/` as the root directory, and the available physical -/// drives are accessible from here. They are currently: -/// -/// /flash -- the internal flash filesystem -/// /sd -- the SD card (if it exists) -/// -/// On boot up, the current directory is `/flash` if no SD card is inserted, -/// otherwise it is `/sd`. - -STATIC const qstr os_uname_info_fields[] = { - MP_QSTR_sysname, MP_QSTR_nodename, - MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine -}; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "pyboard"); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "pyboard"); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); -STATIC MP_DEFINE_ATTRTUPLE( - os_uname_info_obj, - os_uname_info_fields, - 5, - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - (mp_obj_t)&os_uname_info_release_obj, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj -); - -STATIC mp_obj_t os_uname(void) { - return (mp_obj_t)&os_uname_info_obj; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname); - -/// \function sync() -/// Sync all filesystems. -STATIC mp_obj_t os_sync(void) { - #if MICROPY_VFS_FAT - for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) { - // this assumes that vfs->obj is fs_user_mount_t with block device functions - disk_ioctl(MP_OBJ_TO_PTR(vfs->obj), CTRL_SYNC, NULL); - } - #endif - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(mod_os_sync_obj, os_sync); - -#if MICROPY_HW_ENABLE_RNG -/// \function urandom(n) -/// Return a bytes object with n random bytes, generated by the hardware -/// random number generator. -STATIC mp_obj_t os_urandom(mp_obj_t num) { - mp_int_t n = mp_obj_get_int(num); - vstr_t vstr; - vstr_init_len(&vstr, n); - for (int i = 0; i < n; i++) { - vstr.buf[i] = rng_get(); - } - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom); -#endif - -STATIC mp_obj_t uos_dupterm(size_t n_args, const mp_obj_t *args) { - mp_obj_t prev_obj = mp_uos_dupterm_obj.fun.var(n_args, args); - if (mp_obj_get_type(prev_obj) == &pyb_uart_type) { - uart_attach_to_repl(MP_OBJ_TO_PTR(prev_obj), false); - } - if (mp_obj_get_type(args[0]) == &pyb_uart_type) { - uart_attach_to_repl(MP_OBJ_TO_PTR(args[0]), true); - } - return prev_obj; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(uos_dupterm_obj, 1, 2, uos_dupterm); - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - - { MP_ROM_QSTR(MP_QSTR_uname), MP_ROM_PTR(&os_uname_obj) }, - - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename),MP_ROM_PTR(&mp_vfs_rename_obj)}, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) }, - { MP_ROM_QSTR(MP_QSTR_unlink), MP_ROM_PTR(&mp_vfs_remove_obj) }, // unlink aliases to remove - - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&mod_os_sync_obj) }, - - /// \constant sep - separation character used in paths - { MP_ROM_QSTR(MP_QSTR_sep), MP_ROM_QSTR(MP_QSTR__slash_) }, - -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&os_urandom_obj) }, -#endif - - // these are MicroPython extensions - { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&uos_dupterm_obj) }, - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, - #if MICROPY_VFS_FAT - { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, - #endif -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t mp_module_uos = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/stm32/modusocket.c b/ports/stm32/modusocket.c deleted file mode 100644 index 715faa3c4b..0000000000 --- a/ports/stm32/modusocket.c +++ /dev/null @@ -1,468 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/objtuple.h" -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" - -#if MICROPY_PY_USOCKET && !MICROPY_PY_LWIP - -/******************************************************************************/ -// socket class - -STATIC const mp_obj_type_t socket_type; - -// constructor socket(family=AF_INET, type=SOCK_STREAM, proto=0, fileno=None) -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 4, false); - - // create socket object (not bound to any NIC yet) - mod_network_socket_obj_t *s = m_new_obj_with_finaliser(mod_network_socket_obj_t); - s->base.type = (mp_obj_t)&socket_type; - s->nic = MP_OBJ_NULL; - s->nic_type = NULL; - s->u_param.domain = MOD_NETWORK_AF_INET; - s->u_param.type = MOD_NETWORK_SOCK_STREAM; - s->u_param.fileno = -1; - if (n_args >= 1) { - s->u_param.domain = mp_obj_get_int(args[0]); - if (n_args >= 2) { - s->u_param.type = mp_obj_get_int(args[1]); - if (n_args >= 4) { - s->u_param.fileno = mp_obj_get_int(args[3]); - } - } - } - - return s; -} - -STATIC void socket_select_nic(mod_network_socket_obj_t *self, const byte *ip) { - if (self->nic == MP_OBJ_NULL) { - // select NIC based on IP - self->nic = mod_network_find_nic(ip); - self->nic_type = (mod_network_nic_type_t*)mp_obj_get_type(self->nic); - - // call the NIC to open the socket - int _errno; - if (self->nic_type->socket(self, &_errno) != 0) { - mp_raise_OSError(_errno); - } - } -} - -// method socket.bind(address) -STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); - - // check if we need to select a NIC - socket_select_nic(self, ip); - - // call the NIC to bind the socket - int _errno; - if (self->nic_type->bind(self, ip, port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -// method socket.listen(backlog) -STATIC mp_obj_t socket_listen(mp_obj_t self_in, mp_obj_t backlog) { - mod_network_socket_obj_t *self = self_in; - - if (self->nic == MP_OBJ_NULL) { - // not connected - // TODO I think we can listen even if not bound... - mp_raise_OSError(MP_ENOTCONN); - } - - int _errno; - if (self->nic_type->listen(self, mp_obj_get_int(backlog), &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_listen_obj, socket_listen); - -// method socket.accept() -STATIC mp_obj_t socket_accept(mp_obj_t self_in) { - mod_network_socket_obj_t *self = self_in; - - // create new socket object - // starts with empty NIC so that finaliser doesn't run close() method if accept() fails - mod_network_socket_obj_t *socket2 = m_new_obj_with_finaliser(mod_network_socket_obj_t); - socket2->base.type = (mp_obj_t)&socket_type; - socket2->nic = MP_OBJ_NULL; - socket2->nic_type = NULL; - - // accept incoming connection - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port; - int _errno; - if (self->nic_type->accept(self, socket2, ip, &port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - // new socket has valid state, so set the NIC to the same as parent - socket2->nic = self->nic; - socket2->nic_type = self->nic_type; - - // make the return value - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = socket2; - client->items[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); - - return client; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -// method socket.connect(address) -STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); - - // check if we need to select a NIC - socket_select_nic(self, ip); - - // call the NIC to connect the socket - int _errno; - if (self->nic_type->connect(self, ip, port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -// method socket.send(bytes) -STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_EPIPE); - } - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - int _errno; - mp_uint_t ret = self->nic_type->send(self, bufinfo.buf, bufinfo.len, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - return mp_obj_new_int_from_uint(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -// method socket.recv(bufsize) -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_ENOTCONN); - } - mp_int_t len = mp_obj_get_int(len_in); - vstr_t vstr; - vstr_init_len(&vstr, len); - int _errno; - mp_uint_t ret = self->nic_type->recv(self, (byte*)vstr.buf, len, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - if (ret == 0) { - return mp_const_empty_bytes; - } - vstr.len = ret; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -// method socket.sendto(bytes, address) -STATIC mp_obj_t socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get the data - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data_in, &bufinfo, MP_BUFFER_READ); - - // get address - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); - - // check if we need to select a NIC - socket_select_nic(self, ip); - - // call the NIC to sendto - int _errno; - mp_int_t ret = self->nic_type->sendto(self, bufinfo.buf, bufinfo.len, ip, port, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - - return mp_obj_new_int(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(socket_sendto_obj, socket_sendto); - -// method socket.recvfrom(bufsize) -STATIC mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_ENOTCONN); - } - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(len_in)); - byte ip[4]; - mp_uint_t port; - int _errno; - mp_int_t ret = self->nic_type->recvfrom(self, (byte*)vstr.buf, vstr.len, ip, &port, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - mp_obj_t tuple[2]; - if (ret == 0) { - tuple[0] = mp_const_empty_bytes; - } else { - vstr.len = ret; - tuple[0] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } - tuple[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); - return mp_obj_new_tuple(2, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom); - -// method socket.setsockopt(level, optname, value) -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - mod_network_socket_obj_t *self = args[0]; - - mp_int_t level = mp_obj_get_int(args[1]); - mp_int_t opt = mp_obj_get_int(args[2]); - - const void *optval; - mp_uint_t optlen; - mp_int_t val; - if (mp_obj_is_integer(args[3])) { - val = mp_obj_get_int_truncated(args[3]); - optval = &val; - optlen = sizeof(val); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); - optval = bufinfo.buf; - optlen = bufinfo.len; - } - - int _errno; - if (self->nic_type->setsockopt(self, level, opt, optval, optlen, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -// method socket.settimeout(value) -// timeout=0 means non-blocking -// timeout=None means blocking -// otherwise, timeout is in seconds -STATIC mp_obj_t socket_settimeout(mp_obj_t self_in, mp_obj_t timeout_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_ENOTCONN); - } - mp_uint_t timeout; - if (timeout_in == mp_const_none) { - timeout = -1; - } else { - #if MICROPY_PY_BUILTINS_FLOAT - timeout = 1000 * mp_obj_get_float(timeout_in); - #else - timeout = 1000 * mp_obj_get_int(timeout_in); - #endif - } - int _errno; - if (self->nic_type->settimeout(self, timeout, &_errno) != 0) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_settimeout_obj, socket_settimeout); - -// method socket.setblocking(flag) -STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t blocking) { - if (mp_obj_is_true(blocking)) { - return socket_settimeout(self_in, mp_const_none); - } else { - return socket_settimeout(self_in, MP_OBJ_NEW_SMALL_INT(0)); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, - { MP_ROM_QSTR(MP_QSTR_recvfrom), MP_ROM_PTR(&socket_recvfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - { MP_ROM_QSTR(MP_QSTR_settimeout), MP_ROM_PTR(&socket_settimeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -mp_uint_t socket_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - mod_network_socket_obj_t *self = self_in; - if (request == MP_STREAM_CLOSE) { - if (self->nic != MP_OBJ_NULL) { - self->nic_type->close(self); - self->nic = MP_OBJ_NULL; - } - return 0; - } - return self->nic_type->ioctl(self, request, arg, errcode); -} - -STATIC const mp_stream_p_t socket_stream_p = { - .ioctl = socket_ioctl, - .is_text = false, -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .make_new = socket_make_new, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_dict_t*)&socket_locals_dict, -}; - -/******************************************************************************/ -// usocket module - -// function usocket.getaddrinfo(host, port) -STATIC mp_obj_t mod_usocket_getaddrinfo(mp_obj_t host_in, mp_obj_t port_in) { - size_t hlen; - const char *host = mp_obj_str_get_data(host_in, &hlen); - mp_int_t port = mp_obj_get_int(port_in); - uint8_t out_ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - bool have_ip = false; - - if (hlen > 0) { - // check if host is already in IP form - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - netutils_parse_ipv4_addr(host_in, out_ip, NETUTILS_BIG); - have_ip = true; - nlr_pop(); - } else { - // swallow exception: host was not in IP form so need to do DNS lookup - } - } - - if (!have_ip) { - // find a NIC that can do a name lookup - for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { - mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; - mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); - if (nic_type->gethostbyname != NULL) { - int ret = nic_type->gethostbyname(nic, host, hlen, out_ip); - if (ret != 0) { - mp_raise_OSError(ret); - } - have_ip = true; - break; - } - } - } - - if (!have_ip) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "no available NIC")); - } - - mp_obj_tuple_t *tuple = mp_obj_new_tuple(5, NULL); - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(MOD_NETWORK_AF_INET); - tuple->items[1] = MP_OBJ_NEW_SMALL_INT(MOD_NETWORK_SOCK_STREAM); - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); - tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); - tuple->items[4] = netutils_format_inet_addr(out_ip, port, NETUTILS_BIG); - return mp_obj_new_list(1, (mp_obj_t*)&tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_usocket_getaddrinfo_obj, mod_usocket_getaddrinfo); - -STATIC const mp_rom_map_elem_t mp_module_usocket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&mod_usocket_getaddrinfo_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(MOD_NETWORK_AF_INET) }, - { MP_ROM_QSTR(MP_QSTR_AF_INET6), MP_ROM_INT(MOD_NETWORK_AF_INET6) }, - - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(MOD_NETWORK_SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(MOD_NETWORK_SOCK_DGRAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_RAW), MP_ROM_INT(MOD_NETWORK_SOCK_RAW) }, - - /* - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IP), MP_ROM_INT(MOD_NETWORK_IPPROTO_IP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_ICMP), MP_ROM_INT(MOD_NETWORK_IPPROTO_ICMP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IPV4), MP_ROM_INT(MOD_NETWORK_IPPROTO_IPV4) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(MOD_NETWORK_IPPROTO_TCP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_UDP), MP_ROM_INT(MOD_NETWORK_IPPROTO_UDP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IPV6), MP_ROM_INT(MOD_NETWORK_IPPROTO_IPV6) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_RAW), MP_ROM_INT(MOD_NETWORK_IPPROTO_RAW) }, - */ -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_usocket_globals, mp_module_usocket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_usocket_globals, -}; - -#endif // MICROPY_PY_USOCKET && !MICROPY_PY_LWIP diff --git a/ports/stm32/modutime.c b/ports/stm32/modutime.c deleted file mode 100644 index 6b5c841151..0000000000 --- a/ports/stm32/modutime.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/smallint.h" -#include "py/obj.h" -#include "lib/timeutils/timeutils.h" -#include "extmod/utime_mphal.h" -#include "systick.h" -#include "portmodules.h" -#include "rtc.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -/// \function localtime([secs]) -/// Convert a time expressed in seconds since Jan 1, 2000 into an 8-tuple which -/// contains: (year, month, mday, hour, minute, second, weekday, yearday) -/// If secs is not provided or None, then the current time from the RTC is used. -/// year includes the century (for example 2014) -/// month is 1-12 -/// mday is 1-31 -/// hour is 0-23 -/// minute is 0-59 -/// second is 0-59 -/// weekday is 0-6 for Mon-Sun. -/// yearday is 1-366 -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - if (n_args == 0 || args[0] == mp_const_none) { - // get current date and time - // note: need to call get time then get date to correctly access the registers - rtc_init_finalise(); - RTC_DateTypeDef date; - RTC_TimeTypeDef time; - HAL_RTC_GetTime(&RTCHandle, &time, RTC_FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, RTC_FORMAT_BIN); - mp_obj_t tuple[8] = { - mp_obj_new_int(2000 + date.Year), - mp_obj_new_int(date.Month), - mp_obj_new_int(date.Date), - mp_obj_new_int(time.Hours), - mp_obj_new_int(time.Minutes), - mp_obj_new_int(time.Seconds), - mp_obj_new_int(date.WeekDay - 1), - mp_obj_new_int(timeutils_year_day(2000 + date.Year, date.Month, date.Date)), - }; - return mp_obj_new_tuple(8, tuple); - } else { - mp_int_t seconds = mp_obj_get_int(args[0]); - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - - -/// \function mktime() -/// This is inverse function of localtime. It's argument is a full 8-tuple -/// which expresses a time as per localtime. It returns an integer which is -/// the number of seconds since Jan 1, 2000. -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - - size_t len; - mp_obj_t *elem; - - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "mktime needs a tuple of length 8 or 9 (%d given)", len)); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), - mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), mp_obj_get_int(elem[3]), - mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -/// \function time() -/// Returns the number of seconds, as an integer, since 1/1/2000. -STATIC mp_obj_t time_time(void) { - // get date and time - // note: need to call get time then get date to correctly access the registers - rtc_init_finalise(); - RTC_DateTypeDef date; - RTC_TimeTypeDef time; - HAL_RTC_GetTime(&RTCHandle, &time, RTC_FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, RTC_FORMAT_BIN); - return mp_obj_new_int(timeutils_seconds_since_2000(2000 + date.Year, date.Month, date.Date, time.Hours, time.Minutes, time.Seconds)); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t mp_module_utime = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/stm32/mpconfigboard_common.h b/ports/stm32/mpconfigboard_common.h deleted file mode 100644 index 2cc02b77cf..0000000000 --- a/ports/stm32/mpconfigboard_common.h +++ /dev/null @@ -1,218 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// Common settings and defaults for board configuration. -// The defaults here should be overridden in mpconfigboard.h. - -#include STM32_HAL_H - -/*****************************************************************************/ -// Feature settings with defaults - -// Whether to include the stm module, with peripheral register constants -#ifndef MICROPY_PY_STM -#define MICROPY_PY_STM (1) -#endif - -// Whether to include legacy functions and classes in the pyb module -#ifndef MICROPY_PY_PYB_LEGACY -#define MICROPY_PY_PYB_LEGACY (1) -#endif - -// Whether to enable storage on the internal flash of the MCU -#ifndef MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE -#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1) -#endif - -// Whether to enable the RTC, exposed as pyb.RTC -#ifndef MICROPY_HW_ENABLE_RTC -#define MICROPY_HW_ENABLE_RTC (0) -#endif - -// Whether to enable the hardware RNG peripheral, exposed as pyb.rng() -#ifndef MICROPY_HW_ENABLE_RNG -#define MICROPY_HW_ENABLE_RNG (0) -#endif - -// Whether to enable the ADC peripheral, exposed as pyb.ADC and pyb.ADCAll -#ifndef MICROPY_HW_ENABLE_ADC -#define MICROPY_HW_ENABLE_ADC (1) -#endif - -// Whether to enable the DAC peripheral, exposed as pyb.DAC -#ifndef MICROPY_HW_ENABLE_DAC -#define MICROPY_HW_ENABLE_DAC (0) -#endif - -// Whether to enable USB support -#ifndef MICROPY_HW_ENABLE_USB -#define MICROPY_HW_ENABLE_USB (0) -#endif - -// Whether to enable the PA0-PA3 servo driver, exposed as pyb.Servo -#ifndef MICROPY_HW_ENABLE_SERVO -#define MICROPY_HW_ENABLE_SERVO (0) -#endif - -// Whether to enable a USR switch, exposed as pyb.Switch -#ifndef MICROPY_HW_HAS_SWITCH -#define MICROPY_HW_HAS_SWITCH (0) -#endif - -// Whether to expose internal flash storage as pyb.Flash -#ifndef MICROPY_HW_HAS_FLASH -#define MICROPY_HW_HAS_FLASH (0) -#endif - -// Whether to enable the SD card interface, exposed as pyb.SDCard -#ifndef MICROPY_HW_HAS_SDCARD -#define MICROPY_HW_HAS_SDCARD (0) -#endif - -// Whether to enable the MMA7660 driver, exposed as pyb.Accel -#ifndef MICROPY_HW_HAS_MMA7660 -#define MICROPY_HW_HAS_MMA7660 (0) -#endif - -// Whether to enable the LCD32MK driver, exposed as pyb.LCD -#ifndef MICROPY_HW_HAS_LCD -#define MICROPY_HW_HAS_LCD (0) -#endif - -// The volume label used when creating the flash filesystem -#ifndef MICROPY_HW_FLASH_FS_LABEL -#define MICROPY_HW_FLASH_FS_LABEL "pybflash" -#endif - -/*****************************************************************************/ -// General configuration - -// Configuration for STM32F0 series -#if defined(STM32F0) - -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1ffff7ac) -#define PYB_EXTI_NUM_VECTORS (23) -#define MICROPY_HW_MAX_TIMER (17) -#define MICROPY_HW_MAX_UART (8) - -// Configuration for STM32F4 series -#elif defined(STM32F4) - -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1fff7a10) -#define PYB_EXTI_NUM_VECTORS (23) -#define MICROPY_HW_MAX_TIMER (14) -#ifdef UART8 -#define MICROPY_HW_MAX_UART (8) -#else -#define MICROPY_HW_MAX_UART (6) -#endif - -// Configuration for STM32F7 series -#elif defined(STM32F7) - -#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx) -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1ff07a10) -#else -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1ff0f420) -#endif - -#define PYB_EXTI_NUM_VECTORS (24) -#define MICROPY_HW_MAX_TIMER (17) -#define MICROPY_HW_MAX_UART (8) - -// Configuration for STM32H7 series -#elif defined(STM32H7) - -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1ff1e800) -#define PYB_EXTI_NUM_VECTORS (24) -#define MICROPY_HW_MAX_TIMER (17) -#define MICROPY_HW_MAX_UART (8) - -// Configuration for STM32L4 series -#elif defined(STM32L4) - -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1fff7590) -#define PYB_EXTI_NUM_VECTORS (23) -#define MICROPY_HW_MAX_TIMER (17) -#define MICROPY_HW_MAX_UART (6) - -#else -#error Unsupported MCU series -#endif - -// Configure HSE for bypass or oscillator -#if MICROPY_HW_CLK_USE_BYPASS -#define MICROPY_HW_CLK_HSE_STATE (RCC_HSE_BYPASS) -#else -#define MICROPY_HW_CLK_HSE_STATE (RCC_HSE_ON) -#endif - -#if MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE -// Provide block device macros if internal flash storage is enabled -#define MICROPY_HW_BDEV_IOCTL flash_bdev_ioctl -#define MICROPY_HW_BDEV_READBLOCK flash_bdev_readblock -#define MICROPY_HW_BDEV_WRITEBLOCK flash_bdev_writeblock -#endif - -// Enable the storage sub-system if a block device is defined -#if defined(MICROPY_HW_BDEV_IOCTL) -#define MICROPY_HW_ENABLE_STORAGE (1) -#else -#define MICROPY_HW_ENABLE_STORAGE (0) -#endif - -// Enable hardware I2C if there are any peripherals defined -#if defined(MICROPY_HW_I2C1_SCL) || defined(MICROPY_HW_I2C2_SCL) \ - || defined(MICROPY_HW_I2C3_SCL) || defined(MICROPY_HW_I2C4_SCL) -#define MICROPY_HW_ENABLE_HW_I2C (1) -#else -#define MICROPY_HW_ENABLE_HW_I2C (0) -#endif - -// Enable CAN if there are any peripherals defined -#if defined(MICROPY_HW_CAN1_TX) || defined(MICROPY_HW_CAN2_TX) -#define MICROPY_HW_ENABLE_CAN (1) -#else -#define MICROPY_HW_ENABLE_CAN (0) -#endif - -// Pin definition header file -#define MICROPY_PIN_DEFS_PORT_H "pin_defs_stm32.h" - -// D-cache clean/invalidate helpers -#if __DCACHE_PRESENT == 1 -#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) \ - (SCB_CleanInvalidateDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), \ - ((uint32_t)((uint8_t*)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f))) -#define MP_HAL_CLEAN_DCACHE(addr, size) \ - (SCB_CleanDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), \ - ((uint32_t)((uint8_t*)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f))) -#else -#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) -#define MP_HAL_CLEAN_DCACHE(addr, size) -#endif - -#define MICROPY_HW_USES_BOOTLOADER (MICROPY_HW_VTOR != 0x08000000) diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h deleted file mode 100644 index a038664e83..0000000000 --- a/ports/stm32/mpconfigport.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// Options to control how MicroPython is built for this port, -// overriding defaults in py/mpconfig.h. - -// board specific definitions -#include "mpconfigboard.h" -#include "mpconfigboard_common.h" - -// memory allocation policies -#define MICROPY_ALLOC_PATH_MAX (128) - -// emitters -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#ifndef MICROPY_EMIT_THUMB -#define MICROPY_EMIT_THUMB (1) -#endif -#ifndef MICROPY_EMIT_INLINE_THUMB -#define MICROPY_EMIT_INLINE_THUMB (1) -#endif - -// compiler configuration -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (1) -#define MICROPY_COMP_RETURN_IF_EXPR (1) - -// optimisations -#define MICROPY_OPT_COMPUTED_GOTO (1) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (0) -#define MICROPY_OPT_MPZ_BITWISE (1) - -// Python internal features -#define MICROPY_READER_VFS (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_EMACS_KEYS (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#ifndef MICROPY_FLOAT_IMPL // can be configured by each board via mpconfigboard.mk -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#endif -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_ENABLE_SCHEDULER (1) -#define MICROPY_SCHEDULER_DEPTH (8) -#define MICROPY_VFS (1) -#ifndef MICROPY_VFS_FAT -#define MICROPY_VFS_FAT (1) -#endif - -// control over Python builtins -#define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_DELATTR_SETATTR (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_CENTER (1) -#define MICROPY_PY_BUILTINS_STR_PARTITION (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_BUILTINS_ROUND_INT (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_COMPILE (1) -#define MICROPY_PY_BUILTINS_EXECFILE (1) -#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT stm32_help_text -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_COLLECTIONS_DEQUE (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) -#define MICROPY_PY_CMATH (1) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_IOBASE (1) -#define MICROPY_PY_IO_FILEIO (MICROPY_VFS_FAT) // because mp_type_fileio/textio point to fatfs impl -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_STDIO_BUFFER (1) -#ifndef MICROPY_PY_SYS_PLATFORM // let boards override it if they want -#define MICROPY_PY_SYS_PLATFORM "pyboard" -#endif -#define MICROPY_PY_UERRNO (1) -#ifndef MICROPY_PY_THREAD -#define MICROPY_PY_THREAD (0) -#endif - -// extended modules -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_URANDOM_EXTRA_FUNCS (1) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_OS_DUPTERM (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_PY_MACHINE_I2C (1) -#if MICROPY_HW_ENABLE_HW_I2C -#define MICROPY_PY_MACHINE_I2C_MAKE_NEW machine_hard_i2c_make_new -#endif -#define MICROPY_PY_MACHINE_SPI (1) -#define MICROPY_PY_MACHINE_SPI_MSB (SPI_FIRSTBIT_MSB) -#define MICROPY_PY_MACHINE_SPI_LSB (SPI_FIRSTBIT_LSB) -#define MICROPY_PY_MACHINE_SPI_MAKE_NEW machine_hard_spi_make_new -#define MICROPY_HW_SOFTSPI_MIN_DELAY (0) -#define MICROPY_HW_SOFTSPI_MAX_BAUDRATE (HAL_RCC_GetSysClockFreq() / 48) -#define MICROPY_PY_FRAMEBUF (1) -#ifndef MICROPY_PY_USOCKET -#define MICROPY_PY_USOCKET (1) -#endif -#ifndef MICROPY_PY_NETWORK -#define MICROPY_PY_NETWORK (1) -#endif - -// fatfs configuration used in ffconf.h -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define MICROPY_FATFS_USE_LABEL (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_MULTI_PARTITION (1) - -// TODO these should be generic, not bound to fatfs -#define mp_type_fileio mp_type_vfs_fat_fileio -#define mp_type_textio mp_type_vfs_fat_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t machine_module; -extern const struct _mp_obj_module_t pyb_module; -extern const struct _mp_obj_module_t stm_module; -extern const struct _mp_obj_module_t mp_module_ubinascii; -extern const struct _mp_obj_module_t mp_module_ure; -extern const struct _mp_obj_module_t mp_module_uzlib; -extern const struct _mp_obj_module_t mp_module_ujson; -extern const struct _mp_obj_module_t mp_module_uheapq; -extern const struct _mp_obj_module_t mp_module_uhashlib; -extern const struct _mp_obj_module_t mp_module_uos; -extern const struct _mp_obj_module_t mp_module_utime; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_network; -extern const struct _mp_obj_module_t mp_module_onewire; - -#if MICROPY_PY_STM -#define STM_BUILTIN_MODULE { MP_ROM_QSTR(MP_QSTR_stm), MP_ROM_PTR(&stm_module) }, -#else -#define STM_BUILTIN_MODULE -#endif - -#if MICROPY_PY_USOCKET && MICROPY_PY_LWIP -// usocket implementation provided by lwIP -#define SOCKET_BUILTIN_MODULE { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_lwip) }, -#define SOCKET_BUILTIN_MODULE_WEAK_LINKS { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_lwip) }, -#define SOCKET_POLL extern void pyb_lwip_poll(void); pyb_lwip_poll(); -#elif MICROPY_PY_USOCKET -// usocket implementation provided by skeleton wrapper -#define SOCKET_BUILTIN_MODULE { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) }, -#define SOCKET_BUILTIN_MODULE_WEAK_LINKS { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_usocket) }, -#define SOCKET_POLL -#else -// no usocket module -#define SOCKET_BUILTIN_MODULE -#define SOCKET_BUILTIN_MODULE_WEAK_LINKS -#define SOCKET_POLL -#endif - -#if MICROPY_PY_NETWORK -#define NETWORK_BUILTIN_MODULE { MP_ROM_QSTR(MP_QSTR_network), MP_ROM_PTR(&mp_module_network) }, -#else -#define NETWORK_BUILTIN_MODULE -#endif - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - STM_BUILTIN_MODULE \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_utime) }, \ - SOCKET_BUILTIN_MODULE \ - NETWORK_BUILTIN_MODULE \ - { MP_ROM_QSTR(MP_QSTR__onewire), MP_ROM_PTR(&mp_module_onewire) }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, \ - { MP_ROM_QSTR(MP_QSTR_collections), MP_ROM_PTR(&mp_module_collections) }, \ - { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, \ - { MP_ROM_QSTR(MP_QSTR_zlib), MP_ROM_PTR(&mp_module_uzlib) }, \ - { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, \ - { MP_ROM_QSTR(MP_QSTR_heapq), MP_ROM_PTR(&mp_module_uheapq) }, \ - { MP_ROM_QSTR(MP_QSTR_hashlib), MP_ROM_PTR(&mp_module_uhashlib) }, \ - { MP_ROM_QSTR(MP_QSTR_io), MP_ROM_PTR(&mp_module_io) }, \ - { MP_ROM_QSTR(MP_QSTR_os), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_random), MP_ROM_PTR(&mp_module_urandom) }, \ - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mp_module_utime) }, \ - { MP_ROM_QSTR(MP_QSTR_select), MP_ROM_PTR(&mp_module_uselect) }, \ - SOCKET_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_struct), MP_ROM_PTR(&mp_module_ustruct) }, \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - STM_BUILTIN_MODULE \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - \ - mp_obj_t pyb_hid_report_desc; \ - \ - mp_obj_t pyb_config_main; \ - \ - mp_obj_t pyb_switch_callback; \ - \ - mp_obj_t pin_class_mapper; \ - mp_obj_t pin_class_map_dict; \ - \ - mp_obj_t pyb_extint_callback[PYB_EXTI_NUM_VECTORS]; \ - \ - /* pointers to all Timer objects (if they have been created) */ \ - struct _pyb_timer_obj_t *pyb_timer_obj_all[MICROPY_HW_MAX_TIMER]; \ - \ - /* stdio is repeated on this UART object if it's not null */ \ - struct _pyb_uart_obj_t *pyb_stdio_uart; \ - \ - /* pointers to all UART objects (if they have been created) */ \ - struct _pyb_uart_obj_t *pyb_uart_obj_all[MICROPY_HW_MAX_UART]; \ - \ - /* pointers to all CAN objects (if they have been created) */ \ - struct _pyb_can_obj_t *pyb_can_obj_all[2]; \ - \ - /* list of registered NICs */ \ - mp_obj_list_t mod_network_nic_list; \ - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// We have inlined IRQ functions for efficiency (they are generally -// 1 machine instruction). -// -// Note on IRQ state: you should not need to know the specific -// value of the state variable, but rather just pass the return -// value from disable_irq back to enable_irq. If you really need -// to know the machine-specific values, see irq.h. - -static inline void enable_irq(mp_uint_t state) { - __set_PRIMASK(state); -} - -static inline mp_uint_t disable_irq(void) { - mp_uint_t state = __get_PRIMASK(); - __disable_irq(); - return state; -} - -#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq() -#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state) - -#if MICROPY_PY_THREAD -#define MICROPY_EVENT_POLL_HOOK \ - do { \ - extern void mp_handle_pending(void); \ - mp_handle_pending(); \ - SOCKET_POLL \ - if (pyb_thread_enabled) { \ - MP_THREAD_GIL_EXIT(); \ - pyb_thread_yield(); \ - MP_THREAD_GIL_ENTER(); \ - } else { \ - __WFI(); \ - } \ - } while (0); - -#define MICROPY_THREAD_YIELD() pyb_thread_yield() -#else -#define MICROPY_EVENT_POLL_HOOK \ - do { \ - extern void mp_handle_pending(void); \ - mp_handle_pending(); \ - SOCKET_POLL \ - __WFI(); \ - } while (0); - -#define MICROPY_THREAD_YIELD() -#endif - -// We need an implementation of the log2 function which is not a macro -#define MP_NEED_LOG2 (1) - -// There is no classical C heap in bare-metal ports, only Python -// garbage-collected heap. For completeness, emulate C heap via -// GC heap. Note that MicroPython core never uses malloc() and friends, -// so these defines are mostly to help extension module writers. -#define malloc(n) m_malloc(n) -#define free(p) m_free(p) -#define realloc(p, n) m_realloc(p, n) - -// We need to provide a declaration/definition of alloca() -#include diff --git a/ports/stm32/mpconfigport.mk b/ports/stm32/mpconfigport.mk deleted file mode 100644 index e708de6c1b..0000000000 --- a/ports/stm32/mpconfigport.mk +++ /dev/null @@ -1,10 +0,0 @@ -# Enable/disable extra modules - -# wiznet5k module for ethernet support; valid values are: -# 0 : no Wiznet support -# 5200 : support for W5200 module -# 5500 : support for W5500 module -MICROPY_PY_WIZNET5K ?= 0 - -# cc3k module for wifi support -MICROPY_PY_CC3K ?= 0 diff --git a/ports/stm32/mphalport.c b/ports/stm32/mphalport.c deleted file mode 100644 index a2f8e412ee..0000000000 --- a/ports/stm32/mphalport.c +++ /dev/null @@ -1,164 +0,0 @@ -#include - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "extmod/misc.h" -#include "usb.h" -#include "uart.h" - -// this table converts from HAL_StatusTypeDef to POSIX errno -const byte mp_hal_status_to_errno_table[4] = { - [HAL_OK] = 0, - [HAL_ERROR] = MP_EIO, - [HAL_BUSY] = MP_EBUSY, - [HAL_TIMEOUT] = MP_ETIMEDOUT, -}; - -NORETURN void mp_hal_raise(HAL_StatusTypeDef status) { - mp_raise_OSError(mp_hal_status_to_errno_table[status]); -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { -#if 0 -#ifdef USE_HOST_MODE - pyb_usb_host_process(); - int c = pyb_usb_host_get_keyboard(); - if (c != 0) { - return c; - } -#endif -#endif - - #if MICROPY_HW_ENABLE_USB - byte c; - if (usb_vcp_recv_byte(&c) != 0) { - return c; - } - #endif - if (MP_STATE_PORT(pyb_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(pyb_stdio_uart))) { - return uart_rx_char(MP_STATE_PORT(pyb_stdio_uart)); - } - int dupterm_c = mp_uos_dupterm_rx_chr(); - if (dupterm_c >= 0) { - return dupterm_c; - } - MICROPY_EVENT_POLL_HOOK - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len); - } -#if 0 && defined(USE_HOST_MODE) && MICROPY_HW_HAS_LCD - lcd_print_strn(str, len); -#endif - #if MICROPY_HW_ENABLE_USB - if (usb_vcp_is_enabled()) { - usb_vcp_send_strn(str, len); - } - #endif - mp_uos_dupterm_tx_strn(str, len); -} - -// Efficiently convert "\n" to "\r\n" -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - const char *last = str; - while (len--) { - if (*str == '\n') { - if (str > last) { - mp_hal_stdout_tx_strn(last, str - last); - } - mp_hal_stdout_tx_strn("\r\n", 2); - ++str; - last = str; - } else { - ++str; - } - } - if (str > last) { - mp_hal_stdout_tx_strn(last, str - last); - } -} - -#if __CORTEX_M >= 0x03 -void mp_hal_ticks_cpu_enable(void) { - if (!(DWT->CTRL & DWT_CTRL_CYCCNTENA_Msk)) { - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - #if defined(__CORTEX_M) && __CORTEX_M == 7 - // on Cortex-M7 we must unlock the DWT before writing to its registers - DWT->LAR = 0xc5acce55; - #endif - DWT->CYCCNT = 0; - DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; - } -} -#endif - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio) { - #if defined(STM32L476xx) || defined(STM32L496xx) - if (gpio == GPIOG) { - // Port G pins 2 thru 15 are powered using VddIO2 on these MCUs. - HAL_PWREx_EnableVddIO2(); - } - #endif - - // This logic assumes that all the GPIOx_EN bits are adjacent and ordered in one register - - #if defined(STM32F0) - #define AHBxENR AHBENR - #define AHBxENR_GPIOAEN_Pos RCC_AHBENR_GPIOAEN_Pos - #elif defined(STM32F4) || defined(STM32F7) - #define AHBxENR AHB1ENR - #define AHBxENR_GPIOAEN_Pos RCC_AHB1ENR_GPIOAEN_Pos - #elif defined(STM32H7) - #define AHBxENR AHB4ENR - #define AHBxENR_GPIOAEN_Pos RCC_AHB4ENR_GPIOAEN_Pos - #elif defined(STM32L4) - #define AHBxENR AHB2ENR - #define AHBxENR_GPIOAEN_Pos RCC_AHB2ENR_GPIOAEN_Pos - #endif - - uint32_t gpio_idx = ((uint32_t)gpio - GPIOA_BASE) / (GPIOB_BASE - GPIOA_BASE); - RCC->AHBxENR |= 1 << (AHBxENR_GPIOAEN_Pos + gpio_idx); - volatile uint32_t tmp = RCC->AHBxENR; // Delay after enabling clock - (void)tmp; -} - -void mp_hal_pin_config(mp_hal_pin_obj_t pin_obj, uint32_t mode, uint32_t pull, uint32_t alt) { - GPIO_TypeDef *gpio = pin_obj->gpio; - uint32_t pin = pin_obj->pin; - mp_hal_gpio_clock_enable(gpio); - gpio->MODER = (gpio->MODER & ~(3 << (2 * pin))) | ((mode & 3) << (2 * pin)); - #if defined(GPIO_ASCR_ASC0) - // The L4 has a special analog switch to connect the GPIO to the ADC - gpio->OTYPER = (gpio->OTYPER & ~(1 << pin)) | (((mode >> 2) & 1) << pin); - gpio->ASCR = (gpio->ASCR & ~(1 << pin)) | ((mode >> 3) & 1) << pin; - #else - gpio->OTYPER = (gpio->OTYPER & ~(1 << pin)) | ((mode >> 2) << pin); - #endif - gpio->OSPEEDR = (gpio->OSPEEDR & ~(3 << (2 * pin))) | (2 << (2 * pin)); // full speed - gpio->PUPDR = (gpio->PUPDR & ~(3 << (2 * pin))) | (pull << (2 * pin)); - gpio->AFR[pin >> 3] = (gpio->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); -} - -bool mp_hal_pin_config_alt(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint8_t fn, uint8_t unit) { - const pin_af_obj_t *af = pin_find_af(pin, fn, unit); - if (af == NULL) { - return false; - } - mp_hal_pin_config(pin, mode, pull, af->idx); - return true; -} - -void mp_hal_pin_config_speed(mp_hal_pin_obj_t pin_obj, uint32_t speed) { - GPIO_TypeDef *gpio = pin_obj->gpio; - uint32_t pin = pin_obj->pin; - gpio->OSPEEDR = (gpio->OSPEEDR & ~(3 << (2 * pin))) | (speed << (2 * pin)); -} diff --git a/ports/stm32/mphalport.h b/ports/stm32/mphalport.h deleted file mode 100644 index 72413c04c7..0000000000 --- a/ports/stm32/mphalport.h +++ /dev/null @@ -1,77 +0,0 @@ -// We use the ST Cube HAL library for most hardware peripherals -#include STM32_HAL_H -#include "pin.h" - -extern const unsigned char mp_hal_status_to_errno_table[4]; - -NORETURN void mp_hal_raise(HAL_StatusTypeDef status); -void mp_hal_set_interrupt_char(int c); // -1 to disable - -// timing functions - -#include "irq.h" - -#if __CORTEX_M == 0 -// Don't have raise_irq_pri on Cortex-M0 so keep IRQs enabled to have SysTick timing -#define mp_hal_quiet_timing_enter() (1) -#define mp_hal_quiet_timing_exit(irq_state) (void)(irq_state) -#else -#define mp_hal_quiet_timing_enter() raise_irq_pri(1) -#define mp_hal_quiet_timing_exit(irq_state) restore_irq_pri(irq_state) -#endif -#define mp_hal_delay_us_fast(us) mp_hal_delay_us(us) - -void mp_hal_ticks_cpu_enable(void); -static inline mp_uint_t mp_hal_ticks_cpu(void) { - #if __CORTEX_M == 0 - return 0; - #else - if (!(DWT->CTRL & DWT_CTRL_CYCCNTENA_Msk)) { - mp_hal_ticks_cpu_enable(); - } - return DWT->CYCCNT; - #endif -} - -// C-level pin HAL - -#include "pin.h" - -#define MP_HAL_PIN_FMT "%q" -#define MP_HAL_PIN_MODE_INPUT (0) -#define MP_HAL_PIN_MODE_OUTPUT (1) -#define MP_HAL_PIN_MODE_ALT (2) -#define MP_HAL_PIN_MODE_ANALOG (3) -#if defined(GPIO_ASCR_ASC0) -#define MP_HAL_PIN_MODE_ADC (11) -#else -#define MP_HAL_PIN_MODE_ADC (3) -#endif -#define MP_HAL_PIN_MODE_OPEN_DRAIN (5) -#define MP_HAL_PIN_MODE_ALT_OPEN_DRAIN (6) -#define MP_HAL_PIN_PULL_NONE (GPIO_NOPULL) -#define MP_HAL_PIN_PULL_UP (GPIO_PULLUP) -#define MP_HAL_PIN_PULL_DOWN (GPIO_PULLDOWN) - -#define mp_hal_pin_obj_t const pin_obj_t* -#define mp_hal_get_pin_obj(o) pin_find(o) -#define mp_hal_pin_name(p) ((p)->name) -#define mp_hal_pin_input(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_output(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_open_drain(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, 0) -#if defined(STM32H7) -#define mp_hal_pin_high(p) (((p)->gpio->BSRRL) = (p)->pin_mask) -#define mp_hal_pin_low(p) (((p)->gpio->BSRRH) = (p)->pin_mask) -#else -#define mp_hal_pin_high(p) (((p)->gpio->BSRR) = (p)->pin_mask) -#define mp_hal_pin_low(p) (((p)->gpio->BSRR) = ((p)->pin_mask << 16)) -#endif -#define mp_hal_pin_od_low(p) mp_hal_pin_low(p) -#define mp_hal_pin_od_high(p) mp_hal_pin_high(p) -#define mp_hal_pin_read(p) (((p)->gpio->IDR >> (p)->pin) & 1) -#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio); -void mp_hal_pin_config(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint32_t alt); -bool mp_hal_pin_config_alt(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint8_t fn, uint8_t unit); -void mp_hal_pin_config_speed(mp_hal_pin_obj_t pin_obj, uint32_t speed); diff --git a/ports/stm32/mpthreadport.c b/ports/stm32/mpthreadport.c deleted file mode 100644 index 11653b24cf..0000000000 --- a/ports/stm32/mpthreadport.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" - -#if MICROPY_PY_THREAD - -// the mutex controls access to the linked list -STATIC mp_thread_mutex_t thread_mutex; - -void mp_thread_init(void) { - mp_thread_mutex_init(&thread_mutex); - mp_thread_set_state(&mp_state_ctx.thread); -} - -void mp_thread_gc_others(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (pyb_thread_t *th = pyb_thread_all; th != NULL; th = th->all_next) { - gc_collect_root((void**)&th, 1); - gc_collect_root(&th->arg, 1); - gc_collect_root(&th->stack, 1); - if (th != pyb_thread_cur) { - gc_collect_root(th->stack, th->stack_len); - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -void mp_thread_create(void *(*entry)(void*), void *arg, size_t *stack_size) { - if (*stack_size == 0) { - *stack_size = 4096; // default stack size - } else if (*stack_size < 2048) { - *stack_size = 2048; // minimum stack size - } - - // round stack size to a multiple of the word size - size_t stack_len = *stack_size / sizeof(uint32_t); - *stack_size = stack_len * sizeof(uint32_t); - - // allocate stack and linked-list node (must be done outside thread_mutex lock) - uint32_t *stack = m_new(uint32_t, stack_len); - pyb_thread_t *th = m_new_obj(pyb_thread_t); - - mp_thread_mutex_lock(&thread_mutex, 1); - - // create thread - uint32_t id = pyb_thread_new(th, stack, stack_len, entry, arg); - if (id == 0) { - mp_thread_mutex_unlock(&thread_mutex); - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "can't create thread")); - } - - mp_thread_mutex_unlock(&thread_mutex); - - // adjust stack_size to provide room to recover from hitting the limit - *stack_size -= 1024; -} - -void mp_thread_start(void) { -} - -void mp_thread_finish(void) { -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/stm32/mpthreadport.h b/ports/stm32/mpthreadport.h deleted file mode 100644 index 8e2372dcb4..0000000000 --- a/ports/stm32/mpthreadport.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpthread.h" -#include "pybthread.h" - -typedef pyb_mutex_t mp_thread_mutex_t; - -void mp_thread_init(void); -void mp_thread_gc_others(void); - -static inline void mp_thread_set_state(void *state) { - pyb_thread_set_local(state); -} - -static inline struct _mp_state_thread_t *mp_thread_get_state(void) { - return pyb_thread_get_local(); -} - -static inline void mp_thread_mutex_init(mp_thread_mutex_t *m) { - pyb_mutex_init(m); -} - -static inline int mp_thread_mutex_lock(mp_thread_mutex_t *m, int wait) { - return pyb_mutex_lock(m, wait); -} - -static inline void mp_thread_mutex_unlock(mp_thread_mutex_t *m) { - pyb_mutex_unlock(m); -} diff --git a/ports/stm32/network_wiznet5k.c b/ports/stm32/network_wiznet5k.c deleted file mode 100644 index 9db42b7874..0000000000 --- a/ports/stm32/network_wiznet5k.c +++ /dev/null @@ -1,417 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "py/runtime.h" -#include "py/mphal.h" -#include "spi.h" -#include "modnetwork.h" - -#if MICROPY_PY_WIZNET5K && MICROPY_PY_LWIP - -#include "drivers/wiznet5k/ethernet/socket.h" -#include "lwip/err.h" -#include "lwip/dns.h" -#include "lwip/dhcp.h" -#include "netif/etharp.h" - -/*******************************************************************************/ -// Wiznet5k Ethernet driver in MACRAW mode - -typedef struct _wiznet5k_obj_t { - mod_network_nic_type_t base; - mp_uint_t cris_state; - const spi_t *spi; - mp_hal_pin_obj_t cs; - mp_hal_pin_obj_t rst; - uint8_t eth_frame[1514]; - struct netif netif; - struct dhcp dhcp_struct; -} wiznet5k_obj_t; - -// Global object holding the Wiznet5k state -STATIC wiznet5k_obj_t wiznet5k_obj; - -STATIC void wiznet5k_lwip_init(wiznet5k_obj_t *self); -STATIC void wiznet5k_lwip_poll(void *self_in, struct netif *netif); - -STATIC void wiz_cris_enter(void) { - wiznet5k_obj.cris_state = MICROPY_BEGIN_ATOMIC_SECTION(); -} - -STATIC void wiz_cris_exit(void) { - MICROPY_END_ATOMIC_SECTION(wiznet5k_obj.cris_state); -} - -STATIC void wiz_cs_select(void) { - mp_hal_pin_low(wiznet5k_obj.cs); -} - -STATIC void wiz_cs_deselect(void) { - mp_hal_pin_high(wiznet5k_obj.cs); -} - -STATIC void wiz_spi_read(uint8_t *buf, uint32_t len) { - HAL_StatusTypeDef status = HAL_SPI_Receive(wiznet5k_obj.spi->spi, buf, len, 5000); - (void)status; -} - -STATIC void wiz_spi_write(const uint8_t *buf, uint32_t len) { - HAL_StatusTypeDef status = HAL_SPI_Transmit(wiznet5k_obj.spi->spi, (uint8_t*)buf, len, 5000); - (void)status; -} - -STATIC void wiznet5k_init(void) { - // SPI configuration - SPI_InitTypeDef *init = &wiznet5k_obj.spi->spi->Init; - init->Mode = SPI_MODE_MASTER; - init->Direction = SPI_DIRECTION_2LINES; - init->DataSize = SPI_DATASIZE_8BIT; - init->CLKPolarity = SPI_POLARITY_LOW; // clock is low when idle - init->CLKPhase = SPI_PHASE_1EDGE; // data latched on first edge, which is rising edge for low-idle - init->NSS = SPI_NSS_SOFT; - init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; // clock freq = f_PCLK / this_prescale_value; Wiz820i can do up to 80MHz - init->FirstBit = SPI_FIRSTBIT_MSB; - init->TIMode = SPI_TIMODE_DISABLED; - init->CRCCalculation = SPI_CRCCALCULATION_DISABLED; - init->CRCPolynomial = 7; // unused - spi_init(wiznet5k_obj.spi, false); - - mp_hal_pin_output(wiznet5k_obj.cs); - mp_hal_pin_output(wiznet5k_obj.rst); - - // Reset the chip - mp_hal_pin_low(wiznet5k_obj.rst); - mp_hal_delay_ms(1); // datasheet says 2us - mp_hal_pin_high(wiznet5k_obj.rst); - mp_hal_delay_ms(150); // datasheet says 150ms - - // Set physical interface callbacks - reg_wizchip_cris_cbfunc(wiz_cris_enter, wiz_cris_exit); - reg_wizchip_cs_cbfunc(wiz_cs_select, wiz_cs_deselect); - reg_wizchip_spi_cbfunc(wiz_spi_read, wiz_spi_write); - - // Configure 16k buffers for fast MACRAW - uint8_t sn_size[16] = {16, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0}; - ctlwizchip(CW_INIT_WIZCHIP, sn_size); - - // Seems we need a small delay after init - mp_hal_delay_ms(250); - - // Hook the Wiznet into lwIP - wiznet5k_lwip_init(&wiznet5k_obj); -} - -STATIC void wiznet5k_deinit(void) { - for (struct netif *netif = netif_list; netif != NULL; netif = netif->next) { - if (netif == &wiznet5k_obj.netif) { - netif_remove(netif); - netif->flags = 0; - break; - } - } -} - -STATIC void wiznet5k_get_mac_address(wiznet5k_obj_t *self, uint8_t mac[6]) { - (void)self; - getSHAR(mac); -} - -STATIC void wiznet5k_send_ethernet(wiznet5k_obj_t *self, size_t len, const uint8_t *buf) { - uint8_t ip[4] = {1, 1, 1, 1}; // dummy - int ret = WIZCHIP_EXPORT(sendto)(0, (byte*)buf, len, ip, 11); // dummy port - if (ret != len) { - printf("wiznet5k_send_ethernet: fatal error %d\n", ret); - netif_set_link_down(&self->netif); - netif_set_down(&self->netif); - } -} - -// Stores the frame in self->eth_frame and returns number of bytes in the frame, 0 for no frame -STATIC uint16_t wiznet5k_recv_ethernet(wiznet5k_obj_t *self) { - uint16_t len = getSn_RX_RSR(0); - if (len == 0) { - return 0; - } - - byte ip[4]; - uint16_t port; - int ret = WIZCHIP_EXPORT(recvfrom)(0, self->eth_frame, 1514, ip, &port); - if (ret <= 0) { - printf("wiznet5k_lwip_poll: fatal error len=%u ret=%d\n", len, ret); - netif_set_link_down(&self->netif); - netif_set_down(&self->netif); - return 0; - } - - return ret; -} - -/*******************************************************************************/ -// Wiznet5k lwIP interface - -STATIC err_t wiznet5k_netif_output(struct netif *netif, struct pbuf *p) { - wiznet5k_obj_t *self = netif->state; - pbuf_copy_partial(p, self->eth_frame, p->tot_len, 0); - wiznet5k_send_ethernet(self, p->tot_len, self->eth_frame); - return ERR_OK; -} - -STATIC err_t wiznet5k_netif_init(struct netif *netif) { - netif->linkoutput = wiznet5k_netif_output; - netif->output = etharp_output; - netif->mtu = 1500; - netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP; - wiznet5k_get_mac_address(netif->state, netif->hwaddr); - netif->hwaddr_len = sizeof(netif->hwaddr); - int ret = WIZCHIP_EXPORT(socket)(0, Sn_MR_MACRAW, 0, 0); - if (ret != 0) { - printf("WIZNET fatal error in netifinit: %d\n", ret); - return ERR_IF; - } - - // Enable MAC filtering so we only get frames destined for us, to reduce load on lwIP - setSn_MR(0, getSn_MR(0) | Sn_MR_MFEN); - - return ERR_OK; -} - -STATIC void wiznet5k_lwip_init(wiznet5k_obj_t *self) { - ip_addr_t ipconfig[4]; - ipconfig[0].addr = 0; - ipconfig[1].addr = 0; - ipconfig[2].addr = 0; - ipconfig[3].addr = 0; - netif_add(&self->netif, &ipconfig[0], &ipconfig[1], &ipconfig[2], self, wiznet5k_netif_init, ethernet_input); - self->netif.name[0] = 'e'; - self->netif.name[1] = '0'; - netif_set_default(&self->netif); - dns_setserver(0, &ipconfig[3]); - dhcp_set_struct(&self->netif, &self->dhcp_struct); - // Setting NETIF_FLAG_UP then clearing it is a workaround for dhcp_start and the - // LWIP_DHCP_CHECK_LINK_UP option, so that the DHCP client schedules itself to - // automatically start when the interface later goes up. - self->netif.flags |= NETIF_FLAG_UP; - dhcp_start(&self->netif); - self->netif.flags &= ~NETIF_FLAG_UP; -} - -STATIC void wiznet5k_lwip_poll(void *self_in, struct netif *netif) { - wiznet5k_obj_t *self = self_in; - uint16_t len; - while ((len = wiznet5k_recv_ethernet(self)) > 0) { - struct pbuf *p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); - if (p != NULL) { - pbuf_take(p, self->eth_frame, len); - if (self->netif.input(p, &self->netif) != ERR_OK) { - pbuf_free(p); - } - } - } -} - -/*******************************************************************************/ -// MicroPython bindings - -// WIZNET5K([spi, pin_cs, pin_rst]) -STATIC mp_obj_t wiznet5k_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 3, 3, false); - - const spi_t *spi = spi_from_mp_obj(args[0]); - mp_hal_pin_obj_t cs = pin_find(args[1]); - mp_hal_pin_obj_t rst = pin_find(args[2]); - - // Access the existing object, if it has been constructed with the same hardware interface - if (wiznet5k_obj.base.base.type == &mod_network_nic_type_wiznet5k) { - if (!(wiznet5k_obj.spi == spi && wiznet5k_obj.cs == cs && wiznet5k_obj.rst == rst - && wiznet5k_obj.netif.flags != 0)) { - wiznet5k_deinit(); - } - } - - // Init the wiznet5k object - wiznet5k_obj.base.base.type = &mod_network_nic_type_wiznet5k; - wiznet5k_obj.base.poll_callback = wiznet5k_lwip_poll; - wiznet5k_obj.cris_state = 0; - wiznet5k_obj.spi = spi; - wiznet5k_obj.cs = cs; - wiznet5k_obj.rst = rst; - - // Return wiznet5k object - return MP_OBJ_FROM_PTR(&wiznet5k_obj); -} - -STATIC mp_obj_t wiznet5k_regs(mp_obj_t self_in) { - (void)self_in; - printf("Wiz CREG:"); - for (int i = 0; i < 0x50; ++i) { - if (i % 16 == 0) { - printf("\n %04x:", i); - } - #if MICROPY_PY_WIZNET5K == 5200 - uint32_t reg = i; - #else - uint32_t reg = _W5500_IO_BASE_ | i << 8; - #endif - printf(" %02x", WIZCHIP_READ(reg)); - } - for (int sn = 0; sn < 4; ++sn) { - printf("\nWiz SREG[%d]:", sn); - for (int i = 0; i < 0x30; ++i) { - if (i % 16 == 0) { - printf("\n %04x:", i); - } - #if MICROPY_PY_WIZNET5K == 5200 - uint32_t reg = WIZCHIP_SREG_ADDR(sn, i); - #else - uint32_t reg = _W5500_IO_BASE_ | i << 8 | WIZCHIP_SREG_BLOCK(sn) << 3; - #endif - printf(" %02x", WIZCHIP_READ(reg)); - } - } - printf("\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_regs_obj, wiznet5k_regs); - -STATIC mp_obj_t wiznet5k_isconnected(mp_obj_t self_in) { - wiznet5k_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_bool( - wizphy_getphylink() == PHY_LINK_ON - && (self->netif.flags & NETIF_FLAG_UP) - && self->netif.ip_addr.addr != 0 - ); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_isconnected_obj, wiznet5k_isconnected); - -STATIC mp_obj_t wiznet5k_active(size_t n_args, const mp_obj_t *args) { - wiznet5k_obj_t *self = MP_OBJ_TO_PTR(args[0]); - if (n_args == 1) { - return mp_obj_new_bool(self->netif.flags & NETIF_FLAG_UP); - } else { - if (mp_obj_is_true(args[1])) { - if (!(self->netif.flags & NETIF_FLAG_UP)) { - wiznet5k_init(); - netif_set_link_up(&self->netif); - netif_set_up(&self->netif); - } - } else { - if (self->netif.flags & NETIF_FLAG_UP) { - netif_set_down(&self->netif); - netif_set_link_down(&self->netif); - wiznet5k_deinit(); - } - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wiznet5k_active_obj, 1, 2, wiznet5k_active); - -STATIC mp_obj_t wiznet5k_ifconfig(size_t n_args, const mp_obj_t *args) { - wiznet5k_obj_t *self = MP_OBJ_TO_PTR(args[0]); - return mod_network_nic_ifconfig(&self->netif, n_args - 1, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wiznet5k_ifconfig_obj, 1, 2, wiznet5k_ifconfig); - -STATIC mp_obj_t wiznet5k_status(size_t n_args, const mp_obj_t *args) { - wiznet5k_obj_t *self = MP_OBJ_TO_PTR(args[0]); - (void)self; - - if (n_args == 1) { - // No arguments: return link status - if (self->netif.flags && wizphy_getphylink() == PHY_LINK_ON) { - if ((self->netif.flags & NETIF_FLAG_UP) && self->netif.ip_addr.addr != 0) { - return MP_OBJ_NEW_SMALL_INT(2); - } else { - return MP_OBJ_NEW_SMALL_INT(1); - } - } else { - return MP_OBJ_NEW_SMALL_INT(0); - } - } - - mp_raise_ValueError("unknown config param"); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wiznet5k_status_obj, 1, 2, wiznet5k_status); - -STATIC mp_obj_t wiznet5k_config(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - wiznet5k_obj_t *self = MP_OBJ_TO_PTR(args[0]); - - if (kwargs->used == 0) { - // Get config value - if (n_args != 2) { - mp_raise_TypeError("must query one param"); - } - - switch (mp_obj_str_get_qstr(args[1])) { - case MP_QSTR_mac: { - uint8_t buf[6]; - wiznet5k_get_mac_address(self, buf); - return mp_obj_new_bytes(buf, 6); - } - default: - mp_raise_ValueError("unknown config param"); - } - } else { - // Set config value(s) - if (n_args != 1) { - mp_raise_TypeError("can't specify pos and kw args"); - } - mp_raise_ValueError("unknown config param"); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wiznet5k_config_obj, 1, wiznet5k_config); - -STATIC mp_obj_t send_ethernet_wrapper(mp_obj_t self_in, mp_obj_t buf_in) { - wiznet5k_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_buffer_info_t buf; - mp_get_buffer_raise(buf_in, &buf, MP_BUFFER_READ); - wiznet5k_send_ethernet(self, buf.len, buf.buf); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(send_ethernet_obj, send_ethernet_wrapper); - -STATIC const mp_rom_map_elem_t wiznet5k_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&wiznet5k_regs_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&wiznet5k_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&wiznet5k_active_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&wiznet5k_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&wiznet5k_status_obj) }, - { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&wiznet5k_config_obj) }, - - { MP_ROM_QSTR(MP_QSTR_send_ethernet), MP_ROM_PTR(&send_ethernet_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(wiznet5k_locals_dict, wiznet5k_locals_dict_table); - -const mp_obj_type_t mod_network_nic_type_wiznet5k = { - { &mp_type_type }, - .name = MP_QSTR_WIZNET5K, - .make_new = wiznet5k_make_new, - .locals_dict = (mp_obj_dict_t*)&wiznet5k_locals_dict, -}; - -#endif // MICROPY_PY_WIZNET5K && MICROPY_PY_LWIP diff --git a/ports/stm32/pendsv.c b/ports/stm32/pendsv.c deleted file mode 100644 index b5fe42f70d..0000000000 --- a/ports/stm32/pendsv.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "lib/utils/interrupt_char.h" -#include "pendsv.h" -#include "irq.h" - -// This variable is used to save the exception object between a ctrl-C and the -// PENDSV call that actually raises the exception. It must be non-static -// otherwise gcc-5 optimises it away. It can point to the heap but is not -// traced by GC. This is okay because we only ever set it to -// mp_kbd_exception which is in the root-pointer set. -void *pendsv_object; - -void pendsv_init(void) { - // set PendSV interrupt at lowest priority - NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV); -} - -// Call this function to raise a pending exception during an interrupt. -// It will first try to raise the exception "softly" by setting the -// mp_pending_exception variable and hoping that the VM will notice it. -// If this function is called a second time (ie with the mp_pending_exception -// variable already set) then it will force the exception by using the hardware -// PENDSV feature. This will wait until all interrupts are finished then raise -// the given exception object using nlr_jump in the context of the top-level -// thread. -void pendsv_kbd_intr(void) { - if (MP_STATE_VM(mp_pending_exception) == MP_OBJ_NULL) { - mp_keyboard_interrupt(); - } else { - MP_STATE_VM(mp_pending_exception) = MP_OBJ_NULL; - pendsv_object = &MP_STATE_VM(mp_kbd_exception); - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - } -} - -void pendsv_isr_handler(void) { - // re-jig the stack so that when we return from this interrupt handler - // it returns instead to nlr_jump with argument pendsv_object - // note that stack has a different layout if DEBUG is enabled - // - // on entry to this (naked) function, stack has the following layout: - // - // stack layout with DEBUG disabled: - // sp[6]: pc=r15 - // sp[5]: lr=r14 - // sp[4]: r12 - // sp[3]: r3 - // sp[2]: r2 - // sp[1]: r1 - // sp[0]: r0 - // - // stack layout with DEBUG enabled: - // sp[8]: pc=r15 - // sp[7]: lr=r14 - // sp[6]: r12 - // sp[5]: r3 - // sp[4]: r2 - // sp[3]: r1 - // sp[2]: r0 - // sp[1]: 0xfffffff9 - // sp[0]: ? - -#if MICROPY_PY_THREAD - __asm volatile ( - "ldr r1, pendsv_object_ptr\n" - "ldr r0, [r1]\n" - "cmp r0, 0\n" - "beq .no_obj\n" - "str r0, [sp, #0]\n" // store to r0 on stack - "mov r0, #0\n" - "str r0, [r1]\n" // clear pendsv_object - "ldr r0, nlr_jump_ptr\n" - "str r0, [sp, #24]\n" // store to pc on stack - "bx lr\n" // return from interrupt; will return to nlr_jump - - ".no_obj:\n" // pendsv_object==NULL - "push {r4-r11, lr}\n" - "vpush {s16-s31}\n" - "mrs r5, primask\n" // save PRIMASK in r5 - "cpsid i\n" // disable interrupts while we change stacks - "mov r0, sp\n" // pass sp to save - "mov r4, lr\n" // save lr because we are making a call - "bl pyb_thread_next\n" // get next thread to execute - "mov lr, r4\n" // restore lr - "mov sp, r0\n" // switch stacks - "msr primask, r5\n" // reenable interrupts - "vpop {s16-s31}\n" - "pop {r4-r11, lr}\n" - "bx lr\n" // return from interrupt; will return to new thread - ".align 2\n" - "pendsv_object_ptr: .word pendsv_object\n" - "nlr_jump_ptr: .word nlr_jump\n" - ); -#else - __asm volatile ( - "ldr r0, pendsv_object_ptr\n" - "ldr r0, [r0]\n" -#if defined(PENDSV_DEBUG) - "str r0, [sp, #8]\n" -#else - "str r0, [sp, #0]\n" -#endif - "ldr r0, nlr_jump_ptr\n" -#if defined(PENDSV_DEBUG) - "str r0, [sp, #32]\n" -#else - "str r0, [sp, #24]\n" -#endif - "bx lr\n" - ".align 2\n" - "pendsv_object_ptr: .word pendsv_object\n" - "nlr_jump_ptr: .word nlr_jump\n" - ); -#endif - - /* - uint32_t x[2] = {0x424242, 0xdeaddead}; - printf("PendSV: %p\n", x); - for (uint32_t *p = (uint32_t*)(((uint32_t)x - 15) & 0xfffffff0), i = 64; i > 0; p += 4, i -= 4) { - printf(" %p: %08x %08x %08x %08x\n", p, (uint)p[0], (uint)p[1], (uint)p[2], (uint)p[3]); - } - */ -} diff --git a/ports/stm32/pendsv.h b/ports/stm32/pendsv.h deleted file mode 100644 index 0d9fde6878..0000000000 --- a/ports/stm32/pendsv.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_PENDSV_H -#define MICROPY_INCLUDED_STM32_PENDSV_H - -void pendsv_init(void); -void pendsv_kbd_intr(void); - -// since we play tricks with the stack, the compiler must not generate a -// prelude for this function -void pendsv_isr_handler(void) __attribute__((naked)); - -#endif // MICROPY_INCLUDED_STM32_PENDSV_H diff --git a/ports/stm32/pin.c b/ports/stm32/pin.c deleted file mode 100644 index fbd3f00c17..0000000000 --- a/ports/stm32/pin.c +++ /dev/null @@ -1,674 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/virtpin.h" -#include "pin.h" -#include "extint.h" - -/// \moduleref pyb -/// \class Pin - control I/O pins -/// -/// A pin is the basic object to control I/O pins. It has methods to set -/// the mode of the pin (input, output, etc) and methods to get and set the -/// digital logic level. For analog control of a pin, see the ADC class. -/// -/// Usage Model: -/// -/// All Board Pins are predefined as pyb.Pin.board.Name -/// -/// x1_pin = pyb.Pin.board.X1 -/// -/// g = pyb.Pin(pyb.Pin.board.X1, pyb.Pin.IN) -/// -/// CPU pins which correspond to the board pins are available -/// as `pyb.cpu.Name`. For the CPU pins, the names are the port letter -/// followed by the pin number. On the PYBv1.0, `pyb.Pin.board.X1` and -/// `pyb.Pin.cpu.B6` are the same pin. -/// -/// You can also use strings: -/// -/// g = pyb.Pin('X1', pyb.Pin.OUT_PP) -/// -/// Users can add their own names: -/// -/// MyMapperDict = { 'LeftMotorDir' : pyb.Pin.cpu.C12 } -/// pyb.Pin.dict(MyMapperDict) -/// g = pyb.Pin("LeftMotorDir", pyb.Pin.OUT_OD) -/// -/// and can query mappings -/// -/// pin = pyb.Pin("LeftMotorDir") -/// -/// Users can also add their own mapping function: -/// -/// def MyMapper(pin_name): -/// if pin_name == "LeftMotorDir": -/// return pyb.Pin.cpu.A0 -/// -/// pyb.Pin.mapper(MyMapper) -/// -/// So, if you were to call: `pyb.Pin("LeftMotorDir", pyb.Pin.OUT_PP)` -/// then `"LeftMotorDir"` is passed directly to the mapper function. -/// -/// To summarise, the following order determines how things get mapped into -/// an ordinal pin number: -/// -/// 1. Directly specify a pin object -/// 2. User supplied mapping function -/// 3. User supplied mapping (object must be usable as a dictionary key) -/// 4. Supply a string which matches a board pin -/// 5. Supply a string which matches a CPU port/pin -/// -/// You can set `pyb.Pin.debug(True)` to get some debug information about -/// how a particular object gets mapped to a pin. - -// Pin class variables -STATIC bool pin_class_debug; - -void pin_init0(void) { - MP_STATE_PORT(pin_class_mapper) = mp_const_none; - MP_STATE_PORT(pin_class_map_dict) = mp_const_none; - pin_class_debug = false; -} - -// C API used to convert a user-supplied pin name into an ordinal pin number. -const pin_obj_t *pin_find(mp_obj_t user_obj) { - const pin_obj_t *pin_obj; - - // If a pin was provided, then use it - if (MP_OBJ_IS_TYPE(user_obj, &pin_type)) { - pin_obj = user_obj; - if (pin_class_debug) { - printf("Pin map passed pin "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - if (MP_STATE_PORT(pin_class_mapper) != mp_const_none) { - pin_obj = mp_call_function_1(MP_STATE_PORT(pin_class_mapper), user_obj); - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("Pin.mapper didn't return a Pin object"); - } - if (pin_class_debug) { - printf("Pin.mapper maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - // The pin mapping function returned mp_const_none, fall through to - // other lookup methods. - } - - if (MP_STATE_PORT(pin_class_map_dict) != mp_const_none) { - mp_map_t *pin_map_map = mp_obj_dict_get_map(MP_STATE_PORT(pin_class_map_dict)); - mp_map_elem_t *elem = mp_map_lookup(pin_map_map, user_obj, MP_MAP_LOOKUP); - if (elem != NULL && elem->value != NULL) { - pin_obj = elem->value; - if (pin_class_debug) { - printf("Pin.map_dict maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - } - - // See if the pin name matches a board pin - pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj); - if (pin_obj) { - if (pin_class_debug) { - printf("Pin.board maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - // See if the pin name matches a cpu pin - pin_obj = pin_find_named_pin(&pin_cpu_pins_locals_dict, user_obj); - if (pin_obj) { - if (pin_class_debug) { - printf("Pin.cpu maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%s) doesn't exist", mp_obj_str_get_str(user_obj))); -} - -/// \method __str__() -/// Return a string describing the pin object. -STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_obj_t *self = self_in; - - // pin name - mp_printf(print, "Pin(Pin.cpu.%q, mode=Pin.", self->name); - - uint32_t mode = pin_get_mode(self); - - if (mode == GPIO_MODE_ANALOG) { - // analog - mp_print_str(print, "ANALOG)"); - - } else { - // IO mode - bool af = false; - qstr mode_qst; - if (mode == GPIO_MODE_INPUT) { - mode_qst = MP_QSTR_IN; - } else if (mode == GPIO_MODE_OUTPUT_PP) { - mode_qst = MP_QSTR_OUT; - } else if (mode == GPIO_MODE_OUTPUT_OD) { - mode_qst = MP_QSTR_OPEN_DRAIN; - } else { - af = true; - if (mode == GPIO_MODE_AF_PP) { - mode_qst = MP_QSTR_ALT; - } else { - mode_qst = MP_QSTR_ALT_OPEN_DRAIN; - } - } - mp_print_str(print, qstr_str(mode_qst)); - - // pull mode - qstr pull_qst = MP_QSTR_NULL; - uint32_t pull = pin_get_pull(self); - if (pull == GPIO_PULLUP) { - pull_qst = MP_QSTR_PULL_UP; - } else if (pull == GPIO_PULLDOWN) { - pull_qst = MP_QSTR_PULL_DOWN; - } - if (pull_qst != MP_QSTR_NULL) { - mp_printf(print, ", pull=Pin.%q", pull_qst); - } - - // AF mode - if (af) { - mp_uint_t af_idx = pin_get_af(self); - const pin_af_obj_t *af_obj = pin_find_af_by_index(self, af_idx); - if (af_obj == NULL) { - mp_printf(print, ", af=%d)", af_idx); - } else { - mp_printf(print, ", af=Pin.%q)", af_obj->name); - } - } else { - mp_print_str(print, ")"); - } - } -} - -STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *pin, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); - -/// \classmethod \constructor(id, ...) -/// Create a new Pin object associated with the id. If additional arguments are given, -/// they are used to initialise the pin. See `init`. -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // Run an argument through the mapper and return the result. - const pin_obj_t *pin = pin_find(args[0]); - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - pin_obj_t *self = self_in; - if (n_args == 0) { - // get pin - return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self)); - } else { - // set pin - mp_hal_pin_write(self, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -/// \classmethod mapper([fun]) -/// Get or set the pin mapper function. -STATIC mp_obj_t pin_mapper(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - MP_STATE_PORT(pin_class_mapper) = args[1]; - return mp_const_none; - } - return MP_STATE_PORT(pin_class_mapper); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_mapper_fun_obj, 1, 2, pin_mapper); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_mapper_obj, (mp_obj_t)&pin_mapper_fun_obj); - -/// \classmethod dict([dict]) -/// Get or set the pin mapper dictionary. -STATIC mp_obj_t pin_map_dict(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - MP_STATE_PORT(pin_class_map_dict) = args[1]; - return mp_const_none; - } - return MP_STATE_PORT(pin_class_map_dict); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_map_dict_fun_obj, 1, 2, pin_map_dict); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_map_dict_obj, (mp_obj_t)&pin_map_dict_fun_obj); - -/// \classmethod af_list() -/// Returns an array of alternate functions available for this pin. -STATIC mp_obj_t pin_af_list(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t result = mp_obj_new_list(0, NULL); - - const pin_af_obj_t *af = self->af; - for (mp_uint_t i = 0; i < self->num_af; i++, af++) { - mp_obj_list_append(result, (mp_obj_t)af); - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_list_obj, pin_af_list); - -/// \classmethod debug([state]) -/// Get or set the debugging state (`True` or `False` for on or off). -STATIC mp_obj_t pin_debug(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - pin_class_debug = mp_obj_is_true(args[1]); - return mp_const_none; - } - return mp_obj_new_bool(pin_class_debug); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_debug_fun_obj, 1, 2, pin_debug); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_debug_obj, (mp_obj_t)&pin_debug_fun_obj); - -// init(mode, pull=None, af=-1, *, value, alt) -STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_af, MP_ARG_INT, {.u_int = -1}}, // legacy - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - { MP_QSTR_alt, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get io mode - uint mode = args[0].u_int; - if (!IS_GPIO_MODE(mode)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin mode: %d", mode)); - } - - // get pull mode - uint pull = GPIO_NOPULL; - if (args[1].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[1].u_obj); - } - if (!IS_GPIO_PULL(pull)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin pull: %d", pull)); - } - - // get af (alternate function); alt-arg overrides af-arg - mp_int_t af = args[4].u_int; - if (af == -1) { - af = args[2].u_int; - } - if ((mode == GPIO_MODE_AF_PP || mode == GPIO_MODE_AF_OD) && !IS_GPIO_AF(af)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin af: %d", af)); - } - - // enable the peripheral clock for the port of this pin - mp_hal_gpio_clock_enable(self->gpio); - - // if given, set the pin value before initialising to prevent glitches - if (args[3].u_obj != MP_OBJ_NULL) { - mp_hal_pin_write(self, mp_obj_is_true(args[3].u_obj)); - } - - // configure the GPIO as requested - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = self->pin_mask; - GPIO_InitStructure.Mode = mode; - GPIO_InitStructure.Pull = pull; - GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStructure.Alternate = af; - HAL_GPIO_Init(self->gpio, &GPIO_InitStructure); - - return mp_const_none; -} - -STATIC mp_obj_t pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init); - -/// \method value([value]) -/// Get or set the digital logic level of the pin: -/// -/// - With no argument, return 0 or 1 depending on the logic level of the pin. -/// - With `value` given, set the logic level of the pin. `value` can be -/// anything that converts to a boolean. If it converts to `True`, the pin -/// is set high, otherwise it is set low. -STATIC mp_obj_t pin_value(size_t n_args, const mp_obj_t *args) { - return pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value); - -STATIC mp_obj_t pin_off(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_low(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_off_obj, pin_off); - -STATIC mp_obj_t pin_on(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_high(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_on_obj, pin_on); - -// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False) -STATIC mp_obj_t pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_handler, ARG_trigger, ARG_hard }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_MODE_IT_RISING | GPIO_MODE_IT_FALLING} }, - { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} }, - }; - pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (n_args > 1 || kw_args->used != 0) { - // configure irq - extint_register_pin(self, args[ARG_trigger].u_int, - args[ARG_hard].u_bool, args[ARG_handler].u_obj); - } - - // TODO should return an IRQ object - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_irq_obj, 1, pin_irq); - -/// \method name() -/// Get the pin name. -STATIC mp_obj_t pin_name(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_QSTR(self->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_name_obj, pin_name); - -/// \method names() -/// Returns the cpu and board names for this pin. -STATIC mp_obj_t pin_names(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t result = mp_obj_new_list(0, NULL); - mp_obj_list_append(result, MP_OBJ_NEW_QSTR(self->name)); - - mp_map_t *map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - mp_map_elem_t *elem = map->table; - - for (mp_uint_t i = 0; i < map->used; i++, elem++) { - if (elem->value == self) { - mp_obj_list_append(result, elem->key); - } - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_names_obj, pin_names); - -/// \method port() -/// Get the pin port. -STATIC mp_obj_t pin_port(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->port); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_port_obj, pin_port); - -/// \method pin() -/// Get the pin number. -STATIC mp_obj_t pin_pin(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->pin); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pin_obj, pin_pin); - -/// \method gpio() -/// Returns the base address of the GPIO block associated with this pin. -STATIC mp_obj_t pin_gpio(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT((mp_int_t)self->gpio); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_gpio_obj, pin_gpio); - -/// \method mode() -/// Returns the currently configured mode of the pin. The integer returned -/// will match one of the allowed constants for the mode argument to the init -/// function. -STATIC mp_obj_t pin_mode(mp_obj_t self_in) { - return MP_OBJ_NEW_SMALL_INT(pin_get_mode(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_mode_obj, pin_mode); - -/// \method pull() -/// Returns the currently configured pull of the pin. The integer returned -/// will match one of the allowed constants for the pull argument to the init -/// function. -STATIC mp_obj_t pin_pull(mp_obj_t self_in) { - return MP_OBJ_NEW_SMALL_INT(pin_get_pull(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pull_obj, pin_pull); - -/// \method af() -/// Returns the currently configured alternate-function of the pin. The -/// integer returned will match one of the allowed constants for the af -/// argument to the init function. -STATIC mp_obj_t pin_af(mp_obj_t self_in) { - return MP_OBJ_NEW_SMALL_INT(pin_get_af(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_obj, pin_af); - -STATIC const mp_rom_map_elem_t pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pin_irq_obj) }, - - // Legacy names as used by pyb.Pin - { MP_ROM_QSTR(MP_QSTR_low), MP_ROM_PTR(&pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&pin_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_names), MP_ROM_PTR(&pin_names_obj) }, - { MP_ROM_QSTR(MP_QSTR_af_list), MP_ROM_PTR(&pin_af_list_obj) }, - { MP_ROM_QSTR(MP_QSTR_port), MP_ROM_PTR(&pin_port_obj) }, - { MP_ROM_QSTR(MP_QSTR_pin), MP_ROM_PTR(&pin_pin_obj) }, - { MP_ROM_QSTR(MP_QSTR_gpio), MP_ROM_PTR(&pin_gpio_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&pin_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_pull), MP_ROM_PTR(&pin_pull_obj) }, - { MP_ROM_QSTR(MP_QSTR_af), MP_ROM_PTR(&pin_af_obj) }, - - // class methods - { MP_ROM_QSTR(MP_QSTR_mapper), MP_ROM_PTR(&pin_mapper_obj) }, - { MP_ROM_QSTR(MP_QSTR_dict), MP_ROM_PTR(&pin_map_dict_obj) }, - { MP_ROM_QSTR(MP_QSTR_debug), MP_ROM_PTR(&pin_debug_obj) }, - - // class attributes - { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&pin_board_pins_obj_type) }, - { MP_ROM_QSTR(MP_QSTR_cpu), MP_ROM_PTR(&pin_cpu_pins_obj_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_INPUT) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_OUTPUT_PP) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_ALT), MP_ROM_INT(GPIO_MODE_AF_PP) }, - { MP_ROM_QSTR(MP_QSTR_ALT_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_AF_OD) }, - { MP_ROM_QSTR(MP_QSTR_ANALOG), MP_ROM_INT(GPIO_MODE_ANALOG) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULLUP) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULLDOWN) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_MODE_IT_RISING) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_MODE_IT_FALLING) }, - - // legacy class constants - { MP_ROM_QSTR(MP_QSTR_OUT_PP), MP_ROM_INT(GPIO_MODE_OUTPUT_PP) }, - { MP_ROM_QSTR(MP_QSTR_OUT_OD), MP_ROM_INT(GPIO_MODE_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_AF_PP), MP_ROM_INT(GPIO_MODE_AF_PP) }, - { MP_ROM_QSTR(MP_QSTR_AF_OD), MP_ROM_INT(GPIO_MODE_AF_OD) }, - { MP_ROM_QSTR(MP_QSTR_PULL_NONE), MP_ROM_INT(GPIO_NOPULL) }, - -#include "genhdr/pins_af_const.h" -}; - -STATIC MP_DEFINE_CONST_DICT(pin_locals_dict, pin_locals_dict_table); - -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - return mp_hal_pin_read(self); - } - case MP_PIN_WRITE: { - mp_hal_pin_write(self, arg); - return 0; - } - } - return -1; -} - -STATIC const mp_pin_p_t pin_pin_p = { - .ioctl = pin_ioctl, -}; - -const mp_obj_type_t pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pin_print, - .make_new = mp_pin_make_new, - .call = pin_call, - .protocol = &pin_pin_p, - .locals_dict = (mp_obj_dict_t*)&pin_locals_dict, -}; - -/// \moduleref pyb -/// \class PinAF - Pin Alternate Functions -/// -/// A Pin represents a physical pin on the microcprocessor. Each pin -/// can have a variety of functions (GPIO, I2C SDA, etc). Each PinAF -/// object represents a particular function for a pin. -/// -/// Usage Model: -/// -/// x3 = pyb.Pin.board.X3 -/// x3_af = x3.af_list() -/// -/// x3_af will now contain an array of PinAF objects which are availble on -/// pin X3. -/// -/// For the pyboard, x3_af would contain: -/// [Pin.AF1_TIM2, Pin.AF2_TIM5, Pin.AF3_TIM9, Pin.AF7_USART2] -/// -/// Normally, each peripheral would configure the af automatically, but sometimes -/// the same function is available on multiple pins, and having more control -/// is desired. -/// -/// To configure X3 to expose TIM2_CH3, you could use: -/// pin = pyb.Pin(pyb.Pin.board.X3, mode=pyb.Pin.AF_PP, af=pyb.Pin.AF1_TIM2) -/// or: -/// pin = pyb.Pin(pyb.Pin.board.X3, mode=pyb.Pin.AF_PP, af=1) - -/// \method __str__() -/// Return a string describing the alternate function. -STATIC void pin_af_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_af_obj_t *self = self_in; - mp_printf(print, "Pin.%q", self->name); -} - -/// \method index() -/// Return the alternate function index. -STATIC mp_obj_t pin_af_index(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_SMALL_INT(af->idx); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_index_obj, pin_af_index); - -/// \method name() -/// Return the name of the alternate function. -STATIC mp_obj_t pin_af_name(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_QSTR(af->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_name_obj, pin_af_name); - -/// \method reg() -/// Return the base register associated with the peripheral assigned to this -/// alternate function. For example, if the alternate function were TIM2_CH3 -/// this would return stm.TIM2 -STATIC mp_obj_t pin_af_reg(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_SMALL_INT((mp_uint_t)af->reg); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_reg_obj, pin_af_reg); - -STATIC const mp_rom_map_elem_t pin_af_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_index), MP_ROM_PTR(&pin_af_index_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&pin_af_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pin_af_reg_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pin_af_locals_dict, pin_af_locals_dict_table); - -const mp_obj_type_t pin_af_type = { - { &mp_type_type }, - .name = MP_QSTR_PinAF, - .print = pin_af_obj_print, - .locals_dict = (mp_obj_dict_t*)&pin_af_locals_dict, -}; diff --git a/ports/stm32/pin.h b/ports/stm32/pin.h deleted file mode 100644 index ea57b0a274..0000000000 --- a/ports/stm32/pin.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_PIN_H -#define MICROPY_INCLUDED_STM32_PIN_H - -// This file requires pin_defs_xxx.h (which has port specific enums and -// defines, so we include it here. It should never be included directly - -#include MICROPY_PIN_DEFS_PORT_H -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - qstr name; - uint8_t idx; - uint8_t fn; - uint8_t unit; - uint8_t type; - void *reg; // The peripheral associated with this AF -} pin_af_obj_t; - -typedef struct { - mp_obj_base_t base; - qstr name; - uint32_t port : 4; - uint32_t pin : 5; // Some ARM processors use 32 bits/PORT - uint32_t num_af : 4; - uint32_t adc_channel : 5; // Some ARM processors use 32 bits/PORT - uint32_t adc_num : 3; // 1 bit per ADC - uint32_t pin_mask; - pin_gpio_t *gpio; - const pin_af_obj_t *af; -} pin_obj_t; - -extern const mp_obj_type_t pin_type; -extern const mp_obj_type_t pin_af_type; - -// Include all of the individual pin objects -#include "genhdr/pins.h" - -typedef struct { - const char *name; - const pin_obj_t *pin; -} pin_named_pin_t; - -extern const pin_named_pin_t pin_board_pins[]; -extern const pin_named_pin_t pin_cpu_pins[]; - -//extern pin_map_obj_t pin_map_obj; - -typedef struct { - mp_obj_base_t base; - qstr name; - const pin_named_pin_t *named_pins; -} pin_named_pins_obj_t; - -extern const mp_obj_type_t pin_board_pins_obj_type; -extern const mp_obj_type_t pin_cpu_pins_obj_type; - -extern const mp_obj_dict_t pin_cpu_pins_locals_dict; -extern const mp_obj_dict_t pin_board_pins_locals_dict; - -MP_DECLARE_CONST_FUN_OBJ_KW(pin_init_obj); - -void pin_init0(void); -uint32_t pin_get_mode(const pin_obj_t *pin); -uint32_t pin_get_pull(const pin_obj_t *pin); -uint32_t pin_get_af(const pin_obj_t *pin); -const pin_obj_t *pin_find(mp_obj_t user_obj); -const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name); -const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit); -const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx); -const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name); - -#endif // MICROPY_INCLUDED_STM32_PIN_H diff --git a/ports/stm32/pin_defs_stm32.c b/ports/stm32/pin_defs_stm32.c deleted file mode 100644 index 0aef5f95fa..0000000000 --- a/ports/stm32/pin_defs_stm32.c +++ /dev/null @@ -1,31 +0,0 @@ -#include "py/obj.h" -#include "pin.h" - -// Returns the pin mode. This value returned by this macro should be one of: -// GPIO_MODE_INPUT, GPIO_MODE_OUTPUT_PP, GPIO_MODE_OUTPUT_OD, -// GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG. - -uint32_t pin_get_mode(const pin_obj_t *pin) { - GPIO_TypeDef *gpio = pin->gpio; - uint32_t mode = (gpio->MODER >> (pin->pin * 2)) & 3; - if (mode != GPIO_MODE_ANALOG) { - if (gpio->OTYPER & pin->pin_mask) { - mode |= 1 << 4; - } - } - return mode; -} - -// Returns the pin pullup/pulldown. The value returned by this macro should -// be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN. - -uint32_t pin_get_pull(const pin_obj_t *pin) { - return (pin->gpio->PUPDR >> (pin->pin * 2)) & 3; -} - -// Returns the af (alternate function) index currently set for a pin. - -uint32_t pin_get_af(const pin_obj_t *pin) { - return (pin->gpio->AFR[pin->pin >> 3] >> ((pin->pin & 7) * 4)) & 0xf; -} - diff --git a/ports/stm32/pin_defs_stm32.h b/ports/stm32/pin_defs_stm32.h deleted file mode 100644 index 5c5c6be697..0000000000 --- a/ports/stm32/pin_defs_stm32.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// This file contains pin definitions that are specific to the stm32 port. -// This file should only ever be #included by pin.h and not directly. - -enum { - PORT_A, - PORT_B, - PORT_C, - PORT_D, - PORT_E, - PORT_F, - PORT_G, - PORT_H, - PORT_I, - PORT_J, - PORT_K, -}; - -enum { - AF_FN_TIM, - AF_FN_I2C, - AF_FN_USART, - AF_FN_UART = AF_FN_USART, - AF_FN_SPI, - AF_FN_I2S, - AF_FN_SDMMC, - AF_FN_CAN, -}; - -enum { - AF_PIN_TYPE_TIM_CH1 = 0, - AF_PIN_TYPE_TIM_CH2, - AF_PIN_TYPE_TIM_CH3, - AF_PIN_TYPE_TIM_CH4, - AF_PIN_TYPE_TIM_CH1N, - AF_PIN_TYPE_TIM_CH2N, - AF_PIN_TYPE_TIM_CH3N, - AF_PIN_TYPE_TIM_CH1_ETR, - AF_PIN_TYPE_TIM_ETR, - AF_PIN_TYPE_TIM_BKIN, - - AF_PIN_TYPE_I2C_SDA = 0, - AF_PIN_TYPE_I2C_SCL, - - AF_PIN_TYPE_USART_TX = 0, - AF_PIN_TYPE_USART_RX, - AF_PIN_TYPE_USART_CTS, - AF_PIN_TYPE_USART_RTS, - AF_PIN_TYPE_USART_CK, - AF_PIN_TYPE_UART_TX = AF_PIN_TYPE_USART_TX, - AF_PIN_TYPE_UART_RX = AF_PIN_TYPE_USART_RX, - AF_PIN_TYPE_UART_CTS = AF_PIN_TYPE_USART_CTS, - AF_PIN_TYPE_UART_RTS = AF_PIN_TYPE_USART_RTS, - - AF_PIN_TYPE_SPI_MOSI = 0, - AF_PIN_TYPE_SPI_MISO, - AF_PIN_TYPE_SPI_SCK, - AF_PIN_TYPE_SPI_NSS, - - AF_PIN_TYPE_I2S_CK = 0, - AF_PIN_TYPE_I2S_MCK, - AF_PIN_TYPE_I2S_SD, - AF_PIN_TYPE_I2S_WS, - AF_PIN_TYPE_I2S_EXTSD, - - AF_PIN_TYPE_SDMMC_CK = 0, - AF_PIN_TYPE_SDMMC_CMD, - AF_PIN_TYPE_SDMMC_D0, - AF_PIN_TYPE_SDMMC_D1, - AF_PIN_TYPE_SDMMC_D2, - AF_PIN_TYPE_SDMMC_D3, - - AF_PIN_TYPE_CAN_TX = 0, - AF_PIN_TYPE_CAN_RX, -}; - -// The HAL uses a slightly different naming than we chose, so we provide -// some #defines to massage things. Also I2S and SPI share the same -// peripheral. - -#define GPIO_AF5_I2S2 GPIO_AF5_SPI2 -#define GPIO_AF5_I2S3 GPIO_AF5_I2S3ext -#define GPIO_AF6_I2S2 GPIO_AF6_I2S2ext -#define GPIO_AF6_I2S3 GPIO_AF6_SPI3 -#define GPIO_AF7_I2S2 GPIO_AF7_SPI2 -#define GPIO_AF7_I2S3 GPIO_AF7_I2S3ext - -#define I2S2 SPI2 -#define I2S3 SPI3 - -enum { - PIN_ADC1 = (1 << 0), - PIN_ADC2 = (1 << 1), - PIN_ADC3 = (1 << 2), -}; - -typedef GPIO_TypeDef pin_gpio_t; - diff --git a/ports/stm32/pin_named_pins.c b/ports/stm32/pin_named_pins.c deleted file mode 100644 index 726da54dd6..0000000000 --- a/ports/stm32/pin_named_pins.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" - -const mp_obj_type_t pin_cpu_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_cpu, - .locals_dict = (mp_obj_t)&pin_cpu_pins_locals_dict, -}; - -const mp_obj_type_t pin_board_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_board, - .locals_dict = (mp_obj_t)&pin_board_pins_locals_dict, -}; - -const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - mp_map_elem_t *named_elem = mp_map_lookup(named_map, name, MP_MAP_LOOKUP); - if (named_elem != NULL && named_elem->value != NULL) { - return named_elem->value; - } - return NULL; -} - -const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (af->fn == fn && af->unit == unit) { - return af; - } - } - return NULL; -} - -const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (af->idx == af_idx) { - return af; - } - } - return NULL; -} - -/* unused -const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (strcmp(name, qstr_str(af->name)) == 0) { - return af; - } - } - return NULL; -} -*/ diff --git a/ports/stm32/portmodules.h b/ports/stm32/portmodules.h deleted file mode 100644 index 81cb7fd04a..0000000000 --- a/ports/stm32/portmodules.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_PORTMODULES_H -#define MICROPY_INCLUDED_STM32_PORTMODULES_H - -extern const mp_obj_module_t pyb_module; -extern const mp_obj_module_t stm_module; -extern const mp_obj_module_t mp_module_uos; -extern const mp_obj_module_t mp_module_utime; -extern const mp_obj_module_t mp_module_usocket; - -// additional helper functions exported by the modules - -MP_DECLARE_CONST_FUN_OBJ_1(time_sleep_ms_obj); -MP_DECLARE_CONST_FUN_OBJ_1(time_sleep_us_obj); - -MP_DECLARE_CONST_FUN_OBJ_0(mod_os_sync_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mod_os_dupterm_obj); - -#endif // MICROPY_INCLUDED_STM32_PORTMODULES_H diff --git a/ports/stm32/pyb_i2c.c b/ports/stm32/pyb_i2c.c deleted file mode 100644 index 33aaa48cbb..0000000000 --- a/ports/stm32/pyb_i2c.c +++ /dev/null @@ -1,1068 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "irq.h" -#include "pin.h" -#include "bufhelper.h" -#include "dma.h" -#include "i2c.h" - -#if MICROPY_PY_PYB_LEGACY && MICROPY_HW_ENABLE_HW_I2C - -/// \moduleref pyb -/// \class I2C - a two-wire serial protocol -/// -/// I2C is a two-wire protocol for communicating between devices. At the physical -/// level it consists of 2 wires: SCL and SDA, the clock and data lines respectively. -/// -/// I2C objects are created attached to a specific bus. They can be initialised -/// when created, or initialised later on: -/// -/// from pyb import I2C -/// -/// i2c = I2C(1) # create on bus 1 -/// i2c = I2C(1, I2C.MASTER) # create and init as a master -/// i2c.init(I2C.MASTER, baudrate=20000) # init as a master -/// i2c.init(I2C.SLAVE, addr=0x42) # init as a slave with given address -/// i2c.deinit() # turn off the peripheral -/// -/// Printing the i2c object gives you information about its configuration. -/// -/// Basic methods for slave are send and recv: -/// -/// i2c.send('abc') # send 3 bytes -/// i2c.send(0x42) # send a single byte, given by the number -/// data = i2c.recv(3) # receive 3 bytes -/// -/// To receive inplace, first create a bytearray: -/// -/// data = bytearray(3) # create a buffer -/// i2c.recv(data) # receive 3 bytes, writing them into data -/// -/// You can specify a timeout (in ms): -/// -/// i2c.send(b'123', timeout=2000) # timout after 2 seconds -/// -/// A master must specify the recipient's address: -/// -/// i2c.init(I2C.MASTER) -/// i2c.send('123', 0x42) # send 3 bytes to slave with address 0x42 -/// i2c.send(b'456', addr=0x42) # keyword for address -/// -/// Master also has other methods: -/// -/// i2c.is_ready(0x42) # check if slave 0x42 is ready -/// i2c.scan() # scan for slaves on the bus, returning -/// # a list of valid addresses -/// i2c.mem_read(3, 0x42, 2) # read 3 bytes from memory of slave 0x42, -/// # starting at address 2 in the slave -/// i2c.mem_write('abc', 0x42, 2, timeout=1000) -#define PYB_I2C_MASTER (0) -#define PYB_I2C_SLAVE (1) - -#define PYB_I2C_SPEED_STANDARD (100000L) -#define PYB_I2C_SPEED_FULL (400000L) -#define PYB_I2C_SPEED_FAST (1000000L) - -#if defined(MICROPY_HW_I2C1_SCL) -I2C_HandleTypeDef I2CHandle1 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_I2C2_SCL) -I2C_HandleTypeDef I2CHandle2 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_I2C3_SCL) -I2C_HandleTypeDef I2CHandle3 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_I2C4_SCL) -I2C_HandleTypeDef I2CHandle4 = {.Instance = NULL}; -#endif - -STATIC bool pyb_i2c_use_dma[4]; - -const pyb_i2c_obj_t pyb_i2c_obj[] = { - #if defined(MICROPY_HW_I2C1_SCL) - {{&pyb_i2c_type}, &I2CHandle1, &dma_I2C_1_TX, &dma_I2C_1_RX, &pyb_i2c_use_dma[0]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C2_SCL) - {{&pyb_i2c_type}, &I2CHandle2, &dma_I2C_2_TX, &dma_I2C_2_RX, &pyb_i2c_use_dma[1]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C3_SCL) - {{&pyb_i2c_type}, &I2CHandle3, &dma_I2C_3_TX, &dma_I2C_3_RX, &pyb_i2c_use_dma[2]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C4_SCL) - {{&pyb_i2c_type}, &I2CHandle4, &dma_I2C_4_TX, &dma_I2C_4_RX, &pyb_i2c_use_dma[3]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif -}; - -#if defined(STM32F7) || defined(STM32L4) || defined(STM32H7) - -// The STM32F0, F3, F7, H7 and L4 use a TIMINGR register rather than ClockSpeed and -// DutyCycle. - -#if defined(STM32F746xx) - -// The value 0x40912732 was obtained from the DISCOVERY_I2Cx_TIMING constant -// defined in the STM32F7Cube file Drivers/BSP/STM32F746G-Discovery/stm32f7456g_discovery.h -#define MICROPY_HW_I2C_BAUDRATE_TIMING { \ - {PYB_I2C_SPEED_STANDARD, 0x40912732}, \ - {PYB_I2C_SPEED_FULL, 0x10911823}, \ - {PYB_I2C_SPEED_FAST, 0x00611116}, \ - } -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (PYB_I2C_SPEED_FULL) -#define MICROPY_HW_I2C_BAUDRATE_MAX (PYB_I2C_SPEED_FAST) - -#elif defined(STM32F722xx) || defined(STM32F723xx) \ - || defined(STM32F732xx) || defined(STM32F733xx) \ - || defined(STM32F767xx) || defined(STM32F769xx) - -// These timing values are for f_I2CCLK=54MHz and are only approximate -#define MICROPY_HW_I2C_BAUDRATE_TIMING { \ - {PYB_I2C_SPEED_STANDARD, 0xb0420f13}, \ - {PYB_I2C_SPEED_FULL, 0x70330309}, \ - {PYB_I2C_SPEED_FAST, 0x50100103}, \ - } -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (PYB_I2C_SPEED_FULL) -#define MICROPY_HW_I2C_BAUDRATE_MAX (PYB_I2C_SPEED_FAST) - -#elif defined(STM32H7) - -// I2C TIMINGs obtained from the STHAL examples. -#define MICROPY_HW_I2C_BAUDRATE_TIMING { \ - {PYB_I2C_SPEED_STANDARD, 0x40604E73}, \ - {PYB_I2C_SPEED_FULL, 0x00901954}, \ - {PYB_I2C_SPEED_FAST, 0x10810915}, \ - } -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (PYB_I2C_SPEED_FULL) -#define MICROPY_HW_I2C_BAUDRATE_MAX (PYB_I2C_SPEED_FAST) - -#elif defined(STM32L4) - -// The value 0x90112626 was obtained from the DISCOVERY_I2C1_TIMING constant -// defined in the STM32L4Cube file Drivers/BSP/STM32L476G-Discovery/stm32l476g_discovery.h -#define MICROPY_HW_I2C_BAUDRATE_TIMING {{PYB_I2C_SPEED_STANDARD, 0x90112626}} -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (PYB_I2C_SPEED_STANDARD) -#define MICROPY_HW_I2C_BAUDRATE_MAX (PYB_I2C_SPEED_STANDARD) - -#else -#error "no I2C timings for this MCU" -#endif - -STATIC const struct { - uint32_t baudrate; - uint32_t timing; -} pyb_i2c_baudrate_timing[] = MICROPY_HW_I2C_BAUDRATE_TIMING; - -#define NUM_BAUDRATE_TIMINGS MP_ARRAY_SIZE(pyb_i2c_baudrate_timing) - -STATIC void i2c_set_baudrate(I2C_InitTypeDef *init, uint32_t baudrate) { - for (int i = 0; i < NUM_BAUDRATE_TIMINGS; i++) { - if (pyb_i2c_baudrate_timing[i].baudrate == baudrate) { - init->Timing = pyb_i2c_baudrate_timing[i].timing; - return; - } - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Unsupported I2C baudrate: %u", baudrate)); -} - -uint32_t pyb_i2c_get_baudrate(I2C_HandleTypeDef *i2c) { - for (int i = 0; i < NUM_BAUDRATE_TIMINGS; i++) { - if (pyb_i2c_baudrate_timing[i].timing == i2c->Init.Timing) { - return pyb_i2c_baudrate_timing[i].baudrate; - } - } - return 0; -} - -#else - -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (PYB_I2C_SPEED_FULL) -#define MICROPY_HW_I2C_BAUDRATE_MAX (PYB_I2C_SPEED_FULL) - -STATIC void i2c_set_baudrate(I2C_InitTypeDef *init, uint32_t baudrate) { - init->ClockSpeed = baudrate; - init->DutyCycle = I2C_DUTYCYCLE_16_9; -} - -uint32_t pyb_i2c_get_baudrate(I2C_HandleTypeDef *i2c) { - uint32_t pfreq = i2c->Instance->CR2 & 0x3f; - uint32_t ccr = i2c->Instance->CCR & 0xfff; - if (i2c->Instance->CCR & 0x8000) { - // Fast mode, assume duty cycle of 16/9 - return pfreq * 40000 / ccr; - } else { - // Standard mode - return pfreq * 500000 / ccr; - } -} - -#endif - -void i2c_init0(void) { - // Initialise the I2C handles. - // The structs live on the BSS so all other fields will be zero after a reset. - #if defined(MICROPY_HW_I2C1_SCL) - I2CHandle1.Instance = I2C1; - #endif - #if defined(MICROPY_HW_I2C2_SCL) - I2CHandle2.Instance = I2C2; - #endif - #if defined(MICROPY_HW_I2C3_SCL) - I2CHandle3.Instance = I2C3; - #endif - #if defined(MICROPY_HW_I2C4_SCL) - I2CHandle4.Instance = I2C4; - #endif -} - -void pyb_i2c_init(I2C_HandleTypeDef *i2c) { - int i2c_unit; - const pin_obj_t *scl_pin; - const pin_obj_t *sda_pin; - - if (0) { - #if defined(MICROPY_HW_I2C1_SCL) - } else if (i2c == &I2CHandle1) { - i2c_unit = 1; - scl_pin = MICROPY_HW_I2C1_SCL; - sda_pin = MICROPY_HW_I2C1_SDA; - __HAL_RCC_I2C1_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_I2C2_SCL) - } else if (i2c == &I2CHandle2) { - i2c_unit = 2; - scl_pin = MICROPY_HW_I2C2_SCL; - sda_pin = MICROPY_HW_I2C2_SDA; - __HAL_RCC_I2C2_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_I2C3_SCL) - } else if (i2c == &I2CHandle3) { - i2c_unit = 3; - scl_pin = MICROPY_HW_I2C3_SCL; - sda_pin = MICROPY_HW_I2C3_SDA; - __HAL_RCC_I2C3_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_I2C4_SCL) - } else if (i2c == &I2CHandle4) { - i2c_unit = 4; - scl_pin = MICROPY_HW_I2C4_SCL; - sda_pin = MICROPY_HW_I2C4_SDA; - __HAL_RCC_I2C4_CLK_ENABLE(); - #endif - } else { - // I2C does not exist for this board (shouldn't get here, should be checked by caller) - return; - } - - // init the GPIO lines - uint32_t mode = MP_HAL_PIN_MODE_ALT_OPEN_DRAIN; - uint32_t pull = MP_HAL_PIN_PULL_NONE; // have external pull-up resistors on both lines - mp_hal_pin_config_alt(scl_pin, mode, pull, AF_FN_I2C, i2c_unit); - mp_hal_pin_config_alt(sda_pin, mode, pull, AF_FN_I2C, i2c_unit); - - // init the I2C device - if (HAL_I2C_Init(i2c) != HAL_OK) { - // init error - // TODO should raise an exception, but this function is not necessarily going to be - // called via Python, so may not be properly wrapped in an NLR handler - printf("OSError: HAL_I2C_Init failed\n"); - return; - } - - // invalidate the DMA channels so they are initialised on first use - const pyb_i2c_obj_t *self = &pyb_i2c_obj[i2c_unit - 1]; - dma_invalidate_channel(self->tx_dma_descr); - dma_invalidate_channel(self->rx_dma_descr); - - if (0) { - #if defined(MICROPY_HW_I2C1_SCL) - } else if (i2c->Instance == I2C1) { - HAL_NVIC_EnableIRQ(I2C1_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C1_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C2_SCL) - } else if (i2c->Instance == I2C2) { - HAL_NVIC_EnableIRQ(I2C2_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C2_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C3_SCL) - } else if (i2c->Instance == I2C3) { - HAL_NVIC_EnableIRQ(I2C3_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C3_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C4_SCL) - } else if (i2c->Instance == I2C4) { - HAL_NVIC_EnableIRQ(I2C4_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C4_ER_IRQn); - #endif - } -} - -void i2c_deinit(I2C_HandleTypeDef *i2c) { - HAL_I2C_DeInit(i2c); - if (0) { - #if defined(MICROPY_HW_I2C1_SCL) - } else if (i2c->Instance == I2C1) { - __HAL_RCC_I2C1_FORCE_RESET(); - __HAL_RCC_I2C1_RELEASE_RESET(); - __HAL_RCC_I2C1_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C1_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C1_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C2_SCL) - } else if (i2c->Instance == I2C2) { - __HAL_RCC_I2C2_FORCE_RESET(); - __HAL_RCC_I2C2_RELEASE_RESET(); - __HAL_RCC_I2C2_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C2_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C2_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C3_SCL) - } else if (i2c->Instance == I2C3) { - __HAL_RCC_I2C3_FORCE_RESET(); - __HAL_RCC_I2C3_RELEASE_RESET(); - __HAL_RCC_I2C3_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C3_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C3_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C4_SCL) - } else if (i2c->Instance == I2C4) { - __HAL_RCC_I2C4_FORCE_RESET(); - __HAL_RCC_I2C4_RELEASE_RESET(); - __HAL_RCC_I2C4_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C4_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C4_ER_IRQn); - #endif - } -} - -void pyb_i2c_init_freq(const pyb_i2c_obj_t *self, mp_int_t freq) { - I2C_InitTypeDef *init = &self->i2c->Init; - - init->AddressingMode = I2C_ADDRESSINGMODE_7BIT; - init->DualAddressMode = I2C_DUALADDRESS_DISABLED; - init->GeneralCallMode = I2C_GENERALCALL_DISABLED; - init->NoStretchMode = I2C_NOSTRETCH_DISABLE; - init->OwnAddress1 = PYB_I2C_MASTER_ADDRESS; - init->OwnAddress2 = 0; // unused - if (freq != -1) { - i2c_set_baudrate(init, MIN(freq, MICROPY_HW_I2C_BAUDRATE_MAX)); - } - - *self->use_dma = false; - - // init the I2C bus - i2c_deinit(self->i2c); - pyb_i2c_init(self->i2c); -} - -STATIC void i2c_reset_after_error(I2C_HandleTypeDef *i2c) { - // wait for bus-busy flag to be cleared, with a timeout - for (int timeout = 50; timeout > 0; --timeout) { - if (!__HAL_I2C_GET_FLAG(i2c, I2C_FLAG_BUSY)) { - // stop bit was generated and bus is back to normal - return; - } - mp_hal_delay_ms(1); - } - // bus was/is busy, need to reset the peripheral to get it to work again - i2c_deinit(i2c); - pyb_i2c_init(i2c); -} - -void i2c_ev_irq_handler(mp_uint_t i2c_id) { - I2C_HandleTypeDef *hi2c; - - switch (i2c_id) { - #if defined(MICROPY_HW_I2C1_SCL) - case 1: - hi2c = &I2CHandle1; - break; - #endif - #if defined(MICROPY_HW_I2C2_SCL) - case 2: - hi2c = &I2CHandle2; - break; - #endif - #if defined(MICROPY_HW_I2C3_SCL) - case 3: - hi2c = &I2CHandle3; - break; - #endif - #if defined(MICROPY_HW_I2C4_SCL) - case 4: - hi2c = &I2CHandle4; - break; - #endif - default: - return; - } - - #if defined(STM32F4) - - if (hi2c->Instance->SR1 & I2C_FLAG_BTF && hi2c->State == HAL_I2C_STATE_BUSY_TX) { - if (hi2c->XferCount != 0U) { - hi2c->Instance->DR = *hi2c->pBuffPtr++; - hi2c->XferCount--; - } else { - __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); - if (hi2c->XferOptions != I2C_FIRST_FRAME) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->State = HAL_I2C_STATE_READY; - } - } - - #else - - // if not an F4 MCU, use the HAL's IRQ handler - HAL_I2C_EV_IRQHandler(hi2c); - - #endif -} - -void i2c_er_irq_handler(mp_uint_t i2c_id) { - I2C_HandleTypeDef *hi2c; - - switch (i2c_id) { - #if defined(MICROPY_HW_I2C1_SCL) - case 1: - hi2c = &I2CHandle1; - break; - #endif - #if defined(MICROPY_HW_I2C2_SCL) - case 2: - hi2c = &I2CHandle2; - break; - #endif - #if defined(MICROPY_HW_I2C3_SCL) - case 3: - hi2c = &I2CHandle3; - break; - #endif - #if defined(MICROPY_HW_I2C4_SCL) - case 4: - hi2c = &I2CHandle4; - break; - #endif - default: - return; - } - - #if defined(STM32F4) - - uint32_t sr1 = hi2c->Instance->SR1; - - // I2C Bus error - if (sr1 & I2C_FLAG_BERR) { - hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - } - - // I2C Arbitration Loss error - if (sr1 & I2C_FLAG_ARLO) { - hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - } - - // I2C Acknowledge failure - if (sr1 & I2C_FLAG_AF) { - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - } - - // I2C Over-Run/Under-Run - if (sr1 & I2C_FLAG_OVR) { - hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - } - - #else - - // if not an F4 MCU, use the HAL's IRQ handler - HAL_I2C_ER_IRQHandler(hi2c); - - #endif -} - -STATIC HAL_StatusTypeDef i2c_wait_dma_finished(I2C_HandleTypeDef *i2c, uint32_t timeout) { - // Note: we can't use WFI to idle in this loop because the DMA completion - // interrupt may occur before the WFI. Hence we miss it and have to wait - // until the next sys-tick (up to 1ms). - uint32_t start = HAL_GetTick(); - while (HAL_I2C_GetState(i2c) != HAL_I2C_STATE_READY) { - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/******************************************************************************/ -/* MicroPython bindings */ - -static inline bool in_master_mode(pyb_i2c_obj_t *self) { return self->i2c->Init.OwnAddress1 == PYB_I2C_MASTER_ADDRESS; } - -STATIC void pyb_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_i2c_obj_t *self = self_in; - - uint i2c_num = 0; - if (0) { } - #if defined(MICROPY_HW_I2C1_SCL) - else if (self->i2c->Instance == I2C1) { i2c_num = 1; } - #endif - #if defined(MICROPY_HW_I2C2_SCL) - else if (self->i2c->Instance == I2C2) { i2c_num = 2; } - #endif - #if defined(MICROPY_HW_I2C3_SCL) - else if (self->i2c->Instance == I2C3) { i2c_num = 3; } - #endif - #if defined(MICROPY_HW_I2C4_SCL) - else if (self->i2c->Instance == I2C4) { i2c_num = 4; } - #endif - - if (self->i2c->State == HAL_I2C_STATE_RESET) { - mp_printf(print, "I2C(%u)", i2c_num); - } else { - if (in_master_mode(self)) { - mp_printf(print, "I2C(%u, I2C.MASTER, baudrate=%u)", i2c_num, pyb_i2c_get_baudrate(self->i2c)); - } else { - mp_printf(print, "I2C(%u, I2C.SLAVE, addr=0x%02x)", i2c_num, (self->i2c->Instance->OAR1 >> 1) & 0x7f); - } - } -} - -/// \method init(mode, *, addr=0x12, baudrate=400000, gencall=False) -/// -/// Initialise the I2C bus with the given parameters: -/// -/// - `mode` must be either `I2C.MASTER` or `I2C.SLAVE` -/// - `addr` is the 7-bit address (only sensible for a slave) -/// - `baudrate` is the SCL clock rate (only sensible for a master) -/// - `gencall` is whether to support general call mode -STATIC mp_obj_t pyb_i2c_init_helper(const pyb_i2c_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_INT, {.u_int = PYB_I2C_MASTER} }, - { MP_QSTR_addr, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0x12} }, - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = MICROPY_HW_I2C_BAUDRATE_DEFAULT} }, - { MP_QSTR_gencall, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_dma, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the I2C configuration values - I2C_InitTypeDef *init = &self->i2c->Init; - - if (args[0].u_int == PYB_I2C_MASTER) { - // use a special address to indicate we are a master - init->OwnAddress1 = PYB_I2C_MASTER_ADDRESS; - } else { - init->OwnAddress1 = (args[1].u_int << 1) & 0xfe; - } - - i2c_set_baudrate(init, MIN(args[2].u_int, MICROPY_HW_I2C_BAUDRATE_MAX)); - init->AddressingMode = I2C_ADDRESSINGMODE_7BIT; - init->DualAddressMode = I2C_DUALADDRESS_DISABLED; - init->GeneralCallMode = args[3].u_bool ? I2C_GENERALCALL_ENABLED : I2C_GENERALCALL_DISABLED; - init->OwnAddress2 = 0; // unused - init->NoStretchMode = I2C_NOSTRETCH_DISABLE; - - *self->use_dma = args[4].u_bool; - - // init the I2C bus - i2c_deinit(self->i2c); - pyb_i2c_init(self->i2c); - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct an I2C object on the given bus. `bus` can be 1 or 2. -/// With no additional parameters, the I2C object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the I2C busses are: -/// -/// - `I2C(1)` is on the X position: `(SCL, SDA) = (X9, X10) = (PB6, PB7)` -/// - `I2C(2)` is on the Y position: `(SCL, SDA) = (Y9, Y10) = (PB10, PB11)` -STATIC mp_obj_t pyb_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out i2c bus - int i2c_id = 0; - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { - #ifdef MICROPY_HW_I2C1_NAME - } else if (strcmp(port, MICROPY_HW_I2C1_NAME) == 0) { - i2c_id = 1; - #endif - #ifdef MICROPY_HW_I2C2_NAME - } else if (strcmp(port, MICROPY_HW_I2C2_NAME) == 0) { - i2c_id = 2; - #endif - #ifdef MICROPY_HW_I2C3_NAME - } else if (strcmp(port, MICROPY_HW_I2C3_NAME) == 0) { - i2c_id = 3; - #endif - #ifdef MICROPY_HW_I2C4_NAME - } else if (strcmp(port, MICROPY_HW_I2C4_NAME) == 0) { - i2c_id = 4; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%s) doesn't exist", port)); - } - } else { - i2c_id = mp_obj_get_int(args[0]); - if (i2c_id < 1 || i2c_id > MP_ARRAY_SIZE(pyb_i2c_obj) - || pyb_i2c_obj[i2c_id - 1].i2c == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%d) doesn't exist", i2c_id)); - } - } - - // get I2C object - const pyb_i2c_obj_t *i2c_obj = &pyb_i2c_obj[i2c_id - 1]; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_i2c_init_helper(i2c_obj, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)i2c_obj; -} - -STATIC mp_obj_t pyb_i2c_init_(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_i2c_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_init_obj, 1, pyb_i2c_init_); - -/// \method deinit() -/// Turn off the I2C bus. -STATIC mp_obj_t pyb_i2c_deinit(mp_obj_t self_in) { - pyb_i2c_obj_t *self = self_in; - i2c_deinit(self->i2c); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_deinit_obj, pyb_i2c_deinit); - -/// \method is_ready(addr) -/// Check if an I2C device responds to the given address. Only valid when in master mode. -STATIC mp_obj_t pyb_i2c_is_ready(mp_obj_t self_in, mp_obj_t i2c_addr_o) { - pyb_i2c_obj_t *self = self_in; - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - mp_uint_t i2c_addr = mp_obj_get_int(i2c_addr_o) << 1; - - for (int i = 0; i < 10; i++) { - HAL_StatusTypeDef status = HAL_I2C_IsDeviceReady(self->i2c, i2c_addr, 10, 200); - if (status == HAL_OK) { - return mp_const_true; - } - } - - return mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_i2c_is_ready_obj, pyb_i2c_is_ready); - -/// \method scan() -/// Scan all I2C addresses from 0x08 to 0x77 and return a list of those that respond. -/// Only valid when in master mode. -STATIC mp_obj_t pyb_i2c_scan(mp_obj_t self_in) { - pyb_i2c_obj_t *self = self_in; - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - mp_obj_t list = mp_obj_new_list(0, NULL); - - for (uint addr = 0x08; addr <= 0x77; addr++) { - HAL_StatusTypeDef status = HAL_I2C_IsDeviceReady(self->i2c, addr << 1, 1, 200); - if (status == HAL_OK) { - mp_obj_list_append(list, MP_OBJ_NEW_SMALL_INT(addr)); - } - } - - return list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_scan_obj, pyb_i2c_scan); - -/// \method send(send, addr=0x00, timeout=5000) -/// Send data on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object) -/// - `addr` is the address to send to (only required in master mode) -/// - `timeout` is the timeout in milliseconds to wait for the send -/// -/// Return value: `None`. -STATIC mp_obj_t pyb_i2c_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addr, MP_ARG_INT, {.u_int = PYB_I2C_MASTER_ADDRESS} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - DMA_HandleTypeDef tx_dma; - if (use_dma) { - dma_init(&tx_dma, self->tx_dma_descr, self->i2c); - self->i2c->hdmatx = &tx_dma; - self->i2c->hdmarx = NULL; - } - - // send the data - HAL_StatusTypeDef status; - if (in_master_mode(self)) { - if (args[1].u_int == PYB_I2C_MASTER_ADDRESS) { - if (use_dma) { - dma_deinit(self->tx_dma_descr); - } - mp_raise_TypeError("addr argument required"); - } - mp_uint_t i2c_addr = args[1].u_int << 1; - if (!use_dma) { - status = HAL_I2C_Master_Transmit(self->i2c, i2c_addr, bufinfo.buf, bufinfo.len, args[2].u_int); - } else { - MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len); - status = HAL_I2C_Master_Transmit_DMA(self->i2c, i2c_addr, bufinfo.buf, bufinfo.len); - } - } else { - if (!use_dma) { - status = HAL_I2C_Slave_Transmit(self->i2c, bufinfo.buf, bufinfo.len, args[2].u_int); - } else { - MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len); - status = HAL_I2C_Slave_Transmit_DMA(self->i2c, bufinfo.buf, bufinfo.len); - } - } - - // if we used DMA, wait for it to finish - if (use_dma) { - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[2].u_int); - } - dma_deinit(self->tx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_send_obj, 1, pyb_i2c_send); - -/// \method recv(recv, addr=0x00, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `recv` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes -/// - `addr` is the address to receive from (only required in master mode) -/// - `timeout` is the timeout in milliseconds to wait for the receive -/// -/// Return value: if `recv` is an integer then a new buffer of the bytes received, -/// otherwise the same buffer that was passed in to `recv`. -STATIC mp_obj_t pyb_i2c_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addr, MP_ARG_INT, {.u_int = PYB_I2C_MASTER_ADDRESS} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - DMA_HandleTypeDef rx_dma; - if (use_dma) { - dma_init(&rx_dma, self->rx_dma_descr, self->i2c); - self->i2c->hdmatx = NULL; - self->i2c->hdmarx = &rx_dma; - } - - // receive the data - HAL_StatusTypeDef status; - if (in_master_mode(self)) { - if (args[1].u_int == PYB_I2C_MASTER_ADDRESS) { - mp_raise_TypeError("addr argument required"); - } - mp_uint_t i2c_addr = args[1].u_int << 1; - if (!use_dma) { - status = HAL_I2C_Master_Receive(self->i2c, i2c_addr, (uint8_t*)vstr.buf, vstr.len, args[2].u_int); - } else { - MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len); - status = HAL_I2C_Master_Receive_DMA(self->i2c, i2c_addr, (uint8_t*)vstr.buf, vstr.len); - } - } else { - if (!use_dma) { - status = HAL_I2C_Slave_Receive(self->i2c, (uint8_t*)vstr.buf, vstr.len, args[2].u_int); - } else { - MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len); - status = HAL_I2C_Slave_Receive_DMA(self->i2c, (uint8_t*)vstr.buf, vstr.len); - } - } - - // if we used DMA, wait for it to finish - if (use_dma) { - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[2].u_int); - } - dma_deinit(self->rx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_recv_obj, 1, pyb_i2c_recv); - -/// \method mem_read(data, addr, memaddr, timeout=5000, addr_size=8) -/// -/// Read from the memory of an I2C device: -/// -/// - `data` can be an integer or a buffer to read into -/// - `addr` is the I2C device address -/// - `memaddr` is the memory location within the I2C device -/// - `timeout` is the timeout in milliseconds to wait for the read -/// - `addr_size` selects width of memaddr: 8 or 16 bits -/// -/// Returns the read data. -/// This is only valid in master mode. -STATIC const mp_arg_t pyb_i2c_mem_read_allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - { MP_QSTR_addr_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, -}; - -STATIC mp_obj_t pyb_i2c_mem_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args), pyb_i2c_mem_read_allowed_args, args); - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - // get the buffer to read into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // get the addresses - mp_uint_t i2c_addr = args[1].u_int << 1; - mp_uint_t mem_addr = args[2].u_int; - // determine width of mem_addr; default is 8 bits, entering any other value gives 16 bit width - mp_uint_t mem_addr_size = I2C_MEMADD_SIZE_8BIT; - if (args[4].u_int != 8) { - mem_addr_size = I2C_MEMADD_SIZE_16BIT; - } - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - HAL_StatusTypeDef status; - if (!use_dma) { - status = HAL_I2C_Mem_Read(self->i2c, i2c_addr, mem_addr, mem_addr_size, (uint8_t*)vstr.buf, vstr.len, args[3].u_int); - } else { - DMA_HandleTypeDef rx_dma; - dma_init(&rx_dma, self->rx_dma_descr, self->i2c); - self->i2c->hdmatx = NULL; - self->i2c->hdmarx = &rx_dma; - MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len); - status = HAL_I2C_Mem_Read_DMA(self->i2c, i2c_addr, mem_addr, mem_addr_size, (uint8_t*)vstr.buf, vstr.len); - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[3].u_int); - } - dma_deinit(self->rx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - // return the read data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_mem_read_obj, 1, pyb_i2c_mem_read); - -/// \method mem_write(data, addr, memaddr, timeout=5000, addr_size=8) -/// -/// Write to the memory of an I2C device: -/// -/// - `data` can be an integer or a buffer to write from -/// - `addr` is the I2C device address -/// - `memaddr` is the memory location within the I2C device -/// - `timeout` is the timeout in milliseconds to wait for the write -/// - `addr_size` selects width of memaddr: 8 or 16 bits -/// -/// Returns `None`. -/// This is only valid in master mode. -STATIC mp_obj_t pyb_i2c_mem_write(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args (same as mem_read) - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args), pyb_i2c_mem_read_allowed_args, args); - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - // get the buffer to write from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - // get the addresses - mp_uint_t i2c_addr = args[1].u_int << 1; - mp_uint_t mem_addr = args[2].u_int; - // determine width of mem_addr; default is 8 bits, entering any other value gives 16 bit width - mp_uint_t mem_addr_size = I2C_MEMADD_SIZE_8BIT; - if (args[4].u_int != 8) { - mem_addr_size = I2C_MEMADD_SIZE_16BIT; - } - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - HAL_StatusTypeDef status; - if (!use_dma) { - status = HAL_I2C_Mem_Write(self->i2c, i2c_addr, mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len, args[3].u_int); - } else { - DMA_HandleTypeDef tx_dma; - dma_init(&tx_dma, self->tx_dma_descr, self->i2c); - self->i2c->hdmatx = &tx_dma; - self->i2c->hdmarx = NULL; - MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len); - status = HAL_I2C_Mem_Write_DMA(self->i2c, i2c_addr, mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len); - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[3].u_int); - } - dma_deinit(self->tx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_mem_write_obj, 1, pyb_i2c_mem_write); - -STATIC const mp_rom_map_elem_t pyb_i2c_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_i2c_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_i2c_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_is_ready), MP_ROM_PTR(&pyb_i2c_is_ready_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&pyb_i2c_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_i2c_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_i2c_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem_read), MP_ROM_PTR(&pyb_i2c_mem_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem_write), MP_ROM_PTR(&pyb_i2c_mem_write_obj) }, - - // class constants - /// \constant MASTER - for initialising the bus to master mode - /// \constant SLAVE - for initialising the bus to slave mode - { MP_ROM_QSTR(MP_QSTR_MASTER), MP_ROM_INT(PYB_I2C_MASTER) }, - { MP_ROM_QSTR(MP_QSTR_SLAVE), MP_ROM_INT(PYB_I2C_SLAVE) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_i2c_locals_dict, pyb_i2c_locals_dict_table); - -const mp_obj_type_t pyb_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = pyb_i2c_print, - .make_new = pyb_i2c_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_i2c_locals_dict, -}; - -#endif // MICROPY_PY_PYB_LEGACY && MICROPY_HW_ENABLE_HW_I2C diff --git a/ports/stm32/pybcdc.inf_template b/ports/stm32/pybcdc.inf_template deleted file mode 100644 index 85279ada34..0000000000 --- a/ports/stm32/pybcdc.inf_template +++ /dev/null @@ -1,92 +0,0 @@ -; Windows USB CDC ACM Setup File -; Based on INF files which were: -; Copyright (c) 2000 Microsoft Corporation -; Copyright (C) 2007 Microchip Technology Inc. -; Likely to be covered by the MLPL as found at: -; . - -[Version] -Signature="$Windows NT$" -Class=Ports -ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} -Provider=%MFGNAME% -LayoutFile=layout.inf -DriverVer=03/11/2010,5.1.2600.3 - -[Manufacturer] -%MFGNAME%=DeviceList, NTamd64 - -[DestinationDirs] -DefaultDestDir=12 - -;--------------------------------------------------------------------- -; Windows 2000/XP/Server2003/Vista/Server2008/7 - 32bit Sections - -[DriverInstall.nt] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles.nt -AddReg=DriverInstall.nt.AddReg - -[DriverCopyFiles.nt] -usbser.sys,,,0x20 - -[DriverInstall.nt.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.nt.Services] -AddService=usbser, 0x00000002, DriverService.nt - -[DriverService.nt] -DisplayName=%SERVICE% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -;--------------------------------------------------------------------- -; Windows XP/Server2003/Vista/Server2008/7 - 64bit Sections - -[DriverInstall.NTamd64] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles.NTamd64 -AddReg=DriverInstall.NTamd64.AddReg - -[DriverCopyFiles.NTamd64] -usbser.sys,,,0x20 - -[DriverInstall.NTamd64.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.NTamd64.Services] -AddService=usbser, 0x00000002, DriverService.NTamd64 - -[DriverService.NTamd64] -DisplayName=%SERVICE% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -;--------------------------------------------------------------------- -; Vendor and Product ID Definitions - -[SourceDisksFiles] -[SourceDisksNames] -[DeviceList] -%DESCRIPTION%=DriverInstall, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC} - -[DeviceList.NTamd64] -%DESCRIPTION%=DriverInstall, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC} - -;--------------------------------------------------------------------- -; String Definitions - -[Strings] -MFGFILENAME="pybcdc" -MFGNAME="MicroPython" -DESCRIPTION="Pyboard USB Comm Port" -SERVICE="USB Serial Driver" diff --git a/ports/stm32/pybthread.c b/ports/stm32/pybthread.c deleted file mode 100644 index 6baf88f66b..0000000000 --- a/ports/stm32/pybthread.c +++ /dev/null @@ -1,237 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "gccollect.h" -#include "irq.h" -#include "pybthread.h" - -#if MICROPY_PY_THREAD - -#define PYB_MUTEX_UNLOCKED ((void*)0) -#define PYB_MUTEX_LOCKED ((void*)1) - -// These macros are used when we only need to protect against a thread -// switch; other interrupts are still allowed to proceed. -#define RAISE_IRQ_PRI() raise_irq_pri(IRQ_PRI_PENDSV) -#define RESTORE_IRQ_PRI(state) restore_irq_pri(state) - -extern void __fatal_error(const char*); - -volatile int pyb_thread_enabled; -pyb_thread_t *volatile pyb_thread_all; -pyb_thread_t *volatile pyb_thread_cur; - -static inline void pyb_thread_add_to_runable(pyb_thread_t *thread) { - thread->run_prev = pyb_thread_cur->run_prev; - thread->run_next = pyb_thread_cur; - pyb_thread_cur->run_prev->run_next = thread; - pyb_thread_cur->run_prev = thread; -} - -static inline void pyb_thread_remove_from_runable(pyb_thread_t *thread) { - if (thread->run_next == thread) { - __fatal_error("deadlock"); - } - thread->run_prev->run_next = thread->run_next; - thread->run_next->run_prev = thread->run_prev; -} - -void pyb_thread_init(pyb_thread_t *thread) { - pyb_thread_enabled = 0; - pyb_thread_all = thread; - pyb_thread_cur = thread; - thread->sp = NULL; // will be set when this thread switches out - thread->local_state = 0; // will be set by mp_thread_init - thread->arg = NULL; - thread->stack = &_heap_end; - thread->stack_len = ((uint32_t)&_estack - (uint32_t)&_heap_end) / sizeof(uint32_t); - thread->all_next = NULL; - thread->run_prev = thread; - thread->run_next = thread; - thread->queue_next = NULL; -} - -void pyb_thread_deinit() { - uint32_t irq_state = disable_irq(); - pyb_thread_enabled = 0; - pyb_thread_all = pyb_thread_cur; - pyb_thread_cur->all_next = NULL; - pyb_thread_cur->run_prev = pyb_thread_cur; - pyb_thread_cur->run_next = pyb_thread_cur; - enable_irq(irq_state); -} - -STATIC void pyb_thread_terminate(void) { - uint32_t irq_state = disable_irq(); - pyb_thread_t *thread = pyb_thread_cur; - // take current thread off the run list - pyb_thread_remove_from_runable(thread); - // take current thread off the list of all threads - for (pyb_thread_t **n = (pyb_thread_t**)&pyb_thread_all;; n = &(*n)->all_next) { - if (*n == thread) { - *n = thread->all_next; - break; - } - } - // clean pointers as much as possible to help GC - thread->all_next = NULL; - thread->queue_next = NULL; - thread->stack = NULL; - if (pyb_thread_all->all_next == NULL) { - // only 1 thread left - pyb_thread_enabled = 0; - } - // thread switch will occur after we enable irqs - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - enable_irq(irq_state); - // should not return - __fatal_error("could not terminate"); -} - -uint32_t pyb_thread_new(pyb_thread_t *thread, void *stack, size_t stack_len, void *entry, void *arg) { - uint32_t *stack_top = (uint32_t*)stack + stack_len; // stack is full descending - *--stack_top = 0x01000000; // xPSR (thumb bit set) - *--stack_top = (uint32_t)entry & 0xfffffffe; // pc (must have bit 0 cleared, even for thumb code) - *--stack_top = (uint32_t)pyb_thread_terminate; // lr - *--stack_top = 0; // r12 - *--stack_top = 0; // r3 - *--stack_top = 0; // r2 - *--stack_top = 0; // r1 - *--stack_top = (uint32_t)arg; // r0 - *--stack_top = 0xfffffff9; // lr (return to thread mode, non-FP, use MSP) - stack_top -= 8; // r4-r11 - stack_top -= 16; // s16-s31 (we assume all threads use FP registers) - thread->sp = stack_top; - thread->local_state = 0; - thread->arg = arg; - thread->stack = stack; - thread->stack_len = stack_len; - thread->queue_next = NULL; - uint32_t irq_state = disable_irq(); - pyb_thread_enabled = 1; - thread->all_next = pyb_thread_all; - pyb_thread_all = thread; - pyb_thread_add_to_runable(thread); - enable_irq(irq_state); - return (uint32_t)thread; // success -} - -void pyb_thread_dump(void) { - if (!pyb_thread_enabled) { - printf("THREAD: only main thread\n"); - } else { - printf("THREAD:\n"); - for (pyb_thread_t *th = pyb_thread_all; th != NULL; th = th->all_next) { - bool runable = false; - for (pyb_thread_t *th2 = pyb_thread_cur;; th2 = th2->run_next) { - if (th == th2) { - runable = true; - break; - } - if (th2->run_next == pyb_thread_cur) { - break; - } - } - printf(" id=%p sp=%p sz=%u", th, th->stack, th->stack_len); - if (runable) { - printf(" (runable)"); - } - printf("\n"); - } - } -} - -// should only be called from pendsv_isr_handler -void *pyb_thread_next(void *sp) { - pyb_thread_cur->sp = sp; - pyb_thread_cur = pyb_thread_cur->run_next; - pyb_thread_cur->timeslice = 4; // in milliseconds - return pyb_thread_cur->sp; -} - -void pyb_mutex_init(pyb_mutex_t *m) { - *m = PYB_MUTEX_UNLOCKED; -} - -int pyb_mutex_lock(pyb_mutex_t *m, int wait) { - uint32_t irq_state = RAISE_IRQ_PRI(); - if (*m == PYB_MUTEX_UNLOCKED) { - // mutex is available - *m = PYB_MUTEX_LOCKED; - RESTORE_IRQ_PRI(irq_state); - } else { - // mutex is locked - if (!wait) { - RESTORE_IRQ_PRI(irq_state); - return 0; // failed to lock mutex - } - if (*m == PYB_MUTEX_LOCKED) { - *m = pyb_thread_cur; - } else { - for (pyb_thread_t *n = *m;; n = n->queue_next) { - if (n->queue_next == NULL) { - n->queue_next = pyb_thread_cur; - break; - } - } - } - pyb_thread_cur->queue_next = NULL; - // take current thread off the run list - pyb_thread_remove_from_runable(pyb_thread_cur); - // thread switch will occur after we enable irqs - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - RESTORE_IRQ_PRI(irq_state); - // when we come back we have the mutex - } - return 1; // have mutex -} - -void pyb_mutex_unlock(pyb_mutex_t *m) { - uint32_t irq_state = RAISE_IRQ_PRI(); - if (*m == PYB_MUTEX_LOCKED) { - // no threads are blocked on the mutex - *m = PYB_MUTEX_UNLOCKED; - } else { - // at least one thread is blocked on this mutex - pyb_thread_t *th = *m; - if (th->queue_next == NULL) { - // no other threads are blocked - *m = PYB_MUTEX_LOCKED; - } else { - // at least one other thread is still blocked - *m = th->queue_next; - } - // put unblocked thread on runable list - pyb_thread_add_to_runable(th); - } - RESTORE_IRQ_PRI(irq_state); -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/stm32/pybthread.h b/ports/stm32/pybthread.h deleted file mode 100644 index 42300508c9..0000000000 --- a/ports/stm32/pybthread.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_PYBTHREAD_H -#define MICROPY_INCLUDED_STM32_PYBTHREAD_H - -typedef struct _pyb_thread_t { - void *sp; - uint32_t local_state; - void *arg; // thread Python args, a GC root pointer - void *stack; // pointer to the stack - size_t stack_len; // number of words in the stack - uint32_t timeslice; - struct _pyb_thread_t *all_next; - struct _pyb_thread_t *run_prev; - struct _pyb_thread_t *run_next; - struct _pyb_thread_t *queue_next; -} pyb_thread_t; - -typedef pyb_thread_t *pyb_mutex_t; - -extern volatile int pyb_thread_enabled; -extern pyb_thread_t *volatile pyb_thread_all; -extern pyb_thread_t *volatile pyb_thread_cur; - -void pyb_thread_init(pyb_thread_t *th); -void pyb_thread_deinit(); -uint32_t pyb_thread_new(pyb_thread_t *th, void *stack, size_t stack_len, void *entry, void *arg); -void pyb_thread_dump(void); - -static inline uint32_t pyb_thread_get_id(void) { - return (uint32_t)pyb_thread_cur; -} - -static inline void pyb_thread_set_local(void *value) { - pyb_thread_cur->local_state = (uint32_t)value; -} - -static inline void *pyb_thread_get_local(void) { - return (void*)pyb_thread_cur->local_state; -} - -static inline void pyb_thread_yield(void) { - if (pyb_thread_cur->run_next == pyb_thread_cur) { - __WFI(); - } else { - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - } -} - -void pyb_mutex_init(pyb_mutex_t *m); -int pyb_mutex_lock(pyb_mutex_t *m, int wait); -void pyb_mutex_unlock(pyb_mutex_t *m); - -#endif // MICROPY_INCLUDED_STM32_PYBTHREAD_H diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c deleted file mode 100644 index a7cbbde014..0000000000 --- a/ports/stm32/qspi.c +++ /dev/null @@ -1,282 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mperrno.h" -#include "py/mphal.h" -#include "qspi.h" - -#if defined(MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2) - -void qspi_init(void) { - // Configure pins - mp_hal_pin_config(MICROPY_HW_QSPIFLASH_CS, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, 10); - mp_hal_pin_config(MICROPY_HW_QSPIFLASH_SCK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, 9); - mp_hal_pin_config(MICROPY_HW_QSPIFLASH_IO0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, 9); - mp_hal_pin_config(MICROPY_HW_QSPIFLASH_IO1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, 9); - mp_hal_pin_config(MICROPY_HW_QSPIFLASH_IO2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, 9); - mp_hal_pin_config(MICROPY_HW_QSPIFLASH_IO3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, 9); - - // Bring up the QSPI peripheral - - __HAL_RCC_QSPI_CLK_ENABLE(); - - QUADSPI->CR = - 2 << QUADSPI_CR_PRESCALER_Pos // F_CLK = F_AHB/3 (72MHz when CPU is 216MHz) - | 3 << QUADSPI_CR_FTHRES_Pos // 4 bytes must be available to read/write - #if defined(QUADSPI_CR_FSEL_Pos) - | 0 << QUADSPI_CR_FSEL_Pos // FLASH 1 selected - #endif - #if defined(QUADSPI_CR_DFM_Pos) - | 0 << QUADSPI_CR_DFM_Pos // dual-flash mode disabled - #endif - | 0 << QUADSPI_CR_SSHIFT_Pos // no sample shift - | 1 << QUADSPI_CR_TCEN_Pos // timeout counter enabled - | 1 << QUADSPI_CR_EN_Pos // enable the peripheral - ; - - QUADSPI->DCR = - (MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3 - 1) << QUADSPI_DCR_FSIZE_Pos - | 1 << QUADSPI_DCR_CSHT_Pos // nCS stays high for 2 cycles - | 0 << QUADSPI_DCR_CKMODE_Pos // CLK idles at low state - ; -} - -void qspi_memory_map(void) { - // Enable memory-mapped mode - - QUADSPI->ABR = 0; // disable continuous read mode - QUADSPI->LPTR = 100; // to tune - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 3 << QUADSPI_CCR_FMODE_Pos // memory-mapped mode - | 3 << QUADSPI_CCR_DMODE_Pos // data on 4 lines - | 4 << QUADSPI_CCR_DCYC_Pos // 4 dummy cycles - | 0 << QUADSPI_CCR_ABSIZE_Pos // 8-bit alternate byte - | 3 << QUADSPI_CCR_ABMODE_Pos // alternate byte on 4 lines - | 2 << QUADSPI_CCR_ADSIZE_Pos // 24-bit address size - | 3 << QUADSPI_CCR_ADMODE_Pos // address on 4 lines - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | 0xeb << QUADSPI_CCR_INSTRUCTION_Pos // quad read opcode - ; -} - -STATIC int qspi_ioctl(void *self_in, uint32_t cmd) { - (void)self_in; - switch (cmd) { - case MP_QSPI_IOCTL_INIT: - qspi_init(); - break; - case MP_QSPI_IOCTL_BUS_RELEASE: - // Switch to memory-map mode when bus is idle - qspi_memory_map(); - break; - } - return 0; // success -} - -STATIC void qspi_write_cmd_data(void *self_in, uint8_t cmd, size_t len, uint32_t data) { - (void)self_in; - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag - - if (len == 0) { - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 0 << QUADSPI_CCR_FMODE_Pos // indirect write mode - | 0 << QUADSPI_CCR_DMODE_Pos // no data - | 0 << QUADSPI_CCR_DCYC_Pos // 0 dummy cycles - | 0 << QUADSPI_CCR_ABMODE_Pos // no alternate byte - | 0 << QUADSPI_CCR_ADMODE_Pos // no address - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | cmd << QUADSPI_CCR_INSTRUCTION_Pos // write opcode - ; - } else { - QUADSPI->DLR = len - 1; - - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 0 << QUADSPI_CCR_FMODE_Pos // indirect write mode - | 1 << QUADSPI_CCR_DMODE_Pos // data on 1 line - | 0 << QUADSPI_CCR_DCYC_Pos // 0 dummy cycles - | 0 << QUADSPI_CCR_ABMODE_Pos // no alternate byte - | 0 << QUADSPI_CCR_ADMODE_Pos // no address - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | cmd << QUADSPI_CCR_INSTRUCTION_Pos // write opcode - ; - - // This assumes len==2 - *(uint16_t*)&QUADSPI->DR = data; - } - - // Wait for write to finish - while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { - } - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag -} - -STATIC void qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src) { - (void)self_in; - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag - - if (len == 0) { - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 0 << QUADSPI_CCR_FMODE_Pos // indirect write mode - | 0 << QUADSPI_CCR_DMODE_Pos // no data - | 0 << QUADSPI_CCR_DCYC_Pos // 0 dummy cycles - | 0 << QUADSPI_CCR_ABMODE_Pos // no alternate byte - | 2 << QUADSPI_CCR_ADSIZE_Pos // 24-bit address size - | 1 << QUADSPI_CCR_ADMODE_Pos // address on 1 line - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | cmd << QUADSPI_CCR_INSTRUCTION_Pos // write opcode - ; - - QUADSPI->AR = addr; - } else { - QUADSPI->DLR = len - 1; - - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 0 << QUADSPI_CCR_FMODE_Pos // indirect write mode - | 1 << QUADSPI_CCR_DMODE_Pos // data on 1 line - | 0 << QUADSPI_CCR_DCYC_Pos // 0 dummy cycles - | 0 << QUADSPI_CCR_ABMODE_Pos // no alternate byte - | 2 << QUADSPI_CCR_ADSIZE_Pos // 24-bit address size - | 1 << QUADSPI_CCR_ADMODE_Pos // address on 1 line - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | cmd << QUADSPI_CCR_INSTRUCTION_Pos // write opcode - ; - - QUADSPI->AR = addr; - - // Write out the data 1 byte at a time - while (len) { - while (!(QUADSPI->SR & QUADSPI_SR_FTF)) { - } - *(volatile uint8_t*)&QUADSPI->DR = *src++; - --len; - } - } - - // Wait for write to finish - while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { - } - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag -} - -STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) { - (void)self_in; - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag - - QUADSPI->DLR = len - 1; // number of bytes to read - - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 1 << QUADSPI_CCR_FMODE_Pos // indirect read mode - | 1 << QUADSPI_CCR_DMODE_Pos // data on 1 line - | 0 << QUADSPI_CCR_DCYC_Pos // 0 dummy cycles - | 0 << QUADSPI_CCR_ABMODE_Pos // no alternate byte - | 0 << QUADSPI_CCR_ADMODE_Pos // no address - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | cmd << QUADSPI_CCR_INSTRUCTION_Pos // read opcode - ; - - // Wait for read to finish - while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { - } - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag - - // Read result - return QUADSPI->DR; -} - -STATIC void qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) { - (void)self_in; - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag - - QUADSPI->DLR = len - 1; // number of bytes to read - - QUADSPI->CCR = - 0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled - | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction - | 1 << QUADSPI_CCR_FMODE_Pos // indirect read mode - | 3 << QUADSPI_CCR_DMODE_Pos // data on 4 lines - | 4 << QUADSPI_CCR_DCYC_Pos // 4 dummy cycles - | 0 << QUADSPI_CCR_ABSIZE_Pos // 8-bit alternate byte - | 3 << QUADSPI_CCR_ABMODE_Pos // alternate byte on 4 lines - | 2 << QUADSPI_CCR_ADSIZE_Pos // 24-bit address size - | 3 << QUADSPI_CCR_ADMODE_Pos // address on 4 lines - | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line - | cmd << QUADSPI_CCR_INSTRUCTION_Pos // quad read opcode - ; - - QUADSPI->ABR = 0; // alternate byte: disable continuous read mode - QUADSPI->AR = addr; // addres to read from - - // Read in the data 4 bytes at a time if dest is aligned - if (((uintptr_t)dest & 3) == 0) { - while (len >= 4) { - while (!(QUADSPI->SR & QUADSPI_SR_FTF)) { - } - *(uint32_t*)dest = QUADSPI->DR; - dest += 4; - len -= 4; - } - } - - // Read in remaining data 1 byte at a time - while (len) { - while (!((QUADSPI->SR >> QUADSPI_SR_FLEVEL_Pos) & 0x3f)) { - } - *dest++ = *(volatile uint8_t*)&QUADSPI->DR; - --len; - } - - QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag -} - -const mp_qspi_proto_t qspi_proto = { - .ioctl = qspi_ioctl, - .write_cmd_data = qspi_write_cmd_data, - .write_cmd_addr_data = qspi_write_cmd_addr_data, - .read_cmd = qspi_read_cmd, - .read_cmd_qaddr_qdata = qspi_read_cmd_qaddr_qdata, -}; - -#endif // defined(MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2) diff --git a/ports/stm32/qstrdefsport.h b/ports/stm32/qstrdefsport.h deleted file mode 100644 index 31220c5a42..0000000000 --- a/ports/stm32/qstrdefsport.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// qstrs specific to this port - -Q(boot.py) -Q(main.py) -// Entries for sys.path -Q(/flash) -Q(/flash/lib) -Q(/sd) -Q(/sd/lib) -// for usb modes -Q(MSC+HID) -Q(VCP+MSC) -Q(VCP+HID) -Q(CDC+MSC) -Q(CDC+HID) -Q(/) - - -// The following qstrings not referenced from anywhere in the sources -Q(CDC) -Q(flash) diff --git a/ports/stm32/resethandler.s b/ports/stm32/resethandler.s deleted file mode 100644 index 7f0973346e..0000000000 --- a/ports/stm32/resethandler.s +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - .syntax unified - .cpu cortex-m4 - .thumb - - .section .text.Reset_Handler - .global Reset_Handler - .type Reset_Handler, %function - -Reset_Handler: - /* Save the first argument to pass through to stm32_main */ - mov r4, r0 - - /* Load the stack pointer */ - ldr sp, =_estack - - /* Initialise the data section */ - ldr r1, =_sidata - ldr r2, =_sdata - ldr r3, =_edata - b .data_copy_entry -.data_copy_loop: - ldr r0, [r1], #4 /* Should be 4-aligned to be as fast as possible */ - str r0, [r2], #4 -.data_copy_entry: - cmp r2, r3 - bcc .data_copy_loop - - /* Zero out the BSS section */ - movs r0, #0 - ldr r1, =_sbss - ldr r2, =_ebss - b .bss_zero_entry -.bss_zero_loop: - str r0, [r1], #4 /* Should be 4-aligned to be as fast as possible */ -.bss_zero_entry: - cmp r1, r2 - bcc .bss_zero_loop - - /* Initialise the system and jump to the main code */ - bl SystemInit - mov r0, r4 - b stm32_main - - .size Reset_Handler, .-Reset_Handler diff --git a/ports/stm32/resethandler_m0.s b/ports/stm32/resethandler_m0.s deleted file mode 100644 index bb88e8daef..0000000000 --- a/ports/stm32/resethandler_m0.s +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - .syntax unified - .cpu cortex-m0 - .thumb - - .section .text.Reset_Handler - .global Reset_Handler - .type Reset_Handler, %function - -Reset_Handler: - /* Save the first argument to pass through to stm32_main */ - mov r4, r0 - - /* Load the stack pointer */ - ldr r0, =_estack - mov sp, r0 - - /* Initialise the data section */ - ldr r1, =_sidata - ldr r2, =_sdata - ldr r3, =_edata - b .data_copy_entry -.data_copy_loop: - ldr r0, [r1] - adds r1, #4 - str r0, [r2] - adds r2, #4 -.data_copy_entry: - cmp r2, r3 - bcc .data_copy_loop - - /* Zero out the BSS section */ - movs r0, #0 - ldr r1, =_sbss - ldr r2, =_ebss - b .bss_zero_entry -.bss_zero_loop: - str r0, [r1] - adds r1, #4 -.bss_zero_entry: - cmp r1, r2 - bcc .bss_zero_loop - - /* Initialise the system and jump to the main code */ - bl SystemInit - mov r0, r4 - bl stm32_main - - .size Reset_Handler, .-Reset_Handler diff --git a/ports/stm32/rng.c b/ports/stm32/rng.c deleted file mode 100644 index b23941998a..0000000000 --- a/ports/stm32/rng.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "rng.h" - -#if MICROPY_HW_ENABLE_RNG - -#define RNG_TIMEOUT_MS (10) - -uint32_t rng_get(void) { - // Enable the RNG peripheral if it's not already enabled - if (!(RNG->CR & RNG_CR_RNGEN)) { - #if defined(STM32H7) - // Set RNG Clock source - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - __HAL_RCC_RNG_CONFIG(RCC_RNGCLKSOURCE_PLL); - #endif - __HAL_RCC_RNG_CLK_ENABLE(); - RNG->CR |= RNG_CR_RNGEN; - } - - // Wait for a new random number to be ready, takes on the order of 10us - uint32_t start = HAL_GetTick(); - while (!(RNG->SR & RNG_SR_DRDY)) { - if (HAL_GetTick() - start >= RNG_TIMEOUT_MS) { - return 0; - } - } - - // Get and return the new random number - return RNG->DR; -} - -// Return a 30-bit hardware generated random number. -STATIC mp_obj_t pyb_rng_get(void) { - return mp_obj_new_int(rng_get() >> 2); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_rng_get_obj, pyb_rng_get); - -#else // MICROPY_HW_ENABLE_RNG - -// For MCUs that don't have an RNG we still need to provide a rng_get() function, -// eg for lwIP. A pseudo-RNG is not really ideal but we go with it for now. We -// don't want to use urandom's pRNG because then the user won't see a reproducible -// random stream. - -// Yasmarang random number generator by Ilya Levin -// http://www.literatecode.com/yasmarang -STATIC uint32_t pyb_rng_yasmarang(void) { - static uint32_t pad = 0xeda4baba, n = 69, d = 233; - static uint8_t dat = 0; - - pad += dat + d * n; - pad = (pad << 3) + (pad >> 29); - n = pad | 2; - d ^= (pad << 31) + (pad >> 1); - dat ^= (char)pad ^ (d >> 8) ^ 1; - - return pad ^ (d << 5) ^ (pad >> 18) ^ (dat << 1); -} - -uint32_t rng_get(void) { - return pyb_rng_yasmarang(); -} - -#endif // MICROPY_HW_ENABLE_RNG diff --git a/ports/stm32/rtc.c b/ports/stm32/rtc.c deleted file mode 100644 index c51dfab119..0000000000 --- a/ports/stm32/rtc.c +++ /dev/null @@ -1,752 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "rtc.h" -#include "irq.h" - -/// \moduleref pyb -/// \class RTC - real time clock -/// -/// The RTC is and independent clock that keeps track of the date -/// and time. -/// -/// Example usage: -/// -/// rtc = pyb.RTC() -/// rtc.datetime((2014, 5, 1, 4, 13, 0, 0, 0)) -/// print(rtc.datetime()) - -RTC_HandleTypeDef RTCHandle; - -// rtc_info indicates various things about RTC startup -// it's a bit of a hack at the moment -static mp_uint_t rtc_info; - -// Note: LSI is around (32KHz), these dividers should work either way -// ck_spre(1Hz) = RTCCLK(LSE) /(uwAsynchPrediv + 1)*(uwSynchPrediv + 1) -// modify RTC_ASYNCH_PREDIV & RTC_SYNCH_PREDIV in board//mpconfigport.h to change sub-second ticks -// default is 3906.25 µs, min is ~30.52 µs (will increas Ivbat by ~500nA) -#ifndef RTC_ASYNCH_PREDIV -#define RTC_ASYNCH_PREDIV (0x7f) -#endif -#ifndef RTC_SYNCH_PREDIV -#define RTC_SYNCH_PREDIV (0x00ff) -#endif - -STATIC HAL_StatusTypeDef PYB_RTC_Init(RTC_HandleTypeDef *hrtc); -STATIC void PYB_RTC_MspInit_Kick(RTC_HandleTypeDef *hrtc, bool rtc_use_lse); -STATIC HAL_StatusTypeDef PYB_RTC_MspInit_Finalise(RTC_HandleTypeDef *hrtc); -STATIC void RTC_CalendarConfig(void); - -#if defined(MICROPY_HW_RTC_USE_LSE) && MICROPY_HW_RTC_USE_LSE -STATIC bool rtc_use_lse = true; -#else -STATIC bool rtc_use_lse = false; -#endif -STATIC uint32_t rtc_startup_tick; -STATIC bool rtc_need_init_finalise = false; - -// check if LSE exists -// not well tested, should probably be removed -STATIC bool lse_magic(void) { -#if 0 - uint32_t mode_in = GPIOC->MODER & 0x3fffffff; - uint32_t mode_out = mode_in | 0x40000000; - GPIOC->MODER = mode_out; - GPIOC->OTYPER &= 0x7fff; - GPIOC->BSRRH = 0x8000; - GPIOC->OSPEEDR &= 0x3fffffff; - GPIOC->PUPDR &= 0x3fffffff; - int i = 0xff0; - __IO int d = 0; - uint32_t tc = 0; - __IO uint32_t j; - while (i) { - GPIOC->MODER = mode_out; - GPIOC->MODER = mode_in; - for (j = 0; j < d; j++) ; - i--; - if ((GPIOC->IDR & 0x8000) == 0) { - tc++; - } - } - return (tc < 0xff0)?true:false; -#else - return false; -#endif -} - -void rtc_init_start(bool force_init) { - RTCHandle.Instance = RTC; - - /* Configure RTC prescaler and RTC data registers */ - /* RTC configured as follow: - - Hour Format = Format 24 - - Asynch Prediv = Value according to source clock - - Synch Prediv = Value according to source clock - - OutPut = Output Disable - - OutPutPolarity = High Polarity - - OutPutType = Open Drain */ - RTCHandle.Init.HourFormat = RTC_HOURFORMAT_24; - RTCHandle.Init.AsynchPrediv = RTC_ASYNCH_PREDIV; - RTCHandle.Init.SynchPrediv = RTC_SYNCH_PREDIV; - RTCHandle.Init.OutPut = RTC_OUTPUT_DISABLE; - RTCHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; - RTCHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; - - rtc_need_init_finalise = false; - - if (!force_init) { - if ((RCC->BDCR & (RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) == (RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) { - // LSE is enabled & ready --> no need to (re-)init RTC - // remove Backup Domain write protection - HAL_PWR_EnableBkUpAccess(); - // Clear source Reset Flag - __HAL_RCC_CLEAR_RESET_FLAGS(); - // provide some status information - rtc_info |= 0x40000 | (RCC->BDCR & 7) | (RCC->CSR & 3) << 8; - return; - } else if ((RCC->BDCR & RCC_BDCR_RTCSEL) == RCC_BDCR_RTCSEL_1) { - // LSI configured as the RTC clock source --> no need to (re-)init RTC - // remove Backup Domain write protection - HAL_PWR_EnableBkUpAccess(); - // Clear source Reset Flag - __HAL_RCC_CLEAR_RESET_FLAGS(); - // Turn the LSI on (it may need this even if the RTC is running) - RCC->CSR |= RCC_CSR_LSION; - // provide some status information - rtc_info |= 0x80000 | (RCC->BDCR & 7) | (RCC->CSR & 3) << 8; - return; - } - } - - rtc_startup_tick = HAL_GetTick(); - rtc_info = 0x3f000000 | (rtc_startup_tick & 0xffffff); - if (rtc_use_lse) { - if (lse_magic()) { - // don't even try LSE - rtc_use_lse = false; - rtc_info &= ~0x01000000; - } - } - PYB_RTC_MspInit_Kick(&RTCHandle, rtc_use_lse); -} - -void rtc_init_finalise() { - if (!rtc_need_init_finalise) { - return; - } - - rtc_info = 0x20000000; - if (PYB_RTC_Init(&RTCHandle) != HAL_OK) { - if (rtc_use_lse) { - // fall back to LSI... - rtc_use_lse = false; - rtc_startup_tick = HAL_GetTick(); - PYB_RTC_MspInit_Kick(&RTCHandle, rtc_use_lse); - HAL_PWR_EnableBkUpAccess(); - RTCHandle.State = HAL_RTC_STATE_RESET; - if (PYB_RTC_Init(&RTCHandle) != HAL_OK) { - rtc_info = 0x0100ffff; // indicate error - return; - } - } else { - // init error - rtc_info = 0xffff; // indicate error - return; - } - } - - // record if LSE or LSI is used - rtc_info |= (rtc_use_lse << 28); - - // record how long it took for the RTC to start up - rtc_info |= (HAL_GetTick() - rtc_startup_tick) & 0xffff; - - // fresh reset; configure RTC Calendar - RTC_CalendarConfig(); - #if defined(STM32L4) - if(__HAL_RCC_GET_FLAG(RCC_FLAG_BORRST) != RESET) { - #else - if(__HAL_RCC_GET_FLAG(RCC_FLAG_PORRST) != RESET) { - #endif - // power on reset occurred - rtc_info |= 0x10000; - } - if(__HAL_RCC_GET_FLAG(RCC_FLAG_PINRST) != RESET) { - // external reset occurred - rtc_info |= 0x20000; - } - // Clear source Reset Flag - __HAL_RCC_CLEAR_RESET_FLAGS(); - rtc_need_init_finalise = false; -} - -STATIC HAL_StatusTypeDef PYB_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - /*------------------------------ LSI Configuration -------------------------*/ - if ((RCC_OscInitStruct->OscillatorType & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) { - // Check the LSI State - if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) { - // Enable the Internal Low Speed oscillator (LSI). - __HAL_RCC_LSI_ENABLE(); - } else { - // Disable the Internal Low Speed oscillator (LSI). - __HAL_RCC_LSI_DISABLE(); - } - } - - /*------------------------------ LSE Configuration -------------------------*/ - if ((RCC_OscInitStruct->OscillatorType & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) { - #if !defined(STM32H7) - // Enable Power Clock - __HAL_RCC_PWR_CLK_ENABLE(); - #endif - - // Enable access to the backup domain - HAL_PWR_EnableBkUpAccess(); - uint32_t tickstart = HAL_GetTick(); - - #if defined(STM32F7) || defined(STM32L4) || defined(STM32H7) - //__HAL_RCC_PWR_CLK_ENABLE(); - // Enable write access to Backup domain - //PWR->CR1 |= PWR_CR1_DBP; - // Wait for Backup domain Write protection disable - while ((PWR->CR1 & PWR_CR1_DBP) == RESET) { - if (HAL_GetTick() - tickstart > RCC_DBP_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - #else - // Enable write access to Backup domain - //PWR->CR |= PWR_CR_DBP; - // Wait for Backup domain Write protection disable - while ((PWR->CR & PWR_CR_DBP) == RESET) { - if (HAL_GetTick() - tickstart > RCC_DBP_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - #endif - - // Set the new LSE configuration - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - } - - return HAL_OK; -} - -STATIC HAL_StatusTypeDef PYB_RTC_Init(RTC_HandleTypeDef *hrtc) { - // Check the RTC peripheral state - if (hrtc == NULL) { - return HAL_ERROR; - } - if (hrtc->State == HAL_RTC_STATE_RESET) { - // Allocate lock resource and initialize it - hrtc->Lock = HAL_UNLOCKED; - // Initialize RTC MSP - if (PYB_RTC_MspInit_Finalise(hrtc) != HAL_OK) { - return HAL_ERROR; - } - } - - // Set RTC state - hrtc->State = HAL_RTC_STATE_BUSY; - - // Disable the write protection for RTC registers - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - // Set Initialization mode - if (RTC_EnterInitMode(hrtc) != HAL_OK) { - // Enable the write protection for RTC registers - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - // Set RTC state - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } else { - // Clear RTC_CR FMT, OSEL and POL Bits - hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL)); - // Set RTC_CR register - hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity); - - // Configure the RTC PRER - hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv); - hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16); - - // Exit Initialization mode - hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; - - #if defined(STM32L4) || defined(STM32H7) - hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMOUTTYPE; - hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType); - #elif defined(STM32F7) - hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMTYPE; - hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType); - #else - hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE; - hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType); - #endif - - // Enable the write protection for RTC registers - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - // Set RTC state - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; - } -} - -STATIC void PYB_RTC_MspInit_Kick(RTC_HandleTypeDef *hrtc, bool rtc_use_lse) { - /* To change the source clock of the RTC feature (LSE, LSI), You have to: - - Enable the power clock using __PWR_CLK_ENABLE() - - Enable write access using HAL_PWR_EnableBkUpAccess() function before to - configure the RTC clock source (to be done once after reset). - - Reset the Back up Domain using __HAL_RCC_BACKUPRESET_FORCE() and - __HAL_RCC_BACKUPRESET_RELEASE(). - - Configure the needed RTc clock source */ - - // RTC clock source uses LSE (external crystal) only if relevant - // configuration variable is set. Otherwise it uses LSI (internal osc). - - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - if (rtc_use_lse) { - #if MICROPY_HW_RTC_USE_BYPASS - RCC_OscInitStruct.LSEState = RCC_LSE_BYPASS; - #else - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - #endif - RCC_OscInitStruct.LSIState = RCC_LSI_OFF; - } else { - RCC_OscInitStruct.LSEState = RCC_LSE_OFF; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - } - PYB_RCC_OscConfig(&RCC_OscInitStruct); - - // now ramp up osc. in background and flag calendear init needed - rtc_need_init_finalise = true; -} - -#define PYB_LSE_TIMEOUT_VALUE 1000 // ST docs spec 2000 ms LSE startup, seems to be too pessimistic -#define PYB_LSI_TIMEOUT_VALUE 500 // this is way too pessimistic, typ. < 1ms - -STATIC HAL_StatusTypeDef PYB_RTC_MspInit_Finalise(RTC_HandleTypeDef *hrtc) { - // we already had a kick so now wait for the corresponding ready state... - if (rtc_use_lse) { - // we now have to wait for LSE ready or timeout - uint32_t tickstart = rtc_startup_tick; - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { - if ((HAL_GetTick() - tickstart ) > PYB_LSE_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - } else { - // we now have to wait for LSI ready or timeout - uint32_t tickstart = rtc_startup_tick; - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) { - if ((HAL_GetTick() - tickstart ) > PYB_LSI_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - } - - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; - if (rtc_use_lse) { - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; - } else { - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; - } - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - //Error_Handler(); - return HAL_ERROR; - } - - // enable RTC peripheral clock - __HAL_RCC_RTC_ENABLE(); - return HAL_OK; -} - -STATIC void RTC_CalendarConfig(void) { - // set the date to 1st Jan 2015 - RTC_DateTypeDef date; - date.Year = 15; - date.Month = 1; - date.Date = 1; - date.WeekDay = RTC_WEEKDAY_THURSDAY; - - if(HAL_RTC_SetDate(&RTCHandle, &date, RTC_FORMAT_BIN) != HAL_OK) { - // init error - return; - } - - // set the time to 00:00:00 - RTC_TimeTypeDef time; - time.Hours = 0; - time.Minutes = 0; - time.Seconds = 0; - time.TimeFormat = RTC_HOURFORMAT12_AM; - time.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - time.StoreOperation = RTC_STOREOPERATION_RESET; - - if (HAL_RTC_SetTime(&RTCHandle, &time, RTC_FORMAT_BIN) != HAL_OK) { - // init error - return; - } -} - -/******************************************************************************/ -// MicroPython bindings - -typedef struct _pyb_rtc_obj_t { - mp_obj_base_t base; -} pyb_rtc_obj_t; - -STATIC const pyb_rtc_obj_t pyb_rtc_obj = {{&pyb_rtc_type}}; - -/// \classmethod \constructor() -/// Create an RTC object. -STATIC mp_obj_t pyb_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return constant object - return (mp_obj_t)&pyb_rtc_obj; -} - -// force rtc to re-initialise -mp_obj_t pyb_rtc_init(mp_obj_t self_in) { - rtc_init_start(true); - rtc_init_finalise(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_init_obj, pyb_rtc_init); - -/// \method info() -/// Get information about the startup time and reset source. -/// -/// - The lower 0xffff are the number of milliseconds the RTC took to -/// start up. -/// - Bit 0x10000 is set if a power-on reset occurred. -/// - Bit 0x20000 is set if an external reset occurred -mp_obj_t pyb_rtc_info(mp_obj_t self_in) { - return mp_obj_new_int(rtc_info); -} -MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_info_obj, pyb_rtc_info); - -/// \method datetime([datetimetuple]) -/// Get or set the date and time of the RTC. -/// -/// With no arguments, this method returns an 8-tuple with the current -/// date and time. With 1 argument (being an 8-tuple) it sets the date -/// and time. -/// -/// The 8-tuple has the following format: -/// -/// (year, month, day, weekday, hours, minutes, seconds, subseconds) -/// -/// `weekday` is 1-7 for Monday through Sunday. -/// -/// `subseconds` counts down from 255 to 0 - -#define MEG_DIV_64 (1000000 / 64) -#define MEG_DIV_SCALE ((RTC_SYNCH_PREDIV + 1) / 64) - -#if defined(MICROPY_HW_RTC_USE_US) && MICROPY_HW_RTC_USE_US -uint32_t rtc_subsec_to_us(uint32_t ss) { - return ((RTC_SYNCH_PREDIV - ss) * MEG_DIV_64) / MEG_DIV_SCALE; -} - -uint32_t rtc_us_to_subsec(uint32_t us) { - return RTC_SYNCH_PREDIV - (us * MEG_DIV_SCALE / MEG_DIV_64); -} -#else -#define rtc_us_to_subsec -#define rtc_subsec_to_us -#endif - -mp_obj_t pyb_rtc_datetime(size_t n_args, const mp_obj_t *args) { - rtc_init_finalise(); - if (n_args == 1) { - // get date and time - // note: need to call get time then get date to correctly access the registers - RTC_DateTypeDef date; - RTC_TimeTypeDef time; - HAL_RTC_GetTime(&RTCHandle, &time, RTC_FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, RTC_FORMAT_BIN); - mp_obj_t tuple[8] = { - mp_obj_new_int(2000 + date.Year), - mp_obj_new_int(date.Month), - mp_obj_new_int(date.Date), - mp_obj_new_int(date.WeekDay), - mp_obj_new_int(time.Hours), - mp_obj_new_int(time.Minutes), - mp_obj_new_int(time.Seconds), - mp_obj_new_int(rtc_subsec_to_us(time.SubSeconds)), - }; - return mp_obj_new_tuple(8, tuple); - } else { - // set date and time - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 8, &items); - - RTC_DateTypeDef date; - date.Year = mp_obj_get_int(items[0]) - 2000; - date.Month = mp_obj_get_int(items[1]); - date.Date = mp_obj_get_int(items[2]); - date.WeekDay = mp_obj_get_int(items[3]); - HAL_RTC_SetDate(&RTCHandle, &date, RTC_FORMAT_BIN); - - RTC_TimeTypeDef time; - time.Hours = mp_obj_get_int(items[4]); - time.Minutes = mp_obj_get_int(items[5]); - time.Seconds = mp_obj_get_int(items[6]); - time.TimeFormat = RTC_HOURFORMAT12_AM; - time.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - time.StoreOperation = RTC_STOREOPERATION_SET; - HAL_RTC_SetTime(&RTCHandle, &time, RTC_FORMAT_BIN); - - return mp_const_none; - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_datetime_obj, 1, 2, pyb_rtc_datetime); - -#if defined(STM32F0) -#define RTC_WKUP_IRQn RTC_IRQn -#endif - -// wakeup(None) -// wakeup(ms, callback=None) -// wakeup(wucksel, wut, callback) -mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) { - // wut is wakeup counter start value, wucksel is clock source - // counter is decremented at wucksel rate, and wakes the MCU when it gets to 0 - // wucksel=0b000 is RTC/16 (RTC runs at 32768Hz) - // wucksel=0b001 is RTC/8 - // wucksel=0b010 is RTC/4 - // wucksel=0b011 is RTC/2 - // wucksel=0b100 is 1Hz clock - // wucksel=0b110 is 1Hz clock with 0x10000 added to wut - // so a 1 second wakeup could be wut=2047, wucksel=0b000, or wut=4095, wucksel=0b001, etc - - rtc_init_finalise(); - - // disable wakeup IRQ while we configure it - HAL_NVIC_DisableIRQ(RTC_WKUP_IRQn); - - bool enable = false; - mp_int_t wucksel; - mp_int_t wut; - mp_obj_t callback = mp_const_none; - if (n_args <= 3) { - if (args[1] == mp_const_none) { - // disable wakeup - } else { - // time given in ms - mp_int_t ms = mp_obj_get_int(args[1]); - mp_int_t div = 2; - wucksel = 3; - while (div <= 16 && ms > 2000 * div) { - div *= 2; - wucksel -= 1; - } - if (div <= 16) { - wut = 32768 / div * ms / 1000; - } else { - // use 1Hz clock - wucksel = 4; - wut = ms / 1000; - if (wut > 0x10000) { - // wut too large for 16-bit register, try to offset by 0x10000 - wucksel = 6; - wut -= 0x10000; - if (wut > 0x10000) { - // wut still too large - mp_raise_ValueError("wakeup value too large"); - } - } - } - // wut register should be 1 less than desired value, but guard against wut=0 - if (wut > 0) { - wut -= 1; - } - enable = true; - } - if (n_args == 3) { - callback = args[2]; - } - } else { - // config values given directly - wucksel = mp_obj_get_int(args[1]); - wut = mp_obj_get_int(args[2]); - callback = args[3]; - enable = true; - } - - // set the callback - MP_STATE_PORT(pyb_extint_callback)[22] = callback; - - // disable register write protection - RTC->WPR = 0xca; - RTC->WPR = 0x53; - - // clear WUTE - RTC->CR &= ~(1 << 10); - - // wait until WUTWF is set - while (!(RTC->ISR & (1 << 2))) { - } - - if (enable) { - // program WUT - RTC->WUTR = wut; - - // set WUTIE to enable wakeup interrupts - // set WUTE to enable wakeup - // program WUCKSEL - RTC->CR = (RTC->CR & ~7) | (1 << 14) | (1 << 10) | (wucksel & 7); - - // enable register write protection - RTC->WPR = 0xff; - - // enable external interrupts on line 22 - #if defined(STM32L4) - EXTI->IMR1 |= 1 << 22; - EXTI->RTSR1 |= 1 << 22; - #elif defined(STM32H7) - EXTI_D1->IMR1 |= 1 << 22; - EXTI->RTSR1 |= 1 << 22; - #else - EXTI->IMR |= 1 << 22; - EXTI->RTSR |= 1 << 22; - #endif - - // clear interrupt flags - RTC->ISR &= ~(1 << 10); - #if defined(STM32L4) - EXTI->PR1 = 1 << 22; - #elif defined(STM32H7) - EXTI_D1->PR1 = 1 << 22; - #else - EXTI->PR = 1 << 22; - #endif - - NVIC_SetPriority(RTC_WKUP_IRQn, IRQ_PRI_RTC_WKUP); - HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn); - - //printf("wut=%d wucksel=%d\n", wut, wucksel); - } else { - // clear WUTIE to disable interrupts - RTC->CR &= ~(1 << 14); - - // enable register write protection - RTC->WPR = 0xff; - - // disable external interrupts on line 22 - #if defined(STM32L4) - EXTI->IMR1 &= ~(1 << 22); - #elif defined(STM32H7) - EXTI_D1->IMR1 |= 1 << 22; - #else - EXTI->IMR &= ~(1 << 22); - #endif - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_wakeup_obj, 2, 4, pyb_rtc_wakeup); - -// calibration(None) -// calibration(cal) -// When an integer argument is provided, check that it falls in the range [-511 to 512] -// and set the calibration value; otherwise return calibration value -mp_obj_t pyb_rtc_calibration(size_t n_args, const mp_obj_t *args) { - rtc_init_finalise(); - mp_int_t cal; - if (n_args == 2) { - cal = mp_obj_get_int(args[1]); - mp_uint_t cal_p, cal_m; - if (cal < -511 || cal > 512) { -#if defined(MICROPY_HW_RTC_USE_CALOUT) && MICROPY_HW_RTC_USE_CALOUT - if ((cal & 0xfffe) == 0x0ffe) { - // turn on/off X18 (PC13) 512Hz output - // Note: - // Output will stay active even in VBAT mode (and inrease current) - if (cal & 1) { - HAL_RTCEx_SetCalibrationOutPut(&RTCHandle, RTC_CALIBOUTPUT_512HZ); - } else { - HAL_RTCEx_DeactivateCalibrationOutPut(&RTCHandle); - } - return mp_obj_new_int(cal & 1); - } else { - mp_raise_ValueError("calibration value out of range"); - } -#else - mp_raise_ValueError("calibration value out of range"); -#endif - } - if (cal > 0) { - cal_p = RTC_SMOOTHCALIB_PLUSPULSES_SET; - cal_m = 512 - cal; - } else { - cal_p = RTC_SMOOTHCALIB_PLUSPULSES_RESET; - cal_m = -cal; - } - HAL_RTCEx_SetSmoothCalib(&RTCHandle, RTC_SMOOTHCALIB_PERIOD_32SEC, cal_p, cal_m); - return mp_const_none; - } else { - // printf("CALR = 0x%x\n", (mp_uint_t) RTCHandle.Instance->CALR); // DEBUG - // Test if CALP bit is set in CALR: - if (RTCHandle.Instance->CALR & 0x8000) { - cal = 512 - (RTCHandle.Instance->CALR & 0x1ff); - } else { - cal = -(RTCHandle.Instance->CALR & 0x1ff); - } - return mp_obj_new_int(cal); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_calibration_obj, 1, 2, pyb_rtc_calibration); - -STATIC const mp_rom_map_elem_t pyb_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_rtc_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_rtc_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&pyb_rtc_datetime_obj) }, - { MP_ROM_QSTR(MP_QSTR_wakeup), MP_ROM_PTR(&pyb_rtc_wakeup_obj) }, - { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&pyb_rtc_calibration_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_rtc_locals_dict, pyb_rtc_locals_dict_table); - -const mp_obj_type_t pyb_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = pyb_rtc_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_rtc_locals_dict, -}; diff --git a/ports/stm32/rtc.h b/ports/stm32/rtc.h deleted file mode 100644 index 307f8885e3..0000000000 --- a/ports/stm32/rtc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_RTC_H -#define MICROPY_INCLUDED_STM32_RTC_H - -extern RTC_HandleTypeDef RTCHandle; -extern const mp_obj_type_t pyb_rtc_type; - -void rtc_init_start(bool force_init); -void rtc_init_finalise(void); - -#endif // MICROPY_INCLUDED_STM32_RTC_H diff --git a/ports/stm32/sdcard.c b/ports/stm32/sdcard.c deleted file mode 100644 index 27e7a34b26..0000000000 --- a/ports/stm32/sdcard.c +++ /dev/null @@ -1,589 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs_fat.h" - -#include "sdcard.h" -#include "pin.h" -#include "bufhelper.h" -#include "dma.h" -#include "irq.h" - -#if MICROPY_HW_HAS_SDCARD - -#if defined(STM32F7) || defined(STM32H7) || defined(STM32L4) - -// The F7 has 2 SDMMC units but at the moment we only support using one of them in -// a given build. If a boards config file defines MICROPY_HW_SDMMC2_CK then SDMMC2 -// is used, otherwise SDMMC1 is used. - -#if defined(MICROPY_HW_SDMMC2_CK) -#define SDIO SDMMC2 -#define SDMMC_CLK_ENABLE() __HAL_RCC_SDMMC2_CLK_ENABLE() -#define SDMMC_CLK_DISABLE() __HAL_RCC_SDMMC2_CLK_DISABLE() -#define SDMMC_IRQn SDMMC2_IRQn -#define SDMMC_TX_DMA dma_SDMMC_2_TX -#define SDMMC_RX_DMA dma_SDMMC_2_RX -#else -#define SDIO SDMMC1 -#define SDMMC_CLK_ENABLE() __HAL_RCC_SDMMC1_CLK_ENABLE() -#define SDMMC_CLK_DISABLE() __HAL_RCC_SDMMC1_CLK_DISABLE() -#define SDMMC_IRQn SDMMC1_IRQn -#define SDMMC_TX_DMA dma_SDIO_0_TX -#define SDMMC_RX_DMA dma_SDIO_0_RX -#endif - -// The F7 & L4 series calls the peripheral SDMMC rather than SDIO, so provide some -// #defines for backwards compatability. - -#define SDIO_CLOCK_EDGE_RISING SDMMC_CLOCK_EDGE_RISING -#define SDIO_CLOCK_EDGE_FALLING SDMMC_CLOCK_EDGE_FALLING - -#define SDIO_CLOCK_BYPASS_DISABLE SDMMC_CLOCK_BYPASS_DISABLE -#define SDIO_CLOCK_BYPASS_ENABLE SDMMC_CLOCK_BYPASS_ENABLE - -#define SDIO_CLOCK_POWER_SAVE_DISABLE SDMMC_CLOCK_POWER_SAVE_DISABLE -#define SDIO_CLOCK_POWER_SAVE_ENABLE SDMMC_CLOCK_POWER_SAVE_ENABLE - -#define SDIO_BUS_WIDE_1B SDMMC_BUS_WIDE_1B -#define SDIO_BUS_WIDE_4B SDMMC_BUS_WIDE_4B -#define SDIO_BUS_WIDE_8B SDMMC_BUS_WIDE_8B - -#define SDIO_HARDWARE_FLOW_CONTROL_DISABLE SDMMC_HARDWARE_FLOW_CONTROL_DISABLE -#define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDMMC_HARDWARE_FLOW_CONTROL_ENABLE - -#if defined(STM32H7) -#define GPIO_AF12_SDIO GPIO_AF12_SDIO1 -#define SDIO_IRQHandler SDMMC1_IRQHandler -#define SDIO_TRANSFER_CLK_DIV SDMMC_NSpeed_CLK_DIV -#define SDIO_USE_GPDMA 0 -#else -#define SDIO_TRANSFER_CLK_DIV SDMMC_TRANSFER_CLK_DIV -#define SDIO_USE_GPDMA 1 -#endif - -#else - -// These are definitions for F4 MCUs so there is a common macro across all MCUs. - -#define SDMMC_CLK_ENABLE() __SDIO_CLK_ENABLE() -#define SDMMC_CLK_DISABLE() __SDIO_CLK_DISABLE() -#define SDMMC_IRQn SDIO_IRQn -#define SDMMC_TX_DMA dma_SDIO_0_TX -#define SDMMC_RX_DMA dma_SDIO_0_RX -#define SDIO_USE_GPDMA 1 - -#endif - -// If no custom SDIO pins defined, use the default ones -#ifndef MICROPY_HW_SDMMC_CK - -#define MICROPY_HW_SDMMC_D0 (pin_C8) -#define MICROPY_HW_SDMMC_D1 (pin_C9) -#define MICROPY_HW_SDMMC_D2 (pin_C10) -#define MICROPY_HW_SDMMC_D3 (pin_C11) -#define MICROPY_HW_SDMMC_CK (pin_C12) -#define MICROPY_HW_SDMMC_CMD (pin_D2) - -#endif - -// TODO: Since SDIO is fundamentally half-duplex, we really only need to -// tie up one DMA channel. However, the HAL DMA API doesn't -// seem to provide a convenient way to change the direction. I believe that -// its as simple as changing the CR register and the Init.Direction field -// and make DMA_SetConfig public. - -// TODO: I think that as an optimization, we can allocate these dynamically -// if an sd card is detected. This will save approx 260 bytes of RAM -// when no sdcard was being used. -static SD_HandleTypeDef sd_handle; -#if SDIO_USE_GPDMA -static DMA_HandleTypeDef sd_rx_dma, sd_tx_dma; -#endif - -void sdcard_init(void) { - // invalidate the sd_handle - sd_handle.Instance = NULL; - - // configure SD GPIO - // we do this here an not in HAL_SD_MspInit because it apparently - // makes it more robust to have the pins always pulled high - // Note: the mp_hal_pin_config function will configure the GPIO in - // fast mode which can do up to 50MHz. This should be plenty for SDIO - // which clocks up to 25MHz maximum. - #if defined(MICROPY_HW_SDMMC2_CK) - // Use SDMMC2 peripheral with pins provided by the board's config - mp_hal_pin_config_alt(MICROPY_HW_SDMMC2_CK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(MICROPY_HW_SDMMC2_CMD, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(MICROPY_HW_SDMMC2_D0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(MICROPY_HW_SDMMC2_D1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(MICROPY_HW_SDMMC2_D2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(MICROPY_HW_SDMMC2_D3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - #else - // Default SDIO/SDMMC1 config - mp_hal_pin_config(MICROPY_HW_SDMMC_D0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(MICROPY_HW_SDMMC_D1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(MICROPY_HW_SDMMC_D2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(MICROPY_HW_SDMMC_D3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(MICROPY_HW_SDMMC_CK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(MICROPY_HW_SDMMC_CMD, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - #endif - - // configure the SD card detect pin - // we do this here so we can detect if the SD card is inserted before powering it on - mp_hal_pin_config(MICROPY_HW_SDCARD_DETECT_PIN, MP_HAL_PIN_MODE_INPUT, MICROPY_HW_SDCARD_DETECT_PULL, 0); -} - -void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { - // enable SDIO clock - SDMMC_CLK_ENABLE(); - - #if defined(STM32H7) - // Reset SDMMC - __HAL_RCC_SDMMC1_FORCE_RESET(); - __HAL_RCC_SDMMC1_RELEASE_RESET(); - #endif - - // NVIC configuration for SDIO interrupts - NVIC_SetPriority(SDMMC_IRQn, IRQ_PRI_SDIO); - HAL_NVIC_EnableIRQ(SDMMC_IRQn); - - // GPIO have already been initialised by sdcard_init -} - -void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) { - HAL_NVIC_DisableIRQ(SDMMC_IRQn); - SDMMC_CLK_DISABLE(); -} - -bool sdcard_is_present(void) { - return HAL_GPIO_ReadPin(MICROPY_HW_SDCARD_DETECT_PIN->gpio, MICROPY_HW_SDCARD_DETECT_PIN->pin_mask) == MICROPY_HW_SDCARD_DETECT_PRESENT; -} - -bool sdcard_power_on(void) { - if (!sdcard_is_present()) { - return false; - } - if (sd_handle.Instance) { - return true; - } - - // SD device interface configuration - sd_handle.Instance = SDIO; - sd_handle.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING; - #ifndef STM32H7 - sd_handle.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE; - #endif - sd_handle.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_ENABLE; - sd_handle.Init.BusWide = SDIO_BUS_WIDE_1B; - sd_handle.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE; - sd_handle.Init.ClockDiv = SDIO_TRANSFER_CLK_DIV; - - // init the SD interface, with retry if it's not ready yet - for (int retry = 10; HAL_SD_Init(&sd_handle) != HAL_OK; retry--) { - if (retry == 0) { - goto error; - } - mp_hal_delay_ms(50); - } - - // configure the SD bus width for wide operation - #if defined(STM32F7) - // use maximum SDMMC clock speed on F7 MCUs - sd_handle.Init.ClockBypass = SDMMC_CLOCK_BYPASS_ENABLE; - #endif - if (HAL_SD_ConfigWideBusOperation(&sd_handle, SDIO_BUS_WIDE_4B) != HAL_OK) { - HAL_SD_DeInit(&sd_handle); - goto error; - } - - return true; - -error: - sd_handle.Instance = NULL; - return false; -} - -void sdcard_power_off(void) { - if (!sd_handle.Instance) { - return; - } - HAL_SD_DeInit(&sd_handle); - sd_handle.Instance = NULL; -} - -uint64_t sdcard_get_capacity_in_bytes(void) { - if (sd_handle.Instance == NULL) { - return 0; - } - HAL_SD_CardInfoTypeDef cardinfo; - HAL_SD_GetCardInfo(&sd_handle, &cardinfo); - return (uint64_t)cardinfo.LogBlockNbr * (uint64_t)cardinfo.LogBlockSize; -} - -#if !defined(MICROPY_HW_SDMMC2_CK) -void SDIO_IRQHandler(void) { - IRQ_ENTER(SDIO_IRQn); - HAL_SD_IRQHandler(&sd_handle); - IRQ_EXIT(SDIO_IRQn); -} -#endif - -#if defined(STM32F7) -void SDMMC2_IRQHandler(void) { - IRQ_ENTER(SDMMC2_IRQn); - HAL_SD_IRQHandler(&sd_handle); - IRQ_EXIT(SDMMC2_IRQn); -} -#endif - -STATIC HAL_StatusTypeDef sdcard_wait_finished(SD_HandleTypeDef *sd, uint32_t timeout) { - // Wait for HAL driver to be ready (eg for DMA to finish) - uint32_t start = HAL_GetTick(); - for (;;) { - // Do an atomic check of the state; WFI will exit even if IRQs are disabled - uint32_t irq_state = disable_irq(); - if (sd->State != HAL_SD_STATE_BUSY) { - enable_irq(irq_state); - break; - } - __WFI(); - enable_irq(irq_state); - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - } - - // Wait for SD card to complete the operation - for (;;) { - HAL_SD_CardStateTypedef state = HAL_SD_GetCardState(sd); - if (state == HAL_SD_CARD_TRANSFER) { - return HAL_OK; - } - if (!(state == HAL_SD_CARD_SENDING || state == HAL_SD_CARD_RECEIVING || state == HAL_SD_CARD_PROGRAMMING)) { - return HAL_ERROR; - } - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - __WFI(); - } - return HAL_OK; -} - -mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - // check that SD card is initialised - if (sd_handle.Instance == NULL) { - return HAL_ERROR; - } - - HAL_StatusTypeDef err = HAL_OK; - - // check that dest pointer is aligned on a 4-byte boundary - uint8_t *orig_dest = NULL; - uint32_t saved_word; - if (((uint32_t)dest & 3) != 0) { - // Pointer is not aligned so it needs fixing. - // We could allocate a temporary block of RAM (as sdcard_write_blocks - // does) but instead we are going to use the dest buffer inplace. We - // are going to align the pointer, save the initial word at the aligned - // location, read into the aligned memory, move the memory back to the - // unaligned location, then restore the initial bytes at the aligned - // location. We should have no trouble doing this as those initial - // bytes at the aligned location should be able to be changed for the - // duration of this function call. - orig_dest = dest; - dest = (uint8_t*)((uint32_t)dest & ~3); - saved_word = *(uint32_t*)dest; - } - - if (query_irq() == IRQ_STATE_ENABLED) { - // we must disable USB irqs to prevent MSC contention with SD card - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - - #if SDIO_USE_GPDMA - dma_init(&sd_rx_dma, &SDMMC_RX_DMA, &sd_handle); - sd_handle.hdmarx = &sd_rx_dma; - #endif - - // make sure cache is flushed and invalidated so when DMA updates the RAM - // from reading the peripheral the CPU then reads the new data - MP_HAL_CLEANINVALIDATE_DCACHE(dest, num_blocks * SDCARD_BLOCK_SIZE); - - err = HAL_SD_ReadBlocks_DMA(&sd_handle, dest, block_num, num_blocks); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - - #if SDIO_USE_GPDMA - dma_deinit(&SDMMC_RX_DMA); - sd_handle.hdmarx = NULL; - #endif - - restore_irq_pri(basepri); - } else { - err = HAL_SD_ReadBlocks(&sd_handle, dest, block_num, num_blocks, 60000); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - } - - if (orig_dest != NULL) { - // move the read data to the non-aligned position, and restore the initial bytes - memmove(orig_dest, dest, num_blocks * SDCARD_BLOCK_SIZE); - memcpy(dest, &saved_word, orig_dest - dest); - } - - return err; -} - -mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - // check that SD card is initialised - if (sd_handle.Instance == NULL) { - return HAL_ERROR; - } - - HAL_StatusTypeDef err = HAL_OK; - - // check that src pointer is aligned on a 4-byte boundary - if (((uint32_t)src & 3) != 0) { - // pointer is not aligned, so allocate a temporary block to do the write - uint8_t *src_aligned = m_new_maybe(uint8_t, SDCARD_BLOCK_SIZE); - if (src_aligned == NULL) { - return HAL_ERROR; - } - for (size_t i = 0; i < num_blocks; ++i) { - memcpy(src_aligned, src + i * SDCARD_BLOCK_SIZE, SDCARD_BLOCK_SIZE); - err = sdcard_write_blocks(src_aligned, block_num + i, 1); - if (err != HAL_OK) { - break; - } - } - m_del(uint8_t, src_aligned, SDCARD_BLOCK_SIZE); - return err; - } - - if (query_irq() == IRQ_STATE_ENABLED) { - // we must disable USB irqs to prevent MSC contention with SD card - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - - #if SDIO_USE_GPDMA - dma_init(&sd_tx_dma, &SDMMC_TX_DMA, &sd_handle); - sd_handle.hdmatx = &sd_tx_dma; - #endif - - // make sure cache is flushed to RAM so the DMA can read the correct data - MP_HAL_CLEAN_DCACHE(src, num_blocks * SDCARD_BLOCK_SIZE); - - err = HAL_SD_WriteBlocks_DMA(&sd_handle, (uint8_t*)src, block_num, num_blocks); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - - #if SDIO_USE_GPDMA - dma_deinit(&SDMMC_TX_DMA); - sd_handle.hdmatx = NULL; - #endif - - restore_irq_pri(basepri); - } else { - err = HAL_SD_WriteBlocks(&sd_handle, (uint8_t*)src, block_num, num_blocks, 60000); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - } - - return err; -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the SD card as an object with the block protocol. - -// there is a singleton SDCard object -const mp_obj_base_t pyb_sdcard_obj = {&pyb_sdcard_type}; - -STATIC mp_obj_t pyb_sdcard_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&pyb_sdcard_obj; -} - -STATIC mp_obj_t sd_present(mp_obj_t self) { - return mp_obj_new_bool(sdcard_is_present()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(sd_present_obj, sd_present); - -STATIC mp_obj_t sd_power(mp_obj_t self, mp_obj_t state) { - bool result; - if (mp_obj_is_true(state)) { - result = sdcard_power_on(); - } else { - sdcard_power_off(); - result = true; - } - return mp_obj_new_bool(result); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(sd_power_obj, sd_power); - -STATIC mp_obj_t sd_info(mp_obj_t self) { - if (sd_handle.Instance == NULL) { - return mp_const_none; - } - HAL_SD_CardInfoTypeDef cardinfo; - HAL_SD_GetCardInfo(&sd_handle, &cardinfo); - // cardinfo.SD_csd and cardinfo.SD_cid have lots of info but we don't use them - mp_obj_t tuple[3] = { - mp_obj_new_int_from_ull((uint64_t)cardinfo.LogBlockNbr * (uint64_t)cardinfo.LogBlockSize), - mp_obj_new_int_from_uint(cardinfo.LogBlockSize), - mp_obj_new_int(cardinfo.CardType), - }; - return mp_obj_new_tuple(3, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(sd_info_obj, sd_info); - -// now obsolete, kept for backwards compatibility -STATIC mp_obj_t sd_read(mp_obj_t self, mp_obj_t block_num) { - uint8_t *dest = m_new(uint8_t, SDCARD_BLOCK_SIZE); - mp_uint_t ret = sdcard_read_blocks(dest, mp_obj_get_int(block_num), 1); - - if (ret != 0) { - m_del(uint8_t, dest, SDCARD_BLOCK_SIZE); - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "sdcard_read_blocks failed [%u]", ret)); - } - - return mp_obj_new_bytearray_by_ref(SDCARD_BLOCK_SIZE, dest); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(sd_read_obj, sd_read); - -// now obsolete, kept for backwards compatibility -STATIC mp_obj_t sd_write(mp_obj_t self, mp_obj_t block_num, mp_obj_t data) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len % SDCARD_BLOCK_SIZE != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "writes must be a multiple of %d bytes", SDCARD_BLOCK_SIZE)); - } - - mp_uint_t ret = sdcard_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SDCARD_BLOCK_SIZE); - - if (ret != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "sdcard_write_blocks failed [%u]", ret)); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(sd_write_obj, sd_write); - -STATIC mp_obj_t pyb_sdcard_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = sdcard_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SDCARD_BLOCK_SIZE); - return mp_obj_new_bool(ret == 0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sdcard_readblocks_obj, pyb_sdcard_readblocks); - -STATIC mp_obj_t pyb_sdcard_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = sdcard_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SDCARD_BLOCK_SIZE); - return mp_obj_new_bool(ret == 0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sdcard_writeblocks_obj, pyb_sdcard_writeblocks); - -STATIC mp_obj_t pyb_sdcard_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: - if (!sdcard_power_on()) { - return MP_OBJ_NEW_SMALL_INT(-1); // error - } - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_DEINIT: - sdcard_power_off(); - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_SYNC: - // nothing to do - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_SEC_COUNT: - return MP_OBJ_NEW_SMALL_INT(sdcard_get_capacity_in_bytes() / SDCARD_BLOCK_SIZE); - - case BP_IOCTL_SEC_SIZE: - return MP_OBJ_NEW_SMALL_INT(SDCARD_BLOCK_SIZE); - - default: // unknown command - return MP_OBJ_NEW_SMALL_INT(-1); // error - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sdcard_ioctl_obj, pyb_sdcard_ioctl); - -STATIC const mp_rom_map_elem_t pyb_sdcard_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_present), MP_ROM_PTR(&sd_present_obj) }, - { MP_ROM_QSTR(MP_QSTR_power), MP_ROM_PTR(&sd_power_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&sd_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&sd_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&sd_write_obj) }, - // block device protocol - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_sdcard_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_sdcard_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_sdcard_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_sdcard_locals_dict, pyb_sdcard_locals_dict_table); - -const mp_obj_type_t pyb_sdcard_type = { - { &mp_type_type }, - .name = MP_QSTR_SDCard, - .make_new = pyb_sdcard_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_sdcard_locals_dict, -}; - -void sdcard_init_vfs(fs_user_mount_t *vfs, int part) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->fatfs.part = part; - vfs->readblocks[0] = (mp_obj_t)&pyb_sdcard_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&pyb_sdcard_obj; - vfs->readblocks[2] = (mp_obj_t)sdcard_read_blocks; // native version - vfs->writeblocks[0] = (mp_obj_t)&pyb_sdcard_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&pyb_sdcard_obj; - vfs->writeblocks[2] = (mp_obj_t)sdcard_write_blocks; // native version - vfs->u.ioctl[0] = (mp_obj_t)&pyb_sdcard_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&pyb_sdcard_obj; -} - -#endif // MICROPY_HW_HAS_SDCARD diff --git a/ports/stm32/sdcard.h b/ports/stm32/sdcard.h deleted file mode 100644 index 4afc258aa1..0000000000 --- a/ports/stm32/sdcard.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_SDCARD_H -#define MICROPY_INCLUDED_STM32_SDCARD_H - -// this is a fixed size and should not be changed -#define SDCARD_BLOCK_SIZE (512) - -void sdcard_init(void); -bool sdcard_is_present(void); -bool sdcard_power_on(void); -void sdcard_power_off(void); -uint64_t sdcard_get_capacity_in_bytes(void); - -// these return 0 on success, non-zero on error -mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t pyb_sdcard_type; -extern const struct _mp_obj_base_t pyb_sdcard_obj; - -struct _fs_user_mount_t; -void sdcard_init_vfs(struct _fs_user_mount_t *vfs, int part); - -#endif // MICROPY_INCLUDED_STM32_SDCARD_H diff --git a/ports/stm32/servo.c b/ports/stm32/servo.c deleted file mode 100644 index dc92872ebd..0000000000 --- a/ports/stm32/servo.c +++ /dev/null @@ -1,333 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" -#include "timer.h" -#include "servo.h" - -#if MICROPY_HW_ENABLE_SERVO - -// This file implements the pyb.Servo class which controls standard hobby servo -// motors that have 3-wires (ground, power, signal). -// -// The driver uses hardware PWM to drive servos on pins X1, X2, X3, X4 which are -// assumed to be on PA0, PA1, PA2, PA3 but not necessarily in that order (the -// pins PA0-PA3 are used directly if the X pins are not defined). -// -// TIM2 and TIM5 have CH1-CH4 on PA0-PA3 respectively. They are both 32-bit -// counters with 16-bit prescaler. TIM5 is used by this driver. - -#define PYB_SERVO_NUM (4) - -typedef struct _pyb_servo_obj_t { - mp_obj_base_t base; - const pin_obj_t *pin; - uint8_t pulse_min; // units of 10us - uint8_t pulse_max; // units of 10us - uint8_t pulse_centre; // units of 10us - uint8_t pulse_angle_90; // units of 10us; pulse at 90 degrees, minus pulse_centre - uint8_t pulse_speed_100; // units of 10us; pulse at 100% forward speed, minus pulse_centre - uint16_t pulse_cur; // units of 10us - uint16_t pulse_dest; // units of 10us - int16_t pulse_accum; - uint16_t time_left; -} pyb_servo_obj_t; - -STATIC pyb_servo_obj_t pyb_servo_obj[PYB_SERVO_NUM]; - -void servo_init(void) { - timer_tim5_init(); - - // reset servo objects - for (int i = 0; i < PYB_SERVO_NUM; i++) { - pyb_servo_obj[i].base.type = &pyb_servo_type; - pyb_servo_obj[i].pulse_min = 64; - pyb_servo_obj[i].pulse_max = 242; - pyb_servo_obj[i].pulse_centre = 150; - pyb_servo_obj[i].pulse_angle_90 = 97; - pyb_servo_obj[i].pulse_speed_100 = 70; - pyb_servo_obj[i].pulse_cur = 150; - pyb_servo_obj[i].pulse_dest = 0; - pyb_servo_obj[i].time_left = 0; - } - - // assign servo objects to specific pins (must be some permutation of PA0-PA3) - #ifdef pyb_pin_X1 - pyb_servo_obj[0].pin = pyb_pin_X1; - pyb_servo_obj[1].pin = pyb_pin_X2; - pyb_servo_obj[2].pin = pyb_pin_X3; - pyb_servo_obj[3].pin = pyb_pin_X4; - #else - pyb_servo_obj[0].pin = pin_A0; - pyb_servo_obj[1].pin = pin_A1; - pyb_servo_obj[2].pin = pin_A2; - pyb_servo_obj[3].pin = pin_A3; - #endif -} - -void servo_timer_irq_callback(void) { - bool need_it = false; - for (int i = 0; i < PYB_SERVO_NUM; i++) { - pyb_servo_obj_t *s = &pyb_servo_obj[i]; - if (s->pulse_cur != s->pulse_dest) { - // clamp pulse to within min/max - if (s->pulse_dest < s->pulse_min) { - s->pulse_dest = s->pulse_min; - } else if (s->pulse_dest > s->pulse_max) { - s->pulse_dest = s->pulse_max; - } - // adjust cur to get closer to dest - if (s->time_left <= 1) { - s->pulse_cur = s->pulse_dest; - s->time_left = 0; - } else { - s->pulse_accum += s->pulse_dest - s->pulse_cur; - s->pulse_cur += s->pulse_accum / s->time_left; - s->pulse_accum %= s->time_left; - s->time_left--; - need_it = true; - } - // set the pulse width - *(&TIM5->CCR1 + s->pin->pin) = s->pulse_cur; - } - } - if (need_it) { - __HAL_TIM_ENABLE_IT(&TIM5_Handle, TIM_IT_UPDATE); - } else { - __HAL_TIM_DISABLE_IT(&TIM5_Handle, TIM_IT_UPDATE); - } -} - -STATIC void servo_init_channel(pyb_servo_obj_t *s) { - static const uint8_t channel_table[4] = - {TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, TIM_CHANNEL_4}; - uint32_t channel = channel_table[s->pin->pin]; - - // GPIO configuration - mp_hal_pin_config(s->pin, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, GPIO_AF2_TIM5); - - // PWM mode configuration - TIM_OC_InitTypeDef oc_init; - oc_init.OCMode = TIM_OCMODE_PWM1; - oc_init.Pulse = s->pulse_cur; // units of 10us - oc_init.OCPolarity = TIM_OCPOLARITY_HIGH; - oc_init.OCFastMode = TIM_OCFAST_DISABLE; - HAL_TIM_PWM_ConfigChannel(&TIM5_Handle, &oc_init, channel); - - // start PWM - HAL_TIM_PWM_Start(&TIM5_Handle, channel); -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC mp_obj_t pyb_servo_set(mp_obj_t port, mp_obj_t value) { - int p = mp_obj_get_int(port); - int v = mp_obj_get_int(value); - if (v < 50) { v = 50; } - if (v > 250) { v = 250; } - switch (p) { - case 1: TIM5->CCR1 = v; break; - case 2: TIM5->CCR2 = v; break; - case 3: TIM5->CCR3 = v; break; - case 4: TIM5->CCR4 = v; break; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_2(pyb_servo_set_obj, pyb_servo_set); - -STATIC mp_obj_t pyb_pwm_set(mp_obj_t period, mp_obj_t pulse) { - int pe = mp_obj_get_int(period); - int pu = mp_obj_get_int(pulse); - TIM5->ARR = pe; - TIM5->CCR3 = pu; - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_2(pyb_pwm_set_obj, pyb_pwm_set); - -STATIC void pyb_servo_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_servo_obj_t *self = self_in; - mp_printf(print, "", self - &pyb_servo_obj[0] + 1, 10 * self->pulse_cur); -} - -/// \classmethod \constructor(id) -/// Create a servo object. `id` is 1-4. -STATIC mp_obj_t pyb_servo_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get servo number - mp_int_t servo_id = mp_obj_get_int(args[0]) - 1; - - // check servo number - if (!(0 <= servo_id && servo_id < PYB_SERVO_NUM)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Servo(%d) doesn't exist", servo_id + 1)); - } - - // get and init servo object - pyb_servo_obj_t *s = &pyb_servo_obj[servo_id]; - s->pulse_dest = s->pulse_cur; - s->time_left = 0; - servo_init_channel(s); - - return s; -} - -/// \method pulse_width([value]) -/// Get or set the pulse width in milliseconds. -STATIC mp_obj_t pyb_servo_pulse_width(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get pulse width, in us - return mp_obj_new_int(10 * self->pulse_cur); - } else { - // set pulse width, in us - self->pulse_dest = mp_obj_get_int(args[1]) / 10; - self->time_left = 0; - servo_timer_irq_callback(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_pulse_width_obj, 1, 2, pyb_servo_pulse_width); - -/// \method calibration([pulse_min, pulse_max, pulse_centre, [pulse_angle_90, pulse_speed_100]]) -/// Get or set the calibration of the servo timing. -// TODO should accept 1 arg, a 5-tuple of values to set -STATIC mp_obj_t pyb_servo_calibration(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get calibration values - mp_obj_t tuple[5]; - tuple[0] = mp_obj_new_int(10 * self->pulse_min); - tuple[1] = mp_obj_new_int(10 * self->pulse_max); - tuple[2] = mp_obj_new_int(10 * self->pulse_centre); - tuple[3] = mp_obj_new_int(10 * (self->pulse_angle_90 + self->pulse_centre)); - tuple[4] = mp_obj_new_int(10 * (self->pulse_speed_100 + self->pulse_centre)); - return mp_obj_new_tuple(5, tuple); - } else if (n_args >= 4) { - // set min, max, centre - self->pulse_min = mp_obj_get_int(args[1]) / 10; - self->pulse_max = mp_obj_get_int(args[2]) / 10; - self->pulse_centre = mp_obj_get_int(args[3]) / 10; - if (n_args == 4) { - return mp_const_none; - } else if (n_args == 6) { - self->pulse_angle_90 = mp_obj_get_int(args[4]) / 10 - self->pulse_centre; - self->pulse_speed_100 = mp_obj_get_int(args[5]) / 10 - self->pulse_centre; - return mp_const_none; - } - } - - // bad number of arguments - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "calibration expecting 1, 4 or 6 arguments, got %d", n_args)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_calibration_obj, 1, 6, pyb_servo_calibration); - -/// \method angle([angle, time=0]) -/// Get or set the angle of the servo. -/// -/// - `angle` is the angle to move to in degrees. -/// - `time` is the number of milliseconds to take to get to the specified angle. -STATIC mp_obj_t pyb_servo_angle(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get angle - return mp_obj_new_int((self->pulse_cur - self->pulse_centre) * 90 / self->pulse_angle_90); - } else { -#if MICROPY_PY_BUILTINS_FLOAT - self->pulse_dest = self->pulse_centre + self->pulse_angle_90 * mp_obj_get_float(args[1]) / 90.0; -#else - self->pulse_dest = self->pulse_centre + self->pulse_angle_90 * mp_obj_get_int(args[1]) / 90; -#endif - if (n_args == 2) { - // set angle immediately - self->time_left = 0; - } else { - // set angle over a given time (given in milli seconds) - self->time_left = mp_obj_get_int(args[2]) / 20; - self->pulse_accum = 0; - } - servo_timer_irq_callback(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_angle_obj, 1, 3, pyb_servo_angle); - -/// \method speed([speed, time=0]) -/// Get or set the speed of a continuous rotation servo. -/// -/// - `speed` is the speed to move to change to, between -100 and 100. -/// - `time` is the number of milliseconds to take to get to the specified speed. -STATIC mp_obj_t pyb_servo_speed(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get speed - return mp_obj_new_int((self->pulse_cur - self->pulse_centre) * 100 / self->pulse_speed_100); - } else { -#if MICROPY_PY_BUILTINS_FLOAT - self->pulse_dest = self->pulse_centre + self->pulse_speed_100 * mp_obj_get_float(args[1]) / 100.0; -#else - self->pulse_dest = self->pulse_centre + self->pulse_speed_100 * mp_obj_get_int(args[1]) / 100; -#endif - if (n_args == 2) { - // set speed immediately - self->time_left = 0; - } else { - // set speed over a given time (given in milli seconds) - self->time_left = mp_obj_get_int(args[2]) / 20; - self->pulse_accum = 0; - } - servo_timer_irq_callback(); - return mp_const_none; - } -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_speed_obj, 1, 3, pyb_servo_speed); - -STATIC const mp_rom_map_elem_t pyb_servo_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_servo_pulse_width_obj) }, - { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&pyb_servo_calibration_obj) }, - { MP_ROM_QSTR(MP_QSTR_angle), MP_ROM_PTR(&pyb_servo_angle_obj) }, - { MP_ROM_QSTR(MP_QSTR_speed), MP_ROM_PTR(&pyb_servo_speed_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_servo_locals_dict, pyb_servo_locals_dict_table); - -const mp_obj_type_t pyb_servo_type = { - { &mp_type_type }, - .name = MP_QSTR_Servo, - .print = pyb_servo_print, - .make_new = pyb_servo_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_servo_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_SERVO diff --git a/ports/stm32/servo.h b/ports/stm32/servo.h deleted file mode 100644 index 0160568af1..0000000000 --- a/ports/stm32/servo.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_SERVO_H -#define MICROPY_INCLUDED_STM32_SERVO_H - -void servo_init(void); -void servo_timer_irq_callback(void); - -extern const mp_obj_type_t pyb_servo_type; - -MP_DECLARE_CONST_FUN_OBJ_2(pyb_servo_set_obj); -MP_DECLARE_CONST_FUN_OBJ_2(pyb_pwm_set_obj); - -#endif // MICROPY_INCLUDED_STM32_SERVO_H diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c deleted file mode 100644 index e8621b0ab3..0000000000 --- a/ports/stm32/spi.c +++ /dev/null @@ -1,1032 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_spi.h" -#include "irq.h" -#include "pin.h" -#include "bufhelper.h" -#include "spi.h" - -/// \moduleref pyb -/// \class SPI - a master-driven serial protocol -/// -/// SPI is a serial protocol that is driven by a master. At the physical level -/// there are 3 lines: SCK, MOSI, MISO. -/// -/// See usage model of I2C; SPI is very similar. Main difference is -/// parameters to init the SPI bus: -/// -/// from pyb import SPI -/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7) -/// -/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be -/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1 -/// to sample data on the first or second clock edge respectively. Crc can be -/// None for no CRC, or a polynomial specifier. -/// -/// Additional method for SPI: -/// -/// data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes -/// buf = bytearray(4) -/// spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf -/// spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf - -// Possible DMA configurations for SPI busses: -// SPI1_TX: DMA2_Stream3.CHANNEL_3 or DMA2_Stream5.CHANNEL_3 -// SPI1_RX: DMA2_Stream0.CHANNEL_3 or DMA2_Stream2.CHANNEL_3 -// SPI2_TX: DMA1_Stream4.CHANNEL_0 -// SPI2_RX: DMA1_Stream3.CHANNEL_0 -// SPI3_TX: DMA1_Stream5.CHANNEL_0 or DMA1_Stream7.CHANNEL_0 -// SPI3_RX: DMA1_Stream0.CHANNEL_0 or DMA1_Stream2.CHANNEL_0 -// SPI4_TX: DMA2_Stream4.CHANNEL_5 or DMA2_Stream1.CHANNEL_4 -// SPI4_RX: DMA2_Stream3.CHANNEL_5 or DMA2_Stream0.CHANNEL_4 -// SPI5_TX: DMA2_Stream4.CHANNEL_2 or DMA2_Stream6.CHANNEL_7 -// SPI5_RX: DMA2_Stream3.CHANNEL_2 or DMA2_Stream5.CHANNEL_7 -// SPI6_TX: DMA2_Stream5.CHANNEL_1 -// SPI6_RX: DMA2_Stream6.CHANNEL_1 - -#if defined(MICROPY_HW_SPI1_SCK) -SPI_HandleTypeDef SPIHandle1 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI2_SCK) -SPI_HandleTypeDef SPIHandle2 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI3_SCK) -SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI4_SCK) -SPI_HandleTypeDef SPIHandle4 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI5_SCK) -SPI_HandleTypeDef SPIHandle5 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI6_SCK) -SPI_HandleTypeDef SPIHandle6 = {.Instance = NULL}; -#endif - -const spi_t spi_obj[6] = { - #if defined(MICROPY_HW_SPI1_SCK) - {&SPIHandle1, &dma_SPI_1_TX, &dma_SPI_1_RX}, - #else - {NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI2_SCK) - {&SPIHandle2, &dma_SPI_2_TX, &dma_SPI_2_RX}, - #else - {NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI3_SCK) - {&SPIHandle3, &dma_SPI_3_TX, &dma_SPI_3_RX}, - #else - {NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI4_SCK) - {&SPIHandle4, &dma_SPI_4_TX, &dma_SPI_4_RX}, - #else - {NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI5_SCK) - {&SPIHandle5, &dma_SPI_5_TX, &dma_SPI_5_RX}, - #else - {NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI6_SCK) - {&SPIHandle6, &dma_SPI_6_TX, &dma_SPI_6_RX}, - #else - {NULL, NULL, NULL}, - #endif -}; - -void spi_init0(void) { - // Initialise the SPI handles. - // The structs live on the BSS so all other fields will be zero after a reset. - #if defined(MICROPY_HW_SPI1_SCK) - SPIHandle1.Instance = SPI1; - #endif - #if defined(MICROPY_HW_SPI2_SCK) - SPIHandle2.Instance = SPI2; - #endif - #if defined(MICROPY_HW_SPI3_SCK) - SPIHandle3.Instance = SPI3; - #endif - #if defined(MICROPY_HW_SPI4_SCK) - SPIHandle4.Instance = SPI4; - #endif - #if defined(MICROPY_HW_SPI5_SCK) - SPIHandle5.Instance = SPI5; - #endif - #if defined(MICROPY_HW_SPI6_SCK) - SPIHandle6.Instance = SPI6; - #endif -} - -STATIC int spi_find(mp_obj_t id) { - if (MP_OBJ_IS_STR(id)) { - // given a string id - const char *port = mp_obj_str_get_str(id); - if (0) { - #ifdef MICROPY_HW_SPI1_NAME - } else if (strcmp(port, MICROPY_HW_SPI1_NAME) == 0) { - return 1; - #endif - #ifdef MICROPY_HW_SPI2_NAME - } else if (strcmp(port, MICROPY_HW_SPI2_NAME) == 0) { - return 2; - #endif - #ifdef MICROPY_HW_SPI3_NAME - } else if (strcmp(port, MICROPY_HW_SPI3_NAME) == 0) { - return 3; - #endif - #ifdef MICROPY_HW_SPI4_NAME - } else if (strcmp(port, MICROPY_HW_SPI4_NAME) == 0) { - return 4; - #endif - #ifdef MICROPY_HW_SPI5_NAME - } else if (strcmp(port, MICROPY_HW_SPI5_NAME) == 0) { - return 5; - #endif - #ifdef MICROPY_HW_SPI6_NAME - } else if (strcmp(port, MICROPY_HW_SPI6_NAME) == 0) { - return 6; - #endif - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "SPI(%s) doesn't exist", port)); - } else { - // given an integer id - int spi_id = mp_obj_get_int(id); - if (spi_id >= 1 && spi_id <= MP_ARRAY_SIZE(spi_obj) - && spi_obj[spi_id - 1].spi != NULL) { - return spi_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "SPI(%d) doesn't exist", spi_id)); - } -} - -// sets the parameters in the SPI_InitTypeDef struct -// if an argument is -1 then the corresponding parameter is not changed -STATIC void spi_set_params(const spi_t *spi_obj, uint32_t prescale, int32_t baudrate, - int32_t polarity, int32_t phase, int32_t bits, int32_t firstbit) { - SPI_HandleTypeDef *spi = spi_obj->spi; - SPI_InitTypeDef *init = &spi->Init; - - if (prescale != 0xffffffff || baudrate != -1) { - if (prescale == 0xffffffff) { - // prescaler not given, so select one that yields at most the requested baudrate - mp_uint_t spi_clock; - #if defined(STM32F0) - spi_clock = HAL_RCC_GetPCLK1Freq(); - #else - if (spi->Instance == SPI2 || spi->Instance == SPI3) { - // SPI2 and SPI3 are on APB1 - spi_clock = HAL_RCC_GetPCLK1Freq(); - } else { - // SPI1, SPI4, SPI5 and SPI6 are on APB2 - spi_clock = HAL_RCC_GetPCLK2Freq(); - } - #endif - prescale = spi_clock / baudrate; - } - if (prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; } - else if (prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; } - else if (prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; } - else if (prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; } - else if (prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; } - else if (prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; } - else if (prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; } - else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; } - } - - if (polarity != -1) { - init->CLKPolarity = polarity == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH; - } - - if (phase != -1) { - init->CLKPhase = phase == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE; - } - - if (bits != -1) { - init->DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT; - } - - if (firstbit != -1) { - init->FirstBit = firstbit; - } -} - -// TODO allow to take a list of pins to use -void spi_init(const spi_t *self, bool enable_nss_pin) { - SPI_HandleTypeDef *spi = self->spi; - const pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL }; - - if (0) { - #if defined(MICROPY_HW_SPI1_SCK) - } else if (spi->Instance == SPI1) { - #if defined(MICROPY_HW_SPI1_NSS) - pins[0] = MICROPY_HW_SPI1_NSS; - #endif - pins[1] = MICROPY_HW_SPI1_SCK; - #if defined(MICROPY_HW_SPI1_MISO) - pins[2] = MICROPY_HW_SPI1_MISO; - #endif - pins[3] = MICROPY_HW_SPI1_MOSI; - // enable the SPI clock - __HAL_RCC_SPI1_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI2_SCK) - } else if (spi->Instance == SPI2) { - #if defined(MICROPY_HW_SPI2_NSS) - pins[0] = MICROPY_HW_SPI2_NSS; - #endif - pins[1] = MICROPY_HW_SPI2_SCK; - #if defined(MICROPY_HW_SPI2_MISO) - pins[2] = MICROPY_HW_SPI2_MISO; - #endif - pins[3] = MICROPY_HW_SPI2_MOSI; - // enable the SPI clock - __HAL_RCC_SPI2_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI3_SCK) - } else if (spi->Instance == SPI3) { - #if defined(MICROPY_HW_SPI3_NSS) - pins[0] = MICROPY_HW_SPI3_NSS; - #endif - pins[1] = MICROPY_HW_SPI3_SCK; - #if defined(MICROPY_HW_SPI3_MISO) - pins[2] = MICROPY_HW_SPI3_MISO; - #endif - pins[3] = MICROPY_HW_SPI3_MOSI; - // enable the SPI clock - __HAL_RCC_SPI3_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI4_SCK) - } else if (spi->Instance == SPI4) { - #if defined(MICROPY_HW_SPI4_NSS) - pins[0] = MICROPY_HW_SPI4_NSS; - #endif - pins[1] = MICROPY_HW_SPI4_SCK; - #if defined(MICROPY_HW_SPI4_MISO) - pins[2] = MICROPY_HW_SPI4_MISO; - #endif - pins[3] = MICROPY_HW_SPI4_MOSI; - // enable the SPI clock - __HAL_RCC_SPI4_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI5_SCK) - } else if (spi->Instance == SPI5) { - #if defined(MICROPY_HW_SPI5_NSS) - pins[0] = MICROPY_HW_SPI5_NSS; - #endif - pins[1] = MICROPY_HW_SPI5_SCK; - #if defined(MICROPY_HW_SPI5_MISO) - pins[2] = MICROPY_HW_SPI5_MISO; - #endif - pins[3] = MICROPY_HW_SPI5_MOSI; - // enable the SPI clock - __HAL_RCC_SPI5_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI6_SCK) - } else if (spi->Instance == SPI6) { - #if defined(MICROPY_HW_SPI6_NSS) - pins[0] = MICROPY_HW_SPI6_NSS; - #endif - pins[1] = MICROPY_HW_SPI6_SCK; - #if defined(MICROPY_HW_SPI6_MISO) - pins[2] = MICROPY_HW_SPI6_MISO; - #endif - pins[3] = MICROPY_HW_SPI6_MOSI; - // enable the SPI clock - __HAL_RCC_SPI6_CLK_ENABLE(); - #endif - } else { - // SPI does not exist for this board (shouldn't get here, should be checked by caller) - return; - } - - // init the GPIO lines - uint32_t mode = MP_HAL_PIN_MODE_ALT; - uint32_t pull = spi->Init.CLKPolarity == SPI_POLARITY_LOW ? MP_HAL_PIN_PULL_DOWN : MP_HAL_PIN_PULL_UP; - for (uint i = (enable_nss_pin ? 0 : 1); i < 4; i++) { - if (pins[i] == NULL) { - continue; - } - mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_SPI, (self - &spi_obj[0]) + 1); - } - - // init the SPI device - if (HAL_SPI_Init(spi) != HAL_OK) { - // init error - // TODO should raise an exception, but this function is not necessarily going to be - // called via Python, so may not be properly wrapped in an NLR handler - printf("OSError: HAL_SPI_Init failed\n"); - return; - } - - // After calling HAL_SPI_Init() it seems that the DMA gets disconnected if - // it was previously configured. So we invalidate the DMA channel to force - // an initialisation the next time we use it. - dma_invalidate_channel(self->tx_dma_descr); - dma_invalidate_channel(self->rx_dma_descr); -} - -void spi_deinit(const spi_t *spi_obj) { - SPI_HandleTypeDef *spi = spi_obj->spi; - HAL_SPI_DeInit(spi); - if (0) { - #if defined(MICROPY_HW_SPI1_SCK) - } else if (spi->Instance == SPI1) { - __HAL_RCC_SPI1_FORCE_RESET(); - __HAL_RCC_SPI1_RELEASE_RESET(); - __HAL_RCC_SPI1_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI2_SCK) - } else if (spi->Instance == SPI2) { - __HAL_RCC_SPI2_FORCE_RESET(); - __HAL_RCC_SPI2_RELEASE_RESET(); - __HAL_RCC_SPI2_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI3_SCK) - } else if (spi->Instance == SPI3) { - __HAL_RCC_SPI3_FORCE_RESET(); - __HAL_RCC_SPI3_RELEASE_RESET(); - __HAL_RCC_SPI3_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI4_SCK) - } else if (spi->Instance == SPI4) { - __HAL_RCC_SPI4_FORCE_RESET(); - __HAL_RCC_SPI4_RELEASE_RESET(); - __HAL_RCC_SPI4_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI5_SCK) - } else if (spi->Instance == SPI5) { - __HAL_RCC_SPI5_FORCE_RESET(); - __HAL_RCC_SPI5_RELEASE_RESET(); - __HAL_RCC_SPI5_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI6_SCK) - } else if (spi->Instance == SPI6) { - __HAL_RCC_SPI6_FORCE_RESET(); - __HAL_RCC_SPI6_RELEASE_RESET(); - __HAL_RCC_SPI6_CLK_DISABLE(); - #endif - } -} - -STATIC HAL_StatusTypeDef spi_wait_dma_finished(const spi_t *spi, uint32_t t_start, uint32_t timeout) { - volatile HAL_SPI_StateTypeDef *state = &spi->spi->State; - for (;;) { - // Do an atomic check of the state; WFI will exit even if IRQs are disabled - uint32_t irq_state = disable_irq(); - if (*state == HAL_SPI_STATE_READY) { - enable_irq(irq_state); - return HAL_OK; - } - __WFI(); - enable_irq(irq_state); - if (HAL_GetTick() - t_start >= timeout) { - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -// A transfer of "len" bytes should take len*8*1000/baudrate milliseconds. -// To simplify the calculation we assume the baudrate is never less than 8kHz -// and use that value for the baudrate in the formula, plus a small constant. -#define SPI_TRANSFER_TIMEOUT(len) ((len) + 100) - -STATIC void spi_transfer(const spi_t *self, size_t len, const uint8_t *src, uint8_t *dest, uint32_t timeout) { - // Note: there seems to be a problem sending 1 byte using DMA the first - // time directly after the SPI/DMA is initialised. The cause of this is - // unknown but we sidestep the issue by using polling for 1 byte transfer. - - // Note: DMA transfers are limited to 65535 bytes at a time. - - HAL_StatusTypeDef status; - - if (dest == NULL) { - // send only - if (len == 1 || query_irq() == IRQ_STATE_DISABLED) { - status = HAL_SPI_Transmit(self->spi, (uint8_t*)src, len, timeout); - } else { - DMA_HandleTypeDef tx_dma; - dma_init(&tx_dma, self->tx_dma_descr, self->spi); - self->spi->hdmatx = &tx_dma; - self->spi->hdmarx = NULL; - MP_HAL_CLEAN_DCACHE(src, len); - uint32_t t_start = HAL_GetTick(); - do { - uint32_t l = MIN(len, 65535); - status = HAL_SPI_Transmit_DMA(self->spi, (uint8_t*)src, l); - if (status != HAL_OK) { - break; - } - status = spi_wait_dma_finished(self, t_start, timeout); - if (status != HAL_OK) { - break; - } - len -= l; - src += l; - } while (len); - dma_deinit(self->tx_dma_descr); - } - } else if (src == NULL) { - // receive only - if (len == 1 || query_irq() == IRQ_STATE_DISABLED) { - status = HAL_SPI_Receive(self->spi, dest, len, timeout); - } else { - DMA_HandleTypeDef tx_dma, rx_dma; - if (self->spi->Init.Mode == SPI_MODE_MASTER) { - // in master mode the HAL actually does a TransmitReceive call - dma_init(&tx_dma, self->tx_dma_descr, self->spi); - self->spi->hdmatx = &tx_dma; - } else { - self->spi->hdmatx = NULL; - } - dma_init(&rx_dma, self->rx_dma_descr, self->spi); - self->spi->hdmarx = &rx_dma; - MP_HAL_CLEANINVALIDATE_DCACHE(dest, len); - uint32_t t_start = HAL_GetTick(); - do { - uint32_t l = MIN(len, 65535); - status = HAL_SPI_Receive_DMA(self->spi, dest, l); - if (status != HAL_OK) { - break; - } - status = spi_wait_dma_finished(self, t_start, timeout); - if (status != HAL_OK) { - break; - } - len -= l; - dest += l; - } while (len); - if (self->spi->hdmatx != NULL) { - dma_deinit(self->tx_dma_descr); - } - dma_deinit(self->rx_dma_descr); - } - } else { - // send and receive - if (len == 1 || query_irq() == IRQ_STATE_DISABLED) { - status = HAL_SPI_TransmitReceive(self->spi, (uint8_t*)src, dest, len, timeout); - } else { - DMA_HandleTypeDef tx_dma, rx_dma; - dma_init(&tx_dma, self->tx_dma_descr, self->spi); - self->spi->hdmatx = &tx_dma; - dma_init(&rx_dma, self->rx_dma_descr, self->spi); - self->spi->hdmarx = &rx_dma; - MP_HAL_CLEAN_DCACHE(src, len); - MP_HAL_CLEANINVALIDATE_DCACHE(dest, len); - uint32_t t_start = HAL_GetTick(); - do { - uint32_t l = MIN(len, 65535); - status = HAL_SPI_TransmitReceive_DMA(self->spi, (uint8_t*)src, dest, l); - if (status != HAL_OK) { - break; - } - status = spi_wait_dma_finished(self, t_start, timeout); - if (status != HAL_OK) { - break; - } - len -= l; - src += l; - dest += l; - } while (len); - dma_deinit(self->tx_dma_descr); - dma_deinit(self->rx_dma_descr); - } - } - - if (status != HAL_OK) { - mp_hal_raise(status); - } -} - -STATIC void spi_print(const mp_print_t *print, const spi_t *spi_obj, bool legacy) { - SPI_HandleTypeDef *spi = spi_obj->spi; - - uint spi_num = 1; // default to SPI1 - if (spi->Instance == SPI2) { spi_num = 2; } - #if defined(SPI3) - else if (spi->Instance == SPI3) { spi_num = 3; } - #endif - #if defined(SPI4) - else if (spi->Instance == SPI4) { spi_num = 4; } - #endif - #if defined(SPI5) - else if (spi->Instance == SPI5) { spi_num = 5; } - #endif - #if defined(SPI6) - else if (spi->Instance == SPI6) { spi_num = 6; } - #endif - - mp_printf(print, "SPI(%u", spi_num); - if (spi->State != HAL_SPI_STATE_RESET) { - if (spi->Init.Mode == SPI_MODE_MASTER) { - // compute baudrate - uint spi_clock; - #if defined(STM32F0) - spi_clock = HAL_RCC_GetPCLK1Freq(); - #else - if (spi->Instance == SPI2 || spi->Instance == SPI3) { - // SPI2 and SPI3 are on APB1 - spi_clock = HAL_RCC_GetPCLK1Freq(); - } else { - // SPI1, SPI4, SPI5 and SPI6 are on APB2 - spi_clock = HAL_RCC_GetPCLK2Freq(); - } - #endif - uint log_prescaler = (spi->Init.BaudRatePrescaler >> 3) + 1; - uint baudrate = spi_clock >> log_prescaler; - if (legacy) { - mp_printf(print, ", SPI.MASTER"); - } - mp_printf(print, ", baudrate=%u", baudrate); - if (legacy) { - mp_printf(print, ", prescaler=%u", 1 << log_prescaler); - } - } else { - mp_printf(print, ", SPI.SLAVE"); - } - mp_printf(print, ", polarity=%u, phase=%u, bits=%u", spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16); - if (spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { - mp_printf(print, ", crc=0x%x", spi->Init.CRCPolynomial); - } - } - mp_print_str(print, ")"); -} - -/******************************************************************************/ -/* MicroPython bindings for legacy pyb API */ - -typedef struct _pyb_spi_obj_t { - mp_obj_base_t base; - const spi_t *spi; -} pyb_spi_obj_t; - -STATIC const pyb_spi_obj_t pyb_spi_obj[] = { - {{&pyb_spi_type}, &spi_obj[0]}, - {{&pyb_spi_type}, &spi_obj[1]}, - {{&pyb_spi_type}, &spi_obj[2]}, - {{&pyb_spi_type}, &spi_obj[3]}, - {{&pyb_spi_type}, &spi_obj[4]}, - {{&pyb_spi_type}, &spi_obj[5]}, -}; - -STATIC void pyb_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_spi_obj_t *self = self_in; - spi_print(print, self->spi, true); -} - -/// \method init(mode, baudrate=328125, *, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None) -/// -/// Initialise the SPI bus with the given parameters: -/// -/// - `mode` must be either `SPI.MASTER` or `SPI.SLAVE`. -/// - `baudrate` is the SCK clock rate (only sensible for a master). -STATIC mp_obj_t pyb_spi_init_helper(const pyb_spi_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 328125} }, - { MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_dir, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_DIRECTION_2LINES} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_nss, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_NSS_SOFT} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} }, - { MP_QSTR_ti, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_crc, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the SPI configuration values - SPI_InitTypeDef *init = &self->spi->spi->Init; - init->Mode = args[0].u_int; - - spi_set_params(self->spi, args[2].u_int, args[1].u_int, args[3].u_int, args[4].u_int, - args[6].u_int, args[8].u_int); - - init->Direction = args[5].u_int; - init->NSS = args[7].u_int; - init->TIMode = args[9].u_bool ? SPI_TIMODE_ENABLE : SPI_TIMODE_DISABLE; - if (args[10].u_obj == mp_const_none) { - init->CRCCalculation = SPI_CRCCALCULATION_DISABLE; - init->CRCPolynomial = 0; - } else { - init->CRCCalculation = SPI_CRCCALCULATION_ENABLE; - init->CRCPolynomial = mp_obj_get_int(args[10].u_obj); - } - - // init the SPI bus - spi_init(self->spi, init->NSS != SPI_NSS_SOFT); - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct an SPI object on the given bus. `bus` can be 1 or 2. -/// With no additional parameters, the SPI object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the SPI busses are: -/// -/// - `SPI(1)` is on the X position: `(NSS, SCK, MISO, MOSI) = (X5, X6, X7, X8) = (PA4, PA5, PA6, PA7)` -/// - `SPI(2)` is on the Y position: `(NSS, SCK, MISO, MOSI) = (Y5, Y6, Y7, Y8) = (PB12, PB13, PB14, PB15)` -/// -/// At the moment, the NSS pin is not used by the SPI driver and is free -/// for other use. -STATIC mp_obj_t pyb_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out SPI bus - int spi_id = spi_find(args[0]); - - // get SPI object - const pyb_spi_obj_t *spi_obj = &pyb_spi_obj[spi_id - 1]; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_spi_init_helper(spi_obj, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)spi_obj; -} - -STATIC mp_obj_t pyb_spi_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_spi_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_init_obj, 1, pyb_spi_init); - -/// \method deinit() -/// Turn off the SPI bus. -STATIC mp_obj_t pyb_spi_deinit(mp_obj_t self_in) { - pyb_spi_obj_t *self = self_in; - spi_deinit(self->spi); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_spi_deinit_obj, pyb_spi_deinit); - -/// \method send(send, *, timeout=5000) -/// Send data on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: `None`. -STATIC mp_obj_t pyb_spi_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - // send the data - spi_transfer(self->spi, bufinfo.len, bufinfo.buf, NULL, args[1].u_int); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_obj, 1, pyb_spi_send); - -/// \method recv(recv, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `recv` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `recv` is an integer then a new buffer of the bytes received, -/// otherwise the same buffer that was passed in to `recv`. -STATIC mp_obj_t pyb_spi_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // receive the data - spi_transfer(self->spi, vstr.len, NULL, (uint8_t*)vstr.buf, args[1].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_recv_obj, 1, pyb_spi_recv); - -/// \method send_recv(send, recv=None, *, timeout=5000) -/// -/// Send and receive data on the bus at the same time: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `recv` is a mutable buffer which will be filled with received bytes. -/// It can be the same as `send`, or omitted. If omitted, a new buffer will -/// be created. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: the buffer with the received bytes. -STATIC mp_obj_t pyb_spi_send_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_recv, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get buffers to send from/receive to - mp_buffer_info_t bufinfo_send; - uint8_t data_send[1]; - mp_buffer_info_t bufinfo_recv; - vstr_t vstr_recv; - mp_obj_t o_ret; - - if (args[0].u_obj == args[1].u_obj) { - // same object for send and receive, it must be a r/w buffer - mp_get_buffer_raise(args[0].u_obj, &bufinfo_send, MP_BUFFER_RW); - bufinfo_recv = bufinfo_send; - o_ret = args[0].u_obj; - } else { - // get the buffer to send from - pyb_buf_get_for_send(args[0].u_obj, &bufinfo_send, data_send); - - // get the buffer to receive into - if (args[1].u_obj == MP_OBJ_NULL) { - // only send argument given, so create a fresh buffer of the send length - vstr_init_len(&vstr_recv, bufinfo_send.len); - bufinfo_recv.len = vstr_recv.len; - bufinfo_recv.buf = vstr_recv.buf; - o_ret = MP_OBJ_NULL; - } else { - // recv argument given - mp_get_buffer_raise(args[1].u_obj, &bufinfo_recv, MP_BUFFER_WRITE); - if (bufinfo_recv.len != bufinfo_send.len) { - mp_raise_ValueError("recv must be same length as send"); - } - o_ret = args[1].u_obj; - } - } - - // do the transfer - spi_transfer(self->spi, bufinfo_send.len, bufinfo_send.buf, bufinfo_recv.buf, args[2].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr_recv); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_recv_obj, 1, pyb_spi_send_recv); - -STATIC const mp_rom_map_elem_t pyb_spi_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_spi_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_spi_deinit_obj) }, - - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) }, - - // legacy methods - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_spi_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_spi_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_send_recv), MP_ROM_PTR(&pyb_spi_send_recv_obj) }, - - // class constants - /// \constant MASTER - for initialising the bus to master mode - /// \constant SLAVE - for initialising the bus to slave mode - /// \constant MSB - set the first bit to MSB - /// \constant LSB - set the first bit to LSB - { MP_ROM_QSTR(MP_QSTR_MASTER), MP_ROM_INT(SPI_MODE_MASTER) }, - { MP_ROM_QSTR(MP_QSTR_SLAVE), MP_ROM_INT(SPI_MODE_SLAVE) }, - { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(SPI_FIRSTBIT_MSB) }, - { MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(SPI_FIRSTBIT_LSB) }, - /* TODO - { MP_ROM_QSTR(MP_QSTR_DIRECTION_2LINES ((uint32_t)0x00000000) - { MP_ROM_QSTR(MP_QSTR_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY - { MP_ROM_QSTR(MP_QSTR_DIRECTION_1LINE SPI_CR1_BIDIMODE - { MP_ROM_QSTR(MP_QSTR_NSS_SOFT SPI_CR1_SSM - { MP_ROM_QSTR(MP_QSTR_NSS_HARD_INPUT ((uint32_t)0x00000000) - { MP_ROM_QSTR(MP_QSTR_NSS_HARD_OUTPUT ((uint32_t)0x00040000) - */ -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_spi_locals_dict, pyb_spi_locals_dict_table); - -STATIC void spi_transfer_machine(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - pyb_spi_obj_t *self = (pyb_spi_obj_t*)self_in; - spi_transfer(self->spi, len, src, dest, SPI_TRANSFER_TIMEOUT(len)); -} - -STATIC const mp_machine_spi_p_t pyb_spi_p = { - .transfer = spi_transfer_machine, -}; - -const mp_obj_type_t pyb_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = pyb_spi_print, - .make_new = pyb_spi_make_new, - .protocol = &pyb_spi_p, - .locals_dict = (mp_obj_dict_t*)&pyb_spi_locals_dict, -}; - -/******************************************************************************/ -// Implementation of hard SPI for machine module - -typedef struct _machine_hard_spi_obj_t { - mp_obj_base_t base; - const spi_t *spi; -} machine_hard_spi_obj_t; - -STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = { - {{&machine_hard_spi_type}, &spi_obj[0]}, - {{&machine_hard_spi_type}, &spi_obj[1]}, - {{&machine_hard_spi_type}, &spi_obj[2]}, - {{&machine_hard_spi_type}, &spi_obj[3]}, - {{&machine_hard_spi_type}, &spi_obj[4]}, - {{&machine_hard_spi_type}, &spi_obj[5]}, -}; - -STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_print(print, self->spi, false); -} - -mp_obj_t machine_hard_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get static peripheral object - int spi_id = spi_find(args[ARG_id].u_obj); - const machine_hard_spi_obj_t *self = &machine_hard_spi_obj[spi_id - 1]; - - // here we would check the sck/mosi/miso pins and configure them, but it's not implemented - if (args[ARG_sck].u_obj != MP_OBJ_NULL - || args[ARG_mosi].u_obj != MP_OBJ_NULL - || args[ARG_miso].u_obj != MP_OBJ_NULL) { - mp_raise_ValueError("explicit choice of sck/mosi/miso is not implemented"); - } - - // set the SPI configuration values - SPI_InitTypeDef *init = &self->spi->spi->Init; - init->Mode = SPI_MODE_MASTER; - - // these parameters are not currently configurable - init->Direction = SPI_DIRECTION_2LINES; - init->NSS = SPI_NSS_SOFT; - init->TIMode = SPI_TIMODE_DISABLE; - init->CRCCalculation = SPI_CRCCALCULATION_DISABLE; - init->CRCPolynomial = 0; - - // set configurable paramaters - spi_set_params(self->spi, 0xffffffff, args[ARG_baudrate].u_int, - args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int, - args[ARG_firstbit].u_int); - - // init the SPI bus - spi_init(self->spi, false); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC void machine_hard_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - - enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the SPI configuration values - spi_set_params(self->spi, 0xffffffff, args[ARG_baudrate].u_int, - args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int, - args[ARG_firstbit].u_int); - - // re-init the SPI bus - spi_init(self->spi, false); -} - -STATIC void machine_hard_spi_deinit(mp_obj_base_t *self_in) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_deinit(self->spi); -} - -STATIC void machine_hard_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_transfer(self->spi, len, src, dest, SPI_TRANSFER_TIMEOUT(len)); -} - -STATIC const mp_machine_spi_p_t machine_hard_spi_p = { - .init = machine_hard_spi_init, - .deinit = machine_hard_spi_deinit, - .transfer = machine_hard_spi_transfer, -}; - -const mp_obj_type_t machine_hard_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = machine_hard_spi_print, - .make_new = mp_machine_spi_make_new, // delegate to master constructor - .protocol = &machine_hard_spi_p, - .locals_dict = (mp_obj_t)&mp_machine_spi_locals_dict, -}; - -const spi_t *spi_from_mp_obj(mp_obj_t o) { - if (MP_OBJ_IS_TYPE(o, &pyb_spi_type)) { - pyb_spi_obj_t *self = o; - return self->spi; - } else if (MP_OBJ_IS_TYPE(o, &machine_hard_spi_type)) { - machine_hard_spi_obj_t *self = o;; - return self->spi; - } else { - mp_raise_TypeError("expecting an SPI object"); - } -} diff --git a/ports/stm32/spi.h b/ports/stm32/spi.h deleted file mode 100644 index 41f91b2896..0000000000 --- a/ports/stm32/spi.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_SPI_H -#define MICROPY_INCLUDED_STM32_SPI_H - -#include "dma.h" - -typedef struct _spi_t { - SPI_HandleTypeDef *spi; - const dma_descr_t *tx_dma_descr; - const dma_descr_t *rx_dma_descr; -} spi_t; - -extern SPI_HandleTypeDef SPIHandle1; -extern SPI_HandleTypeDef SPIHandle2; -extern SPI_HandleTypeDef SPIHandle3; -extern SPI_HandleTypeDef SPIHandle4; -extern SPI_HandleTypeDef SPIHandle5; -extern SPI_HandleTypeDef SPIHandle6; - -extern const spi_t spi_obj[6]; - -extern const mp_obj_type_t pyb_spi_type; -extern const mp_obj_type_t machine_soft_spi_type; -extern const mp_obj_type_t machine_hard_spi_type; - -void spi_init0(void); -void spi_init(const spi_t *spi, bool enable_nss_pin); -const spi_t *spi_from_mp_obj(mp_obj_t o); - -#endif // MICROPY_INCLUDED_STM32_SPI_H diff --git a/ports/stm32/spibdev.c b/ports/stm32/spibdev.c deleted file mode 100644 index 368e639665..0000000000 --- a/ports/stm32/spibdev.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/mperrno.h" -#include "irq.h" -#include "led.h" -#include "storage.h" - -#if MICROPY_HW_ENABLE_STORAGE - -int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) { - switch (op) { - case BDEV_IOCTL_INIT: - bdev->spiflash.config = (const mp_spiflash_config_t*)arg; - mp_spiflash_init(&bdev->spiflash); - bdev->flash_tick_counter_last_write = 0; - return 0; - - case BDEV_IOCTL_IRQ_HANDLER: - if ((bdev->spiflash.flags & 1) && HAL_GetTick() - bdev->flash_tick_counter_last_write >= 1000) { - mp_spiflash_cache_flush(&bdev->spiflash); - led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off - } - return 0; - - case BDEV_IOCTL_SYNC: - if (bdev->spiflash.flags & 1) { - // we must disable USB irqs to prevent MSC contention with SPI flash - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - mp_spiflash_cache_flush(&bdev->spiflash); - led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off - restore_irq_pri(basepri); - } - return 0; - } - return -MP_EINVAL; -} - -int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - // we must disable USB irqs to prevent MSC contention with SPI flash - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - mp_spiflash_cached_read(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest); - restore_irq_pri(basepri); - - return 0; -} - -int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - // we must disable USB irqs to prevent MSC contention with SPI flash - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - int ret = mp_spiflash_cached_write(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, src); - if (bdev->spiflash.flags & 1) { - led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on - bdev->flash_tick_counter_last_write = HAL_GetTick(); - } - restore_irq_pri(basepri); - - return ret; -} - -#endif diff --git a/ports/stm32/stm32_it.c b/ports/stm32/stm32_it.c deleted file mode 100644 index a2a8d0f2e5..0000000000 --- a/ports/stm32/stm32_it.c +++ /dev/null @@ -1,915 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Original template from ST Cube library. See below for header. - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -/** - ****************************************************************************** - * @file Templates/Src/stm32f4xx_it.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Main Interrupt Service Routines. - * This file provides template for all exceptions handler and - * peripherals interrupt service routine. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -#include - -#include "py/obj.h" -#include "py/mphal.h" -#include "stm32_it.h" -#include "pendsv.h" -#include "irq.h" -#include "pybthread.h" -#include "gccollect.h" -#include "extint.h" -#include "timer.h" -#include "uart.h" -#include "storage.h" -#include "can.h" -#include "dma.h" -#include "i2c.h" -#include "usb.h" - -extern void __fatal_error(const char*); -#if defined(MICROPY_HW_USB_FS) -extern PCD_HandleTypeDef pcd_fs_handle; -#endif -#if defined(MICROPY_HW_USB_HS) -extern PCD_HandleTypeDef pcd_hs_handle; -#endif - -/******************************************************************************/ -/* Cortex-M4 Processor Exceptions Handlers */ -/******************************************************************************/ - -// Set the following to 1 to get some more information on the Hard Fault -// More information about decoding the fault registers can be found here: -// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0646a/Cihdjcfc.html - -STATIC char *fmt_hex(uint32_t val, char *buf) { - const char *hexDig = "0123456789abcdef"; - - buf[0] = hexDig[(val >> 28) & 0x0f]; - buf[1] = hexDig[(val >> 24) & 0x0f]; - buf[2] = hexDig[(val >> 20) & 0x0f]; - buf[3] = hexDig[(val >> 16) & 0x0f]; - buf[4] = hexDig[(val >> 12) & 0x0f]; - buf[5] = hexDig[(val >> 8) & 0x0f]; - buf[6] = hexDig[(val >> 4) & 0x0f]; - buf[7] = hexDig[(val >> 0) & 0x0f]; - buf[8] = '\0'; - - return buf; -} - -STATIC void print_reg(const char *label, uint32_t val) { - char hexStr[9]; - - mp_hal_stdout_tx_str(label); - mp_hal_stdout_tx_str(fmt_hex(val, hexStr)); - mp_hal_stdout_tx_str("\r\n"); -} - -STATIC void print_hex_hex(const char *label, uint32_t val1, uint32_t val2) { - char hex_str[9]; - mp_hal_stdout_tx_str(label); - mp_hal_stdout_tx_str(fmt_hex(val1, hex_str)); - mp_hal_stdout_tx_str(" "); - mp_hal_stdout_tx_str(fmt_hex(val2, hex_str)); - mp_hal_stdout_tx_str("\r\n"); -} - -// The ARMv7M Architecture manual (section B.1.5.6) says that upon entry -// to an exception, that the registers will be in the following order on the -// // stack: R0, R1, R2, R3, R12, LR, PC, XPSR - -typedef struct { - uint32_t r0, r1, r2, r3, r12, lr, pc, xpsr; -} ExceptionRegisters_t; - -int pyb_hard_fault_debug = 0; - -void HardFault_C_Handler(ExceptionRegisters_t *regs) { - if (!pyb_hard_fault_debug) { - NVIC_SystemReset(); - } - - #if MICROPY_HW_ENABLE_USB - // We need to disable the USB so it doesn't try to write data out on - // the VCP and then block indefinitely waiting for the buffer to drain. - pyb_usb_flags = 0; - #endif - - mp_hal_stdout_tx_str("HardFault\r\n"); - - print_reg("R0 ", regs->r0); - print_reg("R1 ", regs->r1); - print_reg("R2 ", regs->r2); - print_reg("R3 ", regs->r3); - print_reg("R12 ", regs->r12); - print_reg("SP ", (uint32_t)regs); - print_reg("LR ", regs->lr); - print_reg("PC ", regs->pc); - print_reg("XPSR ", regs->xpsr); - - #if __CORTEX_M >= 3 - uint32_t cfsr = SCB->CFSR; - - print_reg("HFSR ", SCB->HFSR); - print_reg("CFSR ", cfsr); - if (cfsr & 0x80) { - print_reg("MMFAR ", SCB->MMFAR); - } - if (cfsr & 0x8000) { - print_reg("BFAR ", SCB->BFAR); - } - #endif - - if ((void*)&_ram_start <= (void*)regs && (void*)regs < (void*)&_ram_end) { - mp_hal_stdout_tx_str("Stack:\r\n"); - uint32_t *stack_top = &_estack; - if ((void*)regs < (void*)&_heap_end) { - // stack not in static stack area so limit the amount we print - stack_top = (uint32_t*)regs + 32; - } - for (uint32_t *sp = (uint32_t*)regs; sp < stack_top; ++sp) { - print_hex_hex(" ", (uint32_t)sp, *sp); - } - } - - /* Go to infinite loop when Hard Fault exception occurs */ - while (1) { - __fatal_error("HardFault"); - } -} - -// Naked functions have no compiler generated gunk, so are the best thing to -// use for asm functions. -__attribute__((naked)) -void HardFault_Handler(void) { - - // From the ARMv7M Architecture Reference Manual, section B.1.5.6 - // on entry to the Exception, the LR register contains, amongst other - // things, the value of CONTROL.SPSEL. This can be found in bit 3. - // - // If CONTROL.SPSEL is 0, then the exception was stacked up using the - // main stack pointer (aka MSP). If CONTROL.SPSEL is 1, then the exception - // was stacked up using the process stack pointer (aka PSP). - - #if __CORTEX_M == 0 - __asm volatile( - " mov r0, lr \n" - " lsr r0, r0, #3 \n" // Shift Bit 3 into carry to see which stack pointer we should use. - " mrs r0, msp \n" // Make R0 point to main stack pointer - " bcc .use_msp \n" // Keep MSP in R0 if SPSEL (carry) is 0 - " mrs r0, psp \n" // Make R0 point to process stack pointer - " .use_msp: \n" - " b HardFault_C_Handler \n" // Off to C land - ); - #else - __asm volatile( - " tst lr, #4 \n" // Test Bit 3 to see which stack pointer we should use. - " ite eq \n" // Tell the assembler that the nest 2 instructions are if-then-else - " mrseq r0, msp \n" // Make R0 point to main stack pointer - " mrsne r0, psp \n" // Make R0 point to process stack pointer - " b HardFault_C_Handler \n" // Off to C land - ); - #endif -} - -/** - * @brief This function handles NMI exception. - * @param None - * @retval None - */ -void NMI_Handler(void) { -} - -/** - * @brief This function handles Memory Manage exception. - * @param None - * @retval None - */ -void MemManage_Handler(void) { - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) { - __fatal_error("MemManage"); - } -} - -/** - * @brief This function handles Bus Fault exception. - * @param None - * @retval None - */ -void BusFault_Handler(void) { - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) { - __fatal_error("BusFault"); - } -} - -/** - * @brief This function handles Usage Fault exception. - * @param None - * @retval None - */ -void UsageFault_Handler(void) { - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) { - __fatal_error("UsageFault"); - } -} - -/** - * @brief This function handles SVCall exception. - * @param None - * @retval None - */ -void SVC_Handler(void) { -} - -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -void DebugMon_Handler(void) { -} - -/** - * @brief This function handles PendSVC exception. - * @param None - * @retval None - */ -void PendSV_Handler(void) { - pendsv_isr_handler(); -} - -/** - * @brief This function handles SysTick Handler. - * @param None - * @retval None - */ -void SysTick_Handler(void) { - // Instead of calling HAL_IncTick we do the increment here of the counter. - // This is purely for efficiency, since SysTick is called 1000 times per - // second at the highest interrupt priority. - // Note: we don't need uwTick to be declared volatile here because this is - // the only place where it can be modified, and the code is more efficient - // without the volatile specifier. - extern uint32_t uwTick; - uwTick += 1; - - // Read the systick control regster. This has the side effect of clearing - // the COUNTFLAG bit, which makes the logic in mp_hal_ticks_us - // work properly. - SysTick->CTRL; - - // Right now we have the storage and DMA controllers to process during - // this interrupt and we use custom dispatch handlers. If this needs to - // be generalised in the future then a dispatch table can be used as - // follows: ((void(*)(void))(systick_dispatch[uwTick & 0xf]))(); - - #if MICROPY_HW_ENABLE_STORAGE - if (STORAGE_IDLE_TICK(uwTick)) { - NVIC->STIR = FLASH_IRQn; - } - #endif - - if (DMA_IDLE_ENABLED() && DMA_IDLE_TICK(uwTick)) { - dma_idle_handler(uwTick); - } - - #if MICROPY_PY_THREAD - if (pyb_thread_enabled) { - if (pyb_thread_cur->timeslice == 0) { - if (pyb_thread_cur->run_next != pyb_thread_cur) { - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - } - } else { - --pyb_thread_cur->timeslice; - } - } - #endif -} - -/******************************************************************************/ -/* STM32F4xx Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f4xx.s). */ -/******************************************************************************/ - -/** - * @brief This function handles USB-On-The-Go FS global interrupt request. - * @param None - * @retval None - */ -#if MICROPY_HW_USB_FS -void OTG_FS_IRQHandler(void) { - IRQ_ENTER(OTG_FS_IRQn); - HAL_PCD_IRQHandler(&pcd_fs_handle); - IRQ_EXIT(OTG_FS_IRQn); -} -#endif -#if MICROPY_HW_USB_HS -void OTG_HS_IRQHandler(void) { - IRQ_ENTER(OTG_HS_IRQn); - HAL_PCD_IRQHandler(&pcd_hs_handle); - IRQ_EXIT(OTG_HS_IRQn); -} -#endif - -#if MICROPY_HW_USB_FS || MICROPY_HW_USB_HS -/** - * @brief This function handles USB OTG Common FS/HS Wakeup functions. - * @param *pcd_handle for FS or HS - * @retval None - */ -STATIC void OTG_CMD_WKUP_Handler(PCD_HandleTypeDef *pcd_handle) { - - if (pcd_handle->Init.low_power_enable) { - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - - /* Configures system clock after wake-up from STOP: enable HSE, PLL and select - PLL as system clock source (HSE and PLL are disabled in STOP mode) */ - - __HAL_RCC_HSE_CONFIG(MICROPY_HW_CLK_HSE_STATE); - - /* Wait till HSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - {} - - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - - /* Wait till PLL is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - {} - - /* Select PLL as SYSCLK */ - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK); - - #if defined(STM32H7) - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1) - {} - #else - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - {} - #endif - - /* ungate PHY clock */ - __HAL_PCD_UNGATE_PHYCLOCK(pcd_handle); - } - -} -#endif - -#if MICROPY_HW_USB_FS -/** - * @brief This function handles USB OTG FS Wakeup IRQ Handler. - * @param None - * @retval None - */ -void OTG_FS_WKUP_IRQHandler(void) { - IRQ_ENTER(OTG_FS_WKUP_IRQn); - - OTG_CMD_WKUP_Handler(&pcd_fs_handle); - - /* Clear EXTI pending Bit*/ - __HAL_USB_FS_EXTI_CLEAR_FLAG(); - - IRQ_EXIT(OTG_FS_WKUP_IRQn); -} -#endif - -#if MICROPY_HW_USB_HS -/** - * @brief This function handles USB OTG HS Wakeup IRQ Handler. - * @param None - * @retval None - */ -void OTG_HS_WKUP_IRQHandler(void) { - IRQ_ENTER(OTG_HS_WKUP_IRQn); - - OTG_CMD_WKUP_Handler(&pcd_hs_handle); - - /* Clear EXTI pending Bit*/ - __HAL_USB_HS_EXTI_CLEAR_FLAG(); - - IRQ_EXIT(OTG_HS_WKUP_IRQn); -} -#endif - -/** - * @brief This function handles PPP interrupt request. - * @param None - * @retval None - */ -/*void PPP_IRQHandler(void) -{ -}*/ - -// Handle a flash (erase/program) interrupt. -void FLASH_IRQHandler(void) { - IRQ_ENTER(FLASH_IRQn); - // This calls the real flash IRQ handler, if needed - /* - uint32_t flash_cr = FLASH->CR; - if ((flash_cr & FLASH_IT_EOP) || (flash_cr & FLASH_IT_ERR)) { - HAL_FLASH_IRQHandler(); - } - */ - #if MICROPY_HW_ENABLE_STORAGE - // This call the storage IRQ handler, to check if the flash cache needs flushing - storage_irq_handler(); - #endif - IRQ_EXIT(FLASH_IRQn); -} - -/** - * @brief These functions handle the EXTI interrupt requests. - * @param None - * @retval None - */ -void EXTI0_IRQHandler(void) { - IRQ_ENTER(EXTI0_IRQn); - Handle_EXTI_Irq(0); - IRQ_EXIT(EXTI0_IRQn); -} - -void EXTI1_IRQHandler(void) { - IRQ_ENTER(EXTI1_IRQn); - Handle_EXTI_Irq(1); - IRQ_EXIT(EXTI1_IRQn); -} - -void EXTI2_IRQHandler(void) { - IRQ_ENTER(EXTI2_IRQn); - Handle_EXTI_Irq(2); - IRQ_EXIT(EXTI2_IRQn); -} - -void EXTI3_IRQHandler(void) { - IRQ_ENTER(EXTI3_IRQn); - Handle_EXTI_Irq(3); - IRQ_EXIT(EXTI3_IRQn); -} - -void EXTI4_IRQHandler(void) { - IRQ_ENTER(EXTI4_IRQn); - Handle_EXTI_Irq(4); - IRQ_EXIT(EXTI4_IRQn); -} - -void EXTI9_5_IRQHandler(void) { - IRQ_ENTER(EXTI9_5_IRQn); - Handle_EXTI_Irq(5); - Handle_EXTI_Irq(6); - Handle_EXTI_Irq(7); - Handle_EXTI_Irq(8); - Handle_EXTI_Irq(9); - IRQ_EXIT(EXTI9_5_IRQn); -} - -void EXTI15_10_IRQHandler(void) { - IRQ_ENTER(EXTI15_10_IRQn); - Handle_EXTI_Irq(10); - Handle_EXTI_Irq(11); - Handle_EXTI_Irq(12); - Handle_EXTI_Irq(13); - Handle_EXTI_Irq(14); - Handle_EXTI_Irq(15); - IRQ_EXIT(EXTI15_10_IRQn); -} - -void PVD_IRQHandler(void) { - IRQ_ENTER(PVD_IRQn); - Handle_EXTI_Irq(EXTI_PVD_OUTPUT); - IRQ_EXIT(PVD_IRQn); -} - -#if defined(STM32L4) -void PVD_PVM_IRQHandler(void) { - IRQ_ENTER(PVD_PVM_IRQn); - Handle_EXTI_Irq(EXTI_PVD_OUTPUT); - IRQ_EXIT(PVD_PVM_IRQn); -} -#endif - -void RTC_Alarm_IRQHandler(void) { - IRQ_ENTER(RTC_Alarm_IRQn); - Handle_EXTI_Irq(EXTI_RTC_ALARM); - IRQ_EXIT(RTC_Alarm_IRQn); -} - -#if defined(ETH) // The 407 has ETH, the 405 doesn't -void ETH_WKUP_IRQHandler(void) { - IRQ_ENTER(ETH_WKUP_IRQn); - Handle_EXTI_Irq(EXTI_ETH_WAKEUP); - IRQ_EXIT(ETH_WKUP_IRQn); -} -#endif - -void TAMP_STAMP_IRQHandler(void) { - IRQ_ENTER(TAMP_STAMP_IRQn); - Handle_EXTI_Irq(EXTI_RTC_TIMESTAMP); - IRQ_EXIT(TAMP_STAMP_IRQn); -} - -void RTC_WKUP_IRQHandler(void) { - IRQ_ENTER(RTC_WKUP_IRQn); - RTC->ISR &= ~(1 << 10); // clear wakeup interrupt flag - Handle_EXTI_Irq(EXTI_RTC_WAKEUP); // clear EXTI flag and execute optional callback - IRQ_EXIT(RTC_WKUP_IRQn); -} - -#if defined(STM32F0) - -void RTC_IRQHandler(void) { - IRQ_ENTER(RTC_IRQn); - RTC->ISR &= ~(1 << 10); // clear wakeup interrupt flag - Handle_EXTI_Irq(EXTI_RTC_WAKEUP); // clear EXTI flag and execute optional callback - IRQ_EXIT(RTC_IRQn); -} - -void EXTI0_1_IRQHandler(void) { - IRQ_ENTER(EXTI0_1_IRQn); - Handle_EXTI_Irq(0); - Handle_EXTI_Irq(1); - IRQ_EXIT(EXTI0_1_IRQn); -} - -void EXTI2_3_IRQHandler(void) { - IRQ_ENTER(EXTI2_3_IRQn); - Handle_EXTI_Irq(2); - Handle_EXTI_Irq(3); - IRQ_EXIT(EXTI2_3_IRQn); -} - -void EXTI4_15_IRQHandler(void) { - IRQ_ENTER(EXTI4_15_IRQn); - for (int i = 4; i <= 15; ++i) { - Handle_EXTI_Irq(i); - } - IRQ_EXIT(EXTI4_15_IRQn); -} - -void TIM1_BRK_UP_TRG_COM_IRQHandler(void) { - IRQ_ENTER(TIM1_BRK_UP_TRG_COM_IRQn); - timer_irq_handler(1); - IRQ_EXIT(TIM1_BRK_UP_TRG_COM_IRQn); -} - -#endif - -void TIM1_BRK_TIM9_IRQHandler(void) { - IRQ_ENTER(TIM1_BRK_TIM9_IRQn); - timer_irq_handler(9); - IRQ_EXIT(TIM1_BRK_TIM9_IRQn); -} - -#if defined(STM32L4) -void TIM1_BRK_TIM15_IRQHandler(void) { - IRQ_ENTER(TIM1_BRK_TIM15_IRQn); - timer_irq_handler(15); - IRQ_EXIT(TIM1_BRK_TIM15_IRQn); -} -#endif - -void TIM1_UP_TIM10_IRQHandler(void) { - IRQ_ENTER(TIM1_UP_TIM10_IRQn); - timer_irq_handler(1); - timer_irq_handler(10); - IRQ_EXIT(TIM1_UP_TIM10_IRQn); -} - -#if defined(STM32L4) -void TIM1_UP_TIM16_IRQHandler(void) { - IRQ_ENTER(TIM1_UP_TIM16_IRQn); - timer_irq_handler(1); - timer_irq_handler(16); - IRQ_EXIT(TIM1_UP_TIM16_IRQn); -} -#endif - -void TIM1_TRG_COM_TIM11_IRQHandler(void) { - IRQ_ENTER(TIM1_TRG_COM_TIM11_IRQn); - timer_irq_handler(11); - IRQ_EXIT(TIM1_TRG_COM_TIM11_IRQn); -} - -#if defined(STM32L4) -void TIM1_TRG_COM_TIM17_IRQHandler(void) { - IRQ_ENTER(TIM1_TRG_COM_TIM17_IRQn); - timer_irq_handler(17); - IRQ_EXIT(TIM1_TRG_COM_TIM17_IRQn); -} -#endif - -void TIM1_CC_IRQHandler(void) { - IRQ_ENTER(TIM1_CC_IRQn); - timer_irq_handler(1); - IRQ_EXIT(TIM1_CC_IRQn); -} - -void TIM2_IRQHandler(void) { - IRQ_ENTER(TIM2_IRQn); - timer_irq_handler(2); - IRQ_EXIT(TIM2_IRQn); -} - -void TIM3_IRQHandler(void) { - IRQ_ENTER(TIM3_IRQn); - timer_irq_handler(3); - IRQ_EXIT(TIM3_IRQn); -} - -void TIM4_IRQHandler(void) { - IRQ_ENTER(TIM4_IRQn); - timer_irq_handler(4); - IRQ_EXIT(TIM4_IRQn); -} - -void TIM5_IRQHandler(void) { - IRQ_ENTER(TIM5_IRQn); - timer_irq_handler(5); - HAL_TIM_IRQHandler(&TIM5_Handle); - IRQ_EXIT(TIM5_IRQn); -} - -#if defined(TIM6) // STM32F401 doesn't have TIM6 -void TIM6_DAC_IRQHandler(void) { - IRQ_ENTER(TIM6_DAC_IRQn); - timer_irq_handler(6); - IRQ_EXIT(TIM6_DAC_IRQn); -} -#endif - -#if defined(TIM7) // STM32F401 doesn't have TIM7 -void TIM7_IRQHandler(void) { - IRQ_ENTER(TIM7_IRQn); - timer_irq_handler(7); - IRQ_EXIT(TIM7_IRQn); -} -#endif - -#if defined(TIM8) // STM32F401 doesn't have TIM8 -void TIM8_BRK_TIM12_IRQHandler(void) { - IRQ_ENTER(TIM8_BRK_TIM12_IRQn); - timer_irq_handler(12); - IRQ_EXIT(TIM8_BRK_TIM12_IRQn); -} - -void TIM8_UP_TIM13_IRQHandler(void) { - IRQ_ENTER(TIM8_UP_TIM13_IRQn); - timer_irq_handler(8); - timer_irq_handler(13); - IRQ_EXIT(TIM8_UP_TIM13_IRQn); -} - -#if defined(STM32L4) -void TIM8_UP_IRQHandler(void) { - IRQ_ENTER(TIM8_UP_IRQn); - timer_irq_handler(8); - IRQ_EXIT(TIM8_UP_IRQn); -} -#endif - -void TIM8_CC_IRQHandler(void) { - IRQ_ENTER(TIM8_CC_IRQn); - timer_irq_handler(8); - IRQ_EXIT(TIM8_CC_IRQn); -} - -void TIM8_TRG_COM_TIM14_IRQHandler(void) { - IRQ_ENTER(TIM8_TRG_COM_TIM14_IRQn); - timer_irq_handler(14); - IRQ_EXIT(TIM8_TRG_COM_TIM14_IRQn); -} -#endif - -// UART/USART IRQ handlers -void USART1_IRQHandler(void) { - IRQ_ENTER(USART1_IRQn); - uart_irq_handler(1); - IRQ_EXIT(USART1_IRQn); -} - -void USART2_IRQHandler(void) { - IRQ_ENTER(USART2_IRQn); - uart_irq_handler(2); - IRQ_EXIT(USART2_IRQn); -} - -#if defined(STM32F0) - -void USART3_8_IRQHandler(void) { - IRQ_ENTER(USART3_8_IRQn); - uart_irq_handler(3); - uart_irq_handler(4); - uart_irq_handler(5); - uart_irq_handler(6); - uart_irq_handler(7); - uart_irq_handler(8); - IRQ_EXIT(USART3_8_IRQn); -} - -#else - -void USART3_IRQHandler(void) { - IRQ_ENTER(USART3_IRQn); - uart_irq_handler(3); - IRQ_EXIT(USART3_IRQn); -} - -void UART4_IRQHandler(void) { - IRQ_ENTER(UART4_IRQn); - uart_irq_handler(4); - IRQ_EXIT(UART4_IRQn); -} - -void UART5_IRQHandler(void) { - IRQ_ENTER(UART5_IRQn); - uart_irq_handler(5); - IRQ_EXIT(UART5_IRQn); -} - -void USART6_IRQHandler(void) { - IRQ_ENTER(USART6_IRQn); - uart_irq_handler(6); - IRQ_EXIT(USART6_IRQn); -} - -#if defined(UART8) -void UART7_IRQHandler(void) { - IRQ_ENTER(UART7_IRQn); - uart_irq_handler(7); - IRQ_EXIT(UART7_IRQn); -} -#endif - -#if defined(UART8) -void UART8_IRQHandler(void) { - IRQ_ENTER(UART8_IRQn); - uart_irq_handler(8); - IRQ_EXIT(UART8_IRQn); -} -#endif - -#endif - -#if defined(MICROPY_HW_CAN1_TX) -void CAN1_RX0_IRQHandler(void) { - IRQ_ENTER(CAN1_RX0_IRQn); - can_rx_irq_handler(PYB_CAN_1, CAN_FIFO0); - IRQ_EXIT(CAN1_RX0_IRQn); -} - -void CAN1_RX1_IRQHandler(void) { - IRQ_ENTER(CAN1_RX1_IRQn); - can_rx_irq_handler(PYB_CAN_1, CAN_FIFO1); - IRQ_EXIT(CAN1_RX1_IRQn); -} - -void CAN1_SCE_IRQHandler(void) { - IRQ_ENTER(CAN1_SCE_IRQn); - can_sce_irq_handler(PYB_CAN_1); - IRQ_EXIT(CAN1_SCE_IRQn); -} -#endif - -#if defined(MICROPY_HW_CAN2_TX) -void CAN2_RX0_IRQHandler(void) { - IRQ_ENTER(CAN2_RX0_IRQn); - can_rx_irq_handler(PYB_CAN_2, CAN_FIFO0); - IRQ_EXIT(CAN2_RX0_IRQn); -} - -void CAN2_RX1_IRQHandler(void) { - IRQ_ENTER(CAN2_RX1_IRQn); - can_rx_irq_handler(PYB_CAN_2, CAN_FIFO1); - IRQ_EXIT(CAN2_RX1_IRQn); -} - -void CAN2_SCE_IRQHandler(void) { - IRQ_ENTER(CAN2_SCE_IRQn); - can_sce_irq_handler(PYB_CAN_2); - IRQ_EXIT(CAN2_SCE_IRQn); -} -#endif - -#if MICROPY_PY_PYB_LEGACY - -#if defined(MICROPY_HW_I2C1_SCL) -void I2C1_EV_IRQHandler(void) { - IRQ_ENTER(I2C1_EV_IRQn); - i2c_ev_irq_handler(1); - IRQ_EXIT(I2C1_EV_IRQn); -} - -void I2C1_ER_IRQHandler(void) { - IRQ_ENTER(I2C1_ER_IRQn); - i2c_er_irq_handler(1); - IRQ_EXIT(I2C1_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C1_SCL) - -#if defined(MICROPY_HW_I2C2_SCL) -void I2C2_EV_IRQHandler(void) { - IRQ_ENTER(I2C2_EV_IRQn); - i2c_ev_irq_handler(2); - IRQ_EXIT(I2C2_EV_IRQn); -} - -void I2C2_ER_IRQHandler(void) { - IRQ_ENTER(I2C2_ER_IRQn); - i2c_er_irq_handler(2); - IRQ_EXIT(I2C2_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C2_SCL) - -#if defined(MICROPY_HW_I2C3_SCL) -void I2C3_EV_IRQHandler(void) { - IRQ_ENTER(I2C3_EV_IRQn); - i2c_ev_irq_handler(3); - IRQ_EXIT(I2C3_EV_IRQn); -} - -void I2C3_ER_IRQHandler(void) { - IRQ_ENTER(I2C3_ER_IRQn); - i2c_er_irq_handler(3); - IRQ_EXIT(I2C3_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C3_SCL) - -#if defined(MICROPY_HW_I2C4_SCL) -void I2C4_EV_IRQHandler(void) { - IRQ_ENTER(I2C4_EV_IRQn); - i2c_ev_irq_handler(4); - IRQ_EXIT(I2C4_EV_IRQn); -} - -void I2C4_ER_IRQHandler(void) { - IRQ_ENTER(I2C4_ER_IRQn); - i2c_er_irq_handler(4); - IRQ_EXIT(I2C4_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C4_SCL) - -#endif // MICROPY_PY_PYB_LEGACY diff --git a/ports/stm32/stm32_it.h b/ports/stm32/stm32_it.h deleted file mode 100644 index 46523e5673..0000000000 --- a/ports/stm32/stm32_it.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Original template from ST Cube library. See below for header. - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_STM32_IT_H -#define MICROPY_INCLUDED_STM32_STM32_IT_H - -/** - ****************************************************************************** - * @file Templates/Inc/stm32f4xx_it.h - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -extern int pyb_hard_fault_debug; - -void NMI_Handler(void); -void HardFault_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void SVC_Handler(void); -void DebugMon_Handler(void); -void PendSV_Handler(void); -void SysTick_Handler(void); -void OTG_FS_IRQHandler(void); -void OTG_HS_IRQHandler(void); - -#endif // MICROPY_INCLUDED_STM32_STM32_IT_H diff --git a/ports/stm32/storage.c b/ports/stm32/storage.c deleted file mode 100644 index 761db0b525..0000000000 --- a/ports/stm32/storage.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2018 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "extmod/vfs_fat.h" - -#include "led.h" -#include "storage.h" -#include "irq.h" - -#if MICROPY_HW_ENABLE_STORAGE - -#define FLASH_PART1_START_BLOCK (0x100) - -#if defined(MICROPY_HW_BDEV2_IOCTL) -#define FLASH_PART2_START_BLOCK (FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) -#endif - -static bool storage_is_initialised = false; - -void storage_init(void) { - if (!storage_is_initialised) { - storage_is_initialised = true; - - MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_INIT, 0); - - #if defined(MICROPY_HW_BDEV2_IOCTL) - MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_INIT, 0); - #endif - - // Enable the flash IRQ, which is used to also call our storage IRQ handler - // It needs to go at a higher priority than all those components that rely on - // the flash storage (eg higher than USB MSC). - NVIC_SetPriority(FLASH_IRQn, IRQ_PRI_FLASH); - HAL_NVIC_EnableIRQ(FLASH_IRQn); - } -} - -uint32_t storage_get_block_size(void) { - return FLASH_BLOCK_SIZE; -} - -uint32_t storage_get_block_count(void) { - #if defined(MICROPY_HW_BDEV2_IOCTL) - return FLASH_PART2_START_BLOCK + MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0); - #else - return FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0); - #endif -} - -void storage_irq_handler(void) { - MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_IRQ_HANDLER, 0); - #if defined(MICROPY_HW_BDEV2_IOCTL) - MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_IRQ_HANDLER, 0); - #endif -} - -void storage_flush(void) { - MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_SYNC, 0); - #if defined(MICROPY_HW_BDEV2_IOCTL) - MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_SYNC, 0); - #endif -} - -static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) { - buf[0] = boot; - - if (num_blocks == 0) { - buf[1] = 0; - buf[2] = 0; - buf[3] = 0; - } else { - buf[1] = 0xff; - buf[2] = 0xff; - buf[3] = 0xff; - } - - buf[4] = type; - - if (num_blocks == 0) { - buf[5] = 0; - buf[6] = 0; - buf[7] = 0; - } else { - buf[5] = 0xff; - buf[6] = 0xff; - buf[7] = 0xff; - } - - buf[8] = start_block; - buf[9] = start_block >> 8; - buf[10] = start_block >> 16; - buf[11] = start_block >> 24; - - buf[12] = num_blocks; - buf[13] = num_blocks >> 8; - buf[14] = num_blocks >> 16; - buf[15] = num_blocks >> 24; -} - -bool storage_read_block(uint8_t *dest, uint32_t block) { - //printf("RD %u\n", block); - if (block == 0) { - // fake the MBR so we can decide on our own partition table - - for (int i = 0; i < 446; i++) { - dest[i] = 0; - } - - build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)); - #if defined(MICROPY_HW_BDEV2_IOCTL) - build_partition(dest + 462, 0, 0x01 /* FAT12 */, FLASH_PART2_START_BLOCK, MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)); - #else - build_partition(dest + 462, 0, 0, 0, 0); - #endif - build_partition(dest + 478, 0, 0, 0, 0); - build_partition(dest + 494, 0, 0, 0, 0); - - dest[510] = 0x55; - dest[511] = 0xaa; - - return true; - - #if defined(MICROPY_HW_BDEV_READBLOCK) - } else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) { - return MICROPY_HW_BDEV_READBLOCK(dest, block - FLASH_PART1_START_BLOCK); - #endif - } else { - return false; - } -} - -bool storage_write_block(const uint8_t *src, uint32_t block) { - //printf("WR %u\n", block); - if (block == 0) { - // can't write MBR, but pretend we did - return true; - #if defined(MICROPY_HW_BDEV_WRITEBLOCK) - } else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) { - return MICROPY_HW_BDEV_WRITEBLOCK(src, block - FLASH_PART1_START_BLOCK); - #endif - } else { - return false; - } -} - -mp_uint_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - #if defined(MICROPY_HW_BDEV_READBLOCKS) - if (FLASH_PART1_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) { - return MICROPY_HW_BDEV_READBLOCKS(dest, block_num - FLASH_PART1_START_BLOCK, num_blocks); - } - #endif - - #if defined(MICROPY_HW_BDEV2_READBLOCKS) - if (FLASH_PART2_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART2_START_BLOCK + MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) { - return MICROPY_HW_BDEV2_READBLOCKS(dest, block_num - FLASH_PART2_START_BLOCK, num_blocks); - } - #endif - - for (size_t i = 0; i < num_blocks; i++) { - if (!storage_read_block(dest + i * FLASH_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -mp_uint_t storage_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - #if defined(MICROPY_HW_BDEV_WRITEBLOCKS) - if (FLASH_PART1_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) { - return MICROPY_HW_BDEV_WRITEBLOCKS(src, block_num - FLASH_PART1_START_BLOCK, num_blocks); - } - #endif - - #if defined(MICROPY_HW_BDEV2_WRITEBLOCKS) - if (FLASH_PART2_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART2_START_BLOCK + MICROPY_HW_BDEV2_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) { - return MICROPY_HW_BDEV2_WRITEBLOCKS(src, block_num - FLASH_PART2_START_BLOCK, num_blocks); - } - #endif - - for (size_t i = 0; i < num_blocks; i++) { - if (!storage_write_block(src + i * FLASH_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the flash as an object with the block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t pyb_flash_obj = {&pyb_flash_type}; - -STATIC mp_obj_t pyb_flash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&pyb_flash_obj; -} - -STATIC mp_obj_t pyb_flash_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = storage_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FLASH_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_readblocks_obj, pyb_flash_readblocks); - -STATIC mp_obj_t pyb_flash_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = storage_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FLASH_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_writeblocks_obj, pyb_flash_writeblocks); - -STATIC mp_obj_t pyb_flash_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: storage_init(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_DEINIT: storage_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly - case BP_IOCTL_SYNC: storage_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(storage_get_block_count()); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(storage_get_block_size()); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_ioctl_obj, pyb_flash_ioctl); - -STATIC const mp_rom_map_elem_t pyb_flash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_flash_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_flash_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_flash_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_flash_locals_dict, pyb_flash_locals_dict_table); - -const mp_obj_type_t pyb_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_Flash, - .make_new = pyb_flash_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_flash_locals_dict, -}; - -void pyb_flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->fatfs.part = 1; // flash filesystem lives on first partition - vfs->readblocks[0] = (mp_obj_t)&pyb_flash_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->readblocks[2] = (mp_obj_t)storage_read_blocks; // native version - vfs->writeblocks[0] = (mp_obj_t)&pyb_flash_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)storage_write_blocks; // native version - vfs->u.ioctl[0] = (mp_obj_t)&pyb_flash_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&pyb_flash_obj; -} - -#endif diff --git a/ports/stm32/storage.h b/ports/stm32/storage.h deleted file mode 100644 index 7250b6dbf9..0000000000 --- a/ports/stm32/storage.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_STORAGE_H -#define MICROPY_INCLUDED_STM32_STORAGE_H - -#include "drivers/memory/spiflash.h" - -#define FLASH_BLOCK_SIZE (512) - -#define STORAGE_SYSTICK_MASK (0x1ff) // 512ms -#define STORAGE_IDLE_TICK(tick) (((tick) & STORAGE_SYSTICK_MASK) == 2) - -// Try to match Python-level VFS block protocol where possible for these constants -enum { - BDEV_IOCTL_INIT = 1, - BDEV_IOCTL_SYNC = 3, - BDEV_IOCTL_NUM_BLOCKS = 4, - BDEV_IOCTL_IRQ_HANDLER = 6, -}; - -void storage_init(void); -uint32_t storage_get_block_size(void); -uint32_t storage_get_block_count(void); -void storage_irq_handler(void); -void storage_flush(void); -bool storage_read_block(uint8_t *dest, uint32_t block); -bool storage_write_block(const uint8_t *src, uint32_t block); - -// these return 0 on success, non-zero on error -mp_uint_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t storage_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -int32_t flash_bdev_ioctl(uint32_t op, uint32_t arg); -bool flash_bdev_readblock(uint8_t *dest, uint32_t block); -bool flash_bdev_writeblock(const uint8_t *src, uint32_t block); - -typedef struct _spi_bdev_t { - mp_spiflash_t spiflash; - uint32_t flash_tick_counter_last_write; -} spi_bdev_t; - -int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg); -int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t pyb_flash_type; - -struct _fs_user_mount_t; -void pyb_flash_init_vfs(struct _fs_user_mount_t *vfs); - -#endif // MICROPY_INCLUDED_STM32_STORAGE_H diff --git a/ports/stm32/system_stm32.c b/ports/stm32/system_stm32.c deleted file mode 100644 index 0cf0753bdf..0000000000 --- a/ports/stm32/system_stm32.c +++ /dev/null @@ -1,604 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and modified. See below for original header. - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -/** - ****************************************************************************** - * @file system_stm32.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief CMSIS Cortex-M4/M7 Device Peripheral Access Layer System Source File. - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32fxxx_system - * @{ - */ - -/** @addtogroup STM32Fxxx_System_Private_Includes - * @{ - */ - -#include "py/mphal.h" - -void __fatal_error(const char *msg); - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Defines - * @{ - */ - -#if defined(STM32F4) || defined(STM32F7) - -#define CONFIG_RCC_CR_1ST (RCC_CR_HSION) -#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON) -#define CONFIG_RCC_PLLCFGR (0x24003010) - -#if defined(STM32F4) -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; -#elif defined(STM32F7) -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; -#endif - -#elif defined(STM32L4) - -#define CONFIG_RCC_CR_1ST (RCC_CR_MSION) -#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_HSION | RCC_CR_PLLON) -#define CONFIG_RCC_PLLCFGR (0x00001000) -/* - * FIXME Do not know why I have to define these arrays here! they should be defined in the - * hal_rcc-file!! - * - */ -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; -const uint32_t MSIRangeTable[12] = {100000, 200000, 400000, 800000, 1000000, 2000000, \ - 4000000, 8000000, 16000000, 24000000, 32000000, 48000000}; -#elif defined(STM32H7) - -#define CONFIG_RCC_CR_1ST (RCC_CR_HSION) -#define CONFIG_RCC_CR_2ND (~0xEAF6ED7F) -#define CONFIG_RCC_PLLCFGR (0x00000000) - -#define SRAM_BASE D1_AXISRAM_BASE -#define FLASH_BASE FLASH_BANK1_BASE -uint32_t SystemD2Clock = 64000000; -const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; - -#else -#error Unknown processor -#endif - -/************************* Miscellaneous Configuration ************************/ - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ -/******************************************************************************/ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Variables - * @{ - */ - /* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ - uint32_t SystemCoreClock = 16000000; - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system - * Initialize the FPU setting, vector table location and External memory - * configuration. - * @param None - * @retval None - */ -void SystemInit(void) -{ - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - #endif - /* Reset the RCC clock configuration to the default reset state ------------*/ - - /* Set configured startup clk source */ - RCC->CR |= CONFIG_RCC_CR_1ST; - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000; - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= ~ CONFIG_RCC_CR_2ND; - - /* Reset PLLCFGR register */ - RCC->PLLCFGR = CONFIG_RCC_PLLCFGR; - - #if defined(STM32H7) - /* Reset D1CFGR register */ - RCC->D1CFGR = 0x00000000; - - /* Reset D2CFGR register */ - RCC->D2CFGR = 0x00000000; - - /* Reset D3CFGR register */ - RCC->D3CFGR = 0x00000000; - - /* Reset PLLCKSELR register */ - RCC->PLLCKSELR = 0x00000000; - - /* Reset PLL1DIVR register */ - RCC->PLL1DIVR = 0x00000000; - - /* Reset PLL1FRACR register */ - RCC->PLL1FRACR = 0x00000000; - - /* Reset PLL2DIVR register */ - RCC->PLL2DIVR = 0x00000000; - - /* Reset PLL2FRACR register */ - RCC->PLL2FRACR = 0x00000000; - - /* Reset PLL3DIVR register */ - RCC->PLL3DIVR = 0x00000000; - - /* Reset PLL3FRACR register */ - RCC->PLL3FRACR = 0x00000000; - #endif - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Disable all interrupts */ - #if defined(STM32F4) || defined(STM32F7) - RCC->CIR = 0x00000000; - #elif defined(STM32L4) || defined(STM32H7) - RCC->CIER = 0x00000000; - #endif - - #if defined(STM32H7) - /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ - *((__IO uint32_t*)0x51008108) = 0x00000001; - #endif - - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef MICROPY_HW_VTOR - SCB->VTOR = MICROPY_HW_VTOR; -#else -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif -#endif - - /* dpgeorge: enable 8-byte stack alignment for IRQ handlers, in accord with EABI */ - SCB->CCR |= SCB_CCR_STKALIGN_Msk; -} - - -/** - * @brief System Clock Configuration - * - * The system Clock is configured for F4/F7 as follows: - * System Clock source = PLL (HSE) - * SYSCLK(Hz) = 168000000 - * HCLK(Hz) = 168000000 - * AHB Prescaler = 1 - * APB1 Prescaler = 4 - * APB2 Prescaler = 2 - * HSE Frequency(Hz) = HSE_VALUE - * PLL_M = HSE_VALUE/1000000 - * PLL_N = 336 - * PLL_P = 2 - * PLL_Q = 7 - * VDD(V) = 3.3 - * Main regulator output voltage = Scale1 mode - * Flash Latency(WS) = 5 - * - * The system Clock is configured for L4 as follows: - * System Clock source = PLL (MSI) - * SYSCLK(Hz) = 80000000 - * HCLK(Hz) = 80000000 - * AHB Prescaler = 1 - * APB1 Prescaler = 1 - * APB2 Prescaler = 1 - * MSI Frequency(Hz) = MSI_VALUE (4000000) - * LSE Frequency(Hz) = 32768 - * PLL_M = 1 - * PLL_N = 40 - * PLL_P = 7 - * PLL_Q = 2 - * PLL_R = 2 <= This is the source for SysClk, not as on F4/7 PLL_P - * Flash Latency(WS) = 4 - * @param None - * @retval None - * - * PLL is configured as follows: - * - * VCO_IN - * F4/F7 = HSE / M - * L4 = MSI / M - * VCO_OUT - * F4/F7 = HSE / M * N - * L4 = MSI / M * N - * PLLCLK - * F4/F7 = HSE / M * N / P - * L4 = MSI / M * N / R - * PLL48CK - * F4/F7 = HSE / M * N / Q - * L4 = MSI / M * N / Q USB Clock is obtained over PLLSAI1 - * - * SYSCLK = PLLCLK - * HCLK = SYSCLK / AHB_PRESC - * PCLKx = HCLK / APBx_PRESC - * - * Constraints on parameters: - * - * VCO_IN between 1MHz and 2MHz (2MHz recommended) - * VCO_OUT between 192MHz and 432MHz - * HSE = 8MHz - * M = 2 .. 63 (inclusive) - * N = 192 ... 432 (inclusive) - * P = 2, 4, 6, 8 - * Q = 2 .. 15 (inclusive) - * - * AHB_PRESC=1,2,4,8,16,64,128,256,512 - * APBx_PRESC=1,2,4,8,16 - * - * Output clocks: - * - * CPU SYSCLK max 168MHz - * USB,RNG,SDIO PLL48CK must be 48MHz for USB - * AHB HCLK max 168MHz - * APB1 PCLK1 max 42MHz - * APB2 PCLK2 max 84MHz - * - * Timers run from APBx if APBx_PRESC=1, else 2x APBx - */ -void SystemClock_Config(void) -{ - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - #if defined(STM32H7) - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - #endif - - #if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - - /* Enable Power Control clock */ - #if defined(STM32H7) - MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0); - #else - __PWR_CLK_ENABLE(); - #endif - - /* The voltage scaling allows optimizing the power consumption when the device is - clocked below the maximum system frequency, to update the voltage scaling value - regarding system frequency refer to product datasheet. */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - #elif defined(STM32L4) - // Configure LSE Drive Capability - __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - #endif - - #if defined(STM32H7) - // Wait for PWR_FLAG_VOSRDY - while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) { - } - #endif - - /* Enable HSE Oscillator and activate PLL with HSE as source */ - #if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = MICROPY_HW_CLK_HSE_STATE; - RCC_OscInitStruct.HSIState = RCC_HSI_OFF; - #if defined(STM32H7) - RCC_OscInitStruct.CSIState = RCC_CSI_OFF; - #endif - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - #elif defined(STM32L4) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.MSIState = RCC_MSI_ON; - RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; - #endif - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 - clocks dividers */ - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - #if defined(STM32H7) - RCC_ClkInitStruct.ClockType |= (RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1); - #endif - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - -#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - #if defined(STM32F7) - #define FREQ_BKP BKP31R - #elif defined(STM32L4) - #error Unsupported Processor - #else - #define FREQ_BKP BKP19R - #endif - uint32_t m = RTC->FREQ_BKP; - uint32_t n; - uint32_t p; - uint32_t q; - - // 222111HH HHQQQQPP nNNNNNNN NNMMMMMM - uint32_t h = (m >> 22) & 0xf; - uint32_t b1 = (m >> 26) & 0x7; - uint32_t b2 = (m >> 29) & 0x7; - q = (m >> 18) & 0xf; - p = (((m >> 16) & 0x03)+1)*2; - n = (m >> 6) & 0x3ff; - m &= 0x3f; - if ((q < 2) || (q > 15) || (p > 8) || (p < 2) || (n < 192) || (n >= 433) || (m < 2)) { - m = MICROPY_HW_CLK_PLLM; - n = MICROPY_HW_CLK_PLLN; - p = MICROPY_HW_CLK_PLLP; - q = MICROPY_HW_CLK_PLLQ; - h = RCC_SYSCLK_DIV1; - b1 = RCC_HCLK_DIV4; - b2 = RCC_HCLK_DIV2; - } else { - h <<= 4; - b1 <<= 10; - b2 <<= 10; - } - RCC_OscInitStruct.PLL.PLLM = m; //MICROPY_HW_CLK_PLLM; - RCC_OscInitStruct.PLL.PLLN = n; //MICROPY_HW_CLK_PLLN; - RCC_OscInitStruct.PLL.PLLP = p; //MICROPY_HW_CLK_PLLP; - RCC_OscInitStruct.PLL.PLLQ = q; //MICROPY_HW_CLK_PLLQ; - - RCC_ClkInitStruct.AHBCLKDivider = h; //RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = b1; //RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = b2; //RCC_HCLK_DIV2; -#else // defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - RCC_OscInitStruct.PLL.PLLM = MICROPY_HW_CLK_PLLM; - RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN; - RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP; - RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ; - #if defined(STM32L4) || defined(STM32H7) - RCC_OscInitStruct.PLL.PLLR = MICROPY_HW_CLK_PLLR; - #endif - - #if defined(STM32H7) - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_1; - RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - RCC_OscInitStruct.PLL.PLLFRACN = 0; - #endif - - #if defined(STM32F4) || defined(STM32F7) - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - #elif defined(STM32L4) - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - #elif defined(STM32H7) - RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; - RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - #endif -#endif - - if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - __fatal_error("HAL_RCC_OscConfig"); - } - -#if defined(STM32H7) - /* PLL3 for USB Clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; - PeriphClkInitStruct.PLL3.PLL3M = 4; - PeriphClkInitStruct.PLL3.PLL3N = 120; - PeriphClkInitStruct.PLL3.PLL3P = 2; - PeriphClkInitStruct.PLL3.PLL3Q = 5; - PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_1; - PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE; - PeriphClkInitStruct.PLL3.PLL3FRACN = 0; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - __fatal_error("HAL_RCCEx_PeriphCLKConfig"); - } -#endif - -#if defined(STM32F7) - /* Activate the OverDrive to reach the 200 MHz Frequency */ - if (HAL_PWREx_EnableOverDrive() != HAL_OK) - { - __fatal_error("HAL_PWREx_EnableOverDrive"); - } -#endif - -#if !defined(MICROPY_HW_FLASH_LATENCY) -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5 -#endif - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, MICROPY_HW_FLASH_LATENCY) != HAL_OK) - { - __fatal_error("HAL_RCC_ClockConfig"); - } - -#if defined(STM32H7) - /* Activate CSI clock mandatory for I/O Compensation Cell*/ - __HAL_RCC_CSI_ENABLE() ; - - /* Enable SYSCFG clock mandatory for I/O Compensation Cell */ - __HAL_RCC_SYSCFG_CLK_ENABLE() ; - - /* Enable the I/O Compensation Cell */ - HAL_EnableCompensationCell(); - - /* Enable the USB voltage level detector */ - HAL_PWREx_EnableUSBVoltageDetector(); -#endif - -#if defined(STM32F7) - // The DFU bootloader changes the clocksource register from its default power - // on reset value, so we set it back here, so the clocksources are the same - // whether we were started from DFU or from a power on reset. - - RCC->DCKCFGR2 = 0; -#endif -#if defined(STM32L4) - // Enable MSI-Hardware auto calibration mode with LSE - HAL_RCCEx_EnableMSIPLLMode(); - - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_I2C1 - |RCC_PERIPHCLK_USB |RCC_PERIPHCLK_ADC - |RCC_PERIPHCLK_RNG |RCC_PERIPHCLK_RTC; - PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; - /* PLLSAI is used to clock USB, ADC, I2C1 and RNG. The frequency is - MSI(4MHz)/PLLM(1)*PLLSAI1N(24)/PLLSAIQ(2) = 48MHz. See the STM32CubeMx - application or the reference manual. */ - PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; - PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; - PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLLSAI1; - PeriphClkInitStruct.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; - PeriphClkInitStruct.PLLSAI1.PLLSAI1M = 1; - PeriphClkInitStruct.PLLSAI1.PLLSAI1N = 24; - PeriphClkInitStruct.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; - PeriphClkInitStruct.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; - PeriphClkInitStruct.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; - PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK - |RCC_PLLSAI1_48M2CLK - |RCC_PLLSAI1_ADC1CLK; - - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - { - __fatal_error("HAL_RCCEx_PeriphCLKConfig"); - } - - __PWR_CLK_ENABLE(); - - HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); - - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); - HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, TICK_INT_PRIORITY, 0)); -#endif -} diff --git a/ports/stm32/system_stm32f0.c b/ports/stm32/system_stm32f0.c deleted file mode 100644 index 9d4b06e568..0000000000 --- a/ports/stm32/system_stm32f0.c +++ /dev/null @@ -1,203 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and modified. See below for original header. - */ - -/** - ****************************************************************************** - * @file system_stm32f0xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2016 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -#include STM32_HAL_H - -#ifndef HSE_VALUE -#define HSE_VALUE (8000000) -#endif - -#ifndef HSI_VALUE -#define HSI_VALUE (8000000) -#endif - -#ifndef HSI48_VALUE -#define HSI48_VALUE (48000000) -#endif - -/* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock there is no need to - call the 2 first functions listed above, since SystemCoreClock variable is - updated automatically. -*/ -uint32_t SystemCoreClock = 8000000; - -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; - -void SystemInit(void) { - // Set HSION bit - RCC->CR |= (uint32_t)0x00000001U; - - #if defined(STM32F051x8) || defined(STM32F058x8) - // Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits - RCC->CFGR &= (uint32_t)0xF8FFB80CU; - #else - // Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits - RCC->CFGR &= (uint32_t)0x08FFB80CU; - #endif - - // Reset HSEON, CSSON and PLLON bits - RCC->CR &= (uint32_t)0xFEF6FFFFU; - - // Reset HSEBYP bit - RCC->CR &= (uint32_t)0xFFFBFFFFU; - - // Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits - RCC->CFGR &= (uint32_t)0xFFC0FFFFU; - - // Reset PREDIV[3:0] bits - RCC->CFGR2 &= (uint32_t)0xFFFFFFF0U; - - #if defined(STM32F072xB) || defined(STM32F078xx) - // Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFFCFE2CU; - #elif defined(STM32F071xB) - // Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFFFCEACU; - #elif defined(STM32F091xC) || defined(STM32F098xx) - // Reset USART3SW[1:0], USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFF0FEACU; - #elif defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) || defined(STM32F030xC) - // Reset USART1SW[1:0], I2C1SW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFFFFEECU; - #elif defined(STM32F051x8) || defined(STM32F058xx) - // Reset USART1SW[1:0], I2C1SW, CECSW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFFFFEACU; - #elif defined(STM32F042x6) || defined(STM32F048xx) - // Reset USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFFFFE2CU; - #elif defined(STM32F070x6) || defined(STM32F070xB) - // Reset USART1SW[1:0], I2C1SW, USBSW and ADCSW bits - RCC->CFGR3 &= (uint32_t)0xFFFFFE6CU; - // Set default USB clock to PLLCLK, since there is no HSI48 - RCC->CFGR3 |= (uint32_t)0x00000080U; - #else - #warning "No target selected" - #endif - - // Reset HSI14 bit - RCC->CR2 &= (uint32_t)0xFFFFFFFEU; - - // Disable all interrupts - RCC->CIR = 0x00000000U; - - // dpgeorge: enable 8-byte stack alignment for IRQ handlers, in accord with EABI - SCB->CCR |= SCB_CCR_STKALIGN_Msk; -} - -void SystemClock_Config(void) { - // Set flash latency to 1 because SYSCLK > 24MHz - FLASH->ACR = (FLASH->ACR & ~0x7) | 0x1; - - // Use the 48MHz internal oscillator - RCC->CR2 |= RCC_CR2_HSI48ON; - while ((RCC->CR2 & RCC_CR2_HSI48RDY) == 0) { - } - RCC->CFGR |= 3 << RCC_CFGR_SW_Pos; - while (((RCC->CFGR >> RCC_CFGR_SWS_Pos) & 0x3) != 0x03) { - // Wait for SYSCLK source to change - } - - SystemCoreClockUpdate(); - - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000); - HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); -} - -void SystemCoreClockUpdate(void) { - // Get SYSCLK source - uint32_t tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) { - case RCC_CFGR_SWS_HSI: - SystemCoreClock = HSI_VALUE; - break; - case RCC_CFGR_SWS_HSE: - SystemCoreClock = HSE_VALUE; - break; - case RCC_CFGR_SWS_PLL: { - /* Get PLL clock source and multiplication factor */ - uint32_t pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; - uint32_t pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - pllmull = (pllmull >> 18) + 2; - uint32_t predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; - - if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) { - /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ - SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; - #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) \ - || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) - } else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) { - /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ - SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; - #endif - } else { - #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ - || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ - || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) - /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ - SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull; - #else - /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - #endif - } - break; - } - case RCC_CFGR_SWS_HSI48: - SystemCoreClock = HSI48_VALUE; - break; - default: - SystemCoreClock = HSI_VALUE; - break; - } - - // Compute HCLK clock frequency - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - SystemCoreClock >>= tmp; -} - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/systick.c b/ports/stm32/systick.c deleted file mode 100644 index c07d0fabce..0000000000 --- a/ports/stm32/systick.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/mphal.h" -#include "irq.h" -#include "systick.h" -#include "pybthread.h" - -extern __IO uint32_t uwTick; - -// We provide our own version of HAL_Delay that calls __WFI while waiting, -// and works when interrupts are disabled. This function is intended to be -// used only by the ST HAL functions. -void HAL_Delay(uint32_t Delay) { - if (query_irq() == IRQ_STATE_ENABLED) { - // IRQs enabled, so can use systick counter to do the delay - uint32_t start = uwTick; - // Wraparound of tick is taken care of by 2's complement arithmetic. - while (uwTick - start < Delay) { - // Enter sleep mode, waiting for (at least) the SysTick interrupt. - __WFI(); - } - } else { - // IRQs disabled, use mp_hal_delay_ms routine. - mp_hal_delay_ms(Delay); - } -} - -// Core delay function that does an efficient sleep and may switch thread context. -// If IRQs are enabled then we must have the GIL. -void mp_hal_delay_ms(mp_uint_t Delay) { - if (query_irq() == IRQ_STATE_ENABLED) { - // IRQs enabled, so can use systick counter to do the delay - uint32_t start = uwTick; - // Wraparound of tick is taken care of by 2's complement arithmetic. - while (uwTick - start < Delay) { - // This macro will execute the necessary idle behaviour. It may - // raise an exception, switch threads or enter sleep mode (waiting for - // (at least) the SysTick interrupt). - MICROPY_EVENT_POLL_HOOK - } - } else { - // IRQs disabled, so need to use a busy loop for the delay. - // To prevent possible overflow of the counter we use a double loop. - const uint32_t count_1ms = HAL_RCC_GetSysClockFreq() / 4000; - for (int i = 0; i < Delay; i++) { - for (uint32_t count = 0; ++count <= count_1ms;) { - } - } - } -} - -// delay for given number of microseconds -void mp_hal_delay_us(mp_uint_t usec) { - if (query_irq() == IRQ_STATE_ENABLED) { - // IRQs enabled, so can use systick counter to do the delay - uint32_t start = mp_hal_ticks_us(); - while (mp_hal_ticks_us() - start < usec) { - } - } else { - // IRQs disabled, so need to use a busy loop for the delay - // sys freq is always a multiple of 2MHz, so division here won't lose precision - const uint32_t ucount = HAL_RCC_GetSysClockFreq() / 2000000 * usec / 2; - for (uint32_t count = 0; ++count <= ucount;) { - } - } -} - -bool sys_tick_has_passed(uint32_t start_tick, uint32_t delay_ms) { - return HAL_GetTick() - start_tick >= delay_ms; -} - -// waits until at least delay_ms milliseconds have passed from the sampling of -// startTick. Handles overflow properly. Assumes stc was taken from -// HAL_GetTick() some time before calling this function. -void sys_tick_wait_at_least(uint32_t start_tick, uint32_t delay_ms) { - while (!sys_tick_has_passed(start_tick, delay_ms)) { - __WFI(); // enter sleep mode, waiting for interrupt - } -} - -mp_uint_t mp_hal_ticks_ms(void) { - return uwTick; -} - -// The SysTick timer counts down at 168 MHz, so we can use that knowledge -// to grab a microsecond counter. -// -// We assume that HAL_GetTickis returns milliseconds. -mp_uint_t mp_hal_ticks_us(void) { - mp_uint_t irq_state = disable_irq(); - uint32_t counter = SysTick->VAL; - uint32_t milliseconds = HAL_GetTick(); - uint32_t status = SysTick->CTRL; - enable_irq(irq_state); - - // It's still possible for the countflag bit to get set if the counter was - // reloaded between reading VAL and reading CTRL. With interrupts disabled - // it definitely takes less than 50 HCLK cycles between reading VAL and - // reading CTRL, so the test (counter > 50) is to cover the case where VAL - // is +ve and very close to zero, and the COUNTFLAG bit is also set. - if ((status & SysTick_CTRL_COUNTFLAG_Msk) && counter > 50) { - // This means that the HW reloaded VAL between the time we read VAL and the - // time we read CTRL, which implies that there is an interrupt pending - // to increment the tick counter. - milliseconds++; - } - uint32_t load = SysTick->LOAD; - counter = load - counter; // Convert from decrementing to incrementing - - // ((load + 1) / 1000) is the number of counts per microsecond. - // - // counter / ((load + 1) / 1000) scales from the systick clock to microseconds - // and is the same thing as (counter * 1000) / (load + 1) - return milliseconds * 1000 + (counter * 1000) / (load + 1); -} diff --git a/ports/stm32/systick.h b/ports/stm32/systick.h deleted file mode 100644 index 256a500c27..0000000000 --- a/ports/stm32/systick.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_SYSTICK_H -#define MICROPY_INCLUDED_STM32_SYSTICK_H - -void sys_tick_wait_at_least(uint32_t stc, uint32_t delay_ms); -bool sys_tick_has_passed(uint32_t stc, uint32_t delay_ms); - -#endif // MICROPY_INCLUDED_STM32_SYSTICK_H diff --git a/ports/stm32/timer.c b/ports/stm32/timer.c deleted file mode 100644 index cf198e8651..0000000000 --- a/ports/stm32/timer.c +++ /dev/null @@ -1,1477 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "timer.h" -#include "servo.h" -#include "pin.h" -#include "irq.h" - -/// \moduleref pyb -/// \class Timer - periodically call a function -/// -/// Timers can be used for a great variety of tasks. At the moment, only -/// the simplest case is implemented: that of calling a function periodically. -/// -/// Each timer consists of a counter that counts up at a certain rate. The rate -/// at which it counts is the peripheral clock frequency (in Hz) divided by the -/// timer prescaler. When the counter reaches the timer period it triggers an -/// event, and the counter resets back to zero. By using the callback method, -/// the timer event can call a Python function. -/// -/// Example usage to toggle an LED at a fixed frequency: -/// -/// tim = pyb.Timer(4) # create a timer object using timer 4 -/// tim.init(freq=2) # trigger at 2Hz -/// tim.callback(lambda t:pyb.LED(1).toggle()) -/// -/// Further examples: -/// -/// tim = pyb.Timer(4, freq=100) # freq in Hz -/// tim = pyb.Timer(4, prescaler=0, period=99) -/// tim.counter() # get counter (can also set) -/// tim.prescaler(2) # set prescaler (can also get) -/// tim.period(199) # set period (can also get) -/// tim.callback(lambda t: ...) # set callback for update interrupt (t=tim instance) -/// tim.callback(None) # clear callback -/// -/// *Note:* Timer 3 is used for fading the blue LED. Timer 5 controls -/// the servo driver, and Timer 6 is used for timed ADC/DAC reading/writing. -/// It is recommended to use the other timers in your programs. - -// The timers can be used by multiple drivers, and need a common point for -// the interrupts to be dispatched, so they are all collected here. -// -// TIM3: -// - LED 4, PWM to set the LED intensity -// -// TIM5: -// - servo controller, PWM -// -// TIM6: -// - ADC, DAC for read_timed and write_timed - -typedef enum { - CHANNEL_MODE_PWM_NORMAL, - CHANNEL_MODE_PWM_INVERTED, - CHANNEL_MODE_OC_TIMING, - CHANNEL_MODE_OC_ACTIVE, - CHANNEL_MODE_OC_INACTIVE, - CHANNEL_MODE_OC_TOGGLE, - CHANNEL_MODE_OC_FORCED_ACTIVE, - CHANNEL_MODE_OC_FORCED_INACTIVE, - CHANNEL_MODE_IC, - CHANNEL_MODE_ENC_A, - CHANNEL_MODE_ENC_B, - CHANNEL_MODE_ENC_AB, -} pyb_channel_mode; - -STATIC const struct { - qstr name; - uint32_t oc_mode; -} channel_mode_info[] = { - { MP_QSTR_PWM, TIM_OCMODE_PWM1 }, - { MP_QSTR_PWM_INVERTED, TIM_OCMODE_PWM2 }, - { MP_QSTR_OC_TIMING, TIM_OCMODE_TIMING }, - { MP_QSTR_OC_ACTIVE, TIM_OCMODE_ACTIVE }, - { MP_QSTR_OC_INACTIVE, TIM_OCMODE_INACTIVE }, - { MP_QSTR_OC_TOGGLE, TIM_OCMODE_TOGGLE }, - { MP_QSTR_OC_FORCED_ACTIVE, TIM_OCMODE_FORCED_ACTIVE }, - { MP_QSTR_OC_FORCED_INACTIVE, TIM_OCMODE_FORCED_INACTIVE }, - { MP_QSTR_IC, 0 }, - { MP_QSTR_ENC_A, TIM_ENCODERMODE_TI1 }, - { MP_QSTR_ENC_B, TIM_ENCODERMODE_TI2 }, - { MP_QSTR_ENC_AB, TIM_ENCODERMODE_TI12 }, -}; - -typedef struct _pyb_timer_channel_obj_t { - mp_obj_base_t base; - struct _pyb_timer_obj_t *timer; - uint8_t channel; - uint8_t mode; - mp_obj_t callback; - struct _pyb_timer_channel_obj_t *next; -} pyb_timer_channel_obj_t; - -typedef struct _pyb_timer_obj_t { - mp_obj_base_t base; - uint8_t tim_id; - uint8_t is_32bit; - mp_obj_t callback; - TIM_HandleTypeDef tim; - IRQn_Type irqn; - pyb_timer_channel_obj_t *channel; -} pyb_timer_obj_t; - -// The following yields TIM_IT_UPDATE when channel is zero and -// TIM_IT_CC1..TIM_IT_CC4 when channel is 1..4 -#define TIMER_IRQ_MASK(channel) (1 << (channel)) -#define TIMER_CNT_MASK(self) ((self)->is_32bit ? 0xffffffff : 0xffff) -#define TIMER_CHANNEL(self) ((((self)->channel) - 1) << 2) - -TIM_HandleTypeDef TIM5_Handle; -TIM_HandleTypeDef TIM6_Handle; - -#define PYB_TIMER_OBJ_ALL_NUM MP_ARRAY_SIZE(MP_STATE_PORT(pyb_timer_obj_all)) - -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in); -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback); -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback); - -void timer_init0(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - MP_STATE_PORT(pyb_timer_obj_all)[i] = NULL; - } -} - -// unregister all interrupt sources -void timer_deinit(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - pyb_timer_obj_t *tim = MP_STATE_PORT(pyb_timer_obj_all)[i]; - if (tim != NULL) { - pyb_timer_deinit(tim); - } - } -} - -#if defined(TIM5) -// TIM5 is set-up for the servo controller -// This function inits but does not start the timer -void timer_tim5_init(void) { - // TIM5 clock enable - __HAL_RCC_TIM5_CLK_ENABLE(); - - // set up and enable interrupt - NVIC_SetPriority(TIM5_IRQn, IRQ_PRI_TIM5); - HAL_NVIC_EnableIRQ(TIM5_IRQn); - - // PWM clock configuration - TIM5_Handle.Instance = TIM5; - TIM5_Handle.Init.Period = 2000 - 1; // timer cycles at 50Hz - TIM5_Handle.Init.Prescaler = (timer_get_source_freq(5) / 100000) - 1; // timer runs at 100kHz - TIM5_Handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - TIM5_Handle.Init.CounterMode = TIM_COUNTERMODE_UP; - - HAL_TIM_PWM_Init(&TIM5_Handle); -} -#endif - -#if defined(TIM6) -// Init TIM6 with a counter-overflow at the given frequency (given in Hz) -// TIM6 is used by the DAC and ADC for auto sampling at a given frequency -// This function inits but does not start the timer -TIM_HandleTypeDef *timer_tim6_init(uint freq) { - // TIM6 clock enable - __HAL_RCC_TIM6_CLK_ENABLE(); - - // Timer runs at SystemCoreClock / 2 - // Compute the prescaler value so TIM6 triggers at freq-Hz - uint32_t period = MAX(1, timer_get_source_freq(6) / freq); - uint32_t prescaler = 1; - while (period > 0xffff) { - period >>= 1; - prescaler <<= 1; - } - - // Time base clock configuration - TIM6_Handle.Instance = TIM6; - TIM6_Handle.Init.Period = period - 1; - TIM6_Handle.Init.Prescaler = prescaler - 1; - TIM6_Handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; // unused for TIM6 - TIM6_Handle.Init.CounterMode = TIM_COUNTERMODE_UP; // unused for TIM6 - HAL_TIM_Base_Init(&TIM6_Handle); - - return &TIM6_Handle; -} -#endif - -// Interrupt dispatch -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - #if MICROPY_HW_ENABLE_SERVO - if (htim == &TIM5_Handle) { - servo_timer_irq_callback(); - } - #endif -} - -// Get the frequency (in Hz) of the source clock for the given timer. -// On STM32F405/407/415/417 there are 2 cases for how the clock freq is set. -// If the APB prescaler is 1, then the timer clock is equal to its respective -// APB clock. Otherwise (APB prescaler > 1) the timer clock is twice its -// respective APB clock. See DM00031020 Rev 4, page 115. -uint32_t timer_get_source_freq(uint32_t tim_id) { - uint32_t source, clk_div; - if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) { - // TIM{1,8,9,10,11} are on APB2 - #if defined(STM32F0) - source = HAL_RCC_GetPCLK1Freq(); - clk_div = RCC->CFGR & RCC_CFGR_PPRE; - #elif defined(STM32H7) - source = HAL_RCC_GetPCLK2Freq(); - clk_div = RCC->D2CFGR & RCC_D2CFGR_D2PPRE2; - #else - source = HAL_RCC_GetPCLK2Freq(); - clk_div = RCC->CFGR & RCC_CFGR_PPRE2; - #endif - } else { - // TIM{2,3,4,5,6,7,12,13,14} are on APB1 - source = HAL_RCC_GetPCLK1Freq(); - #if defined(STM32F0) - clk_div = RCC->CFGR & RCC_CFGR_PPRE; - #elif defined(STM32H7) - clk_div = RCC->D2CFGR & RCC_D2CFGR_D2PPRE1; - #else - clk_div = RCC->CFGR & RCC_CFGR_PPRE1; - #endif - } - if (clk_div != 0) { - // APB prescaler for this timer is > 1 - source *= 2; - } - return source; -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC const mp_obj_type_t pyb_timer_channel_type; - -// This is the largest value that we can multiply by 100 and have the result -// fit in a uint32_t. -#define MAX_PERIOD_DIV_100 42949672 - -// computes prescaler and period so TIM triggers at freq-Hz -STATIC uint32_t compute_prescaler_period_from_freq(pyb_timer_obj_t *self, mp_obj_t freq_in, uint32_t *period_out) { - uint32_t source_freq = timer_get_source_freq(self->tim_id); - uint32_t prescaler = 1; - uint32_t period; - if (0) { - #if MICROPY_PY_BUILTINS_FLOAT - } else if (MP_OBJ_IS_TYPE(freq_in, &mp_type_float)) { - float freq = mp_obj_get_float(freq_in); - if (freq <= 0) { - goto bad_freq; - } - while (freq < 1 && prescaler < 6553) { - prescaler *= 10; - freq *= 10; - } - period = (float)source_freq / freq; - #endif - } else { - mp_int_t freq = mp_obj_get_int(freq_in); - if (freq <= 0) { - goto bad_freq; - bad_freq: - mp_raise_ValueError("must have positive freq"); - } - period = source_freq / freq; - } - period = MAX(1, period); - while (period > TIMER_CNT_MASK(self)) { - // if we can divide exactly, do that first - if (period % 5 == 0) { - prescaler *= 5; - period /= 5; - } else if (period % 3 == 0) { - prescaler *= 3; - period /= 3; - } else { - // may not divide exactly, but loses minimal precision - prescaler <<= 1; - period >>= 1; - } - } - *period_out = (period - 1) & TIMER_CNT_MASK(self); - return (prescaler - 1) & 0xffff; -} - -// Helper function for determining the period used for calculating percent -STATIC uint32_t compute_period(pyb_timer_obj_t *self) { - // In center mode, compare == period corresponds to 100% - // In edge mode, compare == (period + 1) corresponds to 100% - uint32_t period = (__HAL_TIM_GET_AUTORELOAD(&self->tim) & TIMER_CNT_MASK(self)); - if (period != 0xffffffff) { - if (self->tim.Init.CounterMode == TIM_COUNTERMODE_UP || - self->tim.Init.CounterMode == TIM_COUNTERMODE_DOWN) { - // Edge mode - period++; - } - } - return period; -} - -// Helper function to compute PWM value from timer period and percent value. -// 'percent_in' can be an int or a float between 0 and 100 (out of range -// values are clamped). -STATIC uint32_t compute_pwm_value_from_percent(uint32_t period, mp_obj_t percent_in) { - uint32_t cmp; - if (0) { - #if MICROPY_PY_BUILTINS_FLOAT - } else if (MP_OBJ_IS_TYPE(percent_in, &mp_type_float)) { - mp_float_t percent = mp_obj_get_float(percent_in); - if (percent <= 0.0) { - cmp = 0; - } else if (percent >= 100.0) { - cmp = period; - } else { - cmp = percent / 100.0 * ((mp_float_t)period); - } - #endif - } else { - // For integer arithmetic, if period is large and 100*period will - // overflow, then divide period before multiplying by cmp. Otherwise - // do it the other way round to retain precision. - mp_int_t percent = mp_obj_get_int(percent_in); - if (percent <= 0) { - cmp = 0; - } else if (percent >= 100) { - cmp = period; - } else if (period > MAX_PERIOD_DIV_100) { - cmp = (uint32_t)percent * (period / 100); - } else { - cmp = ((uint32_t)percent * period) / 100; - } - } - return cmp; -} - -// Helper function to compute percentage from timer perion and PWM value. -STATIC mp_obj_t compute_percent_from_pwm_value(uint32_t period, uint32_t cmp) { - #if MICROPY_PY_BUILTINS_FLOAT - mp_float_t percent; - if (cmp >= period) { - percent = 100.0; - } else { - percent = (mp_float_t)cmp * 100.0 / ((mp_float_t)period); - } - return mp_obj_new_float(percent); - #else - mp_int_t percent; - if (cmp >= period) { - percent = 100; - } else if (cmp > MAX_PERIOD_DIV_100) { - percent = cmp / (period / 100); - } else { - percent = cmp * 100 / period; - } - return mp_obj_new_int(percent); - #endif -} - -// Computes the 8-bit value for the DTG field in the BDTR register. -// -// 1 tick = 1 count of the timer's clock (source_freq) divided by div. -// 0-128 ticks in inrements of 1 -// 128-256 ticks in increments of 2 -// 256-512 ticks in increments of 8 -// 512-1008 ticks in increments of 16 -STATIC uint32_t compute_dtg_from_ticks(mp_int_t ticks) { - if (ticks <= 0) { - return 0; - } - if (ticks < 128) { - return ticks; - } - if (ticks < 256) { - return 0x80 | ((ticks - 128) / 2); - } - if (ticks < 512) { - return 0xC0 | ((ticks - 256) / 8); - } - if (ticks < 1008) { - return 0xE0 | ((ticks - 512) / 16); - } - return 0xFF; -} - -// Given the 8-bit value stored in the DTG field of the BDTR register, compute -// the number of ticks. -STATIC mp_int_t compute_ticks_from_dtg(uint32_t dtg) { - if ((dtg & 0x80) == 0) { - return dtg & 0x7F; - } - if ((dtg & 0xC0) == 0x80) { - return 128 + ((dtg & 0x3F) * 2); - } - if ((dtg & 0xE0) == 0xC0) { - return 256 + ((dtg & 0x1F) * 8); - } - return 512 + ((dtg & 0x1F) * 16); -} - -STATIC void config_deadtime(pyb_timer_obj_t *self, mp_int_t ticks) { - TIM_BreakDeadTimeConfigTypeDef deadTimeConfig; - deadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; - deadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - deadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - deadTimeConfig.DeadTime = compute_dtg_from_ticks(ticks); - deadTimeConfig.BreakState = TIM_BREAK_DISABLE; - deadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_LOW; - deadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - HAL_TIMEx_ConfigBreakDeadTime(&self->tim, &deadTimeConfig); -} - -TIM_HandleTypeDef *pyb_timer_get_handle(mp_obj_t timer) { - if (mp_obj_get_type(timer) != &pyb_timer_type) { - mp_raise_ValueError("need a Timer object"); - } - pyb_timer_obj_t *self = timer; - return &self->tim; -} - -STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_obj_t *self = self_in; - - if (self->tim.State == HAL_TIM_STATE_RESET) { - mp_printf(print, "Timer(%u)", self->tim_id); - } else { - uint32_t prescaler = self->tim.Instance->PSC & 0xffff; - uint32_t period = __HAL_TIM_GET_AUTORELOAD(&self->tim) & TIMER_CNT_MASK(self); - // for efficiency, we compute and print freq as an int (not a float) - uint32_t freq = timer_get_source_freq(self->tim_id) / ((prescaler + 1) * (period + 1)); - mp_printf(print, "Timer(%u, freq=%u, prescaler=%u, period=%u, mode=%s, div=%u", - self->tim_id, - freq, - prescaler, - period, - self->tim.Init.CounterMode == TIM_COUNTERMODE_UP ? "UP" : - self->tim.Init.CounterMode == TIM_COUNTERMODE_DOWN ? "DOWN" : "CENTER", - self->tim.Init.ClockDivision == TIM_CLOCKDIVISION_DIV4 ? 4 : - self->tim.Init.ClockDivision == TIM_CLOCKDIVISION_DIV2 ? 2 : 1); - - #if defined(IS_TIM_ADVANCED_INSTANCE) - if (IS_TIM_ADVANCED_INSTANCE(self->tim.Instance)) - #elif defined(IS_TIM_BREAK_INSTANCE) - if (IS_TIM_BREAK_INSTANCE(self->tim.Instance)) - #else - if (0) - #endif - { - mp_printf(print, ", deadtime=%u", - compute_ticks_from_dtg(self->tim.Instance->BDTR & TIM_BDTR_DTG)); - } - mp_print_str(print, ")"); - } -} - -/// \method init(*, freq, prescaler, period) -/// Initialise the timer. Initialisation must be either by frequency (in Hz) -/// or by prescaler and period: -/// -/// tim.init(freq=100) # set the timer to trigger at 100Hz -/// tim.init(prescaler=83, period=999) # set the prescaler and period directly -/// -/// Keyword arguments: -/// -/// - `freq` - specifies the periodic frequency of the timer. You migh also -/// view this as the frequency with which the timer goes through -/// one complete cycle. -/// -/// - `prescaler` [0-0xffff] - specifies the value to be loaded into the -/// timer's Prescaler Register (PSC). The timer clock source is divided by -/// (`prescaler + 1`) to arrive at the timer clock. Timers 2-7 and 12-14 -/// have a clock source of 84 MHz (pyb.freq()[2] * 2), and Timers 1, and 8-11 -/// have a clock source of 168 MHz (pyb.freq()[3] * 2). -/// -/// - `period` [0-0xffff] for timers 1, 3, 4, and 6-15. [0-0x3fffffff] for timers 2 & 5. -/// Specifies the value to be loaded into the timer's AutoReload -/// Register (ARR). This determines the period of the timer (i.e. when the -/// counter cycles). The timer counter will roll-over after `period + 1` -/// timer clock cycles. -/// -/// - `mode` can be one of: -/// - `Timer.UP` - configures the timer to count from 0 to ARR (default) -/// - `Timer.DOWN` - configures the timer to count from ARR down to 0. -/// - `Timer.CENTER` - confgures the timer to count from 0 to ARR and -/// then back down to 0. -/// -/// - `div` can be one of 1, 2, or 4. Divides the timer clock to determine -/// the sampling clock used by the digital filters. -/// -/// - `callback` - as per Timer.callback() -/// -/// - `deadtime` - specifies the amount of "dead" or inactive time between -/// transitions on complimentary channels (both channels will be inactive) -/// for this time). `deadtime` may be an integer between 0 and 1008, with -/// the following restrictions: 0-128 in steps of 1. 128-256 in steps of -/// 2, 256-512 in steps of 8, and 512-1008 in steps of 16. `deadime` -/// measures ticks of `source_freq` divided by `div` clock ticks. -/// `deadtime` is only available on timers 1 and 8. -/// -/// You must either specify freq or both of period and prescaler. -STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = TIM_COUNTERMODE_UP} }, - { MP_QSTR_div, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_deadtime, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the TIM configuration values - TIM_Base_InitTypeDef *init = &self->tim.Init; - - if (args[0].u_obj != mp_const_none) { - // set prescaler and period from desired frequency - init->Prescaler = compute_prescaler_period_from_freq(self, args[0].u_obj, &init->Period); - } else if (args[1].u_int != 0xffffffff && args[2].u_int != 0xffffffff) { - // set prescaler and period directly - init->Prescaler = args[1].u_int; - init->Period = args[2].u_int; - } else { - mp_raise_TypeError("must specify either freq, or prescaler and period"); - } - - init->CounterMode = args[3].u_int; - if (!IS_TIM_COUNTER_MODE(init->CounterMode)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid mode (%d)", init->CounterMode)); - } - - init->ClockDivision = args[4].u_int == 2 ? TIM_CLOCKDIVISION_DIV2 : - args[4].u_int == 4 ? TIM_CLOCKDIVISION_DIV4 : - TIM_CLOCKDIVISION_DIV1; - - init->RepetitionCounter = 0; - - // enable TIM clock - switch (self->tim_id) { - case 1: __HAL_RCC_TIM1_CLK_ENABLE(); break; - case 2: __HAL_RCC_TIM2_CLK_ENABLE(); break; - case 3: __HAL_RCC_TIM3_CLK_ENABLE(); break; - #if defined(TIM4) - case 4: __HAL_RCC_TIM4_CLK_ENABLE(); break; - #endif - #if defined(TIM5) - case 5: __HAL_RCC_TIM5_CLK_ENABLE(); break; - #endif - #if defined(TIM6) - case 6: __HAL_RCC_TIM6_CLK_ENABLE(); break; - #endif - #if defined(TIM7) - case 7: __HAL_RCC_TIM7_CLK_ENABLE(); break; - #endif - #if defined(TIM8) - case 8: __HAL_RCC_TIM8_CLK_ENABLE(); break; - #endif - #if defined(TIM9) - case 9: __HAL_RCC_TIM9_CLK_ENABLE(); break; - #endif - #if defined(TIM10) - case 10: __HAL_RCC_TIM10_CLK_ENABLE(); break; - #endif - #if defined(TIM11) - case 11: __HAL_RCC_TIM11_CLK_ENABLE(); break; - #endif - #if defined(TIM12) - case 12: __HAL_RCC_TIM12_CLK_ENABLE(); break; - #endif - #if defined(TIM13) - case 13: __HAL_RCC_TIM13_CLK_ENABLE(); break; - #endif - #if defined(TIM14) - case 14: __HAL_RCC_TIM14_CLK_ENABLE(); break; - #endif - #if defined(TIM15) - case 15: __HAL_RCC_TIM15_CLK_ENABLE(); break; - #endif - #if defined(TIM16) - case 16: __HAL_RCC_TIM16_CLK_ENABLE(); break; - #endif - #if defined(TIM17) - case 17: __HAL_RCC_TIM17_CLK_ENABLE(); break; - #endif - } - - // set IRQ priority (if not a special timer) - if (self->tim_id != 5) { - NVIC_SetPriority(IRQn_NONNEG(self->irqn), IRQ_PRI_TIMX); - if (self->tim_id == 1) { - NVIC_SetPriority(TIM1_CC_IRQn, IRQ_PRI_TIMX); - #if defined(TIM8) - } else if (self->tim_id == 8) { - NVIC_SetPriority(TIM8_CC_IRQn, IRQ_PRI_TIMX); - #endif - } - } - - // init TIM - HAL_TIM_Base_Init(&self->tim); - #if defined(IS_TIM_ADVANCED_INSTANCE) - if (IS_TIM_ADVANCED_INSTANCE(self->tim.Instance)) { - #elif defined(IS_TIM_BREAK_INSTANCE) - if (IS_TIM_BREAK_INSTANCE(self->tim.Instance)) { - #else - if (0) { - #endif - config_deadtime(self, args[6].u_int); - } - - // Enable ARPE so that the auto-reload register is buffered. - // This allows to smoothly change the frequency of the timer. - self->tim.Instance->CR1 |= TIM_CR1_ARPE; - - // Start the timer running - if (args[5].u_obj == mp_const_none) { - HAL_TIM_Base_Start(&self->tim); - } else { - pyb_timer_callback(self, args[5].u_obj); - } - - return mp_const_none; -} - -// This table encodes the timer instance and irq number (for the update irq). -// It assumes that timer instance pointer has the lower 8 bits cleared. -#define TIM_ENTRY(id, irq) [id - 1] = (uint32_t)TIM##id | irq -STATIC const uint32_t tim_instance_table[MICROPY_HW_MAX_TIMER] = { - #if defined(STM32F0) - TIM_ENTRY(1, TIM1_BRK_UP_TRG_COM_IRQn), - #elif defined(STM32F4) || defined(STM32F7) - TIM_ENTRY(1, TIM1_UP_TIM10_IRQn), - #elif defined(STM32L4) - TIM_ENTRY(1, TIM1_UP_TIM16_IRQn), - #endif - TIM_ENTRY(2, TIM2_IRQn), - TIM_ENTRY(3, TIM3_IRQn), - #if defined(TIM4) - TIM_ENTRY(4, TIM4_IRQn), - #endif - #if defined(TIM5) - TIM_ENTRY(5, TIM5_IRQn), - #endif - #if defined(TIM6) - TIM_ENTRY(6, TIM6_DAC_IRQn), - #endif - #if defined(TIM7) - TIM_ENTRY(7, TIM7_IRQn), - #endif - #if defined(TIM8) - #if defined(STM32F4) || defined(STM32F7) - TIM_ENTRY(8, TIM8_UP_TIM13_IRQn), - #elif defined(STM32L4) - TIM_ENTRY(8, TIM8_UP_IRQn), - #endif - #endif - #if defined(TIM9) - TIM_ENTRY(9, TIM1_BRK_TIM9_IRQn), - #endif - #if defined(TIM10) - TIM_ENTRY(10, TIM1_UP_TIM10_IRQn), - #endif - #if defined(TIM11) - TIM_ENTRY(11, TIM1_TRG_COM_TIM11_IRQn), - #endif - #if defined(TIM12) - TIM_ENTRY(12, TIM8_BRK_TIM12_IRQn), - #endif - #if defined(TIM13) - TIM_ENTRY(13, TIM8_UP_TIM13_IRQn), - #endif - #if defined(STM32F0) - TIM_ENTRY(14, TIM14_IRQn), - #elif defined(TIM14) - TIM_ENTRY(14, TIM8_TRG_COM_TIM14_IRQn), - #endif - #if defined(TIM15) - #if defined(STM32F0) || defined(STM32H7) - TIM_ENTRY(15, TIM15_IRQn), - #else - TIM_ENTRY(15, TIM1_BRK_TIM15_IRQn), - #endif - #endif - #if defined(TIM16) - #if defined(STM32F0) || defined(STM32H7) - TIM_ENTRY(16, TIM16_IRQn), - #else - TIM_ENTRY(16, TIM1_UP_TIM16_IRQn), - #endif - #endif - #if defined(TIM17) - #if defined(STM32F0) || defined(STM32H7) - TIM_ENTRY(17, TIM17_IRQn), - #else - TIM_ENTRY(17, TIM1_TRG_COM_TIM17_IRQn), - #endif - #endif -}; -#undef TIM_ENTRY - -/// \classmethod \constructor(id, ...) -/// Construct a new timer object of the given id. If additional -/// arguments are given, then the timer is initialised by `init(...)`. -/// `id` can be 1 to 14, excluding 3. -STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the timer id - mp_int_t tim_id = mp_obj_get_int(args[0]); - - // check if the timer exists - if (tim_id <= 0 || tim_id > MICROPY_HW_MAX_TIMER || tim_instance_table[tim_id - 1] == 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Timer(%d) doesn't exist", tim_id)); - } - - pyb_timer_obj_t *tim; - if (MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1] == NULL) { - // create new Timer object - tim = m_new_obj(pyb_timer_obj_t); - memset(tim, 0, sizeof(*tim)); - tim->base.type = &pyb_timer_type; - tim->tim_id = tim_id; - tim->is_32bit = tim_id == 2 || tim_id == 5; - tim->callback = mp_const_none; - uint32_t ti = tim_instance_table[tim_id - 1]; - tim->tim.Instance = (TIM_TypeDef*)(ti & 0xffffff00); - tim->irqn = ti & 0xff; - MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1] = tim; - } else { - // reference existing Timer object - tim = MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1]; - } - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)tim; -} - -STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init); - -// timer.deinit() -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - - // Disable the base interrupt - pyb_timer_callback(self_in, mp_const_none); - - pyb_timer_channel_obj_t *chan = self->channel; - self->channel = NULL; - - // Disable the channel interrupts - while (chan != NULL) { - pyb_timer_channel_callback(chan, mp_const_none); - pyb_timer_channel_obj_t *prev_chan = chan; - chan = chan->next; - prev_chan->next = NULL; - } - - self->tim.State = HAL_TIM_STATE_RESET; - self->tim.Instance->CCER = 0x0000; // disable all capture/compare outputs - self->tim.Instance->CR1 = 0x0000; // disable the timer and reset its state - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit); - -/// \method channel(channel, mode, ...) -/// -/// If only a channel number is passed, then a previously initialized channel -/// object is returned (or `None` if there is no previous channel). -/// -/// Othwerwise, a TimerChannel object is initialized and returned. -/// -/// Each channel can be configured to perform pwm, output compare, or -/// input capture. All channels share the same underlying timer, which means -/// that they share the same timer clock. -/// -/// Keyword arguments: -/// -/// - `mode` can be one of: -/// - `Timer.PWM` - configure the timer in PWM mode (active high). -/// - `Timer.PWM_INVERTED` - configure the timer in PWM mode (active low). -/// - `Timer.OC_TIMING` - indicates that no pin is driven. -/// - `Timer.OC_ACTIVE` - the pin will be made active when a compare -/// match occurs (active is determined by polarity) -/// - `Timer.OC_INACTIVE` - the pin will be made inactive when a compare -/// match occurs. -/// - `Timer.OC_TOGGLE` - the pin will be toggled when an compare match occurs. -/// - `Timer.OC_FORCED_ACTIVE` - the pin is forced active (compare match is ignored). -/// - `Timer.OC_FORCED_INACTIVE` - the pin is forced inactive (compare match is ignored). -/// - `Timer.IC` - configure the timer in Input Capture mode. -/// - `Timer.ENC_A` --- configure the timer in Encoder mode. The counter only changes when CH1 changes. -/// - `Timer.ENC_B` --- configure the timer in Encoder mode. The counter only changes when CH2 changes. -/// - `Timer.ENC_AB` --- configure the timer in Encoder mode. The counter changes when CH1 or CH2 changes. -/// -/// - `callback` - as per TimerChannel.callback() -/// -/// - `pin` None (the default) or a Pin object. If specified (and not None) -/// this will cause the alternate function of the the indicated pin -/// to be configured for this timer channel. An error will be raised if -/// the pin doesn't support any alternate functions for this timer channel. -/// -/// Keyword arguments for Timer.PWM modes: -/// -/// - `pulse_width` - determines the initial pulse width value to use. -/// - `pulse_width_percent` - determines the initial pulse width percentage to use. -/// -/// Keyword arguments for Timer.OC modes: -/// -/// - `compare` - determines the initial value of the compare register. -/// -/// - `polarity` can be one of: -/// - `Timer.HIGH` - output is active high -/// - `Timer.LOW` - output is acive low -/// -/// Optional keyword arguments for Timer.IC modes: -/// -/// - `polarity` can be one of: -/// - `Timer.RISING` - captures on rising edge. -/// - `Timer.FALLING` - captures on falling edge. -/// - `Timer.BOTH` - captures on both edges. -/// -/// Note that capture only works on the primary channel, and not on the -/// complimentary channels. -/// -/// Notes for Timer.ENC modes: -/// -/// - Requires 2 pins, so one or both pins will need to be configured to use -/// the appropriate timer AF using the Pin API. -/// - Read the encoder value using the timer.counter() method. -/// - Only works on CH1 and CH2 (and not on CH1N or CH2N) -/// - The channel number is ignored when setting the encoder mode. -/// -/// PWM Example: -/// -/// timer = pyb.Timer(2, freq=1000) -/// ch2 = timer.channel(2, pyb.Timer.PWM, pin=pyb.Pin.board.X2, pulse_width=210000) -/// ch3 = timer.channel(3, pyb.Timer.PWM, pin=pyb.Pin.board.X3, pulse_width=420000) -STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pulse_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pulse_width_percent, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_compare, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - }; - - pyb_timer_obj_t *self = pos_args[0]; - mp_int_t channel = mp_obj_get_int(pos_args[1]); - - if (channel < 1 || channel > 4) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid channel (%d)", channel)); - } - - pyb_timer_channel_obj_t *chan = self->channel; - pyb_timer_channel_obj_t *prev_chan = NULL; - - while (chan != NULL) { - if (chan->channel == channel) { - break; - } - prev_chan = chan; - chan = chan->next; - } - - // If only the channel number is given return the previously allocated - // channel (or None if no previous channel). - if (n_args == 2 && kw_args->used == 0) { - if (chan) { - return chan; - } - return mp_const_none; - } - - // If there was already a channel, then remove it from the list. Note that - // the order we do things here is important so as to appear atomic to - // the IRQ handler. - if (chan) { - // Turn off any IRQ associated with the channel. - pyb_timer_channel_callback(chan, mp_const_none); - - // Unlink the channel from the list. - if (prev_chan) { - prev_chan->next = chan->next; - } - self->channel = chan->next; - chan->next = NULL; - } - - // Allocate and initialize a new channel - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - chan = m_new_obj(pyb_timer_channel_obj_t); - memset(chan, 0, sizeof(*chan)); - chan->base.type = &pyb_timer_channel_type; - chan->timer = self; - chan->channel = channel; - chan->mode = args[0].u_int; - chan->callback = args[1].u_obj; - - mp_obj_t pin_obj = args[2].u_obj; - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("pin argument needs to be be a Pin type"); - } - const pin_obj_t *pin = pin_obj; - const pin_af_obj_t *af = pin_find_af(pin, AF_FN_TIM, self->tim_id); - if (af == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have an af for Timer(%d)", pin->name, self->tim_id)); - } - // pin.init(mode=AF_PP, af=idx) - const mp_obj_t args2[6] = { - (mp_obj_t)&pin_init_obj, - pin_obj, - MP_OBJ_NEW_QSTR(MP_QSTR_mode), MP_OBJ_NEW_SMALL_INT(GPIO_MODE_AF_PP), - MP_OBJ_NEW_QSTR(MP_QSTR_af), MP_OBJ_NEW_SMALL_INT(af->idx) - }; - mp_call_method_n_kw(0, 2, args2); - } - - // Link the channel to the timer before we turn the channel on. - // Note that this needs to appear atomic to the IRQ handler (the write - // to self->channel is atomic, so we're good, but I thought I'd mention - // in case this was ever changed in the future). - chan->next = self->channel; - self->channel = chan; - - switch (chan->mode) { - - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: { - TIM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - if (args[4].u_obj != mp_const_none) { - // pulse width percent given - uint32_t period = compute_period(self); - oc_config.Pulse = compute_pwm_value_from_percent(period, args[4].u_obj); - } else { - // use absolute pulse width value (defaults to 0 if nothing given) - oc_config.Pulse = args[3].u_int; - } - oc_config.OCPolarity = TIM_OCPOLARITY_HIGH; - oc_config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - oc_config.OCFastMode = TIM_OCFAST_DISABLE; - oc_config.OCIdleState = TIM_OCIDLESTATE_SET; - oc_config.OCNIdleState = TIM_OCNIDLESTATE_SET; - - HAL_TIM_PWM_ConfigChannel(&self->tim, &oc_config, TIMER_CHANNEL(chan)); - if (chan->callback == mp_const_none) { - HAL_TIM_PWM_Start(&self->tim, TIMER_CHANNEL(chan)); - } else { - pyb_timer_channel_callback(chan, chan->callback); - } - // Start the complimentary channel too (if its supported) - if (IS_TIM_CCXN_INSTANCE(self->tim.Instance, TIMER_CHANNEL(chan))) { - HAL_TIMEx_PWMN_Start(&self->tim, TIMER_CHANNEL(chan)); - } - break; - } - - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: - case CHANNEL_MODE_OC_FORCED_ACTIVE: - case CHANNEL_MODE_OC_FORCED_INACTIVE: { - TIM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - oc_config.Pulse = args[5].u_int; - oc_config.OCPolarity = args[6].u_int; - if (oc_config.OCPolarity == 0xffffffff) { - oc_config.OCPolarity = TIM_OCPOLARITY_HIGH; - } - if (oc_config.OCPolarity == TIM_OCPOLARITY_HIGH) { - oc_config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - } else { - oc_config.OCNPolarity = TIM_OCNPOLARITY_LOW; - } - oc_config.OCFastMode = TIM_OCFAST_DISABLE; - oc_config.OCIdleState = TIM_OCIDLESTATE_SET; - oc_config.OCNIdleState = TIM_OCNIDLESTATE_SET; - - if (!IS_TIM_OC_POLARITY(oc_config.OCPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid polarity (%d)", oc_config.OCPolarity)); - } - HAL_TIM_OC_ConfigChannel(&self->tim, &oc_config, TIMER_CHANNEL(chan)); - if (chan->callback == mp_const_none) { - HAL_TIM_OC_Start(&self->tim, TIMER_CHANNEL(chan)); - } else { - pyb_timer_channel_callback(chan, chan->callback); - } - // Start the complimentary channel too (if its supported) - if (IS_TIM_CCXN_INSTANCE(self->tim.Instance, TIMER_CHANNEL(chan))) { - HAL_TIMEx_OCN_Start(&self->tim, TIMER_CHANNEL(chan)); - } - break; - } - - case CHANNEL_MODE_IC: { - TIM_IC_InitTypeDef ic_config; - - ic_config.ICPolarity = args[6].u_int; - if (ic_config.ICPolarity == 0xffffffff) { - ic_config.ICPolarity = TIM_ICPOLARITY_RISING; - } - ic_config.ICSelection = TIM_ICSELECTION_DIRECTTI; - ic_config.ICPrescaler = TIM_ICPSC_DIV1; - ic_config.ICFilter = 0; - - if (!IS_TIM_IC_POLARITY(ic_config.ICPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid polarity (%d)", ic_config.ICPolarity)); - } - HAL_TIM_IC_ConfigChannel(&self->tim, &ic_config, TIMER_CHANNEL(chan)); - if (chan->callback == mp_const_none) { - HAL_TIM_IC_Start(&self->tim, TIMER_CHANNEL(chan)); - } else { - pyb_timer_channel_callback(chan, chan->callback); - } - break; - } - - case CHANNEL_MODE_ENC_A: - case CHANNEL_MODE_ENC_B: - case CHANNEL_MODE_ENC_AB: { - TIM_Encoder_InitTypeDef enc_config; - - enc_config.EncoderMode = channel_mode_info[chan->mode].oc_mode; - enc_config.IC1Polarity = args[6].u_int; - if (enc_config.IC1Polarity == 0xffffffff) { - enc_config.IC1Polarity = TIM_ICPOLARITY_RISING; - } - enc_config.IC2Polarity = enc_config.IC1Polarity; - enc_config.IC1Selection = TIM_ICSELECTION_DIRECTTI; - enc_config.IC2Selection = TIM_ICSELECTION_DIRECTTI; - enc_config.IC1Prescaler = TIM_ICPSC_DIV1; - enc_config.IC2Prescaler = TIM_ICPSC_DIV1; - enc_config.IC1Filter = 0; - enc_config.IC2Filter = 0; - - if (!IS_TIM_IC_POLARITY(enc_config.IC1Polarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid polarity (%d)", enc_config.IC1Polarity)); - } - // Only Timers 1, 2, 3, 4, 5, and 8 support encoder mode - if (self->tim.Instance != TIM1 - && self->tim.Instance != TIM2 - && self->tim.Instance != TIM3 - #if defined(TIM4) - && self->tim.Instance != TIM4 - #endif - #if defined(TIM5) - && self->tim.Instance != TIM5 - #endif - #if defined(TIM8) - && self->tim.Instance != TIM8 - #endif - ) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "encoder not supported on timer %d", self->tim_id)); - } - - // Disable & clear the timer interrupt so that we don't trigger - // an interrupt by initializing the timer. - __HAL_TIM_DISABLE_IT(&self->tim, TIM_IT_UPDATE); - HAL_TIM_Encoder_Init(&self->tim, &enc_config); - __HAL_TIM_SET_COUNTER(&self->tim, 0); - if (self->callback != mp_const_none) { - __HAL_TIM_CLEAR_FLAG(&self->tim, TIM_IT_UPDATE); - __HAL_TIM_ENABLE_IT(&self->tim, TIM_IT_UPDATE); - } - HAL_TIM_Encoder_Start(&self->tim, TIM_CHANNEL_ALL); - break; - } - - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid mode (%d)", chan->mode)); - } - - return chan; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel); - -/// \method counter([value]) -/// Get or set the timer counter. -STATIC mp_obj_t pyb_timer_counter(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->tim.Instance->CNT); - } else { - // set - __HAL_TIM_SET_COUNTER(&self->tim, mp_obj_get_int(args[1])); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_counter_obj, 1, 2, pyb_timer_counter); - -/// \method source_freq() -/// Get the frequency of the source of the timer. -STATIC mp_obj_t pyb_timer_source_freq(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - uint32_t source_freq = timer_get_source_freq(self->tim_id); - return mp_obj_new_int(source_freq); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_source_freq_obj, pyb_timer_source_freq); - -/// \method freq([value]) -/// Get or set the frequency for the timer (changes prescaler and period if set). -STATIC mp_obj_t pyb_timer_freq(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - uint32_t prescaler = self->tim.Instance->PSC & 0xffff; - uint32_t period = __HAL_TIM_GET_AUTORELOAD(&self->tim) & TIMER_CNT_MASK(self); - uint32_t source_freq = timer_get_source_freq(self->tim_id); - uint32_t divide = ((prescaler + 1) * (period + 1)); - #if MICROPY_PY_BUILTINS_FLOAT - if (source_freq % divide != 0) { - return mp_obj_new_float((float)source_freq / (float)divide); - } else - #endif - { - return mp_obj_new_int(source_freq / divide); - } - } else { - // set - uint32_t period; - uint32_t prescaler = compute_prescaler_period_from_freq(self, args[1], &period); - self->tim.Instance->PSC = prescaler; - __HAL_TIM_SET_AUTORELOAD(&self->tim, period); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_freq_obj, 1, 2, pyb_timer_freq); - -/// \method prescaler([value]) -/// Get or set the prescaler for the timer. -STATIC mp_obj_t pyb_timer_prescaler(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->tim.Instance->PSC & 0xffff); - } else { - // set - self->tim.Instance->PSC = mp_obj_get_int(args[1]) & 0xffff; - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_prescaler_obj, 1, 2, pyb_timer_prescaler); - -/// \method period([value]) -/// Get or set the period of the timer. -STATIC mp_obj_t pyb_timer_period(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(__HAL_TIM_GET_AUTORELOAD(&self->tim) & TIMER_CNT_MASK(self)); - } else { - // set - __HAL_TIM_SET_AUTORELOAD(&self->tim, mp_obj_get_int(args[1]) & TIMER_CNT_MASK(self)); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_period_obj, 1, 2, pyb_timer_period); - -/// \method callback(fun) -/// Set the function to be called when the timer triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_TIM_DISABLE_IT(&self->tim, TIM_IT_UPDATE); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - __HAL_TIM_DISABLE_IT(&self->tim, TIM_IT_UPDATE); - self->callback = callback; - // start timer, so that it interrupts on overflow, but clear any - // pending interrupts which may have been set by initializing it. - __HAL_TIM_CLEAR_FLAG(&self->tim, TIM_IT_UPDATE); - HAL_TIM_Base_Start_IT(&self->tim); // This will re-enable the IRQ - HAL_NVIC_EnableIRQ(self->irqn); - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_callback_obj, pyb_timer_callback); - -STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_counter), MP_ROM_PTR(&pyb_timer_counter_obj) }, - { MP_ROM_QSTR(MP_QSTR_source_freq), MP_ROM_PTR(&pyb_timer_source_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_timer_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_prescaler), MP_ROM_PTR(&pyb_timer_prescaler_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_INT(TIM_COUNTERMODE_UP) }, - { MP_ROM_QSTR(MP_QSTR_DOWN), MP_ROM_INT(TIM_COUNTERMODE_DOWN) }, - { MP_ROM_QSTR(MP_QSTR_CENTER), MP_ROM_INT(TIM_COUNTERMODE_CENTERALIGNED1) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_INT(CHANNEL_MODE_PWM_NORMAL) }, - { MP_ROM_QSTR(MP_QSTR_PWM_INVERTED), MP_ROM_INT(CHANNEL_MODE_PWM_INVERTED) }, - { MP_ROM_QSTR(MP_QSTR_OC_TIMING), MP_ROM_INT(CHANNEL_MODE_OC_TIMING) }, - { MP_ROM_QSTR(MP_QSTR_OC_ACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_INACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_INACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_TOGGLE), MP_ROM_INT(CHANNEL_MODE_OC_TOGGLE) }, - { MP_ROM_QSTR(MP_QSTR_OC_FORCED_ACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_FORCED_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_FORCED_INACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_FORCED_INACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_IC), MP_ROM_INT(CHANNEL_MODE_IC) }, - { MP_ROM_QSTR(MP_QSTR_ENC_A), MP_ROM_INT(CHANNEL_MODE_ENC_A) }, - { MP_ROM_QSTR(MP_QSTR_ENC_B), MP_ROM_INT(CHANNEL_MODE_ENC_B) }, - { MP_ROM_QSTR(MP_QSTR_ENC_AB), MP_ROM_INT(CHANNEL_MODE_ENC_AB) }, - { MP_ROM_QSTR(MP_QSTR_HIGH), MP_ROM_INT(TIM_OCPOLARITY_HIGH) }, - { MP_ROM_QSTR(MP_QSTR_LOW), MP_ROM_INT(TIM_OCPOLARITY_LOW) }, - { MP_ROM_QSTR(MP_QSTR_RISING), MP_ROM_INT(TIM_ICPOLARITY_RISING) }, - { MP_ROM_QSTR(MP_QSTR_FALLING), MP_ROM_INT(TIM_ICPOLARITY_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_BOTH), MP_ROM_INT(TIM_ICPOLARITY_BOTHEDGE) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table); - -const mp_obj_type_t pyb_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = pyb_timer_print, - .make_new = pyb_timer_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_timer_locals_dict, -}; - -/// \moduleref pyb -/// \class TimerChannel - setup a channel for a timer. -/// -/// Timer channels are used to generate/capture a signal using a timer. -/// -/// TimerChannel objects are created using the Timer.channel() method. -STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_channel_obj_t *self = self_in; - - mp_printf(print, "TimerChannel(timer=%u, channel=%u, mode=%s)", - self->timer->tim_id, - self->channel, - qstr_str(channel_mode_info[self->mode].name)); -} - -/// \method capture([value]) -/// Get or set the capture value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// capture is the logical name to use when the channel is in input capture mode. - -/// \method compare([value]) -/// Get or set the compare value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// compare is the logical name to use when the channel is in output compare mode. - -/// \method pulse_width([value]) -/// Get or set the pulse width value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// pulse_width is the logical name to use when the channel is in PWM mode. -/// -/// In edge aligned mode, a pulse_width of `period + 1` corresponds to a duty cycle of 100% -/// In center aligned mode, a pulse width of `period` corresponds to a duty cycle of 100% -STATIC mp_obj_t pyb_timer_channel_capture_compare(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(__HAL_TIM_GET_COMPARE(&self->timer->tim, TIMER_CHANNEL(self)) & TIMER_CNT_MASK(self->timer)); - } else { - // set - __HAL_TIM_SET_COMPARE(&self->timer->tim, TIMER_CHANNEL(self), mp_obj_get_int(args[1]) & TIMER_CNT_MASK(self->timer)); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_capture_compare_obj, 1, 2, pyb_timer_channel_capture_compare); - -/// \method pulse_width_percent([value]) -/// Get or set the pulse width percentage associated with a channel. The value -/// is a number between 0 and 100 and sets the percentage of the timer period -/// for which the pulse is active. The value can be an integer or -/// floating-point number for more accuracy. For example, a value of 25 gives -/// a duty cycle of 25%. -STATIC mp_obj_t pyb_timer_channel_pulse_width_percent(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - uint32_t period = compute_period(self->timer); - if (n_args == 1) { - // get - uint32_t cmp = __HAL_TIM_GET_COMPARE(&self->timer->tim, TIMER_CHANNEL(self)) & TIMER_CNT_MASK(self->timer); - return compute_percent_from_pwm_value(period, cmp); - } else { - // set - uint32_t cmp = compute_pwm_value_from_percent(period, args[1]); - __HAL_TIM_SET_COMPARE(&self->timer->tim, TIMER_CHANNEL(self), cmp & TIMER_CNT_MASK(self->timer)); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_pulse_width_percent_obj, 1, 2, pyb_timer_channel_pulse_width_percent); - -/// \method callback(fun) -/// Set the function to be called when the timer channel triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_channel_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_TIM_DISABLE_IT(&self->timer->tim, TIMER_IRQ_MASK(self->channel)); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - self->callback = callback; - uint8_t tim_id = self->timer->tim_id; - __HAL_TIM_CLEAR_IT(&self->timer->tim, TIMER_IRQ_MASK(self->channel)); - if (tim_id == 1) { - HAL_NVIC_EnableIRQ(TIM1_CC_IRQn); - #if defined(TIM8) // STM32F401 doesn't have a TIM8 - } else if (tim_id == 8) { - HAL_NVIC_EnableIRQ(TIM8_CC_IRQn); - #endif - } else { - HAL_NVIC_EnableIRQ(self->timer->irqn); - } - // start timer, so that it interrupts on overflow - switch (self->mode) { - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: - HAL_TIM_PWM_Start_IT(&self->timer->tim, TIMER_CHANNEL(self)); - break; - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: - case CHANNEL_MODE_OC_FORCED_ACTIVE: - case CHANNEL_MODE_OC_FORCED_INACTIVE: - HAL_TIM_OC_Start_IT(&self->timer->tim, TIMER_CHANNEL(self)); - break; - case CHANNEL_MODE_IC: - HAL_TIM_IC_Start_IT(&self->timer->tim, TIMER_CHANNEL(self)); - break; - } - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_channel_callback_obj, pyb_timer_channel_callback); - -STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_channel_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width_percent), MP_ROM_PTR(&pyb_timer_channel_pulse_width_percent_obj) }, - { MP_ROM_QSTR(MP_QSTR_capture), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_compare), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_timer_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_TimerChannel, - .print = pyb_timer_channel_print, - .locals_dict = (mp_obj_dict_t*)&pyb_timer_channel_locals_dict, -}; - -STATIC void timer_handle_irq_channel(pyb_timer_obj_t *tim, uint8_t channel, mp_obj_t callback) { - uint32_t irq_mask = TIMER_IRQ_MASK(channel); - - if (__HAL_TIM_GET_FLAG(&tim->tim, irq_mask) != RESET) { - if (__HAL_TIM_GET_IT_SOURCE(&tim->tim, irq_mask) != RESET) { - // clear the interrupt - __HAL_TIM_CLEAR_IT(&tim->tim, irq_mask); - - // execute callback if it's set - if (callback != mp_const_none) { - mp_sched_lock(); - // When executing code within a handler we must lock the GC to prevent - // any memory allocations. We must also catch any exceptions. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(callback, tim); - nlr_pop(); - } else { - // Uncaught exception; disable the callback so it doesn't run again. - tim->callback = mp_const_none; - __HAL_TIM_DISABLE_IT(&tim->tim, irq_mask); - if (channel == 0) { - printf("uncaught exception in Timer(%u) interrupt handler\n", tim->tim_id); - } else { - printf("uncaught exception in Timer(%u) channel %u interrupt handler\n", tim->tim_id, channel); - } - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - mp_sched_unlock(); - } - } - } -} - -void timer_irq_handler(uint tim_id) { - if (tim_id - 1 < PYB_TIMER_OBJ_ALL_NUM) { - // get the timer object - pyb_timer_obj_t *tim = MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1]; - - if (tim == NULL) { - // Timer object has not been set, so we can't do anything. - // This can happen under normal circumstances for timers like - // 1 & 10 which use the same IRQ. - return; - } - - // Check for timer (versus timer channel) interrupt. - timer_handle_irq_channel(tim, 0, tim->callback); - uint32_t handled = TIMER_IRQ_MASK(0); - - // Check to see if a timer channel interrupt was pending - pyb_timer_channel_obj_t *chan = tim->channel; - while (chan != NULL) { - timer_handle_irq_channel(tim, chan->channel, chan->callback); - handled |= TIMER_IRQ_MASK(chan->channel); - chan = chan->next; - } - - // Finally, clear any remaining interrupt sources. Otherwise we'll - // just get called continuously. - uint32_t unhandled = tim->tim.Instance->DIER & 0xff & ~handled; - if (unhandled != 0) { - __HAL_TIM_DISABLE_IT(&tim->tim, unhandled); - __HAL_TIM_CLEAR_IT(&tim->tim, unhandled); - printf("Unhandled interrupt SR=0x%02x (now disabled)\n", (unsigned int)unhandled); - } - } -} diff --git a/ports/stm32/timer.h b/ports/stm32/timer.h deleted file mode 100644 index 2ba91cf158..0000000000 --- a/ports/stm32/timer.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_TIMER_H -#define MICROPY_INCLUDED_STM32_TIMER_H - -extern TIM_HandleTypeDef TIM5_Handle; - -extern const mp_obj_type_t pyb_timer_type; - -void timer_init0(void); -void timer_tim5_init(void); -TIM_HandleTypeDef *timer_tim6_init(uint freq); -void timer_deinit(void); -uint32_t timer_get_source_freq(uint32_t tim_id); -void timer_irq_handler(uint tim_id); - -TIM_HandleTypeDef *pyb_timer_get_handle(mp_obj_t timer); - -#endif // MICROPY_INCLUDED_STM32_TIMER_H diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c deleted file mode 100644 index 5d3076ccde..0000000000 --- a/ports/stm32/uart.c +++ /dev/null @@ -1,1104 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -//#include "py/ioctl.h" -//#include "py/nlr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "lib/utils/interrupt_char.h" -#include "uart.h" -#include "irq.h" -#include "pendsv.h" - -/// \moduleref pyb -/// \class UART - duplex serial communication bus -/// -/// UART implements the standard UART/USART duplex serial communications protocol. At -/// the physical level it consists of 2 lines: RX and TX. The unit of communication -/// is a character (not to be confused with a string character) which can be 8 or 9 -/// bits wide. -/// -/// UART objects can be created and initialised using: -/// -/// from pyb import UART -/// -/// uart = UART(1, 9600) # init with given baudrate -/// uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters -/// -/// Bits can be 8 or 9. Parity can be None, 0 (even) or 1 (odd). Stop can be 1 or 2. -/// -/// A UART object acts like a stream object and reading and writing is done -/// using the standard stream methods: -/// -/// uart.read(10) # read 10 characters, returns a bytes object -/// uart.read() # read all available characters -/// uart.readline() # read a line -/// uart.readinto(buf) # read and store into the given buffer -/// uart.write('abc') # write the 3 characters -/// -/// Individual characters can be read/written using: -/// -/// uart.readchar() # read 1 character and returns it as an integer -/// uart.writechar(42) # write 1 character -/// -/// To check if there is anything to be read, use: -/// -/// uart.any() # returns True if any characters waiting - -#define CHAR_WIDTH_8BIT (0) -#define CHAR_WIDTH_9BIT (1) - -struct _pyb_uart_obj_t { - mp_obj_base_t base; - UART_HandleTypeDef uart; // this is 17 words big - IRQn_Type irqn; - pyb_uart_t uart_id : 8; - bool is_enabled : 1; - bool attached_to_repl; // whether the UART is attached to REPL - byte char_width; // 0 for 7,8 bit chars, 1 for 9 bit chars - uint16_t char_mask; // 0x7f for 7 bit, 0xff for 8 bit, 0x1ff for 9 bit - uint16_t timeout; // timeout waiting for first char - uint16_t timeout_char; // timeout waiting between chars - uint16_t read_buf_len; // len in chars; buf can hold len-1 chars - volatile uint16_t read_buf_head; // indexes first empty slot - uint16_t read_buf_tail; // indexes first full slot (not full if equals head) - byte *read_buf; // byte or uint16_t, depending on char size -}; - -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in); -extern void NORETURN __fatal_error(const char *msg); - -void uart_init0(void) { - #if defined(STM32H7) - RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0}; - // Configure USART1/6 clock source - RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART16; - RCC_PeriphClkInit.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; - if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { - __fatal_error("HAL_RCCEx_PeriphCLKConfig"); - } - - // Configure USART2/3/4/5/7/8 clock source - RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART234578; - RCC_PeriphClkInit.Usart16ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { - __fatal_error("HAL_RCCEx_PeriphCLKConfig"); - } - #endif - - for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) { - MP_STATE_PORT(pyb_uart_obj_all)[i] = NULL; - } -} - -// unregister all interrupt sources -void uart_deinit(void) { - for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) { - pyb_uart_obj_t *uart_obj = MP_STATE_PORT(pyb_uart_obj_all)[i]; - if (uart_obj != NULL) { - pyb_uart_deinit(uart_obj); - } - } -} - -STATIC bool uart_exists(int uart_id) { - if (uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all))) { - // safeguard against pyb_uart_obj_all array being configured too small - return false; - } - switch (uart_id) { - #if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX) - case PYB_UART_1: return true; - #endif - - #if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX) - case PYB_UART_2: return true; - #endif - - #if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX) - case PYB_UART_3: return true; - #endif - - #if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX) - case PYB_UART_4: return true; - #endif - - #if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX) - case PYB_UART_5: return true; - #endif - - #if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX) - case PYB_UART_6: return true; - #endif - - #if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX) - case PYB_UART_7: return true; - #endif - - #if defined(MICROPY_HW_UART8_TX) && defined(MICROPY_HW_UART8_RX) - case PYB_UART_8: return true; - #endif - - default: return false; - } -} - -// assumes Init parameters have been set up correctly -STATIC bool uart_init2(pyb_uart_obj_t *uart_obj) { - USART_TypeDef *UARTx; - IRQn_Type irqn; - int uart_unit; - - const pin_obj_t *pins[4] = {0}; - - switch (uart_obj->uart_id) { - #if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX) - case PYB_UART_1: - uart_unit = 1; - UARTx = USART1; - irqn = USART1_IRQn; - pins[0] = MICROPY_HW_UART1_TX; - pins[1] = MICROPY_HW_UART1_RX; - __HAL_RCC_USART1_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX) - case PYB_UART_2: - uart_unit = 2; - UARTx = USART2; - irqn = USART2_IRQn; - pins[0] = MICROPY_HW_UART2_TX; - pins[1] = MICROPY_HW_UART2_RX; - #if defined(MICROPY_HW_UART2_RTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - pins[2] = MICROPY_HW_UART2_RTS; - } - #endif - #if defined(MICROPY_HW_UART2_CTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - pins[3] = MICROPY_HW_UART2_CTS; - } - #endif - __HAL_RCC_USART2_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX) - case PYB_UART_3: - uart_unit = 3; - UARTx = USART3; - irqn = USART3_IRQn; - pins[0] = MICROPY_HW_UART3_TX; - pins[1] = MICROPY_HW_UART3_RX; - #if defined(MICROPY_HW_UART3_RTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - pins[2] = MICROPY_HW_UART3_RTS; - } - #endif - #if defined(MICROPY_HW_UART3_CTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - pins[3] = MICROPY_HW_UART3_CTS; - } - #endif - __HAL_RCC_USART3_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX) - case PYB_UART_4: - uart_unit = 4; - UARTx = UART4; - irqn = UART4_IRQn; - pins[0] = MICROPY_HW_UART4_TX; - pins[1] = MICROPY_HW_UART4_RX; - __HAL_RCC_UART4_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX) - case PYB_UART_5: - uart_unit = 5; - UARTx = UART5; - irqn = UART5_IRQn; - pins[0] = MICROPY_HW_UART5_TX; - pins[1] = MICROPY_HW_UART5_RX; - __HAL_RCC_UART5_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX) - case PYB_UART_6: - uart_unit = 6; - UARTx = USART6; - irqn = USART6_IRQn; - pins[0] = MICROPY_HW_UART6_TX; - pins[1] = MICROPY_HW_UART6_RX; - #if defined(MICROPY_HW_UART6_RTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - pins[2] = MICROPY_HW_UART6_RTS; - } - #endif - #if defined(MICROPY_HW_UART6_CTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - pins[3] = MICROPY_HW_UART6_CTS; - } - #endif - __HAL_RCC_USART6_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX) - case PYB_UART_7: - uart_unit = 7; - UARTx = UART7; - irqn = UART7_IRQn; - pins[0] = MICROPY_HW_UART7_TX; - pins[1] = MICROPY_HW_UART7_RX; - __HAL_RCC_UART7_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART8_TX) && defined(MICROPY_HW_UART8_RX) - case PYB_UART_8: - uart_unit = 8; - #if defined(STM32F0) - UARTx = USART8; - irqn = USART3_8_IRQn; - __HAL_RCC_USART8_CLK_ENABLE(); - #else - UARTx = UART8; - irqn = UART8_IRQn; - __HAL_RCC_UART8_CLK_ENABLE(); - #endif - pins[0] = MICROPY_HW_UART8_TX; - pins[1] = MICROPY_HW_UART8_RX; - break; - #endif - - default: - // UART does not exist or is not configured for this board - return false; - } - - uint32_t mode = MP_HAL_PIN_MODE_ALT; - uint32_t pull = MP_HAL_PIN_PULL_UP; - - for (uint i = 0; i < 4; i++) { - if (pins[i] != NULL) { - bool ret = mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_UART, uart_unit); - if (!ret) { - return false; - } - } - } - - uart_obj->irqn = irqn; - uart_obj->uart.Instance = UARTx; - - // init UARTx - HAL_UART_Init(&uart_obj->uart); - - uart_obj->is_enabled = true; - uart_obj->attached_to_repl = false; - - return true; -} - -void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached) { - self->attached_to_repl = attached; -} - -/* obsolete and unused -bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) { - UART_HandleTypeDef *uh = &uart_obj->uart; - memset(uh, 0, sizeof(*uh)); - uh->Init.BaudRate = baudrate; - uh->Init.WordLength = UART_WORDLENGTH_8B; - uh->Init.StopBits = UART_STOPBITS_1; - uh->Init.Parity = UART_PARITY_NONE; - uh->Init.Mode = UART_MODE_TX_RX; - uh->Init.HwFlowCtl = UART_HWCONTROL_NONE; - uh->Init.OverSampling = UART_OVERSAMPLING_16; - return uart_init2(uart_obj); -} -*/ - -mp_uint_t uart_rx_any(pyb_uart_obj_t *self) { - int buffer_bytes = self->read_buf_head - self->read_buf_tail; - if (buffer_bytes < 0) { - return buffer_bytes + self->read_buf_len; - } else if (buffer_bytes > 0) { - return buffer_bytes; - } else { - return __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET; - } -} - -// Waits at most timeout milliseconds for at least 1 char to become ready for -// reading (from buf or for direct reading). -// Returns true if something available, false if not. -STATIC bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) { - uint32_t start = HAL_GetTick(); - for (;;) { - if (self->read_buf_tail != self->read_buf_head || __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) { - return true; // have at least 1 char ready for reading - } - if (HAL_GetTick() - start >= timeout) { - return false; // timeout - } - MICROPY_EVENT_POLL_HOOK - } -} - -// assumes there is a character available -int uart_rx_char(pyb_uart_obj_t *self) { - if (self->read_buf_tail != self->read_buf_head) { - // buffering via IRQ - int data; - if (self->char_width == CHAR_WIDTH_9BIT) { - data = ((uint16_t*)self->read_buf)[self->read_buf_tail]; - } else { - data = self->read_buf[self->read_buf_tail]; - } - self->read_buf_tail = (self->read_buf_tail + 1) % self->read_buf_len; - if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) { - // UART was stalled by flow ctrl: re-enable IRQ now we have room in buffer - __HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); - } - return data; - } else { - // no buffering - #if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7) - return self->uart.Instance->RDR & self->char_mask; - #else - return self->uart.Instance->DR & self->char_mask; - #endif - } -} - -// Waits at most timeout milliseconds for TX register to become empty. -// Returns true if can write, false if can't. -STATIC bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) { - uint32_t start = HAL_GetTick(); - for (;;) { - if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) { - return true; // tx register is empty - } - if (HAL_GetTick() - start >= timeout) { - return false; // timeout - } - MICROPY_EVENT_POLL_HOOK - } -} - -// Waits at most timeout milliseconds for UART flag to be set. -// Returns true if flag is/was set, false on timeout. -STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t timeout) { - // Note: we don't use WFI to idle in this loop because UART tx doesn't generate - // an interrupt and the flag can be set quickly if the baudrate is large. - uint32_t start = HAL_GetTick(); - for (;;) { - if (__HAL_UART_GET_FLAG(&self->uart, flag)) { - return true; - } - if (timeout == 0 || HAL_GetTick() - start >= timeout) { - return false; // timeout - } - } -} - -// src - a pointer to the data to send (16-bit aligned for 9-bit chars) -// num_chars - number of characters to send (9-bit chars count for 2 bytes from src) -// *errcode - returns 0 for success, MP_Exxx on error -// returns the number of characters sent (valid even if there was an error) -STATIC size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) { - if (num_chars == 0) { - *errcode = 0; - return 0; - } - - uint32_t timeout; - if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - // CTS can hold off transmission for an arbitrarily long time. Apply - // the overall timeout rather than the character timeout. - timeout = self->timeout; - } else { - // The timeout specified here is for waiting for the TX data register to - // become empty (ie between chars), as well as for the final char to be - // completely transferred. The default value for timeout_char is long - // enough for 1 char, but we need to double it to wait for the last char - // to be transferred to the data register, and then to be transmitted. - timeout = 2 * self->timeout_char; - } - - const uint8_t *src = (const uint8_t*)src_in; - size_t num_tx = 0; - USART_TypeDef *uart = self->uart.Instance; - - while (num_tx < num_chars) { - if (!uart_wait_flag_set(self, UART_FLAG_TXE, timeout)) { - *errcode = MP_ETIMEDOUT; - return num_tx; - } - uint32_t data; - if (self->char_width == CHAR_WIDTH_9BIT) { - data = *((uint16_t*)src) & 0x1ff; - src += 2; - } else { - data = *src++; - } - #if defined(STM32F4) - uart->DR = data; - #else - uart->TDR = data; - #endif - ++num_tx; - } - - // wait for the UART frame to complete - if (!uart_wait_flag_set(self, UART_FLAG_TC, timeout)) { - *errcode = MP_ETIMEDOUT; - return num_tx; - } - - *errcode = 0; - return num_tx; -} - -void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) { - int errcode; - uart_tx_data(uart_obj, str, len, &errcode); -} - -// this IRQ handler is set up to handle RXNE interrupts only -void uart_irq_handler(mp_uint_t uart_id) { - // get the uart object - pyb_uart_obj_t *self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1]; - - if (self == NULL) { - // UART object has not been set, so we can't do anything, not - // even disable the IRQ. This should never happen. - return; - } - - if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) { - if (self->read_buf_len != 0) { - uint16_t next_head = (self->read_buf_head + 1) % self->read_buf_len; - if (next_head != self->read_buf_tail) { - // only read data if room in buf - #if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7) - int data = self->uart.Instance->RDR; // clears UART_FLAG_RXNE - #else - int data = self->uart.Instance->DR; // clears UART_FLAG_RXNE - #endif - data &= self->char_mask; - // Handle interrupt coming in on a UART REPL - if (self->attached_to_repl && data == mp_interrupt_char) { - pendsv_kbd_intr(); - return; - } - if (self->char_width == CHAR_WIDTH_9BIT) { - ((uint16_t*)self->read_buf)[self->read_buf_head] = data; - } else { - self->read_buf[self->read_buf_head] = data; - } - self->read_buf_head = next_head; - } else { // No room: leave char in buf, disable interrupt - __HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE); - } - } - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = self_in; - if (!self->is_enabled) { - mp_printf(print, "UART(%u)", self->uart_id); - } else { - mp_int_t bits; - switch (self->uart.Init.WordLength) { - #ifdef UART_WORDLENGTH_7B - case UART_WORDLENGTH_7B: bits = 7; break; - #endif - case UART_WORDLENGTH_8B: bits = 8; break; - case UART_WORDLENGTH_9B: default: bits = 9; break; - } - if (self->uart.Init.Parity != UART_PARITY_NONE) { - bits -= 1; - } - mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=", - self->uart_id, self->uart.Init.BaudRate, bits); - if (self->uart.Init.Parity == UART_PARITY_NONE) { - mp_print_str(print, "None"); - } else { - mp_printf(print, "%u", self->uart.Init.Parity == UART_PARITY_EVEN ? 0 : 1); - } - if (self->uart.Init.HwFlowCtl) { - mp_printf(print, ", flow="); - if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - mp_printf(print, "RTS%s", self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS ? "|" : ""); - } - if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - mp_printf(print, "CTS"); - } - } - mp_printf(print, ", stop=%u, timeout=%u, timeout_char=%u, read_buf_len=%u)", - self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2, - self->timeout, self->timeout_char, - self->read_buf_len == 0 ? 0 : self->read_buf_len - 1); // -1 to adjust for usable length of buffer - } -} - -/// \method init(baudrate, bits=8, parity=None, stop=1, *, timeout=1000, timeout_char=0, flow=0, read_buf_len=64) -/// -/// Initialise the UART bus with the given parameters: -/// -/// - `baudrate` is the clock rate. -/// - `bits` is the number of bits per byte, 7, 8 or 9. -/// - `parity` is the parity, `None`, 0 (even) or 1 (odd). -/// - `stop` is the number of stop bits, 1 or 2. -/// - `timeout` is the timeout in milliseconds to wait for the first character. -/// - `timeout_char` is the timeout in milliseconds to wait between characters. -/// - `flow` is RTS | CTS where RTS == 256, CTS == 512 -/// - `read_buf_len` is the character length of the read buffer (0 to disable). -STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_HWCONTROL_NONE} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_read_buf_len, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, - }; - - // parse args - struct { - mp_arg_val_t baudrate, bits, parity, stop, flow, timeout, timeout_char, read_buf_len; - } args; - mp_arg_parse_all(n_args, pos_args, kw_args, - MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&args); - - // set the UART configuration values - memset(&self->uart, 0, sizeof(self->uart)); - UART_InitTypeDef *init = &self->uart.Init; - - // baudrate - init->BaudRate = args.baudrate.u_int; - - // parity - mp_int_t bits = args.bits.u_int; - if (args.parity.u_obj == mp_const_none) { - init->Parity = UART_PARITY_NONE; - } else { - mp_int_t parity = mp_obj_get_int(args.parity.u_obj); - init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN; - bits += 1; // STs convention has bits including parity - } - - // number of bits - if (bits == 8) { - init->WordLength = UART_WORDLENGTH_8B; - } else if (bits == 9) { - init->WordLength = UART_WORDLENGTH_9B; - #ifdef UART_WORDLENGTH_7B - } else if (bits == 7) { - init->WordLength = UART_WORDLENGTH_7B; - #endif - } else { - mp_raise_ValueError("unsupported combination of bits and parity"); - } - - // stop bits - switch (args.stop.u_int) { - case 1: init->StopBits = UART_STOPBITS_1; break; - default: init->StopBits = UART_STOPBITS_2; break; - } - - // flow control - init->HwFlowCtl = args.flow.u_int; - - // extra config (not yet configurable) - init->Mode = UART_MODE_TX_RX; - init->OverSampling = UART_OVERSAMPLING_16; - - // init UART (if it fails, it's because the port doesn't exist) - if (!uart_init2(self)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", self->uart_id)); - } - - // set timeout - self->timeout = args.timeout.u_int; - - // set timeout_char - // make sure it is at least as long as a whole character (13 bits to be safe) - // minimum value is 2ms because sys-tick has a resolution of only 1ms - self->timeout_char = args.timeout_char.u_int; - uint32_t min_timeout_char = 13000 / init->BaudRate + 2; - if (self->timeout_char < min_timeout_char) { - self->timeout_char = min_timeout_char; - } - - // setup the read buffer - m_del(byte, self->read_buf, self->read_buf_len << self->char_width); - if (init->WordLength == UART_WORDLENGTH_9B && init->Parity == UART_PARITY_NONE) { - self->char_mask = 0x1ff; - self->char_width = CHAR_WIDTH_9BIT; - } else { - if (init->WordLength == UART_WORDLENGTH_9B || init->Parity == UART_PARITY_NONE) { - self->char_mask = 0xff; - } else { - self->char_mask = 0x7f; - } - self->char_width = CHAR_WIDTH_8BIT; - } - self->read_buf_head = 0; - self->read_buf_tail = 0; - if (args.read_buf_len.u_int <= 0) { - // no read buffer - self->read_buf_len = 0; - self->read_buf = NULL; - HAL_NVIC_DisableIRQ(self->irqn); - __HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE); - } else { - // read buffer using interrupts - self->read_buf_len = args.read_buf_len.u_int + 1; // +1 to adjust for usable length of buffer - self->read_buf = m_new(byte, self->read_buf_len << self->char_width); - __HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); - NVIC_SetPriority(IRQn_NONNEG(self->irqn), IRQ_PRI_UART); - HAL_NVIC_EnableIRQ(self->irqn); - } - - // compute actual baudrate that was configured - // (this formula assumes UART_OVERSAMPLING_16) - uint32_t actual_baudrate = 0; - #if defined(STM32F0) - actual_baudrate = HAL_RCC_GetPCLK1Freq(); - #elif defined(STM32F7) || defined(STM32H7) - UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED; - UART_GETCLOCKSOURCE(&self->uart, clocksource); - switch (clocksource) { - #if defined(STM32H7) - case UART_CLOCKSOURCE_D2PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_D3PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_D2PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break; - #else - case UART_CLOCKSOURCE_PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break; - case UART_CLOCKSOURCE_SYSCLK: actual_baudrate = HAL_RCC_GetSysClockFreq(); break; - #endif - #if defined(STM32H7) - case UART_CLOCKSOURCE_CSI: actual_baudrate = CSI_VALUE; break; - #endif - case UART_CLOCKSOURCE_HSI: actual_baudrate = HSI_VALUE; break; - case UART_CLOCKSOURCE_LSE: actual_baudrate = LSE_VALUE; break; - #if defined(STM32H7) - case UART_CLOCKSOURCE_PLL2: - case UART_CLOCKSOURCE_PLL3: - #endif - case UART_CLOCKSOURCE_UNDEFINED: break; - } - #else - if (self->uart.Instance == USART1 - #if defined(USART6) - || self->uart.Instance == USART6 - #endif - ) { - actual_baudrate = HAL_RCC_GetPCLK2Freq(); - } else { - actual_baudrate = HAL_RCC_GetPCLK1Freq(); - } - #endif - actual_baudrate /= self->uart.Instance->BRR; - - // check we could set the baudrate within 5% - uint32_t baudrate_diff; - if (actual_baudrate > init->BaudRate) { - baudrate_diff = actual_baudrate - init->BaudRate; - } else { - baudrate_diff = init->BaudRate - actual_baudrate; - } - init->BaudRate = actual_baudrate; // remember actual baudrate for printing - if (20 * baudrate_diff > init->BaudRate) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "set baudrate %d is not within 5%% of desired value", actual_baudrate)); - } - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'. -/// With no additional parameters, the UART object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the UART busses are: -/// -/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)` -/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)` -/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)` -/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)` -/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)` -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out port - int uart_id = 0; - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { - #ifdef MICROPY_HW_UART1_NAME - } else if (strcmp(port, MICROPY_HW_UART1_NAME) == 0) { - uart_id = PYB_UART_1; - #endif - #ifdef MICROPY_HW_UART2_NAME - } else if (strcmp(port, MICROPY_HW_UART2_NAME) == 0) { - uart_id = PYB_UART_2; - #endif - #ifdef MICROPY_HW_UART3_NAME - } else if (strcmp(port, MICROPY_HW_UART3_NAME) == 0) { - uart_id = PYB_UART_3; - #endif - #ifdef MICROPY_HW_UART4_NAME - } else if (strcmp(port, MICROPY_HW_UART4_NAME) == 0) { - uart_id = PYB_UART_4; - #endif - #ifdef MICROPY_HW_UART5_NAME - } else if (strcmp(port, MICROPY_HW_UART5_NAME) == 0) { - uart_id = PYB_UART_5; - #endif - #ifdef MICROPY_HW_UART6_NAME - } else if (strcmp(port, MICROPY_HW_UART6_NAME) == 0) { - uart_id = PYB_UART_6; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%s) doesn't exist", port)); - } - } else { - uart_id = mp_obj_get_int(args[0]); - if (!uart_exists(uart_id)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", uart_id)); - } - } - - pyb_uart_obj_t *self; - if (MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] == NULL) { - // create new UART object - self = m_new0(pyb_uart_obj_t, 1); - self->base.type = &pyb_uart_type; - self->uart_id = uart_id; - MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] = self; - } else { - // reference existing UART object - self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1]; - } - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args); - } - - return self; -} - -STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -/// \method deinit() -/// Turn off the UART bus. -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - self->is_enabled = false; - UART_HandleTypeDef *uart = &self->uart; - HAL_UART_DeInit(uart); - if (uart->Instance == USART1) { - HAL_NVIC_DisableIRQ(USART1_IRQn); - __HAL_RCC_USART1_FORCE_RESET(); - __HAL_RCC_USART1_RELEASE_RESET(); - __HAL_RCC_USART1_CLK_DISABLE(); - } else if (uart->Instance == USART2) { - HAL_NVIC_DisableIRQ(USART2_IRQn); - __HAL_RCC_USART2_FORCE_RESET(); - __HAL_RCC_USART2_RELEASE_RESET(); - __HAL_RCC_USART2_CLK_DISABLE(); - #if defined(USART3) - } else if (uart->Instance == USART3) { - #if !defined(STM32F0) - HAL_NVIC_DisableIRQ(USART3_IRQn); - #endif - __HAL_RCC_USART3_FORCE_RESET(); - __HAL_RCC_USART3_RELEASE_RESET(); - __HAL_RCC_USART3_CLK_DISABLE(); - #endif - #if defined(UART4) - } else if (uart->Instance == UART4) { - HAL_NVIC_DisableIRQ(UART4_IRQn); - __HAL_RCC_UART4_FORCE_RESET(); - __HAL_RCC_UART4_RELEASE_RESET(); - __HAL_RCC_UART4_CLK_DISABLE(); - #endif - #if defined(UART5) - } else if (uart->Instance == UART5) { - HAL_NVIC_DisableIRQ(UART5_IRQn); - __HAL_RCC_UART5_FORCE_RESET(); - __HAL_RCC_UART5_RELEASE_RESET(); - __HAL_RCC_UART5_CLK_DISABLE(); - #endif - #if defined(UART6) - } else if (uart->Instance == USART6) { - HAL_NVIC_DisableIRQ(USART6_IRQn); - __HAL_RCC_USART6_FORCE_RESET(); - __HAL_RCC_USART6_RELEASE_RESET(); - __HAL_RCC_USART6_CLK_DISABLE(); - #endif - #if defined(UART7) - } else if (uart->Instance == UART7) { - HAL_NVIC_DisableIRQ(UART7_IRQn); - __HAL_RCC_UART7_FORCE_RESET(); - __HAL_RCC_UART7_RELEASE_RESET(); - __HAL_RCC_UART7_CLK_DISABLE(); - #endif - #if defined(UART8) - } else if (uart->Instance == UART8) { - HAL_NVIC_DisableIRQ(UART8_IRQn); - __HAL_RCC_UART8_FORCE_RESET(); - __HAL_RCC_UART8_RELEASE_RESET(); - __HAL_RCC_UART8_CLK_DISABLE(); - #endif - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); - -/// \method any() -/// Return `True` if any characters waiting, else `False`. -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -/// \method writechar(char) -/// Write a single character on the bus. `char` is an integer to write. -/// Return value: `None`. -STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) { - pyb_uart_obj_t *self = self_in; - - // get the character to write (might be 9 bits) - uint16_t data = mp_obj_get_int(char_in); - - // write the character - int errcode; - if (uart_tx_wait(self, self->timeout)) { - uart_tx_data(self, &data, 1, &errcode); - } else { - errcode = MP_ETIMEDOUT; - } - - if (errcode != 0) { - mp_raise_OSError(errcode); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_uart_writechar_obj, pyb_uart_writechar); - -/// \method readchar() -/// Receive a single character on the bus. -/// Return value: The character read, as an integer. Returns -1 on timeout. -STATIC mp_obj_t pyb_uart_readchar(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - if (uart_rx_wait(self, self->timeout)) { - return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self)); - } else { - // return -1 on timeout - return MP_OBJ_NEW_SMALL_INT(-1); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar); - -// uart.sendbreak() -STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - #if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7) - self->uart.Instance->RQR = USART_RQR_SBKRQ; // write-only register - #else - self->uart.Instance->CR1 |= USART_CR1_SBK; - #endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - // instance methods - - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - - /// \method read([nbytes]) - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - /// \method readline() - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)}, - /// \method readinto(buf[, nbytes]) - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - /// \method write(buf) - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - - { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&pyb_uart_writechar_obj) }, - { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&pyb_uart_readchar_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, - { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - byte *buf = buf_in; - - // check that size is a multiple of character width - if (size & self->char_width) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - // convert byte size to char size - size >>= self->char_width; - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // wait for first char to become available - if (!uart_rx_wait(self, self->timeout)) { - // return EAGAIN error to indicate non-blocking (then read() method returns None) - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // read the data - byte *orig_buf = buf; - for (;;) { - int data = uart_rx_char(self); - if (self->char_width == CHAR_WIDTH_9BIT) { - *(uint16_t*)buf = data; - buf += 2; - } else { - *buf++ = data; - } - if (--size == 0 || !uart_rx_wait(self, self->timeout_char)) { - // return number of bytes read - return buf - orig_buf; - } - } -} - -STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - const byte *buf = buf_in; - - // check that size is a multiple of character width - if (size & self->char_width) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - // wait to be able to write the first character. EAGAIN causes write to return None - if (!uart_tx_wait(self, self->timeout)) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // write the data - size_t num_tx = uart_tx_data(self, buf, size >> self->char_width, errcode); - - if (*errcode == 0 || *errcode == MP_ETIMEDOUT) { - // return number of bytes written, even if there was a timeout - return num_tx << self->char_width; - } else { - return MP_STREAM_ERROR; - } -} - -STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_uart_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = pyb_uart_read, - .write = pyb_uart_write, - .ioctl = pyb_uart_ioctl, - .is_text = false, -}; - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_uart_locals_dict, -}; diff --git a/ports/stm32/uart.h b/ports/stm32/uart.h deleted file mode 100644 index 4ab18ff225..0000000000 --- a/ports/stm32/uart.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_UART_H -#define MICROPY_INCLUDED_STM32_UART_H - -typedef enum { - PYB_UART_NONE = 0, - PYB_UART_1 = 1, - PYB_UART_2 = 2, - PYB_UART_3 = 3, - PYB_UART_4 = 4, - PYB_UART_5 = 5, - PYB_UART_6 = 6, - PYB_UART_7 = 7, - PYB_UART_8 = 8, -} pyb_uart_t; - -typedef struct _pyb_uart_obj_t pyb_uart_obj_t; -extern const mp_obj_type_t pyb_uart_type; - -void uart_init0(void); -void uart_deinit(void); -void uart_irq_handler(mp_uint_t uart_id); - -void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached); -mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj); -int uart_rx_char(pyb_uart_obj_t *uart_obj); -void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len); - -#endif // MICROPY_INCLUDED_STM32_UART_H diff --git a/ports/stm32/usb.c b/ports/stm32/usb.c deleted file mode 100644 index c6fc86e05d..0000000000 --- a/ports/stm32/usb.c +++ /dev/null @@ -1,785 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_cdc_msc_hid.h" -#include "usbd_cdc_interface.h" -#include "usbd_msc_storage.h" -#include "usbd_hid_interface.h" - -#include "py/ioctl.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "bufhelper.h" -#include "usb.h" - -#if MICROPY_HW_ENABLE_USB - -// Work out which USB device to use as the main one (the one with the REPL) -#if !defined(MICROPY_HW_USB_MAIN_DEV) -#if defined(MICROPY_HW_USB_FS) -#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_FS_ID) -#elif defined(MICROPY_HW_USB_HS) && defined(MICROPY_HW_USB_HS_IN_FS) -#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_HS_ID) -#else -#error Unable to determine proper MICROPY_HW_USB_MAIN_DEV to use -#endif -#endif - -// this will be persistent across a soft-reset -mp_uint_t pyb_usb_flags = 0; - -typedef struct _usb_device_t { - uint32_t enabled; - USBD_HandleTypeDef hUSBDDevice; - usbd_cdc_msc_hid_state_t usbd_cdc_msc_hid_state; - usbd_cdc_itf_t usbd_cdc_itf; - #if MICROPY_HW_USB_ENABLE_CDC2 - usbd_cdc_itf_t usbd_cdc2_itf; - #endif - usbd_hid_itf_t usbd_hid_itf; -} usb_device_t; - -usb_device_t usb_device; -pyb_usb_storage_medium_t pyb_usb_storage_medium = PYB_USB_STORAGE_MEDIUM_NONE; - -// predefined hid mouse data -STATIC const mp_obj_str_t pyb_usb_hid_mouse_desc_obj = { - {&mp_type_bytes}, - 0, // hash not valid - USBD_HID_MOUSE_REPORT_DESC_SIZE, - USBD_HID_MOUSE_ReportDesc, -}; -const mp_obj_tuple_t pyb_usb_hid_mouse_obj = { - {&mp_type_tuple}, - 5, - { - MP_OBJ_NEW_SMALL_INT(1), // subclass: boot - MP_OBJ_NEW_SMALL_INT(2), // protocol: mouse - MP_OBJ_NEW_SMALL_INT(USBD_HID_MOUSE_MAX_PACKET), - MP_OBJ_NEW_SMALL_INT(8), // polling interval: 8ms - (mp_obj_t)&pyb_usb_hid_mouse_desc_obj, - }, -}; - -// predefined hid keyboard data -STATIC const mp_obj_str_t pyb_usb_hid_keyboard_desc_obj = { - {&mp_type_bytes}, - 0, // hash not valid - USBD_HID_KEYBOARD_REPORT_DESC_SIZE, - USBD_HID_KEYBOARD_ReportDesc, -}; -const mp_obj_tuple_t pyb_usb_hid_keyboard_obj = { - {&mp_type_tuple}, - 5, - { - MP_OBJ_NEW_SMALL_INT(1), // subclass: boot - MP_OBJ_NEW_SMALL_INT(1), // protocol: keyboard - MP_OBJ_NEW_SMALL_INT(USBD_HID_KEYBOARD_MAX_PACKET), - MP_OBJ_NEW_SMALL_INT(8), // polling interval: 8ms - (mp_obj_t)&pyb_usb_hid_keyboard_desc_obj, - }, -}; - -void pyb_usb_init0(void) { - mp_hal_set_interrupt_char(-1); - MP_STATE_PORT(pyb_hid_report_desc) = MP_OBJ_NULL; -} - -bool pyb_usb_dev_init(uint16_t vid, uint16_t pid, usb_device_mode_t mode, USBD_HID_ModeInfoTypeDef *hid_info) { - bool high_speed = (mode & USBD_MODE_HIGH_SPEED) != 0; - mode &= 0x7f; - usb_device_t *usb_dev = &usb_device; - if (!usb_dev->enabled) { - // only init USB once in the device's power-lifetime - - // set up the USBD state - USBD_HandleTypeDef *usbd = &usb_dev->hUSBDDevice; - usbd->id = MICROPY_HW_USB_MAIN_DEV; - usbd->dev_state = USBD_STATE_DEFAULT; - usbd->pDesc = (USBD_DescriptorsTypeDef*)&USBD_Descriptors; - usbd->pClass = &USBD_CDC_MSC_HID; - usb_dev->usbd_cdc_msc_hid_state.pdev = usbd; - usb_dev->usbd_cdc_msc_hid_state.cdc = &usb_dev->usbd_cdc_itf.base; - #if MICROPY_HW_USB_ENABLE_CDC2 - usb_dev->usbd_cdc_msc_hid_state.cdc2 = &usb_dev->usbd_cdc2_itf.base; - #endif - usb_dev->usbd_cdc_msc_hid_state.hid = &usb_dev->usbd_hid_itf.base; - usbd->pClassData = &usb_dev->usbd_cdc_msc_hid_state; - - // configure the VID, PID and the USBD mode (interfaces it will expose) - USBD_SetVIDPIDRelease(&usb_dev->usbd_cdc_msc_hid_state, vid, pid, 0x0200, mode == USBD_MODE_CDC); - if (USBD_SelectMode(&usb_dev->usbd_cdc_msc_hid_state, mode, hid_info) != 0) { - return false; - } - - switch (pyb_usb_storage_medium) { -#if MICROPY_HW_HAS_SDCARD - case PYB_USB_STORAGE_MEDIUM_SDCARD: - USBD_MSC_RegisterStorage(&usb_dev->usbd_cdc_msc_hid_state, (USBD_StorageTypeDef*)&USBD_SDCARD_STORAGE_fops); - break; -#endif - default: - USBD_MSC_RegisterStorage(&usb_dev->usbd_cdc_msc_hid_state, (USBD_StorageTypeDef*)&USBD_FLASH_STORAGE_fops); - break; - } - - // start the USB device - USBD_LL_Init(usbd, high_speed); - USBD_LL_Start(usbd); - usb_dev->enabled = true; - } - - return true; -} - -void pyb_usb_dev_deinit(void) { - usb_device_t *usb_dev = &usb_device; - if (usb_dev->enabled) { - USBD_Stop(&usb_dev->hUSBDDevice); - usb_dev->enabled = false; - } -} - -bool usb_vcp_is_enabled(void) { - return usb_device.enabled; -} - -int usb_vcp_recv_byte(uint8_t *c) { - return usbd_cdc_rx(&usb_device.usbd_cdc_itf, c, 1, 0); -} - -void usb_vcp_send_strn(const char *str, int len) { - if (usb_device.enabled) { - usbd_cdc_tx_always(&usb_device.usbd_cdc_itf, (const uint8_t*)str, len); - } -} - -usbd_cdc_itf_t *usb_vcp_get(int idx) { - #if MICROPY_HW_USB_ENABLE_CDC2 - if (idx == 1) { - return &usb_device.usbd_cdc2_itf; - } - #endif - return &usb_device.usbd_cdc_itf; -} - -/******************************************************************************/ -// MicroPython bindings for USB - -/* - Philosophy of USB driver and Python API: pyb.usb_mode(...) configures the USB - on the board. The USB itself is not an entity, rather the interfaces are, and - can be accessed by creating objects, such as pyb.USB_VCP() and pyb.USB_HID(). - - We have: - - pyb.usb_mode() # return the current usb mode - pyb.usb_mode(None) # disable USB - pyb.usb_mode('VCP') # enable with VCP interface - pyb.usb_mode('VCP+MSC') # enable with VCP and MSC interfaces - pyb.usb_mode('VCP+HID') # enable with VCP and HID, defaulting to mouse protocol - pyb.usb_mode('VCP+HID', vid=0xf055, pid=0x9800) # specify VID and PID - pyb.usb_mode('VCP+HID', hid=pyb.hid_mouse) - pyb.usb_mode('VCP+HID', hid=pyb.hid_keyboard) - pyb.usb_mode('VCP+HID', pid=0x1234, hid=(subclass, protocol, max_packet_len, polling_interval, report_desc)) - - vcp = pyb.USB_VCP() # get the VCP device for read/write - hid = pyb.USB_HID() # get the HID device for write/poll - - Possible extensions: - pyb.usb_mode('host', ...) - pyb.usb_mode('OTG', ...) - pyb.usb_mode(..., port=2) # for second USB port -*/ - -STATIC mp_obj_t pyb_usb_mode(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_vid, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = USBD_VID} }, - { MP_QSTR_pid, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_hid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = (mp_obj_t)&pyb_usb_hid_mouse_obj} }, - #if USBD_SUPPORT_HS_MODE - { MP_QSTR_high_speed, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - #endif - }; - - // fetch the current usb mode -> pyb.usb_mode() - if (n_args == 0) { - #if defined(USE_HOST_MODE) - return MP_OBJ_NEW_QSTR(MP_QSTR_host); - #else - uint8_t mode = USBD_GetMode(&usb_device.usbd_cdc_msc_hid_state); - switch (mode) { - case USBD_MODE_CDC: - return MP_OBJ_NEW_QSTR(MP_QSTR_VCP); - case USBD_MODE_MSC: - return MP_OBJ_NEW_QSTR(MP_QSTR_MSC); - case USBD_MODE_HID: - return MP_OBJ_NEW_QSTR(MP_QSTR_HID); - case USBD_MODE_CDC_MSC: - return MP_OBJ_NEW_QSTR(MP_QSTR_VCP_plus_MSC); - case USBD_MODE_CDC_HID: - return MP_OBJ_NEW_QSTR(MP_QSTR_VCP_plus_HID); - case USBD_MODE_MSC_HID: - return MP_OBJ_NEW_QSTR(MP_QSTR_MSC_plus_HID); - default: - return mp_const_none; - } - #endif - } - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // record the fact that the usb has been explicitly configured - pyb_usb_flags |= PYB_USB_FLAG_USB_MODE_CALLED; - - // check if user wants to disable the USB - if (args[0].u_obj == mp_const_none) { - // disable usb - pyb_usb_dev_deinit(); - return mp_const_none; - } - - // get mode string - const char *mode_str = mp_obj_str_get_str(args[0].u_obj); - -#if defined(USE_HOST_MODE) - - // hardware configured for USB host mode - - if (strcmp(mode_str, "host") == 0) { - pyb_usb_host_init(); - } else { - goto bad_mode; - } - -#else - - // hardware configured for USB device mode - - // get the VID, PID and USB mode - // note: PID=-1 means select PID based on mode - // note: we support CDC as a synonym for VCP for backward compatibility - uint16_t vid = args[1].u_int; - uint16_t pid = args[2].u_int; - usb_device_mode_t mode; - if (strcmp(mode_str, "CDC+MSC") == 0 || strcmp(mode_str, "VCP+MSC") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC_MSC; - } - mode = USBD_MODE_CDC_MSC; - #if MICROPY_HW_USB_ENABLE_CDC2 - } else if (strcmp(mode_str, "VCP+VCP+MSC") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC2_MSC; - } - mode = USBD_MODE_CDC2_MSC; - #endif - } else if (strcmp(mode_str, "CDC+HID") == 0 || strcmp(mode_str, "VCP+HID") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC_HID; - } - mode = USBD_MODE_CDC_HID; - } else if (strcmp(mode_str, "CDC") == 0 || strcmp(mode_str, "VCP") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC; - } - mode = USBD_MODE_CDC; - } else if (strcmp(mode_str, "MSC") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_MSC; - } - mode = USBD_MODE_MSC; - } else { - goto bad_mode; - } - - // get hid info if user selected such a mode - USBD_HID_ModeInfoTypeDef hid_info; - if (mode & USBD_MODE_HID) { - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[3].u_obj, 5, &items); - hid_info.subclass = mp_obj_get_int(items[0]); - hid_info.protocol = mp_obj_get_int(items[1]); - hid_info.max_packet_len = mp_obj_get_int(items[2]); - hid_info.polling_interval = mp_obj_get_int(items[3]); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(items[4], &bufinfo, MP_BUFFER_READ); - hid_info.report_desc = bufinfo.buf; - hid_info.report_desc_len = bufinfo.len; - - // need to keep a copy of this so report_desc does not get GC'd - MP_STATE_PORT(pyb_hid_report_desc) = items[4]; - } - - #if USBD_SUPPORT_HS_MODE - if (args[4].u_bool) { - mode |= USBD_MODE_HIGH_SPEED; - } - #endif - - // init the USB device - if (!pyb_usb_dev_init(vid, pid, mode, &hid_info)) { - goto bad_mode; - } - -#endif - - return mp_const_none; - -bad_mode: - mp_raise_ValueError("bad USB mode"); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_mode_obj, 0, pyb_usb_mode); - -/******************************************************************************/ -// MicroPython bindings for USB VCP - -/// \moduleref pyb -/// \class USB_VCP - USB virtual comm port -/// -/// The USB_VCP class allows creation of an object representing the USB -/// virtual comm port. It can be used to read and write data over USB to -/// the connected host. - -typedef struct _pyb_usb_vcp_obj_t { - mp_obj_base_t base; - usbd_cdc_itf_t *cdc_itf; -} pyb_usb_vcp_obj_t; - -STATIC const pyb_usb_vcp_obj_t pyb_usb_vcp_obj = {{&pyb_usb_vcp_type}, &usb_device.usbd_cdc_itf}; -#if MICROPY_HW_USB_ENABLE_CDC2 -STATIC const pyb_usb_vcp_obj_t pyb_usb_vcp2_obj = {{&pyb_usb_vcp_type}, &usb_device.usbd_cdc2_itf}; -#endif - -STATIC void pyb_usb_vcp_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - int id = ((pyb_usb_vcp_obj_t*)self_in)->cdc_itf - &usb_device.usbd_cdc_itf; - mp_printf(print, "USB_VCP(%u)", id); -} - -/// \classmethod \constructor() -/// Create a new USB_VCP object. -STATIC mp_obj_t pyb_usb_vcp_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 1, false); - - // TODO raise exception if USB is not configured for VCP - - int id = (n_args == 0) ? 0 : mp_obj_get_int(args[0]); - if (id == 0) { - return MP_OBJ_FROM_PTR(&pyb_usb_vcp_obj); - #if MICROPY_HW_USB_ENABLE_CDC2 - } else if (id == 1) { - return MP_OBJ_FROM_PTR(&pyb_usb_vcp2_obj); - #endif - } else { - mp_raise_ValueError(NULL); - } -} - -STATIC mp_obj_t pyb_usb_vcp_setinterrupt(mp_obj_t self_in, mp_obj_t int_chr_in) { - mp_hal_set_interrupt_char(mp_obj_get_int(int_chr_in)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_usb_vcp_setinterrupt_obj, pyb_usb_vcp_setinterrupt); - -STATIC mp_obj_t pyb_usb_vcp_isconnected(mp_obj_t self_in) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_bool(usbd_cdc_is_connected(self->cdc_itf)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_vcp_isconnected_obj, pyb_usb_vcp_isconnected); - -// deprecated in favour of USB_VCP.isconnected -STATIC mp_obj_t pyb_have_cdc(void) { - return pyb_usb_vcp_isconnected(MP_OBJ_FROM_PTR(&pyb_usb_vcp_obj)); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_have_cdc_obj, pyb_have_cdc); - -/// \method any() -/// Return `True` if any characters waiting, else `False`. -STATIC mp_obj_t pyb_usb_vcp_any(mp_obj_t self_in) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (usbd_cdc_rx_num(self->cdc_itf) > 0) { - return mp_const_true; - } else { - return mp_const_false; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_vcp_any_obj, pyb_usb_vcp_any); - -/// \method send(data, *, timeout=5000) -/// Send data over the USB VCP: -/// -/// - `data` is the data to send (an integer to send, or a buffer object). -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: number of bytes sent. -STATIC const mp_arg_t pyb_usb_vcp_send_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, -}; -#define PYB_USB_VCP_SEND_NUM_ARGS MP_ARRAY_SIZE(pyb_usb_vcp_send_args) - -STATIC mp_obj_t pyb_usb_vcp_send(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_arg_val_t vals[PYB_USB_VCP_SEND_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_USB_VCP_SEND_NUM_ARGS, pyb_usb_vcp_send_args, vals); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(vals[0].u_obj, &bufinfo, data); - - // send the data - int ret = usbd_cdc_tx(self->cdc_itf, bufinfo.buf, bufinfo.len, vals[1].u_int); - - return mp_obj_new_int(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_vcp_send_obj, 1, pyb_usb_vcp_send); - -/// \method recv(data, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `data` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `data` is an integer then a new buffer of the bytes received, -/// otherwise the number of bytes read into `data` is returned. -STATIC mp_obj_t pyb_usb_vcp_recv(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_arg_val_t vals[PYB_USB_VCP_SEND_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_USB_VCP_SEND_NUM_ARGS, pyb_usb_vcp_send_args, vals); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &vstr); - - // receive the data - int ret = usbd_cdc_rx(self->cdc_itf, (uint8_t*)vstr.buf, vstr.len, vals[1].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return mp_obj_new_int(ret); // number of bytes read into given buffer - } else { - vstr.len = ret; // set actual number of bytes read - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); // create a new buffer - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_vcp_recv_obj, 1, pyb_usb_vcp_recv); - -mp_obj_t pyb_usb_vcp___exit__(size_t n_args, const mp_obj_t *args) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_usb_vcp___exit___obj, 4, 4, pyb_usb_vcp___exit__); - -STATIC const mp_rom_map_elem_t pyb_usb_vcp_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_setinterrupt), MP_ROM_PTR(&pyb_usb_vcp_setinterrupt_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&pyb_usb_vcp_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_usb_vcp_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_usb_vcp_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_usb_vcp_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)}, - { MP_ROM_QSTR(MP_QSTR_readlines), MP_ROM_PTR(&mp_stream_unbuffered_readlines_obj)}, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_identity_obj) }, - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_identity_obj) }, - { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&mp_identity_obj) }, - { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&pyb_usb_vcp___exit___obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_usb_vcp_locals_dict, pyb_usb_vcp_locals_dict_table); - -STATIC mp_uint_t pyb_usb_vcp_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - int ret = usbd_cdc_rx(self->cdc_itf, (byte*)buf, size, 0); - if (ret == 0) { - // return EAGAIN error to indicate non-blocking - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - return ret; -} - -STATIC mp_uint_t pyb_usb_vcp_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - int ret = usbd_cdc_tx(self->cdc_itf, (const byte*)buf, size, 0); - if (ret == 0) { - // return EAGAIN error to indicate non-blocking - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - return ret; -} - -STATIC mp_uint_t pyb_usb_vcp_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - mp_uint_t ret; - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && usbd_cdc_rx_num(self->cdc_itf) > 0) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && usbd_cdc_tx_half_empty(self->cdc_itf)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t pyb_usb_vcp_stream_p = { - .read = pyb_usb_vcp_read, - .write = pyb_usb_vcp_write, - .ioctl = pyb_usb_vcp_ioctl, -}; - -const mp_obj_type_t pyb_usb_vcp_type = { - { &mp_type_type }, - .name = MP_QSTR_USB_VCP, - .print = pyb_usb_vcp_print, - .make_new = pyb_usb_vcp_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &pyb_usb_vcp_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_usb_vcp_locals_dict, -}; - -/******************************************************************************/ -// MicroPython bindings for USB HID - -typedef struct _pyb_usb_hid_obj_t { - mp_obj_base_t base; - usb_device_t *usb_dev; -} pyb_usb_hid_obj_t; - -STATIC const pyb_usb_hid_obj_t pyb_usb_hid_obj = {{&pyb_usb_hid_type}, &usb_device}; - -STATIC mp_obj_t pyb_usb_hid_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // TODO raise exception if USB is not configured for HID - - // return the USB HID object - return (mp_obj_t)&pyb_usb_hid_obj; -} - -/// \method recv(data, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `data` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `data` is an integer then a new buffer of the bytes received, -/// otherwise the number of bytes read into `data` is returned. -STATIC mp_obj_t pyb_usb_hid_recv(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_usb_hid_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_arg_val_t vals[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, vals); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &vstr); - - // receive the data - int ret = usbd_hid_rx(&self->usb_dev->usbd_hid_itf, vstr.len, (uint8_t*)vstr.buf, vals[1].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return mp_obj_new_int(ret); // number of bytes read into given buffer - } else { - vstr.len = ret; // set actual number of bytes read - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); // create a new buffer - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_hid_recv_obj, 1, pyb_usb_hid_recv); - -STATIC mp_obj_t pyb_usb_hid_send(mp_obj_t self_in, mp_obj_t report_in) { - pyb_usb_hid_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_buffer_info_t bufinfo; - byte temp_buf[8]; - // get the buffer to send from - // we accept either a byte array, or a tuple/list of integers - if (!mp_get_buffer(report_in, &bufinfo, MP_BUFFER_READ)) { - mp_obj_t *items; - mp_obj_get_array(report_in, &bufinfo.len, &items); - if (bufinfo.len > sizeof(temp_buf)) { - mp_raise_ValueError("tuple/list too large for HID report; use bytearray instead"); - } - for (int i = 0; i < bufinfo.len; i++) { - temp_buf[i] = mp_obj_get_int(items[i]); - } - bufinfo.buf = temp_buf; - } - - // send the data - if (USBD_OK == USBD_HID_SendReport(&self->usb_dev->usbd_hid_itf.base, bufinfo.buf, bufinfo.len)) { - return mp_obj_new_int(bufinfo.len); - } else { - return mp_obj_new_int(0); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_usb_hid_send_obj, pyb_usb_hid_send); - -// deprecated in favour of USB_HID.send -STATIC mp_obj_t pyb_hid_send_report(mp_obj_t arg) { - return pyb_usb_hid_send(MP_OBJ_FROM_PTR(&pyb_usb_hid_obj), arg); -} -MP_DEFINE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj, pyb_hid_send_report); - -STATIC const mp_rom_map_elem_t pyb_usb_hid_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_usb_hid_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_usb_hid_recv_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_usb_hid_locals_dict, pyb_usb_hid_locals_dict_table); - -STATIC mp_uint_t pyb_usb_hid_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_usb_hid_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && usbd_hid_rx_num(&self->usb_dev->usbd_hid_itf) > 0) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && USBD_HID_CanSendReport(&self->usb_dev->usbd_hid_itf.base)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t pyb_usb_hid_stream_p = { - .ioctl = pyb_usb_hid_ioctl, -}; - -const mp_obj_type_t pyb_usb_hid_type = { - { &mp_type_type }, - .name = MP_QSTR_USB_HID, - .make_new = pyb_usb_hid_make_new, - .protocol = &pyb_usb_hid_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_usb_hid_locals_dict, -}; - -/******************************************************************************/ -// code for experimental USB OTG support - -#ifdef USE_HOST_MODE - -#include "led.h" -#include "usbh_core.h" -#include "usbh_usr.h" -#include "usbh_hid_core.h" -#include "usbh_hid_keybd.h" -#include "usbh_hid_mouse.h" - -__ALIGN_BEGIN USBH_HOST USB_Host __ALIGN_END ; - -static int host_is_enabled = 0; - -void pyb_usb_host_init(void) { - if (!host_is_enabled) { - // only init USBH once in the device's power-lifetime - /* Init Host Library */ - USBH_Init(&USB_OTG_Core, USB_OTG_FS_CORE_ID, &USB_Host, &HID_cb, &USR_Callbacks); - } - host_is_enabled = 1; -} - -void pyb_usb_host_process(void) { - USBH_Process(&USB_OTG_Core, &USB_Host); -} - -uint8_t usb_keyboard_key = 0; - -// TODO this is an ugly hack to get key presses -uint pyb_usb_host_get_keyboard(void) { - uint key = usb_keyboard_key; - usb_keyboard_key = 0; - return key; -} - -void USR_MOUSE_Init(void) { - led_state(4, 1); - USB_OTG_BSP_mDelay(100); - led_state(4, 0); -} - -void USR_MOUSE_ProcessData(HID_MOUSE_Data_TypeDef *data) { - led_state(4, 1); - USB_OTG_BSP_mDelay(50); - led_state(4, 0); -} - -void USR_KEYBRD_Init(void) { - led_state(4, 1); - USB_OTG_BSP_mDelay(100); - led_state(4, 0); -} - -void USR_KEYBRD_ProcessData(uint8_t pbuf) { - led_state(4, 1); - USB_OTG_BSP_mDelay(50); - led_state(4, 0); - usb_keyboard_key = pbuf; -} - -#endif // USE_HOST_MODE - -#endif // MICROPY_HW_ENABLE_USB diff --git a/ports/stm32/usb.h b/ports/stm32/usb.h deleted file mode 100644 index 1de9e5d0e5..0000000000 --- a/ports/stm32/usb.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_USB_H -#define MICROPY_INCLUDED_STM32_USB_H - -#include "usbd_cdc_msc_hid0.h" - -#define PYB_USB_FLAG_USB_MODE_CALLED (0x0002) - -// Windows needs a different PID to distinguish different device configurations -#define USBD_VID (0xf055) -#define USBD_PID_CDC_MSC (0x9800) -#define USBD_PID_CDC_HID (0x9801) -#define USBD_PID_CDC (0x9802) -#define USBD_PID_MSC (0x9803) -#define USBD_PID_CDC2_MSC (0x9804) - -typedef enum { - PYB_USB_STORAGE_MEDIUM_NONE = 0, - PYB_USB_STORAGE_MEDIUM_FLASH, - PYB_USB_STORAGE_MEDIUM_SDCARD, -} pyb_usb_storage_medium_t; - -typedef enum { - USB_PHY_FS_ID = 0, - USB_PHY_HS_ID = 1, -} USB_PHY_ID; - -extern mp_uint_t pyb_usb_flags; -extern pyb_usb_storage_medium_t pyb_usb_storage_medium; -extern const struct _mp_obj_tuple_t pyb_usb_hid_mouse_obj; -extern const struct _mp_obj_tuple_t pyb_usb_hid_keyboard_obj; -extern const mp_obj_type_t pyb_usb_vcp_type; -extern const mp_obj_type_t pyb_usb_hid_type; -MP_DECLARE_CONST_FUN_OBJ_KW(pyb_usb_mode_obj); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_have_cdc_obj); // deprecated -MP_DECLARE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj); // deprecated - -void pyb_usb_init0(void); -bool pyb_usb_dev_init(uint16_t vid, uint16_t pid, usb_device_mode_t mode, USBD_HID_ModeInfoTypeDef *hid_info); -void pyb_usb_dev_deinit(void); -bool usb_vcp_is_enabled(void); -int usb_vcp_recv_byte(uint8_t *c); // if a byte is available, return 1 and put the byte in *c, else return 0 -void usb_vcp_send_strn(const char* str, int len); - -void pyb_usb_host_init(void); -void pyb_usb_host_process(void); -uint pyb_usb_host_get_keyboard(void); - -#endif // MICROPY_INCLUDED_STM32_USB_H diff --git a/ports/stm32/usbd_cdc_interface.c b/ports/stm32/usbd_cdc_interface.c deleted file mode 100644 index 91ae81bb32..0000000000 --- a/ports/stm32/usbd_cdc_interface.c +++ /dev/null @@ -1,366 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and heavily modified. See below for original - * copyright header. - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_cdc_interface.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Source file for USBD CDC interface - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include -#include - -#include "usbd_cdc_msc_hid.h" -#include "usbd_cdc_interface.h" -#include "pendsv.h" - -#include "py/obj.h" -#include "lib/utils/interrupt_char.h" -#include "irq.h" - -#if MICROPY_HW_ENABLE_USB - -// CDC control commands -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 - -uint8_t *usbd_cdc_init(usbd_cdc_state_t *cdc_in) { - usbd_cdc_itf_t *cdc = (usbd_cdc_itf_t*)cdc_in; - - // Reset all the CDC state - // Note: we don't reset tx_buf_ptr_in in order to allow the output buffer to - // be filled (by usbd_cdc_tx_always) before the USB device is connected. - cdc->rx_buf_put = 0; - cdc->rx_buf_get = 0; - cdc->tx_buf_ptr_out = 0; - cdc->tx_buf_ptr_out_shadow = 0; - cdc->tx_buf_ptr_wait_count = 0; - cdc->tx_need_empty_packet = 0; - cdc->dev_is_connected = 0; - #if MICROPY_HW_USB_ENABLE_CDC2 - cdc->attached_to_repl = &cdc->base == cdc->base.usbd->cdc; - #else - cdc->attached_to_repl = 1; - #endif - - // Return the buffer to place the first USB OUT packet - return cdc->rx_packet_buf; -} - -// Manage the CDC class requests -// cmd: command code -// pbuf: buffer containing command data (request parameters) -// length: number of data to be sent (in bytes) -// Returns USBD_OK if all operations are OK else USBD_FAIL -int8_t usbd_cdc_control(usbd_cdc_state_t *cdc_in, uint8_t cmd, uint8_t* pbuf, uint16_t length) { - usbd_cdc_itf_t *cdc = (usbd_cdc_itf_t*)cdc_in; - - switch (cmd) { - case CDC_SEND_ENCAPSULATED_COMMAND: - /* Add your code here */ - break; - - case CDC_GET_ENCAPSULATED_RESPONSE: - /* Add your code here */ - break; - - case CDC_SET_COMM_FEATURE: - /* Add your code here */ - break; - - case CDC_GET_COMM_FEATURE: - /* Add your code here */ - break; - - case CDC_CLEAR_COMM_FEATURE: - /* Add your code here */ - break; - - case CDC_SET_LINE_CODING: - #if 0 - LineCoding.bitrate = (uint32_t)(pbuf[0] | (pbuf[1] << 8) |\ - (pbuf[2] << 16) | (pbuf[3] << 24)); - LineCoding.format = pbuf[4]; - LineCoding.paritytype = pbuf[5]; - LineCoding.datatype = pbuf[6]; - /* Set the new configuration */ - #endif - break; - - case CDC_GET_LINE_CODING: - /* Add your code here */ - pbuf[0] = (uint8_t)(115200); - pbuf[1] = (uint8_t)(115200 >> 8); - pbuf[2] = (uint8_t)(115200 >> 16); - pbuf[3] = (uint8_t)(115200 >> 24); - pbuf[4] = 0; // stop bits (1) - pbuf[5] = 0; // parity (none) - pbuf[6] = 8; // number of bits (8) - break; - - case CDC_SET_CONTROL_LINE_STATE: - cdc->dev_is_connected = length & 1; // wValue is passed in Len (bit of a hack) - break; - - case CDC_SEND_BREAK: - /* Add your code here */ - break; - - default: - break; - } - - return USBD_OK; -} - -// This function is called to process outgoing data. We hook directly into the -// SOF (start of frame) callback so that it is called exactly at the time it is -// needed (reducing latency), and often enough (increasing bandwidth). -static void usbd_cdc_sof(PCD_HandleTypeDef *hpcd, usbd_cdc_itf_t *cdc) { - if (cdc == NULL || !cdc->dev_is_connected) { - // CDC device is not connected to a host, so we are unable to send any data - return; - } - - if (cdc->tx_buf_ptr_out == cdc->tx_buf_ptr_in && !cdc->tx_need_empty_packet) { - // No outstanding data to send - return; - } - - if (cdc->tx_buf_ptr_out != cdc->tx_buf_ptr_out_shadow) { - // We have sent data and are waiting for the low-level USB driver to - // finish sending it over the USB in-endpoint. - // SOF occurs every 1ms, so we have a 500 * 1ms = 500ms timeout - // We have a relatively large timeout because the USB host may be busy - // doing other things and we must give it a chance to read our data. - if (cdc->tx_buf_ptr_wait_count < 500) { - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - if (USBx_INEP(cdc->base.in_ep & 0x7f)->DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ) { - // USB in-endpoint is still reading the data - cdc->tx_buf_ptr_wait_count++; - return; - } - } - cdc->tx_buf_ptr_out = cdc->tx_buf_ptr_out_shadow; - } - - if (cdc->tx_buf_ptr_out_shadow != cdc->tx_buf_ptr_in || cdc->tx_need_empty_packet) { - uint32_t buffptr; - uint32_t buffsize; - - if (cdc->tx_buf_ptr_out_shadow > cdc->tx_buf_ptr_in) { // rollback - buffsize = USBD_CDC_TX_DATA_SIZE - cdc->tx_buf_ptr_out_shadow; - } else { - buffsize = cdc->tx_buf_ptr_in - cdc->tx_buf_ptr_out_shadow; - } - - buffptr = cdc->tx_buf_ptr_out_shadow; - - if (USBD_CDC_TransmitPacket(&cdc->base, buffsize, &cdc->tx_buf[buffptr]) == USBD_OK) { - cdc->tx_buf_ptr_out_shadow += buffsize; - if (cdc->tx_buf_ptr_out_shadow == USBD_CDC_TX_DATA_SIZE) { - cdc->tx_buf_ptr_out_shadow = 0; - } - cdc->tx_buf_ptr_wait_count = 0; - - // According to the USB specification, a packet size of 64 bytes (CDC_DATA_FS_MAX_PACKET_SIZE) - // gets held at the USB host until the next packet is sent. This is because a - // packet of maximum size is considered to be part of a longer chunk of data, and - // the host waits for all data to arrive (ie, waits for a packet < max packet size). - // To flush a packet of exactly max packet size, we need to send a zero-size packet. - // See eg http://www.cypress.com/?id=4&rID=92719 - cdc->tx_need_empty_packet = (buffsize > 0 && buffsize % usbd_cdc_max_packet(cdc->base.usbd->pdev) == 0 && cdc->tx_buf_ptr_out_shadow == cdc->tx_buf_ptr_in); - } - } -} - -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) { - usbd_cdc_msc_hid_state_t *usbd = ((USBD_HandleTypeDef*)hpcd->pData)->pClassData; - usbd_cdc_sof(hpcd, (usbd_cdc_itf_t*)usbd->cdc); - #if MICROPY_HW_USB_ENABLE_CDC2 - usbd_cdc_sof(hpcd, (usbd_cdc_itf_t*)usbd->cdc2); - #endif -} - -// Data received over USB OUT endpoint is processed here. -// len: number of bytes received into the buffer we passed to USBD_CDC_ReceivePacket -// Returns USBD_OK if all operations are OK else USBD_FAIL -int8_t usbd_cdc_receive(usbd_cdc_state_t *cdc_in, size_t len) { - usbd_cdc_itf_t *cdc = (usbd_cdc_itf_t*)cdc_in; - - // copy the incoming data into the circular buffer - for (const uint8_t *src = cdc->rx_packet_buf, *top = cdc->rx_packet_buf + len; src < top; ++src) { - if (cdc->attached_to_repl && mp_interrupt_char != -1 && *src == mp_interrupt_char) { - pendsv_kbd_intr(); - } else { - uint16_t next_put = (cdc->rx_buf_put + 1) & (USBD_CDC_RX_DATA_SIZE - 1); - if (next_put == cdc->rx_buf_get) { - // overflow, we just discard the rest of the chars - break; - } - cdc->rx_user_buf[cdc->rx_buf_put] = *src; - cdc->rx_buf_put = next_put; - } - } - - // initiate next USB packet transfer - USBD_CDC_ReceivePacket(&cdc->base, cdc->rx_packet_buf); - - return USBD_OK; -} - -int usbd_cdc_tx_half_empty(usbd_cdc_itf_t *cdc) { - int32_t tx_waiting = (int32_t)cdc->tx_buf_ptr_in - (int32_t)cdc->tx_buf_ptr_out; - if (tx_waiting < 0) { - tx_waiting += USBD_CDC_TX_DATA_SIZE; - } - return tx_waiting <= USBD_CDC_TX_DATA_SIZE / 2; -} - -// timout in milliseconds. -// Returns number of bytes written to the device. -int usbd_cdc_tx(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len, uint32_t timeout) { - for (uint32_t i = 0; i < len; i++) { - // Wait until the device is connected and the buffer has space, with a given timeout - uint32_t start = HAL_GetTick(); - while (!cdc->dev_is_connected || ((cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1)) == cdc->tx_buf_ptr_out) { - // Wraparound of tick is taken care of by 2's complement arithmetic. - if (HAL_GetTick() - start >= timeout) { - // timeout - return i; - } - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be drained; return immediately - return i; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // Write data to device buffer - cdc->tx_buf[cdc->tx_buf_ptr_in] = buf[i]; - cdc->tx_buf_ptr_in = (cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1); - } - - // Success, return number of bytes read - return len; -} - -// Always write all of the data to the device tx buffer, even if the -// device is not connected, or if the buffer is full. Has a small timeout -// to wait for the buffer to be drained, in the case the device is connected. -void usbd_cdc_tx_always(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len) { - for (int i = 0; i < len; i++) { - // If the CDC device is not connected to the host then we don't have anyone to receive our data. - // The device may become connected in the future, so we should at least try to fill the buffer - // and hope that it doesn't overflow by the time the device connects. - // If the device is not connected then we should go ahead and fill the buffer straight away, - // ignoring overflow. Otherwise, we should make sure that we have enough room in the buffer. - if (cdc->dev_is_connected) { - // If the buffer is full, wait until it gets drained, with a timeout of 500ms - // (wraparound of tick is taken care of by 2's complement arithmetic). - uint32_t start = HAL_GetTick(); - while (((cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1)) == cdc->tx_buf_ptr_out && HAL_GetTick() - start <= 500) { - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be drained; exit loop - break; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // Some unused code that makes sure the low-level USB buffer is drained. - // Waiting for low-level is handled in HAL_PCD_SOFCallback. - /* - start = HAL_GetTick(); - PCD_HandleTypeDef *hpcd = hUSBDDevice.pData; - if (hpcd->IN_ep[0x83 & 0x7f].is_in) { - //volatile uint32_t *xfer_count = &hpcd->IN_ep[0x83 & 0x7f].xfer_count; - //volatile uint32_t *xfer_len = &hpcd->IN_ep[0x83 & 0x7f].xfer_len; - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - while ( - // *xfer_count < *xfer_len // using this works - // (USBx_INEP(3)->DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ) // using this works - && HAL_GetTick() - start <= 2000) { - __WFI(); // enter sleep mode, waiting for interrupt - } - } - */ - } - - cdc->tx_buf[cdc->tx_buf_ptr_in] = buf[i]; - cdc->tx_buf_ptr_in = (cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1); - } -} - -// Returns number of bytes in the rx buffer. -int usbd_cdc_rx_num(usbd_cdc_itf_t *cdc) { - int32_t rx_waiting = (int32_t)cdc->rx_buf_put - (int32_t)cdc->rx_buf_get; - if (rx_waiting < 0) { - rx_waiting += USBD_CDC_RX_DATA_SIZE; - } - return rx_waiting; -} - -// timout in milliseconds. -// Returns number of bytes read from the device. -int usbd_cdc_rx(usbd_cdc_itf_t *cdc, uint8_t *buf, uint32_t len, uint32_t timeout) { - // loop to read bytes - for (uint32_t i = 0; i < len; i++) { - // Wait until we have at least 1 byte to read - uint32_t start = HAL_GetTick(); - while (cdc->rx_buf_put == cdc->rx_buf_get) { - // Wraparound of tick is taken care of by 2's complement arithmetic. - if (HAL_GetTick() - start >= timeout) { - // timeout - return i; - } - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be filled; return immediately - return i; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // Copy byte from device to user buffer - buf[i] = cdc->rx_user_buf[cdc->rx_buf_get]; - cdc->rx_buf_get = (cdc->rx_buf_get + 1) & (USBD_CDC_RX_DATA_SIZE - 1); - } - - // Success, return number of bytes read - return len; -} - -#endif diff --git a/ports/stm32/usbd_cdc_interface.h b/ports/stm32/usbd_cdc_interface.h deleted file mode 100644 index cdf556d4ec..0000000000 --- a/ports/stm32/usbd_cdc_interface.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ -#ifndef MICROPY_INCLUDED_STM32_USBD_CDC_INTERFACE_H -#define MICROPY_INCLUDED_STM32_USBD_CDC_INTERFACE_H - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Inc/usbd_cdc_interface.h - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Header for usbd_cdc_interface.c file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -#define USBD_CDC_RX_DATA_SIZE (1024) // this must be 2 or greater, and a power of 2 -#define USBD_CDC_TX_DATA_SIZE (1024) // I think this can be any value (was 2048) - -typedef struct _usbd_cdc_itf_t { - usbd_cdc_state_t base; // state for the base CDC layer - - uint8_t rx_packet_buf[CDC_DATA_MAX_PACKET_SIZE]; // received data from USB OUT endpoint is stored in this buffer - uint8_t rx_user_buf[USBD_CDC_RX_DATA_SIZE]; // received data is buffered here until the user reads it - volatile uint16_t rx_buf_put; // circular buffer index - uint16_t rx_buf_get; // circular buffer index - - uint8_t tx_buf[USBD_CDC_TX_DATA_SIZE]; // data for USB IN endpoind is stored in this buffer - uint16_t tx_buf_ptr_in; // increment this pointer modulo USBD_CDC_TX_DATA_SIZE when new data is available - volatile uint16_t tx_buf_ptr_out; // increment this pointer modulo USBD_CDC_TX_DATA_SIZE when data is drained - uint16_t tx_buf_ptr_out_shadow; // shadow of above - uint8_t tx_buf_ptr_wait_count; // used to implement a timeout waiting for low-level USB driver - uint8_t tx_need_empty_packet; // used to flush the USB IN endpoint if the last packet was exactly the endpoint packet size - - volatile uint8_t dev_is_connected; // indicates if we are connected - uint8_t attached_to_repl; // indicates if interface is connected to REPL -} usbd_cdc_itf_t; - -// This is implemented in usb.c -usbd_cdc_itf_t *usb_vcp_get(int idx); - -static inline int usbd_cdc_is_connected(usbd_cdc_itf_t *cdc) { - return cdc->dev_is_connected; -} - -int usbd_cdc_tx_half_empty(usbd_cdc_itf_t *cdc); -int usbd_cdc_tx(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len, uint32_t timeout); -void usbd_cdc_tx_always(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len); - -int usbd_cdc_rx_num(usbd_cdc_itf_t *cdc); -int usbd_cdc_rx(usbd_cdc_itf_t *cdc, uint8_t *buf, uint32_t len, uint32_t timeout); - -#endif // MICROPY_INCLUDED_STM32_USBD_CDC_INTERFACE_H diff --git a/ports/stm32/usbd_conf.c b/ports/stm32/usbd_conf.c deleted file mode 100644 index 41a8353047..0000000000 --- a/ports/stm32/usbd_conf.c +++ /dev/null @@ -1,670 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_conf.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief This file implements the USB Device library callbacks and MSP - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -#include "usbd_core.h" -#include "py/obj.h" -#include "py/mphal.h" -#include "irq.h" -#include "usb.h" - -#if MICROPY_HW_USB_FS || MICROPY_HW_USB_HS - -#if MICROPY_HW_USB_FS -PCD_HandleTypeDef pcd_fs_handle; -#endif -#if MICROPY_HW_USB_HS -PCD_HandleTypeDef pcd_hs_handle; -#endif - -/******************************************************************************* - PCD BSP Routines -*******************************************************************************/ - -/** - * @brief Initializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) { - if (hpcd->Instance == USB_OTG_FS) { - #if defined(STM32H7) - const uint32_t otg_alt = GPIO_AF10_OTG1_FS; - #else - const uint32_t otg_alt = GPIO_AF10_OTG_FS; - #endif - - mp_hal_pin_config(pin_A11, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, otg_alt); - mp_hal_pin_config_speed(pin_A11, GPIO_SPEED_FREQ_VERY_HIGH); - mp_hal_pin_config(pin_A12, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, otg_alt); - mp_hal_pin_config_speed(pin_A12, GPIO_SPEED_FREQ_VERY_HIGH); - - #if defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - // USB VBUS detect pin is always A9 - mp_hal_pin_config(MICROPY_HW_USB_VBUS_DETECT_PIN, MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0); - #endif - - #if defined(MICROPY_HW_USB_OTG_ID_PIN) - // USB ID pin is always A10 - mp_hal_pin_config(MICROPY_HW_USB_OTG_ID_PIN, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_UP, otg_alt); - #endif - - #if defined(STM32H7) - // Keep USB clock running during sleep or else __WFI() will disable the USB - __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE(); - __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE(); - #endif - - // Enable USB FS Clocks - __USB_OTG_FS_CLK_ENABLE(); - - #if defined(STM32L4) - // Enable VDDUSB - if (__HAL_RCC_PWR_IS_CLK_DISABLED()) { - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_EnableVddUSB(); - __HAL_RCC_PWR_CLK_DISABLE(); - } else { - HAL_PWREx_EnableVddUSB(); - } - #endif - - // Configure and enable USB FS interrupt - NVIC_SetPriority(OTG_FS_IRQn, IRQ_PRI_OTG_FS); - HAL_NVIC_EnableIRQ(OTG_FS_IRQn); - } - #if MICROPY_HW_USB_HS - else if (hpcd->Instance == USB_OTG_HS) { - #if MICROPY_HW_USB_HS_IN_FS - - // Configure USB FS GPIOs - mp_hal_pin_config(pin_B14, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, GPIO_AF12_OTG_HS_FS); - mp_hal_pin_config_speed(pin_B14, GPIO_SPEED_FREQ_VERY_HIGH); - mp_hal_pin_config(pin_B15, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, GPIO_AF12_OTG_HS_FS); - mp_hal_pin_config_speed(pin_B15, GPIO_SPEED_FREQ_VERY_HIGH); - - #if defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - // Configure VBUS Pin - mp_hal_pin_config(MICROPY_HW_USB_VBUS_DETECT_PIN, MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0); - #endif - - #if defined(MICROPY_HW_USB_OTG_ID_PIN) - // Configure ID pin - mp_hal_pin_config(MICROPY_HW_USB_OTG_ID_PIN, MP_HAL_PIN_MODE_ALT_OPEN_DRAIN, MP_HAL_PIN_PULL_UP, GPIO_AF12_OTG_HS_FS); - #endif - - // Enable calling WFI and correct function of the embedded USB_FS_IN_HS phy - __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE(); - __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE(); - - // Enable USB HS Clocks - - #if defined(STM32F723xx) || defined(STM32F733xx) - // Needs to remain awake during sleep or else __WFI() will disable the USB - __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE(); - __HAL_RCC_OTGPHYC_CLK_ENABLE(); - __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); - #endif - - __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); - - #else // !MICROPY_HW_USB_HS_IN_FS - - GPIO_InitTypeDef GPIO_InitStruct; - - // Configure USB HS GPIOs - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOH_CLK_ENABLE(); - __HAL_RCC_GPIOI_CLK_ENABLE(); - - // CLK - GPIO_InitStruct.Pin = GPIO_PIN_5; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - // D0 - GPIO_InitStruct.Pin = GPIO_PIN_3; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - // D1 D2 D3 D4 D5 D6 D7 - GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_5 |\ - GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - // STP - GPIO_InitStruct.Pin = GPIO_PIN_0; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - // NXT - GPIO_InitStruct.Pin = GPIO_PIN_4; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); - - // DIR - GPIO_InitStruct.Pin = GPIO_PIN_11; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); - - // Enable USB HS Clocks - __USB_OTG_HS_CLK_ENABLE(); - __USB_OTG_HS_ULPI_CLK_ENABLE(); - - #endif // !MICROPY_HW_USB_HS_IN_FS - - // Configure and enable USB HS interrupt - NVIC_SetPriority(OTG_HS_IRQn, IRQ_PRI_OTG_HS); - HAL_NVIC_EnableIRQ(OTG_HS_IRQn); - } - #endif // MICROPY_HW_USB_HS -} - -/** - * @brief DeInitializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) { - if (hpcd->Instance == USB_OTG_FS) { - /* Disable USB FS Clocks */ - __USB_OTG_FS_CLK_DISABLE(); - __SYSCFG_CLK_DISABLE(); - } - #if MICROPY_HW_USB_HS - else if (hpcd->Instance == USB_OTG_HS) { - /* Disable USB FS Clocks */ - __USB_OTG_HS_CLK_DISABLE(); - __SYSCFG_CLK_DISABLE(); - } - #endif -} - -/******************************************************************************* - LL Driver Callbacks (PCD -> USB Device Library) -*******************************************************************************/ - -/** - * @brief Setup stage callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) { - USBD_LL_SetupStage(hpcd->pData, (uint8_t *)hpcd->Setup); -} - -/** - * @brief Data Out stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) { - USBD_LL_DataOutStage(hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); -} - -/** - * @brief Data In stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) { - USBD_LL_DataInStage(hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); -} - -/** - * @brief SOF callback. - * @param hpcd: PCD handle - * @retval None - */ -/* -This is now handled by the USB CDC interface. -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SOF(hpcd->pData); -} -*/ - -/** - * @brief Reset callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) { - USBD_SpeedTypeDef speed = USBD_SPEED_FULL; - - // Set USB Current Speed - switch (hpcd->Init.speed) { - #if defined(PCD_SPEED_HIGH) - case PCD_SPEED_HIGH: - speed = USBD_SPEED_HIGH; - break; - #endif - - case PCD_SPEED_FULL: - speed = USBD_SPEED_FULL; - break; - - default: - speed = USBD_SPEED_FULL; - break; - } - USBD_LL_SetSpeed(hpcd->pData, speed); - - // Reset Device - USBD_LL_Reset(hpcd->pData); -} - -/** - * @brief Suspend callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) { - USBD_LL_Suspend(hpcd->pData); -} - -/** - * @brief Resume callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) { - USBD_LL_Resume(hpcd->pData); -} - -/** - * @brief ISOC Out Incomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) { - USBD_LL_IsoOUTIncomplete(hpcd->pData, epnum); -} - -/** - * @brief ISOC In Incomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) { - USBD_LL_IsoINIncomplete(hpcd->pData, epnum); -} - -/** - * @brief Connect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) { - USBD_LL_DevConnected(hpcd->pData); -} - -/** - * @brief Disconnect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) { - USBD_LL_DevDisconnected(hpcd->pData); -} - -/******************************************************************************* - LL Driver Interface (USB Device Library --> PCD) -*******************************************************************************/ - -/** - * @brief Initializes the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev, int high_speed) { - #if MICROPY_HW_USB_FS - if (pdev->id == USB_PHY_FS_ID) { - // Set LL Driver parameters - pcd_fs_handle.Instance = USB_OTG_FS; - #if MICROPY_HW_USB_ENABLE_CDC2 - pcd_fs_handle.Init.dev_endpoints = 6; - #else - pcd_fs_handle.Init.dev_endpoints = 4; - #endif - pcd_fs_handle.Init.use_dedicated_ep1 = 0; - pcd_fs_handle.Init.ep0_mps = 0x40; - pcd_fs_handle.Init.dma_enable = 0; - pcd_fs_handle.Init.low_power_enable = 0; - pcd_fs_handle.Init.phy_itface = PCD_PHY_EMBEDDED; - pcd_fs_handle.Init.Sof_enable = 1; - pcd_fs_handle.Init.speed = PCD_SPEED_FULL; - #if defined(STM32L4) - pcd_fs_handle.Init.lpm_enable = DISABLE; - pcd_fs_handle.Init.battery_charging_enable = DISABLE; - #endif - #if !defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - pcd_fs_handle.Init.vbus_sensing_enable = 0; // No VBUS Sensing on USB0 - #else - pcd_fs_handle.Init.vbus_sensing_enable = 1; - #endif - - // Link The driver to the stack - pcd_fs_handle.pData = pdev; - pdev->pData = &pcd_fs_handle; - - // Initialize LL Driver - HAL_PCD_Init(&pcd_fs_handle); - - // We have 320 32-bit words in total to use here - #if MICROPY_HW_USB_ENABLE_CDC2 - HAL_PCD_SetRxFiFo(&pcd_fs_handle, 128); - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 0, 32); // EP0 - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 1, 64); // MSC / HID - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 2, 16); // CDC CMD - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 3, 32); // CDC DATA - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 4, 16); // CDC2 CMD - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 5, 32); // CDC2 DATA - #else - HAL_PCD_SetRxFiFo(&pcd_fs_handle, 128); - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 0, 32); // EP0 - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 1, 64); // MSC / HID - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 2, 32); // CDC CMD - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 3, 64); // CDC DATA - #endif - } - #endif - #if MICROPY_HW_USB_HS - if (pdev->id == USB_PHY_HS_ID) { - #if MICROPY_HW_USB_HS_IN_FS - - // Set LL Driver parameters - pcd_hs_handle.Instance = USB_OTG_HS; - pcd_hs_handle.Init.dev_endpoints = 6; - pcd_hs_handle.Init.use_dedicated_ep1 = 0; - pcd_hs_handle.Init.ep0_mps = 0x40; - pcd_hs_handle.Init.dma_enable = 0; - pcd_hs_handle.Init.low_power_enable = 0; - pcd_hs_handle.Init.lpm_enable = DISABLE; - pcd_hs_handle.Init.battery_charging_enable = DISABLE; - #if defined(STM32F723xx) || defined(STM32F733xx) - pcd_hs_handle.Init.phy_itface = USB_OTG_HS_EMBEDDED_PHY; - #else - pcd_hs_handle.Init.phy_itface = PCD_PHY_EMBEDDED; - #endif - pcd_hs_handle.Init.Sof_enable = 1; - if (high_speed) { - pcd_hs_handle.Init.speed = PCD_SPEED_HIGH; - } else { - pcd_hs_handle.Init.speed = PCD_SPEED_HIGH_IN_FULL; - } - #if !defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - pcd_hs_handle.Init.vbus_sensing_enable = 0; // No VBUS Sensing on USB0 - #else - pcd_hs_handle.Init.vbus_sensing_enable = 1; - #endif - pcd_hs_handle.Init.use_external_vbus = 0; - - // Link The driver to the stack - pcd_hs_handle.pData = pdev; - pdev->pData = &pcd_hs_handle; - - // Initialize LL Driver - HAL_PCD_Init(&pcd_hs_handle); - - // We have 1024 32-bit words in total to use here - HAL_PCD_SetRxFiFo(&pcd_hs_handle, 512); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 0, 32); // EP0 - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 1, 256); // MSC / HID - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 2, 32); // CDC CMD - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 3, 64); // CDC DATA - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 4, 32); // CDC2 CMD - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 5, 64); // CDC2 DATA - - #else // !MICROPY_HW_USB_HS_IN_FS - - // Set LL Driver parameters - pcd_hs_handle.Instance = USB_OTG_HS; - pcd_hs_handle.Init.dev_endpoints = 6; - pcd_hs_handle.Init.use_dedicated_ep1 = 0; - pcd_hs_handle.Init.ep0_mps = 0x40; - - /* Be aware that enabling USB-DMA mode will result in data being sent only by - multiple of 4 packet sizes. This is due to the fact that USB-DMA does - not allow sending data from non word-aligned addresses. - For this specific application, it is advised to not enable this option - unless required. */ - pcd_hs_handle.Init.dma_enable = 0; - - pcd_hs_handle.Init.low_power_enable = 0; - pcd_hs_handle.Init.phy_itface = PCD_PHY_ULPI; - pcd_hs_handle.Init.Sof_enable = 1; - pcd_hs_handle.Init.speed = PCD_SPEED_HIGH; - pcd_hs_handle.Init.vbus_sensing_enable = 1; - - // Link The driver to the stack - pcd_hs_handle.pData = pdev; - pdev->pData = &pcd_hs_handle; - - // Initialize LL Driver - HAL_PCD_Init(&pcd_hs_handle); - - HAL_PCD_SetRxFiFo(&pcd_hs_handle, 0x200); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 0, 0x80); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 1, 0x174); - - #endif // !MICROPY_HW_USB_HS_IN_FS - } - #endif // MICROPY_HW_USB_HS - - return USBD_OK; -} - -/** - * @brief De-Initializes the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) { - HAL_PCD_DeInit(pdev->pData); - return USBD_OK; -} - -/** - * @brief Starts the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { - HAL_PCD_Start(pdev->pData); - return USBD_OK; -} - -/** - * @brief Stops the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) { - HAL_PCD_Stop(pdev->pData); - return USBD_OK; -} - -/** - * @brief Opens an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @param ep_type: Endpoint Type - * @param ep_mps: Endpoint Max Packet Size - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { - HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); - return USBD_OK; -} - -/** - * @brief Closes an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { - HAL_PCD_EP_Close(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Flushes an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { - HAL_PCD_EP_Flush(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Sets a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { - HAL_PCD_EP_SetStall(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Clears a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { - HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Returns Stall condition. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval Stall (1: yes, 0: No) - */ -uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { - PCD_HandleTypeDef *hpcd = pdev->pData; - - if ((ep_addr & 0x80) == 0x80) { - return hpcd->IN_ep[ep_addr & 0x7F].is_stall; - } else { - return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; - } -} - -/** - * @brief Assigns an USB address to the device - * @param pdev: Device handle - * @param dev_addr: USB address - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { - HAL_PCD_SetAddress(pdev->pData, dev_addr); - return USBD_OK; -} - -/** - * @brief Transmits data over an endpoint - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @param pbuf: Pointer to data to be sent - * @param size: Data size - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { - HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); - return USBD_OK; -} - -/** - * @brief Prepares an endpoint for reception - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @param pbuf:pointer to data to be received - * @param size: data size - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { - HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); - return USBD_OK; -} - -/** - * @brief Returns the last transfered packet size. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval Recived Data Size - */ -uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { - return HAL_PCD_EP_GetRxCount(pdev->pData, ep_addr); -} - -/** - * @brief Delay routine for the USB Device Library - * @param Delay: Delay in ms - * @retval None - */ -void USBD_LL_Delay(uint32_t Delay) { - HAL_Delay(Delay); -} - -#endif // MICROPY_HW_USB_FS || MICROPY_HW_USB_HS - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbd_conf.h b/ports/stm32/usbd_conf.h deleted file mode 100644 index 1f8e754a2b..0000000000 --- a/ports/stm32/usbd_conf.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Inc/usbd_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief General low level driver configuration - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -#ifndef MICROPY_INCLUDED_STM32_USBD_CONF_H -#define MICROPY_INCLUDED_STM32_USBD_CONF_H - -#include -#include -#include -#include - -#define USBD_MAX_NUM_INTERFACES 4 -#define USBD_MAX_NUM_CONFIGURATION 1 -#define USBD_MAX_STR_DESC_SIZ 0x100 -#define USBD_SELF_POWERED 0 -#define USBD_DEBUG_LEVEL 0 - -#endif // MICROPY_INCLUDED_STM32_USBD_CONF_H - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbd_desc.c b/ports/stm32/usbd_desc.c deleted file mode 100644 index 4babebf640..0000000000 --- a/ports/stm32/usbd_desc.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_desc.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief This file provides the USBD descriptors and string formating method. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_conf.h" - -// need this header just for MP_HAL_UNIQUE_ID_ADDRESS -#include "py/mphal.h" - -// So we don't clash with existing ST boards, we use the unofficial FOSS VID. -// This needs a proper solution. -#define USBD_VID 0xf055 -#define USBD_PID 0x9800 -#define USBD_LANGID_STRING 0x409 -#define USBD_MANUFACTURER_STRING "MicroPython" -#define USBD_PRODUCT_HS_STRING "Pyboard Virtual Comm Port in HS Mode" -#define USBD_PRODUCT_FS_STRING "Pyboard Virtual Comm Port in FS Mode" -#define USBD_CONFIGURATION_HS_STRING "Pyboard Config" -#define USBD_INTERFACE_HS_STRING "Pyboard Interface" -#define USBD_CONFIGURATION_FS_STRING "Pyboard Config" -#define USBD_INTERFACE_FS_STRING "Pyboard Interface" - -__ALIGN_BEGIN static const uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = { - USB_LEN_LANGID_STR_DESC, - USB_DESC_TYPE_STRING, - LOBYTE(USBD_LANGID_STRING), - HIBYTE(USBD_LANGID_STRING), -}; - -// set the VID, PID and device release number -void USBD_SetVIDPIDRelease(usbd_cdc_msc_hid_state_t *usbd, uint16_t vid, uint16_t pid, uint16_t device_release_num, int cdc_only) { - uint8_t *dev_desc = &usbd->usbd_device_desc[0]; - - dev_desc[0] = USB_LEN_DEV_DESC; // bLength - dev_desc[1] = USB_DESC_TYPE_DEVICE; // bDescriptorType - dev_desc[2] = 0x00; // bcdUSB - dev_desc[3] = 0x02; // bcdUSB - if (cdc_only) { - // Make it look like a Communications device if we're only - // using CDC. Otherwise, windows gets confused when we tell it that - // its a composite device with only a cdc serial interface. - dev_desc[4] = 0x02; // bDeviceClass - dev_desc[5] = 0x00; // bDeviceSubClass - dev_desc[6] = 0x00; // bDeviceProtocol - } else { - // For the other modes, we make this look like a composite device. - dev_desc[4] = 0xef; // bDeviceClass: Miscellaneous Device Class - dev_desc[5] = 0x02; // bDeviceSubClass: Common Class - dev_desc[6] = 0x01; // bDeviceProtocol: Interface Association Descriptor - } - dev_desc[7] = USB_MAX_EP0_SIZE; // bMaxPacketSize - dev_desc[8] = LOBYTE(vid); // idVendor - dev_desc[9] = HIBYTE(vid); // idVendor - dev_desc[10] = LOBYTE(pid); // idVendor - dev_desc[11] = HIBYTE(pid); // idVendor - dev_desc[12] = LOBYTE(device_release_num); // bcdDevice - dev_desc[13] = HIBYTE(device_release_num); // bcdDevice - dev_desc[14] = USBD_IDX_MFC_STR; // Index of manufacturer string - dev_desc[15] = USBD_IDX_PRODUCT_STR; // Index of product string - dev_desc[16] = USBD_IDX_SERIAL_STR; // Index of serial number string - dev_desc[17] = USBD_MAX_NUM_CONFIGURATION; // bNumConfigurations -} - -/** - * @brief Returns the device descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_DeviceDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - uint8_t *dev_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_device_desc; - *length = USB_LEN_DEV_DESC; - return dev_desc; -} - -/** - * @brief Returns a string descriptor - * @param idx: Index of the string descriptor to retrieve - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer, or NULL if idx is invalid - */ -STATIC uint8_t *USBD_StrDescriptor(USBD_HandleTypeDef *pdev, uint8_t idx, uint16_t *length) { - char str_buf[16]; - const char *str = NULL; - - switch (idx) { - case USBD_IDX_LANGID_STR: - *length = sizeof(USBD_LangIDDesc); - return (uint8_t*)USBD_LangIDDesc; // the data should only be read from this buf - - case USBD_IDX_MFC_STR: - str = USBD_MANUFACTURER_STRING; - break; - - case USBD_IDX_PRODUCT_STR: - if (pdev->dev_speed == USBD_SPEED_HIGH) { - str = USBD_PRODUCT_HS_STRING; - } else { - str = USBD_PRODUCT_FS_STRING; - } - break; - - case USBD_IDX_SERIAL_STR: { - // This document: http://www.usb.org/developers/docs/devclass_docs/usbmassbulk_10.pdf - // says that the serial number has to be at least 12 digits long and that - // the last 12 digits need to be unique. It also stipulates that the valid - // character set is that of upper-case hexadecimal digits. - // - // The onboard DFU bootloader produces a 12-digit serial number based on - // the 96-bit unique ID, so for consistency we go with this algorithm. - // You can see the serial number if you use: lsusb -v - // - // See: https://my.st.com/52d187b7 for the algorithim used. - - uint8_t *id = (uint8_t *)MP_HAL_UNIQUE_ID_ADDRESS; - snprintf(str_buf, sizeof(str_buf), - "%02X%02X%02X%02X%02X%02X", - id[11], id[10] + id[2], id[9], id[8] + id[0], id[7], id[6]); - - str = str_buf; - break; - } - - case USBD_IDX_CONFIG_STR: - if (pdev->dev_speed == USBD_SPEED_HIGH) { - str = USBD_CONFIGURATION_HS_STRING; - } else { - str = USBD_CONFIGURATION_FS_STRING; - } - break; - - case USBD_IDX_INTERFACE_STR: - if (pdev->dev_speed == USBD_SPEED_HIGH) { - str = USBD_INTERFACE_HS_STRING; - } else { - str = USBD_INTERFACE_FS_STRING; - } - break; - - default: - // invalid string index - return NULL; - } - - uint8_t *str_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_str_desc; - USBD_GetString((uint8_t*)str, str_desc, length); - return str_desc; -} - -const USBD_DescriptorsTypeDef USBD_Descriptors = { - USBD_DeviceDescriptor, - USBD_StrDescriptor, -}; - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbd_desc.h b/ports/stm32/usbd_desc.h deleted file mode 100644 index 0307defa5b..0000000000 --- a/ports/stm32/usbd_desc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_USBD_DESC_H -#define MICROPY_INCLUDED_STM32_USBD_DESC_H - -#include "usbd_cdc_msc_hid.h" - -extern const USBD_DescriptorsTypeDef USBD_Descriptors; - -void USBD_SetVIDPIDRelease(usbd_cdc_msc_hid_state_t *usbd, uint16_t vid, uint16_t pid, uint16_t device_release_num, int cdc_only); - -#endif // MICROPY_INCLUDED_STM32_USBD_DESC_H diff --git a/ports/stm32/usbd_hid_interface.c b/ports/stm32/usbd_hid_interface.c deleted file mode 100644 index 3ffc0b425d..0000000000 --- a/ports/stm32/usbd_hid_interface.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and heavily modified. See below for original - * copyright header. - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_cdc_interface.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Source file for USBD CDC interface - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include - -#include "usbd_hid_interface.h" - -#include "py/obj.h" -#include "irq.h" -#include "usb.h" - -uint8_t *usbd_hid_init(usbd_hid_state_t *hid_in) { - usbd_hid_itf_t *hid = (usbd_hid_itf_t*)hid_in; - - hid->current_read_buffer = 0; - hid->last_read_len = 0; - hid->current_write_buffer = 0; - - // Return the buffer to place the first USB OUT packet - return hid->buffer[hid->current_write_buffer]; -} - -// Data received over USB OUT endpoint is processed here. -// len: number of bytes received into the buffer we passed to USBD_HID_ReceivePacket -// Returns USBD_OK if all operations are OK else USBD_FAIL -int8_t usbd_hid_receive(usbd_hid_state_t *hid_in, size_t len) { - usbd_hid_itf_t *hid = (usbd_hid_itf_t*)hid_in; - - hid->current_write_buffer = !hid->current_write_buffer; - hid->last_read_len = len; - // initiate next USB packet transfer, to append to existing data in buffer - USBD_HID_ReceivePacket(&hid->base, hid->buffer[hid->current_write_buffer]); - // Set NAK to indicate we need to process read buffer - USBD_HID_SetNAK(&hid->base); - return USBD_OK; -} - -// Returns number of ready rx buffers. -int usbd_hid_rx_num(usbd_hid_itf_t *hid) { - return hid->current_read_buffer != hid->current_write_buffer; -} - -// timout in milliseconds. -// Returns number of bytes read from the device. -int usbd_hid_rx(usbd_hid_itf_t *hid, size_t len, uint8_t *buf, uint32_t timeout) { - // Wait until we have buffer to read - uint32_t start = HAL_GetTick(); - while (hid->current_read_buffer == hid->current_write_buffer) { - // Wraparound of tick is taken care of by 2's complement arithmetic. - if (HAL_GetTick() - start >= timeout) { - // timeout - return 0; - } - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be filled; return immediately - return 0; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // There is not enough space in buffer - if (len < hid->last_read_len) { - return 0; - } - - // Copy bytes from device to user buffer - int read_len = hid->last_read_len; - memcpy(buf, hid->buffer[hid->current_read_buffer], read_len); - hid->current_read_buffer = !hid->current_read_buffer; - - // Clear NAK to indicate we are ready to read more data - USBD_HID_ClearNAK(&hid->base); - - // Success, return number of bytes read - return read_len; -} diff --git a/ports/stm32/usbd_hid_interface.h b/ports/stm32/usbd_hid_interface.h deleted file mode 100644 index 777fa93403..0000000000 --- a/ports/stm32/usbd_hid_interface.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ -#ifndef MICROPY_INCLUDED_STM32_USBD_HID_INTERFACE_H -#define MICROPY_INCLUDED_STM32_USBD_HID_INTERFACE_H - -#include "usbd_cdc_msc_hid.h" - -typedef struct _usbd_hid_itf_t { - usbd_hid_state_t base; // state for the base HID layer - - uint8_t buffer[2][HID_DATA_FS_MAX_PACKET_SIZE]; // pair of buffers to read individual packets into - int8_t current_read_buffer; // which buffer to read from - uint32_t last_read_len; // length of last read - int8_t current_write_buffer; // which buffer to write to -} usbd_hid_itf_t; - -int usbd_hid_rx_num(usbd_hid_itf_t *hid); -int usbd_hid_rx(usbd_hid_itf_t *hid, size_t len, uint8_t *buf, uint32_t timeout); - -#endif // MICROPY_INCLUDED_STM32_USBD_HID_INTERFACE_H diff --git a/ports/stm32/usbd_msc_storage.c b/ports/stm32/usbd_msc_storage.c deleted file mode 100644 index 7d6c19e9fe..0000000000 --- a/ports/stm32/usbd_msc_storage.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file usbd_storage_msd.c - * @author MCD application Team - * @version V1.1.0 - * @date 19-March-2012 - * @brief This file provides the disk operations functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2012 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * Heavily modified by dpgeorge for MicroPython. - * - ****************************************************************************** - */ - -#include - -#include "usbd_cdc_msc_hid.h" -#include "usbd_msc_storage.h" - -#include "py/mpstate.h" -#include "storage.h" -#include "sdcard.h" - -// These are needed to support removal of the medium, so that the USB drive -// can be unmounted, and won't be remounted automatically. -static uint8_t flash_started = 0; - -#if MICROPY_HW_HAS_SDCARD -static uint8_t sdcard_started = 0; -#endif - -/******************************************************************************/ -// Callback functions for when the internal flash is the mass storage device - -static const int8_t FLASH_STORAGE_Inquirydata[] = { // 36 bytes - // LUN 0 - 0x00, - 0x80, // 0x00 for a fixed drive, 0x80 for a removable drive - 0x02, - 0x02, - (STANDARD_INQUIRY_DATA_LEN - 5), - 0x00, - 0x00, - 0x00, - 'u', 'P', 'y', ' ', ' ', ' ', ' ', ' ', // Manufacturer : 8 bytes - 'm', 'i', 'c', 'r', 'o', 'S', 'D', ' ', // Product : 16 Bytes - 'F', 'l', 'a', 's', 'h', ' ', ' ', ' ', - '1', '.', '0' ,'0', // Version : 4 Bytes -}; - -/** - * @brief Initialize the storage medium - * @param lun : logical unit number - * @retval Status - */ -int8_t FLASH_STORAGE_Init(uint8_t lun) { - storage_init(); - flash_started = 1; - return 0; -} - -/** - * @brief return medium capacity and block size - * @param lun : logical unit number - * @param block_num : number of physical block - * @param block_size : size of a physical block - * @retval Status - */ -int8_t FLASH_STORAGE_GetCapacity(uint8_t lun, uint32_t *block_num, uint16_t *block_size) { - *block_size = storage_get_block_size(); - *block_num = storage_get_block_count(); - return 0; -} - -/** - * @brief check whether the medium is ready - * @param lun : logical unit number - * @retval Status - */ -int8_t FLASH_STORAGE_IsReady(uint8_t lun) { - if (flash_started) { - return 0; - } - return -1; -} - -/** - * @brief check whether the medium is write-protected - * @param lun : logical unit number - * @retval Status - */ -int8_t FLASH_STORAGE_IsWriteProtected(uint8_t lun) { - return 0; -} - -// Remove the lun -int8_t FLASH_STORAGE_StartStopUnit(uint8_t lun, uint8_t started) { - flash_started = started; - return 0; -} - -int8_t FLASH_STORAGE_PreventAllowMediumRemoval(uint8_t lun, uint8_t param) { - // sync the flash so that the cache is cleared and the device can be unplugged/turned off - storage_flush(); - return 0; -} - -/** - * @brief Read data from the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to save data - * @param blk_addr : address of 1st block to be read - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t FLASH_STORAGE_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - storage_read_blocks(buf, blk_addr, blk_len); - return 0; -} - -/** - * @brief Write data to the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to write from - * @param blk_addr : address of 1st block to be written - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t FLASH_STORAGE_Write (uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - storage_write_blocks(buf, blk_addr, blk_len); - return 0; -} - -/** - * @brief Return number of supported logical unit - * @param None - * @retval number of logical unit - */ -int8_t FLASH_STORAGE_GetMaxLun(void) { - return 0; -} - -const USBD_StorageTypeDef USBD_FLASH_STORAGE_fops = { - FLASH_STORAGE_Init, - FLASH_STORAGE_GetCapacity, - FLASH_STORAGE_IsReady, - FLASH_STORAGE_IsWriteProtected, - FLASH_STORAGE_StartStopUnit, - FLASH_STORAGE_PreventAllowMediumRemoval, - FLASH_STORAGE_Read, - FLASH_STORAGE_Write, - FLASH_STORAGE_GetMaxLun, - (int8_t *)FLASH_STORAGE_Inquirydata, -}; - -/******************************************************************************/ -// Callback functions for when the SD card is the mass storage device - -#if MICROPY_HW_HAS_SDCARD - -static const int8_t SDCARD_STORAGE_Inquirydata[] = { // 36 bytes - // LUN 0 - 0x00, - 0x80, // 0x00 for a fixed drive, 0x80 for a removable drive - 0x02, - 0x02, - (STANDARD_INQUIRY_DATA_LEN - 5), - 0x00, - 0x00, - 0x00, - 'u', 'P', 'y', ' ', ' ', ' ', ' ', ' ', // Manufacturer : 8 bytes - 'm', 'i', 'c', 'r', 'o', 'S', 'D', ' ', // Product : 16 Bytes - 'S', 'D', ' ', 'c', 'a', 'r', 'd', ' ', - '1', '.', '0' ,'0', // Version : 4 Bytes -}; - -/** - * @brief Initialize the storage medium - * @param lun : logical unit number - * @retval Status - */ -int8_t SDCARD_STORAGE_Init(uint8_t lun) { - if (!sdcard_power_on()) { - return -1; - } - sdcard_started = 1; - return 0; - -} - -/** - * @brief return medium capacity and block size - * @param lun : logical unit number - * @param block_num : number of physical block - * @param block_size : size of a physical block - * @retval Status - */ -int8_t SDCARD_STORAGE_GetCapacity(uint8_t lun, uint32_t *block_num, uint16_t *block_size) { - *block_size = SDCARD_BLOCK_SIZE; - *block_num = sdcard_get_capacity_in_bytes() / SDCARD_BLOCK_SIZE; - return 0; -} - -/** - * @brief check whether the medium is ready - * @param lun : logical unit number - * @retval Status - */ -int8_t SDCARD_STORAGE_IsReady(uint8_t lun) { - if (sdcard_started) { - return 0; - } - return -1; -} - -/** - * @brief check whether the medium is write-protected - * @param lun : logical unit number - * @retval Status - */ -int8_t SDCARD_STORAGE_IsWriteProtected(uint8_t lun) { - return 0; -} - -// Remove the lun -int8_t SDCARD_STORAGE_StartStopUnit(uint8_t lun, uint8_t started) { - sdcard_started = started; - return 0; -} - -int8_t SDCARD_STORAGE_PreventAllowMediumRemoval(uint8_t lun, uint8_t param) { - return 0; -} - -/** - * @brief Read data from the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to save data - * @param blk_addr : address of 1st block to be read - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t SDCARD_STORAGE_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - if (sdcard_read_blocks(buf, blk_addr, blk_len) != 0) { - return -1; - } - return 0; -} - -/** - * @brief Write data to the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to write from - * @param blk_addr : address of 1st block to be written - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t SDCARD_STORAGE_Write(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - if (sdcard_write_blocks(buf, blk_addr, blk_len) != 0) { - return -1; - } - return 0; -} - -/** - * @brief Return number of supported logical unit - * @param None - * @retval number of logical unit - */ -int8_t SDCARD_STORAGE_GetMaxLun(void) { - return 0; -} - -const USBD_StorageTypeDef USBD_SDCARD_STORAGE_fops = { - SDCARD_STORAGE_Init, - SDCARD_STORAGE_GetCapacity, - SDCARD_STORAGE_IsReady, - SDCARD_STORAGE_IsWriteProtected, - SDCARD_STORAGE_StartStopUnit, - SDCARD_STORAGE_PreventAllowMediumRemoval, - SDCARD_STORAGE_Read, - SDCARD_STORAGE_Write, - SDCARD_STORAGE_GetMaxLun, - (int8_t *)SDCARD_STORAGE_Inquirydata, -}; - -#endif // MICROPY_HW_HAS_SDCARD diff --git a/ports/stm32/usbd_msc_storage.h b/ports/stm32/usbd_msc_storage.h deleted file mode 100644 index 669f7df581..0000000000 --- a/ports/stm32/usbd_msc_storage.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_USBD_MSC_STORAGE_H -#define MICROPY_INCLUDED_STM32_USBD_MSC_STORAGE_H - -extern const USBD_StorageTypeDef USBD_FLASH_STORAGE_fops; -extern const USBD_StorageTypeDef USBD_SDCARD_STORAGE_fops; - -#endif // MICROPY_INCLUDED_STM32_USBD_MSC_STORAGE_H diff --git a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid.h b/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid.h deleted file mode 100644 index a4f81f10d9..0000000000 --- a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid.h +++ /dev/null @@ -1,195 +0,0 @@ -#ifndef _USB_CDC_MSC_CORE_H_ -#define _USB_CDC_MSC_CORE_H_ - -#include "usbd_cdc_msc_hid0.h" -#include "usbd_msc_bot.h" -#include "usbd_msc_scsi.h" -#include "usbd_ioreq.h" - -// These are included to get direct access the MICROPY_HW_USB_xxx config -#include "mpconfigboard.h" -#include "mpconfigboard_common.h" - -// Work out if we should support USB high-speed device mode -#if MICROPY_HW_USB_HS \ - && (!MICROPY_HW_USB_HS_IN_FS || defined(STM32F723xx) || defined(STM32F733xx)) -#define USBD_SUPPORT_HS_MODE (1) -#else -#define USBD_SUPPORT_HS_MODE (0) -#endif - -// Needed for the CDC+MSC+HID state and should be maximum of all template -// config descriptors defined in usbd_cdc_msc_hid.c -#if MICROPY_HW_USB_ENABLE_CDC2 -#define MAX_TEMPLATE_CONFIG_DESC_SIZE (9 + 23 + (8 + 58) + (8 + 58)) -#else -#define MAX_TEMPLATE_CONFIG_DESC_SIZE (107) -#endif - -// CDC, MSC and HID packet sizes -#define MSC_FS_MAX_PACKET (64) -#define MSC_HS_MAX_PACKET (512) -#define CDC_DATA_FS_MAX_PACKET_SIZE (64) // endpoint IN & OUT packet size -#define CDC_DATA_HS_MAX_PACKET_SIZE (512) // endpoint IN & OUT packet size -#if USBD_SUPPORT_HS_MODE -#define CDC_DATA_MAX_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE -#else -#define CDC_DATA_MAX_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE -#endif -#define MSC_MEDIA_PACKET (2048) // was 8192; how low can it go whilst still working? -#define HID_DATA_FS_MAX_PACKET_SIZE (64) // endpoint IN & OUT packet size - -// Need to define here for BOT and SCSI layers -#define MSC_IN_EP (0x81) -#define MSC_OUT_EP (0x01) - -struct _usbd_cdc_msc_hid_state_t; - -typedef struct { - struct _usbd_cdc_msc_hid_state_t *usbd; // The parent USB device - uint32_t ctl_packet_buf[CDC_DATA_MAX_PACKET_SIZE / 4]; // Force 32-bit alignment - uint8_t iface_num; - uint8_t in_ep; - uint8_t out_ep; - uint8_t cur_request; - uint8_t cur_length; - volatile uint8_t tx_in_progress; -} usbd_cdc_state_t; - -typedef struct _USBD_STORAGE { - int8_t (* Init) (uint8_t lun); - int8_t (* GetCapacity) (uint8_t lun, uint32_t *block_num, uint16_t *block_size); - int8_t (* IsReady) (uint8_t lun); - int8_t (* IsWriteProtected) (uint8_t lun); - int8_t (* StartStopUnit)(uint8_t lun, uint8_t started); - int8_t (* PreventAllowMediumRemoval)(uint8_t lun, uint8_t param0); - int8_t (* Read) (uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len); - int8_t (* Write)(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len); - int8_t (* GetMaxLun)(void); - int8_t *pInquiry; -} USBD_StorageTypeDef; - -typedef struct { - uint32_t max_lun; - uint32_t interface; - uint8_t bot_state; - uint8_t bot_status; - uint16_t bot_data_length; - uint8_t bot_data[MSC_MEDIA_PACKET]; - USBD_MSC_BOT_CBWTypeDef cbw; - USBD_MSC_BOT_CSWTypeDef csw; - - USBD_SCSI_SenseTypeDef scsi_sense [SENSE_LIST_DEEPTH]; - uint8_t scsi_sense_head; - uint8_t scsi_sense_tail; - - uint16_t scsi_blk_size; - uint32_t scsi_blk_nbr; - - uint32_t scsi_blk_addr_in_blks; - uint32_t scsi_blk_len; - - // operations of the underlying block device - USBD_StorageTypeDef *bdev_ops; -} USBD_MSC_BOT_HandleTypeDef; - -typedef enum { - HID_IDLE = 0, - HID_BUSY, -} HID_StateTypeDef; - -typedef struct { - struct _usbd_cdc_msc_hid_state_t *usbd; // The parent USB device - uint8_t iface_num; - uint8_t in_ep; - uint8_t out_ep; - uint8_t state; - uint8_t ctl_protocol; - uint8_t ctl_idle_state; - uint8_t ctl_alt_setting; - uint8_t *desc; - const uint8_t *report_desc; -} usbd_hid_state_t; - -typedef struct _usbd_cdc_msc_hid_state_t { - USBD_HandleTypeDef *pdev; - - uint8_t usbd_mode; - uint8_t usbd_config_desc_size; - - USBD_MSC_BOT_HandleTypeDef MSC_BOT_ClassData; - - // RAM to hold the current descriptors, which we configure on the fly - __ALIGN_BEGIN uint8_t usbd_device_desc[USB_LEN_DEV_DESC] __ALIGN_END; - __ALIGN_BEGIN uint8_t usbd_str_desc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; - __ALIGN_BEGIN uint8_t usbd_config_desc[MAX_TEMPLATE_CONFIG_DESC_SIZE] __ALIGN_END; - - usbd_cdc_state_t *cdc; - #if MICROPY_HW_USB_ENABLE_CDC2 - usbd_cdc_state_t *cdc2; - #endif - usbd_hid_state_t *hid; -} usbd_cdc_msc_hid_state_t; - -#define USBD_HID_MOUSE_MAX_PACKET (4) -#define USBD_HID_MOUSE_REPORT_DESC_SIZE (74) - -extern const uint8_t USBD_HID_MOUSE_ReportDesc[USBD_HID_MOUSE_REPORT_DESC_SIZE]; - -#define USBD_HID_KEYBOARD_MAX_PACKET (8) -#define USBD_HID_KEYBOARD_REPORT_DESC_SIZE (63) - -extern const uint8_t USBD_HID_KEYBOARD_ReportDesc[USBD_HID_KEYBOARD_REPORT_DESC_SIZE]; - -extern const USBD_ClassTypeDef USBD_CDC_MSC_HID; - -static inline uint32_t usbd_msc_max_packet(USBD_HandleTypeDef *pdev) { - #if USBD_SUPPORT_HS_MODE - if (pdev->dev_speed == USBD_SPEED_HIGH) { - return MSC_HS_MAX_PACKET; - } else - #endif - { - return MSC_FS_MAX_PACKET; - } -} - -static inline uint32_t usbd_cdc_max_packet(USBD_HandleTypeDef *pdev) { - #if USBD_SUPPORT_HS_MODE - if (pdev->dev_speed == USBD_SPEED_HIGH) { - return CDC_DATA_HS_MAX_PACKET_SIZE; - } else - #endif - { - return CDC_DATA_FS_MAX_PACKET_SIZE; - } -} - -// returns 0 on success, -1 on failure -int USBD_SelectMode(usbd_cdc_msc_hid_state_t *usbd, uint32_t mode, USBD_HID_ModeInfoTypeDef *hid_info); -// returns the current usb mode -uint8_t USBD_GetMode(usbd_cdc_msc_hid_state_t *usbd); - -uint8_t USBD_CDC_ReceivePacket(usbd_cdc_state_t *cdc, uint8_t *buf); -uint8_t USBD_CDC_TransmitPacket(usbd_cdc_state_t *cdc, size_t len, const uint8_t *buf); - -static inline void USBD_MSC_RegisterStorage(usbd_cdc_msc_hid_state_t *usbd, USBD_StorageTypeDef *fops) { - usbd->MSC_BOT_ClassData.bdev_ops = fops; -} - -uint8_t USBD_HID_ReceivePacket(usbd_hid_state_t *usbd, uint8_t *buf); -int USBD_HID_CanSendReport(usbd_hid_state_t *usbd); -uint8_t USBD_HID_SendReport(usbd_hid_state_t *usbd, uint8_t *report, uint16_t len); -uint8_t USBD_HID_SetNAK(usbd_hid_state_t *usbd); -uint8_t USBD_HID_ClearNAK(usbd_hid_state_t *usbd); - -// These are provided externally to implement the CDC interface -uint8_t *usbd_cdc_init(usbd_cdc_state_t *cdc); -int8_t usbd_cdc_control(usbd_cdc_state_t *cdc, uint8_t cmd, uint8_t* pbuf, uint16_t length); -int8_t usbd_cdc_receive(usbd_cdc_state_t *cdc, size_t len); - -// These are provided externally to implement the HID interface -uint8_t *usbd_hid_init(usbd_hid_state_t *hid); -int8_t usbd_hid_receive(usbd_hid_state_t *hid, size_t len); - -#endif // _USB_CDC_MSC_CORE_H_ diff --git a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid0.h b/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid0.h deleted file mode 100644 index c876dcf298..0000000000 --- a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid0.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_USBDEV_CLASS_INC_USBD_CDC_MSC_HID0_H -#define MICROPY_INCLUDED_STM32_USBDEV_CLASS_INC_USBD_CDC_MSC_HID0_H - -// these are exports for the CDC/MSC/HID interface that are independent -// from any other definitions/declarations - -// only CDC_MSC and CDC_HID are available -typedef enum { - USBD_MODE_CDC = 0x01, - USBD_MODE_MSC = 0x02, - USBD_MODE_HID = 0x04, - USBD_MODE_CDC2 = 0x08, - USBD_MODE_CDC_MSC = USBD_MODE_CDC | USBD_MODE_MSC, - USBD_MODE_CDC_HID = USBD_MODE_CDC | USBD_MODE_HID, - USBD_MODE_MSC_HID = USBD_MODE_MSC | USBD_MODE_HID, - USBD_MODE_CDC2_MSC = USBD_MODE_CDC | USBD_MODE_MSC | USBD_MODE_CDC2, - USBD_MODE_HIGH_SPEED = 0x80, // or with one of the above -} usb_device_mode_t; - -typedef struct _USBD_HID_ModeInfoTypeDef { - uint8_t subclass; // 0=no sub class, 1=boot - uint8_t protocol; // 0=none, 1=keyboard, 2=mouse - uint8_t max_packet_len; // only support up to 255 - uint8_t polling_interval; // in units of 1ms - uint8_t report_desc_len; - const uint8_t *report_desc; -} USBD_HID_ModeInfoTypeDef; - -#endif // MICROPY_INCLUDED_STM32_USBDEV_CLASS_INC_USBD_CDC_MSC_HID0_H diff --git a/ports/stm32/usbdev/class/inc/usbd_msc_bot.h b/ports/stm32/usbdev/class/inc/usbd_msc_bot.h deleted file mode 100644 index 4edc912fe1..0000000000 --- a/ports/stm32/usbdev/class/inc/usbd_msc_bot.h +++ /dev/null @@ -1,151 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_bot.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header for the usbd_msc_bot.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#include "usbd_core.h" - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_MSC_BOT_H -#define __USBD_MSC_BOT_H - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup MSC_BOT - * @brief This file is the Header file for usbd_bot.c - * @{ - */ - - -/** @defgroup USBD_CORE_Exported_Defines - * @{ - */ -#define USBD_BOT_IDLE 0 /* Idle state */ -#define USBD_BOT_DATA_OUT 1 /* Data Out state */ -#define USBD_BOT_DATA_IN 2 /* Data In state */ -#define USBD_BOT_LAST_DATA_IN 3 /* Last Data In Last */ -#define USBD_BOT_SEND_DATA 4 /* Send Immediate data */ -#define USBD_BOT_NO_DATA 5 /* No data Stage */ - -#define USBD_BOT_CBW_SIGNATURE 0x43425355 -#define USBD_BOT_CSW_SIGNATURE 0x53425355 -#define USBD_BOT_CBW_LENGTH 31 -#define USBD_BOT_CSW_LENGTH 13 -#define USBD_BOT_MAX_DATA 256 - -/* CSW Status Definitions */ -#define USBD_CSW_CMD_PASSED 0x00 -#define USBD_CSW_CMD_FAILED 0x01 -#define USBD_CSW_PHASE_ERROR 0x02 - -/* BOT Status */ -#define USBD_BOT_STATUS_NORMAL 0 -#define USBD_BOT_STATUS_RECOVERY 1 -#define USBD_BOT_STATUS_ERROR 2 - - -#define USBD_DIR_IN 0 -#define USBD_DIR_OUT 1 -#define USBD_BOTH_DIR 2 - -/** - * @} - */ - -/** @defgroup MSC_CORE_Private_TypesDefinitions - * @{ - */ - -typedef struct -{ - uint32_t dSignature; - uint32_t dTag; - uint32_t dDataLength; - uint8_t bmFlags; - uint8_t bLUN; - uint8_t bCBLength; - uint8_t CB[16]; - uint8_t ReservedForAlign; -} -USBD_MSC_BOT_CBWTypeDef; - - -typedef struct -{ - uint32_t dSignature; - uint32_t dTag; - uint32_t dDataResidue; - uint8_t bStatus; - uint8_t ReservedForAlign[3]; -} -USBD_MSC_BOT_CSWTypeDef; - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_Types - * @{ - */ - -/** - * @} - */ -/** @defgroup USBD_CORE_Exported_FunctionsPrototypes - * @{ - */ -void MSC_BOT_Init (USBD_HandleTypeDef *pdev); -void MSC_BOT_Reset (USBD_HandleTypeDef *pdev); -void MSC_BOT_DeInit (USBD_HandleTypeDef *pdev); -void MSC_BOT_DataIn (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -void MSC_BOT_DataOut (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -void MSC_BOT_SendCSW (USBD_HandleTypeDef *pdev, - uint8_t CSW_Status); - -void MSC_BOT_CplClrFeature (USBD_HandleTypeDef *pdev, - uint8_t epnum); -/** - * @} - */ - -#endif /* __USBD_MSC_BOT_H */ -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbdev/class/inc/usbd_msc_data.h b/ports/stm32/usbdev/class/inc/usbd_msc_data.h deleted file mode 100644 index afd39e4f09..0000000000 --- a/ports/stm32/usbdev/class/inc/usbd_msc_data.h +++ /dev/null @@ -1,104 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_data.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header for the usbd_msc_data.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef _USBD_MSC_DATA_H_ -#define _USBD_MSC_DATA_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USB_INFO - * @brief general defines for the usb device library file - * @{ - */ - -/** @defgroup USB_INFO_Exported_Defines - * @{ - */ -#define MODE_SENSE6_LEN 8 -#define MODE_SENSE10_LEN 8 -#define LENGTH_INQUIRY_PAGE00 7 -#define LENGTH_FORMAT_CAPACITIES 20 - -/** - * @} - */ - - -/** @defgroup USBD_INFO_Exported_TypesDefinitions - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBD_INFO_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_INFO_Exported_Variables - * @{ - */ -extern const uint8_t MSC_Page00_Inquiry_Data[]; -extern const uint8_t MSC_Mode_Sense6_data[]; -extern const uint8_t MSC_Mode_Sense10_data[] ; - -/** - * @} - */ - -/** @defgroup USBD_INFO_Exported_FunctionsPrototype - * @{ - */ - -/** - * @} - */ - -#endif /* _USBD_MSC_DATA_H_ */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/class/inc/usbd_msc_scsi.h b/ports/stm32/usbdev/class/inc/usbd_msc_scsi.h deleted file mode 100644 index b657cead09..0000000000 --- a/ports/stm32/usbdev/class/inc/usbd_msc_scsi.h +++ /dev/null @@ -1,195 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_scsi.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header for the usbd_msc_scsi.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_MSC_SCSI_H -#define __USBD_MSC_SCSI_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_SCSI - * @brief header file for the storage disk file - * @{ - */ - -/** @defgroup USBD_SCSI_Exported_Defines - * @{ - */ - -#define SENSE_LIST_DEEPTH 4 - -/* SCSI Commands */ -#define SCSI_FORMAT_UNIT 0x04 -#define SCSI_INQUIRY 0x12 -#define SCSI_MODE_SELECT6 0x15 -#define SCSI_MODE_SELECT10 0x55 -#define SCSI_MODE_SENSE6 0x1A -#define SCSI_MODE_SENSE10 0x5A -#define SCSI_ALLOW_MEDIUM_REMOVAL 0x1E -#define SCSI_SYNCHRONIZE_CACHE10 0x35 -#define SCSI_SYNCHRONIZE_CACHE16 0x91 -#define SCSI_READ6 0x08 -#define SCSI_READ10 0x28 -#define SCSI_READ12 0xA8 -#define SCSI_READ16 0x88 - -#define SCSI_READ_CAPACITY10 0x25 -#define SCSI_READ_CAPACITY16 0x9E - -#define SCSI_REQUEST_SENSE 0x03 -#define SCSI_START_STOP_UNIT 0x1B -#define SCSI_TEST_UNIT_READY 0x00 -#define SCSI_WRITE6 0x0A -#define SCSI_WRITE10 0x2A -#define SCSI_WRITE12 0xAA -#define SCSI_WRITE16 0x8A - -#define SCSI_VERIFY10 0x2F -#define SCSI_VERIFY12 0xAF -#define SCSI_VERIFY16 0x8F - -#define SCSI_SEND_DIAGNOSTIC 0x1D -#define SCSI_READ_FORMAT_CAPACITIES 0x23 - -#define NO_SENSE 0 -#define RECOVERED_ERROR 1 -#define NOT_READY 2 -#define MEDIUM_ERROR 3 -#define HARDWARE_ERROR 4 -#define ILLEGAL_REQUEST 5 -#define UNIT_ATTENTION 6 -#define DATA_PROTECT 7 -#define BLANK_CHECK 8 -#define VENDOR_SPECIFIC 9 -#define COPY_ABORTED 10 -#define ABORTED_COMMAND 11 -#define VOLUME_OVERFLOW 13 -#define MISCOMPARE 14 - - -#define INVALID_CDB 0x20 -#define INVALID_FIELED_IN_COMMAND 0x24 -#define PARAMETER_LIST_LENGTH_ERROR 0x1A -#define INVALID_FIELD_IN_PARAMETER_LIST 0x26 -#define ADDRESS_OUT_OF_RANGE 0x21 -#define MEDIUM_NOT_PRESENT 0x3A -#define MEDIUM_HAVE_CHANGED 0x28 -#define WRITE_PROTECTED 0x27 -#define UNRECOVERED_READ_ERROR 0x11 -#define WRITE_FAULT 0x03 - -#define READ_FORMAT_CAPACITY_DATA_LEN 0x0C -#define READ_CAPACITY10_DATA_LEN 0x08 -#define MODE_SENSE10_DATA_LEN 0x08 -#define MODE_SENSE6_DATA_LEN 0x04 -#define REQUEST_SENSE_DATA_LEN 0x12 -#define STANDARD_INQUIRY_DATA_LEN 0x24 -#define BLKVFY 0x04 - -extern uint8_t Page00_Inquiry_Data[]; -extern uint8_t Standard_Inquiry_Data[]; -extern uint8_t Standard_Inquiry_Data2[]; -extern uint8_t Mode_Sense6_data[]; -extern uint8_t Mode_Sense10_data[]; -extern uint8_t Scsi_Sense_Data[]; -extern uint8_t ReadCapacity10_Data[]; -extern uint8_t ReadFormatCapacity_Data []; -/** - * @} - */ - - -/** @defgroup USBD_SCSI_Exported_TypesDefinitions - * @{ - */ - -typedef struct _SENSE_ITEM { - char Skey; - union { - struct _ASCs { - char ASC; - char ASCQ; - }b; - unsigned int ASC; - char *pData; - } w; -} USBD_SCSI_SenseTypeDef; -/** - * @} - */ - -/** @defgroup USBD_SCSI_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_SCSI_Exported_Variables - * @{ - */ - -/** - * @} - */ -/** @defgroup USBD_SCSI_Exported_FunctionsPrototype - * @{ - */ -int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, - uint8_t lun, - uint8_t *cmd); - -void SCSI_SenseCode(USBD_HandleTypeDef *pdev, - uint8_t lun, - uint8_t sKey, - uint8_t ASC); - -/** - * @} - */ - -#endif /* __USBD_MSC_SCSI_H */ -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c b/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c deleted file mode 100644 index c5aac037d3..0000000000 --- a/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c +++ /dev/null @@ -1,1318 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include STM32_HAL_H -#include "usbd_ioreq.h" -#include "usbd_cdc_msc_hid.h" - -#if MICROPY_HW_ENABLE_USB - -#define MSC_TEMPLATE_CONFIG_DESC_SIZE (32) -#define MSC_TEMPLATE_MSC_DESC_OFFSET (9) -#define CDC_TEMPLATE_CONFIG_DESC_SIZE (67) -#define CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE (98) -#define CDC_MSC_TEMPLATE_MSC_DESC_OFFSET (9) -#define CDC_MSC_TEMPLATE_CDC_DESC_OFFSET (40) -#define CDC2_MSC_TEMPLATE_CONFIG_DESC_SIZE (9 + 23 + (8 + 58) + (8 + 58)) -#define CDC2_MSC_TEMPLATE_MSC_DESC_OFFSET (9) -#define CDC2_MSC_TEMPLATE_CDC_DESC_OFFSET (9 + 23 + 8) -#define CDC2_MSC_TEMPLATE_CDC2_DESC_OFFSET (9 + 23 + (8 + 58) + 8) -#define CDC_HID_TEMPLATE_CONFIG_DESC_SIZE (107) -#define CDC_HID_TEMPLATE_HID_DESC_OFFSET (9) -#define CDC_HID_TEMPLATE_CDC_DESC_OFFSET (49) -#define CDC_TEMPLATE_CDC_DESC_OFFSET (9) -#define CDC_DESC_OFFSET_INTR_INTERVAL (34) -#define CDC_DESC_OFFSET_OUT_MAX_PACKET_LO (48) -#define CDC_DESC_OFFSET_OUT_MAX_PACKET_HI (49) -#define CDC_DESC_OFFSET_IN_MAX_PACKET_LO (55) -#define CDC_DESC_OFFSET_IN_MAX_PACKET_HI (56) -#define HID_DESC_OFFSET_SUBCLASS (6) -#define HID_DESC_OFFSET_PROTOCOL (7) -#define HID_DESC_OFFSET_SUBDESC (9) -#define HID_DESC_OFFSET_REPORT_DESC_LEN (16) -#define HID_DESC_OFFSET_MAX_PACKET_LO (22) -#define HID_DESC_OFFSET_MAX_PACKET_HI (23) -#define HID_DESC_OFFSET_POLLING_INTERVAL (24) -#define HID_DESC_OFFSET_MAX_PACKET_OUT_LO (29) -#define HID_DESC_OFFSET_MAX_PACKET_OUT_HI (30) -#define HID_DESC_OFFSET_POLLING_INTERVAL_OUT (31) -#define HID_SUBDESC_LEN (9) - -#define CDC_IFACE_NUM_ALONE (0) -#define CDC_IFACE_NUM_WITH_MSC (1) -#define CDC2_IFACE_NUM_WITH_MSC (3) -#define CDC_IFACE_NUM_WITH_HID (1) -#define MSC_IFACE_NUM_WITH_CDC (0) -#define HID_IFACE_NUM_WITH_CDC (0) -#define HID_IFACE_NUM_WITH_MSC (1) - -#define CDC_IN_EP (0x83) -#define CDC_OUT_EP (0x03) -#define CDC_CMD_EP (0x82) - -#define CDC2_IN_EP (0x85) -#define CDC2_OUT_EP (0x05) -#define CDC2_CMD_EP (0x84) - -#define HID_IN_EP_WITH_CDC (0x81) -#define HID_OUT_EP_WITH_CDC (0x01) -#define HID_IN_EP_WITH_MSC (0x83) -#define HID_OUT_EP_WITH_MSC (0x03) - -#define USB_DESC_TYPE_ASSOCIATION (0x0b) - -#define CDC_CMD_PACKET_SIZE (8) // Control Endpoint Packet size - -#define BOT_GET_MAX_LUN (0xfe) -#define BOT_RESET (0xff) - -#define HID_DESCRIPTOR_TYPE (0x21) -#define HID_REPORT_DESC (0x22) -#define HID_REQ_SET_PROTOCOL (0x0b) -#define HID_REQ_GET_PROTOCOL (0x03) -#define HID_REQ_SET_IDLE (0x0a) -#define HID_REQ_GET_IDLE (0x02) - -#if USBD_SUPPORT_HS_MODE -// USB Standard Device Descriptor -__ALIGN_BEGIN static uint8_t USBD_CDC_MSC_HID_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END = { - USB_LEN_DEV_QUALIFIER_DESC, - USB_DESC_TYPE_DEVICE_QUALIFIER, - 0x00, - 0x02, - 0x00, - 0x00, - 0x00, - 0x40, // same for CDC and MSC (latter being MSC_FS_MAX_PACKET), HID is 0x04 - 0x01, - 0x00, -}; -#endif - -// USB MSC device Configuration Descriptor -static const uint8_t msc_template_config_desc[MSC_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(MSC_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength: no of returned bytes - HIBYTE(MSC_TEMPLATE_CONFIG_DESC_SIZE), - 0x01, // bNumInterfaces: 1 interfaces - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //========================================================================== - // MSC only has 1 interface so doesn't need an IAD - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface descriptor - MSC_IFACE_NUM_WITH_CDC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints - 0x08, // bInterfaceClass: MSC Class - 0x06, // bInterfaceSubClass : SCSI transparent - 0x50, // nInterfaceProtocol - 0x00, // iInterface: - - // Endpoint IN descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - MSC_IN_EP, // bEndpointAddress: IN, address 3 - 0x02, // bmAttributes: Bulk endpoint type - LOBYTE(MSC_FS_MAX_PACKET), // wMaxPacketSize - HIBYTE(MSC_FS_MAX_PACKET), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint OUT descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - MSC_OUT_EP, // bEndpointAddress: OUT, address 3 - 0x02, // bmAttributes: Bulk endpoint type - LOBYTE(MSC_FS_MAX_PACKET), // wMaxPacketSize - HIBYTE(MSC_FS_MAX_PACKET), - 0x00, // bInterval: ignore for Bulk transfer -}; - -// USB CDC MSC device Configuration Descriptor -static const uint8_t cdc_msc_template_config_desc[CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength: no of returned bytes - HIBYTE(CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE), - 0x03, // bNumInterfaces: 3 interfaces - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //========================================================================== - // MSC only has 1 interface so doesn't need an IAD - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface descriptor - MSC_IFACE_NUM_WITH_CDC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints - 0x08, // bInterfaceClass: MSC Class - 0x06, // bInterfaceSubClass : SCSI transparent - 0x50, // nInterfaceProtocol - 0x00, // iInterface: - - // Endpoint IN descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - MSC_IN_EP, // bEndpointAddress: IN, address 3 - 0x02, // bmAttributes: Bulk endpoint type - LOBYTE(MSC_FS_MAX_PACKET), // wMaxPacketSize - HIBYTE(MSC_FS_MAX_PACKET), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint OUT descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - MSC_OUT_EP, // bEndpointAddress: OUT, address 3 - 0x02, // bmAttributes: Bulk endpoint type - LOBYTE(MSC_FS_MAX_PACKET), // wMaxPacketSize - HIBYTE(MSC_FS_MAX_PACKET), - 0x00, // bInterval: ignore for Bulk transfer - - //========================================================================== - // Interface Association for CDC VCP - 0x08, // bLength: 8 bytes - USB_DESC_TYPE_ASSOCIATION, // bDescriptorType: IAD - CDC_IFACE_NUM_WITH_MSC, // bFirstInterface: first interface for this association - 0x02, // bInterfaceCount: nummber of interfaces for this association - 0x02, // bFunctionClass: Communication Interface Class - 0x02, // bFunctionSubClass: Abstract Control Model - 0x01, // bFunctionProtocol: Common AT commands - 0x00, // iFunction: index of string for this function - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: Interface - CDC_IFACE_NUM_WITH_MSC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x01, // bNumEndpoints: One endpoints used - 0x02, // bInterfaceClass: Communication Interface Class - 0x02, // bInterfaceSubClass: Abstract Control Model - 0x01, // bInterfaceProtocol: Common AT commands - 0x00, // iInterface: - - // Header Functional Descriptor - 0x05, // bLength: Endpoint Descriptor size - 0x24, // bDescriptorType: CS_INTERFACE - 0x00, // bDescriptorSubtype: Header Func Desc - 0x10, // bcdCDC: spec release number - 0x01, // ? - - // Call Management Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x01, // bDescriptorSubtype: Call Management Func Desc - 0x00, // bmCapabilities: D0+D1 - CDC_IFACE_NUM_WITH_MSC + 1, // bDataInterface: 1 - - // ACM Functional Descriptor - 0x04, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x02, // bDescriptorSubtype: Abstract Control Management desc - 0x02, // bmCapabilities - - // Union Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x06, // bDescriptorSubtype: Union func desc - CDC_IFACE_NUM_WITH_MSC + 0, // bMasterInterface: Communication class interface - CDC_IFACE_NUM_WITH_MSC + 1, // bSlaveInterface0: Data Class Interface - - // Endpoint 2 Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_CMD_EP, // bEndpointAddress - 0x03, // bmAttributes: Interrupt - LOBYTE(CDC_CMD_PACKET_SIZE), // wMaxPacketSize: - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x20, // bInterval: polling interval in frames of 1ms - - //-------------------------------------------------------------------------- - // Data class interface descriptor - 0x09, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface - CDC_IFACE_NUM_WITH_MSC + 1, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints: Two endpoints used - 0x0A, // bInterfaceClass: CDC - 0x00, // bInterfaceSubClass: ? - 0x00, // bInterfaceProtocol: ? - 0x00, // iInterface: - - // Endpoint OUT Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_OUT_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint IN Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_IN_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer -}; - -// USB CDC HID device Configuration Descriptor -static const uint8_t cdc_hid_template_config_desc[CDC_HID_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(CDC_HID_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength: no of returned bytes - HIBYTE(CDC_HID_TEMPLATE_CONFIG_DESC_SIZE), - 0x03, // bNumInterfaces: 3 interfaces - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //========================================================================== - // HID only has 1 interface so doesn't need an IAD - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface descriptor - HID_IFACE_NUM_WITH_CDC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints - 0x03, // bInterfaceClass: HID Class - 0x01, // bInterfaceSubClass: 0=no sub class, 1=boot - 0x02, // nInterfaceProtocol: 0=none, 1=keyboard, 2=mouse - 0x00, // iInterface: - - // HID descriptor - 0x09, // bLength: HID Descriptor size - HID_DESCRIPTOR_TYPE, // bDescriptorType: HID - 0x11, // bcdHID: HID Class Spec release number - 0x01, - 0x00, // bCountryCode: Hardware target country - 0x01, // bNumDescriptors: Number of HID class descriptors to follow - 0x22, // bDescriptorType - USBD_HID_MOUSE_REPORT_DESC_SIZE, // wItemLength: Total length of Report descriptor - 0x00, - - // Endpoint IN descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - HID_IN_EP_WITH_CDC, // bEndpointAddress: IN - 0x03, // bmAttributes: Interrupt endpoint type - LOBYTE(USBD_HID_MOUSE_MAX_PACKET), // wMaxPacketSize - HIBYTE(USBD_HID_MOUSE_MAX_PACKET), - 0x08, // bInterval: Polling interval - - // Endpoint OUT descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - HID_OUT_EP_WITH_CDC, // bEndpointAddress: OUT - 0x03, // bmAttributes: Interrupt endpoint type - LOBYTE(USBD_HID_MOUSE_MAX_PACKET), // wMaxPacketSize - HIBYTE(USBD_HID_MOUSE_MAX_PACKET), - 0x08, // bInterval: Polling interval - - //========================================================================== - // Interface Association for CDC VCP - 0x08, // bLength: 8 bytes - USB_DESC_TYPE_ASSOCIATION, // bDescriptorType: IAD - CDC_IFACE_NUM_WITH_HID, // bFirstInterface: first interface for this association - 0x02, // bInterfaceCount: nummber of interfaces for this association - 0x02, // bFunctionClass: Communication Interface Class - 0x02, // bFunctionSubClass: Abstract Control Model - 0x01, // bFunctionProtocol: Common AT commands - 0x00, // iFunction: index of string for this function - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: Interface - CDC_IFACE_NUM_WITH_HID, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x01, // bNumEndpoints: One endpoints used - 0x02, // bInterfaceClass: Communication Interface Class - 0x02, // bInterfaceSubClass: Abstract Control Model - 0x01, // bInterfaceProtocol: Common AT commands - 0x00, // iInterface: - - // Header Functional Descriptor - 0x05, // bLength: Endpoint Descriptor size - 0x24, // bDescriptorType: CS_INTERFACE - 0x00, // bDescriptorSubtype: Header Func Desc - 0x10, // bcdCDC: spec release number - 0x01, // ? - - // Call Management Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x01, // bDescriptorSubtype: Call Management Func Desc - 0x00, // bmCapabilities: D0+D1 - CDC_IFACE_NUM_WITH_HID + 1, // bDataInterface: 1 - - // ACM Functional Descriptor - 0x04, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x02, // bDescriptorSubtype: Abstract Control Management desc - 0x02, // bmCapabilities - - // Union Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x06, // bDescriptorSubtype: Union func desc - CDC_IFACE_NUM_WITH_HID + 0, // bMasterInterface: Communication class interface - CDC_IFACE_NUM_WITH_HID + 1, // bSlaveInterface0: Data Class Interface - - // Endpoint 2 Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_CMD_EP, // bEndpointAddress - 0x03, // bmAttributes: Interrupt - LOBYTE(CDC_CMD_PACKET_SIZE), // wMaxPacketSize: - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x20, // bInterval: polling interval in frames of 1ms - - //-------------------------------------------------------------------------- - // Data class interface descriptor - 0x09, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface - CDC_IFACE_NUM_WITH_HID + 1, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints: Two endpoints used - 0x0A, // bInterfaceClass: CDC - 0x00, // bInterfaceSubClass: ? - 0x00, // bInterfaceProtocol: ? - 0x00, // iInterface: - - // Endpoint OUT Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_OUT_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint IN Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_IN_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer -}; - -static const uint8_t cdc_template_config_desc[CDC_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(CDC_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength:no of returned bytes - HIBYTE(CDC_TEMPLATE_CONFIG_DESC_SIZE), - 0x02, // bNumInterfaces: 2 interface - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: Interface - CDC_IFACE_NUM_ALONE, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x01, // bNumEndpoints: One endpoints used - 0x02, // bInterfaceClass: Communication Interface Class - 0x02, // bInterfaceSubClass: Abstract Control Model - 0x01, // bInterfaceProtocol: Common AT commands - 0x00, // iInterface: - - // Header Functional Descriptor - 0x05, // bLength: Endpoint Descriptor size - 0x24, // bDescriptorType: CS_INTERFACE - 0x00, // bDescriptorSubtype: Header Func Desc - 0x10, // bcdCDC: spec release number - 0x01, // ? - - // Call Management Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x01, // bDescriptorSubtype: Call Management Func Desc - 0x00, // bmCapabilities: D0+D1 - CDC_IFACE_NUM_ALONE + 1, // bDataInterface: 1 - - // ACM Functional Descriptor - 0x04, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x02, // bDescriptorSubtype: Abstract Control Management desc - 0x02, // bmCapabilities - - // Union Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x06, // bDescriptorSubtype: Union func desc - CDC_IFACE_NUM_ALONE + 0, // bMasterInterface: Communication class interface - CDC_IFACE_NUM_ALONE + 1, // bSlaveInterface0: Data Class Interface - - // Endpoint 2 Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_CMD_EP, // bEndpointAddress - 0x03, // bmAttributes: Interrupt - LOBYTE(CDC_CMD_PACKET_SIZE), // wMaxPacketSize: - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x20, // bInterval: polling interval in frames of 1ms - - //-------------------------------------------------------------------------- - // Data class interface descriptor - 0x09, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: - CDC_IFACE_NUM_ALONE + 1, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints: Two endpoints used - 0x0a, // bInterfaceClass: CDC - 0x00, // bInterfaceSubClass: ? - 0x00, // bInterfaceProtocol: ? - 0x00, // iInterface: - - // Endpoint OUT Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_OUT_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint IN Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_IN_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00 // bInterval: ignore for Bulk transfer -}; - -__ALIGN_BEGIN const uint8_t USBD_HID_MOUSE_ReportDesc[USBD_HID_MOUSE_REPORT_DESC_SIZE] __ALIGN_END = { - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x02, // Usage (Mouse), - 0xA1, 0x01, // Collection (Application), - 0x09, 0x01, // Usage (Pointer), - 0xA1, 0x00, // Collection (Physical), - 0x05, 0x09, // Usage Page (Buttons), - 0x19, 0x01, // Usage Minimum (01), - 0x29, 0x03, // Usage Maximum (03), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x95, 0x03, // Report Count (3), - 0x75, 0x01, // Report Size (1), - 0x81, 0x02, // Input(Data, Variable, Absolute), -- 3 button bits - 0x95, 0x01, // Report Count(1), - 0x75, 0x05, // Report Size(5), - 0x81, 0x01, // Input(Constant), -- 5 bit padding - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x30, // Usage (X), - 0x09, 0x31, // Usage (Y), - 0x09, 0x38, // Usage (Wheel), - 0x15, 0x81, // Logical Minimum (-127), - 0x25, 0x7F, // Logical Maximum (127), - 0x75, 0x08, // Report Size (8), - 0x95, 0x03, // Report Count (3), - 0x81, 0x06, // Input(Data, Variable, Relative), -- 3 position bytes (X,Y,Wheel) - 0xC0, // End Collection, - 0x09, 0x3c, // Usage (Motion Wakeup), - 0x05, 0xff, // Usage Page (?), - 0x09, 0x01, // Usage (?), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x75, 0x01, // Report Size(1), - 0x95, 0x02, // Report Count(2), - 0xb1, 0x22, // ? - 0x75, 0x06, // Report Size(6), - 0x95, 0x01, // Report Count(1), - 0xb1, 0x01, // ? - 0xc0 // End Collection -}; - -__ALIGN_BEGIN const uint8_t USBD_HID_KEYBOARD_ReportDesc[USBD_HID_KEYBOARD_REPORT_DESC_SIZE] __ALIGN_END = { - // From p69 of http://www.usb.org/developers/devclass_docs/HID1_11.pdf - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x06, // Usage (Keyboard), - 0xA1, 0x01, // Collection (Application), - 0x05, 0x07, // Usage Page (Key Codes); - 0x19, 0xE0, // Usage Minimum (224), - 0x29, 0xE7, // Usage Maximum (231), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x75, 0x01, // Report Size (1), - 0x95, 0x08, // Report Count (8), - 0x81, 0x02, // Input (Data, Variable, Absolute), ;Modifier byte - 0x95, 0x01, // Report Count (1), - 0x75, 0x08, // Report Size (8), - 0x81, 0x01, // Input (Constant), ;Reserved byte - 0x95, 0x05, // Report Count (5), - 0x75, 0x01, // Report Size (1), - 0x05, 0x08, // Usage Page (Page# for LEDs), - 0x19, 0x01, // Usage Minimum (1), - 0x29, 0x05, // Usage Maximum (5), - 0x91, 0x02, // Output (Data, Variable, Absolute), ;LED report - 0x95, 0x01, // Report Count (1), - 0x75, 0x03, // Report Size (3), - 0x91, 0x01, // Output (Constant), ;LED report padding - 0x95, 0x06, // Report Count (6), - 0x75, 0x08, // Report Size (8), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x65, // Logical Maximum(101), - 0x05, 0x07, // Usage Page (Key Codes), - 0x19, 0x00, // Usage Minimum (0), - 0x29, 0x65, // Usage Maximum (101), - 0x81, 0x00, // Input (Data, Array), ;Key arrays (6 bytes) - 0xC0 // End Collection -}; - -// return the saved usb mode -uint8_t USBD_GetMode(usbd_cdc_msc_hid_state_t *usbd) { - return usbd->usbd_mode; -} - -int USBD_SelectMode(usbd_cdc_msc_hid_state_t *usbd, uint32_t mode, USBD_HID_ModeInfoTypeDef *hid_info) { - // save mode - usbd->usbd_mode = mode; - - // construct config desc - switch (usbd->usbd_mode) { - case USBD_MODE_MSC: - usbd->usbd_config_desc_size = sizeof(msc_template_config_desc); - memcpy(usbd->usbd_config_desc, msc_template_config_desc, sizeof(msc_template_config_desc)); - break; - - case USBD_MODE_CDC_MSC: - usbd->usbd_config_desc_size = sizeof(cdc_msc_template_config_desc); - memcpy(usbd->usbd_config_desc, cdc_msc_template_config_desc, sizeof(cdc_msc_template_config_desc)); - usbd->cdc->iface_num = CDC_IFACE_NUM_WITH_MSC; - break; - - #if MICROPY_HW_USB_ENABLE_CDC2 - case USBD_MODE_CDC2_MSC: { - usbd->usbd_config_desc_size = CDC2_MSC_TEMPLATE_CONFIG_DESC_SIZE; - uint8_t *d = usbd->usbd_config_desc; - memcpy(d, cdc_msc_template_config_desc, sizeof(cdc_msc_template_config_desc)); - d[2] = LOBYTE(CDC2_MSC_TEMPLATE_CONFIG_DESC_SIZE); // wTotalLength - d[3] = HIBYTE(CDC2_MSC_TEMPLATE_CONFIG_DESC_SIZE); - d[4] = 5; // bNumInterfaces - memcpy(d + 9 + 23 + (8 + 58), d + 9 + 23, 8 + 58); - d += 9 + 23 + (8 + 58); - d[2] = CDC2_IFACE_NUM_WITH_MSC; // bFirstInterface - d[10] = CDC2_IFACE_NUM_WITH_MSC; // bInterfaceNumber - d[26] = CDC2_IFACE_NUM_WITH_MSC + 1; // bDataInterface - d[34] = CDC2_IFACE_NUM_WITH_MSC + 0; // bMasterInterface - d[35] = CDC2_IFACE_NUM_WITH_MSC + 1; // bSlaveInterface - d[38] = CDC2_CMD_EP; // bEndpointAddress - d[45] = CDC2_IFACE_NUM_WITH_MSC + 1; // bInterfaceNumber - d[54] = CDC2_OUT_EP; // bEndpointAddress - d[61] = CDC2_IN_EP; // bEndpointAddress - usbd->cdc->iface_num = CDC_IFACE_NUM_WITH_MSC; - usbd->cdc2->iface_num = CDC2_IFACE_NUM_WITH_MSC; - break; - } - #endif - - case USBD_MODE_CDC_HID: - usbd->usbd_config_desc_size = sizeof(cdc_hid_template_config_desc); - memcpy(usbd->usbd_config_desc, cdc_hid_template_config_desc, sizeof(cdc_hid_template_config_desc)); - usbd->cdc->iface_num = CDC_IFACE_NUM_WITH_HID; - usbd->hid->in_ep = HID_IN_EP_WITH_CDC; - usbd->hid->out_ep = HID_OUT_EP_WITH_CDC; - usbd->hid->iface_num = HID_IFACE_NUM_WITH_CDC; - usbd->hid->desc = usbd->usbd_config_desc + CDC_HID_TEMPLATE_HID_DESC_OFFSET; - break; - - case USBD_MODE_CDC: - usbd->usbd_config_desc_size = sizeof(cdc_template_config_desc); - memcpy(usbd->usbd_config_desc, cdc_template_config_desc, sizeof(cdc_template_config_desc)); - usbd->cdc->iface_num = CDC_IFACE_NUM_ALONE; - break; - - /* - // not implemented - case USBD_MODE_MSC_HID: - hid_in_ep = HID_IN_EP_WITH_MSC; - hid_out_ep = HID_OUT_EP_WITH_MSC; - hid_iface_num = HID_IFACE_NUM_WITH_MSC; - break; - */ - - default: - // mode not supported - return -1; - } - - if (usbd->usbd_mode & USBD_MODE_CDC) { - usbd->cdc->in_ep = CDC_IN_EP; - usbd->cdc->out_ep = CDC_OUT_EP; - } - - #if MICROPY_HW_USB_ENABLE_CDC2 - if (usbd->usbd_mode & USBD_MODE_CDC2) { - usbd->cdc2->in_ep = CDC2_IN_EP; - usbd->cdc2->out_ep = CDC2_OUT_EP; - } - #endif - - // configure the HID descriptor, if needed - if (usbd->usbd_mode & USBD_MODE_HID) { - uint8_t *hid_desc = usbd->hid->desc; - hid_desc[HID_DESC_OFFSET_SUBCLASS] = hid_info->subclass; - hid_desc[HID_DESC_OFFSET_PROTOCOL] = hid_info->protocol; - hid_desc[HID_DESC_OFFSET_REPORT_DESC_LEN] = hid_info->report_desc_len; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_LO] = hid_info->max_packet_len; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_HI] = 0; - hid_desc[HID_DESC_OFFSET_POLLING_INTERVAL] = hid_info->polling_interval; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_LO] = hid_info->max_packet_len; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_HI] = 0; - hid_desc[HID_DESC_OFFSET_POLLING_INTERVAL_OUT] = hid_info->polling_interval; - usbd->hid->report_desc = hid_info->report_desc; - } - - return 0; -} - -static void usbd_cdc_state_init(USBD_HandleTypeDef *pdev, usbd_cdc_msc_hid_state_t *usbd, usbd_cdc_state_t *cdc, uint8_t cmd_ep) { - int mp = usbd_cdc_max_packet(pdev); - - // Open endpoints - USBD_LL_OpenEP(pdev, cdc->in_ep, USBD_EP_TYPE_BULK, mp); - USBD_LL_OpenEP(pdev, cdc->out_ep, USBD_EP_TYPE_BULK, mp); - USBD_LL_OpenEP(pdev, cmd_ep, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE); - - // Init state - cdc->usbd = usbd; - cdc->cur_request = 0xff; - cdc->tx_in_progress = 0; - - // Init interface - uint8_t *buf = usbd_cdc_init(cdc); - - // Prepare Out endpoint to receive next packet - USBD_LL_PrepareReceive(pdev, cdc->out_ep, buf, mp); -} - -static uint8_t USBD_CDC_MSC_HID_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { - #if !USBD_SUPPORT_HS_MODE - if (pdev->dev_speed == USBD_SPEED_HIGH) { - // can't handle high speed - return 1; - } - #endif - - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - if (usbd->usbd_mode & USBD_MODE_CDC) { - // CDC VCP component - usbd_cdc_state_init(pdev, usbd, usbd->cdc, CDC_CMD_EP); - } - - #if MICROPY_HW_USB_ENABLE_CDC2 - if (usbd->usbd_mode & USBD_MODE_CDC2) { - // CDC VCP #2 component - usbd_cdc_state_init(pdev, usbd, usbd->cdc2, CDC2_CMD_EP); - } - #endif - - if (usbd->usbd_mode & USBD_MODE_MSC) { - // MSC component - - int mp = usbd_msc_max_packet(pdev); - - // Open EP OUT - USBD_LL_OpenEP(pdev, - MSC_OUT_EP, - USBD_EP_TYPE_BULK, - mp); - - // Open EP IN - USBD_LL_OpenEP(pdev, - MSC_IN_EP, - USBD_EP_TYPE_BULK, - mp); - - // Init the BOT layer - MSC_BOT_Init(pdev); - } - - if (usbd->usbd_mode & USBD_MODE_HID) { - // HID component - - // get max packet lengths from descriptor - uint16_t mps_in = - usbd->hid->desc[HID_DESC_OFFSET_MAX_PACKET_LO] - | (usbd->hid->desc[HID_DESC_OFFSET_MAX_PACKET_HI] << 8); - uint16_t mps_out = - usbd->hid->desc[HID_DESC_OFFSET_MAX_PACKET_OUT_LO] - | (usbd->hid->desc[HID_DESC_OFFSET_MAX_PACKET_OUT_HI] << 8); - - // Open EP IN - USBD_LL_OpenEP(pdev, usbd->hid->in_ep, USBD_EP_TYPE_INTR, mps_in); - - // Open EP OUT - USBD_LL_OpenEP(pdev, usbd->hid->out_ep, USBD_EP_TYPE_INTR, mps_out); - - - usbd->hid->usbd = usbd; - uint8_t *buf = usbd_hid_init(usbd->hid); - - // Prepare Out endpoint to receive next packet - USBD_LL_PrepareReceive(pdev, usbd->hid->out_ep, buf, mps_out); - - usbd->hid->state = HID_IDLE; - } - - return 0; -} - -static uint8_t USBD_CDC_MSC_HID_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - if ((usbd->usbd_mode & USBD_MODE_CDC) && usbd->cdc) { - // CDC VCP component - - // close endpoints - USBD_LL_CloseEP(pdev, CDC_IN_EP); - USBD_LL_CloseEP(pdev, CDC_OUT_EP); - USBD_LL_CloseEP(pdev, CDC_CMD_EP); - } - - #if MICROPY_HW_USB_ENABLE_CDC2 - if ((usbd->usbd_mode & USBD_MODE_CDC2) && usbd->cdc2) { - // CDC VCP #2 component - - // close endpoints - USBD_LL_CloseEP(pdev, CDC2_IN_EP); - USBD_LL_CloseEP(pdev, CDC2_OUT_EP); - USBD_LL_CloseEP(pdev, CDC2_CMD_EP); - } - #endif - - if (usbd->usbd_mode & USBD_MODE_MSC) { - // MSC component - - // close endpoints - USBD_LL_CloseEP(pdev, MSC_OUT_EP); - USBD_LL_CloseEP(pdev, MSC_IN_EP); - - // DeInit the BOT layer - MSC_BOT_DeInit(pdev); - } - - if (usbd->usbd_mode & USBD_MODE_HID) { - // HID component - - // close endpoints - USBD_LL_CloseEP(pdev, usbd->hid->in_ep); - USBD_LL_CloseEP(pdev, usbd->hid->out_ep); - } - - return 0; -} - -static uint8_t USBD_CDC_MSC_HID_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { - - /* - printf("SU: %x %x %x %x\n", req->bmRequest, req->bRequest, req->wValue, req->wIndex); - - This is what we get when MSC is IFACE=0 and CDC is IFACE=1,2: - SU: 21 22 0 1 -- USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; CDC_SET_CONTROL_LINE_STATE - SU: 21 20 0 1 -- USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; CDC_SET_LINE_CODING - SU: a1 fe 0 0 -- 0x80 | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; BOT_GET_MAX_LUN; 0; 0 - SU: 21 22 3 1 -- USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; CDC_SET_CONTROL_LINE_STATE - - On a Mac OS X, with MSC then CDC: - SU: a1 fe 0 0 - SU: 21 22 2 1 - SU: 21 22 3 1 - SU: 21 20 0 1 - */ - - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - // Work out the recipient of the setup request - uint8_t mode = usbd->usbd_mode; - uint8_t recipient = 0; - usbd_cdc_state_t *cdc = NULL; - switch (req->bmRequest & USB_REQ_RECIPIENT_MASK) { - case USB_REQ_RECIPIENT_INTERFACE: { - uint16_t iface = req->wIndex; - if ((mode & USBD_MODE_CDC) && iface == usbd->cdc->iface_num) { - recipient = USBD_MODE_CDC; - cdc = usbd->cdc; - #if MICROPY_HW_USB_ENABLE_CDC2 - } else if ((mode & USBD_MODE_CDC2) && iface == usbd->cdc2->iface_num) { - recipient = USBD_MODE_CDC; - cdc = usbd->cdc2; - #endif - } else if ((mode & USBD_MODE_MSC) && iface == MSC_IFACE_NUM_WITH_CDC) { - recipient = USBD_MODE_MSC; - } else if ((mode & USBD_MODE_HID) && iface == usbd->hid->iface_num) { - recipient = USBD_MODE_HID; - } - break; - } - case USB_REQ_RECIPIENT_ENDPOINT: { - uint8_t ep = req->wIndex & 0x7f; - if ((mode & USBD_MODE_CDC) && (ep == CDC_OUT_EP || ep == (CDC_CMD_EP & 0x7f))) { - recipient = USBD_MODE_CDC; - cdc = usbd->cdc; - #if MICROPY_HW_USB_ENABLE_CDC2 - } else if ((mode & USBD_MODE_CDC2) && (ep == CDC2_OUT_EP || ep == (CDC2_CMD_EP & 0x7f))) { - recipient = USBD_MODE_CDC; - cdc = usbd->cdc2; - #endif - } else if ((mode & USBD_MODE_MSC) && ep == MSC_OUT_EP) { - recipient = USBD_MODE_MSC; - } else if ((mode & USBD_MODE_HID) && ep == usbd->hid->out_ep) { - recipient = USBD_MODE_HID; - } - break; - } - } - - // Fail the request if we didn't have a valid recipient - if (recipient == 0) { - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - - switch (req->bmRequest & USB_REQ_TYPE_MASK) { - - // Class request - case USB_REQ_TYPE_CLASS: - if (recipient == USBD_MODE_CDC) { - if (req->wLength) { - if (req->bmRequest & 0x80) { - // device-to-host request - usbd_cdc_control(cdc, req->bRequest, (uint8_t*)cdc->ctl_packet_buf, req->wLength); - USBD_CtlSendData(pdev, (uint8_t*)cdc->ctl_packet_buf, req->wLength); - } else { - // host-to-device request - cdc->cur_request = req->bRequest; - cdc->cur_length = req->wLength; - USBD_CtlPrepareRx(pdev, (uint8_t*)cdc->ctl_packet_buf, req->wLength); - } - } else { - // Not a Data request - // Transfer the command to the interface layer - return usbd_cdc_control(cdc, req->bRequest, NULL, req->wValue); - } - } else if (recipient == USBD_MODE_MSC) { - switch (req->bRequest) { - case BOT_GET_MAX_LUN: - if ((req->wValue == 0) && (req->wLength == 1) && ((req->bmRequest & 0x80) == 0x80)) { - usbd->MSC_BOT_ClassData.max_lun = usbd->MSC_BOT_ClassData.bdev_ops->GetMaxLun(); - USBD_CtlSendData(pdev, (uint8_t *)&usbd->MSC_BOT_ClassData.max_lun, 1); - } else { - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - break; - - case BOT_RESET: - if ((req->wValue == 0) && (req->wLength == 0) && ((req->bmRequest & 0x80) != 0x80)) { - MSC_BOT_Reset(pdev); - } else { - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - break; - - default: - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - } else if (recipient == USBD_MODE_HID) { - switch (req->bRequest) { - case HID_REQ_SET_PROTOCOL: - usbd->hid->ctl_protocol = (uint8_t)(req->wValue); - break; - - case HID_REQ_GET_PROTOCOL: - USBD_CtlSendData(pdev, &usbd->hid->ctl_protocol, 1); - break; - - case HID_REQ_SET_IDLE: - usbd->hid->ctl_idle_state = (uint8_t)(req->wValue >> 8); - break; - - case HID_REQ_GET_IDLE: - USBD_CtlSendData(pdev, &usbd->hid->ctl_idle_state, 1); - break; - - default: - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - } - break; - - case USB_REQ_TYPE_STANDARD: - if (recipient == USBD_MODE_MSC) { - switch (req->bRequest) { - case USB_REQ_GET_INTERFACE : - USBD_CtlSendData(pdev, (uint8_t *)&usbd->MSC_BOT_ClassData.interface, 1); - break; - - case USB_REQ_SET_INTERFACE : - usbd->MSC_BOT_ClassData.interface = (uint8_t)(req->wValue); - break; - - case USB_REQ_CLEAR_FEATURE: - // Flush the FIFO and Clear the stall status - USBD_LL_FlushEP(pdev, (uint8_t)req->wIndex); - - // Re-activate the EP - USBD_LL_CloseEP(pdev, (uint8_t)req->wIndex); - if((((uint8_t)req->wIndex) & 0x80) == 0x80) { - // Open EP IN - USBD_LL_OpenEP(pdev, MSC_IN_EP, USBD_EP_TYPE_BULK, usbd_msc_max_packet(pdev)); - } else { - // Open EP OUT - USBD_LL_OpenEP(pdev, MSC_OUT_EP, USBD_EP_TYPE_BULK, usbd_msc_max_packet(pdev)); - } - // Handle BOT error - MSC_BOT_CplClrFeature(pdev, (uint8_t)req->wIndex); - break; - } - } else if (recipient == USBD_MODE_HID) { - switch (req->bRequest) { - case USB_REQ_GET_DESCRIPTOR: { - uint16_t len = 0; - const uint8_t *pbuf = NULL; - if (req->wValue >> 8 == HID_REPORT_DESC) { - len = usbd->hid->desc[HID_DESC_OFFSET_REPORT_DESC_LEN]; - len = MIN(len, req->wLength); - pbuf = usbd->hid->report_desc; - } else if (req->wValue >> 8 == HID_DESCRIPTOR_TYPE) { - len = MIN(HID_SUBDESC_LEN, req->wLength); - pbuf = usbd->hid->desc + HID_DESC_OFFSET_SUBDESC; - } - USBD_CtlSendData(pdev, (uint8_t*)pbuf, len); - break; - } - - case USB_REQ_GET_INTERFACE: - USBD_CtlSendData(pdev, &usbd->hid->ctl_alt_setting, 1); - break; - - case USB_REQ_SET_INTERFACE: - usbd->hid->ctl_alt_setting = (uint8_t)(req->wValue); - break; - } - } - break; - } - return USBD_OK; -} - -/* unused -static uint8_t EP0_TxSent(USBD_HandleTypeDef *pdev) { -} -*/ - -static uint8_t USBD_CDC_MSC_HID_EP0_RxReady(USBD_HandleTypeDef *pdev) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - if (usbd->cdc != NULL && usbd->cdc->cur_request != 0xff) { - usbd_cdc_control(usbd->cdc, usbd->cdc->cur_request, (uint8_t*)usbd->cdc->ctl_packet_buf, usbd->cdc->cur_length); - usbd->cdc->cur_request = 0xff; - } - #if MICROPY_HW_USB_ENABLE_CDC2 - if (usbd->cdc2 != NULL && usbd->cdc2->cur_request != 0xff) { - usbd_cdc_control(usbd->cdc2, usbd->cdc2->cur_request, (uint8_t*)usbd->cdc2->ctl_packet_buf, usbd->cdc2->cur_length); - usbd->cdc2->cur_request = 0xff; - } - #endif - - return USBD_OK; -} - -static uint8_t USBD_CDC_MSC_HID_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - if ((usbd->usbd_mode & USBD_MODE_CDC) && (epnum == (CDC_IN_EP & 0x7f) || epnum == (CDC_CMD_EP & 0x7f))) { - usbd->cdc->tx_in_progress = 0; - return USBD_OK; - #if MICROPY_HW_USB_ENABLE_CDC2 - } else if ((usbd->usbd_mode & USBD_MODE_CDC2) && (epnum == (CDC2_IN_EP & 0x7f) || epnum == (CDC2_CMD_EP & 0x7f))) { - usbd->cdc2->tx_in_progress = 0; - return USBD_OK; - #endif - } else if ((usbd->usbd_mode & USBD_MODE_MSC) && epnum == (MSC_IN_EP & 0x7f)) { - MSC_BOT_DataIn(pdev, epnum); - return USBD_OK; - } else if ((usbd->usbd_mode & USBD_MODE_HID) && epnum == (usbd->hid->in_ep & 0x7f)) { - /* Ensure that the FIFO is empty before a new transfer, this condition could - be caused by a new transfer before the end of the previous transfer */ - usbd->hid->state = HID_IDLE; - return USBD_OK; - } - - return USBD_OK; -} - -static uint8_t USBD_CDC_MSC_HID_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - if ((usbd->usbd_mode & USBD_MODE_CDC) && epnum == (CDC_OUT_EP & 0x7f)) { - /* Get the received data length */ - size_t len = USBD_LL_GetRxDataSize (pdev, epnum); - - /* USB data will be immediately processed, this allow next USB traffic being - NAKed till the end of the application Xfer */ - usbd_cdc_receive(usbd->cdc, len); - - return USBD_OK; - #if MICROPY_HW_USB_ENABLE_CDC2 - } else if ((usbd->usbd_mode & USBD_MODE_CDC2) && epnum == (CDC2_OUT_EP & 0x7f)) { - size_t len = USBD_LL_GetRxDataSize(pdev, epnum); - usbd_cdc_receive(usbd->cdc2, len); - return USBD_OK; - #endif - } else if ((usbd->usbd_mode & USBD_MODE_MSC) && epnum == (MSC_OUT_EP & 0x7f)) { - MSC_BOT_DataOut(pdev, epnum); - return USBD_OK; - } else if ((usbd->usbd_mode & USBD_MODE_HID) && epnum == (usbd->hid->out_ep & 0x7f)) { - size_t len = USBD_LL_GetRxDataSize(pdev, epnum); - usbd_hid_receive(usbd->hid, len); - } - - return USBD_OK; -} - -#if USBD_SUPPORT_HS_MODE -static void usbd_cdc_desc_config_max_packet(USBD_HandleTypeDef *pdev, uint8_t *cdc_desc) { - uint32_t mp = usbd_cdc_max_packet(pdev); - cdc_desc[CDC_DESC_OFFSET_OUT_MAX_PACKET_LO] = LOBYTE(mp); - cdc_desc[CDC_DESC_OFFSET_OUT_MAX_PACKET_HI] = HIBYTE(mp); - cdc_desc[CDC_DESC_OFFSET_IN_MAX_PACKET_LO] = LOBYTE(mp); - cdc_desc[CDC_DESC_OFFSET_IN_MAX_PACKET_HI] = HIBYTE(mp); - uint8_t interval; // polling interval in frames of 1ms - if (pdev->dev_speed == USBD_SPEED_HIGH) { - interval = 0x09; - } else { - interval = 0x20; - } - cdc_desc[CDC_DESC_OFFSET_INTR_INTERVAL] = interval; -} -#endif - -static uint8_t *USBD_CDC_MSC_HID_GetCfgDesc(USBD_HandleTypeDef *pdev, uint16_t *length) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - #if USBD_SUPPORT_HS_MODE - uint8_t *cdc_desc = NULL; - #if MICROPY_HW_USB_ENABLE_CDC2 - uint8_t *cdc2_desc = NULL; - #endif - uint8_t *msc_desc = NULL; - switch (usbd->usbd_mode) { - case USBD_MODE_MSC: - msc_desc = usbd->usbd_config_desc + MSC_TEMPLATE_MSC_DESC_OFFSET; - break; - - case USBD_MODE_CDC_MSC: - cdc_desc = usbd->usbd_config_desc + CDC_MSC_TEMPLATE_CDC_DESC_OFFSET; - msc_desc = usbd->usbd_config_desc + CDC_MSC_TEMPLATE_MSC_DESC_OFFSET; - break; - - #if MICROPY_HW_USB_ENABLE_CDC2 - case USBD_MODE_CDC2_MSC: - cdc_desc = usbd->usbd_config_desc + CDC2_MSC_TEMPLATE_CDC_DESC_OFFSET; - cdc2_desc = usbd->usbd_config_desc + CDC2_MSC_TEMPLATE_CDC2_DESC_OFFSET; - msc_desc = usbd->usbd_config_desc + CDC2_MSC_TEMPLATE_MSC_DESC_OFFSET; - break; - #endif - - case USBD_MODE_CDC_HID: - cdc_desc = usbd->usbd_config_desc + CDC_HID_TEMPLATE_CDC_DESC_OFFSET; - break; - - case USBD_MODE_CDC: - cdc_desc = usbd->usbd_config_desc + CDC_TEMPLATE_CDC_DESC_OFFSET; - break; - } - - // configure CDC descriptors, if needed - if (cdc_desc != NULL) { - usbd_cdc_desc_config_max_packet(pdev, cdc_desc); - } - - #if MICROPY_HW_USB_ENABLE_CDC2 - if (cdc2_desc != NULL) { - usbd_cdc_desc_config_max_packet(pdev, cdc2_desc); - } - #endif - - if (msc_desc != NULL) { - uint32_t mp = usbd_msc_max_packet(pdev); - msc_desc[13] = LOBYTE(mp); - msc_desc[14] = HIBYTE(mp); - msc_desc[20] = LOBYTE(mp); - msc_desc[21] = HIBYTE(mp); - } - #endif - - *length = usbd->usbd_config_desc_size; - return usbd->usbd_config_desc; -} - -uint8_t *USBD_CDC_MSC_HID_GetDeviceQualifierDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - #if USBD_SUPPORT_HS_MODE - *length = sizeof(USBD_CDC_MSC_HID_DeviceQualifierDesc); - return USBD_CDC_MSC_HID_DeviceQualifierDesc; - #else - *length = 0; - return NULL; - #endif -} - -// data received on non-control OUT endpoint -uint8_t USBD_CDC_TransmitPacket(usbd_cdc_state_t *cdc, size_t len, const uint8_t *buf) { - if (cdc->tx_in_progress == 0) { - // transmit next packet - USBD_LL_Transmit(cdc->usbd->pdev, cdc->in_ep, (uint8_t*)buf, len); - - // Tx transfer in progress - cdc->tx_in_progress = 1; - return USBD_OK; - } else { - return USBD_BUSY; - } -} - -// prepare OUT endpoint for reception -uint8_t USBD_CDC_ReceivePacket(usbd_cdc_state_t *cdc, uint8_t *buf) { - // Suspend or Resume USB Out process - - #if !USBD_SUPPORT_HS_MODE - if (cdc->usbd->pdev->dev_speed == USBD_SPEED_HIGH) { - return USBD_FAIL; - } - #endif - - // Prepare Out endpoint to receive next packet - USBD_LL_PrepareReceive(cdc->usbd->pdev, cdc->out_ep, buf, usbd_cdc_max_packet(cdc->usbd->pdev)); - - return USBD_OK; -} - -// prepare OUT endpoint for reception -uint8_t USBD_HID_ReceivePacket(usbd_hid_state_t *hid, uint8_t *buf) { - // Suspend or Resume USB Out process - - #if !USBD_SUPPORT_HS_MODE - if (hid->usbd->pdev->dev_speed == USBD_SPEED_HIGH) { - return USBD_FAIL; - } - #endif - - // Prepare Out endpoint to receive next packet - uint16_t mps_out = - hid->desc[HID_DESC_OFFSET_MAX_PACKET_OUT_LO] - | (hid->desc[HID_DESC_OFFSET_MAX_PACKET_OUT_HI] << 8); - USBD_LL_PrepareReceive(hid->usbd->pdev, hid->out_ep, buf, mps_out); - - return USBD_OK; -} - -int USBD_HID_CanSendReport(usbd_hid_state_t *hid) { - return hid->usbd->pdev->dev_state == USBD_STATE_CONFIGURED && hid->state == HID_IDLE; -} - -uint8_t USBD_HID_SendReport(usbd_hid_state_t *hid, uint8_t *report, uint16_t len) { - if (hid->usbd->pdev->dev_state == USBD_STATE_CONFIGURED) { - if (hid->state == HID_IDLE) { - hid->state = HID_BUSY; - USBD_LL_Transmit(hid->usbd->pdev, hid->in_ep, report, len); - return USBD_OK; - } - } - return USBD_FAIL; -} - -uint8_t USBD_HID_SetNAK(usbd_hid_state_t *hid) { - // get USBx object from pdev (needed for USBx_OUTEP macro below) - PCD_HandleTypeDef *hpcd = hid->usbd->pdev->pData; - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - // set NAK on HID OUT endpoint - USBx_OUTEP(HID_OUT_EP_WITH_CDC)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; - return USBD_OK; -} - -uint8_t USBD_HID_ClearNAK(usbd_hid_state_t *hid) { - // get USBx object from pdev (needed for USBx_OUTEP macro below) - PCD_HandleTypeDef *hpcd = hid->usbd->pdev->pData; - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - // clear NAK on HID OUT endpoint - USBx_OUTEP(HID_OUT_EP_WITH_CDC)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; - return USBD_OK; -} - -// CDC/MSC/HID interface class callback structure -const USBD_ClassTypeDef USBD_CDC_MSC_HID = { - USBD_CDC_MSC_HID_Init, - USBD_CDC_MSC_HID_DeInit, - USBD_CDC_MSC_HID_Setup, - NULL, // EP0_TxSent - USBD_CDC_MSC_HID_EP0_RxReady, - USBD_CDC_MSC_HID_DataIn, - USBD_CDC_MSC_HID_DataOut, - NULL, // SOF - NULL, // IsoINIncomplete - NULL, // IsoOUTIncomplete - USBD_CDC_MSC_HID_GetCfgDesc, - USBD_CDC_MSC_HID_GetCfgDesc, - USBD_CDC_MSC_HID_GetCfgDesc, - USBD_CDC_MSC_HID_GetDeviceQualifierDescriptor, -}; - -#endif diff --git a/ports/stm32/usbdev/class/src/usbd_msc_bot.c b/ports/stm32/usbdev/class/src/usbd_msc_bot.c deleted file mode 100644 index d20f7a8dc0..0000000000 --- a/ports/stm32/usbdev/class/src/usbd_msc_bot.c +++ /dev/null @@ -1,407 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_bot.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the BOT protocol core functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_msc_bot.h" -#include "usbd_msc_scsi.h" -#include "usbd_cdc_msc_hid.h" -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup MSC_BOT - * @brief BOT protocol module - * @{ - */ - -/** @defgroup MSC_BOT_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_FunctionPrototypes - * @{ - */ -static void MSC_BOT_CBW_Decode (USBD_HandleTypeDef *pdev); - -static void MSC_BOT_SendData (USBD_HandleTypeDef *pdev, - uint8_t* pbuf, - uint16_t len); - -static void MSC_BOT_Abort(USBD_HandleTypeDef *pdev); -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Functions - * @{ - */ - - - -/** -* @brief MSC_BOT_Init -* Initialize the BOT Process -* @param pdev: device instance -* @retval None -*/ -void MSC_BOT_Init (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->bot_state = USBD_BOT_IDLE; - hmsc->bot_status = USBD_BOT_STATUS_NORMAL; - - hmsc->scsi_sense_tail = 0; - hmsc->scsi_sense_head = 0; - - hmsc->bdev_ops->Init(0); - - USBD_LL_FlushEP(pdev, MSC_OUT_EP); - USBD_LL_FlushEP(pdev, MSC_IN_EP); - - /* Prapare EP to Receive First BOT Cmd */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); -} - -/** -* @brief MSC_BOT_Reset -* Reset the BOT Machine -* @param pdev: device instance -* @retval None -*/ -void MSC_BOT_Reset (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->bot_state = USBD_BOT_IDLE; - hmsc->bot_status = USBD_BOT_STATUS_RECOVERY; - - /* Prapare EP to Receive First BOT Cmd */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); -} - -/** -* @brief MSC_BOT_DeInit -* Uninitialize the BOT Machine -* @param pdev: device instance -* @retval None -*/ -void MSC_BOT_DeInit (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_state = USBD_BOT_IDLE; -} - -/** -* @brief MSC_BOT_DataIn -* Handle BOT IN data stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval None -*/ -void MSC_BOT_DataIn (USBD_HandleTypeDef *pdev, - uint8_t epnum) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - switch (hmsc->bot_state) - { - case USBD_BOT_DATA_IN: - if(SCSI_ProcessCmd(pdev, - hmsc->cbw.bLUN, - &hmsc->cbw.CB[0]) < 0) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_FAILED); - } - break; - - case USBD_BOT_SEND_DATA: - case USBD_BOT_LAST_DATA_IN: - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_PASSED); - - break; - - default: - break; - } -} -/** -* @brief MSC_BOT_DataOut -* Proccess MSC OUT data -* @param pdev: device instance -* @param epnum: endpoint index -* @retval None -*/ -void MSC_BOT_DataOut (USBD_HandleTypeDef *pdev, - uint8_t epnum) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - switch (hmsc->bot_state) - { - case USBD_BOT_IDLE: - MSC_BOT_CBW_Decode(pdev); - break; - - case USBD_BOT_DATA_OUT: - - if(SCSI_ProcessCmd(pdev, - hmsc->cbw.bLUN, - &hmsc->cbw.CB[0]) < 0) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_FAILED); - } - - break; - - default: - break; - } -} - -/** -* @brief MSC_BOT_CBW_Decode -* Decode the CBW command and set the BOT state machine accordingtly -* @param pdev: device instance -* @retval None -*/ -static void MSC_BOT_CBW_Decode (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->csw.dTag = hmsc->cbw.dTag; - hmsc->csw.dDataResidue = hmsc->cbw.dDataLength; - - if ((USBD_LL_GetRxDataSize (pdev ,MSC_OUT_EP) != USBD_BOT_CBW_LENGTH) || - (hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE)|| - (hmsc->cbw.bLUN > 1) || - (hmsc->cbw.bCBLength < 1) || - (hmsc->cbw.bCBLength > 16)) - { - - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - - hmsc->bot_status = USBD_BOT_STATUS_ERROR; - MSC_BOT_Abort(pdev); - - } - else - { - if(SCSI_ProcessCmd(pdev, - hmsc->cbw.bLUN, - &hmsc->cbw.CB[0]) < 0) - { - if(hmsc->bot_state == USBD_BOT_NO_DATA) - { - MSC_BOT_SendCSW (pdev, - USBD_CSW_CMD_FAILED); - } - else - { - MSC_BOT_Abort(pdev); - } - } - /*Burst xfer handled internally*/ - else if ((hmsc->bot_state != USBD_BOT_DATA_IN) && - (hmsc->bot_state != USBD_BOT_DATA_OUT) && - (hmsc->bot_state != USBD_BOT_LAST_DATA_IN)) - { - if (hmsc->bot_data_length > 0) - { - MSC_BOT_SendData(pdev, - hmsc->bot_data, - hmsc->bot_data_length); - } - else if (hmsc->bot_data_length == 0) - { - MSC_BOT_SendCSW (pdev, - USBD_CSW_CMD_PASSED); - } - } - } -} - -/** -* @brief MSC_BOT_SendData -* Send the requested data -* @param pdev: device instance -* @param buf: pointer to data buffer -* @param len: Data Length -* @retval None -*/ -static void MSC_BOT_SendData(USBD_HandleTypeDef *pdev, - uint8_t* buf, - uint16_t len) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - len = MIN (hmsc->cbw.dDataLength, len); - hmsc->csw.dDataResidue -= len; - hmsc->csw.bStatus = USBD_CSW_CMD_PASSED; - hmsc->bot_state = USBD_BOT_SEND_DATA; - - USBD_LL_Transmit (pdev, MSC_IN_EP, buf, len); -} - -/** -* @brief MSC_BOT_SendCSW -* Send the Command Status Wrapper -* @param pdev: device instance -* @param status : CSW status -* @retval None -*/ -void MSC_BOT_SendCSW (USBD_HandleTypeDef *pdev, - uint8_t CSW_Status) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->csw.dSignature = USBD_BOT_CSW_SIGNATURE; - hmsc->csw.bStatus = CSW_Status; - hmsc->bot_state = USBD_BOT_IDLE; - - USBD_LL_Transmit (pdev, - MSC_IN_EP, - (uint8_t *)&hmsc->csw, - USBD_BOT_CSW_LENGTH); - - /* Prapare EP to Receive next Cmd */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); - -} - -/** -* @brief MSC_BOT_Abort -* Abort the current transfer -* @param pdev: device instance -* @retval status -*/ - -static void MSC_BOT_Abort (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if ((hmsc->cbw.bmFlags == 0) && - (hmsc->cbw.dDataLength != 0) && - (hmsc->bot_status == USBD_BOT_STATUS_NORMAL) ) - { - USBD_LL_StallEP(pdev, MSC_OUT_EP ); - } - USBD_LL_StallEP(pdev, MSC_IN_EP); - - if(hmsc->bot_status == USBD_BOT_STATUS_ERROR) - { - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); - } -} - -/** -* @brief MSC_BOT_CplClrFeature -* Complete the clear feature request -* @param pdev: device instance -* @param epnum: endpoint index -* @retval None -*/ - -void MSC_BOT_CplClrFeature (USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if(hmsc->bot_status == USBD_BOT_STATUS_ERROR )/* Bad CBW Signature */ - { - USBD_LL_StallEP(pdev, MSC_IN_EP); - hmsc->bot_status = USBD_BOT_STATUS_NORMAL; - } - else if(((epnum & 0x80) == 0x80) && ( hmsc->bot_status != USBD_BOT_STATUS_RECOVERY)) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_FAILED); - } - -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/class/src/usbd_msc_data.c b/ports/stm32/usbdev/class/src/usbd_msc_data.c deleted file mode 100644 index 96740a3a4f..0000000000 --- a/ports/stm32/usbdev/class/src/usbd_msc_data.c +++ /dev/null @@ -1,134 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_data.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the vital inquiry pages and sense data. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_msc_data.h" - - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup MSC_DATA - * @brief Mass storage info/data module - * @{ - */ - -/** @defgroup MSC_DATA_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Variables - * @{ - */ - - -/* USB Mass storage Page 0 Inquiry Data */ -const uint8_t MSC_Page00_Inquiry_Data[] = {//7 - 0x00, - 0x00, - 0x00, - (LENGTH_INQUIRY_PAGE00 - 4), - 0x00, - 0x80, - 0x83 -}; -/* USB Mass storage sense 6 Data */ -const uint8_t MSC_Mode_Sense6_data[] = { - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; -/* USB Mass storage sense 10 Data */ -const uint8_t MSC_Mode_Sense10_data[] = { - 0x00, - 0x06, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Functions - * @{ - */ - -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/class/src/usbd_msc_scsi.c b/ports/stm32/usbdev/class/src/usbd_msc_scsi.c deleted file mode 100644 index 9da9033771..0000000000 --- a/ports/stm32/usbdev/class/src/usbd_msc_scsi.c +++ /dev/null @@ -1,811 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_scsi.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the USBD SCSI layer functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_msc_bot.h" -#include "usbd_msc_scsi.h" -#include "usbd_msc_data.h" -#include "usbd_cdc_msc_hid.h" - - - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup MSC_SCSI - * @brief Mass storage SCSI layer module - * @{ - */ - -/** @defgroup MSC_SCSI_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_FunctionPrototypes - * @{ - */ -static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_RequestSense (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_AllowMediumRemoval(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ModeSense6 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ModeSense10 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_SynchronizeCache(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_Write10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params); -static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params); -static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_CheckAddressRange (USBD_HandleTypeDef *pdev, - uint8_t lun , - uint32_t blk_offset , - uint16_t blk_nbr); -static int8_t SCSI_ProcessRead (USBD_HandleTypeDef *pdev, - uint8_t lun); - -static int8_t SCSI_ProcessWrite (USBD_HandleTypeDef *pdev, - uint8_t lun); -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Functions - * @{ - */ - - -/** -* @brief SCSI_ProcessCmd -* Process SCSI commands -* @param pdev: device instance -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, - uint8_t lun, - uint8_t *params) -{ - /* - if (params[0] != SCSI_READ10 && params[0] != SCSI_WRITE10) { - printf("SCSI_ProcessCmd(lun=%d, params=%x, %x)\n", lun, params[0], params[1]); - } - */ - - switch (params[0]) - { - case SCSI_TEST_UNIT_READY: - return SCSI_TestUnitReady(pdev, lun, params); - - case SCSI_REQUEST_SENSE: - return SCSI_RequestSense (pdev, lun, params); - case SCSI_INQUIRY: - return SCSI_Inquiry(pdev, lun, params); - - case SCSI_START_STOP_UNIT: - return SCSI_StartStopUnit(pdev, lun, params); - - case SCSI_ALLOW_MEDIUM_REMOVAL: - return SCSI_AllowMediumRemoval(pdev, lun, params); - - case SCSI_MODE_SENSE6: - return SCSI_ModeSense6 (pdev, lun, params); - - case SCSI_MODE_SENSE10: - return SCSI_ModeSense10 (pdev, lun, params); - - case SCSI_SYNCHRONIZE_CACHE10: - case SCSI_SYNCHRONIZE_CACHE16: - return SCSI_SynchronizeCache(pdev, lun, params); - - case SCSI_READ_FORMAT_CAPACITIES: - return SCSI_ReadFormatCapacity(pdev, lun, params); - - case SCSI_READ_CAPACITY10: - return SCSI_ReadCapacity10(pdev, lun, params); - - case SCSI_READ10: - return SCSI_Read10(pdev, lun, params); - - case SCSI_WRITE10: - return SCSI_Write10(pdev, lun, params); - - case SCSI_VERIFY10: - return SCSI_Verify10(pdev, lun, params); - - default: - SCSI_SenseCode(pdev, - lun, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } -} - - -/** -* @brief SCSI_TestUnitReady -* Process SCSI Test Unit Ready Command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - /* case 9 : Hi > D0 */ - if (hmsc->cbw.dDataLength != 0) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - if(hmsc->bdev_ops->IsReady(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - - hmsc->bot_state = USBD_BOT_NO_DATA; - return -1; - } - hmsc->bot_data_length = 0; - return 0; -} - -/** -* @brief SCSI_Inquiry -* Process Inquiry command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - uint8_t* pPage; - uint16_t len; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if (params[1] & 0x01)/*Evpd is set*/ - { - pPage = (uint8_t *)MSC_Page00_Inquiry_Data; - len = LENGTH_INQUIRY_PAGE00; - } - else - { - - pPage = (uint8_t *)&hmsc->bdev_ops->pInquiry[lun * STANDARD_INQUIRY_DATA_LEN]; - len = pPage[4] + 5; - - if (params[4] <= len) - { - len = params[4]; - } - } - hmsc->bot_data_length = len; - - while (len) - { - len--; - hmsc->bot_data[len] = pPage[len]; - } - return 0; -} - -/** -* @brief SCSI_ReadCapacity10 -* Process Read Capacity 10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if(hmsc->bdev_ops->GetCapacity(lun, &hmsc->scsi_blk_nbr, &hmsc->scsi_blk_size) != 0) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - else - { - - hmsc->bot_data[0] = (uint8_t)((hmsc->scsi_blk_nbr - 1) >> 24); - hmsc->bot_data[1] = (uint8_t)((hmsc->scsi_blk_nbr - 1) >> 16); - hmsc->bot_data[2] = (uint8_t)((hmsc->scsi_blk_nbr - 1) >> 8); - hmsc->bot_data[3] = (uint8_t)(hmsc->scsi_blk_nbr - 1); - - hmsc->bot_data[4] = (uint8_t)(hmsc->scsi_blk_size >> 24); - hmsc->bot_data[5] = (uint8_t)(hmsc->scsi_blk_size >> 16); - hmsc->bot_data[6] = (uint8_t)(hmsc->scsi_blk_size >> 8); - hmsc->bot_data[7] = (uint8_t)(hmsc->scsi_blk_size); - - hmsc->bot_data_length = 8; - return 0; - } -} -/** -* @brief SCSI_ReadFormatCapacity -* Process Read Format Capacity command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - uint16_t blk_size; - uint32_t blk_nbr; - uint16_t i; - - for(i=0 ; i < 12 ; i++) - { - hmsc->bot_data[i] = 0; - } - - if(hmsc->bdev_ops->GetCapacity(lun, &blk_nbr, &blk_size) != 0) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - else - { - hmsc->bot_data[3] = 0x08; - hmsc->bot_data[4] = (uint8_t)((blk_nbr - 1) >> 24); - hmsc->bot_data[5] = (uint8_t)((blk_nbr - 1) >> 16); - hmsc->bot_data[6] = (uint8_t)((blk_nbr - 1) >> 8); - hmsc->bot_data[7] = (uint8_t)(blk_nbr - 1); - - hmsc->bot_data[8] = 0x02; - hmsc->bot_data[9] = (uint8_t)(blk_size >> 16); - hmsc->bot_data[10] = (uint8_t)(blk_size >> 8); - hmsc->bot_data[11] = (uint8_t)(blk_size); - - hmsc->bot_data_length = 12; - return 0; - } -} -/** -* @brief SCSI_ModeSense6 -* Process Mode Sense6 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ModeSense6 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - uint16_t len = 8 ; - hmsc->bot_data_length = len; - - while (len) - { - len--; - hmsc->bot_data[len] = MSC_Mode_Sense6_data[len]; - } - return 0; -} - -/** -* @brief SCSI_ModeSense10 -* Process Mode Sense10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ModeSense10 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - uint16_t len = 8; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->bot_data_length = len; - - while (len) - { - len--; - hmsc->bot_data[len] = MSC_Mode_Sense10_data[len]; - } - return 0; -} - -static int8_t SCSI_SynchronizeCache(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) { - // nothing to synchronize, so just return "success" - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_data_length = 0; - return 0; -} - -/** -* @brief SCSI_RequestSense -* Process Request Sense command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ - -static int8_t SCSI_RequestSense (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - uint8_t i; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - for(i=0 ; i < REQUEST_SENSE_DATA_LEN ; i++) - { - hmsc->bot_data[i] = 0; - } - - hmsc->bot_data[0] = 0x70; - hmsc->bot_data[7] = REQUEST_SENSE_DATA_LEN - 6; - - if((hmsc->scsi_sense_head != hmsc->scsi_sense_tail)) { - - hmsc->bot_data[2] = hmsc->scsi_sense[hmsc->scsi_sense_head].Skey; - hmsc->bot_data[12] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASCQ; - hmsc->bot_data[13] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASC; - hmsc->scsi_sense_head++; - - if (hmsc->scsi_sense_head == SENSE_LIST_DEEPTH) - { - hmsc->scsi_sense_head = 0; - } - } - hmsc->bot_data_length = REQUEST_SENSE_DATA_LEN; - - if (params[4] <= REQUEST_SENSE_DATA_LEN) - { - hmsc->bot_data_length = params[4]; - } - return 0; -} - -/** -* @brief SCSI_SenseCode -* Load the last error code in the error list -* @param lun: Logical unit number -* @param sKey: Sense Key -* @param ASC: Additional Sense Key -* @retval none - -*/ -void SCSI_SenseCode(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t sKey, uint8_t ASC) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->scsi_sense[hmsc->scsi_sense_tail].Skey = sKey; - hmsc->scsi_sense[hmsc->scsi_sense_tail].w.ASC = ASC << 8; - hmsc->scsi_sense_tail++; - if (hmsc->scsi_sense_tail == SENSE_LIST_DEEPTH) - { - hmsc->scsi_sense_tail = 0; - } -} -/** -* @brief SCSI_StartStopUnit -* Process Start Stop Unit command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_data_length = 0; - - // On Mac OS X, when the device is ejected a SCSI_START_STOP_UNIT command is sent. - // Bit 0 of params[4] is the START bit. - // If we get a stop, we must really stop the device so that the Mac does not - // automatically remount it. - hmsc->bdev_ops->StartStopUnit(lun, params[4] & 1); - - return 0; -} - -/** -* @brief SCSI_AllowMediumRemoval -* Process Allow Medium Removal command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_AllowMediumRemoval(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_data_length = 0; - hmsc->bdev_ops->PreventAllowMediumRemoval(lun, params[4]); - return 0; -} - -/** -* @brief SCSI_Read10 -* Process Read10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if(hmsc->bot_state == USBD_BOT_IDLE) /* Idle */ - { - - /* case 10 : Ho <> Di */ - - if ((hmsc->cbw.bmFlags & 0x80) != 0x80) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - if(hmsc->bdev_ops->IsReady(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - - hmsc->scsi_blk_addr_in_blks = (params[2] << 24) | \ - (params[3] << 16) | \ - (params[4] << 8) | \ - params[5]; - - hmsc->scsi_blk_len = (params[7] << 8) | \ - params[8]; - - - - if( SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr_in_blks, hmsc->scsi_blk_len) < 0) - { - return -1; /* error */ - } - - hmsc->bot_state = USBD_BOT_DATA_IN; - hmsc->scsi_blk_len *= hmsc->scsi_blk_size; - - /* cases 4,5 : Hi <> Dn */ - if (hmsc->cbw.dDataLength != hmsc->scsi_blk_len) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - } - hmsc->bot_data_length = MSC_MEDIA_PACKET; - - return SCSI_ProcessRead(pdev, lun); -} - -/** -* @brief SCSI_Write10 -* Process Write10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ - -static int8_t SCSI_Write10 (USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */ - { - - /* case 8 : Hi <> Do */ - - if ((hmsc->cbw.bmFlags & 0x80) == 0x80) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - /* Check whether Media is ready */ - if(hmsc->bdev_ops->IsReady(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - - /* Check If media is write-protected */ - if(hmsc->bdev_ops->IsWriteProtected(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - WRITE_PROTECTED); - return -1; - } - - - hmsc->scsi_blk_addr_in_blks = (params[2] << 24) | \ - (params[3] << 16) | \ - (params[4] << 8) | \ - params[5]; - hmsc->scsi_blk_len = (params[7] << 8) | \ - params[8]; - - /* check if LBA address is in the right range */ - if(SCSI_CheckAddressRange(pdev, - lun, - hmsc->scsi_blk_addr_in_blks, - hmsc->scsi_blk_len) < 0) - { - return -1; /* error */ - } - - hmsc->scsi_blk_len *= hmsc->scsi_blk_size; - - /* cases 3,11,13 : Hn,Ho <> D0 */ - if (hmsc->cbw.dDataLength != hmsc->scsi_blk_len) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - /* Prepare EP to receive first data packet */ - hmsc->bot_state = USBD_BOT_DATA_OUT; - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - hmsc->bot_data, - MIN (hmsc->scsi_blk_len, MSC_MEDIA_PACKET)); - } - else /* Write Process ongoing */ - { - return SCSI_ProcessWrite(pdev, lun); - } - return 0; -} - - -/** -* @brief SCSI_Verify10 -* Process Verify10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ - -static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if ((params[1]& 0x02) == 0x02) - { - SCSI_SenseCode (pdev, - lun, - ILLEGAL_REQUEST, - INVALID_FIELED_IN_COMMAND); - return -1; /* Error, Verify Mode Not supported*/ - } - - hmsc->scsi_blk_addr_in_blks = (params[2] << 24) | (params[3] << 16) | (params[4] << 8) | params[5]; - hmsc->scsi_blk_len = (params[7] << 8) | params[8]; - - if(SCSI_CheckAddressRange(pdev, - lun, - hmsc->scsi_blk_addr_in_blks, - hmsc->scsi_blk_len) < 0) - { - return -1; /* error */ - } - hmsc->bot_data_length = 0; - return 0; -} - -/** -* @brief SCSI_CheckAddressRange -* Check address range -* @param lun: Logical unit number -* @param blk_offset: first block address -* @param blk_nbr: number of block to be processed -* @retval status -*/ -static int8_t SCSI_CheckAddressRange (USBD_HandleTypeDef *pdev, uint8_t lun , uint32_t blk_offset , uint16_t blk_nbr) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if ((blk_offset + blk_nbr) > hmsc->scsi_blk_nbr ) - { - SCSI_SenseCode(pdev, - lun, - ILLEGAL_REQUEST, - ADDRESS_OUT_OF_RANGE); - return -1; - } - return 0; -} - -/** -* @brief SCSI_ProcessRead -* Handle Read Process -* @param lun: Logical unit number -* @retval status -*/ -static int8_t SCSI_ProcessRead (USBD_HandleTypeDef *pdev, uint8_t lun) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - uint32_t len; - - len = MIN(hmsc->scsi_blk_len , MSC_MEDIA_PACKET); - - if( hmsc->bdev_ops->Read(lun , - hmsc->bot_data, - hmsc->scsi_blk_addr_in_blks, - len / hmsc->scsi_blk_size) < 0) - { - - SCSI_SenseCode(pdev, - lun, - HARDWARE_ERROR, - UNRECOVERED_READ_ERROR); - return -1; - } - - - USBD_LL_Transmit (pdev, - MSC_IN_EP, - hmsc->bot_data, - len); - - - hmsc->scsi_blk_addr_in_blks += len / hmsc->scsi_blk_size; - hmsc->scsi_blk_len -= len; - - /* case 6 : Hi = Di */ - hmsc->csw.dDataResidue -= len; - - if (hmsc->scsi_blk_len == 0) - { - hmsc->bot_state = USBD_BOT_LAST_DATA_IN; - } - return 0; -} - -/** -* @brief SCSI_ProcessWrite -* Handle Write Process -* @param lun: Logical unit number -* @retval status -*/ - -static int8_t SCSI_ProcessWrite (USBD_HandleTypeDef *pdev, uint8_t lun) -{ - uint32_t len; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - len = MIN(hmsc->scsi_blk_len , MSC_MEDIA_PACKET); - - if(hmsc->bdev_ops->Write(lun , - hmsc->bot_data, - hmsc->scsi_blk_addr_in_blks, - len / hmsc->scsi_blk_size) < 0) - { - SCSI_SenseCode(pdev, - lun, - HARDWARE_ERROR, - WRITE_FAULT); - return -1; - } - - - hmsc->scsi_blk_addr_in_blks += len / hmsc->scsi_blk_size; - hmsc->scsi_blk_len -= len; - - /* case 12 : Ho = Do */ - hmsc->csw.dDataResidue -= len; - - if (hmsc->scsi_blk_len == 0) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_PASSED); - } - else - { - /* Prapare EP to Receive next packet */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - hmsc->bot_data, - MIN (hmsc->scsi_blk_len, MSC_MEDIA_PACKET)); - } - - return 0; -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/inc/usbd_core.h b/ports/stm32/usbdev/core/inc/usbd_core.h deleted file mode 100644 index 5494be3a22..0000000000 --- a/ports/stm32/usbdev/core/inc/usbd_core.h +++ /dev/null @@ -1,159 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief Header file for usbd_core.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CORE_H -#define __USBD_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" -#include "usbd_def.h" -#include "usbd_ioreq.h" -#include "usbd_ctlreq.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_CORE - * @brief This file is the Header file for usbd_core.c file - * @{ - */ - - -/** @defgroup USBD_CORE_Exported_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_TypesDefinitions - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_Variables - * @{ - */ -#define USBD_SOF USBD_LL_SOF -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_FunctionsPrototype - * @{ - */ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id); -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, const USBD_ClassTypeDef *pclass); - -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); - -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup); -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed); -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); - -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev); - -/* USBD Low Level Driver */ -USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev, int high_speed); -USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_OpenEP (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_mps); - -USBD_StatusTypeDef USBD_LL_CloseEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_FlushEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_StallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_ClearStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -uint8_t USBD_LL_IsStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_SetUSBAddress (USBD_HandleTypeDef *pdev, uint8_t dev_addr); -USBD_StatusTypeDef USBD_LL_Transmit (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -uint32_t USBD_LL_GetRxDataSize (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -void USBD_LL_Delay (uint32_t Delay); - -/** - * @} - */ - -#endif /* __USBD_CORE_H */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbdev/core/inc/usbd_ctlreq.h b/ports/stm32/usbdev/core/inc/usbd_ctlreq.h deleted file mode 100644 index 8c26884e64..0000000000 --- a/ports/stm32/usbdev/core/inc/usbd_ctlreq.h +++ /dev/null @@ -1,106 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header file for the usbd_req.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef __USB_REQUEST_H_ -#define __USB_REQUEST_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_REQ - * @brief header file for the usbd_ioreq.c file - * @{ - */ - -/** @defgroup USBD_REQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Exported_Types - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBD_REQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - - -void USBD_CtlError (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - -void USBD_ParseSetupRequest (USBD_SetupReqTypedef *req, uint8_t *pdata); - -void USBD_GetString (uint8_t *desc, uint8_t *unicode, uint16_t *len); -/** - * @} - */ - -#endif /* __USB_REQUEST_H_ */ - -/** - * @} - */ - -/** -* @} -*/ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/inc/usbd_def.h b/ports/stm32/usbdev/core/inc/usbd_def.h deleted file mode 100644 index e0d1c37625..0000000000 --- a/ports/stm32/usbdev/core/inc/usbd_def.h +++ /dev/null @@ -1,313 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_def.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief general defines for the usb device library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef __USBD_DEF_H -#define __USBD_DEF_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USB_DEF - * @brief general defines for the usb device library file - * @{ - */ - -/** @defgroup USB_DEF_Exported_Defines - * @{ - */ - -#ifndef NULL -#define NULL ((void *)0) -#endif - - -#define USB_LEN_DEV_QUALIFIER_DESC 0x0A -#define USB_LEN_DEV_DESC 0x12 -#define USB_LEN_CFG_DESC 0x09 -#define USB_LEN_IF_DESC 0x09 -#define USB_LEN_EP_DESC 0x07 -#define USB_LEN_OTG_DESC 0x03 -#define USB_LEN_LANGID_STR_DESC 0x04 -#define USB_LEN_OTHER_SPEED_DESC_SIZ 0x09 - -#define USBD_IDX_LANGID_STR 0x00 -#define USBD_IDX_MFC_STR 0x01 -#define USBD_IDX_PRODUCT_STR 0x02 -#define USBD_IDX_SERIAL_STR 0x03 -#define USBD_IDX_CONFIG_STR 0x04 -#define USBD_IDX_INTERFACE_STR 0x05 - -#define USB_REQ_TYPE_STANDARD 0x00 -#define USB_REQ_TYPE_CLASS 0x20 -#define USB_REQ_TYPE_VENDOR 0x40 -#define USB_REQ_TYPE_MASK 0x60 - -#define USB_REQ_RECIPIENT_DEVICE 0x00 -#define USB_REQ_RECIPIENT_INTERFACE 0x01 -#define USB_REQ_RECIPIENT_ENDPOINT 0x02 -#define USB_REQ_RECIPIENT_MASK 0x03 - -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -#define USB_DESC_TYPE_DEVICE 1 -#define USB_DESC_TYPE_CONFIGURATION 2 -#define USB_DESC_TYPE_STRING 3 -#define USB_DESC_TYPE_INTERFACE 4 -#define USB_DESC_TYPE_ENDPOINT 5 -#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 -#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 - - -#define USB_CONFIG_REMOTE_WAKEUP 2 -#define USB_CONFIG_SELF_POWERED 1 - -#define USB_FEATURE_EP_HALT 0 -#define USB_FEATURE_REMOTE_WAKEUP 1 -#define USB_FEATURE_TEST_MODE 2 - - -#define USB_HS_MAX_PACKET_SIZE 512 -#define USB_FS_MAX_PACKET_SIZE 64 -#define USB_MAX_EP0_SIZE 64 - -/* Device Status */ -#define USBD_STATE_DEFAULT 1 -#define USBD_STATE_ADDRESSED 2 -#define USBD_STATE_CONFIGURED 3 -#define USBD_STATE_SUSPENDED 4 - - -/* EP0 State */ -#define USBD_EP0_IDLE 0 -#define USBD_EP0_SETUP 1 -#define USBD_EP0_DATA_IN 2 -#define USBD_EP0_DATA_OUT 3 -#define USBD_EP0_STATUS_IN 4 -#define USBD_EP0_STATUS_OUT 5 -#define USBD_EP0_STALL 6 - -#define USBD_EP_TYPE_CTRL 0 -#define USBD_EP_TYPE_ISOC 1 -#define USBD_EP_TYPE_BULK 2 -#define USBD_EP_TYPE_INTR 3 - - -/** - * @} - */ - - -/** @defgroup USBD_DEF_Exported_TypesDefinitions - * @{ - */ - -typedef struct usb_setup_req -{ - - uint8_t bmRequest; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -}USBD_SetupReqTypedef; - -struct _USBD_HandleTypeDef; - -typedef struct _Device_cb -{ - uint8_t (*Init) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - uint8_t (*DeInit) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - /* Control Endpoints*/ - uint8_t (*Setup) (struct _USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req); - uint8_t (*EP0_TxSent) (struct _USBD_HandleTypeDef *pdev ); - uint8_t (*EP0_RxReady) (struct _USBD_HandleTypeDef *pdev ); - /* Class Specific Endpoints*/ - uint8_t (*DataIn) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*DataOut) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*SOF) (struct _USBD_HandleTypeDef *pdev); - uint8_t (*IsoINIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*IsoOUTIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - - uint8_t *(*GetHSConfigDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetFSConfigDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetOtherSpeedConfigDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetDeviceQualifierDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - -} USBD_ClassTypeDef; - -/* Following USB Device Speed */ -typedef enum -{ - USBD_SPEED_HIGH = 0, - USBD_SPEED_FULL = 1, - USBD_SPEED_LOW = 2, -}USBD_SpeedTypeDef; - -/* Following USB Device status */ -typedef enum { - USBD_OK = 0, - USBD_BUSY, - USBD_FAIL, -}USBD_StatusTypeDef; - -struct _USBD_HandleTypeDef; - -/* USB Device descriptors structure */ -typedef struct -{ - uint8_t *(*GetDeviceDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint8_t idx, uint16_t *length); -} USBD_DescriptorsTypeDef; - -/* USB Device handle structure */ -typedef struct -{ - uint32_t status; - uint32_t total_length; - uint32_t rem_length; - uint32_t maxpacket; -} USBD_EndpointTypeDef; - -/* USB Device handle structure */ -typedef struct _USBD_HandleTypeDef -{ - uint8_t id; - uint32_t dev_config; - uint32_t dev_default_config; - uint32_t dev_config_status; - USBD_SpeedTypeDef dev_speed; - USBD_EndpointTypeDef ep_in[15]; - USBD_EndpointTypeDef ep_out[15]; - uint32_t ep0_state; - uint32_t ep0_data_len; - uint8_t dev_state; - uint8_t dev_old_state; - uint8_t dev_address; - uint8_t dev_connection_status; - uint8_t dev_test_mode; - uint32_t dev_remote_wakeup; - - USBD_SetupReqTypedef request; - USBD_DescriptorsTypeDef *pDesc; - const USBD_ClassTypeDef *pClass; - void *pClassData; - void *pUserData; - void *pData; -} USBD_HandleTypeDef; - -/** - * @} - */ - - - -/** @defgroup USBD_DEF_Exported_Macros - * @{ - */ -#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \ - (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) - -#define LOBYTE(x) ((uint8_t)(x & 0x00FF)) -#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8)) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) - - -#if defined ( __GNUC__ ) - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - - -/* In HS mode and when the DMA is used, all variables and data structures dealing - with the DMA during the transaction process should be 4-bytes aligned */ - -#if defined (__GNUC__) /* GNU Compiler */ - #define __ALIGN_END __attribute__ ((aligned (4))) - #define __ALIGN_BEGIN -#else - #define __ALIGN_END - #if defined (__CC_ARM) /* ARM Compiler */ - #define __ALIGN_BEGIN __align(4) - #elif defined (__ICCARM__) /* IAR Compiler */ - #define __ALIGN_BEGIN - #elif defined (__TASKING__) /* TASKING Compiler */ - #define __ALIGN_BEGIN __align(4) - #endif /* __CC_ARM */ -#endif /* __GNUC__ */ - - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_FunctionsPrototype - * @{ - */ - -/** - * @} - */ - -#endif /* __USBD_DEF_H */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/inc/usbd_ioreq.h b/ports/stm32/usbdev/core/inc/usbd_ioreq.h deleted file mode 100644 index c964f0ad5a..0000000000 --- a/ports/stm32/usbdev/core/inc/usbd_ioreq.h +++ /dev/null @@ -1,121 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header file for the usbd_ioreq.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef __USBD_IOREQ_H_ -#define __USBD_IOREQ_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" -#include "usbd_core.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_IOREQ - * @brief header file for the usbd_ioreq.c file - * @{ - */ - -/** @defgroup USBD_IOREQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Exported_Types - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_IOREQ_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *buf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev); - -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , - uint8_t epnum); - -/** - * @} - */ - -#endif /* __USBD_IOREQ_H_ */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/src/usbd_core.c b/ports/stm32/usbdev/core/src/usbd_core.c deleted file mode 100644 index f235b24ee6..0000000000 --- a/ports/stm32/usbdev/core/src/usbd_core.c +++ /dev/null @@ -1,552 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the USBD core functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY -* @{ -*/ - - -/** @defgroup USBD_CORE -* @brief usbd core module -* @{ -*/ - -/** @defgroup USBD_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Defines -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - - - -/** @defgroup USBD_CORE_Private_FunctionPrototypes -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Variables -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Functions -* @{ -*/ - -/** -* @brief USBD_Init -* Initailizes the device stack and load the class driver -* @param pdev: device instance -* @param core_address: USB OTG core ID -* @param pdesc: Descriptor structure address -* @param id: Low level core index -* @retval None -*/ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) -{ - /* Check whether the USB Host handle is valid */ - if(pdev == NULL) - { - return USBD_FAIL; - } - - /* Unlink previous class*/ - if(pdev->pClass != NULL) - { - pdev->pClass = NULL; - } - - /* Assign USBD Descriptors */ - if(pdesc != NULL) - { - pdev->pDesc = pdesc; - } - - /* Set Device initial State */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->id = id; - /* Initialize low level driver */ - USBD_LL_Init(pdev, 0); - - return USBD_OK; -} - -/** -* @brief USBD_DeInit -* Re-Initialize th device library -* @param pdev: device instance -* @retval status: status -*/ -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev) -{ - /* Set Default State */ - pdev->dev_state = USBD_STATE_DEFAULT; - - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - /* Initialize low level driver */ - USBD_LL_DeInit(pdev); - - return USBD_OK; -} - - -/** - * @brief USBD_RegisterClass - * Link class driver to Device Core. - * @param pDevice : Device Handle - * @param pclass: Class handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, const USBD_ClassTypeDef *pclass) -{ - USBD_StatusTypeDef status = USBD_OK; - if(pclass != 0) - { - /* link the class tgo the USB Device handle */ - pdev->pClass = pclass; - status = USBD_OK; - } - else - { - status = USBD_FAIL; - } - - return status; -} - -/** - * @brief USBD_Start - * Start the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev) -{ - - /* Start the low level driver */ - USBD_LL_Start(pdev); - - return USBD_OK; -} - -/** - * @brief USBD_Stop - * Stop the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_RunTestMode -* Launch test mode process -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - - -/** -* @brief USBD_SetClassConfig -* Configure device and start the interface -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status -*/ - -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - USBD_StatusTypeDef ret = USBD_FAIL; - - if(pdev->pClass != NULL) - { - /* Set configuration and Start the Class*/ - if(pdev->pClass->Init(pdev, cfgidx) == 0) - { - ret = USBD_OK; - } - } - return ret; -} - -/** -* @brief USBD_ClrClassConfig -* Clear current configuration -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status: USBD_StatusTypeDef -*/ -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - /* Clear configuration and Deinitialize the Class process*/ - pdev->pClass->DeInit(pdev, cfgidx); - return USBD_OK; -} - - -/** -* @brief USBD_SetupStage -* Handle the setup stage -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) -{ - - USBD_ParseSetupRequest(&pdev->request, psetup); - - pdev->ep0_state = USBD_EP0_SETUP; - pdev->ep0_data_len = pdev->request.wLength; - - switch (pdev->request.bmRequest & 0x1F) - { - case USB_REQ_RECIPIENT_DEVICE: - USBD_StdDevReq (pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_INTERFACE: - USBD_StdItfReq(pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_ENDPOINT: - USBD_StdEPReq(pdev, &pdev->request); - break; - - default: - USBD_LL_StallEP(pdev , pdev->request.bmRequest & 0x80); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_DataOutStage -* Handle data OUT stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_out[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_OUT) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueRx (pdev, - pdata, - MIN(pep->rem_length ,pep->maxpacket)); - } - else - { - if((pdev->pClass->EP0_RxReady != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_RxReady(pdev); - } - USBD_CtlSendStatus(pdev); - } - } - } - else if((pdev->pClass->DataOut != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataOut(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_DataInStage -* Handle data in stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_in[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_IN) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueSendData (pdev, - pdata, - pep->rem_length); - } - else - { /* last packet is MPS multiple, so send ZLP packet */ - if((pep->total_length % pep->maxpacket == 0) && - (pep->total_length >= pep->maxpacket) && - (pep->total_length < pdev->ep0_data_len )) - { - - USBD_CtlContinueSendData(pdev , NULL, 0); - pdev->ep0_data_len = 0; - } - else - { - if((pdev->pClass->EP0_TxSent != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_TxSent(pdev); - } - USBD_CtlReceiveStatus(pdev); - } - } - } - if (pdev->dev_test_mode == 1) - { - USBD_RunTestMode(pdev); - pdev->dev_test_mode = 0; - } - } - else if((pdev->pClass->DataIn != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataIn(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) -{ - /* Open EP0 OUT */ - USBD_LL_OpenEP(pdev, - 0x00, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; - - /* Open EP0 IN */ - USBD_LL_OpenEP(pdev, - 0x80, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; - /* Upon Reset call usr call back */ - pdev->dev_state = USBD_STATE_DEFAULT; - - if (pdev->pClassData) - pdev->pClass->DeInit(pdev, pdev->dev_config); - - - return USBD_OK; -} - - - - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) -{ - pdev->dev_speed = speed; - return USBD_OK; -} - -/** -* @brief USBD_Suspend -* Handle Suspend event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) -{ - pdev->dev_old_state = pdev->dev_state; - pdev->dev_state = USBD_STATE_SUSPENDED; - return USBD_OK; -} - -/** -* @brief USBD_Resume -* Handle Resume event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) -{ - pdev->dev_state = pdev->dev_old_state; - return USBD_OK; -} - -/** -* @brief USBD_SOF -* Handle SOF event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) -{ - if(pdev->dev_state == USBD_STATE_CONFIGURED) - { - if(pdev->pClass->SOF != NULL) - { - pdev->pClass->SOF(pdev); - } - } - return USBD_OK; -} - -/** -* @brief USBD_IsoINIncomplete -* Handle iso in incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_IsoOUTIncomplete -* Handle iso out incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevConnected -* Handle device connection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevDisconnected -* Handle device disconnection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->pClass->DeInit(pdev, pdev->dev_config); - - return USBD_OK; -} -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbdev/core/src/usbd_ctlreq.c b/ports/stm32/usbdev/core/src/usbd_ctlreq.c deleted file mode 100644 index f25f252d64..0000000000 --- a/ports/stm32/usbdev/core/src/usbd_ctlreq.c +++ /dev/null @@ -1,740 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides the standard USB requests following chapter 9. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ctlreq.h" -#include "usbd_ioreq.h" - - -/** @addtogroup STM32_USBD_STATE_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_REQ - * @brief USB standard requests module - * @{ - */ - -/** @defgroup USBD_REQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_FunctionPrototypes - * @{ - */ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static uint8_t USBD_GetLen(uint8_t *buf); - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Functions - * @{ - */ - - -/** -* @brief USBD_StdDevReq -* Handle standard usb device requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (req->bRequest) - { - case USB_REQ_GET_DESCRIPTOR: - - USBD_GetDescriptor (pdev, req) ; - break; - - case USB_REQ_SET_ADDRESS: - USBD_SetAddress(pdev, req); - break; - - case USB_REQ_SET_CONFIGURATION: - USBD_SetConfig (pdev , req); - break; - - case USB_REQ_GET_CONFIGURATION: - USBD_GetConfig (pdev , req); - break; - - case USB_REQ_GET_STATUS: - USBD_GetStatus (pdev , req); - break; - - - case USB_REQ_SET_FEATURE: - USBD_SetFeature (pdev , req); - break; - - case USB_REQ_CLEAR_FEATURE: - USBD_ClrFeature (pdev , req); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - - return ret; -} - -/** -* @brief USBD_StdItfReq -* Handle standard usb interface requests -* @param pdev: USB OTG device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (pdev->dev_state) - { - case USBD_STATE_CONFIGURED: - - if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) - { - pdev->pClass->Setup (pdev, req); - - if((req->wLength == 0)&& (ret == USBD_OK)) - { - USBD_CtlSendStatus(pdev); - } - } - else - { - USBD_CtlError(pdev , req); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_StdEPReq -* Handle standard usb endpoint requests -* @param pdev: USB OTG device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - - uint8_t ep_addr; - USBD_StatusTypeDef ret = USBD_OK; - USBD_EndpointTypeDef *pep; - ep_addr = LOBYTE(req->wIndex); - - switch (req->bRequest) - { - - case USB_REQ_SET_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - - } - } - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_CLEAR_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_ClearStallEP(pdev , ep_addr); - pdev->pClass->Setup (pdev, req); - } - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_GET_STATUS: - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - pep = ((ep_addr & 0x80) == 0x80) ? &pdev->ep_in[ep_addr & 0x7F]:\ - &pdev->ep_out[ep_addr & 0x7F]; - if(USBD_LL_IsStallEP(pdev, ep_addr)) - { - pep->status = 0x0001; - } - else - { - pep->status = 0x0000; - } - - USBD_CtlSendData (pdev, - (uint8_t *)&pep->status, - 2); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - default: - break; - } - return ret; -} -/** -* @brief USBD_GetDescriptor -* Handle Get Descriptor requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint16_t len; - uint8_t *pbuf; - - - switch (req->wValue >> 8) - { - case USB_DESC_TYPE_DEVICE: - pbuf = pdev->pDesc->GetDeviceDescriptor(pdev, &len); - break; - - case USB_DESC_TYPE_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetHSConfigDescriptor(pdev, &len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - else - { - pbuf = (uint8_t *)pdev->pClass->GetFSConfigDescriptor(pdev, &len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - break; - - case USB_DESC_TYPE_STRING: - pbuf = pdev->pDesc->GetStrDescriptor(pdev, req->wValue & 0xff, &len); - if (pbuf == NULL) { - USBD_CtlError(pdev, req); - return; - } - break; - - case USB_DESC_TYPE_DEVICE_QUALIFIER: - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetDeviceQualifierDescriptor(pdev, &len); - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetOtherSpeedConfigDescriptor(pdev, &len); - pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - default: - USBD_CtlError(pdev , req); - return; - } - - if((len != 0)&& (req->wLength != 0)) - { - - len = MIN(len , req->wLength); - - USBD_CtlSendData (pdev, - pbuf, - len); - } - -} - -/** -* @brief USBD_SetAddress -* Set device address -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint8_t dev_addr; - - if ((req->wIndex == 0) && (req->wLength == 0)) - { - dev_addr = (uint8_t)(req->wValue) & 0x7F; - - if (pdev->dev_state == USBD_STATE_CONFIGURED) - { - USBD_CtlError(pdev , req); - } - else - { - pdev->dev_address = dev_addr; - USBD_LL_SetUSBAddress(pdev, dev_addr); - USBD_CtlSendStatus(pdev); - - if (dev_addr != 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - } - else - { - pdev->dev_state = USBD_STATE_DEFAULT; - } - } - } - else - { - USBD_CtlError(pdev , req); - } -} - -/** -* @brief USBD_SetConfig -* Handle Set device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - uint8_t cfgidx; - - cfgidx = (uint8_t)(req->wValue); - - if (cfgidx > USBD_MAX_NUM_CONFIGURATION ) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if (cfgidx) - { - pdev->dev_config = cfgidx; - pdev->dev_state = USBD_STATE_CONFIGURED; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - case USBD_STATE_CONFIGURED: - if (cfgidx == 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - pdev->dev_config = cfgidx; - USBD_ClrClassConfig(pdev , cfgidx); - USBD_CtlSendStatus(pdev); - - } - else if (cfgidx != pdev->dev_config) - { - /* Clear old configuration */ - USBD_ClrClassConfig(pdev , pdev->dev_config); - - /* set new configuration */ - pdev->dev_config = cfgidx; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetConfig -* Handle Get device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wLength != 1) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state ) - { - case USBD_STATE_ADDRESSED: - pdev->dev_default_config = 0; - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_default_config, - 1); - break; - - case USBD_STATE_CONFIGURED: - - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_config, - 1); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetStatus -* Handle Get Status request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - -#if ( USBD_SELF_POWERED == 1) - pdev->dev_config_status = USB_CONFIG_SELF_POWERED; -#else - pdev->dev_config_status = 0; -#endif - - if (pdev->dev_remote_wakeup) - { - pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; - } - - USBD_CtlSendData (pdev, - (uint8_t *)& pdev->dev_config_status, - 2); - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - - -/** -* @brief USBD_SetFeature -* Handle Set device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 1; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - -} - - -/** -* @brief USBD_ClrFeature -* Handle clear device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 0; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - -/** -* @brief USBD_ParseSetupRequest -* Copy buffer into setup structure -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) -{ - req->bmRequest = *(uint8_t *) (pdata); - req->bRequest = *(uint8_t *) (pdata + 1); - req->wValue = SWAPBYTE (pdata + 2); - req->wIndex = SWAPBYTE (pdata + 4); - req->wLength = SWAPBYTE (pdata + 6); - -} - -/** -* @brief USBD_CtlError -* Handle USB low level Error -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_CtlError( USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - USBD_LL_StallEP(pdev , 0x80); - USBD_LL_StallEP(pdev , 0); -} - - -/** - * @brief USBD_GetString - * Convert Ascii string into unicode one - * @param desc : descriptor buffer - * @param unicode : Formatted string buffer (unicode) - * @param len : descriptor length - * @retval None - */ -void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) -{ - uint8_t idx = 0; - - if (desc != NULL) - { - *len = USBD_GetLen(desc) * 2 + 2; - unicode[idx++] = *len; - unicode[idx++] = USB_DESC_TYPE_STRING; - - while (*desc != '\0') - { - unicode[idx++] = *desc++; - unicode[idx++] = 0x00; - } - } -} - -/** - * @brief USBD_GetLen - * return the string length - * @param buf : pointer to the ascii string buffer - * @retval string length - */ -static uint8_t USBD_GetLen(uint8_t *buf) -{ - uint8_t len = 0; - - while (*buf != '\0') - { - len++; - buf++; - } - - return len; -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/src/usbd_ioreq.c b/ports/stm32/usbdev/core/src/usbd_ioreq.c deleted file mode 100644 index aab59fcef5..0000000000 --- a/ports/stm32/usbdev/core/src/usbd_ioreq.c +++ /dev/null @@ -1,236 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides the IO requests APIs for control endpoints. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_IOREQ - * @brief control I/O requests module - * @{ - */ - -/** @defgroup USBD_IOREQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Functions - * @{ - */ - -/** -* @brief USBD_CtlSendData -* send data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_IN; - pdev->ep_in[0].total_length = len; - pdev->ep_in[0].rem_length = len; - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueSendData -* continue sending data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Start the next transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlPrepareRx -* receive data on the ctl pipe -* @param pdev: USB OTG device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_OUT; - pdev->ep_out[0].total_length = len; - pdev->ep_out[0].rem_length = len; - /* Start the transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueRx -* continue receive data on the ctl pipe -* @param pdev: USB OTG device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - return USBD_OK; -} -/** -* @brief USBD_CtlSendStatus -* send zero lzngth packet on the ctl pipe -* @param pdev: USB OTG device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev) -{ - - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_IN; - - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, NULL, 0); - - return USBD_OK; -} - -/** -* @brief USBD_CtlReceiveStatus -* receive zero lzngth packet on the ctl pipe -* @param pdev: USB OTG device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_OUT; - - /* Start the transfer */ - USBD_LL_PrepareReceive ( pdev, - 0, - NULL, - 0); - - return USBD_OK; -} - - -/** -* @brief USBD_GetRxCount -* returns the received data length -* @param pdev: USB OTG device instance -* epnum: endpoint index -* @retval Rx Data blength -*/ -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , uint8_t ep_addr) -{ - return USBD_LL_GetRxDataSize(pdev, ep_addr); -} - -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/AUDIO/Inc/usbh_audio.h b/ports/stm32/usbhost/Class/AUDIO/Inc/usbh_audio.h deleted file mode 100644 index 8cee530d06..0000000000 --- a/ports/stm32/usbhost/Class/AUDIO/Inc/usbh_audio.h +++ /dev/null @@ -1,581 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_audio.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_audio.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_AUDIO_H -#define __USBH_AUDIO_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_AUDIO_CLASS - * @{ - */ - -/** @defgroup USBH_AUDIO_CORE - * @brief This file is the Header file for usbh_audio.c - * @{ - */ - - -/** @defgroup USBH_AUDIO_CORE_Exported_Types - * @{ - */ - -/* States for AUDIO State Machine */ -typedef enum -{ - AUDIO_INIT = 0, - AUDIO_IDLE, - AUDIO_CS_REQUESTS, - AUDIO_SET_DEFAULT_FEATURE_UNIT, - AUDIO_SET_INTERFACE, - AUDIO_SET_STREAMING_INTERFACE, - AUDIO_SET_CUR1, - AUDIO_GET_MIN, - AUDIO_GET_MAX, - AUDIO_GET_RES, - AUDIO_GET_CUR1, - AUDIO_SET_CUR2, - AUDIO_GET_CUR2, - AUDIO_SET_CUR3, - AUDIO_SET_INTERFACE0, - AUDIO_SET_INTERFACE1, - AUDIO_SET_INTERFACE2, - AUDIO_ISOC_OUT, - AUDIO_ISOC_IN, - AUDIO_ISOC_POLL, - AUDIO_ERROR, -} -AUDIO_StateTypeDef; - -typedef enum -{ - AUDIO_REQ_INIT = 1, - AUDIO_REQ_IDLE, - AUDIO_REQ_SET_DEFAULT_IN_INTERFACE, - AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE, - AUDIO_REQ_SET_IN_INTERFACE, - AUDIO_REQ_SET_OUT_INTERFACE, - AUDIO_REQ_CS_REQUESTS, -} -AUDIO_ReqStateTypeDef; - -typedef enum -{ - AUDIO_REQ_SET_VOLUME = 1, - AUDIO_REQ_SET_MUTE, - AUDIO_REQ_GET_CURR_VOLUME, - AUDIO_REQ_GET_MIN_VOLUME, - AUDIO_REQ_GET_MAX_VOLUME, - AUDIO_REQ_GET_VOLUME, - AUDIO_REQ_GET_RESOLUTION, - AUDIO_REQ_CS_IDLE, -} -AUDIO_CSReqStateTypeDef; - -typedef enum -{ - AUDIO_PLAYBACK_INIT = 1, - AUDIO_PLAYBACK_SET_EP, - AUDIO_PLAYBACK_SET_EP_FREQ, - AUDIO_PLAYBACK_PLAY, - AUDIO_PLAYBACK_IDLE, -} -AUDIO_PlayStateTypeDef; - -typedef enum -{ - VOLUME_UP = 1, - VOLUME_DOWN = 2, -} -AUDIO_VolumeCtrlTypeDef; - -typedef enum -{ - AUDIO_CONTROL_INIT = 1, - AUDIO_CONTROL_CHANGE, - AUDIO_CONTROL_IDLE, - AUDIO_CONTROL_VOLUME_UP, - AUDIO_CONTROL_VOLUME_DOWN, -} -AUDIO_ControlStateTypeDef; - - -typedef enum -{ - AUDIO_DATA_START_OUT = 1, - AUDIO_DATA_OUT, -} -AUDIO_ProcessingTypeDef; - -/* Structure for AUDIO process */ -typedef struct -{ - uint8_t Channels; - uint8_t Bits; - uint32_t SampleRate; -} -AUDIO_FormatTypeDef; - -typedef struct -{ - uint8_t Ep; - uint16_t EpSize; - uint8_t AltSettings; - uint8_t interface; - uint8_t valid; - uint16_t Poll; -} -AUDIO_STREAMING_IN_HandleTypeDef; - -typedef struct -{ - uint8_t Ep; - uint16_t EpSize; - uint8_t AltSettings; - uint8_t interface; - uint8_t valid; - uint16_t Poll; -} -AUDIO_STREAMING_OUT_HandleTypeDef; - - -typedef struct -{ - uint8_t mute; - uint32_t volumeMin; - uint32_t volumeMax; - uint32_t volume; - uint32_t resolution; -} -AUDIO_ControlAttributeTypeDef; - -typedef struct -{ - - uint8_t Ep; - uint16_t EpSize; - uint8_t interface; - uint8_t AltSettings; - uint8_t supported; - - uint8_t Pipe; - uint8_t Poll; - uint32_t timer ; - - uint8_t asociated_as; - uint8_t asociated_mixer; - uint8_t asociated_selector; - uint8_t asociated_feature; - uint8_t asociated_terminal; - uint8_t asociated_channels; - - uint32_t frequency; - uint8_t *buf; - uint8_t *cbuf; - uint32_t partial_ptr; - - uint32_t global_ptr; - uint16_t frame_length; - uint32_t total_length; - - AUDIO_ControlAttributeTypeDef attribute; -} -AUDIO_InterfaceStreamPropTypeDef; - -typedef struct -{ - - uint8_t Ep; - uint16_t EpSize; - uint8_t interface; - uint8_t supported; - - uint8_t Pipe; - uint8_t Poll; - uint32_t timer ; -} -AUDIO_InterfaceControlPropTypeDef; - - -#define AUDIO_MAX_AUDIO_STD_INTERFACE 0x05 -#define AUDIO_MAX_FREQ_SUPPORTED 0x05 -#define AUDIO_MAX_STREAMING_INTERFACE 0x05 -#define AUDIO_MAX_NUM_IN_TERMINAL 0x04 -#define AUDIO_MAX_NUM_OUT_TERMINAL 0x04 -#define AUDIO_MAX_NUM_FEATURE_UNIT 0x04 -#define AUDIO_MAX_NUM_MIXER_UNIT 0x04 -#define AUDIO_MAX_NUM_SELECTOR_UNIT 0x04 - -#define HEADPHONE_SUPPORTED 0x01 -#define MICROPHONE_SUPPORTED 0x02 -#define HEADSET_SUPPORTED 0x03 - - -/*Class-Specific AS(Audio Streaming) Interface Descriptor*/ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bTerminalLink; - uint8_t bDelay; - uint8_t wFormatTag[2]; -} -AUDIO_ASGeneralDescTypeDef; - -/*Class-Specific AS(Audio Streaming) Format Type Descriptor*/ -typedef struct -{ - uint8_t bLength; /*At to be deside*/ - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bFormatType; - uint8_t bNrChannels; - uint8_t bSubframeSize; - uint8_t bBitResolution; - uint8_t bSamFreqType; - uint8_t tSamFreq[][3]; -} -AUDIO_ASFormatTypeDescTypeDef; - -/*Class-Specific AS(Audio Streaming) Interface Descriptor*/ -typedef struct -{ - AUDIO_ASGeneralDescTypeDef *GeneralDesc; - AUDIO_ASFormatTypeDescTypeDef *FormatTypeDesc; -} -AUDIO_ASDescTypeDef; - -/* 4.3.2 Class-Specific AC Interface Descriptor */ - -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bcdADC[2]; - uint8_t wTotalLength[2]; - uint8_t bInCollection; - uint8_t baInterfaceNr[]; -} -AUDIO_HeaderDescTypeDef; - -/* 4.3.2.1 Input Terminal Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bTerminalID; - uint8_t wTerminalType[2]; - uint8_t bAssocTerminal; - uint8_t bNrChannels; - uint8_t wChannelConfig[2]; - uint8_t iChannelNames; - uint8_t iTerminal; -} -AUDIO_ITDescTypeDef; - -/* 4.3.2.2 Output Terminal Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bTerminalID; - uint8_t wTerminalType[2]; - uint8_t bAssocTerminal; - uint8_t bSourceID; - uint8_t iTerminal; -} -AUDIO_OTDescTypeDef; - -/* 4.3.2.3 Feature Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bUnitID; - uint8_t bSourceID; - uint8_t bControlSize; - uint8_t bmaControls[][2]; -} -AUDIO_FeatureDescTypeDef; - - -/* 4.3.2.3 Feature Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bUnitID; - uint8_t bNrInPins; - uint8_t bSourceID0; - uint8_t bSourceID1; - uint8_t bNrChannels; - uint8_t bmChannelsConfig[2]; - uint8_t iChannelsNames; - uint8_t bmaControls; - uint8_t iMixer; -} -AUDIO_MixerDescTypeDef; - - - -/* 4.3.2.3 Feature Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bUnitID; - uint8_t bNrInPins; - uint8_t bSourceID0; - uint8_t iSelector; -} -AUDIO_SelectorDescTypeDef; - -/*Class-Specific AC(Audio Control) Interface Descriptor*/ -typedef struct -{ - AUDIO_HeaderDescTypeDef *HeaderDesc; - AUDIO_ITDescTypeDef *InputTerminalDesc [AUDIO_MAX_NUM_IN_TERMINAL]; - AUDIO_OTDescTypeDef *OutputTerminalDesc[AUDIO_MAX_NUM_OUT_TERMINAL]; - AUDIO_FeatureDescTypeDef *FeatureUnitDesc [AUDIO_MAX_NUM_FEATURE_UNIT]; - AUDIO_MixerDescTypeDef *MixerUnitDesc [AUDIO_MAX_NUM_MIXER_UNIT]; - AUDIO_SelectorDescTypeDef *SelectorUnitDesc [AUDIO_MAX_NUM_SELECTOR_UNIT]; -} -AUDIO_ACDescTypeDef; - -/*Class-Specific AC : Global descriptor*/ - -typedef struct -{ - AUDIO_ACDescTypeDef cs_desc; /* Only one control descriptor*/ - AUDIO_ASDescTypeDef as_desc[AUDIO_MAX_STREAMING_INTERFACE]; - - uint16_t ASNum; - uint16_t InputTerminalNum; - uint16_t OutputTerminalNum; - uint16_t FeatureUnitNum; - uint16_t SelectorUnitNum; - uint16_t MixerUnitNum; -} -AUDIO_ClassSpecificDescTypedef; - - -typedef struct _AUDIO_Process -{ - AUDIO_ReqStateTypeDef req_state; - AUDIO_CSReqStateTypeDef cs_req_state; - AUDIO_PlayStateTypeDef play_state; - AUDIO_ControlStateTypeDef control_state; - AUDIO_ProcessingTypeDef processing_state; - - AUDIO_STREAMING_IN_HandleTypeDef stream_in[AUDIO_MAX_AUDIO_STD_INTERFACE]; - AUDIO_STREAMING_OUT_HandleTypeDef stream_out[AUDIO_MAX_AUDIO_STD_INTERFACE]; - AUDIO_ClassSpecificDescTypedef class_desc; - - AUDIO_InterfaceStreamPropTypeDef headphone; - AUDIO_InterfaceStreamPropTypeDef microphone; - AUDIO_InterfaceControlPropTypeDef control; - uint16_t mem [8]; - uint8_t temp_feature; - uint8_t temp_channels; -} -AUDIO_HandleTypeDef; - -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_Defines - * @{ - */ - - -/*Audio Interface Subclass Codes*/ -#define AC_CLASS 0x01 - -/* A.2 Audio Interface Subclass Codes */ -#define USB_SUBCLASS_AUDIOCONTROL 0x01 -#define USB_SUBCLASS_AUDIOSTREAMING 0x02 -#define USB_SUBCLASS_MIDISTREAMING 0x03 - -#define USB_DESC_TYPE_CS_INTERFACE 0x24 -#define USB_DESC_TYPE_CS_ENDPOINT 0x25 - -/* A.5 Audio Class-Specific AC Interface Descriptor Subtypes */ -#define UAC_HEADER 0x01 -#define UAC_INPUT_TERMINAL 0x02 -#define UAC_OUTPUT_TERMINAL 0x03 -#define UAC_MIXER_UNIT 0x04 -#define UAC_SELECTOR_UNIT 0x05 -#define UAC_FEATURE_UNIT 0x06 -#define UAC_PROCESSING_UNIT 0x07 -#define UAC_EXTENSION_UNIT 0x08 - -/*Audio Class-Specific Endpoint Descriptor Subtypes*/ -#define EP_CONTROL_UNDEFINED 0x00 -#define SAMPLING_FREQ_CONTROL 0x01 -#define PITCH_CONTROL 0x02 - -/*Feature unit control selector*/ -#define FU_CONTROL_UNDEFINED 0x00 -#define MUTE_CONTROL 0x01 -#define VOLUME_CONTROL 0x02 -#define BASS_CONTROL 0x03 -#define MID_CONTROL 0x04 -#define TREBLE_CONTROL 0x05 -#define GRAPHIC_EQUALIZER_CONTROL 0x06 -#define AUTOMATIC_GAIN_CONTROL 0x07 -#define DELAY_CONTROL 0x08 -#define BASS_BOOST_CONTROL 0x09 -#define LOUDNESS_CONTROL 0x0A - -/*Terminal control selector*/ -#define TE_CONTROL_UNDEFINED 0x00 -#define COPY_PROTECT_CONTROL 0x01 - - -/* A.6 Audio Class-Specific AS Interface Descriptor Subtypes */ -#define UAC_AS_GENERAL 0x01 -#define UAC_FORMAT_TYPE 0x02 -#define UAC_FORMAT_SPECIFIC 0x03 - -/* A.8 Audio Class-Specific Endpoint Descriptor Subtypes */ -#define UAC_EP_GENERAL 0x01 - -/* A.9 Audio Class-Specific Request Codes */ -#define UAC_SET_ 0x00 -#define UAC_GET_ 0x80 - -#define UAC__CUR 0x1 -#define UAC__MIN 0x2 -#define UAC__MAX 0x3 -#define UAC__RES 0x4 -#define UAC__MEM 0x5 - -#define UAC_SET_CUR (UAC_SET_ | UAC__CUR) -#define UAC_GET_CUR (UAC_GET_ | UAC__CUR) -#define UAC_SET_MIN (UAC_SET_ | UAC__MIN) -#define UAC_GET_MIN (UAC_GET_ | UAC__MIN) -#define UAC_SET_MAX (UAC_SET_ | UAC__MAX) -#define UAC_GET_MAX (UAC_GET_ | UAC__MAX) -#define UAC_SET_RES (UAC_SET_ | UAC__RES) -#define UAC_GET_RES (UAC_GET_ | UAC__RES) -#define UAC_SET_MEM (UAC_SET_ | UAC__MEM) -#define UAC_GET_MEM (UAC_GET_ | UAC__MEM) - -#define UAC_GET_STAT 0xff - -/* MIDI - A.1 MS Class-Specific Interface Descriptor Subtypes */ -#define UAC_MS_HEADER 0x01 -#define UAC_MIDI_IN_JACK 0x02 -#define UAC_MIDI_OUT_JACK 0x03 - -/* MIDI - A.1 MS Class-Specific Endpoint Descriptor Subtypes */ -#define UAC_MS_GENERAL 0x01 - -/* Terminals - 2.1 USB Terminal Types */ -#define UAC_TERMINAL_UNDEFINED 0x100 -#define UAC_TERMINAL_STREAMING 0x101 -#define UAC_TERMINAL_VENDOR_SPEC 0x1FF - -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_Variables - * @{ - */ -extern USBH_ClassTypeDef AUDIO_Class; -#define USBH_AUDIO_CLASS &AUDIO_Class -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_AUDIO_SetFrequency (USBH_HandleTypeDef *phost, - uint16_t sample_rate, - uint8_t channel_num, - uint8_t data_width); - -USBH_StatusTypeDef USBH_AUDIO_Play (USBH_HandleTypeDef *phost, uint8_t *buf, uint32_t length); -USBH_StatusTypeDef USBH_AUDIO_Stop (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_AUDIO_Suspend (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_AUDIO_Resume (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_AUDIO_SetVolume (USBH_HandleTypeDef *phost, AUDIO_VolumeCtrlTypeDef volume_ctl); -USBH_StatusTypeDef USBH_AUDIO_ChangeOutBuffer (USBH_HandleTypeDef *phost, uint8_t *buf); -int32_t USBH_AUDIO_GetOutOffset (USBH_HandleTypeDef *phost); - -void USBH_AUDIO_FrequencySet(USBH_HandleTypeDef *phost); -/** - * @} - */ - - -#endif /* __USBH_AUDIO_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/AUDIO/Src/usbh_audio.c b/ports/stm32/usbhost/Class/AUDIO/Src/usbh_audio.c deleted file mode 100644 index b9677b6c2b..0000000000 --- a/ports/stm32/usbhost/Class/AUDIO/Src/usbh_audio.c +++ /dev/null @@ -1,1994 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_audio.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the AC Layer Handlers for USB Host AC class. - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_audio.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_AUDIO_CLASS - * @{ - */ - -/** @defgroup USBH_AUDIO_CORE - * @brief This file includes HID Layer Handlers for USB Host HID class. - * @{ - */ - -/** @defgroup USBH_AUDIO_CORE_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_FunctionPrototypes - * @{ - */ - -static USBH_StatusTypeDef USBH_AUDIO_InterfaceInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_InterfaceDeInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_Process(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_SOFProcess(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_ClassRequest(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_CSRequest(USBH_HandleTypeDef *phost, - uint8_t feature, - uint8_t channel); - -static USBH_StatusTypeDef USBH_AUDIO_HandleCSRequest(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingIN(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingOUT(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_FindHIDControl(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_ParseCSDescriptors(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_AUDIO_BuildHeadphonePath(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_BuildMicrophonePath(USBH_HandleTypeDef *phost); -int32_t USBH_AUDIO_FindLinkedUnitIN(USBH_HandleTypeDef *phost, uint8_t UnitID); -int32_t USBH_AUDIO_FindLinkedUnitOUT(USBH_HandleTypeDef *phost, uint8_t UnitID); - - - -static USBH_StatusTypeDef ParseCSDescriptors(AUDIO_ClassSpecificDescTypedef *class_desc, - uint8_t ac_subclass, - uint8_t *pdesc); - - -static USBH_StatusTypeDef USBH_AUDIO_Transmit (USBH_HandleTypeDef *phost); - - -static USBH_StatusTypeDef USBH_AC_SetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetMin(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetMax(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetRes(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AUDIO_SetEndpointControls(USBH_HandleTypeDef *phost, - uint8_t Ep, - uint8_t *buff); - -static USBH_StatusTypeDef AUDIO_SetVolume (USBH_HandleTypeDef *phost, uint8_t feature, uint8_t channel, uint16_t volume); - -static USBH_StatusTypeDef USBH_AUDIO_InputStream (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_OutputStream (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_Control (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_SetControlAttribute (USBH_HandleTypeDef *phost, uint8_t attrib); -static int32_t USBH_AUDIO_FindLinkedUnit(USBH_HandleTypeDef *phost, uint8_t UnitID); - -USBH_ClassTypeDef AUDIO_Class = -{ - "AUDIO", - AC_CLASS, - USBH_AUDIO_InterfaceInit, - USBH_AUDIO_InterfaceDeInit, - USBH_AUDIO_ClassRequest, - USBH_AUDIO_Process, - USBH_AUDIO_SOFProcess, - NULL, -}; - -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Private_Functions - * @{ - */ - -/** - * @brief USBH_AUDIO_InterfaceInit - * The function init the Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_InterfaceInit (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_FAIL ; - USBH_StatusTypeDef out_status, in_status ; - AUDIO_HandleTypeDef *AUDIO_Handle; - uint8_t interface, index; - uint16_t ep_size_out = 0; - uint16_t ep_size_in = 0; - - interface = USBH_FindInterface(phost, AC_CLASS, USB_SUBCLASS_AUDIOCONTROL, 0x00); - - if(interface == 0xFF) /* Not Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for %s class.", phost->pActiveClass->Name); - status = USBH_FAIL; - } - else - { - - - phost->pActiveClass->pData = (AUDIO_HandleTypeDef *)USBH_malloc (sizeof(AUDIO_HandleTypeDef)); - AUDIO_Handle = phost->pActiveClass->pData; - USBH_memset(AUDIO_Handle, 0, sizeof(AUDIO_HandleTypeDef)); - - - /* 1st Step: Find Audio Interfaces */ - out_status = USBH_AUDIO_FindAudioStreamingIN (phost); - - in_status = USBH_AUDIO_FindAudioStreamingOUT(phost); - - if((out_status == USBH_FAIL) && (in_status == USBH_FAIL)) - { - USBH_DbgLog ("%s class configuration not supported.", phost->pActiveClass->Name); - } - else - { - /* 2nd Step: Select Audio Streaming Interfaces with largest endpoint size : default behavior*/ - for (index = 0; index < AUDIO_MAX_AUDIO_STD_INTERFACE; index ++) - { - if( AUDIO_Handle->stream_out[index].valid == 1) - { - if(ep_size_out < AUDIO_Handle->stream_out[index].EpSize) - { - ep_size_out = AUDIO_Handle->stream_out[index].EpSize; - AUDIO_Handle->headphone.interface = AUDIO_Handle->stream_out[index].interface; - AUDIO_Handle->headphone.AltSettings = AUDIO_Handle->stream_out[index].AltSettings; - AUDIO_Handle->headphone.Ep = AUDIO_Handle->stream_out[index].Ep; - AUDIO_Handle->headphone.EpSize = AUDIO_Handle->stream_out[index].EpSize; - AUDIO_Handle->headphone.Poll = AUDIO_Handle->stream_out[index].Poll; - AUDIO_Handle->headphone.supported = 1; - } - } - - if( AUDIO_Handle->stream_in[index].valid == 1) - { - if(ep_size_in < AUDIO_Handle->stream_in[index].EpSize) - { - ep_size_in = AUDIO_Handle->stream_in[index].EpSize; - AUDIO_Handle->microphone.interface = AUDIO_Handle->stream_in[index].interface; - AUDIO_Handle->microphone.AltSettings = AUDIO_Handle->stream_in[index].AltSettings; - AUDIO_Handle->microphone.Ep = AUDIO_Handle->stream_in[index].Ep; - AUDIO_Handle->microphone.EpSize = AUDIO_Handle->stream_in[index].EpSize; - AUDIO_Handle->microphone.Poll = AUDIO_Handle->stream_out[index].Poll; - AUDIO_Handle->microphone.supported = 1; - } - } - } - - if(USBH_AUDIO_FindHIDControl(phost) == USBH_OK) - { - AUDIO_Handle->control.supported = 1; - } - - /* 3rd Step: Find and Parse Audio interfaces */ - USBH_AUDIO_ParseCSDescriptors (phost); - - - /* 4th Step: Open the Audio streaming pipes*/ - if(AUDIO_Handle->headphone.supported == 1) - { - USBH_AUDIO_BuildHeadphonePath (phost); - - AUDIO_Handle->headphone.Pipe = USBH_AllocPipe(phost, AUDIO_Handle->headphone.Ep); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - AUDIO_Handle->headphone.Pipe, - AUDIO_Handle->headphone.Ep, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_ISOC, - AUDIO_Handle->headphone.EpSize); - - USBH_LL_SetToggle (phost, AUDIO_Handle->headphone.Pipe, 0); - - } - - if(AUDIO_Handle->microphone.supported == 1) - { - USBH_AUDIO_BuildMicrophonePath (phost); - AUDIO_Handle->microphone.Pipe = USBH_AllocPipe(phost, AUDIO_Handle->microphone.Ep); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - AUDIO_Handle->microphone.Pipe, - AUDIO_Handle->microphone.Ep, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_ISOC, - AUDIO_Handle->microphone.EpSize); - - USBH_LL_SetToggle (phost, AUDIO_Handle->microphone.Pipe, 0); - } - - if(AUDIO_Handle->control.supported == 1) - { - AUDIO_Handle->control.Pipe = USBH_AllocPipe(phost, AUDIO_Handle->control.Ep); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - AUDIO_Handle->control.Pipe, - AUDIO_Handle->control.Ep, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - AUDIO_Handle->control.EpSize); - - USBH_LL_SetToggle (phost, AUDIO_Handle->control.Pipe, 0); - - } - - AUDIO_Handle->req_state = AUDIO_REQ_INIT; - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - - status = USBH_OK; - } - } - return status; -} - - - -/** - * @brief USBH_AUDIO_InterfaceDeInit - * The function DeInit the Pipes used for the Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - if(AUDIO_Handle->microphone.Pipe != 0x00) - { - USBH_ClosePipe (phost, AUDIO_Handle->microphone.Pipe); - USBH_FreePipe (phost, AUDIO_Handle->microphone.Pipe); - AUDIO_Handle->microphone.Pipe = 0; /* Reset the pipe as Free */ - } - - if( AUDIO_Handle->headphone.Pipe != 0x00) - { - USBH_ClosePipe(phost, AUDIO_Handle->headphone.Pipe); - USBH_FreePipe (phost, AUDIO_Handle->headphone.Pipe); - AUDIO_Handle->headphone.Pipe = 0; /* Reset the pipe as Free */ - } - - if( AUDIO_Handle->control.Pipe != 0x00) - { - USBH_ClosePipe(phost, AUDIO_Handle->control.Pipe); - USBH_FreePipe (phost, AUDIO_Handle->control.Pipe); - AUDIO_Handle->control.Pipe = 0; /* Reset the pipe as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - return USBH_OK ; -} - -/** - * @brief USBH_AUDIO_ClassRequest - * The function is responsible for handling Standard requests - * for Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_ClassRequest(USBH_HandleTypeDef *phost) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef req_status = USBH_BUSY; - - /* Switch AUDIO REQ state machine */ - switch (AUDIO_Handle->req_state) - { - case AUDIO_REQ_INIT: - case AUDIO_REQ_SET_DEFAULT_IN_INTERFACE: - if(AUDIO_Handle->microphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->microphone.interface, - 0); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE; - } - - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE: - if(AUDIO_Handle->headphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->headphone.interface, - 0); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_CS_REQUESTS; - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; - - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = AUDIO_Handle->headphone.asociated_channels; - } - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_CS_REQUESTS; - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case AUDIO_REQ_CS_REQUESTS: - if(USBH_AUDIO_HandleCSRequest (phost) == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_IN_INTERFACE; - } - break; - - case AUDIO_REQ_SET_IN_INTERFACE: - if(AUDIO_Handle->microphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->microphone.interface, - AUDIO_Handle->microphone.AltSettings); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_OUT_INTERFACE; - } - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_OUT_INTERFACE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - case AUDIO_REQ_SET_OUT_INTERFACE: - if(AUDIO_Handle->headphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->headphone.interface, - AUDIO_Handle->headphone.AltSettings); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_IDLE; - } - - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_IDLE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - case AUDIO_REQ_IDLE: - AUDIO_Handle->play_state = AUDIO_PLAYBACK_INIT; - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - status = USBH_OK; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - default: - break; - } - return status; -} - -/** - * @brief USBH_AUDIO_CSRequest - * The function is responsible for handling AC Specific requests for a specific feature and channel - * for Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_CSRequest(USBH_HandleTypeDef *phost, uint8_t feature, uint8_t channel) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef req_status = USBH_BUSY; - - /* Switch AUDIO REQ state machine */ - switch (AUDIO_Handle->cs_req_state) - { - case AUDIO_REQ_GET_VOLUME: - req_status = USBH_AC_GetCur(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_MIN_VOLUME; - AUDIO_Handle->headphone.attribute.volume = LE16(&(AUDIO_Handle->mem[0])); - } - break; - - case AUDIO_REQ_GET_MIN_VOLUME: - req_status = USBH_AC_GetMin(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_MAX_VOLUME; - AUDIO_Handle->headphone.attribute.volumeMin = LE16(&AUDIO_Handle->mem[0]); - } - break; - - case AUDIO_REQ_GET_MAX_VOLUME: - req_status = USBH_AC_GetMax(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_RESOLUTION; - AUDIO_Handle->headphone.attribute.volumeMax = LE16(&AUDIO_Handle->mem[0]); - - if (AUDIO_Handle->headphone.attribute.volumeMax < AUDIO_Handle->headphone.attribute.volumeMin) - { - AUDIO_Handle->headphone.attribute.volumeMax = 0xFF00; - } - } - break; - - case AUDIO_REQ_GET_RESOLUTION: - req_status = USBH_AC_GetRes(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_CS_IDLE; - AUDIO_Handle->headphone.attribute.resolution = LE16(&AUDIO_Handle->mem[0]); - } - break; - - - case AUDIO_REQ_CS_IDLE: - status = USBH_OK; - default: - break; - } - return status; -} - -/** - * @brief USBH_AUDIO_HandleCSRequest - * The function is responsible for handling AC Specific requests for a all features - * and associated channels for Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_HandleCSRequest(USBH_HandleTypeDef *phost) -{ - - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef cs_status = USBH_BUSY; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - cs_status = USBH_AUDIO_CSRequest(phost, - AUDIO_Handle->temp_feature, - AUDIO_Handle->temp_channels); - - if(cs_status != USBH_BUSY) - { - - if(AUDIO_Handle->temp_channels == 1) - { - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = 0; - status = USBH_OK; - } - else - { - AUDIO_Handle->temp_channels--; - } - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - return status; -} - -/** - * @brief USBH_AUDIO_Process - * The function is for managing state machine for Audio data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - if(AUDIO_Handle->headphone.supported == 1) - { - USBH_AUDIO_OutputStream (phost); - } - - if(AUDIO_Handle->microphone.supported == 1) - { - USBH_AUDIO_InputStream (phost); - } - - return status; -} - -/** - * @brief USBH_AUDIO_SOFProcess - * The function is for managing the SOF callback - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_SOFProcess (USBH_HandleTypeDef *phost) -{ - return USBH_OK; -} -/** - * @brief Find IN Audio Streaming interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingIN(USBH_HandleTypeDef *phost) -{ - uint8_t interface, alt_settings; - USBH_StatusTypeDef status = USBH_FAIL ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Look For AUDIOSTREAMING IN interface */ - alt_settings = 0; - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == AC_CLASS)&& - (phost->device.CfgDesc.Itf_Desc[interface].bInterfaceSubClass == USB_SUBCLASS_AUDIOSTREAMING)) - { - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize > 0)) - { - AUDIO_Handle->stream_in[alt_settings].Ep = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - AUDIO_Handle->stream_in[alt_settings].EpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - AUDIO_Handle->stream_in[alt_settings].interface = phost->device.CfgDesc.Itf_Desc[interface].bInterfaceNumber; - AUDIO_Handle->stream_in[alt_settings].AltSettings = phost->device.CfgDesc.Itf_Desc[interface].bAlternateSetting; - AUDIO_Handle->stream_in[alt_settings].Poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bInterval; - AUDIO_Handle->stream_in[alt_settings].valid = 1; - alt_settings++; - } - } - } - - if(alt_settings > 0) - { - status = USBH_OK; - } - - return status; -} - -/** - * @brief Find OUT Audio Streaming interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingOUT(USBH_HandleTypeDef *phost) -{ - uint8_t interface, alt_settings; - USBH_StatusTypeDef status = USBH_FAIL ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Look For AUDIOSTREAMING IN interface */ - alt_settings = 0; - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == AC_CLASS)&& - (phost->device.CfgDesc.Itf_Desc[interface].bInterfaceSubClass == USB_SUBCLASS_AUDIOSTREAMING)) - { - if(((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) == 0x00)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize > 0)) - { - AUDIO_Handle->stream_out[alt_settings].Ep = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - AUDIO_Handle->stream_out[alt_settings].EpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - AUDIO_Handle->stream_out[alt_settings].interface = phost->device.CfgDesc.Itf_Desc[interface].bInterfaceNumber; - AUDIO_Handle->stream_out[alt_settings].AltSettings = phost->device.CfgDesc.Itf_Desc[interface].bAlternateSetting; - AUDIO_Handle->stream_out[alt_settings].Poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bInterval; - AUDIO_Handle->stream_out[alt_settings].valid = 1; - alt_settings++; - } - } - } - - if(alt_settings > 0) - { - status = USBH_OK; - } - - return status; -} - -/** - * @brief Find HID Control interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_FindHIDControl(USBH_HandleTypeDef *phost) -{ - uint8_t interface; - USBH_StatusTypeDef status = USBH_FAIL ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Look For AUDIOCONTROL interface */ - interface = USBH_FindInterface(phost, AC_CLASS, USB_SUBCLASS_AUDIOCONTROL, 0xFF); - if(interface != 0xFF) - { - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == 0x03)&& /*HID*/ - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize > 0)) - { - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) == 0x80) - { - AUDIO_Handle->control.Ep = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - AUDIO_Handle->control.EpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - AUDIO_Handle->control.interface = phost->device.CfgDesc.Itf_Desc[interface].bInterfaceNumber; - AUDIO_Handle->control.Poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bInterval; - AUDIO_Handle->control.supported = 1; - status = USBH_OK; - break; - } - } - } - } - return status; -} - -/** - * @brief Parse AC and interfaces Descriptors - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_ParseCSDescriptors(USBH_HandleTypeDef *phost) -{ - USBH_DescHeader_t *pdesc ; - uint16_t ptr; - int8_t itf_index = 0; - int8_t itf_number = 0; - int8_t alt_setting; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - pdesc = (USBH_DescHeader_t *)(phost->device.CfgDesc_Raw); - ptr = USB_LEN_CFG_DESC; - - AUDIO_Handle->class_desc.FeatureUnitNum = 0; - AUDIO_Handle->class_desc.InputTerminalNum = 0; - AUDIO_Handle->class_desc.OutputTerminalNum = 0; - AUDIO_Handle->class_desc.ASNum = 0; - - while(ptr < phost->device.CfgDesc.wTotalLength) - { - pdesc = USBH_GetNextDesc((void *)pdesc, &ptr); - - switch (pdesc->bDescriptorType) - { - - case USB_DESC_TYPE_INTERFACE: - itf_number = *((uint8_t *)pdesc + 2); - alt_setting = *((uint8_t *)pdesc + 3); - itf_index = USBH_FindInterfaceIndex (phost, itf_number, alt_setting); - break; - - case USB_DESC_TYPE_CS_INTERFACE: - if(itf_number <= phost->device.CfgDesc.bNumInterfaces) - { - - ParseCSDescriptors(&AUDIO_Handle->class_desc, - phost->device.CfgDesc.Itf_Desc[itf_index].bInterfaceSubClass, - (uint8_t *)pdesc); - } - break; - - default: - break; - } - } - return USBH_OK; -} - -/** - * @brief Parse AC interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef ParseCSDescriptors(AUDIO_ClassSpecificDescTypedef *class_desc, - uint8_t ac_subclass, - uint8_t *pdesc) -{ - if(ac_subclass == USB_SUBCLASS_AUDIOCONTROL) - { - switch(pdesc[2]) - { - case UAC_HEADER: - class_desc->cs_desc.HeaderDesc = (AUDIO_HeaderDescTypeDef *)pdesc; - break; - - case UAC_INPUT_TERMINAL: - class_desc->cs_desc.InputTerminalDesc[class_desc->InputTerminalNum++] = (AUDIO_ITDescTypeDef*) pdesc; - break; - - case UAC_OUTPUT_TERMINAL: - class_desc->cs_desc.OutputTerminalDesc[class_desc->OutputTerminalNum++] = (AUDIO_OTDescTypeDef*) pdesc; - break; - - case UAC_FEATURE_UNIT: - class_desc->cs_desc.FeatureUnitDesc[class_desc->FeatureUnitNum++] = (AUDIO_FeatureDescTypeDef*) pdesc; - break; - - case UAC_SELECTOR_UNIT: - class_desc->cs_desc.SelectorUnitDesc[class_desc->SelectorUnitNum++] = (AUDIO_SelectorDescTypeDef*) pdesc; - break; - - case UAC_MIXER_UNIT: - class_desc->cs_desc.MixerUnitDesc[class_desc->MixerUnitNum++] = (AUDIO_MixerDescTypeDef*) pdesc; - break; - - default: - break; - } - } - else if(ac_subclass == USB_SUBCLASS_AUDIOSTREAMING) - { - switch(pdesc[2]) - { - case UAC_AS_GENERAL: - class_desc->as_desc[class_desc->ASNum].GeneralDesc = (AUDIO_ASGeneralDescTypeDef*) pdesc; - break; - case UAC_FORMAT_TYPE: - class_desc->as_desc[class_desc->ASNum++].FormatTypeDesc = (AUDIO_ASFormatTypeDescTypeDef*) pdesc; - break; - default: - break; - } - } - - return USBH_OK; -} - - -/** - * @brief Link a Unit to next associated one - * @param phost: Host handle - * @param UnitID: Unit identifer - * @retval UnitID, Index and Type of the assicated Unit - */ -static int32_t USBH_AUDIO_FindLinkedUnit(USBH_HandleTypeDef *phost, uint8_t UnitID) -{ - uint8_t Index; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Find Feature Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.FeatureUnitNum; Index ++) - { - if(AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[Index]->bSourceID == UnitID) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[Index]->bUnitID; - - return ((UnitID << 16) | (UAC_FEATURE_UNIT << 8) | Index); - } - } - - /* Find Mixer Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.MixerUnitNum; Index ++) - { - if((AUDIO_Handle->class_desc.cs_desc.MixerUnitDesc[Index]->bSourceID0 == UnitID)|| - (AUDIO_Handle->class_desc.cs_desc.MixerUnitDesc[Index]->bSourceID1 == UnitID)) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.MixerUnitDesc[Index]->bUnitID; - - return ((UnitID << 16) | (UAC_MIXER_UNIT << 8) | Index); - } - } - - - /* Find Selector Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.SelectorUnitNum; Index ++) - { - if(AUDIO_Handle->class_desc.cs_desc.SelectorUnitDesc[Index]->bSourceID0 == UnitID) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.SelectorUnitDesc[Index]->bUnitID; - - return ((UnitID << 16) | (UAC_SELECTOR_UNIT << 8) | Index); - } - } - - - /* Find OT Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.OutputTerminalNum; Index ++) - { - if(AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[Index]->bSourceID == UnitID) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[Index]->bTerminalID; - - return ((UnitID << 16) | (UAC_OUTPUT_TERMINAL << 8) | Index); - } - } - - /* No associated Unit found */ - return -1; -} - -/** - * @brief Build full path for Microphone device - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_BuildMicrophonePath(USBH_HandleTypeDef *phost) -{ - uint8_t UnitID = 0, Type, Index; - uint32_t value; - uint8_t terminalIndex; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /*Find microphone IT*/ - for(terminalIndex = 0; terminalIndex < AUDIO_Handle->class_desc.InputTerminalNum; terminalIndex++) - { - if(LE16(AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->wTerminalType) == 0x201) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bTerminalID; - AUDIO_Handle->microphone.asociated_channels = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bNrChannels; - break; - } - } - - do - { - value = USBH_AUDIO_FindLinkedUnit(phost, UnitID); - Index = value & 0xFF; - Type = (value >> 8) & 0xFF; - UnitID = (value >> 16) & 0xFF; - - switch (Type) - { - case UAC_FEATURE_UNIT: - AUDIO_Handle->microphone.asociated_feature = Index; - break; - - case UAC_MIXER_UNIT: - AUDIO_Handle->microphone.asociated_mixer = Index; - break; - - case UAC_SELECTOR_UNIT: - AUDIO_Handle->microphone.asociated_selector = Index; - break; - - case UAC_OUTPUT_TERMINAL: - AUDIO_Handle->microphone.asociated_terminal = Index; - break; - } - } - while ((Type != UAC_OUTPUT_TERMINAL) && (value > 0)); - - - - return USBH_OK; -} - -/** - * @brief Build full path for Headphone device - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_BuildHeadphonePath(USBH_HandleTypeDef *phost) -{ - uint8_t UnitID = 0, Type, Index; - uint32_t value; - uint8_t terminalIndex; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /*Find association betwen audio streaming and microphone*/ - for(terminalIndex = 0; terminalIndex < AUDIO_Handle->class_desc.InputTerminalNum; terminalIndex++) - { - if(LE16(AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->wTerminalType) == 0x101) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bTerminalID; - AUDIO_Handle->headphone.asociated_channels = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bNrChannels; - break; - } - } - - for(Index = 0; Index < AUDIO_Handle->class_desc.ASNum; Index++) - { - if(AUDIO_Handle->class_desc.as_desc[Index].GeneralDesc->bTerminalLink == UnitID) - { - AUDIO_Handle->headphone.asociated_as = Index; - break; - } - } - - do - { - value = USBH_AUDIO_FindLinkedUnit(phost, UnitID); - Index = value & 0xFF; - Type = (value >> 8) & 0xFF; - UnitID = (value >> 16) & 0xFF; - - switch (Type) - { - case UAC_FEATURE_UNIT: - AUDIO_Handle->headphone.asociated_feature = Index; - break; - - case UAC_MIXER_UNIT: - AUDIO_Handle->headphone.asociated_mixer = Index; - break; - - case UAC_SELECTOR_UNIT: - AUDIO_Handle->headphone.asociated_selector = Index; - break; - - case UAC_OUTPUT_TERMINAL: - AUDIO_Handle->headphone.asociated_terminal = Index; - if(LE16(AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[Index]->wTerminalType) != 0x103) - { - return USBH_OK; - } - break; - } - } - while ((Type != UAC_OUTPUT_TERMINAL) && (value > 0)); - - return USBH_FAIL; -} - - -/** - * @brief Handle Set Cur request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_SetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue,wIndex,wLength; - uint8_t UnitID,InterfaceNum; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - } - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_SET_CUR; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - -/** - * @brief Handle Get Cur request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0,wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_CUR; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - - -/** - * @brief Handle Get Max request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetMax(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0, wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_MAX; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - - - -/** - * @brief Handle Get Res request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetRes(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0, wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_RES; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - -/** - * @brief Handle Get Min request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetMin(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0, wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_MIN; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - -/** - * @brief Handle Set Endpoint Controls Request - * @param phost: Host handle - * @param Ep: Endpoint address - * @param buf: pointer to data - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_SetEndpointControls(USBH_HandleTypeDef *phost, - uint8_t Ep, - uint8_t *buff) -{ - uint16_t wValue, wIndex, wLength; - - - wValue = SAMPLING_FREQ_CONTROL << 8; - wIndex = Ep; - wLength = 3; /*length of the frequency parameter*/ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_ENDPOINT | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_SET_CUR; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)buff, wLength )); - -} - -/** - * @brief Handle Input stream process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_InputStream (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - - return status; -} - -/** - * @brief Handle HID Control process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_Control (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - uint16_t attribute = 0; - - - switch(AUDIO_Handle->control_state) - { - case AUDIO_CONTROL_INIT: - if((phost->Timer & 1) == 0) - { - AUDIO_Handle->control.timer = phost->Timer; - USBH_InterruptReceiveData(phost, - (uint8_t *)(AUDIO_Handle->mem), - AUDIO_Handle->control.EpSize, - AUDIO_Handle->control.Pipe); - - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = AUDIO_Handle->headphone.asociated_channels; - - AUDIO_Handle->control_state = AUDIO_CONTROL_CHANGE ; - } - break; - case AUDIO_CONTROL_CHANGE: - if(USBH_LL_GetURBState(phost , AUDIO_Handle->control.Pipe) == USBH_URB_DONE) - { - attribute = LE16(&AUDIO_Handle->mem[0]); - if(USBH_AUDIO_SetControlAttribute (phost, attribute) == USBH_BUSY) - { - break; - } - } - - if(( phost->Timer - AUDIO_Handle->control.timer) >= AUDIO_Handle->control.Poll) - { - AUDIO_Handle->control.timer = phost->Timer; - - USBH_InterruptReceiveData(phost, - (uint8_t *)(AUDIO_Handle->mem), - AUDIO_Handle->control.EpSize, - AUDIO_Handle->control.Pipe); - - } - break; - - case AUDIO_CONTROL_VOLUME_UP: - if( USBH_AUDIO_SetControlAttribute (phost, 1) == USBH_OK) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - status = USBH_OK; - } - break; - - case AUDIO_CONTROL_VOLUME_DOWN: - if( USBH_AUDIO_SetControlAttribute (phost, 2) == USBH_OK) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - status = USBH_OK; - } - break; - - case AUDIO_CONTROL_IDLE: - default: - break; - } - - return status; -} - -/** - * @brief Handle Output stream process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_OutputStream (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - uint8_t *buff; - - - switch(AUDIO_Handle->play_state) - { - case AUDIO_PLAYBACK_INIT: - - if( AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->bSamFreqType == 0) - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_SET_EP_FREQ; - } - else - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_SET_EP; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - break; - - case AUDIO_PLAYBACK_SET_EP_FREQ: - - buff = (uint8_t*)AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[0]; - - status = USBH_AUDIO_SetEndpointControls(phost, AUDIO_Handle->headphone.Ep, buff); - if(status == USBH_OK) - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - } - break; - - case AUDIO_PLAYBACK_SET_EP: - buff = (uint8_t *)&AUDIO_Handle->headphone.frequency; - status = USBH_AUDIO_SetEndpointControls(phost,AUDIO_Handle->headphone.Ep, buff); - if(status == USBH_OK) - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - USBH_AUDIO_FrequencySet(phost); - } - break; - case AUDIO_PLAYBACK_IDLE: -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - status = USBH_OK; - break; - - case AUDIO_PLAYBACK_PLAY: - USBH_AUDIO_Transmit(phost); - status = USBH_OK; - break; - - default: - break; - } - - return status; -} - -/** - * @brief Handle Transmission process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_Transmit (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - switch(AUDIO_Handle->processing_state) - { - case AUDIO_DATA_START_OUT: - /* Sync with start of Even Frame */ - if((phost->Timer & 1) == 0) - { - AUDIO_Handle->headphone.timer = phost->Timer; - AUDIO_Handle->processing_state = AUDIO_DATA_OUT; - USBH_IsocSendData(phost, - AUDIO_Handle->headphone.buf, - AUDIO_Handle->headphone.frame_length, - AUDIO_Handle->headphone.Pipe); - - AUDIO_Handle->headphone.partial_ptr = AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.global_ptr = AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.cbuf = AUDIO_Handle->headphone.buf; - - } - break; - - case AUDIO_DATA_OUT: - if((USBH_LL_GetURBState(phost , AUDIO_Handle->headphone.Pipe) == USBH_URB_DONE)&& - (( phost->Timer - AUDIO_Handle->headphone.timer) >= AUDIO_Handle->headphone.Poll)) - { - AUDIO_Handle->headphone.timer = phost->Timer; - - if(AUDIO_Handle->control.supported == 1) - { - USBH_AUDIO_Control (phost); - } - - if(AUDIO_Handle->headphone.global_ptr <= AUDIO_Handle->headphone.total_length) - { - USBH_IsocSendData(phost, - AUDIO_Handle->headphone.cbuf, - AUDIO_Handle->headphone.frame_length, - AUDIO_Handle->headphone.Pipe); - - AUDIO_Handle->headphone.cbuf += AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.partial_ptr += AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.global_ptr += AUDIO_Handle->headphone.frame_length; - } - else - { - AUDIO_Handle->headphone.partial_ptr = 0xFFFFFFFF; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - } - } - break; - } - return status; -} - -/** - * @brief USBH_AUDIO_SetFrequency - * Set Audio sampling parameters - * @param phost: Host handle - * @param SampleRate: Sample Rate - * @param NbrChannels: Number of Channels - * @param BitPerSample: Bit Per Sample - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_SetFrequency (USBH_HandleTypeDef *phost, - uint16_t SampleRate, - uint8_t NbrChannels, - uint8_t BitPerSample) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - AUDIO_HandleTypeDef *AUDIO_Handle; - uint8_t index; - uint8_t change_freq = FALSE; - uint32_t freq_min, freq_max; - uint8_t num_supported_freq; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_IDLE) - { - - if(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->bSamFreqType == 0) - { - freq_min = LE24(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[0]); - freq_max = LE24(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[1]); - - if(( SampleRate >= freq_min)&& (SampleRate <= freq_max)) - { - change_freq = TRUE; - } - } - else - { - - num_supported_freq = (AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->bLength - 8)/3; - - - for(index = 0; index < num_supported_freq; index++) - { - if(SampleRate == LE24(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[index])) - { - change_freq = TRUE; - break; - } - } - } - - if(change_freq == TRUE) - { - AUDIO_Handle->headphone.frequency = SampleRate; - AUDIO_Handle->headphone.frame_length = (SampleRate * BitPerSample * NbrChannels) / 8000; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_SET_EP; - Status = USBH_OK; - - } - } - } - return Status; -} - -/** - * @brief USBH_AUDIO_Play - * Start playback process - * @param phost: Host handle - * @param buf: pointer to raw audio data - * @param length: total length of the audio data - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Play (USBH_HandleTypeDef *phost, uint8_t *buf, uint32_t length) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_IDLE) - { - AUDIO_Handle->headphone.buf = buf; - AUDIO_Handle->headphone.total_length = length; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_PLAY; - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - AUDIO_Handle->processing_state = AUDIO_DATA_START_OUT; - Status = USBH_OK; - } - } - return Status; -} - -/** - * @brief USBH_AUDIO_Pause - * Stop the playback process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Stop (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - Status = USBH_AUDIO_Suspend(phost); - return Status; -} - -/** - * @brief USBH_AUDIO_Suspend - * Suspend the playback process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Suspend (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_IDLE; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - Status = USBH_OK; - } - } - return Status; -} -/** - * @brief USBH_AUDIO_Resume - * Resume the playback process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Resume (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_IDLE) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_PLAY; - } - } - return Status; -} -/** - * @brief USBH_AUDIO_GetOutOffset - * return the current buffer pointer for OUT proces - * @param phost: Host handle - * @retval USBH Status - */ -int32_t USBH_AUDIO_GetOutOffset (USBH_HandleTypeDef *phost) -{ - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - return AUDIO_Handle->headphone.partial_ptr; - } - } - return -1; -} - -/** - * @brief USBH_AUDIO_ChangeOutBuffer - * Change audio data buffer address - * @param phost: Host handle - * @param buf: buffer address - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_ChangeOutBuffer (USBH_HandleTypeDef *phost, uint8_t *buf) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - if(AUDIO_Handle->headphone.buf <= buf) - { - AUDIO_Handle->headphone.cbuf = buf; - if ( AUDIO_Handle->headphone.buf == buf) - { - AUDIO_Handle->headphone.partial_ptr = 0; - } - Status = USBH_OK; - } - } - } - return Status; -} - -/** - * @brief USBH_AUDIO_SetControlAttribute - * Set Control Attribute - * @param phost: Host handle - * @param attrib: control attribute - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_SetControlAttribute (USBH_HandleTypeDef *phost, uint8_t attrib) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - - AUDIO_Handle = phost->pActiveClass->pData; - - switch (attrib) - { - case 0x01: - AUDIO_Handle->headphone.attribute.volume += AUDIO_Handle->headphone.attribute.resolution; - break; - - case 0x02: - AUDIO_Handle->headphone.attribute.volume -= AUDIO_Handle->headphone.attribute.resolution; - break; - - } - - if(AUDIO_Handle->headphone.attribute.volume > AUDIO_Handle->headphone.attribute.volumeMax) - { - AUDIO_Handle->headphone.attribute.volume =AUDIO_Handle->headphone.attribute.volumeMax; - } - - if(AUDIO_Handle->headphone.attribute.volume < AUDIO_Handle->headphone.attribute.volumeMin) - { - AUDIO_Handle->headphone.attribute.volume =AUDIO_Handle->headphone.attribute.volumeMin; - } - - if(AUDIO_SetVolume (phost, - AUDIO_Handle->temp_feature, - AUDIO_Handle->temp_channels, - AUDIO_Handle->headphone.attribute.volume) != USBH_BUSY) - { - - if(AUDIO_Handle->temp_channels == 1) - { - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = AUDIO_Handle->headphone.asociated_channels; - status = USBH_OK; - } - else - { - AUDIO_Handle->temp_channels--; - } - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; - } - - - return status; -} - - -/** - * @brief USBH_AUDIO_SetVolume - * Set Volume - * @param phost: Host handle - * @param volume: VOLUME_UP/ VOLUME_DOWN - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_SetVolume (USBH_HandleTypeDef *phost, AUDIO_VolumeCtrlTypeDef volume_ctl) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - if((volume_ctl == VOLUME_UP) || (volume_ctl == VOLUME_DOWN)) - { - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - AUDIO_Handle->control_state = (volume_ctl == VOLUME_UP)? AUDIO_CONTROL_VOLUME_UP : AUDIO_CONTROL_VOLUME_DOWN; - return USBH_OK; - } - } - } - return USBH_FAIL; -} -/** - * @brief AUDIO_SetVolume - * Set Volume - * @param phost: Host handle - * @param feature: feature Unit index - * @param channel: channel index - * @param volume: new volume - * @retval USBH Status - */ -static USBH_StatusTypeDef AUDIO_SetVolume (USBH_HandleTypeDef *phost, uint8_t feature, uint8_t channel, uint16_t volume) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - - AUDIO_Handle = phost->pActiveClass->pData; - - AUDIO_Handle->mem[0] = volume; - - status = USBH_AC_SetCur(phost, - UAC_FEATURE_UNIT, - feature, - VOLUME_CONTROL, - channel, - 2); - - return status; -} - -/** - * @brief The function informs user that Settings have been changed - * @param pdev: Selected device - * @retval None - */ -__weak void USBH_AUDIO_FrequencySet(USBH_HandleTypeDef *phost) -{ - -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/CDC/Inc/usbh_cdc.h b/ports/stm32/usbhost/Class/CDC/Inc/usbh_cdc.h deleted file mode 100644 index df11bfddac..0000000000 --- a/ports/stm32/usbhost/Class/CDC/Inc/usbh_cdc.h +++ /dev/null @@ -1,449 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_cdc.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_cdc.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_CDC_CORE_H -#define __USBH_CDC_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_CDC_CLASS -* @{ -*/ - -/** @defgroup USBH_CDC_CORE -* @brief This file is the Header file for USBH_CDC_CORE.c -* @{ -*/ - - - - -/*Communication Class codes*/ -#define USB_CDC_CLASS 0x02 -#define COMMUNICATION_INTERFACE_CLASS_CODE 0x02 - -/*Data Interface Class Codes*/ -#define DATA_INTERFACE_CLASS_CODE 0x0A - -/*Communcation sub class codes*/ -#define RESERVED 0x00 -#define DIRECT_LINE_CONTROL_MODEL 0x01 -#define ABSTRACT_CONTROL_MODEL 0x02 -#define TELEPHONE_CONTROL_MODEL 0x03 -#define MULTICHANNEL_CONTROL_MODEL 0x04 -#define CAPI_CONTROL_MODEL 0x05 -#define ETHERNET_NETWORKING_CONTROL_MODEL 0x06 -#define ATM_NETWORKING_CONTROL_MODEL 0x07 - - -/*Communication Interface Class Control Protocol Codes*/ -#define NO_CLASS_SPECIFIC_PROTOCOL_CODE 0x00 -#define COMMON_AT_COMMAND 0x01 -#define VENDOR_SPECIFIC 0xFF - - -#define CS_INTERFACE 0x24 -#define CDC_PAGE_SIZE_64 0x40 - -/*Class-Specific Request Codes*/ -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 - -#define CDC_SET_AUX_LINE_STATE 0x10 -#define CDC_SET_HOOK_STATE 0x11 -#define CDC_PULSE_SETUP 0x12 -#define CDC_SEND_PULSE 0x13 -#define CDC_SET_PULSE_TIME 0x14 -#define CDC_RING_AUX_JACK 0x15 - -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 - -#define CDC_SET_RINGER_PARMS 0x30 -#define CDC_GET_RINGER_PARMS 0x31 -#define CDC_SET_OPERATION_PARMS 0x32 -#define CDC_GET_OPERATION_PARMS 0x33 -#define CDC_SET_LINE_PARMS 0x34 -#define CDC_GET_LINE_PARMS 0x35 -#define CDC_DIAL_DIGITS 0x36 -#define CDC_SET_UNIT_PARAMETER 0x37 -#define CDC_GET_UNIT_PARAMETER 0x38 -#define CDC_CLEAR_UNIT_PARAMETER 0x39 -#define CDC_GET_PROFILE 0x3A - -#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40 -#define CDC_SET_ETHERNET_POWER_MANAGEMENT_PATTERN FILTER 0x41 -#define CDC_GET_ETHERNET_POWER_MANAGEMENT_PATTERN FILTER 0x42 -#define CDC_SET_ETHERNET_PACKET_FILTER 0x43 -#define CDC_GET_ETHERNET_STATISTIC 0x44 - -#define CDC_SET_ATM_DATA_FORMAT 0x50 -#define CDC_GET_ATM_DEVICE_STATISTICS 0x51 -#define CDC_SET_ATM_DEFAULT_VC 0x52 -#define CDC_GET_ATM_VC_STATISTICS 0x53 - - -/* wValue for SetControlLineState*/ -#define CDC_ACTIVATE_CARRIER_SIGNAL_RTS 0x0002 -#define CDC_DEACTIVATE_CARRIER_SIGNAL_RTS 0x0000 -#define CDC_ACTIVATE_SIGNAL_DTR 0x0001 -#define CDC_DEACTIVATE_SIGNAL_DTR 0x0000 - -#define LINE_CODING_STRUCTURE_SIZE 0x07 -/** - * @} - */ - -/** @defgroup USBH_CDC_CORE_Exported_Types -* @{ -*/ - -/* States for CDC State Machine */ -typedef enum -{ - CDC_IDLE= 0, - CDC_SEND_DATA, - CDC_SEND_DATA_WAIT, - CDC_RECEIVE_DATA, - CDC_RECEIVE_DATA_WAIT, -} -CDC_DataStateTypeDef; - -typedef enum -{ - CDC_IDLE_STATE= 0, - CDC_SET_LINE_CODING_STATE, - CDC_GET_LAST_LINE_CODING_STATE, - CDC_TRANSFER_DATA, - CDC_ERROR_STATE, -} -CDC_StateTypeDef; - - -/*Line coding structure*/ -typedef union _CDC_LineCodingStructure -{ - uint8_t Array[LINE_CODING_STRUCTURE_SIZE]; - - struct - { - - uint32_t dwDTERate; /*Data terminal rate, in bits per second*/ - uint8_t bCharFormat; /*Stop bits - 0 - 1 Stop bit - 1 - 1.5 Stop bits - 2 - 2 Stop bits*/ - uint8_t bParityType; /* Parity - 0 - None - 1 - Odd - 2 - Even - 3 - Mark - 4 - Space*/ - uint8_t bDataBits; /* Data bits (5, 6, 7, 8 or 16). */ - }b; -} -CDC_LineCodingTypeDef; - - - -/* Header Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of this descriptor. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Identifier (ID) of functional - | | | | descriptor. -3 | bcdCDC | 2 | | - | | | Number | USB Class Definitions for - | | | | Communication Devices Specification - | | | | release number in binary-coded - | | | | decimal -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _FunctionalDescriptorHeader -{ - uint8_t bLength; /*Size of this descriptor.*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Header functional descriptor subtype as*/ - uint16_t bcdCDC; /* USB Class Definitions for Communication - Devices Specification release number in - binary-coded decimal. */ -} -CDC_HeaderFuncDesc_TypeDef; -/* Call Management Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of this descriptor. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Call Management functional - | | | | descriptor subtype. -3 | bmCapabilities | 1 | Bitmap | The capabilities that this configuration - | | | | supports: - | | | | D7..D2: RESERVED (Reset to zero) - | | | | D1: 0 - Device sends/receives call - | | | | management information only over - | | | | the Communication Class - | | | | interface. - | | | | 1 - Device can send/receive call - | \ | | management information over a - | | | | Data Class interface. - | | | | D0: 0 - Device does not handle call - | | | | management itself. - | | | | 1 - Device handles call - | | | | management itself. - | | | | The previous bits, in combination, identify - | | | | which call management scenario is used. If bit - | | | | D0 is reset to 0, then the value of bit D1 is - | | | | ignored. In this case, bit D1 is reset to zero for - | | | | future compatibility. -4 | bDataInterface | 1 | Number | Interface number of Data Class interface - | | | | optionally used for call management. -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _CallMgmtFunctionalDescriptor -{ - uint8_t bLength; /*Size of this functional descriptor, in bytes.*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Call Management functional descriptor subtype*/ - uint8_t bmCapabilities; /* bmCapabilities: D0+D1 */ - uint8_t bDataInterface; /*bDataInterface: 1*/ -} -CDC_CallMgmtFuncDesc_TypeDef; -/* Abstract Control Management Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of functional descriptor, in bytes. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Abstract Control Management - | | | | functional descriptor subtype. -3 | bmCapabilities | 1 | Bitmap | The capabilities that this configuration - | | | | supports ((A bit value of zero means that the - | | | | request is not supported.) ) - D7..D4: RESERVED (Reset to zero) - | | | | D3: 1 - Device supports the notification - | | | | Network_Connection. - | | | | D2: 1 - Device supports the request - | | | | Send_Break - | | | | D1: 1 - Device supports the request - | \ | | combination of Set_Line_Coding, - | | | | Set_Control_Line_State, Get_Line_Coding, and the - notification Serial_State. - | | | | D0: 1 - Device supports the request - | | | | combination of Set_Comm_Feature, - | | | | Clear_Comm_Feature, and Get_Comm_Feature. - | | | | The previous bits, in combination, identify - | | | | which requests/notifications are supported by - | | | | a Communication Class interface with the - | | | | SubClass code of Abstract Control Model. -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _AbstractCntrlMgmtFunctionalDescriptor -{ - uint8_t bLength; /*Size of this functional descriptor, in bytes.*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Abstract Control Management functional - descriptor subtype*/ - uint8_t bmCapabilities; /* The capabilities that this configuration supports */ -} -CDC_AbstCntrlMgmtFuncDesc_TypeDef; -/* Union Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of this descriptor. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Union functional - | | | | descriptor subtype. -3 | bMasterInterface | 1 | Constant | The interface number of the - | | | | Communication or Data Class interface -4 | bSlaveInterface0 | 1 | Number | nterface number of first slave or associated - | | | | interface in the union. -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _UnionFunctionalDescriptor -{ - uint8_t bLength; /*Size of this functional descriptor, in bytes*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Union functional descriptor SubType*/ - uint8_t bMasterInterface; /* The interface number of the Communication or - Data Class interface,*/ - uint8_t bSlaveInterface0; /*Interface number of first slave*/ -} -CDC_UnionFuncDesc_TypeDef; - -typedef struct _USBH_CDCInterfaceDesc -{ - CDC_HeaderFuncDesc_TypeDef CDC_HeaderFuncDesc; - CDC_CallMgmtFuncDesc_TypeDef CDC_CallMgmtFuncDesc; - CDC_AbstCntrlMgmtFuncDesc_TypeDef CDC_AbstCntrlMgmtFuncDesc; - CDC_UnionFuncDesc_TypeDef CDC_UnionFuncDesc; -} -CDC_InterfaceDesc_Typedef; - - -/* Structure for CDC process */ -typedef struct -{ - uint8_t NotifPipe; - uint8_t NotifEp; - uint8_t buff[8]; - uint16_t NotifEpSize; -} -CDC_CommItfTypedef ; - -typedef struct -{ - uint8_t InPipe; - uint8_t OutPipe; - uint8_t OutEp; - uint8_t InEp; - uint8_t buff[8]; - uint16_t OutEpSize; - uint16_t InEpSize; -} -CDC_DataItfTypedef ; - -/* Structure for CDC process */ -typedef struct _CDC_Process -{ - CDC_CommItfTypedef CommItf; - CDC_DataItfTypedef DataItf; - uint8_t *pTxData; - uint8_t *pRxData; - uint32_t TxDataLength; - uint32_t RxDataLength; - CDC_InterfaceDesc_Typedef CDC_Desc; - CDC_LineCodingTypeDef LineCoding; - CDC_LineCodingTypeDef *pUserLineCoding; - CDC_StateTypeDef state; - CDC_DataStateTypeDef data_tx_state; - CDC_DataStateTypeDef data_rx_state; - uint8_t Rx_Poll; -} -CDC_HandleTypeDef; - -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_Defines -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_Variables -* @{ -*/ -extern USBH_ClassTypeDef CDC_Class; -#define USBH_CDC_CLASS &CDC_Class - -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_FunctionsPrototype -* @{ -*/ - -USBH_StatusTypeDef USBH_CDC_SetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -USBH_StatusTypeDef USBH_CDC_GetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -USBH_StatusTypeDef USBH_CDC_Transmit(USBH_HandleTypeDef *phost, - uint8_t *pbuff, - uint32_t length); - -USBH_StatusTypeDef USBH_CDC_Receive(USBH_HandleTypeDef *phost, - uint8_t *pbuff, - uint32_t length); - - -uint16_t USBH_CDC_GetLastReceivedDataSize(USBH_HandleTypeDef *phost); - -USBH_StatusTypeDef USBH_CDC_Stop(USBH_HandleTypeDef *phost); - -void USBH_CDC_LineCodingChanged(USBH_HandleTypeDef *phost); - -void USBH_CDC_TransmitCallback(USBH_HandleTypeDef *phost); - -void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost); - -/** -* @} -*/ - - -#endif /* __USBH_CDC_CORE_H */ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/CDC/Src/usbh_cdc.c b/ports/stm32/usbhost/Class/CDC/Src/usbh_cdc.c deleted file mode 100644 index 250e1fc7bf..0000000000 --- a/ports/stm32/usbhost/Class/CDC/Src/usbh_cdc.c +++ /dev/null @@ -1,755 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_cdc.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the CDC Layer Handlers for USB Host CDC class. - * - * @verbatim - * - * =================================================================== - * CDC Class Description - * =================================================================== - * This module manages the MSC class V1.11 following the "Device Class Definition - * for Human Interface Devices (CDC) Version 1.11 Jun 27, 2001". - * This driver implements the following aspects of the specification: - * - The Boot Interface Subclass - * - The Mouse and Keyboard protocols - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_cdc.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_CDC_CLASS -* @{ -*/ - -/** @defgroup USBH_CDC_CORE -* @brief This file includes CDC Layer Handlers for USB Host CDC class. -* @{ -*/ - -/** @defgroup USBH_CDC_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Defines -* @{ -*/ -#define USBH_CDC_BUFFER_SIZE 1024 -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_CDC_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_SOFProcess(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_ClassRequest (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef GetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -static USBH_StatusTypeDef SetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -static void CDC_ProcessTransmission(USBH_HandleTypeDef *phost); - -static void CDC_ProcessReception(USBH_HandleTypeDef *phost); - -USBH_ClassTypeDef CDC_Class = -{ - "CDC", - USB_CDC_CLASS, - USBH_CDC_InterfaceInit, - USBH_CDC_InterfaceDeInit, - USBH_CDC_ClassRequest, - USBH_CDC_Process, - USBH_CDC_SOFProcess, - NULL, -}; -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Functions -* @{ -*/ - -/** - * @brief USBH_CDC_InterfaceInit - * The function init the CDC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_InterfaceInit (USBH_HandleTypeDef *phost) -{ - - USBH_StatusTypeDef status = USBH_FAIL ; - uint8_t interface; - CDC_HandleTypeDef *CDC_Handle; - - interface = USBH_FindInterface(phost, - COMMUNICATION_INTERFACE_CLASS_CODE, - ABSTRACT_CONTROL_MODEL, - COMMON_AT_COMMAND); - - if(interface == 0xFF) /* No Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for Communication Interface Class.", phost->pActiveClass->Name); - } - else - { - USBH_SelectInterface (phost, interface); - phost->pActiveClass->pData = (CDC_HandleTypeDef *)USBH_malloc (sizeof(CDC_HandleTypeDef)); - CDC_Handle = phost->pActiveClass->pData; - - /*Collect the notification endpoint address and length*/ - if(phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) - { - CDC_Handle->CommItf.NotifEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - CDC_Handle->CommItf.NotifEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - } - - /*Allocate the length for host channel number in*/ - CDC_Handle->CommItf.NotifPipe = USBH_AllocPipe(phost, CDC_Handle->CommItf.NotifEp); - - /* Open pipe for Notification endpoint */ - USBH_OpenPipe (phost, - CDC_Handle->CommItf.NotifPipe, - CDC_Handle->CommItf.NotifEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - CDC_Handle->CommItf.NotifEpSize); - - USBH_LL_SetToggle (phost, CDC_Handle->CommItf.NotifPipe, 0); - - interface = USBH_FindInterface(phost, - DATA_INTERFACE_CLASS_CODE, - RESERVED, - NO_CLASS_SPECIFIC_PROTOCOL_CODE); - - if(interface == 0xFF) /* No Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for Data Interface Class.", phost->pActiveClass->Name); - } - else - { - /*Collect the class specific endpoint address and length*/ - if(phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) - { - CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - } - else - { - CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - } - - if(phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress & 0x80) - { - CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress; - CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize; - } - else - { - CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress; - CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize; - } - - /*Allocate the length for host channel number out*/ - CDC_Handle->DataItf.OutPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.OutEp); - - /*Allocate the length for host channel number in*/ - CDC_Handle->DataItf.InPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.InEp); - - /* Open channel for OUT endpoint */ - USBH_OpenPipe (phost, - CDC_Handle->DataItf.OutPipe, - CDC_Handle->DataItf.OutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - CDC_Handle->DataItf.OutEpSize); - /* Open channel for IN endpoint */ - USBH_OpenPipe (phost, - CDC_Handle->DataItf.InPipe, - CDC_Handle->DataItf.InEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - CDC_Handle->DataItf.InEpSize); - - CDC_Handle->state = CDC_IDLE_STATE; - - USBH_LL_SetToggle (phost, CDC_Handle->DataItf.OutPipe,0); - USBH_LL_SetToggle (phost, CDC_Handle->DataItf.InPipe,0); - status = USBH_OK; - } - } - return status; -} - - - -/** - * @brief USBH_CDC_InterfaceDeInit - * The function DeInit the Pipes used for the CDC class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CDC_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if ( CDC_Handle->CommItf.NotifPipe) - { - USBH_ClosePipe(phost, CDC_Handle->CommItf.NotifPipe); - USBH_FreePipe (phost, CDC_Handle->CommItf.NotifPipe); - CDC_Handle->CommItf.NotifPipe = 0; /* Reset the Channel as Free */ - } - - if ( CDC_Handle->DataItf.InPipe) - { - USBH_ClosePipe(phost, CDC_Handle->DataItf.InPipe); - USBH_FreePipe (phost, CDC_Handle->DataItf.InPipe); - CDC_Handle->DataItf.InPipe = 0; /* Reset the Channel as Free */ - } - - if ( CDC_Handle->DataItf.OutPipe) - { - USBH_ClosePipe(phost, CDC_Handle->DataItf.OutPipe); - USBH_FreePipe (phost, CDC_Handle->DataItf.OutPipe); - CDC_Handle->DataItf.OutPipe = 0; /* Reset the Channel as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - - return USBH_OK; -} - -/** - * @brief USBH_CDC_ClassRequest - * The function is responsible for handling Standard requests - * for CDC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_ClassRequest (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_FAIL ; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - /*Issue the get line coding request*/ - status = GetLineCoding(phost, &CDC_Handle->LineCoding); - if(status == USBH_OK) - { - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - } - return status; -} - - -/** - * @brief USBH_CDC_Process - * The function is for managing state machine for CDC data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef req_status = USBH_OK; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - switch(CDC_Handle->state) - { - - case CDC_IDLE_STATE: - status = USBH_OK; - break; - - case CDC_SET_LINE_CODING_STATE: - req_status = SetLineCoding(phost, CDC_Handle->pUserLineCoding); - - if(req_status == USBH_OK) - { - CDC_Handle->state = CDC_GET_LAST_LINE_CODING_STATE; - } - - else if(req_status != USBH_BUSY) - { - CDC_Handle->state = CDC_ERROR_STATE; - } - break; - - - case CDC_GET_LAST_LINE_CODING_STATE: - req_status = GetLineCoding(phost, &(CDC_Handle->LineCoding)); - - if(req_status == USBH_OK) - { - CDC_Handle->state = CDC_IDLE_STATE; - - if((CDC_Handle->LineCoding.b.bCharFormat == CDC_Handle->pUserLineCoding->b.bCharFormat) && - (CDC_Handle->LineCoding.b.bDataBits == CDC_Handle->pUserLineCoding->b.bDataBits) && - (CDC_Handle->LineCoding.b.bParityType == CDC_Handle->pUserLineCoding->b.bParityType) && - (CDC_Handle->LineCoding.b.dwDTERate == CDC_Handle->pUserLineCoding->b.dwDTERate)) - { - USBH_CDC_LineCodingChanged(phost); - } - } - - else if(req_status != USBH_BUSY) - { - CDC_Handle->state = CDC_ERROR_STATE; - } - - break; - - case CDC_TRANSFER_DATA: - CDC_ProcessTransmission(phost); - CDC_ProcessReception(phost); - break; - - case CDC_ERROR_STATE: - req_status = USBH_ClrFeature(phost, 0x00); - - if(req_status == USBH_OK ) - { - /*Change the state to waiting*/ - CDC_Handle->state = CDC_IDLE_STATE ; - } - break; - - default: - break; - - } - - return status; -} - -/** - * @brief USBH_CDC_SOFProcess - * The function is for managing SOF callback - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_SOFProcess (USBH_HandleTypeDef *phost) -{ - return USBH_OK; -} - - - /** - * @brief USBH_CDC_Stop - * Stop current CDC Transmission - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CDC_Stop(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - CDC_Handle->state = CDC_IDLE_STATE; - - USBH_ClosePipe(phost, CDC_Handle->CommItf.NotifPipe); - USBH_ClosePipe(phost, CDC_Handle->DataItf.InPipe); - USBH_ClosePipe(phost, CDC_Handle->DataItf.OutPipe); - } - return USBH_OK; -} -/** - * @brief This request allows the host to find out the currently - * configured line coding. - * @param pdev: Selected device - * @retval USBH_StatusTypeDef : USB ctl xfer status - */ -static USBH_StatusTypeDef GetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecoding) -{ - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = CDC_GET_LINE_CODING; - phost->Control.setup.b.wValue.w = 0; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE; - - return USBH_CtlReq(phost, linecoding->Array, LINE_CODING_STRUCTURE_SIZE); -} - - -/** - * @brief This request allows the host to specify typical asynchronous - * line-character formatting properties - * This request applies to asynchronous byte stream data class interfaces - * and endpoints - * @param pdev: Selected device - * @retval USBH_StatusTypeDef : USB ctl xfer status - */ -static USBH_StatusTypeDef SetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecodin) -{ - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = CDC_SET_LINE_CODING; - phost->Control.setup.b.wValue.w = 0; - - phost->Control.setup.b.wIndex.w = 0; - - phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE; - - return USBH_CtlReq(phost, linecodin->Array , LINE_CODING_STRUCTURE_SIZE ); -} - -/** -* @brief This function prepares the state before issuing the class specific commands -* @param None -* @retval None -*/ -USBH_StatusTypeDef USBH_CDC_SetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecodin) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - if(phost->gState == HOST_CLASS) - { - CDC_Handle->state = CDC_SET_LINE_CODING_STATE; - CDC_Handle->pUserLineCoding = linecodin; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - } - return USBH_OK; -} - -/** -* @brief This function prepares the state before issuing the class specific commands -* @param None -* @retval None -*/ -USBH_StatusTypeDef USBH_CDC_GetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecodin) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if((phost->gState == HOST_CLASS) ||(phost->gState == HOST_CLASS_REQUEST)) - { - *linecodin = CDC_Handle->LineCoding; - return USBH_OK; - } - else - { - return USBH_FAIL; - } -} - -/** - * @brief This function return last recieved data size - * @param None - * @retval None - */ -uint16_t USBH_CDC_GetLastReceivedDataSize(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - return USBH_LL_GetLastXferSize(phost, CDC_Handle->DataItf.InPipe);; - } - else - { - return 0; - } -} - -/** - * @brief This function prepares the state before issuing the class specific commands - * @param None - * @retval None - */ -USBH_StatusTypeDef USBH_CDC_Transmit(USBH_HandleTypeDef *phost, uint8_t *pbuff, uint32_t length) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if((CDC_Handle->state == CDC_IDLE_STATE) || (CDC_Handle->state == CDC_TRANSFER_DATA)) - { - CDC_Handle->pTxData = pbuff; - CDC_Handle->TxDataLength = length; - CDC_Handle->state = CDC_TRANSFER_DATA; - CDC_Handle->data_tx_state = CDC_SEND_DATA; - Status = USBH_OK; - } - return Status; -} - - -/** -* @brief This function prepares the state before issuing the class specific commands -* @param None -* @retval None -*/ -USBH_StatusTypeDef USBH_CDC_Receive(USBH_HandleTypeDef *phost, uint8_t *pbuff, uint32_t length) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if((CDC_Handle->state == CDC_IDLE_STATE) || (CDC_Handle->state == CDC_TRANSFER_DATA)) - { - CDC_Handle->pRxData = pbuff; - CDC_Handle->RxDataLength = length; - CDC_Handle->state = CDC_TRANSFER_DATA; - CDC_Handle->data_rx_state = CDC_RECEIVE_DATA; - Status = USBH_OK; - } - return Status; -} - -/** -* @brief The function is responsible for sending data to the device -* @param pdev: Selected device -* @retval None -*/ -static void CDC_ProcessTransmission(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - - switch(CDC_Handle->data_tx_state) - { - - case CDC_SEND_DATA: - if(CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize) - { - USBH_BulkSendData (phost, - CDC_Handle->pTxData, - CDC_Handle->DataItf.OutEpSize, - CDC_Handle->DataItf.OutPipe, - 1); - } - else - { - USBH_BulkSendData (phost, - CDC_Handle->pTxData, - CDC_Handle->TxDataLength, - CDC_Handle->DataItf.OutPipe, - 1); - } - - CDC_Handle->data_tx_state = CDC_SEND_DATA_WAIT; - - break; - - case CDC_SEND_DATA_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.OutPipe); - - /*Check the status done for transmssion*/ - if(URB_Status == USBH_URB_DONE ) - { - if(CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize) - { - CDC_Handle->TxDataLength -= CDC_Handle->DataItf.OutEpSize ; - CDC_Handle->pTxData += CDC_Handle->DataItf.OutEpSize; - } - else - { - CDC_Handle->TxDataLength = 0; - } - - if( CDC_Handle->TxDataLength > 0) - { - CDC_Handle->data_tx_state = CDC_SEND_DATA; - } - else - { - CDC_Handle->data_tx_state = CDC_IDLE; - USBH_CDC_TransmitCallback(phost); - - } - } - else if( URB_Status == USBH_URB_NOTREADY ) - { - CDC_Handle->data_tx_state = CDC_SEND_DATA; - } - break; - default: - break; - } -} -/** -* @brief This function responsible for reception of data from the device -* @param pdev: Selected device -* @retval None -*/ - -static void CDC_ProcessReception(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - uint16_t length; - - switch(CDC_Handle->data_rx_state) - { - - case CDC_RECEIVE_DATA: - - USBH_BulkReceiveData (phost, - CDC_Handle->pRxData, - CDC_Handle->DataItf.InEpSize, - CDC_Handle->DataItf.InPipe); - - CDC_Handle->data_rx_state = CDC_RECEIVE_DATA_WAIT; - - break; - - case CDC_RECEIVE_DATA_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.InPipe); - - /*Check the status done for reception*/ - if(URB_Status == USBH_URB_DONE ) - { - length = USBH_LL_GetLastXferSize(phost, CDC_Handle->DataItf.InPipe); - - if(((CDC_Handle->RxDataLength - length) > 0) && (length > CDC_Handle->DataItf.InEpSize)) - { - CDC_Handle->RxDataLength -= length ; - CDC_Handle->pRxData += length; - CDC_Handle->data_rx_state = CDC_RECEIVE_DATA; - } - else - { - CDC_Handle->data_rx_state = CDC_IDLE; - USBH_CDC_ReceiveCallback(phost); - } - } - break; - - default: - break; - } -} - -/** -* @brief The function informs user that data have been received -* @param pdev: Selected device -* @retval None -*/ -__weak void USBH_CDC_TransmitCallback(USBH_HandleTypeDef *phost) -{ - -} - - /** -* @brief The function informs user that data have been sent -* @param pdev: Selected device -* @retval None -*/ -__weak void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost) -{ - -} - - /** -* @brief The function informs user that Settings have been changed -* @param pdev: Selected device -* @retval None -*/ -__weak void USBH_CDC_LineCodingChanged(USBH_HandleTypeDef *phost) -{ - -} - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid.h deleted file mode 100644 index 38302ad0d4..0000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid.h +++ /dev/null @@ -1,341 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_hid.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_HID_H -#define __USBH_HID_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" -#include "usbh_hid_mouse.h" -#include "usbh_hid_keybd.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_CORE - * @brief This file is the Header file for USBH_HID_CORE.c - * @{ - */ - - -/** @defgroup USBH_HID_CORE_Exported_Types - * @{ - */ - -#define HID_MIN_POLL 10 -#define HID_REPORT_SIZE 16 -#define HID_MAX_USAGE 10 -#define HID_MAX_NBR_REPORT_FMT 10 -#define HID_QUEUE_SIZE 10 - -#define HID_ITEM_LONG 0xFE - -#define HID_ITEM_TYPE_MAIN 0x00 -#define HID_ITEM_TYPE_GLOBAL 0x01 -#define HID_ITEM_TYPE_LOCAL 0x02 -#define HID_ITEM_TYPE_RESERVED 0x03 - - -#define HID_MAIN_ITEM_TAG_INPUT 0x08 -#define HID_MAIN_ITEM_TAG_OUTPUT 0x09 -#define HID_MAIN_ITEM_TAG_COLLECTION 0x0A -#define HID_MAIN_ITEM_TAG_FEATURE 0x0B -#define HID_MAIN_ITEM_TAG_ENDCOLLECTION 0x0C - - -#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0x00 -#define HID_GLOBAL_ITEM_TAG_LOG_MIN 0x01 -#define HID_GLOBAL_ITEM_TAG_LOG_MAX 0x02 -#define HID_GLOBAL_ITEM_TAG_PHY_MIN 0x03 -#define HID_GLOBAL_ITEM_TAG_PHY_MAX 0x04 -#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 0x05 -#define HID_GLOBAL_ITEM_TAG_UNIT 0x06 -#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 0x07 -#define HID_GLOBAL_ITEM_TAG_REPORT_ID 0x08 -#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 0x09 -#define HID_GLOBAL_ITEM_TAG_PUSH 0x0A -#define HID_GLOBAL_ITEM_TAG_POP 0x0B - - -#define HID_LOCAL_ITEM_TAG_USAGE 0x00 -#define HID_LOCAL_ITEM_TAG_USAGE_MIN 0x01 -#define HID_LOCAL_ITEM_TAG_USAGE_MAX 0x02 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 0x03 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MIN 0x04 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAX 0x05 -#define HID_LOCAL_ITEM_TAG_STRING_INDEX 0x07 -#define HID_LOCAL_ITEM_TAG_STRING_MIN 0x08 -#define HID_LOCAL_ITEM_TAG_STRING_MAX 0x09 -#define HID_LOCAL_ITEM_TAG_DELIMITER 0x0A - - -/* States for HID State Machine */ -typedef enum -{ - HID_INIT= 0, - HID_IDLE, - HID_SEND_DATA, - HID_BUSY, - HID_GET_DATA, - HID_SYNC, - HID_POLL, - HID_ERROR, -} -HID_StateTypeDef; - -typedef enum -{ - HID_REQ_INIT = 0, - HID_REQ_IDLE, - HID_REQ_GET_REPORT_DESC, - HID_REQ_GET_HID_DESC, - HID_REQ_SET_IDLE, - HID_REQ_SET_PROTOCOL, - HID_REQ_SET_REPORT, - -} -HID_CtlStateTypeDef; - -typedef enum -{ - HID_MOUSE = 0x01, - HID_KEYBOARD = 0x02, - HID_UNKNOWN = 0xFF, -} -HID_TypeTypeDef; - - -typedef struct _HID_ReportData -{ - uint8_t ReportID; - uint8_t ReportType; - uint16_t UsagePage; - uint32_t Usage[HID_MAX_USAGE]; - uint32_t NbrUsage; - uint32_t UsageMin; - uint32_t UsageMax; - int32_t LogMin; - int32_t LogMax; - int32_t PhyMin; - int32_t PhyMax; - int32_t UnitExp; - uint32_t Unit; - uint32_t ReportSize; - uint32_t ReportCnt; - uint32_t Flag; - uint32_t PhyUsage; - uint32_t AppUsage; - uint32_t LogUsage; -} -HID_ReportDataTypeDef; - -typedef struct _HID_ReportIDTypeDef { - uint8_t Size; /* Report size return by the device id */ - uint8_t ReportID; /* Report Id */ - uint8_t Type; /* Report Type (INPUT/OUTPUT/FEATURE) */ -} HID_ReportIDTypeDef; - -typedef struct _HID_CollectionTypeDef -{ - uint32_t Usage; - uint8_t Type; - struct _HID_CollectionTypeDef *NextPtr; -} HID_CollectionTypeDef; - - -typedef struct _HID_AppCollectionTypeDef { - uint32_t Usage; - uint8_t Type; - uint8_t NbrReportFmt; - HID_ReportDataTypeDef ReportData[HID_MAX_NBR_REPORT_FMT]; -} HID_AppCollectionTypeDef; - - -typedef struct _HIDDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdHID; /* indicates what endpoint this descriptor is describing */ - uint8_t bCountryCode; /* specifies the transfer type. */ - uint8_t bNumDescriptors; /* specifies the transfer type. */ - uint8_t bReportDescriptorType; /* Maximum Packet Size this endpoint is capable of sending or receiving */ - uint16_t wItemLength; /* is used to specify the polling interval of certain transfers. */ -} -HID_DescTypeDef; - - -typedef struct -{ - uint8_t *buf; - uint16_t head; - uint16_t tail; - uint16_t size; - uint8_t lock; -} FIFO_TypeDef; - - -/* Structure for HID process */ -typedef struct _HID_Process -{ - uint8_t OutPipe; - uint8_t InPipe; - HID_StateTypeDef state; - uint8_t OutEp; - uint8_t InEp; - HID_CtlStateTypeDef ctl_state; - FIFO_TypeDef fifo; - uint8_t *pData; - uint16_t length; - uint8_t ep_addr; - uint16_t poll; - uint16_t timer; - uint8_t DataReady; - HID_DescTypeDef HID_Desc; - USBH_StatusTypeDef ( * Init)(USBH_HandleTypeDef *phost); -} -HID_HandleTypeDef; - -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_Defines - * @{ - */ - -#define USB_HID_GET_REPORT 0x01 -#define USB_HID_GET_IDLE 0x02 -#define USB_HID_GET_PROTOCOL 0x03 -#define USB_HID_SET_REPORT 0x09 -#define USB_HID_SET_IDLE 0x0A -#define USB_HID_SET_PROTOCOL 0x0B - - - - -/* HID Class Codes */ -#define USB_HID_CLASS 0x03 - -/* Interface Descriptor field values for HID Boot Protocol */ -#define HID_BOOT_CODE 0x01 -#define HID_KEYBRD_BOOT_CODE 0x01 -#define HID_MOUSE_BOOT_CODE 0x02 - - -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_Variables - * @{ - */ -extern USBH_ClassTypeDef HID_Class; -#define USBH_HID_CLASS &HID_Class -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_FunctionsPrototype - * @{ - */ - -USBH_StatusTypeDef USBH_HID_SetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen); - -USBH_StatusTypeDef USBH_HID_GetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen); - -USBH_StatusTypeDef USBH_HID_GetHIDReportDescriptor (USBH_HandleTypeDef *phost, - uint16_t length); - -USBH_StatusTypeDef USBH_HID_GetHIDDescriptor (USBH_HandleTypeDef *phost, - uint16_t length); - -USBH_StatusTypeDef USBH_HID_SetIdle (USBH_HandleTypeDef *phost, - uint8_t duration, - uint8_t reportId); - -USBH_StatusTypeDef USBH_HID_SetProtocol (USBH_HandleTypeDef *phost, - uint8_t protocol); - -void USBH_HID_EventCallback(USBH_HandleTypeDef *phost); - -HID_TypeTypeDef USBH_HID_GetDeviceType(USBH_HandleTypeDef *phost); - -void fifo_init(FIFO_TypeDef * f, uint8_t * buf, uint16_t size); - -uint16_t fifo_read(FIFO_TypeDef * f, void * buf, uint16_t nbytes); - -uint16_t fifo_write(FIFO_TypeDef * f, const void * buf, uint16_t nbytes); - -/** - * @} - */ - - -#endif /* __USBH_HID_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_keybd.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_keybd.h deleted file mode 100644 index dc72ebb26b..0000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_keybd.h +++ /dev/null @@ -1,318 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_keybd.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_hid_keybd.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive -----------------------------------------------*/ -#ifndef __USBH_HID_KEYBD_H -#define __USBH_HID_KEYBD_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" -#include "usbh_hid_keybd.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_KEYBD - * @brief This file is the Header file for USBH_HID_KEYBD.c - * @{ - */ - - -/** @defgroup USBH_HID_KEYBD_Exported_Types - * @{ - */ -#define KEY_NONE 0x00 -#define KEY_ERRORROLLOVER 0x01 -#define KEY_POSTFAIL 0x02 -#define KEY_ERRORUNDEFINED 0x03 -#define KEY_A 0x04 -#define KEY_B 0x05 -#define KEY_C 0x06 -#define KEY_D 0x07 -#define KEY_E 0x08 -#define KEY_F 0x09 -#define KEY_G 0x0A -#define KEY_H 0x0B -#define KEY_I 0x0C -#define KEY_J 0x0D -#define KEY_K 0x0E -#define KEY_L 0x0F -#define KEY_M 0x10 -#define KEY_N 0x11 -#define KEY_O 0x12 -#define KEY_P 0x13 -#define KEY_Q 0x14 -#define KEY_R 0x15 -#define KEY_S 0x16 -#define KEY_T 0x17 -#define KEY_U 0x18 -#define KEY_V 0x19 -#define KEY_W 0x1A -#define KEY_X 0x1B -#define KEY_Y 0x1C -#define KEY_Z 0x1D -#define KEY_1_EXCLAMATION_MARK 0x1E -#define KEY_2_AT 0x1F -#define KEY_3_NUMBER_SIGN 0x20 -#define KEY_4_DOLLAR 0x21 -#define KEY_5_PERCENT 0x22 -#define KEY_6_CARET 0x23 -#define KEY_7_AMPERSAND 0x24 -#define KEY_8_ASTERISK 0x25 -#define KEY_9_OPARENTHESIS 0x26 -#define KEY_0_CPARENTHESIS 0x27 -#define KEY_ENTER 0x28 -#define KEY_ESCAPE 0x29 -#define KEY_BACKSPACE 0x2A -#define KEY_TAB 0x2B -#define KEY_SPACEBAR 0x2C -#define KEY_MINUS_UNDERSCORE 0x2D -#define KEY_EQUAL_PLUS 0x2E -#define KEY_OBRACKET_AND_OBRACE 0x2F -#define KEY_CBRACKET_AND_CBRACE 0x30 -#define KEY_BACKSLASH_VERTICAL_BAR 0x31 -#define KEY_NONUS_NUMBER_SIGN_TILDE 0x32 -#define KEY_SEMICOLON_COLON 0x33 -#define KEY_SINGLE_AND_DOUBLE_QUOTE 0x34 -#define KEY_GRAVE ACCENT AND TILDE 0x35 -#define KEY_COMMA_AND_LESS 0x36 -#define KEY_DOT_GREATER 0x37 -#define KEY_SLASH_QUESTION 0x38 -#define KEY_CAPS LOCK 0x39 -#define KEY_F1 0x3A -#define KEY_F2 0x3B -#define KEY_F3 0x3C -#define KEY_F4 0x3D -#define KEY_F5 0x3E -#define KEY_F6 0x3F -#define KEY_F7 0x40 -#define KEY_F8 0x41 -#define KEY_F9 0x42 -#define KEY_F10 0x43 -#define KEY_F11 0x44 -#define KEY_F12 0x45 -#define KEY_PRINTSCREEN 0x46 -#define KEY_SCROLL LOCK 0x47 -#define KEY_PAUSE 0x48 -#define KEY_INSERT 0x49 -#define KEY_HOME 0x4A -#define KEY_PAGEUP 0x4B -#define KEY_DELETE 0x4C -#define KEY_END1 0x4D -#define KEY_PAGEDOWN 0x4E -#define KEY_RIGHTARROW 0x4F -#define KEY_LEFTARROW 0x50 -#define KEY_DOWNARROW 0x51 -#define KEY_UPARROW 0x52 -#define KEY_KEYPAD_NUM_LOCK_AND_CLEAR 0x53 -#define KEY_KEYPAD_SLASH 0x54 -#define KEY_KEYPAD_ASTERIKS 0x55 -#define KEY_KEYPAD_MINUS 0x56 -#define KEY_KEYPAD_PLUS 0x57 -#define KEY_KEYPAD_ENTER 0x58 -#define KEY_KEYPAD_1_END 0x59 -#define KEY_KEYPAD_2_DOWN_ARROW 0x5A -#define KEY_KEYPAD_3_PAGEDN 0x5B -#define KEY_KEYPAD_4_LEFT_ARROW 0x5C -#define KEY_KEYPAD_5 0x5D -#define KEY_KEYPAD_6_RIGHT_ARROW 0x5E -#define KEY_KEYPAD_7_HOME 0x5F -#define KEY_KEYPAD_8_UP_ARROW 0x60 -#define KEY_KEYPAD_9_PAGEUP 0x61 -#define KEY_KEYPAD_0_INSERT 0x62 -#define KEY_KEYPAD_DECIMAL_SEPARATOR_DELETE 0x63 -#define KEY_NONUS_BACK_SLASH_VERTICAL_BAR 0x64 -#define KEY_APPLICATION 0x65 -#define KEY_POWER 0x66 -#define KEY_KEYPAD_EQUAL 0x67 -#define KEY_F13 0x68 -#define KEY_F14 0x69 -#define KEY_F15 0x6A -#define KEY_F16 0x6B -#define KEY_F17 0x6C -#define KEY_F18 0x6D -#define KEY_F19 0x6E -#define KEY_F20 0x6F -#define KEY_F21 0x70 -#define KEY_F22 0x71 -#define KEY_F23 0x72 -#define KEY_F24 0x73 -#define KEY_EXECUTE 0x74 -#define KEY_HELP 0x75 -#define KEY_MENU 0x76 -#define KEY_SELECT 0x77 -#define KEY_STOP 0x78 -#define KEY_AGAIN 0x79 -#define KEY_UNDO 0x7A -#define KEY_CUT 0x7B -#define KEY_COPY 0x7C -#define KEY_PASTE 0x7D -#define KEY_FIND 0x7E -#define KEY_MUTE 0x7F -#define KEY_VOLUME_UP 0x80 -#define KEY_VOLUME_DOWN 0x81 -#define KEY_LOCKING_CAPS_LOCK 0x82 -#define KEY_LOCKING_NUM_LOCK 0x83 -#define KEY_LOCKING_SCROLL_LOCK 0x84 -#define KEY_KEYPAD_COMMA 0x85 -#define KEY_KEYPAD_EQUAL_SIGN 0x86 -#define KEY_INTERNATIONAL1 0x87 -#define KEY_INTERNATIONAL2 0x88 -#define KEY_INTERNATIONAL3 0x89 -#define KEY_INTERNATIONAL4 0x8A -#define KEY_INTERNATIONAL5 0x8B -#define KEY_INTERNATIONAL6 0x8C -#define KEY_INTERNATIONAL7 0x8D -#define KEY_INTERNATIONAL8 0x8E -#define KEY_INTERNATIONAL9 0x8F -#define KEY_LANG1 0x90 -#define KEY_LANG2 0x91 -#define KEY_LANG3 0x92 -#define KEY_LANG4 0x93 -#define KEY_LANG5 0x94 -#define KEY_LANG6 0x95 -#define KEY_LANG7 0x96 -#define KEY_LANG8 0x97 -#define KEY_LANG9 0x98 -#define KEY_ALTERNATE_ERASE 0x99 -#define KEY_SYSREQ 0x9A -#define KEY_CANCEL 0x9B -#define KEY_CLEAR 0x9C -#define KEY_PRIOR 0x9D -#define KEY_RETURN 0x9E -#define KEY_SEPARATOR 0x9F -#define KEY_OUT 0xA0 -#define KEY_OPER 0xA1 -#define KEY_CLEAR_AGAIN 0xA2 -#define KEY_CRSEL 0xA3 -#define KEY_EXSEL 0xA4 -#define KEY_KEYPAD_00 0xB0 -#define KEY_KEYPAD_000 0xB1 -#define KEY_THOUSANDS_SEPARATOR 0xB2 -#define KEY_DECIMAL_SEPARATOR 0xB3 -#define KEY_CURRENCY_UNIT 0xB4 -#define KEY_CURRENCY_SUB_UNIT 0xB5 -#define KEY_KEYPAD_OPARENTHESIS 0xB6 -#define KEY_KEYPAD_CPARENTHESIS 0xB7 -#define KEY_KEYPAD_OBRACE 0xB8 -#define KEY_KEYPAD_CBRACE 0xB9 -#define KEY_KEYPAD_TAB 0xBA -#define KEY_KEYPAD_BACKSPACE 0xBB -#define KEY_KEYPAD_A 0xBC -#define KEY_KEYPAD_B 0xBD -#define KEY_KEYPAD_C 0xBE -#define KEY_KEYPAD_D 0xBF -#define KEY_KEYPAD_E 0xC0 -#define KEY_KEYPAD_F 0xC1 -#define KEY_KEYPAD_XOR 0xC2 -#define KEY_KEYPAD_CARET 0xC3 -#define KEY_KEYPAD_PERCENT 0xC4 -#define KEY_KEYPAD_LESS 0xC5 -#define KEY_KEYPAD_GREATER 0xC6 -#define KEY_KEYPAD_AMPERSAND 0xC7 -#define KEY_KEYPAD_LOGICAL_AND 0xC8 -#define KEY_KEYPAD_VERTICAL_BAR 0xC9 -#define KEY_KEYPAD_LOGIACL_OR 0xCA -#define KEY_KEYPAD_COLON 0xCB -#define KEY_KEYPAD_NUMBER_SIGN 0xCC -#define KEY_KEYPAD_SPACE 0xCD -#define KEY_KEYPAD_AT 0xCE -#define KEY_KEYPAD_EXCLAMATION_MARK 0xCF -#define KEY_KEYPAD_MEMORY_STORE 0xD0 -#define KEY_KEYPAD_MEMORY_RECALL 0xD1 -#define KEY_KEYPAD_MEMORY_CLEAR 0xD2 -#define KEY_KEYPAD_MEMORY_ADD 0xD3 -#define KEY_KEYPAD_MEMORY_SUBTRACT 0xD4 -#define KEY_KEYPAD_MEMORY_MULTIPLY 0xD5 -#define KEY_KEYPAD_MEMORY_DIVIDE 0xD6 -#define KEY_KEYPAD_PLUSMINUS 0xD7 -#define KEY_KEYPAD_CLEAR 0xD8 -#define KEY_KEYPAD_CLEAR_ENTRY 0xD9 -#define KEY_KEYPAD_BINARY 0xDA -#define KEY_KEYPAD_OCTAL 0xDB -#define KEY_KEYPAD_DECIMAL 0xDC -#define KEY_KEYPAD_HEXADECIMAL 0xDD -#define KEY_LEFTCONTROL 0xE0 -#define KEY_LEFTSHIFT 0xE1 -#define KEY_LEFTALT 0xE2 -#define KEY_LEFT_GUI 0xE3 -#define KEY_RIGHTCONTROL 0xE4 -#define KEY_RIGHTSHIFT 0xE5 -#define KEY_RIGHTALT 0xE6 -#define KEY_RIGHT_GUI 0xE7 - -typedef struct -{ - uint8_t state; - uint8_t lctrl; - uint8_t lshift; - uint8_t lalt; - uint8_t lgui; - uint8_t rctrl; - uint8_t rshift; - uint8_t ralt; - uint8_t rgui; - uint8_t keys[6]; -} -HID_KEYBD_Info_TypeDef; - -USBH_StatusTypeDef USBH_HID_KeybdInit(USBH_HandleTypeDef *phost); -HID_KEYBD_Info_TypeDef *USBH_HID_GetKeybdInfo(USBH_HandleTypeDef *phost); -uint8_t USBH_HID_GetASCIICode(HID_KEYBD_Info_TypeDef *info); - -/** - * @} - */ - -#endif /* __USBH_HID_KEYBD_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_mouse.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_mouse.h deleted file mode 100644 index 3a87d1a2db..0000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_mouse.h +++ /dev/null @@ -1,118 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_mouse.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_hid_mouse.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_HID_MOUSE_H -#define __USBH_HID_MOUSE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_MOUSE - * @brief This file is the Header file for USBH_HID_MOUSE.c - * @{ - */ - - -/** @defgroup USBH_HID_MOUSE_Exported_Types - * @{ - */ - -typedef struct _HID_MOUSE_Info -{ - uint8_t x; - uint8_t y; - uint8_t buttons[3]; -} -HID_MOUSE_Info_TypeDef; - -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_HID_MouseInit(USBH_HandleTypeDef *phost); -HID_MOUSE_Info_TypeDef *USBH_HID_GetMouseInfo(USBH_HandleTypeDef *phost); - -/** - * @} - */ - -#endif /* __USBH_HID_MOUSE_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_parser.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_parser.h deleted file mode 100644 index 0bf5739afb..0000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_parser.h +++ /dev/null @@ -1,96 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_parser.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the header file of the usbh_hid_parser.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -#ifndef _HID_PARSER_H_ -#define _HID_PARSER_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" -#include "usbh_hid_usage.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_PARSER - * @brief This file is the Header file for USBH_HID_PARSER.c - * @{ - */ - - -/** @defgroup USBH_HID_PARSER_Exported_Types - * @{ - */ -typedef struct -{ - uint8_t *data; - uint32_t size; - uint8_t shift; - uint8_t count; - uint8_t sign; - uint32_t logical_min; /*min value device can return*/ - uint32_t logical_max; /*max value device can return*/ - uint32_t physical_min; /*min vale read can report*/ - uint32_t physical_max; /*max value read can report*/ - uint32_t resolution; -} -HID_Report_ItemTypedef; - - -uint32_t HID_ReadItem (HID_Report_ItemTypedef *ri, uint8_t ndx); -uint32_t HID_WriteItem(HID_Report_ItemTypedef *ri, uint32_t value, uint8_t ndx); - - -/** - * @} - */ - -#endif /* _HID_PARSER_H_ */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_usage.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_usage.h deleted file mode 100644 index e1f7762f32..0000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_usage.h +++ /dev/null @@ -1,191 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_keybd.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contain the USAGE page codes - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -#ifndef _HID_USAGE_H_ -#define _HID_USAGE_H_ - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_USAGE - * @brief This file is the Header file for USBH_HID_USAGE.c - * @{ - */ - - -/** @defgroup USBH_HID_USAGE_Exported_Types - * @{ - */ - -/****************************************************/ -/* HID 1.11 usage pages */ -/****************************************************/ - -#define HID_USAGE_PAGE_UNDEFINED uint16_t (0x00) /* Undefined */ -/**** Top level pages */ -#define HID_USAGE_PAGE_GEN_DES uint16_t (0x01) /* Generic Desktop Controls*/ -#define HID_USAGE_PAGE_SIM_CTR uint16_t (0x02) /* Simulation Controls */ -#define HID_USAGE_PAGE_VR_CTR uint16_t (0x03) /* VR Controls */ -#define HID_USAGE_PAGE_SPORT_CTR uint16_t (0x04) /* Sport Controls */ -#define HID_USAGE_PAGE_GAME_CTR uint16_t (0x05) /* Game Controls */ -#define HID_USAGE_PAGE_GEN_DEV uint16_t (0x06) /* Generic Device Controls */ -#define HID_USAGE_PAGE_KEYB uint16_t (0x07) /* Keyboard/Keypad */ -#define HID_USAGE_PAGE_LED uint16_t (0x08) /* LEDs */ -#define HID_USAGE_PAGE_BUTTON uint16_t (0x09) /* Button */ -#define HID_USAGE_PAGE_ORDINAL uint16_t (0x0A) /* Ordinal */ -#define HID_USAGE_PAGE_PHONE uint16_t (0x0B) /* Telephony */ -#define HID_USAGE_PAGE_CONSUMER uint16_t (0x0C) /* Consumer */ -#define HID_USAGE_PAGE_DIGITIZER uint16_t (0x0D) /* Digitizer*/ -/* 0E Reserved */ -#define HID_USAGE_PAGE_PID uint16_t (0x0F) /* PID Page (force feedback and related devices) */ -#define HID_USAGE_PAGE_UNICODE uint16_t (0x10) /* Unicode */ -/* 11-13 Reserved */ -#define HID_USAGE_PAGE_ALNUM_DISP uint16_t (0x14) /* Alphanumeric Display */ -/* 15-1f Reserved */ -/**** END of top level pages */ -/* 25-3f Reserved */ -#define HID_USAGE_PAGE_MEDICAL uint16_t (0x40) /* Medical Instruments */ -/* 41-7F Reserved */ -/*80-83 Monitor pages USB Device Class Definition for Monitor Devices - 84-87 Power pages USB Device Class Definition for Power Devices */ -/* 88-8B Reserved */ -#define HID_USAGE_PAGE_BARCODE uint16_t (0x8C) /* Bar Code Scanner page */ -#define HID_USAGE_PAGE_SCALE uint16_t (0x8D) /* Scale page */ -#define HID_USAGE_PAGE_MSR uint16_t (0x8E) /* Magnetic Stripe Reading (MSR) Devices */ -#define HID_USAGE_PAGE_POS uint16_t (0x8F) /* Reserved Point of Sale pages */ -#define HID_USAGE_PAGE_CAMERA_CTR uint16_t (0x90) /* Camera Control Page */ -#define HID_USAGE_PAGE_ARCADE uint16_t (0x91) /* Arcade Page */ - -/****************************************************/ -/* Usage definitions for the "Generic Decktop" page */ -/****************************************************/ -#define HID_USAGE_UNDEFINED uint16_t (0x00) /* Undefined */ -#define HID_USAGE_POINTER uint16_t (0x01) /* Pointer (Physical Collection) */ -#define HID_USAGE_MOUSE uint16_t (0x02) /* Mouse (Application Collection) */ -/* 03 Reserved */ -#define HID_USAGE_JOYSTICK uint16_t (0x04) /* Joystick (Application Collection) */ -#define HID_USAGE_GAMEPAD uint16_t (0x05) /* Game Pad (Application Collection) */ -#define HID_USAGE_KBD uint16_t (0x06) /* Keyboard (Application Collection) */ -#define HID_USAGE_KEYPAD uint16_t (0x07) /* Keypad (Application Collection) */ -#define HID_USAGE_MAX_CTR uint16_t (0x08) /* Multi-axis Controller (Application Collection) */ -/* 09-2F Reserved */ -#define HID_USAGE_X uint16_t (0x30) /* X (Dynamic Value) */ -#define HID_USAGE_Y uint16_t (0x31) /* Y (Dynamic Value) */ -#define HID_USAGE_Z uint16_t (0x32) /* Z (Dynamic Value) */ -#define HID_USAGE_RX uint16_t (0x33) /* Rx (Dynamic Value) */ -#define HID_USAGE_RY uint16_t (0x34) /* Ry (Dynamic Value) */ -#define HID_USAGE_RZ uint16_t (0x35) /* Rz (Dynamic Value) */ -#define HID_USAGE_SLIDER uint16_t (0x36) /* Slider (Dynamic Value) */ -#define HID_USAGE_DIAL uint16_t (0x37) /* Dial (Dynamic Value) */ -#define HID_USAGE_WHEEL uint16_t (0x38) /* Wheel (Dynamic Value) */ -#define HID_USAGE_HATSW uint16_t (0x39) /* Hat switch (Dynamic Value) */ -#define HID_USAGE_COUNTEDBUF uint16_t (0x3A) /* Counted Buffer (Logical Collection) */ -#define HID_USAGE_BYTECOUNT uint16_t (0x3B) /* Byte Count (Dynamic Value) */ -#define HID_USAGE_MOTIONWAKE uint16_t (0x3C) /* Motion Wakeup (One Shot Control) */ -#define HID_USAGE_START uint16_t (0x3D) /* Start (On/Off Control) */ -#define HID_USAGE_SELECT uint16_t (0x3E) /* Select (On/Off Control) */ -/* 3F Reserved */ -#define HID_USAGE_VX uint16_t (0x40) /* Vx (Dynamic Value) */ -#define HID_USAGE_VY uint16_t (0x41) /* Vy (Dynamic Value) */ -#define HID_USAGE_VZ uint16_t (0x42) /* Vz (Dynamic Value) */ -#define HID_USAGE_VBRX uint16_t (0x43) /* Vbrx (Dynamic Value) */ -#define HID_USAGE_VBRY uint16_t (0x44) /* Vbry (Dynamic Value) */ -#define HID_USAGE_VBRZ uint16_t (0x45) /* Vbrz (Dynamic Value) */ -#define HID_USAGE_VNO uint16_t (0x46) /* Vno (Dynamic Value) */ -#define HID_USAGE_FEATNOTIF uint16_t (0x47) /* Feature Notification (Dynamic Value),(Dynamic Flag) */ -/* 48-7F Reserved */ -#define HID_USAGE_SYSCTL uint16_t (0x80) /* System Control (Application Collection) */ -#define HID_USAGE_PWDOWN uint16_t (0x81) /* System Power Down (One Shot Control) */ -#define HID_USAGE_SLEEP uint16_t (0x82) /* System Sleep (One Shot Control) */ -#define HID_USAGE_WAKEUP uint16_t (0x83) /* System Wake Up (One Shot Control) */ -#define HID_USAGE_CONTEXTM uint16_t (0x84) /* System Context Menu (One Shot Control) */ -#define HID_USAGE_MAINM uint16_t (0x85) /* System Main Menu (One Shot Control) */ -#define HID_USAGE_APPM uint16_t (0x86) /* System App Menu (One Shot Control) */ -#define HID_USAGE_MENUHELP uint16_t (0x87) /* System Menu Help (One Shot Control) */ -#define HID_USAGE_MENUEXIT uint16_t (0x88) /* System Menu Exit (One Shot Control) */ -#define HID_USAGE_MENUSELECT uint16_t (0x89) /* System Menu Select (One Shot Control) */ -#define HID_USAGE_SYSM_RIGHT uint16_t (0x8A) /* System Menu Right (Re-Trigger Control) */ -#define HID_USAGE_SYSM_LEFT uint16_t (0x8B) /* System Menu Left (Re-Trigger Control) */ -#define HID_USAGE_SYSM_UP uint16_t (0x8C) /* System Menu Up (Re-Trigger Control) */ -#define HID_USAGE_SYSM_DOWN uint16_t (0x8D) /* System Menu Down (Re-Trigger Control) */ -#define HID_USAGE_COLDRESET uint16_t (0x8E) /* System Cold Restart (One Shot Control) */ -#define HID_USAGE_WARMRESET uint16_t (0x8F) /* System Warm Restart (One Shot Control) */ -#define HID_USAGE_DUP uint16_t (0x90) /* D-pad Up (On/Off Control) */ -#define HID_USAGE_DDOWN uint16_t (0x91) /* D-pad Down (On/Off Control) */ -#define HID_USAGE_DRIGHT uint16_t (0x92) /* D-pad Right (On/Off Control) */ -#define HID_USAGE_DLEFT uint16_t (0x93) /* D-pad Left (On/Off Control) */ -/* 94-9F Reserved */ -#define HID_USAGE_SYS_DOCK uint16_t (0xA0) /* System Dock (One Shot Control) */ -#define HID_USAGE_SYS_UNDOCK uint16_t (0xA1) /* System Undock (One Shot Control) */ -#define HID_USAGE_SYS_SETUP uint16_t (0xA2) /* System Setup (One Shot Control) */ -#define HID_USAGE_SYS_BREAK uint16_t (0xA3) /* System Break (One Shot Control) */ -#define HID_USAGE_SYS_DBGBRK uint16_t (0xA4) /* System Debugger Break (One Shot Control) */ -#define HID_USAGE_APP_BRK uint16_t (0xA5) /* Application Break (One Shot Control) */ -#define HID_USAGE_APP_DBGBRK uint16_t (0xA6) /* Application Debugger Break (One Shot Control) */ -#define HID_USAGE_SYS_SPKMUTE uint16_t (0xA7) /* System Speaker Mute (One Shot Control) */ -#define HID_USAGE_SYS_HIBERN uint16_t (0xA8) /* System Hibernate (One Shot Control) */ -/* A9-AF Reserved */ -#define HID_USAGE_SYS_SIDPINV uint16_t (0xB0) /* System Display Invert (One Shot Control) */ -#define HID_USAGE_SYS_DISPINT uint16_t (0xB1) /* System Display Internal (One Shot Control) */ -#define HID_USAGE_SYS_DISPEXT uint16_t (0xB2) /* System Display External (One Shot Control) */ -#define HID_USAGE_SYS_DISPBOTH uint16_t (0xB3) /* System Display Both (One Shot Control) */ -#define HID_USAGE_SYS_DISPDUAL uint16_t (0xB4) /* System Display Dual (One Shot Control) */ -#define HID_USAGE_SYS_DISPTGLIE uint16_t (0xB5) /* System Display Toggle Int/Ext (One Shot Control) */ -#define HID_USAGE_SYS_DISP_SWAP uint16_t (0xB6) /* System Display Swap Primary/Secondary (One Shot Control) */ -#define HID_USAGE_SYS_DIPS_LCDA uint16_t (0xB7) /* System Display LCD Autoscale (One Shot Control) */ -/* B8-FFFF Reserved */ - -/** - * @} - */ - -#endif /* _HID_USAGE_H_ */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid.c deleted file mode 100644 index a56f45c5c7..0000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid.c +++ /dev/null @@ -1,800 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the HID Layer Handlers for USB Host HID class. - * - * @verbatim - * - * =================================================================== - * HID Class Description - * =================================================================== - * This module manages the MSC class V1.11 following the "Device Class Definition - * for Human Interface Devices (HID) Version 1.11 Jun 27, 2001". - * This driver implements the following aspects of the specification: - * - The Boot Interface Subclass - * - The Mouse and Keyboard protocols - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" -#include "usbh_hid_parser.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_HID_CLASS -* @{ -*/ - -/** @defgroup USBH_HID_CORE -* @brief This file includes HID Layer Handlers for USB Host HID class. -* @{ -*/ - -/** @defgroup USBH_HID_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Variables -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_HID_InterfaceInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_InterfaceDeInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_ClassRequest(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_Process(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_SOFProcess(USBH_HandleTypeDef *phost); -static void USBH_HID_ParseHIDDesc (HID_DescTypeDef *desc, uint8_t *buf); - -extern USBH_StatusTypeDef USBH_HID_MouseInit(USBH_HandleTypeDef *phost); -extern USBH_StatusTypeDef USBH_HID_KeybdInit(USBH_HandleTypeDef *phost); - -USBH_ClassTypeDef HID_Class = -{ - "HID", - USB_HID_CLASS, - USBH_HID_InterfaceInit, - USBH_HID_InterfaceDeInit, - USBH_HID_ClassRequest, - USBH_HID_Process, - USBH_HID_SOFProcess, - NULL, -}; -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Functions -* @{ -*/ - - -/** - * @brief USBH_HID_InterfaceInit - * The function init the HID class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_InterfaceInit (USBH_HandleTypeDef *phost) -{ - uint8_t max_ep; - uint8_t num = 0; - uint8_t interface; - - USBH_StatusTypeDef status = USBH_FAIL ; - HID_HandleTypeDef *HID_Handle; - - interface = USBH_FindInterface(phost, phost->pActiveClass->ClassCode, HID_BOOT_CODE, 0xFF); - - if(interface == 0xFF) /* No Valid Interface */ - { - status = USBH_FAIL; - USBH_DbgLog ("Cannot Find the interface for %s class.", phost->pActiveClass->Name); - } - else - { - USBH_SelectInterface (phost, interface); - phost->pActiveClass->pData = (HID_HandleTypeDef *)USBH_malloc (sizeof(HID_HandleTypeDef)); - HID_Handle = phost->pActiveClass->pData; - HID_Handle->state = HID_ERROR; - - /*Decode Bootclass Protocl: Mouse or Keyboard*/ - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol == HID_KEYBRD_BOOT_CODE) - { - USBH_UsrLog ("KeyBoard device found!"); - HID_Handle->Init = USBH_HID_KeybdInit; - } - else if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol == HID_MOUSE_BOOT_CODE) - { - USBH_UsrLog ("Mouse device found!"); - HID_Handle->Init = USBH_HID_MouseInit; - } - else - { - USBH_UsrLog ("Protocol not supported."); - return USBH_FAIL; - } - - HID_Handle->state = HID_INIT; - HID_Handle->ctl_state = HID_REQ_INIT; - HID_Handle->ep_addr = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress; - HID_Handle->length = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].wMaxPacketSize; - HID_Handle->poll = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bInterval ; - - if (HID_Handle->poll < HID_MIN_POLL) - { - HID_Handle->poll = HID_MIN_POLL; - } - - /* Check fo available number of endpoints */ - /* Find the number of EPs in the Interface Descriptor */ - /* Choose the lower number in order not to overrun the buffer allocated */ - max_ep = ( (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bNumEndpoints <= USBH_MAX_NUM_ENDPOINTS) ? - phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bNumEndpoints : - USBH_MAX_NUM_ENDPOINTS); - - - /* Decode endpoint IN and OUT address from interface descriptor */ - for ( ;num < max_ep; num++) - { - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[num].bEndpointAddress & 0x80) - { - HID_Handle->InEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[num].bEndpointAddress); - HID_Handle->InPipe =\ - USBH_AllocPipe(phost, HID_Handle->InEp); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - HID_Handle->InPipe, - HID_Handle->InEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - HID_Handle->length); - - USBH_LL_SetToggle (phost, HID_Handle->InPipe, 0); - - } - else - { - HID_Handle->OutEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[num].bEndpointAddress); - HID_Handle->OutPipe =\ - USBH_AllocPipe(phost, HID_Handle->OutEp); - - /* Open pipe for OUT endpoint */ - USBH_OpenPipe (phost, - HID_Handle->OutPipe, - HID_Handle->OutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - HID_Handle->length); - - USBH_LL_SetToggle (phost, HID_Handle->OutPipe, 0); - } - - } - status = USBH_OK; - } - return status; -} - -/** - * @brief USBH_HID_InterfaceDeInit - * The function DeInit the Pipes used for the HID class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_InterfaceDeInit (USBH_HandleTypeDef *phost ) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - if(HID_Handle->InPipe != 0x00) - { - USBH_ClosePipe (phost, HID_Handle->InPipe); - USBH_FreePipe (phost, HID_Handle->InPipe); - HID_Handle->InPipe = 0; /* Reset the pipe as Free */ - } - - if(HID_Handle->OutPipe != 0x00) - { - USBH_ClosePipe(phost, HID_Handle->OutPipe); - USBH_FreePipe (phost, HID_Handle->OutPipe); - HID_Handle->OutPipe = 0; /* Reset the pipe as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - } - - return USBH_OK; -} - -/** - * @brief USBH_HID_ClassRequest - * The function is responsible for handling Standard requests - * for HID class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_ClassRequest(USBH_HandleTypeDef *phost) -{ - - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef classReqStatus = USBH_BUSY; - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - /* Switch HID state machine */ - switch (HID_Handle->ctl_state) - { - case HID_REQ_INIT: - case HID_REQ_GET_HID_DESC: - - /* Get HID Desc */ - if (USBH_HID_GetHIDDescriptor (phost, USB_HID_DESC_SIZE)== USBH_OK) - { - - USBH_HID_ParseHIDDesc(&HID_Handle->HID_Desc, phost->device.Data); - HID_Handle->ctl_state = HID_REQ_GET_REPORT_DESC; - } - - break; - case HID_REQ_GET_REPORT_DESC: - - - /* Get Report Desc */ - if (USBH_HID_GetHIDReportDescriptor(phost, HID_Handle->HID_Desc.wItemLength) == USBH_OK) - { - /* The decriptor is available in phost->device.Data */ - - HID_Handle->ctl_state = HID_REQ_SET_IDLE; - } - - break; - - case HID_REQ_SET_IDLE: - - classReqStatus = USBH_HID_SetIdle (phost, 0, 0); - - /* set Idle */ - if (classReqStatus == USBH_OK) - { - HID_Handle->ctl_state = HID_REQ_SET_PROTOCOL; - } - else if(classReqStatus == USBH_NOT_SUPPORTED) - { - HID_Handle->ctl_state = HID_REQ_SET_PROTOCOL; - } - break; - - case HID_REQ_SET_PROTOCOL: - /* set protocol */ - if (USBH_HID_SetProtocol (phost, 0) == USBH_OK) - { - HID_Handle->ctl_state = HID_REQ_IDLE; - - /* all requests performed*/ - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - status = USBH_OK; - } - break; - - case HID_REQ_IDLE: - default: - break; - } - - return status; -} - -/** - * @brief USBH_HID_Process - * The function is for managing state machine for HID data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_Process(USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_OK; - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - switch (HID_Handle->state) - { - case HID_INIT: - HID_Handle->Init(phost); - case HID_IDLE: - if(USBH_HID_GetReport (phost, - 0x01, - 0, - HID_Handle->pData, - HID_Handle->length) == USBH_OK) - { - - fifo_write(&HID_Handle->fifo, HID_Handle->pData, HID_Handle->length); - HID_Handle->state = HID_SYNC; - } - - break; - - case HID_SYNC: - - /* Sync with start of Even Frame */ - if(phost->Timer & 1) - { - HID_Handle->state = HID_GET_DATA; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - break; - - case HID_GET_DATA: - - USBH_InterruptReceiveData(phost, - HID_Handle->pData, - HID_Handle->length, - HID_Handle->InPipe); - - HID_Handle->state = HID_POLL; - HID_Handle->timer = phost->Timer; - HID_Handle->DataReady = 0; - break; - - case HID_POLL: - - if(USBH_LL_GetURBState(phost , HID_Handle->InPipe) == USBH_URB_DONE) - { - if(HID_Handle->DataReady == 0) - { - fifo_write(&HID_Handle->fifo, HID_Handle->pData, HID_Handle->length); - HID_Handle->DataReady = 1; - USBH_HID_EventCallback(phost); -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - else if(USBH_LL_GetURBState(phost , HID_Handle->InPipe) == USBH_URB_STALL) /* IN Endpoint Stalled */ - { - - /* Issue Clear Feature on interrupt IN endpoint */ - if(USBH_ClrFeature(phost, - HID_Handle->ep_addr) == USBH_OK) - { - /* Change state to issue next IN token */ - HID_Handle->state = HID_GET_DATA; - } - } - - - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_HID_SOFProcess - * The function is for managing the SOF Process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_SOFProcess(USBH_HandleTypeDef *phost) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - if(HID_Handle->state == HID_POLL) - { - if(( phost->Timer - HID_Handle->timer) >= HID_Handle->poll) - { - HID_Handle->state = HID_GET_DATA; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - return USBH_OK; -} - -/** -* @brief USBH_Get_HID_ReportDescriptor - * Issue report Descriptor command to the device. Once the response - * received, parse the report descriptor and update the status. - * @param phost: Host handle - * @param Length : HID Report Descriptor Length - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_GetHIDReportDescriptor (USBH_HandleTypeDef *phost, - uint16_t length) -{ - - USBH_StatusTypeDef status; - - status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD, - USB_DESC_HID_REPORT, - phost->device.Data, - length); - - /* HID report descriptor is available in phost->device.Data. - In case of USB Boot Mode devices for In report handling , - HID report descriptor parsing is not required. - In case, for supporting Non-Boot Protocol devices and output reports, - user may parse the report descriptor*/ - - - return status; -} - -/** - * @brief USBH_Get_HID_Descriptor - * Issue HID Descriptor command to the device. Once the response - * received, parse the report descriptor and update the status. - * @param phost: Host handle - * @param Length : HID Descriptor Length - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_GetHIDDescriptor (USBH_HandleTypeDef *phost, - uint16_t length) -{ - - USBH_StatusTypeDef status; - - status = USBH_GetDescriptor( phost, - USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD, - USB_DESC_HID, - phost->device.Data, - length); - - return status; -} - -/** - * @brief USBH_Set_Idle - * Set Idle State. - * @param phost: Host handle - * @param duration: Duration for HID Idle request - * @param reportId : Targetted report ID for Set Idle request - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_SetIdle (USBH_HandleTypeDef *phost, - uint8_t duration, - uint8_t reportId) -{ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_SET_IDLE; - phost->Control.setup.b.wValue.w = (duration << 8 ) | reportId; - - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - - return USBH_CtlReq(phost, 0 , 0 ); -} - - -/** - * @brief USBH_HID_Set_Report - * Issues Set Report - * @param phost: Host handle - * @param reportType : Report type to be sent - * @param reportId : Targetted report ID for Set Report request - * @param reportBuff : Report Buffer - * @param reportLen : Length of data report to be send - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_SetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen) -{ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_SET_REPORT; - phost->Control.setup.b.wValue.w = (reportType << 8 ) | reportId; - - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = reportLen; - - return USBH_CtlReq(phost, reportBuff , reportLen ); -} - - -/** - * @brief USBH_HID_GetReport - * retreive Set Report - * @param phost: Host handle - * @param reportType : Report type to be sent - * @param reportId : Targetted report ID for Set Report request - * @param reportBuff : Report Buffer - * @param reportLen : Length of data report to be send - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_GetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen) -{ - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_GET_REPORT; - phost->Control.setup.b.wValue.w = (reportType << 8 ) | reportId; - - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = reportLen; - - return USBH_CtlReq(phost, reportBuff , reportLen ); -} - -/** - * @brief USBH_Set_Protocol - * Set protocol State. - * @param phost: Host handle - * @param protocol : Set Protocol for HID : boot/report protocol - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_SetProtocol(USBH_HandleTypeDef *phost, - uint8_t protocol) -{ - - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_SET_PROTOCOL; - phost->Control.setup.b.wValue.w = protocol != 0 ? 0 : 1; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - - return USBH_CtlReq(phost, 0 , 0 ); - -} - -/** - * @brief USBH_ParseHIDDesc - * This function Parse the HID descriptor - * @param desc: HID Descriptor - * @param buf: Buffer where the source descriptor is available - * @retval None - */ -static void USBH_HID_ParseHIDDesc (HID_DescTypeDef *desc, uint8_t *buf) -{ - - desc->bLength = *(uint8_t *) (buf + 0); - desc->bDescriptorType = *(uint8_t *) (buf + 1); - desc->bcdHID = LE16 (buf + 2); - desc->bCountryCode = *(uint8_t *) (buf + 4); - desc->bNumDescriptors = *(uint8_t *) (buf + 5); - desc->bReportDescriptorType = *(uint8_t *) (buf + 6); - desc->wItemLength = LE16 (buf + 7); -} - -/** - * @brief USBH_HID_GetDeviceType - * Return Device function. - * @param phost: Host handle - * @retval HID function: HID_MOUSE / HID_KEYBOARD - */ -HID_TypeTypeDef USBH_HID_GetDeviceType(USBH_HandleTypeDef *phost) -{ - HID_TypeTypeDef type = HID_UNKNOWN; - - if(phost->gState == HOST_CLASS) - { - - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol \ - == HID_KEYBRD_BOOT_CODE) - { - type = HID_KEYBOARD; - } - else if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol \ - == HID_MOUSE_BOOT_CODE) - { - type= HID_MOUSE; - } - } - return type; -} - -/** - * @brief fifo_init - * Initialize FIFO. - * @param f: Fifo address - * @param buf: Fifo buffer - * @param size: Fifo Size - * @retval none - */ -void fifo_init(FIFO_TypeDef * f, uint8_t * buf, uint16_t size) -{ - f->head = 0; - f->tail = 0; - f->lock = 0; - f->size = size; - f->buf = buf; -} - -/** - * @brief fifo_read - * Read from FIFO. - * @param f: Fifo address - * @param buf: read buffer - * @param nbytes: number of item to read - * @retval number of read items - */ -uint16_t fifo_read(FIFO_TypeDef * f, void * buf, uint16_t nbytes) -{ - uint16_t i; - uint8_t * p; - p = buf; - - if(f->lock == 0) - { - f->lock = 1; - for(i=0; i < nbytes; i++) - { - if( f->tail != f->head ) - { - *p++ = f->buf[f->tail]; - f->tail++; - if( f->tail == f->size ) - { - f->tail = 0; - } - } else - { - f->lock = 0; - return i; - } - } - } - f->lock = 0; - return nbytes; -} - -/** - * @brief fifo_write - * Read from FIFO. - * @param f: Fifo address - * @param buf: read buffer - * @param nbytes: number of item to write - * @retval number of written items - */ -uint16_t fifo_write(FIFO_TypeDef * f, const void * buf, uint16_t nbytes) -{ - uint16_t i; - const uint8_t * p; - p = buf; - if(f->lock == 0) - { - f->lock = 1; - for(i=0; i < nbytes; i++) - { - if( (f->head + 1 == f->tail) || - ( (f->head + 1 == f->size) && (f->tail == 0)) ) - { - f->lock = 0; - return i; - } - else - { - f->buf[f->head] = *p++; - f->head++; - if( f->head == f->size ) - { - f->head = 0; - } - } - } - } - f->lock = 0; - return nbytes; -} - - -/** -* @brief The function is a callback about HID Data events -* @param phost: Selected device -* @retval None -*/ -__weak void USBH_HID_EventCallback(USBH_HandleTypeDef *phost) -{ - -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_keybd.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid_keybd.c deleted file mode 100644 index 79104767bf..0000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_keybd.c +++ /dev/null @@ -1,418 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_keybd.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the application layer for USB Host HID Keyboard handling - * QWERTY and AZERTY Keyboard are supported as per the selection in - * usbh_hid_keybd.h - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid_keybd.h" -#include "usbh_hid_parser.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_HID_CLASS -* @{ -*/ - -/** @defgroup USBH_HID_KEYBD -* @brief This file includes HID Layer Handlers for USB Host HID class. -* @{ -*/ - -/** @defgroup USBH_HID_KEYBD_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_KEYBD_Private_Defines -* @{ -*/ -/** -* @} -*/ -#ifndef AZERTY_KEYBOARD - #define QWERTY_KEYBOARD -#endif -#define KBD_LEFT_CTRL 0x01 -#define KBD_LEFT_SHIFT 0x02 -#define KBD_LEFT_ALT 0x04 -#define KBD_LEFT_GUI 0x08 -#define KBD_RIGHT_CTRL 0x10 -#define KBD_RIGHT_SHIFT 0x20 -#define KBD_RIGHT_ALT 0x40 -#define KBD_RIGHT_GUI 0x80 -#define KBR_MAX_NBR_PRESSED 6 - -/** @defgroup USBH_HID_KEYBD_Private_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_HID_KEYBD_Private_FunctionPrototypes -* @{ -*/ -static USBH_StatusTypeDef USBH_HID_KeybdDecode(USBH_HandleTypeDef *phost); -/** -* @} -*/ - -/** @defgroup USBH_HID_KEYBD_Private_Variables -* @{ -*/ - -HID_KEYBD_Info_TypeDef keybd_info; -uint32_t keybd_report_data[2]; - -static const HID_Report_ItemTypedef imp_0_lctrl={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_lshift={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 1, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_lalt={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 2, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_lgui={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 3, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_rctrl={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 4, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_rshift={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 5, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_ralt={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 6, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_rgui={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 7, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -static const HID_Report_ItemTypedef imp_0_key_array={ - (uint8_t*)keybd_report_data+2, /*data*/ - 8, /*size*/ - 0, /*shift*/ - 6, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 101, /*max value read can return*/ - 0, /*min vale device can report*/ - 101, /*max value device can report*/ - 1 /*resolution*/ -}; - -#ifdef QWERTY_KEYBOARD -static const int8_t HID_KEYBRD_Key[] = { - '\0', '`', '1', '2', '3', '4', '5', '6', - '7', '8', '9', '0', '-', '=', '\0', '\r', - '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', - 'i', 'o', 'p', '[', ']', '\\', - '\0', 'a', 's', 'd', 'f', 'g', 'h', 'j', - 'k', 'l', ';', '\'', '\0', '\n', - '\0', '\0', 'z', 'x', 'c', 'v', 'b', 'n', - 'm', ',', '.', '/', '\0', '\0', - '\0', '\0', '\0', ' ', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\r', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '7', '4', '1', - '\0', '/', '8', '5', '2', - '0', '*', '9', '6', '3', - '.', '-', '+', '\0', '\n', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0' -}; - -static const int8_t HID_KEYBRD_ShiftKey[] = { - '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', - '_', '+', '\0', '\0', '\0', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', - 'I', 'O', 'P', '{', '}', '|', '\0', 'A', 'S', 'D', 'F', 'G', - 'H', 'J', 'K', 'L', ':', '"', '\0', '\n', '\0', '\0', 'Z', 'X', - 'C', 'V', 'B', 'N', 'M', '<', '>', '?', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' -}; - -#else - -static const int8_t HID_KEYBRD_Key[] = { - '\0', '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', - '-', '=', '\0', '\r', '\t', 'a', 'z', 'e', 'r', 't', 'y', 'u', - 'i', 'o', 'p', '[', ']', '\\', '\0', 'q', 's', 'd', 'f', 'g', - 'h', 'j', 'k', 'l', 'm', '\0', '\0', '\n', '\0', '\0', 'w', 'x', - 'c', 'v', 'b', 'n', ',', ';', ':', '!', '\0', '\0', '\0', '\0', - '\0', ' ', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\r', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '7', '4', '1','\0', '/', - '8', '5', '2', '0', '*', '9', '6', '3', '.', '-', '+', '\0', - '\n', '\0', '\0', '\0', '\0', '\0', '\0','\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' -}; - -static const int8_t HID_KEYBRD_ShiftKey[] = { - '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', - '+', '\0', '\0', '\0', 'A', 'Z', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', - 'P', '{', '}', '*', '\0', 'Q', 'S', 'D', 'F', 'G', 'H', 'J', 'K', - 'L', 'M', '%', '\0', '\n', '\0', '\0', 'W', 'X', 'C', 'V', 'B', 'N', - '?', '.', '/', '\0', '\0', '\0','\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' -}; -#endif - -static const uint8_t HID_KEYBRD_Codes[] = { - 0, 0, 0, 0, 31, 50, 48, 33, - 19, 34, 35, 36, 24, 37, 38, 39, /* 0x00 - 0x0F */ - 52, 51, 25, 26, 17, 20, 32, 21, - 23, 49, 18, 47, 22, 46, 2, 3, /* 0x10 - 0x1F */ - 4, 5, 6, 7, 8, 9, 10, 11, - 43, 110, 15, 16, 61, 12, 13, 27, /* 0x20 - 0x2F */ - 28, 29, 42, 40, 41, 1, 53, 54, - 55, 30, 112, 113, 114, 115, 116, 117, /* 0x30 - 0x3F */ - 118, 119, 120, 121, 122, 123, 124, 125, - 126, 75, 80, 85, 76, 81, 86, 89, /* 0x40 - 0x4F */ - 79, 84, 83, 90, 95, 100, 105, 106, - 108, 93, 98, 103, 92, 97, 102, 91, /* 0x50 - 0x5F */ - 96, 101, 99, 104, 45, 129, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60 - 0x6F */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70 - 0x7F */ - 0, 0, 0, 0, 0, 107, 0, 56, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x80 - 0x8F */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x90 - 0x9F */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xA0 - 0xAF */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xB0 - 0xBF */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xC0 - 0xCF */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xD0 - 0xDF */ - 58, 44, 60, 127, 64, 57, 62, 128 /* 0xE0 - 0xE7 */ -}; - -/** - * @brief USBH_HID_KeybdInit - * The function init the HID keyboard. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_KeybdInit(USBH_HandleTypeDef *phost) -{ - uint32_t x; - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - keybd_info.lctrl=keybd_info.lshift= 0; - keybd_info.lalt=keybd_info.lgui= 0; - keybd_info.rctrl=keybd_info.rshift= 0; - keybd_info.ralt=keybd_info.rgui=0; - - - for(x=0; x< (sizeof(keybd_report_data)/sizeof(uint32_t)); x++) - { - keybd_report_data[x]=0; - } - - if(HID_Handle->length > (sizeof(keybd_report_data)/sizeof(uint32_t))) - { - HID_Handle->length = (sizeof(keybd_report_data)/sizeof(uint32_t)); - } - HID_Handle->pData = (uint8_t*)keybd_report_data; - fifo_init(&HID_Handle->fifo, phost->device.Data, HID_QUEUE_SIZE * sizeof(keybd_report_data)); - - return USBH_OK; -} - -/** - * @brief USBH_HID_GetKeybdInfo - * The function return keyboard information. - * @param phost: Host handle - * @retval keyboard information - */ -HID_KEYBD_Info_TypeDef *USBH_HID_GetKeybdInfo(USBH_HandleTypeDef *phost) -{ - if(USBH_HID_KeybdDecode(phost) == USBH_OK) - { - return &keybd_info; - } - else - { - return NULL; - } -} - -/** - * @brief USBH_HID_KeybdDecode - * The function decode keyboard data. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_KeybdDecode(USBH_HandleTypeDef *phost) -{ - uint8_t x; - - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - if(HID_Handle->length == 0) - { - return USBH_FAIL; - } - /*Fill report */ - if(fifo_read(&HID_Handle->fifo, &keybd_report_data, HID_Handle->length) == HID_Handle->length) - { - - keybd_info.lctrl=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lctrl, 0); - keybd_info.lshift=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lshift, 0); - keybd_info.lalt=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lalt, 0); - keybd_info.lgui=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lgui, 0); - keybd_info.rctrl=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_rctrl, 0); - keybd_info.rshift=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_rshift, 0); - keybd_info.ralt=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_ralt, 0); - keybd_info.rgui=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_rgui, 0); - - for(x=0; x < sizeof(keybd_info.keys); x++) - { - keybd_info.keys[x]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_key_array, x); - } - - return USBH_OK; - } - return USBH_FAIL; -} - -/** - * @brief USBH_HID_GetASCIICode - * The function decode keyboard data into ASCII characters. - * @param phost: Host handle - * @param info: Keyboard information - * @retval ASCII code - */ -uint8_t USBH_HID_GetASCIICode(HID_KEYBD_Info_TypeDef *info) -{ - uint8_t output; - if((info->lshift == 1) || (info->rshift)) - { - output = HID_KEYBRD_ShiftKey[HID_KEYBRD_Codes[info->keys[0]]]; - } - else - { - output = HID_KEYBRD_Key[HID_KEYBRD_Codes[info->keys[0]]]; - } - return output; -} -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_mouse.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid_mouse.c deleted file mode 100644 index 0851714afe..0000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_mouse.c +++ /dev/null @@ -1,267 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_mouse.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the application layer for USB Host HID Mouse Handling. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid_mouse.h" -#include "usbh_hid_parser.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_MOUSE - * @brief This file includes HID Layer Handlers for USB Host HID class. - * @{ - */ - -/** @defgroup USBH_HID_MOUSE_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Private_FunctionPrototypes - * @{ - */ -static USBH_StatusTypeDef USBH_HID_MouseDecode(USBH_HandleTypeDef *phost); - -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Variables - * @{ - */ -HID_MOUSE_Info_TypeDef mouse_info; -uint32_t mouse_report_data[1]; - -/* Structures defining how to access items in a HID mouse report */ -/* Access button 1 state. */ -static const HID_Report_ItemTypedef prop_b1={ - (uint8_t *)mouse_report_data+0, /*data*/ - 1, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min value device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access button 2 state. */ -static const HID_Report_ItemTypedef prop_b2={ - (uint8_t *)mouse_report_data+0, /*data*/ - 1, /*size*/ - 1, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min value device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access button 3 state. */ -static const HID_Report_ItemTypedef prop_b3={ - (uint8_t *)mouse_report_data+0, /*data*/ - 1, /*size*/ - 2, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access x coordinate change. */ -static const HID_Report_ItemTypedef prop_x={ - (uint8_t *)mouse_report_data+1, /*data*/ - 8, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 1, /*signed?*/ - 0, /*min value read can return*/ - 0xFFFF,/*max value read can return*/ - 0, /*min vale device can report*/ - 0xFFFF,/*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access y coordinate change. */ -static const HID_Report_ItemTypedef prop_y={ - (uint8_t *)mouse_report_data+2, /*data*/ - 8, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 1, /*signed?*/ - 0, /*min value read can return*/ - 0xFFFF,/*max value read can return*/ - 0, /*min vale device can report*/ - 0xFFFF,/*max value device can report*/ - 1 /*resolution*/ -}; - - -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Functions - * @{ - */ - -/** - * @brief USBH_HID_MouseInit - * The function init the HID mouse. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_MouseInit(USBH_HandleTypeDef *phost) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - mouse_info.x=0; - mouse_info.y=0; - mouse_info.buttons[0]=0; - mouse_info.buttons[1]=0; - mouse_info.buttons[2]=0; - - mouse_report_data[0]=0; - - if(HID_Handle->length > sizeof(mouse_report_data)) - { - HID_Handle->length = sizeof(mouse_report_data); - } - HID_Handle->pData = (uint8_t *)mouse_report_data; - fifo_init(&HID_Handle->fifo, phost->device.Data, HID_QUEUE_SIZE * sizeof(mouse_report_data)); - - return USBH_OK; -} - -/** - * @brief USBH_HID_GetMouseInfo - * The function return mouse information. - * @param phost: Host handle - * @retval mouse information - */ -HID_MOUSE_Info_TypeDef *USBH_HID_GetMouseInfo(USBH_HandleTypeDef *phost) -{ - if(USBH_HID_MouseDecode(phost)== USBH_OK) - { - return &mouse_info; - } - else - { - return NULL; - } -} - -/** - * @brief USBH_HID_MouseDecode - * The function decode mouse data. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_MouseDecode(USBH_HandleTypeDef *phost) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - if(HID_Handle->length == 0) - { - return USBH_FAIL; - } - /*Fill report */ - if(fifo_read(&HID_Handle->fifo, &mouse_report_data, HID_Handle->length) == HID_Handle->length) - { - - /*Decode report */ - mouse_info.x = (int16_t )HID_ReadItem((HID_Report_ItemTypedef *) &prop_x, 0); - mouse_info.y = (int16_t )HID_ReadItem((HID_Report_ItemTypedef *) &prop_y, 0); - - mouse_info.buttons[0]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &prop_b1, 0); - mouse_info.buttons[1]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &prop_b2, 0); - mouse_info.buttons[2]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &prop_b3, 0); - - return USBH_OK; - } - return USBH_FAIL; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_parser.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid_parser.c deleted file mode 100644 index a050f95e97..0000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_parser.c +++ /dev/null @@ -1,235 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_parser.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the HID Layer Handlers for USB Host HID class. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid_parser.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_PARSER - * @brief This file includes HID parsers for USB Host HID class. - * @{ - */ - -/** @defgroup USBH_HID_PARSER_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_PARSER_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Functions - * @{ - */ - -/** - * @brief HID_ReadItem - * The function read a report item. - * @param ri: report item - * @param ndx: report index -* @retval status (0 : fail / otherwise: item value) - */ -uint32_t HID_ReadItem(HID_Report_ItemTypedef *ri, uint8_t ndx) -{ - uint32_t val=0; - uint32_t x=0; - uint32_t bofs; - uint8_t *data=ri->data; - uint8_t shift=ri->shift; - - /* get the logical value of the item */ - - /* if this is an array, wee may need to offset ri->data.*/ - if (ri->count > 0) - { - /* If app tries to read outside of the array. */ - if (ri->count <= ndx) - { - return(0); - } - - /* calculate bit offset */ - bofs = ndx*ri->size; - bofs += shift; - /* calculate byte offset + shift pair from bit offset. */ - data+=bofs/8; - shift=(uint8_t)(bofs%8); - } - /* read data bytes in little endian order */ - for(x=0; x < ((ri->size & 0x7) ? (ri->size/8)+1 : (ri->size/8)); x++) - { - val=(uint32_t)(*data << (x*8)); - } - val=(val >> shift) & ((1<size)-1); - - if (val < ri->logical_min || val > ri->logical_max) - { - return(0); - } - - /* convert logical value to physical value */ - /* See if the number is negative or not. */ - if ((ri->sign) && (val & (1<<(ri->size-1)))) - { - /* yes, so sign extend value to 32 bits. */ - int vs=(int)((-1 & ~((1<<(ri->size))-1)) | val); - - if(ri->resolution == 1) - { - return((uint32_t)vs); - } - return((uint32_t)(vs*ri->resolution)); - } - else - { - if(ri->resolution == 1) - { - return(val); - } - return(val*ri->resolution); - } -} - -/** - * @brief HID_WriteItem - * The function write a report item. - * @param ri: report item - * @param ndx: report index - * @retval status (1: fail/ 0 : Ok) - */ -uint32_t HID_WriteItem(HID_Report_ItemTypedef *ri, uint32_t value, uint8_t ndx) -{ - uint32_t x; - uint32_t mask; - uint32_t bofs; - uint8_t *data=ri->data; - uint8_t shift=ri->shift; - - if (value < ri->physical_min || value > ri->physical_max) - { - return(1); - } - - /* if this is an array, wee may need to offset ri->data.*/ - if (ri->count > 0) - { - /* If app tries to read outside of the array. */ - if (ri->count >= ndx) - { - return(0); - } - /* calculate bit offset */ - bofs = ndx*ri->size; - bofs += shift; - /* calculate byte offset + shift pair from bit offset. */ - data+=bofs/8; - shift=(uint8_t)(bofs%8); - - } - - /* Convert physical value to logical value. */ - if (ri->resolution != 1) - { - value=value/ri->resolution; - } - - /* Write logical value to report in little endian order. */ - mask=(uint32_t)((1<size)-1); - value = (value & mask) << shift; - - for(x=0; x < ((ri->size & 0x7) ? (ri->size/8)+1 : (ri->size/8)); x++) - { - *(ri->data+x)=(uint8_t)((*(ri->data+x) & ~(mask>>(x*8))) | ((value>>(x*8)) & (mask>>(x*8)))); - } - return(0); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc.h b/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc.h deleted file mode 100644 index ea173a7da8..0000000000 --- a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc.h +++ /dev/null @@ -1,222 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_msc_core.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MSC_H -#define __USBH_MSC_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" -#include "usbh_msc_bot.h" -#include "usbh_msc_scsi.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_CORE - * @brief This file is the Header file for usbh_msc_core.c - * @{ - */ - - -/** @defgroup USBH_MSC_CORE_Exported_Types - * @{ - */ - -typedef enum -{ - MSC_INIT = 0, - MSC_IDLE, - MSC_TEST_UNIT_READY, - MSC_READ_CAPACITY10, - MSC_READ_INQUIRY, - MSC_REQUEST_SENSE, - MSC_READ, - MSC_WRITE, - MSC_UNRECOVERED_ERROR, - MSC_PERIODIC_CHECK, -} -MSC_StateTypeDef; - -typedef enum -{ - MSC_OK, - MSC_NOT_READY, - MSC_ERROR, - -} -MSC_ErrorTypeDef; - -typedef enum -{ - MSC_REQ_IDLE = 0, - MSC_REQ_RESET, - MSC_REQ_GET_MAX_LUN, - MSC_REQ_ERROR, -} -MSC_ReqStateTypeDef; - -#define MAX_SUPPORTED_LUN 2 - -/* Structure for LUN */ -typedef struct -{ - MSC_StateTypeDef state; - MSC_ErrorTypeDef error; - USBH_StatusTypeDef prev_ready_state; - SCSI_CapacityTypeDef capacity; - SCSI_SenseTypeDef sense; - SCSI_StdInquiryDataTypeDef inquiry; - uint8_t state_changed; - -} -MSC_LUNTypeDef; - -/* Structure for MSC process */ -typedef struct _MSC_Process -{ - uint32_t max_lun; - uint8_t InPipe; - uint8_t OutPipe; - uint8_t OutEp; - uint8_t InEp; - uint16_t OutEpSize; - uint16_t InEpSize; - MSC_StateTypeDef state; - MSC_ErrorTypeDef error; - MSC_ReqStateTypeDef req_state; - MSC_ReqStateTypeDef prev_req_state; - BOT_HandleTypeDef hbot; - MSC_LUNTypeDef unit[MAX_SUPPORTED_LUN]; - uint16_t current_lun; - uint16_t rw_lun; - uint32_t timer; -} -MSC_HandleTypeDef; - - -/** - * @} - */ - - - -/** @defgroup USBH_MSC_CORE_Exported_Defines - * @{ - */ - -#define USB_REQ_BOT_RESET 0xFF -#define USB_REQ_GET_MAX_LUN 0xFE - - -/* MSC Class Codes */ -#define USB_MSC_CLASS 0x08 - -/* Interface Descriptor field values for HID Boot Protocol */ -#define MSC_BOT 0x50 -#define MSC_TRANSPARENT 0x06 -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Exported_Variables - * @{ - */ -extern USBH_ClassTypeDef USBH_msc; -#define USBH_MSC_CLASS &USBH_msc - -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Exported_FunctionsPrototype - * @{ - */ - -/* Common APIs */ -uint8_t USBH_MSC_IsReady (USBH_HandleTypeDef *phost); - -/* APIs for LUN */ -int8_t USBH_MSC_GetMaxLUN (USBH_HandleTypeDef *phost); - -uint8_t USBH_MSC_UnitIsReady (USBH_HandleTypeDef *phost, uint8_t lun); - -USBH_StatusTypeDef USBH_MSC_GetLUNInfo(USBH_HandleTypeDef *phost, uint8_t lun, MSC_LUNTypeDef *info); - -USBH_StatusTypeDef USBH_MSC_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); - -USBH_StatusTypeDef USBH_MSC_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); -/** - * @} - */ - -#endif /* __USBH_MSC_H */ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_bot.h b/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_bot.h deleted file mode 100644 index 5422c80eb7..0000000000 --- a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_bot.h +++ /dev/null @@ -1,233 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_bot.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_msc_bot.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MSC_BOT_H__ -#define __USBH_MSC_BOT_H__ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" -#include "usbh_msc_bot.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_BOT - * @brief This file is the Header file for usbh_msc_core.c - * @{ - */ - - -/** @defgroup USBH_MSC_BOT_Exported_Types - * @{ - */ - -typedef enum { - BOT_OK = 0, - BOT_FAIL = 1, - BOT_PHASE_ERROR = 2, - BOT_BUSY = 3 -} -BOT_StatusTypeDef; - -typedef enum { - BOT_CMD_IDLE = 0, - BOT_CMD_SEND, - BOT_CMD_WAIT, -} -BOT_CMDStateTypeDef; - -/* CSW Status Definitions */ -typedef enum -{ - - BOT_CSW_CMD_PASSED = 0x00, - BOT_CSW_CMD_FAILED = 0x01, - BOT_CSW_PHASE_ERROR = 0x02, -} -BOT_CSWStatusTypeDef; - -typedef enum { - BOT_SEND_CBW = 1, - BOT_SEND_CBW_WAIT, - BOT_DATA_IN, - BOT_DATA_IN_WAIT, - BOT_DATA_OUT, - BOT_DATA_OUT_WAIT, - BOT_RECEIVE_CSW, - BOT_RECEIVE_CSW_WAIT, - BOT_ERROR_IN, - BOT_ERROR_OUT, - BOT_UNRECOVERED_ERROR -} -BOT_StateTypeDef; - -typedef union -{ - struct __CBW - { - uint32_t Signature; - uint32_t Tag; - uint32_t DataTransferLength; - uint8_t Flags; - uint8_t LUN; - uint8_t CBLength; - uint8_t CB[16]; - }field; - uint8_t data[31]; -} -BOT_CBWTypeDef; - -typedef union -{ - struct __CSW - { - uint32_t Signature; - uint32_t Tag; - uint32_t DataResidue; - uint8_t Status; - }field; - uint8_t data[13]; -} -BOT_CSWTypeDef; - -typedef struct -{ - uint32_t data[16]; - BOT_StateTypeDef state; - BOT_StateTypeDef prev_state; - BOT_CMDStateTypeDef cmd_state; - BOT_CBWTypeDef cbw; - uint8_t Reserved1; - BOT_CSWTypeDef csw; - uint8_t Reserved2[3]; - uint8_t *pbuf; -} -BOT_HandleTypeDef; - -/** - * @} - */ - - - -/** @defgroup USBH_MSC_BOT_Exported_Defines - * @{ - */ -#define BOT_CBW_SIGNATURE 0x43425355 -#define BOT_CBW_TAG 0x20304050 -#define BOT_CSW_SIGNATURE 0x53425355 -#define BOT_CBW_LENGTH 31 -#define BOT_CSW_LENGTH 13 - - - -#define BOT_SEND_CSW_DISABLE 0 -#define BOT_SEND_CSW_ENABLE 1 - -#define BOT_DIR_IN 0 -#define BOT_DIR_OUT 1 -#define BOT_DIR_BOTH 2 - -#define BOT_PAGE_LENGTH 512 - - -#define BOT_CBW_CB_LENGTH 16 - - -#define USB_REQ_BOT_RESET 0xFF -#define USB_REQ_GET_MAX_LUN 0xFE - -#define MAX_BULK_STALL_COUNT_LIMIT 0x04 /* If STALL is seen on Bulk - Endpoint continously, this means - that device and Host has phase error - Hence a Reset is needed */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_BOT_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_BOT_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_BOT_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_MSC_BOT_REQ_Reset(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_MSC_BOT_REQ_GetMaxLUN(USBH_HandleTypeDef *phost, uint8_t *Maxlun); - -USBH_StatusTypeDef USBH_MSC_BOT_Init(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun); -USBH_StatusTypeDef USBH_MSC_BOT_Error(USBH_HandleTypeDef *phost, uint8_t lun); - - - -/** - * @} - */ - -#endif //__USBH_MSC_BOT_H__ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_scsi.h b/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_scsi.h deleted file mode 100644 index 76b51902a1..0000000000 --- a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_scsi.h +++ /dev/null @@ -1,218 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_scsi.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_msc_scsi.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MSC_SCSI_H__ -#define __USBH_MSC_SCSI_H__ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_SCSI - * @brief This file is the Header file for usbh_msc_scsi.c - * @{ - */ - - -// Capacity data. -typedef struct -{ - uint32_t block_nbr; - uint16_t block_size; -} SCSI_CapacityTypeDef; - - -// Sense data. -typedef struct -{ - uint8_t key; - uint8_t asc; - uint8_t ascq; -} SCSI_SenseTypeDef; - -// INQUIRY data. -typedef struct -{ - uint8_t PeripheralQualifier; - uint8_t DeviceType; - uint8_t RemovableMedia; - uint8_t vendor_id[9]; - uint8_t product_id[17]; - uint8_t revision_id[5]; -}SCSI_StdInquiryDataTypeDef; - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define OPCODE_TEST_UNIT_READY 0x00 -#define OPCODE_READ_CAPACITY10 0x25 -#define OPCODE_READ10 0x28 -#define OPCODE_WRITE10 0x2A -#define OPCODE_REQUEST_SENSE 0x03 -#define OPCODE_INQUIRY 0x12 - -#define DATA_LEN_MODE_TEST_UNIT_READY 0 -#define DATA_LEN_READ_CAPACITY10 8 -#define DATA_LEN_INQUIRY 36 -#define DATA_LEN_REQUEST_SENSE 14 - -#define CBW_CB_LENGTH 16 -#define CBW_LENGTH 10 - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define SCSI_SENSE_KEY_NO_SENSE 0x00 -#define SCSI_SENSE_KEY_RECOVERED_ERROR 0x01 -#define SCSI_SENSE_KEY_NOT_READY 0x02 -#define SCSI_SENSE_KEY_MEDIUM_ERROR 0x03 -#define SCSI_SENSE_KEY_HARDWARE_ERROR 0x04 -#define SCSI_SENSE_KEY_ILLEGAL_REQUEST 0x05 -#define SCSI_SENSE_KEY_UNIT_ATTENTION 0x06 -#define SCSI_SENSE_KEY_DATA_PROTECT 0x07 -#define SCSI_SENSE_KEY_BLANK_CHECK 0x08 -#define SCSI_SENSE_KEY_VENDOR_SPECIFIC 0x09 -#define SCSI_SENSE_KEY_COPY_ABORTED 0x0A -#define SCSI_SENSE_KEY_ABORTED_COMMAND 0x0B -#define SCSI_SENSE_KEY_VOLUME_OVERFLOW 0x0D -#define SCSI_SENSE_KEY_MISCOMPARE 0x0E -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define SCSI_ASC_NO_ADDITIONAL_SENSE_INFORMATION 0x00 -#define SCSI_ASC_LOGICAL_UNIT_NOT_READY 0x04 -#define SCSI_ASC_INVALID_FIELD_IN_CDB 0x24 -#define SCSI_ASC_WRITE_PROTECTED 0x27 -#define SCSI_ASC_FORMAT_ERROR 0x31 -#define SCSI_ASC_INVALID_COMMAND_OPERATION_CODE 0x20 -#define SCSI_ASC_NOT_READY_TO_READY_CHANGE 0x28 -#define SCSI_ASC_MEDIUM_NOT_PRESENT 0x3A -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01 -#define SCSI_ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02 -#define SCSI_ASCQ_OPERATION_IN_PROGRESS 0x07 - -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup _Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_MSC_SCSI_TestUnitReady (USBH_HandleTypeDef *phost, - uint8_t lun); - -USBH_StatusTypeDef USBH_MSC_SCSI_ReadCapacity (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_CapacityTypeDef *capacity); - -USBH_StatusTypeDef USBH_MSC_SCSI_Inquiry (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_StdInquiryDataTypeDef *inquiry); - -USBH_StatusTypeDef USBH_MSC_SCSI_RequestSense (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_SenseTypeDef *sense_data); - -USBH_StatusTypeDef USBH_MSC_SCSI_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); - -USBH_StatusTypeDef USBH_MSC_SCSI_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); - - -/** - * @} - */ - -#endif //__USBH_MSC_SCSI_H__ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc.c b/ports/stm32/usbhost/Class/MSC/Src/usbh_msc.c deleted file mode 100644 index 53a2cd81df..0000000000 --- a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc.c +++ /dev/null @@ -1,795 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the MSC class driver functions - * =================================================================== - * MSC Class Description - * =================================================================== - * This module manages the MSC class V1.0 following the "Universal - * Serial Bus Mass Storage Class (MSC) Bulk-Only Transport (BOT) Version 1.0 - * Sep. 31, 1999". - * This driver implements the following aspects of the specification: - * - Bulk-Only Transport protocol - * - Subclass : SCSI transparent command set (ref. SCSI Primary Commands - 3 (SPC-3)) - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_msc.h" -#include "usbh_msc_bot.h" -#include "usbh_msc_scsi.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_CORE - * @brief This file includes the mass storage related functions - * @{ - */ - - -/** @defgroup USBH_MSC_CORE_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Private_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Private_FunctionPrototypes - * @{ - */ - -static USBH_StatusTypeDef USBH_MSC_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_ClassRequest(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_SOFProcess(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_RdWrProcess(USBH_HandleTypeDef *phost, uint8_t lun); - -USBH_ClassTypeDef USBH_msc = -{ - "MSC", - USB_MSC_CLASS, - USBH_MSC_InterfaceInit, - USBH_MSC_InterfaceDeInit, - USBH_MSC_ClassRequest, - USBH_MSC_Process, - USBH_MSC_SOFProcess, - NULL, -}; - - -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Exported_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Private_Functions - * @{ - */ - - -/** - * @brief USBH_MSC_InterfaceInit - * The function init the MSC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_InterfaceInit (USBH_HandleTypeDef *phost) -{ - uint8_t interface = 0; - USBH_StatusTypeDef status = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle; - - interface = USBH_FindInterface(phost, phost->pActiveClass->ClassCode, MSC_TRANSPARENT, MSC_BOT); - - if(interface == 0xFF) /* Not Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for %s class.", phost->pActiveClass->Name); - status = USBH_FAIL; - } - else - { - USBH_SelectInterface (phost, interface); - - phost->pActiveClass->pData = (MSC_HandleTypeDef *)USBH_malloc (sizeof(MSC_HandleTypeDef)); - MSC_Handle = phost->pActiveClass->pData; - - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress & 0x80) - { - MSC_Handle->InEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress); - MSC_Handle->InEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].wMaxPacketSize; - } - else - { - MSC_Handle->OutEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress); - MSC_Handle->OutEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].wMaxPacketSize; - } - - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].bEndpointAddress & 0x80) - { - MSC_Handle->InEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].bEndpointAddress); - MSC_Handle->InEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].wMaxPacketSize; - } - else - { - MSC_Handle->OutEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].bEndpointAddress); - MSC_Handle->OutEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].wMaxPacketSize; - } - - MSC_Handle->current_lun = 0; - MSC_Handle->rw_lun = 0; - MSC_Handle->state = MSC_INIT; - MSC_Handle->error = MSC_OK; - MSC_Handle->req_state = MSC_REQ_IDLE; - MSC_Handle->OutPipe = USBH_AllocPipe(phost, MSC_Handle->OutEp); - MSC_Handle->InPipe = USBH_AllocPipe(phost, MSC_Handle->InEp); - - USBH_MSC_BOT_Init(phost); - - /* De-Initialize LUNs information */ - USBH_memset(MSC_Handle->unit, 0, sizeof(MSC_Handle->unit)); - - /* Open the new channels */ - USBH_OpenPipe (phost, - MSC_Handle->OutPipe, - MSC_Handle->OutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MSC_Handle->OutEpSize); - - USBH_OpenPipe (phost, - MSC_Handle->InPipe, - MSC_Handle->InEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MSC_Handle->InEpSize); - - - USBH_LL_SetToggle (phost, MSC_Handle->InPipe,0); - USBH_LL_SetToggle (phost, MSC_Handle->OutPipe,0); - status = USBH_OK; - } - return status; -} - -/** - * @brief USBH_MSC_InterfaceDeInit - * The function DeInit the Pipes used for the MSC class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ( MSC_Handle->OutPipe) - { - USBH_ClosePipe(phost, MSC_Handle->OutPipe); - USBH_FreePipe (phost, MSC_Handle->OutPipe); - MSC_Handle->OutPipe = 0; /* Reset the Channel as Free */ - } - - if ( MSC_Handle->InPipe) - { - USBH_ClosePipe(phost, MSC_Handle->InPipe); - USBH_FreePipe (phost, MSC_Handle->InPipe); - MSC_Handle->InPipe = 0; /* Reset the Channel as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - - return USBH_OK; -} - -/** - * @brief USBH_MSC_ClassRequest - * The function is responsible for handling Standard requests - * for MSC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_ClassRequest(USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef status = USBH_BUSY; - uint8_t i; - - /* Switch MSC REQ state machine */ - switch (MSC_Handle->req_state) - { - case MSC_REQ_IDLE: - case MSC_REQ_GET_MAX_LUN: - /* Issue GetMaxLUN request */ - if(USBH_MSC_BOT_REQ_GetMaxLUN(phost, (uint8_t *)&MSC_Handle->max_lun) == USBH_OK ) - { - MSC_Handle->max_lun = (uint8_t )(MSC_Handle->max_lun) + 1; - USBH_UsrLog ("Number of supported LUN: %lu", (int32_t)(MSC_Handle->max_lun)); - - for(i = 0; i < MSC_Handle->max_lun; i++) - { - MSC_Handle->unit[i].prev_ready_state = USBH_FAIL; - MSC_Handle->unit[i].state_changed = 0; - } - status = USBH_OK; - } - break; - - case MSC_REQ_ERROR : - /* a Clear Feature should be issued here */ - if(USBH_ClrFeature(phost, 0x00) == USBH_OK) - { - MSC_Handle->req_state = MSC_Handle->prev_req_state; - } - break; - - default: - break; - } - - return status; -} - -/** - * @brief USBH_MSC_Process - * The function is for managing state machine for MSC data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_Process(USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef error = USBH_BUSY ; - USBH_StatusTypeDef scsi_status = USBH_BUSY ; - USBH_StatusTypeDef ready_status = USBH_BUSY ; - - switch (MSC_Handle->state) - { - case MSC_INIT: - - if(MSC_Handle->current_lun < MSC_Handle->max_lun) - { - - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_NOT_READY; - /* Switch MSC REQ state machine */ - switch (MSC_Handle->unit[MSC_Handle->current_lun].state) - { - case MSC_INIT: - USBH_UsrLog ("LUN #%d: ", MSC_Handle->current_lun); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_READ_INQUIRY; - MSC_Handle->timer = phost->Timer + 10000; - - case MSC_READ_INQUIRY: - scsi_status = USBH_MSC_SCSI_Inquiry(phost, MSC_Handle->current_lun, &MSC_Handle->unit[MSC_Handle->current_lun].inquiry); - - if( scsi_status == USBH_OK) - { - USBH_UsrLog ("Inquiry Vendor : %s", MSC_Handle->unit[MSC_Handle->current_lun].inquiry.vendor_id); - USBH_UsrLog ("Inquiry Product : %s", MSC_Handle->unit[MSC_Handle->current_lun].inquiry.product_id); - USBH_UsrLog ("Inquiry Version : %s", MSC_Handle->unit[MSC_Handle->current_lun].inquiry.revision_id); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_TEST_UNIT_READY; - } - if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_TEST_UNIT_READY: - ready_status = USBH_MSC_SCSI_TestUnitReady(phost, MSC_Handle->current_lun); - - if( ready_status == USBH_OK) - { - if( MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state != USBH_OK) - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 1; - USBH_UsrLog ("Mass Storage Device ready"); - } - else - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 0; - } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_READ_CAPACITY10; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_OK; - MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state = USBH_OK; - } - if( ready_status == USBH_FAIL) - { - /* Media not ready, so try to check again during 10s */ - if( MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state != USBH_FAIL) - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 1; - USBH_UsrLog ("Mass Storage Device NOT ready"); - } - else - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 0; - } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_NOT_READY; - MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state = USBH_FAIL; - } - else if(ready_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_READ_CAPACITY10: - scsi_status = USBH_MSC_SCSI_ReadCapacity(phost,MSC_Handle->current_lun, &MSC_Handle->unit[MSC_Handle->current_lun].capacity) ; - - if(scsi_status == USBH_OK) - { - if(MSC_Handle->unit[MSC_Handle->current_lun].state_changed == 1) - { - USBH_UsrLog ("Mass Storage Device capacity : %lu MB", \ - (int32_t)((MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_nbr * MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_size)/1024/1024)); - USBH_UsrLog ("Block number : %lu", (int32_t)(MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_nbr)); - USBH_UsrLog ("Block Size : %lu", (int32_t)(MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_size)); - } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_OK; - MSC_Handle->current_lun++; - } - else if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_REQUEST_SENSE: - scsi_status = USBH_MSC_SCSI_RequestSense(phost, MSC_Handle->current_lun, &MSC_Handle->unit[MSC_Handle->current_lun].sense); - - if( scsi_status == USBH_OK) - { - if((MSC_Handle->unit[MSC_Handle->current_lun].sense.key == SCSI_SENSE_KEY_UNIT_ATTENTION) || - (MSC_Handle->unit[MSC_Handle->current_lun].sense.key == SCSI_SENSE_KEY_NOT_READY) ) - { - - if(phost->Timer <= MSC_Handle->timer) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_TEST_UNIT_READY; - break; - } - } - - USBH_UsrLog ("Sense Key : %x", MSC_Handle->unit[MSC_Handle->current_lun].sense.key); - USBH_UsrLog ("Additional Sense Code : %x", MSC_Handle->unit[MSC_Handle->current_lun].sense.asc); - USBH_UsrLog ("Additional Sense Code Qualifier: %x", MSC_Handle->unit[MSC_Handle->current_lun].sense.ascq); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->current_lun++; - } - if( scsi_status == USBH_FAIL) - { - USBH_UsrLog ("Mass Storage Device NOT ready"); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_UNRECOVERED_ERROR; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_UNRECOVERED_ERROR: - MSC_Handle->current_lun++; - break; - - default: - break; - } - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - } - else - { - MSC_Handle->current_lun = 0; - MSC_Handle->state = MSC_IDLE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - } - break; - - case MSC_IDLE: - error = USBH_OK; - break; - - default: - break; - } - return error; -} - - -/** - * @brief USBH_MSC_SOFProcess - * The function is for SOF state - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_SOFProcess(USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} -/** - * @brief USBH_MSC_RdWrProcess - * The function is for managing state machine for MSC I/O Process - * @param phost: Host handle - * @param lun: logical Unit Number - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_RdWrProcess(USBH_HandleTypeDef *phost, uint8_t lun) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef error = USBH_BUSY ; - USBH_StatusTypeDef scsi_status = USBH_BUSY ; - - /* Switch MSC REQ state machine */ - switch (MSC_Handle->unit[lun].state) - { - - case MSC_READ: - scsi_status = USBH_MSC_SCSI_Read(phost,lun, 0, NULL, 0) ; - - if(scsi_status == USBH_OK) - { - MSC_Handle->unit[lun].state = MSC_IDLE; - error = USBH_OK; - } - else if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[lun].state = MSC_UNRECOVERED_ERROR; - error = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - break; - - case MSC_WRITE: - scsi_status = USBH_MSC_SCSI_Write(phost,lun, 0, NULL, 0) ; - - if(scsi_status == USBH_OK) - { - MSC_Handle->unit[lun].state = MSC_IDLE; - error = USBH_OK; - } - else if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[lun].state = MSC_UNRECOVERED_ERROR; - error = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - break; - - case MSC_REQUEST_SENSE: - scsi_status = USBH_MSC_SCSI_RequestSense(phost, lun, &MSC_Handle->unit[lun].sense); - - if( scsi_status == USBH_OK) - { - USBH_UsrLog ("Sense Key : %x", MSC_Handle->unit[lun].sense.key); - USBH_UsrLog ("Additional Sense Code : %x", MSC_Handle->unit[lun].sense.asc); - USBH_UsrLog ("Additional Sense Code Qualifier: %x", MSC_Handle->unit[lun].sense.ascq); - MSC_Handle->unit[lun].state = MSC_IDLE; - MSC_Handle->unit[lun].error = MSC_ERROR; - - error = USBH_FAIL; - } - if( scsi_status == USBH_FAIL) - { - USBH_UsrLog ("Mass Storage Device NOT ready"); - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[lun].state = MSC_UNRECOVERED_ERROR; - error = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - break; - - default: - break; - - } - return error; -} - -/** - * @brief USBH_MSC_IsReady - * The function check if the MSC function is ready - * @param phost: Host handle - * @retval USBH Status - */ -uint8_t USBH_MSC_IsReady (USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - return (MSC_Handle->state == MSC_IDLE); - } - else - { - return 0; - } -} - -/** - * @brief USBH_MSC_GetMaxLUN - * The function return the Max LUN supported - * @param phost: Host handle - * @retval logical Unit Number supported - */ -int8_t USBH_MSC_GetMaxLUN (USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ((phost->gState != HOST_CLASS) && (MSC_Handle->state == MSC_IDLE)) - { - return MSC_Handle->max_lun; - } - return 0xFF; -} - -/** - * @brief USBH_MSC_UnitIsReady - * The function check whether a LUN is ready - * @param phost: Host handle - * @param lun: logical Unit Number - * @retval Lun status (0: not ready / 1: ready) - */ -uint8_t USBH_MSC_UnitIsReady (USBH_HandleTypeDef *phost, uint8_t lun) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - return (MSC_Handle->unit[lun].error == MSC_OK); - } - else - { - return 0; - } -} - -/** - * @brief USBH_MSC_GetLUNInfo - * The function return a LUN information - * @param phost: Host handle - * @param lun: logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_GetLUNInfo(USBH_HandleTypeDef *phost, uint8_t lun, MSC_LUNTypeDef *info) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - if(phost->gState == HOST_CLASS) - { - USBH_memcpy(info,&MSC_Handle->unit[lun], sizeof(MSC_LUNTypeDef)); - return USBH_OK; - } - else - { - return USBH_FAIL; - } -} - -/** - * @brief USBH_MSC_Read - * The function performs a Read operation - * @param phost: Host handle - * @param lun: logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to read - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - uint32_t timeout; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ((phost->device.is_connected == 0) || - (phost->gState != HOST_CLASS) || - (MSC_Handle->unit[lun].state != MSC_IDLE)) - { - return USBH_FAIL; - } - MSC_Handle->state = MSC_READ; - MSC_Handle->unit[lun].state = MSC_READ; - MSC_Handle->rw_lun = lun; - USBH_MSC_SCSI_Read(phost, - lun, - address, - pbuf, - length); - - timeout = phost->Timer + (10000 * length); - while (USBH_MSC_RdWrProcess(phost, lun) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - MSC_Handle->state = MSC_IDLE; - return USBH_FAIL; - } - } - MSC_Handle->state = MSC_IDLE; - return USBH_OK; -} - -/** - * @brief USBH_MSC_Write - * The function performs a Write operation - * @param phost: Host handle - * @param lun: logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to write - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - uint32_t timeout; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ((phost->device.is_connected == 0) || - (phost->gState != HOST_CLASS) || - (MSC_Handle->unit[lun].state != MSC_IDLE)) - { - return USBH_FAIL; - } - MSC_Handle->state = MSC_WRITE; - MSC_Handle->unit[lun].state = MSC_WRITE; - MSC_Handle->rw_lun = lun; - USBH_MSC_SCSI_Write(phost, - lun, - address, - pbuf, - length); - - timeout = phost->Timer + (10000 * length); - while (USBH_MSC_RdWrProcess(phost, lun) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - MSC_Handle->state = MSC_IDLE; - return USBH_FAIL; - } - } - MSC_Handle->state = MSC_IDLE; - return USBH_OK; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_bot.c b/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_bot.c deleted file mode 100644 index 5489ce2978..0000000000 --- a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_bot.c +++ /dev/null @@ -1,633 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_bot.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file includes the BOT protocol related functions - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_msc_bot.h" -#include "usbh_msc.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MSC_CLASS -* @{ -*/ - -/** @defgroup USBH_MSC_BOT -* @brief This file includes the mass storage related functions -* @{ -*/ - - -/** @defgroup USBH_MSC_BOT_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MSC_BOT_Private_Defines -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MSC_BOT_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Private_Variables -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Private_FunctionPrototypes -* @{ -*/ -static USBH_StatusTypeDef USBH_MSC_BOT_Abort(USBH_HandleTypeDef *phost, uint8_t lun, uint8_t dir); -static BOT_CSWStatusTypeDef USBH_MSC_DecodeCSW(USBH_HandleTypeDef *phost); -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Exported_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Private_Functions -* @{ -*/ - -/** - * @brief USBH_MSC_BOT_REQ_Reset - * The function the MSC BOT Reset request. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_REQ_Reset(USBH_HandleTypeDef *phost) -{ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = USB_REQ_BOT_RESET; - phost->Control.setup.b.wValue.w = 0; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_MSC_BOT_REQ_GetMaxLUN - * The function the MSC BOT GetMaxLUN request. - * @param phost: Host handle - * @param Maxlun: pointer to Maxlun variable - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_REQ_GetMaxLUN(USBH_HandleTypeDef *phost, uint8_t *Maxlun) -{ - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = USB_REQ_GET_MAX_LUN; - phost->Control.setup.b.wValue.w = 0; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 1; - - return USBH_CtlReq(phost, Maxlun , 1 ); -} - - - -/** - * @brief USBH_MSC_BOT_Init - * The function Initializes the BOT protocol. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_Init(USBH_HandleTypeDef *phost) -{ - - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - MSC_Handle->hbot.cbw.field.Signature = BOT_CBW_SIGNATURE; - MSC_Handle->hbot.cbw.field.Tag = BOT_CBW_TAG; - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_SEND; - - return USBH_OK; -} - - - -/** - * @brief USBH_MSC_BOT_Process - * The function handle the BOT protocol. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun) -{ - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef error = USBH_BUSY; - BOT_CSWStatusTypeDef CSW_Status = BOT_CSW_CMD_FAILED; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - uint8_t toggle = 0; - - switch (MSC_Handle->hbot.state) - { - case BOT_SEND_CBW: - MSC_Handle->hbot.cbw.field.LUN = lun; - MSC_Handle->hbot.state = BOT_SEND_CBW_WAIT; - USBH_BulkSendData (phost, - MSC_Handle->hbot.cbw.data, - BOT_CBW_LENGTH, - MSC_Handle->OutPipe, - 1); - - break; - - case BOT_SEND_CBW_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->OutPipe); - - if(URB_Status == USBH_URB_DONE) - { - if ( MSC_Handle->hbot.cbw.field.DataTransferLength != 0 ) - { - /* If there is Data Transfer Stage */ - if (((MSC_Handle->hbot.cbw.field.Flags) & USB_REQ_DIR_MASK) == USB_D2H) - { - /* Data Direction is IN */ - MSC_Handle->hbot.state = BOT_DATA_IN; - } - else - { - /* Data Direction is OUT */ - MSC_Handle->hbot.state = BOT_DATA_OUT; - } - } - - else - {/* If there is NO Data Transfer Stage */ - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - - } - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send CBW */ - MSC_Handle->hbot.state = BOT_SEND_CBW; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - MSC_Handle->hbot.state = BOT_ERROR_OUT; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_DATA_IN: - /* Send first packet */ - USBH_BulkReceiveData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->InEpSize , - MSC_Handle->InPipe); - - MSC_Handle->hbot.state = BOT_DATA_IN_WAIT; - - break; - - case BOT_DATA_IN_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->InPipe); - - if(URB_Status == USBH_URB_DONE) - { - /* Adjudt Data pointer and data length */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > MSC_Handle->InEpSize) - { - MSC_Handle->hbot.pbuf += MSC_Handle->InEpSize; - MSC_Handle->hbot.cbw.field.DataTransferLength -= MSC_Handle->InEpSize; - } - else - { - MSC_Handle->hbot.cbw.field.DataTransferLength = 0; - } - - /* More Data To be Received */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > 0) - { - /* Send next packet */ - USBH_BulkReceiveData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->InEpSize , - MSC_Handle->InPipe); - - } - else - { - /* If value was 0, and successful transfer, then change the state */ - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - else if(URB_Status == USBH_URB_STALL) - { - /* This is Data IN Stage STALL Condition */ - MSC_Handle->hbot.state = BOT_ERROR_IN; - - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - 6.7.2 Host expects to receive data from the device - 3. On a STALL condition receiving data, then: - The host shall accept the data received. - The host shall clear the Bulk-In pipe. - 4. The host shall attempt to receive a CSW.*/ - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_DATA_OUT: - - USBH_BulkSendData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->OutEpSize , - MSC_Handle->OutPipe, - 1); - - - MSC_Handle->hbot.state = BOT_DATA_OUT_WAIT; - break; - - case BOT_DATA_OUT_WAIT: - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->OutPipe); - - if(URB_Status == USBH_URB_DONE) - { - /* Adjudt Data pointer and data length */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > MSC_Handle->OutEpSize) - { - MSC_Handle->hbot.pbuf += MSC_Handle->OutEpSize; - MSC_Handle->hbot.cbw.field.DataTransferLength -= MSC_Handle->OutEpSize; - } - else - { - MSC_Handle->hbot.cbw.field.DataTransferLength = 0; - } - - /* More Data To be Sent */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > 0) - { - USBH_BulkSendData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->OutEpSize , - MSC_Handle->OutPipe, - 1); - } - else - { - /* If value was 0, and successful transfer, then change the state */ - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send same data */ - MSC_Handle->hbot.state = BOT_DATA_OUT; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_STALL) - { - MSC_Handle->hbot.state = BOT_ERROR_OUT; - - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - 6.7.3 Ho - Host expects to send data to the device - 3. On a STALL condition sending data, then: - " The host shall clear the Bulk-Out pipe. - 4. The host shall attempt to receive a CSW. - */ -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_RECEIVE_CSW: - - USBH_BulkReceiveData (phost, - MSC_Handle->hbot.csw.data, - BOT_CSW_LENGTH , - MSC_Handle->InPipe); - - MSC_Handle->hbot.state = BOT_RECEIVE_CSW_WAIT; - break; - - case BOT_RECEIVE_CSW_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->InPipe); - - /* Decode CSW */ - if(URB_Status == USBH_URB_DONE) - { - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_SEND; - CSW_Status = USBH_MSC_DecodeCSW(phost); - - if(CSW_Status == BOT_CSW_CMD_PASSED) - { - status = USBH_OK; - } - else - { - status = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - MSC_Handle->hbot.state = BOT_ERROR_IN; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_ERROR_IN: - error = USBH_MSC_BOT_Abort(phost, lun, BOT_DIR_IN); - - if (error == USBH_OK) - { - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; - } - else if (error == USBH_UNRECOVERED_ERROR) - { - /* This means that there is a STALL Error limit, Do Reset Recovery */ - MSC_Handle->hbot.state = BOT_UNRECOVERED_ERROR; - } - break; - - case BOT_ERROR_OUT: - error = USBH_MSC_BOT_Abort(phost, lun, BOT_DIR_OUT); - - if ( error == USBH_OK) - { - - toggle = USBH_LL_GetToggle(phost, MSC_Handle->OutPipe); - USBH_LL_SetToggle(phost, MSC_Handle->OutPipe, 1- toggle); - USBH_LL_SetToggle(phost, MSC_Handle->InPipe, 0); - MSC_Handle->hbot.state = BOT_ERROR_IN; - } - else if (error == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->hbot.state = BOT_UNRECOVERED_ERROR; - } - break; - - - case BOT_UNRECOVERED_ERROR: - status = USBH_MSC_BOT_REQ_Reset(phost); - if ( status == USBH_OK) - { - MSC_Handle->hbot.state = BOT_SEND_CBW; - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_MSC_BOT_Abort - * The function handle the BOT Abort process. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param dir: direction (0: out / 1 : in) - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_BOT_Abort(USBH_HandleTypeDef *phost, uint8_t lun, uint8_t dir) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch (dir) - { - case BOT_DIR_IN : - /* send ClrFeture on Bulk IN endpoint */ - status = USBH_ClrFeature(phost, MSC_Handle->InEp); - - break; - - case BOT_DIR_OUT : - /*send ClrFeature on Bulk OUT endpoint */ - status = USBH_ClrFeature(phost, MSC_Handle->OutEp); - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_MSC_BOT_DecodeCSW - * This function decodes the CSW received by the device and updates the - * same to upper layer. - * @param phost: Host handle - * @retval USBH Status - * @notes - * Refer to USB Mass-Storage Class : BOT (www.usb.org) - * 6.3.1 Valid CSW Conditions : - * The host shall consider the CSW valid when: - * 1. dCSWSignature is equal to 53425355h - * 2. the CSW is 13 (Dh) bytes in length, - * 3. dCSWTag matches the dCBWTag from the corresponding CBW. - */ - -static BOT_CSWStatusTypeDef USBH_MSC_DecodeCSW(USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - BOT_CSWStatusTypeDef status = BOT_CSW_CMD_FAILED; - - /*Checking if the transfer length is diffrent than 13*/ - if(USBH_LL_GetLastXferSize(phost, MSC_Handle->InPipe) != BOT_CSW_LENGTH) - { - /*(4) Hi > Dn (Host expects to receive data from the device, - Device intends to transfer no data) - (5) Hi > Di (Host expects to receive data from the device, - Device intends to send data to the host) - (9) Ho > Dn (Host expects to send data to the device, - Device intends to transfer no data) - (11) Ho > Do (Host expects to send data to the device, - Device intends to receive data from the host)*/ - - - status = BOT_CSW_PHASE_ERROR; - } - else - { /* CSW length is Correct */ - - /* Check validity of the CSW Signature and CSWStatus */ - if(MSC_Handle->hbot.csw.field.Signature == BOT_CSW_SIGNATURE) - {/* Check Condition 1. dCSWSignature is equal to 53425355h */ - - if(MSC_Handle->hbot.csw.field.Tag == MSC_Handle->hbot.cbw.field.Tag) - { - /* Check Condition 3. dCSWTag matches the dCBWTag from the - corresponding CBW */ - - if(MSC_Handle->hbot.csw.field.Status == 0) - { - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - - Hn Host expects no data transfers - Hi Host expects to receive data from the device - Ho Host expects to send data to the device - - Dn Device intends to transfer no data - Di Device intends to send data to the host - Do Device intends to receive data from the host - - Section 6.7 - (1) Hn = Dn (Host expects no data transfers, - Device intends to transfer no data) - (6) Hi = Di (Host expects to receive data from the device, - Device intends to send data to the host) - (12) Ho = Do (Host expects to send data to the device, - Device intends to receive data from the host) - - */ - - status = BOT_CSW_CMD_PASSED; - } - else if(MSC_Handle->hbot.csw.field.Status == 1) - { - status = BOT_CSW_CMD_FAILED; - } - - else if(MSC_Handle->hbot.csw.field.Status == 2) - { - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - Section 6.7 - (2) Hn < Di ( Host expects no data transfers, - Device intends to send data to the host) - (3) Hn < Do ( Host expects no data transfers, - Device intends to receive data from the host) - (7) Hi < Di ( Host expects to receive data from the device, - Device intends to send data to the host) - (8) Hi <> Do ( Host expects to receive data from the device, - Device intends to receive data from the host) - (10) Ho <> Di (Host expects to send data to the device, - Di Device intends to send data to the host) - (13) Ho < Do (Host expects to send data to the device, - Device intends to receive data from the host) - */ - - status = BOT_CSW_PHASE_ERROR; - } - } /* CSW Tag Matching is Checked */ - } /* CSW Signature Correct Checking */ - else - { - /* If the CSW Signature is not valid, We sall return the Phase Error to - Upper Layers for Reset Recovery */ - - status = BOT_CSW_PHASE_ERROR; - } - } /* CSW Length Check*/ - - return status; -} - - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_scsi.c b/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_scsi.c deleted file mode 100644 index 5d069b40a8..0000000000 --- a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_scsi.c +++ /dev/null @@ -1,458 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_scsi.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the SCSI commands - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_msc.h" -#include "usbh_msc_scsi.h" -#include "usbh_msc_bot.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_SCSI - * @brief This file includes the mass storage related functions - * @{ - */ - - -/** @defgroup USBH_MSC_SCSI_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Private_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Exported_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Private_Functions - * @{ - */ - - -/** - * @brief USBH_MSC_SCSI_TestUnitReady - * Issue TestUnitReady command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_TestUnitReady (USBH_HandleTypeDef *phost, - uint8_t lun) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_MODE_TEST_UNIT_READY; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_OUT; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_TEST_UNIT_READY; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - error = USBH_MSC_BOT_Process(phost, lun); - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_ReadCapacity - * Issue Read Capacity command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param capacity: pointer to the capacity structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_ReadCapacity (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_CapacityTypeDef *capacity) -{ - USBH_StatusTypeDef error = USBH_BUSY ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_READ_CAPACITY10; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_READ_CAPACITY10; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = (uint8_t *)MSC_Handle->hbot.data; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - - error = USBH_MSC_BOT_Process(phost, lun); - - if(error == USBH_OK) - { - /*assign the capacity*/ - capacity->block_nbr = MSC_Handle->hbot.pbuf[3] | (MSC_Handle->hbot.pbuf[2] << 8) |\ - (MSC_Handle->hbot.pbuf[1] << 16) | (MSC_Handle->hbot.pbuf[0] << 24); - - /*assign the page length*/ - capacity->block_size = MSC_Handle->hbot.pbuf[7] | (MSC_Handle->hbot.pbuf[6] << 8); - } - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_Inquiry - * Issue Inquiry command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param capacity: pointer to the inquiry structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_Inquiry (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_StdInquiryDataTypeDef *inquiry) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_INQUIRY; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_INQUIRY; - MSC_Handle->hbot.cbw.field.CB[1] = (lun << 5); - MSC_Handle->hbot.cbw.field.CB[2] = 0; - MSC_Handle->hbot.cbw.field.CB[3] = 0; - MSC_Handle->hbot.cbw.field.CB[4] = 0x24; - MSC_Handle->hbot.cbw.field.CB[5] = 0; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = (uint8_t *)MSC_Handle->hbot.data; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - - error = USBH_MSC_BOT_Process(phost, lun); - - if(error == USBH_OK) - { - USBH_memset(inquiry, 0, sizeof(SCSI_StdInquiryDataTypeDef)); - /*assign Inquiry Data */ - inquiry->DeviceType = MSC_Handle->hbot.pbuf[0] & 0x1F; - inquiry->PeripheralQualifier = MSC_Handle->hbot.pbuf[0] >> 5; - inquiry->RemovableMedia = (MSC_Handle->hbot.pbuf[1] & 0x80)== 0x80; - USBH_memcpy (inquiry->vendor_id, &MSC_Handle->hbot.pbuf[8], 8); - USBH_memcpy (inquiry->product_id, &MSC_Handle->hbot.pbuf[16], 16); - USBH_memcpy (inquiry->revision_id, &MSC_Handle->hbot.pbuf[32], 4); - } - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_RequestSense - * Issue RequestSense command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param capacity: pointer to the sense data structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_RequestSense (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_SenseTypeDef *sense_data) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_REQUEST_SENSE; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_REQUEST_SENSE; - MSC_Handle->hbot.cbw.field.CB[1] = (lun << 5); - MSC_Handle->hbot.cbw.field.CB[2] = 0; - MSC_Handle->hbot.cbw.field.CB[3] = 0; - MSC_Handle->hbot.cbw.field.CB[4] = DATA_LEN_REQUEST_SENSE; - MSC_Handle->hbot.cbw.field.CB[5] = 0; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = (uint8_t *)MSC_Handle->hbot.data; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - - error = USBH_MSC_BOT_Process(phost, lun); - - if(error == USBH_OK) - { - sense_data->key = MSC_Handle->hbot.pbuf[2] & 0x0F; - sense_data->asc = MSC_Handle->hbot.pbuf[12]; - sense_data->ascq = MSC_Handle->hbot.pbuf[13]; - } - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_Write - * Issue write10 command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to write - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = length * 512; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_OUT; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_WRITE10; - - /*logical block address*/ - MSC_Handle->hbot.cbw.field.CB[2] = (((uint8_t*)&address)[3]); - MSC_Handle->hbot.cbw.field.CB[3] = (((uint8_t*)&address)[2]); - MSC_Handle->hbot.cbw.field.CB[4] = (((uint8_t*)&address)[1]); - MSC_Handle->hbot.cbw.field.CB[5] = (((uint8_t*)&address)[0]); - - - /*Tranfer length */ - MSC_Handle->hbot.cbw.field.CB[7] = (((uint8_t *)&length)[1]) ; - MSC_Handle->hbot.cbw.field.CB[8] = (((uint8_t *)&length)[0]) ; - - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = pbuf; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - error = USBH_MSC_BOT_Process(phost, lun); - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_Read - * Issue Read10 command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to read - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = length * 512; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_READ10; - - /*logical block address*/ - MSC_Handle->hbot.cbw.field.CB[2] = (((uint8_t*)&address)[3]); - MSC_Handle->hbot.cbw.field.CB[3] = (((uint8_t*)&address)[2]); - MSC_Handle->hbot.cbw.field.CB[4] = (((uint8_t*)&address)[1]); - MSC_Handle->hbot.cbw.field.CB[5] = (((uint8_t*)&address)[0]); - - - /*Tranfer length */ - MSC_Handle->hbot.cbw.field.CB[7] = (((uint8_t *)&length)[1]) ; - MSC_Handle->hbot.cbw.field.CB[8] = (((uint8_t *)&length)[0]) ; - - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = pbuf; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - error = USBH_MSC_BOT_Process(phost, lun); - break; - - default: - break; - } - - return error; -} - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp.h b/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp.h deleted file mode 100644 index 704a410fdf..0000000000 --- a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp.h +++ /dev/null @@ -1,263 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_mtp.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MTP_CORE_H -#define __USBH_MTP_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_mtp_ptp.h" -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MTP_CLASS -* @{ -*/ - -/** @defgroup USBH_MTP_CORE -* @brief This file is the Header file for USBH_MTP_CORE.c -* @{ -*/ - - - - -/*Communication Class codes*/ -#define USB_MTP_CLASS 0x06 /* Still Image Class)*/ -#define MTP_MAX_STORAGE_UNITS_NBR PTP_MAX_STORAGE_UNITS_NBR - -/** - * @} - */ - -/** @defgroup USBH_MTP_CORE_Exported_Types -* @{ -*/ -typedef enum -{ - MTP_IDLE = 0, - MTP_GETDEVICEINFO , - MTP_OPENSESSION , - MTP_CLOSESESSION , - MTP_GETSTORAGEIDS , - MTP_GETSTORAGEINFO , -} -MTP_StateTypeDef; - - -typedef enum -{ - MTP_EVENTS_INIT = 0, - MTP_EVENTS_GETDATA , -} -MTP_EventsStateTypeDef; - - -typedef struct -{ - MTP_EventsStateTypeDef state; - uint32_t timer; - uint16_t poll; - PTP_EventContainerTypedef container; -} -MTP_EventHandleTypedef; - -typedef struct -{ - - uint32_t CurrentStorageId; - uint32_t ObjectFormatCode; - uint32_t CurrentObjectHandler; - uint8_t ObjectHandlerNbr; - uint32_t Objdepth; -} -MTP_ParamsTypedef; - - -typedef struct -{ - PTP_DeviceInfoTypedef devinfo; - PTP_StorageIDsTypedef storids; - PTP_StorageInfoTypedef storinfo[MTP_MAX_STORAGE_UNITS_NBR]; - PTP_ObjectHandlesTypedef Handles; -} -MTP_InfoTypedef; - -/* Structure for MTP process */ -typedef struct _MTP_Process -{ - MTP_InfoTypedef info; - MTP_ParamsTypedef params; - - uint8_t DataInPipe; - uint8_t DataOutPipe; - uint8_t NotificationPipe; - - uint8_t DataOutEp; - uint8_t DataInEp; - uint8_t NotificationEp; - - uint16_t DataOutEpSize; - uint16_t DataInEpSize; - uint16_t NotificationEpSize; - MTP_StateTypeDef state; - MTP_EventHandleTypedef events; - PTP_HandleTypeDef ptp; - uint32_t current_storage_unit; - uint32_t is_ready; -} -MTP_HandleTypeDef; - -#define MTP_StorageInfoTypedef PTP_StorageInfoTypedef -#define MTP_ObjectHandlesTypedef PTP_ObjectHandlesTypedef -#define MTP_ObjectInfoTypedef PTP_ObjectInfoTypedef -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_Defines -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_Variables -* @{ -*/ -extern USBH_ClassTypeDef MTP_Class; -#define USBH_MTP_CLASS &MTP_Class - -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_FunctionsPrototype -* @{ -*/ -uint8_t USBH_MTP_IsReady (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_MTP_SelectStorage (USBH_HandleTypeDef *phost, uint8_t storage_idx); -USBH_StatusTypeDef USBH_MTP_GetNumStorage (USBH_HandleTypeDef *phost, uint8_t *storage_num); -USBH_StatusTypeDef USBH_MTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs); -USBH_StatusTypeDef USBH_MTP_GetStorageInfo (USBH_HandleTypeDef *phost, - uint8_t storage_idx, - MTP_StorageInfoTypedef *info); - -USBH_StatusTypeDef USBH_MTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles); - -USBH_StatusTypeDef USBH_MTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* objectinfo); - -USBH_StatusTypeDef USBH_MTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode); - -USBH_StatusTypeDef USBH_MTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object); - -USBH_StatusTypeDef USBH_MTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, - uint8_t *object, - uint32_t *len); - -USBH_StatusTypeDef USBH_MTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props); - -USBH_StatusTypeDef USBH_MTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd); - -USBH_StatusTypeDef USBH_MTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops); - -USBH_StatusTypeDef USBH_MTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size); - -USBH_StatusTypeDef USBH_MTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc); - -void USBH_MTP_EventsCallback(USBH_HandleTypeDef *phost, uint32_t event, uint32_t param); -/** -* @} -*/ - - -#endif /* __USBH_MTP_CORE_H */ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp_ptp.h b/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp_ptp.h deleted file mode 100644 index 3fbddd87bf..0000000000 --- a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp_ptp.h +++ /dev/null @@ -1,1038 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp_ptp.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_mtp_ptp.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MTP_PTP_H__ -#define __USBH_MTP_PTP_H__ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MTP_PTP_CLASS - * @{ - */ - -/** @defgroup USBH_MTP_PTP - * @brief This file is the Header file for usbh_mtp_ptp.c - * @{ - */ - - -/* Operation Codes */ - -/* PTP v1.0 operation codes */ -#define PTP_OC_Undefined 0x1000 -#define PTP_OC_GetDeviceInfo 0x1001 -#define PTP_OC_OpenSession 0x1002 -#define PTP_OC_CloseSession 0x1003 -#define PTP_OC_GetStorageIDs 0x1004 -#define PTP_OC_GetStorageInfo 0x1005 -#define PTP_OC_GetNumObjects 0x1006 -#define PTP_OC_GetObjectHandles 0x1007 -#define PTP_OC_GetObjectInfo 0x1008 -#define PTP_OC_GetObject 0x1009 -#define PTP_OC_GetThumb 0x100A -#define PTP_OC_DeleteObject 0x100B -#define PTP_OC_SendObjectInfo 0x100C -#define PTP_OC_SendObject 0x100D -#define PTP_OC_InitiateCapture 0x100E -#define PTP_OC_FormatStore 0x100F -#define PTP_OC_ResetDevice 0x1010 -#define PTP_OC_SelfTest 0x1011 -#define PTP_OC_SetObjectProtection 0x1012 -#define PTP_OC_PowerDown 0x1013 -#define PTP_OC_GetDevicePropDesc 0x1014 -#define PTP_OC_GetDevicePropValue 0x1015 -#define PTP_OC_SetDevicePropValue 0x1016 -#define PTP_OC_ResetDevicePropValue 0x1017 -#define PTP_OC_TerminateOpenCapture 0x1018 -#define PTP_OC_MoveObject 0x1019 -#define PTP_OC_CopyObject 0x101A -#define PTP_OC_GetPartialObject 0x101B -#define PTP_OC_InitiateOpenCapture 0x101C - -/* PTP v1.1 operation codes */ -#define PTP_OC_StartEnumHandles 0x101D -#define PTP_OC_EnumHandles 0x101E -#define PTP_OC_StopEnumHandles 0x101F -#define PTP_OC_GetVendorExtensionMaps 0x1020 -#define PTP_OC_GetVendorDeviceInfo 0x1021 -#define PTP_OC_GetResizedImageObject 0x1022 -#define PTP_OC_GetFilesystemManifest 0x1023 -#define PTP_OC_GetStreamInfo 0x1024 -#define PTP_OC_GetStream 0x1025 - - /* Microsoft / MTP extension codes */ -#define PTP_OC_GetObjectPropsSupported 0x9801 -#define PTP_OC_GetObjectPropDesc 0x9802 -#define PTP_OC_GetObjectPropValue 0x9803 -#define PTP_OC_SetObjectPropValue 0x9804 -#define PTP_OC_GetObjPropList 0x9805 -#define PTP_OC_SetObjPropList 0x9806 -#define PTP_OC_GetInterdependendPropdesc 0x9807 -#define PTP_OC_SendObjectPropList 0x9808 -#define PTP_OC_GetObjectReferences 0x9810 -#define PTP_OC_SetObjectReferences 0x9811 -#define PTP_OC_UpdateDeviceFirmware 0x9812 -#define PTP_OC_Skip 0x9820 - - -/* Response Codes */ - -/* PTP v1.0 response codes */ -#define PTP_RC_Undefined 0x2000 -#define PTP_RC_OK 0x2001 -#define PTP_RC_GeneralError 0x2002 -#define PTP_RC_SessionNotOpen 0x2003 -#define PTP_RC_InvalidTransactionID 0x2004 -#define PTP_RC_OperationNotSupported 0x2005 -#define PTP_RC_ParameterNotSupported 0x2006 -#define PTP_RC_IncompleteTransfer 0x2007 -#define PTP_RC_InvalidStorageId 0x2008 -#define PTP_RC_InvalidObjectHandle 0x2009 -#define PTP_RC_DevicePropNotSupported 0x200A -#define PTP_RC_InvalidObjectFormatCode 0x200B -#define PTP_RC_StoreFull 0x200C -#define PTP_RC_ObjectWriteProtected 0x200D -#define PTP_RC_StoreReadOnly 0x200E -#define PTP_RC_AccessDenied 0x200F -#define PTP_RC_NoThumbnailPresent 0x2010 -#define PTP_RC_SelfTestFailed 0x2011 -#define PTP_RC_PartialDeletion 0x2012 -#define PTP_RC_StoreNotAvailable 0x2013 -#define PTP_RC_SpecificationByFormatUnsupported 0x2014 -#define PTP_RC_NoValidObjectInfo 0x2015 -#define PTP_RC_InvalidCodeFormat 0x2016 -#define PTP_RC_UnknownVendorCode 0x2017 -#define PTP_RC_CaptureAlreadyTerminated 0x2018 -#define PTP_RC_DeviceBusy 0x2019 -#define PTP_RC_InvalidParentObject 0x201A -#define PTP_RC_InvalidDevicePropFormat 0x201B -#define PTP_RC_InvalidDevicePropValue 0x201C -#define PTP_RC_InvalidParameter 0x201D -#define PTP_RC_SessionAlreadyOpened 0x201E -#define PTP_RC_TransactionCanceled 0x201F -#define PTP_RC_SpecificationOfDestinationUnsupported 0x2020 -/* PTP v1.1 response codes */ -#define PTP_RC_InvalidEnumHandle 0x2021 -#define PTP_RC_NoStreamEnabled 0x2022 -#define PTP_RC_InvalidDataSet 0x2023 - -/* USB container types */ - -#define PTP_USB_CONTAINER_UNDEFINED 0x0000 -#define PTP_USB_CONTAINER_COMMAND 0x0001 -#define PTP_USB_CONTAINER_DATA 0x0002 -#define PTP_USB_CONTAINER_RESPONSE 0x0003 -#define PTP_USB_CONTAINER_EVENT 0x0004 - -/* PTP/IP definitions */ -#define PTPIP_INIT_COMMAND_REQUEST 1 -#define PTPIP_INIT_COMMAND_ACK 2 -#define PTPIP_INIT_EVENT_REQUEST 3 -#define PTPIP_INIT_EVENT_ACK 4 -#define PTPIP_INIT_FAIL 5 -#define PTPIP_CMD_REQUEST 6 -#define PTPIP_CMD_RESPONSE 7 -#define PTPIP_EVENT 8 -#define PTPIP_START_DATA_PACKET 9 -#define PTPIP_DATA_PACKET 10 -#define PTPIP_CANCEL_TRANSACTION 11 -#define PTPIP_END_DATA_PACKET 12 -#define PTPIP_PING 13 -#define PTPIP_PONG 14 - -/* Transaction data phase description */ -#define PTP_DP_NODATA 0x0000 /* no data phase */ -#define PTP_DP_SENDDATA 0x0001 /* sending data */ -#define PTP_DP_GETDATA 0x0002 /* receiving data */ -#define PTP_DP_DATA_MASK 0x00ff /* data phase mask */ - -/** @defgroup USBH_MTP_PTP_Exported_Types - * @{ - */ - -typedef enum -{ - PTP_REQ_IDLE = 0, - PTP_REQ_SEND = 1, - PTP_REQ_WAIT, - PTP_REQ_ERROR, -} -PTP_RequestStateTypeDef; - -typedef enum -{ - PTP_IDLE = 0, - PTP_OP_REQUEST_STATE, - PTP_OP_REQUEST_WAIT_STATE, - PTP_DATA_OUT_PHASE_STATE, - PTP_DATA_OUT_PHASE_WAIT_STATE, - PTP_DATA_IN_PHASE_STATE, - PTP_DATA_IN_PHASE_WAIT_STATE, - PTP_RESPONSE_STATE, - PTP_RESPONSE_WAIT_STATE, - PTP_ERROR, -} -PTP_ProcessStateTypeDef; - -/* PTP request/response/event general PTP container (transport independent) */ -typedef struct -{ - uint16_t Code; - uint32_t SessionID; - uint32_t Transaction_ID; - /* params may be of any type of size less or equal to uint32_t */ - uint32_t Param1; - uint32_t Param2; - uint32_t Param3; - /* events can only have three parameters */ - uint32_t Param4; - uint32_t Param5; - /* the number of meaningfull parameters */ - uint8_t Nparam; -} -PTP_ContainerTypedef; - -#define PTP_USB_BULK_HS_MAX_PACKET_LEN_WRITE 1024 -#define PTP_USB_BULK_HS_MAX_PACKET_LEN_READ 1024 -#define PTP_USB_BULK_HDR_LEN (2*sizeof(uint32_t)+2*sizeof(uint16_t)) -#define PTP_USB_BULK_PAYLOAD_LEN_WRITE (PTP_USB_BULK_HS_MAX_PACKET_LEN_WRITE-PTP_USB_BULK_HDR_LEN) -#define PTP_USB_BULK_PAYLOAD_LEN_READ (PTP_USB_BULK_HS_MAX_PACKET_LEN_READ-PTP_USB_BULK_HDR_LEN) -#define PTP_USB_BULK_REQ_LEN (PTP_USB_BULK_HDR_LEN+5*sizeof(uint32_t)) -#define PTP_USB_BULK_REQ_RESP_MAX_LEN 63 - -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - uint32_t param1; - uint32_t param2; - uint32_t param3; - uint32_t param4; - uint32_t param5; -} -PTP_RespContainerTypedef; - - -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - uint32_t param1; - uint32_t param2; - uint32_t param3; - uint32_t param4; - uint32_t param5; -} -PTP_OpContainerTypedef; - -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - union { - struct { - uint32_t param1; - uint32_t param2; - uint32_t param3; - uint32_t param4; - uint32_t param5; - } params; - uint8_t data[PTP_USB_BULK_PAYLOAD_LEN_READ]; - }payload; -} -PTP_DataContainerTypedef; - -/* PTP USB Asynchronous Event Interrupt Data Format */ -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - uint32_t param1; - uint32_t param2; - uint32_t param3; -} -PTP_EventContainerTypedef; - -/* Structure for PTP Transport process */ -typedef struct -{ - PTP_ProcessStateTypeDef state; - PTP_RequestStateTypeDef req_state; - PTP_OpContainerTypedef op_container; - PTP_DataContainerTypedef data_container; - PTP_RespContainerTypedef resp_container; - - /* ptp transaction ID */ - uint32_t transaction_id; - - /* ptp session ID */ - uint32_t session_id; - - /* device flags */ - uint32_t flags; - - /****** PTP transfer control *******/ - - /* Data pointer */ - uint8_t *data_ptr; - - /* Data length */ - int32_t data_length; - - /* Data length */ - uint32_t data_packet; - - /* Data length */ - uint32_t iteration; - - /* Packet Index */ - uint32_t data_packet_counter; - - /****** Object transfer control *******/ - - /* object pointer */ - uint8_t *object_ptr; - -} -PTP_HandleTypeDef; - -/* DeviceInfo data offset */ -#define PTP_di_StandardVersion 0 -#define PTP_di_VendorExtensionID 2 -#define PTP_di_VendorExtensionVersion 6 -#define PTP_di_VendorExtensionDesc 8 -#define PTP_di_FunctionalMode 8 -#define PTP_di_OperationsSupported 10 - -/* Max info items size */ -#define PTP_SUPPORTED_OPERATIONS_NBR 100 -#define PTP_SUPPORTED_EVENTS_NBR 100 -#define PTP_SUPPORTED_PROPRIETIES_NBR 100 -#define PTP_CAPTURE_FORMATS_NBR 100 -#define PTP_IMAGE_FORMATS_NBR 100 -#define PTP_MAX_STR_SIZE 255 -/* PTP device info structure */ -typedef struct -{ - uint16_t StandardVersion; - uint32_t VendorExtensionID; - uint16_t VendorExtensionVersion; - uint8_t VendorExtensionDesc[PTP_MAX_STR_SIZE]; - uint16_t FunctionalMode; - uint32_t OperationsSupported_len; - uint16_t OperationsSupported[PTP_SUPPORTED_OPERATIONS_NBR]; - uint32_t EventsSupported_len; - uint16_t EventsSupported[PTP_SUPPORTED_EVENTS_NBR]; - uint32_t DevicePropertiesSupported_len; - uint16_t DevicePropertiesSupported[PTP_SUPPORTED_PROPRIETIES_NBR]; - uint32_t CaptureFormats_len; - uint16_t CaptureFormats[PTP_CAPTURE_FORMATS_NBR]; - uint32_t ImageFormats_len; - uint16_t ImageFormats[PTP_IMAGE_FORMATS_NBR]; - uint8_t Manufacturer[PTP_MAX_STR_SIZE]; - uint8_t Model[PTP_MAX_STR_SIZE]; - uint8_t DeviceVersion[PTP_MAX_STR_SIZE]; - uint8_t SerialNumber[PTP_MAX_STR_SIZE]; -} -PTP_DeviceInfoTypedef; - -#define PTP_MAX_STORAGE_UNITS_NBR 5 -/* PTP storageIDs structute (returned by GetStorageIDs) */ -typedef struct -{ - uint32_t n; - uint32_t Storage [PTP_MAX_STORAGE_UNITS_NBR]; -} -PTP_StorageIDsTypedef; - -/* PTP StorageInfo structure (returned by GetStorageInfo) */ - -#define PTP_si_StorageType 0 -#define PTP_si_FilesystemType 2 -#define PTP_si_AccessCapability 4 -#define PTP_si_MaxCapability 6 -#define PTP_si_FreeSpaceInBytes 14 -#define PTP_si_FreeSpaceInImages 22 -#define PTP_si_StorageDescription 26 - - -/* PTP Storage Types */ - -#define PTP_ST_Undefined 0x0000 -#define PTP_ST_FixedROM 0x0001 -#define PTP_ST_RemovableROM 0x0002 -#define PTP_ST_FixedRAM 0x0003 -#define PTP_ST_RemovableRAM 0x0004 - -/* PTP FilesystemType Values */ - -#define PTP_FST_Undefined 0x0000 -#define PTP_FST_GenericFlat 0x0001 -#define PTP_FST_GenericHierarchical 0x0002 -#define PTP_FST_DCF 0x0003 - -/* PTP StorageInfo AccessCapability Values */ - -#define PTP_AC_ReadWrite 0x0000 -#define PTP_AC_ReadOnly 0x0001 -#define PTP_AC_ReadOnly_with_Object_Deletion 0x0002 - -typedef struct -{ - uint16_t StorageType; - uint16_t FilesystemType; - uint16_t AccessCapability; - uint64_t MaxCapability; - uint64_t FreeSpaceInBytes; - uint32_t FreeSpaceInImages; - uint8_t StorageDescription[PTP_MAX_STR_SIZE]; - uint8_t VolumeLabel[PTP_MAX_STR_SIZE]; -} -PTP_StorageInfoTypedef; - -/* PTP Object Format Codes */ - -/* ancillary formats */ -#define PTP_OFC_Undefined 0x3000 -#define PTP_OFC_Defined 0x3800 -#define PTP_OFC_Association 0x3001 -#define PTP_OFC_Script 0x3002 -#define PTP_OFC_Executable 0x3003 -#define PTP_OFC_Text 0x3004 -#define PTP_OFC_HTML 0x3005 -#define PTP_OFC_DPOF 0x3006 -#define PTP_OFC_AIFF 0x3007 -#define PTP_OFC_WAV 0x3008 -#define PTP_OFC_MP3 0x3009 -#define PTP_OFC_AVI 0x300A -#define PTP_OFC_MPEG 0x300B -#define PTP_OFC_ASF 0x300C -#define PTP_OFC_QT 0x300D /* guessing */ -/* image formats */ -#define PTP_OFC_EXIF_JPEG 0x3801 -#define PTP_OFC_TIFF_EP 0x3802 -#define PTP_OFC_FlashPix 0x3803 -#define PTP_OFC_BMP 0x3804 -#define PTP_OFC_CIFF 0x3805 -#define PTP_OFC_Undefined_0x3806 0x3806 -#define PTP_OFC_GIF 0x3807 -#define PTP_OFC_JFIF 0x3808 -#define PTP_OFC_PCD 0x3809 -#define PTP_OFC_PICT 0x380A -#define PTP_OFC_PNG 0x380B -#define PTP_OFC_Undefined_0x380C 0x380C -#define PTP_OFC_TIFF 0x380D -#define PTP_OFC_TIFF_IT 0x380E -#define PTP_OFC_JP2 0x380F -#define PTP_OFC_JPX 0x3810 -/* ptp v1.1 has only DNG new */ -#define PTP_OFC_DNG 0x3811 - -/* MTP extensions */ -#define PTP_OFC_MTP_MediaCard 0xb211 -#define PTP_OFC_MTP_MediaCardGroup 0xb212 -#define PTP_OFC_MTP_Encounter 0xb213 -#define PTP_OFC_MTP_EncounterBox 0xb214 -#define PTP_OFC_MTP_M4A 0xb215 -#define PTP_OFC_MTP_ZUNEUNDEFINED 0xb217 /* Unknown file type */ -#define PTP_OFC_MTP_Firmware 0xb802 -#define PTP_OFC_MTP_WindowsImageFormat 0xb881 -#define PTP_OFC_MTP_UndefinedAudio 0xb900 -#define PTP_OFC_MTP_WMA 0xb901 -#define PTP_OFC_MTP_OGG 0xb902 -#define PTP_OFC_MTP_AAC 0xb903 -#define PTP_OFC_MTP_AudibleCodec 0xb904 -#define PTP_OFC_MTP_FLAC 0xb906 -#define PTP_OFC_MTP_SamsungPlaylist 0xb909 -#define PTP_OFC_MTP_UndefinedVideo 0xb980 -#define PTP_OFC_MTP_WMV 0xb981 -#define PTP_OFC_MTP_MP4 0xb982 -#define PTP_OFC_MTP_MP2 0xb983 -#define PTP_OFC_MTP_3GP 0xb984 -#define PTP_OFC_MTP_UndefinedCollection 0xba00 -#define PTP_OFC_MTP_AbstractMultimediaAlbum 0xba01 -#define PTP_OFC_MTP_AbstractImageAlbum 0xba02 -#define PTP_OFC_MTP_AbstractAudioAlbum 0xba03 -#define PTP_OFC_MTP_AbstractVideoAlbum 0xba04 -#define PTP_OFC_MTP_AbstractAudioVideoPlaylist 0xba05 -#define PTP_OFC_MTP_AbstractContactGroup 0xba06 -#define PTP_OFC_MTP_AbstractMessageFolder 0xba07 -#define PTP_OFC_MTP_AbstractChapteredProduction 0xba08 -#define PTP_OFC_MTP_AbstractAudioPlaylist 0xba09 -#define PTP_OFC_MTP_AbstractVideoPlaylist 0xba0a -#define PTP_OFC_MTP_AbstractMediacast 0xba0b -#define PTP_OFC_MTP_WPLPlaylist 0xba10 -#define PTP_OFC_MTP_M3UPlaylist 0xba11 -#define PTP_OFC_MTP_MPLPlaylist 0xba12 -#define PTP_OFC_MTP_ASXPlaylist 0xba13 -#define PTP_OFC_MTP_PLSPlaylist 0xba14 -#define PTP_OFC_MTP_UndefinedDocument 0xba80 -#define PTP_OFC_MTP_AbstractDocument 0xba81 -#define PTP_OFC_MTP_XMLDocument 0xba82 -#define PTP_OFC_MTP_MSWordDocument 0xba83 -#define PTP_OFC_MTP_MHTCompiledHTMLDocument 0xba84 -#define PTP_OFC_MTP_MSExcelSpreadsheetXLS 0xba85 -#define PTP_OFC_MTP_MSPowerpointPresentationPPT 0xba86 -#define PTP_OFC_MTP_UndefinedMessage 0xbb00 -#define PTP_OFC_MTP_AbstractMessage 0xbb01 -#define PTP_OFC_MTP_UndefinedContact 0xbb80 -#define PTP_OFC_MTP_AbstractContact 0xbb81 -#define PTP_OFC_MTP_vCard2 0xbb82 -#define PTP_OFC_MTP_vCard3 0xbb83 -#define PTP_OFC_MTP_UndefinedCalendarItem 0xbe00 -#define PTP_OFC_MTP_AbstractCalendarItem 0xbe01 -#define PTP_OFC_MTP_vCalendar1 0xbe02 -#define PTP_OFC_MTP_vCalendar2 0xbe03 -#define PTP_OFC_MTP_UndefinedWindowsExecutable 0xbe80 -#define PTP_OFC_MTP_MediaCast 0xbe81 -#define PTP_OFC_MTP_Section 0xbe82 - -/* MTP specific Object Properties */ -#define PTP_OPC_StorageID 0xDC01 -#define PTP_OPC_ObjectFormat 0xDC02 -#define PTP_OPC_ProtectionStatus 0xDC03 -#define PTP_OPC_ObjectSize 0xDC04 -#define PTP_OPC_AssociationType 0xDC05 -#define PTP_OPC_AssociationDesc 0xDC06 -#define PTP_OPC_ObjectFileName 0xDC07 -#define PTP_OPC_DateCreated 0xDC08 -#define PTP_OPC_DateModified 0xDC09 -#define PTP_OPC_Keywords 0xDC0A -#define PTP_OPC_ParentObject 0xDC0B -#define PTP_OPC_AllowedFolderContents 0xDC0C -#define PTP_OPC_Hidden 0xDC0D -#define PTP_OPC_SystemObject 0xDC0E -#define PTP_OPC_PersistantUniqueObjectIdentifier 0xDC41 -#define PTP_OPC_SyncID 0xDC42 -#define PTP_OPC_PropertyBag 0xDC43 -#define PTP_OPC_Name 0xDC44 -#define PTP_OPC_CreatedBy 0xDC45 -#define PTP_OPC_Artist 0xDC46 -#define PTP_OPC_DateAuthored 0xDC47 -#define PTP_OPC_Description 0xDC48 -#define PTP_OPC_URLReference 0xDC49 -#define PTP_OPC_LanguageLocale 0xDC4A -#define PTP_OPC_CopyrightInformation 0xDC4B -#define PTP_OPC_Source 0xDC4C -#define PTP_OPC_OriginLocation 0xDC4D -#define PTP_OPC_DateAdded 0xDC4E -#define PTP_OPC_NonConsumable 0xDC4F -#define PTP_OPC_CorruptOrUnplayable 0xDC50 -#define PTP_OPC_ProducerSerialNumber 0xDC51 -#define PTP_OPC_RepresentativeSampleFormat 0xDC81 -#define PTP_OPC_RepresentativeSampleSize 0xDC82 -#define PTP_OPC_RepresentativeSampleHeight 0xDC83 -#define PTP_OPC_RepresentativeSampleWidth 0xDC84 -#define PTP_OPC_RepresentativeSampleDuration 0xDC85 -#define PTP_OPC_RepresentativeSampleData 0xDC86 -#define PTP_OPC_Width 0xDC87 -#define PTP_OPC_Height 0xDC88 -#define PTP_OPC_Duration 0xDC89 -#define PTP_OPC_Rating 0xDC8A -#define PTP_OPC_Track 0xDC8B -#define PTP_OPC_Genre 0xDC8C -#define PTP_OPC_Credits 0xDC8D -#define PTP_OPC_Lyrics 0xDC8E -#define PTP_OPC_SubscriptionContentID 0xDC8F -#define PTP_OPC_ProducedBy 0xDC90 -#define PTP_OPC_UseCount 0xDC91 -#define PTP_OPC_SkipCount 0xDC92 -#define PTP_OPC_LastAccessed 0xDC93 -#define PTP_OPC_ParentalRating 0xDC94 -#define PTP_OPC_MetaGenre 0xDC95 -#define PTP_OPC_Composer 0xDC96 -#define PTP_OPC_EffectiveRating 0xDC97 -#define PTP_OPC_Subtitle 0xDC98 -#define PTP_OPC_OriginalReleaseDate 0xDC99 -#define PTP_OPC_AlbumName 0xDC9A -#define PTP_OPC_AlbumArtist 0xDC9B -#define PTP_OPC_Mood 0xDC9C -#define PTP_OPC_DRMStatus 0xDC9D -#define PTP_OPC_SubDescription 0xDC9E -#define PTP_OPC_IsCropped 0xDCD1 -#define PTP_OPC_IsColorCorrected 0xDCD2 -#define PTP_OPC_ImageBitDepth 0xDCD3 -#define PTP_OPC_Fnumber 0xDCD4 -#define PTP_OPC_ExposureTime 0xDCD5 -#define PTP_OPC_ExposureIndex 0xDCD6 -#define PTP_OPC_DisplayName 0xDCE0 -#define PTP_OPC_BodyText 0xDCE1 -#define PTP_OPC_Subject 0xDCE2 -#define PTP_OPC_Priority 0xDCE3 -#define PTP_OPC_GivenName 0xDD00 -#define PTP_OPC_MiddleNames 0xDD01 -#define PTP_OPC_FamilyName 0xDD02 -#define PTP_OPC_Prefix 0xDD03 -#define PTP_OPC_Suffix 0xDD04 -#define PTP_OPC_PhoneticGivenName 0xDD05 -#define PTP_OPC_PhoneticFamilyName 0xDD06 -#define PTP_OPC_EmailPrimary 0xDD07 -#define PTP_OPC_EmailPersonal1 0xDD08 -#define PTP_OPC_EmailPersonal2 0xDD09 -#define PTP_OPC_EmailBusiness1 0xDD0A -#define PTP_OPC_EmailBusiness2 0xDD0B -#define PTP_OPC_EmailOthers 0xDD0C -#define PTP_OPC_PhoneNumberPrimary 0xDD0D -#define PTP_OPC_PhoneNumberPersonal 0xDD0E -#define PTP_OPC_PhoneNumberPersonal2 0xDD0F -#define PTP_OPC_PhoneNumberBusiness 0xDD10 -#define PTP_OPC_PhoneNumberBusiness2 0xDD11 -#define PTP_OPC_PhoneNumberMobile 0xDD12 -#define PTP_OPC_PhoneNumberMobile2 0xDD13 -#define PTP_OPC_FaxNumberPrimary 0xDD14 -#define PTP_OPC_FaxNumberPersonal 0xDD15 -#define PTP_OPC_FaxNumberBusiness 0xDD16 -#define PTP_OPC_PagerNumber 0xDD17 -#define PTP_OPC_PhoneNumberOthers 0xDD18 -#define PTP_OPC_PrimaryWebAddress 0xDD19 -#define PTP_OPC_PersonalWebAddress 0xDD1A -#define PTP_OPC_BusinessWebAddress 0xDD1B -#define PTP_OPC_InstantMessengerAddress 0xDD1C -#define PTP_OPC_InstantMessengerAddress2 0xDD1D -#define PTP_OPC_InstantMessengerAddress3 0xDD1E -#define PTP_OPC_PostalAddressPersonalFull 0xDD1F -#define PTP_OPC_PostalAddressPersonalFullLine1 0xDD20 -#define PTP_OPC_PostalAddressPersonalFullLine2 0xDD21 -#define PTP_OPC_PostalAddressPersonalFullCity 0xDD22 -#define PTP_OPC_PostalAddressPersonalFullRegion 0xDD23 -#define PTP_OPC_PostalAddressPersonalFullPostalCode 0xDD24 -#define PTP_OPC_PostalAddressPersonalFullCountry 0xDD25 -#define PTP_OPC_PostalAddressBusinessFull 0xDD26 -#define PTP_OPC_PostalAddressBusinessLine1 0xDD27 -#define PTP_OPC_PostalAddressBusinessLine2 0xDD28 -#define PTP_OPC_PostalAddressBusinessCity 0xDD29 -#define PTP_OPC_PostalAddressBusinessRegion 0xDD2A -#define PTP_OPC_PostalAddressBusinessPostalCode 0xDD2B -#define PTP_OPC_PostalAddressBusinessCountry 0xDD2C -#define PTP_OPC_PostalAddressOtherFull 0xDD2D -#define PTP_OPC_PostalAddressOtherLine1 0xDD2E -#define PTP_OPC_PostalAddressOtherLine2 0xDD2F -#define PTP_OPC_PostalAddressOtherCity 0xDD30 -#define PTP_OPC_PostalAddressOtherRegion 0xDD31 -#define PTP_OPC_PostalAddressOtherPostalCode 0xDD32 -#define PTP_OPC_PostalAddressOtherCountry 0xDD33 -#define PTP_OPC_OrganizationName 0xDD34 -#define PTP_OPC_PhoneticOrganizationName 0xDD35 -#define PTP_OPC_Role 0xDD36 -#define PTP_OPC_Birthdate 0xDD37 -#define PTP_OPC_MessageTo 0xDD40 -#define PTP_OPC_MessageCC 0xDD41 -#define PTP_OPC_MessageBCC 0xDD42 -#define PTP_OPC_MessageRead 0xDD43 -#define PTP_OPC_MessageReceivedTime 0xDD44 -#define PTP_OPC_MessageSender 0xDD45 -#define PTP_OPC_ActivityBeginTime 0xDD50 -#define PTP_OPC_ActivityEndTime 0xDD51 -#define PTP_OPC_ActivityLocation 0xDD52 -#define PTP_OPC_ActivityRequiredAttendees 0xDD54 -#define PTP_OPC_ActivityOptionalAttendees 0xDD55 -#define PTP_OPC_ActivityResources 0xDD56 -#define PTP_OPC_ActivityAccepted 0xDD57 -#define PTP_OPC_Owner 0xDD5D -#define PTP_OPC_Editor 0xDD5E -#define PTP_OPC_Webmaster 0xDD5F -#define PTP_OPC_URLSource 0xDD60 -#define PTP_OPC_URLDestination 0xDD61 -#define PTP_OPC_TimeBookmark 0xDD62 -#define PTP_OPC_ObjectBookmark 0xDD63 -#define PTP_OPC_ByteBookmark 0xDD64 -#define PTP_OPC_LastBuildDate 0xDD70 -#define PTP_OPC_TimetoLive 0xDD71 -#define PTP_OPC_MediaGUID 0xDD72 -#define PTP_OPC_TotalBitRate 0xDE91 -#define PTP_OPC_BitRateType 0xDE92 -#define PTP_OPC_SampleRate 0xDE93 -#define PTP_OPC_NumberOfChannels 0xDE94 -#define PTP_OPC_AudioBitDepth 0xDE95 -#define PTP_OPC_ScanDepth 0xDE97 -#define PTP_OPC_AudioWAVECodec 0xDE99 -#define PTP_OPC_AudioBitRate 0xDE9A -#define PTP_OPC_VideoFourCCCodec 0xDE9B -#define PTP_OPC_VideoBitRate 0xDE9C -#define PTP_OPC_FramesPerThousandSeconds 0xDE9D -#define PTP_OPC_KeyFrameDistance 0xDE9E -#define PTP_OPC_BufferSize 0xDE9F -#define PTP_OPC_EncodingQuality 0xDEA0 -#define PTP_OPC_EncodingProfile 0xDEA1 -#define PTP_OPC_BuyFlag 0xD901 - -/* WiFi Provisioning MTP Extension property codes */ -#define PTP_OPC_WirelessConfigurationFile 0xB104 - - -/* PTP Association Types */ -#define PTP_AT_Undefined 0x0000 -#define PTP_AT_GenericFolder 0x0001 -#define PTP_AT_Album 0x0002 -#define PTP_AT_TimeSequence 0x0003 -#define PTP_AT_HorizontalPanoramic 0x0004 -#define PTP_AT_VerticalPanoramic 0x0005 -#define PTP_AT_2DPanoramic 0x0006 -#define PTP_AT_AncillaryData 0x0007 - -#define PTP_MAX_HANDLER_NBR 0x255 -typedef struct -{ - uint32_t n; - uint32_t Handler[PTP_MAX_HANDLER_NBR]; -} -PTP_ObjectHandlesTypedef; - - -#define PTP_oi_StorageID 0 -#define PTP_oi_ObjectFormat 4 -#define PTP_oi_ProtectionStatus 6 -#define PTP_oi_ObjectCompressedSize 8 -#define PTP_oi_ThumbFormat 12 -#define PTP_oi_ThumbCompressedSize 14 -#define PTP_oi_ThumbPixWidth 18 -#define PTP_oi_ThumbPixHeight 22 -#define PTP_oi_ImagePixWidth 26 -#define PTP_oi_ImagePixHeight 30 -#define PTP_oi_ImageBitDepth 34 -#define PTP_oi_ParentObject 38 -#define PTP_oi_AssociationType 42 -#define PTP_oi_AssociationDesc 44 -#define PTP_oi_SequenceNumber 48 -#define PTP_oi_filenamelen 52 -#define PTP_oi_Filename 53 - -typedef struct -{ - uint32_t StorageID; - uint16_t ObjectFormat; - uint16_t ProtectionStatus; - /* In the regular objectinfo this is 32bit, but we keep the general object size here - that also arrives via other methods and so use 64bit */ - uint64_t ObjectCompressedSize; - uint16_t ThumbFormat; - uint32_t ThumbCompressedSize; - uint32_t ThumbPixWidth; - uint32_t ThumbPixHeight; - uint32_t ImagePixWidth; - uint32_t ImagePixHeight; - uint32_t ImageBitDepth; - uint32_t ParentObject; - uint16_t AssociationType; - uint32_t AssociationDesc; - uint32_t SequenceNumber; - uint8_t Filename[PTP_MAX_STR_SIZE]; - uint32_t CaptureDate; - uint32_t ModificationDate; - uint8_t Keywords[PTP_MAX_STR_SIZE]; -} -PTP_ObjectInfoTypedef; - -/* Object Property Describing Dataset (DevicePropDesc) */ - -typedef union _PTP_PropertyValueTypedef -{ - char str[PTP_MAX_STR_SIZE]; - uint8_t u8; - int8_t i8; - uint16_t u16; - int16_t i16; - uint32_t u32; - int32_t i32; - uint64_t u64; - int64_t i64; - - struct array { - uint32_t count; - union _PTP_PropertyValueTypedef *v; - } a; -}PTP_PropertyValueTypedef; - -typedef struct -{ - PTP_PropertyValueTypedef MinimumValue; - PTP_PropertyValueTypedef MaximumValue; - PTP_PropertyValueTypedef StepSize; -} -PTP_PropDescRangeFormTypedef; - -/* Property Describing Dataset, Enum Form */ - -typedef struct -{ - uint16_t NumberOfValues; - PTP_PropertyValueTypedef SupportedValue[PTP_SUPPORTED_PROPRIETIES_NBR]; -} -PTP_PropDescEnumFormTypedef; - -/* (MTP) Object Property pack/unpack */ -#define PTP_opd_ObjectPropertyCode 0 -#define PTP_opd_DataType 2 -#define PTP_opd_GetSet 4 -#define PTP_opd_FactoryDefaultValue 5 - -typedef struct -{ - uint16_t ObjectPropertyCode; - uint16_t DataType; - uint8_t GetSet; - PTP_PropertyValueTypedef FactoryDefaultValue; - uint32_t GroupCode; - uint8_t FormFlag; - union { - PTP_PropDescEnumFormTypedef Enum; - PTP_PropDescRangeFormTypedef Range; - } FORM; -} -PTP_ObjectPropDescTypeDef; - -/* Metadata lists for MTP operations */ -typedef struct -{ - uint16_t property; - uint16_t datatype; - uint32_t ObjectHandle; - PTP_PropertyValueTypedef propval; -} -MTP_PropertiesTypedef; - - -/* Device Property Form Flag */ - -#define PTP_DPFF_None 0x00 -#define PTP_DPFF_Range 0x01 -#define PTP_DPFF_Enumeration 0x02 - -/* Object Property Codes used by MTP (first 3 are same as DPFF codes) */ -#define PTP_OPFF_None 0x00 -#define PTP_OPFF_Range 0x01 -#define PTP_OPFF_Enumeration 0x02 -#define PTP_OPFF_DateTime 0x03 -#define PTP_OPFF_FixedLengthArray 0x04 -#define PTP_OPFF_RegularExpression 0x05 -#define PTP_OPFF_ByteArray 0x06 -#define PTP_OPFF_LongString 0xFF - -/* Device Property pack/unpack */ - -#define PTP_dpd_DevicePropertyCode 0 -#define PTP_dpd_DataType 2 -#define PTP_dpd_GetSet 4 -#define PTP_dpd_FactoryDefaultValue 5 - -/* Device Property Describing Dataset (DevicePropDesc) */ - -typedef struct -{ - uint16_t DevicePropertyCode; - uint16_t DataType; - uint8_t GetSet; - PTP_PropertyValueTypedef FactoryDefaultValue; - PTP_PropertyValueTypedef CurrentValue; - uint8_t FormFlag; - union { - PTP_PropDescEnumFormTypedef Enum; - PTP_PropDescRangeFormTypedef Range; - } FORM; -} -PTP_DevicePropDescTypdef; - -/* DataType Codes */ - -#define PTP_DTC_UNDEF 0x0000 -#define PTP_DTC_INT8 0x0001 -#define PTP_DTC_UINT8 0x0002 -#define PTP_DTC_INT16 0x0003 -#define PTP_DTC_UINT16 0x0004 -#define PTP_DTC_INT32 0x0005 -#define PTP_DTC_UINT32 0x0006 -#define PTP_DTC_INT64 0x0007 -#define PTP_DTC_UINT64 0x0008 -#define PTP_DTC_INT128 0x0009 -#define PTP_DTC_UINT128 0x000A - -#define PTP_DTC_ARRAY_MASK 0x4000 - -#define PTP_DTC_AINT8 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT8) -#define PTP_DTC_AUINT8 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT8) -#define PTP_DTC_AINT16 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT16) -#define PTP_DTC_AUINT16 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT16) -#define PTP_DTC_AINT32 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT32) -#define PTP_DTC_AUINT32 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT32) -#define PTP_DTC_AINT64 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT64) -#define PTP_DTC_AUINT64 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT64) -#define PTP_DTC_AINT128 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT128) -#define PTP_DTC_AUINT128 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT128) - -#define PTP_DTC_STR 0xFFFF - -/* PTP Event Codes */ - -#define PTP_EC_Undefined 0x4000 -#define PTP_EC_CancelTransaction 0x4001 -#define PTP_EC_ObjectAdded 0x4002 -#define PTP_EC_ObjectRemoved 0x4003 -#define PTP_EC_StoreAdded 0x4004 -#define PTP_EC_StoreRemoved 0x4005 -#define PTP_EC_DevicePropChanged 0x4006 -#define PTP_EC_ObjectInfoChanged 0x4007 -#define PTP_EC_DeviceInfoChanged 0x4008 -#define PTP_EC_RequestObjectTransfer 0x4009 -#define PTP_EC_StoreFull 0x400A -#define PTP_EC_DeviceReset 0x400B -#define PTP_EC_StorageInfoChanged 0x400C -#define PTP_EC_CaptureComplete 0x400D -#define PTP_EC_UnreportedStatus 0x400E - - -/** - * @} - */ - -/** @defgroup USBH_MTP_PTP_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MTP_PTP_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MTP_PTP_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_PTP_Init(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_PTP_Process (USBH_HandleTypeDef *phost); - -USBH_StatusTypeDef USBH_PTP_SendRequest (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *req); -USBH_StatusTypeDef USBH_PTP_GetResponse (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *req); - -USBH_StatusTypeDef USBH_PTP_OpenSession (USBH_HandleTypeDef *phost, uint32_t session); -USBH_StatusTypeDef USBH_PTP_GetDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info); -USBH_StatusTypeDef USBH_PTP_GetStorageIds (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *storage_ids); - -USBH_StatusTypeDef USBH_PTP_GetStorageInfo (USBH_HandleTypeDef *phost, - uint32_t storage_id, - PTP_StorageInfoTypedef *storage_info); - -USBH_StatusTypeDef USBH_PTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs); - -USBH_StatusTypeDef USBH_PTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles); - -USBH_StatusTypeDef USBH_PTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* objectinfo); - -USBH_StatusTypeDef USBH_PTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode); - -USBH_StatusTypeDef USBH_PTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object); - -USBH_StatusTypeDef USBH_PTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, uint8_t *object, - uint32_t *len); - -USBH_StatusTypeDef USBH_PTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props); - -USBH_StatusTypeDef USBH_PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd); - -USBH_StatusTypeDef USBH_PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops); - -USBH_StatusTypeDef USBH_PTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size); - -USBH_StatusTypeDef USBH_PTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc); - -/** - * @} - */ - -#endif //__USBH_MTP_PTP_H__ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp.c b/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp.c deleted file mode 100644 index d93aa4238c..0000000000 --- a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp.c +++ /dev/null @@ -1,1065 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the MTP Layer Handlers for USB Host MTP class. - * - * @verbatim - * - * =================================================================== - * MTP Class Description - * =================================================================== - * This module manages the MSC class V1.11 following the "Device Class Definition - * for Human Interface Devices (MTP) Version 1.11 Jun 27, 2001". - * This driver implements the following aspects of the specification: - * - The Boot Interface Subclass - * - The Mouse and Keyboard protocols - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_mtp.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MTP_CLASS -* @{ -*/ - -/** @defgroup USBH_MTP_CORE -* @brief This file includes MTP Layer Handlers for USB Host MTP class. -* @{ -*/ - -/** @defgroup USBH_MTP_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_MTP_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_ClassRequest (USBH_HandleTypeDef *phost); - -static uint8_t MTP_FindCtlEndpoint(USBH_HandleTypeDef *phost); - -static uint8_t MTP_FindDataOutEndpoint(USBH_HandleTypeDef *phost); - -static uint8_t MTP_FindDataInEndpoint(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_SOFProcess (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_Events (USBH_HandleTypeDef *phost); - -static void MTP_DecodeEvent (USBH_HandleTypeDef *phost) ; - -USBH_ClassTypeDef MTP_Class = -{ - "MTP", - USB_MTP_CLASS, - USBH_MTP_InterfaceInit, - USBH_MTP_InterfaceDeInit, - USBH_MTP_ClassRequest, - USBH_MTP_Process, - USBH_MTP_SOFProcess, - NULL, -}; -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Functions -* @{ -*/ - -/** - * @brief USBH_MTP_InterfaceInit - * The function init the MTP class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_InterfaceInit (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_OK ; - uint8_t interface, endpoint; - - MTP_HandleTypeDef *MTP_Handle; - - interface = USBH_FindInterface(phost, - USB_MTP_CLASS, - 1, - 1); - - if(interface == 0xFF) /* No Valid Interface */ - { - status = USBH_FAIL; - USBH_DbgLog ("Cannot Find the interface for Still Image Class."); - } - else - { - USBH_SelectInterface (phost, interface); - - endpoint = MTP_FindCtlEndpoint(phost); - - phost->pActiveClass->pData = (MTP_HandleTypeDef *)USBH_malloc (sizeof(MTP_HandleTypeDef)); - MTP_Handle = phost->pActiveClass->pData; - - if( MTP_Handle == NULL) - { - status = USBH_FAIL; - USBH_DbgLog ("Cannot allocate RAM for MTP Handle"); - } - - /*Collect the control endpoint address and length*/ - MTP_Handle->NotificationEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress; - MTP_Handle->NotificationEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize; - MTP_Handle->NotificationPipe = USBH_AllocPipe(phost, MTP_Handle->NotificationEp); - MTP_Handle->events.poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bInterval; - - /* Open pipe for Notification endpoint */ - USBH_OpenPipe (phost, - MTP_Handle->NotificationPipe, - MTP_Handle->NotificationEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - MTP_Handle->NotificationEpSize); - - USBH_LL_SetToggle (phost, MTP_Handle->NotificationPipe, 0); - - - endpoint = MTP_FindDataInEndpoint(phost); - - /*Collect the control endpoint address and length*/ - MTP_Handle->DataInEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress; - MTP_Handle->DataInEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize; - MTP_Handle->DataInPipe = USBH_AllocPipe(phost, MTP_Handle->DataInEp); - - /* Open pipe for DATA IN endpoint */ - USBH_OpenPipe (phost, - MTP_Handle->DataInPipe, - MTP_Handle->DataInEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MTP_Handle->DataInEpSize); - - USBH_LL_SetToggle (phost, MTP_Handle->DataInPipe, 0); - - endpoint = MTP_FindDataOutEndpoint(phost); - - /*Collect the DATA OUT endpoint address and length*/ - MTP_Handle->DataOutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress; - MTP_Handle->DataOutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize; - MTP_Handle->DataOutPipe = USBH_AllocPipe(phost, MTP_Handle->DataOutEp); - - /* Open pipe for DATA OUT endpoint */ - USBH_OpenPipe (phost, - MTP_Handle->DataOutPipe, - MTP_Handle->DataOutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MTP_Handle->DataOutEpSize); - - USBH_LL_SetToggle (phost, MTP_Handle->DataOutPipe, 0); - - - MTP_Handle->state = MTP_OPENSESSION; - MTP_Handle->is_ready = 0; - MTP_Handle->events.state = MTP_EVENTS_INIT; - return USBH_PTP_Init(phost); - - } - return status; -} - -/** - * @brief Find MTP Ctl interface - * @param phost: Host handle - * @retval USBH Status - */ -static uint8_t MTP_FindCtlEndpoint(USBH_HandleTypeDef *phost) -{ - uint8_t interface, endpoint; - - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if(phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == USB_MTP_CLASS) - { - for (endpoint = 0; endpoint < USBH_MAX_NUM_ENDPOINTS ; endpoint ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress & 0x80)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize > 0)&& - ((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bmAttributes & USBH_EP_INTERRUPT) == USBH_EP_INTERRUPT)) - { - return endpoint; - } - } - } - } - - return 0xFF; /* Invalid Endpoint */ -} - - -/** - * @brief Find MTP DATA OUT interface - * @param phost: Host handle - * @retval USBH Status - */ -static uint8_t MTP_FindDataOutEndpoint(USBH_HandleTypeDef *phost) -{ - uint8_t interface, endpoint; - - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if(phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == USB_MTP_CLASS) - { - for (endpoint = 0; endpoint < USBH_MAX_NUM_ENDPOINTS ; endpoint ++ ) - { - - if(((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress & 0x80) == 0)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize > 0)&& - ((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bmAttributes & USBH_EP_BULK) == USBH_EP_BULK)) - { - return endpoint; - } - } - } - } - - return 0xFF; /* Invalid Endpoint */ -} - -/** - * @brief Find MTP DATA IN interface - * @param phost: Host handle - * @retval USBH Status - */ -static uint8_t MTP_FindDataInEndpoint(USBH_HandleTypeDef *phost) -{ - uint8_t interface, endpoint; - - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if(phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == USB_MTP_CLASS) - { - for (endpoint = 0; endpoint < USBH_MAX_NUM_ENDPOINTS ; endpoint ++ ) - { - - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress & 0x80)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize > 0)&& - ((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bmAttributes & USBH_EP_BULK) == USBH_EP_BULK)) - { - return endpoint; - } - } - } - } - - return 0xFF; /* Invalid Endpoint */ -} - - -/** - * @brief USBH_MTP_InterfaceDeInit - * The function DeInit the Pipes used for the MTP class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if (MTP_Handle->DataOutPipe) - { - USBH_ClosePipe(phost, MTP_Handle->DataOutPipe); - USBH_FreePipe (phost, MTP_Handle->DataOutPipe); - MTP_Handle->DataOutPipe = 0; /* Reset the Channel as Free */ - } - - if (MTP_Handle->DataInPipe) - { - USBH_ClosePipe(phost, MTP_Handle->DataInPipe); - USBH_FreePipe (phost, MTP_Handle->DataInPipe); - MTP_Handle->DataInPipe = 0; /* Reset the Channel as Free */ - } - - if (MTP_Handle->NotificationPipe) - { - USBH_ClosePipe(phost, MTP_Handle->NotificationPipe); - USBH_FreePipe (phost, MTP_Handle->NotificationPipe); - MTP_Handle->NotificationPipe = 0; /* Reset the Channel as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - return USBH_OK; -} - -/** - * @brief USBH_MTP_ClassRequest - * The function is responsible for handling Standard requests - * for MTP class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_ClassRequest (USBH_HandleTypeDef *phost) -{ - return USBH_OK;; -} - - -/** - * @brief USBH_MTP_Process - * The function is for managing state machine for MTP data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t idx = 0; - - switch(MTP_Handle->state) - { - case MTP_OPENSESSION: - - status = USBH_PTP_OpenSession (phost, 1); /* Session '0' is not valid */ - - if(status == USBH_OK) - { - USBH_UsrLog("MTP Session #0 Opened"); - MTP_Handle->state = MTP_GETDEVICEINFO; - } - break; - - case MTP_GETDEVICEINFO: - status = USBH_PTP_GetDeviceInfo (phost, &(MTP_Handle->info.devinfo)); - - if(status == USBH_OK) - { - USBH_DbgLog(">>>>> MTP Device Information"); - USBH_DbgLog("Standard version : %x", MTP_Handle->info.devinfo.StandardVersion); - USBH_DbgLog("Vendor ExtID : %s", (MTP_Handle->info.devinfo.VendorExtensionID == 6)?"MTP": "NOT SUPPORTED"); - USBH_DbgLog("Functional mode : %s", (MTP_Handle->info.devinfo.FunctionalMode == 0) ? "Standard" : "Vendor"); - USBH_DbgLog("Number of Supported Operation(s) : %d", MTP_Handle->info.devinfo.OperationsSupported_len); - USBH_DbgLog("Number of Supported Events(s) : %d", MTP_Handle->info.devinfo.EventsSupported_len); - USBH_DbgLog("Number of Supported Proprieties : %d", MTP_Handle->info.devinfo.DevicePropertiesSupported_len); - USBH_DbgLog("Manufacturer : %s", MTP_Handle->info.devinfo.Manufacturer); - USBH_DbgLog("Model : %s", MTP_Handle->info.devinfo.Model); - USBH_DbgLog("Device version : %s", MTP_Handle->info.devinfo.DeviceVersion); - USBH_DbgLog("Serial number : %s", MTP_Handle->info.devinfo.SerialNumber); - - MTP_Handle->state = MTP_GETSTORAGEIDS; - } - break; - - case MTP_GETSTORAGEIDS: - status = USBH_PTP_GetStorageIds (phost, &(MTP_Handle->info.storids)); - - if(status == USBH_OK) - { - USBH_DbgLog("Number of storage ID items : %d", MTP_Handle->info.storids.n); - for (idx = 0; idx < MTP_Handle->info.storids.n; idx ++) - { - USBH_DbgLog("storage#%d ID : %x", idx, MTP_Handle->info.storids.Storage[idx]); - } - - MTP_Handle->current_storage_unit = 0; - MTP_Handle->state = MTP_GETSTORAGEINFO; - } - break; - - case MTP_GETSTORAGEINFO: - status = USBH_PTP_GetStorageInfo (phost, - MTP_Handle->info.storids.Storage[MTP_Handle->current_storage_unit], - &((MTP_Handle->info.storinfo)[MTP_Handle->current_storage_unit])); - - if(status == USBH_OK) - { - USBH_UsrLog("Volume#%lu: %s [%s]", MTP_Handle->current_storage_unit, - MTP_Handle->info.storinfo[MTP_Handle->current_storage_unit].StorageDescription, - MTP_Handle->info.storinfo[MTP_Handle->current_storage_unit].VolumeLabel); - if(++MTP_Handle->current_storage_unit >= MTP_Handle->info.storids.n) - { - MTP_Handle->state = MTP_IDLE; - MTP_Handle->is_ready = 1; - MTP_Handle->current_storage_unit = 0; - MTP_Handle->params.CurrentStorageId = MTP_Handle->info.storids.Storage[0]; - - USBH_UsrLog( "MTP Class initialized."); - USBH_UsrLog("%s is default storage unit", MTP_Handle->info.storinfo[0].StorageDescription); - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - } - } - break; - - case MTP_IDLE: - USBH_MTP_Events(phost); - default: - status = USBH_OK; - break; - } - return status; -} - -/** - * @brief USBH_MTP_SOFProcess - * The function is for managing SOF callback - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_SOFProcess (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_OK; - - return status; -} - -/** - * @brief USBH_MTP_IsReady - * Select the storage Unit to be used - * @param phost: Host handle - * @retval USBH Status - */ -uint8_t USBH_MTP_IsReady (USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - return (MTP_Handle->is_ready); -} - -/** - * @brief USBH_MTP_GetNumStorage - * Select the storage Unit to be used - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetNumStorage (USBH_HandleTypeDef *phost, uint8_t *storage_num) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if(MTP_Handle->is_ready > 0) - { - *storage_num = MTP_Handle->info.storids.n; - status = USBH_OK; - } - - return status; -} - -/** - * @brief USBH_MTP_SelectStorage - * Select the storage Unit to be used - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_SelectStorage (USBH_HandleTypeDef *phost, uint8_t storage_idx) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - MTP_Handle->params.CurrentStorageId = MTP_Handle->info.storids.Storage[storage_idx]; - status = USBH_OK; - } - - return status; -} - -/** - * @brief USBH_MTP_GetStorageInfo - * Get the storage Unit info - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint8_t storage_idx, MTP_StorageInfoTypedef *info) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - *info = MTP_Handle->info.storinfo[storage_idx]; - status = USBH_OK; - } - return status; -} - -/** - * @brief USBH_MTP_GetStorageInfo - * Get the storage Unit info - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_idx, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - while ((status = USBH_PTP_GetNumObjects (phost, - MTP_Handle->info.storids.Storage[storage_idx], - objectformatcode, - associationOH, - numobs)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - - -/** - * @brief USBH_MTP_GetStorageInfo - * Get the storage Unit info - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_idx, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - while ((status = USBH_PTP_GetObjectHandles (phost, - MTP_Handle->info.storids.Storage[storage_idx], - objectformatcode, - associationOH, - objecthandles)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectInfo - * Gets objert info - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* objectinfo) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectInfo (phost, handle, objectinfo)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} -/** - * @brief USBH_MTP_DeleteObject - * Delete an object. - * @param phost: Host handle - * @param handle : Object Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_DeleteObject (phost, handle, objectformatcode)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObject - * Gets object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObject (phost, handle, object)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetPartialObject - * Gets object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, - uint8_t *object, - uint32_t *len) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetPartialObject(phost, - handle, - offset, - maxbytes, - object, - len)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObjectPropsSupported - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectPropsSupported (phost, - ofc, - propnum, - props)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObjectPropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectPropDesc (phost, - opc, - ofc, - opd)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObjectPropList - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectPropList (phost, - handle, - pprops, - nrofprops)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_SendObject - * Send an object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_SendObject (phost, handle, object, size)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - - /** - * @brief Handle HID Control process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_Events (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - - switch(MTP_Handle->events.state) - { - case MTP_EVENTS_INIT: - if((phost->Timer & 1) == 0) - { - MTP_Handle->events.timer = phost->Timer; - USBH_InterruptReceiveData(phost, - (uint8_t *)&(MTP_Handle->events.container), - MTP_Handle->NotificationEpSize, - MTP_Handle->NotificationPipe); - - - MTP_Handle->events.state = MTP_EVENTS_GETDATA ; - } - break; - case MTP_EVENTS_GETDATA: - if(USBH_LL_GetURBState(phost , MTP_Handle->NotificationPipe) == USBH_URB_DONE) - { - MTP_DecodeEvent(phost); - } - - if(( phost->Timer - MTP_Handle->events.timer) >= MTP_Handle->events.poll) - { - MTP_Handle->events.timer = phost->Timer; - - USBH_InterruptReceiveData(phost, - (uint8_t *)&(MTP_Handle->events.container), - MTP_Handle->NotificationEpSize, - MTP_Handle->NotificationPipe); - - } - break; - - default: - break; - } - - return status; -} - -/** - * @brief MTP_DecodeEvent - * Decode device event sent by responder - * @param phost: Host handle - * @retval None - */ -static void MTP_DecodeEvent (USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - uint16_t code; - uint32_t param1; - - /* Process the event */ - code = MTP_Handle->events.container.code; - param1 = MTP_Handle->events.container.param1; - - switch(code) - { - case PTP_EC_Undefined: - USBH_DbgLog("EVT: PTP_EC_Undefined in session %u", MTP_Handle->ptp.session_id); - break; - case PTP_EC_CancelTransaction: - USBH_DbgLog("EVT: PTP_EC_CancelTransaction in session %u", MTP_Handle->ptp.session_id); - break; - case PTP_EC_ObjectAdded: - USBH_DbgLog("EVT: PTP_EC_ObjectAdded in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_ObjectRemoved: - USBH_DbgLog("EVT: PTP_EC_ObjectRemoved in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StoreAdded: - USBH_DbgLog("EVT: PTP_EC_StoreAdded in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StoreRemoved: - USBH_DbgLog("EVT: PTP_EC_StoreRemoved in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_DevicePropChanged: - USBH_DbgLog("EVT: PTP_EC_DevicePropChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_ObjectInfoChanged: - USBH_DbgLog("EVT: PTP_EC_ObjectInfoChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_DeviceInfoChanged: - USBH_DbgLog("EVT: PTP_EC_DeviceInfoChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_RequestObjectTransfer: - USBH_DbgLog("EVT: PTP_EC_RequestObjectTransfer in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StoreFull: - USBH_DbgLog("EVT: PTP_EC_StoreFull in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_DeviceReset: - USBH_DbgLog("EVT: PTP_EC_DeviceReset in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StorageInfoChanged : - USBH_DbgLog( "EVT: PTP_EC_StorageInfoChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_CaptureComplete : - USBH_DbgLog( "EVT: PTP_EC_CaptureComplete in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_UnreportedStatus : - USBH_DbgLog( "EVT: PTP_EC_UnreportedStatus in session %u", MTP_Handle->ptp.session_id); - break; - - default : - USBH_DbgLog( "Received unknown event in session %u", MTP_Handle->ptp.session_id); - break; - } - - USBH_MTP_EventsCallback(phost, code, param1); -} - -/** - * @brief USBH_MTP_GetDevicePropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc) - -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetDevicePropDesc (phost, propcode, devicepropertydesc)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} -/** - * @brief The function informs that host has rceived an event - * @param pdev: Selected device - * @retval None - */ -__weak void USBH_MTP_EventsCallback(USBH_HandleTypeDef *phost, uint32_t event, uint32_t param) -{ - -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp_ptp.c b/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp_ptp.c deleted file mode 100644 index dd5a293e6c..0000000000 --- a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp_ptp.c +++ /dev/null @@ -1,1769 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp_ptp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file includes the PTP operations layer - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_mtp_ptp.h" -#include "usbh_mtp.h" -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MTP_CLASS -* @{ -*/ - -/** @defgroup USBH_MTP_PTP -* @brief This file includes the mass storage related functions -* @{ -*/ - - -/** @defgroup USBH_MTP_PTP_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MTP_PTP_Private_Defines -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MTP_PTP_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Private_Variables -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Private_FunctionPrototypes -* @{ -*/ -static void PTP_DecodeDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info); -static void PTP_GetStorageIDs (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *stor_ids); -static void PTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint32_t storage_id, PTP_StorageInfoTypedef *stor_info); -static void PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, PTP_ObjectPropDescTypeDef *opd, uint32_t opdlen); -static void PTP_DecodeDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info); -static void PTP_GetDevicePropValue(USBH_HandleTypeDef *phost, - uint32_t *offset, - uint32_t total, - PTP_PropertyValueTypedef* value, - uint16_t datatype); - -static uint32_t PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - MTP_PropertiesTypedef *props, - uint32_t len); - - -static void PTP_BufferFullCallback(USBH_HandleTypeDef *phost); -static void PTP_GetString(uint8_t *str, uint8_t* data, uint16_t *len); -static uint32_t PTP_GetArray16 (uint16_t *array, uint8_t *data, uint32_t offset); -static uint32_t PTP_GetArray32 (uint32_t *array, uint8_t *data, uint32_t offset); -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Exported_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Private_Functions -* @{ -*/ -/** - * @brief USBH_PTP_Init - * The function Initializes the BOT protocol. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_Init(USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - /* Set state to idle to be ready for operations */ - MTP_Handle->ptp.state = PTP_IDLE; - MTP_Handle->ptp.req_state = PTP_REQ_SEND; - - return USBH_OK; -} - -/** - * @brief USBH_PTP_Process - * The function handle the BOT protocol. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - uint32_t len; - - switch (MTP_Handle->ptp.state) - { - case PTP_IDLE: - /*Do Nothing */ - break; - - case PTP_OP_REQUEST_STATE: - USBH_BulkSendData (phost, - (uint8_t*)&(MTP_Handle->ptp.op_container), - MTP_Handle->ptp.op_container.length, - MTP_Handle->DataOutPipe, - 1); - MTP_Handle->ptp.state = PTP_OP_REQUEST_WAIT_STATE; - break; - - case PTP_OP_REQUEST_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataOutPipe); - - if(URB_Status == USBH_URB_DONE) - { - if(MTP_Handle->ptp.flags == PTP_DP_NODATA) - { - MTP_Handle->ptp.state = PTP_RESPONSE_STATE; - } - else if(MTP_Handle->ptp.flags == PTP_DP_SENDDATA) - { - MTP_Handle->ptp.state = PTP_DATA_OUT_PHASE_STATE; - } - else if(MTP_Handle->ptp.flags == PTP_DP_GETDATA) - { - MTP_Handle->ptp.state = PTP_DATA_IN_PHASE_STATE; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send Request */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_DATA_OUT_PHASE_STATE: - - USBH_BulkSendData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataOutEpSize , - MTP_Handle->DataOutPipe, - 1); - - - MTP_Handle->ptp.state = PTP_DATA_OUT_PHASE_WAIT_STATE; - break; - - case PTP_DATA_OUT_PHASE_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataOutPipe); - - if(URB_Status == USBH_URB_DONE) - { - /* Adjudt Data pointer and data length */ - if(MTP_Handle->ptp.data_length > MTP_Handle->DataOutEpSize) - { - MTP_Handle->ptp.data_ptr += MTP_Handle->DataOutEpSize; - MTP_Handle->ptp.data_length -= MTP_Handle->DataOutEpSize; - MTP_Handle->ptp.data_packet += MTP_Handle->DataOutEpSize; - - if(MTP_Handle->ptp.data_packet >= PTP_USB_BULK_PAYLOAD_LEN_READ) - { - PTP_BufferFullCallback (phost); - MTP_Handle->ptp.data_packet = 0; - MTP_Handle->ptp.iteration++; - } - - } - else - { - MTP_Handle->ptp.data_length = 0; - } - - /* More Data To be Sent */ - if(MTP_Handle->ptp.data_length > 0) - { - USBH_BulkSendData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataOutEpSize , - MTP_Handle->DataOutPipe, - 1); - } - else - { - /* If value was 0, and successful transfer, then change the state */ - MTP_Handle->ptp.state = PTP_RESPONSE_STATE; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send same data */ - MTP_Handle->ptp.state = PTP_DATA_OUT_PHASE_STATE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_DATA_IN_PHASE_STATE: - /* Send first packet */ - USBH_BulkReceiveData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataInEpSize, - MTP_Handle->DataInPipe); - - MTP_Handle->ptp.state = PTP_DATA_IN_PHASE_WAIT_STATE; - break; - - case PTP_DATA_IN_PHASE_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataInPipe); - - if(URB_Status == USBH_URB_DONE) - { - len = USBH_LL_GetLastXferSize (phost, MTP_Handle->DataInPipe); - - if( MTP_Handle->ptp.data_packet_counter++ == 0) - { - /* This is the first packet; so retrieve exact data length from payload */ - MTP_Handle->ptp.data_length = *(uint32_t*)(MTP_Handle->ptp.data_ptr); - MTP_Handle->ptp.iteration = 0; - } - - if((len >= MTP_Handle->DataInEpSize) && (MTP_Handle->ptp.data_length > 0)) - { - MTP_Handle->ptp.data_ptr += len; - MTP_Handle->ptp.data_length -= len; - MTP_Handle->ptp.data_packet += len; - - if(MTP_Handle->ptp.data_packet >= PTP_USB_BULK_PAYLOAD_LEN_READ) - { - PTP_BufferFullCallback (phost); - MTP_Handle->ptp.data_packet = 0; - MTP_Handle->ptp.iteration++; - } - - /* Continue receiving data*/ - USBH_BulkReceiveData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataInEpSize, - MTP_Handle->DataInPipe); - } - else - { - MTP_Handle->ptp.data_length -= len; - MTP_Handle->ptp.state = PTP_RESPONSE_STATE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_RESPONSE_STATE: - - USBH_BulkReceiveData (phost, - (uint8_t*)&(MTP_Handle->ptp.resp_container), - PTP_USB_BULK_REQ_RESP_MAX_LEN , - MTP_Handle->DataInPipe); - - MTP_Handle->ptp.state = PTP_RESPONSE_WAIT_STATE; - break; - - case PTP_RESPONSE_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataInPipe); - - if(URB_Status == USBH_URB_DONE) - { - USBH_PTP_GetResponse (phost, &ptp_container); - - if(ptp_container.Code == PTP_RC_OK) - { - status = USBH_OK; - } - else - { - status = USBH_FAIL; - } - MTP_Handle->ptp.req_state = PTP_REQ_SEND; - } - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_ERROR: - MTP_Handle->ptp.req_state = PTP_REQ_SEND; - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_OpenSession - * Open a new session - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_SendRequest (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *req) -{ - USBH_StatusTypeDef status = USBH_OK; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - /* Clear PTP Data container*/ - USBH_memset(&(MTP_Handle->ptp.op_container), 0, sizeof(PTP_OpContainerTypedef)); - - /* build appropriate USB container */ - MTP_Handle->ptp.op_container.length = PTP_USB_BULK_REQ_LEN- (sizeof(uint32_t)*(5-req->Nparam)); - MTP_Handle->ptp.op_container.type = PTP_USB_CONTAINER_COMMAND; - MTP_Handle->ptp.op_container.code = req->Code; - MTP_Handle->ptp.op_container.trans_id = req->Transaction_ID; - MTP_Handle->ptp.op_container.param1 = req->Param1; - MTP_Handle->ptp.op_container.param2 = req->Param2; - MTP_Handle->ptp.op_container.param3 = req->Param3; - MTP_Handle->ptp.op_container.param4 = req->Param4; - MTP_Handle->ptp.op_container.param5 = req->Param5; - - return status; -} - -/** - * @brief USBH_PTP_OpenSession - * Open a new session - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetResponse (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *resp) -{ - USBH_StatusTypeDef status = USBH_OK; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - /* build an appropriate PTPContainer */ - resp->Code = MTP_Handle->ptp.resp_container.code; - resp->SessionID = MTP_Handle->ptp.session_id; - resp->Transaction_ID = MTP_Handle->ptp.resp_container.trans_id; - resp->Param1 = MTP_Handle->ptp.resp_container.param1; - resp->Param2 = MTP_Handle->ptp.resp_container.param2; - resp->Param3 = MTP_Handle->ptp.resp_container.param3; - resp->Param4 = MTP_Handle->ptp.resp_container.param4; - resp->Param5 = MTP_Handle->ptp.resp_container.param5; - - return status; -} - -/** - * @brief The function informs user that data buffer is full - * @param phost: host handle - * @retval None - */ -void PTP_BufferFullCallback(USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - switch (MTP_Handle->ptp.data_container.code) - { - case PTP_OC_GetDeviceInfo: - PTP_DecodeDeviceInfo (phost, &(MTP_Handle->info.devinfo)); - break; - - case PTP_OC_GetPartialObject: - case PTP_OC_GetObject: - - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* copy it to object */ - USBH_memcpy(MTP_Handle->ptp.object_ptr, MTP_Handle->ptp.data_container.payload.data, PTP_USB_BULK_PAYLOAD_LEN_READ); - - /* next packet should be directly copied to object */ - MTP_Handle->ptp.data_ptr = (MTP_Handle->ptp.object_ptr + PTP_USB_BULK_PAYLOAD_LEN_READ); - } - break; - - case PTP_OC_SendObject: - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* next packet should be directly copied to object */ - MTP_Handle->ptp.data_ptr = (MTP_Handle->ptp.object_ptr + PTP_USB_BULK_PAYLOAD_LEN_READ); - } - break; - - default: - break; - - - } -} - -/** - * @brief PTP_GetDeviceInfo - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval None - */ -static void PTP_DecodeDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint32_t totallen; - uint16_t len; - - /* Max device info is PTP_USB_BULK_HS_MAX_PACKET_LEN_READ */ - USBH_DbgLog (" MTP device info size exceeds internal buffer size.\ - only available data are decoded."); - - if(MTP_Handle->ptp.iteration == 0) - { - dev_info->StandardVersion = LE16(&data[PTP_di_StandardVersion]); - dev_info->VendorExtensionID = LE32(&data[PTP_di_VendorExtensionID]); - dev_info->VendorExtensionVersion = LE16(&data[PTP_di_VendorExtensionVersion]); - PTP_GetString(dev_info->VendorExtensionDesc, &data[PTP_di_VendorExtensionDesc], &len); - - totallen=len*2+1; - dev_info->FunctionalMode = LE16(&data[PTP_di_FunctionalMode+totallen]); - dev_info->OperationsSupported_len = PTP_GetArray16 ((uint16_t *)&dev_info->OperationsSupported, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->OperationsSupported_len*sizeof(uint16_t)+sizeof(uint32_t); - dev_info->EventsSupported_len = PTP_GetArray16 ((uint16_t *)&dev_info->EventsSupported, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->EventsSupported_len*sizeof(uint16_t)+sizeof(uint32_t); - dev_info->DevicePropertiesSupported_len = PTP_GetArray16 ((uint16_t *)&dev_info->DevicePropertiesSupported, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->DevicePropertiesSupported_len*sizeof(uint16_t)+sizeof(uint32_t); - - dev_info->CaptureFormats_len = PTP_GetArray16 ((uint16_t *)&dev_info->CaptureFormats, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->CaptureFormats_len*sizeof(uint16_t)+sizeof(uint32_t); - dev_info->ImageFormats_len = PTP_GetArray16 ((uint16_t *)&dev_info->ImageFormats, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->ImageFormats_len*sizeof(uint16_t)+sizeof(uint32_t); - PTP_GetString(dev_info->Manufacturer, &data[PTP_di_OperationsSupported+totallen], &len); - - totallen+=len*2+1; - PTP_GetString(dev_info->Model, &data[PTP_di_OperationsSupported+totallen], &len); - - totallen+=len*2+1; - PTP_GetString(dev_info->DeviceVersion, &data[PTP_di_OperationsSupported+totallen], &len); - - totallen+=len*2+1; - PTP_GetString(dev_info->SerialNumber, &data[PTP_di_OperationsSupported+totallen], &len); - } -} - -/** - * @brief PTP_GetStorageIDs - * Gets Storage Ids and fills stor_ids structure. - * @param phost: Host handle - * @param stor_ids: Storage IDsstructure - * @retval None - */ -static void PTP_GetStorageIDs (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *stor_ids) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - - stor_ids->n = PTP_GetArray32 (stor_ids->Storage, data, 0); -} - - -/** - * @brief PTP_GetStorageInfo - * Gets Storage Info and fills stor_info structure. - * @param phost: Host handle - * @param stor_ids: Storage IDsstructure - * @retval None - */ -static void PTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint32_t storage_id, PTP_StorageInfoTypedef *stor_info) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - - uint16_t len; - - stor_info->StorageType=LE16(&data[PTP_si_StorageType]); - stor_info->FilesystemType=LE16(&data[PTP_si_FilesystemType]); - stor_info->AccessCapability=LE16(&data[PTP_si_AccessCapability]); - stor_info->MaxCapability=LE64(&data[PTP_si_MaxCapability]); - stor_info->FreeSpaceInBytes=LE64(&data[PTP_si_FreeSpaceInBytes]); - stor_info->FreeSpaceInImages=LE32(&data[PTP_si_FreeSpaceInImages]); - - PTP_GetString(stor_info->StorageDescription, &data[PTP_si_StorageDescription], &len); - PTP_GetString(stor_info->VolumeLabel, &data[PTP_si_StorageDescription+len*2+1], &len); -} - -/** - * @brief PTP_GetObjectInfo - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param object_info: object info structure - * @retval None - */ -static void PTP_GetObjectInfo (USBH_HandleTypeDef *phost, PTP_ObjectInfoTypedef *object_info) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint16_t filenamelen; - - object_info->StorageID=LE32(&data[PTP_oi_StorageID]); - object_info->ObjectFormat=LE16(&data[PTP_oi_ObjectFormat]); - object_info->ProtectionStatus=LE16(&data[PTP_oi_ProtectionStatus]); - object_info->ObjectCompressedSize=LE32(&data[PTP_oi_ObjectCompressedSize]); - - /* For Samsung Galaxy */ - if ((data[PTP_oi_filenamelen] == 0) && (data[PTP_oi_filenamelen+4] != 0)) - { - data += 4; - } - object_info->ThumbFormat=LE16(&data[PTP_oi_ThumbFormat]); - object_info->ThumbCompressedSize=LE32(&data[PTP_oi_ThumbCompressedSize]); - object_info->ThumbPixWidth=LE32(&data[PTP_oi_ThumbPixWidth]); - object_info->ThumbPixHeight=LE32(&data[PTP_oi_ThumbPixHeight]); - object_info->ImagePixWidth=LE32(&data[PTP_oi_ImagePixWidth]); - object_info->ImagePixHeight=LE32(&data[PTP_oi_ImagePixHeight]); - object_info->ImageBitDepth=LE32(&data[PTP_oi_ImageBitDepth]); - object_info->ParentObject=LE32(&data[PTP_oi_ParentObject]); - object_info->AssociationType=LE16(&data[PTP_oi_AssociationType]); - object_info->AssociationDesc=LE32(&data[PTP_oi_AssociationDesc]); - object_info->SequenceNumber=LE32(&data[PTP_oi_SequenceNumber]); - PTP_GetString(object_info->Filename, &data[PTP_oi_filenamelen], &filenamelen); -} - - -/** - * @brief PTP_GetObjectPropDesc - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param opd: object prop descriptor structure - * @retval None - */ -static void PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, PTP_ObjectPropDescTypeDef *opd, uint32_t opdlen) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint32_t offset = 0, i; - - opd->ObjectPropertyCode=LE16(&data[PTP_opd_ObjectPropertyCode]); - opd->DataType=LE16(&data[PTP_opd_DataType]); - opd->GetSet=*(uint8_t *)(&data[PTP_opd_GetSet]); - - offset = PTP_opd_FactoryDefaultValue; - PTP_GetDevicePropValue (phost, &offset, opdlen, &opd->FactoryDefaultValue, opd->DataType); - - opd->GroupCode=LE32(&data[offset]); - offset+=sizeof(uint32_t); - - opd->FormFlag=*(uint8_t *)(&data[offset]); - offset+=sizeof(uint8_t); - - switch (opd->FormFlag) - { - case PTP_OPFF_Range: - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Range.MinimumValue, opd->DataType); - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Range.MaximumValue, opd->DataType); - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Range.StepSize, opd->DataType); - break; - - case PTP_OPFF_Enumeration: - - opd->FORM.Enum.NumberOfValues = LE16(&data[offset]); - offset+=sizeof(uint16_t); - - for (i=0 ; i < opd->FORM.Enum.NumberOfValues ; i++) - { - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Enum.SupportedValue[i], opd->DataType); - } - break; - default: - break; - } -} - -/** - * @brief PTP_GetDevicePropValue - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param opd: object prop descriptor structure - * @retval None - */ -static void PTP_GetDevicePropValue(USBH_HandleTypeDef *phost, - uint32_t *offset, - uint32_t total, - PTP_PropertyValueTypedef* value, - uint16_t datatype) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint16_t len; - switch (datatype) - { - case PTP_DTC_INT8: - value->i8 = *(uint8_t *)&(data[*offset]); - *offset += 1; - break; - case PTP_DTC_UINT8: - value->u8 = *(uint8_t *)&(data[*offset]); - *offset += 1; - break; - case PTP_DTC_INT16: - - value->i16 = LE16(&(data[*offset])); - *offset += 2; - break; - case PTP_DTC_UINT16: - value->u16 = LE16(&(data[*offset])); - *offset += 2; - break; - case PTP_DTC_INT32: - value->i32 = LE32(&(data[*offset])); - *offset += 4; - break; - case PTP_DTC_UINT32: - value->u32 = LE32(&(data[*offset])); - *offset += 4; - break; - case PTP_DTC_INT64: - value->i64 = LE64(&(data[*offset])); - *offset += 8; - break; - case PTP_DTC_UINT64: - value->u64 = LE64(&(data[*offset])); - *offset += 8; - break; - - case PTP_DTC_UINT128: - *offset += 16; - break; - case PTP_DTC_INT128: - *offset += 16; - break; - - case PTP_DTC_STR: - - PTP_GetString((uint8_t *)value->str, (uint8_t *)&(data[*offset]), &len); - *offset += len*2+1; - break; - default: - break; - } -} - - -/** - * @brief PTP_GetDevicePropValue - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param opd: object prop descriptor structure - * @retval None - */ -static uint32_t PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - MTP_PropertiesTypedef *props, - uint32_t len) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint32_t prop_count; - uint32_t offset = 0, i; - - prop_count = LE32(data); - - - if (prop_count == 0) - { - return 0; - } - - data += sizeof(uint32_t); - len -= sizeof(uint32_t); - - for (i = 0; i < prop_count; i++) - { - if (len <= 0) - { - return 0; - } - - props[i].ObjectHandle = LE32(data); - data += sizeof(uint32_t); - len -= sizeof(uint32_t); - - props[i].property = LE16(data); - data += sizeof(uint16_t); - len -= sizeof(uint16_t); - - props[i].datatype = LE16(data); - data += sizeof(uint16_t); - len -= sizeof(uint16_t); - - offset = 0; - - PTP_GetDevicePropValue(phost, &offset, len, &props[i].propval, props[i].datatype); - - data += offset; - len -= offset; - } - - return prop_count; -} - -/** - * @brief PTP_GetString - * Gets SCII String from. - * @param str: ascii string - * @param data: Device info structure - * @retval None - */ -static void PTP_GetString (uint8_t *str, uint8_t* data, uint16_t *len) -{ - uint16_t strlength; - uint16_t idx; - - *len = data[0]; - strlength = 2 * data[0]; - data ++; /* Adjust the offset ignoring the String Len */ - - for (idx = 0; idx < strlength; idx+=2 ) - { - /* Copy Only the string and ignore the UNICODE ID, hence add the src */ - *str = data[idx]; - str++; - } - *str = 0; /* mark end of string */ -} - -/** - * @brief PTP_GetString - * Gets SCII String from. - * @param str: ascii string - * @param data: Device info structure - * @retval None - */ - -static uint32_t PTP_GetArray16 (uint16_t *array, uint8_t *data, uint32_t offset) -{ - uint32_t size, idx = 0; - - size=LE32(&data[offset]); - while (size > idx) - { - array[idx] = LE16(&data[offset+(sizeof(uint16_t)*(idx+2))]); - idx++; - } - return size; -} - -/** - * @brief PTP_GetString - * Gets SCII String from. - * @param str: ascii string - * @param data: Device info structure - * @retval None - */ - -static uint32_t PTP_GetArray32 (uint32_t *array, uint8_t *data, uint32_t offset) -{ - uint32_t size, idx = 0; - - size=LE32(&data[offset]); - while (size > idx) - { - array[idx] = LE32(&data[offset+(sizeof(uint32_t)*(idx+1))]); - idx++; - } - return size; -} - -/******************************************************************************* - - PTP Requests - -*******************************************************************************/ -/** - * @brief USBH_PTP_OpenSession - * Open a new session - * @param phost: Host handle - * @param session: Session ID (MUST BE > 0) - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_OpenSession (USBH_HandleTypeDef *phost, uint32_t session) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Init session params */ - MTP_Handle->ptp.transaction_id = 0x00000000; - MTP_Handle->ptp.session_id = session; - MTP_Handle->ptp.flags = PTP_DP_NODATA; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_OpenSession; - ptp_container.SessionID = session; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = session; - ptp_container.Nparam = 1; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetDevicePropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetDevicePropDesc; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = propcode; - ptp_container.Nparam = 1; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - devicepropertydesc->DevicePropertyCode = LE16(&data[PTP_dpd_DevicePropertyCode]); - devicepropertydesc->DataType = LE16(&data[PTP_dpd_DataType]); - devicepropertydesc->GetSet = *(uint8_t *)(&data[PTP_dpd_GetSet]); - devicepropertydesc->FormFlag = PTP_DPFF_None; - } - break; - - default: - break; - } - return status; -} -/** - * @brief USBH_PTP_GetDeviceInfo - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetDeviceInfo; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Nparam = 0; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_DecodeDeviceInfo (phost, dev_info); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetStorageIds - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetStorageIds (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *storage_ids) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetStorageIDs; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Nparam = 0; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetStorageIDs (phost, storage_ids); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetDeviceInfo - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint32_t storage_id, PTP_StorageInfoTypedef *storage_info) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetStorageInfo; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = storage_id; - ptp_container.Nparam = 1; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetStorageInfo (phost, storage_id, storage_info); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetNumObjects - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_NODATA; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetNumObjects; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = storage_id; - ptp_container.Param2 = objectformatcode; - ptp_container.Param3 = associationOH; - ptp_container.Nparam = 3; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - *numobs = MTP_Handle->ptp.resp_container.param1; - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectHandles - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectHandles; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = storage_id; - ptp_container.Param2 = objectformatcode; - ptp_container.Param3 = associationOH; - ptp_container.Nparam = 3; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - objecthandles->n = PTP_GetArray32 (objecthandles->Handler, - MTP_Handle->ptp.data_container.payload.data, - 0); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectInfo - * Gets objert info - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* object_info) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectInfo; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Nparam = 1; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetObjectInfo (phost, object_info); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_DeleteObject - * Delete an object. - * @param phost: Host handle - * @param handle : Object Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_NODATA; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_DeleteObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Param2 = objectformatcode; - ptp_container.Nparam = 2; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObject - * Gets object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* set object control params */ - MTP_Handle->ptp.object_ptr = object; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Nparam = 1; - - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* copy it to object */ - USBH_memcpy(MTP_Handle->ptp.object_ptr, MTP_Handle->ptp.data_container.payload.data, PTP_USB_BULK_PAYLOAD_LEN_READ); - } - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetPartialObject - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, - uint8_t *object, - uint32_t *len) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* set object control params */ - MTP_Handle->ptp.object_ptr = object; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetPartialObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Param2 = offset; - ptp_container.Param3 = maxbytes; - ptp_container.Nparam = 3; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - *len = MTP_Handle->ptp.resp_container.param1; - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* copy it to object */ - USBH_memcpy(MTP_Handle->ptp.object_ptr, MTP_Handle->ptp.data_container.payload.data, *len); - } - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectPropsSupported - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectPropsSupported; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = ofc; - ptp_container.Nparam = 1; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - *propnum = PTP_GetArray16 (props, MTP_Handle->ptp.data_container.payload.data, 0); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectPropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectPropDesc; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = opc; - ptp_container.Param2 = ofc; - ptp_container.Nparam = 2; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetObjectPropDesc(phost, opd, MTP_Handle->ptp.data_length); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectPropList - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* copy first packet of the object into data container */ - USBH_memcpy(MTP_Handle->ptp.data_container.payload.data, MTP_Handle->ptp.object_ptr, PTP_USB_BULK_PAYLOAD_LEN_READ); - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjPropList; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Param2 = 0x00000000U; /* 0x00000000U should be "all formats" */ - ptp_container.Param3 = 0xFFFFFFFFU; /* 0xFFFFFFFFU should be "all properties" */ - ptp_container.Param4 = 0x00000000U; - ptp_container.Param5 = 0xFFFFFFFFU; /* Return full tree below the Param1 handle */ - ptp_container.Nparam = 5; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetObjectPropList (phost, pprops, MTP_Handle->ptp.data_length); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_SendObject - * Send an object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_SENDDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - MTP_Handle->ptp.iteration = 0; - - /* set object control params */ - MTP_Handle->ptp.object_ptr = object; - MTP_Handle->ptp.data_length = size; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_SendObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Nparam = 0; - - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - break; - - default: - break; - } - return status; -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/Template/Inc/usbh_template.h b/ports/stm32/usbhost/Class/Template/Inc/usbh_template.h deleted file mode 100644 index 728a36c86b..0000000000 --- a/ports/stm32/usbhost/Class/Template/Inc/usbh_template.h +++ /dev/null @@ -1,122 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_template.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_TEMPLATE_CORE_H -#define __USBH_TEMPLATE_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_TEMPLATE_CLASS -* @{ -*/ - -/** @defgroup USBH_TEMPLATE_CORE -* @brief This file is the Header file for USBH_TEMPLATE_CORE.c -* @{ -*/ - - -/** - * @} - */ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Types -* @{ -*/ - -/* States for TEMPLATE State Machine */ - - -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Defines -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Variables -* @{ -*/ -extern USBH_ClassTypeDef TEMPLATE_Class; -#define USBH_TEMPLATE_CLASS &TEMPLATE_Class - -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_FunctionsPrototype -* @{ -*/ -USBH_StatusTypeDef USBH_TEMPLATE_IOProcess (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_TEMPLATE_Init (USBH_HandleTypeDef *phost); -/** -* @} -*/ - - -#endif /* __USBH_TEMPLATE_CORE_H */ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/Template/Src/usbh_template.c b/ports/stm32/usbhost/Class/Template/Src/usbh_template.c deleted file mode 100644 index 2ea14a89e2..0000000000 --- a/ports/stm32/usbhost/Class/Template/Src/usbh_template.c +++ /dev/null @@ -1,240 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the MTP Layer Handlers for USB Host MTP class. - * - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_template.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_TEMPLATE_CLASS -* @{ -*/ - -/** @defgroup USBH_TEMPLATE_CORE -* @brief This file includes TEMPLATE Layer Handlers for USB Host TEMPLATE class. -* @{ -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_TEMPLATE_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_TEMPLATE_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_TEMPLATE_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_TEMPLATE_ClassRequest (USBH_HandleTypeDef *phost); - - -USBH_ClassTypeDef TEMPLATE_Class = -{ - "TEMPLATE", - USB_TEMPLATE_CLASS, - USBH_TEMPLATE_InterfaceInit, - USBH_TEMPLATE_InterfaceDeInit, - USBH_TEMPLATE_ClassRequest, - USBH_TEMPLATE_Process -}; -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Functions -* @{ -*/ - -/** - * @brief USBH_TEMPLATE_InterfaceInit - * The function init the TEMPLATE class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_TEMPLATE_InterfaceInit (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - - - -/** - * @brief USBH_TEMPLATE_InterfaceDeInit - * The function DeInit the Pipes used for the TEMPLATE class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_TEMPLATE_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_TEMPLATE_ClassRequest - * The function is responsible for handling Standard requests - * for TEMPLATE class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_TEMPLATE_ClassRequest (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - - -/** - * @brief USBH_TEMPLATE_Process - * The function is for managing state machine for TEMPLATE data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_TEMPLATE_Process (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - - -/** - * @brief USBH_TEMPLATE_Init - * The function Initialize the TEMPLATE function - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_TEMPLATE_Init (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_BUSY; -#if (USBH_USE_OS == 1) - osEvent event; - - event = osMessageGet( phost->class_ready_event, osWaitForever ); - - if( event.status == osEventMessage ) - { - if(event.value.v == USBH_CLASS_EVENT) - { -#else - - while ((Status == USBH_BUSY) || (Status == USBH_FAIL)) - { - /* Host background process */ - USBH_Process(phost); - if(phost->gState == HOST_CLASS) - { -#endif - Status = USBH_OK; - } - } - return Status; -} - -/** - * @brief USBH_TEMPLATE_IOProcess - * TEMPLATE TEMPLATE process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_TEMPLATE_IOProcess (USBH_HandleTypeDef *phost) -{ - if (phost->device.is_connected == 1) - { - if(phost->gState == HOST_CLASS) - { - USBH_TEMPLATE_Process(phost); - } - } - - return USBH_OK; -} - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Core/Inc/usbh_conf_template.h b/ports/stm32/usbhost/Core/Inc/usbh_conf_template.h deleted file mode 100644 index 8f85e13604..0000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_conf_template.h +++ /dev/null @@ -1,151 +0,0 @@ -/** - ****************************************************************************** - * @file USBH_conf.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief General low level driver configuration - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBH_CONF__H__ -#define __USBH_CONF__H__ - -#include "stm32f4xx.h" -#include -#include -#include - -/* Includes ------------------------------------------------------------------*/ - -/** @addtogroup USBH_OTG_DRIVER - * @{ - */ - -/** @defgroup USBH_CONF - * @brief usb otg low level driver configuration file - * @{ - */ - -/** @defgroup USBH_CONF_Exported_Defines - * @{ - */ - -#define USBH_MAX_NUM_ENDPOINTS 2 -#define USBH_MAX_NUM_INTERFACES 2 -#define USBH_MAX_NUM_CONFIGURATION 1 -#define USBH_KEEP_CFG_DESCRIPTOR 1 -#define USBH_MAX_NUM_SUPPORTED_CLASS 1 -#define USBH_MAX_SIZE_CONFIGURATION 0x200 -#define USBH_MAX_DATA_BUFFER 0x200 -#define USBH_DEBUG_LEVEL 2 -#define USBH_USE_OS 1 - -/** @defgroup USBH_Exported_Macros - * @{ - */ - - /* Memory management macros */ -#define USBH_malloc malloc -#define USBH_free free -#define USBH_memset memset -#define USBH_memcpy memcpy - - /* DEBUG macros */ - - -#if (USBH_DEBUG_LEVEL > 0) -#define USBH_UsrLog(...) printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_UsrLog(...) -#endif - - -#if (USBH_DEBUG_LEVEL > 1) - -#define USBH_ErrLog(...) printf("ERROR: ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_ErrLog(...) -#endif - - -#if (USBH_DEBUG_LEVEL > 2) -#define USBH_DbgLog(...) printf("DEBUG : ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_DbgLog(...) -#endif - -/** - * @} - */ - -/** - * @} - */ - - -/** @defgroup USBH_CONF_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CONF_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CONF_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CONF_Exported_FunctionsPrototype - * @{ - */ -/** - * @} - */ - - -#endif //__USBH_CONF__H__ - - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_core.h b/ports/stm32/usbhost/Core/Inc/usbh_core.h deleted file mode 100644 index bc3da6d1fe..0000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_core.h +++ /dev/null @@ -1,161 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_core.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_core.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_CORE_H -#define __USBH_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_conf.h" -#include "usbh_def.h" -#include "usbh_ioreq.h" -#include "usbh_pipes.h" -#include "usbh_ctlreq.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_CORE - * @brief This file is the Header file for usbh_core.c - * @{ - */ - - -/** @defgroup USBH_CORE_Exported_Defines - * @{ - */ - -/** - * @} - */ -#define HOST_USER_SELECT_CONFIGURATION 1 -#define HOST_USER_CLASS_ACTIVE 2 -#define HOST_USER_CLASS_SELECTED 3 -#define HOST_USER_CONNECTION 4 -#define HOST_USER_DISCONNECTION 5 - - - -/** - * @} - */ - - - -/** @defgroup USBH_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_CORE_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_CORE_Exported_FunctionsPrototype - * @{ - */ - - -USBH_StatusTypeDef USBH_Init(USBH_HandleTypeDef *phost, void (*pUsrFunc)(USBH_HandleTypeDef *phost, uint8_t ), uint8_t id); -USBH_StatusTypeDef USBH_DeInit(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_RegisterClass(USBH_HandleTypeDef *phost, USBH_ClassTypeDef *pclass); -USBH_StatusTypeDef USBH_SelectInterface(USBH_HandleTypeDef *phost, uint8_t interface); -uint8_t USBH_FindInterface(USBH_HandleTypeDef *phost, - uint8_t Class, - uint8_t SubClass, - uint8_t Protocol); -uint8_t USBH_GetActiveClass(USBH_HandleTypeDef *phost); - -uint8_t USBH_FindInterfaceIndex(USBH_HandleTypeDef *phost, - uint8_t interface_number, - uint8_t alt_settings); - -USBH_StatusTypeDef USBH_Start (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_Stop (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_Process (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_ReEnumerate (USBH_HandleTypeDef *phost); - -/* USBH Low Level Driver */ -USBH_StatusTypeDef USBH_LL_Init (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_DeInit (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_Start (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_Stop (USBH_HandleTypeDef *phost); - -USBH_StatusTypeDef USBH_LL_Connect (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_Disconnect (USBH_HandleTypeDef *phost); -USBH_SpeedTypeDef USBH_LL_GetSpeed (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_ResetPort (USBH_HandleTypeDef *phost); -uint32_t USBH_LL_GetLastXferSize (USBH_HandleTypeDef *phost, uint8_t ); -USBH_StatusTypeDef USBH_LL_DriverVBUS (USBH_HandleTypeDef *phost, uint8_t ); - -USBH_StatusTypeDef USBH_LL_OpenPipe (USBH_HandleTypeDef *phost, uint8_t, uint8_t, uint8_t, uint8_t , uint8_t, uint16_t ); -USBH_StatusTypeDef USBH_LL_ClosePipe (USBH_HandleTypeDef *phost, uint8_t ); -USBH_StatusTypeDef USBH_LL_SubmitURB (USBH_HandleTypeDef *phost, uint8_t, uint8_t,uint8_t, uint8_t, uint8_t*, uint16_t, uint8_t ); -USBH_URBStateTypeDef USBH_LL_GetURBState (USBH_HandleTypeDef *phost, uint8_t ); -#if (USBH_USE_OS == 1) -USBH_StatusTypeDef USBH_LL_NotifyURBChange (USBH_HandleTypeDef *phost); -#endif -USBH_StatusTypeDef USBH_LL_SetToggle (USBH_HandleTypeDef *phost, uint8_t , uint8_t ); -uint8_t USBH_LL_GetToggle (USBH_HandleTypeDef *phost, uint8_t ); - -/* USBH Time base */ -void USBH_Delay (uint32_t Delay); -void USBH_LL_SetTimer (USBH_HandleTypeDef *phost, uint32_t ); -void USBH_LL_IncTimer (USBH_HandleTypeDef *phost); -/** - * @} - */ - -#endif /* __CORE_H */ -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_ctlreq.h b/ports/stm32/usbhost/Core/Inc/usbh_ctlreq.h deleted file mode 100644 index cd61755e3e..0000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_ctlreq.h +++ /dev/null @@ -1,147 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ctlreq.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_ctlreq.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_CTLREQ_H -#define __USBH_CTLREQ_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_CTLREQ - * @brief This file is the - * @{ - */ - - -/** @defgroup USBH_CTLREQ_Exported_Defines - * @{ - */ -/*Standard Feature Selector for clear feature command*/ -#define FEATURE_SELECTOR_ENDPOINT 0X00 -#define FEATURE_SELECTOR_DEVICE 0X01 - - -#define INTERFACE_DESC_TYPE 0x04 -#define ENDPOINT_DESC_TYPE 0x05 -#define INTERFACE_DESC_SIZE 0x09 - -/** - * @} - */ - - -/** @defgroup USBH_CTLREQ_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CTLREQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CTLREQ_Exported_Variables - * @{ - */ -extern uint8_t USBH_CfgDesc[512]; -/** - * @} - */ - -/** @defgroup USBH_CTLREQ_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_CtlReq (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length); - -USBH_StatusTypeDef USBH_GetDescriptor(USBH_HandleTypeDef *phost, - uint8_t req_type, - uint16_t value_idx, - uint8_t* buff, - uint16_t length ); - -USBH_StatusTypeDef USBH_Get_DevDesc(USBH_HandleTypeDef *phost, - uint8_t length); - -USBH_StatusTypeDef USBH_Get_StringDesc(USBH_HandleTypeDef *phost, - uint8_t string_index, - uint8_t *buff, - uint16_t length); - -USBH_StatusTypeDef USBH_SetCfg(USBH_HandleTypeDef *phost, - uint16_t configuration_value); - -USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost, - uint16_t length); - -USBH_StatusTypeDef USBH_SetAddress(USBH_HandleTypeDef *phost, - uint8_t DeviceAddress); - -USBH_StatusTypeDef USBH_SetInterface(USBH_HandleTypeDef *phost, - uint8_t ep_num, uint8_t altSetting); - -USBH_StatusTypeDef USBH_ClrFeature(USBH_HandleTypeDef *phost, - uint8_t ep_num); - -USBH_DescHeader_t *USBH_GetNextDesc (uint8_t *pbuf, - uint16_t *ptr); -/** - * @} - */ - -#endif /* __USBH_CTLREQ_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_def.h b/ports/stm32/usbhost/Core/Inc/usbh_def.h deleted file mode 100644 index cf24d69f37..0000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_def.h +++ /dev/null @@ -1,480 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_def.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Definitions used in the USB host library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_DEF - * @brief This file is includes USB descriptors - * @{ - */ - -#ifndef USBH_DEF_H -#define USBH_DEF_H - -#include "usbh_conf.h" - -#ifndef NULL -#define NULL ((void *)0) -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef TRUE -#define TRUE 1 -#endif - - -#define ValBit(VAR,POS) (VAR & (1 << POS)) -#define SetBit(VAR,POS) (VAR |= (1 << POS)) -#define ClrBit(VAR,POS) (VAR &= ((1 << POS)^255)) - -#define LE16(addr) (((uint16_t)(*((uint8_t *)(addr))))\ - + (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) - -#define LE16S(addr) (uint16_t)(LE16((addr))) - -#define LE32(addr) ((((uint32_t)(*(((uint8_t *)(addr)) + 0))) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 1))) << 8) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 2))) << 16) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 3))) << 24))) - -#define LE64(addr) ((((uint64_t)(*(((uint8_t *)(addr)) + 0))) + \ - (((uint64_t)(*(((uint8_t *)(addr)) + 1))) << 8) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 2))) << 16) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 3))) << 24) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 4))) << 32) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 5))) << 40) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 6))) << 48) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 7))) << 56))) - - -#define LE24(addr) ((((uint32_t)(*(((uint8_t *)(addr)) + 0))) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 1))) << 8) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 2))) << 16))) - - -#define LE32S(addr) (int32_t)(LE32((addr))) - - - -#define USB_LEN_DESC_HDR 0x02 -#define USB_LEN_DEV_DESC 0x12 -#define USB_LEN_CFG_DESC 0x09 -#define USB_LEN_IF_DESC 0x09 -#define USB_LEN_EP_DESC 0x07 -#define USB_LEN_OTG_DESC 0x03 -#define USB_LEN_SETUP_PKT 0x08 - -/* bmRequestType :D7 Data Phase Transfer Direction */ -#define USB_REQ_DIR_MASK 0x80 -#define USB_H2D 0x00 -#define USB_D2H 0x80 - -/* bmRequestType D6..5 Type */ -#define USB_REQ_TYPE_STANDARD 0x00 -#define USB_REQ_TYPE_CLASS 0x20 -#define USB_REQ_TYPE_VENDOR 0x40 -#define USB_REQ_TYPE_RESERVED 0x60 - -/* bmRequestType D4..0 Recipient */ -#define USB_REQ_RECIPIENT_DEVICE 0x00 -#define USB_REQ_RECIPIENT_INTERFACE 0x01 -#define USB_REQ_RECIPIENT_ENDPOINT 0x02 -#define USB_REQ_RECIPIENT_OTHER 0x03 - -/* Table 9-4. Standard Request Codes */ -/* bRequest , Value */ -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -/* Table 9-5. Descriptor Types of USB Specifications */ -#define USB_DESC_TYPE_DEVICE 1 -#define USB_DESC_TYPE_CONFIGURATION 2 -#define USB_DESC_TYPE_STRING 3 -#define USB_DESC_TYPE_INTERFACE 4 -#define USB_DESC_TYPE_ENDPOINT 5 -#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 -#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 -#define USB_DESC_TYPE_INTERFACE_POWER 8 -#define USB_DESC_TYPE_HID 0x21 -#define USB_DESC_TYPE_HID_REPORT 0x22 - - -#define USB_DEVICE_DESC_SIZE 18 -#define USB_CONFIGURATION_DESC_SIZE 9 -#define USB_HID_DESC_SIZE 9 -#define USB_INTERFACE_DESC_SIZE 9 -#define USB_ENDPOINT_DESC_SIZE 7 - -/* Descriptor Type and Descriptor Index */ -/* Use the following values when calling the function USBH_GetDescriptor */ -#define USB_DESC_DEVICE ((USB_DESC_TYPE_DEVICE << 8) & 0xFF00) -#define USB_DESC_CONFIGURATION ((USB_DESC_TYPE_CONFIGURATION << 8) & 0xFF00) -#define USB_DESC_STRING ((USB_DESC_TYPE_STRING << 8) & 0xFF00) -#define USB_DESC_INTERFACE ((USB_DESC_TYPE_INTERFACE << 8) & 0xFF00) -#define USB_DESC_ENDPOINT ((USB_DESC_TYPE_INTERFACE << 8) & 0xFF00) -#define USB_DESC_DEVICE_QUALIFIER ((USB_DESC_TYPE_DEVICE_QUALIFIER << 8) & 0xFF00) -#define USB_DESC_OTHER_SPEED_CONFIGURATION ((USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION << 8) & 0xFF00) -#define USB_DESC_INTERFACE_POWER ((USB_DESC_TYPE_INTERFACE_POWER << 8) & 0xFF00) -#define USB_DESC_HID_REPORT ((USB_DESC_TYPE_HID_REPORT << 8) & 0xFF00) -#define USB_DESC_HID ((USB_DESC_TYPE_HID << 8) & 0xFF00) - - -#define USB_EP_TYPE_CTRL 0x00 -#define USB_EP_TYPE_ISOC 0x01 -#define USB_EP_TYPE_BULK 0x02 -#define USB_EP_TYPE_INTR 0x03 - -#define USB_EP_DIR_OUT 0x00 -#define USB_EP_DIR_IN 0x80 -#define USB_EP_DIR_MSK 0x80 - -#define USBH_MAX_PIPES_NBR 15 - - - -#define USBH_DEVICE_ADDRESS_DEFAULT 0 -#define USBH_MAX_ERROR_COUNT 2 -#define USBH_DEVICE_ADDRESS 1 - - -/** - * @} - */ - - -#define USBH_CONFIGURATION_DESCRIPTOR_SIZE (USB_CONFIGURATION_DESC_SIZE \ - + USB_INTERFACE_DESC_SIZE\ - + (USBH_MAX_NUM_ENDPOINTS * USB_ENDPOINT_DESC_SIZE)) - - -#define CONFIG_DESC_wTOTAL_LENGTH (ConfigurationDescriptorData.ConfigDescfield.\ - ConfigurationDescriptor.wTotalLength) - - -typedef union -{ - uint16_t w; - struct BW - { - uint8_t msb; - uint8_t lsb; - } - bw; -} -uint16_t_uint8_t; - - -typedef union _USB_Setup -{ - uint32_t d8[2]; - - struct _SetupPkt_Struc - { - uint8_t bmRequestType; - uint8_t bRequest; - uint16_t_uint8_t wValue; - uint16_t_uint8_t wIndex; - uint16_t_uint8_t wLength; - } b; -} -USB_Setup_TypeDef; - -typedef struct _DescHeader -{ - uint8_t bLength; - uint8_t bDescriptorType; -} -USBH_DescHeader_t; - -typedef struct _DeviceDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; /* USB Specification Number which device complies too */ - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - /* If equal to Zero, each interface specifies its own class - code if equal to 0xFF, the class code is vendor specified. - Otherwise field is valid Class Code.*/ - uint8_t bMaxPacketSize; - uint16_t idVendor; /* Vendor ID (Assigned by USB Org) */ - uint16_t idProduct; /* Product ID (Assigned by Manufacturer) */ - uint16_t bcdDevice; /* Device Release Number */ - uint8_t iManufacturer; /* Index of Manufacturer String Descriptor */ - uint8_t iProduct; /* Index of Product String Descriptor */ - uint8_t iSerialNumber; /* Index of Serial Number String Descriptor */ - uint8_t bNumConfigurations; /* Number of Possible Configurations */ -} -USBH_DevDescTypeDef; - -typedef struct _EndpointDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bEndpointAddress; /* indicates what endpoint this descriptor is describing */ - uint8_t bmAttributes; /* specifies the transfer type. */ - uint16_t wMaxPacketSize; /* Maximum Packet Size this endpoint is capable of sending or receiving */ - uint8_t bInterval; /* is used to specify the polling interval of certain transfers. */ -} -USBH_EpDescTypeDef; - -typedef struct _InterfaceDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bInterfaceNumber; - uint8_t bAlternateSetting; /* Value used to select alternative setting */ - uint8_t bNumEndpoints; /* Number of Endpoints used for this interface */ - uint8_t bInterfaceClass; /* Class Code (Assigned by USB Org) */ - uint8_t bInterfaceSubClass; /* Subclass Code (Assigned by USB Org) */ - uint8_t bInterfaceProtocol; /* Protocol Code */ - uint8_t iInterface; /* Index of String Descriptor Describing this interface */ - USBH_EpDescTypeDef Ep_Desc[USBH_MAX_NUM_ENDPOINTS]; -} -USBH_InterfaceDescTypeDef; - - -typedef struct _ConfigurationDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wTotalLength; /* Total Length of Data Returned */ - uint8_t bNumInterfaces; /* Number of Interfaces */ - uint8_t bConfigurationValue; /* Value to use as an argument to select this configuration*/ - uint8_t iConfiguration; /*Index of String Descriptor Describing this configuration */ - uint8_t bmAttributes; /* D7 Bus Powered , D6 Self Powered, D5 Remote Wakeup , D4..0 Reserved (0)*/ - uint8_t bMaxPower; /*Maximum Power Consumption */ - USBH_InterfaceDescTypeDef Itf_Desc[USBH_MAX_NUM_INTERFACES]; -} -USBH_CfgDescTypeDef; - - -/* Following USB Host status */ -typedef enum -{ - USBH_OK = 0, - USBH_BUSY, - USBH_FAIL, - USBH_NOT_SUPPORTED, - USBH_UNRECOVERED_ERROR, - USBH_ERROR_SPEED_UNKNOWN, -}USBH_StatusTypeDef; - - -/** @defgroup USBH_CORE_Exported_Types - * @{ - */ - -typedef enum -{ - USBH_SPEED_HIGH = 0, - USBH_SPEED_FULL = 1, - USBH_SPEED_LOW = 2, - -}USBH_SpeedTypeDef; - -/* Following states are used for gState */ -typedef enum -{ - HOST_IDLE =0, - HOST_DEV_WAIT_FOR_ATTACHMENT, - HOST_DEV_ATTACHED, - HOST_DEV_DISCONNECTED, - HOST_DETECT_DEVICE_SPEED, - HOST_ENUMERATION, - HOST_CLASS_REQUEST, - HOST_INPUT, - HOST_SET_CONFIGURATION, - HOST_CHECK_CLASS, - HOST_CLASS, - HOST_SUSPENDED, - HOST_ABORT_STATE, -}HOST_StateTypeDef; - -/* Following states are used for EnumerationState */ -typedef enum -{ - ENUM_IDLE = 0, - ENUM_GET_FULL_DEV_DESC, - ENUM_SET_ADDR, - ENUM_GET_CFG_DESC, - ENUM_GET_FULL_CFG_DESC, - ENUM_GET_MFC_STRING_DESC, - ENUM_GET_PRODUCT_STRING_DESC, - ENUM_GET_SERIALNUM_STRING_DESC, -} ENUM_StateTypeDef; - -/* Following states are used for CtrlXferStateMachine */ -typedef enum -{ - CTRL_IDLE =0, - CTRL_SETUP, - CTRL_SETUP_WAIT, - CTRL_DATA_IN, - CTRL_DATA_IN_WAIT, - CTRL_DATA_OUT, - CTRL_DATA_OUT_WAIT, - CTRL_STATUS_IN, - CTRL_STATUS_IN_WAIT, - CTRL_STATUS_OUT, - CTRL_STATUS_OUT_WAIT, - CTRL_ERROR, - CTRL_STALLED, - CTRL_COMPLETE -}CTRL_StateTypeDef; - - -/* Following states are used for RequestState */ -typedef enum -{ - CMD_IDLE =0, - CMD_SEND, - CMD_WAIT -} CMD_StateTypeDef; - -typedef enum { - USBH_URB_IDLE = 0, - USBH_URB_DONE, - USBH_URB_NOTREADY, - USBH_URB_NYET, - USBH_URB_ERROR, - USBH_URB_STALL -}USBH_URBStateTypeDef; - -typedef enum -{ - USBH_PORT_EVENT = 1, - USBH_URB_EVENT, - USBH_CONTROL_EVENT, - USBH_CLASS_EVENT, - USBH_STATE_CHANGED_EVENT, -} -USBH_OSEventTypeDef; - -/* Control request structure */ -typedef struct -{ - uint8_t pipe_in; - uint8_t pipe_out; - uint8_t pipe_size; - uint8_t *buff; - uint16_t length; - uint16_t timer; - USB_Setup_TypeDef setup; - CTRL_StateTypeDef state; - uint8_t errorcount; - -} USBH_CtrlTypeDef; - -/* Attached device structure */ -typedef struct -{ -#if (USBH_KEEP_CFG_DESCRIPTOR == 1) - uint8_t CfgDesc_Raw[USBH_MAX_SIZE_CONFIGURATION]; -#endif - uint8_t Data[USBH_MAX_DATA_BUFFER]; - uint8_t address; - uint8_t speed; - __IO uint8_t is_connected; - uint8_t current_interface; - USBH_DevDescTypeDef DevDesc; - USBH_CfgDescTypeDef CfgDesc; - -}USBH_DeviceTypeDef; - -struct _USBH_HandleTypeDef; - -/* USB Host Class structure */ -typedef struct -{ - const char *Name; - uint8_t ClassCode; - USBH_StatusTypeDef (*Init) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*DeInit) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*Requests) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*BgndProcess) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*SOFProcess) (struct _USBH_HandleTypeDef *phost); - void* pData; -} USBH_ClassTypeDef; - -/* USB Host handle structure */ -typedef struct _USBH_HandleTypeDef -{ - __IO HOST_StateTypeDef gState; /* Host State Machine Value */ - ENUM_StateTypeDef EnumState; /* Enumeration state Machine */ - CMD_StateTypeDef RequestState; - USBH_CtrlTypeDef Control; - USBH_DeviceTypeDef device; - USBH_ClassTypeDef* pClass[USBH_MAX_NUM_SUPPORTED_CLASS]; - USBH_ClassTypeDef* pActiveClass; - uint32_t ClassNumber; - uint32_t Pipes[15]; - __IO uint32_t Timer; - uint8_t id; - void* pData; - void (* pUser )(struct _USBH_HandleTypeDef *pHandle, uint8_t id); - -#if (USBH_USE_OS == 1) - osMessageQId os_event; - osThreadId thread; -#endif - -} USBH_HandleTypeDef; - - -#if defined ( __GNUC__ ) - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - -#endif - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_ioreq.h b/ports/stm32/usbhost/Core/Inc/usbh_ioreq.h deleted file mode 100644 index 463d4ea37b..0000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_ioreq.h +++ /dev/null @@ -1,159 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ioreq.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_ioreq.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_IOREQ_H -#define __USBH_IOREQ_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_conf.h" -#include "usbh_core.h" -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_IOREQ - * @brief This file is the header file for usbh_ioreq.c - * @{ - */ - - -/** @defgroup USBH_IOREQ_Exported_Defines - * @{ - */ - -#define USBH_PID_SETUP 0 -#define USBH_PID_DATA 1 - -#define USBH_EP_CONTROL 0 -#define USBH_EP_ISO 1 -#define USBH_EP_BULK 2 -#define USBH_EP_INTERRUPT 3 - -#define USBH_SETUP_PKT_SIZE 8 -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_IOREQ_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_IOREQ_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_CtlSendSetup (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_CtlSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num, - uint8_t do_ping ); - -USBH_StatusTypeDef USBH_CtlReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_BulkReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_BulkSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num, - uint8_t do_ping ); - -USBH_StatusTypeDef USBH_InterruptReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_InterruptSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t hc_num); - - -USBH_StatusTypeDef USBH_IsocReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t hc_num); - - -USBH_StatusTypeDef USBH_IsocSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t hc_num); -/** - * @} - */ - -#endif /* __USBH_IOREQ_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_pipes.h b/ports/stm32/usbhost/Core/Inc/usbh_pipes.h deleted file mode 100644 index d72cd53870..0000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_pipes.h +++ /dev/null @@ -1,124 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_PIPES.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_pipes.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_PIPES_H -#define __USBH_PIPES_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_PIPES - * @brief This file is the header file for usbh_PIPES.c - * @{ - */ - -/** @defgroup USBH_PIPES_Exported_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Exported_FunctionsPrototype - * @{ - */ - -USBH_StatusTypeDef USBH_OpenPipe (USBH_HandleTypeDef *phost, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps); - -USBH_StatusTypeDef USBH_ClosePipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num); - -uint8_t USBH_AllocPipe (USBH_HandleTypeDef *phost, - uint8_t ep_addr); - -USBH_StatusTypeDef USBH_FreePipe (USBH_HandleTypeDef *phost, - uint8_t idx); - - - - -/** - * @} - */ - - - -#endif /* __USBH_PIPES_H */ - - -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Core/Src/usbh_conf_template.c b/ports/stm32/usbhost/Core/Src/usbh_conf_template.c deleted file mode 100644 index 1c25f7b2e7..0000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_conf_template.c +++ /dev/null @@ -1,270 +0,0 @@ -/** - ****************************************************************************** - * @file usb_bsp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the board support package for the USB host library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** - * @brief USBH_LL_Init - * Initialize the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_Init (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_DeInit - * De-Initialize the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_DeInit (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_Start - * Start the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_Start(USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_Stop - * Stop the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_Stop (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetSpeed - * Return the USB Host Speed from the Low Level Driver. - * @param phost: Host handle - * @retval USBH Speeds - */ -USBH_SpeedTypeDef USBH_LL_GetSpeed (USBH_HandleTypeDef *phost) -{ - USBH_SpeedTypeDef speed = 0; - - - return speed; -} - -/** - * @brief USBH_LL_ResetPort - * Reset the Host Port of the Low Level Driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_ResetPort (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetLastXferSize - * Return the last transfered packet size. - * @param phost: Host handle - * @param pipe: Pipe index - * @retval Packet Size - */ -uint32_t USBH_LL_GetLastXferSize (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - -} - -/** - * @brief USBH_LL_OpenPipe - * Open a pipe of the Low Level Driver. - * @param phost: Host handle - * @param pipe_num: Pipe index - * @param epnum: Endpoint Number - * @param dev_address: Device USB address - * @param speed: Device Speed - * @param ep_type: Endpoint Type - * @param mps: Endpoint Max Packet Size - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_OpenPipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_ClosePipe - * Close a pipe of the Low Level Driver. - * @param phost: Host handle - * @param pipe_num: Pipe index - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_ClosePipe (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - -} -/** - * @brief USBH_LL_SubmitURB - * Submit a new URB to the low level driver. - * @param phost: Host handle - * @param pipe: Pipe index - * This parameter can be a value from 1 to 15 - * @param direction : Channel number - * This parameter can be one of the these values: - * 0 : Output - * 1 : Input - * @param ep_type : Endpoint Type - * This parameter can be one of the these values: - * @arg EP_TYPE_CTRL: Control type - * @arg EP_TYPE_ISOC: Isochrounous type - * @arg EP_TYPE_BULK: Bulk type - * @arg EP_TYPE_INTR: Interrupt type - * @param token : Endpoint Type - * This parameter can be one of the these values: - * @arg 0: PID_SETUP - * @arg 1: PID_DATA - * @param pbuff : pointer to URB data - * @param length : Length of URB data - * @param do_ping : activate do ping protocol (for high speed only) - * This parameter can be one of the these values: - * 0 : do ping inactive - * 1 : do ping active - * @retval Status - */ - -USBH_StatusTypeDef USBH_LL_SubmitURB (USBH_HandleTypeDef *phost, - uint8_t pipe, - uint8_t direction , - uint8_t ep_type, - uint8_t token, - uint8_t* pbuff, - uint16_t length, - uint8_t do_ping ) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetURBState - * Get a URB state from the low level driver. - * @param phost: Host handle - * @param pipe: Pipe index - * This parameter can be a value from 1 to 15 - * @retval URB state - * This parameter can be one of the these values: - * @arg URB_IDLE - * @arg URB_DONE - * @arg URB_NOTREADY - * @arg URB_NYET - * @arg URB_ERROR - * @arg URB_STALL - */ -USBH_URBStateTypeDef USBH_LL_GetURBState (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - -} - -/** - * @brief USBH_LL_DriverVBUS - * Drive VBUS. - * @param phost: Host handle - * @param state : VBUS state - * This parameter can be one of the these values: - * 0 : VBUS Active - * 1 : VBUS Inactive - * @retval Status - */ - -USBH_StatusTypeDef USBH_LL_DriverVBUS (USBH_HandleTypeDef *phost, uint8_t state) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_SetToggle - * Set toggle for a pipe. - * @param phost: Host handle - * @param pipe: Pipe index - * @param pipe_num: Pipe index - * @param toggle: toggle (0/1) - * @retval Status - */ -USBH_StatusTypeDef USBH_LL_SetToggle (USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t toggle) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetToggle - * Return the current toggle of a pipe. - * @param phost: Host handle - * @param pipe: Pipe index - * @retval toggle (0/1) - */ -uint8_t USBH_LL_GetToggle (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - uint8_t toggle = 0; - - - return toggle; -} -/** - * @brief USBH_Delay - * Delay routine for the USB Host Library - * @param Delay: Delay in ms - * @retval None - */ -void USBH_Delay (uint32_t Delay) -{ - -} -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Core/Src/usbh_core.c b/ports/stm32/usbhost/Core/Src/usbh_core.c deleted file mode 100644 index 9d2727a89f..0000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_core.c +++ /dev/null @@ -1,936 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_core.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the functions for the core state machine process - * the enumeration and the control transfer process - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE - * @{ - */ - -/** @defgroup USBH_CORE - * @brief TThis file handles the basic enumaration when a device is connected - * to the host. - * @{ - */ - - -/** @defgroup USBH_CORE_Private_Defines - * @{ - */ -#define USBH_ADDRESS_DEFAULT 0 -#define USBH_ADDRESS_ASSIGNED 1 -#define USBH_MPS_DEFAULT 0x40 -/** - * @} - */ - -/** @defgroup USBH_CORE_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CORE_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CORE_Private_Functions - * @{ - */ -static USBH_StatusTypeDef USBH_HandleEnum (USBH_HandleTypeDef *phost); -static void USBH_HandleSof (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef DeInitStateMachine(USBH_HandleTypeDef *phost); - -#if (USBH_USE_OS == 1) -static void USBH_Process_OS(void const * argument); -#endif - -/** - * @brief HCD_Init - * Initialize the HOST Core. - * @param phost: Host Handle - * @param pUsrFunc: User Callback - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Init(USBH_HandleTypeDef *phost, void (*pUsrFunc)(USBH_HandleTypeDef *phost, uint8_t ), uint8_t id) -{ - /* Check whether the USB Host handle is valid */ - if(phost == NULL) - { - USBH_ErrLog("Invalid Host handle"); - return USBH_FAIL; - } - - /* Set DRiver ID */ - phost->id = id; - - /* Unlink class*/ - phost->pActiveClass = NULL; - phost->ClassNumber = 0; - - /* Restore default states and prepare EP0 */ - DeInitStateMachine(phost); - - /* Assign User process */ - if(pUsrFunc != NULL) - { - phost->pUser = pUsrFunc; - } - -#if (USBH_USE_OS == 1) - - /* Create USB Host Queue */ - osMessageQDef(USBH_Queue, 10, uint16_t); - phost->os_event = osMessageCreate (osMessageQ(USBH_Queue), NULL); - - /*Create USB Host Task */ - osThreadDef(USBH_Thread, USBH_Process_OS, USBH_PROCESS_PRIO, 0, 8 * configMINIMAL_STACK_SIZE); - phost->thread = osThreadCreate (osThread(USBH_Thread), phost); -#endif - - /* Initialize low level driver */ - USBH_LL_Init(phost); - return USBH_OK; -} - -/** - * @brief HCD_Init - * De-Initialize the Host portion of the driver. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_DeInit(USBH_HandleTypeDef *phost) -{ - DeInitStateMachine(phost); - - if(phost->pData != NULL) - { - phost->pActiveClass->pData = NULL; - USBH_LL_Stop(phost); - } - - return USBH_OK; -} - -/** - * @brief DeInitStateMachine - * De-Initialize the Host state machine. - * @param phost: Host Handle - * @retval USBH Status - */ -static USBH_StatusTypeDef DeInitStateMachine(USBH_HandleTypeDef *phost) -{ - uint32_t i = 0; - - /* Clear Pipes flags*/ - for ( ; i < USBH_MAX_PIPES_NBR; i++) - { - phost->Pipes[i] = 0; - } - - for(i = 0; i< USBH_MAX_DATA_BUFFER; i++) - { - phost->device.Data[i] = 0; - } - - phost->gState = HOST_IDLE; - phost->EnumState = ENUM_IDLE; - phost->RequestState = CMD_SEND; - phost->Timer = 0; - - phost->Control.state = CTRL_SETUP; - phost->Control.pipe_size = USBH_MPS_DEFAULT; - phost->Control.errorcount = 0; - - phost->device.address = USBH_ADDRESS_DEFAULT; - phost->device.speed = USBH_SPEED_FULL; - - return USBH_OK; -} - -/** - * @brief USBH_RegisterClass - * Link class driver to Host Core. - * @param phost : Host Handle - * @param pclass: Class handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_RegisterClass(USBH_HandleTypeDef *phost, USBH_ClassTypeDef *pclass) -{ - USBH_StatusTypeDef status = USBH_OK; - - if(pclass != 0) - { - if(phost->ClassNumber < USBH_MAX_NUM_SUPPORTED_CLASS) - { - /* link the class tgo the USB Host handle */ - phost->pClass[phost->ClassNumber++] = pclass; - status = USBH_OK; - } - else - { - USBH_ErrLog("Max Class Number reached"); - status = USBH_FAIL; - } - } - else - { - USBH_ErrLog("Invalid Class handle"); - status = USBH_FAIL; - } - - return status; -} - -/** - * @brief USBH_SelectInterface - * Select current interface. - * @param phost: Host Handle - * @param interface: Interface number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SelectInterface(USBH_HandleTypeDef *phost, uint8_t interface) -{ - USBH_StatusTypeDef status = USBH_OK; - - if(interface < phost->device.CfgDesc.bNumInterfaces) - { - phost->device.current_interface = interface; - USBH_UsrLog ("Switching to Interface (#%d)", interface); - USBH_UsrLog ("Class : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass ); - USBH_UsrLog ("SubClass : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceSubClass ); - USBH_UsrLog ("Protocol : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceProtocol ); - } - else - { - USBH_ErrLog ("Cannot Select This Interface."); - status = USBH_FAIL; - } - return status; -} - -/** - * @brief USBH_GetActiveClass - * Return Device Class. - * @param phost: Host Handle - * @param interface: Interface index - * @retval Class Code - */ -uint8_t USBH_GetActiveClass(USBH_HandleTypeDef *phost) -{ - return (phost->device.CfgDesc.Itf_Desc[0].bInterfaceClass); -} -/** - * @brief USBH_FindInterface - * Find the interface index for a specific class. - * @param phost: Host Handle - * @param Class: Class code - * @param SubClass: SubClass code - * @param Protocol: Protocol code - * @retval interface index in the configuration structure - * @note : (1)interface index 0xFF means interface index not found - */ -uint8_t USBH_FindInterface(USBH_HandleTypeDef *phost, uint8_t Class, uint8_t SubClass, uint8_t Protocol) -{ - USBH_InterfaceDescTypeDef *pif ; - USBH_CfgDescTypeDef *pcfg ; - int8_t if_ix = 0; - - pif = (USBH_InterfaceDescTypeDef *)0; - pcfg = &phost->device.CfgDesc; - - if((pif->bInterfaceClass == 0xFF) &&(pif->bInterfaceSubClass == 0xFF) && (pif->bInterfaceProtocol == 0xFF)) - { - return 0xFF; - } - - while (if_ix < USBH_MAX_NUM_INTERFACES) - { - pif = &pcfg->Itf_Desc[if_ix]; - if(((pif->bInterfaceClass == Class) || (Class == 0xFF))&& - ((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFF))&& - ((pif->bInterfaceProtocol == Protocol) || (Protocol == 0xFF))) - { - return if_ix; - } - if_ix++; - } - return 0xFF; -} - -/** - * @brief USBH_FindInterfaceIndex - * Find the interface index for a specific class interface and alternate setting number. - * @param phost: Host Handle - * @param interface_number: interface number - * @param alt_settings : alaternate setting number - * @retval interface index in the configuration structure - * @note : (1)interface index 0xFF means interface index not found - */ -uint8_t USBH_FindInterfaceIndex(USBH_HandleTypeDef *phost, uint8_t interface_number, uint8_t alt_settings) -{ - USBH_InterfaceDescTypeDef *pif ; - USBH_CfgDescTypeDef *pcfg ; - int8_t if_ix = 0; - - pif = (USBH_InterfaceDescTypeDef *)0; - pcfg = &phost->device.CfgDesc; - - while (if_ix < USBH_MAX_NUM_INTERFACES) - { - pif = &pcfg->Itf_Desc[if_ix]; - if((pif->bInterfaceNumber == interface_number) && (pif->bAlternateSetting == alt_settings)) - { - return if_ix; - } - if_ix++; - } - return 0xFF; -} - -/** - * @brief USBH_Start - * Start the USB Host Core. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Start (USBH_HandleTypeDef *phost) -{ - /* Start the low level driver */ - USBH_LL_Start(phost); - - /* Activate VBUS on the port */ - USBH_LL_DriverVBUS (phost, TRUE); - - return USBH_OK; -} - -/** - * @brief USBH_Stop - * Stop the USB Host Core. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Stop (USBH_HandleTypeDef *phost) -{ - /* Stop and cleanup the low level driver */ - USBH_LL_Stop(phost); - - /* DeActivate VBUS on the port */ - USBH_LL_DriverVBUS (phost, FALSE); - - /* FRee Control Pipes */ - USBH_FreePipe (phost, phost->Control.pipe_in); - USBH_FreePipe (phost, phost->Control.pipe_out); - - return USBH_OK; -} - -/** - * @brief HCD_ReEnumerate - * Perform a new Enumeration phase. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_ReEnumerate (USBH_HandleTypeDef *phost) -{ - /*Stop Host */ - USBH_Stop(phost); - - /*Device has disconnected, so wait for 200 ms */ - USBH_Delay(200); - - /* Set State machines in default state */ - DeInitStateMachine(phost); - - /* Start again the host */ - USBH_Start(phost); - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - return USBH_OK; -} - -/** - * @brief USBH_Process - * Background process of the USB Core. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Process(USBH_HandleTypeDef *phost) -{ - __IO USBH_StatusTypeDef status = USBH_FAIL; - uint8_t idx = 0; - - switch (phost->gState) - { - case HOST_IDLE : - - if (phost->device.is_connected) - { - /* Wait for 200 ms after connection */ - phost->gState = HOST_DEV_WAIT_FOR_ATTACHMENT; - USBH_Delay(200); - USBH_LL_ResetPort(phost); -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - } - break; - - case HOST_DEV_WAIT_FOR_ATTACHMENT: - break; - - case HOST_DEV_ATTACHED : - - USBH_UsrLog("USB Device Attached"); - - /* Wait for 100 ms after Reset */ - USBH_Delay(100); - - phost->device.speed = USBH_LL_GetSpeed(phost); - - phost->gState = HOST_ENUMERATION; - - phost->Control.pipe_out = USBH_AllocPipe (phost, 0x00); - phost->Control.pipe_in = USBH_AllocPipe (phost, 0x80); - - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_in, - 0x80, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_out, - 0x00, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - - break; - - case HOST_ENUMERATION: - /* Check for enumeration status */ - if ( USBH_HandleEnum(phost) == USBH_OK) - { - /* The function shall return USBH_OK when full enumeration is complete */ - USBH_UsrLog ("Enumeration done."); - phost->device.current_interface = 0; - if(phost->device.DevDesc.bNumConfigurations == 1) - { - USBH_UsrLog ("This device has only 1 configuration."); - phost->gState = HOST_SET_CONFIGURATION; - - } - else - { - phost->gState = HOST_INPUT; - } - - } - break; - - case HOST_INPUT: - { - /* user callback for end of device basic enumeration */ - if(phost->pUser != NULL) - { - phost->pUser(phost, HOST_USER_SELECT_CONFIGURATION); - phost->gState = HOST_SET_CONFIGURATION; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - } - break; - - case HOST_SET_CONFIGURATION: - /* set configuration */ - if (USBH_SetCfg(phost, phost->device.CfgDesc.bConfigurationValue) == USBH_OK) - { - phost->gState = HOST_CHECK_CLASS; - USBH_UsrLog ("Default configuration set."); - - } - - break; - - case HOST_CHECK_CLASS: - - if(phost->ClassNumber == 0) - { - USBH_UsrLog ("No Class has been registered."); - } - else - { - phost->pActiveClass = NULL; - - for (idx = 0; idx < USBH_MAX_NUM_SUPPORTED_CLASS ; idx ++) - { - if(phost->pClass[idx]->ClassCode == phost->device.CfgDesc.Itf_Desc[0].bInterfaceClass) - { - phost->pActiveClass = phost->pClass[idx]; - } - } - - if(phost->pActiveClass != NULL) - { - if(phost->pActiveClass->Init(phost)== USBH_OK) - { - phost->gState = HOST_CLASS_REQUEST; - USBH_UsrLog ("%s class started.", phost->pActiveClass->Name); - - /* Inform user that a class has been activated */ - phost->pUser(phost, HOST_USER_CLASS_SELECTED); - } - else - { - phost->gState = HOST_ABORT_STATE; - USBH_UsrLog ("Device not supporting %s class.", phost->pActiveClass->Name); - } - } - else - { - phost->gState = HOST_ABORT_STATE; - USBH_UsrLog ("No registered class for this device."); - } - } - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - break; - - case HOST_CLASS_REQUEST: - /* process class standard contol requests state machine */ - - if(phost->pActiveClass != NULL) - { - status = phost->pActiveClass->Requests(phost); - - if(status == USBH_OK) - { - phost->gState = HOST_CLASS; - } - } - else - { - phost->gState = HOST_ABORT_STATE; - USBH_ErrLog ("Invalid Class Driver."); - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - - break; - case HOST_CLASS: - /* process class state machine */ - if(phost->pActiveClass != NULL) - { - phost->pActiveClass->BgndProcess(phost); - } - break; - - case HOST_DEV_DISCONNECTED : - - DeInitStateMachine(phost); - - /* Re-Initilaize Host for new Enumeration */ - if(phost->pActiveClass != NULL) - { - phost->pActiveClass->DeInit(phost); - phost->pActiveClass = NULL; - } - break; - - case HOST_ABORT_STATE: - default : - break; - } - return USBH_OK; -} - - -/** - * @brief USBH_HandleEnum - * This function includes the complete enumeration process - * @param phost: Host Handle - * @retval USBH_Status - */ -static USBH_StatusTypeDef USBH_HandleEnum (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - - switch (phost->EnumState) - { - case ENUM_IDLE: - /* Get Device Desc for only 1st 8 bytes : To get EP0 MaxPacketSize */ - if ( USBH_Get_DevDesc(phost, 8) == USBH_OK) - { - phost->Control.pipe_size = phost->device.DevDesc.bMaxPacketSize; - - phost->EnumState = ENUM_GET_FULL_DEV_DESC; - - /* modify control channels configuration for MaxPacket size */ - USBH_OpenPipe (phost, - phost->Control.pipe_in, - 0x80, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_out, - 0x00, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - } - break; - - case ENUM_GET_FULL_DEV_DESC: - /* Get FULL Device Desc */ - if ( USBH_Get_DevDesc(phost, USB_DEVICE_DESC_SIZE)== USBH_OK) - { - USBH_UsrLog("PID: %xh", phost->device.DevDesc.idProduct ); - USBH_UsrLog("VID: %xh", phost->device.DevDesc.idVendor ); - - phost->EnumState = ENUM_SET_ADDR; - - } - break; - - case ENUM_SET_ADDR: - /* set address */ - if ( USBH_SetAddress(phost, USBH_DEVICE_ADDRESS) == USBH_OK) - { - USBH_Delay(2); - phost->device.address = USBH_DEVICE_ADDRESS; - - /* user callback for device address assigned */ - USBH_UsrLog("Address (#%d) assigned.", phost->device.address); - phost->EnumState = ENUM_GET_CFG_DESC; - - /* modify control channels to update device address */ - USBH_OpenPipe (phost, - phost->Control.pipe_in, - 0x80, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_out, - 0x00, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - } - break; - - case ENUM_GET_CFG_DESC: - /* get standard configuration descriptor */ - if ( USBH_Get_CfgDesc(phost, - USB_CONFIGURATION_DESC_SIZE) == USBH_OK) - { - phost->EnumState = ENUM_GET_FULL_CFG_DESC; - } - break; - - case ENUM_GET_FULL_CFG_DESC: - /* get FULL config descriptor (config, interface, endpoints) */ - if (USBH_Get_CfgDesc(phost, - phost->device.CfgDesc.wTotalLength) == USBH_OK) - { - phost->EnumState = ENUM_GET_MFC_STRING_DESC; - } - break; - - case ENUM_GET_MFC_STRING_DESC: - if (phost->device.DevDesc.iManufacturer != 0) - { /* Check that Manufacturer String is available */ - - if ( USBH_Get_StringDesc(phost, - phost->device.DevDesc.iManufacturer, - phost->device.Data , - 0xff) == USBH_OK) - { - /* User callback for Manufacturing string */ - USBH_UsrLog("Manufacturer : %s", (char *)phost->device.Data); - phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - } - else - { - USBH_UsrLog("Manufacturer : N/A"); - phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - break; - - case ENUM_GET_PRODUCT_STRING_DESC: - if (phost->device.DevDesc.iProduct != 0) - { /* Check that Product string is available */ - if ( USBH_Get_StringDesc(phost, - phost->device.DevDesc.iProduct, - phost->device.Data, - 0xff) == USBH_OK) - { - /* User callback for Product string */ - USBH_UsrLog("Product : %s", (char *)phost->device.Data); - phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC; - } - } - else - { - USBH_UsrLog("Product : N/A"); - phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - break; - - case ENUM_GET_SERIALNUM_STRING_DESC: - if (phost->device.DevDesc.iSerialNumber != 0) - { /* Check that Serial number string is available */ - if ( USBH_Get_StringDesc(phost, - phost->device.DevDesc.iSerialNumber, - phost->device.Data, - 0xff) == USBH_OK) - { - /* User callback for Serial number string */ - USBH_UsrLog("Serial Number : %s", (char *)phost->device.Data); - Status = USBH_OK; - } - } - else - { - USBH_UsrLog("Serial Number : N/A"); - Status = USBH_OK; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - break; - - default: - break; - } - return Status; -} - -/** - * @brief USBH_LL_SetTimer - * Set the initial Host Timer tick - * @param phost: Host Handle - * @retval None - */ -void USBH_LL_SetTimer (USBH_HandleTypeDef *phost, uint32_t time) -{ - phost->Timer = time; -} -/** - * @brief USBH_LL_IncTimer - * Increment Host Timer tick - * @param phost: Host Handle - * @retval None - */ -void USBH_LL_IncTimer (USBH_HandleTypeDef *phost) -{ - phost->Timer ++; - USBH_HandleSof(phost); -} - -/** - * @brief USBH_HandleSof - * Call SOF process - * @param phost: Host Handle - * @retval None - */ -void USBH_HandleSof (USBH_HandleTypeDef *phost) -{ - if((phost->gState == HOST_CLASS)&&(phost->pActiveClass != NULL)) - { - phost->pActiveClass->SOFProcess(phost); - } -} -/** - * @brief USBH_LL_Connect - * Handle USB Host connexion event - * @param phost: Host Handle - * @retval USBH_Status - */ -USBH_StatusTypeDef USBH_LL_Connect (USBH_HandleTypeDef *phost) -{ - if(phost->gState == HOST_IDLE ) - { - phost->device.is_connected = 1; - phost->gState = HOST_IDLE ; - - if(phost->pUser != NULL) - { - phost->pUser(phost, HOST_USER_CONNECTION); - } - } - else if(phost->gState == HOST_DEV_WAIT_FOR_ATTACHMENT ) - { - phost->gState = HOST_DEV_ATTACHED ; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - - return USBH_OK; -} - -/** - * @brief USBH_LL_Disconnect - * Handle USB Host disconnexion event - * @param phost: Host Handle - * @retval USBH_Status - */ -USBH_StatusTypeDef USBH_LL_Disconnect (USBH_HandleTypeDef *phost) -{ - /*Stop Host */ - USBH_LL_Stop(phost); - - /* FRee Control Pipes */ - USBH_FreePipe (phost, phost->Control.pipe_in); - USBH_FreePipe (phost, phost->Control.pipe_out); - - phost->device.is_connected = 0; - - if(phost->pUser != NULL) - { - phost->pUser(phost, HOST_USER_DISCONNECTION); - } - USBH_UsrLog("USB Device disconnected"); - - /* Start the low level driver */ - USBH_LL_Start(phost); - - phost->gState = HOST_DEV_DISCONNECTED; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - - return USBH_OK; -} - - -#if (USBH_USE_OS == 1) -/** - * @brief USB Host Thread task - * @param pvParameters not used - * @retval None - */ -static void USBH_Process_OS(void const * argument) -{ - osEvent event; - - for(;;) - { - event = osMessageGet(((USBH_HandleTypeDef *)argument)->os_event, osWaitForever ); - - if( event.status == osEventMessage ) - { - USBH_Process((USBH_HandleTypeDef *)argument); - } - } -} - -/** -* @brief USBH_LL_NotifyURBChange -* Notify URB state Change -* @param phost: Host handle -* @retval USBH Status -*/ -USBH_StatusTypeDef USBH_LL_NotifyURBChange (USBH_HandleTypeDef *phost) -{ - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); - return USBH_OK; -} -#endif -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Core/Src/usbh_ctlreq.c b/ports/stm32/usbhost/Core/Src/usbh_ctlreq.c deleted file mode 100644 index 58bc34d643..0000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_ctlreq.c +++ /dev/null @@ -1,881 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ctlreq.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the control requests for device enumeration - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_ctlreq.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_CTLREQ -* @brief This file implements the standard requests for device enumeration -* @{ -*/ - - -/** @defgroup USBH_CTLREQ_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CTLREQ_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - - -/** @defgroup USBH_CTLREQ_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CTLREQ_Private_Variables -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_CTLREQ_Private_FunctionPrototypes -* @{ -*/ -static USBH_StatusTypeDef USBH_HandleControl (USBH_HandleTypeDef *phost); - -static void USBH_ParseDevDesc (USBH_DevDescTypeDef* , uint8_t *buf, uint16_t length); - -static void USBH_ParseCfgDesc (USBH_CfgDescTypeDef* cfg_desc, - uint8_t *buf, - uint16_t length); - - -static void USBH_ParseEPDesc (USBH_EpDescTypeDef *ep_descriptor, uint8_t *buf); -static void USBH_ParseStringDesc (uint8_t* psrc, uint8_t* pdest, uint16_t length); -static void USBH_ParseInterfaceDesc (USBH_InterfaceDescTypeDef *if_descriptor, uint8_t *buf); - - -/** -* @} -*/ - - -/** @defgroup USBH_CTLREQ_Private_Functions -* @{ -*/ - - -/** - * @brief USBH_Get_DevDesc - * Issue Get Device Descriptor command to the device. Once the response - * received, it parses the device descriptor and updates the status. - * @param phost: Host Handle - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Get_DevDesc(USBH_HandleTypeDef *phost, uint8_t length) -{ - USBH_StatusTypeDef status; - - if((status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, - USB_DESC_DEVICE, - phost->device.Data, - length)) == USBH_OK) - { - /* Commands successfully sent and Response Received */ - USBH_ParseDevDesc(&phost->device.DevDesc, phost->device.Data, length); - } - return status; -} - -/** - * @brief USBH_Get_CfgDesc - * Issues Configuration Descriptor to the device. Once the response - * received, it parses the configuartion descriptor and updates the - * status. - * @param phost: Host Handle - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost, - uint16_t length) - -{ - USBH_StatusTypeDef status; - uint8_t *pData; -#if (USBH_KEEP_CFG_DESCRIPTOR == 1) - pData = phost->device.CfgDesc_Raw; -#else - pData = phost->device.Data; -#endif - if((status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, - USB_DESC_CONFIGURATION, - pData, - length)) == USBH_OK) - { - - /* Commands successfully sent and Response Received */ - USBH_ParseCfgDesc (&phost->device.CfgDesc, - pData, - length); - - } - return status; -} - - -/** - * @brief USBH_Get_StringDesc - * Issues string Descriptor command to the device. Once the response - * received, it parses the string descriptor and updates the status. - * @param phost: Host Handle - * @param string_index: String index for the descriptor - * @param buff: Buffer address for the descriptor - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Get_StringDesc(USBH_HandleTypeDef *phost, - uint8_t string_index, - uint8_t *buff, - uint16_t length) -{ - USBH_StatusTypeDef status; - if((status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, - USB_DESC_STRING | string_index, - phost->device.Data, - length)) == USBH_OK) - { - /* Commands successfully sent and Response Received */ - USBH_ParseStringDesc(phost->device.Data,buff, length); - } - return status; -} - -/** - * @brief USBH_GetDescriptor - * Issues Descriptor command to the device. Once the response received, - * it parses the descriptor and updates the status. - * @param phost: Host Handle - * @param req_type: Descriptor type - * @param value_idx: wValue for the GetDescriptr request - * @param buff: Buffer to store the descriptor - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_GetDescriptor(USBH_HandleTypeDef *phost, - uint8_t req_type, - uint16_t value_idx, - uint8_t* buff, - uint16_t length ) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_D2H | req_type; - phost->Control.setup.b.bRequest = USB_REQ_GET_DESCRIPTOR; - phost->Control.setup.b.wValue.w = value_idx; - - if ((value_idx & 0xff00) == USB_DESC_STRING) - { - phost->Control.setup.b.wIndex.w = 0x0409; - } - else - { - phost->Control.setup.b.wIndex.w = 0; - } - phost->Control.setup.b.wLength.w = length; - } - return USBH_CtlReq(phost, buff , length ); -} - -/** - * @brief USBH_SetAddress - * This command sets the address to the connected device - * @param phost: Host Handle - * @param DeviceAddress: Device address to assign - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SetAddress(USBH_HandleTypeDef *phost, - uint8_t DeviceAddress) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE | \ - USB_REQ_TYPE_STANDARD; - - phost->Control.setup.b.bRequest = USB_REQ_SET_ADDRESS; - - phost->Control.setup.b.wValue.w = (uint16_t)DeviceAddress; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - } - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_SetCfg - * The command sets the configuration value to the connected device - * @param phost: Host Handle - * @param cfg_idx: Configuration value - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SetCfg(USBH_HandleTypeDef *phost, - uint16_t cfg_idx) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE |\ - USB_REQ_TYPE_STANDARD; - phost->Control.setup.b.bRequest = USB_REQ_SET_CONFIGURATION; - phost->Control.setup.b.wValue.w = cfg_idx; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - } - - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_SetInterface - * The command sets the Interface value to the connected device - * @param phost: Host Handle - * @param altSetting: Interface value - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SetInterface(USBH_HandleTypeDef *phost, - uint8_t ep_num, uint8_t altSetting) -{ - - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_STANDARD; - - phost->Control.setup.b.bRequest = USB_REQ_SET_INTERFACE; - phost->Control.setup.b.wValue.w = altSetting; - phost->Control.setup.b.wIndex.w = ep_num; - phost->Control.setup.b.wLength.w = 0; - } - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_ClrFeature - * This request is used to clear or disable a specific feature. - * @param phost: Host Handle - * @param ep_num: endpoint number - * @param hc_num: Host channel number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_ClrFeature(USBH_HandleTypeDef *phost, - uint8_t ep_num) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | - USB_REQ_RECIPIENT_ENDPOINT | - USB_REQ_TYPE_STANDARD; - - phost->Control.setup.b.bRequest = USB_REQ_CLEAR_FEATURE; - phost->Control.setup.b.wValue.w = FEATURE_SELECTOR_ENDPOINT; - phost->Control.setup.b.wIndex.w = ep_num; - phost->Control.setup.b.wLength.w = 0; - } - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_ParseDevDesc - * This function Parses the device descriptor - * @param dev_desc: device_descriptor destinaton address - * @param buf: Buffer where the source descriptor is available - * @param length: Length of the descriptor - * @retval None - */ -static void USBH_ParseDevDesc (USBH_DevDescTypeDef* dev_desc, - uint8_t *buf, - uint16_t length) -{ - dev_desc->bLength = *(uint8_t *) (buf + 0); - dev_desc->bDescriptorType = *(uint8_t *) (buf + 1); - dev_desc->bcdUSB = LE16 (buf + 2); - dev_desc->bDeviceClass = *(uint8_t *) (buf + 4); - dev_desc->bDeviceSubClass = *(uint8_t *) (buf + 5); - dev_desc->bDeviceProtocol = *(uint8_t *) (buf + 6); - dev_desc->bMaxPacketSize = *(uint8_t *) (buf + 7); - - if (length > 8) - { /* For 1st time after device connection, Host may issue only 8 bytes for - Device Descriptor Length */ - dev_desc->idVendor = LE16 (buf + 8); - dev_desc->idProduct = LE16 (buf + 10); - dev_desc->bcdDevice = LE16 (buf + 12); - dev_desc->iManufacturer = *(uint8_t *) (buf + 14); - dev_desc->iProduct = *(uint8_t *) (buf + 15); - dev_desc->iSerialNumber = *(uint8_t *) (buf + 16); - dev_desc->bNumConfigurations = *(uint8_t *) (buf + 17); - } -} - -/** - * @brief USBH_ParseCfgDesc - * This function Parses the configuration descriptor - * @param cfg_desc: Configuration Descriptor address - * @param buf: Buffer where the source descriptor is available - * @param length: Length of the descriptor - * @retval None - */ -static void USBH_ParseCfgDesc (USBH_CfgDescTypeDef* cfg_desc, - uint8_t *buf, - uint16_t length) -{ - USBH_InterfaceDescTypeDef *pif ; - USBH_EpDescTypeDef *pep; - USBH_DescHeader_t *pdesc = (USBH_DescHeader_t *)buf; - uint16_t ptr; - int8_t if_ix = 0; - int8_t ep_ix = 0; - - pdesc = (USBH_DescHeader_t *)buf; - - /* Parse configuration descriptor */ - cfg_desc->bLength = *(uint8_t *) (buf + 0); - cfg_desc->bDescriptorType = *(uint8_t *) (buf + 1); - cfg_desc->wTotalLength = LE16 (buf + 2); - cfg_desc->bNumInterfaces = *(uint8_t *) (buf + 4); - cfg_desc->bConfigurationValue = *(uint8_t *) (buf + 5); - cfg_desc->iConfiguration = *(uint8_t *) (buf + 6); - cfg_desc->bmAttributes = *(uint8_t *) (buf + 7); - cfg_desc->bMaxPower = *(uint8_t *) (buf + 8); - - - if (length > USB_CONFIGURATION_DESC_SIZE) - { - ptr = USB_LEN_CFG_DESC; - pif = (USBH_InterfaceDescTypeDef *)0; - - - while ((if_ix < USBH_MAX_NUM_INTERFACES ) && (ptr < cfg_desc->wTotalLength)) - { - pdesc = USBH_GetNextDesc((uint8_t *)pdesc, &ptr); - if (pdesc->bDescriptorType == USB_DESC_TYPE_INTERFACE) - { - pif = &cfg_desc->Itf_Desc[if_ix]; - USBH_ParseInterfaceDesc (pif, (uint8_t *)pdesc); - - ep_ix = 0; - pep = (USBH_EpDescTypeDef *)0; - while ((ep_ix < pif->bNumEndpoints) && (ptr < cfg_desc->wTotalLength)) - { - pdesc = USBH_GetNextDesc((void* )pdesc, &ptr); - if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT) - { - pep = &cfg_desc->Itf_Desc[if_ix].Ep_Desc[ep_ix]; - USBH_ParseEPDesc (pep, (uint8_t *)pdesc); - ep_ix++; - } - } - if_ix++; - } - } - } -} - - - -/** - * @brief USBH_ParseInterfaceDesc - * This function Parses the interface descriptor - * @param if_descriptor : Interface descriptor destination - * @param buf: Buffer where the descriptor data is available - * @retval None - */ -static void USBH_ParseInterfaceDesc (USBH_InterfaceDescTypeDef *if_descriptor, - uint8_t *buf) -{ - if_descriptor->bLength = *(uint8_t *) (buf + 0); - if_descriptor->bDescriptorType = *(uint8_t *) (buf + 1); - if_descriptor->bInterfaceNumber = *(uint8_t *) (buf + 2); - if_descriptor->bAlternateSetting = *(uint8_t *) (buf + 3); - if_descriptor->bNumEndpoints = *(uint8_t *) (buf + 4); - if_descriptor->bInterfaceClass = *(uint8_t *) (buf + 5); - if_descriptor->bInterfaceSubClass = *(uint8_t *) (buf + 6); - if_descriptor->bInterfaceProtocol = *(uint8_t *) (buf + 7); - if_descriptor->iInterface = *(uint8_t *) (buf + 8); -} - -/** - * @brief USBH_ParseEPDesc - * This function Parses the endpoint descriptor - * @param ep_descriptor: Endpoint descriptor destination address - * @param buf: Buffer where the parsed descriptor stored - * @retval None - */ -static void USBH_ParseEPDesc (USBH_EpDescTypeDef *ep_descriptor, - uint8_t *buf) -{ - - ep_descriptor->bLength = *(uint8_t *) (buf + 0); - ep_descriptor->bDescriptorType = *(uint8_t *) (buf + 1); - ep_descriptor->bEndpointAddress = *(uint8_t *) (buf + 2); - ep_descriptor->bmAttributes = *(uint8_t *) (buf + 3); - ep_descriptor->wMaxPacketSize = LE16 (buf + 4); - ep_descriptor->bInterval = *(uint8_t *) (buf + 6); -} - -/** - * @brief USBH_ParseStringDesc - * This function Parses the string descriptor - * @param psrc: Source pointer containing the descriptor data - * @param pdest: Destination address pointer - * @param length: Length of the descriptor - * @retval None - */ -static void USBH_ParseStringDesc (uint8_t* psrc, - uint8_t* pdest, - uint16_t length) -{ - uint16_t strlength; - uint16_t idx; - - /* The UNICODE string descriptor is not NULL-terminated. The string length is - computed by substracting two from the value of the first byte of the descriptor. - */ - - /* Check which is lower size, the Size of string or the length of bytes read - from the device */ - - if ( psrc[1] == USB_DESC_TYPE_STRING) - { /* Make sure the Descriptor is String Type */ - - /* psrc[0] contains Size of Descriptor, subtract 2 to get the length of string */ - strlength = ( ( (psrc[0]-2) <= length) ? (psrc[0]-2) :length); - psrc += 2; /* Adjust the offset ignoring the String Len and Descriptor type */ - - for (idx = 0; idx < strlength; idx+=2 ) - {/* Copy Only the string and ignore the UNICODE ID, hence add the src */ - *pdest = psrc[idx]; - pdest++; - } - *pdest = 0; /* mark end of string */ - } -} - -/** - * @brief USBH_GetNextDesc - * This function return the next descriptor header - * @param buf: Buffer where the cfg descriptor is available - * @param ptr: data popinter inside the cfg descriptor - * @retval next header - */ -USBH_DescHeader_t *USBH_GetNextDesc (uint8_t *pbuf, uint16_t *ptr) -{ - USBH_DescHeader_t *pnext; - - *ptr += ((USBH_DescHeader_t *)pbuf)->bLength; - pnext = (USBH_DescHeader_t *)((uint8_t *)pbuf + \ - ((USBH_DescHeader_t *)pbuf)->bLength); - - return(pnext); -} - - -/** - * @brief USBH_CtlReq - * USBH_CtlReq sends a control request and provide the status after - * completion of the request - * @param phost: Host Handle - * @param req: Setup Request Structure - * @param buff: data buffer address to store the response - * @param length: length of the response - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CtlReq (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length) -{ - USBH_StatusTypeDef status; - status = USBH_BUSY; - - switch (phost->RequestState) - { - case CMD_SEND: - /* Start a SETUP transfer */ - phost->Control.buff = buff; - phost->Control.length = length; - phost->Control.state = CTRL_SETUP; - phost->RequestState = CMD_WAIT; - status = USBH_BUSY; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - break; - - case CMD_WAIT: - status = USBH_HandleControl(phost); - if (status == USBH_OK) - { - /* Commands successfully sent and Response Received */ - phost->RequestState = CMD_SEND; - phost->Control.state =CTRL_IDLE; - status = USBH_OK; - } - else if (status == USBH_FAIL) - { - /* Failure Mode */ - phost->RequestState = CMD_SEND; - status = USBH_FAIL; - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_HandleControl - * Handles the USB control transfer state machine - * @param phost: Host Handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HandleControl (USBH_HandleTypeDef *phost) -{ - uint8_t direction; - USBH_StatusTypeDef status = USBH_BUSY; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - - switch (phost->Control.state) - { - case CTRL_SETUP: - /* send a SETUP packet */ - USBH_CtlSendSetup (phost, - (uint8_t *)phost->Control.setup.d8 , - phost->Control.pipe_out); - - phost->Control.state = CTRL_SETUP_WAIT; - break; - - case CTRL_SETUP_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out); - /* case SETUP packet sent successfully */ - if(URB_Status == USBH_URB_DONE) - { - direction = (phost->Control.setup.b.bmRequestType & USB_REQ_DIR_MASK); - - /* check if there is a data stage */ - if (phost->Control.setup.b.wLength.w != 0 ) - { - if (direction == USB_D2H) - { - /* Data Direction is IN */ - phost->Control.state = CTRL_DATA_IN; - } - else - { - /* Data Direction is OUT */ - phost->Control.state = CTRL_DATA_OUT; - } - } - /* No DATA stage */ - else - { - /* If there is No Data Transfer Stage */ - if (direction == USB_D2H) - { - /* Data Direction is IN */ - phost->Control.state = CTRL_STATUS_OUT; - } - else - { - /* Data Direction is OUT */ - phost->Control.state = CTRL_STATUS_IN; - } - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_ERROR) - { - phost->Control.state = CTRL_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_DATA_IN: - /* Issue an IN token */ - phost->Control.timer = phost->Timer; - USBH_CtlReceiveData(phost, - phost->Control.buff, - phost->Control.length, - phost->Control.pipe_in); - - phost->Control.state = CTRL_DATA_IN_WAIT; - break; - - case CTRL_DATA_IN_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_in); - - /* check is DATA packet transfered successfully */ - if (URB_Status == USBH_URB_DONE) - { - phost->Control.state = CTRL_STATUS_OUT; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - - /* manage error cases*/ - if (URB_Status == USBH_URB_STALL) - { - /* In stall case, return to previous machine state*/ - status = USBH_NOT_SUPPORTED; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_ERROR) - { - /* Device error */ - phost->Control.state = CTRL_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_DATA_OUT: - - USBH_CtlSendData (phost, - phost->Control.buff, - phost->Control.length , - phost->Control.pipe_out, - 1); - phost->Control.timer = phost->Timer; - phost->Control.state = CTRL_DATA_OUT_WAIT; - break; - - case CTRL_DATA_OUT_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_out); - - if (URB_Status == USBH_URB_DONE) - { /* If the Setup Pkt is sent successful, then change the state */ - phost->Control.state = CTRL_STATUS_IN; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - - /* handle error cases */ - else if (URB_Status == USBH_URB_STALL) - { - /* In stall case, return to previous machine state*/ - phost->Control.state = CTRL_STALLED; - status = USBH_NOT_SUPPORTED; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_NOTREADY) - { - /* Nack received from device */ - phost->Control.state = CTRL_DATA_OUT; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_ERROR) - { - /* device error */ - phost->Control.state = CTRL_ERROR; - status = USBH_FAIL; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - - case CTRL_STATUS_IN: - /* Send 0 bytes out packet */ - USBH_CtlReceiveData (phost, - 0, - 0, - phost->Control.pipe_in); - phost->Control.timer = phost->Timer; - phost->Control.state = CTRL_STATUS_IN_WAIT; - - break; - - case CTRL_STATUS_IN_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_in); - - if ( URB_Status == USBH_URB_DONE) - { /* Control transfers completed, Exit the State Machine */ - phost->Control.state = CTRL_COMPLETE; - status = USBH_OK; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - - else if (URB_Status == USBH_URB_ERROR) - { - phost->Control.state = CTRL_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - /* Control transfers completed, Exit the State Machine */ - status = USBH_NOT_SUPPORTED; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_STATUS_OUT: - USBH_CtlSendData (phost, - 0, - 0, - phost->Control.pipe_out, - 1); - phost->Control.timer = phost->Timer; - phost->Control.state = CTRL_STATUS_OUT_WAIT; - break; - - case CTRL_STATUS_OUT_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_out); - if (URB_Status == USBH_URB_DONE) - { - status = USBH_OK; - phost->Control.state = CTRL_COMPLETE; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_NOTREADY) - { - phost->Control.state = CTRL_STATUS_OUT; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_ERROR) - { - phost->Control.state = CTRL_ERROR; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_ERROR: - /* - After a halt condition is encountered or an error is detected by the - host, a control endpoint is allowed to recover by accepting the next Setup - PID; i.e., recovery actions via some other pipe are not required for control - endpoints. For the Default Control Pipe, a device reset will ultimately be - required to clear the halt or error condition if the next Setup PID is not - accepted. - */ - if (++ phost->Control.errorcount <= USBH_MAX_ERROR_COUNT) - { - /* try to recover control */ - USBH_LL_Stop(phost); - - /* Do the transmission again, starting from SETUP Packet */ - phost->Control.state = CTRL_SETUP; - phost->RequestState = CMD_SEND; - } - else - { - phost->Control.errorcount = 0; - USBH_ErrLog("Control error"); - status = USBH_FAIL; - - } - break; - - default: - break; - } - return status; -} - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - - diff --git a/ports/stm32/usbhost/Core/Src/usbh_ioreq.c b/ports/stm32/usbhost/Core/Src/usbh_ioreq.c deleted file mode 100644 index 280020355d..0000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_ioreq.c +++ /dev/null @@ -1,358 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ioreq.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file handles the issuing of the USB transactions - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_ioreq.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_IOREQ - * @brief This file handles the standard protocol processing (USB v2.0) - * @{ - */ - - -/** @defgroup USBH_IOREQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBH_IOREQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Private_Variables - * @{ - */ -/** - * @} - */ -/** @defgroup USBH_IOREQ_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Private_Functions - * @{ - */ - - - -/** - * @brief USBH_CtlSendSetup - * Sends the Setup Packet to the Device - * @param phost: Host Handle - * @param buff: Buffer pointer from which the Data will be send to Device - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CtlSendSetup (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t pipe_num) -{ - - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_CONTROL, /* EP type */ - USBH_PID_SETUP, /* Type setup */ - buff, /* data buffer */ - USBH_SETUP_PKT_SIZE, /* data length */ - 0); - return USBH_OK; -} - - -/** - * @brief USBH_CtlSendData - * Sends a data Packet to the Device - * @param phost: Host Handle - * @param buff: Buffer pointer from which the Data will be sent to Device - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CtlSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t pipe_num, - uint8_t do_ping ) -{ - if(phost->device.speed != USBH_SPEED_HIGH) - { - do_ping = 0; - } - - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_CONTROL, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - do_ping); /* do ping (HS Only)*/ - - return USBH_OK; -} - - -/** - * @brief USBH_CtlReceiveData - * Receives the Device Response to the Setup Packet - * @param phost: Host Handle - * @param buff: Buffer pointer in which the response needs to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_CtlReceiveData(USBH_HandleTypeDef *phost, - uint8_t* buff, - uint16_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_CONTROL, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - return USBH_OK; - -} - - -/** - * @brief USBH_BulkSendData - * Sends the Bulk Packet to the device - * @param phost: Host Handle - * @param buff: Buffer pointer from which the Data will be sent to Device - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_BulkSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t pipe_num, - uint8_t do_ping ) -{ - if(phost->device.speed != USBH_SPEED_HIGH) - { - do_ping = 0; - } - - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : IN */ - USBH_EP_BULK, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - do_ping); /* do ping (HS Only)*/ - return USBH_OK; -} - - -/** - * @brief USBH_BulkReceiveData - * Receives IN bulk packet from device - * @param phost: Host Handle - * @param buff: Buffer pointer in which the received data packet to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_BulkReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_BULK, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - return USBH_OK; -} - - -/** - * @brief USBH_InterruptReceiveData - * Receives the Device Response to the Interrupt IN token - * @param phost: Host Handle - * @param buff: Buffer pointer in which the response needs to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_InterruptReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_INTERRUPT, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - return USBH_OK; -} - -/** - * @brief USBH_InterruptSendData - * Sends the data on Interrupt OUT Endpoint - * @param phost: Host Handle - * @param buff: Buffer pointer from where the data needs to be copied - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_InterruptSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_INTERRUPT, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - return USBH_OK; -} - -/** - * @brief USBH_IsocReceiveData - * Receives the Device Response to the Isochronous IN token - * @param phost: Host Handle - * @param buff: Buffer pointer in which the response needs to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_IsocReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_ISO, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - - return USBH_OK; -} - -/** - * @brief USBH_IsocSendData - * Sends the data on Isochronous OUT Endpoint - * @param phost: Host Handle - * @param buff: Buffer pointer from where the data needs to be copied - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_IsocSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_ISO, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - return USBH_OK; -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Core/Src/usbh_pipes.c b/ports/stm32/usbhost/Core/Src/usbh_pipes.c deleted file mode 100644 index 9dcc4c517b..0000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_pipes.c +++ /dev/null @@ -1,204 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_pipes.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements functions for opening and closing Pipes - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_pipes.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_PIPES - * @brief This file includes opening and closing Pipes - * @{ - */ - -/** @defgroup USBH_PIPES_Private_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Private_Functions - * @{ - */ -static uint16_t USBH_GetFreePipe (USBH_HandleTypeDef *phost); - - -/** - * @brief USBH_Open_Pipe - * Open a pipe - * @param phost: Host Handle - * @param pipe_num: Pipe Number - * @param dev_address: USB Device address allocated to attached device - * @param speed : USB device speed (Full/Low) - * @param ep_type: end point type (Bulk/int/ctl) - * @param mps: max pkt size - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_OpenPipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - - USBH_LL_OpenPipe(phost, - pipe_num, - epnum, - dev_address, - speed, - ep_type, - mps); - - return USBH_OK; - -} - -/** - * @brief USBH_ClosePipe - * Close a pipe - * @param phost: Host Handle - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_ClosePipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num) -{ - - USBH_LL_ClosePipe(phost, pipe_num); - - return USBH_OK; - -} - -/** - * @brief USBH_Alloc_Pipe - * Allocate a new Pipe - * @param phost: Host Handle - * @param ep_addr: End point for which the Pipe to be allocated - * @retval Pipe number - */ -uint8_t USBH_AllocPipe (USBH_HandleTypeDef *phost, uint8_t ep_addr) -{ - uint16_t pipe; - - pipe = USBH_GetFreePipe(phost); - - if (pipe != 0xFFFF) - { - phost->Pipes[pipe] = 0x8000 | ep_addr; - } - return pipe; -} - -/** - * @brief USBH_Free_Pipe - * Free the USB Pipe - * @param phost: Host Handle - * @param idx: Pipe number to be freed - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_FreePipe (USBH_HandleTypeDef *phost, uint8_t idx) -{ - if(idx < 11) - { - phost->Pipes[idx] &= 0x7FFF; - } - return USBH_OK; -} - -/** - * @brief USBH_GetFreePipe - * @param phost: Host Handle - * Get a free Pipe number for allocation to a device endpoint - * @retval idx: Free Pipe number - */ -static uint16_t USBH_GetFreePipe (USBH_HandleTypeDef *phost) -{ - uint8_t idx = 0; - - for (idx = 0 ; idx < 11 ; idx++) - { - if ((phost->Pipes[idx] & 0x8000) == 0) - { - return idx; - } - } - return 0xFFFF; -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usrsw.c b/ports/stm32/usrsw.c deleted file mode 100644 index ded0b68640..0000000000 --- a/ports/stm32/usrsw.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extint.h" -#include "pin.h" -#include "usrsw.h" - -#if MICROPY_HW_HAS_SWITCH - -/// \moduleref pyb -/// \class Switch - switch object -/// -/// A Switch object is used to control a push-button switch. -/// -/// Usage: -/// -/// sw = pyb.Switch() # create a switch object -/// sw() # get state (True if pressed, False otherwise) -/// sw.callback(f) # register a callback to be called when the -/// # switch is pressed down -/// sw.callback(None) # remove the callback -/// -/// Example: -/// -/// pyb.Switch().callback(lambda: pyb.LED(1).toggle()) - -// this function inits the switch GPIO so that it can be used -void switch_init0(void) { - mp_hal_pin_config(MICROPY_HW_USRSW_PIN, MP_HAL_PIN_MODE_INPUT, MICROPY_HW_USRSW_PULL, 0); -} - -int switch_get(void) { - int val = ((MICROPY_HW_USRSW_PIN->gpio->IDR & MICROPY_HW_USRSW_PIN->pin_mask) != 0); - return val == MICROPY_HW_USRSW_PRESSED; -} - -/******************************************************************************/ -// MicroPython bindings - -typedef struct _pyb_switch_obj_t { - mp_obj_base_t base; -} pyb_switch_obj_t; - -STATIC const pyb_switch_obj_t pyb_switch_obj = {{&pyb_switch_type}}; - -void pyb_switch_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - mp_print_str(print, "Switch()"); -} - -/// \classmethod \constructor() -/// Create and return a switch object. -STATIC mp_obj_t pyb_switch_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // No need to clear the callback member: if it's already been set and registered - // with extint then we don't want to reset that behaviour. If it hasn't been set, - // then no extint will be called until it is set via the callback method. - - // return static switch object - return (mp_obj_t)&pyb_switch_obj; -} - -/// \method \call() -/// Return the switch state: `True` if pressed down, `False` otherwise. -mp_obj_t pyb_switch_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // get switch state - mp_arg_check_num(n_args, n_kw, 0, 0, false); - return switch_get() ? mp_const_true : mp_const_false; -} - -mp_obj_t pyb_switch_value(mp_obj_t self_in) { - (void)self_in; - return mp_obj_new_bool(switch_get()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_switch_value_obj, pyb_switch_value); - -STATIC mp_obj_t switch_callback(mp_obj_t line) { - if (MP_STATE_PORT(pyb_switch_callback) != mp_const_none) { - mp_call_function_0(MP_STATE_PORT(pyb_switch_callback)); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(switch_callback_obj, switch_callback); - -/// \method callback(fun) -/// Register the given function to be called when the switch is pressed down. -/// If `fun` is `None`, then it disables the callback. -mp_obj_t pyb_switch_callback(mp_obj_t self_in, mp_obj_t callback) { - MP_STATE_PORT(pyb_switch_callback) = callback; - // Init the EXTI each time this function is called, since the EXTI - // may have been disabled by an exception in the interrupt, or the - // user disabling the line explicitly. - extint_register((mp_obj_t)MICROPY_HW_USRSW_PIN, - MICROPY_HW_USRSW_EXTI_MODE, - MICROPY_HW_USRSW_PULL, - callback == mp_const_none ? mp_const_none : (mp_obj_t)&switch_callback_obj, - true); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_switch_callback_obj, pyb_switch_callback); - -STATIC const mp_rom_map_elem_t pyb_switch_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_switch_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_switch_callback_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_switch_locals_dict, pyb_switch_locals_dict_table); - -const mp_obj_type_t pyb_switch_type = { - { &mp_type_type }, - .name = MP_QSTR_Switch, - .print = pyb_switch_print, - .make_new = pyb_switch_make_new, - .call = pyb_switch_call, - .locals_dict = (mp_obj_dict_t*)&pyb_switch_locals_dict, -}; - -#endif // MICROPY_HW_HAS_SWITCH diff --git a/ports/stm32/usrsw.h b/ports/stm32/usrsw.h deleted file mode 100644 index a8a087db2f..0000000000 --- a/ports/stm32/usrsw.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_USRSW_H -#define MICROPY_INCLUDED_STM32_USRSW_H - -void switch_init0(void); -int switch_get(void); - -extern const mp_obj_type_t pyb_switch_type; - -#endif // MICROPY_INCLUDED_STM32_USRSW_H diff --git a/ports/stm32/wdt.c b/ports/stm32/wdt.c deleted file mode 100644 index 8df7b47684..0000000000 --- a/ports/stm32/wdt.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "wdt.h" - -#if defined(STM32H7) -#define IWDG (IWDG1) -#endif - -typedef struct _pyb_wdt_obj_t { - mp_obj_base_t base; -} pyb_wdt_obj_t; - -STATIC pyb_wdt_obj_t pyb_wdt = {{&pyb_wdt_type}}; - -STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse arguments - enum { ARG_id, ARG_timeout }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - mp_int_t id = args[ARG_id].u_int; - if (id != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "WDT(%d) doesn't exist", id)); - } - - // timeout is in milliseconds - mp_int_t timeout = args[ARG_timeout].u_int; - - // compute prescaler - uint32_t prescaler; - for (prescaler = 0; prescaler < 6 && timeout >= 512; ++prescaler, timeout /= 2) { - } - - // convert milliseconds to ticks - timeout *= 8; // 32kHz / 4 = 8 ticks per millisecond (approx) - if (timeout <= 0) { - mp_raise_ValueError("WDT timeout too short"); - } else if (timeout > 0xfff) { - mp_raise_ValueError("WDT timeout too long"); - } - timeout -= 1; - - // set the reload register - while (IWDG->SR & 2) { - } - IWDG->KR = 0x5555; - IWDG->RLR = timeout; - - // set the prescaler - while (IWDG->SR & 1) { - } - IWDG->KR = 0x5555; - IWDG->PR = prescaler; - - // start the watch dog - IWDG->KR = 0xcccc; - - return (mp_obj_t)&pyb_wdt; -} - -STATIC mp_obj_t pyb_wdt_feed(mp_obj_t self_in) { - (void)self_in; - IWDG->KR = 0xaaaa; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_wdt_feed_obj, pyb_wdt_feed); - -STATIC const mp_rom_map_elem_t pyb_wdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&pyb_wdt_feed_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_wdt_locals_dict, pyb_wdt_locals_dict_table); - -const mp_obj_type_t pyb_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = pyb_wdt_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_wdt_locals_dict, -}; diff --git a/ports/stm32/wdt.h b/ports/stm32/wdt.h deleted file mode 100644 index d60bb7e9e6..0000000000 --- a/ports/stm32/wdt.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_WDT_H -#define MICROPY_INCLUDED_STM32_WDT_H - -extern const mp_obj_type_t pyb_wdt_type; - -#endif // MICROPY_INCLUDED_STM32_WDT_H diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index ed396fea7c..2727ea954f 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -3,6 +3,7 @@ # The MIT License (MIT) # # Copyright (c) 2019 Dan Halbert for Adafruit Industries +# Copyright (c) 2019 Lucian Copeland for Adafruit Industries # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal @@ -93,7 +94,7 @@ C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$( CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) # Undo some warnings. -# STM32 apparently also uses undefined preprocessor variables quite casually, +# STM32 apparently also uses undefined preprocessor variables quite casually, # so we can't do warning checks for these. CFLAGS += -Wno-undef # STM32 might do casts that increase alignment requirements. @@ -120,7 +121,7 @@ LIBS += -lm endif # TinyUSB defines -CFLAGS += -DHSE_VALUE=8000000 -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 ###################################### @@ -128,29 +129,21 @@ CFLAGS += -DHSE_VALUE=8000000 -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BU ###################################### SRC_STM32 = \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.c \ - stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \ @@ -164,7 +157,20 @@ SRC_STM32 = \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \ - system_stm32f4xx.c + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.c \ + system_stm32f4xx.c + SRC_C += \ background.c \ @@ -189,9 +195,9 @@ SRC_C += \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ supervisor/shared/memory.c - + ifneq ($(USB),FALSE) -SRC_C += lib/tinyusb/src/portable/st/stm32f4/dcd_stm32f4.c +SRC_C += lib/tinyusb/src/portable/st/synopsys/dcd_synopsys.c endif SRC_S = \ @@ -241,12 +247,12 @@ $(BUILD)/firmware.elf: $(OBJ) $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" $(Q)$(OBJCOPY) -O binary $^ $@ -# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ +# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" $(Q)$(OBJCOPY) -O ihex $^ $@ -# $(Q)$(OBJCOPY) -O ihex -j .vectors -j .text -j .data $^ $@ +# $(Q)$(OBJCOPY) -O ihex -j .vectors -j .text -j .data $^ $@ $(BUILD)/firmware.uf2: $(BUILD)/firmware.hex $(ECHO) "Create $@" diff --git a/ports/esp32/qstrdefsport.h b/ports/stm32f4/boards/feather_stm32f405_express/board.c similarity index 85% rename from ports/esp32/qstrdefsport.h rename to ports/stm32f4/boards/feather_stm32f405_express/board.c index ff6c2cc426..4421970eef 100644 --- a/ports/esp32/qstrdefsport.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/board.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2014 Damien P. George + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,7 +24,15 @@ * THE SOFTWARE. */ -// qstrs specific to this port, only needed if they aren't auto-generated +#include "boards/board.h" -// Entries for sys.path -Q(/lib) +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/feather_f405/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h similarity index 82% rename from ports/stm32f4/boards/feather_f405/mpconfigboard.h rename to ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index edbc79ea92..d795342dd8 100644 --- a/ports/stm32f4/boards/feather_f405/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -27,11 +27,17 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "Feather F405" +#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" #define MICROPY_HW_MCU_NAME "STM32F405RG" #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) #define AUTORESET_DELAY_MS 500 -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) \ No newline at end of file +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PB05 +#define SPI_FLASH_MISO_PIN &pin_PB04 +#define SPI_FLASH_SCK_PIN &pin_PB03 +#define SPI_FLASH_CS_PIN &pin_PA15 diff --git a/ports/stm32f4/boards/feather_f405/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk similarity index 60% rename from ports/stm32f4/boards/feather_f405/mpconfigboard.mk rename to ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 5ea1ab4501..5bad4e81f3 100644 --- a/ports/stm32f4/boards/feather_f405/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -1,11 +1,13 @@ USB_VID = 0x239A USB_PID = 0x805A -USB_PRODUCT = "Feather F405" +USB_PRODUCT = "Feather STM32F405 Express" USB_MANUFACTURER = "Adafruit Industries LLC" USB_DEVICES = "CDC,MSC" -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ MCU_SERIES = m4 MCU_VARIANT = stm32f4 diff --git a/ports/stm32f4/boards/feather_f405/pins.c b/ports/stm32f4/boards/feather_stm32f405_express/pins.c similarity index 100% rename from ports/stm32f4/boards/feather_f405/pins.c rename to ports/stm32f4/boards/feather_stm32f405_express/pins.c diff --git a/ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h similarity index 99% rename from ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h rename to ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h index 019b03ca7a..7a1a9428f8 100644 --- a/ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h @@ -41,7 +41,7 @@ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CRC_MODULE_ENABLED */ /* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED /* #define HAL_DCMI_MODULE_ENABLED */ /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ @@ -61,7 +61,7 @@ /* #define HAL_SD_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED -/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ diff --git a/ports/stm32f4/boards/pyboard_v11/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/pyboard_v11/stm32f4xx_hal_conf.h index 019b03ca7a..7a1a9428f8 100644 --- a/ports/stm32f4/boards/pyboard_v11/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/pyboard_v11/stm32f4xx_hal_conf.h @@ -41,7 +41,7 @@ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CRC_MODULE_ENABLED */ /* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED /* #define HAL_DCMI_MODULE_ENABLED */ /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ @@ -61,7 +61,7 @@ /* #define HAL_SD_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED -/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h index b244a69b5e..18d9d60ebe 100644 --- a/ports/stm32f4/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h @@ -61,7 +61,7 @@ /* #define HAL_SD_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED -/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h index 0a89d96465..ebee98f89f 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h @@ -34,4 +34,5 @@ #define FLASH_PAGE_SIZE (0x4000) #define AUTORESET_DELAY_MS 500 -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) \ No newline at end of file +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk index 21af63735f..509a244106 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -6,6 +6,11 @@ USB_MANUFACTURER = "STMicroelectronics" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE +# QSPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = N25Q128A +# LONGINT_IMPL = MPZ + MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f412zx diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h index dbfd423d06..b89240f982 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h @@ -60,8 +60,8 @@ /* #define HAL_SAI_MODULE_ENABLED */ #define HAL_SD_MODULE_ENABLED /* #define HAL_MMC_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ @@ -70,7 +70,6 @@ #define HAL_PCD_MODULE_ENABLED /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ #define HAL_QSPI_MODULE_ENABLED /* #define HAL_CEC_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ diff --git a/ports/stm32f4/common-hal/analogio/AnalogOut.c b/ports/stm32f4/common-hal/analogio/AnalogOut.c index a59a8b190e..5eb8c2dc03 100644 --- a/ports/stm32f4/common-hal/analogio/AnalogOut.c +++ b/ports/stm32f4/common-hal/analogio/AnalogOut.c @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019, Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -34,9 +35,57 @@ #include "shared-bindings/microcontroller/Pin.h" #include "supervisor/shared/translate.h" +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" + +//DAC is shared between both channels. +//TODO: store as struct with channel info, automatically turn it off if unused +//on both channels for power save? +#if HAS_DAC +DAC_HandleTypeDef handle; +#endif + void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { - mp_raise_ValueError(translate("DAC not supported")); + #if !(HAS_DAC) + mp_raise_ValueError(translate("No DAC on chip")); + #else + if (pin == &pin_PA04) { + self->channel = DAC_CHANNEL_1; + } else if (pin == &pin_PA05) { + self->channel = DAC_CHANNEL_2; + } else { + mp_raise_ValueError(translate("Invalid DAC pin supplied")); + } + + //Only init if the shared DAC is empty or reset + if (handle.Instance == NULL || handle.State == HAL_DAC_STATE_RESET) { + __HAL_RCC_DAC_CLK_ENABLE(); + handle.Instance = DAC; + if (HAL_DAC_Init(&handle) != HAL_OK) + { + mp_raise_ValueError(translate("DAC Device Init Error")); + } + } + + //init channel specific pin + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + + self->ch_handle.DAC_Trigger = DAC_TRIGGER_NONE; + self->ch_handle.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; + if (HAL_DAC_ConfigChannel(&handle, &self->ch_handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("DAC Channel Init Error")); + } + + self->pin = pin; + self->deinited = false; + claim_pin(pin); + #endif } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { @@ -44,14 +93,25 @@ bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { - + #if HAS_DAC + reset_pin_number(self->pin->port,self->pin->number); + self->pin = mp_const_none; + self->deinited = true; + //TODO: if both are de-inited, should we turn off the DAC? + #endif } void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { + #if HAS_DAC + HAL_DAC_SetValue(&handle, self->channel, DAC_ALIGN_12B_R, value >> 4); + HAL_DAC_Start(&handle, self->channel); + #endif } void analogout_reset(void) { - // audioout_reset also resets the DAC, and does a smooth ramp down to avoid clicks - // if it was enabled, so do that instead if AudioOut is enabled. + #if HAS_DAC + __HAL_RCC_DAC_CLK_DISABLE(); + HAL_DAC_DeInit(&handle); + #endif } diff --git a/ports/stm32f4/common-hal/analogio/AnalogOut.h b/ports/stm32f4/common-hal/analogio/AnalogOut.h index f2952e9f96..1381d4d3a7 100644 --- a/ports/stm32f4/common-hal/analogio/AnalogOut.h +++ b/ports/stm32f4/common-hal/analogio/AnalogOut.h @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,19 +25,25 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_ANALOGIO_ANALOGOUT_H -#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H #include "common-hal/microcontroller/Pin.h" #include "py/obj.h" +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" typedef struct { mp_obj_base_t base; +#if HAS_DAC + DAC_ChannelConfTypeDef ch_handle; +#endif + const mcu_pin_obj_t * pin; uint8_t channel; bool deinited; } analogio_analogout_obj_t; void analogout_reset(void); -#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index 8af670394a..c2f5dbe0a2 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -221,11 +221,11 @@ void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const uint8_t *data, size_t len, bool transmit_stop_bit) { - HAL_StatusTypeDef result = HAL_I2C_Master_Transmit(&(self->handle), (uint16_t)(addr<<1), (uint8_t *)data, (uint16_t)len, 2); + HAL_StatusTypeDef result = HAL_I2C_Master_Transmit(&(self->handle), (uint16_t)(addr<<1), (uint8_t *)data, (uint16_t)len, 500); return result == HAL_OK ? 0 : MP_EIO; } uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t *data, size_t len) { - return HAL_I2C_Master_Receive(&(self->handle), (uint16_t)(addr<<1), data, (uint16_t)len, 2) == HAL_OK ? 0 : MP_EIO; + return HAL_I2C_Master_Receive(&(self->handle), (uint16_t)(addr<<1), data, (uint16_t)len, 500) == HAL_OK ? 0 : MP_EIO; } diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index cde3e5372c..e20bd7a947 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,37 +24,352 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include #include "shared-bindings/busio/SPI.h" #include "py/mperrno.h" #include "py/runtime.h" +#include "stm32f4xx_hal.h" +#include "shared-bindings/microcontroller/__init__.h" #include "boards/board.h" +#include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" +STATIC bool reserved_spi[6]; +STATIC bool never_reset_spi[6]; + +void spi_reset(void) { + #ifdef SPI1 + if(!never_reset_spi[0]) { + reserved_spi[0] = false; + __HAL_RCC_SPI1_CLK_DISABLE(); + } + #endif + #ifdef SPI2 + if(!never_reset_spi[1]) { + reserved_spi[1] = false; + __HAL_RCC_SPI2_CLK_DISABLE(); + } + #endif + #ifdef SPI3 + if(!never_reset_spi[2]) { + reserved_spi[2] = false; + __HAL_RCC_SPI3_CLK_DISABLE(); + } + #endif + #ifdef SPI4 + if(!never_reset_spi[3]) { + reserved_spi[3] = false; + __HAL_RCC_SPI4_CLK_DISABLE(); + } + #endif + #ifdef SPI5 + if(!never_reset_spi[4]) { + reserved_spi[4] = false; + __HAL_RCC_SPI5_CLK_DISABLE(); + } + #endif + #ifdef SPI6 + if(!never_reset_spi[5]) { + reserved_spi[5] = false; + __HAL_RCC_SPI6_CLK_DISABLE(); + } + #endif +} + void common_hal_busio_spi_construct(busio_spi_obj_t *self, - const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, + const mcu_pin_obj_t * sck, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - mp_raise_NotImplementedError(translate("SPI not yet supported")); + + //match pins to SPI objects + SPI_TypeDef * SPIx; + + uint8_t sck_len = sizeof(mcu_spi_sck_list)/sizeof(*mcu_spi_sck_list); + uint8_t mosi_len = sizeof(mcu_spi_mosi_list)/sizeof(*mcu_spi_mosi_list); + uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); + + bool spi_taken = false; + //sck + for(uint i=0; isck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = &mcu_spi_miso_list[k]; + break; + } + } + } + } + } + } + + //handle typedef selection, errors + if(self->sck!=NULL && self->mosi!=NULL && self->miso!=NULL ) { + SPIx = mcu_spi_banks[self->sck->spi_index-1]; + } else { + if (spi_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid SPI pin selection")); + } + } + + //Start GPIO for each pin + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(sck->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->sck->altfn_index; + HAL_GPIO_Init(pin_port(sck->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(mosi->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->mosi->altfn_index; + HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(miso->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->miso->altfn_index; + HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + + #ifdef SPI1 + if(SPIx==SPI1) { + reserved_spi[0] = true; + __HAL_RCC_SPI1_CLK_ENABLE(); + } + #endif + #ifdef SPI2 + if(SPIx==SPI2) { + reserved_spi[1] = true; + __HAL_RCC_SPI2_CLK_ENABLE(); + } + #endif + #ifdef SPI3 + if(SPIx==SPI3) { + reserved_spi[2] = true; + __HAL_RCC_SPI3_CLK_ENABLE(); + } + #endif + #ifdef SPI4 + if(SPIx==SPI4) { + reserved_spi[3] = true; + __HAL_RCC_SPI4_CLK_ENABLE(); + } + #endif + #ifdef SPI5 + if(SPIx==SPI5) { + reserved_spi[4] = true; + __HAL_RCC_SPI5_CLK_ENABLE(); + } + #endif + #ifdef SPI6 + if(SPIx==SPI6) { + reserved_spi[5] = true; + __HAL_RCC_SPI6_CLK_ENABLE(); + } + #endif + + self->handle.Instance = SPIx; + self->handle.Init.Mode = SPI_MODE_MASTER; + self->handle.Init.Direction = SPI_DIRECTION_2LINES; + self->handle.Init.DataSize = SPI_DATASIZE_8BIT; + self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + self->handle.Init.NSS = SPI_NSS_SOFT; + self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; + self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; + self->handle.Init.TIMode = SPI_TIMODE_DISABLE; + self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + self->handle.Init.CRCPolynomial = 10; + if (HAL_SPI_Init(&self->handle) != HAL_OK) + { + mp_raise_ValueError(translate("SPI Init Error")); + } + self->baudrate = (HAL_RCC_GetPCLK2Freq()/16); + self->prescaler = 16; + self->polarity = 0; + self->phase = 1; + self->bits = 8; + + claim_pin(sck); + claim_pin(mosi); + claim_pin(miso); } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + for(size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { + if (mcu_spi_banks[i] == self->handle.Instance) { + never_reset_spi[i] = true; + never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); + never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); + never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + break; + } + } } bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { - return 0; + return self->sck->pin == mp_const_none; } void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + #ifdef SPI1 + if(self->handle.Instance==SPI1) { + reserved_spi[0] = false; + __HAL_RCC_SPI1_CLK_DISABLE(); + } + #endif + #ifdef SPI2 + if(self->handle.Instance==SPI2) { + reserved_spi[1] = false; + __HAL_RCC_SPI2_CLK_DISABLE(); + } + #endif + #ifdef SPI3 + if(self->handle.Instance==SPI3) { + reserved_spi[2] = false; + __HAL_RCC_SPI3_CLK_DISABLE(); + } + #endif + #ifdef SPI4 + if(self->handle.Instance==SPI4) { + reserved_spi[3] = false; + __HAL_RCC_SPI4_CLK_DISABLE(); + } + #endif + #ifdef SPI5 + if(self->handle.Instance==SPI5) { + reserved_spi[4] = false; + __HAL_RCC_SPI5_CLK_DISABLE(); + } + #endif + #ifdef SPI6 + if(self->handle.Instance==SPI6) { + reserved_spi[5] = false; + __HAL_RCC_SPI6_CLK_DISABLE(); + } + #endif + reset_pin_number(self->sck->pin->port,self->sck->pin->number); + reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); + reset_pin_number(self->miso->pin->port,self->miso->pin->number); + self->sck = mp_const_none; + self->mosi = mp_const_none; + self->miso = mp_const_none; +} + +static uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler) { + static const uint32_t baud_map[8][2] = { + {2,SPI_BAUDRATEPRESCALER_2}, + {4,SPI_BAUDRATEPRESCALER_4}, + {8,SPI_BAUDRATEPRESCALER_8}, + {16,SPI_BAUDRATEPRESCALER_16}, + {32,SPI_BAUDRATEPRESCALER_32}, + {64,SPI_BAUDRATEPRESCALER_64}, + {128,SPI_BAUDRATEPRESCALER_128}, + {256,SPI_BAUDRATEPRESCALER_256} + }; + size_t i = 0; + uint16_t divisor; + do { + divisor = baud_map[i][0]; + if (baudrate >= (HAL_RCC_GetPCLK2Freq()/divisor)) { + *prescaler = divisor; + return baud_map[i][1]; + } + i++; + } while (divisor != 256); + //only gets here if requested baud is lower than minimum + *prescaler = 256; + return SPI_BAUDRATEPRESCALER_256; } bool common_hal_busio_spi_configure(busio_spi_obj_t *self, - uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { - return true; + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + //This resets the SPI, so check before updating it redundantly + if (baudrate == self->baudrate && polarity== self->polarity + && phase == self->phase && bits == self->bits) return true; + + //Deinit SPI + HAL_SPI_DeInit(&self->handle); + + if (bits == 8) { + self->handle.Init.DataSize = SPI_DATASIZE_8BIT; + } else if (bits == 16) { + self->handle.Init.DataSize = SPI_DATASIZE_16BIT; + } else { + return false; + } + + if (polarity) { + self->handle.Init.CLKPolarity = SPI_POLARITY_HIGH; + } else { + self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + } + + if (phase) { + self->handle.Init.CLKPhase = SPI_PHASE_2EDGE; + } else { + self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + } + + self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler); + + self->handle.Init.Mode = SPI_MODE_MASTER; + self->handle.Init.Direction = SPI_DIRECTION_2LINES; + self->handle.Init.NSS = SPI_NSS_SOFT; + self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; + self->handle.Init.TIMode = SPI_TIMODE_DISABLE; + self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + self->handle.Init.CRCPolynomial = 10; + + if (HAL_SPI_Init(&self->handle) != HAL_OK) + { + mp_raise_ValueError(translate("SPI Re-initialization error")); + } + + self->baudrate = baudrate; + self->polarity = polarity; + self->phase = phase; + self->bits = bits; + return true; } bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { bool grabbed_lock = false; + + //Critical section code that may be required at some point. + // uint32_t store_primask = __get_PRIMASK(); + // __disable_irq(); + // __DMB(); + + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + + // __DMB(); + // __set_PRIMASK(store_primask); + return grabbed_lock; } @@ -67,26 +383,33 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { - return 0; + HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); + return result == HAL_OK; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - return 0; + HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); + return result == HAL_OK; } -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - return 0; +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, + uint8_t *data_out, uint8_t *data_in, size_t len) { + HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, + data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); + return result == HAL_OK; } uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { - return 0; + //returns actual frequency + uint32_t result = HAL_RCC_GetPCLK2Freq()/self->prescaler; + return result; } uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { - return 0; + return self->phase; } uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { - return 0; + return self->polarity; } \ No newline at end of file diff --git a/ports/stm32f4/common-hal/busio/SPI.h b/ports/stm32f4/common-hal/busio/SPI.h index f7ff79b49b..067d2fcb65 100644 --- a/ports/stm32f4/common-hal/busio/SPI.h +++ b/ports/stm32f4/common-hal/busio/SPI.h @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -29,14 +30,26 @@ #include "common-hal/microcontroller/Pin.h" +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + #include "py/obj.h" typedef struct { mp_obj_base_t base; + SPI_HandleTypeDef handle; bool has_lock; - uint8_t clock_pin; - uint8_t MOSI_pin; - uint8_t MISO_pin; + const mcu_spi_sck_obj_t *sck; + const mcu_spi_mosi_obj_t *mosi; + const mcu_spi_miso_obj_t *miso; + const mcu_spi_nss_obj_t *nss; + uint32_t baudrate; + uint16_t prescaler; + uint8_t polarity; + uint8_t phase; + uint8_t bits; } busio_spi_obj_t; +void spi_reset(void); + #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/stm32f4/common-hal/microcontroller/Processor.c b/ports/stm32f4/common-hal/microcontroller/Processor.c index c16bd31255..3ab746685d 100644 --- a/ports/stm32f4/common-hal/microcontroller/Processor.c +++ b/ports/stm32f4/common-hal/microcontroller/Processor.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ +#include #include "common-hal/microcontroller/Processor.h" #include "py/runtime.h" #include "supervisor/shared/translate.h" @@ -34,7 +35,11 @@ #define STM32_UUID ((uint32_t *)0x1FFF7A10) float common_hal_mcu_processor_get_temperature(void) { - return 0; + return NAN; +} + +float common_hal_mcu_processor_get_voltage(void) { + return NAN; } uint32_t common_hal_mcu_processor_get_frequency(void) { diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c new file mode 100644 index 0000000000..16b1b5b896 --- /dev/null +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -0,0 +1,399 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Uses code from Micropython, Copyright (c) 2013-2016 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "py/runtime.h" +#include "common-hal/pulseio/PWMOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "supervisor/shared/translate.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "stm32f4xx_hal.h" +#include "common-hal/microcontroller/Pin.h" + +#define ALL_CLOCKS 0xFFFF + +STATIC uint8_t reserved_tim[TIM_BANK_ARRAY_LEN]; +STATIC uint32_t tim_frequencies[TIM_BANK_ARRAY_LEN]; +STATIC bool never_reset_tim[TIM_BANK_ARRAY_LEN]; + +STATIC void tim_clock_enable(uint16_t mask); +STATIC void tim_clock_disable(uint16_t mask); + +// Get the frequency (in Hz) of the source clock for the given timer. +// On STM32F405/407/415/417 there are 2 cases for how the clock freq is set. +// If the APB prescaler is 1, then the timer clock is equal to its respective +// APB clock. Otherwise (APB prescaler > 1) the timer clock is twice its +// respective APB clock. See DM00031020 Rev 4, page 115. +STATIC uint32_t timer_get_source_freq(uint32_t tim_id) { + uint32_t source, clk_div; + if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) { + // TIM{1,8,9,10,11} are on APB2 + source = HAL_RCC_GetPCLK2Freq(); + clk_div = RCC->CFGR & RCC_CFGR_PPRE2; + } else { + // TIM{2,3,4,5,6,7,12,13,14} are on APB1 + source = HAL_RCC_GetPCLK1Freq(); + clk_div = RCC->CFGR & RCC_CFGR_PPRE1; + } + if (clk_div != 0) { + // APB prescaler for this timer is > 1 + source *= 2; + } + return source; +} + +STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) { + //duty cycle is duty/0xFFFF fraction x (number of pulses per period) + return (duty*period)/((1<<16)-1); +} + +STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, + uint32_t frequency, uint32_t source_freq) { + //Find the largest possible period supported by this frequency + for (int i=0; i<(1 << 16);i++) { + *period = source_freq/(i*frequency); + if (*period < (1 << 16) && *period>=2) { + *prescaler = i; + break; + } + } + if (*prescaler == 0) { + mp_raise_ValueError(translate("Invalid frequency supplied")); + } +} + +void pwmout_reset(void) { + uint16_t never_reset_mask = 0x00; + for(int i=0;ihandle.Instance) { + never_reset_tim[i] = true; + never_reset_pin_number(self->tim->pin->port, self->tim->pin->number); + break; + } + } +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) { + if (mcu_tim_banks[i] == self->handle.Instance) { + never_reset_tim[i] = false; + break; + } + } +} + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, + const mcu_pin_obj_t* pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { + TIM_TypeDef * TIMx; + uint8_t tim_num = sizeof(mcu_tim_pin_list)/sizeof(*mcu_tim_pin_list); + bool tim_chan_taken = false; + bool tim_taken_f_mismatch = false; + bool var_freq_mismatch = false; + bool first_time_setup = true; + + for(uint i = 0; i < tim_num; i++) { + mcu_tim_pin_obj_t l_tim = mcu_tim_pin_list[i]; + uint8_t l_tim_index = l_tim.tim_index-1; + uint8_t l_tim_channel = l_tim.channel_index-1; + + //if pin is same + if (l_tim.pin == pin) { + //check if the timer has a channel active + if (reserved_tim[l_tim_index] != 0) { + //is it the same channel? (or all channels reserved by a var-freq) + if (reserved_tim[l_tim_index] & 1<<(l_tim_channel)) { + tim_chan_taken = true; + continue; //keep looking, might be another viable option + } + //If the frequencies are the same it's ok + if (tim_frequencies[l_tim_index] != frequency) { + tim_taken_f_mismatch = true; + continue; //keep looking + } + //you can't put a variable frequency on a partially reserved timer + if (variable_frequency) { + var_freq_mismatch = true; + continue; //keep looking + } + first_time_setup = false; //skip setting up the timer + } + //No problems taken, so set it up + self->tim = &l_tim; + break; + } + } + + //handle valid/invalid timer instance + if (self->tim!=NULL) { + //create instance + TIMx = mcu_tim_banks[self->tim->tim_index-1]; + //reserve timer/channel + if (variable_frequency) { + reserved_tim[self->tim->tim_index-1] = 0x0F; + } else { + reserved_tim[self->tim->tim_index-1] |= 1<<(self->tim->channel_index-1); + } + tim_frequencies[self->tim->tim_index-1] = frequency; + } else { //no match found + if (tim_chan_taken) { + mp_raise_ValueError(translate("No more timers available on this pin.")); + } else if (tim_taken_f_mismatch) { + mp_raise_ValueError(translate("Frequency must be the same as as the existing PWMOut using this timer")); + } else if (var_freq_mismatch) { + mp_raise_ValueError(translate("Cannot vary frequency on a timer that is already in use")); + } else { + mp_raise_ValueError(translate("Invalid pins")); + } + } + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = self->tim->altfn_index; + HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + + tim_clock_enable(1<<(self->tim->tim_index - 1)); + + //translate channel into handle value + self->channel = 4 * (self->tim->channel_index - 1); + + uint32_t prescaler = 0; //prescaler is 15 bit + uint32_t period = 0; //period is 16 bit + timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + + //Timer init + self->handle.Instance = TIMx; + self->handle.Init.Period = period - 1; + self->handle.Init.Prescaler = prescaler - 1; + self->handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + self->handle.Init.CounterMode = TIM_COUNTERMODE_UP; + self->handle.Init.RepetitionCounter = 0; + + //only run init if this is the first instance of this timer + if (first_time_setup) { + if (HAL_TIM_PWM_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("Could not initialize timer")); + } + } + + //Channel/PWM init + self->chan_handle.OCMode = TIM_OCMODE_PWM1; + self->chan_handle.Pulse = timer_get_internal_duty(duty, period); + self->chan_handle.OCPolarity = TIM_OCPOLARITY_LOW; + self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE; + self->chan_handle.OCNPolarity = TIM_OCNPOLARITY_LOW; // needed for TIM1 and TIM8 + self->chan_handle.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 + self->chan_handle.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8 + if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not initialize channel")); + } + if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not start PWM")); + } + + self->variable_frequency = variable_frequency; + self->frequency = frequency; + self->duty_cycle = duty; + self->period = period; + + return PWMOUT_OK; +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { + return self->tim == mp_const_none; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + //var freq shuts down entire timer, others just their channel + if (self->variable_frequency) { + reserved_tim[self->tim->tim_index-1] = 0x00; + } else { + reserved_tim[self->tim->tim_index-1] &= ~(1<tim->channel_index); + HAL_TIM_PWM_Stop(&self->handle, self->channel); + } + reset_pin_number(self->tim->pin->port,self->tim->pin->number); + self->tim = mp_const_none; + + //if reserved timer has no active channels, we can disable it + if (!reserved_tim[self->tim->tim_index-1]) { + tim_frequencies[self->tim->tim_index-1] = 0x00; + tim_clock_disable(1<<(self->tim->tim_index-1)); + } +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { + uint32_t internal_duty_cycle = timer_get_internal_duty(duty, self->period); + __HAL_TIM_SET_COMPARE(&self->handle, self->channel, internal_duty_cycle); + self->duty_cycle = duty; +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { + return self->duty_cycle; +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { + //don't halt setup for the same frequency + if (frequency == self->frequency) return; + + uint32_t prescaler = 0; + uint32_t period = 0; + timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + + //shut down + HAL_TIM_PWM_Stop(&self->handle, self->channel); + + //Only change altered values + self->handle.Init.Period = period - 1; + self->handle.Init.Prescaler = prescaler - 1; + + //restart everything, adjusting for new speed + if (HAL_TIM_PWM_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("Could not re-init timer")); + } + + self->chan_handle.Pulse = timer_get_internal_duty(self->duty_cycle, period); + + if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not re-init channel")); + } + if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not restart PWM")); + } + + tim_frequencies[self->tim->tim_index-1] = frequency; + self->frequency = frequency; + self->period = period; +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { + return self->frequency; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { + return self->variable_frequency; +} + +STATIC void tim_clock_enable(uint16_t mask) { + #ifdef TIM1 + if (mask & 1<<0) __HAL_RCC_TIM1_CLK_ENABLE(); + #endif + #ifdef TIM2 + if (mask & 1<<1) __HAL_RCC_TIM2_CLK_ENABLE(); + #endif + #ifdef TIM3 + if (mask & 1<<2) __HAL_RCC_TIM3_CLK_ENABLE(); + #endif + #ifdef TIM4 + if (mask & 1<<3) __HAL_RCC_TIM4_CLK_ENABLE(); + #endif + #ifdef TIM5 + if (mask & 1<<4) __HAL_RCC_TIM5_CLK_ENABLE(); + #endif + //6 and 7 are reserved ADC timers + #ifdef TIM8 + if (mask & 1<<7) __HAL_RCC_TIM8_CLK_ENABLE(); + #endif + #ifdef TIM9 + if (mask & 1<<8) __HAL_RCC_TIM9_CLK_ENABLE(); + #endif + #ifdef TIM10 + if (mask & 1<<9) __HAL_RCC_TIM10_CLK_ENABLE(); + #endif + #ifdef TIM11 + if (mask & 1<<10) __HAL_RCC_TIM11_CLK_ENABLE(); + #endif + #ifdef TIM12 + if (mask & 1<<11) __HAL_RCC_TIM12_CLK_ENABLE(); + #endif + #ifdef TIM13 + if (mask & 1<<12) __HAL_RCC_TIM13_CLK_ENABLE(); + #endif + #ifdef TIM14 + if (mask & 1<<13) __HAL_RCC_TIM14_CLK_ENABLE(); + #endif +} + +STATIC void tim_clock_disable(uint16_t mask) { + #ifdef TIM1 + if (mask & 1<<0) __HAL_RCC_TIM1_CLK_DISABLE(); + #endif + #ifdef TIM2 + if (mask & 1<<1) __HAL_RCC_TIM2_CLK_DISABLE(); + #endif + #ifdef TIM3 + if (mask & 1<<2) __HAL_RCC_TIM3_CLK_DISABLE(); + #endif + #ifdef TIM4 + if (mask & 1<<3) __HAL_RCC_TIM4_CLK_DISABLE(); + #endif + #ifdef TIM5 + if (mask & 1<<4) __HAL_RCC_TIM5_CLK_DISABLE(); + #endif + //6 and 7 are reserved ADC timers + #ifdef TIM8 + if (mask & 1<<7) __HAL_RCC_TIM8_CLK_DISABLE(); + #endif + #ifdef TIM9 + if (mask & 1<<8) __HAL_RCC_TIM9_CLK_DISABLE(); + #endif + #ifdef TIM10 + if (mask & 1<<9) __HAL_RCC_TIM10_CLK_DISABLE(); + #endif + #ifdef TIM11 + if (mask & 1<<10) __HAL_RCC_TIM11_CLK_DISABLE(); + #endif + #ifdef TIM12 + if (mask & 1<<11) __HAL_RCC_TIM12_CLK_DISABLE(); + #endif + #ifdef TIM13 + if (mask & 1<<12) __HAL_RCC_TIM13_CLK_DISABLE(); + #endif + #ifdef TIM14 + if (mask & 1<<13) __HAL_RCC_TIM14_CLK_DISABLE(); + #endif +} diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.h b/ports/stm32f4/common-hal/pulseio/PWMOut.h new file mode 100644 index 0000000000..59fc04e5ff --- /dev/null +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PWMOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + TIM_HandleTypeDef handle; + TIM_OC_InitTypeDef chan_handle; + const mcu_tim_pin_obj_t *tim; + uint8_t channel: 7; + bool variable_frequency: 1; + uint16_t duty_cycle; + uint32_t frequency; + uint32_t period; +} pulseio_pwmout_obj_t; + +void pwmout_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/stm32f4/common-hal/pulseio/PulseIn.c b/ports/stm32f4/common-hal/pulseio/PulseIn.c new file mode 100644 index 0000000000..068936bdd0 --- /dev/null +++ b/ports/stm32f4/common-hal/pulseio/PulseIn.c @@ -0,0 +1,79 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseIn.h" +#include +#include +#include "py/mpconfig.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/pulseio/PulseIn.h" +#include "tick.h" + +void pulsein_reset(void) { +} + +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu_pin_obj_t* pin, + uint16_t maxlen, bool idle_state) { + mp_raise_NotImplementedError(translate("PulseIn not yet supported")); +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { + return true; +} + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { +} + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, uint16_t trigger_duration) { +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, int16_t index) { + return 0; +} + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { + return 0; +} + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { + return 0; +} diff --git a/ports/esp8266/common-hal/pulseio/PulseIn.h b/ports/stm32f4/common-hal/pulseio/PulseIn.h similarity index 79% rename from ports/esp8266/common-hal/pulseio/PulseIn.h rename to ports/stm32f4/common-hal/pulseio/PulseIn.h index 6319280e8a..2538b07ab5 100644 --- a/ports/esp8266/common-hal/pulseio/PulseIn.h +++ b/ports/stm32f4/common-hal/pulseio/PulseIn.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,27 +24,30 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEIN_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEIN_H +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" #include "py/obj.h" -#include "common-hal/microcontroller/Pin.h" typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t *pin; - uint16_t *buffer; - uint16_t maxlen; + + uint8_t pin; bool idle_state; bool paused; + volatile bool first_edge; + + uint16_t* buffer; + uint16_t maxlen; + volatile uint16_t start; volatile uint16_t len; - volatile bool first_edge; - volatile uint32_t last_us; + volatile uint16_t last_us; + volatile uint64_t last_ms; } pulseio_pulsein_obj_t; void pulsein_reset(void); -void pulsein_interrupt_handler(uint32_t); - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEIN_H +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/esp8266/common-hal/pulseio/PulseOut.c b/ports/stm32f4/common-hal/pulseio/PulseOut.c similarity index 66% rename from ports/esp8266/common-hal/pulseio/PulseOut.c rename to ports/stm32f4/common-hal/pulseio/PulseOut.c index c5e63013d7..d393afc5c6 100644 --- a/ports/esp8266/common-hal/pulseio/PulseOut.c +++ b/ports/stm32f4/common-hal/pulseio/PulseOut.c @@ -1,9 +1,9 @@ /* - * This file is part of the Micro Python project, http://micropython.org/ + * This file is part of the MicroPython project, http://micropython.org/ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -28,37 +28,28 @@ #include -#include - -#include "ets_alt_task.h" -#include "py/obj.h" +#include "py/mpconfig.h" +#include "py/gc.h" #include "py/runtime.h" -#include "mpconfigport.h" #include "shared-bindings/pulseio/PulseOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "supervisor/shared/translate.h" -void pulseout_set(pulseio_pulseout_obj_t *self, bool state) { - PIN_FUNC_SELECT(self->pin->peripheral, state ? self->pin->gpio_function : 0); + +void pulseout_reset() { } void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, - const pulseio_pwmout_obj_t* carrier) { - self->pin = carrier->pin; + const pulseio_pwmout_obj_t* carrier) { + mp_raise_NotImplementedError(translate("PulseOut not yet supported")); } bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { - return self->pin == NULL; + return true; } void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { - self->pin = NULL; - pulseout_set(self, true); } -void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, - uint16_t* pulses, uint16_t length) { - for (uint16_t i = 0; i $(GEN_PINS_SRC) - -$(BUILD)/pins_gen.o: $(BUILD)/pins_gen.c - $(call compile_c) - -$(BUILD)/%.pp: $(BUILD)/%.c - $(ECHO) "PreProcess $<" - $(Q)$(CC) $(CFLAGS) -E -Wp,-C,-dD,-dI -o $@ $< - -include $(TOP)/py/mkrules.mk diff --git a/ports/teensy/README.md b/ports/teensy/README.md deleted file mode 100644 index c586853b52..0000000000 --- a/ports/teensy/README.md +++ /dev/null @@ -1,72 +0,0 @@ -# Build Instructions for Teensy 3.1 - -Currently the Teensy 3.1 port of MicroPython builds under Linux and not under Windows. - -The tool chain required for the build can be found at . - -Download the current Linux *.tar.bz2 file. Instructions regarding unpacking the file and moving it to the correct location -as well as adding the extracted folders to the enviroment variable can be found at - - -In order to download the firmware image to the teensy, you'll need to use the -downloader included with TeensyDuino. The following assumes that you have -TeensyDuino installed and set the ARDUINO environment variable pointing to the -where Arduino with TeensyDuino is installed. - -```bash -cd teensy -ARDUINO=~/arduino-1.0.5 make -``` - -To upload MicroPython to the Teensy 3.1. - -Press the Program button on the Teensy 3.1 -```bash -sudo ARDUINO=~/arduino-1.0.5/ make deploy -``` - -Currently, the Python prompt is through the USB serial interface, i.e. - -```bash -minicom -D /dev/ttyACM0 -``` - -## TIPS - -### Install 49-teensy.rules into /etc/udev/rules.d -If you install the 49-teensy.rules file from http://www.pjrc.com/teensy/49-teensy.rules -into your ```/etc/udev/rules.d``` folder then you won't need to use sudo: -```bash -sudo cp ~/Downloads/49-teensy.rules /etc/udev/rules.d -sudo udevadm control --reload-rules -``` -Unplug and replug the teensy board, and then you can use: ```ARDUINO=~/arduino-1.0.5/ make deploy``` - -### Create a GNUmakefile to hold your ARDUINO setting. -Create a file call GNUmakefile (note the lowercase m) in the teensy folder -with the following contents: -```make -$(info Executing GNUmakefile) - -ARDUINO=${HOME}/arduino-1.0.5 -$(info ARDUINO=${ARDUINO}) - -include Makefile -``` -GNUmakefile is not checked into the source code control system, so it will -retain your settings when updating your source tree. You can also add -additional Makefile customizations this way. - -### Tips for OSX - -Set the ARDUINO environment variable to the location where Arduino with TeensyDuino is installed. -```bash -export ARDUINO=~/Downloads/Arduino.app/Contents/Java/ -``` - -Search /dev/ for USB port name, which will be cu.usbmodem followed by a few numbers. The name of the port maybe different depending on the version of OSX. -To access the Python prompt type: - -```bash -screen 115200 -``` diff --git a/ports/teensy/add-memzip.sh b/ports/teensy/add-memzip.sh deleted file mode 100755 index a00489effd..0000000000 --- a/ports/teensy/add-memzip.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/bash - -if [ "$#" != 3 ]; then - echo "Usage: add-memzip.sh input.hex output.hex file-directory" - exit 1 -fi - -#set -x - -input_hex=$1 -output_hex=$2 -memzip_src_dir=$3 - -input_bin=${input_hex}.bin -output_bin=${output_hex}.bin -zip_file=${output_hex}.zip -zip_base=$(basename ${zip_file}) -zip_dir=$(dirname ${zip_file}) -abs_zip_dir=$(realpath ${zip_dir}) - -rm -f ${zip_file} -(cd ${memzip_src_dir}; zip -0 -r -D ${abs_zip_dir}/${zip_base} .) -objcopy -I ihex -O binary ${input_hex} ${input_bin} -cat ${input_bin} ${zip_file} > ${output_bin} -objcopy -I binary -O ihex ${output_bin} ${output_hex} -echo "Added ${memzip_src_dir} to ${input_hex} creating ${output_hex}" - diff --git a/ports/teensy/core/Arduino.h b/ports/teensy/core/Arduino.h deleted file mode 100644 index 1b053f0507..0000000000 --- a/ports/teensy/core/Arduino.h +++ /dev/null @@ -1,3 +0,0 @@ -//#include "WProgram.h" -#include "core_pins.h" -#include "pins_arduino.h" diff --git a/ports/teensy/core/HardwareSerial.h b/ports/teensy/core/HardwareSerial.h deleted file mode 100644 index 439e0f7364..0000000000 --- a/ports/teensy/core/HardwareSerial.h +++ /dev/null @@ -1,227 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef HardwareSerial_h -#define HardwareSerial_h - -#include "mk20dx128.h" -#include - -// uncomment to enable 9 bit formats -//#define SERIAL_9BIT_SUPPORT - - -#define SERIAL_7E1 0x02 -#define SERIAL_7O1 0x03 -#define SERIAL_8N1 0x00 -#define SERIAL_8N2 0x04 -#define SERIAL_8E1 0x06 -#define SERIAL_8O1 0x07 -#define SERIAL_7E1_RXINV 0x12 -#define SERIAL_7O1_RXINV 0x13 -#define SERIAL_8N1_RXINV 0x10 -#define SERIAL_8N2_RXINV 0x14 -#define SERIAL_8E1_RXINV 0x16 -#define SERIAL_8O1_RXINV 0x17 -#define SERIAL_7E1_TXINV 0x22 -#define SERIAL_7O1_TXINV 0x23 -#define SERIAL_8N1_TXINV 0x20 -#define SERIAL_8N2_TXINV 0x24 -#define SERIAL_8E1_TXINV 0x26 -#define SERIAL_8O1_TXINV 0x27 -#define SERIAL_7E1_RXINV_TXINV 0x32 -#define SERIAL_7O1_RXINV_TXINV 0x33 -#define SERIAL_8N1_RXINV_TXINV 0x30 -#define SERIAL_8N2_RXINV_TXINV 0x34 -#define SERIAL_8E1_RXINV_TXINV 0x36 -#define SERIAL_8O1_RXINV_TXINV 0x37 -#ifdef SERIAL_9BIT_SUPPORT -#define SERIAL_9N1 0x84 -#define SERIAL_9E1 0x8E -#define SERIAL_9O1 0x8F -#define SERIAL_9N1_RXINV 0x94 -#define SERIAL_9E1_RXINV 0x9E -#define SERIAL_9O1_RXINV 0x9F -#define SERIAL_9N1_TXINV 0xA4 -#define SERIAL_9E1_TXINV 0xAE -#define SERIAL_9O1_TXINV 0xAF -#define SERIAL_9N1_RXINV_TXINV 0xB4 -#define SERIAL_9E1_RXINV_TXINV 0xBE -#define SERIAL_9O1_RXINV_TXINV 0xBF -#endif -// bit0: parity, 0=even, 1=odd -// bit1: parity, 0=disable, 1=enable -// bit2: mode, 1=9bit, 0=8bit -// bit3: mode10: 1=10bit, 0=8bit -// bit4: rxinv, 0=normal, 1=inverted -// bit5: txinv, 0=normal, 1=inverted -// bit6: unused -// bit7: actual data goes into 9th bit - - -#define BAUD2DIV(baud) (((F_CPU * 2) + ((baud) >> 1)) / (baud)) -#define BAUD2DIV3(baud) (((F_BUS * 2) + ((baud) >> 1)) / (baud)) - -// C language implementation -// -#ifdef __cplusplus -extern "C" { -#endif -void serial_begin(uint32_t divisor); -void serial_format(uint32_t format); -void serial_end(void); -void serial_set_transmit_pin(uint8_t pin); -void serial_putchar(uint32_t c); -void serial_write(const void *buf, unsigned int count); -void serial_flush(void); -int serial_available(void); -int serial_getchar(void); -int serial_peek(void); -void serial_clear(void); -void serial_print(const char *p); -void serial_phex(uint32_t n); -void serial_phex16(uint32_t n); -void serial_phex32(uint32_t n); - -void serial2_begin(uint32_t divisor); -void serial2_format(uint32_t format); -void serial2_end(void); -void serial2_putchar(uint32_t c); -void serial2_write(const void *buf, unsigned int count); -void serial2_flush(void); -int serial2_available(void); -int serial2_getchar(void); -int serial2_peek(void); -void serial2_clear(void); - -void serial3_begin(uint32_t divisor); -void serial3_format(uint32_t format); -void serial3_end(void); -void serial3_putchar(uint32_t c); -void serial3_write(const void *buf, unsigned int count); -void serial3_flush(void); -int serial3_available(void); -int serial3_getchar(void); -int serial3_peek(void); -void serial3_clear(void); - -#ifdef __cplusplus -} -#endif - - -// C++ interface -// -#ifdef __cplusplus -#include "Stream.h" -class HardwareSerial : public Stream -{ -public: - virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); } - virtual void begin(uint32_t baud, uint32_t format) { - serial_begin(BAUD2DIV(baud)); - serial_format(format); } - virtual void end(void) { serial_end(); } - virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); } - virtual int available(void) { return serial_available(); } - virtual int peek(void) { return serial_peek(); } - virtual int read(void) { return serial_getchar(); } - virtual void flush(void) { serial_flush(); } - virtual void clear(void) { serial_clear(); } - virtual size_t write(uint8_t c) { serial_putchar(c); return 1; } - virtual size_t write(unsigned long n) { return write((uint8_t)n); } - virtual size_t write(long n) { return write((uint8_t)n); } - virtual size_t write(unsigned int n) { return write((uint8_t)n); } - virtual size_t write(int n) { return write((uint8_t)n); } - virtual size_t write(const uint8_t *buffer, size_t size) - { serial_write(buffer, size); return size; } - virtual size_t write(const char *str) { size_t len = strlen(str); - serial_write((const uint8_t *)str, len); - return len; } - virtual size_t write9bit(uint32_t c) { serial_putchar(c); return 1; } -}; -extern HardwareSerial Serial1; - -class HardwareSerial2 : public HardwareSerial -{ -public: - virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV(baud)); } - virtual void begin(uint32_t baud, uint32_t format) { - serial2_begin(BAUD2DIV(baud)); - serial2_format(format); } - virtual void end(void) { serial2_end(); } - virtual int available(void) { return serial2_available(); } - virtual int peek(void) { return serial2_peek(); } - virtual int read(void) { return serial2_getchar(); } - virtual void flush(void) { serial2_flush(); } - virtual void clear(void) { serial2_clear(); } - virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; } - virtual size_t write(unsigned long n) { return write((uint8_t)n); } - virtual size_t write(long n) { return write((uint8_t)n); } - virtual size_t write(unsigned int n) { return write((uint8_t)n); } - virtual size_t write(int n) { return write((uint8_t)n); } - virtual size_t write(const uint8_t *buffer, size_t size) - { serial2_write(buffer, size); return size; } - virtual size_t write(const char *str) { size_t len = strlen(str); - serial2_write((const uint8_t *)str, len); - return len; } - virtual size_t write9bit(uint32_t c) { serial2_putchar(c); return 1; } -}; -extern HardwareSerial2 Serial2; - -class HardwareSerial3 : public HardwareSerial -{ -public: - virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); } - virtual void begin(uint32_t baud, uint32_t format) { - serial3_begin(BAUD2DIV3(baud)); - serial3_format(format); } - virtual void end(void) { serial3_end(); } - virtual int available(void) { return serial3_available(); } - virtual int peek(void) { return serial3_peek(); } - virtual int read(void) { return serial3_getchar(); } - virtual void flush(void) { serial3_flush(); } - virtual void clear(void) { serial3_clear(); } - virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; } - virtual size_t write(unsigned long n) { return write((uint8_t)n); } - virtual size_t write(long n) { return write((uint8_t)n); } - virtual size_t write(unsigned int n) { return write((uint8_t)n); } - virtual size_t write(int n) { return write((uint8_t)n); } - virtual size_t write(const uint8_t *buffer, size_t size) - { serial3_write(buffer, size); return size; } - virtual size_t write(const char *str) { size_t len = strlen(str); - serial3_write((const uint8_t *)str, len); - return len; } - virtual size_t write9bit(uint32_t c) { serial3_putchar(c); return 1; } -}; -extern HardwareSerial3 Serial3; - -#endif -#endif diff --git a/ports/teensy/core/analog.c b/ports/teensy/core/analog.c deleted file mode 100644 index f408ec9f12..0000000000 --- a/ports/teensy/core/analog.c +++ /dev/null @@ -1,463 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "core_pins.h" -//#include "HardwareSerial.h" - -static uint8_t calibrating; -static uint8_t analog_right_shift = 0; -static uint8_t analog_config_bits = 10; -static uint8_t analog_num_average = 4; -static uint8_t analog_reference_internal = 0; - -// the alternate clock is connected to OSCERCLK (16 MHz). -// datasheet says ADC clock should be 2 to 12 MHz for 16 bit mode -// datasheet says ADC clock should be 1 to 18 MHz for 8-12 bit mode - -#if F_BUS == 60000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7.5 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz -#elif F_BUS == 56000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz -#elif F_BUS == 48000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 24 MHz -#elif F_BUS == 40000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 20 MHz -#elif F_BUS == 36000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 9 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz -#elif F_BUS == 24000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 24 MHz -#elif F_BUS == 16000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 16 MHz -#elif F_BUS == 8000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz -#elif F_BUS == 4000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz -#elif F_BUS == 2000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz -#else -#error "F_BUS must be 60, 56, 48, 40, 36, 24, 4 or 2 MHz" -#endif - -void analog_init(void) -{ - uint32_t num; - - VREF_TRM = 0x60; - VREF_SC = 0xE1; // enable 1.2 volt ref - - if (analog_config_bits == 8) { - ADC0_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0); - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0); - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #endif - } else if (analog_config_bits == 10) { - ADC0_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP; - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP; - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #endif - } else if (analog_config_bits == 12) { - ADC0_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP; - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP; - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #endif - } else { - ADC0_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP; - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP; - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #endif - } - - if (analog_reference_internal) { - ADC0_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref - #if defined(__MK20DX256__) - ADC1_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref - #endif - } else { - ADC0_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref - #if defined(__MK20DX256__) - ADC1_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref - #endif - } - - num = analog_num_average; - if (num <= 1) { - ADC0_SC3 = ADC_SC3_CAL; // begin cal - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL; // begin cal - #endif - } else if (num <= 4) { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0); - #endif - } else if (num <= 8) { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1); - #endif - } else if (num <= 16) { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2); - #endif - } else { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3); - #endif - } - calibrating = 1; -} - -static void wait_for_cal(void) -{ - uint16_t sum; - - //serial_print("wait_for_cal\n"); -#if defined(__MK20DX128__) - while (ADC0_SC3 & ADC_SC3_CAL) { - // wait - } -#elif defined(__MK20DX256__) - while ((ADC0_SC3 & ADC_SC3_CAL) || (ADC1_SC3 & ADC_SC3_CAL)) { - // wait - } -#endif - __disable_irq(); - if (calibrating) { - //serial_print("\n"); - sum = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 + ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0; - sum = (sum / 2) | 0x8000; - ADC0_PG = sum; - //serial_print("ADC0_PG = "); - //serial_phex16(sum); - //serial_print("\n"); - sum = ADC0_CLMS + ADC0_CLM4 + ADC0_CLM3 + ADC0_CLM2 + ADC0_CLM1 + ADC0_CLM0; - sum = (sum / 2) | 0x8000; - ADC0_MG = sum; - //serial_print("ADC0_MG = "); - //serial_phex16(sum); - //serial_print("\n"); -#if defined(__MK20DX256__) - sum = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0; - sum = (sum / 2) | 0x8000; - ADC1_PG = sum; - sum = ADC1_CLMS + ADC1_CLM4 + ADC1_CLM3 + ADC1_CLM2 + ADC1_CLM1 + ADC1_CLM0; - sum = (sum / 2) | 0x8000; - ADC1_MG = sum; -#endif - calibrating = 0; - } - __enable_irq(); -} - -// ADCx_SC2[REFSEL] bit selects the voltage reference sources for ADC. -// VREFH/VREFL - connected as the primary reference option -// 1.2 V VREF_OUT - connected as the VALT reference option - - -#define DEFAULT 0 -#define INTERNAL 2 -#define INTERNAL1V2 2 -#define INTERNAL1V1 2 -#define EXTERNAL 0 - -void analogReference(uint8_t type) -{ - if (type) { - // internal reference requested - if (!analog_reference_internal) { - analog_reference_internal = 1; - if (calibrating) { - ADC0_SC3 = 0; // cancel cal -#if defined(__MK20DX256__) - ADC1_SC3 = 0; // cancel cal -#endif - } - analog_init(); - } - } else { - // vcc or external reference requested - if (analog_reference_internal) { - analog_reference_internal = 0; - if (calibrating) { - ADC0_SC3 = 0; // cancel cal -#if defined(__MK20DX256__) - ADC1_SC3 = 0; // cancel cal -#endif - } - analog_init(); - } - } -} - - -void analogReadRes(unsigned int bits) -{ - unsigned int config; - - if (bits >= 13) { - if (bits > 16) bits = 16; - config = 16; - } else if (bits >= 11) { - config = 12; - } else if (bits >= 9) { - config = 10; - } else { - config = 8; - } - analog_right_shift = config - bits; - if (config != analog_config_bits) { - analog_config_bits = config; - if (calibrating) ADC0_SC3 = 0; // cancel cal - analog_init(); - } -} - -void analogReadAveraging(unsigned int num) -{ - - if (calibrating) wait_for_cal(); - if (num <= 1) { - num = 0; - ADC0_SC3 = 0; - } else if (num <= 4) { - num = 4; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(0); - } else if (num <= 8) { - num = 8; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(1); - } else if (num <= 16) { - num = 16; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(2); - } else { - num = 32; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(3); - } - analog_num_average = num; -} - -// The SC1A register is used for both software and hardware trigger modes of operation. - -#if defined(__MK20DX128__) -static const uint8_t channel2sc1a[] = { - 5, 14, 8, 9, 13, 12, 6, 7, 15, 4, - 0, 19, 3, 21, 26, 22, 23 -}; -#elif defined(__MK20DX256__) -static const uint8_t channel2sc1a[] = { - 5, 14, 8, 9, 13, 12, 6, 7, 15, 4, - 0, 19, 3, 19+128, 26, 18+128, 23, - 5+192, 5+128, 4+128, 6+128, 7+128, 4+192 -// A15 26 E1 ADC1_SE5a 5+64 -// A16 27 C9 ADC1_SE5b 5 -// A17 28 C8 ADC1_SE4b 4 -// A18 29 C10 ADC1_SE6b 6 -// A19 30 C11 ADC1_SE7b 7 -// A20 31 E0 ADC1_SE4a 4+64 -}; -#endif - - - -// TODO: perhaps this should store the NVIC priority, so it works recursively? -static volatile uint8_t analogReadBusyADC0 = 0; -#if defined(__MK20DX256__) -static volatile uint8_t analogReadBusyADC1 = 0; -#endif - -int analogRead(uint8_t pin) -{ - int result; - uint8_t index, channel; - - //serial_phex(pin); - //serial_print(" "); - - if (pin <= 13) { - index = pin; // 0-13 refer to A0-A13 - } else if (pin <= 23) { - index = pin - 14; // 14-23 are A0-A9 -#if defined(__MK20DX256__) - } else if (pin >= 26 && pin <= 31) { - index = pin - 9; // 26-31 are A15-A20 -#endif - } else if (pin >= 34 && pin <= 40) { - index = pin - 24; // 34-37 are A10-A13, 38 is temp sensor, - // 39 is vref, 40 is unused (A14 on Teensy 3.1) - } else { - return 0; // all others are invalid - } - - //serial_phex(index); - //serial_print(" "); - - channel = channel2sc1a[index]; - //serial_phex(channel); - //serial_print(" "); - - //serial_print("analogRead"); - //return 0; - if (calibrating) wait_for_cal(); - //pin = 5; // PTD1/SE5b, pin 14, analog 0 - -#if defined(__MK20DX256__) - if (channel & 0x80) goto beginADC1; -#endif - - __disable_irq(); -startADC0: - //serial_print("startADC0\n"); - ADC0_SC1A = channel; - analogReadBusyADC0 = 1; - __enable_irq(); - while (1) { - __disable_irq(); - if ((ADC0_SC1A & ADC_SC1_COCO)) { - result = ADC0_RA; - analogReadBusyADC0 = 0; - __enable_irq(); - result >>= analog_right_shift; - return result; - } - // detect if analogRead was used from an interrupt - // if so, our analogRead got canceled, so it must - // be restarted. - if (!analogReadBusyADC0) goto startADC0; - __enable_irq(); - yield(); - } - -#if defined(__MK20DX256__) -beginADC1: - __disable_irq(); -startADC1: - //serial_print("startADC0\n"); - // ADC1_CFG2[MUXSEL] bit selects between ADCx_SEn channels a and b. - if (channel & 0x40) { - ADC1_CFG2 &= ~ADC_CFG2_MUXSEL; - } else { - ADC1_CFG2 |= ADC_CFG2_MUXSEL; - } - ADC1_SC1A = channel & 0x3F; - analogReadBusyADC1 = 1; - __enable_irq(); - while (1) { - __disable_irq(); - if ((ADC1_SC1A & ADC_SC1_COCO)) { - result = ADC1_RA; - analogReadBusyADC1 = 0; - __enable_irq(); - result >>= analog_right_shift; - return result; - } - // detect if analogRead was used from an interrupt - // if so, our analogRead got canceled, so it must - // be restarted. - if (!analogReadBusyADC1) goto startADC1; - __enable_irq(); - yield(); - } -#endif -} - - - -void analogWriteDAC0(int val) -{ -#if defined(__MK20DX256__) - SIM_SCGC2 |= SIM_SCGC2_DAC0; - if (analog_reference_internal) { - DAC0_C0 = DAC_C0_DACEN; // 1.2V ref is DACREF_1 - } else { - DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2 - } - if (val < 0) val = 0; // TODO: saturate instruction? - else if (val > 4095) val = 4095; - *(int16_t *)&(DAC0_DAT0L) = val; -#endif -} - - - - - - - - - - - - - - - - - - - diff --git a/ports/teensy/core/avr_functions.h b/ports/teensy/core/avr_functions.h deleted file mode 100644 index fe99f26f3e..0000000000 --- a/ports/teensy/core/avr_functions.h +++ /dev/null @@ -1,107 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _avr_functions_h_ -#define _avr_functions_h_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -void eeprom_initialize(void); -uint8_t eeprom_read_byte(const uint8_t *addr) __attribute__ ((pure)); -uint16_t eeprom_read_word(const uint16_t *addr) __attribute__ ((pure)); -uint32_t eeprom_read_dword(const uint32_t *addr) __attribute__ ((pure)); -void eeprom_read_block(void *buf, const void *addr, uint32_t len); -void eeprom_write_byte(uint8_t *addr, uint8_t value); -void eeprom_write_word(uint16_t *addr, uint16_t value); -void eeprom_write_dword(uint32_t *addr, uint32_t value); -void eeprom_write_block(const void *buf, void *addr, uint32_t len); -int eeprom_is_ready(void); -#define eeprom_busy_wait() do {} while (!eeprom_is_ready()) - -static inline float eeprom_read_float(const float *addr) __attribute__((pure, always_inline, unused)); -static inline float eeprom_read_float(const float *addr) -{ - union {float f; uint32_t u32;} u; - u.u32 = eeprom_read_dword((const uint32_t *)addr); - return u.f; -} -static inline void eeprom_write_float(float *addr, float value) __attribute__((always_inline, unused)); -static inline void eeprom_write_float(float *addr, float value) -{ - union {float f; uint32_t u32;} u; - u.f = value; - eeprom_write_dword((uint32_t *)addr, u.u32); -} -static inline void eeprom_update_byte(uint8_t *addr, uint8_t value) __attribute__((always_inline, unused)); -static inline void eeprom_update_byte(uint8_t *addr, uint8_t value) -{ - eeprom_write_byte(addr, value); -} -static inline void eeprom_update_word(uint16_t *addr, uint16_t value) __attribute__((always_inline, unused)); -static inline void eeprom_update_word(uint16_t *addr, uint16_t value) -{ - eeprom_write_word(addr, value); -} -static inline void eeprom_update_dword(uint32_t *addr, uint32_t value) __attribute__((always_inline, unused)); -static inline void eeprom_update_dword(uint32_t *addr, uint32_t value) -{ - eeprom_write_dword(addr, value); -} -static inline void eeprom_update_float(float *addr, float value) __attribute__((always_inline, unused)); -static inline void eeprom_update_float(float *addr, float value) -{ - union {float f; uint32_t u32;} u; - u.f = value; - eeprom_write_dword((uint32_t *)addr, u.u32); -} -static inline void eeprom_update_block(const void *buf, void *addr, uint32_t len) __attribute__((always_inline, unused)); -static inline void eeprom_update_block(const void *buf, void *addr, uint32_t len) -{ - eeprom_write_block(buf, addr, len); -} - - -char * ultoa(unsigned long val, char *buf, int radix); -char * ltoa(long val, char *buf, int radix); -static inline char * utoa(unsigned int val, char *buf, int radix) __attribute__((always_inline, unused)); -static inline char * utoa(unsigned int val, char *buf, int radix) { return ultoa(val, buf, radix); } -static inline char * itoa(int val, char *buf, int radix) __attribute__((always_inline, unused)); -static inline char * itoa(int val, char *buf, int radix) { return ltoa(val, buf, radix); } -char * dtostrf(float val, int width, unsigned int precision, char *buf); - - -#ifdef __cplusplus -} -#endif -#endif diff --git a/ports/teensy/core/core_pins.h b/ports/teensy/core/core_pins.h deleted file mode 100644 index 169bf3c160..0000000000 --- a/ports/teensy/core/core_pins.h +++ /dev/null @@ -1,841 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _core_pins_h_ -#define _core_pins_h_ - -#include "mk20dx128.h" -#include "pins_arduino.h" - - -#define HIGH 1 -#define LOW 0 -#define INPUT 0 -#define OUTPUT 1 -#define INPUT_PULLUP 2 -#define LSBFIRST 0 -#define MSBFIRST 1 -#define _BV(n) (1<<(n)) -#define CHANGE 4 -#define FALLING 2 -#define RISING 3 - -// Pin Arduino -// 0 B16 RXD -// 1 B17 TXD -// 2 D0 -// 3 A12 FTM1_CH0 -// 4 A13 FTM1_CH1 -// 5 D7 FTM0_CH7 OC0B/T1 -// 6 D4 FTM0_CH4 OC0A -// 7 D2 -// 8 D3 ICP1 -// 9 C3 FTM0_CH2 OC1A -// 10 C4 FTM0_CH3 SS/OC1B -// 11 C6 MOSI/OC2A -// 12 C7 MISO -// 13 C5 SCK -// 14 D1 -// 15 C0 -// 16 B0 (FTM1_CH0) -// 17 B1 (FTM1_CH1) -// 18 B3 SDA -// 19 B2 SCL -// 20 D5 FTM0_CH5 -// 21 D6 FTM0_CH6 -// 22 C1 FTM0_CH0 -// 23 C2 FTM0_CH1 -// 24 A5 (FTM0_CH2) -// 25 B19 -// 26 E1 -// 27 C9 -// 28 C8 -// 29 C10 -// 30 C11 -// 31 E0 -// 32 B18 -// 33 A4 (FTM0_CH1) -// (34) analog only -// (35) analog only -// (36) analog only -// (37) analog only - -// not available to user: -// A0 FTM0_CH5 SWD Clock -// A1 FTM0_CH6 USB ID -// A2 FTM0_CH7 SWD Trace -// A3 FTM0_CH0 SWD Data - -#define CORE_NUM_TOTAL_PINS 34 -#define CORE_NUM_DIGITAL 34 -#define CORE_NUM_INTERRUPT 34 -#if defined(__MK20DX128__) -#define CORE_NUM_ANALOG 14 -#define CORE_NUM_PWM 10 -#elif defined(__MK20DX256__) -#define CORE_NUM_ANALOG 21 -#define CORE_NUM_PWM 12 -#endif - -#define CORE_PIN0_BIT 16 -#define CORE_PIN1_BIT 17 -#define CORE_PIN2_BIT 0 -#define CORE_PIN3_BIT 12 -#define CORE_PIN4_BIT 13 -#define CORE_PIN5_BIT 7 -#define CORE_PIN6_BIT 4 -#define CORE_PIN7_BIT 2 -#define CORE_PIN8_BIT 3 -#define CORE_PIN9_BIT 3 -#define CORE_PIN10_BIT 4 -#define CORE_PIN11_BIT 6 -#define CORE_PIN12_BIT 7 -#define CORE_PIN13_BIT 5 -#define CORE_PIN14_BIT 1 -#define CORE_PIN15_BIT 0 -#define CORE_PIN16_BIT 0 -#define CORE_PIN17_BIT 1 -#define CORE_PIN18_BIT 3 -#define CORE_PIN19_BIT 2 -#define CORE_PIN20_BIT 5 -#define CORE_PIN21_BIT 6 -#define CORE_PIN22_BIT 1 -#define CORE_PIN23_BIT 2 -#define CORE_PIN24_BIT 5 -#define CORE_PIN25_BIT 19 -#define CORE_PIN26_BIT 1 -#define CORE_PIN27_BIT 9 -#define CORE_PIN28_BIT 8 -#define CORE_PIN29_BIT 10 -#define CORE_PIN30_BIT 11 -#define CORE_PIN31_BIT 0 -#define CORE_PIN32_BIT 18 -#define CORE_PIN33_BIT 4 - -#define CORE_PIN0_BITMASK (1<<(CORE_PIN0_BIT)) -#define CORE_PIN1_BITMASK (1<<(CORE_PIN1_BIT)) -#define CORE_PIN2_BITMASK (1<<(CORE_PIN2_BIT)) -#define CORE_PIN3_BITMASK (1<<(CORE_PIN3_BIT)) -#define CORE_PIN4_BITMASK (1<<(CORE_PIN4_BIT)) -#define CORE_PIN5_BITMASK (1<<(CORE_PIN5_BIT)) -#define CORE_PIN6_BITMASK (1<<(CORE_PIN6_BIT)) -#define CORE_PIN7_BITMASK (1<<(CORE_PIN7_BIT)) -#define CORE_PIN8_BITMASK (1<<(CORE_PIN8_BIT)) -#define CORE_PIN9_BITMASK (1<<(CORE_PIN9_BIT)) -#define CORE_PIN10_BITMASK (1<<(CORE_PIN10_BIT)) -#define CORE_PIN11_BITMASK (1<<(CORE_PIN11_BIT)) -#define CORE_PIN12_BITMASK (1<<(CORE_PIN12_BIT)) -#define CORE_PIN13_BITMASK (1<<(CORE_PIN13_BIT)) -#define CORE_PIN14_BITMASK (1<<(CORE_PIN14_BIT)) -#define CORE_PIN15_BITMASK (1<<(CORE_PIN15_BIT)) -#define CORE_PIN16_BITMASK (1<<(CORE_PIN16_BIT)) -#define CORE_PIN17_BITMASK (1<<(CORE_PIN17_BIT)) -#define CORE_PIN18_BITMASK (1<<(CORE_PIN18_BIT)) -#define CORE_PIN19_BITMASK (1<<(CORE_PIN19_BIT)) -#define CORE_PIN20_BITMASK (1<<(CORE_PIN20_BIT)) -#define CORE_PIN21_BITMASK (1<<(CORE_PIN21_BIT)) -#define CORE_PIN22_BITMASK (1<<(CORE_PIN22_BIT)) -#define CORE_PIN23_BITMASK (1<<(CORE_PIN23_BIT)) -#define CORE_PIN24_BITMASK (1<<(CORE_PIN24_BIT)) -#define CORE_PIN25_BITMASK (1<<(CORE_PIN25_BIT)) -#define CORE_PIN26_BITMASK (1<<(CORE_PIN26_BIT)) -#define CORE_PIN27_BITMASK (1<<(CORE_PIN27_BIT)) -#define CORE_PIN28_BITMASK (1<<(CORE_PIN28_BIT)) -#define CORE_PIN29_BITMASK (1<<(CORE_PIN29_BIT)) -#define CORE_PIN30_BITMASK (1<<(CORE_PIN30_BIT)) -#define CORE_PIN31_BITMASK (1<<(CORE_PIN31_BIT)) -#define CORE_PIN32_BITMASK (1<<(CORE_PIN32_BIT)) -#define CORE_PIN33_BITMASK (1<<(CORE_PIN33_BIT)) - -#define CORE_PIN0_PORTREG GPIOB_PDOR -#define CORE_PIN1_PORTREG GPIOB_PDOR -#define CORE_PIN2_PORTREG GPIOD_PDOR -#define CORE_PIN3_PORTREG GPIOA_PDOR -#define CORE_PIN4_PORTREG GPIOA_PDOR -#define CORE_PIN5_PORTREG GPIOD_PDOR -#define CORE_PIN6_PORTREG GPIOD_PDOR -#define CORE_PIN7_PORTREG GPIOD_PDOR -#define CORE_PIN8_PORTREG GPIOD_PDOR -#define CORE_PIN9_PORTREG GPIOC_PDOR -#define CORE_PIN10_PORTREG GPIOC_PDOR -#define CORE_PIN11_PORTREG GPIOC_PDOR -#define CORE_PIN12_PORTREG GPIOC_PDOR -#define CORE_PIN13_PORTREG GPIOC_PDOR -#define CORE_PIN14_PORTREG GPIOD_PDOR -#define CORE_PIN15_PORTREG GPIOC_PDOR -#define CORE_PIN16_PORTREG GPIOB_PDOR -#define CORE_PIN17_PORTREG GPIOB_PDOR -#define CORE_PIN18_PORTREG GPIOB_PDOR -#define CORE_PIN19_PORTREG GPIOB_PDOR -#define CORE_PIN20_PORTREG GPIOD_PDOR -#define CORE_PIN21_PORTREG GPIOD_PDOR -#define CORE_PIN22_PORTREG GPIOC_PDOR -#define CORE_PIN23_PORTREG GPIOC_PDOR -#define CORE_PIN24_PORTREG GPIOA_PDOR -#define CORE_PIN25_PORTREG GPIOB_PDOR -#define CORE_PIN26_PORTREG GPIOE_PDOR -#define CORE_PIN27_PORTREG GPIOC_PDOR -#define CORE_PIN28_PORTREG GPIOC_PDOR -#define CORE_PIN29_PORTREG GPIOC_PDOR -#define CORE_PIN30_PORTREG GPIOC_PDOR -#define CORE_PIN31_PORTREG GPIOE_PDOR -#define CORE_PIN32_PORTREG GPIOB_PDOR -#define CORE_PIN33_PORTREG GPIOA_PDOR - -#define CORE_PIN0_PORTSET GPIOB_PSOR -#define CORE_PIN1_PORTSET GPIOB_PSOR -#define CORE_PIN2_PORTSET GPIOD_PSOR -#define CORE_PIN3_PORTSET GPIOA_PSOR -#define CORE_PIN4_PORTSET GPIOA_PSOR -#define CORE_PIN5_PORTSET GPIOD_PSOR -#define CORE_PIN6_PORTSET GPIOD_PSOR -#define CORE_PIN7_PORTSET GPIOD_PSOR -#define CORE_PIN8_PORTSET GPIOD_PSOR -#define CORE_PIN9_PORTSET GPIOC_PSOR -#define CORE_PIN10_PORTSET GPIOC_PSOR -#define CORE_PIN11_PORTSET GPIOC_PSOR -#define CORE_PIN12_PORTSET GPIOC_PSOR -#define CORE_PIN13_PORTSET GPIOC_PSOR -#define CORE_PIN14_PORTSET GPIOD_PSOR -#define CORE_PIN15_PORTSET GPIOC_PSOR -#define CORE_PIN16_PORTSET GPIOB_PSOR -#define CORE_PIN17_PORTSET GPIOB_PSOR -#define CORE_PIN18_PORTSET GPIOB_PSOR -#define CORE_PIN19_PORTSET GPIOB_PSOR -#define CORE_PIN20_PORTSET GPIOD_PSOR -#define CORE_PIN21_PORTSET GPIOD_PSOR -#define CORE_PIN22_PORTSET GPIOC_PSOR -#define CORE_PIN23_PORTSET GPIOC_PSOR -#define CORE_PIN24_PORTSET GPIOA_PSOR -#define CORE_PIN25_PORTSET GPIOB_PSOR -#define CORE_PIN26_PORTSET GPIOE_PSOR -#define CORE_PIN27_PORTSET GPIOC_PSOR -#define CORE_PIN28_PORTSET GPIOC_PSOR -#define CORE_PIN29_PORTSET GPIOC_PSOR -#define CORE_PIN30_PORTSET GPIOC_PSOR -#define CORE_PIN31_PORTSET GPIOE_PSOR -#define CORE_PIN32_PORTSET GPIOB_PSOR -#define CORE_PIN33_PORTSET GPIOA_PSOR - -#define CORE_PIN0_PORTCLEAR GPIOB_PCOR -#define CORE_PIN1_PORTCLEAR GPIOB_PCOR -#define CORE_PIN2_PORTCLEAR GPIOD_PCOR -#define CORE_PIN3_PORTCLEAR GPIOA_PCOR -#define CORE_PIN4_PORTCLEAR GPIOA_PCOR -#define CORE_PIN5_PORTCLEAR GPIOD_PCOR -#define CORE_PIN6_PORTCLEAR GPIOD_PCOR -#define CORE_PIN7_PORTCLEAR GPIOD_PCOR -#define CORE_PIN8_PORTCLEAR GPIOD_PCOR -#define CORE_PIN9_PORTCLEAR GPIOC_PCOR -#define CORE_PIN10_PORTCLEAR GPIOC_PCOR -#define CORE_PIN11_PORTCLEAR GPIOC_PCOR -#define CORE_PIN12_PORTCLEAR GPIOC_PCOR -#define CORE_PIN13_PORTCLEAR GPIOC_PCOR -#define CORE_PIN14_PORTCLEAR GPIOD_PCOR -#define CORE_PIN15_PORTCLEAR GPIOC_PCOR -#define CORE_PIN16_PORTCLEAR GPIOB_PCOR -#define CORE_PIN17_PORTCLEAR GPIOB_PCOR -#define CORE_PIN18_PORTCLEAR GPIOB_PCOR -#define CORE_PIN19_PORTCLEAR GPIOB_PCOR -#define CORE_PIN20_PORTCLEAR GPIOD_PCOR -#define CORE_PIN21_PORTCLEAR GPIOD_PCOR -#define CORE_PIN22_PORTCLEAR GPIOC_PCOR -#define CORE_PIN23_PORTCLEAR GPIOC_PCOR -#define CORE_PIN24_PORTCLEAR GPIOA_PCOR -#define CORE_PIN25_PORTCLEAR GPIOB_PCOR -#define CORE_PIN26_PORTCLEAR GPIOE_PCOR -#define CORE_PIN27_PORTCLEAR GPIOC_PCOR -#define CORE_PIN28_PORTCLEAR GPIOC_PCOR -#define CORE_PIN29_PORTCLEAR GPIOC_PCOR -#define CORE_PIN30_PORTCLEAR GPIOC_PCOR -#define CORE_PIN31_PORTCLEAR GPIOE_PCOR -#define CORE_PIN32_PORTCLEAR GPIOB_PCOR -#define CORE_PIN33_PORTCLEAR GPIOA_PCOR - -#define CORE_PIN0_DDRREG GPIOB_PDDR -#define CORE_PIN1_DDRREG GPIOB_PDDR -#define CORE_PIN2_DDRREG GPIOD_PDDR -#define CORE_PIN3_DDRREG GPIOA_PDDR -#define CORE_PIN4_DDRREG GPIOA_PDDR -#define CORE_PIN5_DDRREG GPIOD_PDDR -#define CORE_PIN6_DDRREG GPIOD_PDDR -#define CORE_PIN7_DDRREG GPIOD_PDDR -#define CORE_PIN8_DDRREG GPIOD_PDDR -#define CORE_PIN9_DDRREG GPIOC_PDDR -#define CORE_PIN10_DDRREG GPIOC_PDDR -#define CORE_PIN11_DDRREG GPIOC_PDDR -#define CORE_PIN12_DDRREG GPIOC_PDDR -#define CORE_PIN13_DDRREG GPIOC_PDDR -#define CORE_PIN14_DDRREG GPIOD_PDDR -#define CORE_PIN15_DDRREG GPIOC_PDDR -#define CORE_PIN16_DDRREG GPIOB_PDDR -#define CORE_PIN17_DDRREG GPIOB_PDDR -#define CORE_PIN18_DDRREG GPIOB_PDDR -#define CORE_PIN19_DDRREG GPIOB_PDDR -#define CORE_PIN20_DDRREG GPIOD_PDDR -#define CORE_PIN21_DDRREG GPIOD_PDDR -#define CORE_PIN22_DDRREG GPIOC_PDDR -#define CORE_PIN23_DDRREG GPIOC_PDDR -#define CORE_PIN24_DDRREG GPIOA_PDDR -#define CORE_PIN25_DDRREG GPIOB_PDDR -#define CORE_PIN26_DDRREG GPIOE_PDDR -#define CORE_PIN27_DDRREG GPIOC_PDDR -#define CORE_PIN28_DDRREG GPIOC_PDDR -#define CORE_PIN29_DDRREG GPIOC_PDDR -#define CORE_PIN30_DDRREG GPIOC_PDDR -#define CORE_PIN31_DDRREG GPIOE_PDDR -#define CORE_PIN32_DDRREG GPIOB_PDDR -#define CORE_PIN33_DDRREG GPIOA_PDDR - -#define CORE_PIN0_PINREG GPIOB_PDIR -#define CORE_PIN1_PINREG GPIOB_PDIR -#define CORE_PIN2_PINREG GPIOD_PDIR -#define CORE_PIN3_PINREG GPIOA_PDIR -#define CORE_PIN4_PINREG GPIOA_PDIR -#define CORE_PIN5_PINREG GPIOD_PDIR -#define CORE_PIN6_PINREG GPIOD_PDIR -#define CORE_PIN7_PINREG GPIOD_PDIR -#define CORE_PIN8_PINREG GPIOD_PDIR -#define CORE_PIN9_PINREG GPIOC_PDIR -#define CORE_PIN10_PINREG GPIOC_PDIR -#define CORE_PIN11_PINREG GPIOC_PDIR -#define CORE_PIN12_PINREG GPIOC_PDIR -#define CORE_PIN13_PINREG GPIOC_PDIR -#define CORE_PIN14_PINREG GPIOD_PDIR -#define CORE_PIN15_PINREG GPIOC_PDIR -#define CORE_PIN16_PINREG GPIOB_PDIR -#define CORE_PIN17_PINREG GPIOB_PDIR -#define CORE_PIN18_PINREG GPIOB_PDIR -#define CORE_PIN19_PINREG GPIOB_PDIR -#define CORE_PIN20_PINREG GPIOD_PDIR -#define CORE_PIN21_PINREG GPIOD_PDIR -#define CORE_PIN22_PINREG GPIOC_PDIR -#define CORE_PIN23_PINREG GPIOC_PDIR -#define CORE_PIN24_PINREG GPIOA_PDIR -#define CORE_PIN25_PINREG GPIOB_PDIR -#define CORE_PIN26_PINREG GPIOE_PDIR -#define CORE_PIN27_PINREG GPIOC_PDIR -#define CORE_PIN28_PINREG GPIOC_PDIR -#define CORE_PIN29_PINREG GPIOC_PDIR -#define CORE_PIN30_PINREG GPIOC_PDIR -#define CORE_PIN31_PINREG GPIOE_PDIR -#define CORE_PIN32_PINREG GPIOB_PDIR -#define CORE_PIN33_PINREG GPIOA_PDIR - -#define CORE_PIN0_CONFIG PORTB_PCR16 -#define CORE_PIN1_CONFIG PORTB_PCR17 -#define CORE_PIN2_CONFIG PORTD_PCR0 -#define CORE_PIN3_CONFIG PORTA_PCR12 -#define CORE_PIN4_CONFIG PORTA_PCR13 -#define CORE_PIN5_CONFIG PORTD_PCR7 -#define CORE_PIN6_CONFIG PORTD_PCR4 -#define CORE_PIN7_CONFIG PORTD_PCR2 -#define CORE_PIN8_CONFIG PORTD_PCR3 -#define CORE_PIN9_CONFIG PORTC_PCR3 -#define CORE_PIN10_CONFIG PORTC_PCR4 -#define CORE_PIN11_CONFIG PORTC_PCR6 -#define CORE_PIN12_CONFIG PORTC_PCR7 -#define CORE_PIN13_CONFIG PORTC_PCR5 -#define CORE_PIN14_CONFIG PORTD_PCR1 -#define CORE_PIN15_CONFIG PORTC_PCR0 -#define CORE_PIN16_CONFIG PORTB_PCR0 -#define CORE_PIN17_CONFIG PORTB_PCR1 -#define CORE_PIN18_CONFIG PORTB_PCR3 -#define CORE_PIN19_CONFIG PORTB_PCR2 -#define CORE_PIN20_CONFIG PORTD_PCR5 -#define CORE_PIN21_CONFIG PORTD_PCR6 -#define CORE_PIN22_CONFIG PORTC_PCR1 -#define CORE_PIN23_CONFIG PORTC_PCR2 -#define CORE_PIN24_CONFIG PORTA_PCR5 -#define CORE_PIN25_CONFIG PORTB_PCR19 -#define CORE_PIN26_CONFIG PORTE_PCR1 -#define CORE_PIN27_CONFIG PORTC_PCR9 -#define CORE_PIN28_CONFIG PORTC_PCR8 -#define CORE_PIN29_CONFIG PORTC_PCR10 -#define CORE_PIN30_CONFIG PORTC_PCR11 -#define CORE_PIN31_CONFIG PORTE_PCR0 -#define CORE_PIN32_CONFIG PORTB_PCR18 -#define CORE_PIN33_CONFIG PORTA_PCR4 - -#define CORE_ADC0_PIN 14 -#define CORE_ADC1_PIN 15 -#define CORE_ADC2_PIN 16 -#define CORE_ADC3_PIN 17 -#define CORE_ADC4_PIN 18 -#define CORE_ADC5_PIN 19 -#define CORE_ADC6_PIN 20 -#define CORE_ADC7_PIN 21 -#define CORE_ADC8_PIN 22 -#define CORE_ADC9_PIN 23 -#define CORE_ADC10_PIN 34 -#define CORE_ADC11_PIN 35 -#define CORE_ADC12_PIN 36 -#define CORE_ADC13_PIN 37 - -#define CORE_RXD0_PIN 0 -#define CORE_TXD0_PIN 1 -#define CORE_RXD1_PIN 9 -#define CORE_TXD1_PIN 10 -#define CORE_RXD2_PIN 7 -#define CORE_TXD2_PIN 8 - -#define CORE_INT0_PIN 0 -#define CORE_INT1_PIN 1 -#define CORE_INT2_PIN 2 -#define CORE_INT3_PIN 3 -#define CORE_INT4_PIN 4 -#define CORE_INT5_PIN 5 -#define CORE_INT6_PIN 6 -#define CORE_INT7_PIN 7 -#define CORE_INT8_PIN 8 -#define CORE_INT9_PIN 9 -#define CORE_INT10_PIN 10 -#define CORE_INT11_PIN 11 -#define CORE_INT12_PIN 12 -#define CORE_INT13_PIN 13 -#define CORE_INT14_PIN 14 -#define CORE_INT15_PIN 15 -#define CORE_INT16_PIN 16 -#define CORE_INT17_PIN 17 -#define CORE_INT18_PIN 18 -#define CORE_INT19_PIN 19 -#define CORE_INT20_PIN 20 -#define CORE_INT21_PIN 21 -#define CORE_INT22_PIN 22 -#define CORE_INT23_PIN 23 -#define CORE_INT24_PIN 24 -#define CORE_INT25_PIN 25 -#define CORE_INT26_PIN 26 -#define CORE_INT27_PIN 27 -#define CORE_INT28_PIN 28 -#define CORE_INT29_PIN 29 -#define CORE_INT30_PIN 30 -#define CORE_INT31_PIN 31 -#define CORE_INT32_PIN 32 -#define CORE_INT33_PIN 33 -#define CORE_INT_EVERY_PIN 1 - - - - -#ifdef __cplusplus -extern "C" { -#endif - -void digitalWrite(uint8_t pin, uint8_t val); -static inline void digitalWriteFast(uint8_t pin, uint8_t val) __attribute__((always_inline, unused)); -static inline void digitalWriteFast(uint8_t pin, uint8_t val) -{ - if (__builtin_constant_p(pin)) { - if (val) { - if (pin == 0) { - CORE_PIN0_PORTSET = CORE_PIN0_BITMASK; - } else if (pin == 1) { - CORE_PIN1_PORTSET = CORE_PIN1_BITMASK; - } else if (pin == 2) { - CORE_PIN2_PORTSET = CORE_PIN2_BITMASK; - } else if (pin == 3) { - CORE_PIN3_PORTSET = CORE_PIN3_BITMASK; - } else if (pin == 4) { - CORE_PIN4_PORTSET = CORE_PIN4_BITMASK; - } else if (pin == 5) { - CORE_PIN5_PORTSET = CORE_PIN5_BITMASK; - } else if (pin == 6) { - CORE_PIN6_PORTSET = CORE_PIN6_BITMASK; - } else if (pin == 7) { - CORE_PIN7_PORTSET = CORE_PIN7_BITMASK; - } else if (pin == 8) { - CORE_PIN8_PORTSET = CORE_PIN8_BITMASK; - } else if (pin == 9) { - CORE_PIN9_PORTSET = CORE_PIN9_BITMASK; - } else if (pin == 10) { - CORE_PIN10_PORTSET = CORE_PIN10_BITMASK; - } else if (pin == 11) { - CORE_PIN11_PORTSET = CORE_PIN11_BITMASK; - } else if (pin == 12) { - CORE_PIN12_PORTSET = CORE_PIN12_BITMASK; - } else if (pin == 13) { - CORE_PIN13_PORTSET = CORE_PIN13_BITMASK; - } else if (pin == 14) { - CORE_PIN14_PORTSET = CORE_PIN14_BITMASK; - } else if (pin == 15) { - CORE_PIN15_PORTSET = CORE_PIN15_BITMASK; - } else if (pin == 16) { - CORE_PIN16_PORTSET = CORE_PIN16_BITMASK; - } else if (pin == 17) { - CORE_PIN17_PORTSET = CORE_PIN17_BITMASK; - } else if (pin == 18) { - CORE_PIN18_PORTSET = CORE_PIN18_BITMASK; - } else if (pin == 19) { - CORE_PIN19_PORTSET = CORE_PIN19_BITMASK; - } else if (pin == 20) { - CORE_PIN20_PORTSET = CORE_PIN20_BITMASK; - } else if (pin == 21) { - CORE_PIN21_PORTSET = CORE_PIN21_BITMASK; - } else if (pin == 22) { - CORE_PIN22_PORTSET = CORE_PIN22_BITMASK; - } else if (pin == 23) { - CORE_PIN23_PORTSET = CORE_PIN23_BITMASK; - } else if (pin == 24) { - CORE_PIN24_PORTSET = CORE_PIN24_BITMASK; - } else if (pin == 25) { - CORE_PIN25_PORTSET = CORE_PIN25_BITMASK; - } else if (pin == 26) { - CORE_PIN26_PORTSET = CORE_PIN26_BITMASK; - } else if (pin == 27) { - CORE_PIN27_PORTSET = CORE_PIN27_BITMASK; - } else if (pin == 28) { - CORE_PIN28_PORTSET = CORE_PIN28_BITMASK; - } else if (pin == 29) { - CORE_PIN29_PORTSET = CORE_PIN29_BITMASK; - } else if (pin == 30) { - CORE_PIN30_PORTSET = CORE_PIN30_BITMASK; - } else if (pin == 31) { - CORE_PIN31_PORTSET = CORE_PIN31_BITMASK; - } else if (pin == 32) { - CORE_PIN32_PORTSET = CORE_PIN32_BITMASK; - } else if (pin == 33) { - CORE_PIN33_PORTSET = CORE_PIN33_BITMASK; - } - } else { - if (pin == 0) { - CORE_PIN0_PORTCLEAR = CORE_PIN0_BITMASK; - } else if (pin == 1) { - CORE_PIN1_PORTCLEAR = CORE_PIN1_BITMASK; - } else if (pin == 2) { - CORE_PIN2_PORTCLEAR = CORE_PIN2_BITMASK; - } else if (pin == 3) { - CORE_PIN3_PORTCLEAR = CORE_PIN3_BITMASK; - } else if (pin == 4) { - CORE_PIN4_PORTCLEAR = CORE_PIN4_BITMASK; - } else if (pin == 5) { - CORE_PIN5_PORTCLEAR = CORE_PIN5_BITMASK; - } else if (pin == 6) { - CORE_PIN6_PORTCLEAR = CORE_PIN6_BITMASK; - } else if (pin == 7) { - CORE_PIN7_PORTCLEAR = CORE_PIN7_BITMASK; - } else if (pin == 8) { - CORE_PIN8_PORTCLEAR = CORE_PIN8_BITMASK; - } else if (pin == 9) { - CORE_PIN9_PORTCLEAR = CORE_PIN9_BITMASK; - } else if (pin == 10) { - CORE_PIN10_PORTCLEAR = CORE_PIN10_BITMASK; - } else if (pin == 11) { - CORE_PIN11_PORTCLEAR = CORE_PIN11_BITMASK; - } else if (pin == 12) { - CORE_PIN12_PORTCLEAR = CORE_PIN12_BITMASK; - } else if (pin == 13) { - CORE_PIN13_PORTCLEAR = CORE_PIN13_BITMASK; - } else if (pin == 14) { - CORE_PIN14_PORTCLEAR = CORE_PIN14_BITMASK; - } else if (pin == 15) { - CORE_PIN15_PORTCLEAR = CORE_PIN15_BITMASK; - } else if (pin == 16) { - CORE_PIN16_PORTCLEAR = CORE_PIN16_BITMASK; - } else if (pin == 17) { - CORE_PIN17_PORTCLEAR = CORE_PIN17_BITMASK; - } else if (pin == 18) { - CORE_PIN18_PORTCLEAR = CORE_PIN18_BITMASK; - } else if (pin == 19) { - CORE_PIN19_PORTCLEAR = CORE_PIN19_BITMASK; - } else if (pin == 20) { - CORE_PIN20_PORTCLEAR = CORE_PIN20_BITMASK; - } else if (pin == 21) { - CORE_PIN21_PORTCLEAR = CORE_PIN21_BITMASK; - } else if (pin == 22) { - CORE_PIN22_PORTCLEAR = CORE_PIN22_BITMASK; - } else if (pin == 23) { - CORE_PIN23_PORTCLEAR = CORE_PIN23_BITMASK; - } else if (pin == 24) { - CORE_PIN24_PORTCLEAR = CORE_PIN24_BITMASK; - } else if (pin == 25) { - CORE_PIN25_PORTCLEAR = CORE_PIN25_BITMASK; - } else if (pin == 26) { - CORE_PIN26_PORTCLEAR = CORE_PIN26_BITMASK; - } else if (pin == 27) { - CORE_PIN27_PORTCLEAR = CORE_PIN27_BITMASK; - } else if (pin == 28) { - CORE_PIN28_PORTCLEAR = CORE_PIN28_BITMASK; - } else if (pin == 29) { - CORE_PIN29_PORTCLEAR = CORE_PIN29_BITMASK; - } else if (pin == 30) { - CORE_PIN30_PORTCLEAR = CORE_PIN30_BITMASK; - } else if (pin == 31) { - CORE_PIN31_PORTCLEAR = CORE_PIN31_BITMASK; - } else if (pin == 32) { - CORE_PIN32_PORTCLEAR = CORE_PIN32_BITMASK; - } else if (pin == 33) { - CORE_PIN33_PORTCLEAR = CORE_PIN33_BITMASK; - } - } - } else { - if (val) { - *portSetRegister(pin) = 1; - } else { - *portClearRegister(pin) = 1; - } - } -} - -uint8_t digitalRead(uint8_t pin); -static inline uint8_t digitalReadFast(uint8_t pin) __attribute__((always_inline, unused)); -static inline uint8_t digitalReadFast(uint8_t pin) -{ - if (__builtin_constant_p(pin)) { - if (pin == 0) { - return (CORE_PIN0_PINREG & CORE_PIN0_BITMASK) ? 1 : 0; - } else if (pin == 1) { - return (CORE_PIN1_PINREG & CORE_PIN1_BITMASK) ? 1 : 0; - } else if (pin == 2) { - return (CORE_PIN2_PINREG & CORE_PIN2_BITMASK) ? 1 : 0; - } else if (pin == 3) { - return (CORE_PIN3_PINREG & CORE_PIN3_BITMASK) ? 1 : 0; - } else if (pin == 4) { - return (CORE_PIN4_PINREG & CORE_PIN4_BITMASK) ? 1 : 0; - } else if (pin == 5) { - return (CORE_PIN5_PINREG & CORE_PIN5_BITMASK) ? 1 : 0; - } else if (pin == 6) { - return (CORE_PIN6_PINREG & CORE_PIN6_BITMASK) ? 1 : 0; - } else if (pin == 7) { - return (CORE_PIN7_PINREG & CORE_PIN7_BITMASK) ? 1 : 0; - } else if (pin == 8) { - return (CORE_PIN8_PINREG & CORE_PIN8_BITMASK) ? 1 : 0; - } else if (pin == 9) { - return (CORE_PIN9_PINREG & CORE_PIN9_BITMASK) ? 1 : 0; - } else if (pin == 10) { - return (CORE_PIN10_PINREG & CORE_PIN10_BITMASK) ? 1 : 0; - } else if (pin == 11) { - return (CORE_PIN11_PINREG & CORE_PIN11_BITMASK) ? 1 : 0; - } else if (pin == 12) { - return (CORE_PIN12_PINREG & CORE_PIN12_BITMASK) ? 1 : 0; - } else if (pin == 13) { - return (CORE_PIN13_PINREG & CORE_PIN13_BITMASK) ? 1 : 0; - } else if (pin == 14) { - return (CORE_PIN14_PINREG & CORE_PIN14_BITMASK) ? 1 : 0; - } else if (pin == 15) { - return (CORE_PIN15_PINREG & CORE_PIN15_BITMASK) ? 1 : 0; - } else if (pin == 16) { - return (CORE_PIN16_PINREG & CORE_PIN16_BITMASK) ? 1 : 0; - } else if (pin == 17) { - return (CORE_PIN17_PINREG & CORE_PIN17_BITMASK) ? 1 : 0; - } else if (pin == 18) { - return (CORE_PIN18_PINREG & CORE_PIN18_BITMASK) ? 1 : 0; - } else if (pin == 19) { - return (CORE_PIN19_PINREG & CORE_PIN19_BITMASK) ? 1 : 0; - } else if (pin == 20) { - return (CORE_PIN20_PINREG & CORE_PIN20_BITMASK) ? 1 : 0; - } else if (pin == 21) { - return (CORE_PIN21_PINREG & CORE_PIN21_BITMASK) ? 1 : 0; - } else if (pin == 22) { - return (CORE_PIN22_PINREG & CORE_PIN22_BITMASK) ? 1 : 0; - } else if (pin == 23) { - return (CORE_PIN23_PINREG & CORE_PIN23_BITMASK) ? 1 : 0; - } else if (pin == 24) { - return (CORE_PIN24_PINREG & CORE_PIN24_BITMASK) ? 1 : 0; - } else if (pin == 25) { - return (CORE_PIN25_PINREG & CORE_PIN25_BITMASK) ? 1 : 0; - } else if (pin == 26) { - return (CORE_PIN26_PINREG & CORE_PIN26_BITMASK) ? 1 : 0; - } else if (pin == 27) { - return (CORE_PIN27_PINREG & CORE_PIN27_BITMASK) ? 1 : 0; - } else if (pin == 28) { - return (CORE_PIN28_PINREG & CORE_PIN28_BITMASK) ? 1 : 0; - } else if (pin == 29) { - return (CORE_PIN29_PINREG & CORE_PIN29_BITMASK) ? 1 : 0; - } else if (pin == 30) { - return (CORE_PIN30_PINREG & CORE_PIN30_BITMASK) ? 1 : 0; - } else if (pin == 31) { - return (CORE_PIN31_PINREG & CORE_PIN31_BITMASK) ? 1 : 0; - } else if (pin == 32) { - return (CORE_PIN32_PINREG & CORE_PIN32_BITMASK) ? 1 : 0; - } else if (pin == 33) { - return (CORE_PIN33_PINREG & CORE_PIN33_BITMASK) ? 1 : 0; - } else { - return 0; - } - } else { - return *portInputRegister(pin); - } -} - - -void pinMode(uint8_t pin, uint8_t mode); -void init_pins(void); -void analogWrite(uint8_t pin, int val); -void analogWriteRes(uint32_t bits); -static inline void analogWriteResolution(uint32_t bits) { analogWriteRes(bits); } -void analogWriteFrequency(uint8_t pin, uint32_t frequency); -void analogWriteDAC0(int val); -void attachInterrupt(uint8_t pin, void (*function)(void), int mode); -void detachInterrupt(uint8_t pin); -void _init_Teensyduino_internal_(void); - -int analogRead(uint8_t pin); -void analogReference(uint8_t type); -void analogReadRes(unsigned int bits); -static inline void analogReadResolution(unsigned int bits) { analogReadRes(bits); } -void analogReadAveraging(unsigned int num); -void analog_init(void); - -#define DEFAULT 0 -#define INTERNAL 2 -#define INTERNAL1V2 2 -#define INTERNAL1V1 2 -#define EXTERNAL 0 - -int touchRead(uint8_t pin); - - -static inline void shiftOut(uint8_t, uint8_t, uint8_t, uint8_t) __attribute__((always_inline, unused)); -extern void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) __attribute__((noinline)); -extern void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) __attribute__((noinline)); -extern void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) __attribute__((noinline)); - -static inline void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) -{ - if (__builtin_constant_p(bitOrder)) { - if (bitOrder == LSBFIRST) { - shiftOut_lsbFirst(dataPin, clockPin, value); - } else { - shiftOut_msbFirst(dataPin, clockPin, value); - } - } else { - _shiftOut(dataPin, clockPin, bitOrder, value); - } -} - -static inline uint8_t shiftIn(uint8_t, uint8_t, uint8_t) __attribute__((always_inline, unused)); -extern uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) __attribute__((noinline)); -extern uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin) __attribute__((noinline)); -extern uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin) __attribute__((noinline)); - -static inline uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) -{ - if (__builtin_constant_p(bitOrder)) { - if (bitOrder == LSBFIRST) { - return shiftIn_lsbFirst(dataPin, clockPin); - } else { - return shiftIn_msbFirst(dataPin, clockPin); - } - } else { - return _shiftIn(dataPin, clockPin, bitOrder); - } -} - -void _reboot_Teensyduino_(void) __attribute__((noreturn)); -void _restart_Teensyduino_(void) __attribute__((noreturn)); - -void yield(void); - -void delay(uint32_t msec); - -extern volatile uint32_t systick_millis_count; - -static inline uint32_t millis(void) __attribute__((always_inline, unused)); -static inline uint32_t millis(void) -{ - volatile uint32_t ret = systick_millis_count; // single aligned 32 bit is atomic; - return ret; -} - -uint32_t micros(void); - -static inline void delayMicroseconds(uint32_t) __attribute__((always_inline, unused)); -static inline void delayMicroseconds(uint32_t usec) -{ -#if F_CPU == 168000000 - uint32_t n = usec * 56; -#elif F_CPU == 144000000 - uint32_t n = usec * 48; -#elif F_CPU == 120000000 - uint32_t n = usec * 40; -#elif F_CPU == 96000000 - uint32_t n = usec << 5; -#elif F_CPU == 72000000 - uint32_t n = usec * 24; -#elif F_CPU == 48000000 - uint32_t n = usec << 4; -#elif F_CPU == 24000000 - uint32_t n = usec << 3; -#elif F_CPU == 16000000 - uint32_t n = usec << 2; -#elif F_CPU == 8000000 - uint32_t n = usec << 1; -#elif F_CPU == 4000000 - uint32_t n = usec; -#elif F_CPU == 2000000 - uint32_t n = usec >> 1; -#endif - // changed because a delay of 1 micro Sec @ 2MHz will be 0 - if (n == 0) return; - __asm__ volatile( - "L_%=_delayMicroseconds:" "\n\t" -#if F_CPU < 24000000 - "nop" "\n\t" -#endif - "subs %0, #1" "\n\t" - "bne L_%=_delayMicroseconds" "\n" - : "+r" (n) : - ); -} - -#ifdef __cplusplus -} -#endif - - - - - - - - -#ifdef __cplusplus -extern "C" { -#endif -unsigned long rtc_get(void); -void rtc_set(unsigned long t); -void rtc_compensate(int adjust); -#ifdef __cplusplus -} -class teensy3_clock_class -{ -public: - static unsigned long get(void) __attribute__((always_inline)) { return rtc_get(); } - static void set(unsigned long t) __attribute__((always_inline)) { rtc_set(t); } - static void compensate(int adj) __attribute__((always_inline)) { rtc_compensate(adj); } -}; -extern teensy3_clock_class Teensy3Clock; -#endif - - - - -#endif diff --git a/ports/teensy/core/mk20dx128.c b/ports/teensy/core/mk20dx128.c deleted file mode 100644 index 0f5f1e19e2..0000000000 --- a/ports/teensy/core/mk20dx128.c +++ /dev/null @@ -1,662 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "mk20dx128.h" - - -extern unsigned long _stext; -extern unsigned long _etext; -extern unsigned long _sdata; -extern unsigned long _edata; -extern unsigned long _sbss; -extern unsigned long _ebss; -extern unsigned long _estack; -//extern void __init_array_start(void); -//extern void __init_array_end(void); - - - -extern int main (void); -void ResetHandler(void); -void _init_Teensyduino_internal_(void); -void __libc_init_array(void); - - -void fault_isr(void) -{ - while (1) { - // keep polling some communication while in fault - // mode, so we don't completely die. - if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr(); - if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr(); - if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr(); - if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr(); - } -} - -void unused_isr(void) -{ - fault_isr(); -} - -extern volatile uint32_t systick_millis_count; -void systick_default_isr(void) -{ - systick_millis_count++; -} - -void nmi_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void hard_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void memmanage_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void bus_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void usage_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void svcall_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void debugmonitor_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pendablesrvreq_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void systick_isr(void) __attribute__ ((weak, alias("systick_default_isr"))); - -void dma_ch0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch3_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch4_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch5_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch6_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch7_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch8_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch9_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch10_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch11_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch12_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch13_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch14_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch15_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void mcm_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void flash_cmd_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void flash_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void low_voltage_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void wakeup_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void watchdog_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2c0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2c1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2c2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void spi0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void spi1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void spi2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void sdhc_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_message_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_bus_off_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_tx_warn_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_rx_warn_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_wakeup_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2s0_tx_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2s0_rx_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart0_lon_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart0_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart0_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart1_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart1_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart2_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart2_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart3_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart3_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart4_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart4_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart5_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart5_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void adc0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void adc1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmp0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmp1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmp2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm3_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmt_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void rtc_alarm_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void rtc_seconds_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit3_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pdb_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void usb_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void usb_charge_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dac0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dac1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void tsi0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void mcg_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void lptmr_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void porta_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void portb_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void portc_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void portd_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void porte_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void software_isr(void) __attribute__ ((weak, alias("unused_isr"))); - - -// TODO: create AVR-stype ISR() macro, with default linkage to undefined handler -// -__attribute__ ((section(".vectors"), used)) -void (* const gVectors[])(void) = -{ - (void (*)(void))((unsigned long)&_estack), // 0 ARM: Initial Stack Pointer - ResetHandler, // 1 ARM: Initial Program Counter - nmi_isr, // 2 ARM: Non-maskable Interrupt (NMI) - hard_fault_isr, // 3 ARM: Hard Fault - memmanage_fault_isr, // 4 ARM: MemManage Fault - bus_fault_isr, // 5 ARM: Bus Fault - usage_fault_isr, // 6 ARM: Usage Fault - fault_isr, // 7 -- - fault_isr, // 8 -- - fault_isr, // 9 -- - fault_isr, // 10 -- - svcall_isr, // 11 ARM: Supervisor call (SVCall) - debugmonitor_isr, // 12 ARM: Debug Monitor - fault_isr, // 13 -- - pendablesrvreq_isr, // 14 ARM: Pendable req serv(PendableSrvReq) - systick_isr, // 15 ARM: System tick timer (SysTick) -#if defined(__MK20DX128__) - dma_ch0_isr, // 16 DMA channel 0 transfer complete - dma_ch1_isr, // 17 DMA channel 1 transfer complete - dma_ch2_isr, // 18 DMA channel 2 transfer complete - dma_ch3_isr, // 19 DMA channel 3 transfer complete - dma_error_isr, // 20 DMA error interrupt channel - unused_isr, // 21 DMA -- - flash_cmd_isr, // 22 Flash Memory Command complete - flash_error_isr, // 23 Flash Read collision - low_voltage_isr, // 24 Low-voltage detect/warning - wakeup_isr, // 25 Low Leakage Wakeup - watchdog_isr, // 26 Both EWM and WDOG interrupt - i2c0_isr, // 27 I2C0 - spi0_isr, // 28 SPI0 - i2s0_tx_isr, // 29 I2S0 Transmit - i2s0_rx_isr, // 30 I2S0 Receive - uart0_lon_isr, // 31 UART0 CEA709.1-B (LON) status - uart0_status_isr, // 32 UART0 status - uart0_error_isr, // 33 UART0 error - uart1_status_isr, // 34 UART1 status - uart1_error_isr, // 35 UART1 error - uart2_status_isr, // 36 UART2 status - uart2_error_isr, // 37 UART2 error - adc0_isr, // 38 ADC0 - cmp0_isr, // 39 CMP0 - cmp1_isr, // 40 CMP1 - ftm0_isr, // 41 FTM0 - ftm1_isr, // 42 FTM1 - cmt_isr, // 43 CMT - rtc_alarm_isr, // 44 RTC Alarm interrupt - rtc_seconds_isr, // 45 RTC Seconds interrupt - pit0_isr, // 46 PIT Channel 0 - pit1_isr, // 47 PIT Channel 1 - pit2_isr, // 48 PIT Channel 2 - pit3_isr, // 49 PIT Channel 3 - pdb_isr, // 50 PDB Programmable Delay Block - usb_isr, // 51 USB OTG - usb_charge_isr, // 52 USB Charger Detect - tsi0_isr, // 53 TSI0 - mcg_isr, // 54 MCG - lptmr_isr, // 55 Low Power Timer - porta_isr, // 56 Pin detect (Port A) - portb_isr, // 57 Pin detect (Port B) - portc_isr, // 58 Pin detect (Port C) - portd_isr, // 59 Pin detect (Port D) - porte_isr, // 60 Pin detect (Port E) - software_isr, // 61 Software interrupt -#elif defined(__MK20DX256__) - dma_ch0_isr, // 16 DMA channel 0 transfer complete - dma_ch1_isr, // 17 DMA channel 1 transfer complete - dma_ch2_isr, // 18 DMA channel 2 transfer complete - dma_ch3_isr, // 19 DMA channel 3 transfer complete - dma_ch4_isr, // 20 DMA channel 4 transfer complete - dma_ch5_isr, // 21 DMA channel 5 transfer complete - dma_ch6_isr, // 22 DMA channel 6 transfer complete - dma_ch7_isr, // 23 DMA channel 7 transfer complete - dma_ch8_isr, // 24 DMA channel 8 transfer complete - dma_ch9_isr, // 25 DMA channel 9 transfer complete - dma_ch10_isr, // 26 DMA channel 10 transfer complete - dma_ch11_isr, // 27 DMA channel 10 transfer complete - dma_ch12_isr, // 28 DMA channel 10 transfer complete - dma_ch13_isr, // 29 DMA channel 10 transfer complete - dma_ch14_isr, // 30 DMA channel 10 transfer complete - dma_ch15_isr, // 31 DMA channel 10 transfer complete - dma_error_isr, // 32 DMA error interrupt channel - unused_isr, // 33 -- - flash_cmd_isr, // 34 Flash Memory Command complete - flash_error_isr, // 35 Flash Read collision - low_voltage_isr, // 36 Low-voltage detect/warning - wakeup_isr, // 37 Low Leakage Wakeup - watchdog_isr, // 38 Both EWM and WDOG interrupt - unused_isr, // 39 -- - i2c0_isr, // 40 I2C0 - i2c1_isr, // 41 I2C1 - spi0_isr, // 42 SPI0 - spi1_isr, // 43 SPI1 - unused_isr, // 44 -- - can0_message_isr, // 45 CAN OR'ed Message buffer (0-15) - can0_bus_off_isr, // 46 CAN Bus Off - can0_error_isr, // 47 CAN Error - can0_tx_warn_isr, // 48 CAN Transmit Warning - can0_rx_warn_isr, // 49 CAN Receive Warning - can0_wakeup_isr, // 50 CAN Wake Up - i2s0_tx_isr, // 51 I2S0 Transmit - i2s0_rx_isr, // 52 I2S0 Receive - unused_isr, // 53 -- - unused_isr, // 54 -- - unused_isr, // 55 -- - unused_isr, // 56 -- - unused_isr, // 57 -- - unused_isr, // 58 -- - unused_isr, // 59 -- - uart0_lon_isr, // 60 UART0 CEA709.1-B (LON) status - uart0_status_isr, // 61 UART0 status - uart0_error_isr, // 62 UART0 error - uart1_status_isr, // 63 UART1 status - uart1_error_isr, // 64 UART1 error - uart2_status_isr, // 65 UART2 status - uart2_error_isr, // 66 UART2 error - unused_isr, // 67 -- - unused_isr, // 68 -- - unused_isr, // 69 -- - unused_isr, // 70 -- - unused_isr, // 71 -- - unused_isr, // 72 -- - adc0_isr, // 73 ADC0 - adc1_isr, // 74 ADC1 - cmp0_isr, // 75 CMP0 - cmp1_isr, // 76 CMP1 - cmp2_isr, // 77 CMP2 - ftm0_isr, // 78 FTM0 - ftm1_isr, // 79 FTM1 - ftm2_isr, // 80 FTM2 - cmt_isr, // 81 CMT - rtc_alarm_isr, // 82 RTC Alarm interrupt - rtc_seconds_isr, // 83 RTC Seconds interrupt - pit0_isr, // 84 PIT Channel 0 - pit1_isr, // 85 PIT Channel 1 - pit2_isr, // 86 PIT Channel 2 - pit3_isr, // 87 PIT Channel 3 - pdb_isr, // 88 PDB Programmable Delay Block - usb_isr, // 89 USB OTG - usb_charge_isr, // 90 USB Charger Detect - unused_isr, // 91 -- - unused_isr, // 92 -- - unused_isr, // 93 -- - unused_isr, // 94 -- - unused_isr, // 95 -- - unused_isr, // 96 -- - dac0_isr, // 97 DAC0 - unused_isr, // 98 -- - tsi0_isr, // 99 TSI0 - mcg_isr, // 100 MCG - lptmr_isr, // 101 Low Power Timer - unused_isr, // 102 -- - porta_isr, // 103 Pin detect (Port A) - portb_isr, // 104 Pin detect (Port B) - portc_isr, // 105 Pin detect (Port C) - portd_isr, // 106 Pin detect (Port D) - porte_isr, // 107 Pin detect (Port E) - unused_isr, // 108 -- - unused_isr, // 109 -- - software_isr, // 110 Software interrupt -#endif -}; - -//void usb_isr(void) -//{ -//} - -__attribute__ ((section(".flashconfig"), used)) -const uint8_t flashconfigbytes[16] = { - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF -}; - - -// Automatically initialize the RTC. When the build defines the compile -// time, and the user has added a crystal, the RTC will automatically -// begin at the time of the first upload. -#ifndef TIME_T -#define TIME_T 1349049600 // default 1 Oct 2012 (never used, Arduino sets this) -#endif -extern void rtc_set(unsigned long t); - - -static void startup_default_early_hook(void) { WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE; } -static void startup_default_late_hook(void) {} -void startup_early_hook(void) __attribute__ ((weak, alias("startup_default_early_hook"))); -void startup_late_hook(void) __attribute__ ((weak, alias("startup_default_late_hook"))); - -__attribute__ ((section(".startup"))) -void ResetHandler(void) -{ - uint32_t *src = &_etext; - uint32_t *dest = &_sdata; - unsigned int i; -#if F_CPU <= 2000000 - volatile int n; -#endif - - WDOG_UNLOCK = WDOG_UNLOCK_SEQ1; - WDOG_UNLOCK = WDOG_UNLOCK_SEQ2; - __asm__ volatile ("nop"); - __asm__ volatile ("nop"); - // programs using the watchdog timer or needing to initialize hardware as - // early as possible can implement startup_early_hook() - startup_early_hook(); - - // enable clocks to always-used peripherals -#if defined(__MK20DX128__) - SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO - SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL; -#elif defined(__MK20DX256__) - SIM_SCGC3 = SIM_SCGC3_ADC1 | SIM_SCGC3_FTM2; - SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO - SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL; -#endif - // if the RTC oscillator isn't enabled, get it started early - if (!(RTC_CR & RTC_CR_OSCE)) { - RTC_SR = 0; - RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE; - } - - // release I/O pins hold, if we woke up from VLLS mode - if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO; - - // since this is a write once register, make it visible to all F_CPU's - // so we can into other sleep modes in the future at any speed - SMC_PMPROT = SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS; - - // TODO: do this while the PLL is waiting to lock.... - while (dest < &_edata) *dest++ = *src++; - dest = &_sbss; - while (dest < &_ebss) *dest++ = 0; - SCB_VTOR = 0; // use vector table in flash - - // default all interrupts to medium priority level - for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128); - - // hardware always starts in FEI mode - // C1[CLKS] bits are written to 00 - // C1[IREFS] bit is written to 1 - // C6[PLLS] bit is written to 0 -// MCG_SC[FCDIV] defaults to divide by two for internal ref clock -// I tried changing MSG_SC to divide by 1, it didn't work for me -#if F_CPU <= 2000000 - // use the internal oscillator - MCG_C1 = MCG_C1_CLKS(1) | MCG_C1_IREFS; - // wait for MCGOUT to use oscillator - while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(1)) ; - for (n=0; n<10; n++) ; // TODO: why do we get 2 mA extra without this delay? - MCG_C2 = MCG_C2_IRCS; - while (!(MCG_S & MCG_S_IRCST)) ; - // now in FBI mode: - // C1[CLKS] bits are written to 01 - // C1[IREFS] bit is written to 1 - // C6[PLLS] is written to 0 - // C2[LP] is written to 0 - MCG_C2 = MCG_C2_IRCS | MCG_C2_LP; - // now in BLPI mode: - // C1[CLKS] bits are written to 01 - // C1[IREFS] bit is written to 1 - // C6[PLLS] bit is written to 0 - // C2[LP] bit is written to 1 -#else - // enable capacitors for crystal - OSC0_CR = OSC_SC8P | OSC_SC2P; - // enable osc, 8-32 MHz range, low power mode - MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS; - // switch to crystal as clock source, FLL input = 16 MHz / 512 - MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(4); - // wait for crystal oscillator to begin - while ((MCG_S & MCG_S_OSCINIT0) == 0) ; - // wait for FLL to use oscillator - while ((MCG_S & MCG_S_IREFST) != 0) ; - // wait for MCGOUT to use oscillator - while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ; - // now in FBE mode - // C1[CLKS] bits are written to 10 - // C1[IREFS] bit is written to 0 - // C1[FRDIV] must be written to divide xtal to 31.25-39 kHz - // C6[PLLS] bit is written to 0 - // C2[LP] is written to 0 - #if F_CPU <= 16000000 - // if the crystal is fast enough, use it directly (no FLL or PLL) - MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS | MCG_C2_LP; - // BLPE mode: - // C1[CLKS] bits are written to 10 - // C1[IREFS] bit is written to 0 - // C2[LP] bit is written to 1 - #else - // if we need faster than the crystal, turn on the PLL - #if F_CPU == 72000000 - MCG_C5 = MCG_C5_PRDIV0(5); // config PLL input for 16 MHz Crystal / 6 = 2.667 Hz - #else - MCG_C5 = MCG_C5_PRDIV0(3); // config PLL input for 16 MHz Crystal / 4 = 4 MHz - #endif - #if F_CPU == 168000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(18); // config PLL for 168 MHz output - #elif F_CPU == 144000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(12); // config PLL for 144 MHz output - #elif F_CPU == 120000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(6); // config PLL for 120 MHz output - #elif F_CPU == 72000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(3); // config PLL for 72 MHz output - #else - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0); // config PLL for 96 MHz output - #endif - // wait for PLL to start using xtal as its input - while (!(MCG_S & MCG_S_PLLST)) ; - // wait for PLL to lock - while (!(MCG_S & MCG_S_LOCK0)) ; - // now we're in PBE mode - #endif -#endif - - // now program the clock dividers -#if F_CPU == 168000000 - // config divisors: 168 MHz core, 56 MHz bus, 33.6 MHz flash, USB = 168 * 2 / 7 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) | SIM_CLKDIV1_OUTDIV4(4); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(6) | SIM_CLKDIV2_USBFRAC; -#elif F_CPU == 144000000 - // config divisors: 144 MHz core, 48 MHz bus, 28.8 MHz flash, USB = 144 / 3 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) | SIM_CLKDIV1_OUTDIV4(4); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2); -#elif F_CPU == 120000000 - // config divisors: 120 MHz core, 60 MHz bus, 24 MHz flash, USB = 128 * 2 / 5 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(4); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC; -#elif F_CPU == 96000000 - // config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); -#elif F_CPU == 72000000 - // config divisors: 72 MHz core, 36 MHz bus, 24 MHz flash, USB = 72 * 2 / 3 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(2); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC; -#elif F_CPU == 48000000 - // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); -#elif F_CPU == 24000000 - // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash, USB = 96 / 2 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); -#elif F_CPU == 16000000 - // config divisors: 16 MHz core, 16 MHz bus, 16 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV4(0); -#elif F_CPU == 8000000 - // config divisors: 8 MHz core, 8 MHz bus, 8 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(1); -#elif F_CPU == 4000000 - // config divisors: 4 MHz core, 4 MHz bus, 2 MHz flash - // since we are running from external clock 16MHz - // fix outdiv too -> cpu 16/4, bus 16/4, flash 16/4 - // here we can go into vlpr? - // config divisors: 4 MHz core, 4 MHz bus, 4 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3); -#elif F_CPU == 2000000 - // since we are running from the fast internal reference clock 4MHz - // but is divided down by 2 so we actually have a 2MHz, MCG_SC[FCDIV] default is 2 - // fix outdiv -> cpu 2/1, bus 2/1, flash 2/2 - // config divisors: 2 MHz core, 2 MHz bus, 1 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV4(1); -#else -#error "Error, F_CPU must be 168, 144, 120, 96, 72, 48, 24, 16, 8, 4, or 2 MHz" -#endif - -#if F_CPU > 16000000 - // switch to PLL as clock source, FLL input = 16 MHz / 512 - MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4); - // wait for PLL clock to be used - while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ; - // now we're in PEE mode - // USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0 - SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6); -#else - SIM_SOPT2 = SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(3); -#endif - -#if F_CPU <= 2000000 - // since we are not going into "stop mode" i removed it - SMC_PMCTRL = SMC_PMCTRL_RUNM(2); // VLPR mode :-) -#endif - - // initialize the SysTick counter - SYST_RVR = (F_CPU / 1000) - 1; - SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE; - - //init_pins(); - __enable_irq(); - - _init_Teensyduino_internal_(); - if (RTC_SR & RTC_SR_TIF) { - // TODO: this should probably set the time more agressively, if - // we could reliably detect the first reboot after programming. - rtc_set(TIME_T); - } - - __libc_init_array(); - - startup_late_hook(); - main(); - while (1) ; -} - -char *__brkval = (char *)&_ebss; - -void * _sbrk(int incr) -{ - char *prev = __brkval; - __brkval += incr; - return prev; -} - -__attribute__((weak)) -int _read(int file, char *ptr, int len) -{ - return 0; -} - -__attribute__((weak)) -int _close(int fd) -{ - return -1; -} - -#include - -__attribute__((weak)) -int _fstat(int fd, struct stat *st) -{ - st->st_mode = S_IFCHR; - return 0; -} - -__attribute__((weak)) -int _isatty(int fd) -{ - return 1; -} - -__attribute__((weak)) -int _lseek(int fd, long long offset, int whence) -{ - return -1; -} - -__attribute__((weak)) -void _exit(int status) -{ - while (1); -} - -__attribute__((weak)) -void __cxa_pure_virtual() -{ - while (1); -} - -__attribute__((weak)) -int __cxa_guard_acquire (char *g) -{ - return !(*g); -} - -__attribute__((weak)) -void __cxa_guard_release(char *g) -{ - *g = 1; -} - -int nvic_execution_priority(void) -{ - int priority=256; - uint32_t primask, faultmask, basepri, ipsr; - - // full algorithm in ARM DDI0403D, page B1-639 - // this isn't quite complete, but hopefully good enough - __asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::); - if (faultmask) return -1; - __asm__ volatile("mrs %0, primask\n" : "=r" (primask)::); - if (primask) return 0; - __asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::); - if (ipsr) { - if (ipsr < 16) priority = 0; // could be non-zero - else priority = NVIC_GET_PRIORITY(ipsr - 16); - } - __asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::); - if (basepri > 0 && basepri < priority) priority = basepri; - return priority; -} - diff --git a/ports/teensy/core/mk20dx128.h b/ports/teensy/core/mk20dx128.h deleted file mode 100644 index ab13760508..0000000000 --- a/ports/teensy/core/mk20dx128.h +++ /dev/null @@ -1,2385 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _mk20dx128_h_ -#define _mk20dx128_h_ - -//#ifdef F_CPU -//#undef F_CPU -//#endif -//#define F_CPU 168000000 -//#define F_CPU 144000000 -//#define F_CPU 120000000 -//#define F_CPU 96000000 -//#define F_CPU 72000000 -//#define F_CPU 48000000 -//#define F_CPU 24000000 - -#if (F_CPU == 168000000) - #define F_BUS 56000000 - #define F_MEM 33600000 -#elif (F_CPU == 144000000) - #define F_BUS 48000000 - #define F_MEM 28800000 -#elif (F_CPU == 120000000) - #define F_BUS 60000000 - #define F_MEM 24000000 -#elif (F_CPU == 96000000) - #define F_BUS 48000000 - #define F_MEM 24000000 -#elif (F_CPU == 72000000) - #define F_BUS 36000000 - #define F_MEM 24000000 -#elif (F_CPU == 48000000) - #define F_BUS 48000000 - #define F_MEM 24000000 -#elif (F_CPU == 24000000) - #define F_BUS 24000000 - #define F_MEM 24000000 -#elif (F_CPU == 16000000) - #define F_BUS 16000000 - #define F_MEM 16000000 -#elif (F_CPU == 8000000) - #define F_BUS 8000000 - #define F_MEM 8000000 -#elif (F_CPU == 4000000) - #define F_BUS 4000000 - #define F_MEM 4000000 -#elif (F_CPU == 2000000) - #define F_BUS 2000000 - #define F_MEM 1000000 -#endif - - -#ifndef NULL -#define NULL ((void *)0) -#endif - -#include -#ifdef __cplusplus -extern "C" { -#endif - -// chapter 11: Port control and interrupts (PORT) -#define PORTA_PCR0 *(volatile uint32_t *)0x40049000 // Pin Control Register n -#define PORT_PCR_ISF (uint32_t)0x01000000 // Interrupt Status Flag -#define PORT_PCR_IRQC(n) (uint32_t)(((n) & 15) << 16) // Interrupt Configuration -#define PORT_PCR_IRQC_MASK (uint32_t)0x000F0000 -#define PORT_PCR_LK (uint32_t)0x00008000 // Lock Register -#define PORT_PCR_MUX(n) (uint32_t)(((n) & 7) << 8) // Pin Mux Control -#define PORT_PCR_MUX_MASK (uint32_t)0x00000700 -#define PORT_PCR_DSE (uint32_t)0x00000040 // Drive Strength Enable -#define PORT_PCR_ODE (uint32_t)0x00000020 // Open Drain Enable -#define PORT_PCR_PFE (uint32_t)0x00000010 // Passive Filter Enable -#define PORT_PCR_SRE (uint32_t)0x00000004 // Slew Rate Enable -#define PORT_PCR_PE (uint32_t)0x00000002 // Pull Enable -#define PORT_PCR_PS (uint32_t)0x00000001 // Pull Select -#define PORTA_PCR1 *(volatile uint32_t *)0x40049004 // Pin Control Register n -#define PORTA_PCR2 *(volatile uint32_t *)0x40049008 // Pin Control Register n -#define PORTA_PCR3 *(volatile uint32_t *)0x4004900C // Pin Control Register n -#define PORTA_PCR4 *(volatile uint32_t *)0x40049010 // Pin Control Register n -#define PORTA_PCR5 *(volatile uint32_t *)0x40049014 // Pin Control Register n -#define PORTA_PCR6 *(volatile uint32_t *)0x40049018 // Pin Control Register n -#define PORTA_PCR7 *(volatile uint32_t *)0x4004901C // Pin Control Register n -#define PORTA_PCR8 *(volatile uint32_t *)0x40049020 // Pin Control Register n -#define PORTA_PCR9 *(volatile uint32_t *)0x40049024 // Pin Control Register n -#define PORTA_PCR10 *(volatile uint32_t *)0x40049028 // Pin Control Register n -#define PORTA_PCR11 *(volatile uint32_t *)0x4004902C // Pin Control Register n -#define PORTA_PCR12 *(volatile uint32_t *)0x40049030 // Pin Control Register n -#define PORTA_PCR13 *(volatile uint32_t *)0x40049034 // Pin Control Register n -#define PORTA_PCR14 *(volatile uint32_t *)0x40049038 // Pin Control Register n -#define PORTA_PCR15 *(volatile uint32_t *)0x4004903C // Pin Control Register n -#define PORTA_PCR16 *(volatile uint32_t *)0x40049040 // Pin Control Register n -#define PORTA_PCR17 *(volatile uint32_t *)0x40049044 // Pin Control Register n -#define PORTA_PCR18 *(volatile uint32_t *)0x40049048 // Pin Control Register n -#define PORTA_PCR19 *(volatile uint32_t *)0x4004904C // Pin Control Register n -#define PORTA_PCR20 *(volatile uint32_t *)0x40049050 // Pin Control Register n -#define PORTA_PCR21 *(volatile uint32_t *)0x40049054 // Pin Control Register n -#define PORTA_PCR22 *(volatile uint32_t *)0x40049058 // Pin Control Register n -#define PORTA_PCR23 *(volatile uint32_t *)0x4004905C // Pin Control Register n -#define PORTA_PCR24 *(volatile uint32_t *)0x40049060 // Pin Control Register n -#define PORTA_PCR25 *(volatile uint32_t *)0x40049064 // Pin Control Register n -#define PORTA_PCR26 *(volatile uint32_t *)0x40049068 // Pin Control Register n -#define PORTA_PCR27 *(volatile uint32_t *)0x4004906C // Pin Control Register n -#define PORTA_PCR28 *(volatile uint32_t *)0x40049070 // Pin Control Register n -#define PORTA_PCR29 *(volatile uint32_t *)0x40049074 // Pin Control Register n -#define PORTA_PCR30 *(volatile uint32_t *)0x40049078 // Pin Control Register n -#define PORTA_PCR31 *(volatile uint32_t *)0x4004907C // Pin Control Register n -#define PORTA_GPCLR *(volatile uint32_t *)0x40049080 // Global Pin Control Low Register -#define PORTA_GPCHR *(volatile uint32_t *)0x40049084 // Global Pin Control High Register -#define PORTA_ISFR *(volatile uint32_t *)0x400490A0 // Interrupt Status Flag Register -#define PORTB_PCR0 *(volatile uint32_t *)0x4004A000 // Pin Control Register n -#define PORTB_PCR1 *(volatile uint32_t *)0x4004A004 // Pin Control Register n -#define PORTB_PCR2 *(volatile uint32_t *)0x4004A008 // Pin Control Register n -#define PORTB_PCR3 *(volatile uint32_t *)0x4004A00C // Pin Control Register n -#define PORTB_PCR4 *(volatile uint32_t *)0x4004A010 // Pin Control Register n -#define PORTB_PCR5 *(volatile uint32_t *)0x4004A014 // Pin Control Register n -#define PORTB_PCR6 *(volatile uint32_t *)0x4004A018 // Pin Control Register n -#define PORTB_PCR7 *(volatile uint32_t *)0x4004A01C // Pin Control Register n -#define PORTB_PCR8 *(volatile uint32_t *)0x4004A020 // Pin Control Register n -#define PORTB_PCR9 *(volatile uint32_t *)0x4004A024 // Pin Control Register n -#define PORTB_PCR10 *(volatile uint32_t *)0x4004A028 // Pin Control Register n -#define PORTB_PCR11 *(volatile uint32_t *)0x4004A02C // Pin Control Register n -#define PORTB_PCR12 *(volatile uint32_t *)0x4004A030 // Pin Control Register n -#define PORTB_PCR13 *(volatile uint32_t *)0x4004A034 // Pin Control Register n -#define PORTB_PCR14 *(volatile uint32_t *)0x4004A038 // Pin Control Register n -#define PORTB_PCR15 *(volatile uint32_t *)0x4004A03C // Pin Control Register n -#define PORTB_PCR16 *(volatile uint32_t *)0x4004A040 // Pin Control Register n -#define PORTB_PCR17 *(volatile uint32_t *)0x4004A044 // Pin Control Register n -#define PORTB_PCR18 *(volatile uint32_t *)0x4004A048 // Pin Control Register n -#define PORTB_PCR19 *(volatile uint32_t *)0x4004A04C // Pin Control Register n -#define PORTB_PCR20 *(volatile uint32_t *)0x4004A050 // Pin Control Register n -#define PORTB_PCR21 *(volatile uint32_t *)0x4004A054 // Pin Control Register n -#define PORTB_PCR22 *(volatile uint32_t *)0x4004A058 // Pin Control Register n -#define PORTB_PCR23 *(volatile uint32_t *)0x4004A05C // Pin Control Register n -#define PORTB_PCR24 *(volatile uint32_t *)0x4004A060 // Pin Control Register n -#define PORTB_PCR25 *(volatile uint32_t *)0x4004A064 // Pin Control Register n -#define PORTB_PCR26 *(volatile uint32_t *)0x4004A068 // Pin Control Register n -#define PORTB_PCR27 *(volatile uint32_t *)0x4004A06C // Pin Control Register n -#define PORTB_PCR28 *(volatile uint32_t *)0x4004A070 // Pin Control Register n -#define PORTB_PCR29 *(volatile uint32_t *)0x4004A074 // Pin Control Register n -#define PORTB_PCR30 *(volatile uint32_t *)0x4004A078 // Pin Control Register n -#define PORTB_PCR31 *(volatile uint32_t *)0x4004A07C // Pin Control Register n -#define PORTB_GPCLR *(volatile uint32_t *)0x4004A080 // Global Pin Control Low Register -#define PORTB_GPCHR *(volatile uint32_t *)0x4004A084 // Global Pin Control High Register -#define PORTB_ISFR *(volatile uint32_t *)0x4004A0A0 // Interrupt Status Flag Register -#define PORTC_PCR0 *(volatile uint32_t *)0x4004B000 // Pin Control Register n -#define PORTC_PCR1 *(volatile uint32_t *)0x4004B004 // Pin Control Register n -#define PORTC_PCR2 *(volatile uint32_t *)0x4004B008 // Pin Control Register n -#define PORTC_PCR3 *(volatile uint32_t *)0x4004B00C // Pin Control Register n -#define PORTC_PCR4 *(volatile uint32_t *)0x4004B010 // Pin Control Register n -#define PORTC_PCR5 *(volatile uint32_t *)0x4004B014 // Pin Control Register n -#define PORTC_PCR6 *(volatile uint32_t *)0x4004B018 // Pin Control Register n -#define PORTC_PCR7 *(volatile uint32_t *)0x4004B01C // Pin Control Register n -#define PORTC_PCR8 *(volatile uint32_t *)0x4004B020 // Pin Control Register n -#define PORTC_PCR9 *(volatile uint32_t *)0x4004B024 // Pin Control Register n -#define PORTC_PCR10 *(volatile uint32_t *)0x4004B028 // Pin Control Register n -#define PORTC_PCR11 *(volatile uint32_t *)0x4004B02C // Pin Control Register n -#define PORTC_PCR12 *(volatile uint32_t *)0x4004B030 // Pin Control Register n -#define PORTC_PCR13 *(volatile uint32_t *)0x4004B034 // Pin Control Register n -#define PORTC_PCR14 *(volatile uint32_t *)0x4004B038 // Pin Control Register n -#define PORTC_PCR15 *(volatile uint32_t *)0x4004B03C // Pin Control Register n -#define PORTC_PCR16 *(volatile uint32_t *)0x4004B040 // Pin Control Register n -#define PORTC_PCR17 *(volatile uint32_t *)0x4004B044 // Pin Control Register n -#define PORTC_PCR18 *(volatile uint32_t *)0x4004B048 // Pin Control Register n -#define PORTC_PCR19 *(volatile uint32_t *)0x4004B04C // Pin Control Register n -#define PORTC_PCR20 *(volatile uint32_t *)0x4004B050 // Pin Control Register n -#define PORTC_PCR21 *(volatile uint32_t *)0x4004B054 // Pin Control Register n -#define PORTC_PCR22 *(volatile uint32_t *)0x4004B058 // Pin Control Register n -#define PORTC_PCR23 *(volatile uint32_t *)0x4004B05C // Pin Control Register n -#define PORTC_PCR24 *(volatile uint32_t *)0x4004B060 // Pin Control Register n -#define PORTC_PCR25 *(volatile uint32_t *)0x4004B064 // Pin Control Register n -#define PORTC_PCR26 *(volatile uint32_t *)0x4004B068 // Pin Control Register n -#define PORTC_PCR27 *(volatile uint32_t *)0x4004B06C // Pin Control Register n -#define PORTC_PCR28 *(volatile uint32_t *)0x4004B070 // Pin Control Register n -#define PORTC_PCR29 *(volatile uint32_t *)0x4004B074 // Pin Control Register n -#define PORTC_PCR30 *(volatile uint32_t *)0x4004B078 // Pin Control Register n -#define PORTC_PCR31 *(volatile uint32_t *)0x4004B07C // Pin Control Register n -#define PORTC_GPCLR *(volatile uint32_t *)0x4004B080 // Global Pin Control Low Register -#define PORTC_GPCHR *(volatile uint32_t *)0x4004B084 // Global Pin Control High Register -#define PORTC_ISFR *(volatile uint32_t *)0x4004B0A0 // Interrupt Status Flag Register -#define PORTD_PCR0 *(volatile uint32_t *)0x4004C000 // Pin Control Register n -#define PORTD_PCR1 *(volatile uint32_t *)0x4004C004 // Pin Control Register n -#define PORTD_PCR2 *(volatile uint32_t *)0x4004C008 // Pin Control Register n -#define PORTD_PCR3 *(volatile uint32_t *)0x4004C00C // Pin Control Register n -#define PORTD_PCR4 *(volatile uint32_t *)0x4004C010 // Pin Control Register n -#define PORTD_PCR5 *(volatile uint32_t *)0x4004C014 // Pin Control Register n -#define PORTD_PCR6 *(volatile uint32_t *)0x4004C018 // Pin Control Register n -#define PORTD_PCR7 *(volatile uint32_t *)0x4004C01C // Pin Control Register n -#define PORTD_PCR8 *(volatile uint32_t *)0x4004C020 // Pin Control Register n -#define PORTD_PCR9 *(volatile uint32_t *)0x4004C024 // Pin Control Register n -#define PORTD_PCR10 *(volatile uint32_t *)0x4004C028 // Pin Control Register n -#define PORTD_PCR11 *(volatile uint32_t *)0x4004C02C // Pin Control Register n -#define PORTD_PCR12 *(volatile uint32_t *)0x4004C030 // Pin Control Register n -#define PORTD_PCR13 *(volatile uint32_t *)0x4004C034 // Pin Control Register n -#define PORTD_PCR14 *(volatile uint32_t *)0x4004C038 // Pin Control Register n -#define PORTD_PCR15 *(volatile uint32_t *)0x4004C03C // Pin Control Register n -#define PORTD_PCR16 *(volatile uint32_t *)0x4004C040 // Pin Control Register n -#define PORTD_PCR17 *(volatile uint32_t *)0x4004C044 // Pin Control Register n -#define PORTD_PCR18 *(volatile uint32_t *)0x4004C048 // Pin Control Register n -#define PORTD_PCR19 *(volatile uint32_t *)0x4004C04C // Pin Control Register n -#define PORTD_PCR20 *(volatile uint32_t *)0x4004C050 // Pin Control Register n -#define PORTD_PCR21 *(volatile uint32_t *)0x4004C054 // Pin Control Register n -#define PORTD_PCR22 *(volatile uint32_t *)0x4004C058 // Pin Control Register n -#define PORTD_PCR23 *(volatile uint32_t *)0x4004C05C // Pin Control Register n -#define PORTD_PCR24 *(volatile uint32_t *)0x4004C060 // Pin Control Register n -#define PORTD_PCR25 *(volatile uint32_t *)0x4004C064 // Pin Control Register n -#define PORTD_PCR26 *(volatile uint32_t *)0x4004C068 // Pin Control Register n -#define PORTD_PCR27 *(volatile uint32_t *)0x4004C06C // Pin Control Register n -#define PORTD_PCR28 *(volatile uint32_t *)0x4004C070 // Pin Control Register n -#define PORTD_PCR29 *(volatile uint32_t *)0x4004C074 // Pin Control Register n -#define PORTD_PCR30 *(volatile uint32_t *)0x4004C078 // Pin Control Register n -#define PORTD_PCR31 *(volatile uint32_t *)0x4004C07C // Pin Control Register n -#define PORTD_GPCLR *(volatile uint32_t *)0x4004C080 // Global Pin Control Low Register -#define PORTD_GPCHR *(volatile uint32_t *)0x4004C084 // Global Pin Control High Register -#define PORTD_ISFR *(volatile uint32_t *)0x4004C0A0 // Interrupt Status Flag Register -#define PORTE_PCR0 *(volatile uint32_t *)0x4004D000 // Pin Control Register n -#define PORTE_PCR1 *(volatile uint32_t *)0x4004D004 // Pin Control Register n -#define PORTE_PCR2 *(volatile uint32_t *)0x4004D008 // Pin Control Register n -#define PORTE_PCR3 *(volatile uint32_t *)0x4004D00C // Pin Control Register n -#define PORTE_PCR4 *(volatile uint32_t *)0x4004D010 // Pin Control Register n -#define PORTE_PCR5 *(volatile uint32_t *)0x4004D014 // Pin Control Register n -#define PORTE_PCR6 *(volatile uint32_t *)0x4004D018 // Pin Control Register n -#define PORTE_PCR7 *(volatile uint32_t *)0x4004D01C // Pin Control Register n -#define PORTE_PCR8 *(volatile uint32_t *)0x4004D020 // Pin Control Register n -#define PORTE_PCR9 *(volatile uint32_t *)0x4004D024 // Pin Control Register n -#define PORTE_PCR10 *(volatile uint32_t *)0x4004D028 // Pin Control Register n -#define PORTE_PCR11 *(volatile uint32_t *)0x4004D02C // Pin Control Register n -#define PORTE_PCR12 *(volatile uint32_t *)0x4004D030 // Pin Control Register n -#define PORTE_PCR13 *(volatile uint32_t *)0x4004D034 // Pin Control Register n -#define PORTE_PCR14 *(volatile uint32_t *)0x4004D038 // Pin Control Register n -#define PORTE_PCR15 *(volatile uint32_t *)0x4004D03C // Pin Control Register n -#define PORTE_PCR16 *(volatile uint32_t *)0x4004D040 // Pin Control Register n -#define PORTE_PCR17 *(volatile uint32_t *)0x4004D044 // Pin Control Register n -#define PORTE_PCR18 *(volatile uint32_t *)0x4004D048 // Pin Control Register n -#define PORTE_PCR19 *(volatile uint32_t *)0x4004D04C // Pin Control Register n -#define PORTE_PCR20 *(volatile uint32_t *)0x4004D050 // Pin Control Register n -#define PORTE_PCR21 *(volatile uint32_t *)0x4004D054 // Pin Control Register n -#define PORTE_PCR22 *(volatile uint32_t *)0x4004D058 // Pin Control Register n -#define PORTE_PCR23 *(volatile uint32_t *)0x4004D05C // Pin Control Register n -#define PORTE_PCR24 *(volatile uint32_t *)0x4004D060 // Pin Control Register n -#define PORTE_PCR25 *(volatile uint32_t *)0x4004D064 // Pin Control Register n -#define PORTE_PCR26 *(volatile uint32_t *)0x4004D068 // Pin Control Register n -#define PORTE_PCR27 *(volatile uint32_t *)0x4004D06C // Pin Control Register n -#define PORTE_PCR28 *(volatile uint32_t *)0x4004D070 // Pin Control Register n -#define PORTE_PCR29 *(volatile uint32_t *)0x4004D074 // Pin Control Register n -#define PORTE_PCR30 *(volatile uint32_t *)0x4004D078 // Pin Control Register n -#define PORTE_PCR31 *(volatile uint32_t *)0x4004D07C // Pin Control Register n -#define PORTE_GPCLR *(volatile uint32_t *)0x4004D080 // Global Pin Control Low Register -#define PORTE_GPCHR *(volatile uint32_t *)0x4004D084 // Global Pin Control High Register -#define PORTE_ISFR *(volatile uint32_t *)0x4004D0A0 // Interrupt Status Flag Register - -// Chapter 12: System Integration Module (SIM) -#define SIM_SOPT1 *(volatile uint32_t *)0x40047000 // System Options Register 1 -#define SIM_SOPT1CFG *(volatile uint32_t *)0x40047004 // SOPT1 Configuration Register -#define SIM_SOPT2 *(volatile uint32_t *)0x40048004 // System Options Register 2 -#define SIM_SOPT2_USBSRC (uint32_t)0x00040000 // 0=USB_CLKIN, 1=FFL/PLL -#define SIM_SOPT2_PLLFLLSEL (uint32_t)0x00010000 // 0=FLL, 1=PLL -#define SIM_SOPT2_TRACECLKSEL (uint32_t)0x00001000 // 0=MCGOUTCLK, 1=CPU -#define SIM_SOPT2_PTD7PAD (uint32_t)0x00000800 // 0=normal, 1=double drive PTD7 -#define SIM_SOPT2_CLKOUTSEL(n) (uint32_t)(((n) & 7) << 5) // Selects the clock to output on the CLKOUT pin. -#define SIM_SOPT2_RTCCLKOUTSEL (uint32_t)0x00000010 // RTC clock out select -#define SIM_SOPT4 *(volatile uint32_t *)0x4004800C // System Options Register 4 -#define SIM_SOPT5 *(volatile uint32_t *)0x40048010 // System Options Register 5 -#define SIM_SOPT7 *(volatile uint32_t *)0x40048018 // System Options Register 7 -#define SIM_SDID *(const uint32_t *)0x40048024 // System Device Identification Register -#define SIM_SCGC2 *(volatile uint32_t *)0x4004802C // System Clock Gating Control Register 2 -#define SIM_SCGC2_DAC0 (uint32_t)0x00001000 // DAC0 Clock Gate Control -#define SIM_SCGC3 *(volatile uint32_t *)0x40048030 // System Clock Gating Control Register 3 -#define SIM_SCGC3_ADC1 (uint32_t)0x08000000 // ADC1 Clock Gate Control -#define SIM_SCGC3_FTM2 (uint32_t)0x01000000 // FTM2 Clock Gate Control -#define SIM_SCGC4 *(volatile uint32_t *)0x40048034 // System Clock Gating Control Register 4 -#define SIM_SCGC4_VREF (uint32_t)0x00100000 // VREF Clock Gate Control -#define SIM_SCGC4_CMP (uint32_t)0x00080000 // Comparator Clock Gate Control -#define SIM_SCGC4_USBOTG (uint32_t)0x00040000 // USB Clock Gate Control -#define SIM_SCGC4_UART2 (uint32_t)0x00001000 // UART2 Clock Gate Control -#define SIM_SCGC4_UART1 (uint32_t)0x00000800 // UART1 Clock Gate Control -#define SIM_SCGC4_UART0 (uint32_t)0x00000400 // UART0 Clock Gate Control -#define SIM_SCGC4_I2C1 (uint32_t)0x00000080 // I2C1 Clock Gate Control -#define SIM_SCGC4_I2C0 (uint32_t)0x00000040 // I2C0 Clock Gate Control -#define SIM_SCGC4_CMT (uint32_t)0x00000004 // CMT Clock Gate Control -#define SIM_SCGC4_EWM (uint32_t)0x00000002 // EWM Clock Gate Control -#define SIM_SCGC5 *(volatile uint32_t *)0x40048038 // System Clock Gating Control Register 5 -#define SIM_SCGC5_PORTE (uint32_t)0x00002000 // Port E Clock Gate Control -#define SIM_SCGC5_PORTD (uint32_t)0x00001000 // Port D Clock Gate Control -#define SIM_SCGC5_PORTC (uint32_t)0x00000800 // Port C Clock Gate Control -#define SIM_SCGC5_PORTB (uint32_t)0x00000400 // Port B Clock Gate Control -#define SIM_SCGC5_PORTA (uint32_t)0x00000200 // Port A Clock Gate Control -#define SIM_SCGC5_TSI (uint32_t)0x00000020 // Touch Sense Input TSI Clock Gate Control -#define SIM_SCGC5_LPTIMER (uint32_t)0x00000001 // Low Power Timer Access Control -#define SIM_SCGC6 *(volatile uint32_t *)0x4004803C // System Clock Gating Control Register 6 -#define SIM_SCGC6_RTC (uint32_t)0x20000000 // RTC Access -#define SIM_SCGC6_ADC0 (uint32_t)0x08000000 // ADC0 Clock Gate Control -#define SIM_SCGC6_FTM1 (uint32_t)0x02000000 // FTM1 Clock Gate Control -#define SIM_SCGC6_FTM0 (uint32_t)0x01000000 // FTM0 Clock Gate Control -#define SIM_SCGC6_PIT (uint32_t)0x00800000 // PIT Clock Gate Control -#define SIM_SCGC6_PDB (uint32_t)0x00400000 // PDB Clock Gate Control -#define SIM_SCGC6_USBDCD (uint32_t)0x00200000 // USB DCD Clock Gate Control -#define SIM_SCGC6_CRC (uint32_t)0x00040000 // CRC Clock Gate Control -#define SIM_SCGC6_I2S (uint32_t)0x00008000 // I2S Clock Gate Control -#define SIM_SCGC6_SPI1 (uint32_t)0x00002000 // SPI1 Clock Gate Control -#define SIM_SCGC6_SPI0 (uint32_t)0x00001000 // SPI0 Clock Gate Control -#define SIM_SCGC6_FLEXCAN0 (uint32_t)0x00000010 // FlexCAN0 Clock Gate Control -#define SIM_SCGC6_DMAMUX (uint32_t)0x00000002 // DMA Mux Clock Gate Control -#define SIM_SCGC6_FTFL (uint32_t)0x00000001 // Flash Memory Clock Gate Control -#define SIM_SCGC7 *(volatile uint32_t *)0x40048040 // System Clock Gating Control Register 7 -#define SIM_SCGC7_DMA (uint32_t)0x00000002 // DMA Clock Gate Control -#define SIM_CLKDIV1 *(volatile uint32_t *)0x40048044 // System Clock Divider Register 1 -#define SIM_CLKDIV1_OUTDIV1(n) (uint32_t)(((n) & 0x0F) << 28) // divide value for the core/system clock -#define SIM_CLKDIV1_OUTDIV2(n) (uint32_t)(((n) & 0x0F) << 24) // divide value for the peripheral clock -#define SIM_CLKDIV1_OUTDIV4(n) (uint32_t)(((n) & 0x0F) << 16) // divide value for the flash clock -#define SIM_CLKDIV2 *(volatile uint32_t *)0x40048048 // System Clock Divider Register 2 -#define SIM_CLKDIV2_USBDIV(n) (uint32_t)(((n) & 0x07) << 1) -#define SIM_CLKDIV2_USBFRAC (uint32_t)0x01 -#define SIM_FCFG1 *(const uint32_t *)0x4004804C // Flash Configuration Register 1 -#define SIM_FCFG2 *(const uint32_t *)0x40048050 // Flash Configuration Register 2 -#define SIM_UIDH *(const uint32_t *)0x40048054 // Unique Identification Register High -#define SIM_UIDMH *(const uint32_t *)0x40048058 // Unique Identification Register Mid-High -#define SIM_UIDML *(const uint32_t *)0x4004805C // Unique Identification Register Mid Low -#define SIM_UIDL *(const uint32_t *)0x40048060 // Unique Identification Register Low - -// Chapter 13: Reset Control Module (RCM) -#define RCM_SRS0 *(volatile uint8_t *)0x4007F000 // System Reset Status Register 0 -#define RCM_SRS1 *(volatile uint8_t *)0x4007F001 // System Reset Status Register 1 -#define RCM_RPFC *(volatile uint8_t *)0x4007F004 // Reset Pin Filter Control Register -#define RCM_RPFW *(volatile uint8_t *)0x4007F005 // Reset Pin Filter Width Register -#define RCM_MR *(volatile uint8_t *)0x4007F007 // Mode Register - -// Chapter 14: System Mode Controller -#define SMC_PMPROT *(volatile uint8_t *)0x4007E000 // Power Mode Protection Register -#define SMC_PMPROT_AVLP (uint8_t)0x20 // Allow very low power modes -#define SMC_PMPROT_ALLS (uint8_t)0x08 // Allow low leakage stop mode -#define SMC_PMPROT_AVLLS (uint8_t)0x02 // Allow very low leakage stop mode -#define SMC_PMCTRL *(volatile uint8_t *)0x4007E001 // Power Mode Control Register -#define SMC_PMCTRL_LPWUI (uint8_t)0x80 // Low Power Wake Up on Interrupt -#define SMC_PMCTRL_RUNM(n) (uint8_t)(((n) & 0x03) << 5) // Run Mode Control -#define SMC_PMCTRL_STOPA (uint8_t)0x08 // Stop Aborted -#define SMC_PMCTRL_STOPM(n) (uint8_t)((n) & 0x07) // Stop Mode Control -#define SMC_VLLSCTRL *(volatile uint8_t *)0x4007E002 // VLLS Control Register -#define SMC_VLLSCTRL_PORPO (uint8_t)0x20 // POR Power Option -#define SMC_VLLSCTRL_VLLSM(n) (uint8_t)((n) & 0x07) // VLLS Mode Control -#define SMC_PMSTAT *(volatile uint8_t *)0x4007E003 // Power Mode Status Register -#define SMC_PMSTAT_RUN (uint8_t)0x01 // Current power mode is RUN -#define SMC_PMSTAT_STOP (uint8_t)0x02 // Current power mode is STOP -#define SMC_PMSTAT_VLPR (uint8_t)0x04 // Current power mode is VLPR -#define SMC_PMSTAT_VLPW (uint8_t)0x08 // Current power mode is VLPW -#define SMC_PMSTAT_VLPS (uint8_t)0x10 // Current power mode is VLPS -#define SMC_PMSTAT_LLS (uint8_t)0x20 // Current power mode is LLS -#define SMC_PMSTAT_VLLS (uint8_t)0x40 // Current power mode is VLLS - -// Chapter 15: Power Management Controller -#define PMC_LVDSC1 *(volatile uint8_t *)0x4007D000 // Low Voltage Detect Status And Control 1 register -#define PMC_LVDSC1_LVDF (uint8_t)0x80 // Low-Voltage Detect Flag -#define PMC_LVDSC1_LVDACK (uint8_t)0x40 // Low-Voltage Detect Acknowledge -#define PMC_LVDSC1_LVDIE (uint8_t)0x20 // Low-Voltage Detect Interrupt Enable -#define PMC_LVDSC1_LVDRE (uint8_t)0x10 // Low-Voltage Detect Reset Enable -#define PMC_LVDSC1_LVDV(n) (uint8_t)((n) & 0x03) // Low-Voltage Detect Voltage Select -#define PMC_LVDSC2 *(volatile uint8_t *)0x4007D001 // Low Voltage Detect Status And Control 2 register -#define PMC_LVDSC2_LVWF (uint8_t)0x80 // Low-Voltage Warning Flag -#define PMC_LVDSC2_LVWACK (uint8_t)0x40 // Low-Voltage Warning Acknowledge -#define PMC_LVDSC2_LVWIE (uint8_t)0x20 // Low-Voltage Warning Interrupt Enable -#define PMC_LVDSC2_LVWV(n) (uint8_t)((n) & 0x03) // Low-Voltage Warning Voltage Select -#define PMC_REGSC *(volatile uint8_t *)0x4007D002 // Regulator Status And Control register -#define PMC_REGSC_BGEN (uint8_t)0x10 // Bandgap Enable In VLPx Operation -#define PMC_REGSC_ACKISO (uint8_t)0x08 // Acknowledge Isolation -#define PMC_REGSC_REGONS (uint8_t)0x04 // Regulator In Run Regulation Status -#define PMC_REGSC_BGBE (uint8_t)0x01 // Bandgap Buffer Enable - -// Chapter 16: Low-Leakage Wakeup Unit (LLWU) -#define LLWU_PE1 *(volatile uint8_t *)0x4007C000 // LLWU Pin Enable 1 register -#define LLWU_PE2 *(volatile uint8_t *)0x4007C001 // LLWU Pin Enable 2 register -#define LLWU_PE3 *(volatile uint8_t *)0x4007C002 // LLWU Pin Enable 3 register -#define LLWU_PE4 *(volatile uint8_t *)0x4007C003 // LLWU Pin Enable 4 register -#define LLWU_ME *(volatile uint8_t *)0x4007C004 // LLWU Module Enable register -#define LLWU_F1 *(volatile uint8_t *)0x4007C005 // LLWU Flag 1 register -#define LLWU_F2 *(volatile uint8_t *)0x4007C006 // LLWU Flag 2 register -#define LLWU_F3 *(volatile uint8_t *)0x4007C007 // LLWU Flag 3 register -#define LLWU_FILT1 *(volatile uint8_t *)0x4007C008 // LLWU Pin Filter 1 register -#define LLWU_FILT2 *(volatile uint8_t *)0x4007C009 // LLWU Pin Filter 2 register -#define LLWU_RST *(volatile uint8_t *)0x4007C00A // LLWU Reset Enable register - -// Chapter 17: Miscellaneous Control Module (MCM) -#define MCM_PLASC *(volatile uint16_t *)0xE0080008 // Crossbar Switch (AXBS) Slave Configuration -#define MCM_PLAMC *(volatile uint16_t *)0xE008000A // Crossbar Switch (AXBS) Master Configuration -#define MCM_PLACR *(volatile uint32_t *)0xE008000C // Crossbar Switch (AXBS) Control Register (MK20DX128) -#define MCM_PLACR_ARG (uint32_t)0x00000200 // Arbitration select, 0=fixed, 1=round-robin -#define MCM_CR *(volatile uint32_t *)0xE008000C // RAM arbitration control register (MK20DX256) -#define MCM_CR_SRAMLWP (uint32_t)0x40000000 // SRAM_L write protect -#define MCM_CR_SRAMLAP(n) (uint32_t)(((n) & 0x03) << 28) // SRAM_L priority, 0=RR, 1=favor DMA, 2=CPU, 3=DMA -#define MCM_CR_SRAMUWP (uint32_t)0x04000000 // SRAM_U write protect -#define MCM_CR_SRAMUAP(n) (uint32_t)(((n) & 0x03) << 24) // SRAM_U priority, 0=RR, 1=favor DMA, 2=CPU, 3=DMA - -// Crossbar Switch (AXBS) - only programmable on MK20DX256 -#define AXBS_PRS0 *(volatile uint32_t *)0x40004000 // Priority Registers Slave 0 -#define AXBS_CRS0 *(volatile uint32_t *)0x40004010 // Control Register 0 -#define AXBS_PRS1 *(volatile uint32_t *)0x40004100 // Priority Registers Slave 1 -#define AXBS_CRS1 *(volatile uint32_t *)0x40004110 // Control Register 1 -#define AXBS_PRS2 *(volatile uint32_t *)0x40004200 // Priority Registers Slave 2 -#define AXBS_CRS2 *(volatile uint32_t *)0x40004210 // Control Register 2 -#define AXBS_PRS3 *(volatile uint32_t *)0x40004300 // Priority Registers Slave 3 -#define AXBS_CRS3 *(volatile uint32_t *)0x40004310 // Control Register 3 -#define AXBS_PRS4 *(volatile uint32_t *)0x40004400 // Priority Registers Slave 4 -#define AXBS_CRS4 *(volatile uint32_t *)0x40004410 // Control Register 4 -#define AXBS_PRS5 *(volatile uint32_t *)0x40004500 // Priority Registers Slave 5 -#define AXBS_CRS5 *(volatile uint32_t *)0x40004510 // Control Register 5 -#define AXBS_PRS6 *(volatile uint32_t *)0x40004600 // Priority Registers Slave 6 -#define AXBS_CRS6 *(volatile uint32_t *)0x40004610 // Control Register 6 -#define AXBS_PRS7 *(volatile uint32_t *)0x40004700 // Priority Registers Slave 7 -#define AXBS_CRS7 *(volatile uint32_t *)0x40004710 // Control Register 7 -#define AXBS_MGPCR0 *(volatile uint32_t *)0x40004800 // Master 0 General Purpose Control Register -#define AXBS_MGPCR1 *(volatile uint32_t *)0x40004900 // Master 1 General Purpose Control Register -#define AXBS_MGPCR2 *(volatile uint32_t *)0x40004A00 // Master 2 General Purpose Control Register -#define AXBS_MGPCR3 *(volatile uint32_t *)0x40004B00 // Master 3 General Purpose Control Register -#define AXBS_MGPCR4 *(volatile uint32_t *)0x40004C00 // Master 4 General Purpose Control Register -#define AXBS_MGPCR5 *(volatile uint32_t *)0x40004D00 // Master 5 General Purpose Control Register -#define AXBS_MGPCR6 *(volatile uint32_t *)0x40004E00 // Master 6 General Purpose Control Register -#define AXBS_MGPCR7 *(volatile uint32_t *)0x40004F00 // Master 7 General Purpose Control Register -#define AXBS_CRS_READONLY (uint32_t)0x80000000 -#define AXBS_CRS_HALTLOWPRIORITY (uint32_t)0x40000000 -#define AXBS_CRS_ARB_FIXED (uint32_t)0x00000000 -#define AXBS_CRS_ARB_ROUNDROBIN (uint32_t)0x00010000 -#define AXBS_CRS_PARK_FIXED (uint32_t)0x00000000 -#define AXBS_CRS_PARK_PREVIOUS (uint32_t)0x00000010 -#define AXBS_CRS_PARK_NONE (uint32_t)0x00000020 -#define AXBS_CRS_PARK(n) (uint32_t)(((n) & 7) << 0) - - - -// Chapter 20: Direct Memory Access Multiplexer (DMAMUX) -#define DMAMUX0_CHCFG0 *(volatile uint8_t *)0x40021000 // Channel Configuration register -#define DMAMUX0_CHCFG1 *(volatile uint8_t *)0x40021001 // Channel Configuration register -#define DMAMUX0_CHCFG2 *(volatile uint8_t *)0x40021002 // Channel Configuration register -#define DMAMUX0_CHCFG3 *(volatile uint8_t *)0x40021003 // Channel Configuration register -#define DMAMUX0_CHCFG4 *(volatile uint8_t *)0x40021004 // Channel Configuration register -#define DMAMUX0_CHCFG5 *(volatile uint8_t *)0x40021005 // Channel Configuration register -#define DMAMUX0_CHCFG6 *(volatile uint8_t *)0x40021006 // Channel Configuration register -#define DMAMUX0_CHCFG7 *(volatile uint8_t *)0x40021007 // Channel Configuration register -#define DMAMUX0_CHCFG8 *(volatile uint8_t *)0x40021008 // Channel Configuration register -#define DMAMUX0_CHCFG9 *(volatile uint8_t *)0x40021009 // Channel Configuration register -#define DMAMUX0_CHCFG10 *(volatile uint8_t *)0x4002100A // Channel Configuration register -#define DMAMUX0_CHCFG11 *(volatile uint8_t *)0x4002100B // Channel Configuration register -#define DMAMUX0_CHCFG12 *(volatile uint8_t *)0x4002100C // Channel Configuration register -#define DMAMUX0_CHCFG13 *(volatile uint8_t *)0x4002100D // Channel Configuration register -#define DMAMUX0_CHCFG14 *(volatile uint8_t *)0x4002100E // Channel Configuration register -#define DMAMUX0_CHCFG15 *(volatile uint8_t *)0x4002100F // Channel Configuration register -#define DMAMUX_DISABLE 0 -#define DMAMUX_TRIG 64 -#define DMAMUX_ENABLE 128 -#define DMAMUX_SOURCE_UART0_RX 2 -#define DMAMUX_SOURCE_UART0_TX 3 -#define DMAMUX_SOURCE_UART1_RX 4 -#define DMAMUX_SOURCE_UART1_TX 5 -#define DMAMUX_SOURCE_UART2_RX 6 -#define DMAMUX_SOURCE_UART2_TX 7 -#define DMAMUX_SOURCE_I2S0_RX 14 -#define DMAMUX_SOURCE_I2S0_TX 15 -#define DMAMUX_SOURCE_SPI0_RX 16 -#define DMAMUX_SOURCE_SPI0_TX 17 -#define DMAMUX_SOURCE_I2C0 22 -#define DMAMUX_SOURCE_I2C1 23 -#define DMAMUX_SOURCE_FTM0_CH0 24 -#define DMAMUX_SOURCE_FTM0_CH1 25 -#define DMAMUX_SOURCE_FTM0_CH2 26 -#define DMAMUX_SOURCE_FTM0_CH3 27 -#define DMAMUX_SOURCE_FTM0_CH4 28 -#define DMAMUX_SOURCE_FTM0_CH5 29 -#define DMAMUX_SOURCE_FTM0_CH6 30 -#define DMAMUX_SOURCE_FTM0_CH7 31 -#define DMAMUX_SOURCE_FTM1_CH0 32 -#define DMAMUX_SOURCE_FTM1_CH1 33 -#define DMAMUX_SOURCE_FTM2_CH0 34 -#define DMAMUX_SOURCE_FTM2_CH1 35 -#define DMAMUX_SOURCE_ADC0 40 -#define DMAMUX_SOURCE_ADC1 41 -#define DMAMUX_SOURCE_CMP0 42 -#define DMAMUX_SOURCE_CMP1 43 -#define DMAMUX_SOURCE_CMP2 44 -#define DMAMUX_SOURCE_DAC0 45 -#define DMAMUX_SOURCE_CMT 47 -#define DMAMUX_SOURCE_PDB 48 -#define DMAMUX_SOURCE_PORTA 49 -#define DMAMUX_SOURCE_PORTB 50 -#define DMAMUX_SOURCE_PORTC 51 -#define DMAMUX_SOURCE_PORTD 52 -#define DMAMUX_SOURCE_PORTE 53 -#define DMAMUX_SOURCE_ALWAYS0 54 -#define DMAMUX_SOURCE_ALWAYS1 55 -#define DMAMUX_SOURCE_ALWAYS2 56 -#define DMAMUX_SOURCE_ALWAYS3 57 -#define DMAMUX_SOURCE_ALWAYS4 58 -#define DMAMUX_SOURCE_ALWAYS5 59 -#define DMAMUX_SOURCE_ALWAYS6 60 -#define DMAMUX_SOURCE_ALWAYS7 61 -#define DMAMUX_SOURCE_ALWAYS8 62 -#define DMAMUX_SOURCE_ALWAYS9 63 - -// Chapter 21: Direct Memory Access Controller (eDMA) -#define DMA_CR *(volatile uint32_t *)0x40008000 // Control Register -#define DMA_CR_CX ((uint32_t)(1<<17)) // Cancel Transfer -#define DMA_CR_ECX ((uint32_t)(1<<16)) // Error Cancel Transfer -#define DMA_CR_EMLM ((uint32_t)0x80) // Enable Minor Loop Mapping -#define DMA_CR_CLM ((uint32_t)0x40) // Continuous Link Mode -#define DMA_CR_HALT ((uint32_t)0x20) // Halt DMA Operations -#define DMA_CR_HOE ((uint32_t)0x10) // Halt On Error -#define DMA_CR_ERCA ((uint32_t)0x04) // Enable Round Robin Channel Arbitration -#define DMA_CR_EDBG ((uint32_t)0x02) // Enable Debug -#define DMA_ES *(volatile uint32_t *)0x40008004 // Error Status Register -#define DMA_ERQ *(volatile uint32_t *)0x4000800C // Enable Request Register -#define DMA_ERQ_ERQ0 ((uint32_t)1<<0) // Enable DMA Request 0 -#define DMA_ERQ_ERQ1 ((uint32_t)1<<1) // Enable DMA Request 1 -#define DMA_ERQ_ERQ2 ((uint32_t)1<<2) // Enable DMA Request 2 -#define DMA_ERQ_ERQ3 ((uint32_t)1<<3) // Enable DMA Request 3 -#define DMA_ERQ_ERQ4 ((uint32_t)1<<4) // Enable DMA Request 4 -#define DMA_ERQ_ERQ5 ((uint32_t)1<<5) // Enable DMA Request 5 -#define DMA_ERQ_ERQ6 ((uint32_t)1<<6) // Enable DMA Request 6 -#define DMA_ERQ_ERQ7 ((uint32_t)1<<7) // Enable DMA Request 7 -#define DMA_ERQ_ERQ8 ((uint32_t)1<<8) // Enable DMA Request 8 -#define DMA_ERQ_ERQ9 ((uint32_t)1<<9) // Enable DMA Request 9 -#define DMA_ERQ_ERQ10 ((uint32_t)1<<10) // Enable DMA Request 10 -#define DMA_ERQ_ERQ11 ((uint32_t)1<<11) // Enable DMA Request 11 -#define DMA_ERQ_ERQ12 ((uint32_t)1<<12) // Enable DMA Request 12 -#define DMA_ERQ_ERQ13 ((uint32_t)1<<13) // Enable DMA Request 13 -#define DMA_ERQ_ERQ14 ((uint32_t)1<<14) // Enable DMA Request 14 -#define DMA_ERQ_ERQ15 ((uint32_t)1<<15) // Enable DMA Request 15 -#define DMA_EEI *(volatile uint32_t *)0x40008014 // Enable Error Interrupt Register -#define DMA_EEI_EEI0 ((uint32_t)1<<0) // Enable Error Interrupt 0 -#define DMA_EEI_EEI1 ((uint32_t)1<<1) // Enable Error Interrupt 1 -#define DMA_EEI_EEI2 ((uint32_t)1<<2) // Enable Error Interrupt 2 -#define DMA_EEI_EEI3 ((uint32_t)1<<3) // Enable Error Interrupt 3 -#define DMA_EEI_EEI4 ((uint32_t)1<<4) // Enable Error Interrupt 4 -#define DMA_EEI_EEI5 ((uint32_t)1<<5) // Enable Error Interrupt 5 -#define DMA_EEI_EEI6 ((uint32_t)1<<6) // Enable Error Interrupt 6 -#define DMA_EEI_EEI7 ((uint32_t)1<<7) // Enable Error Interrupt 7 -#define DMA_EEI_EEI8 ((uint32_t)1<<8) // Enable Error Interrupt 8 -#define DMA_EEI_EEI9 ((uint32_t)1<<9) // Enable Error Interrupt 9 -#define DMA_EEI_EEI10 ((uint32_t)1<<10) // Enable Error Interrupt 10 -#define DMA_EEI_EEI11 ((uint32_t)1<<11) // Enable Error Interrupt 11 -#define DMA_EEI_EEI12 ((uint32_t)1<<12) // Enable Error Interrupt 12 -#define DMA_EEI_EEI13 ((uint32_t)1<<13) // Enable Error Interrupt 13 -#define DMA_EEI_EEI14 ((uint32_t)1<<14) // Enable Error Interrupt 14 -#define DMA_EEI_EEI15 ((uint32_t)1<<15) // Enable Error Interrupt 15 -#define DMA_CEEI *(volatile uint8_t *)0x40008018 // Clear Enable Error Interrupt Register -#define DMA_CEEI_CEEI(n) ((uint8_t)(n & 15)<<0) // Clear Enable Error Interrupt -#define DMA_CEEI_CAEE ((uint8_t)1<<6) // Clear All Enable Error Interrupts -#define DMA_CEEI_NOP ((uint8_t)1<<7) // NOP -#define DMA_SEEI *(volatile uint8_t *)0x40008019 // Set Enable Error Interrupt Register -#define DMA_SEEI_SEEI(n) ((uint8_t)(n & 15)<<0) // Set Enable Error Interrupt -#define DMA_SEEI_SAEE ((uint8_t)1<<6) // Set All Enable Error Interrupts -#define DMA_SEEI_NOP ((uint8_t)1<<7) // NOP -#define DMA_CERQ *(volatile uint8_t *)0x4000801A // Clear Enable Request Register -#define DMA_CERQ_CERQ(n) ((uint8_t)(n & 15)<<0) // Clear Enable Request -#define DMA_CERQ_CAER ((uint8_t)1<<6) // Clear All Enable Requests -#define DMA_CERQ_NOP ((uint8_t)1<<7) // NOP -#define DMA_SERQ *(volatile uint8_t *)0x4000801B // Set Enable Request Register -#define DMA_SERQ_SERQ(n) ((uint8_t)(n & 15)<<0) // Set Enable Request -#define DMA_SERQ_SAER ((uint8_t)1<<6) // Set All Enable Requests -#define DMA_SERQ_NOP ((uint8_t)1<<7) // NOP -#define DMA_CDNE *(volatile uint8_t *)0x4000801C // Clear DONE Status Bit Register -#define DMA_CDNE_CDNE(n) ((uint8_t)(n & 15)<<0) // Clear Done Bit -#define DMA_CDNE_CADN ((uint8_t)1<<6) // Clear All Done Bits -#define DMA_CDNE_NOP ((uint8_t)1<<7) // NOP -#define DMA_SSRT *(volatile uint8_t *)0x4000801D // Set START Bit Register -#define DMA_SSRT_SSRT(n) ((uint8_t)(n & 15)<<0) // Set Start Bit -#define DMA_SSRT_SAST ((uint8_t)1<<6) // Set All Start Bits -#define DMA_SSRT_NOP ((uint8_t)1<<7) // NOP -#define DMA_CERR *(volatile uint8_t *)0x4000801E // Clear Error Register -#define DMA_CERR_CERR(n) ((uint8_t)(n & 15)<<0) // Clear Error Indicator -#define DMA_CERR_CAEI ((uint8_t)1<<6) // Clear All Error Indicators -#define DMA_CERR_NOP ((uint8_t)1<<7) // NOP -#define DMA_CINT *(volatile uint8_t *)0x4000801F // Clear Interrupt Request Register -#define DMA_CINT_CINT(n) ((uint8_t)(n & 15)<<0) // Clear Interrupt Request -#define DMA_CINT_CAIR ((uint8_t)1<<6) // Clear All Interrupt Requests -#define DMA_CINT_NOP ((uint8_t)1<<7) // NOP -#define DMA_INT *(volatile uint32_t *)0x40008024 // Interrupt Request Register -#define DMA_INT_INT0 ((uint32_t)1<<0) // Interrupt Request 0 -#define DMA_INT_INT1 ((uint32_t)1<<1) // Interrupt Request 1 -#define DMA_INT_INT2 ((uint32_t)1<<2) // Interrupt Request 2 -#define DMA_INT_INT3 ((uint32_t)1<<3) // Interrupt Request 3 -#define DMA_INT_INT4 ((uint32_t)1<<4) // Interrupt Request 4 -#define DMA_INT_INT5 ((uint32_t)1<<5) // Interrupt Request 5 -#define DMA_INT_INT6 ((uint32_t)1<<6) // Interrupt Request 6 -#define DMA_INT_INT7 ((uint32_t)1<<7) // Interrupt Request 7 -#define DMA_INT_INT8 ((uint32_t)1<<8) // Interrupt Request 8 -#define DMA_INT_INT9 ((uint32_t)1<<9) // Interrupt Request 9 -#define DMA_INT_INT10 ((uint32_t)1<<10) // Interrupt Request 10 -#define DMA_INT_INT11 ((uint32_t)1<<11) // Interrupt Request 11 -#define DMA_INT_INT12 ((uint32_t)1<<12) // Interrupt Request 12 -#define DMA_INT_INT13 ((uint32_t)1<<13) // Interrupt Request 13 -#define DMA_INT_INT14 ((uint32_t)1<<14) // Interrupt Request 14 -#define DMA_INT_INT15 ((uint32_t)1<<15) // Interrupt Request 15 -#define DMA_ERR *(volatile uint32_t *)0x4000802C // Error Register -#define DMA_ERR_ERR0 ((uint32_t)1<<0) // Error in Channel 0 -#define DMA_ERR_ERR1 ((uint32_t)1<<1) // Error in Channel 1 -#define DMA_ERR_ERR2 ((uint32_t)1<<2) // Error in Channel 2 -#define DMA_ERR_ERR3 ((uint32_t)1<<3) // Error in Channel 3 -#define DMA_ERR_ERR4 ((uint32_t)1<<4) // Error in Channel 4 -#define DMA_ERR_ERR5 ((uint32_t)1<<5) // Error in Channel 5 -#define DMA_ERR_ERR6 ((uint32_t)1<<6) // Error in Channel 6 -#define DMA_ERR_ERR7 ((uint32_t)1<<7) // Error in Channel 7 -#define DMA_ERR_ERR8 ((uint32_t)1<<8) // Error in Channel 8 -#define DMA_ERR_ERR9 ((uint32_t)1<<9) // Error in Channel 9 -#define DMA_ERR_ERR10 ((uint32_t)1<<10) // Error in Channel 10 -#define DMA_ERR_ERR11 ((uint32_t)1<<11) // Error in Channel 11 -#define DMA_ERR_ERR12 ((uint32_t)1<<12) // Error in Channel 12 -#define DMA_ERR_ERR13 ((uint32_t)1<<13) // Error in Channel 13 -#define DMA_ERR_ERR14 ((uint32_t)1<<14) // Error in Channel 14 -#define DMA_ERR_ERR15 ((uint32_t)1<<15) // Error in Channel 15 -#define DMA_HRS *(volatile uint32_t *)0x40008034 // Hardware Request Status Register -#define DMA_HRS_HRS0 ((uint32_t)1<<0) // Hardware Request Status Channel 0 -#define DMA_HRS_HRS1 ((uint32_t)1<<1) // Hardware Request Status Channel 1 -#define DMA_HRS_HRS2 ((uint32_t)1<<2) // Hardware Request Status Channel 2 -#define DMA_HRS_HRS3 ((uint32_t)1<<3) // Hardware Request Status Channel 3 -#define DMA_HRS_HRS4 ((uint32_t)1<<4) // Hardware Request Status Channel 4 -#define DMA_HRS_HRS5 ((uint32_t)1<<5) // Hardware Request Status Channel 5 -#define DMA_HRS_HRS6 ((uint32_t)1<<6) // Hardware Request Status Channel 6 -#define DMA_HRS_HRS7 ((uint32_t)1<<7) // Hardware Request Status Channel 7 -#define DMA_HRS_HRS8 ((uint32_t)1<<8) // Hardware Request Status Channel 8 -#define DMA_HRS_HRS9 ((uint32_t)1<<9) // Hardware Request Status Channel 9 -#define DMA_HRS_HRS10 ((uint32_t)1<<10) // Hardware Request Status Channel 10 -#define DMA_HRS_HRS11 ((uint32_t)1<<11) // Hardware Request Status Channel 11 -#define DMA_HRS_HRS12 ((uint32_t)1<<12) // Hardware Request Status Channel 12 -#define DMA_HRS_HRS13 ((uint32_t)1<<13) // Hardware Request Status Channel 13 -#define DMA_HRS_HRS14 ((uint32_t)1<<14) // Hardware Request Status Channel 14 -#define DMA_HRS_HRS15 ((uint32_t)1<<15) // Hardware Request Status Channel 15 -#define DMA_DCHPRI3 *(volatile uint8_t *)0x40008100 // Channel n Priority Register -#define DMA_DCHPRI2 *(volatile uint8_t *)0x40008101 // Channel n Priority Register -#define DMA_DCHPRI1 *(volatile uint8_t *)0x40008102 // Channel n Priority Register -#define DMA_DCHPRI0 *(volatile uint8_t *)0x40008103 // Channel n Priority Register -#define DMA_DCHPRI_CHPRI(n) ((uint8_t)(n & 15)<<0) // Channel Arbitration Priority -#define DMA_DCHPRI_DPA ((uint8_t)1<<6) // Disable PreEmpt Ability -#define DMA_DCHPRI_ECP ((uint8_t)1<<7) // Enable PreEmption -#define DMA_DCHPRI7 *(volatile uint8_t *)0x40008104 // Channel n Priority Register -#define DMA_DCHPRI6 *(volatile uint8_t *)0x40008105 // Channel n Priority Register -#define DMA_DCHPRI5 *(volatile uint8_t *)0x40008106 // Channel n Priority Register -#define DMA_DCHPRI4 *(volatile uint8_t *)0x40008107 // Channel n Priority Register -#define DMA_DCHPRI11 *(volatile uint8_t *)0x40008108 // Channel n Priority Register -#define DMA_DCHPRI10 *(volatile uint8_t *)0x40008109 // Channel n Priority Register -#define DMA_DCHPRI9 *(volatile uint8_t *)0x4000810A // Channel n Priority Register -#define DMA_DCHPRI8 *(volatile uint8_t *)0x4000810B // Channel n Priority Register -#define DMA_DCHPRI15 *(volatile uint8_t *)0x4000810C // Channel n Priority Register -#define DMA_DCHPRI14 *(volatile uint8_t *)0x4000810D // Channel n Priority Register -#define DMA_DCHPRI13 *(volatile uint8_t *)0x4000810E // Channel n Priority Register -#define DMA_DCHPRI12 *(volatile uint8_t *)0x4000810F // Channel n Priority Register - - -#define DMA_TCD_ATTR_SMOD(n) (((n) & 0x1F) << 11) -#define DMA_TCD_ATTR_SSIZE(n) (((n) & 0x7) << 8) -#define DMA_TCD_ATTR_DMOD(n) (((n) & 0x1F) << 3) -#define DMA_TCD_ATTR_DSIZE(n) (((n) & 0x7) << 0) -#define DMA_TCD_ATTR_SIZE_8BIT 0 -#define DMA_TCD_ATTR_SIZE_16BIT 1 -#define DMA_TCD_ATTR_SIZE_32BIT 2 -#define DMA_TCD_ATTR_SIZE_16BYTE 4 -#define DMA_TCD_ATTR_SIZE_32BYTE 5 -#define DMA_TCD_CSR_BWC(n) (((n) & 0x3) << 14) -#define DMA_TCD_CSR_MAJORLINKCH(n) (((n) & 0x3) << 8) -#define DMA_TCD_CSR_DONE 0x0080 -#define DMA_TCD_CSR_ACTIVE 0x0040 -#define DMA_TCD_CSR_MAJORELINK 0x0020 -#define DMA_TCD_CSR_ESG 0x0010 -#define DMA_TCD_CSR_DREQ 0x0008 -#define DMA_TCD_CSR_INTHALF 0x0004 -#define DMA_TCD_CSR_INTMAJOR 0x0002 -#define DMA_TCD_CSR_START 0x0001 -#define DMA_TCD_CITER_MASK ((uint16_t)0x7FFF) // Loop count mask -#define DMA_TCD_CITER_ELINK ((uint16_t)1<<15) // Enable channel linking on minor-loop complete -#define DMA_TCD_BITER_MASK ((uint16_t)0x7FFF) // Loop count mask -#define DMA_TCD_BITER_ELINK ((uint16_t)1<<15) // Enable channel linking on minor-loop complete -#define DMA_TCD_NBYTES_SMLOE ((uint32_t)1<<31) // Source Minor Loop Offset Enable -#define DMA_TCD_NBYTES_DMLOE ((uint32_t)1<<30) // Destination Minor Loop Offset Enable -#define DMA_TCD_NBYTES_MLOFFNO_NBYTES(n) ((uint32_t)(n)) // NBytes transfer count when minor loop disabled -#define DMA_TCD_NBYTES_MLOFFYES_NBYTES(n) ((uint32_t)(n & 0x1F)) // NBytes transfer count when minor loop enabled -#define DMA_TCD_NBYTES_MLOFFYES_MLOFF(n) ((uint32_t)(n & 0xFFFFF)<<10) // Offset - -#define DMA_TCD0_SADDR *(volatile const void * volatile *)0x40009000 // TCD Source Address -#define DMA_TCD0_SOFF *(volatile int16_t *)0x40009004 // TCD Signed Source Address Offset -#define DMA_TCD0_ATTR *(volatile uint16_t *)0x40009006 // TCD Transfer Attributes -#define DMA_TCD0_NBYTES_MLNO *(volatile uint32_t *)0x40009008 // TCD Minor Byte Count (Minor Loop Disabled) -#define DMA_TCD0_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009008 // TCD Signed Minor Loop Offset (Minor Loop Enabled and Offset Disabled) -#define DMA_TCD0_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009008 // TCD Signed Minor Loop Offset (Minor Loop and Offset Enabled) -#define DMA_TCD0_SLAST *(volatile int32_t *)0x4000900C // TCD Last Source Address Adjustment -#define DMA_TCD0_DADDR *(volatile void * volatile *)0x40009010 // TCD Destination Address -#define DMA_TCD0_DOFF *(volatile int16_t *)0x40009014 // TCD Signed Destination Address Offset -#define DMA_TCD0_CITER_ELINKYES *(volatile uint16_t *)0x40009016 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD0_CITER_ELINKNO *(volatile uint16_t *)0x40009016 // ?? -#define DMA_TCD0_DLASTSGA *(volatile int32_t *)0x40009018 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD0_CSR *(volatile uint16_t *)0x4000901C // TCD Control and Status -#define DMA_TCD0_BITER_ELINKYES *(volatile uint16_t *)0x4000901E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD0_BITER_ELINKNO *(volatile uint16_t *)0x4000901E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled - -#define DMA_TCD1_SADDR *(volatile const void * volatile *)0x40009020 // TCD Source Address -#define DMA_TCD1_SOFF *(volatile int16_t *)0x40009024 // TCD Signed Source Address Offset -#define DMA_TCD1_ATTR *(volatile uint16_t *)0x40009026 // TCD Transfer Attributes -#define DMA_TCD1_NBYTES_MLNO *(volatile uint32_t *)0x40009028 // TCD Minor Byte Count, Minor Loop Disabled -#define DMA_TCD1_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009028 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled -#define DMA_TCD1_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009028 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled -#define DMA_TCD1_SLAST *(volatile int32_t *)0x4000902C // TCD Last Source Address Adjustment -#define DMA_TCD1_DADDR *(volatile void * volatile *)0x40009030 // TCD Destination Address -#define DMA_TCD1_DOFF *(volatile int16_t *)0x40009034 // TCD Signed Destination Address Offset -#define DMA_TCD1_CITER_ELINKYES *(volatile uint16_t *)0x40009036 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD1_CITER_ELINKNO *(volatile uint16_t *)0x40009036 // ?? -#define DMA_TCD1_DLASTSGA *(volatile int32_t *)0x40009038 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD1_CSR *(volatile uint16_t *)0x4000903C // TCD Control and Status -#define DMA_TCD1_BITER_ELINKYES *(volatile uint16_t *)0x4000903E // TCD Beginning Minor Loop Link, Major Loop Count Channel Linking Enabled -#define DMA_TCD1_BITER_ELINKNO *(volatile uint16_t *)0x4000903E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled - -#define DMA_TCD2_SADDR *(volatile const void * volatile *)0x40009040 // TCD Source Address -#define DMA_TCD2_SOFF *(volatile int16_t *)0x40009044 // TCD Signed Source Address Offset -#define DMA_TCD2_ATTR *(volatile uint16_t *)0x40009046 // TCD Transfer Attributes -#define DMA_TCD2_NBYTES_MLNO *(volatile uint32_t *)0x40009048 // TCD Minor Byte Count, Minor Loop Disabled -#define DMA_TCD2_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009048 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled -#define DMA_TCD2_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009048 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled -#define DMA_TCD2_SLAST *(volatile int32_t *)0x4000904C // TCD Last Source Address Adjustment -#define DMA_TCD2_DADDR *(volatile void * volatile *)0x40009050 // TCD Destination Address -#define DMA_TCD2_DOFF *(volatile int16_t *)0x40009054 // TCD Signed Destination Address Offset -#define DMA_TCD2_CITER_ELINKYES *(volatile uint16_t *)0x40009056 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD2_CITER_ELINKNO *(volatile uint16_t *)0x40009056 // ?? -#define DMA_TCD2_DLASTSGA *(volatile int32_t *)0x40009058 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD2_CSR *(volatile uint16_t *)0x4000905C // TCD Control and Status -#define DMA_TCD2_BITER_ELINKYES *(volatile uint16_t *)0x4000905E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD2_BITER_ELINKNO *(volatile uint16_t *)0x4000905E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled - -#define DMA_TCD3_SADDR *(volatile const void * volatile *)0x40009060 // TCD Source Address -#define DMA_TCD3_SOFF *(volatile int16_t *)0x40009064 // TCD Signed Source Address Offset -#define DMA_TCD3_ATTR *(volatile uint16_t *)0x40009066 // TCD Transfer Attributes -#define DMA_TCD3_NBYTES_MLNO *(volatile uint32_t *)0x40009068 // TCD Minor Byte Count, Minor Loop Disabled -#define DMA_TCD3_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009068 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled -#define DMA_TCD3_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009068 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled -#define DMA_TCD3_SLAST *(volatile int32_t *)0x4000906C // TCD Last Source Address Adjustment -#define DMA_TCD3_DADDR *(volatile void * volatile *)0x40009070 // TCD Destination Address -#define DMA_TCD3_DOFF *(volatile int16_t *)0x40009074 // TCD Signed Destination Address Offset -#define DMA_TCD3_CITER_ELINKYES *(volatile uint16_t *)0x40009076 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD3_CITER_ELINKNO *(volatile uint16_t *)0x40009076 // ?? -#define DMA_TCD3_DLASTSGA *(volatile int32_t *)0x40009078 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD3_CSR *(volatile uint16_t *)0x4000907C // TCD Control and Status -#define DMA_TCD3_BITER_ELINKYES *(volatile uint16_t *)0x4000907E // TCD Beginning Minor Loop Link, Major Loop Count ,Channel Linking Enabled -#define DMA_TCD3_BITER_ELINKNO *(volatile uint16_t *)0x4000907E // TCD Beginning Minor Loop Link, Major Loop Count ,Channel Linking Disabled - -#define DMA_TCD4_SADDR *(volatile const void * volatile *)0x40009080 // TCD Source Addr -#define DMA_TCD4_SOFF *(volatile int16_t *)0x40009084 // TCD Signed Source Address Offset -#define DMA_TCD4_ATTR *(volatile uint16_t *)0x40009086 // TCD Transfer Attributes -#define DMA_TCD4_NBYTES_MLNO *(volatile uint32_t *)0x40009088 // TCD Minor Byte Count -#define DMA_TCD4_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009088 // TCD Signed Minor Loop Offset -#define DMA_TCD4_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009088 // TCD Signed Minor Loop Offset -#define DMA_TCD4_SLAST *(volatile int32_t *)0x4000908C // TCD Last Source Addr Adj. -#define DMA_TCD4_DADDR *(volatile void * volatile *)0x40009090 // TCD Destination Address -#define DMA_TCD4_DOFF *(volatile int16_t *)0x40009094 // TCD Signed Dest Address Offset -#define DMA_TCD4_CITER_ELINKYES *(volatile uint16_t *)0x40009096 // TCD Current Minor Loop Link -#define DMA_TCD4_CITER_ELINKNO *(volatile uint16_t *)0x40009096 // ?? -#define DMA_TCD4_DLASTSGA *(volatile int32_t *)0x40009098 // TCD Last Destination Addr Adj -#define DMA_TCD4_CSR *(volatile uint16_t *)0x4000909C // TCD Control and Status -#define DMA_TCD4_BITER_ELINKYES *(volatile uint16_t *)0x4000909E // TCD Beginning Minor Loop Link -#define DMA_TCD4_BITER_ELINKNO *(volatile uint16_t *)0x4000909E // TCD Beginning Minor Loop Link - -#define DMA_TCD5_SADDR *(volatile const void * volatile *)0x400090A0 // TCD Source Addr -#define DMA_TCD5_SOFF *(volatile int16_t *)0x400090A4 // TCD Signed Source Address Offset -#define DMA_TCD5_ATTR *(volatile uint16_t *)0x400090A6 // TCD Transfer Attributes -#define DMA_TCD5_NBYTES_MLNO *(volatile uint32_t *)0x400090A8 // TCD Minor Byte Count -#define DMA_TCD5_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090A8 // TCD Signed Minor Loop Offset -#define DMA_TCD5_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090A8 // TCD Signed Minor Loop Offset -#define DMA_TCD5_SLAST *(volatile int32_t *)0x400090AC // TCD Last Source Addr Adj. -#define DMA_TCD5_DADDR *(volatile void * volatile *)0x400090B0 // TCD Destination Address -#define DMA_TCD5_DOFF *(volatile int16_t *)0x400090B4 // TCD Signed Dest Address Offset -#define DMA_TCD5_CITER_ELINKYES *(volatile uint16_t *)0x400090B6 // TCD Current Minor Loop Link -#define DMA_TCD5_CITER_ELINKNO *(volatile uint16_t *)0x400090B6 // ?? -#define DMA_TCD5_DLASTSGA *(volatile int32_t *)0x400090B8 // TCD Last Destination Addr Adj -#define DMA_TCD5_CSR *(volatile uint16_t *)0x400090BC // TCD Control and Status -#define DMA_TCD5_BITER_ELINKYES *(volatile uint16_t *)0x400090BE // TCD Beginning Minor Loop Link -#define DMA_TCD5_BITER_ELINKNO *(volatile uint16_t *)0x400090BE // TCD Beginning Minor Loop Link - -#define DMA_TCD6_SADDR *(volatile const void * volatile *)0x400090C0 // TCD Source Addr -#define DMA_TCD6_SOFF *(volatile int16_t *)0x400090C4 // TCD Signed Source Address Offset -#define DMA_TCD6_ATTR *(volatile uint16_t *)0x400090C6 // TCD Transfer Attributes -#define DMA_TCD6_NBYTES_MLNO *(volatile uint32_t *)0x400090C8 // TCD Minor Byte Count -#define DMA_TCD6_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090C8 // TCD Signed Minor Loop Offset -#define DMA_TCD6_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090C8 // TCD Signed Minor Loop Offset -#define DMA_TCD6_SLAST *(volatile int32_t *)0x400090CC // TCD Last Source Addr Adj. -#define DMA_TCD6_DADDR *(volatile void * volatile *)0x400090D0 // TCD Destination Address -#define DMA_TCD6_DOFF *(volatile int16_t *)0x400090D4 // TCD Signed Dest Address Offset -#define DMA_TCD6_CITER_ELINKYES *(volatile uint16_t *)0x400090D6 // TCD Current Minor Loop Link -#define DMA_TCD6_CITER_ELINKNO *(volatile uint16_t *)0x400090D6 // ?? -#define DMA_TCD6_DLASTSGA *(volatile int32_t *)0x400090D8 // TCD Last Destination Addr Adj -#define DMA_TCD6_CSR *(volatile uint16_t *)0x400090DC // TCD Control and Status -#define DMA_TCD6_BITER_ELINKYES *(volatile uint16_t *)0x400090DE // TCD Beginning Minor Loop Link -#define DMA_TCD6_BITER_ELINKNO *(volatile uint16_t *)0x400090DE // TCD Beginning Minor Loop Link - -#define DMA_TCD7_SADDR *(volatile const void * volatile *)0x400090E0 // TCD Source Addr -#define DMA_TCD7_SOFF *(volatile int16_t *)0x400090E4 // TCD Signed Source Address Offset -#define DMA_TCD7_ATTR *(volatile uint16_t *)0x400090E6 // TCD Transfer Attributes -#define DMA_TCD7_NBYTES_MLNO *(volatile uint32_t *)0x400090E8 // TCD Minor Byte Count -#define DMA_TCD7_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090E8 // TCD Signed Minor Loop Offset -#define DMA_TCD7_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090E8 // TCD Signed Minor Loop Offset -#define DMA_TCD7_SLAST *(volatile int32_t *)0x400090EC // TCD Last Source Addr Adj. -#define DMA_TCD7_DADDR *(volatile void * volatile *)0x400090F0 // TCD Destination Address -#define DMA_TCD7_DOFF *(volatile int16_t *)0x400090F4 // TCD Signed Dest Address Offset -#define DMA_TCD7_CITER_ELINKYES *(volatile uint16_t *)0x400090F6 // TCD Current Minor Loop Link -#define DMA_TCD7_CITER_ELINKNO *(volatile uint16_t *)0x400090F6 // ?? -#define DMA_TCD7_DLASTSGA *(volatile int32_t *)0x400090F8 // TCD Last Destination Addr Adj -#define DMA_TCD7_CSR *(volatile uint16_t *)0x400090FC // TCD Control and Status -#define DMA_TCD7_BITER_ELINKYES *(volatile uint16_t *)0x400090FE // TCD Beginning Minor Loop Link -#define DMA_TCD7_BITER_ELINKNO *(volatile uint16_t *)0x400090FE // TCD Beginning Minor Loop Link - -#define DMA_TCD8_SADDR *(volatile const void * volatile *)0x40009100 // TCD Source Addr -#define DMA_TCD8_SOFF *(volatile int16_t *)0x40009104 // TCD Signed Source Address Offset -#define DMA_TCD8_ATTR *(volatile uint16_t *)0x40009106 // TCD Transfer Attributes -#define DMA_TCD8_NBYTES_MLNO *(volatile uint32_t *)0x40009108 // TCD Minor Byte Count -#define DMA_TCD8_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009108 // TCD Signed Minor Loop Offset -#define DMA_TCD8_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009108 // TCD Signed Minor Loop Offset -#define DMA_TCD8_SLAST *(volatile int32_t *)0x4000910C // TCD Last Source Addr Adj. -#define DMA_TCD8_DADDR *(volatile void * volatile *)0x40009110 // TCD Destination Address -#define DMA_TCD8_DOFF *(volatile int16_t *)0x40009114 // TCD Signed Dest Address Offset -#define DMA_TCD8_CITER_ELINKYES *(volatile uint16_t *)0x40009116 // TCD Current Minor Loop Link -#define DMA_TCD8_CITER_ELINKNO *(volatile uint16_t *)0x40009116 // ?? -#define DMA_TCD8_DLASTSGA *(volatile int32_t *)0x40009118 // TCD Last Destination Addr Adj -#define DMA_TCD8_CSR *(volatile uint16_t *)0x4000911C // TCD Control and Status -#define DMA_TCD8_BITER_ELINKYES *(volatile uint16_t *)0x4000911E // TCD Beginning Minor Loop Link -#define DMA_TCD8_BITER_ELINKNO *(volatile uint16_t *)0x4000911E // TCD Beginning Minor Loop Link - -#define DMA_TCD9_SADDR *(volatile const void * volatile *)0x40009120 // TCD Source Addr -#define DMA_TCD9_SOFF *(volatile int16_t *)0x40009124 // TCD Signed Source Address Offset -#define DMA_TCD9_ATTR *(volatile uint16_t *)0x40009126 // TCD Transfer Attributes -#define DMA_TCD9_NBYTES_MLNO *(volatile uint32_t *)0x40009128 // TCD Minor Byte Count -#define DMA_TCD9_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009128 // TCD Signed Minor Loop Offset -#define DMA_TCD9_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009128 // TCD Signed Minor Loop Offset -#define DMA_TCD9_SLAST *(volatile int32_t *)0x4000912C // TCD Last Source Addr Adj. -#define DMA_TCD9_DADDR *(volatile void * volatile *)0x40009130 // TCD Destination Address -#define DMA_TCD9_DOFF *(volatile int16_t *)0x40009134 // TCD Signed Dest Address Offset -#define DMA_TCD9_CITER_ELINKYES *(volatile uint16_t *)0x40009136 // TCD Current Minor Loop Link -#define DMA_TCD9_CITER_ELINKNO *(volatile uint16_t *)0x40009136 // ?? -#define DMA_TCD9_DLASTSGA *(volatile int32_t *)0x40009138 // TCD Last Destination Addr Adj -#define DMA_TCD9_CSR *(volatile uint16_t *)0x4000913C // TCD Control and Status -#define DMA_TCD9_BITER_ELINKYES *(volatile uint16_t *)0x4000913E // TCD Beginning Minor Loop Link -#define DMA_TCD9_BITER_ELINKNO *(volatile uint16_t *)0x4000913E // TCD Beginning Minor Loop Link - -#define DMA_TCD10_SADDR *(volatile const void * volatile *)0x40009140 // TCD Source Addr -#define DMA_TCD10_SOFF *(volatile int16_t *)0x40009144 // TCD Signed Source Address Offset -#define DMA_TCD10_ATTR *(volatile uint16_t *)0x40009146 // TCD Transfer Attributes -#define DMA_TCD10_NBYTES_MLNO *(volatile uint32_t *)0x40009148 // TCD Minor Byte Count -#define DMA_TCD10_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009148 // TCD Signed Minor Loop Offset -#define DMA_TCD10_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009148 // TCD Signed Minor Loop Offset -#define DMA_TCD10_SLAST *(volatile int32_t *)0x4000914C // TCD Last Source Addr Adj. -#define DMA_TCD10_DADDR *(volatile void * volatile *)0x40009150 // TCD Destination Address -#define DMA_TCD10_DOFF *(volatile int16_t *)0x40009154 // TCD Signed Dest Address Offset -#define DMA_TCD10_CITER_ELINKYES *(volatile uint16_t *)0x40009156 // TCD Current Minor Loop Link -#define DMA_TCD10_CITER_ELINKNO *(volatile uint16_t *)0x40009156 // ?? -#define DMA_TCD10_DLASTSGA *(volatile int32_t *)0x40009158 // TCD Last Destination Addr Adj -#define DMA_TCD10_CSR *(volatile uint16_t *)0x4000915C // TCD Control and Status -#define DMA_TCD10_BITER_ELINKYES *(volatile uint16_t *)0x4000915E // TCD Beginning Minor Loop Link -#define DMA_TCD10_BITER_ELINKNO *(volatile uint16_t *)0x4000915E // TCD Beginning Minor Loop Link - -#define DMA_TCD11_SADDR *(volatile const void * volatile *)0x40009160 // TCD Source Addr -#define DMA_TCD11_SOFF *(volatile int16_t *)0x40009164 // TCD Signed Source Address Offset -#define DMA_TCD11_ATTR *(volatile uint16_t *)0x40009166 // TCD Transfer Attributes -#define DMA_TCD11_NBYTES_MLNO *(volatile uint32_t *)0x40009168 // TCD Minor Byte Count -#define DMA_TCD11_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009168 // TCD Signed Minor Loop Offset -#define DMA_TCD11_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009168 // TCD Signed Minor Loop Offset -#define DMA_TCD11_SLAST *(volatile int32_t *)0x4000916C // TCD Last Source Addr Adj. -#define DMA_TCD11_DADDR *(volatile void * volatile *)0x40009170 // TCD Destination Address -#define DMA_TCD11_DOFF *(volatile int16_t *)0x40009174 // TCD Signed Dest Address Offset -#define DMA_TCD11_CITER_ELINKYES *(volatile uint16_t *)0x40009176 // TCD Current Minor Loop Link -#define DMA_TCD11_CITER_ELINKNO *(volatile uint16_t *)0x40009176 // ?? -#define DMA_TCD11_DLASTSGA *(volatile int32_t *)0x40009178 // TCD Last Destination Addr Adj -#define DMA_TCD11_CSR *(volatile uint16_t *)0x4000917C // TCD Control and Status -#define DMA_TCD11_BITER_ELINKYES *(volatile uint16_t *)0x4000917E // TCD Beginning Minor Loop Link -#define DMA_TCD11_BITER_ELINKNO *(volatile uint16_t *)0x4000917E // TCD Beginning Minor Loop Link - -#define DMA_TCD12_SADDR *(volatile const void * volatile *)0x40009180 // TCD Source Addr -#define DMA_TCD12_SOFF *(volatile int16_t *)0x40009184 // TCD Signed Source Address Offset -#define DMA_TCD12_ATTR *(volatile uint16_t *)0x40009186 // TCD Transfer Attributes -#define DMA_TCD12_NBYTES_MLNO *(volatile uint32_t *)0x40009188 // TCD Minor Byte Count -#define DMA_TCD12_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009188 // TCD Signed Minor Loop Offset -#define DMA_TCD12_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009188 // TCD Signed Minor Loop Offset -#define DMA_TCD12_SLAST *(volatile int32_t *)0x4000918C // TCD Last Source Addr Adj. -#define DMA_TCD12_DADDR *(volatile void * volatile *)0x40009190 // TCD Destination Address -#define DMA_TCD12_DOFF *(volatile int16_t *)0x40009194 // TCD Signed Dest Address Offset -#define DMA_TCD12_CITER_ELINKYES *(volatile uint16_t *)0x40009196 // TCD Current Minor Loop Link -#define DMA_TCD12_CITER_ELINKNO *(volatile uint16_t *)0x40009196 // ?? -#define DMA_TCD12_DLASTSGA *(volatile int32_t *)0x40009198 // TCD Last Destination Addr Adj -#define DMA_TCD12_CSR *(volatile uint16_t *)0x4000919C // TCD Control and Status -#define DMA_TCD12_BITER_ELINKYES *(volatile uint16_t *)0x4000919E // TCD Beginning Minor Loop Link -#define DMA_TCD12_BITER_ELINKNO *(volatile uint16_t *)0x4000919E // TCD Beginning Minor Loop Link - -#define DMA_TCD13_SADDR *(volatile const void * volatile *)0x400091A0 // TCD Source Addr -#define DMA_TCD13_SOFF *(volatile int16_t *)0x400091A4 // TCD Signed Source Address Offset -#define DMA_TCD13_ATTR *(volatile uint16_t *)0x400091A6 // TCD Transfer Attributes -#define DMA_TCD13_NBYTES_MLNO *(volatile uint32_t *)0x400091A8 // TCD Minor Byte Count -#define DMA_TCD13_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091A8 // TCD Signed Minor Loop Offset -#define DMA_TCD13_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091A8 // TCD Signed Minor Loop Offset -#define DMA_TCD13_SLAST *(volatile int32_t *)0x400091AC // TCD Last Source Addr Adj. -#define DMA_TCD13_DADDR *(volatile void * volatile *)0x400091B0 // TCD Destination Address -#define DMA_TCD13_DOFF *(volatile int16_t *)0x400091B4 // TCD Signed Dest Address Offset -#define DMA_TCD13_CITER_ELINKYES *(volatile uint16_t *)0x400091B6 // TCD Current Minor Loop Link -#define DMA_TCD13_CITER_ELINKNO *(volatile uint16_t *)0x400091B6 // ?? -#define DMA_TCD13_DLASTSGA *(volatile int32_t *)0x400091B8 // TCD Last Destination Addr Adj -#define DMA_TCD13_CSR *(volatile uint16_t *)0x400091BC // TCD Control and Status -#define DMA_TCD13_BITER_ELINKYES *(volatile uint16_t *)0x400091BE // TCD Beginning Minor Loop Link -#define DMA_TCD13_BITER_ELINKNO *(volatile uint16_t *)0x400091BE // TCD Beginning Minor Loop Link - -#define DMA_TCD14_SADDR *(volatile const void * volatile *)0x400091C0 // TCD Source Addr -#define DMA_TCD14_SOFF *(volatile int16_t *)0x400091C4 // TCD Signed Source Address Offset -#define DMA_TCD14_ATTR *(volatile uint16_t *)0x400091C6 // TCD Transfer Attributes -#define DMA_TCD14_NBYTES_MLNO *(volatile uint32_t *)0x400091C8 // TCD Minor Byte Count -#define DMA_TCD14_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091C8 // TCD Signed Minor Loop Offset -#define DMA_TCD14_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091C8 // TCD Signed Minor Loop Offset -#define DMA_TCD14_SLAST *(volatile int32_t *)0x400091CC // TCD Last Source Addr Adj. -#define DMA_TCD14_DADDR *(volatile void * volatile *)0x400091D0 // TCD Destination Address -#define DMA_TCD14_DOFF *(volatile int16_t *)0x400091D4 // TCD Signed Dest Address Offset -#define DMA_TCD14_CITER_ELINKYES *(volatile uint16_t *)0x400091D6 // TCD Current Minor Loop Link -#define DMA_TCD14_CITER_ELINKNO *(volatile uint16_t *)0x400091D6 // ?? -#define DMA_TCD14_DLASTSGA *(volatile int32_t *)0x400091D8 // TCD Last Destination Addr Adj -#define DMA_TCD14_CSR *(volatile uint16_t *)0x400091DC // TCD Control and Status -#define DMA_TCD14_BITER_ELINKYES *(volatile uint16_t *)0x400091DE // TCD Beginning Minor Loop Link -#define DMA_TCD14_BITER_ELINKNO *(volatile uint16_t *)0x400091DE // TCD Beginning Minor Loop Link - -#define DMA_TCD15_SADDR *(volatile const void * volatile *)0x400091E0 // TCD Source Addr -#define DMA_TCD15_SOFF *(volatile int16_t *)0x400091E4 // TCD Signed Source Address Offset -#define DMA_TCD15_ATTR *(volatile uint16_t *)0x400091E6 // TCD Transfer Attributes -#define DMA_TCD15_NBYTES_MLNO *(volatile uint32_t *)0x400091E8 // TCD Minor Byte Count -#define DMA_TCD15_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091E8 // TCD Signed Minor Loop Offset -#define DMA_TCD15_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091E8 // TCD Signed Minor Loop Offset -#define DMA_TCD15_SLAST *(volatile int32_t *)0x400091EC // TCD Last Source Addr Adj. -#define DMA_TCD15_DADDR *(volatile void * volatile *)0x400091F0 // TCD Destination Address -#define DMA_TCD15_DOFF *(volatile int16_t *)0x400091F4 // TCD Signed Dest Address Offset -#define DMA_TCD15_CITER_ELINKYES *(volatile uint16_t *)0x400091F6 // TCD Current Minor Loop Link -#define DMA_TCD15_CITER_ELINKNO *(volatile uint16_t *)0x400091F6 // ?? -#define DMA_TCD15_DLASTSGA *(volatile int32_t *)0x400091F8 // TCD Last Destination Addr Adj -#define DMA_TCD15_CSR *(volatile uint16_t *)0x400091FC // TCD Control and Status -#define DMA_TCD15_BITER_ELINKYES *(volatile uint16_t *)0x400091FE // TCD Beginning Minor Loop Link -#define DMA_TCD15_BITER_ELINKNO *(volatile uint16_t *)0x400091FE // TCD Beginning Minor Loop Link - - -// Chapter 22: External Watchdog Monitor (EWM) -#define EWM_CTRL *(volatile uint8_t *)0x40061000 // Control Register -#define EWM_SERV *(volatile uint8_t *)0x40061001 // Service Register -#define EWM_CMPL *(volatile uint8_t *)0x40061002 // Compare Low Register -#define EWM_CMPH *(volatile uint8_t *)0x40061003 // Compare High Register - -// Chapter 23: Watchdog Timer (WDOG) -#define WDOG_STCTRLH *(volatile uint16_t *)0x40052000 // Watchdog Status and Control Register High -#define WDOG_STCTRLH_DISTESTWDOG (uint16_t)0x4000 // Allows the WDOG's functional test mode to be disabled permanently. -#define WDOG_STCTRLH_BYTESEL(n) (uint16_t)(((n) & 3) << 12) // selects the byte to be tested when the watchdog is in the byte test mode. -#define WDOG_STCTRLH_TESTSEL (uint16_t)0x0800 -#define WDOG_STCTRLH_TESTWDOG (uint16_t)0x0400 -#define WDOG_STCTRLH_WAITEN (uint16_t)0x0080 -#define WDOG_STCTRLH_STOPEN (uint16_t)0x0040 -#define WDOG_STCTRLH_DBGEN (uint16_t)0x0020 -#define WDOG_STCTRLH_ALLOWUPDATE (uint16_t)0x0010 -#define WDOG_STCTRLH_WINEN (uint16_t)0x0008 -#define WDOG_STCTRLH_IRQRSTEN (uint16_t)0x0004 -#define WDOG_STCTRLH_CLKSRC (uint16_t)0x0002 -#define WDOG_STCTRLH_WDOGEN (uint16_t)0x0001 -#define WDOG_STCTRLL *(volatile uint16_t *)0x40052002 // Watchdog Status and Control Register Low -#define WDOG_TOVALH *(volatile uint16_t *)0x40052004 // Watchdog Time-out Value Register High -#define WDOG_TOVALL *(volatile uint16_t *)0x40052006 // Watchdog Time-out Value Register Low -#define WDOG_WINH *(volatile uint16_t *)0x40052008 // Watchdog Window Register High -#define WDOG_WINL *(volatile uint16_t *)0x4005200A // Watchdog Window Register Low -#define WDOG_REFRESH *(volatile uint16_t *)0x4005200C // Watchdog Refresh register -#define WDOG_UNLOCK *(volatile uint16_t *)0x4005200E // Watchdog Unlock register -#define WDOG_UNLOCK_SEQ1 (uint16_t)0xC520 -#define WDOG_UNLOCK_SEQ2 (uint16_t)0xD928 -#define WDOG_TMROUTH *(volatile uint16_t *)0x40052010 // Watchdog Timer Output Register High -#define WDOG_TMROUTL *(volatile uint16_t *)0x40052012 // Watchdog Timer Output Register Low -#define WDOG_RSTCNT *(volatile uint16_t *)0x40052014 // Watchdog Reset Count register -#define WDOG_PRESC *(volatile uint16_t *)0x40052016 // Watchdog Prescaler register - -// Chapter 24: Multipurpose Clock Generator (MCG) -#define MCG_C1 *(volatile uint8_t *)0x40064000 // MCG Control 1 Register -#define MCG_C1_IREFSTEN (uint8_t)0x01 // Internal Reference Stop Enable, Controls whether or not the internal reference clock remains enabled when the MCG enters Stop mode. -#define MCG_C1_IRCLKEN (uint8_t)0x02 // Internal Reference Clock Enable, Enables the internal reference clock for use as MCGIRCLK. -#define MCG_C1_IREFS (uint8_t)0x04 // Internal Reference Select, Selects the reference clock source for the FLL. -#define MCG_C1_FRDIV(n) (uint8_t)(((n) & 0x07) << 3) // FLL External Reference Divider, Selects the amount to divide down the external reference clock for the FLL -#define MCG_C1_CLKS(n) (uint8_t)(((n) & 0x03) << 6) // Clock Source Select, Selects the clock source for MCGOUTCLK -#define MCG_C2 *(volatile uint8_t *)0x40064001 // MCG Control 2 Register -#define MCG_C2_IRCS (uint8_t)0x01 // Internal Reference Clock Select, Selects between the fast or slow internal reference clock source. -#define MCG_C2_LP (uint8_t)0x02 // Low Power Select, Controls whether the FLL or PLL is disabled in BLPI and BLPE modes. -#define MCG_C2_EREFS (uint8_t)0x04 // External Reference Select, Selects the source for the external reference clock. -#define MCG_C2_HGO0 (uint8_t)0x08 // High Gain Oscillator Select, Controls the crystal oscillator mode of operation -#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator -#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 -#define MCG_C3 *(volatile uint8_t *)0x40064002 // MCG Control 3 Register -#define MCG_C3_SCTRIM(n) (uint8_t)(n) // Slow Internal Reference Clock Trim Setting -#define MCG_C4 *(volatile uint8_t *)0x40064003 // MCG Control 4 Register -#define MCG_C4_SCFTRIM (uint8_t)0x01 // Slow Internal Reference Clock Fine Trim -#define MCG_C4_FCTRIM(n) (uint8_t)(((n) & 0x0F) << 1) // Fast Internal Reference Clock Trim Setting -#define MCG_C4_DRST_DRS(n) (uint8_t)(((n) & 0x03) << 5) // DCO Range Select -#define MCG_C4_DMX32 (uint8_t)0x80 // DCO Maximum Frequency with 32.768 kHz Reference, controls whether the DCO frequency range is narrowed -#define MCG_C5 *(volatile uint8_t *)0x40064004 // MCG Control 5 Register -#define MCG_C5_PRDIV0(n) (uint8_t)((n) & 0x1F) // PLL External Reference Divider -#define MCG_C5_PLLSTEN0 (uint8_t)0x20 // PLL Stop Enable -#define MCG_C5_PLLCLKEN0 (uint8_t)0x40 // PLL Clock Enable -#define MCG_C6 *(volatile uint8_t *)0x40064005 // MCG Control 6 Register -#define MCG_C6_VDIV0(n) (uint8_t)((n) & 0x1F) // VCO 0 Divider -#define MCG_C6_CME0 (uint8_t)0x20 // Clock Monitor Enable -#define MCG_C6_PLLS (uint8_t)0x40 // PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00. -#define MCG_C6_LOLIE0 (uint8_t)0x80 // Loss of Lock Interrrupt Enable -#define MCG_S *(volatile uint8_t *)0x40064006 // MCG Status Register -#define MCG_S_IRCST (uint8_t)0x01 // Internal Reference Clock Status -#define MCG_S_OSCINIT0 (uint8_t)0x02 // OSC Initialization, resets to 0, is set to 1 after the initialization cycles of the crystal oscillator -#define MCG_S_CLKST(n) (uint8_t)(((n) & 0x03) << 2) // Clock Mode Status, 0=FLL is selected, 1= Internal ref, 2=External ref, 3=PLL -#define MCG_S_CLKST_MASK (uint8_t)0x0C -#define MCG_S_IREFST (uint8_t)0x10 // Internal Reference Status -#define MCG_S_PLLST (uint8_t)0x20 // PLL Select Status -#define MCG_S_LOCK0 (uint8_t)0x40 // Lock Status, 0=PLL Unlocked, 1=PLL Locked -#define MCG_S_LOLS0 (uint8_t)0x80 // Loss of Lock Status -#define MCG_SC *(volatile uint8_t *)0x40064008 // MCG Status and Control Register -#define MCG_SC_LOCS0 (uint8_t)0x01 // OSC0 Loss of Clock Status -#define MCG_SC_FCRDIV(n) (uint8_t)(((n) & 0x07) << 1) // Fast Clock Internal Reference Divider -#define MCG_SC_FLTPRSRV (uint8_t)0x10 // FLL Filter Preserve Enable -#define MCG_SC_ATMF (uint8_t)0x20 // Automatic Trim Machine Fail Flag -#define MCG_SC_ATMS (uint8_t)0x40 // Automatic Trim Machine Select -#define MCG_SC_ATME (uint8_t)0x80 // Automatic Trim Machine Enable -#define MCG_ATCVH *(volatile uint8_t *)0x4006400A // MCG Auto Trim Compare Value High Register -#define MCG_ATCVL *(volatile uint8_t *)0x4006400B // MCG Auto Trim Compare Value Low Register -#define MCG_C7 *(volatile uint8_t *)0x4006400C // MCG Control 7 Register -#define MCG_C8 *(volatile uint8_t *)0x4006400D // MCG Control 8 Register - -// Chapter 25: Oscillator (OSC) -#define OSC0_CR *(volatile uint8_t *)0x40065000 // OSC Control Register -#define OSC_SC16P (uint8_t)0x01 // Oscillator 16 pF Capacitor Load Configure -#define OSC_SC8P (uint8_t)0x02 // Oscillator 8 pF Capacitor Load Configure -#define OSC_SC4P (uint8_t)0x04 // Oscillator 4 pF Capacitor Load Configure -#define OSC_SC2P (uint8_t)0x08 // Oscillator 2 pF Capacitor Load Configure -#define OSC_EREFSTEN (uint8_t)0x20 // External Reference Stop Enable, Controls whether or not the external reference clock (OSCERCLK) remains enabled when MCU enters Stop mode. -#define OSC_ERCLKEN (uint8_t)0x80 // External Reference Enable, Enables external reference clock (OSCERCLK). - -// Chapter 27: Flash Memory Controller (FMC) -#define FMC_PFAPR *(volatile uint32_t *)0x4001F000 // Flash Access Protection -#define FMC_PFB0CR *(volatile uint32_t *)0x4001F004 // Flash Control -#define FMC_TAGVDW0S0 *(volatile uint32_t *)0x4001F100 // Cache Tag Storage -#define FMC_TAGVDW0S1 *(volatile uint32_t *)0x4001F104 // Cache Tag Storage -#define FMC_TAGVDW1S0 *(volatile uint32_t *)0x4001F108 // Cache Tag Storage -#define FMC_TAGVDW1S1 *(volatile uint32_t *)0x4001F10C // Cache Tag Storage -#define FMC_TAGVDW2S0 *(volatile uint32_t *)0x4001F110 // Cache Tag Storage -#define FMC_TAGVDW2S1 *(volatile uint32_t *)0x4001F114 // Cache Tag Storage -#define FMC_TAGVDW3S0 *(volatile uint32_t *)0x4001F118 // Cache Tag Storage -#define FMC_TAGVDW3S1 *(volatile uint32_t *)0x4001F11C // Cache Tag Storage -#define FMC_DATAW0S0 *(volatile uint32_t *)0x4001F200 // Cache Data Storage -#define FMC_DATAW0S1 *(volatile uint32_t *)0x4001F204 // Cache Data Storage -#define FMC_DATAW1S0 *(volatile uint32_t *)0x4001F208 // Cache Data Storage -#define FMC_DATAW1S1 *(volatile uint32_t *)0x4001F20C // Cache Data Storage -#define FMC_DATAW2S0 *(volatile uint32_t *)0x4001F210 // Cache Data Storage -#define FMC_DATAW2S1 *(volatile uint32_t *)0x4001F214 // Cache Data Storage -#define FMC_DATAW3S0 *(volatile uint32_t *)0x4001F218 // Cache Data Storage -#define FMC_DATAW3S1 *(volatile uint32_t *)0x4001F21C // Cache Data Storage - -// Chapter 28: Flash Memory Module (FTFL) -#define FTFL_FSTAT *(volatile uint8_t *)0x40020000 // Flash Status Register -#define FTFL_FSTAT_CCIF (uint8_t)0x80 // Command Complete Interrupt Flag -#define FTFL_FSTAT_RDCOLERR (uint8_t)0x40 // Flash Read Collision Error Flag -#define FTFL_FSTAT_ACCERR (uint8_t)0x20 // Flash Access Error Flag -#define FTFL_FSTAT_FPVIOL (uint8_t)0x10 // Flash Protection Violation Flag -#define FTFL_FSTAT_MGSTAT0 (uint8_t)0x01 // Memory Controller Command Completion Status Flag -#define FTFL_FCNFG *(volatile uint8_t *)0x40020001 // Flash Configuration Register -#define FTFL_FCNFG_CCIE (uint8_t)0x80 // Command Complete Interrupt Enable -#define FTFL_FCNFG_RDCOLLIE (uint8_t)0x40 // Read Collision Error Interrupt Enable -#define FTFL_FCNFG_ERSAREQ (uint8_t)0x20 // Erase All Request -#define FTFL_FCNFG_ERSSUSP (uint8_t)0x10 // Erase Suspend -#define FTFL_FCNFG_PFLSH (uint8_t)0x04 // Flash memory configuration -#define FTFL_FCNFG_RAMRDY (uint8_t)0x02 // RAM Ready -#define FTFL_FCNFG_EEERDY (uint8_t)0x01 // EEPROM Ready -#define FTFL_FSEC *(const uint8_t *)0x40020002 // Flash Security Register -#define FTFL_FOPT *(const uint8_t *)0x40020003 // Flash Option Register -#define FTFL_FCCOB3 *(volatile uint8_t *)0x40020004 // Flash Common Command Object Registers -#define FTFL_FCCOB2 *(volatile uint8_t *)0x40020005 -#define FTFL_FCCOB1 *(volatile uint8_t *)0x40020006 -#define FTFL_FCCOB0 *(volatile uint8_t *)0x40020007 -#define FTFL_FCCOB7 *(volatile uint8_t *)0x40020008 -#define FTFL_FCCOB6 *(volatile uint8_t *)0x40020009 -#define FTFL_FCCOB5 *(volatile uint8_t *)0x4002000A -#define FTFL_FCCOB4 *(volatile uint8_t *)0x4002000B -#define FTFL_FCCOBB *(volatile uint8_t *)0x4002000C -#define FTFL_FCCOBA *(volatile uint8_t *)0x4002000D -#define FTFL_FCCOB9 *(volatile uint8_t *)0x4002000E -#define FTFL_FCCOB8 *(volatile uint8_t *)0x4002000F -#define FTFL_FPROT3 *(volatile uint8_t *)0x40020010 // Program Flash Protection Registers -#define FTFL_FPROT2 *(volatile uint8_t *)0x40020011 // Program Flash Protection Registers -#define FTFL_FPROT1 *(volatile uint8_t *)0x40020012 // Program Flash Protection Registers -#define FTFL_FPROT0 *(volatile uint8_t *)0x40020013 // Program Flash Protection Registers -#define FTFL_FEPROT *(volatile uint8_t *)0x40020016 // EEPROM Protection Register -#define FTFL_FDPROT *(volatile uint8_t *)0x40020017 // Data Flash Protection Register - -// Chapter 30: Cyclic Redundancy Check (CRC) -#define CRC_CRC *(volatile uint32_t *)0x40032000 // CRC Data register -#define CRC_GPOLY *(volatile uint32_t *)0x40032004 // CRC Polynomial register -#define CRC_CTRL *(volatile uint32_t *)0x40032008 // CRC Control register - -// Chapter 31: Analog-to-Digital Converter (ADC) -#define ADC0_SC1A *(volatile uint32_t *)0x4003B000 // ADC status and control registers 1 -#define ADC0_SC1B *(volatile uint32_t *)0x4003B004 // ADC status and control registers 1 -#define ADC_SC1_COCO (uint32_t)0x80 // Conversion complete flag -#define ADC_SC1_AIEN (uint32_t)0x40 // Interrupt enable -#define ADC_SC1_DIFF (uint32_t)0x20 // Differential mode enable -#define ADC_SC1_ADCH(n) (uint32_t)((n) & 0x1F) // Input channel select -#define ADC0_CFG1 *(volatile uint32_t *)0x4003B008 // ADC configuration register 1 -#define ADC_CFG1_ADLPC (uint32_t)0x80 // Low-power configuration -#define ADC_CFG1_ADIV(n) (uint32_t)(((n) & 3) << 5) // Clock divide select, 0=direct, 1=div2, 2=div4, 3=div8 -#define ADC_CFG1_ADLSMP (uint32_t)0x10 // Sample time configuration, 0=Short, 1=Long -#define ADC_CFG1_MODE(n) (uint32_t)(((n) & 3) << 2) // Conversion mode, 0=8 bit, 1=12 bit, 2=10 bit, 3=16 bit -#define ADC_CFG1_ADICLK(n) (uint32_t)(((n) & 3) << 0) // Input clock, 0=bus, 1=bus/2, 2=OSCERCLK, 3=async -#define ADC0_CFG2 *(volatile uint32_t *)0x4003B00C // Configuration register 2 -#define ADC_CFG2_MUXSEL (uint32_t)0x10 // 0=a channels, 1=b channels -#define ADC_CFG2_ADACKEN (uint32_t)0x08 // async clock enable -#define ADC_CFG2_ADHSC (uint32_t)0x04 // High speed configuration -#define ADC_CFG2_ADLSTS(n) (uint32_t)(((n) & 3) << 0) // Sample time, 0=24 cycles, 1=12 cycles, 2=6 cycles, 3=2 cycles -#define ADC0_RA *(volatile uint32_t *)0x4003B010 // ADC data result register -#define ADC0_RB *(volatile uint32_t *)0x4003B014 // ADC data result register -#define ADC0_CV1 *(volatile uint32_t *)0x4003B018 // Compare value registers -#define ADC0_CV2 *(volatile uint32_t *)0x4003B01C // Compare value registers -#define ADC0_SC2 *(volatile uint32_t *)0x4003B020 // Status and control register 2 -#define ADC_SC2_ADACT (uint32_t)0x80 // Conversion active -#define ADC_SC2_ADTRG (uint32_t)0x40 // Conversion trigger select, 0=software, 1=hardware -#define ADC_SC2_ACFE (uint32_t)0x20 // Compare function enable -#define ADC_SC2_ACFGT (uint32_t)0x10 // Compare function greater than enable -#define ADC_SC2_ACREN (uint32_t)0x08 // Compare function range enable -#define ADC_SC2_DMAEN (uint32_t)0x04 // DMA enable -#define ADC_SC2_REFSEL(n) (uint32_t)(((n) & 3) << 0) // Voltage reference, 0=vcc/external, 1=1.2 volts -#define ADC0_SC3 *(volatile uint32_t *)0x4003B024 // Status and control register 3 -#define ADC_SC3_CAL (uint32_t)0x80 // Calibration, 1=begin, stays set while cal in progress -#define ADC_SC3_CALF (uint32_t)0x40 // Calibration failed flag -#define ADC_SC3_ADCO (uint32_t)0x08 // Continuous conversion enable -#define ADC_SC3_AVGE (uint32_t)0x04 // Hardware average enable -#define ADC_SC3_AVGS(n) (uint32_t)(((n) & 3) << 0) // avg select, 0=4 samples, 1=8 samples, 2=16 samples, 3=32 samples -#define ADC0_OFS *(volatile uint32_t *)0x4003B028 // ADC offset correction register -#define ADC0_PG *(volatile uint32_t *)0x4003B02C // ADC plus-side gain register -#define ADC0_MG *(volatile uint32_t *)0x4003B030 // ADC minus-side gain register -#define ADC0_CLPD *(volatile uint32_t *)0x4003B034 // ADC plus-side general calibration value register -#define ADC0_CLPS *(volatile uint32_t *)0x4003B038 // ADC plus-side general calibration value register -#define ADC0_CLP4 *(volatile uint32_t *)0x4003B03C // ADC plus-side general calibration value register -#define ADC0_CLP3 *(volatile uint32_t *)0x4003B040 // ADC plus-side general calibration value register -#define ADC0_CLP2 *(volatile uint32_t *)0x4003B044 // ADC plus-side general calibration value register -#define ADC0_CLP1 *(volatile uint32_t *)0x4003B048 // ADC plus-side general calibration value register -#define ADC0_CLP0 *(volatile uint32_t *)0x4003B04C // ADC plus-side general calibration value register -#define ADC0_PGA *(volatile uint32_t *)0x4003B050 // ADC Programmable Gain Amplifier -#define ADC_PGA_PGAEN (uint32_t)0x00800000 // Enable -#define ADC_PGA_PGALPB (uint32_t)0x00100000 // Low-Power Mode Control, 0=low power, 1=normal -#define ADC_PGA_PGAG(n) (uint32_t)(((n) & 15) << 16) // Gain, 0=1X, 1=2X, 2=4X, 3=8X, 4=16X, 5=32X, 6=64X -#define ADC0_CLMD *(volatile uint32_t *)0x4003B054 // ADC minus-side general calibration value register -#define ADC0_CLMS *(volatile uint32_t *)0x4003B058 // ADC minus-side general calibration value register -#define ADC0_CLM4 *(volatile uint32_t *)0x4003B05C // ADC minus-side general calibration value register -#define ADC0_CLM3 *(volatile uint32_t *)0x4003B060 // ADC minus-side general calibration value register -#define ADC0_CLM2 *(volatile uint32_t *)0x4003B064 // ADC minus-side general calibration value register -#define ADC0_CLM1 *(volatile uint32_t *)0x4003B068 // ADC minus-side general calibration value register -#define ADC0_CLM0 *(volatile uint32_t *)0x4003B06C // ADC minus-side general calibration value register - -#define ADC1_SC1A *(volatile uint32_t *)0x400BB000 // ADC status and control registers 1 -#define ADC1_SC1B *(volatile uint32_t *)0x400BB004 // ADC status and control registers 1 -#define ADC1_CFG1 *(volatile uint32_t *)0x400BB008 // ADC configuration register 1 -#define ADC1_CFG2 *(volatile uint32_t *)0x400BB00C // Configuration register 2 -#define ADC1_RA *(volatile uint32_t *)0x400BB010 // ADC data result register -#define ADC1_RB *(volatile uint32_t *)0x400BB014 // ADC data result register -#define ADC1_CV1 *(volatile uint32_t *)0x400BB018 // Compare value registers -#define ADC1_CV2 *(volatile uint32_t *)0x400BB01C // Compare value registers -#define ADC1_SC2 *(volatile uint32_t *)0x400BB020 // Status and control register 2 -#define ADC1_SC3 *(volatile uint32_t *)0x400BB024 // Status and control register 3 -#define ADC1_OFS *(volatile uint32_t *)0x400BB028 // ADC offset correction register -#define ADC1_PG *(volatile uint32_t *)0x400BB02C // ADC plus-side gain register -#define ADC1_MG *(volatile uint32_t *)0x400BB030 // ADC minus-side gain register -#define ADC1_CLPD *(volatile uint32_t *)0x400BB034 // ADC plus-side general calibration value register -#define ADC1_CLPS *(volatile uint32_t *)0x400BB038 // ADC plus-side general calibration value register -#define ADC1_CLP4 *(volatile uint32_t *)0x400BB03C // ADC plus-side general calibration value register -#define ADC1_CLP3 *(volatile uint32_t *)0x400BB040 // ADC plus-side general calibration value register -#define ADC1_CLP2 *(volatile uint32_t *)0x400BB044 // ADC plus-side general calibration value register -#define ADC1_CLP1 *(volatile uint32_t *)0x400BB048 // ADC plus-side general calibration value register -#define ADC1_CLP0 *(volatile uint32_t *)0x400BB04C // ADC plus-side general calibration value register -#define ADC1_PGA *(volatile uint32_t *)0x400BB050 // ADC Programmable Gain Amplifier -#define ADC1_CLMD *(volatile uint32_t *)0x400BB054 // ADC minus-side general calibration value register -#define ADC1_CLMS *(volatile uint32_t *)0x400BB058 // ADC minus-side general calibration value register -#define ADC1_CLM4 *(volatile uint32_t *)0x400BB05C // ADC minus-side general calibration value register -#define ADC1_CLM3 *(volatile uint32_t *)0x400BB060 // ADC minus-side general calibration value register -#define ADC1_CLM2 *(volatile uint32_t *)0x400BB064 // ADC minus-side general calibration value register -#define ADC1_CLM1 *(volatile uint32_t *)0x400BB068 // ADC minus-side general calibration value register -#define ADC1_CLM0 *(volatile uint32_t *)0x400BB06C // ADC minus-side general calibration value register - -#define DAC0_DAT0L *(volatile uint8_t *)0x400CC000 // DAC Data Low Register -#define DAC0_DATH *(volatile uint8_t *)0x400CC001 // DAC Data High Register -#define DAC0_DAT1L *(volatile uint8_t *)0x400CC002 // DAC Data Low Register -#define DAC0_DAT2L *(volatile uint8_t *)0x400CC004 // DAC Data Low Register -#define DAC0_DAT3L *(volatile uint8_t *)0x400CC006 // DAC Data Low Register -#define DAC0_DAT4L *(volatile uint8_t *)0x400CC008 // DAC Data Low Register -#define DAC0_DAT5L *(volatile uint8_t *)0x400CC00A // DAC Data Low Register -#define DAC0_DAT6L *(volatile uint8_t *)0x400CC00C // DAC Data Low Register -#define DAC0_DAT7L *(volatile uint8_t *)0x400CC00E // DAC Data Low Register -#define DAC0_DAT8L *(volatile uint8_t *)0x400CC010 // DAC Data Low Register -#define DAC0_DAT9L *(volatile uint8_t *)0x400CC012 // DAC Data Low Register -#define DAC0_DAT10L *(volatile uint8_t *)0x400CC014 // DAC Data Low Register -#define DAC0_DAT11L *(volatile uint8_t *)0x400CC016 // DAC Data Low Register -#define DAC0_DAT12L *(volatile uint8_t *)0x400CC018 // DAC Data Low Register -#define DAC0_DAT13L *(volatile uint8_t *)0x400CC01A // DAC Data Low Register -#define DAC0_DAT14L *(volatile uint8_t *)0x400CC01C // DAC Data Low Register -#define DAC0_DAT15L *(volatile uint8_t *)0x400CC01E // DAC Data Low Register -#define DAC0_SR *(volatile uint8_t *)0x400CC020 // DAC Status Register -#define DAC0_C0 *(volatile uint8_t *)0x400CC021 // DAC Control Register -#define DAC_C0_DACEN 0x80 // DAC Enable -#define DAC_C0_DACRFS 0x40 // DAC Reference Select -#define DAC_C0_DACTRGSEL 0x20 // DAC Trigger Select -#define DAC_C0_DACSWTRG 0x10 // DAC Software Trigger -#define DAC_C0_LPEN 0x08 // DAC Low Power Control -#define DAC_C0_DACBWIEN 0x04 // DAC Buffer Watermark Interrupt Enable -#define DAC_C0_DACBTIEN 0x02 // DAC Buffer Read Pointer Top Flag Interrupt Enable -#define DAC_C0_DACBBIEN 0x01 // DAC Buffer Read Pointer Bottom Flag Interrupt Enable -#define DAC0_C1 *(volatile uint8_t *)0x400CC022 // DAC Control Register 1 -#define DAC_C1_DMAEN 0x80 // DMA Enable Select -#define DAC_C1_DACBFWM(n) (((n) & 3) << 3) // DAC Buffer Watermark Select -#define DAC_C1_DACBFMD(n) (((n) & 3) << 0) // DAC Buffer Work Mode Select -#define DAC_C1_DACBFEN 0x00 // DAC Buffer Enable - -#define DAC0_C2 *(volatile uint8_t *)0x400CC023 // DAC Control Register 2 -#define DAC_C2_DACBFRP(n) (((n) & 15) << 4) // DAC Buffer Read Pointer -#define DAC_C2_DACBFUP(n) (((n) & 15) << 0) // DAC Buffer Upper Limit - - -//#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator -//#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 - -// Chapter 32: Comparator (CMP) -#define CMP0_CR0 *(volatile uint8_t *)0x40073000 // CMP Control Register 0 -#define CMP0_CR1 *(volatile uint8_t *)0x40073001 // CMP Control Register 1 -#define CMP0_FPR *(volatile uint8_t *)0x40073002 // CMP Filter Period Register -#define CMP0_SCR *(volatile uint8_t *)0x40073003 // CMP Status and Control Register -#define CMP0_DACCR *(volatile uint8_t *)0x40073004 // DAC Control Register -#define CMP0_MUXCR *(volatile uint8_t *)0x40073005 // MUX Control Register -#define CMP1_CR0 *(volatile uint8_t *)0x40073008 // CMP Control Register 0 -#define CMP1_CR1 *(volatile uint8_t *)0x40073009 // CMP Control Register 1 -#define CMP1_FPR *(volatile uint8_t *)0x4007300A // CMP Filter Period Register -#define CMP1_SCR *(volatile uint8_t *)0x4007300B // CMP Status and Control Register -#define CMP1_DACCR *(volatile uint8_t *)0x4007300C // DAC Control Register -#define CMP1_MUXCR *(volatile uint8_t *)0x4007300D // MUX Control Register - -// Chapter 33: Voltage Reference (VREFV1) -#define VREF_TRM *(volatile uint8_t *)0x40074000 // VREF Trim Register -#define VREF_TRM_CHOPEN (uint8_t)0x40 // Chop oscillator enable -#define VREF_TRM_TRIM(n) ((n) & 0x3F) // Trim bits -#define VREF_SC *(volatile uint8_t *)0x40074001 // VREF Status and Control Register -#define VREF_SC_VREFEN (uint8_t)0x80 // Internal Voltage Reference enable -#define VREF_SC_REGEN (uint8_t)0x40 // Regulator enable -#define VREF_SC_ICOMPEN (uint8_t)0x20 // Second order curvature compensation enable -#define VREF_SC_VREFST (uint8_t)0x04 // Internal Voltage Reference stable flag -#define VREF_SC_MODE_LV(n) (uint8_t)(((n) & 3) << 0) // Buffer Mode selection: 0=Bandgap on only - // 1=High power buffer mode, - // 2=Low-power buffer mode - -// Chapter 34: Programmable Delay Block (PDB) -#define PDB0_SC *(volatile uint32_t *)0x40036000 // Status and Control Register -#define PDB_SC_LDMOD(n) (((n) & 3) << 18) // Load Mode Select -#define PDB_SC_PDBEIE 0x00020000 // Sequence Error Interrupt Enable -#define PDB_SC_SWTRIG 0x00010000 // Software Trigger -#define PDB_SC_DMAEN 0x00008000 // DMA Enable -#define PDB_SC_PRESCALER(n) (((n) & 7) << 12) // Prescaler Divider Select -#define PDB_SC_TRGSEL(n) (((n) & 15) << 8) // Trigger Input Source Select -#define PDB_SC_PDBEN 0x00000080 // PDB Enable -#define PDB_SC_PDBIF 0x00000040 // PDB Interrupt Flag -#define PDB_SC_PDBIE 0x00000020 // PDB Interrupt Enable. -#define PDB_SC_MULT(n) (((n) & 3) << 2) // Multiplication Factor -#define PDB_SC_CONT 0x00000002 // Continuous Mode Enable -#define PDB_SC_LDOK 0x00000001 // Load OK -#define PDB0_MOD *(volatile uint32_t *)0x40036004 // Modulus Register -#define PDB0_CNT *(volatile uint32_t *)0x40036008 // Counter Register -#define PDB0_IDLY *(volatile uint32_t *)0x4003600C // Interrupt Delay Register -#define PDB0_CH0C1 *(volatile uint32_t *)0x40036010 // Channel n Control Register 1 -#define PDB0_CH0S *(volatile uint32_t *)0x40036014 // Channel n Status Register -#define PDB0_CH0DLY0 *(volatile uint32_t *)0x40036018 // Channel n Delay 0 Register -#define PDB0_CH0DLY1 *(volatile uint32_t *)0x4003601C // Channel n Delay 1 Register -#define PDB0_POEN *(volatile uint32_t *)0x40036190 // Pulse-Out n Enable Register -#define PDB0_PO0DLY *(volatile uint32_t *)0x40036194 // Pulse-Out n Delay Register -#define PDB0_PO1DLY *(volatile uint32_t *)0x40036198 // Pulse-Out n Delay Register - -// Chapter 35: FlexTimer Module (FTM) -#define FTM0_SC *(volatile uint32_t *)0x40038000 // Status And Control -#define FTM_SC_TOF 0x80 // Timer Overflow Flag -#define FTM_SC_TOIE 0x40 // Timer Overflow Interrupt Enable -#define FTM_SC_CPWMS 0x20 // Center-Aligned PWM Select -#define FTM_SC_CLKS(n) (((n) & 3) << 3) // Clock Source Selection -#define FTM_SC_PS(n) (((n) & 7) << 0) // Prescale Factor Selection -#define FTM0_CNT *(volatile uint32_t *)0x40038004 // Counter -#define FTM0_MOD *(volatile uint32_t *)0x40038008 // Modulo -#define FTM0_C0SC *(volatile uint32_t *)0x4003800C // Channel 0 Status And Control -#define FTM0_C0V *(volatile uint32_t *)0x40038010 // Channel 0 Value -#define FTM0_C1SC *(volatile uint32_t *)0x40038014 // Channel 1 Status And Control -#define FTM0_C1V *(volatile uint32_t *)0x40038018 // Channel 1 Value -#define FTM0_C2SC *(volatile uint32_t *)0x4003801C // Channel 2 Status And Control -#define FTM0_C2V *(volatile uint32_t *)0x40038020 // Channel 2 Value -#define FTM0_C3SC *(volatile uint32_t *)0x40038024 // Channel 3 Status And Control -#define FTM0_C3V *(volatile uint32_t *)0x40038028 // Channel 3 Value -#define FTM0_C4SC *(volatile uint32_t *)0x4003802C // Channel 4 Status And Control -#define FTM0_C4V *(volatile uint32_t *)0x40038030 // Channel 4 Value -#define FTM0_C5SC *(volatile uint32_t *)0x40038034 // Channel 5 Status And Control -#define FTM0_C5V *(volatile uint32_t *)0x40038038 // Channel 5 Value -#define FTM0_C6SC *(volatile uint32_t *)0x4003803C // Channel 6 Status And Control -#define FTM0_C6V *(volatile uint32_t *)0x40038040 // Channel 6 Value -#define FTM0_C7SC *(volatile uint32_t *)0x40038044 // Channel 7 Status And Control -#define FTM0_C7V *(volatile uint32_t *)0x40038048 // Channel 7 Value -#define FTM0_CNTIN *(volatile uint32_t *)0x4003804C // Counter Initial Value -#define FTM0_STATUS *(volatile uint32_t *)0x40038050 // Capture And Compare Status -#define FTM0_MODE *(volatile uint32_t *)0x40038054 // Features Mode Selection -#define FTM_MODE_FAULTIE 0x80 // Fault Interrupt Enable -#define FTM_MODE_FAULTM(n) (((n) & 3) << 5) // Fault Control Mode -#define FTM_MODE_CAPTEST 0x10 // Capture Test Mode Enable -#define FTM_MODE_PWMSYNC 0x08 // PWM Synchronization Mode -#define FTM_MODE_WPDIS 0x04 // Write Protection Disable -#define FTM_MODE_INIT 0x02 // Initialize The Channels Output -#define FTM_MODE_FTMEN 0x01 // FTM Enable -#define FTM0_SYNC *(volatile uint32_t *)0x40038058 // Synchronization -#define FTM_SYNC_SWSYNC 0x80 // -#define FTM_SYNC_TRIG2 0x40 // -#define FTM_SYNC_TRIG1 0x20 // -#define FTM_SYNC_TRIG0 0x10 // -#define FTM_SYNC_SYNCHOM 0x08 // -#define FTM_SYNC_REINIT 0x04 // -#define FTM_SYNC_CNTMAX 0x02 // -#define FTM_SYNC_CNTMIN 0x01 // -#define FTM0_OUTINIT *(volatile uint32_t *)0x4003805C // Initial State For Channels Output -#define FTM0_OUTMASK *(volatile uint32_t *)0x40038060 // Output Mask -#define FTM0_COMBINE *(volatile uint32_t *)0x40038064 // Function For Linked Channels -#define FTM0_DEADTIME *(volatile uint32_t *)0x40038068 // Deadtime Insertion Control -#define FTM0_EXTTRIG *(volatile uint32_t *)0x4003806C // FTM External Trigger -#define FTM0_POL *(volatile uint32_t *)0x40038070 // Channels Polarity -#define FTM0_FMS *(volatile uint32_t *)0x40038074 // Fault Mode Status -#define FTM0_FILTER *(volatile uint32_t *)0x40038078 // Input Capture Filter Control -#define FTM0_FLTCTRL *(volatile uint32_t *)0x4003807C // Fault Control -#define FTM0_QDCTRL *(volatile uint32_t *)0x40038080 // Quadrature Decoder Control And Status -#define FTM0_CONF *(volatile uint32_t *)0x40038084 // Configuration -#define FTM0_FLTPOL *(volatile uint32_t *)0x40038088 // FTM Fault Input Polarity -#define FTM0_SYNCONF *(volatile uint32_t *)0x4003808C // Synchronization Configuration -#define FTM0_INVCTRL *(volatile uint32_t *)0x40038090 // FTM Inverting Control -#define FTM0_SWOCTRL *(volatile uint32_t *)0x40038094 // FTM Software Output Control -#define FTM0_PWMLOAD *(volatile uint32_t *)0x40038098 // FTM PWM Load -#define FTM1_SC *(volatile uint32_t *)0x40039000 // Status And Control -#define FTM1_CNT *(volatile uint32_t *)0x40039004 // Counter -#define FTM1_MOD *(volatile uint32_t *)0x40039008 // Modulo -#define FTM1_C0SC *(volatile uint32_t *)0x4003900C // Channel 0 Status And Control -#define FTM1_C0V *(volatile uint32_t *)0x40039010 // Channel 0 Value -#define FTM1_C1SC *(volatile uint32_t *)0x40039014 // Channel 1 Status And Control -#define FTM1_C1V *(volatile uint32_t *)0x40039018 // Channel 1 Value -#define FTM1_CNTIN *(volatile uint32_t *)0x4003904C // Counter Initial Value -#define FTM1_STATUS *(volatile uint32_t *)0x40039050 // Capture And Compare Status -#define FTM1_MODE *(volatile uint32_t *)0x40039054 // Features Mode Selection -#define FTM1_SYNC *(volatile uint32_t *)0x40039058 // Synchronization -#define FTM1_OUTINIT *(volatile uint32_t *)0x4003905C // Initial State For Channels Output -#define FTM1_OUTMASK *(volatile uint32_t *)0x40039060 // Output Mask -#define FTM1_COMBINE *(volatile uint32_t *)0x40039064 // Function For Linked Channels -#define FTM1_DEADTIME *(volatile uint32_t *)0x40039068 // Deadtime Insertion Control -#define FTM1_EXTTRIG *(volatile uint32_t *)0x4003906C // FTM External Trigger -#define FTM1_POL *(volatile uint32_t *)0x40039070 // Channels Polarity -#define FTM1_FMS *(volatile uint32_t *)0x40039074 // Fault Mode Status -#define FTM1_FILTER *(volatile uint32_t *)0x40039078 // Input Capture Filter Control -#define FTM1_FLTCTRL *(volatile uint32_t *)0x4003907C // Fault Control -#define FTM1_QDCTRL *(volatile uint32_t *)0x40039080 // Quadrature Decoder Control And Status -#define FTM1_CONF *(volatile uint32_t *)0x40039084 // Configuration -#define FTM1_FLTPOL *(volatile uint32_t *)0x40039088 // FTM Fault Input Polarity -#define FTM1_SYNCONF *(volatile uint32_t *)0x4003908C // Synchronization Configuration -#define FTM1_INVCTRL *(volatile uint32_t *)0x40039090 // FTM Inverting Control -#define FTM1_SWOCTRL *(volatile uint32_t *)0x40039094 // FTM Software Output Control -#define FTM1_PWMLOAD *(volatile uint32_t *)0x40039098 // FTM PWM Load -#define FTM2_SC *(volatile uint32_t *)0x400B8000 // Status And Control -#define FTM2_CNT *(volatile uint32_t *)0x400B8004 // Counter -#define FTM2_MOD *(volatile uint32_t *)0x400B8008 // Modulo -#define FTM2_C0SC *(volatile uint32_t *)0x400B800C // Channel 0 Status And Control -#define FTM2_C0V *(volatile uint32_t *)0x400B8010 // Channel 0 Value -#define FTM2_C1SC *(volatile uint32_t *)0x400B8014 // Channel 1 Status And Control -#define FTM2_C1V *(volatile uint32_t *)0x400B8018 // Channel 1 Value -#define FTM2_CNTIN *(volatile uint32_t *)0x400B804C // Counter Initial Value -#define FTM2_STATUS *(volatile uint32_t *)0x400B8050 // Capture And Compare Status -#define FTM2_MODE *(volatile uint32_t *)0x400B8054 // Features Mode Selection -#define FTM2_SYNC *(volatile uint32_t *)0x400B8058 // Synchronization -#define FTM2_OUTINIT *(volatile uint32_t *)0x400B805C // Initial State For Channels Output -#define FTM2_OUTMASK *(volatile uint32_t *)0x400B8060 // Output Mask -#define FTM2_COMBINE *(volatile uint32_t *)0x400B8064 // Function For Linked Channels -#define FTM2_DEADTIME *(volatile uint32_t *)0x400B8068 // Deadtime Insertion Control -#define FTM2_EXTTRIG *(volatile uint32_t *)0x400B806C // FTM External Trigger -#define FTM2_POL *(volatile uint32_t *)0x400B8070 // Channels Polarity -#define FTM2_FMS *(volatile uint32_t *)0x400B8074 // Fault Mode Status -#define FTM2_FILTER *(volatile uint32_t *)0x400B8078 // Input Capture Filter Control -#define FTM2_FLTCTRL *(volatile uint32_t *)0x400B807C // Fault Control -#define FTM2_QDCTRL *(volatile uint32_t *)0x400B8080 // Quadrature Decoder Control And Status -#define FTM2_CONF *(volatile uint32_t *)0x400B8084 // Configuration -#define FTM2_FLTPOL *(volatile uint32_t *)0x400B8088 // FTM Fault Input Polarity -#define FTM2_SYNCONF *(volatile uint32_t *)0x400B808C // Synchronization Configuration -#define FTM2_INVCTRL *(volatile uint32_t *)0x400B8090 // FTM Inverting Control -#define FTM2_SWOCTRL *(volatile uint32_t *)0x400B8094 // FTM Software Output Control -#define FTM2_PWMLOAD *(volatile uint32_t *)0x400B8098 // FTM PWM Load - -// Chapter 36: Periodic Interrupt Timer (PIT) -#define PIT_MCR *(volatile uint32_t *)0x40037000 // PIT Module Control Register -#define PIT_LDVAL0 *(volatile uint32_t *)0x40037100 // Timer Load Value Register -#define PIT_CVAL0 *(volatile uint32_t *)0x40037104 // Current Timer Value Register -#define PIT_TCTRL0 *(volatile uint32_t *)0x40037108 // Timer Control Register -#define PIT_TFLG0 *(volatile uint32_t *)0x4003710C // Timer Flag Register -#define PIT_LDVAL1 *(volatile uint32_t *)0x40037110 // Timer Load Value Register -#define PIT_CVAL1 *(volatile uint32_t *)0x40037114 // Current Timer Value Register -#define PIT_TCTRL1 *(volatile uint32_t *)0x40037118 // Timer Control Register -#define PIT_TFLG1 *(volatile uint32_t *)0x4003711C // Timer Flag Register -#define PIT_LDVAL2 *(volatile uint32_t *)0x40037120 // Timer Load Value Register -#define PIT_CVAL2 *(volatile uint32_t *)0x40037124 // Current Timer Value Register -#define PIT_TCTRL2 *(volatile uint32_t *)0x40037128 // Timer Control Register -#define PIT_TFLG2 *(volatile uint32_t *)0x4003712C // Timer Flag Register -#define PIT_LDVAL3 *(volatile uint32_t *)0x40037130 // Timer Load Value Register -#define PIT_CVAL3 *(volatile uint32_t *)0x40037134 // Current Timer Value Register -#define PIT_TCTRL3 *(volatile uint32_t *)0x40037138 // Timer Control Register -#define PIT_TFLG3 *(volatile uint32_t *)0x4003713C // Timer Flag Register - -// Chapter 37: Low-Power Timer (LPTMR) -#define LPTMR0_CSR *(volatile uint32_t *)0x40040000 // Low Power Timer Control Status Register -#define LPTMR0_PSR *(volatile uint32_t *)0x40040004 // Low Power Timer Prescale Register -#define LPTMR0_CMR *(volatile uint32_t *)0x40040008 // Low Power Timer Compare Register -#define LPTMR0_CNR *(volatile uint32_t *)0x4004000C // Low Power Timer Counter Register - -// Chapter 38: Carrier Modulator Transmitter (CMT) -#define CMT_CGH1 *(volatile uint8_t *)0x40062000 // CMT Carrier Generator High Data Register 1 -#define CMT_CGL1 *(volatile uint8_t *)0x40062001 // CMT Carrier Generator Low Data Register 1 -#define CMT_CGH2 *(volatile uint8_t *)0x40062002 // CMT Carrier Generator High Data Register 2 -#define CMT_CGL2 *(volatile uint8_t *)0x40062003 // CMT Carrier Generator Low Data Register 2 -#define CMT_OC *(volatile uint8_t *)0x40062004 // CMT Output Control Register -#define CMT_MSC *(volatile uint8_t *)0x40062005 // CMT Modulator Status and Control Register -#define CMT_CMD1 *(volatile uint8_t *)0x40062006 // CMT Modulator Data Register Mark High -#define CMT_CMD2 *(volatile uint8_t *)0x40062007 // CMT Modulator Data Register Mark Low -#define CMT_CMD3 *(volatile uint8_t *)0x40062008 // CMT Modulator Data Register Space High -#define CMT_CMD4 *(volatile uint8_t *)0x40062009 // CMT Modulator Data Register Space Low -#define CMT_PPS *(volatile uint8_t *)0x4006200A // CMT Primary Prescaler Register -#define CMT_DMA *(volatile uint8_t *)0x4006200B // CMT Direct Memory Access Register - -// Chapter 39: Real Time Clock (RTC) -#define RTC_TSR *(volatile uint32_t *)0x4003D000 // RTC Time Seconds Register -#define RTC_TPR *(volatile uint32_t *)0x4003D004 // RTC Time Prescaler Register -#define RTC_TAR *(volatile uint32_t *)0x4003D008 // RTC Time Alarm Register -#define RTC_TCR *(volatile uint32_t *)0x4003D00C // RTC Time Compensation Register -#define RTC_TCR_CIC(n) (((n) & 255) << 24) // Compensation Interval Counter -#define RTC_TCR_TCV(n) (((n) & 255) << 16) // Time Compensation Value -#define RTC_TCR_CIR(n) (((n) & 255) << 8) // Compensation Interval Register -#define RTC_TCR_TCR(n) (((n) & 255) << 0) // Time Compensation Register -#define RTC_CR *(volatile uint32_t *)0x4003D010 // RTC Control Register -#define RTC_CR_SC2P (uint32_t)0x00002000 // -#define RTC_CR_SC4P (uint32_t)0x00001000 // -#define RTC_CR_SC8P (uint32_t)0x00000800 // -#define RTC_CR_SC16P (uint32_t)0x00000400 // -#define RTC_CR_CLKO (uint32_t)0x00000200 // -#define RTC_CR_OSCE (uint32_t)0x00000100 // -#define RTC_CR_UM (uint32_t)0x00000008 // -#define RTC_CR_SUP (uint32_t)0x00000004 // -#define RTC_CR_WPE (uint32_t)0x00000002 // -#define RTC_CR_SWR (uint32_t)0x00000001 // -#define RTC_SR *(volatile uint32_t *)0x4003D014 // RTC Status Register -#define RTC_SR_TCE (uint32_t)0x00000010 // -#define RTC_SR_TAF (uint32_t)0x00000004 // -#define RTC_SR_TOF (uint32_t)0x00000002 // -#define RTC_SR_TIF (uint32_t)0x00000001 // -#define RTC_LR *(volatile uint32_t *)0x4003D018 // RTC Lock Register -#define RTC_IER *(volatile uint32_t *)0x4003D01C // RTC Interrupt Enable Register -#define RTC_WAR *(volatile uint32_t *)0x4003D800 // RTC Write Access Register -#define RTC_RAR *(volatile uint32_t *)0x4003D804 // RTC Read Access Register - -// Chapter 40: Universal Serial Bus OTG Controller (USBOTG) -#define USB0_PERID *(const uint8_t *)0x40072000 // Peripheral ID register -#define USB0_IDCOMP *(const uint8_t *)0x40072004 // Peripheral ID Complement register -#define USB0_REV *(const uint8_t *)0x40072008 // Peripheral Revision register -#define USB0_ADDINFO *(volatile uint8_t *)0x4007200C // Peripheral Additional Info register -#define USB0_OTGISTAT *(volatile uint8_t *)0x40072010 // OTG Interrupt Status register -#define USB_OTGISTAT_IDCHG (uint8_t)0x80 // -#define USB_OTGISTAT_ONEMSEC (uint8_t)0x40 // -#define USB_OTGISTAT_LINE_STATE_CHG (uint8_t)0x20 // -#define USB_OTGISTAT_SESSVLDCHG (uint8_t)0x08 // -#define USB_OTGISTAT_B_SESS_CHG (uint8_t)0x04 // -#define USB_OTGISTAT_AVBUSCHG (uint8_t)0x01 // -#define USB0_OTGICR *(volatile uint8_t *)0x40072014 // OTG Interrupt Control Register -#define USB_OTGICR_IDEN (uint8_t)0x80 // -#define USB_OTGICR_ONEMSECEN (uint8_t)0x40 // -#define USB_OTGICR_LINESTATEEN (uint8_t)0x20 // -#define USB_OTGICR_SESSVLDEN (uint8_t)0x08 // -#define USB_OTGICR_BSESSEN (uint8_t)0x04 // -#define USB_OTGICR_AVBUSEN (uint8_t)0x01 // -#define USB0_OTGSTAT *(volatile uint8_t *)0x40072018 // OTG Status register -#define USB_OTGSTAT_ID (uint8_t)0x80 // -#define USB_OTGSTAT_ONEMSECEN (uint8_t)0x40 // -#define USB_OTGSTAT_LINESTATESTABLE (uint8_t)0x20 // -#define USB_OTGSTAT_SESS_VLD (uint8_t)0x08 // -#define USB_OTGSTAT_BSESSEND (uint8_t)0x04 // -#define USB_OTGSTAT_AVBUSVLD (uint8_t)0x01 // -#define USB0_OTGCTL *(volatile uint8_t *)0x4007201C // OTG Control Register -#define USB_OTGCTL_DPHIGH (uint8_t)0x80 // -#define USB_OTGCTL_DPLOW (uint8_t)0x20 // -#define USB_OTGCTL_DMLOW (uint8_t)0x10 // -#define USB_OTGCTL_OTGEN (uint8_t)0x04 // -#define USB0_ISTAT *(volatile uint8_t *)0x40072080 // Interrupt Status Register -#define USB_ISTAT_STALL (uint8_t)0x80 // -#define USB_ISTAT_ATTACH (uint8_t)0x40 // -#define USB_ISTAT_RESUME (uint8_t)0x20 // -#define USB_ISTAT_SLEEP (uint8_t)0x10 // -#define USB_ISTAT_TOKDNE (uint8_t)0x08 // -#define USB_ISTAT_SOFTOK (uint8_t)0x04 // -#define USB_ISTAT_ERROR (uint8_t)0x02 // -#define USB_ISTAT_USBRST (uint8_t)0x01 // -#define USB0_INTEN *(volatile uint8_t *)0x40072084 // Interrupt Enable Register -#define USB_INTEN_STALLEN (uint8_t)0x80 // -#define USB_INTEN_ATTACHEN (uint8_t)0x40 // -#define USB_INTEN_RESUMEEN (uint8_t)0x20 // -#define USB_INTEN_SLEEPEN (uint8_t)0x10 // -#define USB_INTEN_TOKDNEEN (uint8_t)0x08 // -#define USB_INTEN_SOFTOKEN (uint8_t)0x04 // -#define USB_INTEN_ERROREN (uint8_t)0x02 // -#define USB_INTEN_USBRSTEN (uint8_t)0x01 // -#define USB0_ERRSTAT *(volatile uint8_t *)0x40072088 // Error Interrupt Status Register -#define USB_ERRSTAT_BTSERR (uint8_t)0x80 // -#define USB_ERRSTAT_DMAERR (uint8_t)0x20 // -#define USB_ERRSTAT_BTOERR (uint8_t)0x10 // -#define USB_ERRSTAT_DFN8 (uint8_t)0x08 // -#define USB_ERRSTAT_CRC16 (uint8_t)0x04 // -#define USB_ERRSTAT_CRC5EOF (uint8_t)0x02 // -#define USB_ERRSTAT_PIDERR (uint8_t)0x01 // -#define USB0_ERREN *(volatile uint8_t *)0x4007208C // Error Interrupt Enable Register -#define USB_ERREN_BTSERREN (uint8_t)0x80 // -#define USB_ERREN_DMAERREN (uint8_t)0x20 // -#define USB_ERREN_BTOERREN (uint8_t)0x10 // -#define USB_ERREN_DFN8EN (uint8_t)0x08 // -#define USB_ERREN_CRC16EN (uint8_t)0x04 // -#define USB_ERREN_CRC5EOFEN (uint8_t)0x02 // -#define USB_ERREN_PIDERREN (uint8_t)0x01 // -#define USB0_STAT *(volatile uint8_t *)0x40072090 // Status Register -#define USB_STAT_TX (uint8_t)0x08 // -#define USB_STAT_ODD (uint8_t)0x04 // -#define USB_STAT_ENDP(n) (uint8_t)((n) >> 4) // -#define USB0_CTL *(volatile uint8_t *)0x40072094 // Control Register -#define USB_CTL_JSTATE (uint8_t)0x80 // -#define USB_CTL_SE0 (uint8_t)0x40 // -#define USB_CTL_TXSUSPENDTOKENBUSY (uint8_t)0x20 // -#define USB_CTL_RESET (uint8_t)0x10 // -#define USB_CTL_HOSTMODEEN (uint8_t)0x08 // -#define USB_CTL_RESUME (uint8_t)0x04 // -#define USB_CTL_ODDRST (uint8_t)0x02 // -#define USB_CTL_USBENSOFEN (uint8_t)0x01 // -#define USB0_ADDR *(volatile uint8_t *)0x40072098 // Address Register -#define USB0_BDTPAGE1 *(volatile uint8_t *)0x4007209C // BDT Page Register 1 -#define USB0_FRMNUML *(volatile uint8_t *)0x400720A0 // Frame Number Register Low -#define USB0_FRMNUMH *(volatile uint8_t *)0x400720A4 // Frame Number Register High -#define USB0_TOKEN *(volatile uint8_t *)0x400720A8 // Token Register -#define USB0_SOFTHLD *(volatile uint8_t *)0x400720AC // SOF Threshold Register -#define USB0_BDTPAGE2 *(volatile uint8_t *)0x400720B0 // BDT Page Register 2 -#define USB0_BDTPAGE3 *(volatile uint8_t *)0x400720B4 // BDT Page Register 3 -#define USB0_ENDPT0 *(volatile uint8_t *)0x400720C0 // Endpoint Control Register -#define USB_ENDPT_HOSTWOHUB (uint8_t)0x80 // host only, enable low speed -#define USB_ENDPT_RETRYDIS (uint8_t)0x40 // host only, set to disable NAK retry -#define USB_ENDPT_EPCTLDIS (uint8_t)0x10 // 0=control, 1=bulk, interrupt, isync -#define USB_ENDPT_EPRXEN (uint8_t)0x08 // enables the endpoint for RX transfers. -#define USB_ENDPT_EPTXEN (uint8_t)0x04 // enables the endpoint for TX transfers. -#define USB_ENDPT_EPSTALL (uint8_t)0x02 // set to stall endpoint -#define USB_ENDPT_EPHSHK (uint8_t)0x01 // enable handshaking during a transaction, generally set unless Isochronous -#define USB0_ENDPT1 *(volatile uint8_t *)0x400720C4 // Endpoint Control Register -#define USB0_ENDPT2 *(volatile uint8_t *)0x400720C8 // Endpoint Control Register -#define USB0_ENDPT3 *(volatile uint8_t *)0x400720CC // Endpoint Control Register -#define USB0_ENDPT4 *(volatile uint8_t *)0x400720D0 // Endpoint Control Register -#define USB0_ENDPT5 *(volatile uint8_t *)0x400720D4 // Endpoint Control Register -#define USB0_ENDPT6 *(volatile uint8_t *)0x400720D8 // Endpoint Control Register -#define USB0_ENDPT7 *(volatile uint8_t *)0x400720DC // Endpoint Control Register -#define USB0_ENDPT8 *(volatile uint8_t *)0x400720E0 // Endpoint Control Register -#define USB0_ENDPT9 *(volatile uint8_t *)0x400720E4 // Endpoint Control Register -#define USB0_ENDPT10 *(volatile uint8_t *)0x400720E8 // Endpoint Control Register -#define USB0_ENDPT11 *(volatile uint8_t *)0x400720EC // Endpoint Control Register -#define USB0_ENDPT12 *(volatile uint8_t *)0x400720F0 // Endpoint Control Register -#define USB0_ENDPT13 *(volatile uint8_t *)0x400720F4 // Endpoint Control Register -#define USB0_ENDPT14 *(volatile uint8_t *)0x400720F8 // Endpoint Control Register -#define USB0_ENDPT15 *(volatile uint8_t *)0x400720FC // Endpoint Control Register -#define USB0_USBCTRL *(volatile uint8_t *)0x40072100 // USB Control Register -#define USB_USBCTRL_SUSP (uint8_t)0x80 // Places the USB transceiver into the suspend state. -#define USB_USBCTRL_PDE (uint8_t)0x40 // Enables the weak pulldowns on the USB transceiver. -#define USB0_OBSERVE *(volatile uint8_t *)0x40072104 // USB OTG Observe Register -#define USB_OBSERVE_DPPU (uint8_t)0x80 // -#define USB_OBSERVE_DPPD (uint8_t)0x40 // -#define USB_OBSERVE_DMPD (uint8_t)0x10 // -#define USB0_CONTROL *(volatile uint8_t *)0x40072108 // USB OTG Control Register -#define USB_CONTROL_DPPULLUPNONOTG (uint8_t)0x10 // Provides control of the DP PULLUP in the USB OTG module, if USB is configured in non-OTG device mode. -#define USB0_USBTRC0 *(volatile uint8_t *)0x4007210C // USB Transceiver Control Register 0 -#define USB_USBTRC_USBRESET (uint8_t)0x80 // -#define USB_USBTRC_USBRESMEN (uint8_t)0x20 // -#define USB_USBTRC_SYNC_DET (uint8_t)0x02 // -#define USB_USBTRC_USB_RESUME_INT (uint8_t)0x01 // -#define USB0_USBFRMADJUST *(volatile uint8_t *)0x40072114 // Frame Adjust Register - -// Chapter 41: USB Device Charger Detection Module (USBDCD) -#define USBDCD_CONTROL *(volatile uint32_t *)0x40035000 // Control register -#define USBDCD_CLOCK *(volatile uint32_t *)0x40035004 // Clock register -#define USBDCD_STATUS *(volatile uint32_t *)0x40035008 // Status register -#define USBDCD_TIMER0 *(volatile uint32_t *)0x40035010 // TIMER0 register -#define USBDCD_TIMER1 *(volatile uint32_t *)0x40035014 // TIMER1 register -#define USBDCD_TIMER2 *(volatile uint32_t *)0x40035018 // TIMER2 register - -// Chapter 43: SPI (DSPI) -#define SPI0_MCR *(volatile uint32_t *)0x4002C000 // DSPI Module Configuration Register -#define SPI_MCR_MSTR (uint32_t)0x80000000 // Master/Slave Mode Select -#define SPI_MCR_CONT_SCKE (uint32_t)0x40000000 // -#define SPI_MCR_DCONF(n) (((n) & 3) << 28) // -#define SPI_MCR_FRZ (uint32_t)0x08000000 // -#define SPI_MCR_MTFE (uint32_t)0x04000000 // -#define SPI_MCR_ROOE (uint32_t)0x01000000 // -#define SPI_MCR_PCSIS(n) (((n) & 0x1F) << 16) // -#define SPI_MCR_DOZE (uint32_t)0x00008000 // -#define SPI_MCR_MDIS (uint32_t)0x00004000 // -#define SPI_MCR_DIS_TXF (uint32_t)0x00002000 // -#define SPI_MCR_DIS_RXF (uint32_t)0x00001000 // -#define SPI_MCR_CLR_TXF (uint32_t)0x00000800 // -#define SPI_MCR_CLR_RXF (uint32_t)0x00000400 // -#define SPI_MCR_SMPL_PT(n) (((n) & 3) << 8) // -#define SPI_MCR_HALT (uint32_t)0x00000001 // -#define SPI0_TCR *(volatile uint32_t *)0x4002C008 // DSPI Transfer Count Register -#define SPI0_CTAR0 *(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Master Mode -#define SPI_CTAR_DBR (uint32_t)0x80000000 // Double Baud Rate -#define SPI_CTAR_FMSZ(n) (((n) & 15) << 27) // Frame Size (+1) -#define SPI_CTAR_CPOL (uint32_t)0x04000000 // Clock Polarity -#define SPI_CTAR_CPHA (uint32_t)0x02000000 // Clock Phase -#define SPI_CTAR_LSBFE (uint32_t)0x01000000 // LSB First -#define SPI_CTAR_PCSSCK(n) (((n) & 3) << 22) // PCS to SCK Delay Prescaler -#define SPI_CTAR_PASC(n) (((n) & 3) << 20) // After SCK Delay Prescaler -#define SPI_CTAR_PDT(n) (((n) & 3) << 18) // Delay after Transfer Prescaler -#define SPI_CTAR_PBR(n) (((n) & 3) << 16) // Baud Rate Prescaler -#define SPI_CTAR_CSSCK(n) (((n) & 15) << 12) // PCS to SCK Delay Scaler -#define SPI_CTAR_ASC(n) (((n) & 15) << 8) // After SCK Delay Scaler -#define SPI_CTAR_DT(n) (((n) & 15) << 4) // Delay After Transfer Scaler -#define SPI_CTAR_BR(n) (((n) & 15) << 0) // Baud Rate Scaler -#define SPI0_CTAR0_SLAVE *(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Slave Mode -#define SPI0_CTAR1 *(volatile uint32_t *)0x4002C010 // DSPI Clock and Transfer Attributes Register, In Master Mode -#define SPI0_SR *(volatile uint32_t *)0x4002C02C // DSPI Status Register -#define SPI_SR_TCF (uint32_t)0x80000000 // Transfer Complete Flag -#define SPI_SR_TXRXS (uint32_t)0x40000000 // TX and RX Status -#define SPI_SR_EOQF (uint32_t)0x10000000 // End of Queue Flag -#define SPI_SR_TFUF (uint32_t)0x08000000 // Transmit FIFO Underflow Flag -#define SPI_SR_TFFF (uint32_t)0x02000000 // Transmit FIFO Fill Flag -#define SPI_SR_RFOF (uint32_t)0x00080000 // Receive FIFO Overflow Flag -#define SPI_SR_RFDF (uint32_t)0x00020000 // Receive FIFO Drain Flag -#define SPI0_RSER *(volatile uint32_t *)0x4002C030 // DSPI DMA/Interrupt Request Select and Enable Register -#define SPI_RSER_TCF_RE (uint32_t)0x80000000 // Transmission Complete Request Enable -#define SPI_RSER_EOQF_RE (uint32_t)0x10000000 // DSPI Finished Request Request Enable -#define SPI_RSER_TFUF_RE (uint32_t)0x08000000 // Transmit FIFO Underflow Request Enable -#define SPI_RSER_TFFF_RE (uint32_t)0x02000000 // Transmit FIFO Fill Request Enable -#define SPI_RSER_TFFF_DIRS (uint32_t)0x01000000 // Transmit FIFO FIll Dma or Interrupt Request Select -#define SPI_RSER_RFOF_RE (uint32_t)0x00080000 // Receive FIFO Overflow Request Enable -#define SPI_RSER_RFDF_RE (uint32_t)0x00020000 // Receive FIFO Drain Request Enable -#define SPI_RSER_RFDF_DIRS (uint32_t)0x00010000 // Receive FIFO Drain DMA or Interrupt Request Select -#define SPI0_PUSHR *(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Master Mode -#define SPI_PUSHR_CONT (uint32_t)0x80000000 // -#define SPI_PUSHR_CTAS(n) (((n) & 7) << 28) // -#define SPI_PUSHR_EOQ (uint32_t)0x08000000 // -#define SPI_PUSHR_CTCNT (uint32_t)0x04000000 // -#define SPI_PUSHR_PCS(n) (((n) & 31) << 16) // -#define SPI0_PUSHR_SLAVE *(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Slave Mode -#define SPI0_POPR *(volatile uint32_t *)0x4002C038 // DSPI POP RX FIFO Register -#define SPI0_TXFR0 *(volatile uint32_t *)0x4002C03C // DSPI Transmit FIFO Registers -#define SPI0_TXFR1 *(volatile uint32_t *)0x4002C040 // DSPI Transmit FIFO Registers -#define SPI0_TXFR2 *(volatile uint32_t *)0x4002C044 // DSPI Transmit FIFO Registers -#define SPI0_TXFR3 *(volatile uint32_t *)0x4002C048 // DSPI Transmit FIFO Registers -#define SPI0_RXFR0 *(volatile uint32_t *)0x4002C07C // DSPI Receive FIFO Registers -#define SPI0_RXFR1 *(volatile uint32_t *)0x4002C080 // DSPI Receive FIFO Registers -#define SPI0_RXFR2 *(volatile uint32_t *)0x4002C084 // DSPI Receive FIFO Registers -#define SPI0_RXFR3 *(volatile uint32_t *)0x4002C088 // DSPI Receive FIFO Registers -typedef struct { - volatile uint32_t MCR; // 0 - volatile uint32_t unused1;// 4 - volatile uint32_t TCR; // 8 - volatile uint32_t CTAR0; // c - volatile uint32_t CTAR1; // 10 - volatile uint32_t CTAR2; // 14 - volatile uint32_t CTAR3; // 18 - volatile uint32_t CTAR4; // 1c - volatile uint32_t CTAR5; // 20 - volatile uint32_t CTAR6; // 24 - volatile uint32_t CTAR7; // 28 - volatile uint32_t SR; // 2c - volatile uint32_t RSER; // 30 - volatile uint32_t PUSHR; // 34 - volatile uint32_t POPR; // 38 - volatile uint32_t TXFR[16]; // 3c - volatile uint32_t RXFR[16]; // 7c -} SPI_t; -#define SPI0 (*(SPI_t *)0x4002C000) - -// Chapter 44: Inter-Integrated Circuit (I2C) -#define I2C0_A1 *(volatile uint8_t *)0x40066000 // I2C Address Register 1 -#define I2C0_F *(volatile uint8_t *)0x40066001 // I2C Frequency Divider register -#define I2C0_C1 *(volatile uint8_t *)0x40066002 // I2C Control Register 1 -#define I2C_C1_IICEN (uint8_t)0x80 // I2C Enable -#define I2C_C1_IICIE (uint8_t)0x40 // I2C Interrupt Enable -#define I2C_C1_MST (uint8_t)0x20 // Master Mode Select -#define I2C_C1_TX (uint8_t)0x10 // Transmit Mode Select -#define I2C_C1_TXAK (uint8_t)0x08 // Transmit Acknowledge Enable -#define I2C_C1_RSTA (uint8_t)0x04 // Repeat START -#define I2C_C1_WUEN (uint8_t)0x02 // Wakeup Enable -#define I2C_C1_DMAEN (uint8_t)0x01 // DMA Enable -#define I2C0_S *(volatile uint8_t *)0x40066003 // I2C Status register -#define I2C_S_TCF (uint8_t)0x80 // Transfer Complete Flag -#define I2C_S_IAAS (uint8_t)0x40 // Addressed As A Slave -#define I2C_S_BUSY (uint8_t)0x20 // Bus Busy -#define I2C_S_ARBL (uint8_t)0x10 // Arbitration Lost -#define I2C_S_RAM (uint8_t)0x08 // Range Address Match -#define I2C_S_SRW (uint8_t)0x04 // Slave Read/Write -#define I2C_S_IICIF (uint8_t)0x02 // Interrupt Flag -#define I2C_S_RXAK (uint8_t)0x01 // Receive Acknowledge -#define I2C0_D *(volatile uint8_t *)0x40066004 // I2C Data I/O register -#define I2C0_C2 *(volatile uint8_t *)0x40066005 // I2C Control Register 2 -#define I2C_C2_GCAEN (uint8_t)0x80 // General Call Address Enable -#define I2C_C2_ADEXT (uint8_t)0x40 // Address Extension -#define I2C_C2_HDRS (uint8_t)0x20 // High Drive Select -#define I2C_C2_SBRC (uint8_t)0x10 // Slave Baud Rate Control -#define I2C_C2_RMEN (uint8_t)0x08 // Range Address Matching Enable -#define I2C_C2_AD(n) ((n) & 7) // Slave Address, upper 3 bits -#define I2C0_FLT *(volatile uint8_t *)0x40066006 // I2C Programmable Input Glitch Filter register -#define I2C0_RA *(volatile uint8_t *)0x40066007 // I2C Range Address register -#define I2C0_SMB *(volatile uint8_t *)0x40066008 // I2C SMBus Control and Status register -#define I2C0_A2 *(volatile uint8_t *)0x40066009 // I2C Address Register 2 -#define I2C0_SLTH *(volatile uint8_t *)0x4006600A // I2C SCL Low Timeout Register High -#define I2C0_SLTL *(volatile uint8_t *)0x4006600B // I2C SCL Low Timeout Register Low - -#define I2C1_A1 *(volatile uint8_t *)0x40067000 // I2C Address Register 1 -#define I2C1_F *(volatile uint8_t *)0x40067001 // I2C Frequency Divider register -#define I2C1_C1 *(volatile uint8_t *)0x40067002 // I2C Control Register 1 -#define I2C1_S *(volatile uint8_t *)0x40067003 // I2C Status register -#define I2C1_D *(volatile uint8_t *)0x40067004 // I2C Data I/O register -#define I2C1_C2 *(volatile uint8_t *)0x40067005 // I2C Control Register 2 -#define I2C1_FLT *(volatile uint8_t *)0x40067006 // I2C Programmable Input Glitch Filter register -#define I2C1_RA *(volatile uint8_t *)0x40067007 // I2C Range Address register -#define I2C1_SMB *(volatile uint8_t *)0x40067008 // I2C SMBus Control and Status register -#define I2C1_A2 *(volatile uint8_t *)0x40067009 // I2C Address Register 2 -#define I2C1_SLTH *(volatile uint8_t *)0x4006700A // I2C SCL Low Timeout Register High -#define I2C1_SLTL *(volatile uint8_t *)0x4006700B // I2C SCL Low Timeout Register Low - -// Chapter 45: Universal Asynchronous Receiver/Transmitter (UART) -#define UART0_BDH *(volatile uint8_t *)0x4006A000 // UART Baud Rate Registers: High -#define UART0_BDL *(volatile uint8_t *)0x4006A001 // UART Baud Rate Registers: Low -#define UART0_C1 *(volatile uint8_t *)0x4006A002 // UART Control Register 1 -#define UART_C1_LOOPS (uint8_t)0x80 // When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally connected to the receiver input -#define UART_C1_UARTSWAI (uint8_t)0x40 // UART Stops in Wait Mode -#define UART_C1_RSRC (uint8_t)0x20 // When LOOPS is set, the RSRC field determines the source for the receiver shift register input -#define UART_C1_M (uint8_t)0x10 // 9-bit or 8-bit Mode Select -#define UART_C1_WAKE (uint8_t)0x08 // Determines which condition wakes the UART -#define UART_C1_ILT (uint8_t)0x04 // Idle Line Type Select -#define UART_C1_PE (uint8_t)0x02 // Parity Enable -#define UART_C1_PT (uint8_t)0x01 // Parity Type, 0=even, 1=odd -#define UART0_C2 *(volatile uint8_t *)0x4006A003 // UART Control Register 2 -#define UART_C2_TIE (uint8_t)0x80 // Transmitter Interrupt or DMA Transfer Enable. -#define UART_C2_TCIE (uint8_t)0x40 // Transmission Complete Interrupt Enable -#define UART_C2_RIE (uint8_t)0x20 // Receiver Full Interrupt or DMA Transfer Enable -#define UART_C2_ILIE (uint8_t)0x10 // Idle Line Interrupt Enable -#define UART_C2_TE (uint8_t)0x08 // Transmitter Enable -#define UART_C2_RE (uint8_t)0x04 // Receiver Enable -#define UART_C2_RWU (uint8_t)0x02 // Receiver Wakeup Control -#define UART_C2_SBK (uint8_t)0x01 // Send Break -#define UART0_S1 *(volatile uint8_t *)0x4006A004 // UART Status Register 1 -#define UART_S1_TDRE (uint8_t)0x80 // Transmit Data Register Empty Flag -#define UART_S1_TC (uint8_t)0x40 // Transmit Complete Flag -#define UART_S1_RDRF (uint8_t)0x20 // Receive Data Register Full Flag -#define UART_S1_IDLE (uint8_t)0x10 // Idle Line Flag -#define UART_S1_OR (uint8_t)0x08 // Receiver Overrun Flag -#define UART_S1_NF (uint8_t)0x04 // Noise Flag -#define UART_S1_FE (uint8_t)0x02 // Framing Error Flag -#define UART_S1_PF (uint8_t)0x01 // Parity Error Flag -#define UART0_S2 *(volatile uint8_t *)0x4006A005 // UART Status Register 2 -#define UART0_C3 *(volatile uint8_t *)0x4006A006 // UART Control Register 3 -#define UART0_D *(volatile uint8_t *)0x4006A007 // UART Data Register -#define UART0_MA1 *(volatile uint8_t *)0x4006A008 // UART Match Address Registers 1 -#define UART0_MA2 *(volatile uint8_t *)0x4006A009 // UART Match Address Registers 2 -#define UART0_C4 *(volatile uint8_t *)0x4006A00A // UART Control Register 4 -#define UART0_C5 *(volatile uint8_t *)0x4006A00B // UART Control Register 5 -#define UART0_ED *(volatile uint8_t *)0x4006A00C // UART Extended Data Register -#define UART0_MODEM *(volatile uint8_t *)0x4006A00D // UART Modem Register -#define UART0_IR *(volatile uint8_t *)0x4006A00E // UART Infrared Register -#define UART0_PFIFO *(volatile uint8_t *)0x4006A010 // UART FIFO Parameters -#define UART_PFIFO_TXFE (uint8_t)0x80 -#define UART_PFIFO_RXFE (uint8_t)0x08 -#define UART0_CFIFO *(volatile uint8_t *)0x4006A011 // UART FIFO Control Register -#define UART_CFIFO_TXFLUSH (uint8_t)0x80 // -#define UART_CFIFO_RXFLUSH (uint8_t)0x40 // -#define UART_CFIFO_RXOFE (uint8_t)0x04 // -#define UART_CFIFO_TXOFE (uint8_t)0x02 // -#define UART_CFIFO_RXUFE (uint8_t)0x01 // -#define UART0_SFIFO *(volatile uint8_t *)0x4006A012 // UART FIFO Status Register -#define UART_SFIFO_TXEMPT (uint8_t)0x80 -#define UART_SFIFO_RXEMPT (uint8_t)0x40 -#define UART_SFIFO_RXOF (uint8_t)0x04 -#define UART_SFIFO_TXOF (uint8_t)0x02 -#define UART_SFIFO_RXUF (uint8_t)0x01 -#define UART0_TWFIFO *(volatile uint8_t *)0x4006A013 // UART FIFO Transmit Watermark -#define UART0_TCFIFO *(volatile uint8_t *)0x4006A014 // UART FIFO Transmit Count -#define UART0_RWFIFO *(volatile uint8_t *)0x4006A015 // UART FIFO Receive Watermark -#define UART0_RCFIFO *(volatile uint8_t *)0x4006A016 // UART FIFO Receive Count -#define UART0_C7816 *(volatile uint8_t *)0x4006A018 // UART 7816 Control Register -#define UART0_IE7816 *(volatile uint8_t *)0x4006A019 // UART 7816 Interrupt Enable Register -#define UART0_IS7816 *(volatile uint8_t *)0x4006A01A // UART 7816 Interrupt Status Register -#define UART0_WP7816T0 *(volatile uint8_t *)0x4006A01B // UART 7816 Wait Parameter Register -#define UART0_WP7816T1 *(volatile uint8_t *)0x4006A01B // UART 7816 Wait Parameter Register -#define UART0_WN7816 *(volatile uint8_t *)0x4006A01C // UART 7816 Wait N Register -#define UART0_WF7816 *(volatile uint8_t *)0x4006A01D // UART 7816 Wait FD Register -#define UART0_ET7816 *(volatile uint8_t *)0x4006A01E // UART 7816 Error Threshold Register -#define UART0_TL7816 *(volatile uint8_t *)0x4006A01F // UART 7816 Transmit Length Register -#define UART0_C6 *(volatile uint8_t *)0x4006A021 // UART CEA709.1-B Control Register 6 -#define UART0_PCTH *(volatile uint8_t *)0x4006A022 // UART CEA709.1-B Packet Cycle Time Counter High -#define UART0_PCTL *(volatile uint8_t *)0x4006A023 // UART CEA709.1-B Packet Cycle Time Counter Low -#define UART0_B1T *(volatile uint8_t *)0x4006A024 // UART CEA709.1-B Beta1 Timer -#define UART0_SDTH *(volatile uint8_t *)0x4006A025 // UART CEA709.1-B Secondary Delay Timer High -#define UART0_SDTL *(volatile uint8_t *)0x4006A026 // UART CEA709.1-B Secondary Delay Timer Low -#define UART0_PRE *(volatile uint8_t *)0x4006A027 // UART CEA709.1-B Preamble -#define UART0_TPL *(volatile uint8_t *)0x4006A028 // UART CEA709.1-B Transmit Packet Length -#define UART0_IE *(volatile uint8_t *)0x4006A029 // UART CEA709.1-B Interrupt Enable Register -#define UART0_WB *(volatile uint8_t *)0x4006A02A // UART CEA709.1-B WBASE -#define UART0_S3 *(volatile uint8_t *)0x4006A02B // UART CEA709.1-B Status Register -#define UART0_S4 *(volatile uint8_t *)0x4006A02C // UART CEA709.1-B Status Register -#define UART0_RPL *(volatile uint8_t *)0x4006A02D // UART CEA709.1-B Received Packet Length -#define UART0_RPREL *(volatile uint8_t *)0x4006A02E // UART CEA709.1-B Received Preamble Length -#define UART0_CPW *(volatile uint8_t *)0x4006A02F // UART CEA709.1-B Collision Pulse Width -#define UART0_RIDT *(volatile uint8_t *)0x4006A030 // UART CEA709.1-B Receive Indeterminate Time -#define UART0_TIDT *(volatile uint8_t *)0x4006A031 // UART CEA709.1-B Transmit Indeterminate Time -#define UART1_BDH *(volatile uint8_t *)0x4006B000 // UART Baud Rate Registers: High -#define UART1_BDL *(volatile uint8_t *)0x4006B001 // UART Baud Rate Registers: Low -#define UART1_C1 *(volatile uint8_t *)0x4006B002 // UART Control Register 1 -#define UART1_C2 *(volatile uint8_t *)0x4006B003 // UART Control Register 2 -#define UART1_S1 *(volatile uint8_t *)0x4006B004 // UART Status Register 1 -#define UART1_S2 *(volatile uint8_t *)0x4006B005 // UART Status Register 2 -#define UART1_C3 *(volatile uint8_t *)0x4006B006 // UART Control Register 3 -#define UART1_D *(volatile uint8_t *)0x4006B007 // UART Data Register -#define UART1_MA1 *(volatile uint8_t *)0x4006B008 // UART Match Address Registers 1 -#define UART1_MA2 *(volatile uint8_t *)0x4006B009 // UART Match Address Registers 2 -#define UART1_C4 *(volatile uint8_t *)0x4006B00A // UART Control Register 4 -#define UART1_C5 *(volatile uint8_t *)0x4006B00B // UART Control Register 5 -#define UART1_ED *(volatile uint8_t *)0x4006B00C // UART Extended Data Register -#define UART1_MODEM *(volatile uint8_t *)0x4006B00D // UART Modem Register -#define UART1_IR *(volatile uint8_t *)0x4006B00E // UART Infrared Register -#define UART1_PFIFO *(volatile uint8_t *)0x4006B010 // UART FIFO Parameters -#define UART1_CFIFO *(volatile uint8_t *)0x4006B011 // UART FIFO Control Register -#define UART1_SFIFO *(volatile uint8_t *)0x4006B012 // UART FIFO Status Register -#define UART1_TWFIFO *(volatile uint8_t *)0x4006B013 // UART FIFO Transmit Watermark -#define UART1_TCFIFO *(volatile uint8_t *)0x4006B014 // UART FIFO Transmit Count -#define UART1_RWFIFO *(volatile uint8_t *)0x4006B015 // UART FIFO Receive Watermark -#define UART1_RCFIFO *(volatile uint8_t *)0x4006B016 // UART FIFO Receive Count -#define UART1_C7816 *(volatile uint8_t *)0x4006B018 // UART 7816 Control Register -#define UART1_IE7816 *(volatile uint8_t *)0x4006B019 // UART 7816 Interrupt Enable Register -#define UART1_IS7816 *(volatile uint8_t *)0x4006B01A // UART 7816 Interrupt Status Register -#define UART1_WP7816T0 *(volatile uint8_t *)0x4006B01B // UART 7816 Wait Parameter Register -#define UART1_WP7816T1 *(volatile uint8_t *)0x4006B01B // UART 7816 Wait Parameter Register -#define UART1_WN7816 *(volatile uint8_t *)0x4006B01C // UART 7816 Wait N Register -#define UART1_WF7816 *(volatile uint8_t *)0x4006B01D // UART 7816 Wait FD Register -#define UART1_ET7816 *(volatile uint8_t *)0x4006B01E // UART 7816 Error Threshold Register -#define UART1_TL7816 *(volatile uint8_t *)0x4006B01F // UART 7816 Transmit Length Register -#define UART1_C6 *(volatile uint8_t *)0x4006B021 // UART CEA709.1-B Control Register 6 -#define UART1_PCTH *(volatile uint8_t *)0x4006B022 // UART CEA709.1-B Packet Cycle Time Counter High -#define UART1_PCTL *(volatile uint8_t *)0x4006B023 // UART CEA709.1-B Packet Cycle Time Counter Low -#define UART1_B1T *(volatile uint8_t *)0x4006B024 // UART CEA709.1-B Beta1 Timer -#define UART1_SDTH *(volatile uint8_t *)0x4006B025 // UART CEA709.1-B Secondary Delay Timer High -#define UART1_SDTL *(volatile uint8_t *)0x4006B026 // UART CEA709.1-B Secondary Delay Timer Low -#define UART1_PRE *(volatile uint8_t *)0x4006B027 // UART CEA709.1-B Preamble -#define UART1_TPL *(volatile uint8_t *)0x4006B028 // UART CEA709.1-B Transmit Packet Length -#define UART1_IE *(volatile uint8_t *)0x4006B029 // UART CEA709.1-B Interrupt Enable Register -#define UART1_WB *(volatile uint8_t *)0x4006B02A // UART CEA709.1-B WBASE -#define UART1_S3 *(volatile uint8_t *)0x4006B02B // UART CEA709.1-B Status Register -#define UART1_S4 *(volatile uint8_t *)0x4006B02C // UART CEA709.1-B Status Register -#define UART1_RPL *(volatile uint8_t *)0x4006B02D // UART CEA709.1-B Received Packet Length -#define UART1_RPREL *(volatile uint8_t *)0x4006B02E // UART CEA709.1-B Received Preamble Length -#define UART1_CPW *(volatile uint8_t *)0x4006B02F // UART CEA709.1-B Collision Pulse Width -#define UART1_RIDT *(volatile uint8_t *)0x4006B030 // UART CEA709.1-B Receive Indeterminate Time -#define UART1_TIDT *(volatile uint8_t *)0x4006B031 // UART CEA709.1-B Transmit Indeterminate Time -#define UART2_BDH *(volatile uint8_t *)0x4006C000 // UART Baud Rate Registers: High -#define UART2_BDL *(volatile uint8_t *)0x4006C001 // UART Baud Rate Registers: Low -#define UART2_C1 *(volatile uint8_t *)0x4006C002 // UART Control Register 1 -#define UART2_C2 *(volatile uint8_t *)0x4006C003 // UART Control Register 2 -#define UART2_S1 *(volatile uint8_t *)0x4006C004 // UART Status Register 1 -#define UART2_S2 *(volatile uint8_t *)0x4006C005 // UART Status Register 2 -#define UART2_C3 *(volatile uint8_t *)0x4006C006 // UART Control Register 3 -#define UART2_D *(volatile uint8_t *)0x4006C007 // UART Data Register -#define UART2_MA1 *(volatile uint8_t *)0x4006C008 // UART Match Address Registers 1 -#define UART2_MA2 *(volatile uint8_t *)0x4006C009 // UART Match Address Registers 2 -#define UART2_C4 *(volatile uint8_t *)0x4006C00A // UART Control Register 4 -#define UART2_C5 *(volatile uint8_t *)0x4006C00B // UART Control Register 5 -#define UART2_ED *(volatile uint8_t *)0x4006C00C // UART Extended Data Register -#define UART2_MODEM *(volatile uint8_t *)0x4006C00D // UART Modem Register -#define UART2_IR *(volatile uint8_t *)0x4006C00E // UART Infrared Register -#define UART2_PFIFO *(volatile uint8_t *)0x4006C010 // UART FIFO Parameters -#define UART2_CFIFO *(volatile uint8_t *)0x4006C011 // UART FIFO Control Register -#define UART2_SFIFO *(volatile uint8_t *)0x4006C012 // UART FIFO Status Register -#define UART2_TWFIFO *(volatile uint8_t *)0x4006C013 // UART FIFO Transmit Watermark -#define UART2_TCFIFO *(volatile uint8_t *)0x4006C014 // UART FIFO Transmit Count -#define UART2_RWFIFO *(volatile uint8_t *)0x4006C015 // UART FIFO Receive Watermark -#define UART2_RCFIFO *(volatile uint8_t *)0x4006C016 // UART FIFO Receive Count -#define UART2_C7816 *(volatile uint8_t *)0x4006C018 // UART 7816 Control Register -#define UART2_IE7816 *(volatile uint8_t *)0x4006C019 // UART 7816 Interrupt Enable Register -#define UART2_IS7816 *(volatile uint8_t *)0x4006C01A // UART 7816 Interrupt Status Register -#define UART2_WP7816T0 *(volatile uint8_t *)0x4006C01B // UART 7816 Wait Parameter Register -#define UART2_WP7816T1 *(volatile uint8_t *)0x4006C01B // UART 7816 Wait Parameter Register -#define UART2_WN7816 *(volatile uint8_t *)0x4006C01C // UART 7816 Wait N Register -#define UART2_WF7816 *(volatile uint8_t *)0x4006C01D // UART 7816 Wait FD Register -#define UART2_ET7816 *(volatile uint8_t *)0x4006C01E // UART 7816 Error Threshold Register -#define UART2_TL7816 *(volatile uint8_t *)0x4006C01F // UART 7816 Transmit Length Register -#define UART2_C6 *(volatile uint8_t *)0x4006C021 // UART CEA709.1-B Control Register 6 -#define UART2_PCTH *(volatile uint8_t *)0x4006C022 // UART CEA709.1-B Packet Cycle Time Counter High -#define UART2_PCTL *(volatile uint8_t *)0x4006C023 // UART CEA709.1-B Packet Cycle Time Counter Low -#define UART2_B1T *(volatile uint8_t *)0x4006C024 // UART CEA709.1-B Beta1 Timer -#define UART2_SDTH *(volatile uint8_t *)0x4006C025 // UART CEA709.1-B Secondary Delay Timer High -#define UART2_SDTL *(volatile uint8_t *)0x4006C026 // UART CEA709.1-B Secondary Delay Timer Low -#define UART2_PRE *(volatile uint8_t *)0x4006C027 // UART CEA709.1-B Preamble -#define UART2_TPL *(volatile uint8_t *)0x4006C028 // UART CEA709.1-B Transmit Packet Length -#define UART2_IE *(volatile uint8_t *)0x4006C029 // UART CEA709.1-B Interrupt Enable Register -#define UART2_WB *(volatile uint8_t *)0x4006C02A // UART CEA709.1-B WBASE -#define UART2_S3 *(volatile uint8_t *)0x4006C02B // UART CEA709.1-B Status Register -#define UART2_S4 *(volatile uint8_t *)0x4006C02C // UART CEA709.1-B Status Register -#define UART2_RPL *(volatile uint8_t *)0x4006C02D // UART CEA709.1-B Received Packet Length -#define UART2_RPREL *(volatile uint8_t *)0x4006C02E // UART CEA709.1-B Received Preamble Length -#define UART2_CPW *(volatile uint8_t *)0x4006C02F // UART CEA709.1-B Collision Pulse Width -#define UART2_RIDT *(volatile uint8_t *)0x4006C030 // UART CEA709.1-B Receive Indeterminate Time -#define UART2_TIDT *(volatile uint8_t *)0x4006C031 // UART CEA709.1-B Transmit Indeterminate Time - -// Chapter 46: Synchronous Audio Interface (SAI) -#define I2S0_TCSR *(volatile uint32_t *)0x4002F000 // SAI Transmit Control Register -#define I2S_TCSR_TE (uint32_t)0x80000000 // Transmitter Enable -#define I2S_TCSR_STOPE (uint32_t)0x40000000 // Transmitter Enable in Stop mode -#define I2S_TCSR_DBGE (uint32_t)0x20000000 // Transmitter Enable in Debug mode -#define I2S_TCSR_BCE (uint32_t)0x10000000 // Bit Clock Enable -#define I2S_TCSR_FR (uint32_t)0x02000000 // FIFO Reset -#define I2S_TCSR_SR (uint32_t)0x01000000 // Software Reset -#define I2S_TCSR_WSF (uint32_t)0x00100000 // Word Start Flag -#define I2S_TCSR_SEF (uint32_t)0x00080000 // Sync Error Flag -#define I2S_TCSR_FEF (uint32_t)0x00040000 // FIFO Error Flag (underrun) -#define I2S_TCSR_FWF (uint32_t)0x00020000 // FIFO Warning Flag (empty) -#define I2S_TCSR_FRF (uint32_t)0x00010000 // FIFO Request Flag (Data Ready) -#define I2S_TCSR_WSIE (uint32_t)0x00001000 // Word Start Interrupt Enable -#define I2S_TCSR_SEIE (uint32_t)0x00000800 // Sync Error Interrupt Enable -#define I2S_TCSR_FEIE (uint32_t)0x00000400 // FIFO Error Interrupt Enable -#define I2S_TCSR_FWIE (uint32_t)0x00000200 // FIFO Warning Interrupt Enable -#define I2S_TCSR_FRIE (uint32_t)0x00000100 // FIFO Request Interrupt Enable -#define I2S_TCSR_FWDE (uint32_t)0x00000002 // FIFO Warning DMA Enable -#define I2S_TCSR_FRDE (uint32_t)0x00000001 // FIFO Request DMA Enable -#define I2S0_TCR1 *(volatile uint32_t *)0x4002F004 // SAI Transmit Configuration 1 Register -#define I2S_TCR1_TFW(n) ((uint32_t)n & 0x03) // Transmit FIFO watermark -#define I2S0_TCR2 *(volatile uint32_t *)0x4002F008 // SAI Transmit Configuration 2 Register -#define I2S_TCR2_DIV(n) ((uint32_t)n & 0xff) // Bit clock divide by (DIV+1)*2 -#define I2S_TCR2_BCD ((uint32_t)1<<24) // Bit clock direction -#define I2S_TCR2_BCP ((uint32_t)1<<25) // Bit clock polarity -#define I2S_TCR2_MSEL(n) ((uint32_t)(n & 3)<<26) // MCLK select, 0=bus clock, 1=I2S0_MCLK -#define I2S_TCR2_BCI ((uint32_t)1<<28) // Bit clock input -#define I2S_TCR2_BCS ((uint32_t)1<<29) // Bit clock swap -#define I2S_TCR2_SYNC(n) ((uint32_t)(n & 3)<<30) // 0=async 1=sync with receiver -#define I2S0_TCR3 *(volatile uint32_t *)0x4002F00C // SAI Transmit Configuration 3 Register -#define I2S_TCR3_WDFL(n) ((uint32_t)n & 0x0f) // word flag configuration -#define I2S_TCR3_TCE ((uint32_t)0x10000) // transmit channel enable -#define I2S0_TCR4 *(volatile uint32_t *)0x4002F010 // SAI Transmit Configuration 4 Register -#define I2S_TCR4_FSD ((uint32_t)1) // Frame Sync Direction -#define I2S_TCR4_FSP ((uint32_t)2) // Frame Sync Polarity -#define I2S_TCR4_FSE ((uint32_t)8) // Frame Sync Early -#define I2S_TCR4_MF ((uint32_t)0x10) // MSB First -#define I2S_TCR4_SYWD(n) ((uint32_t)(n & 0x1f)<<8) // Sync Width -#define I2S_TCR4_FRSZ(n) ((uint32_t)(n & 0x0f)<<16) // Frame Size -#define I2S0_TCR5 *(volatile uint32_t *)0x4002F014 // SAI Transmit Configuration 5 Register -#define I2S_TCR5_FBT(n) ((uint32_t)(n & 0x1f)<<8) // First Bit Shifted -#define I2S_TCR5_W0W(n) ((uint32_t)(n & 0x1f)<<16) // Word 0 Width -#define I2S_TCR5_WNW(n) ((uint32_t)(n & 0x1f)<<24) // Word N Width -#define I2S0_TDR0 *(volatile uint32_t *)0x4002F020 // SAI Transmit Data Register -#define I2S0_TDR1 *(volatile uint32_t *)0x4002F024 // SAI Transmit Data Register -#define I2S0_TFR0 *(volatile uint32_t *)0x4002F040 // SAI Transmit FIFO Register -#define I2S0_TFR1 *(volatile uint32_t *)0x4002F044 // SAI Transmit FIFO Register -#define I2S_TFR_RFP(n) ((uint32_t)n & 7) // read FIFO pointer -#define I2S_TFR_WFP(n) ((uint32_t)(n & 7)<<16) // write FIFO pointer -#define I2S0_TMR *(volatile uint32_t *)0x4002F060 // SAI Transmit Mask Register -#define I2S_TMR_TWM(n) ((uint32_t)n & 0xFFFFFFFF) -#define I2S0_RCSR *(volatile uint32_t *)0x4002F080 // SAI Receive Control Register -#define I2S_RCSR_RE (uint32_t)0x80000000 // Receiver Enable -#define I2S_RCSR_STOPE (uint32_t)0x40000000 // Receiver Enable in Stop mode -#define I2S_RCSR_DBGE (uint32_t)0x20000000 // Receiver Enable in Debug mode -#define I2S_RCSR_BCE (uint32_t)0x10000000 // Bit Clock Enable -#define I2S_RCSR_FR (uint32_t)0x02000000 // FIFO Reset -#define I2S_RCSR_SR (uint32_t)0x01000000 // Software Reset -#define I2S_RCSR_WSF (uint32_t)0x00100000 // Word Start Flag -#define I2S_RCSR_SEF (uint32_t)0x00080000 // Sync Error Flag -#define I2S_RCSR_FEF (uint32_t)0x00040000 // FIFO Error Flag (underrun) -#define I2S_RCSR_FWF (uint32_t)0x00020000 // FIFO Warning Flag (empty) -#define I2S_RCSR_FRF (uint32_t)0x00010000 // FIFO Request Flag (Data Ready) -#define I2S_RCSR_WSIE (uint32_t)0x00001000 // Word Start Interrupt Enable -#define I2S_RCSR_SEIE (uint32_t)0x00000800 // Sync Error Interrupt Enable -#define I2S_RCSR_FEIE (uint32_t)0x00000400 // FIFO Error Interrupt Enable -#define I2S_RCSR_FWIE (uint32_t)0x00000200 // FIFO Warning Interrupt Enable -#define I2S_RCSR_FRIE (uint32_t)0x00000100 // FIFO Request Interrupt Enable -#define I2S_RCSR_FWDE (uint32_t)0x00000002 // FIFO Warning DMA Enable -#define I2S_RCSR_FRDE (uint32_t)0x00000001 // FIFO Request DMA Enable -#define I2S0_RCR1 *(volatile uint32_t *)0x4002F084 // SAI Receive Configuration 1 Register -#define I2S_RCR1_RFW(n) ((uint32_t)n & 0x03) // Receive FIFO watermark -#define I2S0_RCR2 *(volatile uint32_t *)0x4002F088 // SAI Receive Configuration 2 Register -#define I2S_RCR2_DIV(n) ((uint32_t)n & 0xff) // Bit clock divide by (DIV+1)*2 -#define I2S_RCR2_BCD ((uint32_t)1<<24) // Bit clock direction -#define I2S_RCR2_BCP ((uint32_t)1<<25) // Bit clock polarity -#define I2S_RCR2_MSEL(n) ((uint32_t)(n & 3)<<26) // MCLK select, 0=bus clock, 1=I2S0_MCLK -#define I2S_RCR2_BCI ((uint32_t)1<<28) // Bit clock input -#define I2S_RCR2_BCS ((uint32_t)1<<29) // Bit clock swap -#define I2S_RCR2_SYNC(n) ((uint32_t)(n & 3)<<30) // 0=async 1=sync with receiver -#define I2S0_RCR3 *(volatile uint32_t *)0x4002F08C // SAI Receive Configuration 3 Register -#define I2S_RCR3_WDFL(n) ((uint32_t)n & 0x0f) // word flag configuration -#define I2S_RCR3_RCE ((uint32_t)0x10000) // receive channel enable -#define I2S0_RCR4 *(volatile uint32_t *)0x4002F090 // SAI Receive Configuration 4 Register -#define I2S_RCR4_FSD ((uint32_t)1) // Frame Sync Direction -#define I2S_RCR4_FSP ((uint32_t)2) // Frame Sync Polarity -#define I2S_RCR4_FSE ((uint32_t)8) // Frame Sync Early -#define I2S_RCR4_MF ((uint32_t)0x10) // MSB First -#define I2S_RCR4_SYWD(n) ((uint32_t)(n & 0x1f)<<8) // Sync Width -#define I2S_RCR4_FRSZ(n) ((uint32_t)(n & 0x0f)<<16) // Frame Size -#define I2S0_RCR5 *(volatile uint32_t *)0x4002F094 // SAI Receive Configuration 5 Register -#define I2S_RCR5_FBT(n) ((uint32_t)(n & 0x1f)<<8) // First Bit Shifted -#define I2S_RCR5_W0W(n) ((uint32_t)(n & 0x1f)<<16) // Word 0 Width -#define I2S_RCR5_WNW(n) ((uint32_t)(n & 0x1f)<<24) // Word N Width -#define I2S0_RDR0 *(volatile uint32_t *)0x4002F0A0 // SAI Receive Data Register -#define I2S0_RDR1 *(volatile uint32_t *)0x4002F0A4 // SAI Receive Data Register -#define I2S0_RFR0 *(volatile uint32_t *)0x4002F0C0 // SAI Receive FIFO Register -#define I2S0_RFR1 *(volatile uint32_t *)0x4002F0C4 // SAI Receive FIFO Register -#define I2S_RFR_RFP(n) ((uint32_t)n & 7) // read FIFO pointer -#define I2S_RFR_WFP(n) ((uint32_t)(n & 7)<<16) // write FIFO pointer -#define I2S0_RMR *(volatile uint32_t *)0x4002F0E0 // SAI Receive Mask Register -#define I2S_RMR_RWM(n) ((uint32_t)n & 0xFFFFFFFF) -#define I2S0_MCR *(volatile uint32_t *)0x4002F100 // SAI MCLK Control Register -#define I2S_MCR_DUF ((uint32_t)1<<31) // Divider Update Flag -#define I2S_MCR_MOE ((uint32_t)1<<30) // MCLK Output Enable -#define I2S_MCR_MICS(n) ((uint32_t)(n & 3)<<24) // MCLK Input Clock Select -#define I2S0_MDR *(volatile uint32_t *)0x4002F104 // SAI MCLK Divide Register -#define I2S_MDR_FRACT(n) ((uint32_t)(n & 0xff)<<12) // MCLK Fraction -#define I2S_MDR_DIVIDE(n) ((uint32_t)(n & 0xfff)) // MCLK Divide - -// Chapter 47: General-Purpose Input/Output (GPIO) -#define GPIOA_PDOR *(volatile uint32_t *)0x400FF000 // Port Data Output Register -#define GPIOA_PSOR *(volatile uint32_t *)0x400FF004 // Port Set Output Register -#define GPIOA_PCOR *(volatile uint32_t *)0x400FF008 // Port Clear Output Register -#define GPIOA_PTOR *(volatile uint32_t *)0x400FF00C // Port Toggle Output Register -#define GPIOA_PDIR *(volatile uint32_t *)0x400FF010 // Port Data Input Register -#define GPIOA_PDDR *(volatile uint32_t *)0x400FF014 // Port Data Direction Register -#define GPIOB_PDOR *(volatile uint32_t *)0x400FF040 // Port Data Output Register -#define GPIOB_PSOR *(volatile uint32_t *)0x400FF044 // Port Set Output Register -#define GPIOB_PCOR *(volatile uint32_t *)0x400FF048 // Port Clear Output Register -#define GPIOB_PTOR *(volatile uint32_t *)0x400FF04C // Port Toggle Output Register -#define GPIOB_PDIR *(volatile uint32_t *)0x400FF050 // Port Data Input Register -#define GPIOB_PDDR *(volatile uint32_t *)0x400FF054 // Port Data Direction Register -#define GPIOC_PDOR *(volatile uint32_t *)0x400FF080 // Port Data Output Register -#define GPIOC_PSOR *(volatile uint32_t *)0x400FF084 // Port Set Output Register -#define GPIOC_PCOR *(volatile uint32_t *)0x400FF088 // Port Clear Output Register -#define GPIOC_PTOR *(volatile uint32_t *)0x400FF08C // Port Toggle Output Register -#define GPIOC_PDIR *(volatile uint32_t *)0x400FF090 // Port Data Input Register -#define GPIOC_PDDR *(volatile uint32_t *)0x400FF094 // Port Data Direction Register -#define GPIOD_PDOR *(volatile uint32_t *)0x400FF0C0 // Port Data Output Register -#define GPIOD_PSOR *(volatile uint32_t *)0x400FF0C4 // Port Set Output Register -#define GPIOD_PCOR *(volatile uint32_t *)0x400FF0C8 // Port Clear Output Register -#define GPIOD_PTOR *(volatile uint32_t *)0x400FF0CC // Port Toggle Output Register -#define GPIOD_PDIR *(volatile uint32_t *)0x400FF0D0 // Port Data Input Register -#define GPIOD_PDDR *(volatile uint32_t *)0x400FF0D4 // Port Data Direction Register -#define GPIOE_PDOR *(volatile uint32_t *)0x400FF100 // Port Data Output Register -#define GPIOE_PSOR *(volatile uint32_t *)0x400FF104 // Port Set Output Register -#define GPIOE_PCOR *(volatile uint32_t *)0x400FF108 // Port Clear Output Register -#define GPIOE_PTOR *(volatile uint32_t *)0x400FF10C // Port Toggle Output Register -#define GPIOE_PDIR *(volatile uint32_t *)0x400FF110 // Port Data Input Register -#define GPIOE_PDDR *(volatile uint32_t *)0x400FF114 // Port Data Direction Register - -// Chapter 48: Touch sense input (TSI) -#define TSI0_GENCS *(volatile uint32_t *)0x40045000 // General Control and Status Register -#define TSI_GENCS_LPCLKS (uint32_t)0x10000000 // -#define TSI_GENCS_LPSCNITV(n) (((n) & 15) << 24) // -#define TSI_GENCS_NSCN(n) (((n) & 31) << 19) // -#define TSI_GENCS_PS(n) (((n) & 7) << 16) // -#define TSI_GENCS_EOSF (uint32_t)0x00008000 // -#define TSI_GENCS_OUTRGF (uint32_t)0x00004000 // -#define TSI_GENCS_EXTERF (uint32_t)0x00002000 // -#define TSI_GENCS_OVRF (uint32_t)0x00001000 // -#define TSI_GENCS_SCNIP (uint32_t)0x00000200 // -#define TSI_GENCS_SWTS (uint32_t)0x00000100 // -#define TSI_GENCS_TSIEN (uint32_t)0x00000080 // -#define TSI_GENCS_TSIIE (uint32_t)0x00000040 // -#define TSI_GENCS_ERIE (uint32_t)0x00000020 // -#define TSI_GENCS_ESOR (uint32_t)0x00000010 // -#define TSI_GENCS_STM (uint32_t)0x00000002 // -#define TSI_GENCS_STPE (uint32_t)0x00000001 // -#define TSI0_SCANC *(volatile uint32_t *)0x40045004 // SCAN Control Register -#define TSI_SCANC_REFCHRG(n) (((n) & 15) << 24) // -#define TSI_SCANC_EXTCHRG(n) (((n) & 7) << 16) // -#define TSI_SCANC_SMOD(n) (((n) & 255) << 8) // -#define TSI_SCANC_AMCLKS(n) (((n) & 3) << 3) // -#define TSI_SCANC_AMPSC(n) (((n) & 7) << 0) // -#define TSI0_PEN *(volatile uint32_t *)0x40045008 // Pin Enable Register -#define TSI0_WUCNTR *(volatile uint32_t *)0x4004500C // Wake-Up Channel Counter Register -#define TSI0_CNTR1 *(volatile uint32_t *)0x40045100 // Counter Register -#define TSI0_CNTR3 *(volatile uint32_t *)0x40045104 // Counter Register -#define TSI0_CNTR5 *(volatile uint32_t *)0x40045108 // Counter Register -#define TSI0_CNTR7 *(volatile uint32_t *)0x4004510C // Counter Register -#define TSI0_CNTR9 *(volatile uint32_t *)0x40045110 // Counter Register -#define TSI0_CNTR11 *(volatile uint32_t *)0x40045114 // Counter Register -#define TSI0_CNTR13 *(volatile uint32_t *)0x40045118 // Counter Register -#define TSI0_CNTR15 *(volatile uint32_t *)0x4004511C // Counter Register -#define TSI0_THRESHOLD *(volatile uint32_t *)0x40045120 // Low Power Channel Threshold Register - -// Nested Vectored Interrupt Controller, Table 3-4 & ARMv7 ref, appendix B3.4 (page 750) -#define NVIC_ENABLE_IRQ(n) (*((volatile uint32_t *)0xE000E100 + (n >> 5)) = (1 << (n & 31))) -#define NVIC_DISABLE_IRQ(n) (*((volatile uint32_t *)0xE000E180 + (n >> 5)) = (1 << (n & 31))) -#define NVIC_SET_PENDING(n) (*((volatile uint32_t *)0xE000E200 + (n >> 5)) = (1 << (n & 31))) -#define NVIC_CLEAR_PENDING(n) (*((volatile uint32_t *)0xE000E280 + (n >> 5)) = (1 << (n & 31))) - -#define NVIC_ISER0 *(volatile uint32_t *)0xE000E100 -#define NVIC_ISER1 *(volatile uint32_t *)0xE000E104 -#define NVIC_ICER0 *(volatile uint32_t *)0xE000E180 -#define NVIC_ICER1 *(volatile uint32_t *)0xE000E184 - -// 0 = highest priority -// Cortex-M4: 0,16,32,48,64,80,96,112,128,144,160,176,192,208,224,240 -// Cortex-M0: 0,64,128,192 -#define NVIC_SET_PRIORITY(irqnum, priority) (*((volatile uint8_t *)0xE000E400 + (irqnum)) = (uint8_t)(priority)) -#define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum))) - -#if defined(__MK20DX128__) -#define IRQ_DMA_CH0 0 -#define IRQ_DMA_CH1 1 -#define IRQ_DMA_CH2 2 -#define IRQ_DMA_CH3 3 -#define IRQ_DMA_ERROR 4 -#define IRQ_FTFL_COMPLETE 6 -#define IRQ_FTFL_COLLISION 7 -#define IRQ_LOW_VOLTAGE 8 -#define IRQ_LLWU 9 -#define IRQ_WDOG 10 -#define IRQ_I2C0 11 -#define IRQ_SPI0 12 -#define IRQ_I2S0_TX 13 -#define IRQ_I2S0_RX 14 -#define IRQ_UART0_LON 15 -#define IRQ_UART0_STATUS 16 -#define IRQ_UART0_ERROR 17 -#define IRQ_UART1_STATUS 18 -#define IRQ_UART1_ERROR 19 -#define IRQ_UART2_STATUS 20 -#define IRQ_UART2_ERROR 21 -#define IRQ_ADC0 22 -#define IRQ_CMP0 23 -#define IRQ_CMP1 24 -#define IRQ_FTM0 25 -#define IRQ_FTM1 26 -#define IRQ_CMT 27 -#define IRQ_RTC_ALARM 28 -#define IRQ_RTC_SECOND 29 -#define IRQ_PIT_CH0 30 -#define IRQ_PIT_CH1 31 -#define IRQ_PIT_CH2 32 -#define IRQ_PIT_CH3 33 -#define IRQ_PDB 34 -#define IRQ_USBOTG 35 -#define IRQ_USBDCD 36 -#define IRQ_TSI 37 -#define IRQ_MCG 38 -#define IRQ_LPTMR 39 -#define IRQ_PORTA 40 -#define IRQ_PORTB 41 -#define IRQ_PORTC 42 -#define IRQ_PORTD 43 -#define IRQ_PORTE 44 -#define IRQ_SOFTWARE 45 -#define NVIC_NUM_INTERRUPTS 46 - -#elif defined(__MK20DX256__) -#define IRQ_DMA_CH0 0 -#define IRQ_DMA_CH1 1 -#define IRQ_DMA_CH2 2 -#define IRQ_DMA_CH3 3 -#define IRQ_DMA_CH4 4 -#define IRQ_DMA_CH5 5 -#define IRQ_DMA_CH6 6 -#define IRQ_DMA_CH7 7 -#define IRQ_DMA_CH8 8 -#define IRQ_DMA_CH9 9 -#define IRQ_DMA_CH10 10 -#define IRQ_DMA_CH11 11 -#define IRQ_DMA_CH12 12 -#define IRQ_DMA_CH13 13 -#define IRQ_DMA_CH14 14 -#define IRQ_DMA_CH15 15 -#define IRQ_DMA_ERROR 16 -#define IRQ_FTFL_COMPLETE 18 -#define IRQ_FTFL_COLLISION 19 -#define IRQ_LOW_VOLTAGE 20 -#define IRQ_LLWU 21 -#define IRQ_WDOG 22 -#define IRQ_I2C0 24 -#define IRQ_I2C1 25 -#define IRQ_SPI0 26 -#define IRQ_SPI1 27 -#define IRQ_CAN_MESSAGE 29 -#define IRQ_CAN_BUS_OFF 30 -#define IRQ_CAN_ERROR 31 -#define IRQ_CAN_TX_WARN 32 -#define IRQ_CAN_RX_WARN 33 -#define IRQ_CAN_WAKEUP 34 -#define IRQ_I2S0_TX 35 -#define IRQ_I2S0_RX 36 -#define IRQ_UART0_LON 44 -#define IRQ_UART0_STATUS 45 -#define IRQ_UART0_ERROR 46 -#define IRQ_UART1_STATUS 47 -#define IRQ_UART1_ERROR 48 -#define IRQ_UART2_STATUS 49 -#define IRQ_UART2_ERROR 50 -#define IRQ_ADC0 57 -#define IRQ_ADC1 58 -#define IRQ_CMP0 59 -#define IRQ_CMP1 60 -#define IRQ_CMP2 61 -#define IRQ_FTM0 62 -#define IRQ_FTM1 63 -#define IRQ_FTM2 64 -#define IRQ_CMT 65 -#define IRQ_RTC_ALARM 66 -#define IRQ_RTC_SECOND 67 -#define IRQ_PIT_CH0 68 -#define IRQ_PIT_CH1 69 -#define IRQ_PIT_CH2 70 -#define IRQ_PIT_CH3 71 -#define IRQ_PDB 72 -#define IRQ_USBOTG 73 -#define IRQ_USBDCD 74 -#define IRQ_DAC0 81 -#define IRQ_TSI 83 -#define IRQ_MCG 84 -#define IRQ_LPTMR 85 -#define IRQ_PORTA 87 -#define IRQ_PORTB 88 -#define IRQ_PORTC 89 -#define IRQ_PORTD 90 -#define IRQ_PORTE 91 -#define IRQ_SOFTWARE 94 -#define NVIC_NUM_INTERRUPTS 95 - -#endif - - - - - -#define __disable_irq() __asm__ volatile("CPSID i"); -#define __enable_irq() __asm__ volatile("CPSIE i"); - -// System Control Space (SCS), ARMv7 ref manual, B3.2, page 708 -#define SCB_CPUID *(const uint32_t *)0xE000ED00 // CPUID Base Register -#define SCB_ICSR *(volatile uint32_t *)0xE000ED04 // Interrupt Control and State -#define SCB_ICSR_PENDSTSET (uint32_t)0x04000000 -#define SCB_VTOR *(volatile uint32_t *)0xE000ED08 // Vector Table Offset -#define SCB_AIRCR *(volatile uint32_t *)0xE000ED0C // Application Interrupt and Reset Control -#define SCB_SCR *(volatile uint32_t *)0xE000ED10 // System Control Register -#define SCB_CCR *(volatile uint32_t *)0xE000ED14 // Configuration and Control -#define SCB_SHPR1 *(volatile uint32_t *)0xE000ED18 // System Handler Priority Register 1 -#define SCB_SHPR2 *(volatile uint32_t *)0xE000ED1C // System Handler Priority Register 2 -#define SCB_SHPR3 *(volatile uint32_t *)0xE000ED20 // System Handler Priority Register 3 -#define SCB_SHCSR *(volatile uint32_t *)0xE000ED24 // System Handler Control and State -#define SCB_CFSR *(volatile uint32_t *)0xE000ED28 // Configurable Fault Status Register -#define SCB_HFSR *(volatile uint32_t *)0xE000ED2C // HardFault Status -#define SCB_DFSR *(volatile uint32_t *)0xE000ED30 // Debug Fault Status -#define SCB_MMFAR *(volatile uint32_t *)0xE000ED34 // MemManage Fault Address - -#define SYST_CSR *(volatile uint32_t *)0xE000E010 // SysTick Control and Status -#define SYST_CSR_COUNTFLAG (uint32_t)0x00010000 -#define SYST_CSR_CLKSOURCE (uint32_t)0x00000004 -#define SYST_CSR_TICKINT (uint32_t)0x00000002 -#define SYST_CSR_ENABLE (uint32_t)0x00000001 -#define SYST_RVR *(volatile uint32_t *)0xE000E014 // SysTick Reload Value Register -#define SYST_CVR *(volatile uint32_t *)0xE000E018 // SysTick Current Value Register -#define SYST_CALIB *(const uint32_t *)0xE000E01C // SysTick Calibration Value - - -#define ARM_DEMCR *(volatile uint32_t *)0xE000EDFC // Debug Exception and Monitor Control -#define ARM_DEMCR_TRCENA (1 << 24) // Enable debugging & monitoring blocks -#define ARM_DWT_CTRL *(volatile uint32_t *)0xE0001000 // DWT control register -#define ARM_DWT_CTRL_CYCCNTENA (1 << 0) // Enable cycle count -#define ARM_DWT_CYCCNT *(volatile uint32_t *)0xE0001004 // Cycle count register - -extern int nvic_execution_priority(void); - -extern void nmi_isr(void); -extern void hard_fault_isr(void); -extern void memmanage_fault_isr(void); -extern void bus_fault_isr(void); -extern void usage_fault_isr(void); -extern void svcall_isr(void); -extern void debugmonitor_isr(void); -extern void pendablesrvreq_isr(void); -extern void systick_isr(void); -extern void dma_ch0_isr(void); -extern void dma_ch1_isr(void); -extern void dma_ch2_isr(void); -extern void dma_ch3_isr(void); -extern void dma_ch4_isr(void); -extern void dma_ch5_isr(void); -extern void dma_ch6_isr(void); -extern void dma_ch7_isr(void); -extern void dma_ch8_isr(void); -extern void dma_ch9_isr(void); -extern void dma_ch10_isr(void); -extern void dma_ch11_isr(void); -extern void dma_ch12_isr(void); -extern void dma_ch13_isr(void); -extern void dma_ch14_isr(void); -extern void dma_ch15_isr(void); -extern void dma_error_isr(void); -extern void mcm_isr(void); -extern void flash_cmd_isr(void); -extern void flash_error_isr(void); -extern void low_voltage_isr(void); -extern void wakeup_isr(void); -extern void watchdog_isr(void); -extern void i2c0_isr(void); -extern void i2c1_isr(void); -extern void i2c2_isr(void); -extern void spi0_isr(void); -extern void spi1_isr(void); -extern void spi2_isr(void); -extern void sdhc_isr(void); -extern void can0_message_isr(void); -extern void can0_bus_off_isr(void); -extern void can0_error_isr(void); -extern void can0_tx_warn_isr(void); -extern void can0_rx_warn_isr(void); -extern void can0_wakeup_isr(void); -extern void i2s0_tx_isr(void); -extern void i2s0_rx_isr(void); -extern void uart0_lon_isr(void); -extern void uart0_status_isr(void); -extern void uart0_error_isr(void); -extern void uart1_status_isr(void); -extern void uart1_error_isr(void); -extern void uart2_status_isr(void); -extern void uart2_error_isr(void); -extern void uart3_status_isr(void); -extern void uart3_error_isr(void); -extern void uart4_status_isr(void); -extern void uart4_error_isr(void); -extern void uart5_status_isr(void); -extern void uart5_error_isr(void); -extern void adc0_isr(void); -extern void adc1_isr(void); -extern void cmp0_isr(void); -extern void cmp1_isr(void); -extern void cmp2_isr(void); -extern void ftm0_isr(void); -extern void ftm1_isr(void); -extern void ftm2_isr(void); -extern void ftm3_isr(void); -extern void cmt_isr(void); -extern void rtc_alarm_isr(void); -extern void rtc_seconds_isr(void); -extern void pit0_isr(void); -extern void pit1_isr(void); -extern void pit2_isr(void); -extern void pit3_isr(void); -extern void pdb_isr(void); -extern void usb_isr(void); -extern void usb_charge_isr(void); -extern void dac0_isr(void); -extern void dac1_isr(void); -extern void tsi0_isr(void); -extern void mcg_isr(void); -extern void lptmr_isr(void); -extern void porta_isr(void); -extern void portb_isr(void); -extern void portc_isr(void); -extern void portd_isr(void); -extern void porte_isr(void); -extern void software_isr(void); - - - -#ifdef __cplusplus -} -#endif -#endif diff --git a/ports/teensy/core/pins_arduino.h b/ports/teensy/core/pins_arduino.h deleted file mode 100644 index 03674933c2..0000000000 --- a/ports/teensy/core/pins_arduino.h +++ /dev/null @@ -1,113 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef pins_macros_for_arduino_compatibility_h -#define pins_macros_for_arduino_compatibility_h - -#include - -const static uint8_t A0 = 14; -const static uint8_t A1 = 15; -const static uint8_t A2 = 16; -const static uint8_t A3 = 17; -const static uint8_t A4 = 18; -const static uint8_t A5 = 19; -const static uint8_t A6 = 20; -const static uint8_t A7 = 21; -const static uint8_t A8 = 22; -const static uint8_t A9 = 23; -const static uint8_t A10 = 34; -const static uint8_t A11 = 35; -const static uint8_t A12 = 36; -const static uint8_t A13 = 37; -const static uint8_t A14 = 40; - -const static uint8_t A15 = 26; -const static uint8_t A16 = 27; -const static uint8_t A17 = 28; -const static uint8_t A18 = 29; -const static uint8_t A19 = 30; -const static uint8_t A20 = 31; - -const static uint8_t SS = 10; -const static uint8_t MOSI = 11; -const static uint8_t MISO = 12; -const static uint8_t SCK = 13; -const static uint8_t LED_BUILTIN = 13; -const static uint8_t SDA = 18; -const static uint8_t SCL = 19; - - -#define NUM_DIGITAL_PINS 34 -#define NUM_ANALOG_INPUTS 14 - -#define analogInputToDigitalPin(p) (((p) < 10) ? (p) + 14 : -1) -#define digitalPinHasPWM(p) (((p) >= 3 && (p) <= 6) || (p) == 9 || (p) == 10 || ((p) >= 20 && (p) <= 23)) - -#define NOT_AN_INTERRUPT -1 -#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) - - -struct digital_pin_bitband_and_config_table_struct { - volatile uint32_t *reg; - volatile uint32_t *config; -}; -extern const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[]; - -// compatibility macros -#define digitalPinToPort(pin) (pin) -#define digitalPinToBitMask(pin) (1) -#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0)) -#define portSetRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32)) -#define portClearRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64)) -#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96)) -#define portInputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128)) -#define portModeRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160)) -#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config)) - - -#define digitalPinToPortReg(pin) (portOutputRegister(pin)) -#define digitalPinToBit(pin) (1) - - -#define NOT_ON_TIMER 0 -static inline uint8_t digitalPinToTimer(uint8_t) __attribute__((always_inline, unused)); -static inline uint8_t digitalPinToTimer(uint8_t pin) -{ - if (pin >= 3 && pin <= 6) return pin - 2; - if (pin >= 9 && pin <= 10) return pin - 4; - if (pin >= 20 && pin <= 23) return pin - 13; - return NOT_ON_TIMER; -} - - - - -#endif diff --git a/ports/teensy/core/pins_teensy.c b/ports/teensy/core/pins_teensy.c deleted file mode 100644 index b28f94a9ec..0000000000 --- a/ports/teensy/core/pins_teensy.c +++ /dev/null @@ -1,817 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "core_pins.h" -#include "pins_arduino.h" -#include "HardwareSerial.h" - -#if 0 -// moved to pins_arduino.h -struct digital_pin_bitband_and_config_table_struct { - volatile uint32_t *reg; - volatile uint32_t *config; -}; -const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[]; - -// compatibility macros -#define digitalPinToPort(pin) (pin) -#define digitalPinToBitMask(pin) (1) -#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0)) -#define portSetRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32)) -#define portClearRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64)) -#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96)) -#define portInputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128)) -#define portModeRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160)) -#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config)) -#endif - -//#define digitalPinToTimer(P) ( pgm_read_byte( digital_pin_to_timer_PGM + (P) ) ) -//#define analogInPinToBit(P) (P) - -#define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000) -#define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit))) -//#define GPIO_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1) -//#define GPIO_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0) - -const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[] = { - {GPIO_BITBAND_PTR(CORE_PIN0_PORTREG, CORE_PIN0_BIT), &CORE_PIN0_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN1_PORTREG, CORE_PIN1_BIT), &CORE_PIN1_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN2_PORTREG, CORE_PIN2_BIT), &CORE_PIN2_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN3_PORTREG, CORE_PIN3_BIT), &CORE_PIN3_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN4_PORTREG, CORE_PIN4_BIT), &CORE_PIN4_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN5_PORTREG, CORE_PIN5_BIT), &CORE_PIN5_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN6_PORTREG, CORE_PIN6_BIT), &CORE_PIN6_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN7_PORTREG, CORE_PIN7_BIT), &CORE_PIN7_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN8_PORTREG, CORE_PIN8_BIT), &CORE_PIN8_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN9_PORTREG, CORE_PIN9_BIT), &CORE_PIN9_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN10_PORTREG, CORE_PIN10_BIT), &CORE_PIN10_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN11_PORTREG, CORE_PIN11_BIT), &CORE_PIN11_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN12_PORTREG, CORE_PIN12_BIT), &CORE_PIN12_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN13_PORTREG, CORE_PIN13_BIT), &CORE_PIN13_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN14_PORTREG, CORE_PIN14_BIT), &CORE_PIN14_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN15_PORTREG, CORE_PIN15_BIT), &CORE_PIN15_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN16_PORTREG, CORE_PIN16_BIT), &CORE_PIN16_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN17_PORTREG, CORE_PIN17_BIT), &CORE_PIN17_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN18_PORTREG, CORE_PIN18_BIT), &CORE_PIN18_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN19_PORTREG, CORE_PIN19_BIT), &CORE_PIN19_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN20_PORTREG, CORE_PIN20_BIT), &CORE_PIN20_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN21_PORTREG, CORE_PIN21_BIT), &CORE_PIN21_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN22_PORTREG, CORE_PIN22_BIT), &CORE_PIN22_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN23_PORTREG, CORE_PIN23_BIT), &CORE_PIN23_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN24_PORTREG, CORE_PIN24_BIT), &CORE_PIN24_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN25_PORTREG, CORE_PIN25_BIT), &CORE_PIN25_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN26_PORTREG, CORE_PIN26_BIT), &CORE_PIN26_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN27_PORTREG, CORE_PIN27_BIT), &CORE_PIN27_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN28_PORTREG, CORE_PIN28_BIT), &CORE_PIN28_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN29_PORTREG, CORE_PIN29_BIT), &CORE_PIN29_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN30_PORTREG, CORE_PIN30_BIT), &CORE_PIN30_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN31_PORTREG, CORE_PIN31_BIT), &CORE_PIN31_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN32_PORTREG, CORE_PIN32_BIT), &CORE_PIN32_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN33_PORTREG, CORE_PIN33_BIT), &CORE_PIN33_CONFIG} -}; - - - - -typedef void (*voidFuncPtr)(void); -volatile static voidFuncPtr intFunc[CORE_NUM_DIGITAL]; - -void init_pin_interrupts(void) -{ - //SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO - NVIC_ENABLE_IRQ(IRQ_PORTA); - NVIC_ENABLE_IRQ(IRQ_PORTB); - NVIC_ENABLE_IRQ(IRQ_PORTC); - NVIC_ENABLE_IRQ(IRQ_PORTD); - NVIC_ENABLE_IRQ(IRQ_PORTE); - // TODO: maybe these should be set to a lower priority - // so if the user puts lots of slow code on attachInterrupt - // fast interrupts will still be serviced quickly? -} - -void attachInterrupt(uint8_t pin, void (*function)(void), int mode) -{ - volatile uint32_t *config; - uint32_t cfg, mask; - - if (pin >= CORE_NUM_DIGITAL) return; - switch (mode) { - case CHANGE: mask = 0x0B; break; - case RISING: mask = 0x09; break; - case FALLING: mask = 0x0A; break; - case LOW: mask = 0x08; break; - case HIGH: mask = 0x0C; break; - default: return; - } - mask = (mask << 16) | 0x01000000; - config = portConfigRegister(pin); - - __disable_irq(); - cfg = *config; - cfg &= ~0x000F0000; // disable any previous interrupt - *config = cfg; - intFunc[pin] = function; // set the function pointer - cfg |= mask; - *config = cfg; // enable the new interrupt - __enable_irq(); -} - -void detachInterrupt(uint8_t pin) -{ - volatile uint32_t *config; - - config = portConfigRegister(pin); - __disable_irq(); - *config = ((*config & ~0x000F0000) | 0x01000000); - intFunc[pin] = NULL; - __enable_irq(); -} - - -void porta_isr(void) -{ - uint32_t isfr = PORTA_ISFR; - PORTA_ISFR = isfr; - if ((isfr & CORE_PIN3_BITMASK) && intFunc[3]) intFunc[3](); - if ((isfr & CORE_PIN4_BITMASK) && intFunc[4]) intFunc[4](); - if ((isfr & CORE_PIN24_BITMASK) && intFunc[24]) intFunc[24](); - if ((isfr & CORE_PIN33_BITMASK) && intFunc[33]) intFunc[33](); -} - -void portb_isr(void) -{ - uint32_t isfr = PORTB_ISFR; - PORTB_ISFR = isfr; - if ((isfr & CORE_PIN0_BITMASK) && intFunc[0]) intFunc[0](); - if ((isfr & CORE_PIN1_BITMASK) && intFunc[1]) intFunc[1](); - if ((isfr & CORE_PIN16_BITMASK) && intFunc[16]) intFunc[16](); - if ((isfr & CORE_PIN17_BITMASK) && intFunc[17]) intFunc[17](); - if ((isfr & CORE_PIN18_BITMASK) && intFunc[18]) intFunc[18](); - if ((isfr & CORE_PIN19_BITMASK) && intFunc[19]) intFunc[19](); - if ((isfr & CORE_PIN25_BITMASK) && intFunc[25]) intFunc[25](); - if ((isfr & CORE_PIN32_BITMASK) && intFunc[32]) intFunc[32](); -} - -void portc_isr(void) -{ - // TODO: these are inefficent. Use CLZ somehow.... - uint32_t isfr = PORTC_ISFR; - PORTC_ISFR = isfr; - if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9](); - if ((isfr & CORE_PIN10_BITMASK) && intFunc[10]) intFunc[10](); - if ((isfr & CORE_PIN11_BITMASK) && intFunc[11]) intFunc[11](); - if ((isfr & CORE_PIN12_BITMASK) && intFunc[12]) intFunc[12](); - if ((isfr & CORE_PIN13_BITMASK) && intFunc[13]) intFunc[13](); - if ((isfr & CORE_PIN15_BITMASK) && intFunc[15]) intFunc[15](); - if ((isfr & CORE_PIN22_BITMASK) && intFunc[22]) intFunc[22](); - if ((isfr & CORE_PIN23_BITMASK) && intFunc[23]) intFunc[23](); - if ((isfr & CORE_PIN27_BITMASK) && intFunc[27]) intFunc[27](); - if ((isfr & CORE_PIN28_BITMASK) && intFunc[28]) intFunc[28](); - if ((isfr & CORE_PIN29_BITMASK) && intFunc[29]) intFunc[29](); - if ((isfr & CORE_PIN30_BITMASK) && intFunc[30]) intFunc[30](); -} - -void portd_isr(void) -{ - uint32_t isfr = PORTD_ISFR; - PORTD_ISFR = isfr; - if ((isfr & CORE_PIN2_BITMASK) && intFunc[2]) intFunc[2](); - if ((isfr & CORE_PIN5_BITMASK) && intFunc[5]) intFunc[5](); - if ((isfr & CORE_PIN6_BITMASK) && intFunc[6]) intFunc[6](); - if ((isfr & CORE_PIN7_BITMASK) && intFunc[7]) intFunc[7](); - if ((isfr & CORE_PIN8_BITMASK) && intFunc[8]) intFunc[8](); - if ((isfr & CORE_PIN14_BITMASK) && intFunc[14]) intFunc[14](); - if ((isfr & CORE_PIN20_BITMASK) && intFunc[20]) intFunc[20](); - if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21](); -} - -void porte_isr(void) -{ - uint32_t isfr = PORTE_ISFR; - PORTE_ISFR = isfr; - if ((isfr & CORE_PIN26_BITMASK) && intFunc[26]) intFunc[26](); - if ((isfr & CORE_PIN31_BITMASK) && intFunc[31]) intFunc[31](); -} - - - - -unsigned long rtc_get(void) -{ - return RTC_TSR; -} - -void rtc_set(unsigned long t) -{ - RTC_SR = 0; - RTC_TPR = 0; - RTC_TSR = t; - RTC_SR = RTC_SR_TCE; -} - - -// adjust is the amount of crystal error to compensate, 1 = 0.1192 ppm -// For example, adjust = -100 is slows the clock by 11.92 ppm -// -void rtc_compensate(int adjust) -{ - uint32_t comp, interval, tcr; - - // This simple approach tries to maximize the interval. - // Perhaps minimizing TCR would be better, so the - // compensation is distributed more evenly across - // many seconds, rather than saving it all up and then - // altering one second up to +/- 0.38% - if (adjust >= 0) { - comp = adjust; - interval = 256; - while (1) { - tcr = comp * interval; - if (tcr < 128*256) break; - if (--interval == 1) break; - } - tcr = tcr >> 8; - } else { - comp = -adjust; - interval = 256; - while (1) { - tcr = comp * interval; - if (tcr < 129*256) break; - if (--interval == 1) break; - } - tcr = tcr >> 8; - tcr = 256 - tcr; - } - RTC_TCR = ((interval - 1) << 8) | tcr; -} - -#if 0 -// TODO: build system should define this -// so RTC is automatically initialized to approx correct time -// at least when the program begins running right after upload -#ifndef TIME_T -#define TIME_T 1350160272 -#endif - -void init_rtc(void) -{ - serial_print("init_rtc\n"); - //SIM_SCGC6 |= SIM_SCGC6_RTC; - - // enable the RTC crystal oscillator, for approx 12pf crystal - if (!(RTC_CR & RTC_CR_OSCE)) { - serial_print("start RTC oscillator\n"); - RTC_SR = 0; - RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE; - } - // should wait for crystal to stabilize..... - - serial_print("SR="); - serial_phex32(RTC_SR); - serial_print("\n"); - serial_print("CR="); - serial_phex32(RTC_CR); - serial_print("\n"); - serial_print("TSR="); - serial_phex32(RTC_TSR); - serial_print("\n"); - serial_print("TCR="); - serial_phex32(RTC_TCR); - serial_print("\n"); - - if (RTC_SR & RTC_SR_TIF) { - // enable the RTC - RTC_SR = 0; - RTC_TPR = 0; - RTC_TSR = TIME_T; - RTC_SR = RTC_SR_TCE; - } -} -#endif - -extern void usb_init(void); - - -// create a default PWM at the same 488.28 Hz as Arduino Uno - -#if F_BUS == 60000000 -#define DEFAULT_FTM_MOD (61440 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 56000000 -#define DEFAULT_FTM_MOD (57344 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 48000000 -#define DEFAULT_FTM_MOD (49152 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 40000000 -#define DEFAULT_FTM_MOD (40960 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 36000000 -#define DEFAULT_FTM_MOD (36864 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 24000000 -#define DEFAULT_FTM_MOD (49152 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 16000000 -#define DEFAULT_FTM_MOD (32768 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 8000000 -#define DEFAULT_FTM_MOD (16384 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 4000000 -#define DEFAULT_FTM_MOD (8192 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 2000000 -#define DEFAULT_FTM_MOD (4096 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#endif - -//void init_pins(void) -void _init_Teensyduino_internal_(void) -{ - init_pin_interrupts(); - - //SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write - //SIM_SCGC6 |= SIM_SCGC6_FTM1; - FTM0_CNT = 0; - FTM0_MOD = DEFAULT_FTM_MOD; - FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10 - FTM0_C1SC = 0x28; - FTM0_C2SC = 0x28; - FTM0_C3SC = 0x28; - FTM0_C4SC = 0x28; - FTM0_C5SC = 0x28; - FTM0_C6SC = 0x28; - FTM0_C7SC = 0x28; - FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); - FTM1_CNT = 0; - FTM1_MOD = DEFAULT_FTM_MOD; - FTM1_C0SC = 0x28; - FTM1_C1SC = 0x28; - FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); -#if defined(__MK20DX256__) - FTM2_CNT = 0; - FTM2_MOD = DEFAULT_FTM_MOD; - FTM2_C0SC = 0x28; - FTM2_C1SC = 0x28; - FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); -#endif - - analog_init(); - //delay(100); // TODO: this is not necessary, right? - delay(4); - usb_init(); -} - - - -static uint8_t analog_write_res = 8; - -// SOPT4 is SIM select clocks? -// FTM is clocked by the bus clock, either 24 or 48 MHz -// input capture can be FTM1_CH0, CMP0 or CMP1 or USB start of frame -// 24 MHz with reload 49152 to match Arduino's speed = 488.28125 Hz - -void analogWrite(uint8_t pin, int val) -{ - uint32_t cval, max; - -#if defined(__MK20DX256__) - if (pin == A14) { - uint8_t res = analog_write_res; - if (res < 12) { - val <<= 12 - res; - } else if (res > 12) { - val >>= res - 12; - } - analogWriteDAC0(val); - return; - } -#endif - - max = 1 << analog_write_res; - if (val <= 0) { - digitalWrite(pin, LOW); - pinMode(pin, OUTPUT); // TODO: implement OUTPUT_LOW - return; - } else if (val >= max) { - digitalWrite(pin, HIGH); - pinMode(pin, OUTPUT); // TODO: implement OUTPUT_HIGH - return; - } - - //serial_print("analogWrite\n"); - //serial_print("val = "); - //serial_phex32(val); - //serial_print("\n"); - //serial_print("analog_write_res = "); - //serial_phex(analog_write_res); - //serial_print("\n"); - if (pin == 3 || pin == 4) { - cval = ((uint32_t)val * (uint32_t)(FTM1_MOD + 1)) >> analog_write_res; -#if defined(__MK20DX256__) - } else if (pin == 25 || pin == 32) { - cval = ((uint32_t)val * (uint32_t)(FTM2_MOD + 1)) >> analog_write_res; -#endif - } else { - cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res; - } - //serial_print("cval = "); - //serial_phex32(cval); - //serial_print("\n"); - switch (pin) { - case 3: // PTA12, FTM1_CH0 - FTM1_C0V = cval; - CORE_PIN3_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 4: // PTA13, FTM1_CH1 - FTM1_C1V = cval; - CORE_PIN4_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 5: // PTD7, FTM0_CH7 - FTM0_C7V = cval; - CORE_PIN5_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 6: // PTD4, FTM0_CH4 - FTM0_C4V = cval; - CORE_PIN6_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 9: // PTC3, FTM0_CH2 - FTM0_C2V = cval; - CORE_PIN9_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 10: // PTC4, FTM0_CH3 - FTM0_C3V = cval; - CORE_PIN10_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 20: // PTD5, FTM0_CH5 - FTM0_C5V = cval; - CORE_PIN20_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 21: // PTD6, FTM0_CH6 - FTM0_C6V = cval; - CORE_PIN21_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 22: // PTC1, FTM0_CH0 - FTM0_C0V = cval; - CORE_PIN22_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 23: // PTC2, FTM0_CH1 - FTM0_C1V = cval; - CORE_PIN23_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; -#if defined(__MK20DX256__) - case 32: // PTB18, FTM2_CH0 - FTM2_C0V = cval; - CORE_PIN32_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 25: // PTB19, FTM1_CH1 - FTM2_C1V = cval; - CORE_PIN25_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; -#endif - default: - digitalWrite(pin, (val > 127) ? HIGH : LOW); - pinMode(pin, OUTPUT); - } -} - -void analogWriteRes(uint32_t bits) -{ - if (bits < 1) { - bits = 1; - } else if (bits > 16) { - bits = 16; - } - analog_write_res = bits; -} - -void analogWriteFrequency(uint8_t pin, uint32_t frequency) -{ - uint32_t minfreq, prescale, mod; - - //serial_print("analogWriteFrequency: pin = "); - //serial_phex(pin); - //serial_print(", freq = "); - //serial_phex32(frequency); - //serial_print("\n"); - for (prescale = 0; prescale < 7; prescale++) { - minfreq = (F_BUS >> 16) >> prescale; - if (frequency > minfreq) break; - } - //serial_print("F_BUS = "); - //serial_phex32(F_BUS >> prescale); - //serial_print("\n"); - //serial_print("prescale = "); - //serial_phex(prescale); - //serial_print("\n"); - //mod = ((F_BUS >> prescale) / frequency) - 1; - mod = (((F_BUS >> prescale) + (frequency >> 1)) / frequency) - 1; - if (mod > 65535) mod = 65535; - //serial_print("mod = "); - //serial_phex32(mod); - //serial_print("\n"); - if (pin == 3 || pin == 4) { - FTM1_SC = 0; - FTM1_CNT = 0; - FTM1_MOD = mod; - FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale); - } else if (pin == 5 || pin == 6 || pin == 9 || pin == 10 || - (pin >= 20 && pin <= 23)) { - FTM0_SC = 0; - FTM0_CNT = 0; - FTM0_MOD = mod; - FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale); - } -} - - - - -// TODO: startup code needs to initialize all pins to GPIO mode, input by default - -void digitalWrite(uint8_t pin, uint8_t val) -{ - if (pin >= CORE_NUM_DIGITAL) return; - if (*portModeRegister(pin)) { - if (val) { - *portSetRegister(pin) = 1; - } else { - *portClearRegister(pin) = 1; - } - } else { - volatile uint32_t *config = portConfigRegister(pin); - if (val) { - // TODO use bitband for atomic read-mod-write - *config |= (PORT_PCR_PE | PORT_PCR_PS); - //*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; - } else { - // TODO use bitband for atomic read-mod-write - *config &= ~(PORT_PCR_PE); - //*config = PORT_PCR_MUX(1); - } - } - -} - -uint8_t digitalRead(uint8_t pin) -{ - if (pin >= CORE_NUM_DIGITAL) return 0; - return *portInputRegister(pin); -} - - - -void pinMode(uint8_t pin, uint8_t mode) -{ - volatile uint32_t *config; - - if (pin >= CORE_NUM_DIGITAL) return; - config = portConfigRegister(pin); - - if (mode == OUTPUT) { - *portModeRegister(pin) = 1; - *config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1); - } else { - *portModeRegister(pin) = 0; - if (mode == INPUT) { - *config = PORT_PCR_MUX(1); - } else { - *config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup - } - } -} - - -void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) -{ - if (bitOrder == LSBFIRST) { - shiftOut_lsbFirst(dataPin, clockPin, value); - } else { - shiftOut_msbFirst(dataPin, clockPin, value); - } -} - -void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) -{ - uint8_t mask; - for (mask=0x01; mask; mask <<= 1) { - digitalWrite(dataPin, value & mask); - digitalWrite(clockPin, HIGH); - digitalWrite(clockPin, LOW); - } -} - -void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) -{ - uint8_t mask; - for (mask=0x80; mask; mask >>= 1) { - digitalWrite(dataPin, value & mask); - digitalWrite(clockPin, HIGH); - digitalWrite(clockPin, LOW); - } -} - -uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) -{ - if (bitOrder == LSBFIRST) { - return shiftIn_lsbFirst(dataPin, clockPin); - } else { - return shiftIn_msbFirst(dataPin, clockPin); - } -} - -uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin) -{ - uint8_t mask, value=0; - for (mask=0x01; mask; mask <<= 1) { - digitalWrite(clockPin, HIGH); - if (digitalRead(dataPin)) value |= mask; - digitalWrite(clockPin, LOW); - } - return value; -} - -uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin) -{ - uint8_t mask, value=0; - for (mask=0x80; mask; mask >>= 1) { - digitalWrite(clockPin, HIGH); - if (digitalRead(dataPin)) value |= mask; - digitalWrite(clockPin, LOW); - } - return value; -} - - - -// the systick interrupt is supposed to increment this at 1 kHz rate -volatile uint32_t systick_millis_count = 0; - -//uint32_t systick_current, systick_count, systick_istatus; // testing only - -uint32_t micros(void) -{ - uint32_t count, current, istatus; - - __disable_irq(); - current = SYST_CVR; - count = systick_millis_count; - istatus = SCB_ICSR; // bit 26 indicates if systick exception pending - __enable_irq(); - //systick_current = current; - //systick_count = count; - //systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0; - if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++; - current = ((F_CPU / 1000) - 1) - current; - return count * 1000 + current / (F_CPU / 1000000); -} - -void delay(uint32_t ms) -{ - uint32_t start = micros(); - - if (ms > 0) { - while (1) { - if ((micros() - start) >= 1000) { - ms--; - if (ms == 0) return; - start += 1000; - } - yield(); - } - } -} - -// TODO: verify these result in correct timeouts... -#if F_CPU == 168000000 -#define PULSEIN_LOOPS_PER_USEC 25 -#elif F_CPU == 144000000 -#define PULSEIN_LOOPS_PER_USEC 21 -#elif F_CPU == 120000000 -#define PULSEIN_LOOPS_PER_USEC 18 -#elif F_CPU == 96000000 -#define PULSEIN_LOOPS_PER_USEC 14 -#elif F_CPU == 72000000 -#define PULSEIN_LOOPS_PER_USEC 10 -#elif F_CPU == 48000000 -#define PULSEIN_LOOPS_PER_USEC 7 -#elif F_CPU == 24000000 -#define PULSEIN_LOOPS_PER_USEC 4 -#elif F_CPU == 16000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#elif F_CPU == 8000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#elif F_CPU == 4000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#elif F_CPU == 2000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#endif - - -uint32_t pulseIn_high(volatile uint8_t *reg, uint32_t timeout) -{ - uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC; - uint32_t usec_start, usec_stop; - - // wait for any previous pulse to end - while (*reg) { - if (--timeout_count == 0) return 0; - } - // wait for the pulse to start - while (!*reg) { - if (--timeout_count == 0) return 0; - } - usec_start = micros(); - // wait for the pulse to stop - while (*reg) { - if (--timeout_count == 0) return 0; - } - usec_stop = micros(); - return usec_stop - usec_start; -} - -uint32_t pulseIn_low(volatile uint8_t *reg, uint32_t timeout) -{ - uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC; - uint32_t usec_start, usec_stop; - - // wait for any previous pulse to end - while (!*reg) { - if (--timeout_count == 0) return 0; - } - // wait for the pulse to start - while (*reg) { - if (--timeout_count == 0) return 0; - } - usec_start = micros(); - // wait for the pulse to stop - while (!*reg) { - if (--timeout_count == 0) return 0; - } - usec_stop = micros(); - return usec_stop - usec_start; -} - -// TODO: an inline version should handle the common case where state is const -uint32_t pulseIn(uint8_t pin, uint8_t state, uint32_t timeout) -{ - if (pin >= CORE_NUM_DIGITAL) return 0; - if (state) return pulseIn_high(portInputRegister(pin), timeout); - return pulseIn_low(portInputRegister(pin), timeout);; -} - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/ports/teensy/core/usb_desc.c b/ports/teensy/core/usb_desc.c deleted file mode 100644 index 828a61967f..0000000000 --- a/ports/teensy/core/usb_desc.c +++ /dev/null @@ -1,895 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if F_CPU >= 20000000 - -#include "usb_desc.h" -#include "usb_names.h" -#include "mk20dx128.h" -#include "avr_functions.h" - -// USB Descriptors are binary data which the USB host reads to -// automatically detect a USB device's capabilities. The format -// and meaning of every field is documented in numerous USB -// standards. When working with USB descriptors, despite the -// complexity of the standards and poor writing quality in many -// of those documents, remember descriptors are nothing more -// than constant binary data that tells the USB host what the -// device can do. Computers will load drivers based on this data. -// Those drivers then communicate on the endpoints specified by -// the descriptors. - -// To configure a new combination of interfaces or make minor -// changes to existing configuration (eg, change the name or ID -// numbers), usually you would edit "usb_desc.h". This file -// is meant to be configured by the header, so generally it is -// only edited to add completely new USB interfaces or features. - - - -// ************************************************************** -// USB Device -// ************************************************************** - -#define LSB(n) ((n) & 255) -#define MSB(n) (((n) >> 8) & 255) - -// USB Device Descriptor. The USB host reads this first, to learn -// what type of device is connected. -static uint8_t device_descriptor[] = { - 18, // bLength - 1, // bDescriptorType - 0x00, 0x02, // bcdUSB -#ifdef DEVICE_CLASS - DEVICE_CLASS, // bDeviceClass -#else - 0, -#endif -#ifdef DEVICE_SUBCLASS - DEVICE_SUBCLASS, // bDeviceSubClass -#else - 0, -#endif -#ifdef DEVICE_PROTOCOL - DEVICE_PROTOCOL, // bDeviceProtocol -#else - 0, -#endif - EP0_SIZE, // bMaxPacketSize0 - LSB(VENDOR_ID), MSB(VENDOR_ID), // idVendor - LSB(PRODUCT_ID), MSB(PRODUCT_ID), // idProduct - 0x00, 0x01, // bcdDevice - 1, // iManufacturer - 2, // iProduct - 3, // iSerialNumber - 1 // bNumConfigurations -}; - -// These descriptors must NOT be "const", because the USB DMA -// has trouble accessing flash memory with enough bandwidth -// while the processor is executing from flash. - - - -// ************************************************************** -// HID Report Descriptors -// ************************************************************** - -// Each HID interface needs a special report descriptor that tells -// the meaning and format of the data. - -#ifdef KEYBOARD_INTERFACE -// Keyboard Protocol 1, HID 1.11 spec, Appendix B, page 59-60 -static uint8_t keyboard_report_desc[] = { - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x06, // Usage (Keyboard), - 0xA1, 0x01, // Collection (Application), - 0x75, 0x01, // Report Size (1), - 0x95, 0x08, // Report Count (8), - 0x05, 0x07, // Usage Page (Key Codes), - 0x19, 0xE0, // Usage Minimum (224), - 0x29, 0xE7, // Usage Maximum (231), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x81, 0x02, // Input (Data, Variable, Absolute), ;Modifier byte - 0x95, 0x08, // Report Count (8), - 0x75, 0x01, // Report Size (1), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x05, 0x0C, // Usage Page (Consumer), - 0x09, 0xE9, // Usage (Volume Increment), - 0x09, 0xEA, // Usage (Volume Decrement), - 0x09, 0xE2, // Usage (Mute), - 0x09, 0xCD, // Usage (Play/Pause), - 0x09, 0xB5, // Usage (Scan Next Track), - 0x09, 0xB6, // Usage (Scan Previous Track), - 0x09, 0xB7, // Usage (Stop), - 0x09, 0xB8, // Usage (Eject), - 0x81, 0x02, // Input (Data, Variable, Absolute), ;Media keys - 0x95, 0x05, // Report Count (5), - 0x75, 0x01, // Report Size (1), - 0x05, 0x08, // Usage Page (LEDs), - 0x19, 0x01, // Usage Minimum (1), - 0x29, 0x05, // Usage Maximum (5), - 0x91, 0x02, // Output (Data, Variable, Absolute), ;LED report - 0x95, 0x01, // Report Count (1), - 0x75, 0x03, // Report Size (3), - 0x91, 0x03, // Output (Constant), ;LED report padding - 0x95, 0x06, // Report Count (6), - 0x75, 0x08, // Report Size (8), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x7F, // Logical Maximum(104), - 0x05, 0x07, // Usage Page (Key Codes), - 0x19, 0x00, // Usage Minimum (0), - 0x29, 0x7F, // Usage Maximum (104), - 0x81, 0x00, // Input (Data, Array), ;Normal keys - 0xc0 // End Collection -}; -#endif - -#ifdef MOUSE_INTERFACE -// Mouse Protocol 1, HID 1.11 spec, Appendix B, page 59-60, with wheel extension -static uint8_t mouse_report_desc[] = { - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x02, // Usage (Mouse) - 0xA1, 0x01, // Collection (Application) - 0x85, 0x01, // REPORT_ID (1) - 0x05, 0x09, // Usage Page (Button) - 0x19, 0x01, // Usage Minimum (Button #1) - 0x29, 0x08, // Usage Maximum (Button #8) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x01, // Logical Maximum (1) - 0x95, 0x08, // Report Count (8) - 0x75, 0x01, // Report Size (1) - 0x81, 0x02, // Input (Data, Variable, Absolute) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x30, // Usage (X) - 0x09, 0x31, // Usage (Y) - 0x09, 0x38, // Usage (Wheel) - 0x15, 0x81, // Logical Minimum (-127) - 0x25, 0x7F, // Logical Maximum (127) - 0x75, 0x08, // Report Size (8), - 0x95, 0x03, // Report Count (3), - 0x81, 0x06, // Input (Data, Variable, Relative) - 0xC0, // End Collection - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x02, // Usage (Mouse) - 0xA1, 0x01, // Collection (Application) - 0x85, 0x02, // REPORT_ID (2) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x30, // Usage (X) - 0x09, 0x31, // Usage (Y) - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x7F, // Logical Maximum (32767) - 0x75, 0x10, // Report Size (16), - 0x95, 0x02, // Report Count (2), - 0x81, 0x02, // Input (Data, Variable, Absolute) - 0xC0 // End Collection -}; -#endif - -#ifdef JOYSTICK_INTERFACE -static uint8_t joystick_report_desc[] = { - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x04, // Usage (Joystick) - 0xA1, 0x01, // Collection (Application) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x01, // Logical Maximum (1) - 0x75, 0x01, // Report Size (1) - 0x95, 0x20, // Report Count (32) - 0x05, 0x09, // Usage Page (Button) - 0x19, 0x01, // Usage Minimum (Button #1) - 0x29, 0x20, // Usage Maximum (Button #32) - 0x81, 0x02, // Input (variable,absolute) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x07, // Logical Maximum (7) - 0x35, 0x00, // Physical Minimum (0) - 0x46, 0x3B, 0x01, // Physical Maximum (315) - 0x75, 0x04, // Report Size (4) - 0x95, 0x01, // Report Count (1) - 0x65, 0x14, // Unit (20) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x39, // Usage (Hat switch) - 0x81, 0x42, // Input (variable,absolute,null_state) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x01, // Usage (Pointer) - 0xA1, 0x00, // Collection () - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x03, // Logical Maximum (1023) - 0x75, 0x0A, // Report Size (10) - 0x95, 0x04, // Report Count (4) - 0x09, 0x30, // Usage (X) - 0x09, 0x31, // Usage (Y) - 0x09, 0x32, // Usage (Z) - 0x09, 0x35, // Usage (Rz) - 0x81, 0x02, // Input (variable,absolute) - 0xC0, // End Collection - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x03, // Logical Maximum (1023) - 0x75, 0x0A, // Report Size (10) - 0x95, 0x02, // Report Count (2) - 0x09, 0x36, // Usage (Slider) - 0x09, 0x36, // Usage (Slider) - 0x81, 0x02, // Input (variable,absolute) - 0xC0 // End Collection -}; -#endif - -#ifdef SEREMU_INTERFACE -static uint8_t seremu_report_desc[] = { - 0x06, 0xC9, 0xFF, // Usage Page 0xFFC9 (vendor defined) - 0x09, 0x04, // Usage 0x04 - 0xA1, 0x5C, // Collection 0x5C - 0x75, 0x08, // report size = 8 bits (global) - 0x15, 0x00, // logical minimum = 0 (global) - 0x26, 0xFF, 0x00, // logical maximum = 255 (global) - 0x95, SEREMU_TX_SIZE, // report count (global) - 0x09, 0x75, // usage (local) - 0x81, 0x02, // Input - 0x95, SEREMU_RX_SIZE, // report count (global) - 0x09, 0x76, // usage (local) - 0x91, 0x02, // Output - 0x95, 0x04, // report count (global) - 0x09, 0x76, // usage (local) - 0xB1, 0x02, // Feature - 0xC0 // end collection -}; -#endif - -#ifdef RAWHID_INTERFACE -static uint8_t rawhid_report_desc[] = { - 0x06, LSB(RAWHID_USAGE_PAGE), MSB(RAWHID_USAGE_PAGE), - 0x0A, LSB(RAWHID_USAGE), MSB(RAWHID_USAGE), - 0xA1, 0x01, // Collection 0x01 - 0x75, 0x08, // report size = 8 bits - 0x15, 0x00, // logical minimum = 0 - 0x26, 0xFF, 0x00, // logical maximum = 255 - 0x95, RAWHID_TX_SIZE, // report count - 0x09, 0x01, // usage - 0x81, 0x02, // Input (array) - 0x95, RAWHID_RX_SIZE, // report count - 0x09, 0x02, // usage - 0x91, 0x02, // Output (array) - 0xC0 // end collection -}; -#endif - -#ifdef FLIGHTSIM_INTERFACE -static uint8_t flightsim_report_desc[] = { - 0x06, 0x1C, 0xFF, // Usage page = 0xFF1C - 0x0A, 0x39, 0xA7, // Usage = 0xA739 - 0xA1, 0x01, // Collection 0x01 - 0x75, 0x08, // report size = 8 bits - 0x15, 0x00, // logical minimum = 0 - 0x26, 0xFF, 0x00, // logical maximum = 255 - 0x95, FLIGHTSIM_TX_SIZE, // report count - 0x09, 0x01, // usage - 0x81, 0x02, // Input (array) - 0x95, FLIGHTSIM_RX_SIZE, // report count - 0x09, 0x02, // usage - 0x91, 0x02, // Output (array) - 0xC0 // end collection -}; -#endif - - - -// ************************************************************** -// USB Configuration -// ************************************************************** - -// USB Configuration Descriptor. This huge descriptor tells all -// of the devices capbilities. -static uint8_t config_descriptor[CONFIG_DESC_SIZE] = { - // configuration descriptor, USB spec 9.6.3, page 264-266, Table 9-10 - 9, // bLength; - 2, // bDescriptorType; - LSB(CONFIG_DESC_SIZE), // wTotalLength - MSB(CONFIG_DESC_SIZE), - NUM_INTERFACE, // bNumInterfaces - 1, // bConfigurationValue - 0, // iConfiguration - 0xC0, // bmAttributes - 50, // bMaxPower - -#ifdef CDC_IAD_DESCRIPTOR - // interface association descriptor, USB ECN, Table 9-Z - 8, // bLength - 11, // bDescriptorType - CDC_STATUS_INTERFACE, // bFirstInterface - 2, // bInterfaceCount - 0x02, // bFunctionClass - 0x02, // bFunctionSubClass - 0x01, // bFunctionProtocol - 4, // iFunction -#endif - -#ifdef CDC_DATA_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - CDC_STATUS_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x02, // bInterfaceClass - 0x02, // bInterfaceSubClass - 0x01, // bInterfaceProtocol - 0, // iInterface - // CDC Header Functional Descriptor, CDC Spec 5.2.3.1, Table 26 - 5, // bFunctionLength - 0x24, // bDescriptorType - 0x00, // bDescriptorSubtype - 0x10, 0x01, // bcdCDC - // Call Management Functional Descriptor, CDC Spec 5.2.3.2, Table 27 - 5, // bFunctionLength - 0x24, // bDescriptorType - 0x01, // bDescriptorSubtype - 0x01, // bmCapabilities - 1, // bDataInterface - // Abstract Control Management Functional Descriptor, CDC Spec 5.2.3.3, Table 28 - 4, // bFunctionLength - 0x24, // bDescriptorType - 0x02, // bDescriptorSubtype - 0x06, // bmCapabilities - // Union Functional Descriptor, CDC Spec 5.2.3.8, Table 33 - 5, // bFunctionLength - 0x24, // bDescriptorType - 0x06, // bDescriptorSubtype - CDC_STATUS_INTERFACE, // bMasterInterface - CDC_DATA_INTERFACE, // bSlaveInterface0 - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - CDC_ACM_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - CDC_ACM_SIZE, 0, // wMaxPacketSize - 64, // bInterval - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - CDC_DATA_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x0A, // bInterfaceClass - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - CDC_RX_ENDPOINT, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - CDC_RX_SIZE, 0, // wMaxPacketSize - 0, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - CDC_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - CDC_TX_SIZE, 0, // wMaxPacketSize - 0, // bInterval -#endif // CDC_DATA_INTERFACE - -#ifdef MIDI_INTERFACE - // Standard MS Interface Descriptor, - 9, // bLength - 4, // bDescriptorType - MIDI_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x01, // bInterfaceClass (0x01 = Audio) - 0x03, // bInterfaceSubClass (0x03 = MIDI) - 0x00, // bInterfaceProtocol (unused for MIDI) - 0, // iInterface - // MIDI MS Interface Header, USB MIDI 6.1.2.1, page 21, Table 6-2 - 7, // bLength - 0x24, // bDescriptorType = CS_INTERFACE - 0x01, // bDescriptorSubtype = MS_HEADER - 0x00, 0x01, // bcdMSC = revision 01.00 - 0x41, 0x00, // wTotalLength - // MIDI IN Jack Descriptor, B.4.3, Table B-7 (embedded), page 40 - 6, // bLength - 0x24, // bDescriptorType = CS_INTERFACE - 0x02, // bDescriptorSubtype = MIDI_IN_JACK - 0x01, // bJackType = EMBEDDED - 1, // bJackID, ID = 1 - 0, // iJack - // MIDI IN Jack Descriptor, B.4.3, Table B-8 (external), page 40 - 6, // bLength - 0x24, // bDescriptorType = CS_INTERFACE - 0x02, // bDescriptorSubtype = MIDI_IN_JACK - 0x02, // bJackType = EXTERNAL - 2, // bJackID, ID = 2 - 0, // iJack - // MIDI OUT Jack Descriptor, B.4.4, Table B-9, page 41 - 9, - 0x24, // bDescriptorType = CS_INTERFACE - 0x03, // bDescriptorSubtype = MIDI_OUT_JACK - 0x01, // bJackType = EMBEDDED - 3, // bJackID, ID = 3 - 1, // bNrInputPins = 1 pin - 2, // BaSourceID(1) = 2 - 1, // BaSourcePin(1) = first pin - 0, // iJack - // MIDI OUT Jack Descriptor, B.4.4, Table B-10, page 41 - 9, - 0x24, // bDescriptorType = CS_INTERFACE - 0x03, // bDescriptorSubtype = MIDI_OUT_JACK - 0x02, // bJackType = EXTERNAL - 4, // bJackID, ID = 4 - 1, // bNrInputPins = 1 pin - 1, // BaSourceID(1) = 1 - 1, // BaSourcePin(1) = first pin - 0, // iJack - // Standard Bulk OUT Endpoint Descriptor, B.5.1, Table B-11, pae 42 - 9, // bLength - 5, // bDescriptorType = ENDPOINT - MIDI_RX_ENDPOINT, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - MIDI_RX_SIZE, 0, // wMaxPacketSize - 0, // bInterval - 0, // bRefresh - 0, // bSynchAddress - // Class-specific MS Bulk OUT Endpoint Descriptor, B.5.2, Table B-12, page 42 - 5, // bLength - 0x25, // bDescriptorSubtype = CS_ENDPOINT - 0x01, // bJackType = MS_GENERAL - 1, // bNumEmbMIDIJack = 1 jack - 1, // BaAssocJackID(1) = jack ID #1 - // Standard Bulk IN Endpoint Descriptor, B.5.1, Table B-11, pae 42 - 9, // bLength - 5, // bDescriptorType = ENDPOINT - MIDI_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - MIDI_TX_SIZE, 0, // wMaxPacketSize - 0, // bInterval - 0, // bRefresh - 0, // bSynchAddress - // Class-specific MS Bulk IN Endpoint Descriptor, B.5.2, Table B-12, page 42 - 5, // bLength - 0x25, // bDescriptorSubtype = CS_ENDPOINT - 0x01, // bJackType = MS_GENERAL - 1, // bNumEmbMIDIJack = 1 jack - 3, // BaAssocJackID(1) = jack ID #3 -#endif // MIDI_INTERFACE - -#ifdef KEYBOARD_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - KEYBOARD_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x01, // bInterfaceSubClass (0x01 = Boot) - 0x01, // bInterfaceProtocol (0x01 = Keyboard) - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(keyboard_report_desc)), // wDescriptorLength - MSB(sizeof(keyboard_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - KEYBOARD_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - KEYBOARD_SIZE, 0, // wMaxPacketSize - KEYBOARD_INTERVAL, // bInterval -#endif // KEYBOARD_INTERFACE - -#ifdef MOUSE_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - MOUSE_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass (0x01 = Boot) - 0x00, // bInterfaceProtocol (0x02 = Mouse) - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(mouse_report_desc)), // wDescriptorLength - MSB(sizeof(mouse_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - MOUSE_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - MOUSE_SIZE, 0, // wMaxPacketSize - MOUSE_INTERVAL, // bInterval -#endif // MOUSE_INTERFACE - -#ifdef RAWHID_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - RAWHID_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(rawhid_report_desc)), // wDescriptorLength - MSB(sizeof(rawhid_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - RAWHID_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - RAWHID_TX_SIZE, 0, // wMaxPacketSize - RAWHID_TX_INTERVAL, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - RAWHID_RX_ENDPOINT, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - RAWHID_RX_SIZE, 0, // wMaxPacketSize - RAWHID_RX_INTERVAL, // bInterval -#endif // RAWHID_INTERFACE - -#ifdef FLIGHTSIM_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - FLIGHTSIM_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(flightsim_report_desc)), // wDescriptorLength - MSB(sizeof(flightsim_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - FLIGHTSIM_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - FLIGHTSIM_TX_SIZE, 0, // wMaxPacketSize - FLIGHTSIM_TX_INTERVAL, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - FLIGHTSIM_RX_ENDPOINT, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - FLIGHTSIM_RX_SIZE, 0, // wMaxPacketSize - FLIGHTSIM_RX_INTERVAL, // bInterval -#endif // FLIGHTSIM_INTERFACE - -#ifdef SEREMU_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - SEREMU_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(seremu_report_desc)), // wDescriptorLength - MSB(sizeof(seremu_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - SEREMU_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - SEREMU_TX_SIZE, 0, // wMaxPacketSize - SEREMU_TX_INTERVAL, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - SEREMU_RX_ENDPOINT, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - SEREMU_RX_SIZE, 0, // wMaxPacketSize - SEREMU_RX_INTERVAL, // bInterval -#endif // SEREMU_INTERFACE - -#ifdef JOYSTICK_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - JOYSTICK_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(joystick_report_desc)), // wDescriptorLength - MSB(sizeof(joystick_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - JOYSTICK_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - JOYSTICK_SIZE, 0, // wMaxPacketSize - JOYSTICK_INTERVAL, // bInterval -#endif // JOYSTICK_INTERFACE - -}; - - -// ************************************************************** -// String Descriptors -// ************************************************************** - -// The descriptors above can provide human readable strings, -// referenced by index numbers. These descriptors are the -// actual string data - -/* defined in usb_names.h -struct usb_string_descriptor_struct { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wString[]; -}; -*/ - -extern struct usb_string_descriptor_struct usb_string_manufacturer_name - __attribute__ ((weak, alias("usb_string_manufacturer_name_default"))); -extern struct usb_string_descriptor_struct usb_string_product_name - __attribute__ ((weak, alias("usb_string_product_name_default"))); -extern struct usb_string_descriptor_struct usb_string_serial_number - __attribute__ ((weak, alias("usb_string_serial_number_default"))); - -struct usb_string_descriptor_struct string0 = { - 4, - 3, - {0x0409} -}; - -struct usb_string_descriptor_struct usb_string_manufacturer_name_default = { - 2 + MANUFACTURER_NAME_LEN * 2, - 3, - MANUFACTURER_NAME -}; -struct usb_string_descriptor_struct usb_string_product_name_default = { - 2 + PRODUCT_NAME_LEN * 2, - 3, - PRODUCT_NAME -}; -struct usb_string_descriptor_struct usb_string_serial_number_default = { - 12, - 3, - {0,0,0,0,0,0,0,0,0,0} -}; - -void usb_init_serialnumber(void) -{ - char buf[11]; - uint32_t i, num; - - __disable_irq(); - FTFL_FSTAT = FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL; - FTFL_FCCOB0 = 0x41; - FTFL_FCCOB1 = 15; - FTFL_FSTAT = FTFL_FSTAT_CCIF; - while (!(FTFL_FSTAT & FTFL_FSTAT_CCIF)) ; // wait - num = *(uint32_t *)&FTFL_FCCOB7; - __enable_irq(); - // add extra zero to work around OS-X CDC-ACM driver bug - if (num < 10000000) num = num * 10; - ultoa(num, buf, 10); - for (i=0; i<10; i++) { - char c = buf[i]; - if (!c) break; - usb_string_serial_number_default.wString[i] = c; - } - usb_string_serial_number_default.bLength = i * 2 + 2; -} - - -// ************************************************************** -// Descriptors List -// ************************************************************** - -// This table provides access to all the descriptor data above. - -const usb_descriptor_list_t usb_descriptor_list[] = { - //wValue, wIndex, address, length - {0x0100, 0x0000, device_descriptor, sizeof(device_descriptor)}, - {0x0200, 0x0000, config_descriptor, sizeof(config_descriptor)}, -#ifdef SEREMU_INTERFACE - {0x2200, SEREMU_INTERFACE, seremu_report_desc, sizeof(seremu_report_desc)}, - {0x2100, SEREMU_INTERFACE, config_descriptor+SEREMU_DESC_OFFSET, 9}, -#endif -#ifdef KEYBOARD_INTERFACE - {0x2200, KEYBOARD_INTERFACE, keyboard_report_desc, sizeof(keyboard_report_desc)}, - {0x2100, KEYBOARD_INTERFACE, config_descriptor+KEYBOARD_DESC_OFFSET, 9}, -#endif -#ifdef MOUSE_INTERFACE - {0x2200, MOUSE_INTERFACE, mouse_report_desc, sizeof(mouse_report_desc)}, - {0x2100, MOUSE_INTERFACE, config_descriptor+MOUSE_DESC_OFFSET, 9}, -#endif -#ifdef JOYSTICK_INTERFACE - {0x2200, JOYSTICK_INTERFACE, joystick_report_desc, sizeof(joystick_report_desc)}, - {0x2100, JOYSTICK_INTERFACE, config_descriptor+JOYSTICK_DESC_OFFSET, 9}, -#endif -#ifdef RAWHID_INTERFACE - {0x2200, RAWHID_INTERFACE, rawhid_report_desc, sizeof(rawhid_report_desc)}, - {0x2100, RAWHID_INTERFACE, config_descriptor+RAWHID_DESC_OFFSET, 9}, -#endif -#ifdef FLIGHTSIM_INTERFACE - {0x2200, FLIGHTSIM_INTERFACE, flightsim_report_desc, sizeof(flightsim_report_desc)}, - {0x2100, FLIGHTSIM_INTERFACE, config_descriptor+FLIGHTSIM_DESC_OFFSET, 9}, -#endif - {0x0300, 0x0000, (const uint8_t *)&string0, 0}, - {0x0301, 0x0409, (const uint8_t *)&usb_string_manufacturer_name, 0}, - {0x0302, 0x0409, (const uint8_t *)&usb_string_product_name, 0}, - {0x0303, 0x0409, (const uint8_t *)&usb_string_serial_number, 0}, - //{0x0301, 0x0409, (const uint8_t *)&string1, 0}, - //{0x0302, 0x0409, (const uint8_t *)&string2, 0}, - //{0x0303, 0x0409, (const uint8_t *)&string3, 0}, - {0, 0, NULL, 0} -}; - - -// ************************************************************** -// Endpoint Configuration -// ************************************************************** - -#if 0 -// 0x00 = not used -// 0x19 = Recieve only -// 0x15 = Transmit only -// 0x1D = Transmit & Recieve -// -const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = -{ - 0x00, 0x15, 0x19, 0x15, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; -#endif - - -const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = -{ -#if (defined(ENDPOINT1_CONFIG) && NUM_ENDPOINTS >= 1) - ENDPOINT1_CONFIG, -#elif (NUM_ENDPOINTS >= 1) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT2_CONFIG) && NUM_ENDPOINTS >= 2) - ENDPOINT2_CONFIG, -#elif (NUM_ENDPOINTS >= 2) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT3_CONFIG) && NUM_ENDPOINTS >= 3) - ENDPOINT3_CONFIG, -#elif (NUM_ENDPOINTS >= 3) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT4_CONFIG) && NUM_ENDPOINTS >= 4) - ENDPOINT4_CONFIG, -#elif (NUM_ENDPOINTS >= 4) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT5_CONFIG) && NUM_ENDPOINTS >= 5) - ENDPOINT5_CONFIG, -#elif (NUM_ENDPOINTS >= 5) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT6_CONFIG) && NUM_ENDPOINTS >= 6) - ENDPOINT6_CONFIG, -#elif (NUM_ENDPOINTS >= 6) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT7_CONFIG) && NUM_ENDPOINTS >= 7) - ENDPOINT7_CONFIG, -#elif (NUM_ENDPOINTS >= 7) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT8_CONFIG) && NUM_ENDPOINTS >= 8) - ENDPOINT8_CONFIG, -#elif (NUM_ENDPOINTS >= 8) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT9_CONFIG) && NUM_ENDPOINTS >= 9) - ENDPOINT9_CONFIG, -#elif (NUM_ENDPOINTS >= 9) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT10_CONFIG) && NUM_ENDPOINTS >= 10) - ENDPOINT10_CONFIG, -#elif (NUM_ENDPOINTS >= 10) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT11_CONFIG) && NUM_ENDPOINTS >= 11) - ENDPOINT11_CONFIG, -#elif (NUM_ENDPOINTS >= 11) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT12_CONFIG) && NUM_ENDPOINTS >= 12) - ENDPOINT12_CONFIG, -#elif (NUM_ENDPOINTS >= 12) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT13_CONFIG) && NUM_ENDPOINTS >= 13) - ENDPOINT13_CONFIG, -#elif (NUM_ENDPOINTS >= 13) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT14_CONFIG) && NUM_ENDPOINTS >= 14) - ENDPOINT14_CONFIG, -#elif (NUM_ENDPOINTS >= 14) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT15_CONFIG) && NUM_ENDPOINTS >= 15) - ENDPOINT15_CONFIG, -#elif (NUM_ENDPOINTS >= 15) - ENDPOINT_UNUSED, -#endif -}; - - - -#endif // F_CPU >= 20 MHz diff --git a/ports/teensy/core/usb_desc.h b/ports/teensy/core/usb_desc.h deleted file mode 100644 index a951e03f61..0000000000 --- a/ports/teensy/core/usb_desc.h +++ /dev/null @@ -1,313 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_desc_h_ -#define _usb_desc_h_ - -#if F_CPU >= 20000000 - -// This header is NOT meant to be included when compiling -// user sketches in Arduino. The low-level functions -// provided by usb_dev.c are meant to be called only by -// code which provides higher-level interfaces to the user. - -#include -#include - -#define ENDPOINT_UNUSED 0x00 -#define ENDPOINT_TRANSIMIT_ONLY 0x15 -#define ENDPOINT_RECEIVE_ONLY 0x19 -#define ENDPOINT_TRANSMIT_AND_RECEIVE 0x1D - -/* -To modify a USB Type to have different interfaces, start in this -file. Delete the XYZ_INTERFACE lines for any interfaces you -wish to remove, and copy them from another USB Type for any you -want to add. - -Give each interface a unique number, and edit NUM_INTERFACE to -reflect the number of interfaces. - -Within each interface, make sure it uses a unique set of endpoints. -Edit NUM_ENDPOINTS to be at least the largest endpoint number used. -Then edit the ENDPOINT*_CONFIG lines so each endpoint is configured -the proper way (transmit, receive, or both). - -The CONFIG_DESC_SIZE and any XYZ_DESC_OFFSET numbers must be -edited to the correct sizes. See usb_desc.c for the giant array -of bytes. Someday these may be done automatically..... (but how?) - -If you are using existing interfaces, the code in each file should -automatically adapt to the changes you specify. If you need to -create a new type of interface, you'll need to write the code which -sends and receives packets, and presents an API to the user. - -Finally, edit usb_inst.cpp, which creats instances of the C++ -objects for each combination. - -Some operating systems, especially Windows, may cache USB device -info. Changes to the device name may not update on the same -computer unless the vendor or product ID numbers change, or the -"bcdDevice" revision code is increased. - -If these instructions are missing steps or could be improved, please -let me know? http://forum.pjrc.com/forums/4-Suggestions-amp-Bug-Reports -*/ - - - -#if defined(USB_SERIAL) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0483 - #define DEVICE_CLASS 2 // 2 = Communication Class - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'U','S','B',' ','S','e','r','i','a','l'} - #define PRODUCT_NAME_LEN 10 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 4 - #define NUM_USB_BUFFERS 12 - #define NUM_INTERFACE 2 - #define CDC_STATUS_INTERFACE 0 - #define CDC_DATA_INTERFACE 1 - #define CDC_ACM_ENDPOINT 2 - #define CDC_RX_ENDPOINT 3 - #define CDC_TX_ENDPOINT 4 - #define CDC_ACM_SIZE 16 - #define CDC_RX_SIZE 64 - #define CDC_TX_SIZE 64 - #define CONFIG_DESC_SIZE (9+9+5+5+4+5+7+9+7+7) - #define ENDPOINT2_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_TRANSIMIT_ONLY - -#elif defined(USB_HID) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0482 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'K','e','y','b','o','a','r','d','/','M','o','u','s','e','/','J','o','y','s','t','i','c','k'} - #define PRODUCT_NAME_LEN 23 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 5 - #define NUM_USB_BUFFERS 24 - #define NUM_INTERFACE 4 - #define SEREMU_INTERFACE 2 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define KEYBOARD_INTERFACE 0 // Keyboard - #define KEYBOARD_ENDPOINT 3 - #define KEYBOARD_SIZE 8 - #define KEYBOARD_INTERVAL 1 - #define MOUSE_INTERFACE 1 // Mouse - #define MOUSE_ENDPOINT 5 - #define MOUSE_SIZE 8 - #define MOUSE_INTERVAL 1 - #define JOYSTICK_INTERFACE 3 // Joystick - #define JOYSTICK_ENDPOINT 4 - #define JOYSTICK_SIZE 16 - #define JOYSTICK_INTERVAL 2 - #define KEYBOARD_DESC_OFFSET (9 + 9) - #define MOUSE_DESC_OFFSET (9 + 9+9+7 + 9) - #define SEREMU_DESC_OFFSET (9 + 9+9+7 + 9+9+7 + 9) - #define JOYSTICK_DESC_OFFSET (9 + 9+9+7 + 9+9+7 + 9+9+7+7 + 9) - #define CONFIG_DESC_SIZE (9 + 9+9+7 + 9+9+7 + 9+9+7+7 + 9+9+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT5_CONFIG ENDPOINT_TRANSIMIT_ONLY - -#elif defined(USB_SERIAL_HID) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0487 - #define DEVICE_CLASS 0xEF - #define DEVICE_SUBCLASS 0x02 - #define DEVICE_PROTOCOL 0x01 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'S','e','r','i','a','l','/','K','e','y','b','o','a','r','d','/','M','o','u','s','e','/','J','o','y','s','t','i','c','k'} - #define PRODUCT_NAME_LEN 30 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 6 - #define NUM_USB_BUFFERS 30 - #define NUM_INTERFACE 5 - #define CDC_IAD_DESCRIPTOR 1 - #define CDC_STATUS_INTERFACE 0 - #define CDC_DATA_INTERFACE 1 // Serial - #define CDC_ACM_ENDPOINT 2 - #define CDC_RX_ENDPOINT 3 - #define CDC_TX_ENDPOINT 4 - #define CDC_ACM_SIZE 16 - #define CDC_RX_SIZE 64 - #define CDC_TX_SIZE 64 - #define KEYBOARD_INTERFACE 2 // Keyboard - #define KEYBOARD_ENDPOINT 1 - #define KEYBOARD_SIZE 8 - #define KEYBOARD_INTERVAL 1 - #define MOUSE_INTERFACE 3 // Mouse - #define MOUSE_ENDPOINT 5 - #define MOUSE_SIZE 8 - #define MOUSE_INTERVAL 2 - #define JOYSTICK_INTERFACE 4 // Joystick - #define JOYSTICK_ENDPOINT 6 - #define JOYSTICK_SIZE 16 - #define JOYSTICK_INTERVAL 1 - #define KEYBOARD_DESC_OFFSET (9+8 + 9+5+5+4+5+7+9+7+7 + 9) - #define MOUSE_DESC_OFFSET (9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9) - #define JOYSTICK_DESC_OFFSET (9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9+9+7 + 9) - #define CONFIG_DESC_SIZE (9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9+9+7 + 9+9+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT5_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT6_CONFIG ENDPOINT_TRANSIMIT_ONLY - -#elif defined(USB_MIDI) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0485 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'T','e','e','n','s','y',' ','M','I','D','I'} - #define PRODUCT_NAME_LEN 11 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 4 - #define NUM_USB_BUFFERS 16 - #define NUM_INTERFACE 2 - #define SEREMU_INTERFACE 1 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define MIDI_INTERFACE 0 // MIDI - #define MIDI_TX_ENDPOINT 3 - #define MIDI_TX_SIZE 64 - #define MIDI_RX_ENDPOINT 4 - #define MIDI_RX_SIZE 64 - #define SEREMU_DESC_OFFSET (9 + 9+7+6+6+9+9+9+5+9+5 + 9) - #define CONFIG_DESC_SIZE (9 + 9+7+6+6+9+9+9+5+9+5 + 9+9+7+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_RECEIVE_ONLY - -#elif defined(USB_RAWHID) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0486 - #define RAWHID_USAGE_PAGE 0xFFAB // recommended: 0xFF00 to 0xFFFF - #define RAWHID_USAGE 0x0200 // recommended: 0x0100 to 0xFFFF - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'T','e','e','n','s','y','d','u','i','n','o',' ','R','a','w','H','I','D'} - #define PRODUCT_NAME_LEN 18 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 6 - #define NUM_USB_BUFFERS 12 - #define NUM_INTERFACE 2 - #define RAWHID_INTERFACE 0 // RawHID - #define RAWHID_TX_ENDPOINT 3 - #define RAWHID_TX_SIZE 64 - #define RAWHID_TX_INTERVAL 1 - #define RAWHID_RX_ENDPOINT 4 - #define RAWHID_RX_SIZE 64 - #define RAWHID_RX_INTERVAL 1 - #define SEREMU_INTERFACE 1 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define RAWHID_DESC_OFFSET (9 + 9) - #define SEREMU_DESC_OFFSET (9 + 9+9+7+7 + 9) - #define CONFIG_DESC_SIZE (9 + 9+9+7+7 + 9+9+7+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_RECEIVE_ONLY - -#elif defined(USB_FLIGHTSIM) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0488 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'T','e','e','n','s','y',' ','F','l','i','g','h','t',' ','S','i','m',' ','C','o','n','t','r','o','l','s'} - #define PRODUCT_NAME_LEN 26 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 4 - #define NUM_USB_BUFFERS 20 - #define NUM_INTERFACE 2 - #define FLIGHTSIM_INTERFACE 0 // Flight Sim Control - #define FLIGHTSIM_TX_ENDPOINT 3 - #define FLIGHTSIM_TX_SIZE 64 - #define FLIGHTSIM_TX_INTERVAL 1 - #define FLIGHTSIM_RX_ENDPOINT 4 - #define FLIGHTSIM_RX_SIZE 64 - #define FLIGHTSIM_RX_INTERVAL 1 - #define SEREMU_INTERFACE 1 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define FLIGHTSIM_DESC_OFFSET (9 + 9) - #define SEREMU_DESC_OFFSET (9 + 9+9+7+7 + 9) - #define CONFIG_DESC_SIZE (9 + 9+9+7+7 + 9+9+7+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_RECEIVE_ONLY - -#endif - -// NUM_ENDPOINTS = number of non-zero endpoints (0 to 15) -extern const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS]; - -typedef struct { - uint16_t wValue; - uint16_t wIndex; - const uint8_t *addr; - uint16_t length; -} usb_descriptor_list_t; - -extern const usb_descriptor_list_t usb_descriptor_list[]; - - -#endif // F_CPU >= 20 MHz - -#endif diff --git a/ports/teensy/core/usb_dev.c b/ports/teensy/core/usb_dev.c deleted file mode 100644 index 6cf85d3fd3..0000000000 --- a/ports/teensy/core/usb_dev.c +++ /dev/null @@ -1,980 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if F_CPU >= 20000000 - -#include "mk20dx128.h" -//#include "HardwareSerial.h" -#include "usb_dev.h" -#include "usb_mem.h" - -// buffer descriptor table - -typedef struct { - uint32_t desc; - void * addr; -} bdt_t; - -__attribute__ ((section(".usbdescriptortable"), used)) -static bdt_t table[(NUM_ENDPOINTS+1)*4]; - -static usb_packet_t *rx_first[NUM_ENDPOINTS]; -static usb_packet_t *rx_last[NUM_ENDPOINTS]; -static usb_packet_t *tx_first[NUM_ENDPOINTS]; -static usb_packet_t *tx_last[NUM_ENDPOINTS]; -uint16_t usb_rx_byte_count_data[NUM_ENDPOINTS]; - -static uint8_t tx_state[NUM_ENDPOINTS]; -#define TX_STATE_BOTH_FREE_EVEN_FIRST 0 -#define TX_STATE_BOTH_FREE_ODD_FIRST 1 -#define TX_STATE_EVEN_FREE 2 -#define TX_STATE_ODD_FREE 3 -#define TX_STATE_NONE_FREE_EVEN_FIRST 4 -#define TX_STATE_NONE_FREE_ODD_FIRST 5 - -#define BDT_OWN 0x80 -#define BDT_DATA1 0x40 -#define BDT_DATA0 0x00 -#define BDT_DTS 0x08 -#define BDT_STALL 0x04 -#define BDT_PID(n) (((n) >> 2) & 15) - -#define BDT_DESC(count, data) (BDT_OWN | BDT_DTS \ - | ((data) ? BDT_DATA1 : BDT_DATA0) \ - | ((count) << 16)) - -#define TX 1 -#define RX 0 -#define ODD 1 -#define EVEN 0 -#define DATA0 0 -#define DATA1 1 -#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd)) -#define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) - - -static union { - struct { - union { - struct { - uint8_t bmRequestType; - uint8_t bRequest; - }; - uint16_t wRequestAndType; - }; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; - }; - struct { - uint32_t word1; - uint32_t word2; - }; -} setup; - - -#define GET_STATUS 0 -#define CLEAR_FEATURE 1 -#define SET_FEATURE 3 -#define SET_ADDRESS 5 -#define GET_DESCRIPTOR 6 -#define SET_DESCRIPTOR 7 -#define GET_CONFIGURATION 8 -#define SET_CONFIGURATION 9 -#define GET_INTERFACE 10 -#define SET_INTERFACE 11 -#define SYNCH_FRAME 12 - -// SETUP always uses a DATA0 PID for the data field of the SETUP transaction. -// transactions in the data phase start with DATA1 and toggle (figure 8-12, USB1.1) -// Status stage uses a DATA1 PID. - -static uint8_t ep0_rx0_buf[EP0_SIZE] __attribute__ ((aligned (4))); -static uint8_t ep0_rx1_buf[EP0_SIZE] __attribute__ ((aligned (4))); -static const uint8_t *ep0_tx_ptr = NULL; -static uint16_t ep0_tx_len; -static uint8_t ep0_tx_bdt_bank = 0; -static uint8_t ep0_tx_data_toggle = 0; -uint8_t usb_rx_memory_needed = 0; - -volatile uint8_t usb_configuration = 0; -volatile uint8_t usb_reboot_timer = 0; - - -static void endpoint0_stall(void) -{ - USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; -} - - -static void endpoint0_transmit(const void *data, uint32_t len) -{ -#if 0 - serial_print("tx0:"); - serial_phex32((uint32_t)data); - serial_print(","); - serial_phex16(len); - serial_print(ep0_tx_bdt_bank ? ", odd" : ", even"); - serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n"); -#endif - table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data; - table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle); - ep0_tx_data_toggle ^= 1; - ep0_tx_bdt_bank ^= 1; -} - -static uint8_t reply_buffer[8]; - -static void usb_setup(void) -{ - const uint8_t *data = NULL; - uint32_t datalen = 0; - const usb_descriptor_list_t *list; - uint32_t size; - volatile uint8_t *reg; - uint8_t epconf; - const uint8_t *cfg; - int i; - - switch (setup.wRequestAndType) { - case 0x0500: // SET_ADDRESS - break; - case 0x0900: // SET_CONFIGURATION - //serial_print("configure\n"); - usb_configuration = setup.wValue; - reg = &USB0_ENDPT1; - cfg = usb_endpoint_config_table; - // clear all BDT entries, free any allocated memory... - for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) { - if (table[i].desc & BDT_OWN) { - usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8)); - } - } - // free all queued packets - for (i=0; i < NUM_ENDPOINTS; i++) { - usb_packet_t *p, *n; - p = rx_first[i]; - while (p) { - n = p->next; - usb_free(p); - p = n; - } - rx_first[i] = NULL; - rx_last[i] = NULL; - p = tx_first[i]; - while (p) { - n = p->next; - usb_free(p); - p = n; - } - tx_first[i] = NULL; - tx_last[i] = NULL; - usb_rx_byte_count_data[i] = 0; - switch (tx_state[i]) { - case TX_STATE_EVEN_FREE: - case TX_STATE_NONE_FREE_EVEN_FIRST: - tx_state[i] = TX_STATE_BOTH_FREE_EVEN_FIRST; - break; - case TX_STATE_ODD_FREE: - case TX_STATE_NONE_FREE_ODD_FIRST: - tx_state[i] = TX_STATE_BOTH_FREE_ODD_FIRST; - break; - default: - break; - } - } - usb_rx_memory_needed = 0; - for (i=1; i <= NUM_ENDPOINTS; i++) { - epconf = *cfg++; - *reg = epconf; - reg += 4; - if (epconf & USB_ENDPT_EPRXEN) { - usb_packet_t *p; - p = usb_malloc(); - if (p) { - table[index(i, RX, EVEN)].addr = p->buf; - table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0); - } else { - table[index(i, RX, EVEN)].desc = 0; - usb_rx_memory_needed++; - } - p = usb_malloc(); - if (p) { - table[index(i, RX, ODD)].addr = p->buf; - table[index(i, RX, ODD)].desc = BDT_DESC(64, 1); - } else { - table[index(i, RX, ODD)].desc = 0; - usb_rx_memory_needed++; - } - } - table[index(i, TX, EVEN)].desc = 0; - table[index(i, TX, ODD)].desc = 0; - } - break; - case 0x0880: // GET_CONFIGURATION - reply_buffer[0] = usb_configuration; - datalen = 1; - data = reply_buffer; - break; - case 0x0080: // GET_STATUS (device) - reply_buffer[0] = 0; - reply_buffer[1] = 0; - datalen = 2; - data = reply_buffer; - break; - case 0x0082: // GET_STATUS (endpoint) - if (setup.wIndex > NUM_ENDPOINTS) { - // TODO: do we need to handle IN vs OUT here? - endpoint0_stall(); - return; - } - reply_buffer[0] = 0; - reply_buffer[1] = 0; - if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1; - data = reply_buffer; - datalen = 2; - break; - case 0x0102: // CLEAR_FEATURE (endpoint) - i = setup.wIndex & 0x7F; - if (i > NUM_ENDPOINTS || setup.wValue != 0) { - // TODO: do we need to handle IN vs OUT here? - endpoint0_stall(); - return; - } - (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4)) &= ~0x02; - // TODO: do we need to clear the data toggle here? - break; - case 0x0302: // SET_FEATURE (endpoint) - i = setup.wIndex & 0x7F; - if (i > NUM_ENDPOINTS || setup.wValue != 0) { - // TODO: do we need to handle IN vs OUT here? - endpoint0_stall(); - return; - } - (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4)) |= 0x02; - // TODO: do we need to clear the data toggle here? - break; - case 0x0680: // GET_DESCRIPTOR - case 0x0681: - //serial_print("desc:"); - //serial_phex16(setup.wValue); - //serial_print("\n"); - for (list = usb_descriptor_list; 1; list++) { - if (list->addr == NULL) break; - //if (setup.wValue == list->wValue && - //(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) { - if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) { - data = list->addr; - if ((setup.wValue >> 8) == 3) { - // for string descriptors, use the descriptor's - // length field, allowing runtime configured - // length. - datalen = *(list->addr); - } else { - datalen = list->length; - } -#if 0 - serial_print("Desc found, "); - serial_phex32((uint32_t)data); - serial_print(","); - serial_phex16(datalen); - serial_print(","); - serial_phex(data[0]); - serial_phex(data[1]); - serial_phex(data[2]); - serial_phex(data[3]); - serial_phex(data[4]); - serial_phex(data[5]); - serial_print("\n"); -#endif - goto send; - } - } - //serial_print("desc: not found\n"); - endpoint0_stall(); - return; -#if defined(CDC_STATUS_INTERFACE) - case 0x2221: // CDC_SET_CONTROL_LINE_STATE - usb_cdc_line_rtsdtr = setup.wValue; - //serial_print("set control line state\n"); - break; - case 0x2321: // CDC_SEND_BREAK - break; - case 0x2021: // CDC_SET_LINE_CODING - //serial_print("set coding, waiting...\n"); - return; -#endif - -// TODO: this does not work... why? -#if defined(SEREMU_INTERFACE) || defined(KEYBOARD_INTERFACE) - case 0x0921: // HID SET_REPORT - //serial_print(":)\n"); - return; - case 0x0A21: // HID SET_IDLE - break; - // case 0xC940: -#endif - default: - endpoint0_stall(); - return; - } - send: - //serial_print("setup send "); - //serial_phex32(data); - //serial_print(","); - //serial_phex16(datalen); - //serial_print("\n"); - - if (datalen > setup.wLength) datalen = setup.wLength; - size = datalen; - if (size > EP0_SIZE) size = EP0_SIZE; - endpoint0_transmit(data, size); - data += size; - datalen -= size; - if (datalen == 0 && size < EP0_SIZE) return; - - size = datalen; - if (size > EP0_SIZE) size = EP0_SIZE; - endpoint0_transmit(data, size); - data += size; - datalen -= size; - if (datalen == 0 && size < EP0_SIZE) return; - - ep0_tx_ptr = data; - ep0_tx_len = datalen; -} - - - -//A bulk endpoint's toggle sequence is initialized to DATA0 when the endpoint -//experiences any configuration event (configuration events are explained in -//Sections 9.1.1.5 and 9.4.5). - -//Configuring a device or changing an alternate setting causes all of the status -//and configuration values associated with endpoints in the affected interfaces -//to be set to their default values. This includes setting the data toggle of -//any endpoint using data toggles to the value DATA0. - -//For endpoints using data toggle, regardless of whether an endpoint has the -//Halt feature set, a ClearFeature(ENDPOINT_HALT) request always results in the -//data toggle being reinitialized to DATA0. - - - -// #define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) - -static void usb_control(uint32_t stat) -{ - bdt_t *b; - uint32_t pid, size; - uint8_t *buf; - const uint8_t *data; - - b = stat2bufferdescriptor(stat); - pid = BDT_PID(b->desc); - //count = b->desc >> 16; - buf = b->addr; - //serial_print("pid:"); - //serial_phex(pid); - //serial_print(", count:"); - //serial_phex(count); - //serial_print("\n"); - - switch (pid) { - case 0x0D: // Setup received from host - //serial_print("PID=Setup\n"); - //if (count != 8) ; // panic? - // grab the 8 byte setup info - setup.word1 = *(uint32_t *)(buf); - setup.word2 = *(uint32_t *)(buf + 4); - - // give the buffer back - b->desc = BDT_DESC(EP0_SIZE, DATA1); - //table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1); - //table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1); - - // clear any leftover pending IN transactions - ep0_tx_ptr = NULL; - if (ep0_tx_data_toggle) { - } - //if (table[index(0, TX, EVEN)].desc & 0x80) { - //serial_print("leftover tx even\n"); - //} - //if (table[index(0, TX, ODD)].desc & 0x80) { - //serial_print("leftover tx odd\n"); - //} - table[index(0, TX, EVEN)].desc = 0; - table[index(0, TX, ODD)].desc = 0; - // first IN after Setup is always DATA1 - ep0_tx_data_toggle = 1; - -#if 0 - serial_print("bmRequestType:"); - serial_phex(setup.bmRequestType); - serial_print(", bRequest:"); - serial_phex(setup.bRequest); - serial_print(", wValue:"); - serial_phex16(setup.wValue); - serial_print(", wIndex:"); - serial_phex16(setup.wIndex); - serial_print(", len:"); - serial_phex16(setup.wLength); - serial_print("\n"); -#endif - // actually "do" the setup request - usb_setup(); - // unfreeze the USB, now that we're ready - USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit - break; - case 0x01: // OUT transaction received from host - case 0x02: - //serial_print("PID=OUT\n"); -#ifdef CDC_STATUS_INTERFACE - if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) { - int i; - uint8_t *dst = (uint8_t *)usb_cdc_line_coding; - //serial_print("set line coding "); - for (i=0; i<7; i++) { - //serial_phex(*buf); - *dst++ = *buf++; - } - //serial_phex32(usb_cdc_line_coding[0]); - //serial_print("\n"); - if (usb_cdc_line_coding[0] == 134) usb_reboot_timer = 15; - endpoint0_transmit(NULL, 0); - } -#endif -#ifdef KEYBOARD_INTERFACE - if (setup.word1 == 0x02000921 && setup.word2 == ((1<<16)|KEYBOARD_INTERFACE)) { - keyboard_leds = buf[0]; - endpoint0_transmit(NULL, 0); - } -#endif -#ifdef SEREMU_INTERFACE - if (setup.word1 == 0x03000921 && setup.word2 == ((4<<16)|SEREMU_INTERFACE) - && buf[0] == 0xA9 && buf[1] == 0x45 && buf[2] == 0xC2 && buf[3] == 0x6B) { - usb_reboot_timer = 5; - endpoint0_transmit(NULL, 0); - } -#endif - // give the buffer back - b->desc = BDT_DESC(EP0_SIZE, DATA1); - break; - - case 0x09: // IN transaction completed to host - //serial_print("PID=IN:"); - //serial_phex(stat); - //serial_print("\n"); - - // send remaining data, if any... - data = ep0_tx_ptr; - if (data) { - size = ep0_tx_len; - if (size > EP0_SIZE) size = EP0_SIZE; - endpoint0_transmit(data, size); - data += size; - ep0_tx_len -= size; - ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL; - } - - if (setup.bRequest == 5 && setup.bmRequestType == 0) { - setup.bRequest = 0; - //serial_print("set address: "); - //serial_phex16(setup.wValue); - //serial_print("\n"); - USB0_ADDR = setup.wValue; - } - - break; - //default: - //serial_print("PID=unknown:"); - //serial_phex(pid); - //serial_print("\n"); - } - USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit -} - - - - - - -usb_packet_t *usb_rx(uint32_t endpoint) -{ - usb_packet_t *ret; - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return NULL; - __disable_irq(); - ret = rx_first[endpoint]; - if (ret) { - rx_first[endpoint] = ret->next; - usb_rx_byte_count_data[endpoint] -= ret->len; - } - __enable_irq(); - //serial_print("rx, epidx="); - //serial_phex(endpoint); - //serial_print(", packet="); - //serial_phex32(ret); - //serial_print("\n"); - return ret; -} - -static uint32_t usb_queue_byte_count(const usb_packet_t *p) -{ - uint32_t count=0; - - __disable_irq(); - for ( ; p; p = p->next) { - count += p->len; - } - __enable_irq(); - return count; -} - -// TODO: make this an inline function... -/* -uint32_t usb_rx_byte_count(uint32_t endpoint) -{ - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - return usb_rx_byte_count_data[endpoint]; - //return usb_queue_byte_count(rx_first[endpoint]); -} -*/ - -uint32_t usb_tx_byte_count(uint32_t endpoint) -{ - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - return usb_queue_byte_count(tx_first[endpoint]); -} - -uint32_t usb_tx_packet_count(uint32_t endpoint) -{ - const usb_packet_t *p; - uint32_t count=0; - - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - __disable_irq(); - for (p = tx_first[endpoint]; p; p = p->next) count++; - __enable_irq(); - return count; -} - - -// Called from usb_free, but only when usb_rx_memory_needed > 0, indicating -// receive endpoints are starving for memory. The intention is to give -// endpoints needing receive memory priority over the user's code, which is -// likely calling usb_malloc to obtain memory for transmitting. When the -// user is creating data very quickly, their consumption could starve reception -// without this prioritization. The packet buffer (input) is assigned to the -// first endpoint needing memory. -// -void usb_rx_memory(usb_packet_t *packet) -{ - unsigned int i; - const uint8_t *cfg; - - cfg = usb_endpoint_config_table; - //serial_print("rx_mem:"); - __disable_irq(); - for (i=1; i <= NUM_ENDPOINTS; i++) { - if (*cfg++ & USB_ENDPT_EPRXEN) { - if (table[index(i, RX, EVEN)].desc == 0) { - table[index(i, RX, EVEN)].addr = packet->buf; - table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0); - usb_rx_memory_needed--; - __enable_irq(); - //serial_phex(i); - //serial_print(",even\n"); - return; - } - if (table[index(i, RX, ODD)].desc == 0) { - table[index(i, RX, ODD)].addr = packet->buf; - table[index(i, RX, ODD)].desc = BDT_DESC(64, 1); - usb_rx_memory_needed--; - __enable_irq(); - //serial_phex(i); - //serial_print(",odd\n"); - return; - } - } - } - __enable_irq(); - // we should never reach this point. If we get here, it means - // usb_rx_memory_needed was set greater than zero, but no memory - // was actually needed. - usb_rx_memory_needed = 0; - usb_free(packet); - return; -} - -//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd)) -//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) - -void usb_tx(uint32_t endpoint, usb_packet_t *packet) -{ - bdt_t *b = &table[index(endpoint, TX, EVEN)]; - uint8_t next; - - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return; - __disable_irq(); - //serial_print("txstate="); - //serial_phex(tx_state[endpoint]); - //serial_print("\n"); - switch (tx_state[endpoint]) { - case TX_STATE_BOTH_FREE_EVEN_FIRST: - next = TX_STATE_ODD_FREE; - break; - case TX_STATE_BOTH_FREE_ODD_FIRST: - b++; - next = TX_STATE_EVEN_FREE; - break; - case TX_STATE_EVEN_FREE: - next = TX_STATE_NONE_FREE_ODD_FIRST; - break; - case TX_STATE_ODD_FREE: - b++; - next = TX_STATE_NONE_FREE_EVEN_FIRST; - break; - default: - if (tx_first[endpoint] == NULL) { - tx_first[endpoint] = packet; - } else { - tx_last[endpoint]->next = packet; - } - tx_last[endpoint] = packet; - __enable_irq(); - return; - } - tx_state[endpoint] = next; - b->addr = packet->buf; - b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0); - __enable_irq(); -} - - - - - - -void _reboot_Teensyduino_(void) -{ - // TODO: initialize R0 with a code.... - __asm__ volatile("bkpt"); -} - - - -void usb_isr(void) -{ - uint8_t status, stat, t; - - //serial_print("isr"); - //status = USB0_ISTAT; - //serial_phex(status); - //serial_print("\n"); - restart: - status = USB0_ISTAT; - - if ((status & USB_INTEN_SOFTOKEN /* 04 */ )) { - if (usb_configuration) { - t = usb_reboot_timer; - if (t) { - usb_reboot_timer = --t; - if (!t) _reboot_Teensyduino_(); - } -#ifdef CDC_DATA_INTERFACE - t = usb_cdc_transmit_flush_timer; - if (t) { - usb_cdc_transmit_flush_timer = --t; - if (t == 0) usb_serial_flush_callback(); - } -#endif -#ifdef SEREMU_INTERFACE - t = usb_seremu_transmit_flush_timer; - if (t) { - usb_seremu_transmit_flush_timer = --t; - if (t == 0) usb_seremu_flush_callback(); - } -#endif -#ifdef MIDI_INTERFACE - usb_midi_flush_output(); -#endif -#ifdef FLIGHTSIM_INTERFACE - usb_flightsim_flush_callback(); -#endif - } - USB0_ISTAT = USB_INTEN_SOFTOKEN; - } - - if ((status & USB_ISTAT_TOKDNE /* 08 */ )) { - uint8_t endpoint; - stat = USB0_STAT; - //serial_print("token: ep="); - //serial_phex(stat >> 4); - //serial_print(stat & 0x08 ? ",tx" : ",rx"); - //serial_print(stat & 0x04 ? ",odd\n" : ",even\n"); - endpoint = stat >> 4; - if (endpoint == 0) { - usb_control(stat); - } else { - bdt_t *b = stat2bufferdescriptor(stat); - usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8); -#if 0 - serial_print("ep:"); - serial_phex(endpoint); - serial_print(", pid:"); - serial_phex(BDT_PID(b->desc)); - serial_print(((uint32_t)b & 8) ? ", odd" : ", even"); - serial_print(", count:"); - serial_phex(b->desc >> 16); - serial_print("\n"); -#endif - endpoint--; // endpoint is index to zero-based arrays - - if (stat & 0x08) { // transmit - usb_free(packet); - packet = tx_first[endpoint]; - if (packet) { - //serial_print("tx packet\n"); - tx_first[endpoint] = packet->next; - b->addr = packet->buf; - switch (tx_state[endpoint]) { - case TX_STATE_BOTH_FREE_EVEN_FIRST: - tx_state[endpoint] = TX_STATE_ODD_FREE; - break; - case TX_STATE_BOTH_FREE_ODD_FIRST: - tx_state[endpoint] = TX_STATE_EVEN_FREE; - break; - case TX_STATE_EVEN_FREE: - tx_state[endpoint] = TX_STATE_NONE_FREE_ODD_FIRST; - break; - case TX_STATE_ODD_FREE: - tx_state[endpoint] = TX_STATE_NONE_FREE_EVEN_FIRST; - break; - default: - break; - } - b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0); - } else { - //serial_print("tx no packet\n"); - switch (tx_state[endpoint]) { - case TX_STATE_BOTH_FREE_EVEN_FIRST: - case TX_STATE_BOTH_FREE_ODD_FIRST: - break; - case TX_STATE_EVEN_FREE: - tx_state[endpoint] = TX_STATE_BOTH_FREE_EVEN_FIRST; - break; - case TX_STATE_ODD_FREE: - tx_state[endpoint] = TX_STATE_BOTH_FREE_ODD_FIRST; - break; - default: - tx_state[endpoint] = ((uint32_t)b & 8) ? - TX_STATE_ODD_FREE : TX_STATE_EVEN_FREE; - break; - } - } - } else { // receive - packet->len = b->desc >> 16; - if (packet->len > 0) { - packet->index = 0; - packet->next = NULL; - if (rx_first[endpoint] == NULL) { - //serial_print("rx 1st, epidx="); - //serial_phex(endpoint); - //serial_print(", packet="); - //serial_phex32((uint32_t)packet); - //serial_print("\n"); - rx_first[endpoint] = packet; - } else { - //serial_print("rx Nth, epidx="); - //serial_phex(endpoint); - //serial_print(", packet="); - //serial_phex32((uint32_t)packet); - //serial_print("\n"); - rx_last[endpoint]->next = packet; - } - rx_last[endpoint] = packet; - usb_rx_byte_count_data[endpoint] += packet->len; - // TODO: implement a per-endpoint maximum # of allocated packets - // so a flood of incoming data on 1 endpoint doesn't starve - // the others if the user isn't reading it regularly - packet = usb_malloc(); - if (packet) { - b->addr = packet->buf; - b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0); - } else { - //serial_print("starving "); - //serial_phex(endpoint + 1); - //serial_print(((uint32_t)b & 8) ? ",odd\n" : ",even\n"); - b->desc = 0; - usb_rx_memory_needed++; - } - } else { - b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0); - } - } - - - - - } - USB0_ISTAT = USB_ISTAT_TOKDNE; - goto restart; - } - - - - if (status & USB_ISTAT_USBRST /* 01 */ ) { - //serial_print("reset\n"); - - // initialize BDT toggle bits - USB0_CTL = USB_CTL_ODDRST; - ep0_tx_bdt_bank = 0; - - // set up buffers to receive Setup and OUT packets - table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); - table[index(0, RX, EVEN)].addr = ep0_rx0_buf; - table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 0); - table[index(0, RX, ODD)].addr = ep0_rx1_buf; - table[index(0, TX, EVEN)].desc = 0; - table[index(0, TX, ODD)].desc = 0; - - // activate endpoint 0 - USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; - - // clear all ending interrupts - USB0_ERRSTAT = 0xFF; - USB0_ISTAT = 0xFF; - - // set the address to zero during enumeration - USB0_ADDR = 0; - - // enable other interrupts - USB0_ERREN = 0xFF; - USB0_INTEN = USB_INTEN_TOKDNEEN | - USB_INTEN_SOFTOKEN | - USB_INTEN_STALLEN | - USB_INTEN_ERROREN | - USB_INTEN_USBRSTEN | - USB_INTEN_SLEEPEN; - - // is this necessary? - USB0_CTL = USB_CTL_USBENSOFEN; - return; - } - - - if ((status & USB_ISTAT_STALL /* 80 */ )) { - //serial_print("stall:\n"); - USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; - USB0_ISTAT = USB_ISTAT_STALL; - } - if ((status & USB_ISTAT_ERROR /* 02 */ )) { - uint8_t err = USB0_ERRSTAT; - USB0_ERRSTAT = err; - //serial_print("err:"); - //serial_phex(err); - //serial_print("\n"); - USB0_ISTAT = USB_ISTAT_ERROR; - } - - if ((status & USB_ISTAT_SLEEP /* 10 */ )) { - //serial_print("sleep\n"); - USB0_ISTAT = USB_ISTAT_SLEEP; - } - -} - - - -void usb_init(void) -{ - int i; - - //serial_begin(BAUD2DIV(115200)); - //serial_print("usb_init\n"); - - usb_init_serialnumber(); - - for (i=0; i <= NUM_ENDPOINTS*4; i++) { - table[i].desc = 0; - table[i].addr = 0; - } - - // this basically follows the flowchart in the Kinetis - // Quick Reference User Guide, Rev. 1, 03/2012, page 141 - - // assume 48 MHz clock already running - // SIM - enable clock - SIM_SCGC4 |= SIM_SCGC4_USBOTG; - - // reset USB module - USB0_USBTRC0 = USB_USBTRC_USBRESET; - while ((USB0_USBTRC0 & USB_USBTRC_USBRESET) != 0) ; // wait for reset to end - - // set desc table base addr - USB0_BDTPAGE1 = ((uint32_t)table) >> 8; - USB0_BDTPAGE2 = ((uint32_t)table) >> 16; - USB0_BDTPAGE3 = ((uint32_t)table) >> 24; - - // clear all ISR flags - USB0_ISTAT = 0xFF; - USB0_ERRSTAT = 0xFF; - USB0_OTGISTAT = 0xFF; - - USB0_USBTRC0 |= 0x40; // undocumented bit - - // enable USB - USB0_CTL = USB_CTL_USBENSOFEN; - USB0_USBCTRL = 0; - - // enable reset interrupt - USB0_INTEN = USB_INTEN_USBRSTEN; - - // enable interrupt in NVIC... - NVIC_SET_PRIORITY(IRQ_USBOTG, 112); - NVIC_ENABLE_IRQ(IRQ_USBOTG); - - // enable d+ pullup - USB0_CONTROL = USB_CONTROL_DPPULLUPNONOTG; -} - - -#else // F_CPU < 20 MHz - -void usb_init(void) -{ -} - -#endif // F_CPU >= 20 MHz diff --git a/ports/teensy/core/usb_dev.h b/ports/teensy/core/usb_dev.h deleted file mode 100644 index 211cebec02..0000000000 --- a/ports/teensy/core/usb_dev.h +++ /dev/null @@ -1,108 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_dev_h_ -#define _usb_dev_h_ - -#if F_CPU >= 20000000 - -// This header is NOT meant to be included when compiling -// user sketches in Arduino. The low-level functions -// provided by usb_dev.c are meant to be called only by -// code which provides higher-level interfaces to the user. - -#include "usb_mem.h" -#include "usb_desc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -void usb_init(void); -void usb_init_serialnumber(void); -void usb_isr(void); -usb_packet_t *usb_rx(uint32_t endpoint); -uint32_t usb_tx_byte_count(uint32_t endpoint); -uint32_t usb_tx_packet_count(uint32_t endpoint); -void usb_tx(uint32_t endpoint, usb_packet_t *packet); -void usb_tx_isr(uint32_t endpoint, usb_packet_t *packet); - -extern volatile uint8_t usb_configuration; - -extern uint16_t usb_rx_byte_count_data[NUM_ENDPOINTS]; -static inline uint32_t usb_rx_byte_count(uint32_t endpoint) __attribute__((always_inline)); -static inline uint32_t usb_rx_byte_count(uint32_t endpoint) -{ - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - return usb_rx_byte_count_data[endpoint]; -} - -#ifdef CDC_DATA_INTERFACE -extern uint32_t usb_cdc_line_coding[2]; -extern volatile uint8_t usb_cdc_line_rtsdtr; -extern volatile uint8_t usb_cdc_transmit_flush_timer; -extern void usb_serial_flush_callback(void); -#endif - -#ifdef SEREMU_INTERFACE -extern volatile uint8_t usb_seremu_transmit_flush_timer; -extern void usb_seremu_flush_callback(void); -#endif - -#ifdef KEYBOARD_INTERFACE -extern uint8_t keyboard_modifier_keys; -extern uint8_t keyboard_keys[6]; -extern uint8_t keyboard_protocol; -extern uint8_t keyboard_idle_config; -extern uint8_t keyboard_idle_count; -extern volatile uint8_t keyboard_leds; -#endif - -#ifdef MIDI_INTERFACE -extern void usb_midi_flush_output(void); -#endif - -#ifdef FLIGHTSIM_INTERFACE -extern void usb_flightsim_flush_callback(void); -#endif - - - - - -#ifdef __cplusplus -} -#endif - - -#endif // F_CPU >= 20 MHz - -#endif diff --git a/ports/teensy/core/usb_mem.c b/ports/teensy/core/usb_mem.c deleted file mode 100644 index 2424327d3c..0000000000 --- a/ports/teensy/core/usb_mem.c +++ /dev/null @@ -1,109 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if F_CPU >= 20000000 - -#include "mk20dx128.h" -//#include "HardwareSerial.h" -#include "usb_dev.h" -#include "usb_mem.h" - -__attribute__ ((section(".usbbuffers"), used)) -unsigned char usb_buffer_memory[NUM_USB_BUFFERS * sizeof(usb_packet_t)]; - -static uint32_t usb_buffer_available = 0xFFFFFFFF; - -// use bitmask and CLZ instruction to implement fast free list -// http://www.archivum.info/gnu.gcc.help/2006-08/00148/Re-GCC-Inline-Assembly.html -// http://gcc.gnu.org/ml/gcc/2012-06/msg00015.html -// __builtin_clz() - -usb_packet_t * usb_malloc(void) -{ - unsigned int n, avail; - uint8_t *p; - - __disable_irq(); - avail = usb_buffer_available; - n = __builtin_clz(avail); // clz = count leading zeros - if (n >= NUM_USB_BUFFERS) { - __enable_irq(); - return NULL; - } - //serial_print("malloc:"); - //serial_phex(n); - //serial_print("\n"); - - usb_buffer_available = avail & ~(0x80000000 >> n); - __enable_irq(); - p = usb_buffer_memory + (n * sizeof(usb_packet_t)); - //serial_print("malloc:"); - //serial_phex32((int)p); - //serial_print("\n"); - *(uint32_t *)p = 0; - *(uint32_t *)(p + 4) = 0; - return (usb_packet_t *)p; -} - -// for the receive endpoints to request memory -extern uint8_t usb_rx_memory_needed; -extern void usb_rx_memory(usb_packet_t *packet); - -void usb_free(usb_packet_t *p) -{ - unsigned int n, mask; - - //serial_print("free:"); - n = ((uint8_t *)p - usb_buffer_memory) / sizeof(usb_packet_t); - if (n >= NUM_USB_BUFFERS) return; - //serial_phex(n); - //serial_print("\n"); - - // if any endpoints are starving for memory to receive - // packets, give this memory to them immediately! - if (usb_rx_memory_needed && usb_configuration) { - //serial_print("give to rx:"); - //serial_phex32((int)p); - //serial_print("\n"); - usb_rx_memory(p); - return; - } - - mask = (0x80000000 >> n); - __disable_irq(); - usb_buffer_available |= mask; - __enable_irq(); - - //serial_print("free:"); - //serial_phex32((int)p); - //serial_print("\n"); -} - -#endif // F_CPU >= 20 MHz diff --git a/ports/teensy/core/usb_mem.h b/ports/teensy/core/usb_mem.h deleted file mode 100644 index 94d1eb4d2e..0000000000 --- a/ports/teensy/core/usb_mem.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_mem_h_ -#define _usb_mem_h_ - -#include - -typedef struct usb_packet_struct { - uint16_t len; - uint16_t index; - struct usb_packet_struct *next; - uint8_t buf[64]; -} usb_packet_t; - -#ifdef __cplusplus -extern "C" { -#endif - -usb_packet_t * usb_malloc(void); -void usb_free(usb_packet_t *p); - -#ifdef __cplusplus -} -#endif - - -#endif diff --git a/ports/teensy/core/usb_names.h b/ports/teensy/core/usb_names.h deleted file mode 100644 index 067cb95e9b..0000000000 --- a/ports/teensy/core/usb_names.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_names_h_ -#define _usb_names_h_ - -// These definitions are intended to allow users to override the default -// USB manufacturer, product and serial number strings. - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -struct usb_string_descriptor_struct { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wString[]; -}; - -extern struct usb_string_descriptor_struct usb_string_manufacturer_name; -extern struct usb_string_descriptor_struct usb_string_product_name; -extern struct usb_string_descriptor_struct usb_string_serial_number; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/ports/teensy/core/usb_serial.c b/ports/teensy/core/usb_serial.c deleted file mode 100644 index 3b38ec8b62..0000000000 --- a/ports/teensy/core/usb_serial.c +++ /dev/null @@ -1,273 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "usb_dev.h" -#include "usb_serial.h" -#include "core_pins.h" // for yield() -//#include "HardwareSerial.h" -#include // for memcpy() - -// defined by usb_dev.h -> usb_desc.h -#if defined(CDC_STATUS_INTERFACE) && defined(CDC_DATA_INTERFACE) - -uint32_t usb_cdc_line_coding[2]; -volatile uint8_t usb_cdc_line_rtsdtr=0; -volatile uint8_t usb_cdc_transmit_flush_timer=0; - -static usb_packet_t *rx_packet=NULL; -static usb_packet_t *tx_packet=NULL; -static volatile uint8_t tx_noautoflush=0; - -#define TRANSMIT_FLUSH_TIMEOUT 5 /* in milliseconds */ - -// get the next character, or -1 if nothing received -int usb_serial_getchar(void) -{ - unsigned int i; - int c; - - if (!rx_packet) { - if (!usb_configuration) return -1; - rx_packet = usb_rx(CDC_RX_ENDPOINT); - if (!rx_packet) return -1; - } - i = rx_packet->index; - c = rx_packet->buf[i++]; - if (i >= rx_packet->len) { - usb_free(rx_packet); - rx_packet = NULL; - } else { - rx_packet->index = i; - } - return c; -} - -// peek at the next character, or -1 if nothing received -int usb_serial_peekchar(void) -{ - if (!rx_packet) { - if (!usb_configuration) return -1; - rx_packet = usb_rx(CDC_RX_ENDPOINT); - if (!rx_packet) return -1; - } - if (!rx_packet) return -1; - return rx_packet->buf[rx_packet->index]; -} - -// number of bytes available in the receive buffer -int usb_serial_available(void) -{ - int count; - count = usb_rx_byte_count(CDC_RX_ENDPOINT); - if (rx_packet) count += rx_packet->len - rx_packet->index; - return count; -} - -// read a block of bytes to a buffer -int usb_serial_read(void *buffer, uint32_t size) -{ - uint8_t *p = (uint8_t *)buffer; - uint32_t qty, count=0; - - while (size) { - if (!usb_configuration) break; - if (!rx_packet) { - rx: - rx_packet = usb_rx(CDC_RX_ENDPOINT); - if (!rx_packet) break; - if (rx_packet->len == 0) { - usb_free(rx_packet); - goto rx; - } - } - qty = rx_packet->len - rx_packet->index; - if (qty > size) qty = size; - memcpy(p, rx_packet->buf + rx_packet->index, qty); - p += qty; - count += qty; - size -= qty; - rx_packet->index += qty; - if (rx_packet->index >= rx_packet->len) { - usb_free(rx_packet); - rx_packet = NULL; - } - } - return count; -} - -// discard any buffered input -void usb_serial_flush_input(void) -{ - usb_packet_t *rx; - - if (!usb_configuration) return; - if (rx_packet) { - usb_free(rx_packet); - rx_packet = NULL; - } - while (1) { - rx = usb_rx(CDC_RX_ENDPOINT); - if (!rx) break; - usb_free(rx); - } -} - -// Maximum number of transmit packets to queue so we don't starve other endpoints for memory -#define TX_PACKET_LIMIT 8 - -// When the PC isn't listening, how long do we wait before discarding data? If this is -// too short, we risk losing data during the stalls that are common with ordinary desktop -// software. If it's too long, we stall the user's program when no software is running. -#define TX_TIMEOUT_MSEC 70 - -#if F_CPU == 168000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 1100) -#elif F_CPU == 144000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 932) -#elif F_CPU == 120000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 764) -#elif F_CPU == 96000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 596) -#elif F_CPU == 72000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 512) -#elif F_CPU == 48000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 428) -#elif F_CPU == 24000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 262) -#endif - -// When we've suffered the transmit timeout, don't wait again until the computer -// begins accepting data. If no software is running to receive, we'll just discard -// data as rapidly as Serial.print() can generate it, until there's something to -// actually receive it. -static uint8_t transmit_previous_timeout=0; - - -// transmit a character. 0 returned on success, -1 on error -int usb_serial_putchar(uint8_t c) -{ - return usb_serial_write(&c, 1); -} - - -int usb_serial_write(const void *buffer, uint32_t size) -{ - uint32_t len; - uint32_t wait_count; - const uint8_t *src = (const uint8_t *)buffer; - uint8_t *dest; - - tx_noautoflush = 1; - while (size > 0) { - if (!tx_packet) { - wait_count = 0; - while (1) { - if (!usb_configuration) { - tx_noautoflush = 0; - return -1; - } - if (usb_tx_packet_count(CDC_TX_ENDPOINT) < TX_PACKET_LIMIT) { - tx_noautoflush = 1; - tx_packet = usb_malloc(); - if (tx_packet) break; - tx_noautoflush = 0; - } - if (++wait_count > TX_TIMEOUT || transmit_previous_timeout) { - transmit_previous_timeout = 1; - return -1; - } - yield(); - } - } - transmit_previous_timeout = 0; - len = CDC_TX_SIZE - tx_packet->index; - if (len > size) len = size; - dest = tx_packet->buf + tx_packet->index; - tx_packet->index += len; - size -= len; - while (len-- > 0) *dest++ = *src++; - if (tx_packet->index >= CDC_TX_SIZE) { - tx_packet->len = CDC_TX_SIZE; - usb_tx(CDC_TX_ENDPOINT, tx_packet); - tx_packet = NULL; - } - usb_cdc_transmit_flush_timer = TRANSMIT_FLUSH_TIMEOUT; - } - tx_noautoflush = 0; - return 0; -} - -void usb_serial_flush_output(void) -{ - if (!usb_configuration) return; - tx_noautoflush = 1; - if (tx_packet) { - usb_cdc_transmit_flush_timer = 0; - tx_packet->len = tx_packet->index; - usb_tx(CDC_TX_ENDPOINT, tx_packet); - tx_packet = NULL; - } else { - usb_packet_t *tx = usb_malloc(); - if (tx) { - usb_cdc_transmit_flush_timer = 0; - usb_tx(CDC_TX_ENDPOINT, tx); - } else { - usb_cdc_transmit_flush_timer = 1; - } - } - tx_noautoflush = 0; -} - -void usb_serial_flush_callback(void) -{ - if (tx_noautoflush) return; - if (tx_packet) { - tx_packet->len = tx_packet->index; - usb_tx(CDC_TX_ENDPOINT, tx_packet); - tx_packet = NULL; - } else { - usb_packet_t *tx = usb_malloc(); - if (tx) { - usb_tx(CDC_TX_ENDPOINT, tx); - } else { - usb_cdc_transmit_flush_timer = 1; - } - } -} - - - - - - - - - -#endif // CDC_STATUS_INTERFACE && CDC_DATA_INTERFACE diff --git a/ports/teensy/core/usb_serial.h b/ports/teensy/core/usb_serial.h deleted file mode 100644 index 9c0429d198..0000000000 --- a/ports/teensy/core/usb_serial.h +++ /dev/null @@ -1,144 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef USBserial_h_ -#define USBserial_h_ - -#if defined(USB_SERIAL) || defined(USB_SERIAL_HID) - -#include - -#if F_CPU >= 20000000 - -// C language implementation -#ifdef __cplusplus -extern "C" { -#endif -int usb_serial_getchar(void); -int usb_serial_peekchar(void); -int usb_serial_available(void); -int usb_serial_read(void *buffer, uint32_t size); -void usb_serial_flush_input(void); -int usb_serial_putchar(uint8_t c); -int usb_serial_write(const void *buffer, uint32_t size); -void usb_serial_flush_output(void); -extern uint32_t usb_cdc_line_coding[2]; -extern volatile uint8_t usb_cdc_line_rtsdtr; -extern volatile uint8_t usb_cdc_transmit_flush_timer; -extern volatile uint8_t usb_configuration; -#ifdef __cplusplus -} -#endif - -#define USB_SERIAL_DTR 0x01 -#define USB_SERIAL_RTS 0x02 - -// C++ interface -#ifdef __cplusplus -#include "Stream.h" -class usb_serial_class : public Stream -{ -public: - void begin(long) { /* TODO: call a function that tries to wait for enumeration */ }; - void end() { /* TODO: flush output and shut down USB port */ }; - virtual int available() { return usb_serial_available(); } - virtual int read() { return usb_serial_getchar(); } - virtual int peek() { return usb_serial_peekchar(); } - virtual void flush() { usb_serial_flush_output(); } // TODO: actually wait for data to leave USB... - virtual size_t write(uint8_t c) { return usb_serial_putchar(c); } - virtual size_t write(const uint8_t *buffer, size_t size) { return usb_serial_write(buffer, size); } - size_t write(unsigned long n) { return write((uint8_t)n); } - size_t write(long n) { return write((uint8_t)n); } - size_t write(unsigned int n) { return write((uint8_t)n); } - size_t write(int n) { return write((uint8_t)n); } - using Print::write; - void send_now(void) { usb_serial_flush_output(); } - uint32_t baud(void) { return usb_cdc_line_coding[0]; } - uint8_t stopbits(void) { uint8_t b = usb_cdc_line_coding[1]; if (!b) b = 1; return b; } - uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even - uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; } - uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; } - uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; } - operator bool() { return usb_configuration && (usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)); } - size_t readBytes(char *buffer, size_t length) { - size_t count=0; - unsigned long startMillis = millis(); - do { - count += usb_serial_read(buffer + count, length - count); - if (count >= length) return count; - } while(millis() - startMillis < _timeout); - setReadError(); - return count; - } - -}; -extern usb_serial_class Serial; -#endif // __cplusplus - - -#else // F_CPU < 20 MHz - -// Allow Arduino programs using Serial to compile, but Serial will do nothing. -#ifdef __cplusplus -#include "Stream.h" -class usb_serial_class : public Stream -{ -public: - void begin(long) { }; - void end() { }; - virtual int available() { return 0; } - virtual int read() { return -1; } - virtual int peek() { return -1; } - virtual void flush() { } - virtual size_t write(uint8_t c) { return 1; } - virtual size_t write(const uint8_t *buffer, size_t size) { return size; } - size_t write(unsigned long n) { return 1; } - size_t write(long n) { return 1; } - size_t write(unsigned int n) { return 1; } - size_t write(int n) { return 1; } - using Print::write; - void send_now(void) { } - uint32_t baud(void) { return 0; } - uint8_t stopbits(void) { return 1; } - uint8_t paritytype(void) { return 0; } - uint8_t numbits(void) { return 8; } - uint8_t dtr(void) { return 1; } - uint8_t rts(void) { return 1; } - operator bool() { return true; } -}; - -extern usb_serial_class Serial; -#endif // __cplusplus - -#endif // F_CPU - -#endif // USB_SERIAL || USB_SERIAL_HID - -#endif // USBserial_h_ diff --git a/ports/teensy/core/yield.c b/ports/teensy/core/yield.c deleted file mode 100644 index 06c741a673..0000000000 --- a/ports/teensy/core/yield.c +++ /dev/null @@ -1,32 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -void yield(void) __attribute__ ((weak)); -void yield(void) {}; diff --git a/ports/teensy/hal_ftm.c b/ports/teensy/hal_ftm.c deleted file mode 100644 index 3c031bf6dd..0000000000 --- a/ports/teensy/hal_ftm.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "teensy_hal.h" - -void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm) { - /* Check the parameters */ - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_PRESCALERSHIFT(hftm->Init.PrescalerShift)); - assert_param(IS_FTM_COUNTERMODE(hftm->Init.CounterMode)); - assert_param(IS_FTM_PERIOD(hftm->Init.Period)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->MODE = FTM_MODE_WPDIS; - FTMx->SC = 0; - FTMx->MOD = hftm->Init.Period; - uint32_t sc = FTM_SC_PS(hftm->Init.PrescalerShift); - if (hftm->Init.CounterMode == FTM_COUNTERMODE_CENTER) { - sc |= FTM_SC_CPWMS; - } - FTMx->SC = sc; - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->CNT = 0; - FTMx->SC &= ~FTM_SC_CLKS(3); - FTMx->SC |= FTM_SC_CLKS(1); - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->CNT = 0; - FTMx->SC |= FTM_SC_CLKS(1) | FTM_SC_TOIE; - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm) { - assert_param(IS_FTM_INSTANCE(hftm->Instance)); - - hftm->State = HAL_FTM_STATE_BUSY; - - __HAL_FTM_DISABLE_TOF_IT(hftm); - - hftm->State = HAL_FTM_STATE_RESET; -} - -void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_Init(hftm); -} - -void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_CHANNEL(channel)); - assert_param(IS_FTM_OC_MODE(sConfig->OCMode)); - assert_param(IS_FTM_OC_PULSE(sConfig->Pulse)); - assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->channel[channel].CSC = sConfig->OCMode; - FTMx->channel[channel].CV = sConfig->Pulse; - if (sConfig->OCPolarity & 1) { - FTMx->POL |= (1 << channel); - } else { - FTMx->POL &= ~(1 << channel); - } - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) { - // Nothing else to do -} - -void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - FTMx->channel[channel].CSC |= FTM_CSC_CHIE; -} - -void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_DeInit(hftm); -} - -void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_Init(hftm); -} - -void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_CHANNEL(channel)); - assert_param(IS_FTM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_FTM_OC_PULSE(sConfig->Pulse)); - assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->channel[channel].CSC = sConfig->OCMode; - FTMx->channel[channel].CV = sConfig->Pulse; - if (sConfig->OCPolarity & 1) { - FTMx->POL |= (1 << channel); - } else { - FTMx->POL &= ~(1 << channel); - } - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel) { - // Nothing else to do -} - -void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - FTMx->channel[channel].CSC |= FTM_CSC_CHIE; -} - -void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_DeInit(hftm); -} - -void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_Init(hftm); -} - -void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_CHANNEL(channel)); - assert_param(IS_FTM_IC_POLARITY(sConfig->ICPolarity)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->channel[channel].CSC = sConfig->ICPolarity; - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) { - //FTM_TypeDef *FTMx = hftm->Instance; - //assert_param(IS_FTM_INSTANCE(FTMx)); - - // Nothing else to do -} - -void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - FTMx->channel[channel].CSC |= FTM_CSC_CHIE; -} - -void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_DeInit(hftm); -} diff --git a/ports/teensy/hal_ftm.h b/ports/teensy/hal_ftm.h deleted file mode 100644 index 84fae8312b..0000000000 --- a/ports/teensy/hal_ftm.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_TEENSY_HAL_FTM_H -#define MICROPY_INCLUDED_TEENSY_HAL_FTM_H - -#define FTM0 ((FTM_TypeDef *)&FTM0_SC) -#define FTM1 ((FTM_TypeDef *)&FTM1_SC) -#define FTM2 ((FTM_TypeDef *)&FTM2_SC) - -typedef struct { - volatile uint32_t CSC; // Channel x Status And Control - volatile uint32_t CV; // Channel x Value -} FTM_ChannelTypeDef; - -typedef struct { - volatile uint32_t SC; // Status And Control - volatile uint32_t CNT; // Counter - volatile uint32_t MOD; // Modulo - FTM_ChannelTypeDef channel[8]; - volatile uint32_t CNTIN; // Counter Initial Value - volatile uint32_t STATUS; // Capture And Compare Status - volatile uint32_t MODE; // Features Mode Selection - volatile uint32_t SYNC; // Synchronization - volatile uint32_t OUTINIT; // Initial State For Channels Output - volatile uint32_t OUTMASK; // Output Mask - volatile uint32_t COMBINE; // Function For Linked Channels - volatile uint32_t DEADTIME; // Deadtime Insertion Control - volatile uint32_t EXTTRIG; // FTM External Trigger - volatile uint32_t POL; // Channels Polarity - volatile uint32_t FMS; // Fault Mode Status - volatile uint32_t FILTER; // Input Capture Filter Control - volatile uint32_t FLTCTRL; // Fault Control - volatile uint32_t QDCTRL; // Quadrature Decoder Control And Status - volatile uint32_t CONF; // Configuration - volatile uint32_t FLTPOL; // FTM Fault Input Polarity - volatile uint32_t SYNCONF; // Synchronization Configuration - volatile uint32_t INVCTRL; // FTM Inverting Control - volatile uint32_t SWOCTRL; // FTM Software Output Control - volatile uint32_t PWMLOAD; // FTM PWM Load -} FTM_TypeDef; - -typedef struct { - uint32_t PrescalerShift; // Sets the prescaler to 1 << PrescalerShift - uint32_t CounterMode; // One of FTM_COUNTERMODE_xxx - uint32_t Period; // Specifies the Period for determining timer overflow -} FTM_Base_InitTypeDef; - -typedef struct { - uint32_t OCMode; // One of FTM_OCMODE_xxx - uint32_t Pulse; // Specifies initial pulse width (0-0xffff) - uint32_t OCPolarity; // One of FTM_OCPOLRITY_xxx -} FTM_OC_InitTypeDef; - -typedef struct { - uint32_t ICPolarity; // Specifies Rising/Falling/Both -} FTM_IC_InitTypeDef; - -#define IS_FTM_INSTANCE(INSTANCE) (((INSTANCE) == FTM0) || \ - ((INSTANCE) == FTM1) || \ - ((INSTANCE) == FTM2)) - -#define IS_FTM_PRESCALERSHIFT(PRESCALERSHIFT) (((PRESCALERSHIFT) & ~7) == 0) - -#define FTM_COUNTERMODE_UP (0) -#define FTM_COUNTERMODE_CENTER (FTM_SC_CPWMS) - -#define IS_FTM_COUNTERMODE(MODE) (((MODE) == FTM_COUNTERMODE_UP) ||\ - ((MODE) == FTM_COUNTERMODE_CENTER)) - -#define IS_FTM_PERIOD(PERIOD) (((PERIOD) & 0xFFFF0000) == 0) - -#define FTM_CSC_CHF 0x80 -#define FTM_CSC_CHIE 0x40 -#define FTM_CSC_MSB 0x20 -#define FTM_CSC_MSA 0x10 -#define FTM_CSC_ELSB 0x08 -#define FTM_CSC_ELSA 0x04 -#define FTM_CSC_DMA 0x01 - -#define FTM_OCMODE_TIMING (0) -#define FTM_OCMODE_ACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB | FTM_CSC_ELSA) -#define FTM_OCMODE_INACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB) -#define FTM_OCMODE_TOGGLE (FTM_CSC_MSA | FTM_CSC_ELSA) -#define FTM_OCMODE_PWM1 (FTM_CSC_MSB | FTM_CSC_ELSB) -#define FTM_OCMODE_PWM2 (FTM_CSC_MSB | FTM_CSC_ELSA) - -#define IS_FTM_OC_MODE(mode) ((mode) == FTM_OCMODE_TIMING || \ - (mode) == FTM_OCMODE_ACTIVE || \ - (mode) == FTM_OCMODE_INACTIVE || \ - (mode) == FTM_OCMODE_TOGGLE ) - -#define IS_FTM_PWM_MODE(mode) ((mode) == FTM_OCMODE_PWM1 || \ - (mode) == FTM_OCMODE_PWM2) - -#define IS_FTM_CHANNEL(channel) (((channel) & ~7) == 0) - -#define IS_FTM_PULSE(pulse) (((pulse) & ~0xffff) == 0) - -#define FTM_OCPOLARITY_HIGH (0) -#define FTM_OCPOLARITY_LOW (1) - -#define IS_FTM_OC_POLARITY(polarity) ((polarity) == FTM_OCPOLARITY_HIGH || \ - (polarity) == FTM_OCPOLARITY_LOW) - -#define FTM_ICPOLARITY_RISING (FTM_CSC_ELSA) -#define FTM_ICPOLARITY_FALLING (FTM_CSC_ELSB) -#define FTM_ICPOLARITY_BOTH (FTM_CSC_ELSA | FTM_CSC_ELSB) - -#define IS_FTM_IC_POLARITY(polarity) ((polarity) == FTM_ICPOLARITY_RISING || \ - (polarity) == FTM_ICPOLARITY_FALLING || \ - (polarity) == FTM_ICPOLARITY_BOTH) - -typedef enum { - HAL_FTM_STATE_RESET = 0x00, - HAL_FTM_STATE_READY = 0x01, - HAL_FTM_STATE_BUSY = 0x02, -} HAL_FTM_State; - -typedef struct { - FTM_TypeDef *Instance; - FTM_Base_InitTypeDef Init; - HAL_FTM_State State; - -} FTM_HandleTypeDef; - -#define __HAL_FTM_GET_TOF_FLAG(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOF) != 0) -#define __HAL_FTM_CLEAR_TOF_FLAG(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOF) - -#define __HAL_FTM_GET_TOF_IT(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOIE) != 0) -#define __HAL_FTM_ENABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC |= FTM_SC_TOIE) -#define __HAL_FTM_DISABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOIE) - -#define __HAL_FTM_GET_CH_FLAG(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHF) != 0) -#define __HAL_FTM_CLEAR_CH_FLAG(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHF) - -#define __HAL_FTM_GET_CH_IT(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHIE) != 0) -#define __HAL_FTM_ENABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC |= FTM_CSC_CHIE) -#define __HAL_FTM_DISABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHIE) - -void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm); -void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm); -void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm); - -void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel); -void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm); - -void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel); -void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm); - -void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel); -void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm); - -#endif // MICROPY_INCLUDED_TEENSY_HAL_FTM_H diff --git a/ports/teensy/hal_gpio.c b/ports/teensy/hal_gpio.c deleted file mode 100644 index f9e137602c..0000000000 --- a/ports/teensy/hal_gpio.c +++ /dev/null @@ -1,123 +0,0 @@ -#include -#include -#include "teensy_hal.h" - -#define GPIO_NUMBER 32 - -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) -{ - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - - /* Configure the port pins */ - for (uint32_t position = 0; position < GPIO_NUMBER; position++) { - uint32_t bitmask = 1 << position; - if ((GPIO_Init->Pin & bitmask) == 0) { - continue; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(GPIOx, position); - - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) { - /* Check the Alternate function parameter */ - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - } - else if (GPIO_Init->Mode == GPIO_MODE_ANALOG) { - GPIO_Init->Alternate = 0; - } - else { - GPIO_Init->Alternate = 1; - } - - /* Configure Alternate function mapped with the current IO */ - *port_pcr &= ~PORT_PCR_MUX_MASK; - *port_pcr |= PORT_PCR_MUX(GPIO_Init->Alternate); - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - if (GPIO_Init->Mode == GPIO_MODE_INPUT || GPIO_Init->Mode == GPIO_MODE_ANALOG) { - GPIOx->PDDR &= ~bitmask; - } else { - GPIOx->PDDR |= bitmask; - } - - /* In case of Output or Alternate function mode selection */ - if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) { - /* Check the Speed parameter */ - assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - - *port_pcr |= PORT_PCR_DSE; - - /* Configure the IO Speed */ - if (GPIO_Init->Speed > GPIO_SPEED_FREQ_MEDIUM) { - *port_pcr &= ~PORT_PCR_SRE; - } else { - *port_pcr |= PORT_PCR_SRE; - } - - /* Configure the IO Output Type */ - if (GPIO_Init->Mode & GPIO_OUTPUT_TYPE) { - *port_pcr |= PORT_PCR_ODE; // OD - } else { - *port_pcr &= ~PORT_PCR_ODE; // PP - } - } else { - *port_pcr &= ~PORT_PCR_DSE; - } - - /* Activate the Pull-up or Pull down resistor for the current IO */ - if (GPIO_Init->Pull == GPIO_NOPULL) { - *port_pcr &= ~PORT_PCR_PE; - } else { - *port_pcr |= PORT_PCR_PE; - if (GPIO_Init->Pull == GPIO_PULLDOWN) { - *port_pcr &= ~PORT_PCR_PS; - } else { - *port_pcr |= PORT_PCR_PS; - } - } - -#if 0 - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - { - /* Enable SYSCFG Clock */ - __SYSCFG_CLK_ENABLE(); - - temp = ((uint32_t)0x0F) << (4 * (position & 0x03)); - SYSCFG->EXTICR[position >> 2] &= ~temp; - SYSCFG->EXTICR[position >> 2] |= ((uint32_t)(__HAL_GET_GPIO_SOURCE(GPIOx)) << (4 * (position & 0x03))); - - /* Clear EXTI line configuration */ - EXTI->IMR &= ~((uint32_t)iocurrent); - EXTI->EMR &= ~((uint32_t)iocurrent); - - if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - { - EXTI->IMR |= iocurrent; - } - if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - { - EXTI->EMR |= iocurrent; - } - - /* Clear Rising Falling edge configuration */ - EXTI->RTSR &= ~((uint32_t)iocurrent); - EXTI->FTSR &= ~((uint32_t)iocurrent); - - if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - { - EXTI->RTSR |= iocurrent; - } - if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - { - EXTI->FTSR |= iocurrent; - } - } -#endif - } -} diff --git a/ports/teensy/help.c b/ports/teensy/help.c deleted file mode 100644 index a2370c04d2..0000000000 --- a/ports/teensy/help.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char teensy_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online help please visit http://micropython.org/help/.\n" -"\n" -"Quick overview of commands for the board:\n" -" pyb.info() -- print some general information\n" -" pyb.gc() -- run the garbage collector\n" -" pyb.delay(n) -- wait for n milliseconds\n" -" pyb.Switch() -- create a switch object\n" -" Switch methods: (), callback(f)\n" -" pyb.LED(n) -- create an LED object for LED n (n=1,2,3,4)\n" -" LED methods: on(), off(), toggle(), intensity()\n" -" pyb.Pin(pin) -- get a pin, eg pyb.Pin('X1')\n" -" pyb.Pin(pin, m, [p]) -- get a pin and configure it for IO mode m, pull mode p\n" -" Pin methods: init(..), value([v]), high(), low()\n" -" pyb.ExtInt(pin, m, p, callback) -- create an external interrupt object\n" -" pyb.ADC(pin) -- make an analog object from a pin\n" -" ADC methods: read(), read_timed(buf, freq)\n" -" pyb.DAC(port) -- make a DAC object\n" -" DAC methods: triangle(freq), write(n), write_timed(buf, freq)\n" -" pyb.RTC() -- make an RTC object; methods: datetime([val])\n" -" pyb.rng() -- get a 30-bit hardware random number\n" -" pyb.Servo(n) -- create Servo object for servo n (n=1,2,3,4)\n" -" Servo methods: calibration(..), angle([x, [t]]), speed([x, [t]])\n" -" pyb.Accel() -- create an Accelerometer object\n" -" Accelerometer methods: x(), y(), z(), tilt(), filtered_xyz()\n" -"\n" -"Pins are numbered X1-X12, X17-X22, Y1-Y12, or by their MCU name\n" -"Pin IO modes are: pyb.Pin.IN, pyb.Pin.OUT_PP, pyb.Pin.OUT_OD\n" -"Pin pull modes are: pyb.Pin.PULL_NONE, pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN\n" -"Additional serial bus objects: pyb.I2C(n), pyb.SPI(n), pyb.UART(n)\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/teensy/lcd.c b/ports/teensy/lcd.c deleted file mode 100644 index e5d6115d75..0000000000 --- a/ports/teensy/lcd.c +++ /dev/null @@ -1,14 +0,0 @@ -#include "py/obj.h" -#include "../stm32/lcd.h" - -void lcd_init(void) { -} - -void lcd_print_str(const char *str) { - (void)str; -} - -void lcd_print_strn(const char *str, unsigned int len) { - (void)str; - (void)len; -} diff --git a/ports/teensy/led.c b/ports/teensy/led.c deleted file mode 100644 index cf59dbd0a3..0000000000 --- a/ports/teensy/led.c +++ /dev/null @@ -1,143 +0,0 @@ -#include - -#include "Arduino.h" - -#include "py/runtime.h" -#include "py/mphal.h" -#include "led.h" -#include "pin.h" -#include "genhdr/pins.h" - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; - mp_uint_t led_id; - const pin_obj_t *led_pin; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { - {{&pyb_led_type}, 1, &MICROPY_HW_LED1}, -#if defined(MICROPY_HW_LED2) - {{&pyb_led_type}, 2, &MICROPY_HW_LED2}, -#if defined(MICROPY_HW_LED3) - {{&pyb_led_type}, 3, &MICROPY_HW_LED3}, -#if defined(MICROPY_HW_LED4) - {{&pyb_led_type}, 4, &MICROPY_HW_LED4}, -#endif -#endif -#endif -}; -#define NUM_LEDS MP_ARRAY_SIZE(pyb_led_obj) - -void led_init(void) { - /* GPIO structure */ - GPIO_InitTypeDef GPIO_InitStructure; - - /* Configure I/O speed, mode, output type and pull */ - GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW; - GPIO_InitStructure.Mode = MICROPY_HW_LED_OTYPE; - GPIO_InitStructure.Pull = GPIO_NOPULL; - - /* Turn off LEDs and initialize */ - for (int led = 0; led < NUM_LEDS; led++) { - const pin_obj_t *led_pin = pyb_led_obj[led].led_pin; - MICROPY_HW_LED_OFF(led_pin); - GPIO_InitStructure.Pin = led_pin->pin_mask; - HAL_GPIO_Init(led_pin->gpio, &GPIO_InitStructure); - } -} - -void led_state(pyb_led_t led, int state) { - if (led < 1 || led > NUM_LEDS) { - return; - } - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - //printf("led_state(%d,%d)\n", led, state); - if (state == 0) { - // turn LED off - MICROPY_HW_LED_OFF(led_pin); - } else { - // turn LED on - MICROPY_HW_LED_ON(led_pin); - } -} - -void led_toggle(pyb_led_t led) { - if (led < 1 || led > NUM_LEDS) { - return; - } - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - GPIO_TypeDef *gpio = led_pin->gpio; - - // We don't know if we're turning the LED on or off, but we don't really - // care. Just invert the state. - if (gpio->PDOR & led_pin->pin_mask) { - // pin is high, make it low - gpio->PCOR = led_pin->pin_mask; - } else { - // pin is low, make it high - gpio->PSOR = led_pin->pin_mask; - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -void led_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - (void)kind; - mp_printf(print, "", self->led_id); -} - -STATIC mp_obj_t led_obj_make_new(const mp_obj_type_t *type, uint n_args, uint n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get led number - mp_int_t led_id = mp_obj_get_int(args[0]); - - // check led number - if (!(1 <= led_id && led_id <= NUM_LEDS)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED %d does not exist", led_id)); - } - - // return static led object - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -mp_obj_t led_obj_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 1); - return mp_const_none; -} - -mp_obj_t led_obj_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 0); - return mp_const_none; -} - -mp_obj_t led_obj_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(self->led_id); - return mp_const_none; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_on_obj, led_obj_on); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_off_obj, led_obj_off); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_toggle_obj, led_obj_toggle); - -STATIC const mp_rom_map_elem_t led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&led_obj_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&led_obj_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&led_obj_toggle_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(led_locals_dict, led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = led_obj_print, - .make_new = led_obj_make_new, - .locals_dict = (mp_obj_t)&led_locals_dict, -}; diff --git a/ports/teensy/led.h b/ports/teensy/led.h deleted file mode 100644 index 5c45166ef2..0000000000 --- a/ports/teensy/led.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_LED_H -#define MICROPY_INCLUDED_TEENSY_LED_H - -typedef enum { - PYB_LED_BUILTIN = 1, -} pyb_led_t; - -void led_init(void); -void led_state(pyb_led_t led, int state); -void led_toggle(pyb_led_t led); - -extern const mp_obj_type_t pyb_led_type; - -#endif // MICROPY_INCLUDED_TEENSY_LED_H diff --git a/ports/teensy/lexerfrozen.c b/ports/teensy/lexerfrozen.c deleted file mode 100644 index 21e978dc79..0000000000 --- a/ports/teensy/lexerfrozen.c +++ /dev/null @@ -1,13 +0,0 @@ -#include - -#include "py/lexer.h" -#include "py/runtime.h" -#include "py/mperrno.h" - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} diff --git a/ports/teensy/lexermemzip.h b/ports/teensy/lexermemzip.h deleted file mode 100644 index cd7326a435..0000000000 --- a/ports/teensy/lexermemzip.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H -#define MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H - -mp_lexer_t *mp_lexer_new_from_memzip_file(const char *filename); - -#endif // MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H diff --git a/ports/teensy/main.c b/ports/teensy/main.c deleted file mode 100644 index 3edaa28a06..0000000000 --- a/ports/teensy/main.c +++ /dev/null @@ -1,381 +0,0 @@ -#include -#include -#include -#include - -#include "py/lexer.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "gccollect.h" -#include "lib/utils/pyexec.h" -#include "lib/mp-readline/readline.h" -#include "lexermemzip.h" - -#include "Arduino.h" - -#include "servo.h" -#include "led.h" -#include "uart.h" -#include "pin.h" - -extern uint32_t _heap_start; - -void flash_error(int n) { - for (int i = 0; i < n; i++) { - led_state(PYB_LED_BUILTIN, 1); - delay(250); - led_state(PYB_LED_BUILTIN, 0); - delay(250); - } -} - -void NORETURN __fatal_error(const char *msg) { - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - led_state(1, 1); - led_state(2, 1); - led_state(3, 1); - led_state(4, 1); - mp_hal_stdout_tx_strn("\nFATAL ERROR:\n", 14); - mp_hal_stdout_tx_strn(msg, strlen(msg)); - for (uint i = 0;;) { - led_toggle(((i++) & 3) + 1); - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - if (i >= 16) { - // to conserve power - __WFI(); - } - } -} - -void nlr_jump_fail(void *val) { - printf("FATAL: uncaught exception %p\n", val); - __fatal_error(""); -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) { - - printf("Assertion failed: %s, file %s, line %d\n", expr, file, line); - __fatal_error(""); -} - -mp_obj_t pyb_analog_read(mp_obj_t pin_obj) { - uint pin = mp_obj_get_int(pin_obj); - int val = analogRead(pin); - return MP_OBJ_NEW_SMALL_INT(val); -} - -mp_obj_t pyb_analog_write(mp_obj_t pin_obj, mp_obj_t val_obj) { - uint pin = mp_obj_get_int(pin_obj); - int val = mp_obj_get_int(val_obj); - analogWrite(pin, val); - return mp_const_none; -} - -mp_obj_t pyb_analog_write_resolution(mp_obj_t res_obj) { - int res = mp_obj_get_int(res_obj); - analogWriteResolution(res); - return mp_const_none; -} - -mp_obj_t pyb_analog_write_frequency(mp_obj_t pin_obj, mp_obj_t freq_obj) { - uint pin = mp_obj_get_int(pin_obj); - int freq = mp_obj_get_int(freq_obj); - analogWriteFrequency(pin, freq); - return mp_const_none; -} - -#if 0 -// get lots of info about the board -static mp_obj_t pyb_info(void) { - // get and print unique id; 96 bits - { - byte *id = (byte*)0x40048058; - printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]); - } - - // get and print clock speeds - printf("CPU=%u\nBUS=%u\nMEM=%u\n", F_CPU, F_BUS, F_MEM); - - // to print info about memory - { - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_etext=%p\n", &_etext); - printf("_heap_start=%p\n", &_heap_start); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" %u total\n", info.total); - printf(" %u used %u free\n", info.used, info.free); - printf(" 1=%u 2=%u m=%u\n", info.num_1block, info.num_2block, info.max_block); - } - -#if 0 - // free space on flash - { - DWORD nclst; - FATFS *fatfs; - f_getfree("0:", &nclst, &fatfs); - printf("LFS free: %u bytes\n", (uint)(nclst * fatfs->csize * 512)); - } -#endif - - return mp_const_none; -} - -#endif - -#define RAM_START (0x1FFF8000) // fixed for chip -#define HEAP_END (0x20006000) // tunable -#define RAM_END (0x20008000) // fixed for chip - -#if 0 - -void gc_helper_get_regs_and_clean_stack(mp_uint_t *regs, mp_uint_t heap_end); - -mp_obj_t pyb_gc(void) { - gc_collect(); - return mp_const_none; -} - -mp_obj_t pyb_gpio(int n_args, mp_obj_t *args) { - //assert(1 <= n_args && n_args <= 2); - - uint pin = mp_obj_get_int(args[0]); - if (pin > CORE_NUM_DIGITAL) { - goto pin_error; - } - - if (n_args == 1) { - // get pin - pinMode(pin, INPUT); - return MP_OBJ_NEW_SMALL_INT(digitalRead(pin)); - } - - // set pin - pinMode(pin, OUTPUT); - digitalWrite(pin, mp_obj_is_true(args[1])); - return mp_const_none; - -pin_error: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %d does not exist", pin)); -} - -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_gpio_obj, 1, 2, pyb_gpio); - -#if 0 -mp_obj_t pyb_hid_send_report(mp_obj_t arg) { - mp_obj_t *items = mp_obj_get_array_fixed_n(arg, 4); - uint8_t data[4]; - data[0] = mp_obj_get_int(items[0]); - data[1] = mp_obj_get_int(items[1]); - data[2] = mp_obj_get_int(items[2]); - data[3] = mp_obj_get_int(items[3]); - usb_hid_send_report(data); - return mp_const_none; -} -#endif - -#endif // 0 - -STATIC mp_obj_t pyb_config_source_dir = MP_OBJ_NULL; -STATIC mp_obj_t pyb_config_main = MP_OBJ_NULL; -STATIC mp_obj_t pyb_config_usb_mode = MP_OBJ_NULL; - -mp_obj_t pyb_source_dir(mp_obj_t source_dir) { - if (MP_OBJ_IS_STR(source_dir)) { - pyb_config_source_dir = source_dir; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_1(pyb_source_dir_obj, pyb_source_dir); - -mp_obj_t pyb_main(mp_obj_t main) { - if (MP_OBJ_IS_STR(main)) { - pyb_config_main = main; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_1(pyb_main_obj, pyb_main); - -STATIC mp_obj_t pyb_usb_mode(mp_obj_t usb_mode) { - if (MP_OBJ_IS_STR(usb_mode)) { - pyb_config_usb_mode = usb_mode; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_mode_obj, pyb_usb_mode); - -#if 0 - -mp_obj_t pyb_delay(mp_obj_t count) { - delay(mp_obj_get_int(count)); - return mp_const_none; -} - -mp_obj_t pyb_led(mp_obj_t state) { - led_state(PYB_LED_BUILTIN, mp_obj_is_true(state)); - return state; -} - -#endif // 0 - -#if 0 -char *strdup(const char *str) { - uint32_t len = strlen(str); - char *s2 = m_new(char, len + 1); - memcpy(s2, str, len); - s2[len] = 0; - return s2; -} -#endif - -int main(void) { - // TODO: Put this in a more common initialization function. - // Turn on STKALIGN which keeps the stack 8-byte aligned for interrupts - // (per EABI) - #define SCB_CCR_STKALIGN (1 << 9) - SCB_CCR |= SCB_CCR_STKALIGN; - - mp_stack_ctrl_init(); - mp_stack_set_limit(10240); - - pinMode(LED_BUILTIN, OUTPUT); - led_init(); - -// int first_soft_reset = true; - -soft_reset: - - led_state(PYB_LED_BUILTIN, 1); - - // GC init - gc_init(&_heap_start, (void*)HEAP_END); - - // MicroPython init - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_init(mp_sys_argv, 0); - - readline_init0(); - - pin_init0(); - -#if 0 - // add some functions to the python namespace - { - mp_store_name(MP_QSTR_help, mp_make_function_n(0, pyb_help)); - mp_obj_t m = mp_obj_new_module(MP_QSTR_pyb); - mp_store_attr(m, MP_QSTR_info, mp_make_function_n(0, pyb_info)); - mp_store_attr(m, MP_QSTR_source_dir, mp_make_function_n(1, pyb_source_dir)); - mp_store_attr(m, MP_QSTR_main, mp_make_function_n(1, pyb_main)); - mp_store_attr(m, MP_QSTR_gc, mp_make_function_n(0, pyb_gc)); - mp_store_attr(m, MP_QSTR_delay, mp_make_function_n(1, pyb_delay)); - mp_store_attr(m, MP_QSTR_led, mp_make_function_n(1, pyb_led)); - mp_store_attr(m, MP_QSTR_LED, (mp_obj_t)&pyb_led_type); - mp_store_attr(m, MP_QSTR_analogRead, mp_make_function_n(1, pyb_analog_read)); - mp_store_attr(m, MP_QSTR_analogWrite, mp_make_function_n(2, pyb_analog_write)); - mp_store_attr(m, MP_QSTR_analogWriteResolution, mp_make_function_n(1, pyb_analog_write_resolution)); - mp_store_attr(m, MP_QSTR_analogWriteFrequency, mp_make_function_n(2, pyb_analog_write_frequency)); - - mp_store_attr(m, MP_QSTR_gpio, (mp_obj_t)&pyb_gpio_obj); - mp_store_attr(m, MP_QSTR_Servo, mp_make_function_n(0, pyb_Servo)); - mp_store_name(MP_QSTR_pyb, m); - } -#endif - -#if MICROPY_MODULE_FROZEN - pyexec_frozen_module("boot.py"); -#else - if (!pyexec_file("/boot.py")) { - flash_error(4); - } -#endif - - // Turn bootup LED off - led_state(PYB_LED_BUILTIN, 0); - - // run main script -#if MICROPY_MODULE_FROZEN - pyexec_frozen_module("main.py"); -#else - { - vstr_t *vstr = vstr_new(16); - vstr_add_str(vstr, "/"); - if (pyb_config_main == MP_OBJ_NULL) { - vstr_add_str(vstr, "main.py"); - } else { - vstr_add_str(vstr, mp_obj_str_get_str(pyb_config_main)); - } - if (!pyexec_file(vstr_null_terminated_str(vstr))) { - flash_error(3); - } - vstr_free(vstr); - } -#endif - - // enter REPL - // REPL mode can change, or it can request a soft reset - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - printf("PYB: soft reboot\n"); - -// first_soft_reset = false; - goto soft_reset; -} - -// stub out __libc_init_array. It's called by mk20dx128.c and is used to call -// global C++ constructors. Since this is a C-only projects, we don't need to -// call constructors. -void __libc_init_array(void) { -} - -// ultoa is used by usb_init_serialnumber. Normally ultoa would be provided -// by nonstd.c from the teensy core, but it conflicts with some of the -// MicroPython functions in string0.c, so we provide ultoa here. -char * ultoa(unsigned long val, char *buf, int radix) -{ - unsigned digit; - int i=0, j; - char t; - - while (1) { - digit = val % radix; - buf[i] = ((digit < 10) ? '0' + digit : 'A' + digit - 10); - val /= radix; - if (val == 0) break; - i++; - } - buf[i + 1] = 0; - for (j=0; j < i; j++, i--) { - t = buf[j]; - buf[j] = buf[i]; - buf[i] = t; - } - return buf; -} diff --git a/ports/teensy/make-pins.py b/ports/teensy/make-pins.py deleted file mode 100755 index 0f6c5f28d4..0000000000 --- a/ports/teensy/make-pins.py +++ /dev/null @@ -1,405 +0,0 @@ -#!/usr/bin/env python -"""Creates the pin file for the Teensy.""" - -from __future__ import print_function - -import argparse -import sys -import csv - -SUPPORTED_FN = { - 'FTM' : ['CH0', 'CH1', 'CH2', 'CH3', 'CH4', 'CH5', 'CH6', 'CH7', - 'QD_PHA', 'QD_PHB'], - 'I2C' : ['SDA', 'SCL'], - 'UART' : ['RX', 'TX', 'CTS', 'RTS'], - 'SPI' : ['NSS', 'SCK', 'MISO', 'MOSI'] -} - -def parse_port_pin(name_str): - """Parses a string and returns a (port-num, pin-num) tuple.""" - if len(name_str) < 4: - raise ValueError("Expecting pin name to be at least 4 charcters.") - if name_str[0:2] != 'PT': - raise ValueError("Expecting pin name to start with PT") - if name_str[2] not in ('A', 'B', 'C', 'D', 'E', 'Z'): - raise ValueError("Expecting pin port to be between A and E or Z") - port = ord(name_str[2]) - ord('A') - pin_str = name_str[3:].split('/')[0] - if not pin_str.isdigit(): - raise ValueError("Expecting numeric pin number.") - return (port, int(pin_str)) - -def split_name_num(name_num): - num = None - for num_idx in range(len(name_num) - 1, -1, -1): - if not name_num[num_idx].isdigit(): - name = name_num[0:num_idx + 1] - num_str = name_num[num_idx + 1:] - if len(num_str) > 0: - num = int(num_str) - break - return name, num - - -class AlternateFunction(object): - """Holds the information associated with a pins alternate function.""" - - def __init__(self, idx, af_str): - self.idx = idx - self.af_str = af_str - - self.func = '' - self.fn_num = None - self.pin_type = '' - self.supported = False - - af_words = af_str.split('_', 1) - self.func, self.fn_num = split_name_num(af_words[0]) - if len(af_words) > 1: - self.pin_type = af_words[1] - if self.func in SUPPORTED_FN: - pin_types = SUPPORTED_FN[self.func] - if self.pin_type in pin_types: - self.supported = True - - def is_supported(self): - return self.supported - - def ptr(self): - """Returns the numbered function (i.e. USART6) for this AF.""" - if self.fn_num is None: - return self.func - return '{:s}{:d}'.format(self.func, self.fn_num) - - def mux_name(self): - return 'AF{:d}_{:s}'.format(self.idx, self.ptr()) - - def print(self): - """Prints the C representation of this AF.""" - if self.supported: - print(' AF', end='') - else: - print(' //', end='') - fn_num = self.fn_num - if fn_num is None: - fn_num = 0 - print('({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}'.format(self.idx, - self.func, fn_num, self.pin_type, self.ptr(), self.af_str)) - - def qstr_list(self): - return [self.mux_name()] - - -class Pin(object): - """Holds the information associated with a pin.""" - - def __init__(self, port, pin): - self.port = port - self.pin = pin - self.alt_fn = [] - self.alt_fn_count = 0 - self.adc_num = 0 - self.adc_channel = 0 - self.board_pin = False - - def port_letter(self): - return chr(self.port + ord('A')) - - def cpu_pin_name(self): - return '{:s}{:d}'.format(self.port_letter(), self.pin) - - def is_board_pin(self): - return self.board_pin - - def set_is_board_pin(self): - self.board_pin = True - - def parse_adc(self, adc_str): - if (adc_str[:3] != 'ADC'): - return - (adc,channel) = adc_str.split('_') - for idx in range(3, len(adc)): - adc_num = int(adc[idx]) # 1, 2, or 3 - self.adc_num |= (1 << (adc_num - 1)) - self.adc_channel = int(channel[2:]) - - def parse_af(self, af_idx, af_strs_in): - if len(af_strs_in) == 0: - return - # If there is a slash, then the slash separates 2 aliases for the - # same alternate function. - af_strs = af_strs_in.split('/') - for af_str in af_strs: - alt_fn = AlternateFunction(af_idx, af_str) - self.alt_fn.append(alt_fn) - if alt_fn.is_supported(): - self.alt_fn_count += 1 - - def alt_fn_name(self, null_if_0=False): - if null_if_0 and self.alt_fn_count == 0: - return 'NULL' - return 'pin_{:s}_af'.format(self.cpu_pin_name()) - - def adc_num_str(self): - str = '' - for adc_num in range(1,4): - if self.adc_num & (1 << (adc_num - 1)): - if len(str) > 0: - str += ' | ' - str += 'PIN_ADC' - str += chr(ord('0') + adc_num) - if len(str) == 0: - str = '0' - return str - - def print(self): - if self.alt_fn_count == 0: - print("// ", end='') - print('const pin_af_obj_t {:s}[] = {{'.format(self.alt_fn_name())) - for alt_fn in self.alt_fn: - alt_fn.print() - if self.alt_fn_count == 0: - print("// ", end='') - print('};') - print('') - print('const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:d}, {:s}, {:s}, {:d});'.format( - self.cpu_pin_name(), self.port_letter(), self.pin, - self.alt_fn_count, self.alt_fn_name(null_if_0=True), - self.adc_num_str(), self.adc_channel)) - print('') - - def print_header(self, hdr_file): - hdr_file.write('extern const pin_obj_t pin_{:s};\n'. - format(self.cpu_pin_name())) - if self.alt_fn_count > 0: - hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'. - format(self.cpu_pin_name())) - - def qstr_list(self): - result = [] - for alt_fn in self.alt_fn: - if alt_fn.is_supported(): - result += alt_fn.qstr_list() - return result - - -class NamedPin(object): - - def __init__(self, name, pin): - self._name = name - self._pin = pin - - def pin(self): - return self._pin - - def name(self): - return self._name - - -class Pins(object): - - def __init__(self): - self.cpu_pins = [] # list of NamedPin objects - self.board_pins = [] # list of NamedPin objects - - def find_pin(self, port_num, pin_num): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.port == port_num and pin.pin == pin_num: - return pin - - def parse_af_file(self, filename, pinname_col, af_col): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[pinname_col]) - except: - continue - pin = Pin(port_num, pin_num) - for af_idx in range(af_col, len(row)): - if af_idx >= af_col: - pin.parse_af(af_idx - af_col, row[af_idx]) - self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin)) - - def parse_board_file(self, filename): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[1]) - except: - continue - pin = self.find_pin(port_num, pin_num) - if pin: - pin.set_is_board_pin() - self.board_pins.append(NamedPin(row[0], pin)) - - def print_named(self, label, named_pins): - print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label)) - for named_pin in named_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},'.format(named_pin.name(), pin.cpu_pin_name())) - print('};') - print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label)); - - def print(self): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print() - self.print_named('cpu', self.cpu_pins) - print('') - self.print_named('board', self.board_pins) - - def print_adc(self, adc_num): - print(''); - print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num)) - for channel in range(16): - adc_found = False - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if (pin.is_board_pin() and - (pin.adc_num & (1 << (adc_num - 1))) and (pin.adc_channel == channel)): - print(' &pin_{:s}, // {:d}'.format(pin.cpu_pin_name(), channel)) - adc_found = True - break - if not adc_found: - print(' NULL, // {:d}'.format(channel)) - print('};') - - - def print_header(self, hdr_filename): - with open(hdr_filename, 'wt') as hdr_file: - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print_header(hdr_file) - hdr_file.write('extern const pin_obj_t * const pin_adc1[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc2[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc3[];\n') - - def print_qstr(self, qstr_filename): - with open(qstr_filename, 'wt') as qstr_file: - qstr_set = set([]) - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - qstr_set |= set(pin.qstr_list()) - qstr_set |= set([named_pin.name()]) - for named_pin in self.board_pins: - qstr_set |= set([named_pin.name()]) - for qstr in sorted(qstr_set): - print('Q({})'.format(qstr), file=qstr_file) - - - def print_af_hdr(self, af_const_filename): - with open(af_const_filename, 'wt') as af_const_file: - af_hdr_set = set([]) - mux_name_width = 0 - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - for af in pin.alt_fn: - if af.is_supported(): - mux_name = af.mux_name() - af_hdr_set |= set([mux_name]) - if len(mux_name) > mux_name_width: - mux_name_width = len(mux_name) - for mux_name in sorted(af_hdr_set): - key = 'MP_OBJ_NEW_QSTR(MP_QSTR_{}),'.format(mux_name) - val = 'MP_OBJ_NEW_SMALL_INT(GPIO_{})'.format(mux_name) - print(' { %-*s %s },' % (mux_name_width + 26, key, val), - file=af_const_file) - - def print_af_py(self, af_py_filename): - with open(af_py_filename, 'wt') as af_py_file: - print('PINS_AF = (', file=af_py_file); - for named_pin in self.board_pins: - print(" ('%s', " % named_pin.name(), end='', file=af_py_file) - for af in named_pin.pin().alt_fn: - if af.is_supported(): - print("(%d, '%s'), " % (af.idx, af.af_str), end='', file=af_py_file) - print('),', file=af_py_file) - print(')', file=af_py_file) - - -def main(): - parser = argparse.ArgumentParser( - prog="make-pins.py", - usage="%(prog)s [options] [command]", - description="Generate board specific pin file" - ) - parser.add_argument( - "-a", "--af", - dest="af_filename", - help="Specifies the alternate function file for the chip", - default="mk20dx256_af.csv" - ) - parser.add_argument( - "--af-const", - dest="af_const_filename", - help="Specifies header file for alternate function constants.", - default="build/pins_af_const.h" - ) - parser.add_argument( - "--af-py", - dest="af_py_filename", - help="Specifies the filename for the python alternate function mappings.", - default="build/pins_af.py" - ) - parser.add_argument( - "-b", "--board", - dest="board_filename", - help="Specifies the board file", - ) - parser.add_argument( - "-p", "--prefix", - dest="prefix_filename", - help="Specifies beginning portion of generated pins file", - default="mk20dx256_prefix.c" - ) - parser.add_argument( - "-q", "--qstr", - dest="qstr_filename", - help="Specifies name of generated qstr header file", - default="build/pins_qstr.h" - ) - parser.add_argument( - "-r", "--hdr", - dest="hdr_filename", - help="Specifies name of generated pin header file", - default="build/pins.h" - ) - args = parser.parse_args(sys.argv[1:]) - - pins = Pins() - - print('// This file was automatically generated by make-pins.py') - print('//') - if args.af_filename: - print('// --af {:s}'.format(args.af_filename)) - pins.parse_af_file(args.af_filename, 4, 3) - - if args.board_filename: - print('// --board {:s}'.format(args.board_filename)) - pins.parse_board_file(args.board_filename) - - if args.prefix_filename: - print('// --prefix {:s}'.format(args.prefix_filename)) - print('') - with open(args.prefix_filename, 'r') as prefix_file: - print(prefix_file.read()) - pins.print() - pins.print_adc(1) - pins.print_adc(2) - pins.print_adc(3) - pins.print_header(args.hdr_filename) - pins.print_qstr(args.qstr_filename) - pins.print_af_hdr(args.af_const_filename) - pins.print_af_py(args.af_py_filename) - - -if __name__ == "__main__": - main() diff --git a/ports/teensy/memzip_files/boot.py b/ports/teensy/memzip_files/boot.py deleted file mode 100644 index 6dd5516a97..0000000000 --- a/ports/teensy/memzip_files/boot.py +++ /dev/null @@ -1,12 +0,0 @@ -import pyb -print("Executing boot.py") - -def pins(): - for pin_name in dir(pyb.Pin.board): - pin = pyb.Pin(pin_name) - print('{:10s} {:s}'.format(pin_name, str(pin))) - -def af(): - for pin_name in dir(pyb.Pin.board): - pin = pyb.Pin(pin_name) - print('{:10s} {:s}'.format(pin_name, str(pin.af_list()))) diff --git a/ports/teensy/memzip_files/main.py b/ports/teensy/memzip_files/main.py deleted file mode 100644 index b652377f97..0000000000 --- a/ports/teensy/memzip_files/main.py +++ /dev/null @@ -1,15 +0,0 @@ -import pyb - -print("Executing main.py") - -led = pyb.LED(1) - -led.on() -pyb.delay(100) -led.off() -pyb.delay(100) -led.on() -pyb.delay(100) -led.off() - - diff --git a/ports/teensy/mk20dx256.ld b/ports/teensy/mk20dx256.ld deleted file mode 100644 index bff0a8c4aa..0000000000 --- a/ports/teensy/mk20dx256.ld +++ /dev/null @@ -1,176 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K - RAM (rwx) : ORIGIN = 0x1FFF8000, LENGTH = 64K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* INCLUDE common.ld */ - -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - - - -SECTIONS -{ - .text : { - . = 0; - KEEP(*(.vectors)) - *(.startup*) - /* TODO: does linker detect startup overflow onto flashconfig? */ - . = 0x400; - KEEP(*(.flashconfig*)) - *(.text*) - *(.rodata*) - . = ALIGN(4); - KEEP(*(.init)) - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - } > FLASH = 0xFF - - .ARM.exidx : { - __exidx_start = .; - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - __exidx_end = .; - } > FLASH - _etext = .; - - .usbdescriptortable (NOLOAD) : { - /* . = ORIGIN(RAM); */ - . = ALIGN(512); - *(.usbdescriptortable*) - } > RAM - - .dmabuffers (NOLOAD) : { - . = ALIGN(4); - *(.dmabuffers*) - } > RAM - - .usbbuffers (NOLOAD) : { - . = ALIGN(4); - *(.usbbuffers*) - } > RAM - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - .data : AT (_etext) { - . = ALIGN(4); - _sdata = .; - _ram_start = .; - *(.data*) - . = ALIGN(4); - _edata = .; - } > RAM - - /* - * _staticfs is the place in flash where the static filesystem which - * is concatenated to the .hex file will wind up. - */ - _staticfs = LOADADDR(.data) + SIZEOF(.data); - - .noinit (NOLOAD) : { - *(.noinit*) - } > RAM - - .bss : { - . = ALIGN(4); - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - __bss_end = .; - } > RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - _heap_start = .; /* define a global symbol at heap start */ - . = . + _minimum_heap_size; - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - _estack = ORIGIN(RAM) + LENGTH(RAM); - _ram_end = ORIGIN(RAM) + LENGTH(RAM); - _heap_end = ORIGIN(RAM) + 0xe000; -} - - - - diff --git a/ports/teensy/mk20dx256_af.csv b/ports/teensy/mk20dx256_af.csv deleted file mode 100644 index 571587de6b..0000000000 --- a/ports/teensy/mk20dx256_af.csv +++ /dev/null @@ -1,65 +0,0 @@ -Pin,Name,Default,ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,EzPort -1,PTE0,ADC1_SE4a,ADC1_SE4a,PTE0,SPI1_PCS1,UART1_TX,,,I2C1_SDA,RTC_CLKOUT, -2,PTE1/LLWU_P0,ADC1_SE5a,ADC1_SE5a,PTE1/LLWU_P0,SPI1_SOUT,UART1_RX,,,I2C1_SCL,SPI1_SIN, -3,VDD,VDD,VDD,,,,,,,, -4,VSS,VSS,VSS,,,,,,,, -5,USB0_DP,USB0_DP,USB0_DP,,,,,,,, -6,USB0_DM,USB0_DM,USB0_DM,,,,,,,, -7,VOUT33,VOUT33,VOUT33,,,,,,,, -8,VREGIN,VREGIN,VREGIN,,,,,,,, -9,PGA0_DP/ADC0_DP0/ADC1_DP3,PGA0_DP/ADC0_DP0/ADC1_DP3,PGA0_DP/ADC0_DP0/ADC1_DP3,PTZ0,,,,,,, -10,PGA0_DM/ADC0_DM0/ADC1_DM3,PGA0_DM/ADC0_DM0/ADC1_DM3,PGA0_DM/ADC0_DM0/ADC1_DM3,PTZ1,,,,,,, -11,PGA1_DP/ADC1_DP0/ADC0_DP3,PGA1_DP/ADC1_DP0/ADC0_DP3,PGA1_DP/ADC1_DP0/ADC0_DP3,PTZ2,,,,,,, -12,PGA1_DM/ADC1_DM0/ADC0_DM3,PGA1_DM/ADC1_DM0/ADC0_DM3,PGA1_DM/ADC1_DM0/ADC0_DM3,PTZ3,,,,,,, -13,VDDA,VDDA,VDDA,,,,,,,, -14,VREFH,VREFH,VREFH,,,,,,,, -15,VREFL,VREFL,VREFL,,,,,,,, -16,VSSA,VSSA,VSSA,,,,,,,, -17,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,PTZ4,,,,,,, -18,DAC0_OUT/CMP1_IN3/ADC0_SE23,DAC0_OUT/CMP1_IN3/ADC0_SE23,DAC0_OUT/CMP1_IN3/ADC0_SE23,PTZ5,,,,,,, -19,XTAL32,XTAL32,XTAL32,,,,,,,, -20,EXTAL32,EXTAL32,EXTAL32,,,,,,,, -21,VBAT,VBAT,VBAT,,,,,,,, -22,PTA0,JTAG_TCLK/SWD_CLK/EZP_CLK,TSI0_CH1,PTA0,UART0_CTS_b/UART0_COL_b,FTM0_CH5,,,,JTAG_TCLK/SWD_CLK,EZP_CLK -23,PTA1,JTAG_TDI/EZP_DI,TSI0_CH2,PTA1,UART0_RX,FTM0_CH6,,,,JTAG_TDI,EZP_DI -24,PTA2,JTAG_TDO/TRACE_SWO/EZP_DO,TSI0_CH3,PTA2,UART0_TX,FTM0_CH7,,,,JTAG_TDO/TRACE_SWO,EZP_DO -25,PTA3,JTAG_TMS/SWD_DIO,TSI0_CH4,PTA3,UART0_RTS_b,FTM0_CH0,,,,JTAG_TMS/SWD_DIO, -26,PTA4/LLWU_P3,NMI_b/EZP_CS_b,TSI0_CH5,PTA4/LLWU_P3,,FTM0_CH1,,,NMI_b,EZP_CS_b, -27,PTA5,DISABLED,,PTA5,USB_CLKIN,FTM0_CH2,,CMP2_OUT,I2S0_TX_BCLK,JTAG_TRST_b, -28,PTA12,CMP2_IN0,CMP2_IN0,PTA12,CAN0_TX,FTM1_CH0,,,I2S0_TXD0,FTM1_QD_PHA, -29,PTA13/LLWU_P4,CMP2_IN1,CMP2_IN1,PTA13/LLWU_P4,CAN0_RX,FTM1_CH1,,,I2S0_TX_FS,FTM1_QD_PHB, -30,VDD,VDD,VDD,,,,,,,, -31,VSS,VSS,VSS,,,,,,,, -32,PTA18,EXTAL0,EXTAL0,PTA18,,FTM0_FLT2,FTM_CLKIN0,,,, -33,PTA19,XTAL0,XTAL0,PTA19,,FTM1_FLT0,FTM_CLKIN1,,LPTMR0_ALT1,, -34,RESET_b,RESET_b,RESET_b,,,,,,,, -35,PTB0/LLWU_P5,ADC0_SE8/ADC1_SE8/TSI0_CH0,ADC0_SE8/ADC1_SE8/TSI0_CH0,PTB0/LLWU_P5,I2C0_SCL,FTM1_CH0,,,FTM1_QD_PHA,, -36,PTB1,ADC0_SE9/ADC1_SE9/TSI0_CH6,ADC0_SE9/ADC1_SE9/TSI0_CH6,PTB1,I2C0_SDA,FTM1_CH1,,,FTM1_QD_PHB,, -37,PTB2,ADC0_SE12/TSI0_CH7,ADC0_SE12/TSI0_CH7,PTB2,I2C0_SCL,UART0_RTS_b,,,FTM0_FLT3,, -38,PTB3,ADC0_SE13/TSI0_CH8,ADC0_SE13/TSI0_CH8,PTB3,I2C0_SDA,UART0_CTS_b/UART0_COL_b,,,FTM0_FLT0,, -39,PTB16,TSI0_CH9,TSI0_CH9,PTB16,SPI1_SOUT,UART0_RX,,FB_AD17,EWM_IN,, -40,PTB17,TSI0_CH10,TSI0_CH10,PTB17,SPI1_SIN,UART0_TX,,FB_AD16,EWM_OUT_b,, -41,PTB18,TSI0_CH11,TSI0_CH11,PTB18,CAN0_TX,FTM2_CH0,I2S0_TX_BCLK,FB_AD15,FTM2_QD_PHA,, -42,PTB19,TSI0_CH12,TSI0_CH12,PTB19,CAN0_RX,FTM2_CH1,I2S0_TX_FS,FB_OE_b,FTM2_QD_PHB,, -43,PTC0,ADC0_SE14/TSI0_CH13,ADC0_SE14/TSI0_CH13,PTC0,SPI0_PCS4,PDB0_EXTRG,,FB_AD14,I2S0_TXD1,, -44,PTC1/LLWU_P6,ADC0_SE15/TSI0_CH14,ADC0_SE15/TSI0_CH14,PTC1/LLWU_P6,SPI0_PCS3,UART1_RTS_b,FTM0_CH0,FB_AD13,I2S0_TXD0,, -45,PTC2,ADC0_SE4b/CMP1_IN0/TSI0_CH15,ADC0_SE4b/CMP1_IN0/TSI0_CH15,PTC2,SPI0_PCS2,UART1_CTS_b,FTM0_CH1,FB_AD12,I2S0_TX_FS,, -46,PTC3/LLWU_P7,CMP1_IN1,CMP1_IN1,PTC3/LLWU_P7,SPI0_PCS1,UART1_RX,FTM0_CH2,CLKOUT,I2S0_TX_BCLK,, -47,VSS,VSS,VSS,,,,,,,, -48,VDD,VDD,VDD,,,,,,,, -49,PTC4/LLWU_P8,DISABLED,,PTC4/LLWU_P8,SPI0_PCS0,UART1_TX,FTM0_CH3,FB_AD11,CMP1_OUT,, -50,PTC5/LLWU_P9,DISABLED,,PTC5/LLWU_P9,SPI0_SCK,LPTMR0_ALT2,I2S0_RXD0,FB_AD10,CMP0_OUT,, -51,PTC6/LLWU_P10,CMP0_IN0,CMP0_IN0,PTC6/LLWU_P10,SPI0_SOUT,PDB0_EXTRG,I2S0_RX_BCLK,FB_AD9,I2S0_MCLK,, -52,PTC7,CMP0_IN1,CMP0_IN1,PTC7,SPI0_SIN,USB_SOF_OUT,I2S0_RX_FS,FB_AD8,,, -53,PTC8,ADC1_SE4b/CMP0_IN2,ADC1_SE4b/CMP0_IN2,PTC8,,,I2S0_MCLK,FB_AD7,,, -54,PTC9,ADC1_SE5b/CMP0_IN3,ADC1_SE5b/CMP0_IN3,PTC9,,,I2S0_RX_BCLK,FB_AD6,FTM2_FLT0,, -55,PTC10,ADC1_SE6b,ADC1_SE6b,PTC10,I2C1_SCL,,I2S0_RX_FS,FB_AD5,,, -56,PTC11/LLWU_P11,ADC1_SE7b,ADC1_SE7b,PTC11/LLWU_P11,I2C1_SDA,,I2S0_RXD1,FB_RW_b,,, -57,PTD0/LLWU_P12,DISABLED,,PTD0/LLWU_P12,SPI0_PCS0,UART2_RTS_b,,FB_ALE/FB_CS1_b/FB_TS_b,,, -58,PTD1,ADC0_SE5b,ADC0_SE5b,PTD1,SPI0_SCK,UART2_CTS_b,,FB_CS0_b,,, -59,PTD2/LLWU_P13,DISABLED,,PTD2/LLWU_P13,SPI0_SOUT,UART2_RX,,FB_AD4,,, -60,PTD3,DISABLED,,PTD3,SPI0_SIN,UART2_TX,,FB_AD3,,, -61,PTD4/LLWU_P14,DISABLED,,PTD4/LLWU_P14,SPI0_PCS1,UART0_RTS_b,FTM0_CH4,FB_AD2,EWM_IN,, -62,PTD5,ADC0_SE6b,ADC0_SE6b,PTD5,SPI0_PCS2,UART0_CTS_b/UART0_COL_b,FTM0_CH5,FB_AD1,EWM_OUT_b,, -63,PTD6/LLWU_P15,ADC0_SE7b,ADC0_SE7b,PTD6/LLWU_P15,SPI0_PCS3,UART0_RX,FTM0_CH6,FB_AD0,FTM0_FLT0f,, -64,PTD7,DISABLED,,PTD7,CMT_IRO,UART0_TX,FTM0_CH7,,FTM0_FLT1,, diff --git a/ports/teensy/mk20dx256_prefix.c b/ports/teensy/mk20dx256_prefix.c deleted file mode 100644 index 58ab07d6ec..0000000000 --- a/ports/teensy/mk20dx256_prefix.c +++ /dev/null @@ -1,33 +0,0 @@ -// stm32fxx-prefix.c becomes the initial portion of the generated pins file. - -#include -#include - -#include "py/obj.h" -#include "teensy_hal.h" -#include "pin.h" - -#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \ -{ \ - { &pin_af_type }, \ - .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \ - .idx = (af_idx), \ - .fn = AF_FN_ ## af_fn, \ - .unit = (af_unit), \ - .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \ - .reg = (af_ptr) \ -} - -#define PIN(p_port, p_pin, p_num_af, p_af, p_adc_num, p_adc_channel) \ -{ \ - { &pin_type }, \ - .name = MP_QSTR_ ## p_port ## p_pin, \ - .port = PORT_ ## p_port, \ - .pin = (p_pin), \ - .num_af = (p_num_af), \ - .pin_mask = (1 << (p_pin)), \ - .gpio = GPIO ## p_port, \ - .af = p_af, \ - .adc_num = p_adc_num, \ - .adc_channel = p_adc_channel, \ -} diff --git a/ports/teensy/modpyb.c b/ports/teensy/modpyb.c deleted file mode 100644 index e4c399fc84..0000000000 --- a/ports/teensy/modpyb.c +++ /dev/null @@ -1,358 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include "Arduino.h" - -#include "py/obj.h" -#include "py/gc.h" -#include "py/mphal.h" - -#include "lib/utils/pyexec.h" - -#include "gccollect.h" -#include "irq.h" -#include "systick.h" -#include "led.h" -#include "pin.h" -#include "timer.h" -#include "extint.h" -#include "usrsw.h" -#include "rng.h" -//#include "rtc.h" -//#include "i2c.h" -//#include "spi.h" -#include "uart.h" -#include "adc.h" -#include "storage.h" -#include "sdcard.h" -#include "accel.h" -#include "servo.h" -#include "dac.h" -#include "usb.h" -#include "portmodules.h" - -/// \module pyb - functions related to the pyboard -/// -/// The `pyb` module contains specific functions related to the pyboard. - -/// \function bootloader() -/// Activate the bootloader without BOOT* pins. -STATIC mp_obj_t pyb_bootloader(void) { - printf("bootloader command not current supported\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_bootloader_obj, pyb_bootloader); - -/// \function info([dump_alloc_table]) -/// Print out lots of information about the board. -STATIC mp_obj_t pyb_info(uint n_args, const mp_obj_t *args) { - // get and print unique id; 96 bits - { - byte *id = (byte*)0x40048058; - printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]); - } - - // get and print clock speeds - printf("CPU=%u\nBUS=%u\nMEM=%u\n", F_CPU, F_BUS, F_MEM); - - // to print info about memory - { - printf("_etext=%p\n", &_etext); - printf("_sidata=%p\n", &_sidata); - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_ram_start=%p\n", &_ram_start); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - printf("_ram_end=%p\n", &_ram_end); - } - - // qstr info - { - uint n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=%u\n n_qstr=%u\n n_str_data_bytes=%u\n n_total_bytes=%u\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj, 0, 1, pyb_info); - -/// \function unique_id() -/// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU. -STATIC mp_obj_t pyb_unique_id(void) { - byte *id = (byte*)0x40048058; - return mp_obj_new_bytes(id, 12); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_unique_id_obj, pyb_unique_id); - -/// \function freq() -/// Return a tuple of clock frequencies: (SYSCLK, HCLK, PCLK1, PCLK2). -// TODO should also be able to set frequency via this function -STATIC mp_obj_t pyb_freq(void) { - mp_obj_t tuple[3] = { - mp_obj_new_int(F_CPU), - mp_obj_new_int(F_BUS), - mp_obj_new_int(F_MEM), - }; - return mp_obj_new_tuple(3, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_freq_obj, pyb_freq); - -/// \function sync() -/// Sync all file systems. -STATIC mp_obj_t pyb_sync(void) { - printf("sync not currently implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_sync_obj, pyb_sync); - -/// \function millis() -/// Returns the number of milliseconds since the board was last reset. -/// -/// The result is always a MicroPython smallint (31-bit signed number), so -/// after 2^30 milliseconds (about 12.4 days) this will start to return -/// negative numbers. -STATIC mp_obj_t pyb_millis(void) { - // We want to "cast" the 32 bit unsigned into a small-int. This means - // copying the MSB down 1 bit (extending the sign down), which is - // equivalent to just using the MP_OBJ_NEW_SMALL_INT macro. - return MP_OBJ_NEW_SMALL_INT(mp_hal_ticks_ms()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_millis_obj, pyb_millis); - -/// \function elapsed_millis(start) -/// Returns the number of milliseconds which have elapsed since `start`. -/// -/// This function takes care of counter wrap, and always returns a positive -/// number. This means it can be used to measure periods upto about 12.4 days. -/// -/// Example: -/// start = pyb.millis() -/// while pyb.elapsed_millis(start) < 1000: -/// # Perform some operation -STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) { - uint32_t startMillis = mp_obj_get_int(start); - uint32_t currMillis = mp_hal_ticks_ms(); - return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis); - -/// \function micros() -/// Returns the number of microseconds since the board was last reset. -/// -/// The result is always a MicroPython smallint (31-bit signed number), so -/// after 2^30 microseconds (about 17.8 minutes) this will start to return -/// negative numbers. -STATIC mp_obj_t pyb_micros(void) { - // We want to "cast" the 32 bit unsigned into a small-int. This means - // copying the MSB down 1 bit (extending the sign down), which is - // equivalent to just using the MP_OBJ_NEW_SMALL_INT macro. - return MP_OBJ_NEW_SMALL_INT(micros()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_micros_obj, pyb_micros); - -/// \function elapsed_micros(start) -/// Returns the number of microseconds which have elapsed since `start`. -/// -/// This function takes care of counter wrap, and always returns a positive -/// number. This means it can be used to measure periods upto about 17.8 minutes. -/// -/// Example: -/// start = pyb.micros() -/// while pyb.elapsed_micros(start) < 1000: -/// # Perform some operation -STATIC mp_obj_t pyb_elapsed_micros(mp_obj_t start) { - uint32_t startMicros = mp_obj_get_int(start); - uint32_t currMicros = micros(); - return MP_OBJ_NEW_SMALL_INT((currMicros - startMicros) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_micros_obj, pyb_elapsed_micros); - -/// \function delay(ms) -/// Delay for the given number of milliseconds. -STATIC mp_obj_t pyb_delay(mp_obj_t ms_in) { - mp_int_t ms = mp_obj_get_int(ms_in); - if (ms >= 0) { - mp_hal_delay_ms(ms); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_delay_obj, pyb_delay); - -/// \function udelay(us) -/// Delay for the given number of microseconds. -STATIC mp_obj_t pyb_udelay(mp_obj_t usec_in) { - mp_int_t usec = mp_obj_get_int(usec_in); - delayMicroseconds(usec); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_udelay_obj, pyb_udelay); - -STATIC mp_obj_t pyb_stop(void) { - printf("stop not currently implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_stop_obj, pyb_stop); - -STATIC mp_obj_t pyb_standby(void) { - printf("standby not currently implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_standby_obj, pyb_standby); - -/// \function have_cdc() -/// Return True if USB is connected as a serial device, False otherwise. -STATIC mp_obj_t pyb_have_cdc(void ) { - return mp_obj_new_bool(usb_vcp_is_connected()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_have_cdc_obj, pyb_have_cdc); - -/// \function hid((buttons, x, y, z)) -/// Takes a 4-tuple (or list) and sends it to the USB host (the PC) to -/// signal a HID mouse-motion event. -STATIC mp_obj_t pyb_hid_send_report(mp_obj_t arg) { -#if 1 - printf("hid_send_report not currently implemented\n"); -#else - mp_obj_t *items; - mp_obj_get_array_fixed_n(arg, 4, &items); - uint8_t data[4]; - data[0] = mp_obj_get_int(items[0]); - data[1] = mp_obj_get_int(items[1]); - data[2] = mp_obj_get_int(items[2]); - data[3] = mp_obj_get_int(items[3]); - usb_hid_send_report(data); -#endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj, pyb_hid_send_report); - -MP_DECLARE_CONST_FUN_OBJ_1(pyb_source_dir_obj); // defined in main.c -MP_DECLARE_CONST_FUN_OBJ_1(pyb_main_obj); // defined in main.c -MP_DECLARE_CONST_FUN_OBJ_1(pyb_usb_mode_obj); // defined in main.c - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - - { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&pyb_bootloader_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&pyb_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) }, - - { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&pyb_wfi_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&pyb_stop_obj) }, - { MP_ROM_QSTR(MP_QSTR_standby), MP_ROM_PTR(&pyb_standby_obj) }, - { MP_ROM_QSTR(MP_QSTR_source_dir), MP_ROM_PTR(&pyb_source_dir_obj) }, - { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&pyb_main_obj) }, - { MP_ROM_QSTR(MP_QSTR_usb_mode), MP_ROM_PTR(&pyb_usb_mode_obj) }, - - { MP_ROM_QSTR(MP_QSTR_have_cdc), MP_ROM_PTR(&pyb_have_cdc_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid), MP_ROM_PTR(&pyb_hid_send_report_obj) }, - - { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&pyb_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_micros), MP_ROM_PTR(&pyb_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_micros), MP_ROM_PTR(&pyb_elapsed_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&pyb_delay_obj) }, - { MP_ROM_QSTR(MP_QSTR_udelay), MP_ROM_PTR(&pyb_udelay_obj) }, - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&pyb_sync_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - -//#if MICROPY_HW_ENABLE_RNG -// { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -//#endif - -//#if MICROPY_HW_ENABLE_RTC -// { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, -//#endif - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, -// { MP_ROM_QSTR(MP_QSTR_ExtInt), MP_ROM_PTR(&extint_type) }, - -#if MICROPY_HW_ENABLE_SERVO - { MP_ROM_QSTR(MP_QSTR_pwm), MP_ROM_PTR(&pyb_pwm_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_servo), MP_ROM_PTR(&pyb_servo_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_Servo), MP_ROM_PTR(&pyb_servo_type) }, -#endif - -#if MICROPY_HW_HAS_SWITCH - { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) }, -#endif - -//#if MICROPY_HW_HAS_SDCARD -// { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sdcard_obj) }, -//#endif - - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, -// { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) }, -// { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - -// { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, -// { MP_ROM_QSTR(MP_QSTR_ADCAll), MP_ROM_PTR(&pyb_adc_all_type) }, - -//#if MICROPY_HW_ENABLE_DAC -// { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pyb_dac_type) }, -//#endif - -//#if MICROPY_HW_HAS_MMA7660 -// { MP_ROM_QSTR(MP_QSTR_Accel), MP_ROM_PTR(&pyb_accel_type) }, -//#endif -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/teensy/mpconfigport.h b/ports/teensy/mpconfigport.h deleted file mode 100644 index b45b5ad4e3..0000000000 --- a/ports/teensy/mpconfigport.h +++ /dev/null @@ -1,139 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_ALLOC_PATH_MAX (128) -#define MICROPY_EMIT_THUMB (1) -#define MICROPY_EMIT_INLINE_THUMB (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_OPT_COMPUTED_GOTO (1) - -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT teensy_help_text - -#define MICROPY_PY_IO (0) -#define MICROPY_PY_FROZENSET (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_CMATH (1) - -#define MICROPY_TIMER_REG (0) -#define MICROPY_REG (MICROPY_TIMER_REG) - -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t os_module; -extern const struct _mp_obj_module_t pyb_module; -extern const struct _mp_obj_module_t time_module; -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t pin_class_mapper; \ - mp_obj_t pin_class_map_dict; \ - struct _pyb_uart_obj_t *pyb_stdio_uart; \ - -// type definitions for the specific machine - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// We have inlined IRQ functions for efficiency (they are generally -// 1 machine instruction). -// -// Note on IRQ state: you should not need to know the specific -// value of the state variable, but rather just pass the return -// value from disable_irq back to enable_irq. If you really need -// to know the machine-specific values, see irq.h. - -#ifndef __disable_irq -#define __disable_irq() __asm__ volatile("CPSID i"); -#endif - -__attribute__(( always_inline )) static inline uint32_t __get_PRIMASK(void) { - uint32_t result; - __asm volatile ("MRS %0, primask" : "=r" (result)); - return(result); -} - -__attribute__(( always_inline )) static inline void __set_PRIMASK(uint32_t priMask) { - __asm volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - -__attribute__(( always_inline )) static inline void enable_irq(mp_uint_t state) { - __set_PRIMASK(state); -} - -__attribute__(( always_inline )) static inline mp_uint_t disable_irq(void) { - mp_uint_t state = __get_PRIMASK(); - __disable_irq(); - return state; -} - -#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq() -#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state) - -// We need to provide a declaration/definition of alloca() -#include - -// The following would be from a board specific file, if one existed - -#define MICROPY_HW_BOARD_NAME "Teensy-3.1" -#define MICROPY_HW_MCU_NAME "MK20DX256" - -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (0) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_I2C1 (0) -#define MICROPY_HW_ENABLE_SPI1 (0) -#define MICROPY_HW_ENABLE_SPI3 (0) -#define MICROPY_HW_ENABLE_CC3K (0) - -#define MICROPY_HW_LED1 (pin_C5) -#define MICROPY_HW_LED_OTYPE (GPIO_MODE_OUTPUT_PP) -#define MICROPY_HW_LED_ON(pin) (pin->gpio->PSOR = pin->pin_mask) -#define MICROPY_HW_LED_OFF(pin) (pin->gpio->PCOR = pin->pin_mask) - -#if 0 -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) -#endif - -#define MICROPY_MATH_SQRT_ASM (1) - -#define MICROPY_MPHALPORT_H "teensy_hal.h" -#define MICROPY_PIN_DEFS_PORT_H "pin_defs_teensy.h" diff --git a/ports/teensy/pin_defs_teensy.c b/ports/teensy/pin_defs_teensy.c deleted file mode 100644 index e7af1e9697..0000000000 --- a/ports/teensy/pin_defs_teensy.c +++ /dev/null @@ -1,71 +0,0 @@ -#include -#include -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" - -// Returns the pin mode. This value returned by this macro should be one of: -// GPIO_MODE_INPUT, GPIO_MODE_OUTPUT_PP, GPIO_MODE_OUTPUT_OD, -// GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG. - -uint32_t pin_get_mode(const pin_obj_t *pin) { - if (pin->gpio == NULL) { - // Analog only pin - return GPIO_MODE_ANALOG; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin); - uint32_t pcr = *port_pcr; - uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8; - if (af == 0) { - return GPIO_MODE_ANALOG; - } - if (af == 1) { - if (pin->gpio->PDDR & (1 << pin->pin)) { - if (pcr & PORT_PCR_ODE) { - return GPIO_MODE_OUTPUT_OD; - } - return GPIO_MODE_OUTPUT_PP; - } - return GPIO_MODE_INPUT; - } - - if (pcr & PORT_PCR_ODE) { - return GPIO_MODE_AF_OD; - } - return GPIO_MODE_AF_PP; -} - -// Returns the pin pullup/pulldown. The value returned by this macro should -// be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN. - -uint32_t pin_get_pull(const pin_obj_t *pin) { - if (pin->gpio == NULL) { - // Analog only pin - return GPIO_NOPULL; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin); - - uint32_t pcr = *port_pcr; - uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8; - - // pull is only valid for digital modes (hence the af > 0 test) - - if (af > 0 && (pcr & PORT_PCR_PE) != 0) { - if (pcr & PORT_PCR_PS) { - return GPIO_PULLUP; - } - return GPIO_PULLDOWN; - } - return GPIO_NOPULL; -} - -// Returns the af (alternate function) index currently set for a pin. - -uint32_t pin_get_af(const pin_obj_t *pin) { - if (pin->gpio == NULL) { - // Analog only pin - return 0; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin); - return (*port_pcr & PORT_PCR_MUX_MASK) >> 8; -} diff --git a/ports/teensy/pin_defs_teensy.h b/ports/teensy/pin_defs_teensy.h deleted file mode 100644 index d3a700be21..0000000000 --- a/ports/teensy/pin_defs_teensy.h +++ /dev/null @@ -1,43 +0,0 @@ -enum { - PORT_A, - PORT_B, - PORT_C, - PORT_D, - PORT_E, - PORT_Z, -}; - -enum { - AF_FN_FTM, - AF_FN_I2C, - AF_FN_UART, - AF_FN_SPI -}; - -enum { - AF_PIN_TYPE_FTM_CH0 = 0, - AF_PIN_TYPE_FTM_CH1, - AF_PIN_TYPE_FTM_CH2, - AF_PIN_TYPE_FTM_CH3, - AF_PIN_TYPE_FTM_CH4, - AF_PIN_TYPE_FTM_CH5, - AF_PIN_TYPE_FTM_CH6, - AF_PIN_TYPE_FTM_CH7, - AF_PIN_TYPE_FTM_QD_PHA, - AF_PIN_TYPE_FTM_QD_PHB, - - AF_PIN_TYPE_I2C_SDA = 0, - AF_PIN_TYPE_I2C_SCL, - - AF_PIN_TYPE_SPI_MOSI = 0, - AF_PIN_TYPE_SPI_MISO, - AF_PIN_TYPE_SPI_SCK, - AF_PIN_TYPE_SPI_NSS, - - AF_PIN_TYPE_UART_TX = 0, - AF_PIN_TYPE_UART_RX, - AF_PIN_TYPE_UART_CTS, - AF_PIN_TYPE_UART_RTS, -}; - -typedef GPIO_TypeDef pin_gpio_t; diff --git a/ports/teensy/qstrdefsport.h b/ports/teensy/qstrdefsport.h deleted file mode 100644 index 3ba897069b..0000000000 --- a/ports/teensy/qstrdefsport.h +++ /dev/null @@ -1 +0,0 @@ -// qstrs specific to this port diff --git a/ports/teensy/reg.c b/ports/teensy/reg.c deleted file mode 100644 index cbc427d876..0000000000 --- a/ports/teensy/reg.c +++ /dev/null @@ -1,47 +0,0 @@ -#include -#include -#include "py/runtime.h" -#include "reg.h" - -#if MICROPY_REG - -mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_regs, uint n_args, const mp_obj_t *args) { - if (n_args == 0) { - // dump all regs - - for (mp_uint_t reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) { - printf(" %-8s @0x%08x = 0x%08lx\n", - reg->name, (mp_uint_t)base + reg->offset, *(uint32_t *)((uint8_t *)base + reg->offset)); - } - return mp_const_none; - } - - mp_uint_t addr = 0; - - if (MP_OBJ_IS_STR(args[0])) { - const char *name = mp_obj_str_get_str(args[0]); - mp_uint_t reg_idx; - for (reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) { - if (strcmp(name, reg->name) == 0) { - break; - } - } - if (reg_idx >= num_regs) { - printf("Unknown register: '%s'\n", name); - return mp_const_none; - } - addr = (mp_uint_t)base + reg->offset; - } else { - addr = (mp_uint_t)base + mp_obj_get_int(args[0]); - } - - if (n_args < 2) { - // get - printf("0x%08lx\n", *(uint32_t *)addr); - } else { - *(uint32_t *)addr = mp_obj_get_int(args[1]); - } - return mp_const_none; -} - -#endif diff --git a/ports/teensy/reg.h b/ports/teensy/reg.h deleted file mode 100644 index 0da6378ee7..0000000000 --- a/ports/teensy/reg.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_REG_H -#define MICROPY_INCLUDED_TEENSY_REG_H - -typedef struct { - const char *name; - mp_uint_t offset; -} reg_t; - -#define REG_ENTRY(st, name) { #name, offsetof(st, name) } - -mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_reg, uint n_args, const mp_obj_t *args); - -#endif // MICROPY_INCLUDED_TEENSY_REG_H diff --git a/ports/teensy/servo.c b/ports/teensy/servo.c deleted file mode 100644 index 262daaeb66..0000000000 --- a/ports/teensy/servo.c +++ /dev/null @@ -1,265 +0,0 @@ -#include -#include "misc.h" -#include "mpconfig.h" -#include "qstr.h" -#include "nlr.h" -#include "obj.h" -#include "servo.h" - -#include "Arduino.h" - -#define MAX_SERVOS 12 -#define INVALID_SERVO -1 - -#define MIN_PULSE_WIDTH 544 // the shortest pulse sent to a servo -#define MAX_PULSE_WIDTH 2400 // the longest pulse sent to a servo -#define DEFAULT_PULSE_WIDTH 1500 // default pulse width when servo is attached -#define REFRESH_INTERVAL 20000 // minumim time to refresh servos in microseconds - -#define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_PDBIE \ - | PDB_SC_CONT | PDB_SC_PRESCALER(2) | PDB_SC_MULT(0)) -#define PDB_PRESCALE 4 -#define usToTicks(us) ((us) * (F_BUS / 1000) / PDB_PRESCALE / 1000) -#define ticksToUs(ticks) ((ticks) * PDB_PRESCALE * 1000 / (F_BUS / 1000)) - -static uint16_t servo_active_mask = 0; -static uint16_t servo_allocated_mask = 0; -static uint8_t servo_pin[MAX_SERVOS]; -static uint16_t servo_ticks[MAX_SERVOS]; - -typedef struct _pyb_servo_obj_t { - mp_obj_base_t base; - uint servo_id; - uint min_usecs; - uint max_usecs; -} pyb_servo_obj_t; - -#define clamp(v, min_val, max_val) ((v) < (min_val) ? (min_val) : (v) > (max_val) ? (max_val) : (v)) - -static float map_uint_to_float(uint x, uint in_min, uint in_max, float out_min, float out_max) -{ - return (float)(x - in_min) * (out_max - out_min) / (float)(in_max - in_min) + (float)out_min; -} - -static uint map_float_to_uint(float x, float in_min, float in_max, uint out_min, uint out_max) -{ - return (int)((x - in_min) * (float)(out_max - out_min) / (in_max - in_min) + (float)out_min); -} - -static mp_obj_t servo_obj_attach(mp_obj_t self_in, mp_obj_t pin_obj) { - pyb_servo_obj_t *self = self_in; - uint pin = mp_obj_get_int(pin_obj); - if (pin > CORE_NUM_DIGITAL) { - goto pin_error; - } - - pinMode(pin, OUTPUT); - servo_pin[self->servo_id] = pin; - servo_active_mask |= (1 << self->servo_id); - if (!(SIM_SCGC6 & SIM_SCGC6_PDB)) { - SIM_SCGC6 |= SIM_SCGC6_PDB; // TODO: use bitband for atomic bitset - PDB0_MOD = 0xFFFF; - PDB0_CNT = 0; - PDB0_IDLY = 0; - PDB0_SC = PDB_CONFIG; - // TODO: maybe this should be a higher priority than most - // other interrupts (init all to some default?) - PDB0_SC = PDB_CONFIG | PDB_SC_SWTRIG; - } - NVIC_ENABLE_IRQ(IRQ_PDB); - return mp_const_none; - -pin_error: - nlr_raise(mp_obj_new_exception_msg_varg(MP_QSTR_ValueError, "pin %d does not exist", pin)); -} - -static mp_obj_t servo_obj_detach(mp_obj_t self_in) { - //pyb_servo_obj_t *self = self_in; - return mp_const_none; -} - -static mp_obj_t servo_obj_pin(mp_obj_t self_in) { - pyb_servo_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(servo_pin[self->servo_id]); -} - -static mp_obj_t servo_obj_min_usecs(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get min - return MP_OBJ_NEW_SMALL_INT(self->min_usecs); - } - // Set min - self->min_usecs = mp_obj_get_int(args[1]); - return mp_const_none; -} - -static mp_obj_t servo_obj_max_usecs(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get max - return MP_OBJ_NEW_SMALL_INT(self->max_usecs); - } - // Set max - self->max_usecs = mp_obj_get_int(args[1]); - return mp_const_none; -} - -static mp_obj_t servo_obj_angle(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get - float angle = map_uint_to_float(servo_ticks[self->servo_id], - usToTicks(self->min_usecs), - usToTicks(self->max_usecs), - 0.0, 180.0); - return mp_obj_new_float(angle); - } - // Set - float angle = mp_obj_get_float(args[1]); - if (angle < 0.0F) { - angle = 0.0F; - } - if (angle > 180.0F) { - angle = 180.0F; - } - servo_ticks[self->servo_id] = map_float_to_uint(angle, - 0.0F, 180.0F, - usToTicks(self->min_usecs), - usToTicks(self->max_usecs)); - return mp_const_none; -} - -static mp_obj_t servo_obj_usecs(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - uint usecs; - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(ticksToUs(servo_ticks[self->servo_id])); - } - // Set - usecs = mp_obj_get_int(args[1]); - - if (self->min_usecs < self->max_usecs) { - usecs = clamp(usecs, self->min_usecs, self->max_usecs); - } else { - usecs = clamp(usecs, self->max_usecs, self->min_usecs); - } - servo_ticks[self->servo_id] = usToTicks(usecs); - return mp_const_none; -} - -static mp_obj_t servo_obj_attached(mp_obj_t self_in) { - pyb_servo_obj_t *self = self_in; - uint attached = (servo_active_mask & (1 << self->servo_id)) != 0; - return MP_OBJ_NEW_SMALL_INT(attached); -} - -static void servo_obj_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_servo_obj_t *self = self_in; - (void)kind; - print(env, "", self->servo_id); -} - -static MP_DEFINE_CONST_FUN_OBJ_2(servo_obj_attach_obj, servo_obj_attach); -static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_detach_obj, servo_obj_detach); -static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_pin_obj, servo_obj_pin); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_min_usecs_obj, 1, 2, servo_obj_min_usecs); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_max_usecs_obj, 1, 2, servo_obj_max_usecs); -static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_attached_obj, servo_obj_attached); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_angle_obj, 1, 2, servo_obj_angle); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_usecs_obj, 1, 2, servo_obj_usecs); - -static const mp_method_t servo_methods[] = { - { "attach", &servo_obj_attach_obj }, - { "detach", &servo_obj_detach_obj }, - { "pin", &servo_obj_pin_obj }, - { "min_usecs", &servo_obj_min_usecs_obj }, - { "max_usecs", &servo_obj_max_usecs_obj }, - { "attached", &servo_obj_attached_obj }, - { "angle", &servo_obj_angle_obj }, - { "usecs", &servo_obj_usecs_obj }, - { NULL, NULL }, -}; - -/* - * Notes: - * - * ISR needs to know pin #, ticks - */ - -static const mp_obj_type_t servo_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_Servo, - .print = servo_obj_print, - .methods = servo_methods, -}; - -/* servo = pyb.Servo(pin, [min_uecs, [max_usecs]]) */ - -mp_obj_t pyb_Servo(void) { - uint16_t mask; - pyb_servo_obj_t *self = m_new_obj(pyb_servo_obj_t); - self->base.type = &servo_obj_type; - self->min_usecs = MIN_PULSE_WIDTH; - self->max_usecs = MAX_PULSE_WIDTH; - - /* Find an unallocated servo id */ - - self->servo_id = 0; - for (mask=1; mask < (1<servo_id] = usToTicks(DEFAULT_PULSE_WIDTH); - return self; - } - self->servo_id++; - } - m_del_obj(pyb_servo_obj_t, self); - mp_raise_ValueError("No available servo ids"); - return mp_const_none; -} - -void pdb_isr(void) -{ - static int8_t channel = 0, channel_high = MAX_SERVOS; - static uint32_t tick_accum = 0; - uint32_t ticks; - int32_t wait_ticks; - - // first, if any channel was left high from the previous - // run, now is the time to shut it off - if (servo_active_mask & (1 << channel_high)) { - digitalWrite(servo_pin[channel_high], LOW); - channel_high = MAX_SERVOS; - } - // search for the next channel to turn on - while (channel < MAX_SERVOS) { - if (servo_active_mask & (1 << channel)) { - digitalWrite(servo_pin[channel], HIGH); - channel_high = channel; - ticks = servo_ticks[channel]; - tick_accum += ticks; - PDB0_IDLY += ticks; - PDB0_SC = PDB_CONFIG | PDB_SC_LDOK; - channel++; - return; - } - channel++; - } - // when all channels have output, wait for the - // minimum refresh interval - wait_ticks = usToTicks(REFRESH_INTERVAL) - tick_accum; - if (wait_ticks < usToTicks(100)) wait_ticks = usToTicks(100); - else if (wait_ticks > 60000) wait_ticks = 60000; - tick_accum += wait_ticks; - PDB0_IDLY += wait_ticks; - PDB0_SC = PDB_CONFIG | PDB_SC_LDOK; - // if this wait is enough to satisfy the refresh - // interval, next time begin again at channel zero - if (tick_accum >= usToTicks(REFRESH_INTERVAL)) { - tick_accum = 0; - channel = 0; - } -} diff --git a/ports/teensy/servo.h b/ports/teensy/servo.h deleted file mode 100644 index 1ad34353d9..0000000000 --- a/ports/teensy/servo.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_SERVO_H -#define MICROPY_INCLUDED_TEENSY_SERVO_H - -void servo_init(void); - -extern const mp_obj_type_t pyb_servo_type; - -MP_DECLARE_CONST_FUN_OBJ_2(pyb_servo_set_obj); -MP_DECLARE_CONST_FUN_OBJ_2(pyb_pwm_set_obj); - -#endif // MICROPY_INCLUDED_TEENSY_SERVO_H diff --git a/ports/teensy/std.h b/ports/teensy/std.h deleted file mode 100644 index ef55d22ddc..0000000000 --- a/ports/teensy/std.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_STD_H -#define MICROPY_INCLUDED_TEENSY_STD_H - -typedef unsigned int size_t; - -void __assert_func(void); - -void *malloc(size_t n); -void free(void *ptr); -void *realloc(void *ptr, size_t n); - -void *memcpy(void *dest, const void *src, size_t n); -void *memmove(void *dest, const void *src, size_t n); -void *memset(void *s, int c, size_t n); - -size_t strlen(const char *str); -int strcmp(const char *s1, const char *s2); -int strncmp(const char *s1, const char *s2, size_t n); -char *strcpy(char *dest, const char *src); -char *strcat(char *dest, const char *src); - -int printf(const char *fmt, ...); -int snprintf(char *str, size_t size, const char *fmt, ...); - -#endif // MICROPY_INCLUDED_TEENSY_STD_H diff --git a/ports/teensy/teensy_hal.c b/ports/teensy/teensy_hal.c deleted file mode 100644 index 7ce82f1d2a..0000000000 --- a/ports/teensy/teensy_hal.c +++ /dev/null @@ -1,65 +0,0 @@ -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "usb.h" -#include "uart.h" -#include "Arduino.h" - -mp_uint_t mp_hal_ticks_ms(void) { - return millis(); -} - -void mp_hal_delay_ms(mp_uint_t ms) { - delay(ms); -} - -void mp_hal_set_interrupt_char(int c) { - // The teensy 3.1 usb stack doesn't currently have the notion of generating - // an exception when a certain character is received. That just means that - // you can't press Control-C and get your python script to stop. -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - byte c; - if (usb_vcp_recv_byte(&c) != 0) { - return c; - } else if (MP_STATE_PORT(pyb_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(pyb_stdio_uart))) { - return uart_rx_char(MP_STATE_PORT(pyb_stdio_uart)); - } - __WFI(); - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len); - } - if (usb_vcp_is_enabled()) { - usb_vcp_send_strn(str, len); - } -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - // send stdout to UART and USB CDC VCP - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len); - uart_tx_strn_cooked(MP_STATE_PORT(pyb_stdio_uart), str, len); - } - if (usb_vcp_is_enabled()) { - usb_vcp_send_strn_cooked(str, len); - } -} - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio) { -} - -void extint_register_pin(const void *pin, uint32_t mode, int hard_irq, mp_obj_t callback_obj) { - mp_raise_NotImplementedError(NULL); -} diff --git a/ports/teensy/teensy_hal.h b/ports/teensy/teensy_hal.h deleted file mode 100644 index aef38a2ad9..0000000000 --- a/ports/teensy/teensy_hal.h +++ /dev/null @@ -1,128 +0,0 @@ -#include -#include "hal_ftm.h" - -#ifdef USE_FULL_ASSERT - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#define HAL_NVIC_EnableIRQ(irq) NVIC_ENABLE_IRQ(irq) - -#define GPIOA ((GPIO_TypeDef *)&GPIOA_PDOR) -#define GPIOB ((GPIO_TypeDef *)&GPIOB_PDOR) -#define GPIOC ((GPIO_TypeDef *)&GPIOC_PDOR) -#define GPIOD ((GPIO_TypeDef *)&GPIOD_PDOR) -#define GPIOE ((GPIO_TypeDef *)&GPIOE_PDOR) -#define GPIOZ ((GPIO_TypeDef *)NULL) - -#define I2C0 ((I2C_TypeDef *)0x40066000) -#define I2C1 ((I2C_TypeDef *)0x40067000) - -#undef SPI0 -#define SPI0 ((SPI_TypeDef *)0x4002C000) -#define SPI1 ((SPI_TypeDef *)0x4002D000) - -#define UART0 ((UART_TypeDef *)&UART0_BDH) -#define UART1 ((UART_TypeDef *)&UART1_BDH) -#define UART2 ((UART_TypeDef *)&UART2_BDH) - -typedef struct { - uint32_t dummy; -} I2C_TypeDef; - -typedef struct { - uint32_t dummy; -} UART_TypeDef; - -typedef struct { - uint32_t dummy; -} SPI_TypeDef; - -typedef struct { - volatile uint32_t PDOR; // Output register - volatile uint32_t PSOR; // Set output register - volatile uint32_t PCOR; // Clear output register - volatile uint32_t PTOR; // Toggle output register - volatile uint32_t PDIR; // Data Input register - volatile uint32_t PDDR; // Data Direction register -} GPIO_TypeDef; - -#define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) // Indicates OD - -#define GPIO_MODE_INPUT ((uint32_t)0x00000000) -#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) -#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) -#define GPIO_MODE_AF_PP ((uint32_t)0x00000002) -#define GPIO_MODE_AF_OD ((uint32_t)0x00000012) -#define GPIO_MODE_ANALOG ((uint32_t)0x00000003) -#define GPIO_MODE_IT_RISING ((uint32_t)1) -#define GPIO_MODE_IT_FALLING ((uint32_t)2) - -#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ - ((MODE) == GPIO_MODE_OUTPUT_PP) ||\ - ((MODE) == GPIO_MODE_OUTPUT_OD) ||\ - ((MODE) == GPIO_MODE_AF_PP) ||\ - ((MODE) == GPIO_MODE_AF_OD) ||\ - ((MODE) == GPIO_MODE_ANALOG)) - -#define GPIO_NOPULL ((uint32_t)0) -#define GPIO_PULLUP ((uint32_t)1) -#define GPIO_PULLDOWN ((uint32_t)2) - -#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \ - ((PULL) == GPIO_PULLDOWN)) - -#define GPIO_SPEED_FREQ_LOW ((uint32_t)0) -#define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)1) -#define GPIO_SPEED_FREQ_HIGH ((uint32_t)2) -#define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)3) - -#define IS_GPIO_AF(af) ((af) >= 0 && (af) <= 7) - -typedef struct { - uint32_t Pin; - uint32_t Mode; - uint32_t Pull; - uint32_t Speed; - uint32_t Alternate; -} GPIO_InitTypeDef; - -#define GPIO_PORT_TO_PORT_NUM(GPIOx) \ - ((&GPIOx->PDOR - &GPIOA_PDOR) / (&GPIOB_PDOR - &GPIOA_PDOR)) - -#define GPIO_PIN_TO_PORT_PCR(GPIOx, pin) \ - (&PORTA_PCR0 + (GPIO_PORT_TO_PORT_NUM(GPIOx) * 0x400) + (pin)) - -#define GPIO_AF2_I2C0 2 -#define GPIO_AF2_I2C1 2 -#define GPIO_AF2_SPI0 2 -#define GPIO_AF3_FTM0 3 -#define GPIO_AF3_FTM1 3 -#define GPIO_AF3_FTM2 3 -#define GPIO_AF3_UART0 3 -#define GPIO_AF3_UART1 3 -#define GPIO_AF3_UART2 3 -#define GPIO_AF4_FTM0 4 -#define GPIO_AF6_FTM1 6 -#define GPIO_AF6_FTM2 6 -#define GPIO_AF6_I2C1 6 -#define GPIO_AF7_FTM1 7 - -__attribute__(( always_inline )) static inline void __WFI(void) { - __asm volatile ("wfi"); -} - -void mp_hal_set_interrupt_char(int c); - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio); - -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *init); - -struct _pin_obj_t; -#define mp_hal_pin_obj_t const struct _pin_obj_t* -#define mp_hal_pin_high(p) (((p)->gpio->PSOR) = (p)->pin_mask) -#define mp_hal_pin_low(p) (((p)->gpio->PCOR) = (p)->pin_mask) -#define mp_hal_pin_read(p) (((p)->gpio->PDIR >> (p)->pin) & 1) -#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) diff --git a/ports/teensy/teensy_pins.csv b/ports/teensy/teensy_pins.csv deleted file mode 100644 index 10887e2120..0000000000 --- a/ports/teensy/teensy_pins.csv +++ /dev/null @@ -1,56 +0,0 @@ -D0,PTB16 -D1,PTB17 -D2,PTD0 -D3,PTA12 -D4,PTA13 -D5,PTD7 -D6,PTD4 -D7,PTD2 -D8,PTD3 -D9,PTC3 -D10,PTC4 -D11,PTC6 -D12,PTC7 -D13,PTC5 -D14,PTD1 -D15,PTC0 -D16,PTB0 -D17,PTB1 -D18,PTB3 -D19,PTB2 -D20,PTD5 -D21,PTD6 -D22,PTC1 -D23,PTC2 -D24,PTA5 -D25,PTB19 -D26,PTE1 -D27,PTC9 -D28,PTC8 -D29,PTC10 -D30,PTC11 -D31,PTE0 -D32,PTB18 -D33,PTA4 -A0,PTD1 -A1,PTC0 -A2,PTB0 -A3,PTB1 -A4,PTB3 -A5,PTB2 -A6,PTD5 -A7,PTD6 -A8,PTC1 -A9,PTC2 -A10,PTZ0 -A11,PTZ1 -A12,PTZ2 -A13,PTZ3 -A14,PTZ5 -A15,PTE1 -A16,PTC9 -A17,PTC8 -A18,PTC10 -A19,PTC11 -A20,PTE0 -LED,PTC5 diff --git a/ports/teensy/timer.c b/ports/teensy/timer.c deleted file mode 100644 index b823e6c3b9..0000000000 --- a/ports/teensy/timer.c +++ /dev/null @@ -1,991 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "pin.h" -#include "reg.h" -#include "timer.h" - -typedef enum { - CHANNEL_MODE_PWM_NORMAL, - CHANNEL_MODE_PWM_INVERTED, - CHANNEL_MODE_OC_TIMING, - CHANNEL_MODE_OC_ACTIVE, - CHANNEL_MODE_OC_INACTIVE, - CHANNEL_MODE_OC_TOGGLE, -// CHANNEL_MODE_OC_FORCED_ACTIVE, -// CHANNEL_MODE_OC_FORCED_INACTIVE, - CHANNEL_MODE_IC, -} pyb_channel_mode; - -STATIC const struct { - qstr name; - uint32_t oc_mode; -} channel_mode_info[] = { - { MP_QSTR_PWM, FTM_OCMODE_PWM1 }, - { MP_QSTR_PWM_INVERTED, FTM_OCMODE_PWM2 }, - { MP_QSTR_OC_TIMING, FTM_OCMODE_TIMING }, - { MP_QSTR_OC_ACTIVE, FTM_OCMODE_ACTIVE }, - { MP_QSTR_OC_INACTIVE, FTM_OCMODE_INACTIVE }, - { MP_QSTR_OC_TOGGLE, FTM_OCMODE_TOGGLE }, -// { MP_QSTR_OC_FORCED_ACTIVE, FTM_OCMODE_FORCED_ACTIVE }, -// { MP_QSTR_OC_FORCED_INACTIVE, FTM_OCMODE_FORCED_INACTIVE }, - { MP_QSTR_IC, 0 }, -}; - -struct _pyb_timer_obj_t; - -typedef struct _pyb_timer_channel_obj_t { - mp_obj_base_t base; - struct _pyb_timer_obj_t *timer; - uint8_t channel; - uint8_t mode; - mp_obj_t callback; - struct _pyb_timer_channel_obj_t *next; -} pyb_timer_channel_obj_t; - -typedef struct _pyb_timer_obj_t { - mp_obj_base_t base; - uint8_t tim_id; - uint8_t irqn; - mp_obj_t callback; - FTM_HandleTypeDef ftm; - pyb_timer_channel_obj_t *channel; -} pyb_timer_obj_t; - -// Used to do callbacks to Python code on interrupt -STATIC pyb_timer_obj_t *pyb_timer_obj_all[3]; -#define PYB_TIMER_OBJ_ALL_NUM MP_ARRAY_SIZE(pyb_timer_obj_all) - -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in); -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback); -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback); - -void timer_init0(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - pyb_timer_obj_all[i] = NULL; - } -} - -// unregister all interrupt sources -void timer_deinit(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - pyb_timer_obj_t *tim = pyb_timer_obj_all[i]; - if (tim != NULL) { - pyb_timer_deinit(tim); - } - } -} - -mp_uint_t get_prescaler_shift(mp_int_t prescaler) { - mp_uint_t prescaler_shift; - for (prescaler_shift = 0; prescaler_shift < 8; prescaler_shift++) { - if (prescaler == (1 << prescaler_shift)) { - return prescaler_shift; - } - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "prescaler must be a power of 2 between 1 and 128, not %d", prescaler)); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC const mp_obj_type_t pyb_timer_channel_type; - -// Helper function for determining the period used for calculating percent -STATIC uint32_t compute_period(pyb_timer_obj_t *self) { - // In center mode, compare == period corresponds to 100% - // In edge mode, compare == (period + 1) corresponds to 100% - FTM_TypeDef *FTMx = self->ftm.Instance; - uint32_t period = (FTMx->MOD & 0xffff); - if ((FTMx->SC & FTM_SC_CPWMS) == 0) { - // Edge mode - period++; - } - return period; -} - -// Helper function to compute PWM value from timer period and percent value. -// 'val' can be an int or a float between 0 and 100 (out of range values are -// clamped). -STATIC uint32_t compute_pwm_value_from_percent(uint32_t period, mp_obj_t percent_in) { - uint32_t cmp; - if (0) { - #if MICROPY_PY_BUILTINS_FLOAT - } else if (MP_OBJ_IS_TYPE(percent_in, &mp_type_float)) { - float percent = mp_obj_get_float(percent_in); - if (percent <= 0.0) { - cmp = 0; - } else if (percent >= 100.0) { - cmp = period; - } else { - cmp = percent / 100.0 * ((float)period); - } - #endif - } else { - mp_int_t percent = mp_obj_get_int(percent_in); - if (percent <= 0) { - cmp = 0; - } else if (percent >= 100) { - cmp = period; - } else { - cmp = ((uint32_t)percent * period) / 100; - } - } - return cmp; -} - -// Helper function to compute percentage from timer perion and PWM value. -STATIC mp_obj_t compute_percent_from_pwm_value(uint32_t period, uint32_t cmp) { - #if MICROPY_PY_BUILTINS_FLOAT - float percent = (float)cmp * 100.0 / (float)period; - if (cmp >= period) { - percent = 100.0; - } else { - percent = (float)cmp * 100.0 / (float)period; - } - return mp_obj_new_float(percent); - #else - mp_int_t percent; - if (cmp >= period) { - percent = 100; - } else { - percent = cmp * 100 / period; - } - return mp_obj_new_int(percent); - #endif -} - -STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_obj_t *self = self_in; - - if (self->ftm.State == HAL_FTM_STATE_RESET) { - mp_printf(print, "Timer(%u)", self->tim_id); - } else { - mp_printf(print, "Timer(%u, prescaler=%u, period=%u, mode=%s)", - self->tim_id, - 1 << (self->ftm.Instance->SC & 7), - self->ftm.Instance->MOD & 0xffff, - self->ftm.Init.CounterMode == FTM_COUNTERMODE_UP ? "UP" : "CENTER"); - } -} - -/// \method init(*, freq, prescaler, period) -/// Initialise the timer. Initialisation must be either by frequency (in Hz) -/// or by prescaler and period: -/// -/// tim.init(freq=100) # set the timer to trigger at 100Hz -/// tim.init(prescaler=83, period=999) # set the prescaler and period directly -/// -/// Keyword arguments: -/// -/// - `freq` - specifies the periodic frequency of the timer. You migh also -/// view this as the frequency with which the timer goes through -/// one complete cycle. -/// -/// - `prescaler` 1, 2, 4, 8 16 32, 64 or 128 - specifies the value to be loaded into the -/// timer's prescaler. The timer clock source is divided by -/// (`prescaler`) to arrive at the timer clock. -/// -/// - `period` [0-0xffff] - Specifies the value to be loaded into the timer's -/// Modulo Register (MOD). This determines the period of the timer (i.e. -/// when the counter cycles). The timer counter will roll-over after -/// `period` timer clock cycles. In center mode, a compare register > 0x7fff -/// doesn't seem to work properly, so keep this in mind. -/// -/// - `mode` can be one of: -/// - `Timer.UP` - configures the timer to count from 0 to MOD (default) -/// - `Timer.CENTER` - confgures the timer to count from 0 to MOD and -/// then back down to 0. -/// -/// - `callback` - as per Timer.callback() -/// -/// You must either specify freq or both of period and prescaler. -STATIC const mp_arg_t pyb_timer_init_args[] = { - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = FTM_COUNTERMODE_UP} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, -}; -#define PYB_TIMER_INIT_NUM_ARGS MP_ARRAY_SIZE(pyb_timer_init_args) - -STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *self, uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t vals[PYB_TIMER_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args, args, kw_args, PYB_TIMER_INIT_NUM_ARGS, pyb_timer_init_args, vals); - - FTM_HandleTypeDef *ftm = &self->ftm; - - // set the TIM configuration values - FTM_Base_InitTypeDef *init = &ftm->Init; - - if (vals[0].u_int != 0xffffffff) { - // set prescaler and period from frequency - - if (vals[0].u_int == 0) { - mp_raise_ValueError("can't have 0 frequency"); - } - - uint32_t period = MAX(1, F_BUS / vals[0].u_int); - uint32_t prescaler_shift = 0; - while (period > 0xffff && prescaler_shift < 7) { - period >>= 1; - prescaler_shift++; - } - if (period > 0xffff) { - period = 0xffff; - } - init->PrescalerShift = prescaler_shift; - init->Period = period; - } else if (vals[1].u_int != 0xffffffff && vals[2].u_int != 0xffffffff) { - // set prescaler and period directly - init->PrescalerShift = get_prescaler_shift(vals[1].u_int); - init->Period = vals[2].u_int; - if (!IS_FTM_PERIOD(init->Period)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "period must be between 0 and 65535, not %d", init->Period)); - } - } else { - mp_raise_TypeError("must specify either freq, or prescaler and period"); - } - - init->CounterMode = vals[3].u_int; - if (!IS_FTM_COUNTERMODE(init->CounterMode)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "invalid counter mode: %d", init->CounterMode)); - } - - // Currently core/mk20dx128.c sets SIM_SCGC6_FTM0, SIM_SCGC6_FTM1, SIM_SCGC3_FTM2 - // so we don't need to do it here. - - NVIC_SET_PRIORITY(self->irqn, 0xe); // next-to lowest priority - - HAL_FTM_Base_Init(ftm); - if (vals[4].u_obj == mp_const_none) { - HAL_FTM_Base_Start(ftm); - } else { - pyb_timer_callback(self, vals[4].u_obj); - } - - return mp_const_none; -} - -/// \classmethod \constructor(id, ...) -/// Construct a new timer object of the given id. If additional -/// arguments are given, then the timer is initialised by `init(...)`. -/// `id` can be 1 to 14, excluding 3. -STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // create new Timer object - pyb_timer_obj_t *tim = m_new_obj(pyb_timer_obj_t); - memset(tim, 0, sizeof(*tim)); - - tim->base.type = &pyb_timer_type; - tim->callback = mp_const_none; - tim->channel = NULL; - - // get FTM number - tim->tim_id = mp_obj_get_int(args[0]); - - switch (tim->tim_id) { - case 0: tim->ftm.Instance = FTM0; tim->irqn = IRQ_FTM0; break; - case 1: tim->ftm.Instance = FTM1; tim->irqn = IRQ_FTM1; break; - case 2: tim->ftm.Instance = FTM2; tim->irqn = IRQ_FTM2; break; - default: nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Timer %d does not exist", tim->tim_id)); - } - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args); - } - - // set the global variable for interrupt callbacks - if (tim->tim_id < PYB_TIMER_OBJ_ALL_NUM) { - pyb_timer_obj_all[tim->tim_id] = tim; - } - - return (mp_obj_t)tim; -} - -STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init); - -/// \method deinit() -/// Deinitialises the timer. -/// -/// Disables the callback (and the associated irq). -/// Disables any channel callbacks (and the associated irq). -/// Stops the timer, and disables the timer peripheral. -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - - // Disable the base interrupt - pyb_timer_callback(self_in, mp_const_none); - - pyb_timer_channel_obj_t *chan = self->channel; - self->channel = NULL; - - // Disable the channel interrupts - while (chan != NULL) { - pyb_timer_channel_callback(chan, mp_const_none); - pyb_timer_channel_obj_t *prev_chan = chan; - chan = chan->next; - prev_chan->next = NULL; - } - - HAL_FTM_Base_DeInit(&self->ftm); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit); - -/// \method channel(channel, mode, ...) -/// -/// If only a channel number is passed, then a previously initialized channel -/// object is returned (or `None` if there is no previous channel). -/// -/// Othwerwise, a TimerChannel object is initialized and returned. -/// -/// Each channel can be configured to perform pwm, output compare, or -/// input capture. All channels share the same underlying timer, which means -/// that they share the same timer clock. -/// -/// Keyword arguments: -/// -/// - `mode` can be one of: -/// - `Timer.PWM` - configure the timer in PWM mode (active high). -/// - `Timer.PWM_INVERTED` - configure the timer in PWM mode (active low). -/// - `Timer.OC_TIMING` - indicates that no pin is driven. -/// - `Timer.OC_ACTIVE` - the pin will be made active when a compare -/// match occurs (active is determined by polarity) -/// - `Timer.OC_INACTIVE` - the pin will be made inactive when a compare -/// match occurs. -/// - `Timer.OC_TOGGLE` - the pin will be toggled when an compare match occurs. -/// - `Timer.IC` - configure the timer in Input Capture mode. -/// -/// - `callback` - as per TimerChannel.callback() -/// -/// - `pin` None (the default) or a Pin object. If specified (and not None) -/// this will cause the alternate function of the the indicated pin -/// to be configured for this timer channel. An error will be raised if -/// the pin doesn't support any alternate functions for this timer channel. -/// -/// Keyword arguments for Timer.PWM modes: -/// -/// - `pulse_width` - determines the initial pulse width value to use. -/// - `pulse_width_percent` - determines the initial pulse width percentage to use. -/// -/// Keyword arguments for Timer.OC modes: -/// -/// - `compare` - determines the initial value of the compare register. -/// -/// - `polarity` can be one of: -/// - `Timer.HIGH` - output is active high -/// - `Timer.LOW` - output is acive low -/// -/// Optional keyword arguments for Timer.IC modes: -/// -/// - `polarity` can be one of: -/// - `Timer.RISING` - captures on rising edge. -/// - `Timer.FALLING` - captures on falling edge. -/// - `Timer.BOTH` - captures on both edges. -/// -/// PWM Example: -/// -/// timer = pyb.Timer(0, prescaler=128, period=37500, counter_mode=pyb.Timer.COUNTER_MODE_CENTER) -/// ch0 = t0.channel(0, pyb.Timer.PWM, pin=pyb.Pin.board.D22, pulse_width=(t0.period() + 1) // 4) -/// ch1 = t0.channel(1, pyb.Timer.PWM, pin=pyb.Pin.board.D23, pulse_width=(t0.period() + 1) // 2) -STATIC const mp_arg_t pyb_timer_channel_args[] = { - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pulse_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pulse_width_percent, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_compare, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, -}; -#define PYB_TIMER_CHANNEL_NUM_ARGS MP_ARRAY_SIZE(pyb_timer_channel_args) - -STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - pyb_timer_obj_t *self = args[0]; - mp_int_t channel = mp_obj_get_int(args[1]); - - if (channel < 0 || channel > 7) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid channel (%d)", channel)); - } - - pyb_timer_channel_obj_t *chan = self->channel; - pyb_timer_channel_obj_t *prev_chan = NULL; - - while (chan != NULL) { - if (chan->channel == channel) { - break; - } - prev_chan = chan; - chan = chan->next; - } - - // If only the channel number is given return the previously allocated - // channel (or None if no previous channel). - if (n_args == 2) { - if (chan) { - return chan; - } - return mp_const_none; - } - - // If there was already a channel, then remove it from the list. Note that - // the order we do things here is important so as to appear atomic to - // the IRQ handler. - if (chan) { - // Turn off any IRQ associated with the channel. - pyb_timer_channel_callback(chan, mp_const_none); - - // Unlink the channel from the list. - if (prev_chan) { - prev_chan->next = chan->next; - } - self->channel = chan->next; - chan->next = NULL; - } - - // Allocate and initialize a new channel - mp_arg_val_t vals[PYB_TIMER_CHANNEL_NUM_ARGS]; - mp_arg_parse_all(n_args - 3, args + 3, kw_args, PYB_TIMER_CHANNEL_NUM_ARGS, pyb_timer_channel_args, vals); - - chan = m_new_obj(pyb_timer_channel_obj_t); - memset(chan, 0, sizeof(*chan)); - chan->base.type = &pyb_timer_channel_type; - chan->timer = self; - chan->channel = channel; - chan->mode = mp_obj_get_int(args[2]); - chan->callback = vals[0].u_obj; - - mp_obj_t pin_obj = vals[1].u_obj; - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("pin argument needs to be be a Pin type"); - } - const pin_obj_t *pin = pin_obj; - const pin_af_obj_t *af = pin_find_af(pin, AF_FN_FTM, self->tim_id); - if (af == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %s doesn't have an af for TIM%d", qstr_str(pin->name), self->tim_id)); - } - // pin.init(mode=AF_PP, af=idx) - const mp_obj_t args[6] = { - (mp_obj_t)&pin_init_obj, - pin_obj, - MP_OBJ_NEW_QSTR(MP_QSTR_mode), MP_OBJ_NEW_SMALL_INT(GPIO_MODE_AF_PP), - MP_OBJ_NEW_QSTR(MP_QSTR_af), MP_OBJ_NEW_SMALL_INT(af->idx) - }; - mp_call_method_n_kw(0, 2, args); - } - - // Link the channel to the timer before we turn the channel on. - // Note that this needs to appear atomic to the IRQ handler (the write - // to self->channel is atomic, so we're good, but I thought I'd mention - // in case this was ever changed in the future). - chan->next = self->channel; - self->channel = chan; - - switch (chan->mode) { - - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: { - FTM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - if (vals[3].u_obj != mp_const_none) { - // pulse width ratio given - uint32_t period = compute_period(self); - oc_config.Pulse = compute_pwm_value_from_percent(period, vals[3].u_obj); - } else { - // use absolute pulse width value (defaults to 0 if nothing given) - oc_config.Pulse = vals[2].u_int; - } - oc_config.OCPolarity = FTM_OCPOLARITY_HIGH; - - HAL_FTM_PWM_ConfigChannel(&self->ftm, &oc_config, channel); - if (chan->callback == mp_const_none) { - HAL_FTM_PWM_Start(&self->ftm, channel); - } else { - HAL_FTM_PWM_Start_IT(&self->ftm, channel); - } - break; - } - - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: { - FTM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - oc_config.Pulse = vals[4].u_int; - oc_config.OCPolarity = vals[5].u_int; - if (oc_config.OCPolarity == 0xffffffff) { - oc_config.OCPolarity = FTM_OCPOLARITY_HIGH; - } - - if (!IS_FTM_OC_POLARITY(oc_config.OCPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid polarity (%d)", oc_config.OCPolarity)); - } - HAL_FTM_OC_ConfigChannel(&self->ftm, &oc_config, channel); - if (chan->callback == mp_const_none) { - HAL_FTM_OC_Start(&self->ftm, channel); - } else { - HAL_FTM_OC_Start_IT(&self->ftm, channel); - } - break; - } - - case CHANNEL_MODE_IC: { - FTM_IC_InitTypeDef ic_config; - - ic_config.ICPolarity = vals[5].u_int; - if (ic_config.ICPolarity == 0xffffffff) { - ic_config.ICPolarity = FTM_ICPOLARITY_RISING; - } - - if (!IS_FTM_IC_POLARITY(ic_config.ICPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid polarity (%d)", ic_config.ICPolarity)); - } - HAL_FTM_IC_ConfigChannel(&self->ftm, &ic_config, chan->channel); - if (chan->callback == mp_const_none) { - HAL_FTM_IC_Start(&self->ftm, channel); - } else { - HAL_FTM_IC_Start_IT(&self->ftm, channel); - } - break; - } - - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid mode (%d)", chan->mode)); - } - - return chan; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel); - -/// \method counter([value]) -/// Get or set the timer counter. -STATIC mp_obj_t pyb_timer_counter(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->ftm.Instance->CNT); - } - // set - In order to write to CNT we need to set CNTIN - self->ftm.Instance->CNTIN = mp_obj_get_int(args[1]); - self->ftm.Instance->CNT = 0; // write any value to load CNTIN into CNT - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_counter_obj, 1, 2, pyb_timer_counter); - -/// \method prescaler([value]) -/// Get or set the prescaler for the timer. -STATIC mp_obj_t pyb_timer_prescaler(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(1 << (self->ftm.Instance->SC & 7)); - } - - // set - mp_uint_t prescaler_shift = get_prescaler_shift(mp_obj_get_int(args[1])); - - mp_uint_t sc = self->ftm.Instance->SC; - sc &= ~7; - sc |= FTM_SC_PS(prescaler_shift); - self->ftm.Instance->SC = sc; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_prescaler_obj, 1, 2, pyb_timer_prescaler); - -/// \method period([value]) -/// Get or set the period of the timer. -STATIC mp_obj_t pyb_timer_period(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->ftm.Instance->MOD & 0xffff); - } - - // set - mp_int_t period = mp_obj_get_int(args[1]) & 0xffff; - self->ftm.Instance->CNT = 0; - self->ftm.Instance->MOD = period; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_period_obj, 1, 2, pyb_timer_period); - -/// \method callback(fun) -/// Set the function to be called when the timer triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_FTM_DISABLE_TOF_IT(&self->ftm); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - self->callback = callback; - HAL_NVIC_EnableIRQ(self->irqn); - // start timer, so that it interrupts on overflow - HAL_FTM_Base_Start_IT(&self->ftm); - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_callback_obj, pyb_timer_callback); - -#if MICROPY_TIMER_REG -reg_t timer_reg[] = { - REG_ENTRY(FTM_TypeDef, SC), - REG_ENTRY(FTM_TypeDef, CNT), - REG_ENTRY(FTM_TypeDef, MOD), - REG_ENTRY(FTM_TypeDef, CNTIN), - REG_ENTRY(FTM_TypeDef, STATUS), - REG_ENTRY(FTM_TypeDef, MODE), - REG_ENTRY(FTM_TypeDef, SYNC), - REG_ENTRY(FTM_TypeDef, OUTINIT), - REG_ENTRY(FTM_TypeDef, OUTMASK), - REG_ENTRY(FTM_TypeDef, COMBINE), - REG_ENTRY(FTM_TypeDef, DEADTIME), - REG_ENTRY(FTM_TypeDef, EXTTRIG), - REG_ENTRY(FTM_TypeDef, POL), - REG_ENTRY(FTM_TypeDef, FMS), - REG_ENTRY(FTM_TypeDef, FILTER), - REG_ENTRY(FTM_TypeDef, FLTCTRL), - REG_ENTRY(FTM_TypeDef, QDCTRL), - REG_ENTRY(FTM_TypeDef, CONF), - REG_ENTRY(FTM_TypeDef, FLTPOL), - REG_ENTRY(FTM_TypeDef, SYNCONF), - REG_ENTRY(FTM_TypeDef, INVCTRL), - REG_ENTRY(FTM_TypeDef, SWOCTRL), - REG_ENTRY(FTM_TypeDef, PWMLOAD), -}; - -mp_obj_t pyb_timer_reg(uint n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - return reg_cmd(self->ftm.Instance, timer_reg, MP_ARRAY_SIZE(timer_reg), n_args - 1, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_reg_obj, 1, 3, pyb_timer_reg); -#endif // MICROPY_TIMER_REG - -STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_counter), MP_ROM_PTR(&pyb_timer_counter_obj) }, - { MP_ROM_QSTR(MP_QSTR_prescaler), MP_ROM_PTR(&pyb_timer_prescaler_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_callback_obj) }, -#if MICROPY_TIMER_REG - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pyb_timer_reg_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_INT(FTM_COUNTERMODE_UP) }, - { MP_ROM_QSTR(MP_QSTR_CENTER), MP_ROM_INT(FTM_COUNTERMODE_CENTER) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_INT(CHANNEL_MODE_PWM_NORMAL) }, - { MP_ROM_QSTR(MP_QSTR_PWM_INVERTED), MP_ROM_INT(CHANNEL_MODE_PWM_INVERTED) }, - { MP_ROM_QSTR(MP_QSTR_OC_TIMING), MP_ROM_INT(CHANNEL_MODE_OC_TIMING) }, - { MP_ROM_QSTR(MP_QSTR_OC_ACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_INACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_INACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_TOGGLE), MP_ROM_INT(CHANNEL_MODE_OC_TOGGLE) }, - { MP_ROM_QSTR(MP_QSTR_IC), MP_ROM_INT(CHANNEL_MODE_IC) }, - { MP_ROM_QSTR(MP_QSTR_HIGH), MP_ROM_INT(FTM_OCPOLARITY_HIGH) }, - { MP_ROM_QSTR(MP_QSTR_LOW), MP_ROM_INT(FTM_OCPOLARITY_LOW) }, - { MP_ROM_QSTR(MP_QSTR_RISING), MP_ROM_INT(FTM_ICPOLARITY_RISING) }, - { MP_ROM_QSTR(MP_QSTR_FALLING), MP_ROM_INT(FTM_ICPOLARITY_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_BOTH), MP_ROM_INT(FTM_ICPOLARITY_BOTH) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table); - -const mp_obj_type_t pyb_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = pyb_timer_print, - .make_new = pyb_timer_make_new, - .locals_dict = (mp_obj_t)&pyb_timer_locals_dict, -}; - -/// \moduleref pyb -/// \class TimerChannel - setup a channel for a timer. -/// -/// Timer channels are used to generate/capture a signal using a timer. -/// -/// TimerChannel objects are created using the Timer.channel() method. -STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_channel_obj_t *self = self_in; - - mp_printf(print, "TimerChannel(timer=%u, channel=%u, mode=%s)", - self->timer->tim_id, - self->channel, - qstr_str(channel_mode_info[self->mode].name)); -} - -/// \method capture([value]) -/// Get or set the capture value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// capture is the logical name to use when the channel is in input capture mode. - -/// \method compare([value]) -/// Get or set the compare value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// compare is the logical name to use when the channel is in output compare mode. - -/// \method pulse_width([value]) -/// Get or set the pulse width value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// pulse_width is the logical name to use when the channel is in PWM mode. -/// -/// In edge aligned mode, a pulse_width of `period + 1` corresponds to a duty cycle of 100% -/// In center aligned mode, a pulse width of `period` corresponds to a duty cycle of 100% -STATIC mp_obj_t pyb_timer_channel_capture_compare(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - FTM_TypeDef *FTMx = self->timer->ftm.Instance; - if (n_args == 1) { - // get - return mp_obj_new_int(FTMx->channel[self->channel].CV & 0xffff); - } - - mp_int_t pw = mp_obj_get_int(args[1]); - - // set - FTMx->channel[self->channel].CV = pw & 0xffff; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_capture_compare_obj, 1, 2, pyb_timer_channel_capture_compare); - -/// \method pulse_width_percent([value]) -/// Get or set the pulse width percentage associated with a channel. The value -/// is a number between 0 and 100 and sets the percentage of the timer period -/// for which the pulse is active. The value can be an integer or -/// floating-point number for more accuracy. For example, a value of 25 gives -/// a duty cycle of 25%. -STATIC mp_obj_t pyb_timer_channel_pulse_width_percent(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - FTM_TypeDef *FTMx = self->timer->ftm.Instance; - uint32_t period = compute_period(self->timer); - if (n_args == 1) { - // get - uint32_t cmp = FTMx->channel[self->channel].CV & 0xffff; - return compute_percent_from_pwm_value(period, cmp); - } else { - // set - uint32_t cmp = compute_pwm_value_from_percent(period, args[1]); - FTMx->channel[self->channel].CV = cmp & 0xffff; - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_pulse_width_percent_obj, 1, 2, pyb_timer_channel_pulse_width_percent); - -/// \method callback(fun) -/// Set the function to be called when the timer channel triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_channel_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_FTM_DISABLE_CH_IT(&self->timer->ftm, self->channel); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - self->callback = callback; - HAL_NVIC_EnableIRQ(self->timer->irqn); - // start timer, so that it interrupts on overflow - switch (self->mode) { - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: - HAL_FTM_PWM_Start_IT(&self->timer->ftm, self->channel); - break; - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: - HAL_FTM_OC_Start_IT(&self->timer->ftm, self->channel); - break; - case CHANNEL_MODE_IC: - HAL_FTM_IC_Start_IT(&self->timer->ftm, self->channel); - break; - } - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_channel_callback_obj, pyb_timer_channel_callback); - -#if MICROPY_TIMER_REG -reg_t timer_channel_reg[] = { - REG_ENTRY(FTM_ChannelTypeDef, CSC), - REG_ENTRY(FTM_ChannelTypeDef, CV), -}; - -mp_obj_t pyb_timer_channel_reg(uint n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - return reg_cmd(&self->timer->ftm.Instance->channel[self->channel], - timer_channel_reg, MP_ARRAY_SIZE(timer_channel_reg), - n_args - 1, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_reg_obj, 1, 3, pyb_timer_channel_reg); -#endif - -STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_channel_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width_percent), MP_ROM_PTR(&pyb_timer_channel_pulse_width_percent_obj) }, - { MP_ROM_QSTR(MP_QSTR_capture), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_compare), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, -#if MICROPY_TIMER_REG - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pyb_timer_channel_reg_obj) }, -#endif -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_timer_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_TimerChannel, - .print = pyb_timer_channel_print, - .locals_dict = (mp_obj_t)&pyb_timer_channel_locals_dict, -}; - -STATIC bool ftm_handle_irq_callback(pyb_timer_obj_t *self, mp_uint_t channel, mp_obj_t callback) { - // execute callback if it's set - if (callback == mp_const_none) { - return false; - } - bool handled = false; - - // When executing code within a handler we must lock the GC to prevent - // any memory allocations. We must also catch any exceptions. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(callback, self); - nlr_pop(); - handled = true; - } else { - // Uncaught exception; disable the callback so it doesn't run again. - self->callback = mp_const_none; - if (channel == 0xffffffff) { - printf("Uncaught exception in Timer(" UINT_FMT - ") interrupt handler\n", self->tim_id); - } else { - printf("Uncaught exception in Timer(" UINT_FMT ") channel " - UINT_FMT " interrupt handler\n", self->tim_id, channel); - } - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - return handled; -} - -STATIC void ftm_irq_handler(uint tim_id) { - if (tim_id >= PYB_TIMER_OBJ_ALL_NUM) { - return; - } - // get the timer object - pyb_timer_obj_t *self = pyb_timer_obj_all[tim_id]; - if (self == NULL) { - // timer object has not been set, so we can't do anything - printf("No timer object for id=%d\n", tim_id); - return; - } - FTM_HandleTypeDef *hftm = &self->ftm; - - bool handled = false; - - // Check for timer (versus timer channel) interrupt. - if (__HAL_FTM_GET_TOF_IT(hftm) && __HAL_FTM_GET_TOF_FLAG(hftm)) { - __HAL_FTM_CLEAR_TOF_FLAG(hftm); - if (ftm_handle_irq_callback(self, 0xffffffff, self->callback)) { - handled = true; - } else { - __HAL_FTM_DISABLE_TOF_IT(&self->ftm); - printf("No callback for Timer %d TOF (now disabled)\n", tim_id); - } - } - - uint32_t processed = 0; - - // Check to see if a timer channel interrupt is pending - pyb_timer_channel_obj_t *chan = self->channel; - while (chan != NULL) { - processed |= (1 << chan->channel); - if (__HAL_FTM_GET_CH_IT(&self->ftm, chan->channel) && __HAL_FTM_GET_CH_FLAG(&self->ftm, chan->channel)) { - __HAL_FTM_CLEAR_CH_FLAG(&self->ftm, chan->channel); - if (ftm_handle_irq_callback(self, chan->channel, chan->callback)) { - handled = true; - } else { - __HAL_FTM_DISABLE_CH_IT(&self->ftm, chan->channel); - printf("No callback for Timer %d channel %u (now disabled)\n", - self->tim_id, chan->channel); - } - } - chan = chan->next; - } - - if (!handled) { - // An interrupt occurred for a channel we didn't process. Find it and - // turn it off. - for (mp_uint_t channel = 0; channel < 8; channel++) { - if ((processed & (1 << channel)) == 0) { - if (__HAL_FTM_GET_CH_FLAG(&self->ftm, channel) != 0) { - __HAL_FTM_CLEAR_CH_FLAG(&self->ftm, channel); - __HAL_FTM_DISABLE_CH_IT(&self->ftm, channel); - printf("Unhandled interrupt Timer %d channel %u (now disabled)\n", - tim_id, channel); - } - } - } - } -} - -void ftm0_isr(void) { - ftm_irq_handler(0); -} - -void ftm1_isr(void) { - ftm_irq_handler(1); -} - -void ftm2_isr(void) { - ftm_irq_handler(2); -} diff --git a/ports/teensy/timer.h b/ports/teensy/timer.h deleted file mode 100644 index 75c2e654e2..0000000000 --- a/ports/teensy/timer.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_TEENSY_TIMER_H -#define MICROPY_INCLUDED_TEENSY_TIMER_H - -extern const mp_obj_type_t pyb_timer_type; - -void timer_init0(void); -void timer_deinit(void); - -#endif // MICROPY_INCLUDED_TEENSY_TIMER_H diff --git a/ports/teensy/uart.c b/ports/teensy/uart.c deleted file mode 100644 index a8cfd63eac..0000000000 --- a/ports/teensy/uart.c +++ /dev/null @@ -1,489 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "bufhelper.h" -#include "uart.h" - -/// \moduleref pyb -/// \class UART - duplex serial communication bus -/// -/// UART implements the standard UART/USART duplex serial communications protocol. At -/// the physical level it consists of 2 lines: RX and TX. -/// -/// See usage model of I2C. UART is very similar. Main difference is -/// parameters to init the UART bus: -/// -/// from pyb import UART -/// -/// uart = UART(1, 9600) # init with given baudrate -/// uart.init(9600, bits=8, stop=1, parity=None) # init with given parameters -/// -/// Bits can be 8 or 9, stop can be 1 or 2, parity can be None, 0 (even), 1 (odd). -/// -/// Extra method: -/// -/// uart.any() # returns True if any characters waiting - -struct _pyb_uart_obj_t { - mp_obj_base_t base; - pyb_uart_t uart_id; - bool is_enabled; -// UART_HandleTypeDef uart; -}; - -pyb_uart_obj_t *pyb_uart_global_debug = NULL; - -// assumes Init parameters have been set up correctly -bool uart_init2(pyb_uart_obj_t *uart_obj) { -#if 0 - USART_TypeDef *UARTx = NULL; - - uint32_t GPIO_Pin = 0; - uint8_t GPIO_AF_UARTx = 0; - GPIO_TypeDef* GPIO_Port = NULL; - - switch (uart_obj->uart_id) { - // USART1 is on PA9/PA10 (CK on PA8), PB6/PB7 - case PYB_UART_1: - UARTx = USART1; - GPIO_AF_UARTx = GPIO_AF7_USART1; - -#if defined (PYBV4) || defined(PYBV10) - GPIO_Port = GPIOB; - GPIO_Pin = GPIO_PIN_6 | GPIO_PIN_7; -#else - GPIO_Port = GPIOA; - GPIO_Pin = GPIO_PIN_9 | GPIO_PIN_10; -#endif - - __USART1_CLK_ENABLE(); - break; - - // USART2 is on PA2/PA3 (CK on PA4), PD5/PD6 (CK on PD7) - case PYB_UART_2: - UARTx = USART2; - GPIO_AF_UARTx = GPIO_AF7_USART2; - - GPIO_Port = GPIOA; - GPIO_Pin = GPIO_PIN_2 | GPIO_PIN_3; - - __USART2_CLK_ENABLE(); - break; - - // USART3 is on PB10/PB11 (CK on PB12), PC10/PC11 (CK on PC12), PD8/PD9 (CK on PD10) - case PYB_UART_3: - UARTx = USART3; - GPIO_AF_UARTx = GPIO_AF7_USART3; - -#if defined(PYBV3) || defined(PYBV4) | defined(PYBV10) - GPIO_Port = GPIOB; - GPIO_Pin = GPIO_PIN_10 | GPIO_PIN_11; -#else - GPIO_Port = GPIOD; - GPIO_Pin = GPIO_PIN_8 | GPIO_PIN_9; -#endif - __USART3_CLK_ENABLE(); - break; - - // UART4 is on PA0/PA1, PC10/PC11 - case PYB_UART_4: - UARTx = UART4; - GPIO_AF_UARTx = GPIO_AF8_UART4; - - GPIO_Port = GPIOA; - GPIO_Pin = GPIO_PIN_0 | GPIO_PIN_1; - - __UART4_CLK_ENABLE(); - break; - - // USART6 is on PC6/PC7 (CK on PC8) - case PYB_UART_6: - UARTx = USART6; - GPIO_AF_UARTx = GPIO_AF8_USART6; - - GPIO_Port = GPIOC; - GPIO_Pin = GPIO_PIN_6 | GPIO_PIN_7; - - __USART6_CLK_ENABLE(); - break; - - default: - return false; - } - - // init GPIO - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = GPIO_Pin; - GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; - GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - GPIO_InitStructure.Alternate = GPIO_AF_UARTx; - HAL_GPIO_Init(GPIO_Port, &GPIO_InitStructure); - - // init UARTx - uart_obj->uart.Instance = UARTx; - HAL_UART_Init(&uart_obj->uart); - - uart_obj->is_enabled = true; -#endif - return true; -} - -bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) { -#if 0 - UART_HandleTypeDef *uh = &uart_obj->uart; - memset(uh, 0, sizeof(*uh)); - uh->Init.BaudRate = baudrate; - uh->Init.WordLength = UART_WORDLENGTH_8B; - uh->Init.StopBits = UART_STOPBITS_1; - uh->Init.Parity = UART_PARITY_NONE; - uh->Init.Mode = UART_MODE_TX_RX; - uh->Init.HwFlowCtl = UART_HWCONTROL_NONE; - uh->Init.OverSampling = UART_OVERSAMPLING_16; -#endif - return uart_init2(uart_obj); -} - -mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj) { -#if 0 - return __HAL_UART_GET_FLAG(&uart_obj->uart, UART_FLAG_RXNE); -#else - return 0; -#endif -} - -int uart_rx_char(pyb_uart_obj_t *uart_obj) { - uint8_t ch; -#if 0 - if (HAL_UART_Receive(&uart_obj->uart, &ch, 1, 0) != HAL_OK) { - ch = 0; - } -#else - ch = 'A'; -#endif - return ch; -} - -void uart_tx_char(pyb_uart_obj_t *uart_obj, int c) { -#if 0 - uint8_t ch = c; - HAL_UART_Transmit(&uart_obj->uart, &ch, 1, 100000); -#endif -} - -void uart_tx_str(pyb_uart_obj_t *uart_obj, const char *str) { -#if 0 - HAL_UART_Transmit(&uart_obj->uart, (uint8_t*)str, strlen(str), 100000); -#endif -} - -void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) { -#if 0 - HAL_UART_Transmit(&uart_obj->uart, (uint8_t*)str, len, 100000); -#endif -} - -void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len) { - for (const char *top = str + len; str < top; str++) { - if (*str == '\n') { - uart_tx_char(uart_obj, '\r'); - } - uart_tx_char(uart_obj, *str); - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = self_in; - if (!self->is_enabled) { - mp_printf(print, "UART(%lu)", self->uart_id); - } else { -#if 0 - mp_printf(print, "UART(%lu, baudrate=%u, bits=%u, stop=%u", - self->uart_id, self->uart.Init.BaudRate, - self->uart.Init.WordLength == UART_WORDLENGTH_8B ? 8 : 9, - self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2); - if (self->uart.Init.Parity == UART_PARITY_NONE) { - mp_print_str(print, ", parity=None)"); - } else { - mp_printf(print, ", parity=%u)", self->uart.Init.Parity == UART_PARITY_EVEN ? 0 : 1); - } -#endif - } -} - -/// \method init(baudrate, *, bits=8, stop=1, parity=None) -/// -/// Initialise the SPI bus with the given parameters: -/// -/// - `baudrate` is the clock rate. -/// - `bits` is the number of bits per byte, 8 or 9. -/// - `stop` is the number of stop bits, 1 or 2. -/// - `parity` is the parity, `None`, 0 (even) or 1 (odd). -STATIC const mp_arg_t pyb_uart_init_args[] = { - { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_parity, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, -}; -#define PYB_UART_INIT_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_init_args) - -STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t vals[PYB_UART_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args, args, kw_args, PYB_UART_INIT_NUM_ARGS, pyb_uart_init_args, vals); -#if 0 - // set the UART configuration values - memset(&self->uart, 0, sizeof(self->uart)); - UART_InitTypeDef *init = &self->uart.Init; - init->BaudRate = vals[0].u_int; - init->WordLength = vals[1].u_int == 8 ? UART_WORDLENGTH_8B : UART_WORDLENGTH_9B; - switch (vals[2].u_int) { - case 1: init->StopBits = UART_STOPBITS_1; break; - default: init->StopBits = UART_STOPBITS_2; break; - } - if (vals[3].u_obj == mp_const_none) { - init->Parity = UART_PARITY_NONE; - } else { - mp_int_t parity = mp_obj_get_int(vals[3].u_obj); - init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN; - } - init->Mode = UART_MODE_TX_RX; - init->HwFlowCtl = UART_HWCONTROL_NONE; - init->OverSampling = UART_OVERSAMPLING_16; - - // init UART (if it fails, it's because the port doesn't exist) - if (!uart_init2(self)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART port %d does not exist", self->uart_id)); - } -#endif - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'. -/// With no additional parameters, the UART object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the UART busses are: -/// -/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)` -/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)` -/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)` -/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)` -/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)` -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, uint n_args, uint n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // create object - pyb_uart_obj_t *o = m_new_obj(pyb_uart_obj_t); - o->base.type = &pyb_uart_type; - - // work out port - o->uart_id = 0; -#if 0 - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { -#if defined(PYBV10) - } else if (strcmp(port, "XA") == 0) { - o->uart_id = PYB_UART_XA; - } else if (strcmp(port, "XB") == 0) { - o->uart_id = PYB_UART_XB; - } else if (strcmp(port, "YA") == 0) { - o->uart_id = PYB_UART_YA; - } else if (strcmp(port, "YB") == 0) { - o->uart_id = PYB_UART_YB; -#endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART port %s does not exist", port)); - } - } else { - o->uart_id = mp_obj_get_int(args[0]); - } -#endif - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_uart_init_helper(o, n_args - 1, args + 1, &kw_args); - } - - return o; -} - -STATIC mp_obj_t pyb_uart_init(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -/// \method deinit() -/// Turn off the UART bus. -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { - //pyb_uart_obj_t *self = self_in; - // TODO - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); - -/// \method any() -/// Return `True` if any characters waiting, else `False`. -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - if (uart_rx_any(self)) { - return mp_const_true; - } else { - return mp_const_false; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -/// \method send(send, *, timeout=5000) -/// Send data on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: `None`. -STATIC const mp_arg_t pyb_uart_send_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, -}; -#define PYB_UART_SEND_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_send_args) - -STATIC mp_obj_t pyb_uart_send(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - pyb_uart_obj_t *self = args[0]; - - // parse args - mp_arg_val_t vals[PYB_UART_SEND_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_UART_SEND_NUM_ARGS, pyb_uart_send_args, vals); - -#if 0 - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(vals[0].u_obj, &bufinfo, data); - - // send the data - HAL_StatusTypeDef status = HAL_UART_Transmit(&self->uart, bufinfo.buf, bufinfo.len, vals[1].u_int); - - if (status != HAL_OK) { - // TODO really need a HardwareError object, or something - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "HAL_UART_Transmit failed with code %d", status)); - } -#else - (void)self; -#endif - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_send_obj, 1, pyb_uart_send); - -/// \method recv(recv, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `recv` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `recv` is an integer then a new buffer of the bytes received, -/// otherwise the same buffer that was passed in to `recv`. -#if 0 -STATIC const mp_arg_t pyb_uart_recv_args[] = { - { MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, -}; -#define PYB_UART_RECV_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_recv_args) -#endif - -STATIC mp_obj_t pyb_uart_recv(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - pyb_uart_obj_t *self = args[0]; - -#if 0 - // parse args - mp_arg_val_t vals[PYB_UART_RECV_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_UART_RECV_NUM_ARGS, pyb_uart_recv_args, vals); - - // get the buffer to receive into - mp_buffer_info_t bufinfo; - mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &bufinfo); - - // receive the data - HAL_StatusTypeDef status = HAL_UART_Receive(&self->uart, bufinfo.buf, bufinfo.len, vals[1].u_int); - - if (status != HAL_OK) { - // TODO really need a HardwareError object, or something - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "HAL_UART_Receive failed with code %d", status)); - } - - // return the received data - if (o_ret == MP_OBJ_NULL) { - return vals[0].u_obj; - } else { - return mp_obj_str_builder_end(o_ret); - } -#else - (void)self; - return mp_const_none; -#endif -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_recv_obj, 1, pyb_uart_recv); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_uart_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_uart_recv_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .locals_dict = (mp_obj_t)&pyb_uart_locals_dict, -}; diff --git a/ports/teensy/usb.c b/ports/teensy/usb.c deleted file mode 100644 index ed96826b35..0000000000 --- a/ports/teensy/usb.c +++ /dev/null @@ -1,52 +0,0 @@ -#include - -#include "py/runtime.h" - -#include "Arduino.h" - -#include "usb.h" -#include "usb_serial.h" - -bool usb_vcp_is_connected(void) -{ - return usb_configuration && (usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)); -} - -bool usb_vcp_is_enabled(void) -{ - return true; -} - -int usb_vcp_rx_num(void) { - return usb_serial_available(); -} - -int usb_vcp_recv_byte(uint8_t *ptr) -{ - int ch = usb_serial_getchar(); - if (ch < 0) { - return 0; - } - *ptr = ch; - return 1; -} - -void usb_vcp_send_str(const char* str) -{ - usb_vcp_send_strn(str, strlen(str)); -} - -void usb_vcp_send_strn(const char* str, int len) -{ - usb_serial_write(str, len); -} - -void usb_vcp_send_strn_cooked(const char *str, int len) -{ - for (const char *top = str + len; str < top; str++) { - if (*str == '\n') { - usb_serial_putchar('\r'); - } - usb_serial_putchar(*str); - } -} diff --git a/ports/teensy/usb.h b/ports/teensy/usb.h deleted file mode 100644 index 50fb3ff90d..0000000000 --- a/ports/teensy/usb.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_USB_H -#define MICROPY_INCLUDED_TEENSY_USB_H - -bool usb_vcp_is_connected(void); -bool usb_vcp_is_enabled(void); -int usb_vcp_rx_num(void); -int usb_vcp_recv_byte(uint8_t *ptr); -void usb_vcp_send_str(const char* str); -void usb_vcp_send_strn(const char* str, int len); -void usb_vcp_send_strn_cooked(const char *str, int len); - -#endif // MICROPY_INCLUDED_TEENSY_USB_H diff --git a/ports/windows/.gitignore b/ports/windows/.gitignore deleted file mode 100644 index 12235e7c9e..0000000000 --- a/ports/windows/.gitignore +++ /dev/null @@ -1,11 +0,0 @@ -*.user -*.*sdf -*.suo -*.sln -*.exe -*.pdb -*.ilk -*.filters -/build/* -.vs/* -*.VC.*db diff --git a/ports/windows/Makefile b/ports/windows/Makefile deleted file mode 100644 index 725cb686e5..0000000000 --- a/ports/windows/Makefile +++ /dev/null @@ -1,61 +0,0 @@ -include ../../py/mkenv.mk --include mpconfigport.mk - -# define main target -PROG = micropython.exe - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = ../unix/qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -# compiler settings -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -DUNIX -D__USE_MINGW_ANSI_STDIO=1 $(CFLAGS_MOD) $(COPT) -LDFLAGS = $(LDFLAGS_MOD) -lm - -# Debugging/Optimization -ifdef DEBUG -CFLAGS += -g -COPT = -O0 -else -COPT = -Os #-DNDEBUG -endif - -# source files -SRC_C = \ - ports/unix/main.c \ - ports/unix/file.c \ - ports/unix/input.c \ - ports/unix/modos.c \ - ports/unix/modmachine.c \ - ports/unix/modtime.c \ - ports/unix/gccollect.c \ - windows_mphal.c \ - realpath.c \ - init.c \ - sleep.c \ - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -ifeq ($(MICROPY_USE_READLINE),1) -CFLAGS_MOD += -DMICROPY_USE_READLINE=1 -SRC_C += lib/mp-readline/readline.c -else ifeq ($(MICROPY_USE_READLINE),2) -CFLAGS_MOD += -DMICROPY_USE_READLINE=2 -LDFLAGS_MOD += -lreadline -endif - -LIB += -lws2_32 - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -include $(TOP)/py/mkrules.mk diff --git a/ports/windows/README.md b/ports/windows/README.md deleted file mode 100644 index f1bd405513..0000000000 --- a/ports/windows/README.md +++ /dev/null @@ -1,74 +0,0 @@ -This is the experimental, community-supported Windows port of MicroPython. -It is based on Unix port, and expected to remain so. -The port requires additional testing, debugging, and patches. Please -consider to contribute. - - -Building on Debian/Ubuntu Linux system ---------------------------------------- - - sudo apt-get install gcc-mingw-w64 - make CROSS_COMPILE=i686-w64-mingw32- - -If for some reason the mingw-w64 crosscompiler is not available, you can try -mingw32 instead, but it comes with a really old gcc which may produce some -spurious errors (you may need to disable -Werror): - - sudo apt-get install mingw32 mingw32-binutils mingw32-runtime - make CROSS_COMPILE=i586-mingw32msvc- - - -Building under Cygwin ---------------------- - -Install following packages using cygwin's setup.exe: - -* mingw64-i686-gcc-core -* mingw64-x86_64-gcc-core -* make - -Build using: - - make CROSS_COMPILE=i686-w64-mingw32- - -Or for 64bit: - - make CROSS_COMPILE=x86_64-w64-mingw32- - - -Building using MS Visual Studio 2013 (or higher) ------------------------------------------------- - -In the IDE, open `micropython.vcxproj` and build. - -To build from the command line: - - msbuild micropython.vcxproj - -__Stack usage__ - -The msvc compiler is quite stack-hungry which might result in a "maximum recursion depth exceeded" -RuntimeError for code with lots of nested function calls. -There are several ways to deal with this: -- increase the threshold used for detection by altering the argument to `mp_stack_set_limit` in `ports/unix/main.c` -- disable detection all together by setting `MICROPY_STACK_CHECK` to "0" in `ports/windows/mpconfigport.h` -- disable the /GL compiler flag by setting `WholeProgramOptimization` to "false" - -See [issue 2927](https://github.com/micropython/micropython/issues/2927) for more information. - - -Running on Linux using Wine ---------------------------- - -The default build (MICROPY_USE_READLINE=1) uses extended Windows console -functions and thus should be ran using the `wineconsole` tool. Depending -on the Wine build configuration, you may also want to select the curses -backend which has the look&feel of a standard Unix console: - - wineconsole --backend=curses ./micropython.exe - -For more info, see https://www.winehq.org/docs/wineusr-guide/cui-programs . - -If built without line editing and history capabilities -(MICROPY_USE_READLINE=0), the resulting binary can be run using the standard -`wine` tool. diff --git a/ports/windows/fmode.c b/ports/windows/fmode.c deleted file mode 100644 index 33ba24ed1f..0000000000 --- a/ports/windows/fmode.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "fmode.h" -#include "py/mpconfig.h" -#include -#include - -// Workaround for setting file translation mode: we must distinguish toolsets -// since mingw has no _set_fmode, and altering msvc's _fmode directly has no effect -STATIC int set_fmode_impl(int mode) { -#ifndef _MSC_VER - _fmode = mode; - return 0; -#else - return _set_fmode(mode); -#endif -} - -void set_fmode_binary(void) { - set_fmode_impl(O_BINARY); -} - -void set_fmode_text(void) { - set_fmode_impl(O_TEXT); -} diff --git a/ports/windows/fmode.h b/ports/windows/fmode.h deleted file mode 100644 index c661c84d0c..0000000000 --- a/ports/windows/fmode.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_FMODE_H -#define MICROPY_INCLUDED_WINDOWS_FMODE_H - -// Treat files opened by open() as binary. No line ending translation is done. -void set_fmode_binary(void); - -// Treat files opened by open() as text. -// When reading from the file \r\n will be converted to \n. -// When writing to the file \n will be converted into \r\n. -void set_fmode_text(void); - -#endif // MICROPY_INCLUDED_WINDOWS_FMODE_H diff --git a/ports/windows/init.c b/ports/windows/init.c deleted file mode 100644 index 09fa10417b..0000000000 --- a/ports/windows/init.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#ifdef _MSC_VER -#include -#endif -#include "sleep.h" - -extern BOOL WINAPI console_sighandler(DWORD evt); - -#ifdef _MSC_VER -void invalid_param_handler(const wchar_t *expr, const wchar_t *fun, const wchar_t *file, unsigned int line, uintptr_t p) { -} -#endif - -void init() { -#ifdef _MSC_VER - // Disable the 'Debug Error!' dialog for assertions failures and the likes, - // instead write messages to the debugger output and terminate. - _CrtSetReportMode(_CRT_ASSERT, _CRTDBG_MODE_DEBUG); - _CrtSetReportMode(_CRT_WARN, _CRTDBG_MODE_DEBUG); - _CrtSetReportMode(_CRT_ERROR, _CRTDBG_MODE_DEBUG); - - // Disable 'invalid parameter handling' which is for instance invoked when - // passing invalid file descriptors to functions like lseek() and make the - // functions called behave properly by setting errno to EBADF/EINVAL/.. - _set_invalid_parameter_handler(invalid_param_handler); -#endif - SetConsoleCtrlHandler(console_sighandler, TRUE); - init_sleep(); -#ifdef __MINGW32__ - putenv("PRINTF_EXPONENT_DIGITS=2"); -#elif _MSC_VER < 1900 - // This is only necessary for Visual Studio versions 2013 and below: - // https://msdn.microsoft.com/en-us/library/bb531344(v=vs.140).aspx - _set_output_format(_TWO_DIGIT_EXPONENT); -#endif -} - -void deinit() { - SetConsoleCtrlHandler(console_sighandler, FALSE); - deinit_sleep(); -} diff --git a/ports/windows/init.h b/ports/windows/init.h deleted file mode 100644 index c6fddb257e..0000000000 --- a/ports/windows/init.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_INIT_H -#define MICROPY_INCLUDED_WINDOWS_INIT_H - -void init(void); -void deinit(void); - -#endif // MICROPY_INCLUDED_WINDOWS_INIT_H diff --git a/ports/windows/micropython.vcxproj b/ports/windows/micropython.vcxproj deleted file mode 100644 index ee0b98abba..0000000000 --- a/ports/windows/micropython.vcxproj +++ /dev/null @@ -1,104 +0,0 @@ - - - - - Debug - Win32 - - - Release - Win32 - - - Debug - x64 - - - Release - x64 - - - - {740F3C30-EB6C-4B59-9C50-AE4D5A4A9D12} - micropython - - - - Application - true - $(DefaultPlatformToolset) - MultiByte - - - Application - false - $(DefaultPlatformToolset) - true - MultiByte - - - Application - true - $(DefaultPlatformToolset) - MultiByte - - - Application - false - $(DefaultPlatformToolset) - true - MultiByte - - - - - - - - - - - - - - - - - - - - - - - - - - msvc/user.props - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/ports/windows/mpconfigport.h b/ports/windows/mpconfigport.h deleted file mode 100644 index 9db6d31ce8..0000000000 --- a/ports/windows/mpconfigport.h +++ /dev/null @@ -1,259 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// options to control how MicroPython is built - -// Linking with GNU readline (MICROPY_USE_READLINE == 2) causes binary to be licensed under GPL -#ifndef MICROPY_USE_READLINE -#define MICROPY_USE_READLINE (1) -#endif - -#define MICROPY_ALLOC_PATH_MAX (260) //see minwindef.h for msvc or limits.h for mingw -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (1) -#define MICROPY_COMP_RETURN_IF_EXPR (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_ENABLE_PYSTACK (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_MALLOC_USES_ALLOCATED_SIZE (1) -#define MICROPY_MEM_STATS (1) -#define MICROPY_DEBUG_PRINTERS (1) -#define MICROPY_DEBUG_PRINTER_DEST mp_stderr_print -#define MICROPY_READER_POSIX (1) -#define MICROPY_USE_READLINE_HISTORY (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_EMACS_KEYS (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_HELPER_LEXER_UNIX (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_DOUBLE) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_STREAMS_POSIX_API (1) -#define MICROPY_OPT_COMPUTED_GOTO (0) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_CENTER (1) -#define MICROPY_PY_BUILTINS_STR_PARTITION (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_COMPILE (1) -#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_PLATFORM "win32" -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_EXC_INFO (1) -#define MICROPY_PY_COLLECTIONS_DEQUE (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) -#define MICROPY_PY_CMATH (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_GC_COLLECT_RETVAL (1) -#define MICROPY_MODULE_FROZEN_STR (0) - -#define MICROPY_STACKLESS (0) -#define MICROPY_STACKLESS_STRICT (0) - -#define MICROPY_PY_UTIME (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UBINASCII_CRC32 (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_MACHINE_MEM_GET_READ_ADDR mod_machine_mem_get_addr -#define MICROPY_MACHINE_MEM_GET_WRITE_ADDR mod_machine_mem_get_addr - -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_DETAILED) -#define MICROPY_ERROR_PRINTER (&mp_stderr_print) -#define MICROPY_WARNINGS (1) -#define MICROPY_PY_STR_BYTES_CMP_WARN (1) - -extern const struct _mp_print_t mp_stderr_print; - -#ifdef _MSC_VER -#define MICROPY_GCREGS_SETJMP (1) -#endif - -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (256) -#define MICROPY_KBD_EXCEPTION (1) - -#define MICROPY_PORT_INIT_FUNC init() -#define MICROPY_PORT_DEINIT_FUNC deinit() - -// type definitions for the specific machine - -#if defined( __MINGW32__ ) && defined( __LP64__ ) -typedef long mp_int_t; // must be pointer size -typedef unsigned long mp_uint_t; // must be pointer size -#elif defined ( __MINGW32__ ) && defined( _WIN64 ) -#include -typedef __int64 mp_int_t; -typedef unsigned __int64 mp_uint_t; -#define MP_SSIZE_MAX __INT64_MAX__ -#elif defined ( _MSC_VER ) && defined( _WIN64 ) -typedef __int64 mp_int_t; -typedef unsigned __int64 mp_uint_t; -#else -// These are definitions for machines where sizeof(int) == sizeof(void*), -// regardless for actual size. -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -#endif - -// Just assume Windows is little-endian - mingw32 gcc doesn't -// define standard endianness macros. -#define MP_ENDIANNESS_LITTLE (1) - -// Cannot include , as it may lead to symbol name clashes -#if _FILE_OFFSET_BITS == 64 && !defined(__LP64__) -typedef long long mp_off_t; -#else -typedef long mp_off_t; -#endif - -#if MICROPY_PY_OS_DUPTERM -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) -void mp_hal_dupterm_tx_strn(const char *str, size_t len); -#else -#include -#define MP_PLAT_PRINT_STRN(str, len) do { int ret = write(1, str, len); (void)ret; } while (0) -#define mp_hal_dupterm_tx_strn(s, l) -#endif - -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -extern const struct _mp_obj_module_t mp_module_os; -extern const struct _mp_obj_module_t mp_module_time; -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_time) }, \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) }, \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_os) }, \ - -#if MICROPY_USE_READLINE == 1 -#define MICROPY_PORT_ROOT_POINTERS \ - char *readline_hist[50]; -#endif - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_MPHALPORT_H "windows_mphal.h" - -// We need to provide a declaration/definition of alloca() -#include - -#include "realpath.h" -#include "init.h" -#include "sleep.h" - -#ifdef __GNUC__ -#define MP_NOINLINE __attribute__((noinline)) -#endif - -// MSVC specifics -#ifdef _MSC_VER - -// Sanity check - -#if ( _MSC_VER < 1800 ) - #error Can only build with Visual Studio 2013 toolset -#endif - - -// CL specific overrides from mpconfig - -#define NORETURN __declspec(noreturn) -#define MP_NOINLINE __declspec(noinline) -#define MP_LIKELY(x) (x) -#define MP_UNLIKELY(x) (x) -#define MICROPY_PORT_CONSTANTS { "dummy", 0 } //can't have zero-sized array -#ifdef _WIN64 -#define MP_SSIZE_MAX _I64_MAX -#else -#define MP_SSIZE_MAX _I32_MAX -#endif - - -// CL specific definitions - -#define restrict -#define inline __inline -#define alignof(t) __alignof(t) -#define PATH_MAX MICROPY_ALLOC_PATH_MAX -#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG) -#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR) -#ifdef _WIN64 -#define SSIZE_MAX _I64_MAX -typedef __int64 ssize_t; -#else -#define SSIZE_MAX _I32_MAX -typedef int ssize_t; -#endif -typedef mp_off_t off_t; - - -// Put static/global variables in sections with a known name -// This used to be required for GC, not the case anymore but keep it as it makes the map file easier to inspect -// For this to work this header must be included by all sources, which is the case normally -#define MICROPY_PORT_DATASECTION "upydata" -#define MICROPY_PORT_BSSSECTION "upybss" -#pragma data_seg(MICROPY_PORT_DATASECTION) -#pragma bss_seg(MICROPY_PORT_BSSSECTION) - - -// System headers (needed e.g. for nlr.h) - -#include //for NULL -#include //for assert - -#endif diff --git a/ports/windows/mpconfigport.mk b/ports/windows/mpconfigport.mk deleted file mode 100644 index 87001d464f..0000000000 --- a/ports/windows/mpconfigport.mk +++ /dev/null @@ -1,10 +0,0 @@ -# Enable/disable modules and 3rd-party libs to be included in interpreter - -# Build 32-bit binaries on a 64-bit host -MICROPY_FORCE_32BIT = 0 - -# Linking with GNU readline causes binary to be licensed under GPL -MICROPY_USE_READLINE = 1 - -# ffi module requires libffi (libffi-dev Debian package) -MICROPY_PY_FFI = 0 diff --git a/ports/windows/msvc/common.props b/ports/windows/msvc/common.props deleted file mode 100644 index 26ea78e7e5..0000000000 --- a/ports/windows/msvc/common.props +++ /dev/null @@ -1,47 +0,0 @@ - - - - - - - - $(PyOutDir) - $(PyIntDir) - $(PyBuildDir)copycookie$(Configuration)$(Platform) - - - - $(PyIncDirs);%(AdditionalIncludeDirectories) - _USE_MATH_DEFINES;_CRT_SECURE_NO_WARNINGS;_MBCS;%(PreprocessorDefinitions) - false - Level1 - false - true - false - - - true - true - - - - - $(PyWinDir)%(FileName)%(Extension) - - - - - - - - - - - - diff --git a/ports/windows/msvc/debug.props b/ports/windows/msvc/debug.props deleted file mode 100644 index fa1ca4fcbc..0000000000 --- a/ports/windows/msvc/debug.props +++ /dev/null @@ -1,9 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/ports/windows/msvc/dirent.c b/ports/windows/msvc/dirent.c deleted file mode 100644 index e050432a17..0000000000 --- a/ports/windows/msvc/dirent.c +++ /dev/null @@ -1,103 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2015 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ - -#include "dirent.h" -#include -#include - -typedef struct DIR { - HANDLE findHandle; - WIN32_FIND_DATA findData; - struct dirent result; -} DIR; - -DIR *opendir(const char *name) { - if (!name || !*name) { - errno = ENOENT; - return NULL; - } - - DIR *dir = malloc(sizeof(DIR)); - if (!dir) { - errno = ENOMEM; - return NULL; - } - dir->result.d_ino = 0; - dir->result.d_name = NULL; - dir->findHandle = INVALID_HANDLE_VALUE; - - const size_t nameLen = strlen(name); - char *path = malloc(nameLen + 3); // allocate enough for adding "/*" - if (!path) { - free(dir); - errno = ENOMEM; - return NULL; - } - strcpy(path, name); - - // assure path ends with wildcard - const char lastChar = path[nameLen - 1]; - if (lastChar != '*') { - const char *appendWC = (lastChar != '/' && lastChar != '\\') ? "/*" : "*"; - strcat(path, appendWC); - } - - // init - dir->findHandle = FindFirstFile(path, &dir->findData); - free(path); - if (dir->findHandle == INVALID_HANDLE_VALUE) { - free(dir); - errno = ENOENT; - return NULL; - } - return dir; -} - -int closedir(DIR *dir) { - if (dir) { - FindClose(dir->findHandle); - free(dir); - return 0; - } else { - errno = EBADF; - return -1; - } -} - -struct dirent *readdir(DIR *dir) { - if (!dir) { - errno = EBADF; - return NULL; - } - - // first pass d_name is NULL so use result from FindFirstFile in opendir, else use FindNextFile - if (!dir->result.d_name || FindNextFile(dir->findHandle, &dir->findData)) { - dir->result.d_name = dir->findData.cFileName; - return &dir->result; - } - - return NULL; -} diff --git a/ports/windows/msvc/dirent.h b/ports/windows/msvc/dirent.h deleted file mode 100644 index fca06785a6..0000000000 --- a/ports/windows/msvc/dirent.h +++ /dev/null @@ -1,48 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2015 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ -#ifndef MICROPY_INCLUDED_WINDOWS_MSVC_DIRENT_H -#define MICROPY_INCLUDED_WINDOWS_MSVC_DIRENT_H - -// dirent.h implementation for msvc - -// for ino_t -#include - -// opaque DIR structure -typedef struct DIR DIR; - -// the dirent structure -// d_ino is always 0 - if ever needed use GetFileInformationByHandle -typedef struct dirent { - ino_t d_ino; - char *d_name; -} dirent; - -DIR *opendir(const char *name); -int closedir(DIR *dir); -struct dirent *readdir(DIR *dir); - -#endif // MICROPY_INCLUDED_WINDOWS_MSVC_DIRENT_H diff --git a/ports/windows/msvc/genhdr.targets b/ports/windows/msvc/genhdr.targets deleted file mode 100644 index ee030c9063..0000000000 --- a/ports/windows/msvc/genhdr.targets +++ /dev/null @@ -1,117 +0,0 @@ - - - - - - - - - - - $(PyBuildDir)genhdr\ - $(PyBaseDir)py\ - $(PyBaseDir)ports\unix\qstrdefsport.h - $(PySrcDir)qstrdefs.h - $(DestDir)qstrdefscollected.h - $(DestDir)qstrdefs.generated.h - python - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $([System.String]::new('%(FullPath)').Replace('$(PyBaseDir)', '$(DestDir)qstr\')) - - - $([System.IO.Path]::ChangeExtension('%(OutFile)', '.pp')) - $([System.IO.Path]::GetDirectoryName('%(OutFile)')) - - - True - - - True - - - - @(QstrDependencies->AnyHaveMetadataValue('Changed', 'True')) - @(PyQstrSourceFiles->AnyHaveMetadataValue('Changed', 'True')) - - - - - - - - - - - - $(QstrGen).tmp - - - - - - - - - $(DestDir)mpversion.h - $(DestFile).tmp - - - - - - - - - - - - - - - - - - diff --git a/ports/windows/msvc/gettimeofday.c b/ports/windows/msvc/gettimeofday.c deleted file mode 100644 index 5f816df709..0000000000 --- a/ports/windows/msvc/gettimeofday.c +++ /dev/null @@ -1,58 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2013, 2014 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ - -#include - -typedef union { - unsigned __int64 tm; // time in 100 nanoseconds interval - FILETIME ft; -} FT; - -int gettimeofday(struct timeval *tp, struct timezone *tz) { - if (tp == NULL) { - return 0; - } - - // UTC time - FT ft; - ZeroMemory(&ft, sizeof(ft)); - GetSystemTimeAsFileTime(&ft.ft); - - // to microseconds - ft.tm /= 10; - - // convert to unix format - // number of microseconds intervals between the 1st january 1601 and the 1st january 1970 (369 years + 89 leap days) - const unsigned __int64 deltaEpoch = 11644473600000000ull; - const unsigned __int64 microSecondsToSeconds = 1000000ull; - tp->tv_usec = ft.tm % microSecondsToSeconds; - tp->tv_sec = (ft.tm - deltaEpoch) / microSecondsToSeconds; - - // see man gettimeofday: timezone is deprecated and expected to be NULL - (void)tz; - - return 0; -} diff --git a/ports/windows/msvc/paths.props b/ports/windows/msvc/paths.props deleted file mode 100644 index db3af4c0fa..0000000000 --- a/ports/windows/msvc/paths.props +++ /dev/null @@ -1,45 +0,0 @@ - - - - True - - - - - $([System.IO.Path]::GetFullPath(`$(MSBuildThisFileDirectory)..\..\..`))\ - $(PyBaseDir)ports\windows\ - $(PyWinDir)build\ - - - $(PyBaseDir);$(PyWinDir);$(PyBuildDir);$(PyWinDir)msvc - - - $(Platform) - $(Configuration) - - - $(PyBuildDir)$(PyConfiguration)$(PyPlatform)\ - $(PyOutDir)obj\ - - diff --git a/ports/windows/msvc/release.props b/ports/windows/msvc/release.props deleted file mode 100644 index ea0bf433d3..0000000000 --- a/ports/windows/msvc/release.props +++ /dev/null @@ -1,16 +0,0 @@ - - - - - - - - true - true - - - true - - - - diff --git a/ports/windows/msvc/sources.props b/ports/windows/msvc/sources.props deleted file mode 100644 index b85295ebc0..0000000000 --- a/ports/windows/msvc/sources.props +++ /dev/null @@ -1,37 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/ports/windows/msvc/sys/time.h b/ports/windows/msvc/sys/time.h deleted file mode 100644 index 7c95d409e4..0000000000 --- a/ports/windows/msvc/sys/time.h +++ /dev/null @@ -1,32 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2013, 2014 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ -#ifndef MICROPY_INCLUDED_WINDOWS_MSVC_SYS_TIME_H -#define MICROPY_INCLUDED_WINDOWS_MSVC_SYS_TIME_H - -// Get the definitions for timeval etc -#include - -#endif // MICROPY_INCLUDED_WINDOWS_MSVC_SYS_TIME_H diff --git a/ports/windows/msvc/unistd.h b/ports/windows/msvc/unistd.h deleted file mode 100644 index 1a1629be4f..0000000000 --- a/ports/windows/msvc/unistd.h +++ /dev/null @@ -1,44 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2013, 2014 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ -#ifndef MICROPY_INCLUDED_WINDOWS_MSVC_UNISTD_H -#define MICROPY_INCLUDED_WINDOWS_MSVC_UNISTD_H - -// There's no unistd.h, but this is the equivalent -#include - -#define F_OK 0 -#define W_OK 2 -#define R_OK 4 - -#define STDIN_FILENO 0 -#define STDOUT_FILENO 1 -#define STDERR_FILENO 2 - -#define SEEK_CUR 1 -#define SEEK_END 2 -#define SEEK_SET 0 - -#endif // MICROPY_INCLUDED_WINDOWS_MSVC_UNISTD_H diff --git a/ports/windows/realpath.c b/ports/windows/realpath.c deleted file mode 100644 index ac9adf8125..0000000000 --- a/ports/windows/realpath.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -// Make sure a path only has forward slashes. -char *to_unix_path(char *p) { - if (p != NULL) { - char *pp = p; - while (*pp != 0) { - if (*pp == '\\') - *pp = '/'; - ++pp; - } - } - return p; -} - -// Implement realpath() using _fullpath and make it use the same error codes as realpath() on unix. -// Also have it return a path with forward slashes only as some code relies on this, -// but _fullpath() returns backward slashes no matter what. -char *realpath(const char *path, char *resolved_path) { - char *ret = NULL; - if (path == NULL) { - errno = EINVAL; - } else if (access(path, R_OK) == 0) { - ret = resolved_path; - if (ret == NULL) - ret = malloc(_MAX_PATH); - if (ret == NULL) { - errno = ENOMEM; - } else { - ret = _fullpath(ret, path, _MAX_PATH); - if (ret == NULL) - errno = EIO; - } - } - return to_unix_path(ret); -} diff --git a/ports/windows/realpath.h b/ports/windows/realpath.h deleted file mode 100644 index 869fe80fae..0000000000 --- a/ports/windows/realpath.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_REALPATH_H -#define MICROPY_INCLUDED_WINDOWS_REALPATH_H - -extern char *realpath(const char *path, char *resolved_path); - -#endif // MICROPY_INCLUDED_WINDOWS_REALPATH_H diff --git a/ports/windows/sleep.c b/ports/windows/sleep.c deleted file mode 100644 index 6043ec7b7b..0000000000 --- a/ports/windows/sleep.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -HANDLE waitTimer = NULL; - -void init_sleep(void) { - waitTimer = CreateWaitableTimer(NULL, TRUE, NULL); -} - -void deinit_sleep(void) { - if (waitTimer != NULL) { - CloseHandle(waitTimer); - waitTimer = NULL; - } -} - -int usleep_impl(__int64 usec) { - if (waitTimer == NULL) { - errno = EAGAIN; - return -1; - } - if (usec < 0 || usec > LLONG_MAX / 10) { - errno = EINVAL; - return -1; - } - - LARGE_INTEGER ft; - ft.QuadPart = -10 * usec; // 100 nanosecond interval, negative value = relative time - if (SetWaitableTimer(waitTimer, &ft, 0, NULL, NULL, 0) == 0) { - errno = EINVAL; - return -1; - } - if (WaitForSingleObject(waitTimer, INFINITE) != WAIT_OBJECT_0) { - errno = EAGAIN; - return -1; - } - return 0; -} - -#ifdef _MSC_VER // mingw and the likes provide their own usleep() -int usleep(__int64 usec) { - return usleep_impl(usec); -} -#endif - -void msec_sleep(double msec) { - const double usec = msec * 1000.0; - usleep_impl(usec > (double)LLONG_MAX ? LLONG_MAX : (__int64)usec); -} diff --git a/ports/windows/sleep.h b/ports/windows/sleep.h deleted file mode 100644 index 430ec3a436..0000000000 --- a/ports/windows/sleep.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_SLEEP_H -#define MICROPY_INCLUDED_WINDOWS_SLEEP_H - -void init_sleep(void); -void deinit_sleep(void); -void msec_sleep(double msec); -#ifdef _MSC_VER -int usleep(__int64 usec); -#endif - -#endif // MICROPY_INCLUDED_WINDOWS_SLEEP_H diff --git a/ports/windows/windows_mphal.c b/ports/windows/windows_mphal.c deleted file mode 100644 index 153b044235..0000000000 --- a/ports/windows/windows_mphal.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include "py/mpstate.h" -#include "py/mphal.h" - -#include -#include -#include - -HANDLE std_in = NULL; -HANDLE con_out = NULL; -DWORD orig_mode = 0; - -STATIC void assure_stdin_handle() { - if (!std_in) { - std_in = GetStdHandle(STD_INPUT_HANDLE); - assert(std_in != INVALID_HANDLE_VALUE); - } -} - -STATIC void assure_conout_handle() { - if (!con_out) { - con_out = CreateFile("CONOUT$", GENERIC_READ | GENERIC_WRITE, - FILE_SHARE_READ | FILE_SHARE_WRITE, - NULL, OPEN_EXISTING, 0, 0); - assert(con_out != INVALID_HANDLE_VALUE); - } -} - -void mp_hal_stdio_mode_raw(void) { - assure_stdin_handle(); - GetConsoleMode(std_in, &orig_mode); - DWORD mode = orig_mode; - mode &= ~ENABLE_ECHO_INPUT; - mode &= ~ENABLE_LINE_INPUT; - mode &= ~ENABLE_PROCESSED_INPUT; - SetConsoleMode(std_in, mode); -} - -void mp_hal_stdio_mode_orig(void) { - assure_stdin_handle(); - SetConsoleMode(std_in, orig_mode); -} - -// Handler to be installed by SetConsoleCtrlHandler, currently used only to handle Ctrl-C. -// This handler has to be installed just once (this has to be done elswhere in init code). -// Previous versions of the mp_hal code would install a handler whenever Ctrl-C input is -// allowed and remove the handler again when it is not. That is not necessary though (1), -// and it might introduce problems (2) because console notifications are delivered to the -// application in a separate thread. -// (1) mp_hal_set_interrupt_char effectively enables/disables processing of Ctrl-C via the -// ENABLE_PROCESSED_INPUT flag so in raw mode console_sighandler won't be called. -// (2) if mp_hal_set_interrupt_char would remove the handler while Ctrl-C was issued earlier, -// the thread created for handling it might not be running yet so we'd miss the notification. -BOOL WINAPI console_sighandler(DWORD evt) { - if (evt == CTRL_C_EVENT) { - if (MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception))) { - // this is the second time we are called, so die straight away - exit(1); - } - mp_obj_exception_clear_traceback(MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception))); - MP_STATE_VM(mp_pending_exception) = MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)); - return TRUE; - } - return FALSE; -} - -void mp_hal_set_interrupt_char(char c) { - assure_stdin_handle(); - if (c == CHAR_CTRL_C) { - DWORD mode; - GetConsoleMode(std_in, &mode); - mode |= ENABLE_PROCESSED_INPUT; - SetConsoleMode(std_in, mode); - } else { - DWORD mode; - GetConsoleMode(std_in, &mode); - mode &= ~ENABLE_PROCESSED_INPUT; - SetConsoleMode(std_in, mode); - } -} - -void mp_hal_move_cursor_back(uint pos) { - assure_conout_handle(); - CONSOLE_SCREEN_BUFFER_INFO info; - GetConsoleScreenBufferInfo(con_out, &info); - info.dwCursorPosition.X -= (short)pos; - if (info.dwCursorPosition.X < 0) { - info.dwCursorPosition.X = 0; - } - SetConsoleCursorPosition(con_out, info.dwCursorPosition); -} - -void mp_hal_erase_line_from_cursor(uint n_chars_to_erase) { - assure_conout_handle(); - CONSOLE_SCREEN_BUFFER_INFO info; - GetConsoleScreenBufferInfo(con_out, &info); - DWORD written; - FillConsoleOutputCharacter(con_out, ' ', n_chars_to_erase, info.dwCursorPosition, &written); - FillConsoleOutputAttribute(con_out, info.wAttributes, n_chars_to_erase, info.dwCursorPosition, &written); -} - -typedef struct item_t { - WORD vkey; - const char *seq; -} item_t; - -// map virtual key codes to VT100 escape sequences -STATIC item_t keyCodeMap[] = { - {VK_UP, "[A"}, - {VK_DOWN, "[B"}, - {VK_RIGHT, "[C"}, - {VK_LEFT, "[D"}, - {VK_HOME, "[H"}, - {VK_END, "[F"}, - {VK_DELETE, "[3~"}, - {0, ""} //sentinel -}; - -STATIC const char *cur_esc_seq = NULL; - -STATIC int esc_seq_process_vk(int vk) { - for (item_t *p = keyCodeMap; p->vkey != 0; ++p) { - if (p->vkey == vk) { - cur_esc_seq = p->seq; - return 27; // ESC, start of escape sequence - } - } - return 0; // nothing found -} - -STATIC int esc_seq_chr() { - if (cur_esc_seq) { - const char c = *cur_esc_seq++; - if (c) { - return c; - } - cur_esc_seq = NULL; - } - return 0; -} - -int mp_hal_stdin_rx_chr(void) { - // currently processing escape seq? - const int ret = esc_seq_chr(); - if (ret) { - return ret; - } - - // poll until key which we handle is pressed - assure_stdin_handle(); - DWORD num_read; - INPUT_RECORD rec; - for (;;) { - if (!ReadConsoleInput(std_in, &rec, 1, &num_read) || !num_read) { - return CHAR_CTRL_C; // EOF, ctrl-D - } - if (rec.EventType != KEY_EVENT || !rec.Event.KeyEvent.bKeyDown) { // only want key down events - continue; - } - const char c = rec.Event.KeyEvent.uChar.AsciiChar; - if (c) { // plain ascii char, return it - return c; - } - const int ret = esc_seq_process_vk(rec.Event.KeyEvent.wVirtualKeyCode); - if (ret) { - return ret; - } - } -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - write(1, str, len); -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - mp_hal_stdout_tx_strn(str, len); -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -mp_uint_t mp_hal_ticks_ms(void) { - struct timeval tv; - gettimeofday(&tv, NULL); - return tv.tv_sec * 1000 + tv.tv_usec / 1000; -} - -mp_uint_t mp_hal_ticks_us(void) { - struct timeval tv; - gettimeofday(&tv, NULL); - return tv.tv_sec * 1000000 + tv.tv_usec; -} - -mp_uint_t mp_hal_ticks_cpu(void) { - LARGE_INTEGER value; - QueryPerformanceCounter(&value); -#ifdef _WIN64 - return value.QuadPart; -#else - return value.LowPart; -#endif -} diff --git a/ports/windows/windows_mphal.h b/ports/windows/windows_mphal.h deleted file mode 100644 index 2b7aab44a0..0000000000 --- a/ports/windows/windows_mphal.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "sleep.h" -#include "ports/unix/mphalport.h" - -#define MICROPY_HAL_HAS_VT100 (0) - -void mp_hal_move_cursor_back(unsigned int pos); -void mp_hal_erase_line_from_cursor(unsigned int n_chars_to_erase); - -#undef mp_hal_ticks_cpu -mp_uint_t mp_hal_ticks_cpu(void); diff --git a/ports/zephyr/.gitignore b/ports/zephyr/.gitignore deleted file mode 100644 index 00ca089d15..0000000000 --- a/ports/zephyr/.gitignore +++ /dev/null @@ -1 +0,0 @@ -outdir/ diff --git a/ports/zephyr/CMakeLists.txt b/ports/zephyr/CMakeLists.txt deleted file mode 100644 index 84b0e8190a..0000000000 --- a/ports/zephyr/CMakeLists.txt +++ /dev/null @@ -1,21 +0,0 @@ -include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) -project(NONE) - -target_sources(app PRIVATE src/zephyr_start.c src/zephyr_getchar.c) - -add_library(libmicropython STATIC IMPORTED) -set_target_properties(libmicropython PROPERTIES IMPORTED_LOCATION ${CMAKE_CURRENT_SOURCE_DIR}/libmicropython.a) -target_link_libraries(app libmicropython) - -zephyr_get_include_directories_for_lang_as_string(C includes) -zephyr_get_system_include_directories_for_lang_as_string(C system_includes) -zephyr_get_compile_definitions_for_lang_as_string(C definitions) -zephyr_get_compile_options_for_lang_as_string(C options) - -add_custom_target( - outputexports - COMMAND echo CC="${CMAKE_C_COMPILER}" - COMMAND echo Z_CFLAGS=${system_includes} ${includes} ${definitions} ${options} - VERBATIM - USES_TERMINAL -) diff --git a/ports/zephyr/Kbuild b/ports/zephyr/Kbuild deleted file mode 100644 index 9e656d5f48..0000000000 --- a/ports/zephyr/Kbuild +++ /dev/null @@ -1,3 +0,0 @@ -#subdir-ccflags-y += -I$(SOURCE_DIR)/../mylib/include - -obj-y += src/ diff --git a/ports/zephyr/Makefile b/ports/zephyr/Makefile deleted file mode 100644 index 8cb4c12ef7..0000000000 --- a/ports/zephyr/Makefile +++ /dev/null @@ -1,109 +0,0 @@ -# -# This is the main Makefile, which uses MicroPython build system, -# but Zephyr arch-specific toolchain and target-specific flags. -# This Makefile builds MicroPython as a library, and then calls -# recursively Makefile.zephyr to build complete application binary -# using Zephyr build system. -# -# To build a "minimal" configuration, use "make-minimal" wrapper. - -BOARD ?= qemu_x86 -CONF_FILE = prj_$(BOARD)_merged.conf -OUTDIR_PREFIX = $(BOARD) - -# Default heap size is 16KB, which is on conservative side, to let -# it build for smaller boards, but it won't be enough for larger -# applications, and will need to be increased. -MICROPY_HEAP_SIZE = 16384 -FROZEN_DIR = scripts - -# Default target -all: - -include ../../py/mkenv.mk -include $(TOP)/py/py.mk - -# Zephyr (generated) config files - must be defined before include below -Z_EXPORTS = outdir/$(OUTDIR_PREFIX)/Makefile.export -ifneq ($(MAKECMDGOALS), clean) -include $(Z_EXPORTS) -endif - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(ZEPHYR_BASE)/net/ip -INC += -I$(ZEPHYR_BASE)/net/ip/contiki -INC += -I$(ZEPHYR_BASE)/net/ip/contiki/os - -SRC_C = main.c \ - help.c \ - modusocket.c \ - modutime.c \ - modzephyr.c \ - modzsensor.c \ - modmachine.c \ - machine_pin.c \ - uart_core.c \ - lib/utils/stdout_helpers.c \ - lib/utils/printf.c \ - lib/utils/pyexec.c \ - lib/utils/interrupt_char.c \ - lib/mp-readline/readline.c \ - $(SRC_MOD) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -CFLAGS = $(Z_CFLAGS) \ - -std=gnu99 -fomit-frame-pointer -DNDEBUG -DMICROPY_HEAP_SIZE=$(MICROPY_HEAP_SIZE) $(CFLAGS_EXTRA) $(INC) - -include $(TOP)/py/mkrules.mk - -GENERIC_TARGETS = all zephyr run qemu qemugdb flash debug debugserver -KCONFIG_TARGETS = \ - initconfig config nconfig menuconfig xconfig gconfig \ - oldconfig silentoldconfig defconfig savedefconfig \ - allnoconfig allyesconfig alldefconfig randconfig \ - listnewconfig olddefconfig -CLEAN_TARGETS = pristine mrproper - -$(GENERIC_TARGETS): $(LIBMICROPYTHON) -$(CLEAN_TARGETS): clean - -$(GENERIC_TARGETS) $(KCONFIG_TARGETS) $(CLEAN_TARGETS): - $(MAKE) -C outdir/$(BOARD) $@ - -$(LIBMICROPYTHON): | $(Z_EXPORTS) -build/genhdr/qstr.i.last: | $(Z_EXPORTS) - -# If we recreate libmicropython, also cause zephyr.bin relink -LIBMICROPYTHON_EXTRA_CMD = -$(RM) -f outdir/$(OUTDIR_PREFIX)/zephyr.lnk - -# MicroPython's global clean cleans everything, fast -CLEAN_EXTRA = outdir libmicropython.a prj_*_merged.conf - -# Clean Zephyr things in Zephyr way -z_clean: - $(MAKE) -f Makefile.zephyr BOARD=$(BOARD) clean - -# This rule is for prj_$(BOARD)_merged.conf, not $(CONF_FILE), which -# can be overriden. -# prj_$(BOARD).conf is optional, that's why it's resolved with $(wildcard) -# function. -prj_$(BOARD)_merged.conf: prj_base.conf $(wildcard prj_$(BOARD).conf) - $(PYTHON) makeprj.py prj_base.conf prj_$(BOARD).conf $@ - -test: - cd $(TOP)/tests && ./run-tests --target minimal --device "execpty:make -C ../ports/zephyr run BOARD=$(BOARD) QEMU_PTY=1" - -cmake: outdir/$(BOARD)/Makefile - -outdir/$(BOARD)/Makefile: $(CONF_FILE) - mkdir -p outdir/$(BOARD) && cmake -DBOARD=$(BOARD) -DCONF_FILE=$(CONF_FILE) -Boutdir/$(BOARD) -H. - -$(Z_EXPORTS): outdir/$(BOARD)/Makefile - make --no-print-directory -C outdir/$(BOARD) outputexports CMAKE_COMMAND=: >$@ - make -C outdir/$(BOARD) syscall_macros_h_target syscall_list_h_target kobj_types_h_target diff --git a/ports/zephyr/Makefile.zephyr b/ports/zephyr/Makefile.zephyr deleted file mode 100644 index 16f0a9452f..0000000000 --- a/ports/zephyr/Makefile.zephyr +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (c) 2016 Intel Corporation -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -KERNEL_TYPE = micro -# BOARD must be passed on command line from main Makefile -#BOARD = -CONF_FILE = prj.conf -QEMU_NET = 1 - -#export SOURCE_DIR = $(ZEPHYR_BASE)/samples/static_lib/hello_world -export LDFLAGS_zephyr += -L$(CURDIR) -export ALL_LIBS += micropython - -include ${ZEPHYR_BASE}/Makefile.inc -ifeq ($(QEMU_NET), 1) -include ${ZEPHYR_BASE}/samples/net/common/Makefile.ipstack -endif diff --git a/ports/zephyr/README.md b/ports/zephyr/README.md deleted file mode 100644 index f7001af4b8..0000000000 --- a/ports/zephyr/README.md +++ /dev/null @@ -1,113 +0,0 @@ -MicroPython port to Zephyr RTOS -=============================== - -This is an work-in-progress port of MicroPython to Zephyr RTOS -(http://zephyrproject.org). - -This port requires Zephyr version 1.8 or higher. All boards supported -by Zephyr (with standard level of features support, like UART console) -should work with MicroPython (but not all were tested). - -Features supported at this time: - -* REPL (interactive prompt) over Zephyr UART console. -* `utime` module for time measurements and delays. -* `machine.Pin` class for GPIO control. -* `usocket` module for networking (IPv4/IPv6). -* "Frozen modules" support to allow to bundle Python modules together - with firmware. Including complete applications, including with - run-on-boot capability. - -Over time, bindings for various Zephyr subsystems may be added. - - -Building --------- - -Follow to Zephyr web site for Getting Started instruction of installing -Zephyr SDK, getting Zephyr source code, and setting up development -environment. (Direct link: -https://www.zephyrproject.org/doc/getting_started/getting_started.html). -You may want to build Zephyr's own sample applications to make sure your -setup is correct. - -To build MicroPython port, in the port subdirectory (zephyr/), run: - - make BOARD= - -If you don't specify BOARD, the default is `qemu_x86` (x86 target running -in QEMU emulator). Consult Zephyr documentation above for the list of -supported boards. - - -Running -------- - -To run the resulting firmware in QEMU (for BOARDs like qemu_x86, -qemu_cortex_m3): - - make run - -With the default configuration, networking is now enabled, so you need to -follow instructions in https://wiki.zephyrproject.org/view/Networking-with-Qemu -to setup host side of TAP/SLIP networking. If you get error like: - - could not connect serial device to character backend 'unix:/tmp/slip.sock' - -it's a sign that you didn't followed instructions above. If you would like -to just run it quickly without extra setup, see "minimal" build below. - -For deploying/flashing a firmware on a real board, follow Zephyr -documentation for a given board, including known issues for that board -(if any). (Mind again that networking is enabled for the default build, -so you should know if there're any special requirements in that regard, -cf. for example QEMU networking requirements above; real hardware boards -generally should not have any special requirements, unless there're known -issues). - - -Quick example -------------- - -To blink an LED: - - import time - from machine import Pin - - LED = Pin(("GPIO_1", 21), Pin.OUT) - while True: - LED.value(1) - time.sleep(0.5) - LED.value(0) - time.sleep(0.5) - -The above code uses an LED location for a FRDM-K64F board (port B, pin 21; -following Zephyr conventions port are identified by "GPIO_x", where *x* -starts from 0). You will need to adjust it for another board (using board's -reference materials). To execute the above sample, copy it to clipboard, in -MicroPython REPL enter "paste mode" using Ctrl+E, paste clipboard, press -Ctrl+D to finish paste mode and start execution. - - -Minimal build -------------- - -MicroPython is committed to maintain minimal binary size for Zephyr port -below 128KB, as long as Zephyr project is committed to maintain stable -minimal size of their kernel (which they appear to be). Note that at such -size, there is no support for any Zephyr features beyond REPL over UART, -and only very minimal set of builtin Python modules is available. Thus, -this build is more suitable for code size control and quick demonstrations -on smaller systems. It's also suitable for careful enabling of features -one by one to achieve needed functionality and code size. This is in the -contrast to the "default" build, which may get more and more features -enabled over time. - -To make a minimal build: - - ./make-minimal BOARD= - -To run a minimal build in QEMU without requiring TAP networking setup -run the following after you built image with the previous command: - - ./make-minimal BOARD= run diff --git a/ports/zephyr/help.c b/ports/zephyr/help.c deleted file mode 100644 index becc203f6f..0000000000 --- a/ports/zephyr/help.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char zephyr_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/zephyr/machine_pin.c b/ports/zephyr/machine_pin.c deleted file mode 100644 index 4dcd956cf8..0000000000 --- a/ports/zephyr/machine_pin.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "modmachine.h" - -const mp_obj_base_t machine_pin_obj_template = {&machine_pin_type}; - -STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_pin_obj_t *self = self_in; - mp_printf(print, "", self->port, self->pin); -} - -// pin.init(mode, pull=None, *, value) -STATIC mp_obj_t machine_pin_obj_init_helper(machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_mode, ARG_pull, ARG_value }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get io mode - uint mode = args[ARG_mode].u_int; - - // get pull mode - uint pull = GPIO_PUD_NORMAL; - if (args[ARG_pull].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[ARG_pull].u_obj); - } - - int ret = gpio_pin_configure(self->port, self->pin, mode | pull); - if (ret) { - mp_raise_ValueError("invalid pin"); - } - - // get initial value - if (args[ARG_value].u_obj != MP_OBJ_NULL) { - (void)gpio_pin_write(self->port, self->pin, mp_obj_is_true(args[ARG_value].u_obj)); - } - - return mp_const_none; -} - -// constructor(drv_name, pin, ...) -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the wanted port - if (!MP_OBJ_IS_TYPE(args[0], &mp_type_tuple)) { - mp_raise_ValueError("Pin id must be tuple of (\"GPIO_x\", pin#)"); - } - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[0], 2, &items); - const char *drv_name = mp_obj_str_get_str(items[0]); - int wanted_pin = mp_obj_get_int(items[1]); - struct device *wanted_port = device_get_binding(drv_name); - if (!wanted_port) { - mp_raise_ValueError("invalid port"); - } - - machine_pin_obj_t *pin = m_new_obj(machine_pin_obj_t); - pin->base = machine_pin_obj_template; - pin->port = wanted_port; - pin->pin = wanted_pin; - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - machine_pin_obj_t *self = self_in; - if (n_args == 0) { - u32_t pin_val; - (void)gpio_pin_read(self->port, self->pin, &pin_val); - return MP_OBJ_NEW_SMALL_INT(pin_val); - } else { - (void)gpio_pin_write(self->port, self->pin, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -// pin.init(mode, pull) -STATIC mp_obj_t machine_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return machine_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_init_obj, 1, machine_pin_obj_init); - -// pin.value([value]) -STATIC mp_obj_t machine_pin_value(size_t n_args, const mp_obj_t *args) { - return machine_pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_pin_value); - -STATIC mp_obj_t machine_pin_off(mp_obj_t self_in) { - machine_pin_obj_t *self = self_in; - (void)gpio_pin_write(self->port, self->pin, 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_off_obj, machine_pin_off); - -STATIC mp_obj_t machine_pin_on(mp_obj_t self_in) { - machine_pin_obj_t *self = self_in; - (void)gpio_pin_write(self->port, self->pin, 1); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_on_obj, machine_pin_on); - -STATIC mp_uint_t machine_pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - machine_pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - u32_t pin_val; - gpio_pin_read(self->port, self->pin, &pin_val); - return pin_val; - } - case MP_PIN_WRITE: { - gpio_pin_write(self->port, self->pin, arg); - return 0; - } - } - return -1; -} - -STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_on_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_DIR_IN) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_DIR_OUT) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PUD_PULL_UP) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PUD_PULL_DOWN) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table); - -STATIC const mp_pin_p_t machine_pin_pin_p = { - .ioctl = machine_pin_ioctl, -}; - -const mp_obj_type_t machine_pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = machine_pin_print, - .make_new = mp_pin_make_new, - .call = machine_pin_call, - .protocol = &machine_pin_pin_p, - .locals_dict = (mp_obj_t)&machine_pin_locals_dict, -}; diff --git a/ports/zephyr/main.c b/ports/zephyr/main.c deleted file mode 100644 index a28fb37923..0000000000 --- a/ports/zephyr/main.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016-2017 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include -#include -#include - -#include -#ifdef CONFIG_NETWORKING -#include -#endif - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/gc.h" -#include "py/stackctrl.h" -#include "lib/utils/pyexec.h" -#include "lib/mp-readline/readline.h" - -#ifdef TEST -#include "lib/upytesthelper/upytesthelper.h" -#include "lib/tinytest/tinytest.c" -#include "lib/upytesthelper/upytesthelper.c" -#include TEST -#endif - -static char *stack_top; -static char heap[MICROPY_HEAP_SIZE]; - -void init_zephyr(void) { - // We now rely on CONFIG_NET_APP_SETTINGS to set up bootstrap - // network addresses. -#if 0 - #ifdef CONFIG_NETWORKING - if (net_if_get_default() == NULL) { - // If there's no default networking interface, - // there's nothing to configure. - return; - } - #endif - #ifdef CONFIG_NET_IPV4 - static struct in_addr in4addr_my = {{{192, 0, 2, 1}}}; - net_if_ipv4_addr_add(net_if_get_default(), &in4addr_my, NET_ADDR_MANUAL, 0); - static struct in_addr in4netmask_my = {{{255, 255, 255, 0}}}; - net_if_ipv4_set_netmask(net_if_get_default(), &in4netmask_my); - static struct in_addr in4gw_my = {{{192, 0, 2, 2}}}; - net_if_ipv4_set_gw(net_if_get_default(), &in4gw_my); - #endif - #ifdef CONFIG_NET_IPV6 - // 2001:db8::1 - static struct in6_addr in6addr_my = {{{0x20, 0x01, 0x0d, 0xb8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1}}}; - net_if_ipv6_addr_add(net_if_get_default(), &in6addr_my, NET_ADDR_MANUAL, 0); - #endif -#endif -} - -int real_main(void) { - int stack_dummy; - stack_top = (char*)&stack_dummy; - mp_stack_set_top(stack_top); - // Make MicroPython's stack limit somewhat smaller than full stack available - mp_stack_set_limit(CONFIG_MAIN_STACK_SIZE - 512); - - init_zephyr(); - - #ifdef TEST - static const char *argv[] = {"test"}; - upytest_set_heap(heap, heap + sizeof(heap)); - int r = tinytest_main(1, argv, groups); - printf("status: %d\n", r); - #endif - -soft_reset: - #if MICROPY_ENABLE_GC - gc_init(heap, heap + sizeof(heap)); - #endif - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_init(mp_sys_argv, 0); - - #if MICROPY_MODULE_FROZEN - pyexec_frozen_module("main.py"); - #endif - - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - printf("soft reboot\n"); - goto soft_reset; - - return 0; -} - -void gc_collect(void) { - // WARNING: This gc_collect implementation doesn't try to get root - // pointers from CPU registers, and thus may function incorrectly. - void *dummy; - gc_collect_start(); - gc_collect_root(&dummy, ((mp_uint_t)stack_top - (mp_uint_t)&dummy) / sizeof(mp_uint_t)); - gc_collect_end(); - //gc_dump_info(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -NORETURN void nlr_jump_fail(void *val) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif diff --git a/ports/zephyr/make-bin-testsuite b/ports/zephyr/make-bin-testsuite deleted file mode 100755 index f6aeb83f8a..0000000000 --- a/ports/zephyr/make-bin-testsuite +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/sh -# -# This is a wrapper for make to build a binary with builtin testsuite. -# It should be run just like make (i.e. extra vars can be passed on the -# command line, etc.), e.g.: -# -# ./make-bin-testsuite BOARD=qemu_cortex_m3 -# ./make-bin-testsuite BOARD=qemu_cortex_m3 run -# - -(cd ../../tests; ./run-tests --write-exp) -(cd ../../tests; ./run-tests --list-tests --target=minimal \ - -e async -e intbig -e int_big -e builtin_help -e memstats -e bytes_compare3 -e class_reverse_op \ - -e /set -e frozenset -e complex -e const -e native -e viper \ - -e 'float_divmod\.' -e float_parse_doubleprec -e float/true_value -e float/types \ - | ../tools/tinytest-codegen.py --stdin) > bin-testsuite.c - -make \ - CFLAGS_EXTRA='-DMP_CONFIGFILE="" -DTEST=\"bin-testsuite.c\" -DNO_FORKING' \ - "$@" diff --git a/ports/zephyr/make-minimal b/ports/zephyr/make-minimal deleted file mode 100755 index 1fc143e4d6..0000000000 --- a/ports/zephyr/make-minimal +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh -# -# This is a wrapper for make to build a "minimal" Zephyr port. -# It should be run just like make (i.e. extra vars can be passed on the -# command line, etc.), e.g.: -# -# ./make-minimal BOARD=qemu_cortex_m3 -# ./make-minimal BOARD=qemu_cortex_m3 run -# - -make \ - CONF_FILE=prj_minimal.conf \ - CFLAGS_EXTRA='-DMP_CONFIGFILE=""' \ - FROZEN_DIR= \ - QEMU_NET=0 \ - "$@" diff --git a/ports/zephyr/makeprj.py b/ports/zephyr/makeprj.py deleted file mode 100644 index 239c877cd6..0000000000 --- a/ports/zephyr/makeprj.py +++ /dev/null @@ -1,29 +0,0 @@ -#!/usr/bin/env python3 -import sys -import os -import hashlib - - -def hash_file(fname): - if not os.path.exists(fname): - return b"" - hasher = hashlib.md5() - with open(fname, "rb") as f: - hasher.update(f.read()) - return hasher.digest() - - -old_digest = hash_file(sys.argv[3]) - -with open(sys.argv[3] + ".tmp", "wb") as f: - f.write(open(sys.argv[1], "rb").read()) - if os.path.exists(sys.argv[2]): - f.write(open(sys.argv[2], "rb").read()) - -new_digest = hash_file(sys.argv[3] + ".tmp") - -if new_digest != old_digest: - print("Replacing") - os.rename(sys.argv[3] + ".tmp", sys.argv[3]) -else: - os.remove(sys.argv[3] + ".tmp") diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c deleted file mode 100644 index 5909c37d6f..0000000000 --- a/ports/zephyr/modmachine.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/obj.h" -#include "py/runtime.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "modmachine.h" - -#if MICROPY_PY_MACHINE - -STATIC mp_obj_t machine_reset(void) { - sys_reboot(SYS_REBOOT_COLD); - // Won't get here, Zephyr has infiniloop on its side - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_reset_cause(void) { - printf("Warning: %s is not implemented\n", __func__); - return MP_OBJ_NEW_SMALL_INT(42); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - #ifdef CONFIG_REBOOT - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - #endif - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - - // reset causes - /*{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) },*/ -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - -#endif // MICROPY_PY_MACHINE diff --git a/ports/zephyr/modmachine.h b/ports/zephyr/modmachine.h deleted file mode 100644 index 84e4d10a88..0000000000 --- a/ports/zephyr/modmachine.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H -#define MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H - -#include "py/obj.h" - -extern const mp_obj_type_t machine_pin_type; - -MP_DECLARE_CONST_FUN_OBJ_0(machine_info_obj); - -typedef struct _machine_pin_obj_t { - mp_obj_base_t base; - struct device *port; - uint32_t pin; -} machine_pin_obj_t; - -#endif // MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H diff --git a/ports/zephyr/modusocket.c b/ports/zephyr/modusocket.c deleted file mode 100644 index 84d6fa7297..0000000000 --- a/ports/zephyr/modusocket.c +++ /dev/null @@ -1,468 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#ifdef MICROPY_PY_USOCKET - -#include "py/runtime.h" -#include "py/stream.h" - -#include -#include -// Zephyr's generated version header -#include -#include -#include -#include -#ifdef CONFIG_NET_SOCKETS -#include -#endif - -#define DEBUG_PRINT 0 -#if DEBUG_PRINT // print debugging info -#define DEBUG_printf printf -#else // don't print debugging info -#define DEBUG_printf(...) (void)0 -#endif - -typedef struct _socket_obj_t { - mp_obj_base_t base; - int ctx; - - #define STATE_NEW 0 - #define STATE_CONNECTING 1 - #define STATE_CONNECTED 2 - #define STATE_PEER_CLOSED 3 - int8_t state; -} socket_obj_t; - -STATIC const mp_obj_type_t socket_type; - -// Helper functions - -#define RAISE_ERRNO(x) { int _err = x; if (_err < 0) mp_raise_OSError(-_err); } -#define RAISE_SOCK_ERRNO(x) { if ((int)(x) == -1) mp_raise_OSError(errno); } - -STATIC void socket_check_closed(socket_obj_t *socket) { - if (socket->ctx == -1) { - // already closed - mp_raise_OSError(EBADF); - } -} - -STATIC void parse_inet_addr(socket_obj_t *socket, mp_obj_t addr_in, struct sockaddr *sockaddr) { - // We employ the fact that port and address offsets are the same for IPv4 & IPv6 - struct sockaddr_in *sockaddr_in = (struct sockaddr_in*)sockaddr; - - mp_obj_t *addr_items; - mp_obj_get_array_fixed_n(addr_in, 2, &addr_items); - sockaddr_in->sin_family = net_context_get_family((void*)socket->ctx); - RAISE_ERRNO(net_addr_pton(sockaddr_in->sin_family, mp_obj_str_get_str(addr_items[0]), &sockaddr_in->sin_addr)); - sockaddr_in->sin_port = htons(mp_obj_get_int(addr_items[1])); -} - -STATIC mp_obj_t format_inet_addr(struct sockaddr *addr, mp_obj_t port) { - // We employ the fact that port and address offsets are the same for IPv4 & IPv6 - struct sockaddr_in6 *sockaddr_in6 = (struct sockaddr_in6*)addr; - char buf[40]; - net_addr_ntop(addr->sa_family, &sockaddr_in6->sin6_addr, buf, sizeof(buf)); - mp_obj_tuple_t *tuple = mp_obj_new_tuple(addr->sa_family == AF_INET ? 2 : 4, NULL); - - tuple->items[0] = mp_obj_new_str(buf, strlen(buf)); - // We employ the fact that port offset is the same for IPv4 & IPv6 - // not filled in - //tuple->items[1] = mp_obj_new_int(ntohs(((struct sockaddr_in*)addr)->sin_port)); - tuple->items[1] = port; - - if (addr->sa_family == AF_INET6) { - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); // flow_info - tuple->items[3] = MP_OBJ_NEW_SMALL_INT(sockaddr_in6->sin6_scope_id); - } - - return MP_OBJ_FROM_PTR(tuple); -} - -socket_obj_t *socket_new(void) { - socket_obj_t *socket = m_new_obj_with_finaliser(socket_obj_t); - socket->base.type = (mp_obj_t)&socket_type; - socket->state = STATE_NEW; - return socket; -} - -// Methods - -STATIC void socket_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - socket_obj_t *self = self_in; - if (self->ctx == -1) { - mp_printf(print, ""); - } else { - struct net_context *ctx = (void*)self->ctx; - mp_printf(print, "", ctx, net_context_get_type(ctx)); - } -} - -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 4, false); - - socket_obj_t *socket = socket_new(); - - int family = AF_INET; - int socktype = SOCK_STREAM; - int proto = -1; - - if (n_args >= 1) { - family = mp_obj_get_int(args[0]); - if (n_args >= 2) { - socktype = mp_obj_get_int(args[1]); - if (n_args >= 3) { - proto = mp_obj_get_int(args[2]); - } - } - } - - if (proto == -1) { - proto = IPPROTO_TCP; - if (socktype != SOCK_STREAM) { - proto = IPPROTO_UDP; - } - } - - socket->ctx = zsock_socket(family, socktype, proto); - RAISE_SOCK_ERRNO(socket->ctx); - - return MP_OBJ_FROM_PTR(socket); -} - -STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - struct sockaddr sockaddr; - parse_inet_addr(socket, addr_in, &sockaddr); - - int res = zsock_bind(socket->ctx, &sockaddr, sizeof(sockaddr)); - RAISE_SOCK_ERRNO(res); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - struct sockaddr sockaddr; - parse_inet_addr(socket, addr_in, &sockaddr); - - int res = zsock_connect(socket->ctx, &sockaddr, sizeof(sockaddr)); - RAISE_SOCK_ERRNO(res); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -STATIC mp_obj_t socket_listen(mp_obj_t self_in, mp_obj_t backlog_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - mp_int_t backlog = mp_obj_get_int(backlog_in); - int res = zsock_listen(socket->ctx, backlog); - RAISE_SOCK_ERRNO(res); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_listen_obj, socket_listen); - -STATIC mp_obj_t socket_accept(mp_obj_t self_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - struct sockaddr sockaddr; - socklen_t addrlen = sizeof(sockaddr); - int ctx = zsock_accept(socket->ctx, &sockaddr, &addrlen); - - socket_obj_t *socket2 = socket_new(); - socket2->ctx = ctx; - - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = MP_OBJ_FROM_PTR(socket2); - // TODO - client->items[1] = mp_const_none; - - return MP_OBJ_FROM_PTR(client); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -STATIC mp_uint_t sock_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - socket_obj_t *socket = self_in; - if (socket->ctx == -1) { - // already closed - *errcode = EBADF; - return MP_STREAM_ERROR; - } - - ssize_t len = zsock_send(socket->ctx, buf, size, 0); - if (len == -1) { - *errcode = errno; - return MP_STREAM_ERROR; - } - - return len; -} - -STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - int err = 0; - mp_uint_t len = sock_write(self_in, bufinfo.buf, bufinfo.len, &err); - if (len == MP_STREAM_ERROR) { - mp_raise_OSError(err); - } - return mp_obj_new_int_from_uint(len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -STATIC mp_uint_t sock_read(mp_obj_t self_in, void *buf, mp_uint_t max_len, int *errcode) { - socket_obj_t *socket = self_in; - if (socket->ctx == -1) { - // already closed - *errcode = EBADF; - return MP_STREAM_ERROR; - } - - ssize_t recv_len = zsock_recv(socket->ctx, buf, max_len, 0); - if (recv_len == -1) { - *errcode = errno; - return MP_STREAM_ERROR; - } - - return recv_len; -} - -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - mp_int_t max_len = mp_obj_get_int(len_in); - vstr_t vstr; - // +1 to accommodate for trailing \0 - vstr_init_len(&vstr, max_len + 1); - - int err; - mp_uint_t len = sock_read(self_in, vstr.buf, max_len, &err); - - if (len == MP_STREAM_ERROR) { - vstr_clear(&vstr); - mp_raise_OSError(err); - } - - if (len == 0) { - vstr_clear(&vstr); - return mp_const_empty_bytes; - } - - vstr.len = len; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - (void)n_args; // always 4 - mp_warning("setsockopt() not implemented"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -STATIC mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) { - (void)n_args; - return args[0]; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 3, socket_makefile); - -STATIC mp_uint_t sock_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, int *errcode) { - socket_obj_t *socket = o_in; - (void)arg; - switch (request) { - case MP_STREAM_CLOSE: - if (socket->ctx != -1) { - int res = zsock_close(socket->ctx); - RAISE_SOCK_ERRNO(res); - if (res == -1) { - *errcode = errno; - return MP_STREAM_ERROR; - } - socket->ctx = -1; - } - return 0; - - default: - *errcode = MP_EINVAL; - return MP_STREAM_ERROR; - } -} - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_makefile), MP_ROM_PTR(&socket_makefile_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -STATIC const mp_stream_p_t socket_stream_p = { - .read = sock_read, - .write = sock_write, - .ioctl = sock_ioctl, -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .print = socket_print, - .make_new = socket_make_new, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -// -// getaddrinfo() implementation -// - -typedef struct _getaddrinfo_state_t { - mp_obj_t result; - struct k_sem sem; - mp_obj_t port; - int status; -} getaddrinfo_state_t; - -void dns_resolve_cb(enum dns_resolve_status status, struct dns_addrinfo *info, void *user_data) { - getaddrinfo_state_t *state = user_data; - DEBUG_printf("dns status: %d\n", status); - - if (info == NULL) { - if (status == DNS_EAI_ALLDONE) { - status = 0; - } - state->status = status; - k_sem_give(&state->sem); - return; - } - - mp_obj_tuple_t *tuple = mp_obj_new_tuple(5, NULL); - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(info->ai_family); - // info->ai_socktype not filled - tuple->items[1] = MP_OBJ_NEW_SMALL_INT(SOCK_STREAM); - // info->ai_protocol not filled - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(IPPROTO_TCP); - tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); - tuple->items[4] = format_inet_addr(&info->ai_addr, state->port); - mp_obj_list_append(state->result, MP_OBJ_FROM_PTR(tuple)); -} - -STATIC mp_obj_t mod_getaddrinfo(size_t n_args, const mp_obj_t *args) { - mp_obj_t host_in = args[0], port_in = args[1]; - const char *host = mp_obj_str_get_str(host_in); - mp_int_t family = 0; - if (n_args > 2) { - family = mp_obj_get_int(args[2]); - } - - getaddrinfo_state_t state; - // Just validate that it's int - (void)mp_obj_get_int(port_in); - state.port = port_in; - state.result = mp_obj_new_list(0, NULL); - k_sem_init(&state.sem, 0, UINT_MAX); - - for (int i = 2; i--;) { - int type = (family != AF_INET6 ? DNS_QUERY_TYPE_A : DNS_QUERY_TYPE_AAAA); - RAISE_ERRNO(dns_get_addr_info(host, type, NULL, dns_resolve_cb, &state, 3000)); - k_sem_take(&state.sem, K_FOREVER); - if (family != 0) { - break; - } - family = AF_INET6; - } - - // Raise error only if there's nothing to return, otherwise - // it may be IPv4 vs IPv6 differences. - mp_int_t len = MP_OBJ_SMALL_INT_VALUE(mp_obj_len(state.result)); - if (state.status != 0 && len == 0) { - mp_raise_OSError(state.status); - } - - return state.result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_getaddrinfo_obj, 2, 3, mod_getaddrinfo); - - -STATIC mp_obj_t pkt_get_info(void) { - struct k_mem_slab *rx, *tx; - struct net_buf_pool *rx_data, *tx_data; - net_pkt_get_info(&rx, &tx, &rx_data, &tx_data); - mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(4, NULL)); - t->items[0] = MP_OBJ_NEW_SMALL_INT(k_mem_slab_num_free_get(rx)); - t->items[1] = MP_OBJ_NEW_SMALL_INT(k_mem_slab_num_free_get(tx)); - t->items[2] = MP_OBJ_NEW_SMALL_INT(rx_data->avail_count); - t->items[3] = MP_OBJ_NEW_SMALL_INT(tx_data->avail_count); - return MP_OBJ_FROM_PTR(t); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pkt_get_info_obj, pkt_get_info); - -STATIC const mp_rom_map_elem_t mp_module_usocket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - // objects - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, - // class constants - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(AF_INET) }, - { MP_ROM_QSTR(MP_QSTR_AF_INET6), MP_ROM_INT(AF_INET6) }, - - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(SOCK_DGRAM) }, - - { MP_ROM_QSTR(MP_QSTR_SOL_SOCKET), MP_ROM_INT(1) }, - { MP_ROM_QSTR(MP_QSTR_SO_REUSEADDR), MP_ROM_INT(2) }, - - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&mod_getaddrinfo_obj) }, - { MP_ROM_QSTR(MP_QSTR_pkt_get_info), MP_ROM_PTR(&pkt_get_info_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_usocket_globals, mp_module_usocket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_usocket_globals, -}; - -#endif // MICROPY_PY_USOCKET diff --git a/ports/zephyr/modutime.c b/ports/zephyr/modutime.c deleted file mode 100644 index a5d32fe665..0000000000 --- a/ports/zephyr/modutime.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#if MICROPY_PY_UTIME - -#include - -#include "py/runtime.h" -#include "py/smallint.h" -#include "py/mphal.h" -#include "extmod/utime_mphal.h" - -STATIC mp_obj_t mod_time_time(void) { - /* The absence of FP support is deliberate. The Zephyr port uses - * single precision floats so the fraction component will start to - * lose precision on devices with a long uptime. - */ - return mp_obj_new_int(k_uptime_get() / 1000); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_time_time_obj, mod_time_time); - -STATIC const mp_rom_map_elem_t mp_module_time_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mod_time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_time_globals, mp_module_time_globals_table); - -const mp_obj_module_t mp_module_time = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_time_globals, -}; - -#endif // MICROPY_PY_UTIME diff --git a/ports/zephyr/modzephyr.c b/ports/zephyr/modzephyr.c deleted file mode 100644 index 265fc882dc..0000000000 --- a/ports/zephyr/modzephyr.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#if MICROPY_PY_ZEPHYR - -#include -#include - -#include "py/runtime.h" - -STATIC mp_obj_t mod_is_preempt_thread(void) { - return mp_obj_new_bool(k_is_preempt_thread()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_is_preempt_thread_obj, mod_is_preempt_thread); - -STATIC mp_obj_t mod_current_tid(void) { - return MP_OBJ_NEW_SMALL_INT(k_current_get()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_current_tid_obj, mod_current_tid); - -STATIC mp_obj_t mod_stacks_analyze(void) { - k_call_stacks_analyze(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_stacks_analyze_obj, mod_stacks_analyze); - -#ifdef CONFIG_NET_SHELL - -//int net_shell_cmd_iface(int argc, char *argv[]); - -STATIC mp_obj_t mod_shell_net_iface(void) { - net_shell_cmd_iface(0, NULL); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_shell_net_iface_obj, mod_shell_net_iface); - -#endif // CONFIG_NET_SHELL - -STATIC const mp_rom_map_elem_t mp_module_time_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_zephyr) }, - { MP_ROM_QSTR(MP_QSTR_is_preempt_thread), MP_ROM_PTR(&mod_is_preempt_thread_obj) }, - { MP_ROM_QSTR(MP_QSTR_current_tid), MP_ROM_PTR(&mod_current_tid_obj) }, - { MP_ROM_QSTR(MP_QSTR_stacks_analyze), MP_ROM_PTR(&mod_stacks_analyze_obj) }, - - #ifdef CONFIG_NET_SHELL - { MP_ROM_QSTR(MP_QSTR_shell_net_iface), MP_ROM_PTR(&mod_shell_net_iface_obj) }, - #endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_time_globals, mp_module_time_globals_table); - -const mp_obj_module_t mp_module_zephyr = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_time_globals, -}; - -#endif // MICROPY_PY_ZEPHYR diff --git a/ports/zephyr/modzsensor.c b/ports/zephyr/modzsensor.c deleted file mode 100644 index 74c909d167..0000000000 --- a/ports/zephyr/modzsensor.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" - -#include -#include - -#if MICROPY_PY_ZSENSOR - -typedef struct _mp_obj_sensor_t { - mp_obj_base_t base; - struct device *dev; -} mp_obj_sensor_t; - -STATIC mp_obj_t sensor_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - mp_obj_sensor_t *o = m_new_obj(mp_obj_sensor_t); - o->base.type = type; - o->dev = device_get_binding(mp_obj_str_get_str(args[0])); - if (o->dev == NULL) { - mp_raise_ValueError("dev not found"); - } - return MP_OBJ_FROM_PTR(o); -} - -STATIC mp_obj_t sensor_measure(mp_obj_t self_in) { - mp_obj_sensor_t *self = MP_OBJ_TO_PTR(self_in); - int st = sensor_sample_fetch(self->dev); - if (st != 0) { - mp_raise_OSError(-st); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(sensor_measure_obj, sensor_measure); - -STATIC void sensor_get_internal(mp_obj_t self_in, mp_obj_t channel_in, struct sensor_value *res) { - mp_obj_sensor_t *self = MP_OBJ_TO_PTR(self_in); - - int st = sensor_channel_get(self->dev, mp_obj_get_int(channel_in), res); - if (st != 0) { - mp_raise_OSError(-st); - } -} - -STATIC mp_obj_t sensor_get_float(mp_obj_t self_in, mp_obj_t channel_in) { - struct sensor_value val; - sensor_get_internal(self_in, channel_in, &val); - return mp_obj_new_float(val.val1 + (mp_float_t)val.val2 / 1000000); -} -MP_DEFINE_CONST_FUN_OBJ_2(sensor_get_float_obj, sensor_get_float); - -STATIC mp_obj_t sensor_get_micros(mp_obj_t self_in, mp_obj_t channel_in) { - struct sensor_value val; - sensor_get_internal(self_in, channel_in, &val); - return MP_OBJ_NEW_SMALL_INT(val.val1 * 1000000 + val.val2); -} -MP_DEFINE_CONST_FUN_OBJ_2(sensor_get_micros_obj, sensor_get_micros); - -STATIC mp_obj_t sensor_get_millis(mp_obj_t self_in, mp_obj_t channel_in) { - struct sensor_value val; - sensor_get_internal(self_in, channel_in, &val); - return MP_OBJ_NEW_SMALL_INT(val.val1 * 1000 + val.val2 / 1000); -} -MP_DEFINE_CONST_FUN_OBJ_2(sensor_get_millis_obj, sensor_get_millis); - -STATIC mp_obj_t sensor_get_int(mp_obj_t self_in, mp_obj_t channel_in) { - struct sensor_value val; - sensor_get_internal(self_in, channel_in, &val); - return MP_OBJ_NEW_SMALL_INT(val.val1); -} -MP_DEFINE_CONST_FUN_OBJ_2(sensor_get_int_obj, sensor_get_int); - -STATIC const mp_rom_map_elem_t sensor_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_measure), MP_ROM_PTR(&sensor_measure_obj) }, - { MP_ROM_QSTR(MP_QSTR_get_float), MP_ROM_PTR(&sensor_get_float_obj) }, - { MP_ROM_QSTR(MP_QSTR_get_micros), MP_ROM_PTR(&sensor_get_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_get_millis), MP_ROM_PTR(&sensor_get_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_get_int), MP_ROM_PTR(&sensor_get_int_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(sensor_locals_dict, sensor_locals_dict_table); - -STATIC const mp_obj_type_t sensor_type = { - { &mp_type_type }, - .name = MP_QSTR_Sensor, - .make_new = sensor_make_new, - .locals_dict = (void*)&sensor_locals_dict, -}; - -STATIC const mp_rom_map_elem_t mp_module_zsensor_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_zsensor) }, - { MP_ROM_QSTR(MP_QSTR_Sensor), MP_ROM_PTR(&sensor_type) }, - -#define C(name) { MP_ROM_QSTR(MP_QSTR_ ## name), MP_ROM_INT(SENSOR_CHAN_ ## name) } - C(ACCEL_X), - C(ACCEL_Y), - C(ACCEL_Z), - C(GYRO_X), - C(GYRO_Y), - C(GYRO_Z), - C(MAGN_X), - C(MAGN_Y), - C(MAGN_Z), - C(TEMP), - C(PRESS), - C(PROX), - C(HUMIDITY), - C(LIGHT), - C(ALTITUDE), -#undef C -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_zsensor_globals, mp_module_zsensor_globals_table); - -const mp_obj_module_t mp_module_zsensor = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_zsensor_globals, -}; - -#endif //MICROPY_PY_UHASHLIB diff --git a/ports/zephyr/mpconfigport.h b/ports/zephyr/mpconfigport.h deleted file mode 100644 index 1ac1c35013..0000000000 --- a/ports/zephyr/mpconfigport.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include - -// Include Zephyr's autoconf.h, which should be made first by Zephyr makefiles -#include "autoconf.h" -// Included here to get basic Zephyr environment (macros, etc.) -#include - -// Usually passed from Makefile -#ifndef MICROPY_HEAP_SIZE -#define MICROPY_HEAP_SIZE (16 * 1024) -#endif - -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FILTER (0) -#define MICROPY_PY_BUILTINS_MIN_MAX (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_BUILTINS_RANGE_ATTRS (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT zephyr_help_text -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_PY_STRUCT (0) -#ifdef CONFIG_NETWORKING -// If we have networking, we likely want errno comfort -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_USOCKET (1) -#endif -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UTIME (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_ZEPHYR (1) -#define MICROPY_PY_ZSENSOR (1) -#define MICROPY_PY_SYS_MODULES (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_LONGLONG) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_PY_BUILTINS_COMPLEX (0) - -// Saving extra crumbs to make sure binary fits in 128K -#define MICROPY_COMP_CONST_FOLDING (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) - -#define MICROPY_PY_SYS_PLATFORM "zephyr" - -#ifdef CONFIG_BOARD -#define MICROPY_HW_BOARD_NAME "zephyr-" CONFIG_BOARD -#else -#define MICROPY_HW_BOARD_NAME "zephyr-generic" -#endif - -#ifdef CONFIG_SOC -#define MICROPY_HW_MCU_NAME CONFIG_SOC -#else -#define MICROPY_HW_MCU_NAME "unknown-cpu" -#endif - -#define MICROPY_MODULE_FROZEN_STR (1) - -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; - -extern const struct _mp_obj_module_t mp_module_machine; -extern const struct _mp_obj_module_t mp_module_time; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_zephyr; -extern const struct _mp_obj_module_t mp_module_zsensor; - -#if MICROPY_PY_USOCKET -#define MICROPY_PY_USOCKET_DEF { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) }, -#define MICROPY_PY_USOCKET_WEAK_DEF { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_usocket) }, -#else -#define MICROPY_PY_USOCKET_DEF -#define MICROPY_PY_USOCKET_WEAK_DEF -#endif - -#if MICROPY_PY_UTIME -#define MICROPY_PY_UTIME_DEF { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_time) }, -#else -#define MICROPY_PY_UTIME_DEF -#endif - -#if MICROPY_PY_ZEPHYR -#define MICROPY_PY_ZEPHYR_DEF { MP_ROM_QSTR(MP_QSTR_zephyr), MP_ROM_PTR(&mp_module_zephyr) }, -#else -#define MICROPY_PY_ZEPHYR_DEF -#endif - -#if MICROPY_PY_ZSENSOR -#define MICROPY_PY_ZSENSOR_DEF { MP_ROM_QSTR(MP_QSTR_zsensor), MP_ROM_PTR(&mp_module_zsensor) }, -#else -#define MICROPY_PY_ZSENSOR_DEF -#endif - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&mp_module_machine) }, \ - MICROPY_PY_USOCKET_DEF \ - MICROPY_PY_UTIME_DEF \ - MICROPY_PY_ZEPHYR_DEF \ - MICROPY_PY_ZSENSOR_DEF \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mp_module_time) }, \ - MICROPY_PY_USOCKET_WEAK_DEF \ - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - diff --git a/ports/zephyr/mpconfigport_bin_testsuite.h b/ports/zephyr/mpconfigport_bin_testsuite.h deleted file mode 100644 index 684b4f41c2..0000000000 --- a/ports/zephyr/mpconfigport_bin_testsuite.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "mpconfigport.h" - -#ifdef TEST -#include "lib/upytesthelper/upytesthelper.h" -#define MP_PLAT_PRINT_STRN(str, len) upytest_output(str, len) -#endif diff --git a/ports/zephyr/mpconfigport_minimal.h b/ports/zephyr/mpconfigport_minimal.h deleted file mode 100644 index f0e57d7566..0000000000 --- a/ports/zephyr/mpconfigport_minimal.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include - -// Include Zephyr's autoconf.h, which should be made first by Zephyr makefiles -#include "autoconf.h" -// Included here to get basic Zephyr environment (macros, etc.) -#include - -// Usually passed from Makefile -#ifndef MICROPY_HEAP_SIZE -#define MICROPY_HEAP_SIZE (16 * 1024) -#endif - -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FILTER (0) -#define MICROPY_PY_BUILTINS_MIN_MAX (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_BUILTINS_RANGE_ATTRS (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS_MODULES (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_LONGLONG) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_PY_BUILTINS_COMPLEX (0) - -// Saving extra crumbs to make sure binary fits in 128K -#define MICROPY_COMP_CONST_FOLDING (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) - -#ifdef CONFIG_BOARD -#define MICROPY_HW_BOARD_NAME "zephyr-" CONFIG_BOARD -#else -#define MICROPY_HW_BOARD_NAME "zephyr-generic" -#endif - -#ifdef CONFIG_SOC -#define MICROPY_HW_MCU_NAME CONFIG_SOC -#else -#define MICROPY_HW_MCU_NAME "unknown-cpu" -#endif - -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; diff --git a/ports/zephyr/mphalport.h b/ports/zephyr/mphalport.h deleted file mode 100644 index e3cca8d37d..0000000000 --- a/ports/zephyr/mphalport.h +++ /dev/null @@ -1,25 +0,0 @@ -#include -#include "lib/utils/interrupt_char.h" - -static inline mp_uint_t mp_hal_ticks_us(void) { - return SYS_CLOCK_HW_CYCLES_TO_NS(k_cycle_get_32()) / 1000; -} - -static inline mp_uint_t mp_hal_ticks_ms(void) { - return k_uptime_get(); -} - -static inline mp_uint_t mp_hal_ticks_cpu(void) { - // ticks_cpu() is defined as using the highest-resolution timing source - // in the system. This is usually a CPU clock, but doesn't have to be, - // here we just use Zephyr hi-res timer. - return k_cycle_get_32(); -} - -static inline void mp_hal_delay_us(mp_uint_t delay) { - k_busy_wait(delay); -} - -static inline void mp_hal_delay_ms(mp_uint_t delay) { - k_sleep(delay); -} diff --git a/ports/zephyr/prj_96b_carbon.conf b/ports/zephyr/prj_96b_carbon.conf deleted file mode 100644 index 40b57e69c9..0000000000 --- a/ports/zephyr/prj_96b_carbon.conf +++ /dev/null @@ -1,2 +0,0 @@ -# TODO: Enable networking -CONFIG_NETWORKING=y diff --git a/ports/zephyr/prj_base.conf b/ports/zephyr/prj_base.conf deleted file mode 100644 index c39779548f..0000000000 --- a/ports/zephyr/prj_base.conf +++ /dev/null @@ -1,66 +0,0 @@ -CONFIG_BUILD_OUTPUT_BIN=y -CONFIG_REBOOT=y - -CONFIG_STDOUT_CONSOLE=y -CONFIG_CONSOLE_HANDLER=y -CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS=y - -CONFIG_CONSOLE_PULL=y -CONFIG_CONSOLE_GETCHAR=y -CONFIG_CONSOLE_GETCHAR_BUFSIZE=128 -CONFIG_CONSOLE_PUTCHAR_BUFSIZE=128 - -CONFIG_NEWLIB_LIBC=y -CONFIG_FLOAT=y -CONFIG_MAIN_STACK_SIZE=4736 - -# Enable sensor subsystem (doesn't add code if not used). -# Specific sensors should be enabled per-board. -CONFIG_SENSOR=y - -# Networking config -CONFIG_NETWORKING=y -CONFIG_NET_IPV4=y -CONFIG_NET_IPV6=y -CONFIG_NET_UDP=y -CONFIG_NET_TCP=y -CONFIG_NET_SOCKETS=y -CONFIG_TEST_RANDOM_GENERATOR=y -CONFIG_NET_NBUF_RX_COUNT=5 - -CONFIG_NET_APP_SETTINGS=y -CONFIG_NET_APP_INIT_TIMEOUT=3 -CONFIG_NET_APP_NEED_IPV6=y -CONFIG_NET_APP_NEED_IPV4=y - -# DNS -CONFIG_DNS_RESOLVER=y -CONFIG_DNS_RESOLVER_ADDITIONAL_QUERIES=2 -CONFIG_DNS_SERVER_IP_ADDRESSES=y - -# Static IP addresses -CONFIG_NET_APP_MY_IPV6_ADDR="2001:db8::1" -CONFIG_NET_APP_MY_IPV4_ADDR="192.0.2.1" -CONFIG_NET_APP_MY_IPV4_GW="192.0.2.2" -CONFIG_DNS_SERVER1="192.0.2.2" - -# DHCP configuration. Until DHCP address is assigned, -# static configuration above is used instead. -CONFIG_NET_DHCPV4=y - -# Diagnostics and debugging - -# Required for zephyr.stack_analyze() -CONFIG_INIT_STACKS=y - -# Required for usocket.pkt_get_info() -CONFIG_NET_BUF_POOL_USAGE=y - -# Required for usocket.shell_*() -#CONFIG_NET_SHELL=y - -# Uncomment to enable "INFO" level net_buf logging -#CONFIG_NET_LOG=y -#CONFIG_NET_DEBUG_NET_BUF=y -# Change to 4 for "DEBUG" level -#CONFIG_SYS_LOG_NET_LEVEL=3 diff --git a/ports/zephyr/prj_disco_l475_iot1.conf b/ports/zephyr/prj_disco_l475_iot1.conf deleted file mode 100644 index 36c8b99ddb..0000000000 --- a/ports/zephyr/prj_disco_l475_iot1.conf +++ /dev/null @@ -1,5 +0,0 @@ -# Sensors -CONFIG_HTS221=y -CONFIG_LIS3MDL=y -CONFIG_LPS22HB=y -CONFIG_LSM6DSL=y diff --git a/ports/zephyr/prj_frdm_k64f.conf b/ports/zephyr/prj_frdm_k64f.conf deleted file mode 100644 index 611d6bc0a4..0000000000 --- a/ports/zephyr/prj_frdm_k64f.conf +++ /dev/null @@ -1,2 +0,0 @@ -# Networking drivers -CONFIG_NET_L2_ETHERNET=y diff --git a/ports/zephyr/prj_minimal.conf b/ports/zephyr/prj_minimal.conf deleted file mode 100644 index 5d6b353ba3..0000000000 --- a/ports/zephyr/prj_minimal.conf +++ /dev/null @@ -1,6 +0,0 @@ -CONFIG_STDOUT_CONSOLE=y -CONFIG_CONSOLE_HANDLER=y -CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS=y -CONFIG_NEWLIB_LIBC=y -CONFIG_FLOAT=y -CONFIG_MAIN_STACK_SIZE=4096 diff --git a/ports/zephyr/prj_qemu_cortex_m3.conf b/ports/zephyr/prj_qemu_cortex_m3.conf deleted file mode 100644 index 1ade981e21..0000000000 --- a/ports/zephyr/prj_qemu_cortex_m3.conf +++ /dev/null @@ -1,7 +0,0 @@ -# Interrupt-driven UART console has emulation artifacts under QEMU, -# disable it -CONFIG_CONSOLE_PULL=n - -# Networking drivers -# SLIP driver for QEMU -CONFIG_NET_SLIP_TAP=y diff --git a/ports/zephyr/prj_qemu_x86.conf b/ports/zephyr/prj_qemu_x86.conf deleted file mode 100644 index 9bc81259a2..0000000000 --- a/ports/zephyr/prj_qemu_x86.conf +++ /dev/null @@ -1,10 +0,0 @@ -# Interrupt-driven UART console has emulation artifacts under QEMU, -# disable it -CONFIG_CONSOLE_PULL=n - -# Networking drivers -# SLIP driver for QEMU -CONFIG_NET_SLIP_TAP=y - -# Default RAM easily overflows with uPy and networking -CONFIG_RAM_SIZE=320 diff --git a/ports/zephyr/src/Makefile b/ports/zephyr/src/Makefile deleted file mode 100644 index 36dd8c64ef..0000000000 --- a/ports/zephyr/src/Makefile +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2016 Intel Corporation -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -obj-y += zephyr_start.o zephyr_getchar.o diff --git a/ports/zephyr/src/zephyr_getchar.c b/ports/zephyr/src/zephyr_getchar.c deleted file mode 100644 index 52b3394d03..0000000000 --- a/ports/zephyr/src/zephyr_getchar.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (c) 2016 Linaro - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include -#include -#include "zephyr_getchar.h" - -extern int mp_interrupt_char; -void mp_keyboard_interrupt(void); - -static struct k_sem uart_sem; -#define UART_BUFSIZE 256 -static uint8_t uart_ringbuf[UART_BUFSIZE]; -static uint8_t i_get, i_put; - -static int console_irq_input_hook(uint8_t ch) -{ - int i_next = (i_put + 1) & (UART_BUFSIZE - 1); - if (i_next == i_get) { - printk("UART buffer overflow - char dropped\n"); - return 1; - } - if (ch == mp_interrupt_char) { - mp_keyboard_interrupt(); - return 1; - } else { - uart_ringbuf[i_put] = ch; - i_put = i_next; - } - //printk("%x\n", ch); - k_sem_give(&uart_sem); - k_yield(); - return 1; -} - -uint8_t zephyr_getchar(void) { - k_sem_take(&uart_sem, K_FOREVER); - unsigned int key = irq_lock(); - uint8_t c = uart_ringbuf[i_get++]; - i_get &= UART_BUFSIZE - 1; - irq_unlock(key); - return c; -} - -void zephyr_getchar_init(void) { - k_sem_init(&uart_sem, 0, UINT_MAX); - uart_console_in_debug_hook_install(console_irq_input_hook); - // All NULLs because we're interested only in the callback above - uart_register_input(NULL, NULL, NULL); -} diff --git a/ports/zephyr/src/zephyr_getchar.h b/ports/zephyr/src/zephyr_getchar.h deleted file mode 100644 index fb5f19a7b4..0000000000 --- a/ports/zephyr/src/zephyr_getchar.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2016 Linaro - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include - -void zephyr_getchar_init(void); -uint8_t zephyr_getchar(void); diff --git a/ports/zephyr/uart_core.c b/ports/zephyr/uart_core.c deleted file mode 100644 index e41fb9acce..0000000000 --- a/ports/zephyr/uart_core.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include -#include "py/mpconfig.h" -#include "src/zephyr_getchar.h" -// Zephyr headers -#include -#include - -/* - * Core UART functions to implement for a port - */ - -// Receive single character -int mp_hal_stdin_rx_chr(void) { -#ifdef CONFIG_CONSOLE_PULL - return console_getchar(); -#else - return zephyr_getchar(); -#endif -} - -// Send string of given length -void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) { -#ifdef CONFIG_CONSOLE_PULL - while (len--) { - char c = *str++; - while (console_putchar(c) == -1) { - k_sleep(1); - } - } -#else - static struct device *uart_console_dev; - if (uart_console_dev == NULL) { - uart_console_dev = device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME); - } - - while (len--) { - uart_poll_out(uart_console_dev, *str++); - } -#endif -} diff --git a/ports/zephyr/z_config.mk b/ports/zephyr/z_config.mk deleted file mode 100644 index 28addd8f29..0000000000 --- a/ports/zephyr/z_config.mk +++ /dev/null @@ -1,17 +0,0 @@ -srctree = $(ZEPHYR_BASE) - -include $(Z_DOTCONFIG) -override ARCH = $(subst $(DQUOTE),,$(CONFIG_ARCH)) -SOC_NAME = $(subst $(DQUOTE),,$(CONFIG_SOC)) -SOC_SERIES = $(subst $(DQUOTE),,$(CONFIG_SOC_SERIES)) -SOC_FAMILY = $(subst $(DQUOTE),,$(CONFIG_SOC_FAMILY)) -ifeq ($(SOC_SERIES),) -SOC_PATH = $(SOC_NAME) -else -SOC_PATH = $(SOC_FAMILY)/$(SOC_SERIES) -endif - -KBUILD_CFLAGS := -c -include $(ZEPHYR_BASE)/scripts/Kbuild.include - -include $(ZEPHYR_BASE)/arch/$(ARCH)/Makefile diff --git a/py/binary.c b/py/binary.c index 6b46425cfb..2ec12fa931 100644 --- a/py/binary.c +++ b/py/binary.c @@ -184,7 +184,7 @@ long long mp_binary_get_int(mp_uint_t size, bool is_signed, bool big_endian, con val = -1; } for (uint i = 0; i < size; i++) { - val <<= 8; + val *= 256; val |= *src; src += delta; } diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index b72d753904..211e853689 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -229,12 +229,10 @@ SRC_COMMON_HAL_ALL = \ _bleio/__init__.c \ _bleio/Adapter.c \ _bleio/Attribute.c \ - _bleio/Central.c \ _bleio/Characteristic.c \ _bleio/CharacteristicBuffer.c \ + _bleio/Connection.c \ _bleio/Descriptor.c \ - _bleio/Peripheral.c \ - _bleio/Scanner.c \ _bleio/Service.c \ _bleio/UUID.c \ analogio/AnalogIn.c \ @@ -307,6 +305,7 @@ SRC_SHARED_MODULE_ALL = \ _bleio/Address.c \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ + _bleio/ScanResults.c \ _pixelbuf/PixelBuf.c \ _pixelbuf/__init__.c \ _stage/Layer.c \ diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index c5756f4880..ac79d32d04 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -52,6 +52,11 @@ ifndef CIRCUITPY_DEFAULT_BUILD endif endif +# Some features have no unique HAL component, and thus there's never +# a reason to not include them. +ifndef CIRCUITPY_ALWAYS_BUILD + CIRCUITPY_ALWAYS_BUILD = 1 +endif # All builtin modules are listed below, with default values (0 for off, 1 for on) @@ -151,7 +156,7 @@ endif CFLAGS += -DCIRCUITPY_I2CSLAVE=$(CIRCUITPY_I2CSLAVE) ifndef CIRCUITPY_MATH -CIRCUITPY_MATH = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_MATH = $(CIRCUITPY_ALWAYS_BUILD) endif CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) @@ -232,17 +237,17 @@ endif CFLAGS += -DCIRCUITPY_STORAGE=$(CIRCUITPY_STORAGE) ifndef CIRCUITPY_STRUCT -CIRCUITPY_STRUCT = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_STRUCT = $(CIRCUITPY_ALWAYS_BUILD) endif CFLAGS += -DCIRCUITPY_STRUCT=$(CIRCUITPY_STRUCT) ifndef CIRCUITPY_SUPERVISOR -CIRCUITPY_SUPERVISOR = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_SUPERVISOR = $(CIRCUITPY_ALWAYS_BUILD) endif CFLAGS += -DCIRCUITPY_SUPERVISOR=$(CIRCUITPY_SUPERVISOR) ifndef CIRCUITPY_TIME -CIRCUITPY_TIME = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_TIME = $(CIRCUITPY_ALWAYS_BUILD) endif CFLAGS += -DCIRCUITPY_TIME=$(CIRCUITPY_TIME) diff --git a/py/gc.c b/py/gc.c index 10b36950c4..ac584d5d20 100755 --- a/py/gc.c +++ b/py/gc.c @@ -509,7 +509,6 @@ void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { gc_collect(); collected = 1; GC_ENTER(); - collected = true; } #endif diff --git a/py/nlr.h b/py/nlr.h index 802f5f39a3..b442aaf8a0 100644 --- a/py/nlr.h +++ b/py/nlr.h @@ -36,33 +36,38 @@ // If MICROPY_NLR_SETJMP is not enabled then auto-detect the machine arch #if !defined(MICROPY_NLR_SETJMP) || !MICROPY_NLR_SETJMP -#define MICROPY_NLR_SETJMP (0) // A lot of nlr-related things need different treatment on Windows -#if defined(_WIN32) || defined(__CYGWIN__) -#define MICROPY_NLR_OS_WINDOWS 1 -#else -#define MICROPY_NLR_OS_WINDOWS 0 -#endif -#if defined(__i386__) - #define MICROPY_NLR_X86 (1) - #define MICROPY_NLR_NUM_REGS (6) -#elif defined(__x86_64__) - #define MICROPY_NLR_X64 (1) - #if MICROPY_NLR_OS_WINDOWS + #if defined(_WIN32) || defined(__CYGWIN__) + #define MICROPY_NLR_OS_WINDOWS 1 + #else + #define MICROPY_NLR_OS_WINDOWS 0 + #endif + #if defined(__i386__) + #define MICROPY_NLR_X86 (1) + #define MICROPY_NLR_NUM_REGS (6) + #elif defined(__x86_64__) + #define MICROPY_NLR_X64 (1) + #if MICROPY_NLR_OS_WINDOWS + #define MICROPY_NLR_NUM_REGS (10) + #else + #define MICROPY_NLR_NUM_REGS (8) + #endif + #elif defined(__thumb2__) || defined(__thumb__) || defined(__arm__) + #define MICROPY_NLR_THUMB (1) + #define MICROPY_NLR_NUM_REGS (10) + #elif defined(__xtensa__) + #define MICROPY_NLR_XTENSA (1) #define MICROPY_NLR_NUM_REGS (10) #else - #define MICROPY_NLR_NUM_REGS (8) - #endif -#elif defined(__thumb2__) || defined(__thumb__) || defined(__arm__) - #define MICROPY_NLR_THUMB (1) - #define MICROPY_NLR_NUM_REGS (10) -#elif defined(__xtensa__) - #define MICROPY_NLR_XTENSA (1) - #define MICROPY_NLR_NUM_REGS (10) -#else - #define MICROPY_NLR_SETJMP (1) + #define MICROPY_NLR_SETJMP (1) //#warning "No native NLR support for this arch, using setjmp implementation" + #endif #endif + +// If MICROPY_NLR_SETJMP is not defined above - define/disable it here + +#if !defined(MICROPY_NLR_SETJMP) + #define MICROPY_NLR_SETJMP (0) #endif #if MICROPY_NLR_SETJMP diff --git a/py/objstr.c b/py/objstr.c index 6ef9a15b5e..fde2646815 100644 --- a/py/objstr.c +++ b/py/objstr.c @@ -31,6 +31,7 @@ #include "py/unicode.h" #include "py/objstr.h" #include "py/objlist.h" +#include "py/objtype.h" #include "py/runtime.h" #include "py/stackctrl.h" @@ -226,10 +227,6 @@ STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, cons return MP_OBJ_FROM_PTR(o); } - if (n_args > 1) { - goto wrong_args; - } - if (MP_OBJ_IS_SMALL_INT(args[0])) { mp_int_t len = MP_OBJ_SMALL_INT_VALUE(args[0]); if (len < 0) { @@ -241,6 +238,17 @@ STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, cons return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); } + if (n_args > 1) { + goto wrong_args; + } + + // check if __bytes__ exists, and if so delegate to it + mp_obj_t dest[2]; + mp_load_method_maybe(args[0], MP_QSTR___bytes__, dest); + if (dest[0] != MP_OBJ_NULL) { + return mp_call_method_n_kw(0, 0, dest); + } + // check if argument has the buffer protocol mp_buffer_info_t bufinfo; if (mp_get_buffer(args[0], &bufinfo, MP_BUFFER_READ)) { diff --git a/py/objtype.c b/py/objtype.c index 5133d849fc..0212a78daa 100644 --- a/py/objtype.c +++ b/py/objtype.c @@ -336,8 +336,10 @@ mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self, size_t n_args, cons mp_obj_t *args2 = m_new(mp_obj_t, 1 + n_args + 2 * n_kw); args2[0] = MP_OBJ_FROM_PTR(self); memcpy(args2 + 1, args, n_args * sizeof(mp_obj_t)); - // copy in kwargs - memcpy(args2 + 1 + n_args, kw_args->table, 2 * n_kw * sizeof(mp_obj_t)); + if (kw_args) { + // copy in kwargs + memcpy(args2 + 1 + n_args, kw_args->table, 2 * n_kw * sizeof(mp_obj_t)); + } new_ret = mp_call_function_n_kw(init_fn[0], n_args + 1, n_kw, args2); m_del(mp_obj_t, args2, 1 + n_args + 2 * n_kw); } diff --git a/py/ringbuf.h b/py/ringbuf.h index 5f82cc0968..7fc35d2661 100644 --- a/py/ringbuf.h +++ b/py/ringbuf.h @@ -99,4 +99,11 @@ static inline void ringbuf_put_n(ringbuf_t* r, uint8_t* buf, uint8_t bufsize) } } } + +static inline void ringbuf_get_n(ringbuf_t* r, uint8_t* buf, uint8_t bufsize) +{ + for(uint8_t i=0; i < bufsize; i++) { + buf[i] = ringbuf_get(r); + } +} #endif // MICROPY_INCLUDED_PY_RINGBUF_H diff --git a/py/showbc.c b/py/showbc.c index 3deb18cd31..e71d8a2536 100644 --- a/py/showbc.c +++ b/py/showbc.c @@ -185,7 +185,7 @@ const byte *mp_bytecode_print_str(const byte *ip) { num--; } do { - num = (num << 7) | (*ip & 0x7f); + num = (num * 128) | (*ip & 0x7f); } while ((*ip++ & 0x80) != 0); printf("LOAD_CONST_SMALL_INT " INT_FMT, num); break; diff --git a/py/vm.c b/py/vm.c index b5f53ee9a0..353fc88100 100644 --- a/py/vm.c +++ b/py/vm.c @@ -758,7 +758,7 @@ unwind_jump:; } else { PUSH(value); // push the next iteration value } - DISPATCH(); + DISPATCH_WITH_PEND_EXC_CHECK(); } // matched against: SETUP_EXCEPT, SETUP_FINALLY, SETUP_WITH diff --git a/shared-bindings/_bleio/Adapter.c b/shared-bindings/_bleio/Adapter.c index 0caca96b86..a64167e5a7 100644 --- a/shared-bindings/_bleio/Adapter.c +++ b/shared-bindings/_bleio/Adapter.c @@ -25,22 +25,45 @@ * THE SOFTWARE. */ +#include + #include "py/objproperty.h" +#include "py/runtime.h" #include "shared-bindings/_bleio/Address.h" #include "shared-bindings/_bleio/Adapter.h" +#define ADV_INTERVAL_MIN (0.0020f) +#define ADV_INTERVAL_MIN_STRING "0.0020" +#define ADV_INTERVAL_MAX (10.24f) +#define ADV_INTERVAL_MAX_STRING "10.24" +// 20ms is recommended by Apple +#define ADV_INTERVAL_DEFAULT (0.1f) + +#define INTERVAL_DEFAULT (0.1f) +#define INTERVAL_MIN (0.0025f) +#define INTERVAL_MIN_STRING "0.0025" +#define INTERVAL_MAX (40.959375f) +#define INTERVAL_MAX_STRING "40.959375" +#define WINDOW_DEFAULT (0.1f) + //| .. currentmodule:: _bleio //| -//| :class:`Adapter` --- BLE adapter information +//| :class:`Adapter` --- BLE adapter //| ---------------------------------------------------- //| -//| Get current status of the BLE adapter +//| The Adapter manages the discovery and connection to other nearby Bluetooth Low Energy devices. +//| This part of the Bluetooth Low Energy Specification is known as Generic Access Profile (GAP). //| -//| Usage:: +//| Discovery of other devices happens during a scanning process that listens for small packets of +//| information, known as advertisements, that are broadcast unencrypted. The advertising packets +//| have two different uses. The first is to broadcast a small piece of data to anyone who cares and +//| and nothing more. These are known as Beacons. The second class of advertisement is to promote +//| additional functionality available after the devices establish a connection. For example, a +//| BLE keyboard may advertise that it can provide key information, but not what the key info is. //| -//| import _bleio -//| _bleio.adapter.enabled = True -//| print(_bleio.adapter.address) +//| The built-in BLE adapter can do both parts of this process: it can scan for other device +//| advertisements and it can advertise its own data. Furthermore, Adapters can accept incoming +//| connections and also initiate connections. //| //| .. class:: Adapter() @@ -49,19 +72,19 @@ //| Use `_bleio.adapter` to access the sole instance available. //| -//| .. attribute:: adapter.enabled +//| .. attribute:: enabled //| -//| State of the BLE adapter. +//| State of the BLE adapter. //| STATIC mp_obj_t bleio_adapter_get_enabled(mp_obj_t self) { - return mp_obj_new_bool(common_hal_bleio_adapter_get_enabled()); + return mp_obj_new_bool(common_hal_bleio_adapter_get_enabled(self)); } MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_enabled_obj, bleio_adapter_get_enabled); static mp_obj_t bleio_adapter_set_enabled(mp_obj_t self, mp_obj_t value) { const bool enabled = mp_obj_is_true(value); - common_hal_bleio_adapter_set_enabled(enabled); + common_hal_bleio_adapter_set_enabled(self, enabled); return mp_const_none; } @@ -74,12 +97,12 @@ const mp_obj_property_t bleio_adapter_enabled_obj = { (mp_obj_t)&mp_const_none_obj }, }; -//| .. attribute:: adapter.address +//| .. attribute:: address //| -//| MAC address of the BLE adapter. (read-only) +//| MAC address of the BLE adapter. (read-only) //| STATIC mp_obj_t bleio_adapter_get_address(mp_obj_t self) { - return MP_OBJ_FROM_PTR(common_hal_bleio_adapter_get_address()); + return MP_OBJ_FROM_PTR(common_hal_bleio_adapter_get_address(self)); } MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_address_obj, bleio_adapter_get_address); @@ -91,29 +114,260 @@ const mp_obj_property_t bleio_adapter_address_obj = { (mp_obj_t)&mp_const_none_obj }, }; -//| .. attribute:: adapter.default_name +//| .. attribute:: name //| -//| default_name of the BLE adapter. (read-only) -//| The name is "CIRCUITPY" + the last four hex digits of ``adapter.address``, -//| to make it easy to distinguish multiple CircuitPython boards. +//| name of the BLE adapter used once connected. Not used in advertisements. +//| The name is "CIRCUITPY" + the last four hex digits of ``adapter.address``, +//| to make it easy to distinguish multiple CircuitPython boards. //| -STATIC mp_obj_t bleio_adapter_get_default_name(mp_obj_t self) { - return common_hal_bleio_adapter_get_default_name(); +STATIC mp_obj_t bleio_adapter_get_name(mp_obj_t self) { + return MP_OBJ_FROM_PTR(common_hal_bleio_adapter_get_name(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_name_obj, bleio_adapter_get_name); + + +STATIC mp_obj_t bleio_adapter_set_name(mp_obj_t self, mp_obj_t new_name) { + common_hal_bleio_adapter_set_name(self, mp_obj_str_get_str(new_name)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(bleio_adapter_set_name_obj, bleio_adapter_set_name); + +const mp_obj_property_t bleio_adapter_name_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_name_obj, + (mp_obj_t)&bleio_adapter_set_name_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. method:: start_advertising(data, *, scan_response=None, connectable=True, interval=0.1) +//| +//| Starts advertising until `stop_advertising` is called or if connectable, another device +//| connects to us. +//| +//| :param buf data: advertising data packet bytes +//| :param buf scan_response: scan response data packet bytes. ``None`` if no scan response is needed. +//| :param bool connectable: If `True` then other devices are allowed to connect to this peripheral. +//| :param float interval: advertising interval, in seconds +//| +STATIC mp_obj_t bleio_adapter_start_advertising(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_data, ARG_scan_response, ARG_connectable, ARG_interval }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_scan_response, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_connectable, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, + { MP_QSTR_interval, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_buffer_info_t data_bufinfo; + mp_get_buffer_raise(args[ARG_data].u_obj, &data_bufinfo, MP_BUFFER_READ); + + // Pass an empty buffer if scan_response not provided. + mp_buffer_info_t scan_response_bufinfo = { 0 }; + if (args[ARG_scan_response].u_obj != mp_const_none) { + mp_get_buffer_raise(args[ARG_scan_response].u_obj, &scan_response_bufinfo, MP_BUFFER_READ); + } + + if (args[ARG_interval].u_obj == MP_OBJ_NULL) { + args[ARG_interval].u_obj = mp_obj_new_float(ADV_INTERVAL_DEFAULT); + } + + const mp_float_t interval = mp_obj_float_get(args[ARG_interval].u_obj); + if (interval < ADV_INTERVAL_MIN || interval > ADV_INTERVAL_MAX) { + mp_raise_ValueError_varg(translate("interval must be in range %s-%s"), + ADV_INTERVAL_MIN_STRING, ADV_INTERVAL_MAX_STRING); + } + + common_hal_bleio_adapter_start_advertising(self, args[ARG_connectable].u_bool, interval, + &data_bufinfo, &scan_response_bufinfo); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_start_advertising_obj, 2, bleio_adapter_start_advertising); + +//| .. method:: stop_advertising() +//| +//| Stop sending advertising packets. +STATIC mp_obj_t bleio_adapter_stop_advertising(mp_obj_t self_in) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_bleio_adapter_stop_advertising(self); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_stop_advertising_obj, bleio_adapter_stop_advertising); + +//| .. method:: start_scan(prefixes=b"", \*, buffer_size=512, extended=False, timeout=None, interval=0.1, window=0.1, minimum_rssi=-80) +//| +//| Starts a BLE scan and returns an iterator of results. Advertisements and scan responses are +//| filtered and returned separately. +//| +//| :param sequence prefixes: Sequence of byte string prefixes to filter advertising packets +//| with. A packet without an advertising structure that matches one of the prefixes is +//| ignored. Format is one byte for length (n) and n bytes of prefix and can be repeated. +//| :param int buffer_size: the maximum number of advertising bytes to buffer. +//| :param bool extended: When True, support extended advertising packets. Increasing buffer_size is recommended when this is set. +//| :param float timeout: the scan timeout in seconds. If None, will scan until `stop_scan` is called. +//| :param float interval: the interval (in seconds) between the start of two consecutive scan windows +//| Must be in the range 0.0025 - 40.959375 seconds. +//| :param float window: the duration (in seconds) to scan a single BLE channel. +//| window must be <= interval. +//| :param int minimum_rssi: the minimum rssi of entries to return. +//| :param bool active: retrieve scan responses for scannable advertisements. +//| :returns: an iterable of `_bleio.ScanEntry` objects +//| :rtype: iterable +//| +STATIC mp_obj_t bleio_adapter_start_scan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_prefixes, ARG_buffer_size, ARG_extended, ARG_timeout, ARG_interval, ARG_window, ARG_minimum_rssi, ARG_active }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_prefixes, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_buffer_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 512} }, + { MP_QSTR_extended, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_interval, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_window, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_minimum_rssi, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -80} }, + { MP_QSTR_active, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, + }; + + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_float_t timeout = 0; + if (args[ARG_timeout].u_obj != MP_OBJ_NULL) { + timeout = mp_obj_get_float(args[ARG_timeout].u_obj); + } + + if (args[ARG_interval].u_obj == MP_OBJ_NULL) { + args[ARG_interval].u_obj = mp_obj_new_float(INTERVAL_DEFAULT); + } + + if (args[ARG_window].u_obj == MP_OBJ_NULL) { + args[ARG_window].u_obj = mp_obj_new_float(WINDOW_DEFAULT); + } + + const mp_float_t interval = mp_obj_float_get(args[ARG_interval].u_obj); + if (interval < INTERVAL_MIN || interval > INTERVAL_MAX) { + mp_raise_ValueError_varg(translate("interval must be in range %s-%s"), INTERVAL_MIN_STRING, INTERVAL_MAX_STRING); + } + + const mp_float_t window = mp_obj_float_get(args[ARG_window].u_obj); + if (window > interval) { + mp_raise_ValueError(translate("window must be <= interval")); + } + + mp_buffer_info_t prefix_bufinfo; + prefix_bufinfo.len = 0; + if (args[ARG_prefixes].u_obj != MP_OBJ_NULL) { + mp_get_buffer_raise(args[ARG_prefixes].u_obj, &prefix_bufinfo, MP_BUFFER_READ); + if (gc_nbytes(prefix_bufinfo.buf) == 0) { + mp_raise_ValueError(translate("Prefix buffer must be on the heap")); + } + } + + return common_hal_bleio_adapter_start_scan(self, prefix_bufinfo.buf, prefix_bufinfo.len, args[ARG_extended].u_bool, args[ARG_buffer_size].u_int, timeout, interval, window, args[ARG_minimum_rssi].u_int, args[ARG_active].u_bool); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_start_scan_obj, 1, bleio_adapter_start_scan); + +//| .. method:: stop_scan() +//| +//| Stop the current scan. +STATIC mp_obj_t bleio_adapter_stop_scan(mp_obj_t self_in) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_bleio_adapter_stop_scan(self); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_stop_scan_obj, bleio_adapter_stop_scan); + +//| .. attribute:: connected +//| +//| True when the adapter is connected to another device regardless of who initiated the +//| connection. (read-only) +//| +STATIC mp_obj_t bleio_adapter_get_connected(mp_obj_t self) { + return mp_obj_new_bool(common_hal_bleio_adapter_get_connected(self)); } -MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_default_name_obj, bleio_adapter_get_default_name); +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_connected_obj, bleio_adapter_get_connected); -const mp_obj_property_t bleio_adapter_default_name_obj = { +const mp_obj_property_t bleio_adapter_connected_obj = { .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&bleio_adapter_get_default_name_obj, + .proxy = { (mp_obj_t)&bleio_adapter_get_connected_obj, (mp_obj_t)&mp_const_none_obj, (mp_obj_t)&mp_const_none_obj }, }; +//| .. attribute:: connections +//| +//| Tuple of active connections including those initiated through +//| :py:meth:`_bleio.Adapter.connect`. (read-only) +//| +STATIC mp_obj_t bleio_adapter_get_connections(mp_obj_t self) { + return common_hal_bleio_adapter_get_connections(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_connections_obj, bleio_adapter_get_connections); + +const mp_obj_property_t bleio_adapter_connections_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_connections_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. method:: connect(address, *, timeout, pair=False) +//| +//| Attempts a connection to the device with the given address. +//| +//| :param Address address: The address of the peripheral to connect to +//| :param float/int timeout: Try to connect for timeout seconds. +//| +STATIC mp_obj_t bleio_adapter_connect(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_address, ARG_timeout, ARG_pair }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_pair, MP_ARG_KW_ONLY | MP_ARG_BOOL, { .u_bool = false } }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + if (!MP_OBJ_IS_TYPE(args[ARG_address].u_obj, &bleio_address_type)) { + mp_raise_ValueError(translate("Expected an Address")); + } + + bleio_address_obj_t *address = MP_OBJ_TO_PTR(args[ARG_address].u_obj); + mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); + + return common_hal_bleio_adapter_connect(self, address, timeout, args[ARG_pair].u_bool); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_connect_obj, 2, bleio_adapter_connect); + + STATIC const mp_rom_map_elem_t bleio_adapter_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_enabled), MP_ROM_PTR(&bleio_adapter_enabled_obj) }, { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&bleio_adapter_address_obj) }, - { MP_ROM_QSTR(MP_QSTR_default_name), MP_ROM_PTR(&bleio_adapter_default_name_obj) }, + { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&bleio_adapter_name_obj) }, + + { MP_ROM_QSTR(MP_QSTR_start_advertising), MP_ROM_PTR(&bleio_adapter_start_advertising_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_advertising), MP_ROM_PTR(&bleio_adapter_stop_advertising_obj) }, + + { MP_ROM_QSTR(MP_QSTR_start_scan), MP_ROM_PTR(&bleio_adapter_start_scan_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_scan), MP_ROM_PTR(&bleio_adapter_stop_scan_obj) }, + + { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&bleio_adapter_connect_obj) }, + + { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_adapter_connected_obj) }, + { MP_ROM_QSTR(MP_QSTR_connections), MP_ROM_PTR(&bleio_adapter_connections_obj) }, }; STATIC MP_DEFINE_CONST_DICT(bleio_adapter_locals_dict, bleio_adapter_locals_dict_table); diff --git a/shared-bindings/_bleio/Adapter.h b/shared-bindings/_bleio/Adapter.h index 932fc9c958..2ff77f755b 100644 --- a/shared-bindings/_bleio/Adapter.h +++ b/shared-bindings/_bleio/Adapter.h @@ -28,13 +28,33 @@ #ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H #define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H +#include + +#include "common-hal/_bleio/Adapter.h" + +#include "py/objstr.h" #include "shared-module/_bleio/Address.h" const mp_obj_type_t bleio_adapter_type; -extern bool common_hal_bleio_adapter_get_enabled(void); -extern void common_hal_bleio_adapter_set_enabled(bool enabled); -extern bleio_address_obj_t *common_hal_bleio_adapter_get_address(void); -extern mp_obj_t common_hal_bleio_adapter_get_default_name(void); +extern bool common_hal_bleio_adapter_get_enabled(bleio_adapter_obj_t *self); +extern void common_hal_bleio_adapter_set_enabled(bleio_adapter_obj_t *self, bool enabled); +extern bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self); +extern bleio_address_obj_t *common_hal_bleio_adapter_get_address(bleio_adapter_obj_t *self); + +extern mp_obj_str_t* common_hal_bleio_adapter_get_name(bleio_adapter_obj_t *self); +extern void common_hal_bleio_adapter_set_name(bleio_adapter_obj_t *self, const char* name); + +extern uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, float interval, uint8_t *advertising_data, uint16_t advertising_data_len, uint8_t *scan_response_data, uint16_t scan_response_data_len); + +extern void common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, mp_float_t interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo); +void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self); + +mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* prefixes, size_t prefix_length, bool extended, mp_int_t buffer_size, mp_float_t timeout, mp_float_t interval, mp_float_t window, mp_int_t minimum_rssi, bool active); +void common_hal_bleio_adapter_stop_scan(bleio_adapter_obj_t *self); + +bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self); +mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self); +mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout, bool pair); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H diff --git a/shared-bindings/_bleio/Address.c b/shared-bindings/_bleio/Address.c index cdee02b5d7..c31eb604b1 100644 --- a/shared-bindings/_bleio/Address.c +++ b/shared-bindings/_bleio/Address.c @@ -114,10 +114,11 @@ const mp_obj_property_t bleio_address_address_bytes_obj = { }; //| .. attribute:: type -//| +//| //| The address type (read-only). -//| One of the integer values: `PUBLIC`, `RANDOM_STATIC`, -//| `RANDOM_PRIVATE_RESOLVABLE`, or `RANDOM_PRIVATE_NON_RESOLVABLE`. +//| +//| One of the integer values: `PUBLIC`, `RANDOM_STATIC`, `RANDOM_PRIVATE_RESOLVABLE`, +//| or `RANDOM_PRIVATE_NON_RESOLVABLE`. //| STATIC mp_obj_t bleio_address_get_type(mp_obj_t self_in) { bleio_address_obj_t *self = MP_OBJ_TO_PTR(self_in); @@ -159,6 +160,28 @@ STATIC mp_obj_t bleio_address_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_o } } +//| .. method:: __hash__() +//| +//| Returns a hash for the Address data. +//| +STATIC mp_obj_t bleio_address_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + switch (op) { + // Two Addresses are equal if their address bytes and address_type are equal + case MP_UNARY_OP_HASH: { + mp_obj_t bytes = common_hal_bleio_address_get_address_bytes(MP_OBJ_TO_PTR(self_in)); + GET_STR_HASH(bytes, h); + if (h == 0) { + GET_STR_DATA_LEN(bytes, data, len); + h = qstr_compute_hash(data, len); + } + h ^= common_hal_bleio_address_get_type(MP_OBJ_TO_PTR(self_in)); + return MP_OBJ_NEW_SMALL_INT(h); + } + default: + return MP_OBJ_NULL; // op not supported + } +} + STATIC void bleio_address_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { bleio_address_obj_t *self = MP_OBJ_TO_PTR(self_in); mp_buffer_info_t buf_info; @@ -205,6 +228,7 @@ const mp_obj_type_t bleio_address_type = { .name = MP_QSTR_Address, .make_new = bleio_address_make_new, .print = bleio_address_print, + .unary_op = bleio_address_unary_op, .binary_op = bleio_address_binary_op, .locals_dict = (mp_obj_dict_t*)&bleio_address_locals_dict }; diff --git a/shared-bindings/_bleio/Central.c b/shared-bindings/_bleio/Central.c deleted file mode 100644 index 084f40cd62..0000000000 --- a/shared-bindings/_bleio/Central.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "ble_drv.h" -#include "py/objarray.h" -#include "py/objproperty.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/_bleio/Address.h" -#include "shared-bindings/_bleio/Characteristic.h" -#include "shared-bindings/_bleio/Central.h" -#include "shared-bindings/_bleio/Service.h" - -//| .. currentmodule:: _bleio -//| -//| :class:`Central` -- A BLE central device -//| ========================================================= -//| -//| Implement a BLE central, which runs locally. Can connect to a given address. -//| -//| Usage:: -//| -//| import _bleio -//| -//| scanner = _bleio.Scanner() -//| entries = scanner.scan(2.5) -//| -//| my_entry = None -//| for entry in entries: -//| if entry.name is not None and entry.name == 'InterestingPeripheral': -//| my_entry = entry -//| break -//| -//| if not my_entry: -//| raise Exception("'InterestingPeripheral' not found") -//| -//| central = _bleio.Central() -//| central.connect(my_entry.address, 10) # timeout after 10 seconds -//| remote_services = central.discover_remote_services() -//| - -//| .. class:: Central() -//| -//| Create a new Central object. -//| -STATIC mp_obj_t bleio_central_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_check_num(n_args, kw_args, 0, 0, false); - - bleio_central_obj_t *self = m_new_obj(bleio_central_obj_t); - self->base.type = &bleio_central_type; - - common_hal_bleio_central_construct(self); - - return MP_OBJ_FROM_PTR(self); -} - -//| .. method:: connect(address, timeout, *, service_uuids_whitelist=None) -//| Attempts a connection to the remote peripheral. -//| -//| :param Address address: The address of the peripheral to connect to -//| :param float/int timeout: Try to connect for timeout seconds. -//| -STATIC mp_obj_t bleio_central_connect(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - bleio_central_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - - enum { ARG_address, ARG_timeout, ARG_service_uuids_whitelist }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_address, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_timeout, MP_ARG_REQUIRED | MP_ARG_OBJ }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (!MP_OBJ_IS_TYPE(args[ARG_address].u_obj, &bleio_address_type)) { - mp_raise_ValueError(translate("Expected an Address")); - } - - bleio_address_obj_t *address = MP_OBJ_TO_PTR(args[ARG_address].u_obj); - mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); - - // common_hal_bleio_central_connect() will validate that services is an iterable or None. - common_hal_bleio_central_connect(self, address, timeout); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_central_connect_obj, 3, bleio_central_connect); - - -//| .. method:: disconnect() -//| -//| Disconnects from the remote peripheral. -//| -STATIC mp_obj_t bleio_central_disconnect(mp_obj_t self_in) { - bleio_central_obj_t *self = MP_OBJ_TO_PTR(self_in); - - common_hal_bleio_central_disconnect(self); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_central_disconnect_obj, bleio_central_disconnect); - -//| .. method:: discover_remote_services(service_uuids_whitelist=None) -//| Do BLE discovery for all services or for the given service UUIDS, -//| to find their handles and characteristics, and return the discovered services. -//| `Peripheral.connected` must be True. -//| -//| :param iterable service_uuids_whitelist: an iterable of :py:class:~`UUID` objects for the services -//| provided by the peripheral that you want to use. -//| The peripheral may provide more services, but services not listed are ignored -//| and will not be returned. -//| -//| If service_uuids_whitelist is None, then all services will undergo discovery, which can be slow. -//| -//| If the service UUID is 128-bit, or its characteristic UUID's are 128-bit, you -//| you must have already created a :py:class:~`UUID` object for that UUID in order for the -//| service or characteristic to be discovered. Creating the UUID causes the UUID to be registered -//| for use. (This restriction may be lifted in the future.) -//| -//| :return: A tuple of services provided by the remote peripheral. -//| -STATIC mp_obj_t bleio_central_discover_remote_services(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - bleio_central_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - - enum { ARG_service_uuids_whitelist }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_service_uuids_whitelist, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (!common_hal_bleio_central_get_connected(self)) { - mp_raise_ValueError(translate("Not connected")); - } - - return MP_OBJ_FROM_PTR(common_hal_bleio_central_discover_remote_services( - MP_OBJ_FROM_PTR(self), - args[ARG_service_uuids_whitelist].u_obj)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_central_discover_remote_services_obj, 1, bleio_central_discover_remote_services); - -//| .. attribute:: connected -//| -//| True if connected to a remove peripheral. -//| -STATIC mp_obj_t bleio_central_get_connected(mp_obj_t self_in) { - bleio_central_obj_t *self = MP_OBJ_TO_PTR(self_in); - - return mp_obj_new_bool(common_hal_bleio_central_get_connected(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_central_get_connected_obj, bleio_central_get_connected); - -const mp_obj_property_t bleio_central_connected_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&bleio_central_get_connected_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; - -STATIC const mp_rom_map_elem_t bleio_central_locals_dict_table[] = { - // Methods - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&bleio_central_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&bleio_central_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_discover_remote_services), MP_ROM_PTR(&bleio_central_discover_remote_services_obj) }, - - // Properties - { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_central_connected_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(bleio_central_locals_dict, bleio_central_locals_dict_table); - -const mp_obj_type_t bleio_central_type = { - { &mp_type_type }, - .name = MP_QSTR_Central, - .make_new = bleio_central_make_new, - .locals_dict = (mp_obj_dict_t*)&bleio_central_locals_dict -}; diff --git a/shared-bindings/_bleio/Central.h b/shared-bindings/_bleio/Central.h deleted file mode 100644 index 85d788654f..0000000000 --- a/shared-bindings/_bleio/Central.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CENTRAL_H -#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CENTRAL_H - -#include "py/objtuple.h" -#include "common-hal/_bleio/Central.h" -#include "common-hal/_bleio/Service.h" - -extern const mp_obj_type_t bleio_central_type; - -extern void common_hal_bleio_central_construct(bleio_central_obj_t *self); -extern void common_hal_bleio_central_connect(bleio_central_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout); -extern void common_hal_bleio_central_disconnect(bleio_central_obj_t *self); -extern bool common_hal_bleio_central_get_connected(bleio_central_obj_t *self); -extern mp_obj_tuple_t *common_hal_bleio_central_discover_remote_services(bleio_central_obj_t *self, mp_obj_t service_uuids_whitelist); - -#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CENTRAL_H diff --git a/shared-bindings/_bleio/Characteristic.c b/shared-bindings/_bleio/Characteristic.c index 1981555891..d89da2a2fa 100644 --- a/shared-bindings/_bleio/Characteristic.c +++ b/shared-bindings/_bleio/Characteristic.c @@ -45,8 +45,8 @@ //| //| There is no regular constructor for a Characteristic. A new local Characteristic can be created //| and attached to a Service by calling `add_to_service()`. -//| Remote Characteristic objects are created by `Central.discover_remote_services()` -//| or `Peripheral.discover_remote_services()` as part of remote Services. +//| Remote Characteristic objects are created by `Connection.discover_remote_services()` +//| as part of remote Services. //| //| .. method:: add_to_service(service, uuid, *, properties=0, read_perm=`Attribute.OPEN`, write_perm=`Attribute.OPEN`, max_length=20, fixed_length=False, initial_value=None) @@ -134,12 +134,10 @@ STATIC mp_obj_t bleio_characteristic_add_to_service(size_t n_args, const mp_obj_ // Range checking on max_length arg is done by the common_hal layer, because // it may vary depending on underlying BLE implementation. common_hal_bleio_characteristic_construct( - characteristic, MP_OBJ_TO_PTR(service_obj), MP_OBJ_TO_PTR(uuid_obj), + characteristic, MP_OBJ_TO_PTR(service_obj), 0, MP_OBJ_TO_PTR(uuid_obj), properties, read_perm, write_perm, max_length, fixed_length, &initial_value_bufinfo); - common_hal_bleio_service_add_characteristic(service_obj, characteristic); - return MP_OBJ_FROM_PTR(characteristic); } STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_characteristic_add_to_service_fun_obj, 3, bleio_characteristic_add_to_service); @@ -170,7 +168,8 @@ const mp_obj_property_t bleio_characteristic_properties_obj = { //| .. attribute:: uuid //| //| The UUID of this characteristic. (read-only) -//| Will be ``None`` if the 128-bit UUID for this characteristic is not known. +//| +//| Will be ``None`` if the 128-bit UUID for this characteristic is not known. //| STATIC mp_obj_t bleio_characteristic_get_uuid(mp_obj_t self_in) { bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); @@ -194,7 +193,9 @@ const mp_obj_property_t bleio_characteristic_uuid_obj = { STATIC mp_obj_t bleio_characteristic_get_value(mp_obj_t self_in) { bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); - return common_hal_bleio_characteristic_get_value(self); + uint8_t temp[512]; + size_t actual_len = common_hal_bleio_characteristic_get_value(self, temp, sizeof(temp)); + return mp_obj_new_bytearray(actual_len, temp); } STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_value_obj, bleio_characteristic_get_value); @@ -224,8 +225,20 @@ const mp_obj_property_t bleio_characteristic_value_obj = { STATIC mp_obj_t bleio_characteristic_get_descriptors(mp_obj_t self_in) { bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); // Return list as a tuple so user won't be able to change it. - mp_obj_list_t *char_list = common_hal_bleio_characteristic_get_descriptor_list(self); - return mp_obj_new_tuple(char_list->len, char_list->items); + bleio_descriptor_obj_t *descriptors = common_hal_bleio_characteristic_get_descriptor_list(self); + bleio_descriptor_obj_t *head = descriptors; + size_t len = 0; + while (head != NULL) { + len++; + head = head->next; + } + mp_obj_tuple_t * t = MP_OBJ_TO_PTR(mp_obj_new_tuple(len, NULL)); + head = descriptors; + for (size_t i = len - 1; i >= 0; i--) { + t->items[i] = MP_OBJ_FROM_PTR(head); + head = head->next; + } + return MP_OBJ_FROM_PTR(t); } STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_descriptors_obj, bleio_characteristic_get_descriptors); @@ -282,7 +295,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_characteristic_set_cccd_obj, 1, bleio_ch STATIC const mp_rom_map_elem_t bleio_characteristic_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_add_to_service), MP_ROM_PTR(&bleio_characteristic_add_to_service_obj) }, - { MP_ROM_QSTR(MP_QSTR_properties), MP_ROM_PTR(&bleio_characteristic_get_properties_obj) }, + { MP_ROM_QSTR(MP_QSTR_properties), MP_ROM_PTR(&bleio_characteristic_properties_obj) }, { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_characteristic_uuid_obj) }, { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&bleio_characteristic_value_obj) }, { MP_ROM_QSTR(MP_QSTR_set_cccd), MP_ROM_PTR(&bleio_characteristic_set_cccd_obj) }, diff --git a/shared-bindings/_bleio/Characteristic.h b/shared-bindings/_bleio/Characteristic.h index a816c60506..c4356fd4b9 100644 --- a/shared-bindings/_bleio/Characteristic.h +++ b/shared-bindings/_bleio/Characteristic.h @@ -36,12 +36,12 @@ extern const mp_obj_type_t bleio_characteristic_type; -extern void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo); -extern mp_obj_t common_hal_bleio_characteristic_get_value(bleio_characteristic_obj_t *self); +extern void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, uint16_t handle, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo); +extern size_t common_hal_bleio_characteristic_get_value(bleio_characteristic_obj_t *self, uint8_t* buf, size_t len); extern void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, mp_buffer_info_t *bufinfo); extern bleio_characteristic_properties_t common_hal_bleio_characteristic_get_properties(bleio_characteristic_obj_t *self); extern bleio_uuid_obj_t *common_hal_bleio_characteristic_get_uuid(bleio_characteristic_obj_t *self); -extern mp_obj_list_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self); +extern bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self); extern bleio_service_obj_t *common_hal_bleio_characteristic_get_service(bleio_characteristic_obj_t *self); extern void common_hal_bleio_characteristic_add_descriptor(bleio_characteristic_obj_t *self, bleio_descriptor_obj_t *descriptor); extern void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, bool notify, bool indicate); diff --git a/shared-bindings/_bleio/Connection.c b/shared-bindings/_bleio/Connection.c new file mode 100644 index 0000000000..1c6931b29d --- /dev/null +++ b/shared-bindings/_bleio/Connection.c @@ -0,0 +1,171 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_bleio/Connection.h" + +#include +#include + +#include "ble_drv.h" +#include "py/objarray.h" +#include "py/objproperty.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`Connection` -- A BLE connection +//| ========================================================= +//| +//| A BLE connection to another device. Used to discover and interact with services on the other +//| device. +//| +//| Usage:: +//| +//| import _bleio +//| +//| my_entry = None +//| for entry in _bleio.adapter.scan(2.5): +//| if entry.name is not None and entry.name == 'InterestingPeripheral': +//| my_entry = entry +//| break +//| +//| if not my_entry: +//| raise Exception("'InterestingPeripheral' not found") +//| +//| connection = _bleio.adapter.connect(my_entry.address, timeout=10) +//| + +STATIC void ensure_connected(bleio_connection_obj_t *self) { + if (!common_hal_bleio_connection_get_connected(self)) { + mp_raise_ValueError(translate("Connection has been disconnected and can no longer be used. Create a new connection.")); + } +} + +//| .. class:: Connection() +//| +//| Connections cannot be made directly. Instead, to initiate a connection use `Adapter.connect`. +//| Connections may also be made when another device initiates a connection. To use a Connection +//| created by a peer, read the `Adapter.connections` property. +//| +//| .. method:: disconnect() +//| +//| Disconnects from the remote peripheral. +//| +STATIC mp_obj_t bleio_connection_disconnect(mp_obj_t self_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + ensure_connected(self); + + common_hal_bleio_connection_disconnect(self->connection); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_connection_disconnect_obj, bleio_connection_disconnect); + +//| .. method:: discover_remote_services(service_uuids_whitelist=None) +//| +//| Do BLE discovery for all services or for the given service UUIDS, +//| to find their handles and characteristics, and return the discovered services. +//| `Connection.connected` must be True. +//| +//| :param iterable service_uuids_whitelist: +//| +//| an iterable of :py:class:~`UUID` objects for the services provided by the peripheral +//| that you want to use. +//| +//| The peripheral may provide more services, but services not listed are ignored +//| and will not be returned. +//| +//| If service_uuids_whitelist is None, then all services will undergo discovery, which can be +//| slow. +//| +//| If the service UUID is 128-bit, or its characteristic UUID's are 128-bit, you +//| you must have already created a :py:class:~`UUID` object for that UUID in order for the +//| service or characteristic to be discovered. Creating the UUID causes the UUID to be +//| registered for use. (This restriction may be lifted in the future.) +//| +//| :return: A tuple of `_bleio.Service` objects provided by the remote peripheral. +//| +STATIC mp_obj_t bleio_connection_discover_remote_services(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_service_uuids_whitelist }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_service_uuids_whitelist, MP_ARG_OBJ, {.u_obj = mp_const_none} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + ensure_connected(self); + + return MP_OBJ_FROM_PTR(common_hal_bleio_connection_discover_remote_services( + self, + args[ARG_service_uuids_whitelist].u_obj)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_connection_discover_remote_services_obj, 1, bleio_connection_discover_remote_services); + +//| .. attribute:: connected +//| +//| True if connected to a remote peer. +//| +STATIC mp_obj_t bleio_connection_get_connected(mp_obj_t self_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_bleio_connection_get_connected(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_connection_get_connected_obj, bleio_connection_get_connected); + +const mp_obj_property_t bleio_connection_connected_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_connection_get_connected_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +STATIC const mp_rom_map_elem_t bleio_connection_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&bleio_connection_disconnect_obj) }, + { MP_ROM_QSTR(MP_QSTR_discover_remote_services), MP_ROM_PTR(&bleio_connection_discover_remote_services_obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_connection_connected_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_connection_locals_dict, bleio_connection_locals_dict_table); + +const mp_obj_type_t bleio_connection_type = { + { &mp_type_type }, + .name = MP_QSTR_Connection, + .locals_dict = (mp_obj_dict_t*)&bleio_connection_locals_dict, + .unary_op = mp_generic_unary_op, +}; diff --git a/shared-bindings/_bleio/Scanner.h b/shared-bindings/_bleio/Connection.h similarity index 66% rename from shared-bindings/_bleio/Scanner.h rename to shared-bindings/_bleio/Connection.h index cbaa778662..5de6730c99 100644 --- a/shared-bindings/_bleio/Scanner.h +++ b/shared-bindings/_bleio/Connection.h @@ -25,16 +25,17 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANNER_H -#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANNER_H +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CONNECTION_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CONNECTION_H -#include "py/objtype.h" -#include "common-hal/_bleio/Scanner.h" +#include "py/objtuple.h" +#include "common-hal/_bleio/Connection.h" +#include "common-hal/_bleio/Service.h" -extern const mp_obj_type_t bleio_scanner_type; +extern const mp_obj_type_t bleio_connection_type; -extern void common_hal_bleio_scanner_construct(bleio_scanner_obj_t *self); -extern mp_obj_t common_hal_bleio_scanner_scan(bleio_scanner_obj_t *self, mp_float_t timeout, mp_float_t interval, mp_float_t window); -extern void common_hal_bleio_scanner_stop(bleio_scanner_obj_t *self); +extern void common_hal_bleio_connection_disconnect(bleio_connection_internal_t *self); +extern bool common_hal_bleio_connection_get_connected(bleio_connection_obj_t *self); +extern mp_obj_tuple_t *common_hal_bleio_connection_discover_remote_services(bleio_connection_obj_t *self, mp_obj_t service_uuids_whitelist); -#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANNER_H +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CONNECTION_H diff --git a/shared-bindings/_bleio/Descriptor.c b/shared-bindings/_bleio/Descriptor.c index 0ab9fe8e9e..45a95903e1 100644 --- a/shared-bindings/_bleio/Descriptor.c +++ b/shared-bindings/_bleio/Descriptor.c @@ -46,9 +46,8 @@ //| //| There is no regular constructor for a Descriptor. A new local Descriptor can be created //| and attached to a Characteristic by calling `add_to_characteristic()`. -//| Remote Descriptor objects are created by `Central.discover_remote_services()` -//| or `Peripheral.discover_remote_services()` as part of remote Characteristics -//| in the remote Services that are discovered. +//| Remote Descriptor objects are created by `Connection.discover_remote_services()` +//| as part of remote Characteristics in the remote Services that are discovered. //| //| .. classmethod:: add_to_characteristic(characteristic, uuid, *, read_perm=`Attribute.OPEN`, write_perm=`Attribute.OPEN`, max_length=20, fixed_length=False, initial_value=b'') //| @@ -180,7 +179,9 @@ const mp_obj_property_t bleio_descriptor_characteristic_obj = { STATIC mp_obj_t bleio_descriptor_get_value(mp_obj_t self_in) { bleio_descriptor_obj_t *self = MP_OBJ_TO_PTR(self_in); - return common_hal_bleio_descriptor_get_value(self); + uint8_t temp[512]; + size_t actual_len = common_hal_bleio_descriptor_get_value(self, temp, sizeof(temp)); + return mp_obj_new_bytearray(actual_len, temp); } STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_descriptor_get_value_obj, bleio_descriptor_get_value); diff --git a/shared-bindings/_bleio/Descriptor.h b/shared-bindings/_bleio/Descriptor.h index 7544bdb17b..273cb1c1e3 100644 --- a/shared-bindings/_bleio/Descriptor.h +++ b/shared-bindings/_bleio/Descriptor.h @@ -38,7 +38,7 @@ extern const mp_obj_type_t bleio_descriptor_type; extern void common_hal_bleio_descriptor_construct(bleio_descriptor_obj_t *self, bleio_characteristic_obj_t *characteristic, bleio_uuid_obj_t *uuid, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo); extern bleio_uuid_obj_t *common_hal_bleio_descriptor_get_uuid(bleio_descriptor_obj_t *self); extern bleio_characteristic_obj_t *common_hal_bleio_descriptor_get_characteristic(bleio_descriptor_obj_t *self); -extern mp_obj_t common_hal_bleio_descriptor_get_value(bleio_descriptor_obj_t *self); +extern size_t common_hal_bleio_descriptor_get_value(bleio_descriptor_obj_t *self, uint8_t* buf, size_t len); extern void common_hal_bleio_descriptor_set_value(bleio_descriptor_obj_t *self, mp_buffer_info_t *bufinfo); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_DESCRIPTOR_H diff --git a/shared-bindings/_bleio/Peripheral.c b/shared-bindings/_bleio/Peripheral.c deleted file mode 100644 index 0bf2927442..0000000000 --- a/shared-bindings/_bleio/Peripheral.c +++ /dev/null @@ -1,325 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "ble_drv.h" -#include "py/objarray.h" -#include "py/objproperty.h" -#include "py/objstr.h" -#include "py/runtime.h" - -#include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/_bleio/Characteristic.h" -#include "shared-bindings/_bleio/Peripheral.h" -#include "shared-bindings/_bleio/Service.h" -#include "shared-bindings/_bleio/UUID.h" -#include "shared-module/_bleio/ScanEntry.h" - -#include "common-hal/_bleio/Peripheral.h" - -#define ADV_INTERVAL_MIN (0.0020f) -#define ADV_INTERVAL_MIN_STRING "0.0020" -#define ADV_INTERVAL_MAX (10.24f) -#define ADV_INTERVAL_MAX_STRING "10.24" -// 20ms is recommended by Apple -#define ADV_INTERVAL_DEFAULT (0.1f) - -//| .. currentmodule:: _bleio -//| -//| :class:`Peripheral` -- A BLE peripheral device -//| ========================================================= -//| -//| Implement a BLE peripheral which runs locally. -//| Set up using the supplied services, and then allow advertising to be started and stopped. -//| -//| Usage:: -//| -//| from _bleio import Characteristic, Peripheral, Service -//| from adafruit_ble.advertising import ServerAdvertisement -//| -//| # Create a peripheral and start it up. -//| peripheral = _bleio.Peripheral() -//| -//| # Create a Service and add it to this Peripheral. -//| service = Service.add_to_peripheral(peripheral, _bleio.UUID(0x180f)) -//| -//| # Create a Characteristic and add it to the Service. -//| characteristic = Characteristic.add_to_service(service, -//| _bleio.UUID(0x2919), properties=Characteristic.READ | Characteristic.NOTIFY) -//| -//| adv = ServerAdvertisement(peripheral) -//| peripheral.start_advertising(adv.advertising_data_bytes, scan_response=adv.scan_response_bytes) -//| -//| while not peripheral.connected: -//| # Wait for connection. -//| pass -//| -//| .. class:: Peripheral(name=None) -//| -//| Create a new Peripheral object. -//| -//| :param str name: The name used when advertising this peripheral. If name is None, -//| _bleio.adapter.default_name will be used. -//| -STATIC mp_obj_t bleio_peripheral_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_name }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_name, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - bleio_peripheral_obj_t *self = m_new_obj(bleio_peripheral_obj_t); - self->base.type = &bleio_peripheral_type; - - mp_obj_t name = args[ARG_name].u_obj; - if (name == mp_const_none) { - name = common_hal_bleio_adapter_get_default_name(); - } else if (!MP_OBJ_IS_STR(name)) { - mp_raise_ValueError(translate("name must be a string")); - } - - common_hal_bleio_peripheral_construct(self, name); - - return MP_OBJ_FROM_PTR(self); -} - -//| .. attribute:: connected (read-only) -//| -//| True if connected to a BLE Central device. -//| -STATIC mp_obj_t bleio_peripheral_get_connected(mp_obj_t self_in) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - return mp_obj_new_bool(common_hal_bleio_peripheral_get_connected(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_peripheral_get_connected_obj, bleio_peripheral_get_connected); - -const mp_obj_property_t bleio_peripheral_connected_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&bleio_peripheral_get_connected_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; - -//| .. attribute:: services -//| -//| A tuple of :py:class:`Service` objects offered by this peripheral. (read-only) -//| -STATIC mp_obj_t bleio_peripheral_get_services(mp_obj_t self_in) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - // Return list as a tuple so user won't be able to change it. - mp_obj_list_t *services_list = common_hal_bleio_peripheral_get_services(self); - return mp_obj_new_tuple(services_list->len, services_list->items); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_peripheral_get_services_obj, bleio_peripheral_get_services); - -const mp_obj_property_t bleio_peripheral_services_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&bleio_peripheral_get_services_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; - -//| .. attribute:: name -//| -//| The peripheral's name, included when advertising. (read-only) -//| -STATIC mp_obj_t bleio_peripheral_get_name(mp_obj_t self_in) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - return common_hal_bleio_peripheral_get_name(self); -} -MP_DEFINE_CONST_FUN_OBJ_1(bleio_peripheral_get_name_obj, bleio_peripheral_get_name); - -const mp_obj_property_t bleio_peripheral_name_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&bleio_peripheral_get_name_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; - -//| .. method:: start_advertising(data, *, scan_response=None, connectable=True, interval=0.1) -//| -//| Starts advertising the peripheral. The peripheral's name and -//| services are included in the advertisement packets. -//| -//| :param buf data: advertising data packet bytes -//| :param buf scan_response: scan response data packet bytes. ``None`` if no scan response is needed. -//| :param bool connectable: If `True` then other devices are allowed to connect to this peripheral. -//| :param float interval: advertising interval, in seconds -//| -STATIC mp_obj_t bleio_peripheral_start_advertising(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - - enum { ARG_data, ARG_scan_response, ARG_connectable, ARG_interval }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_scan_response, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_connectable, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, - { MP_QSTR_interval, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - mp_buffer_info_t data_bufinfo; - mp_get_buffer_raise(args[ARG_data].u_obj, &data_bufinfo, MP_BUFFER_READ); - - // Pass an empty buffer if scan_response not provided. - mp_buffer_info_t scan_response_bufinfo = { 0 }; - if (args[ARG_scan_response].u_obj != mp_const_none) { - mp_get_buffer_raise(args[ARG_scan_response].u_obj, &scan_response_bufinfo, MP_BUFFER_READ); - } - - if (args[ARG_interval].u_obj == MP_OBJ_NULL) { - args[ARG_interval].u_obj = mp_obj_new_float(ADV_INTERVAL_DEFAULT); - } - - const mp_float_t interval = mp_obj_float_get(args[ARG_interval].u_obj); - if (interval < ADV_INTERVAL_MIN || interval > ADV_INTERVAL_MAX) { - mp_raise_ValueError_varg(translate("interval must be in range %s-%s"), - ADV_INTERVAL_MIN_STRING, ADV_INTERVAL_MAX_STRING); - } - - common_hal_bleio_peripheral_start_advertising(self, args[ARG_connectable].u_bool, interval, - &data_bufinfo, &scan_response_bufinfo); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_peripheral_start_advertising_obj, 2, bleio_peripheral_start_advertising); - -//| .. method:: stop_advertising() -//| -//| Stop sending advertising packets. -STATIC mp_obj_t bleio_peripheral_stop_advertising(mp_obj_t self_in) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - common_hal_bleio_peripheral_stop_advertising(self); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_peripheral_stop_advertising_obj, bleio_peripheral_stop_advertising); - -//| .. method:: disconnect() -//| -//| Disconnects from the remote central. -//| Normally the central initiates a disconnection. Use this only -//| if necessary for your application. -//| -STATIC mp_obj_t bleio_peripheral_disconnect(mp_obj_t self_in) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - common_hal_bleio_peripheral_disconnect(self); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_peripheral_disconnect_obj, bleio_peripheral_disconnect); - -//| .. method:: discover_remote_services(service_uuids_whitelist=None) -//| Do BLE discovery for all services or for the given service UUIDS, -//| to find their handles and characteristics, and return the discovered services. -//| `Peripheral.connected` must be True. -//| -//| :param iterable service_uuids_whitelist: an iterable of :py:class:~`UUID` objects for the services -//| provided by the peripheral that you want to use. -//| The peripheral may provide more services, but services not listed are ignored -//| and will not be returned. -//| -//| If service_uuids_whitelist is None, then all services will undergo discovery, which can be slow. -//| -//| If the service UUID is 128-bit, or its characteristic UUID's are 128-bit, you -//| you must have already created a :py:class:~`UUID` object for that UUID in order for the -//| service or characteristic to be discovered. Creating the UUID causes the UUID to be registered -//| for use. (This restriction may be lifted in the future.) -//| -//| Thought it is unusual for a peripheral to act as a BLE client, it can do so, and -//| needs to be able to do discovery on its peer (a central). -//| Examples include a peripheral accessing a central that provides Current Time Service, -//| Apple Notification Center Service, or Battery Service. -//| -//| :return: A tuple of services provided by the remote central. -//| -STATIC mp_obj_t bleio_peripheral_discover_remote_services(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - - enum { ARG_service_uuids_whitelist }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_service_uuids_whitelist, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (!common_hal_bleio_peripheral_get_connected(self)) { - mp_raise_ValueError(translate("Not connected")); - } - - return MP_OBJ_FROM_PTR(common_hal_bleio_peripheral_discover_remote_services( - MP_OBJ_FROM_PTR(self), - args[ARG_service_uuids_whitelist].u_obj)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_peripheral_discover_remote_services_obj, 1, bleio_peripheral_discover_remote_services); - -//| .. method:: pair() -//| -//| Request pairing with connected central. -STATIC mp_obj_t bleio_peripheral_pair(mp_obj_t self_in) { - bleio_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - common_hal_bleio_peripheral_pair(self); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_peripheral_pair_obj, bleio_peripheral_pair); - -STATIC const mp_rom_map_elem_t bleio_peripheral_locals_dict_table[] = { - // Methods - { MP_ROM_QSTR(MP_QSTR_start_advertising), MP_ROM_PTR(&bleio_peripheral_start_advertising_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop_advertising), MP_ROM_PTR(&bleio_peripheral_stop_advertising_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&bleio_peripheral_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_discover_remote_services), MP_ROM_PTR(&bleio_peripheral_discover_remote_services_obj) }, - { MP_ROM_QSTR(MP_QSTR_pair), MP_ROM_PTR(&bleio_peripheral_pair_obj) }, - - // Properties - { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_peripheral_connected_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&bleio_peripheral_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_services), MP_ROM_PTR(&bleio_peripheral_services_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(bleio_peripheral_locals_dict, bleio_peripheral_locals_dict_table); - -const mp_obj_type_t bleio_peripheral_type = { - { &mp_type_type }, - .name = MP_QSTR_Peripheral, - .make_new = bleio_peripheral_make_new, - .locals_dict = (mp_obj_dict_t*)&bleio_peripheral_locals_dict -}; diff --git a/shared-bindings/_bleio/Peripheral.h b/shared-bindings/_bleio/Peripheral.h deleted file mode 100644 index bc56a93389..0000000000 --- a/shared-bindings/_bleio/Peripheral.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PERIPHERAL_H -#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PERIPHERAL_H - -#include "py/objtuple.h" -#include "common-hal/_bleio/Peripheral.h" -#include "common-hal/_bleio/Service.h" - -extern const mp_obj_type_t bleio_peripheral_type; - -extern void common_hal_bleio_peripheral_construct(bleio_peripheral_obj_t *self, mp_obj_t name); -extern void common_hal_bleio_peripheral_add_service(bleio_peripheral_obj_t *self, bleio_service_obj_t *service); -extern mp_obj_list_t *common_hal_bleio_peripheral_get_services(bleio_peripheral_obj_t *self); -extern bool common_hal_bleio_peripheral_get_connected(bleio_peripheral_obj_t *self); -extern mp_obj_t common_hal_bleio_peripheral_get_name(bleio_peripheral_obj_t *self); -extern void common_hal_bleio_peripheral_start_advertising(bleio_peripheral_obj_t *device, bool connectable, float interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo); -extern void common_hal_bleio_peripheral_stop_advertising(bleio_peripheral_obj_t *device); -extern void common_hal_bleio_peripheral_disconnect(bleio_peripheral_obj_t *device); -extern mp_obj_tuple_t *common_hal_bleio_peripheral_discover_remote_services(bleio_peripheral_obj_t *self, mp_obj_t service_uuids_whitelist); -extern void common_hal_bleio_peripheral_pair(bleio_peripheral_obj_t *device); - -#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PERIPHERAL_H diff --git a/shared-bindings/_bleio/ScanEntry.c b/shared-bindings/_bleio/ScanEntry.c index bec380d03f..d03cd6fb55 100644 --- a/shared-bindings/_bleio/ScanEntry.c +++ b/shared-bindings/_bleio/ScanEntry.c @@ -29,6 +29,7 @@ #include #include "py/objproperty.h" +#include "py/runtime.h" #include "shared-bindings/_bleio/Address.h" #include "shared-bindings/_bleio/ScanEntry.h" #include "shared-bindings/_bleio/UUID.h" @@ -36,14 +37,43 @@ //| .. currentmodule:: _bleio //| -//| :class:`ScanEntry` -- BLE scan response entry +//| :class:`ScanEntry` -- BLE scan data //| ========================================================= //| -//| Encapsulates information about a device that was received as a -//| response to a BLE scan request. This object may only be created -//| by a `_bleio.Scanner`: it has no user-visible constructor. +//| Encapsulates information about a device that was received during scanning. It can be +//| advertisement or scan response data. This object may only be created by a `_bleio.ScanResults`: +//| it has no user-visible constructor. //| +//| .. class:: ScanEntry() +//| +//| Cannot be instantiated directly. Use `_bleio.Adapter.start_scan`. +//| +//| .. method:: matches(prefixes, *, all=True) +//| +//| Returns True if the ScanEntry matches all prefixes when ``all`` is True. This is stricter +//| than the scan filtering which accepts any advertisements that match any of the prefixes +//| where all is False. +//| +STATIC mp_obj_t bleio_scanentry_matches(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_prefixes, ARG_all }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_prefixes, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_all, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_prefixes].u_obj, &bufinfo, MP_BUFFER_READ); + return mp_obj_new_bool(common_hal_bleio_scanentry_matches(self, bufinfo.buf, bufinfo.len, args[ARG_all].u_bool)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_scanentry_matches_obj, 2, bleio_scanentry_matches); + //| .. attribute:: address //| //| The address of the device (read-only), of type `_bleio.Address`. @@ -95,11 +125,47 @@ const mp_obj_property_t bleio_scanentry_rssi_obj = { (mp_obj_t)&mp_const_none_obj }, }; +//| .. attribute:: connectable +//| +//| True if the device can be connected to. (read-only) +//| +STATIC mp_obj_t scanentry_get_connectable(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(common_hal_bleio_scanentry_get_connectable(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_connectable_obj, scanentry_get_connectable); + +const mp_obj_property_t bleio_scanentry_connectable_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_connectable_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: scan_response +//| +//| True if the entry was a scan response. (read-only) +//| +STATIC mp_obj_t scanentry_get_scan_response(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(common_hal_bleio_scanentry_get_scan_response(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_scan_response_obj, scanentry_get_scan_response); + +const mp_obj_property_t bleio_scanentry_scan_response_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_scan_response_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; STATIC const mp_rom_map_elem_t bleio_scanentry_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&bleio_scanentry_address_obj) }, { MP_ROM_QSTR(MP_QSTR_advertisement_bytes), MP_ROM_PTR(&bleio_scanentry_advertisement_bytes_obj) }, { MP_ROM_QSTR(MP_QSTR_rssi), MP_ROM_PTR(&bleio_scanentry_rssi_obj) }, + { MP_ROM_QSTR(MP_QSTR_connectable), MP_ROM_PTR(&bleio_scanentry_connectable_obj) }, + { MP_ROM_QSTR(MP_QSTR_scan_response), MP_ROM_PTR(&bleio_scanentry_scan_response_obj) }, + { MP_ROM_QSTR(MP_QSTR_matches), MP_ROM_PTR(&bleio_scanentry_matches_obj) }, }; STATIC MP_DEFINE_CONST_DICT(bleio_scanentry_locals_dict, bleio_scanentry_locals_dict_table); diff --git a/shared-bindings/_bleio/ScanEntry.h b/shared-bindings/_bleio/ScanEntry.h index 8af1f050a8..9aeaf20d33 100644 --- a/shared-bindings/_bleio/ScanEntry.h +++ b/shared-bindings/_bleio/ScanEntry.h @@ -37,5 +37,8 @@ extern const mp_obj_type_t bleio_scanentry_type; mp_obj_t common_hal_bleio_scanentry_get_address(bleio_scanentry_obj_t *self); mp_obj_t common_hal_bleio_scanentry_get_advertisement_bytes(bleio_scanentry_obj_t *self); mp_int_t common_hal_bleio_scanentry_get_rssi(bleio_scanentry_obj_t *self); +bool common_hal_bleio_scanentry_get_connectable(bleio_scanentry_obj_t *self); +bool common_hal_bleio_scanentry_get_scan_response(bleio_scanentry_obj_t *self); +bool common_hal_bleio_scanentry_matches(bleio_scanentry_obj_t *self, uint8_t* prefixes, size_t prefixes_len, bool all); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANENTRY_H diff --git a/shared-bindings/_bleio/ScanResults.c b/shared-bindings/_bleio/ScanResults.c new file mode 100644 index 0000000000..dcece3d5d4 --- /dev/null +++ b/shared-bindings/_bleio/ScanResults.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/ScanResults.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`ScanResults` -- An Iterator over BLE scanning results +//| =============================================================== +//| +//| Iterates over advertising data received while scanning. This object is always created +//| by a `_bleio.Adapter`: it has no user-visible constructor. +//| +STATIC mp_obj_t scanresults_iternext(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &bleio_scanresults_type)); + bleio_scanresults_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_t scan_entry = common_hal_bleio_scanresults_next(self); + if (scan_entry != mp_const_none) { + return scan_entry; + } + return MP_OBJ_STOP_ITERATION; +} + +//| .. class:: ScanResults() +//| +//| Cannot be instantiated directly. Use `_bleio.Adapter.start_scan`. +//| +//| .. method:: __iter__() +//| +//| Returns itself since it is the iterator. +//| +//| .. method:: __next__() +//| +//| Returns the next `_bleio.ScanEntry`. Blocks if none have been received and scanning is still +//| active. Raises `StopIteration` if scanning is finished and no other results are available. +//| + +const mp_obj_type_t bleio_scanresults_type = { + { &mp_type_type }, + .name = MP_QSTR_ScanResults, + .getiter = mp_identity_getiter, + .iternext = scanresults_iternext, +}; diff --git a/ports/nrf/common-hal/_bleio/Central.h b/shared-bindings/_bleio/ScanResults.h similarity index 72% rename from ports/nrf/common-hal/_bleio/Central.h rename to shared-bindings/_bleio/ScanResults.h index 01f7faca74..a8c88c215d 100644 --- a/ports/nrf/common-hal/_bleio/Central.h +++ b/shared-bindings/_bleio/ScanResults.h @@ -5,6 +5,7 @@ * * Copyright (c) 2019 Dan Halbert for Adafruit Industries * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -25,20 +26,14 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_CENTRAL_H -#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_CENTRAL_H +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANRESULTS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANRESULTS_H -#include +#include "py/obj.h" +#include "shared-module/_bleio/ScanResults.h" -#include "py/objlist.h" -#include "shared-module/_bleio/Address.h" +extern const mp_obj_type_t bleio_scanresults_type; -typedef struct { - mp_obj_base_t base; - volatile bool waiting_to_connect; - volatile uint16_t conn_handle; - // Services discovered after connecting to a remote peripheral. - mp_obj_list_t *remote_service_list; -} bleio_central_obj_t; +mp_obj_t common_hal_bleio_scanresults_next(bleio_scanresults_obj_t *self); -#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_CENTRAL_H +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANRESULTS_H diff --git a/shared-bindings/_bleio/Scanner.c b/shared-bindings/_bleio/Scanner.c deleted file mode 100644 index 94cec97529..0000000000 --- a/shared-bindings/_bleio/Scanner.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * Copyright (c) 2018 Artur Pacholec - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/objproperty.h" -#include "py/runtime.h" -#include "shared-bindings/_bleio/ScanEntry.h" -#include "shared-bindings/_bleio/Scanner.h" - -#define INTERVAL_DEFAULT (0.1f) -#define INTERVAL_MIN (0.0025f) -#define INTERVAL_MIN_STRING "0.0025" -#define INTERVAL_MAX (40.959375f) -#define INTERVAL_MAX_STRING "40.959375" -#define WINDOW_DEFAULT (0.1f) - -//| .. currentmodule:: _bleio -//| -//| :class:`Scanner` -- scan for nearby BLE devices -//| ========================================================= -//| -//| Scan for nearby BLE devices. -//| -//| Usage:: -//| -//| import _bleio -//| scanner = _bleio.Scanner() -//| entries = scanner.scan(2.5) # Scan for 2.5 seconds -//| - -//| .. class:: Scanner() -//| -//| Create a new Scanner object. -//| -STATIC mp_obj_t bleio_scanner_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *all_args, mp_map_t *kw_args) { - mp_arg_check_num(n_args, kw_args, 0, 0, false); - - bleio_scanner_obj_t *self = m_new_obj(bleio_scanner_obj_t); - self->base.type = type; - - common_hal_bleio_scanner_construct(self); - - return MP_OBJ_FROM_PTR(self); -} - -//| .. method:: scan(timeout, \*, interval=0.1, window=0.1) -//| -//| Performs a BLE scan. -//| -//| :param float timeout: the scan timeout in seconds -//| :param float interval: the interval (in seconds) between the start of two consecutive scan windows -//| Must be in the range 0.0025 - 40.959375 seconds. -//| :param float window: the duration (in seconds) to scan a single BLE channel. -//| window must be <= interval. -//| :returns: an iterable of `ScanEntry` objects -//| :rtype: iterable -//| -STATIC mp_obj_t bleio_scanner_scan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_timeout, ARG_interval, ARG_window }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_timeout, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_interval, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_window, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - bleio_scanner_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - const mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); - - if (args[ARG_interval].u_obj == MP_OBJ_NULL) { - args[ARG_interval].u_obj = mp_obj_new_float(INTERVAL_DEFAULT); - } - - if (args[ARG_window].u_obj == MP_OBJ_NULL) { - args[ARG_window].u_obj = mp_obj_new_float(WINDOW_DEFAULT); - } - - const mp_float_t interval = mp_obj_float_get(args[ARG_interval].u_obj); - if (interval < INTERVAL_MIN || interval > INTERVAL_MAX) { - mp_raise_ValueError_varg(translate("interval must be in range %s-%s"), INTERVAL_MIN_STRING, INTERVAL_MAX_STRING); - } - - const mp_float_t window = mp_obj_float_get(args[ARG_window].u_obj); - if (window > interval) { - mp_raise_ValueError(translate("window must be <= interval")); - } - - return common_hal_bleio_scanner_scan(self, timeout, interval, window); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_scanner_scan_obj, 2, bleio_scanner_scan); - - -STATIC const mp_rom_map_elem_t bleio_scanner_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&bleio_scanner_scan_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(bleio_scanner_locals_dict, bleio_scanner_locals_dict_table); - -const mp_obj_type_t bleio_scanner_type = { - { &mp_type_type }, - .name = MP_QSTR_Scanner, - .make_new = bleio_scanner_make_new, - .locals_dict = (mp_obj_dict_t*)&bleio_scanner_locals_dict -}; diff --git a/shared-bindings/_bleio/Service.c b/shared-bindings/_bleio/Service.c index da5633f2a3..3e1ad70883 100644 --- a/shared-bindings/_bleio/Service.c +++ b/shared-bindings/_bleio/Service.c @@ -29,54 +29,38 @@ #include "py/objproperty.h" #include "py/runtime.h" #include "shared-bindings/_bleio/Characteristic.h" -#include "shared-bindings/_bleio/Peripheral.h" #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/UUID.h" //| .. currentmodule:: _bleio //| -//| :class:`Service` -- BLE service +//| :class:`Service` -- BLE GATT Service //| ========================================================= //| //| Stores information about a BLE service and its characteristics. //| -//| .. class:: Service +//| .. class:: Service(uuid, *, secondary=False) //| -//| There is no regular constructor for a Service. A new local Service can be created -//| and attached to a Peripheral by calling `add_to_peripheral()`. -//| Remote Service objects are created by `Central.discover_remote_services()` -//| or `Peripheral.discover_remote_services()`. +//| Create a new Service identified by the specified UUID. It can be accessed by all +//| connections. This is known as a Service server. Client Service objects are created via +//| `Connection.discover_remote_services`. //| -//| .. classmethod:: add_to_peripheral(peripheral, uuid, *, secondary=False) +//| To mark the Service as secondary, pass `True` as :py:data:`secondary`. //| -//| Create a new Service object, identitied by the specified UUID, and add it -//| to the given Peripheral. -//| -//| To mark the service as secondary, pass `True` as :py:data:`secondary`. -//| -//| :param Peripheral peripheral: The peripheral that will provide this service -//| :param UUID uuid: The uuid of the service -//| :param bool secondary: If the service is a secondary one +//| :param UUID uuid: The uuid of the service +//| :param bool secondary: If the service is a secondary one // -//| :return: the new Service +//| :return: the new Service //| -STATIC mp_obj_t bleio_service_add_to_peripheral(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // class is arg[0], which we can ignore. - - enum { ARG_peripheral, ARG_uuid, ARG_secondary }; +STATIC mp_obj_t bleio_service_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_uuid, ARG_secondary }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_peripheral, MP_ARG_REQUIRED | MP_ARG_OBJ,}, { MP_QSTR_uuid, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_secondary, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - const mp_obj_t peripheral_obj = args[ARG_peripheral].u_obj; - if (!MP_OBJ_IS_TYPE(peripheral_obj, &bleio_peripheral_type)) { - mp_raise_ValueError(translate("Expected a Peripheral")); - } + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); const mp_obj_t uuid_obj = args[ARG_uuid].u_obj; if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { @@ -88,19 +72,15 @@ STATIC mp_obj_t bleio_service_add_to_peripheral(size_t n_args, const mp_obj_t *p bleio_service_obj_t *service = m_new_obj(bleio_service_obj_t); service->base.type = &bleio_service_type; - common_hal_bleio_service_construct( - service, MP_OBJ_TO_PTR(peripheral_obj), MP_OBJ_TO_PTR(uuid_obj), is_secondary); - - common_hal_bleio_peripheral_add_service(peripheral_obj, service); + common_hal_bleio_service_construct(service, MP_OBJ_TO_PTR(uuid_obj), is_secondary); return MP_OBJ_FROM_PTR(service); } -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_service_add_to_peripheral_fun_obj, 3, bleio_service_add_to_peripheral); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(bleio_service_add_to_peripheral_obj, MP_ROM_PTR(&bleio_service_add_to_peripheral_fun_obj)); //| .. attribute:: characteristics //| -//| A tuple of :py:class:`Characteristic` designating the characteristics that are offered by this service. (read-only) +//| A tuple of :py:class:`Characteristic` designating the characteristics that are offered by +//| this service. (read-only) //| STATIC mp_obj_t bleio_service_get_characteristics(mp_obj_t self_in) { bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); @@ -156,7 +136,8 @@ const mp_obj_property_t bleio_service_secondary_obj = { //| .. attribute:: uuid //| //| The UUID of this service. (read-only) -//| Will be ``None`` if the 128-bit UUID for this service is not known. +//| +//| Will be ``None`` if the 128-bit UUID for this service is not known. //| STATIC mp_obj_t bleio_service_get_uuid(mp_obj_t self_in) { bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); @@ -175,10 +156,10 @@ const mp_obj_property_t bleio_service_uuid_obj = { STATIC const mp_rom_map_elem_t bleio_service_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_add_to_peripheral), MP_ROM_PTR(&bleio_service_add_to_peripheral_obj) }, { MP_ROM_QSTR(MP_QSTR_characteristics), MP_ROM_PTR(&bleio_service_characteristics_obj) }, { MP_ROM_QSTR(MP_QSTR_secondary), MP_ROM_PTR(&bleio_service_secondary_obj) }, { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_service_uuid_obj) }, + { MP_ROM_QSTR(MP_QSTR_remote), MP_ROM_PTR(&bleio_service_remote_obj) }, }; STATIC MP_DEFINE_CONST_DICT(bleio_service_locals_dict, bleio_service_locals_dict_table); @@ -196,6 +177,25 @@ STATIC void bleio_service_print(const mp_print_t *print, mp_obj_t self_in, mp_pr const mp_obj_type_t bleio_service_type = { { &mp_type_type }, .name = MP_QSTR_Service, + .make_new = bleio_service_make_new, .print = bleio_service_print, .locals_dict = (mp_obj_dict_t*)&bleio_service_locals_dict }; + +// Helper for classes that store lists of services. +mp_obj_tuple_t* service_linked_list_to_tuple(bleio_service_obj_t * services) { + // Return list as a tuple so user won't be able to change it. + bleio_service_obj_t *head = services; + size_t len = 0; + while (head != NULL) { + len++; + head = head->next; + } + mp_obj_tuple_t * t = MP_OBJ_TO_PTR(mp_obj_new_tuple(len, NULL)); + head = services; + for (int32_t i = len - 1; i >= 0; i--) { + t->items[i] = MP_OBJ_FROM_PTR(head); + head = head->next; + } + return t; +} diff --git a/shared-bindings/_bleio/Service.h b/shared-bindings/_bleio/Service.h index e061bcffcb..273c6bd989 100644 --- a/shared-bindings/_bleio/Service.h +++ b/shared-bindings/_bleio/Service.h @@ -28,16 +28,24 @@ #ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SERVICE_H #define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SERVICE_H -#include "common-hal/_bleio/Peripheral.h" +#include "common-hal/_bleio/Characteristic.h" +#include "common-hal/_bleio/Connection.h" #include "common-hal/_bleio/Service.h" +#include "py/objtuple.h" + const mp_obj_type_t bleio_service_type; -extern void common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_peripheral_obj_t *peripheral, bleio_uuid_obj_t *uuid, bool is_secondary); +// Private version that doesn't allocate on the heap +extern uint32_t _common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary, mp_obj_list_t * characteristic_list); +extern void common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary); +extern void common_hal_bleio_service_from_remote_service(bleio_service_obj_t *self, bleio_connection_obj_t* connection, bleio_uuid_obj_t *uuid, bool is_secondary); extern bleio_uuid_obj_t *common_hal_bleio_service_get_uuid(bleio_service_obj_t *self); extern mp_obj_list_t *common_hal_bleio_service_get_characteristic_list(bleio_service_obj_t *self); extern bool common_hal_bleio_service_get_is_remote(bleio_service_obj_t *self); extern bool common_hal_bleio_service_get_is_secondary(bleio_service_obj_t *self); -extern void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, bleio_characteristic_obj_t *characteristic); +extern void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, bleio_characteristic_obj_t *characteristic, mp_buffer_info_t *initial_value_bufinfo); + +mp_obj_tuple_t* service_linked_list_to_tuple(bleio_service_obj_t * services); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SERVICE_H diff --git a/shared-bindings/_bleio/UUID.c b/shared-bindings/_bleio/UUID.c index 3c0889aad9..dd34159022 100644 --- a/shared-bindings/_bleio/UUID.c +++ b/shared-bindings/_bleio/UUID.c @@ -156,9 +156,10 @@ STATIC mp_obj_t bleio_uuid_get_uuid128(mp_obj_t self_in) { bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(self_in); uint8_t uuid128[16]; - if (!common_hal_bleio_uuid_get_uuid128(self, uuid128)) { + if (common_hal_bleio_uuid_get_size(self) != 128) { mp_raise_AttributeError(translate("not a 128-bit UUID")); } + common_hal_bleio_uuid_get_uuid128(self, uuid128); return mp_obj_new_bytes(uuid128, 16); } @@ -192,10 +193,42 @@ const mp_obj_property_t bleio_uuid_size_obj = { (mp_obj_t)&mp_const_none_obj}, }; + +//| .. method:: pack_into(buffer, offset=0) +//| +//| Packs the UUID into the given buffer at the given offset. +//| +STATIC mp_obj_t bleio_uuid_pack_into(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_buffer, ARG_offset }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_buffer, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_offset, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_WRITE); + + size_t offset = args[ARG_offset].u_int; + if (offset + common_hal_bleio_uuid_get_size(self) / 8 > bufinfo.len) { + mp_raise_ValueError(translate("Buffer + offset too small %d %d %d")); + } + + common_hal_bleio_uuid_pack_into(self, bufinfo.buf + offset); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_uuid_pack_into_obj, 2, bleio_uuid_pack_into); + STATIC const mp_rom_map_elem_t bleio_uuid_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_uuid16), MP_ROM_PTR(&bleio_uuid_uuid16_obj) }, { MP_ROM_QSTR(MP_QSTR_uuid128), MP_ROM_PTR(&bleio_uuid_uuid128_obj) }, { MP_ROM_QSTR(MP_QSTR_size), MP_ROM_PTR(&bleio_uuid_size_obj) }, + { MP_ROM_QSTR(MP_QSTR_pack_into), MP_ROM_PTR(&bleio_uuid_pack_into_obj) }, }; STATIC MP_DEFINE_CONST_DICT(bleio_uuid_locals_dict, bleio_uuid_locals_dict_table); @@ -231,13 +264,19 @@ STATIC mp_obj_t bleio_uuid_unary_op(mp_unary_op_t op, mp_obj_t self_in) { //| STATIC mp_obj_t bleio_uuid_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) { switch (op) { - // Two UUID's are equal if their uuid16 values and uuid128 references match. + // Two UUID's are equal if their uuid16 values match or their uuid128 values match. case MP_BINARY_OP_EQUAL: if (MP_OBJ_IS_TYPE(rhs_in, &bleio_uuid_type)) { - return mp_obj_new_bool( - common_hal_bleio_uuid_get_uuid16(lhs_in) == common_hal_bleio_uuid_get_uuid16(rhs_in) && - common_hal_bleio_uuid_get_uuid128_reference(lhs_in) == - common_hal_bleio_uuid_get_uuid128_reference(rhs_in)); + if (common_hal_bleio_uuid_get_size(lhs_in) == 16 && + common_hal_bleio_uuid_get_size(rhs_in) == 16) { + return mp_obj_new_bool(common_hal_bleio_uuid_get_uuid16(lhs_in) == + common_hal_bleio_uuid_get_uuid16(rhs_in)); + } + uint8_t lhs[16]; + uint8_t rhs[16]; + common_hal_bleio_uuid_get_uuid128(lhs_in, lhs); + common_hal_bleio_uuid_get_uuid128(rhs_in, rhs); + return mp_obj_new_bool(memcmp(lhs, rhs, sizeof(lhs)) == 0); } else { return mp_const_false; } diff --git a/shared-bindings/_bleio/UUID.h b/shared-bindings/_bleio/UUID.h index 46ac54ff39..1490737a71 100644 --- a/shared-bindings/_bleio/UUID.h +++ b/shared-bindings/_bleio/UUID.h @@ -34,10 +34,11 @@ void bleio_uuid_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t extern const mp_obj_type_t bleio_uuid_type; -extern void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, mp_int_t uuid16, uint8_t uuid128[]); +extern void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, mp_int_t uuid16, const uint8_t uuid128[]); extern uint32_t common_hal_bleio_uuid_get_uuid16(bleio_uuid_obj_t *self); extern bool common_hal_bleio_uuid_get_uuid128(bleio_uuid_obj_t *self, uint8_t uuid128[16]); -extern uint32_t common_hal_bleio_uuid_get_uuid128_reference(bleio_uuid_obj_t *self); extern uint32_t common_hal_bleio_uuid_get_size(bleio_uuid_obj_t *self); +void common_hal_bleio_uuid_pack_into(bleio_uuid_obj_t *self, uint8_t* buf); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_UUID_H diff --git a/shared-bindings/_bleio/__init__.c b/shared-bindings/_bleio/__init__.c index f207be8cfc..0c6ebb973b 100644 --- a/shared-bindings/_bleio/__init__.c +++ b/shared-bindings/_bleio/__init__.c @@ -29,13 +29,12 @@ #include "shared-bindings/_bleio/__init__.h" #include "shared-bindings/_bleio/Address.h" #include "shared-bindings/_bleio/Attribute.h" -#include "shared-bindings/_bleio/Central.h" #include "shared-bindings/_bleio/Characteristic.h" #include "shared-bindings/_bleio/CharacteristicBuffer.h" +#include "shared-bindings/_bleio/Connection.h" #include "shared-bindings/_bleio/Descriptor.h" -#include "shared-bindings/_bleio/Peripheral.h" #include "shared-bindings/_bleio/ScanEntry.h" -#include "shared-bindings/_bleio/Scanner.h" +#include "shared-bindings/_bleio/ScanResults.h" #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/UUID.h" @@ -64,34 +63,32 @@ //| Address //| Adapter //| Attribute -//| Central //| Characteristic //| CharacteristicBuffer +//| Connection //| Descriptor -//| Peripheral //| ScanEntry -//| Scanner +//| ScanResults //| Service //| UUID //| //| .. attribute:: adapter //| -//| BLE Adapter information, such as enabled state as well as MAC -//| address. +//| BLE Adapter used to manage device discovery and connections. //| This object is the sole instance of `_bleio.Adapter`. //| STATIC const mp_rom_map_elem_t bleio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__bleio) }, + { MP_ROM_QSTR(MP_QSTR_Adapter), MP_ROM_PTR(&bleio_adapter_type) }, { MP_ROM_QSTR(MP_QSTR_Address), MP_ROM_PTR(&bleio_address_type) }, { MP_ROM_QSTR(MP_QSTR_Attribute), MP_ROM_PTR(&bleio_attribute_type) }, - { MP_ROM_QSTR(MP_QSTR_Central), MP_ROM_PTR(&bleio_central_type) }, + { MP_ROM_QSTR(MP_QSTR_Connection), MP_ROM_PTR(&bleio_connection_type) }, { MP_ROM_QSTR(MP_QSTR_Characteristic), MP_ROM_PTR(&bleio_characteristic_type) }, { MP_ROM_QSTR(MP_QSTR_CharacteristicBuffer), MP_ROM_PTR(&bleio_characteristic_buffer_type) }, { MP_ROM_QSTR(MP_QSTR_Descriptor), MP_ROM_PTR(&bleio_descriptor_type) }, - { MP_ROM_QSTR(MP_QSTR_Peripheral), MP_ROM_PTR(&bleio_peripheral_type) }, { MP_ROM_QSTR(MP_QSTR_ScanEntry), MP_ROM_PTR(&bleio_scanentry_type) }, - { MP_ROM_QSTR(MP_QSTR_Scanner), MP_ROM_PTR(&bleio_scanner_type) }, + { MP_ROM_QSTR(MP_QSTR_ScanResults), MP_ROM_PTR(&bleio_scanresults_type) }, { MP_ROM_QSTR(MP_QSTR_Service), MP_ROM_PTR(&bleio_service_type) }, { MP_ROM_QSTR(MP_QSTR_UUID), MP_ROM_PTR(&bleio_uuid_type) }, diff --git a/shared-bindings/_bleio/__init__.h b/shared-bindings/_bleio/__init__.h index 67379ae2e1..92c695fa66 100644 --- a/shared-bindings/_bleio/__init__.h +++ b/shared-bindings/_bleio/__init__.h @@ -36,17 +36,19 @@ #include "common-hal/_bleio/__init__.h" #include "common-hal/_bleio/Adapter.h" -extern const super_adapter_obj_t common_hal_bleio_adapter_obj; +extern bleio_adapter_obj_t common_hal_bleio_adapter_obj; -extern void common_hal_bleio_check_connected(uint16_t conn_handle); +void common_hal_bleio_check_connected(uint16_t conn_handle); -extern uint16_t common_hal_bleio_device_get_conn_handle(mp_obj_t device); -extern mp_obj_list_t *common_hal_bleio_device_get_remote_service_list(mp_obj_t device); -extern void common_hal_bleio_device_discover_remote_services(mp_obj_t device, mp_obj_t service_uuids_whitelist); +uint16_t common_hal_bleio_device_get_conn_handle(mp_obj_t device); +mp_obj_list_t *common_hal_bleio_device_get_remote_service_list(mp_obj_t device); +void common_hal_bleio_device_discover_remote_services(mp_obj_t device, mp_obj_t service_uuids_whitelist); -extern mp_obj_t common_hal_bleio_gatts_read(uint16_t handle, uint16_t conn_handle); -extern void common_hal_bleio_gatts_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo); -extern void common_hal_bleio_gattc_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, bool write_no_response); +size_t common_hal_bleio_gatts_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len); +void common_hal_bleio_gatts_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo); +size_t common_hal_bleio_gattc_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len); +void common_hal_bleio_gattc_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, bool write_no_response); +void common_hal_bleio_gc_collect(void); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO___INIT___H diff --git a/shared-bindings/_pixelbuf/__init__.c b/shared-bindings/_pixelbuf/__init__.c index 48b9f1cef1..eb0cb29842 100644 --- a/shared-bindings/_pixelbuf/__init__.c +++ b/shared-bindings/_pixelbuf/__init__.c @@ -55,7 +55,7 @@ //| .. class:: ByteOrder() //| -//| Classes representing byteorders for circuitpython +//| Classes representing byteorders for CircuitPython //| .. attribute:: bpp @@ -284,7 +284,7 @@ PIXELBUF_BYTEORDER(LBRG, 4, 3, 1, 2, 0, false, true) //| * **bpp** 4 //| * **has_luminosity** True //| -//| Actual format commonly used by DotStar (5 bit luninance value) +//| Actual format commonly used by DotStar (5 bit luminance value) PIXELBUF_BYTEORDER(LBGR, 4, 3, 2, 1, 0, false, true) STATIC const mp_rom_map_elem_t pixelbuf_module_globals_table[] = { diff --git a/shared-bindings/analogio/AnalogIn.c b/shared-bindings/analogio/AnalogIn.c index a8bbbf59af..9a9b525d8b 100644 --- a/shared-bindings/analogio/AnalogIn.c +++ b/shared-bindings/analogio/AnalogIn.c @@ -138,7 +138,13 @@ const mp_obj_property_t analogio_analogin_value_obj = { STATIC mp_obj_t analogio_analogin_obj_get_reference_voltage(mp_obj_t self_in) { analogio_analogin_obj_t *self = MP_OBJ_TO_PTR(self_in); check_for_deinit(self); - return mp_obj_new_float(common_hal_analogio_analogin_get_reference_voltage(self)); + + float reference_voltage = common_hal_analogio_analogin_get_reference_voltage(self); + if (reference_voltage <= 0.0f) { + return mp_const_none; + } else { + return mp_obj_new_float(reference_voltage); + } } MP_DEFINE_CONST_FUN_OBJ_1(analogio_analogin_get_reference_voltage_obj, analogio_analogin_obj_get_reference_voltage); diff --git a/shared-bindings/audiobusio/I2SOut.c b/shared-bindings/audiobusio/I2SOut.c index 2cd2b67289..81383c7776 100644 --- a/shared-bindings/audiobusio/I2SOut.c +++ b/shared-bindings/audiobusio/I2SOut.c @@ -62,7 +62,7 @@ //| import time //| import math //| -//| # Generate one period of sine wav. +//| # Generate one period of sine wave. //| length = 8000 // 440 //| sine_wave = array.array("H", [0] * length) //| for i in range(length): diff --git a/shared-bindings/audioio/__init__.c b/shared-bindings/audioio/__init__.c index 7fa37d5c51..02a5fe1eee 100644 --- a/shared-bindings/audioio/__init__.c +++ b/shared-bindings/audioio/__init__.c @@ -68,7 +68,7 @@ //| //| For compatibility with CircuitPython 4.x, some builds allow the items in //| `audiocore` to be imported from `audioio`. This will be removed for all -//| boards in a future build of CicuitPython. +//| boards in a future build of CircuitPython. //| STATIC const mp_rom_map_elem_t audioio_module_globals_table[] = { diff --git a/shared-bindings/busio/I2C.c b/shared-bindings/busio/I2C.c index 3bd89e2e20..50a95beb2e 100644 --- a/shared-bindings/busio/I2C.c +++ b/shared-bindings/busio/I2C.c @@ -60,6 +60,10 @@ //| :param int frequency: The clock frequency in Hertz //| :param int timeout: The maximum clock stretching timeut - (used only for bitbangio.I2C; ignored for busio.I2C) //| +//| .. note:: On the nRF52840, only one I2C object may be created, +//| except on the Circuit Playground Bluefruit, which allows two, +//| one for the onboard accelerometer, and one for offboard use. +//| STATIC mp_obj_t busio_i2c_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { busio_i2c_obj_t *self = m_new_obj(busio_i2c_obj_t); self->base.type = &busio_i2c_type; diff --git a/shared-bindings/busio/SPI.c b/shared-bindings/busio/SPI.c index d47bf499a2..d1791bef3b 100644 --- a/shared-bindings/busio/SPI.c +++ b/shared-bindings/busio/SPI.c @@ -154,11 +154,12 @@ STATIC void check_for_deinit(busio_spi_obj_t *self) { //| within spec for the SAMD21. //| //| .. note:: On the nRF52840, these baudrates are available: 125kHz, 250kHz, 1MHz, 2MHz, 4MHz, -//| and 8MHz. 16MHz and 32MHz are also available, but only on the first -//| `busio.SPI` object you create. Two more ``busio.SPI`` objects can be created, but they are restricted -//| to 8MHz maximum. This is a hardware restriction: there is only one high-speed SPI peripheral. +//| and 8MHz. //| If you pick a a baudrate other than one of these, the nearest lower //| baudrate will be chosen, with a minimum of 125kHz. +//| Two SPI objects may be created, except on the Circuit Playground Bluefruit, +//| which allows only one (to allow for an additional I2C object). +//| STATIC mp_obj_t busio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits }; static const mp_arg_t allowed_args[] = { diff --git a/shared-bindings/microcontroller/Processor.c b/shared-bindings/microcontroller/Processor.c index be685b0a82..023f063e02 100644 --- a/shared-bindings/microcontroller/Processor.c +++ b/shared-bindings/microcontroller/Processor.c @@ -113,10 +113,32 @@ const mp_obj_property_t mcu_processor_uid_obj = { }, }; +//| .. attribute:: voltage +//| +//| The input voltage to the microcontroller, as a float. (read-only) +//| +//| Is `None` if the voltage is not available. +//| +STATIC mp_obj_t mcu_processor_get_voltage(mp_obj_t self) { + float voltage = common_hal_mcu_processor_get_voltage(); + return isnan(voltage) ? mp_const_none : mp_obj_new_float(voltage); +} + +MP_DEFINE_CONST_FUN_OBJ_1(mcu_processor_get_voltage_obj, mcu_processor_get_voltage); + +const mp_obj_property_t mcu_processor_voltage_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&mcu_processor_get_voltage_obj, // getter + (mp_obj_t)&mp_const_none_obj, // no setter + (mp_obj_t)&mp_const_none_obj, // no deleter + }, +}; + STATIC const mp_rom_map_elem_t mcu_processor_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&mcu_processor_frequency_obj) }, { MP_ROM_QSTR(MP_QSTR_temperature), MP_ROM_PTR(&mcu_processor_temperature_obj) }, { MP_ROM_QSTR(MP_QSTR_uid), MP_ROM_PTR(&mcu_processor_uid_obj) }, + { MP_ROM_QSTR(MP_QSTR_voltage), MP_ROM_PTR(&mcu_processor_voltage_obj) }, }; STATIC MP_DEFINE_CONST_DICT(mcu_processor_locals_dict, mcu_processor_locals_dict_table); diff --git a/shared-bindings/microcontroller/Processor.h b/shared-bindings/microcontroller/Processor.h index 28f0544205..1088112f43 100644 --- a/shared-bindings/microcontroller/Processor.h +++ b/shared-bindings/microcontroller/Processor.h @@ -36,5 +36,6 @@ const mp_obj_type_t mcu_processor_type; uint32_t common_hal_mcu_processor_get_frequency(void); float common_hal_mcu_processor_get_temperature(void); void common_hal_mcu_processor_get_uid(uint8_t raw_id[]); +float common_hal_mcu_processor_get_voltage(void); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_MICROCONTROLLER_PROCESSOR_H diff --git a/shared-bindings/pulseio/PWMOut.c b/shared-bindings/pulseio/PWMOut.c index 40981e0a81..53b88c61a5 100644 --- a/shared-bindings/pulseio/PWMOut.c +++ b/shared-bindings/pulseio/PWMOut.c @@ -162,6 +162,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pulseio_pwmout___exit___obj, 4, 4, pu //| 16 bit value that dictates how much of one cycle is high (1) versus low //| (0). 0xffff will always be high, 0 will always be low and 0x7fff will //| be half high and then half low. +//| +//| Depending on how PWM is implemented on a specific board, the internal +//| representation for duty cycle might have less than 16 bits of resolution. +//| Reading this property will return the value from the internal representation, +//| so it may differ from the value set. STATIC mp_obj_t pulseio_pwmout_obj_get_duty_cycle(mp_obj_t self_in) { pulseio_pwmout_obj_t *self = MP_OBJ_TO_PTR(self_in); check_for_deinit(self); @@ -193,6 +198,12 @@ const mp_obj_property_t pulseio_pwmout_duty_cycle_obj = { //| 32 bit value that dictates the PWM frequency in Hertz (cycles per //| second). Only writeable when constructed with ``variable_frequency=True``. //| +//| Depending on how PWM is implemented on a specific board, the internal value +//| for the PWM's duty cycle may need to be recalculated when the frequency +//| changes. In these cases, the duty cycle is automatically recalculated +//| from the original duty cycle value. This should happen without any need +//| to manually re-set the duty cycle. +//| STATIC mp_obj_t pulseio_pwmout_obj_get_frequency(mp_obj_t self_in) { pulseio_pwmout_obj_t *self = MP_OBJ_TO_PTR(self_in); check_for_deinit(self); diff --git a/shared-bindings/rtc/RTC.c b/shared-bindings/rtc/RTC.c index 17dccdb03c..3ff09a4ec5 100644 --- a/shared-bindings/rtc/RTC.c +++ b/shared-bindings/rtc/RTC.c @@ -57,7 +57,23 @@ STATIC mp_obj_t rtc_rtc_make_new(const mp_obj_type_t *type, size_t n_args, const //| .. attribute:: datetime //| -//| The date and time of the RTC. +//| The current date and time of the RTC as a `time.struct_time`. +//| +//| This must be set to the current date and time whenever the board loses power:: +//| +//| import rtc +//| import time +//| +//| r = rtc.RTC() +//| r.datetime = rtctime.struct_time((2019, 5, 29, 15, 14, 15, 0, -1, -1)) +//| +//| +//| Once set, the RTC will automatically update this value as time passes. You can read this +//| property to get a snapshot of the current time:: +//| +//| current_time = r.datetime +//| print(current_time) +//| # struct_time(tm_year=2019, tm_month=5, ...) //| STATIC mp_obj_t rtc_rtc_obj_get_datetime(mp_obj_t self_in) { timeutils_struct_time_t tm; @@ -83,9 +99,10 @@ const mp_obj_property_t rtc_rtc_datetime_obj = { //| .. attribute:: calibration //| -//| The RTC calibration value. +//| The RTC calibration value as an `int`. +//| //| A positive value speeds up the clock and a negative value slows it down. -//| Range and value is hardware specific, but one step is often approx. 1 ppm. +//| Range and value is hardware specific, but one step is often approximately 1 ppm. //| STATIC mp_obj_t rtc_rtc_obj_get_calibration(mp_obj_t self_in) { int calibration = common_hal_rtc_get_calibration(); diff --git a/shared-bindings/rtc/__init__.c b/shared-bindings/rtc/__init__.c index ac67a7131c..22eda9b663 100644 --- a/shared-bindings/rtc/__init__.c +++ b/shared-bindings/rtc/__init__.c @@ -36,12 +36,13 @@ //| //| .. module:: rtc //| :synopsis: Real Time Clock -//| :platform: SAMD21 +//| :platform: SAMD21, SAMD51, nRF52 //| -//| The `rtc` module provides support for a Real Time Clock. -//| It also backs the `time.time()` and `time.localtime()` functions using the onboard RTC if present. +//| The `rtc` module provides support for a Real Time Clock. You can access and manage the +//| RTC using :class:`rtc.RTC`. It also backs the :func:`time.time` and :func:`time.localtime` +//| functions using the onboard RTC if present. //| -//| Libraries +//| Classes //| //| .. toctree:: //| :maxdepth: 3 @@ -63,10 +64,9 @@ mp_obj_t rtc_get_time_source_time(void) { //| .. function:: set_time_source(rtc) //| -//| Sets the rtc time source used by time.localtime(). -//| The default is `rtc.RTC()`. -//| -//| Example usage:: +//| Sets the RTC time source used by :func:`time.localtime`. +//| The default is :class:`rtc.RTC`, but it's useful to use this to override the +//| time source for testing purposes. For example:: //| //| import rtc //| import time diff --git a/shared-module/_bleio/ScanEntry.c b/shared-module/_bleio/ScanEntry.c index 8dfa17f31f..785209c4ab 100644 --- a/shared-module/_bleio/ScanEntry.c +++ b/shared-module/_bleio/ScanEntry.c @@ -37,9 +37,50 @@ mp_obj_t common_hal_bleio_scanentry_get_address(bleio_scanentry_obj_t *self) { } mp_obj_t common_hal_bleio_scanentry_get_advertisement_bytes(bleio_scanentry_obj_t *self) { - return self->data; + return MP_OBJ_FROM_PTR(self->data); } mp_int_t common_hal_bleio_scanentry_get_rssi(bleio_scanentry_obj_t *self) { return self->rssi; } + +bool common_hal_bleio_scanentry_get_connectable(bleio_scanentry_obj_t *self) { + return self->connectable; +} + +bool common_hal_bleio_scanentry_get_scan_response(bleio_scanentry_obj_t *self) { + return self->scan_response; +} + +bool bleio_scanentry_data_matches(const uint8_t* data, size_t len, const uint8_t* prefixes, size_t prefixes_length, bool any) { + if (prefixes_length == 0) { + return true; + } + size_t i = 0; + while(i < prefixes_length) { + uint8_t prefix_length = prefixes[i]; + i += 1; + size_t j = 0; + while (j < len) { + uint8_t structure_length = data[j]; + j += 1; + if (structure_length == 0) { + break; + } + if (structure_length >= prefix_length && memcmp(data + j, prefixes + i, prefix_length) == 0) { + if (any) { + return true; + } + } else if (!any) { + return false; + } + j += structure_length; + } + i += prefix_length; + } + return !any; +} + +bool common_hal_bleio_scanentry_matches(bleio_scanentry_obj_t *self, const uint8_t* prefixes, size_t prefixes_len, bool all) { + return bleio_scanentry_data_matches(self->data->data, self->data->len, prefixes, prefixes_len, !all); +} diff --git a/shared-module/_bleio/ScanEntry.h b/shared-module/_bleio/ScanEntry.h index 1e798d78fd..94361a397d 100644 --- a/shared-module/_bleio/ScanEntry.h +++ b/shared-module/_bleio/ScanEntry.h @@ -29,14 +29,19 @@ #define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANENTRY_H #include "py/obj.h" +#include "py/objstr.h" #include "shared-bindings/_bleio/Address.h" typedef struct { mp_obj_base_t base; bool connectable; + bool scan_response; int8_t rssi; bleio_address_obj_t *address; - mp_obj_t data; + mp_obj_str_t *data; + uint64_t time_received; } bleio_scanentry_obj_t; +bool bleio_scanentry_data_matches(const uint8_t* data, size_t len, const uint8_t* prefixes, size_t prefix_length, bool any); + #endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANENTRY_H diff --git a/shared-module/_bleio/ScanResults.c b/shared-module/_bleio/ScanResults.c new file mode 100644 index 0000000000..7ea0c165f4 --- /dev/null +++ b/shared-module/_bleio/ScanResults.c @@ -0,0 +1,139 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/interrupt_char.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/ScanEntry.h" +#include "shared-bindings/_bleio/ScanResults.h" + +bleio_scanresults_obj_t* shared_module_bleio_new_scanresults(size_t buffer_size, uint8_t* prefixes, size_t prefixes_len, mp_int_t minimum_rssi) { + bleio_scanresults_obj_t* self = m_new_obj(bleio_scanresults_obj_t); + self->base.type = &bleio_scanresults_type; + ringbuf_alloc(&self->buf, buffer_size, false); + self->prefixes = prefixes; + self->prefix_length = prefixes_len; + self->minimum_rssi = minimum_rssi; + return self; +} + +mp_obj_t common_hal_bleio_scanresults_next(bleio_scanresults_obj_t *self) { + while (ringbuf_count(&self->buf) == 0 && !self->done && !mp_hal_is_interrupted()) { + RUN_BACKGROUND_TASKS; + } + if (ringbuf_count(&self->buf) == 0 || mp_hal_is_interrupted()) { + return mp_const_none; + } + + // Create a ScanEntry out of the data on the buffer. + uint8_t type = ringbuf_get(&self->buf); + bool connectable = (type & (1 << 0)) != 0; + bool scan_response = (type & (1 << 1)) != 0; + uint64_t ticks_ms; + ringbuf_get_n(&self->buf, (uint8_t*) &ticks_ms, sizeof(ticks_ms)); + uint8_t rssi = ringbuf_get(&self->buf); + uint8_t peer_addr[NUM_BLEIO_ADDRESS_BYTES]; + ringbuf_get_n(&self->buf, peer_addr, sizeof(peer_addr)); + uint8_t addr_type = ringbuf_get(&self->buf); + uint16_t len; + ringbuf_get_n(&self->buf, (uint8_t*) &len, sizeof(len)); + + mp_obj_str_t *o = MP_OBJ_TO_PTR(mp_obj_new_bytes_of_zeros(len)); + ringbuf_get_n(&self->buf, (uint8_t*) o->data, len); + + bleio_scanentry_obj_t *entry = m_new_obj(bleio_scanentry_obj_t); + entry->base.type = &bleio_scanentry_type; + entry->rssi = rssi; + + bleio_address_obj_t *address = m_new_obj(bleio_address_obj_t); + address->base.type = &bleio_address_type; + common_hal_bleio_address_construct(MP_OBJ_TO_PTR(address), peer_addr, addr_type); + entry->address = address; + + entry->data = o; + entry->time_received = ticks_ms; + entry->connectable = connectable; + entry->scan_response = scan_response; + + return MP_OBJ_FROM_PTR(entry); +} + + +void shared_module_bleio_scanresults_append(bleio_scanresults_obj_t* self, + uint64_t ticks_ms, + bool connectable, + bool scan_response, + int8_t rssi, + uint8_t *peer_addr, + uint8_t addr_type, + uint8_t *data, + uint16_t len) { + int32_t packet_size = sizeof(uint8_t) + sizeof(ticks_ms) + sizeof(rssi) + NUM_BLEIO_ADDRESS_BYTES + + sizeof(addr_type) + sizeof(len) + len; + int32_t empty_space = self->buf.size - ringbuf_count(&self->buf); + if (packet_size >= empty_space) { + // We can't fit the packet so skip it. + return; + } + // Filter the packet. + if (rssi < self->minimum_rssi) { + return; + } + + // If any prefixes are provided, then only include packets that include at least one of them. + if (!bleio_scanentry_data_matches(data, len, self->prefixes, self->prefix_length, true)) { + return; + } + uint8_t type = 0; + if (connectable) { + type |= 1 << 0; + } + if (scan_response) { + type |= 1 << 1; + } + + // Add the packet to the buffer. + ringbuf_put(&self->buf, type); + ringbuf_put_n(&self->buf, (uint8_t*) &ticks_ms, sizeof(ticks_ms)); + ringbuf_put(&self->buf, rssi); + ringbuf_put_n(&self->buf, peer_addr, NUM_BLEIO_ADDRESS_BYTES); + ringbuf_put(&self->buf, addr_type); + ringbuf_put_n(&self->buf, (uint8_t*) &len, sizeof(len)); + ringbuf_put_n(&self->buf, data, len); +} + +bool shared_module_bleio_scanresults_get_done(bleio_scanresults_obj_t* self) { + return self->done; +} + +void shared_module_bleio_scanresults_set_done(bleio_scanresults_obj_t* self, bool done) { + self->done = done; + self->common_hal_data = NULL; +} diff --git a/shared-module/_bleio/ScanResults.h b/shared-module/_bleio/ScanResults.h new file mode 100644 index 0000000000..8912357a97 --- /dev/null +++ b/shared-module/_bleio/ScanResults.h @@ -0,0 +1,64 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANRESULTS_H +#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANRESULTS_H + +#include + +#include "py/obj.h" +#include "py/ringbuf.h" + +typedef struct { + mp_obj_base_t base; + // Pointers that needs to live until the scan is done. + void* common_hal_data; + ringbuf_t buf; + // Prefixes is a length encoded array of prefixes. + uint8_t* prefixes; + size_t prefix_length; + mp_int_t minimum_rssi; + bool active; + bool done; +} bleio_scanresults_obj_t; + +bleio_scanresults_obj_t* shared_module_bleio_new_scanresults(size_t buffer_size, uint8_t* prefixes, size_t prefixes_len, mp_int_t minimum_rssi); + +bool shared_module_bleio_scanresults_get_done(bleio_scanresults_obj_t* self); +void shared_module_bleio_scanresults_set_done(bleio_scanresults_obj_t* self, bool done); + +void shared_module_bleio_scanresults_append(bleio_scanresults_obj_t* self, + uint64_t ticks_ms, + bool connectable, + bool scan_result, + int8_t rssi, + uint8_t *peer_addr, + uint8_t addr_type, + uint8_t* data, + uint16_t len); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANRESULTS_H diff --git a/shared-module/bitbangio/SPI.c b/shared-module/bitbangio/SPI.c index 6d3a285231..d02adf34fb 100644 --- a/shared-module/bitbangio/SPI.c +++ b/shared-module/bitbangio/SPI.c @@ -43,6 +43,8 @@ void shared_module_bitbangio_spi_construct(bitbangio_spi_obj_t *self, if (result != DIGITALINOUT_OK) { mp_raise_ValueError(translate("Clock pin init failed.")); } + common_hal_digitalio_digitalinout_switch_to_output(&self->clock, self->polarity == 1, DRIVE_MODE_PUSH_PULL); + if (mosi != mp_const_none) { result = common_hal_digitalio_digitalinout_construct(&self->mosi, mosi); if (result != DIGITALINOUT_OK) { @@ -50,8 +52,11 @@ void shared_module_bitbangio_spi_construct(bitbangio_spi_obj_t *self, mp_raise_ValueError(translate("MOSI pin init failed.")); } self->has_mosi = true; + common_hal_digitalio_digitalinout_switch_to_output(&self->mosi, false, DRIVE_MODE_PUSH_PULL); } + if (miso != mp_const_none) { + // Starts out as input by default, no need to change. result = common_hal_digitalio_digitalinout_construct(&self->miso, miso); if (result != DIGITALINOUT_OK) { common_hal_digitalio_digitalinout_deinit(&self->clock); diff --git a/supervisor/port.h b/supervisor/port.h index 1430c6a505..c8a0119788 100644 --- a/supervisor/port.h +++ b/supervisor/port.h @@ -54,6 +54,12 @@ void reset_board(void); // Reset to the bootloader void reset_to_bootloader(void); +// Get stack limit address +uint32_t *port_stack_get_limit(void); + +// Get stack top address +uint32_t *port_stack_get_top(void); + // Save and retrieve a word from memory that is preserved over reset. Used for safe mode. void port_set_saved_word(uint32_t); uint32_t port_get_saved_word(void); diff --git a/supervisor/shared/autoreload.c b/supervisor/shared/autoreload.c index 14b21902cd..a6212c1a9b 100644 --- a/supervisor/shared/autoreload.c +++ b/supervisor/shared/autoreload.c @@ -76,3 +76,11 @@ void autoreload_stop() { autoreload_delay_ms = 0; reload_requested = false; } + +void autoreload_now() { + if (!autoreload_enabled || autoreload_suspended || reload_requested) { + return; + } + mp_raise_reload_exception(); + reload_requested = true; +} diff --git a/supervisor/shared/autoreload.h b/supervisor/shared/autoreload.h index bcb1001513..fbd482c19a 100644 --- a/supervisor/shared/autoreload.h +++ b/supervisor/shared/autoreload.h @@ -43,4 +43,6 @@ bool autoreload_is_enabled(void); void autoreload_suspend(void); void autoreload_resume(void); +void autoreload_now(void); + #endif // MICROPY_INCLUDED_SUPERVISOR_AUTORELOAD_H diff --git a/supervisor/shared/bluetooth.c b/supervisor/shared/bluetooth.c new file mode 100644 index 0000000000..02258de742 --- /dev/null +++ b/supervisor/shared/bluetooth.c @@ -0,0 +1,340 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +#include "common-hal/_bleio/__init__.h" + +#include "supervisor/shared/autoreload.h" + +#include "py/mpstate.h" + +bleio_service_obj_t supervisor_ble_service; +bleio_uuid_obj_t supervisor_ble_service_uuid; +bleio_characteristic_obj_t supervisor_ble_version_characteristic; +bleio_uuid_obj_t supervisor_ble_version_uuid; +bleio_characteristic_obj_t supervisor_ble_filename_characteristic; +bleio_uuid_obj_t supervisor_ble_filename_uuid; +bleio_characteristic_obj_t supervisor_ble_length_characteristic; +bleio_uuid_obj_t supervisor_ble_length_uuid; +bleio_characteristic_obj_t supervisor_ble_contents_characteristic; +bleio_uuid_obj_t supervisor_ble_contents_uuid; +const uint8_t circuitpython_base_uuid[16] = {0x6e, 0x68, 0x74, 0x79, 0x50, 0x74, 0x69, 0x75, 0x63, 0x72, 0x69, 0x43, 0x00, 0x00, 0xaf, 0xad }; +uint8_t circuitpython_advertising_data[] = { 0x02, 0x01, 0x06, 0x02, 0x0a, 0x00, 0x11, 0x07, 0x6e, 0x68, 0x74, 0x79, 0x50, 0x74, 0x69, 0x75, 0x63, 0x72, 0x69, 0x43, 0x00, 0x01, 0xaf, 0xad, 0x06, 0x08, 0x43, 0x49, 0x52, 0x43, 0x55 }; +uint8_t circuitpython_scan_response_data[15] = {0x0e, 0x09, 0x43, 0x49, 0x52, 0x43, 0x55, 0x49, 0x54, 0x50, 0x59, 0x00, 0x00, 0x00, 0x00}; +mp_obj_list_t service_list; +mp_obj_t service_list_items[1]; +mp_obj_list_t characteristic_list; +mp_obj_t characteristic_list_items[4]; + +void supervisor_bluetooth_start_advertising(void) { + bool is_connected = common_hal_bleio_adapter_get_connected(&common_hal_bleio_adapter_obj); + if (is_connected) { + return; + } + // TODO: switch to Adafruit short UUID for the advertisement and add manufacturing data to distinguish ourselves from arduino. + _common_hal_bleio_adapter_start_advertising(&common_hal_bleio_adapter_obj, + true, + 1.0, + circuitpython_advertising_data, + sizeof(circuitpython_advertising_data), + circuitpython_scan_response_data, + sizeof(circuitpython_scan_response_data)); +} + +void supervisor_start_bluetooth(void) { + common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, true); + + supervisor_ble_service_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_service_uuid, 0x0100, circuitpython_base_uuid); + + // We know we'll only be 1 characteristic so we can statically allocate it. + characteristic_list.base.type = &mp_type_list; + characteristic_list.alloc = sizeof(characteristic_list_items) / sizeof(characteristic_list_items[0]); + characteristic_list.len = 0; + characteristic_list.items = characteristic_list_items; + mp_seq_clear(characteristic_list.items, 0, characteristic_list.alloc, sizeof(*characteristic_list.items)); + + _common_hal_bleio_service_construct(&supervisor_ble_service, &supervisor_ble_service_uuid, false /* is secondary */, &characteristic_list); + + // File length + supervisor_ble_version_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_version_uuid, 0x0203, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_version_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_version_uuid, + CHAR_PROP_READ, + SECURITY_MODE_OPEN, + SECURITY_MODE_NO_ACCESS, + 4, // max length + true, // fixed length + NULL); // no initial value + + uint32_t version = 1; + mp_buffer_info_t bufinfo; + bufinfo.buf = &version; + bufinfo.len = sizeof(version); + common_hal_bleio_characteristic_set_value(&supervisor_ble_version_characteristic, &bufinfo); + + // Active filename. + supervisor_ble_filename_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_filename_uuid, 0x0200, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_filename_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_filename_uuid, + CHAR_PROP_READ | CHAR_PROP_WRITE, + SECURITY_MODE_OPEN, + SECURITY_MODE_OPEN, + 500, // max length + false, // fixed length + NULL); // no initial value + + char code_py[] = "/code.py"; + bufinfo.buf = code_py; + bufinfo.len = sizeof(code_py); + common_hal_bleio_characteristic_set_value(&supervisor_ble_filename_characteristic, &bufinfo); + + // File length + supervisor_ble_length_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_length_uuid, 0x0202, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_length_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_length_uuid, + CHAR_PROP_NOTIFY | CHAR_PROP_READ, + SECURITY_MODE_OPEN, + SECURITY_MODE_NO_ACCESS, + 4, // max length + true, // fixed length + NULL); // no initial value + + // File actions + supervisor_ble_contents_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_contents_uuid, 0x0201, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_contents_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_contents_uuid, + CHAR_PROP_NOTIFY | CHAR_PROP_WRITE_NO_RESPONSE | CHAR_PROP_WRITE, + SECURITY_MODE_OPEN, + SECURITY_MODE_OPEN, + 500, // max length + false, // fixed length + NULL); // no initial value + + supervisor_bluetooth_start_advertising(); + vm_used_ble = false; +} + +FIL active_file; +volatile bool new_filename; +volatile bool run_ble_background; +bool was_connected; + +void update_file_length(void) { + int32_t file_length = -1; + mp_buffer_info_t bufinfo; + bufinfo.buf = &file_length; + bufinfo.len = sizeof(file_length); + if (active_file.obj.fs != 0) { + file_length = (int32_t) f_size(&active_file); + } + common_hal_bleio_characteristic_set_value(&supervisor_ble_length_characteristic, &bufinfo); +} + +void open_current_file(void) { + if (active_file.obj.fs != 0) { + return; + } + uint16_t max_len = supervisor_ble_filename_characteristic.max_length; + uint8_t path[max_len]; + size_t length = common_hal_bleio_characteristic_get_value(&supervisor_ble_filename_characteristic, path, max_len - 1); + path[length] = '\0'; + + FATFS *fs = &((fs_user_mount_t *) MP_STATE_VM(vfs_mount_table)->obj)->fatfs; + f_open(fs, &active_file, (char*) path, FA_READ | FA_WRITE); + + update_file_length(); +} + +void close_current_file(void) { + f_close(&active_file); +} + +uint32_t current_command[1024 / sizeof(uint32_t)]; +volatile size_t current_offset; + +void supervisor_bluetooth_background(void) { + if (!run_ble_background) { + return; + } + bool is_connected = common_hal_bleio_adapter_get_connected(&common_hal_bleio_adapter_obj); + if (!was_connected && is_connected) { + open_current_file(); + } else if (was_connected && !is_connected) { + close_current_file(); + new_filename = false; + } + was_connected = is_connected; + run_ble_background = false; + if (!is_connected) { + supervisor_bluetooth_start_advertising(); + return; + } + if (new_filename) { + close_current_file(); + open_current_file(); + + new_filename = false; + // get length and set the characteristic for it + } + uint16_t current_length = ((uint16_t*) current_command)[0]; + if (current_length > 0 && current_length == current_offset) { + uint16_t command = ((uint16_t *) current_command)[1]; + + if (command == 1) { + uint16_t max_len = 20; //supervisor_ble_contents_characteristic.max_length; + uint8_t buf[max_len]; + mp_buffer_info_t bufinfo; + bufinfo.buf = buf; + f_lseek(&active_file, 0); + while (f_read(&active_file, buf, max_len, &bufinfo.len) == FR_OK) { + if (bufinfo.len == 0) { + break; + } + common_hal_bleio_characteristic_set_value(&supervisor_ble_contents_characteristic, &bufinfo); + } + } else if (command == 2) { // patch + uint32_t offset = current_command[1]; + uint32_t remove_length = current_command[2]; + uint32_t insert_length = current_command[3]; + uint32_t file_length = (int32_t) f_size(&active_file); + //uint32_t data_shift_length = fileLength - offset - remove_length; + int32_t data_shift = insert_length - remove_length; + uint32_t new_length = file_length + data_shift; + + // TODO: Make these loops smarter to read and write on sector boundaries. + if (data_shift < 0) { + for (uint32_t shift_offset = offset + insert_length; shift_offset < new_length; shift_offset++) { + uint8_t data; + UINT actual; + f_lseek(&active_file, shift_offset - data_shift); + f_read(&active_file, &data, 1, &actual); + f_lseek(&active_file, shift_offset); + f_write(&active_file, &data, 1, &actual); + } + f_truncate(&active_file); + } else if (data_shift > 0) { + f_lseek(&active_file, file_length); + // Fill end with 0xff so we don't need to erase. + uint8_t data = 0xff; + for (size_t i = 0; i < (size_t) data_shift; i++) { + UINT actual; + f_write(&active_file, &data, 1, &actual); + } + for (uint32_t shift_offset = new_length - 1; shift_offset >= offset + insert_length ; shift_offset--) { + UINT actual; + f_lseek(&active_file, shift_offset - data_shift); + f_read(&active_file, &data, 1, &actual); + f_lseek(&active_file, shift_offset); + f_write(&active_file, &data, 1, &actual); + } + } + + f_lseek(&active_file, offset); + uint8_t* data = (uint8_t *) (current_command + 4); + UINT written; + f_write(&active_file, data, insert_length, &written); + f_sync(&active_file); + // Notify the new file length. + update_file_length(); + + // Trigger an autoreload + autoreload_now(); + } + current_offset = 0; + } +} + +// This happens in an interrupt so we need to be quick. +bool supervisor_bluetooth_hook(ble_evt_t *ble_evt) { + // Catch writes to filename or contents. Length is read-only. + + bool done = false; + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_CONNECTED: + // We run our background task even if it wasn't us connected to because we may want to + // advertise if the user code stopped advertising. + run_ble_background = true; + break; + case BLE_GAP_EVT_DISCONNECTED: + run_ble_background = true; + break; + case BLE_GATTS_EVT_WRITE: { + // A client wrote to a characteristic. + + ble_gatts_evt_write_t *evt_write = &ble_evt->evt.gatts_evt.params.write; + // Event handle must match the handle for my characteristic. + if (evt_write->handle == supervisor_ble_contents_characteristic.handle) { + // Handle events + //write_to_ringbuf(self, evt_write->data, evt_write->len); + // First packet includes a uint16_t le for length at the start. + uint16_t current_length = ((uint16_t*) current_command)[0]; + memcpy(((uint8_t*) current_command) + current_offset, evt_write->data, evt_write->len); + current_offset += evt_write->len; + current_length = ((uint16_t*) current_command)[0]; + if (current_offset == current_length) { + run_ble_background = true; + done = true; + } + } else if (evt_write->handle == supervisor_ble_filename_characteristic.handle) { + new_filename = true; + run_ble_background = true; + done = true; + } else { + return done; + } + break; + } + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled peripheral event: 0x%04x\n", ble_evt->header.evt_id); + break; + } + return done; +} diff --git a/ports/esp8266/common-hal/busio/I2C.h b/supervisor/shared/bluetooth.h similarity index 79% rename from ports/esp8266/common-hal/busio/I2C.h rename to supervisor/shared/bluetooth.h index f0e8ff4af8..7ebcb953f0 100644 --- a/ports/esp8266/common-hal/busio/I2C.h +++ b/supervisor/shared/bluetooth.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,10 +24,11 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_I2C_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_I2C_H +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_BLUETOOTH_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_BLUETOOTH_H -// Use the bitbang wrapper for I2C -#include "shared-module/busio/I2C.h" +void supervisor_start_bluetooth(void); +bool supervisor_bluetooth_hook(ble_evt_t *ble_evt); +void supervisor_bluetooth_background(void); -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_I2C_H +#endif \ No newline at end of file diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h index e787ba739a..08d0a78fdd 100644 --- a/supervisor/shared/external_flash/devices.h +++ b/supervisor/shared/external_flash/devices.h @@ -85,6 +85,26 @@ typedef struct { .single_status_byte = false, \ } +// Settings for the Adesto Tech AT25SF161-SSHD-T 2MiB SPI flash +// for the StringCar M0 (SAMD21) Express board. +// Source: https://www.digikey.com/product-detail/en/adesto-technologies/AT25SF161-SDHD-T/1265-1230-1-ND/ +// Datasheet: https://www.adestotech.com/wpo-content/uploads/jDS-AT25SF161_046.pdf +#define AT25SF161 {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x1f, \ + .memory_type = 0x86, \ + .capacity = 0x01, \ + .max_clock_speed_mhz = 85, \ + .quad_enable_bit_mask = 0x00, \ + .has_sector_protection = true, \ + .supports_fast_read = true, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + // Settings for the Gigadevice GD25Q16C 2MiB SPI flash. // Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/ #define GD25Q16C {\ @@ -280,6 +300,23 @@ typedef struct { .write_status_register_split = false, \ } +// Settings for the Winbond W25Q32JV-IQ 4MiB SPI flash. +// Datasheet: https://www.mouser.com/datasheet/2/949/w25q32jv_revg_03272018_plus-1489806.pdf +#define W25Q32JV_IQ {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ +} + // Settings for the Winbond W25Q64JV-IM 8MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40) // Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf #define W25Q64JV_IM {\ @@ -442,4 +479,22 @@ typedef struct { .write_status_register_split = false, \ .single_status_byte = false, \ } + +// Settings for the ISSI IS25LP128F 16MiB SPI flash. +// Datasheet: http://www.issi.com/WW/pdf/25LP-WP128F.pdf +#define IS25LP128F {\ + .total_size = (1 << 24), /* 16 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x9d, \ + .memory_type = 0x60, \ + .capacity = 0x18, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = true, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} #endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H diff --git a/supervisor/shared/memory.c b/supervisor/shared/memory.c index 11133415d1..38040d11d9 100755 --- a/supervisor/shared/memory.c +++ b/supervisor/shared/memory.c @@ -25,6 +25,7 @@ */ #include "supervisor/memory.h" +#include "supervisor/port.h" #include @@ -36,12 +37,10 @@ static supervisor_allocation allocations[CIRCUITPY_SUPERVISOR_ALLOC_COUNT]; // We use uint32_t* to ensure word (4 byte) alignment. uint32_t* low_address; uint32_t* high_address; -extern uint32_t _ebss; -extern uint32_t _estack; void memory_init(void) { - low_address = &_ebss; - high_address = &_estack; + low_address = port_stack_get_limit(); + high_address = port_stack_get_top(); } void free_memory(supervisor_allocation* allocation) { diff --git a/supervisor/shared/rgb_led_colors.h b/supervisor/shared/rgb_led_colors.h index 48994ad62c..c723fbab36 100644 --- a/supervisor/shared/rgb_led_colors.h +++ b/supervisor/shared/rgb_led_colors.h @@ -1,12 +1,18 @@ -#define BLACK 0x000000 -#define GREEN 0x003000 -#define BLUE 0x000030 -#define CYAN 0x003030 -#define RED 0x300000 -#define ORANGE 0x302000 -#define YELLOW 0x303000 -#define PURPLE 0x300030 -#define WHITE 0x303030 + +#define COLOR(r, g, b) (((r) << 16) | ((g) << 8) | (b)) +// For brightness == 255 (full). This will be adjusted downward for various different RGB indicators, +// which vary in brightness. +#define INTENSITY (0x30) + +#define BLACK COLOR(0, 0, 0) +#define GREEN COLOR(0, INTENSITY, 0) +#define BLUE COLOR(0, 0, INTENSITY) +#define CYAN COLOR(0, INTENSITY, INTENSITY) +#define RED COLOR(INTENSITY, 0, 0) +#define ORANGE COLOR(INTENSITY, INTENSITY*2/3, 0) +#define YELLOW COLOR(INTENSITY, INTENSITY, 0) +#define PURPLE COLOR(INTENSITY, 0, INTENSITY) +#define WHITE COLOR(INTENSITY, INTENSITY, INTENSITY) #define BOOT_RUNNING BLUE #define MAIN_RUNNING GREEN diff --git a/supervisor/shared/rgb_led_status.c b/supervisor/shared/rgb_led_status.c index 4d93715161..05df4c628a 100644 --- a/supervisor/shared/rgb_led_status.c +++ b/supervisor/shared/rgb_led_status.c @@ -38,7 +38,7 @@ static digitalio_digitalinout_obj_t status_neopixel; #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) -uint8_t rgb_status_brightness = 255; +uint8_t rgb_status_brightness = 50; #define APA102_BUFFER_LENGTH 12 static uint8_t status_apa102_color[APA102_BUFFER_LENGTH] = {0, 0, 0, 0, 0xff, 0, 0, 0, 0xff, 0xff, 0xff, 0xff}; @@ -46,10 +46,18 @@ static uint8_t status_apa102_color[APA102_BUFFER_LENGTH] = {0, 0, 0, 0, 0xff, 0, #if CIRCUITPY_BITBANG_APA102 #include "shared-bindings/bitbangio/SPI.h" #include "shared-module/bitbangio/types.h" -static bitbangio_spi_obj_t status_apa102; +static bitbangio_spi_obj_t status_apa102 = { + .base = { + .type = &bitbangio_spi_type, + }, +}; #else #include "shared-bindings/busio/SPI.h" -busio_spi_obj_t status_apa102; +busio_spi_obj_t status_apa102 = { + .base = { + .type = &busio_spi_type, + }, +}; #endif #endif @@ -59,9 +67,21 @@ busio_spi_obj_t status_apa102; #include "shared-bindings/pulseio/PWMOut.h" #include "shared-bindings/microcontroller/Pin.h" -pulseio_pwmout_obj_t rgb_status_r; -pulseio_pwmout_obj_t rgb_status_g; -pulseio_pwmout_obj_t rgb_status_b; +pulseio_pwmout_obj_t rgb_status_r = { + .base = { + .type = &pulseio_pwmout_type, + }, +}; +pulseio_pwmout_obj_t rgb_status_g = { + .base = { + .type = &pulseio_pwmout_type, + }, +}; +pulseio_pwmout_obj_t rgb_status_b = { + .base = { + .type = &pulseio_pwmout_type, + }, +}; uint8_t rgb_status_brightness = 0xFF; @@ -74,8 +94,14 @@ uint16_t status_rgb_color[3] = { static uint32_t current_status_color = 0; #endif - +static bool rgb_led_status_init_in_progress = false; void rgb_led_status_init() { + if (rgb_led_status_init_in_progress) { + // Avoid recursion. + return; + } + rgb_led_status_init_in_progress = true; + #ifdef MICROPY_HW_NEOPIXEL common_hal_digitalio_digitalinout_construct(&status_neopixel, MICROPY_HW_NEOPIXEL); // Pretend we aren't using the pins. digitalio.DigitalInOut @@ -91,15 +117,15 @@ void rgb_led_status_init() { mp_const_none); #else if (!common_hal_busio_spi_deinited(&status_apa102)) { - // Don't use spi_deinit because that leads to infinite - // recursion because reset_pin_number may call - // rgb_led_status_init. - spi_m_sync_disable(&status_apa102.spi_desc); + // This may call us recursively if reset_pin_number() is called, + // The rgb_led_status_init_in_progress guard will prevent further recursion. + common_hal_busio_spi_deinit(&status_apa102); } common_hal_busio_spi_construct(&status_apa102, MICROPY_HW_APA102_SCK, MICROPY_HW_APA102_MOSI, mp_const_none); + common_hal_busio_spi_never_reset(&status_apa102); #endif // Pretend we aren't using the pins. bitbangio.SPI will // mark them as used. @@ -149,6 +175,8 @@ void rgb_led_status_init() { current_status_color = 0x1000000; // Not a valid color new_status_color(rgb); #endif + + rgb_led_status_init_in_progress = false; } void reset_status_led() { diff --git a/supervisor/shared/safe_mode.h b/supervisor/shared/safe_mode.h index ee0723cff1..8c5dcd9c5d 100644 --- a/supervisor/shared/safe_mode.h +++ b/supervisor/shared/safe_mode.h @@ -37,7 +37,8 @@ typedef enum { MICROPY_NLR_JUMP_FAIL, MICROPY_FATAL_ERROR, GC_ALLOC_OUTSIDE_VM, - PROGRAMMATIC_SAFE_MODE + PROGRAMMATIC_SAFE_MODE, + NORDIC_SOFT_DEVICE_ASSERT } safe_mode_t; safe_mode_t wait_for_safe_mode_reset(void); diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c index 311fa31b22..dcecf2067b 100755 --- a/supervisor/shared/stack.c +++ b/supervisor/shared/stack.c @@ -29,6 +29,7 @@ #include "py/mpconfig.h" #include "py/runtime.h" #include "supervisor/cpu.h" +#include "supervisor/port.h" #include "supervisor/shared/safe_mode.h" extern uint32_t _estack; @@ -43,7 +44,7 @@ void allocate_stack(void) { mp_uint_t regs[10]; mp_uint_t sp = cpu_get_regs_and_sp(regs); - mp_uint_t c_size = (uint32_t) &_estack - sp; + mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp; stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true); if (stack_alloc == NULL) { diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index ee47be4b00..ad0f716fbf 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -28,6 +28,11 @@ ifneq ($(SPI_FLASH_FILESYSTEM),) CFLAGS += -DSPI_FLASH_FILESYSTEM=$(SPI_FLASH_FILESYSTEM) -DEXPRESS_BOARD endif + +ifeq ($(CIRCUITPY_BLEIO),1) + SRC_SUPERVISOR += supervisor/shared/bluetooth.c +endif + # Choose which flash filesystem impl to use. # (Right now INTERNAL_FLASH_FILESYSTEM and SPI_FLASH_FILESYSTEM are mutually exclusive. # But that might not be true in the future.) @@ -94,9 +99,69 @@ ifndef USB_HID_DEVICES USB_HID_DEVICES = "KEYBOARD,MOUSE,CONSUMER,GAMEPAD" endif -# SAMD21 needs separate endpoint pairs for MSC BULK IN and BULK OUT, otherwise it's erratic. -ifndef USB_MSC_NUM_ENDPOINT_PAIRS -USB_MSC_NUM_ENDPOINT_PAIRS = 1 +ifndef USB_MSC_MAX_PACKET_SIZE +USB_MSC_MAX_PACKET_SIZE = 64 +endif + +ifndef USB_CDC_EP_NUM_NOTIFICATION +USB_CDC_EP_NUM_NOTIFICATION = 0 +endif + +ifndef USB_CDC_EP_NUM_DATA_OUT +USB_CDC_EP_NUM_DATA_OUT = 0 +endif + +ifndef USB_CDC_EP_NUM_DATA_IN +USB_CDC_EP_NUM_DATA_IN = 0 +endif + +ifndef USB_MSC_EP_NUM_OUT +USB_MSC_EP_NUM_OUT = 0 +endif + +ifndef USB_MSC_EP_NUM_IN +USB_MSC_EP_NUM_IN = 0 +endif + +ifndef USB_HID_EP_NUM_OUT +USB_HID_EP_NUM_OUT = 0 +endif + +ifndef USB_HID_EP_NUM_IN +USB_HID_EP_NUM_IN = 0 +endif + +ifndef USB_MIDI_EP_NUM_OUT +USB_MIDI_EP_NUM_OUT = 0 +endif + +ifndef USB_MIDI_EP_NUM_IN +USB_MIDI_EP_NUM_IN = 0 +endif + +USB_DESCRIPTOR_ARGS = \ + --manufacturer $(USB_MANUFACTURER)\ + --product $(USB_PRODUCT)\ + --vid $(USB_VID)\ + --pid $(USB_PID)\ + --serial_number_length $(USB_SERIAL_NUMBER_LENGTH)\ + --devices $(USB_DEVICES)\ + --hid_devices $(USB_HID_DEVICES)\ + --msc_max_packet_size $(USB_MSC_MAX_PACKET_SIZE)\ + --cdc_ep_num_notification $(USB_CDC_EP_NUM_NOTIFICATION)\ + --cdc_ep_num_data_out $(USB_CDC_EP_NUM_DATA_OUT)\ + --cdc_ep_num_data_in $(USB_CDC_EP_NUM_DATA_IN)\ + --msc_ep_num_out $(USB_MSC_EP_NUM_OUT)\ + --msc_ep_num_in $(USB_MSC_EP_NUM_IN)\ + --hid_ep_num_out $(USB_HID_EP_NUM_OUT)\ + --hid_ep_num_in $(USB_HID_EP_NUM_IN)\ + --midi_ep_num_out $(USB_MIDI_EP_NUM_OUT)\ + --midi_ep_num_in $(USB_MIDI_EP_NUM_IN)\ + --output_c_file $(BUILD)/autogen_usb_descriptor.c\ + --output_h_file $(BUILD)/genhdr/autogen_usb_descriptor.h + +ifeq ($(USB_RENUMBER_ENDPOINTS), 0) +USB_DESCRIPTOR_ARGS += --no-renumber_endpoints endif SUPERVISOR_O = $(addprefix $(BUILD)/, $(SRC_SUPERVISOR:.c=.o)) $(BUILD)/autogen_display_resources.o @@ -110,17 +175,7 @@ $(BUILD)/autogen_usb_descriptor.c $(BUILD)/genhdr/autogen_usb_descriptor.h: auto autogen_usb_descriptor.intermediate: ../../tools/gen_usb_descriptor.py Makefile | $(HEADER_BUILD) $(STEPECHO) "GEN $@" $(Q)install -d $(BUILD)/genhdr - $(Q)$(PYTHON3) ../../tools/gen_usb_descriptor.py \ - --manufacturer $(USB_MANUFACTURER)\ - --product $(USB_PRODUCT)\ - --vid $(USB_VID)\ - --pid $(USB_PID)\ - --serial_number_length $(USB_SERIAL_NUMBER_LENGTH)\ - --devices $(USB_DEVICES)\ - --hid_devices $(USB_HID_DEVICES)\ - --msc_num_endpoint_pairs $(USB_MSC_NUM_ENDPOINT_PAIRS)\ - --output_c_file $(BUILD)/autogen_usb_descriptor.c\ - --output_h_file $(BUILD)/genhdr/autogen_usb_descriptor.h + $(Q)$(PYTHON3) ../../tools/gen_usb_descriptor.py $(USB_DESCRIPTOR_ARGS) CIRCUITPY_DISPLAY_FONT ?= "../../tools/fonts/ter-u12n.bdf" diff --git a/tests/basics/class_bytes.py b/tests/basics/class_bytes.py new file mode 100644 index 0000000000..75e2e7244e --- /dev/null +++ b/tests/basics/class_bytes.py @@ -0,0 +1,9 @@ +class C1: + def __init__(self, value): + self.value = value + + def __bytes__(self): + return self.value + +c1 = C1(b"class 1") +print(bytes(c1)) diff --git a/tools/build_board_info.py b/tools/build_board_info.py index 7d0d2996cc..efa481a637 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -12,18 +12,20 @@ from sh.contrib import git sys.path.append("adabot") import adabot.github_requests as github -SUPPORTED_PORTS = ["nrf", "atmel-samd", "stm32f4"] +SUPPORTED_PORTS = ["nrf", "atmel-samd", "stm32f4", "cxd56"] BIN = ('bin',) UF2 = ('uf2',) BIN_UF2 = ('bin', 'uf2') HEX = ('hex',) +SPK = ('spk',) # Default extensions extension_by_port = { "nrf": UF2, "atmel-samd": UF2, "stm32f4": BIN, + "cxd56": SPK, } # Per board overrides diff --git a/tools/ci_new_boards_check.py b/tools/ci_new_boards_check.py index 7ad8af8424..8bb8876fbc 100644 --- a/tools/ci_new_boards_check.py +++ b/tools/ci_new_boards_check.py @@ -42,6 +42,7 @@ ci_boards.sort() missing_boards = set(info_boards) - set(ci_boards) if missing_boards: + ok = False print('Boards missing in {}:'.format(workflow_file)) for board in missing_boards: print(board) diff --git a/tools/gen_usb_descriptor.py b/tools/gen_usb_descriptor.py index 6bb401ef51..21a480f99e 100644 --- a/tools/gen_usb_descriptor.py +++ b/tools/gen_usb_descriptor.py @@ -32,8 +32,28 @@ parser.add_argument('--devices', type=lambda l: tuple(l.split(',')), default=DEF help='devices to include in descriptor (AUDIO includes MIDI support)') parser.add_argument('--hid_devices', type=lambda l: tuple(l.split(',')), default=DEFAULT_HID_DEVICES, help='HID devices to include in HID report descriptor') -parser.add_argument('--msc_num_endpoint_pairs', type=int, default=1, - help='Use 1 or 2 endpoint pairs for MSC (1 bidirectional, or 1 input + 1 output (required by SAMD21))') +parser.add_argument('--msc_max_packet_size', type=int, default=64, + help='Max packet size for MSC') +parser.add_argument('--no-renumber_endpoints', dest='renumber_endpoints', action='store_false', + help='use to not renumber endpoint') +parser.add_argument('--cdc_ep_num_notification', type=int, default=0, + help='endpoint number of CDC NOTIFICATION') +parser.add_argument('--cdc_ep_num_data_out', type=int, default=0, + help='endpoint number of CDC DATA OUT') +parser.add_argument('--cdc_ep_num_data_in', type=int, default=0, + help='endpoint number of CDC DATA IN') +parser.add_argument('--msc_ep_num_out', type=int, default=0, + help='endpoint number of MSC OUT') +parser.add_argument('--msc_ep_num_in', type=int, default=0, + help='endpoint number of MSC IN') +parser.add_argument('--hid_ep_num_out', type=int, default=0, + help='endpoint number of HID OUT') +parser.add_argument('--hid_ep_num_in', type=int, default=0, + help='endpoint number of HID IN') +parser.add_argument('--midi_ep_num_out', type=int, default=0, + help='endpoint number of MIDI OUT') +parser.add_argument('--midi_ep_num_in', type=int, default=0, + help='endpoint number of MIDI IN') parser.add_argument('--output_c_file', type=argparse.FileType('w'), required=True) parser.add_argument('--output_h_file', type=argparse.FileType('w'), required=True) @@ -47,9 +67,32 @@ unknown_hid_devices = list(frozenset(args.hid_devices) - ALL_HID_DEVICES_SET) if unknown_hid_devices: raise ValueError("Unknown HID devices(s)", unknown_hid_devices) -if args.msc_num_endpoint_pairs not in (1, 2): - raise ValueError("--msc_num_endpoint_pairs must be 1 or 2") +if not args.renumber_endpoints: + if 'CDC' in args.devices: + if args.cdc_ep_num_notification == 0: + raise ValueError("CDC notification endpoint number must not be 0") + elif args.cdc_ep_num_data_out == 0: + raise ValueError("CDC data OUT endpoint number must not be 0") + elif args.cdc_ep_num_data_in == 0: + raise ValueError("CDC data IN endpoint number must not be 0") + if 'MSC' in args.devices: + if args.msc_ep_num_out == 0: + raise ValueError("MSC endpoint OUT number must not be 0") + elif args.msc_ep_num_in == 0: + raise ValueError("MSC endpoint IN number must not be 0") + + if 'HID' in args.devices: + if args.args.hid_ep_num_out == 0: + raise ValueError("HID endpoint OUT number must not be 0") + elif args.hid_ep_num_in == 0: + raise ValueError("HID endpoint IN number must not be 0") + + if 'AUDIO' in args.devices: + if args.args.midi_ep_num_out == 0: + raise ValueError("MIDI endpoint OUT number must not be 0") + elif args.midi_ep_num_in == 0: + raise ValueError("MIDI endpoint IN number must not be 0") class StringIndex: """Assign a monotonically increasing index to each unique string. Start with 0.""" @@ -120,7 +163,7 @@ cdc_comm_interface = standard.InterfaceDescriptor( cdc_union, standard.EndpointDescriptor( description="CDC comm in", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, + bEndpointAddress=args.cdc_ep_num_notification | standard.EndpointDescriptor.DIRECTION_IN, bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, wMaxPacketSize=0x0040, bInterval=0x10) @@ -133,11 +176,11 @@ cdc_data_interface = standard.InterfaceDescriptor( subdescriptors=[ standard.EndpointDescriptor( description="CDC data out", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_OUT, + bEndpointAddress=args.cdc_ep_num_data_out | standard.EndpointDescriptor.DIRECTION_OUT, bmAttributes=standard.EndpointDescriptor.TYPE_BULK), standard.EndpointDescriptor( description="CDC data in", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, + bEndpointAddress=args.cdc_ep_num_data_in | standard.EndpointDescriptor.DIRECTION_IN, bmAttributes=standard.EndpointDescriptor.TYPE_BULK), ]) @@ -153,16 +196,16 @@ msc_interfaces = [ subdescriptors=[ standard.EndpointDescriptor( description="MSC in", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, + bEndpointAddress=args.msc_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, bmAttributes=standard.EndpointDescriptor.TYPE_BULK, - bInterval=0), + bInterval=0, + wMaxPacketSize=args.msc_max_packet_size), standard.EndpointDescriptor( description="MSC out", - # SAMD21 needs to use a separate pair of endpoints for MSC. - bEndpointAddress=((0x1 if args.msc_num_endpoint_pairs == 2 else 0x0) | - standard.EndpointDescriptor.DIRECTION_OUT), + bEndpointAddress=(args.msc_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT), bmAttributes=standard.EndpointDescriptor.TYPE_BULK, - bInterval=0) + bInterval=0, + wMaxPacketSize=args.msc_max_packet_size) ] ) ] @@ -197,9 +240,15 @@ else: # and will fail (possibly silently) if both are not supplied. hid_endpoint_in_descriptor = standard.EndpointDescriptor( description="HID in", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, + bEndpointAddress=args.hid_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, - bInterval=10) + bInterval=8) + +hid_endpoint_out_descriptor = standard.EndpointDescriptor( + description="HID out", + bEndpointAddress=args.hid_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT, + bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, + bInterval=8) hid_interfaces = [ standard.InterfaceDescriptor( @@ -213,6 +262,7 @@ hid_interfaces = [ description="HID", wDescriptorLength=len(bytes(combined_hid_report_descriptor))), hid_endpoint_in_descriptor, + hid_endpoint_out_descriptor, ] ), ] @@ -260,12 +310,12 @@ audio_midi_interface = standard.InterfaceDescriptor( ), standard.EndpointDescriptor( description="MIDI data out to CircuitPython", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_OUT, + bEndpointAddress=args.midi_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT, bmAttributes=standard.EndpointDescriptor.TYPE_BULK), midi.DataEndpointDescriptor(baAssocJack=[midi_in_jack_emb]), standard.EndpointDescriptor( description="MIDI data in from CircuitPython", - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, + bEndpointAddress=args.midi_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, bmAttributes=standard.EndpointDescriptor.TYPE_BULK, bInterval = 0x0), midi.DataEndpointDescriptor(baAssocJack=[midi_out_jack_emb]), @@ -309,7 +359,7 @@ if 'AUDIO' in args.devices: # util.join_interfaces() will renumber the endpoints to make them unique across descriptors, # and renumber the interfaces in order. But we still need to fix up certain # interface cross-references. -interfaces = util.join_interfaces(*interfaces_to_join) +interfaces = util.join_interfaces(interfaces_to_join, renumber_endpoints=args.renumber_endpoints) # Now adjust the CDC interface cross-references. diff --git a/tools/preprocess_frozen_modules.py b/tools/preprocess_frozen_modules.py index bb6959f0d8..2199e9d395 100755 --- a/tools/preprocess_frozen_modules.py +++ b/tools/preprocess_frozen_modules.py @@ -32,8 +32,9 @@ def version_string(path=None, *, valid_semver=False): def copy_and_process(in_dir, out_dir): for root, subdirs, files in os.walk(in_dir): - # Skip library examples directories. - if Path(root).name in ['examples', 'docs', 'tests']: + # Skip library examples directory and subfolders. + relative_path_parts = Path(root).relative_to(in_dir).parts + if relative_path_parts and relative_path_parts[0] in ['examples', 'docs', 'tests']: continue for file in files: diff --git a/tools/usb_descriptor b/tools/usb_descriptor index dac9689e27..701cafc50e 160000 --- a/tools/usb_descriptor +++ b/tools/usb_descriptor @@ -1 +1 @@ -Subproject commit dac9689e274844294bbe4fd1b78defff9ff27533 +Subproject commit 701cafc50e2e574dccaf7a340eedbd64a0b41a42