diff --git a/ports/stm/boards/STM32F446_fs.ld b/ports/stm/boards/STM32F446_fs.ld new file mode 100644 index 0000000000..76735cbdc2 --- /dev/null +++ b/ports/stm/boards/STM32F446_fs.ld @@ -0,0 +1,26 @@ +/* + GNU linker script for STM32F446 with filesystem +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_FIRMWARE (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 24K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); diff --git a/ports/stm/boards/nucleo_f446re/board.c b/ports/stm/boards/nucleo_f446re/board.c new file mode 100644 index 0000000000..b75dda3061 --- /dev/null +++ b/ports/stm/boards/nucleo_f446re/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/stm/boards/nucleo_f446re/mpconfigboard.h b/ports/stm/boards/nucleo_f446re/mpconfigboard.h new file mode 100644 index 0000000000..f0155f4624 --- /dev/null +++ b/ports/stm/boards/nucleo_f446re/mpconfigboard.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// Micropython setup + +#define MICROPY_HW_BOARD_NAME "NUCLEO F446RE" +#define MICROPY_HW_MCU_NAME "STM32F446xx" + +#define FLASH_SIZE (0x80000u) // 512K +#define FLASH_PAGE_SIZE (0x4000u) // 16K + +#define HSE_VALUE ((uint32_t)8000000u) +#define BOARD_HSE_SOURCE (RCC_HSE_ON) +// The schematic has a 32k crystal that isn't fitted. Uncommented the line below if you add it. +// #define BOARD_HAS_LOW_SPEED_CRYSTAL (1) +// #define LSE_VALUE ((uint32_t)32000U) +#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) + +// USART3 + USB FTDI +// #define CIRCUITPY_CONSOLE_UART_TX (&pin_PC10) +// #define CIRCUITPY_CONSOLE_UART_RX (&pin_PC11) + +// USART2 + ST link +// #define CIRCUITPY_CONSOLE_UART_TX (&pin_PA02) +// #define CIRCUITPY_CONSOLE_UART_RX (&pin_PA03) + +// Status LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA05) + +#define MICROPY_FATFS_EXFAT 0 + +#define BOARD_NO_VBUS_SENSE (1) diff --git a/ports/stm/boards/nucleo_f446re/mpconfigboard.mk b/ports/stm/boards/nucleo_f446re/mpconfigboard.mk new file mode 100644 index 0000000000..0887578166 --- /dev/null +++ b/ports/stm/boards/nucleo_f446re/mpconfigboard.mk @@ -0,0 +1,35 @@ +USB_VID = 0x0483 +USB_PID = 0x572A +USB_PRODUCT = "NUCLEO-F446RE - CPy" +USB_MANUFACTURER = "STMicroelectronics" + +INTERNAL_FLASH_FILESYSTEM = 1 + +MCU_SERIES = F4 +MCU_VARIANT = STM32F446xx +MCU_PACKAGE = LQFP64 + +LD_COMMON = boards/common_default.ld +LD_FILE = boards/STM32F446_fs.ld + +# Too big for the flash +CIRCUITPY_AUDIOCORE = 0 +CIRCUITPY_AUDIOPWMIO = 0 +CIRCUITPY_BITMAPTOOLS = 0 +CIRCUITPY_BLEIO_HCI = 0 +CIRCUITPY_VECTORIO = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_RAINBOWIO = 0 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 +CIRCUITPY_JSON = 0 +# Requires neopixel_write or SPI (dotstar) +CIRCUITPY_PIXELBUF = 0 +# No requirements, but takes extra flash +CIRCUITPY_ULAB = 0 +CIRCUITPY_GAMEPADSHIFT = 0 +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_SDCARDIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_KEYPAD = 0 diff --git a/ports/stm/boards/nucleo_f446re/pins.c b/ports/stm/boards/nucleo_f446re/pins.c new file mode 100644 index 0000000000..ac5a457d07 --- /dev/null +++ b/ports/stm/boards/nucleo_f446re/pins.c @@ -0,0 +1,78 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + {MP_ROM_QSTR(MP_QSTR_ID), MP_ROM_PTR(&board_module_id_obj)}, + {MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA03)}, + {MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02)}, + {MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10)}, + {MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB03)}, + {MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB05)}, + {MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB04)}, + {MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB10)}, + {MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA08)}, + {MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA09)}, + {MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PC07)}, + {MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB06)}, + {MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA07)}, + {MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA06)}, + {MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA05)}, + {MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09)}, + {MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB08)}, + {MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00)}, + {MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01)}, + {MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04)}, + {MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB00)}, + {MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC01)}, + {MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC00)}, + {MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00)}, + {MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01)}, + {MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02)}, + {MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03)}, + {MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04)}, + {MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05)}, + {MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06)}, + {MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07)}, + {MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08)}, + {MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09)}, + {MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10)}, + {MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11)}, + {MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12)}, + {MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15)}, + {MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_PB00)}, + {MP_ROM_QSTR(MP_QSTR_PB1), MP_ROM_PTR(&pin_PB01)}, + {MP_ROM_QSTR(MP_QSTR_PB2), MP_ROM_PTR(&pin_PB02)}, + {MP_ROM_QSTR(MP_QSTR_PB3), MP_ROM_PTR(&pin_PB03)}, + {MP_ROM_QSTR(MP_QSTR_PB4), MP_ROM_PTR(&pin_PB04)}, + {MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05)}, + {MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06)}, + {MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07)}, + {MP_ROM_QSTR(MP_QSTR_PB8), MP_ROM_PTR(&pin_PB08)}, + {MP_ROM_QSTR(MP_QSTR_PB9), MP_ROM_PTR(&pin_PB09)}, + {MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10)}, + {MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12)}, + {MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13)}, + {MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14)}, + {MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15)}, + {MP_ROM_QSTR(MP_QSTR_PC0), MP_ROM_PTR(&pin_PC00)}, + {MP_ROM_QSTR(MP_QSTR_PC1), MP_ROM_PTR(&pin_PC01)}, + {MP_ROM_QSTR(MP_QSTR_PC2), MP_ROM_PTR(&pin_PC02)}, + {MP_ROM_QSTR(MP_QSTR_PC3), MP_ROM_PTR(&pin_PC03)}, + {MP_ROM_QSTR(MP_QSTR_PC4), MP_ROM_PTR(&pin_PC04)}, + {MP_ROM_QSTR(MP_QSTR_PC5), MP_ROM_PTR(&pin_PC05)}, + {MP_ROM_QSTR(MP_QSTR_PC6), MP_ROM_PTR(&pin_PC06)}, + {MP_ROM_QSTR(MP_QSTR_PC7), MP_ROM_PTR(&pin_PC07)}, + {MP_ROM_QSTR(MP_QSTR_PC8), MP_ROM_PTR(&pin_PC08)}, + {MP_ROM_QSTR(MP_QSTR_PC9), MP_ROM_PTR(&pin_PC09)}, + {MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10)}, + {MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11)}, + {MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12)}, + {MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13)}, + {MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14)}, + {MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15)}, + {MP_ROM_QSTR(MP_QSTR_PD2), MP_ROM_PTR(&pin_PD02)}, + {MP_ROM_QSTR(MP_QSTR_PH0), MP_ROM_PTR(&pin_PH00)}, + {MP_ROM_QSTR(MP_QSTR_PH1), MP_ROM_PTR(&pin_PH01)}, + {MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA05)}, + {MP_ROM_QSTR(MP_QSTR_SW), MP_ROM_PTR(&pin_PC13)}, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/peripherals/periph.h b/ports/stm/peripherals/periph.h index caf4ca1324..1049aeb084 100644 --- a/ports/stm/peripherals/periph.h +++ b/ports/stm/peripherals/periph.h @@ -119,6 +119,13 @@ typedef struct { #include "stm32f4/stm32f407xx/periph.h" #endif +#ifdef STM32F446xx +#define HAS_DAC 0 +#define HAS_TRNG 0 +#define HAS_BASIC_TIM 0 +#include "stm32f4/stm32f446xx/periph.h" +#endif + // F7 Series #ifdef STM32F746xx diff --git a/ports/stm/peripherals/pins.h b/ports/stm/peripherals/pins.h index 37aa2d8feb..a53b05aa1d 100644 --- a/ports/stm/peripherals/pins.h +++ b/ports/stm/peripherals/pins.h @@ -97,6 +97,9 @@ extern const mp_obj_type_t mcu_pin_type; #ifdef STM32F407xx #include "stm32f4/stm32f407xx/pins.h" #endif +#ifdef STM32F446xx +#include "stm32f4/stm32f446xx/pins.h" +#endif // F7 Series #ifdef STM32F746xx diff --git a/ports/stm/peripherals/stm32f4/clocks.c b/ports/stm/peripherals/stm32f4/clocks.c index f3434a944b..a2f8344901 100644 --- a/ports/stm/peripherals/stm32f4/clocks.c +++ b/ports/stm/peripherals/stm32f4/clocks.c @@ -47,11 +47,14 @@ #ifdef STM32F407xx #include "stm32f4/stm32f407xx/clocks.h" #endif +#ifdef STM32F446xx +#include "stm32f4/stm32f446xx/clocks.h" +#endif void stm32_peripherals_clocks_init(void) { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; // Set voltage scaling in accordance with system clock speed __HAL_RCC_PWR_CLK_ENABLE(); diff --git a/ports/stm/peripherals/stm32f4/stm32f446xx/clocks.h b/ports/stm/peripherals/stm32f4/stm32f446xx/clocks.h new file mode 100644 index 0000000000..2cd4b59c75 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f446xx/clocks.h @@ -0,0 +1,66 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" + +// Chip: STM32F446xC/xV +// Line Type: Access Line +// Speed: 168MHz (max 180MHz) + +// Defaults: +#ifndef CPY_CLK_VSCALE +#define CPY_CLK_VSCALE (PWR_REGULATOR_VOLTAGE_SCALE1) +#endif +#ifndef CPY_CLK_PLLM +#define CPY_CLK_PLLM (8) +#endif +#ifndef CPY_CLK_PLLN +#define CPY_CLK_PLLN (336) +#endif +#ifndef CPY_CLK_PLLP +#define CPY_CLK_PLLP (RCC_PLLP_DIV2) +#endif +#ifndef CPY_CLK_PLLQ +#define CPY_CLK_PLLQ (7) +#endif +#ifndef CPY_CLK_AHBDIV +#define CPY_CLK_AHBDIV (RCC_SYSCLK_DIV1) +#endif +#ifndef CPY_CLK_APB1DIV +#define CPY_CLK_APB1DIV (RCC_HCLK_DIV4) +#endif +#ifndef CPY_CLK_APB2DIV +#define CPY_CLK_APB2DIV (RCC_HCLK_DIV2) +#endif +#ifndef CPY_CLK_FLASH_LATENCY +#define CPY_CLK_FLASH_LATENCY (FLASH_LATENCY_5) +#endif +#ifndef CPY_CLK_USB_USES_AUDIOPLL +#define CPY_CLK_USB_USES_AUDIOPLL (0) +#endif +#ifndef BOARD_HSE_SOURCE +#define BOARD_HSE_SOURCE (RCC_HSE_ON) +#endif diff --git a/ports/stm/peripherals/stm32f4/stm32f446xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f446xx/gpio.c new file mode 100644 index 0000000000..624eb319f4 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f446xx/gpio.c @@ -0,0 +1,47 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "peripherals/gpio.h" +#include "stm32f4xx_hal.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32_peripherals_gpio_init(void) { + // * GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + // Never reset pins + never_reset_pin_number(2, 13); // PC13 anti tamp + never_reset_pin_number(2, 14); // PC14 OSC32_IN + never_reset_pin_number(2, 15); // PC15 OSC32_OUT + never_reset_pin_number(0, 13); // PA13 SWDIO + never_reset_pin_number(0, 14); // PA14 SWCLK +} + +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { +} diff --git a/ports/stm/peripherals/stm32f4/stm32f446xx/periph.c b/ports/stm/peripherals/stm32f4/stm32f446xx/periph.c new file mode 100644 index 0000000000..5287a8bdf0 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f446xx/periph.c @@ -0,0 +1,129 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" + +// I2C +I2C_TypeDef *mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_periph_obj_t mcu_i2c_sda_list[3] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(2, 4, &pin_PB03), + PERIPH(3, 4, &pin_PB04), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[3] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(2, 4, &pin_PB10), + PERIPH(3, 4, &pin_PA08), +}; + +// SPI +SPI_TypeDef *mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; + +const mcu_periph_obj_t mcu_spi_sck_list[3] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(2, 5, &pin_PB13), + PERIPH(3, 6, &pin_PB03), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[3] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(2, 5, &pin_PB15), + PERIPH(3, 6, &pin_PB05), + +}; + +const mcu_periph_obj_t mcu_spi_miso_list[3] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(2, 5, &pin_PB14), + PERIPH(3, 6, &pin_PB04), +}; + +const mcu_periph_obj_t mcu_spi_nss_list[3] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(2, 5, &pin_PB12), + PERIPH(3, 6, &pin_PA15), +}; + +USART_TypeDef *mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, NULL, NULL, NULL}; +bool mcu_uart_has_usart[MAX_UART] = {false, false, false, true, true, false}; + +const mcu_periph_obj_t mcu_uart_tx_list[3] = { + PERIPH(1, 7, &pin_PB06), + PERIPH(2, 7, &pin_PA02), + PERIPH(3, 7, &pin_PC10), + +}; + +const mcu_periph_obj_t mcu_uart_rx_list[3] = { + PERIPH(1, 7, &pin_PB07), + PERIPH(2, 7, &pin_PA03), + PERIPH(3, 7, &pin_PC11), +}; + +// Timers +TIM_TypeDef *mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, NULL, TIM9, TIM10, + TIM11, NULL, NULL, NULL}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[34] = { + TIM(2, 1, 1, &pin_PA00), + TIM(5, 2, 1, &pin_PA00), + TIM(2, 1, 2, &pin_PA01), + TIM(5, 2, 2, &pin_PA01), + TIM(2, 1, 3, &pin_PA02), + TIM(5, 2, 3, &pin_PA02), + TIM(2, 1, 4, &pin_PA03), + TIM(5, 2, 4, &pin_PA03), + TIM(9, 3, 1, &pin_PA02), + TIM(9, 3, 2, &pin_PA03), + TIM(3, 2, 1, &pin_PA06), + TIM(3, 2, 2, &pin_PA07), + TIM(1, 1, 1, &pin_PA08), + TIM(1, 1, 2, &pin_PA09), + TIM(1, 1, 3, &pin_PA10), + TIM(1, 1, 4, &pin_PA11), + TIM(2, 1, 1, &pin_PA15), + TIM(3, 2, 3, &pin_PB00), + TIM(3, 2, 4, &pin_PB01), + TIM(2, 1, 2, &pin_PB03), + TIM(3, 2, 1, &pin_PB04), + TIM(3, 2, 2, &pin_PB05), + TIM(4, 2, 1, &pin_PB06), + TIM(4, 2, 2, &pin_PB07), + TIM(4, 2, 3, &pin_PB08), + TIM(10, 2, 1, &pin_PB08), + TIM(4, 2, 4, &pin_PB09), + TIM(11, 2, 1, &pin_PB09), + TIM(2, 1, 3, &pin_PB10), + TIM(3, 2, 1, &pin_PC06), + TIM(3, 2, 2, &pin_PC07), + TIM(3, 2, 3, &pin_PC08), + TIM(3, 2, 4, &pin_PC09), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f446xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f446xx/periph.h new file mode 100644 index 0000000000..d34be9d156 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f446xx/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F446RE_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F446RE_PERIPH_H + +// I2C +extern I2C_TypeDef *mcu_i2c_banks[3]; + +extern const mcu_periph_obj_t mcu_i2c_sda_list[3]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[3]; + +// SPI +extern SPI_TypeDef *mcu_spi_banks[3]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[3]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[3]; +extern const mcu_periph_obj_t mcu_spi_miso_list[3]; +extern const mcu_periph_obj_t mcu_spi_nss_list[3]; + +// UART +extern USART_TypeDef *mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_periph_obj_t mcu_uart_tx_list[3]; +extern const mcu_periph_obj_t mcu_uart_rx_list[3]; + +// Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 34 +extern TIM_TypeDef *mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +extern const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F446RE_PERIPH_H diff --git a/ports/stm/peripherals/stm32f4/stm32f446xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f446xx/pins.c new file mode 100644 index 0000000000..17176ea72f --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f446xx/pins.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); // anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); // OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); // OSC32_OUT +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1, 10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1, 11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1, 12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1, 13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1, 0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1, 1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1, 2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1, 3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1, 4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1, 5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1, 6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1, 7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1, 14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1, 15)); +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1, 8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1, 9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); // SWDIO +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); // SWCLK +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); // JTDI +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); + +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(5, 2, NO_ADC); + +const mcu_pin_obj_t pin_PH00 = PIN(7, 0, NO_ADC); +const mcu_pin_obj_t pin_PH01 = PIN(7, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f446xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f446xx/pins.h new file mode 100644 index 0000000000..c56412a258 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f446xx/pins.h @@ -0,0 +1,90 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 flom84 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F446RE_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F446RE_PINS_H + +// Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP64 only + +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; + +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; + +extern const mcu_pin_obj_t pin_PC04; +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; + +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; + +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; + +extern const mcu_pin_obj_t pin_PA10; +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +extern const mcu_pin_obj_t pin_PC12; + +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; + +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PH00; +extern const mcu_pin_obj_t pin_PH01; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F446RE_PINS_H diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index 98c55d30e8..809c263666 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -77,6 +77,12 @@ #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 #endif +#ifdef STM32F446xx +#define STM32_FLASH_SIZE 0x80000 // 512KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 // 48KiB +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 +#endif + /* Note this applies to STM32F769xG only, STM32F746xE has 512KB */ #ifdef STM32F746xx #define STM32_FLASH_SIZE 0x100000 // 1MB