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mimxrt/Makefile: Modify handling of SDRAM option. 

Replaces preprocessor macro for SDRAM option from #ifdef to #if in order to
allow always setting the define `MICROPY_HW_SDRAM_AVAIL` just with the
appropriate value 0/1.  This eliminates one `if` in the Makefile.
This commit is contained in:
Philipp Ebensberger 2022-06-22 20:39:23 +02:00 committed by Damien George
parent fbc50196ad
commit b1aec393b1
7 changed files with 17 additions and 17 deletions
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12
ports/mimxrt/Makefile
View File

@ -373,6 +373,10 @@ else
CFLAGS += -Os -DNDEBUG CFLAGS += -Os -DNDEBUG
endif endif
# Set default values for optional variables
MICROPY_HW_SDRAM_AVAIL ?= 0
MICROPY_HW_SDRAM_SIZE ?= 0
# Configure default compiler flags # Configure default compiler flags
CFLAGS += \ CFLAGS += \
$(INC) \ $(INC) \
@ -389,6 +393,8 @@ CFLAGS += \
-DFSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1 \ -DFSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1 \
-DI2C_RETRY_TIMES=1000000 \ -DI2C_RETRY_TIMES=1000000 \
-DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \ -DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \
-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE) \
-DSPI_RETRY_TIMES=1000000 \ -DSPI_RETRY_TIMES=1000000 \
-DUART_RETRY_TIMES=1000000 \ -DUART_RETRY_TIMES=1000000 \
-DXIP_BOOT_HEADER_ENABLE=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \
@ -458,12 +464,6 @@ CFLAGS += \
-DMBEDTLS_CONFIG_FILE='"mbedtls/mbedtls_config.h"' -DMBEDTLS_CONFIG_FILE='"mbedtls/mbedtls_config.h"'
endif endif
ifdef MICROPY_HW_SDRAM_AVAIL
CFLAGS += \
-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE)
endif
CFLAGS += $(CFLAGS_MOD) $(CFLAGS_EXTRA) CFLAGS += $(CFLAGS_MOD) $(CFLAGS_EXTRA)
# ============================================================================= # =============================================================================

2
ports/mimxrt/board_init.c
View File

@ -52,7 +52,7 @@ void board_init(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Iomuxc);
// ------------- SDRAM ------------ // // ------------- SDRAM ------------ //
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
mimxrt_sdram_init(); mimxrt_sdram_init();
#endif #endif

4
ports/mimxrt/boards/MIMXRT1021.ld
View File

@ -27,7 +27,7 @@ dtcm_size = 0x00018000;
ocrm_start = 0x20200000; ocrm_start = 0x20200000;
ocrm_size = 0x00018000; ocrm_size = 0x00018000;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
sdram_start = 0x80000000; sdram_start = 0x80000000;
sdram_size = MICROPY_HW_SDRAM_SIZE; sdram_size = MICROPY_HW_SDRAM_SIZE;
#endif #endif
@ -37,7 +37,7 @@ __stack_size__ = 0x6000;
_estack = __StackTop; _estack = __StackTop;
_sstack = __StackLimit; _sstack = __StackLimit;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
_gc_heap_start = ORIGIN(m_sdram); _gc_heap_start = ORIGIN(m_sdram);
_gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram); _gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram);
#else #else

4
ports/mimxrt/boards/MIMXRT1052.ld
View File

@ -29,7 +29,7 @@ dtcm_size = 0x00020000;
ocrm_start = 0x20200000; ocrm_start = 0x20200000;
ocrm_size = 0x00040000; ocrm_size = 0x00040000;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
sdram_start = 0x80000000; sdram_start = 0x80000000;
sdram_size = MICROPY_HW_SDRAM_SIZE; sdram_size = MICROPY_HW_SDRAM_SIZE;
#endif #endif
@ -39,7 +39,7 @@ __stack_size__ = 0x6000;
_estack = __StackTop; _estack = __StackTop;
_sstack = __StackLimit; _sstack = __StackLimit;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
_gc_heap_start = ORIGIN(m_sdram); _gc_heap_start = ORIGIN(m_sdram);
_gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram); _gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram);
#else #else

4
ports/mimxrt/boards/MIMXRT1062.ld
View File

@ -29,7 +29,7 @@ dtcm_size = 0x00020000;
ocrm_start = 0x20200000; ocrm_start = 0x20200000;
ocrm_size = 0x000C0000; ocrm_size = 0x000C0000;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
sdram_start = 0x80000000; sdram_start = 0x80000000;
sdram_size = MICROPY_HW_SDRAM_SIZE; sdram_size = MICROPY_HW_SDRAM_SIZE;
#endif #endif
@ -39,7 +39,7 @@ __stack_size__ = 0x8000;
_estack = __StackTop; _estack = __StackTop;
_sstack = __StackLimit; _sstack = __StackLimit;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
_gc_heap_start = ORIGIN(m_sdram); _gc_heap_start = ORIGIN(m_sdram);
_gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram); _gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram);
#else #else

4
ports/mimxrt/boards/MIMXRT1064.ld
View File

@ -31,7 +31,7 @@ dtcm_size = 0x00020000;
ocrm_start = 0x20200000; ocrm_start = 0x20200000;
ocrm_size = 0x000C0000; ocrm_size = 0x000C0000;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
sdram_start = 0x80000000; sdram_start = 0x80000000;
sdram_size = MICROPY_HW_SDRAM_SIZE; sdram_size = MICROPY_HW_SDRAM_SIZE;
#endif #endif
@ -41,7 +41,7 @@ __stack_size__ = 0x6000;
_estack = __StackTop; _estack = __StackTop;
_sstack = __StackLimit; _sstack = __StackLimit;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
_gc_heap_start = ORIGIN(m_sdram); _gc_heap_start = ORIGIN(m_sdram);
_gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram); _gc_heap_end = ORIGIN(m_sdram) + LENGTH(m_sdram);
#else #else

4
ports/mimxrt/boards/common.ld
View File

@ -46,7 +46,7 @@ MEMORY
m_dtcm (RW) : ORIGIN = dtcm_start, LENGTH = dtcm_size m_dtcm (RW) : ORIGIN = dtcm_start, LENGTH = dtcm_size
m_ocrm (RW) : ORIGIN = ocrm_start, LENGTH = ocrm_size m_ocrm (RW) : ORIGIN = ocrm_start, LENGTH = ocrm_size
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
m_sdram (RX) : ORIGIN = sdram_start, LENGTH = sdram_size m_sdram (RX) : ORIGIN = sdram_start, LENGTH = sdram_size
#endif #endif
} }
@ -55,7 +55,7 @@ MEMORY
SECTIONS SECTIONS
{ {
__flash_start = flash_start; __flash_start = flash_start;
#ifdef MICROPY_HW_SDRAM_AVAIL #if MICROPY_HW_SDRAM_AVAIL
__sdram_start = sdram_start; __sdram_start = sdram_start;
#endif #endif
__vfs_start = ORIGIN(m_vfs); __vfs_start = ORIGIN(m_vfs);