Fix to Issue #7224 - tested
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@ -236,14 +236,6 @@ extern void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t *self, uin
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}
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// compare_count is the CC register value, which should be TOP+1 for 100% duty cycle.
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pwm_set_chan_level(self->slice, self->ab_channel, compare_count);
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// Wait for wrap so that we know our new cc value has been applied. Clear
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// the internal interrupt and then wait for it to be set. Worst case, we
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// wait a full cycle.
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pwm_hw->intr = 1 << self->slice;
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while ((pwm_hw->en & (1 << self->slice)) != 0 &&
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(pwm_hw->intr & (1 << self->slice)) == 0 &&
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!mp_hal_is_interrupted()) {
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}
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}
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uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t *self) {
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