stmhal: L4: Adapt startup code, clock configuration and interrupts.
This commit is contained in:
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commit
adaaf439b0
@ -44,10 +44,12 @@
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*/
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.syntax unified
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#if defined(MCU_SERIES_M7)
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#if defined(MCU_SERIES_F7)
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.cpu cortex-m7
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#else
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#elif defined(MCU_SERIES_F4) || defined(MCU_SERIES_L4)
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.cpu cortex-m4
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#else
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#error "Unknown MCU Series"
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#endif
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.fpu softvfp
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.thumb
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@ -164,7 +166,11 @@ g_pfnVectors:
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/* External Interrupts */
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.word WWDG_IRQHandler /* Window WatchDog */
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#if defined(MCU_SERIES_L4)
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.word PVD_PVM_IRQHandler /* PVD and PVM through EXTI line detection */
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#else
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.word PVD_IRQHandler /* PVD through EXTI Line detection */
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#endif
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.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
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.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
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.word FLASH_IRQHandler /* FLASH */
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@ -174,6 +180,16 @@ g_pfnVectors:
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.word EXTI2_IRQHandler /* EXTI Line2 */
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.word EXTI3_IRQHandler /* EXTI Line3 */
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.word EXTI4_IRQHandler /* EXTI Line4 */
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#if defined(MCU_SERIES_L4)
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.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
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.word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
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.word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
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.word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
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.word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
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.word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
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.word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
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.word ADC1_2_IRQHandler /* ADC1 and ADC2 */
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#else
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.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
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.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
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.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
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@ -182,14 +198,21 @@ g_pfnVectors:
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.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
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#endif
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.word CAN1_TX_IRQHandler /* CAN1 TX */
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.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
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.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.word CAN1_SCE_IRQHandler /* CAN1 SCE */
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.word EXTI9_5_IRQHandler /* External Line[9:5]s */
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#if defined(MCU_SERIES_L4)
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.word TIM1_BRK_TIM15_IRQHandler /* TIM1 Break and TIM15 */
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.word TIM1_UP_TIM16_IRQHandler /* TIM1 Update and TIM16 */
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.word TIM1_TRG_COM_TIM17_IRQHandler /* TIM1 Trigger and Commutation and TIM17 */
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#else
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.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
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.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
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.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
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#endif
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.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.word TIM2_IRQHandler /* TIM2 */
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.word TIM3_IRQHandler /* TIM3 */
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@ -205,13 +228,24 @@ g_pfnVectors:
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.word USART3_IRQHandler /* USART3 */
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.word EXTI15_10_IRQHandler /* External Line[15:10]s */
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.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
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#if defined(MCU_SERIES_L4)
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.word DFSDM3_IRQHandler /* Digital filter for sigma delta modulator 3 */
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.word TIM8_BRK_IRQHandler /* TIM8 Break */
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.word TIM8_UP_IRQHandler /* TIM8 Update */
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.word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */
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#else
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.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
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.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
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.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
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.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
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#endif
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.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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#if defined(MCU_SERIES_L4)
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.word ADC3_IRQHandler /* ADC3 global interrupt */
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#else
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.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
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#if defined(MCU_SERIES_F7)
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#endif
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#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
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.word FMC_IRQHandler /* FMC */
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.word SDMMC1_IRQHandler /* SDMMC1 */
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#else
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@ -224,6 +258,19 @@ g_pfnVectors:
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.word UART5_IRQHandler /* UART5 */
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.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
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.word TIM7_IRQHandler /* TIM7 */
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#if defined(MCU_SERIES_L4)
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.word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */
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.word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */
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.word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */
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.word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */
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.word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */
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.word DFSDM0_IRQHandler /* Digital filter for sigma delta modulator 0 */
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.word DFSDM1_IRQHandler /* Digital filter for sigma delta modulator 1 */
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.word DFSDM2_IRQHandler /* Digital filter for sigma delta modulator 2 */
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.word COMP_IRQHandler /* Comporator thru EXTI line */
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.word LPTIM1_IRQHandler /* Low power timer 1 */
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.word LPTIM2_IRQHandler /* Low power timer 2 */
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#else
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.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
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.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
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.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
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@ -235,20 +282,40 @@ g_pfnVectors:
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.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
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.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
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.word CAN2_SCE_IRQHandler /* CAN2 SCE */
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#endif
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.word OTG_FS_IRQHandler /* USB OTG FS */
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#if defined(MCU_SERIES_L4)
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.word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */
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.word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */
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.word LPUART1_IRQHandler /* Low power UART */
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.word QUADSPI_IRQHandler /* Quad SPI */
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#else
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.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
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.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
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.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
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.word USART6_IRQHandler /* USART6 */
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#endif
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.word I2C3_EV_IRQHandler /* I2C3 event */
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.word I2C3_ER_IRQHandler /* I2C3 error */
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#if defined(MCU_SERIES_L4)
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.word SAI1_IRQHandler /* Serial audio interface 1 */
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.word SAI2_IRQHandler /* Serial audio interface 2 */
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.word SWPMI1_IRQHandler /* Single wire protocole 1 */
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.word TSC_IRQHandler /* Touch sensig controller */
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.word LCD_IRQHandler /* LCD */
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#else
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.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
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.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
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.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
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.word OTG_HS_IRQHandler /* USB OTG HS */
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.word DCMI_IRQHandler /* DCMI */
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#endif
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.word 0 /* CRYP crypto */
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#if defined(MCU_SERIES_L4)
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.word RNG_IRQHandler /* Random number generator */
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#else
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.word HASH_RNG_IRQHandler /* Hash and Rng */
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#endif
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.word FPU_IRQHandler /* FPU */
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#if defined(MCU_SERIES_F7)
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@ -307,8 +374,13 @@ g_pfnVectors:
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.weak WWDG_IRQHandler
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.thumb_set WWDG_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak PVD_PVM_IRQHandler
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.thumb_set PVD_PVM_IRQHandler,Default_Handler
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#else
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.weak PVD_IRQHandler
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.thumb_set PVD_IRQHandler,Default_Handler
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#endif
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.weak TAMP_STAMP_IRQHandler
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.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
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@ -337,6 +409,31 @@ g_pfnVectors:
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.weak EXTI4_IRQHandler
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.thumb_set EXTI4_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak DMA1_Channel1_IRQHandler
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.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
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.weak DMA1_Channel2_IRQHandler
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.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
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.weak DMA1_Channel3_IRQHandler
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.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
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.weak DMA1_Channel4_IRQHandler
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.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
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.weak DMA1_Channel5_IRQHandler
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.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
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.weak DMA1_Channel6_IRQHandler
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.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
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.weak DMA1_Channel7_IRQHandler
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.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
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.weak ADC1_2_IRQHandler
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.thumb_set ADC1_2_IRQHandler,Default_Handler
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#else
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.weak DMA1_Stream0_IRQHandler
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.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
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@ -360,6 +457,7 @@ g_pfnVectors:
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler,Default_Handler
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#endif
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.weak CAN1_TX_IRQHandler
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.thumb_set CAN1_TX_IRQHandler,Default_Handler
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@ -376,6 +474,16 @@ g_pfnVectors:
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak TIM1_BRK_TIM15_IRQHandler
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.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
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.weak TIM1_UP_TIM16_IRQHandler
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.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
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.weak TIM1_TRG_COM_TIM17_IRQHandler
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.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
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#else
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.weak TIM1_BRK_TIM9_IRQHandler
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.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
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@ -384,6 +492,7 @@ g_pfnVectors:
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.weak TIM1_TRG_COM_TIM11_IRQHandler
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.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
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#endif
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler,Default_Handler
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@ -430,6 +539,19 @@ g_pfnVectors:
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.weak RTC_Alarm_IRQHandler
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.thumb_set RTC_Alarm_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak DFSDM3_IRQHandler
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.thumb_set DFSDM3_IRQHandler,Default_Handler
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.weak TIM8_BRK_IRQHandler
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.thumb_set TIM8_BRK_IRQHandler,Default_Handler
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.weak TIM8_UP_IRQHandler
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.thumb_set TIM8_UP_IRQHandler,Default_Handler
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.weak TIM8_TRG_COM_IRQHandler
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.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
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#else
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.weak OTG_FS_WKUP_IRQHandler
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.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
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@ -441,14 +563,20 @@ g_pfnVectors:
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.weak TIM8_TRG_COM_TIM14_IRQHandler
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.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
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#endif
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.weak TIM8_CC_IRQHandler
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.thumb_set TIM8_CC_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak ADC3_IRQHandler
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.thumb_set ADC3_IRQHandler,Default_Handler
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#else
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.weak DMA1_Stream7_IRQHandler
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.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
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#endif
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#if defined(MCU_SERIES_F7)
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#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
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.weak FMC_IRQHandler
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.thumb_set FMC_IRQHandler,Default_Handler
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@ -480,6 +608,40 @@ g_pfnVectors:
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.weak TIM7_IRQHandler
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.thumb_set TIM7_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak DMA2_Channel1_IRQHandler
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.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
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.weak DMA2_Channel2_IRQHandler
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.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
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.weak DMA2_Channel3_IRQHandler
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.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
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.weak DMA2_Channel4_IRQHandler
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.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
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.weak DMA2_Channel5_IRQHandler
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.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
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.weak DFSDM0_IRQHandler
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.thumb_set DFSDM0_IRQHandler,Default_Handler
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.weak DFSDM1_IRQHandler
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.thumb_set DFSDM1_IRQHandler,Default_Handler
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.weak DFSDM2_IRQHandler
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.thumb_set DFSDM2_IRQHandler,Default_Handler
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.weak COMP_IRQHandler
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.thumb_set COMP_IRQHandler,Default_Handler
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.weak LPTIM1_IRQHandler
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.thumb_set LPTIM1_IRQHandler,Default_Handler
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.weak LPTIM2_IRQHandler
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.thumb_set LPTIM2_IRQHandler,Default_Handler
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#else
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.weak DMA2_Stream0_IRQHandler
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.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
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@ -512,10 +674,24 @@ g_pfnVectors:
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.weak CAN2_SCE_IRQHandler
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.thumb_set CAN2_SCE_IRQHandler,Default_Handler
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#endif
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.weak OTG_FS_IRQHandler
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.thumb_set OTG_FS_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak DMA2_Channel6_IRQHandler
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.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
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.weak DMA2_Channel7_IRQHandler
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.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
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.weak LPUART1_IRQHandler
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.thumb_set LPUART1_IRQHandler,Default_Handler
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.weak QUADSPI_IRQHandler
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.thumb_set QUADSPI_IRQHandler,Default_Handler
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#else
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.weak DMA2_Stream5_IRQHandler
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.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
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@ -527,6 +703,7 @@ g_pfnVectors:
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.weak USART6_IRQHandler
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.thumb_set USART6_IRQHandler,Default_Handler
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#endif
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.weak I2C3_EV_IRQHandler
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.thumb_set I2C3_EV_IRQHandler,Default_Handler
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@ -534,6 +711,25 @@ g_pfnVectors:
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.weak I2C3_ER_IRQHandler
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.thumb_set I2C3_ER_IRQHandler,Default_Handler
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#if defined(MCU_SERIES_L4)
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.weak SAI1_IRQHandler
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.thumb_set SAI1_IRQHandler,Default_Handler
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.weak SAI2_IRQHandler
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.thumb_set SAI2_IRQHandler,Default_Handler
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.weak SWPMI1_IRQHandler
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.thumb_set SWPMI1_IRQHandler,Default_Handler
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.weak TSC_IRQHandler
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.thumb_set TSC_IRQHandler,Default_Handler
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.weak LCD_IRQHandler
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.thumb_set LCD_IRQHandler,Default_Handler
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.weak RNG_IRQHandler
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.thumb_set RNG_IRQHandler,Default_Handler
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#else
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.weak OTG_HS_EP1_OUT_IRQHandler
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.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
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@ -551,6 +747,7 @@ g_pfnVectors:
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.weak HASH_RNG_IRQHandler
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.thumb_set HASH_RNG_IRQHandler,Default_Handler
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#endif
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler,Default_Handler
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@ -477,6 +477,14 @@ void PVD_IRQHandler(void) {
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IRQ_EXIT(PVD_IRQn);
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}
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#if defined(MCU_SERIES_L4)
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void PVD_PVM_IRQHandler(void) {
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IRQ_ENTER(PVD_PVM_IRQn);
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Handle_EXTI_Irq(EXTI_PVD_OUTPUT);
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IRQ_EXIT(PVD_PVM_IRQn);
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}
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#endif
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void RTC_Alarm_IRQHandler(void) {
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IRQ_ENTER(RTC_Alarm_IRQn);
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Handle_EXTI_Irq(EXTI_RTC_ALARM);
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@ -510,6 +518,14 @@ void TIM1_BRK_TIM9_IRQHandler(void) {
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IRQ_EXIT(TIM1_BRK_TIM9_IRQn);
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}
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#if defined(MCU_SERIES_L4)
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void TIM1_BRK_TIM15_IRQHandler(void) {
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IRQ_ENTER(TIM1_BRK_TIM15_IRQn);
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timer_irq_handler(15);
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IRQ_EXIT(TIM1_BRK_TIM15_IRQn);
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}
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#endif
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void TIM1_UP_TIM10_IRQHandler(void) {
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IRQ_ENTER(TIM1_UP_TIM10_IRQn);
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timer_irq_handler(1);
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@ -517,12 +533,29 @@ void TIM1_UP_TIM10_IRQHandler(void) {
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IRQ_EXIT(TIM1_UP_TIM10_IRQn);
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}
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#if defined(MCU_SERIES_L4)
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void TIM1_UP_TIM16_IRQHandler(void) {
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IRQ_ENTER(TIM1_UP_TIM16_IRQn);
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timer_irq_handler(1);
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timer_irq_handler(16);
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IRQ_EXIT(TIM1_UP_TIM16_IRQn);
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}
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#endif
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void TIM1_TRG_COM_TIM11_IRQHandler(void) {
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IRQ_ENTER(TIM1_TRG_COM_TIM11_IRQn);
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timer_irq_handler(11);
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IRQ_EXIT(TIM1_TRG_COM_TIM11_IRQn);
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}
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#if defined(MCU_SERIES_L4)
|
||||
void TIM1_TRG_COM_TIM17_IRQHandler(void) {
|
||||
IRQ_ENTER(TIM1_TRG_COM_TIM17_IRQn);
|
||||
timer_irq_handler(17);
|
||||
IRQ_EXIT(TIM1_TRG_COM_TIM17_IRQn);
|
||||
}
|
||||
#endif
|
||||
|
||||
void TIM2_IRQHandler(void) {
|
||||
IRQ_ENTER(TIM2_IRQn);
|
||||
timer_irq_handler(2);
|
||||
@ -573,6 +606,14 @@ void TIM8_UP_TIM13_IRQHandler(void) {
|
||||
IRQ_EXIT(TIM8_UP_TIM13_IRQn);
|
||||
}
|
||||
|
||||
#if defined(MCU_SERIES_L4)
|
||||
void TIM8_UP_IRQHandler(void) {
|
||||
IRQ_ENTER(TIM8_UP_IRQn);
|
||||
timer_irq_handler(8);
|
||||
IRQ_EXIT(TIM8_UP_IRQn);
|
||||
}
|
||||
#endif
|
||||
|
||||
void TIM8_TRG_COM_TIM14_IRQHandler(void) {
|
||||
IRQ_ENTER(TIM8_TRG_COM_TIM14_IRQn);
|
||||
timer_irq_handler(14);
|
||||
|
@ -108,6 +108,30 @@ void __fatal_error(const char *msg);
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
|
||||
|
||||
#define CONFIG_RCC_CR_1ST (RCC_CR_HSION)
|
||||
#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON || RCC_CR_CSSON || RCC_CR_PLLON)
|
||||
#define CONFIG_RCC_PLLCFGR (0x24003010)
|
||||
|
||||
#elif defined(MCU_SERIES_L4)
|
||||
|
||||
#define CONFIG_RCC_CR_1ST (RCC_CR_MSION)
|
||||
#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON || RCC_CR_CSSON || RCC_CR_HSION || RCC_CR_PLLON)
|
||||
#define CONFIG_RCC_PLLCFGR (0x00001000)
|
||||
/*
|
||||
* FIXME Do not know why I have to define these arrays here! they should be defined in the
|
||||
* hal_rcc-file!!
|
||||
*
|
||||
*/
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
const uint32_t MSIRangeTable[12] = {100000, 200000, 400000, 800000, 1000000, 2000000, \
|
||||
4000000, 8000000, 16000000, 24000000, 32000000, 48000000};
|
||||
#else
|
||||
#error Unknown processor
|
||||
#endif
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
@ -172,23 +196,28 @@ void SystemInit(void)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
RCC->CR |= CONFIG_RCC_CR_1ST;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00000000;
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CR &= ~ CONFIG_RCC_CR_2ND;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x24003010;
|
||||
RCC->PLLCFGR = CONFIG_RCC_PLLCFGR;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/* Disable all interrupts */
|
||||
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
|
||||
RCC->CIR = 0x00000000;
|
||||
#elif defined(MCU_SERIES_L4)
|
||||
RCC->CIER = 0x00000000;
|
||||
#endif
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
@ -204,7 +233,8 @@ void SystemInit(void)
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* The system Clock is configured as follow :
|
||||
*
|
||||
* The system Clock is configured for F4/F7 as follows:
|
||||
* System Clock source = PLL (HSE)
|
||||
* SYSCLK(Hz) = 168000000
|
||||
* HCLK(Hz) = 168000000
|
||||
@ -219,15 +249,39 @@ void SystemInit(void)
|
||||
* VDD(V) = 3.3
|
||||
* Main regulator output voltage = Scale1 mode
|
||||
* Flash Latency(WS) = 5
|
||||
*
|
||||
* The system Clock is configured for L4 as follows:
|
||||
* System Clock source = PLL (MSI)
|
||||
* SYSCLK(Hz) = 80000000
|
||||
* HCLK(Hz) = 80000000
|
||||
* AHB Prescaler = 1
|
||||
* APB1 Prescaler = 1
|
||||
* APB2 Prescaler = 1
|
||||
* MSI Frequency(Hz) = MSI_VALUE (4000000)
|
||||
* LSE Frequency(Hz) = 32768
|
||||
* PLL_M = 1
|
||||
* PLL_N = 40
|
||||
* PLL_P = 7
|
||||
* PLL_Q = 2
|
||||
* PLL_R = 2 <= This is the source for SysClk, not as on F4/7 PLL_P
|
||||
* Flash Latency(WS) = 4
|
||||
* @param None
|
||||
* @retval None
|
||||
*
|
||||
* PLL is configured as follows:
|
||||
*
|
||||
* VCO_IN = HSE / M
|
||||
* VCO_OUT = HSE / M * N
|
||||
* PLLCLK = HSE / M * N / P
|
||||
* PLL48CK = HSE / M * N / Q
|
||||
* VCO_IN
|
||||
* F4/F7 = HSE / M
|
||||
* L4 = MSI / M
|
||||
* VCO_OUT
|
||||
* F4/F7 = HSE / M * N
|
||||
* L4 = MSI / M * N
|
||||
* PLLCLK
|
||||
* F4/F7 = HSE / M * N / P
|
||||
* L4 = MSI / M * N / R
|
||||
* PLL48CK
|
||||
* F4/F7 = HSE / M * N / Q
|
||||
* L4 = MSI / M * N / Q USB Clock is obtained over PLLSAI1
|
||||
*
|
||||
* SYSCLK = PLLCLK
|
||||
* HCLK = SYSCLK / AHB_PRESC
|
||||
@ -261,6 +315,7 @@ void SystemClock_Config(void)
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
|
||||
/* Enable Power Control clock */
|
||||
__PWR_CLK_ENABLE();
|
||||
|
||||
@ -268,12 +323,29 @@ void SystemClock_Config(void)
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
#elif defined(MCU_SERIES_L4)
|
||||
/* Enable the LSE Oscillator */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
__fatal_error("HAL_RCC_OscConfig");
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
#elif defined(MCU_SERIES_L4)
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
|
||||
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
|
||||
#endif
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||
clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
@ -282,6 +354,8 @@ void SystemClock_Config(void)
|
||||
#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
|
||||
#if defined(MCU_SERIES_F7)
|
||||
#define FREQ_BKP BKP31R
|
||||
#elif defined(MCU_SERIES_L4)
|
||||
#error Unsupported Processor
|
||||
#else
|
||||
#define FREQ_BKP BKP19R
|
||||
#endif
|
||||
@ -319,15 +393,23 @@ void SystemClock_Config(void)
|
||||
RCC_ClkInitStruct.AHBCLKDivider = h; //RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = b1; //RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = b2; //RCC_HCLK_DIV2;
|
||||
#else
|
||||
#else // defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
|
||||
RCC_OscInitStruct.PLL.PLLM = MICROPY_HW_CLK_PLLM;
|
||||
RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN;
|
||||
RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP;
|
||||
RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ;
|
||||
#if defined(MCU_SERIES_L4)
|
||||
RCC_OscInitStruct.PLL.PLLR = MICROPY_HW_CLK_PLLR;
|
||||
#endif
|
||||
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
#elif defined(MCU_SERIES_L4)
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||
#endif
|
||||
#endif
|
||||
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
@ -358,6 +440,44 @@ void SystemClock_Config(void)
|
||||
|
||||
RCC->DCKCFGR2 = 0;
|
||||
#endif
|
||||
#if defined(MCU_SERIES_L4)
|
||||
// Enable MSI-Hardware auto calibration mode with LSE
|
||||
HAL_RCCEx_EnableMSIPLLMode();
|
||||
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_I2C1
|
||||
|RCC_PERIPHCLK_USB |RCC_PERIPHCLK_ADC
|
||||
|RCC_PERIPHCLK_RNG |RCC_PERIPHCLK_RTC;
|
||||
PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
|
||||
/* PLLSAI is used to clock USB, ADC, I2C1 and RNG. The frequency is
|
||||
HSE(8MHz)/PLLM(2)*PLLSAI1N(24)/PLLSAIQ(2) = 48MHz. See the STM32CubeMx
|
||||
application or the reference manual. */
|
||||
PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1;
|
||||
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
|
||||
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
|
||||
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLLSAI1;
|
||||
PeriphClkInitStruct.PLLSAI1.PLLSAI1N = 24;
|
||||
PeriphClkInitStruct.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
|
||||
PeriphClkInitStruct.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
|
||||
PeriphClkInitStruct.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
|
||||
PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK
|
||||
|RCC_PLLSAI1_48M2CLK
|
||||
|RCC_PLLSAI1_ADC1CLK;
|
||||
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
__fatal_error("HAL_RCCEx_PeriphCLKConfig");
|
||||
}
|
||||
|
||||
__PWR_CLK_ENABLE();
|
||||
|
||||
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
|
||||
|
||||
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
|
||||
#endif
|
||||
}
|
||||
|
||||
void HAL_MspInit(void) {
|
||||
|
Loading…
Reference in New Issue
Block a user