diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c
index bf4b640027..7dd6e4df32 100644
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c
+++ b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c
@@ -203,7 +203,8 @@ uint32_t system_clock_source_get_hz(
 		_system_dfll_wait_for_sync();
 
 		/* Check if operating in closed loop mode */
-		if (_system_clock_inst.dfll.control & SYSCTRL_DFLLCTRL_MODE) {
+		if ((_system_clock_inst.dfll.control & SYSCTRL_DFLLCTRL_MODE) &&
+			!( _system_clock_inst.dfll.control & SYSCTRL_DFLLCTRL_USBCRM )) {
 			return system_gclk_chan_get_hz(SYSCTRL_GCLK_ID_DFLL48) *
 					(_system_clock_inst.dfll.mul & 0xffff);
 		}
@@ -826,7 +827,7 @@ void system_clock_init(void)
 	/* OSCK32K */
 #if CONF_CLOCK_OSC32K_ENABLE == true
 	SYSCTRL->OSC32K.bit.CALIB =
-			((*(uint32_t *)SYSCTRL_FUSES_OSC32K_ADDR >> 
+			((*(uint32_t *)SYSCTRL_FUSES_OSC32K_ADDR >>
 			SYSCTRL_FUSES_OSC32K_Pos) & 0x7Ful);
 
 	struct system_clock_source_osc32k_config osc32k_conf;
@@ -851,7 +852,7 @@ void system_clock_init(void)
 	dfll_conf.loop_mode      = CONF_CLOCK_DFLL_LOOP_MODE;
 	dfll_conf.on_demand      = false;
 
-	/* Using DFLL48M COARSE CAL value from NVM Software Calibration Area Mapping 
+	/* Using DFLL48M COARSE CAL value from NVM Software Calibration Area Mapping
 	   in DFLL.COARSE helps to output a frequency close to 48 MHz.*/
 #define NVM_DFLL_COARSE_POS    58 /* DFLL48M Coarse calibration value bit position.*/
 #define NVM_DFLL_COARSE_SIZE   6  /* DFLL48M Coarse calibration value bit size.*/
@@ -902,7 +903,7 @@ void system_clock_init(void)
 	dfll_conf.fine_max_step   = CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE;
 
 	if (CONF_CLOCK_DFLL_LOOP_MODE == SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY) {
-		dfll_conf.fine_max_step   = 10; 
+		dfll_conf.fine_max_step   = 10;
 		dfll_conf.fine_value   = 0x1ff;
 		dfll_conf.quick_lock = SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE;
 		dfll_conf.stable_tracking = SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK;
diff --git a/atmel-samd/asf_conf/conf_clocks.h b/atmel-samd/asf_conf/conf_clocks.h
index 20ee967e2a..2d1b1ea4eb 100644
--- a/atmel-samd/asf_conf/conf_clocks.h
+++ b/atmel-samd/asf_conf/conf_clocks.h
@@ -71,7 +71,7 @@
 #  define CONF_CLOCK_XOSC_RUN_IN_STANDBY          false
 
 /* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
-#  define CONF_CLOCK_XOSC32K_ENABLE               true
+#  define CONF_CLOCK_XOSC32K_ENABLE               false
 #  define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL     SYSTEM_CLOCK_EXTERNAL_CRYSTAL
 #  define CONF_CLOCK_XOSC32K_STARTUP_TIME         SYSTEM_XOSC32K_STARTUP_65536
 #  define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL  false
@@ -89,8 +89,9 @@
 #  define CONF_CLOCK_OSC32K_RUN_IN_STANDBY        false
 
 /* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
+// USB Clock Source fixed at DFLL.
 #  define CONF_CLOCK_DFLL_ENABLE                  true
-#  define CONF_CLOCK_DFLL_LOOP_MODE               SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
+#  define CONF_CLOCK_DFLL_LOOP_MODE               SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
 #  define CONF_CLOCK_DFLL_ON_DEMAND               true
 
 /* DFLL open loop mode configuration */
@@ -139,7 +140,7 @@
 #  define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE         false
 
 /* Configure GCLK generator 1 */
-#  define CONF_CLOCK_GCLK_1_ENABLE                true
+#  define CONF_CLOCK_GCLK_1_ENABLE                false
 #  define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY        false
 #  define CONF_CLOCK_GCLK_1_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_XOSC32K
 #  define CONF_CLOCK_GCLK_1_PRESCALER             1
@@ -153,7 +154,7 @@
 #  define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE         false
 
 /* Configure GCLK generator 3 */
-#  define CONF_CLOCK_GCLK_3_ENABLE                true
+#  define CONF_CLOCK_GCLK_3_ENABLE                false
 #  define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY        false
 #  define CONF_CLOCK_GCLK_3_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
 #  define CONF_CLOCK_GCLK_3_PRESCALER             1