stm32/system_stm32: Improve H7 PLL and OSC configuration.
- Allow boards to configure CSI, HSI48 and PLL2. - Allow peripheral clock source configuration. - Set H7 SYSCLKSource.
This commit is contained in:
iabdalkader
Damien George
parent
36cac5e154
commit
a82fad7d8e
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@ -239,10 +239,19 @@ MP_WEAK void SystemClock_Config(void) {
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RCC_OscInitStruct.HSEState = MICROPY_HW_RCC_HSE_STATE;
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RCC_OscInitStruct.HSIState = MICROPY_HW_RCC_HSI_STATE;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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#if defined(STM32H7)
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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#if defined(MICROPY_HW_RCC_CSI_STATE)
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RCC_OscInitStruct.CSIState = MICROPY_HW_RCC_CSI_STATE;
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RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_CSI;
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#endif
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#if defined(MICROPY_HW_RCC_HSI48_STATE)
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RCC_OscInitStruct.HSI48State = MICROPY_HW_RCC_HSI48_STATE;
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RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
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#endif
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RCC_OscInitStruct.PLL.PLLSource = MICROPY_HW_RCC_PLL_SRC;
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#elif defined(STM32L4)
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#if MICROPY_HW_CLK_USE_HSE
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@ -370,6 +379,7 @@ MP_WEAK void SystemClock_Config(void) {
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RCC_ClkInitStruct.APB1CLKDivider = MICROPY_HW_CLK_APB1_DIV;
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RCC_ClkInitStruct.APB2CLKDivider = MICROPY_HW_CLK_APB2_DIV;
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#elif defined(STM32H7)
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = MICROPY_HW_CLK_AHB_DIV;
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RCC_ClkInitStruct.APB3CLKDivider = MICROPY_HW_CLK_APB3_DIV;
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@ -383,10 +393,20 @@ MP_WEAK void SystemClock_Config(void) {
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__fatal_error("HAL_RCC_OscConfig");
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}
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#if defined(STM32H7)
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/* PLL3 for USB Clock */
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
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#if defined(MICROPY_HW_CLK_PLL2M)
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// PLL2 configuration.
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PeriphClkInitStruct.PLL2.PLL2M = MICROPY_HW_CLK_PLL2M;
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PeriphClkInitStruct.PLL2.PLL2N = MICROPY_HW_CLK_PLL2N;
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PeriphClkInitStruct.PLL2.PLL2P = MICROPY_HW_CLK_PLL2P;
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PeriphClkInitStruct.PLL2.PLL2Q = MICROPY_HW_CLK_PLL2Q;
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PeriphClkInitStruct.PLL2.PLL2R = MICROPY_HW_CLK_PLL2R;
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PeriphClkInitStruct.PLL2.PLL2RGE = MICROPY_HW_CLK_PLL2VCI;
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PeriphClkInitStruct.PLL2.PLL2VCOSEL = MICROPY_HW_CLK_PLL2VCO;
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PeriphClkInitStruct.PLL2.PLL2FRACN = MICROPY_HW_CLK_PLL2FRAC;
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#endif
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#if defined(MICROPY_HW_CLK_PLL3M)
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// PLL3 configuration.
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PeriphClkInitStruct.PLL3.PLL3M = MICROPY_HW_CLK_PLL3M;
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PeriphClkInitStruct.PLL3.PLL3N = MICROPY_HW_CLK_PLL3N;
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PeriphClkInitStruct.PLL3.PLL3P = MICROPY_HW_CLK_PLL3P;
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@ -395,10 +415,72 @@ MP_WEAK void SystemClock_Config(void) {
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PeriphClkInitStruct.PLL3.PLL3RGE = MICROPY_HW_CLK_PLL3VCI;
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PeriphClkInitStruct.PLL3.PLL3VCOSEL = MICROPY_HW_CLK_PLL3VCO;
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PeriphClkInitStruct.PLL3.PLL3FRACN = MICROPY_HW_CLK_PLL3FRAC;
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#endif
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#if defined(STM32H7)
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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#if defined(MICROPY_HW_RCC_USB_CLKSOURCE)
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PeriphClkInitStruct.UsbClockSelection = MICROPY_HW_RCC_USB_CLKSOURCE;
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#else
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// Use PLL3 for USB clock source by default.
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
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#endif
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#if defined(MICROPY_HW_RCC_RTC_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_RTC;
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PeriphClkInitStruct.RTCClockSelection = MICROPY_HW_RCC_RTC_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_RNG_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_RNG;
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PeriphClkInitStruct.RngClockSelection = MICROPY_HW_RCC_RNG_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_FMC_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_FMC;
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PeriphClkInitStruct.FmcClockSelection = MICROPY_HW_RCC_FMC_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_ADC_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_ADC;
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PeriphClkInitStruct.AdcClockSelection = MICROPY_HW_RCC_ADC_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_SDMMC_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_SDMMC;
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PeriphClkInitStruct.SdmmcClockSelection = MICROPY_HW_RCC_SDMMC_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_FDCAN_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_FDCAN;
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PeriphClkInitStruct.FdcanClockSelection = MICROPY_HW_RCC_FDCAN_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_QSPI_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_QSPI;
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PeriphClkInitStruct.QspiClockSelection = MICROPY_HW_RCC_QSPI_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_SPI123_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_SPI123;
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PeriphClkInitStruct.Spi123ClockSelection = MICROPY_HW_RCC_SPI123_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_I2C123_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_I2C123;
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PeriphClkInitStruct.I2c123ClockSelection = MICROPY_HW_RCC_I2C123_CLKSOURCE;
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#endif
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#if defined(MICROPY_HW_RCC_SPI45_CLKSOURCE)
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PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_SPI45;
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PeriphClkInitStruct.Spi45ClockSelection = MICROPY_HW_RCC_SPI45_CLKSOURCE;
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#endif
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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__fatal_error("HAL_RCCEx_PeriphCLKConfig");
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}
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#endif
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#endif // defined(STM32H7)
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#if defined(STM32F7)
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/* Activate the OverDrive to reach the 200 MHz Frequency */
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