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Fix loops and comma style.

This commit is contained in:
Scott Shawcroft 2018-02-16 10:05:28 -08:00
parent eb2b41810a
commit a2b18b75d4
3 changed files with 12 additions and 12 deletions
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2
ports/atmel-samd/common-hal/pulseio/PWMOut.c
View File

@ -156,7 +156,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
direction = 1; direction = 1;
start = 0; start = 0;
} }
for (uint8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) { for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) {
const pin_timer_t* t = &pin->timer[i]; const pin_timer_t* t = &pin->timer[i];
if ((!t->is_tc && t->index >= TCC_INST_NUM) || if ((!t->is_tc && t->index >= TCC_INST_NUM) ||
(t->is_tc && t->index >= TC_INST_NUM)) { (t->is_tc && t->index >= TC_INST_NUM)) {

2
ports/atmel-samd/common-hal/pulseio/PulseOut.c
View File

@ -98,7 +98,7 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self,
if (refcount == 0) { if (refcount == 0) {
// Find a spare timer. // Find a spare timer.
Tc *tc = NULL; Tc *tc = NULL;
uint8_t index = TC_INST_NUM - 1; int8_t index = TC_INST_NUM - 1;
for (; index >= 0; index--) { for (; index >= 0; index--) {
if (tc_insts[index]->COUNT16.CTRLA.bit.ENABLE == 0) { if (tc_insts[index]->COUNT16.CTRLA.bit.ENABLE == 0) {
tc = tc_insts[index]; tc = tc_insts[index];

20
ports/atmel-samd/timers.c
View File

@ -46,10 +46,10 @@ const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC3_GCLK_ID,
TC4_GCLK_ID, TC4_GCLK_ID,
TC5_GCLK_ID, TC5_GCLK_ID,
#ifdef TC6_GCLK_ID #ifdef TC6_GCLK_ID
, TC6_GCLK_ID TC6_GCLK_ID,
#endif #endif
#ifdef TC7_GCLK_ID #ifdef TC7_GCLK_ID
, TC7_GCLK_ID TC7_GCLK_ID,
#endif #endif
}; };
const uint8_t tcc_gclk_ids[3] = {TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID}; const uint8_t tcc_gclk_ids[3] = {TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID};
@ -59,18 +59,18 @@ const uint8_t tcc_cc_num[5] = {6, 4, 3, 2, 2};
const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC0_GCLK_ID, const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC0_GCLK_ID,
TC1_GCLK_ID, TC1_GCLK_ID,
TC2_GCLK_ID, TC2_GCLK_ID,
TC3_GCLK_ID TC3_GCLK_ID,
#ifdef TC4_GCLK_ID #ifdef TC4_GCLK_ID
, TC4_GCLK_ID TC4_GCLK_ID,
#endif #endif
#ifdef TC5_GCLK_ID #ifdef TC5_GCLK_ID
, TC5_GCLK_ID TC5_GCLK_ID,
#endif #endif
#ifdef TC6_GCLK_ID #ifdef TC6_GCLK_ID
, TC6_GCLK_ID TC6_GCLK_ID,
#endif #endif
#ifdef TC7_GCLK_ID #ifdef TC7_GCLK_ID
, TC7_GCLK_ID TC7_GCLK_ID,
#endif #endif
}; };
const uint8_t tcc_gclk_ids[5] = {TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID, TCC3_GCLK_ID, const uint8_t tcc_gclk_ids[5] = {TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID, TCC3_GCLK_ID,
@ -91,12 +91,12 @@ IRQn_Type const tc_irq[TC_INST_NUM] = {
#endif #endif
TC3_IRQn, TC3_IRQn,
TC4_IRQn, TC4_IRQn,
TC5_IRQn TC5_IRQn,
#ifdef TC6 #ifdef TC6
, TC6_IRQn TC6_IRQn,
#endif #endif
#ifdef TC7 #ifdef TC7
, TC7_IRQn TC7_IRQn,
#endif #endif
}; };