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text fixes, postpone warning disable

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This commit is contained in:
Lucian Copeland 2020-05-05 12:46:30 -04:00
parent bc581fbdfb
commit a1330747e8
2 changed files with 3 additions and 29 deletions
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3
ports/mimxrt10xx/Makefile
View File

@ -93,8 +93,9 @@ endif
CFLAGS += $(INC) -Wall -Wno-cast-align -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) CFLAGS += $(INC) -Wall -Wno-cast-align -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT)
# TODO: add these when -Werror is applied
# Disable some warnings, as do most ports. NXP SDK causes undef, tinyusb causes cast-align # Disable some warnings, as do most ports. NXP SDK causes undef, tinyusb causes cast-align
CFLAGS += -Wno-undef -Wno-cast-align # CFLAGS += -Wno-undef -Wno-cast-align
CFLAGS += \ CFLAGS += \
-mthumb \ -mthumb \

29
ports/mimxrt10xx/common-hal/busio/SPI.c
View File

@ -39,7 +39,7 @@
STATIC bool reserved_spi[MAX_SPI]; STATIC bool reserved_spi[MAX_SPI];
STATIC bool never_reset_spi[MAX_SPI]; STATIC bool never_reset_spi[MAX_SPI];
static void config_periph_pin(const mcu_periph_obj_t *periph) { STATIC void config_periph_pin(const mcu_periph_obj_t *periph) {
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
periph->pin->mux_reg, periph->mux_mode, periph->pin->mux_reg, periph->mux_mode,
periph->input_reg, periph->input_idx, periph->input_reg, periph->input_idx,
@ -153,33 +153,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
} }
} }
// for (uint32_t i = 0; i < sck_count; ++i) {
// if (mcu_spi_sck_list[i].pin != clock)
// continue;
// for (uint32_t j = 0; j < miso_count; ++j) {
// if (mcu_spi_miso_list[j].pin != miso)
// continue;
// if (mcu_spi_miso_list[j].bank_idx != mcu_spi_sck_list[i].bank_idx)
// continue;
// for (uint32_t k = 0; k < mosi_count; ++k) {
// if (mcu_spi_mosi_list[k].pin != mosi)
// continue;
// if (mcu_spi_mosi_list[k].bank_idx != mcu_spi_miso_list[j].bank_idx)
// continue;
// self->clock = &mcu_spi_sck_list[i];
// self->miso_pin = &mcu_spi_miso_list[j];
// self->mosi_pin = &mcu_spi_mosi_list[k];
// break;
// }
// }
// }
if (self->clock != NULL && (self->mosi != NULL || self->miso != NULL)) { if (self->clock != NULL && (self->mosi != NULL || self->miso != NULL)) {
self->spi = mcu_spi_banks[self->clock->bank_idx - 1]; self->spi = mcu_spi_banks[self->clock->bank_idx - 1];
} else { } else {