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py/emitnative: Fix bug with store of 16 and 32 values in viper ARM mode.

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This commit is contained in:
Damien George 2018-08-17 01:12:05 +10:00
parent 1ad44acb15
commit a0a29724c8
1 changed files with 2 additions and 5 deletions
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7
py/emitnative.c
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@ -1472,10 +1472,6 @@ STATIC void emit_native_store_subscr(emit_t *emit) {
} }
#endif #endif
ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1); ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1);
#if N_ARM
asm_arm_strh_reg_reg_reg(emit->as, reg_value, reg_base, reg_index);
return;
#endif
ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 2*index to base ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 2*index to base
reg_base = reg_index; reg_base = reg_index;
} }
@ -1492,11 +1488,12 @@ STATIC void emit_native_store_subscr(emit_t *emit) {
break; break;
} }
#endif #endif
ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2);
#if N_ARM #if N_ARM
ASM_MOV_REG_IMM(emit->as, reg_index, index_value);
asm_arm_str_reg_reg_reg(emit->as, reg_value, reg_base, reg_index); asm_arm_str_reg_reg_reg(emit->as, reg_value, reg_base, reg_index);
return; return;
#endif #endif
ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2);
ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base
reg_base = reg_index; reg_base = reg_index;
} }