stmhal: Add flash write support and flash storage driver.
This commit is contained in:
Damien George
parent
8a9a31e57b
commit
9e5ea4d768
@ -78,12 +78,12 @@ SRC_C = \
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exti.c \
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usrsw.c \
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rtc.c \
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flash.c \
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storage.c \
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sdcard.c \
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# lcd.c \
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# servo.c \
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# flash.c \
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# storage.c \
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# accel.c \
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# timer.c \
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# audio.c \
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@ -100,6 +100,8 @@ SRC_HAL = $(addprefix $(HAL_DIR)/src/,\
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stm32f4xx_hal.c \
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stm32f4xx_hal_cortex.c \
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stm32f4xx_hal_dma.c \
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stm32f4xx_hal_flash.c \
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stm32f4xx_hal_flash_ex.c \
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stm32f4xx_hal_gpio.c \
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stm32f4xx_hal_pcd.c \
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stm32f4xx_hal_rcc.c \
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89
stmhal/flash.c
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89
stmhal/flash.c
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@ -0,0 +1,89 @@
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#include <stm32f4xx_hal.h>
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#include "flash.h"
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/* Base address of the Flash sectors */
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#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */
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#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */
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#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */
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#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */
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#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */
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#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
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#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */
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static const uint32_t flash_info_table[26] = {
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ADDR_FLASH_SECTOR_0, FLASH_SECTOR_0,
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ADDR_FLASH_SECTOR_1, FLASH_SECTOR_1,
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ADDR_FLASH_SECTOR_2, FLASH_SECTOR_2,
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ADDR_FLASH_SECTOR_3, FLASH_SECTOR_3,
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ADDR_FLASH_SECTOR_4, FLASH_SECTOR_4,
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ADDR_FLASH_SECTOR_5, FLASH_SECTOR_5,
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ADDR_FLASH_SECTOR_6, FLASH_SECTOR_6,
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ADDR_FLASH_SECTOR_7, FLASH_SECTOR_7,
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ADDR_FLASH_SECTOR_8, FLASH_SECTOR_8,
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ADDR_FLASH_SECTOR_9, FLASH_SECTOR_9,
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ADDR_FLASH_SECTOR_10, FLASH_SECTOR_10,
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ADDR_FLASH_SECTOR_11, FLASH_SECTOR_11,
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ADDR_FLASH_SECTOR_11 + 0x20000, 0,
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};
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uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) {
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if (addr >= flash_info_table[0]) {
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for (int i = 0; i < 24; i += 2) {
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if (addr < flash_info_table[i + 2]) {
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if (start_addr != NULL) {
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*start_addr = flash_info_table[i];
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}
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if (size != NULL) {
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*size = flash_info_table[i + 2] - flash_info_table[i];
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}
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return flash_info_table[i + 1];
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}
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}
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}
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return 0;
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}
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void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) {
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// check there is something to write
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if (num_word32 == 0) {
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return;
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}
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// unlock
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HAL_FLASH_Unlock();
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// Clear pending flags (if any)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
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FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR);
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// erase the sector(s)
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FLASH_EraseInitTypeDef EraseInitStruct;
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EraseInitStruct.TypeErase = TYPEERASE_SECTORS;
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EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V
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EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL);
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EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1;
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uint32_t SectorError = 0;
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if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) {
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// error occurred during sector erase
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return;
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}
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// program the flash word by word
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for (int i = 0; i < num_word32; i++) {
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if (HAL_FLASH_Program(TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) {
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// error occurred during flash write
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return;
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}
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flash_dest += 4;
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src += 1;
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}
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// lock the flash
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HAL_FLASH_Lock();
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}
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2
stmhal/flash.h
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2
stmhal/flash.h
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@ -0,0 +1,2 @@
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uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size);
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void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32);
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@ -29,13 +29,13 @@
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#include "usrsw.h"
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#include "usb.h"
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#include "rtc.h"
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#include "storage.h"
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#include "sdcard.h"
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#if 0
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#include "ff.h"
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#include "lexerfatfs.h"
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#include "servo.h"
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#include "lcd.h"
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#include "storage.h"
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#include "accel.h"
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#include "timer.h"
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#include "pybwlan.h"
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@ -232,9 +232,7 @@ int main(void) {
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#if MICROPY_HW_HAS_SDCARD
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sdcard_init();
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#endif
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#if 0
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storage_init();
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#endif
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int first_soft_reset = true;
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177
stmhal/storage.c
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177
stmhal/storage.c
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@ -0,0 +1,177 @@
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#include <stdint.h>
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#include <string.h>
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#include <stm32f4xx_hal.h>
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#include "misc.h"
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#include "systick.h"
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#include "mpconfig.h"
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#include "qstr.h"
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#include "obj.h"
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#include "led.h"
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#include "flash.h"
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#include "storage.h"
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#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
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#define FLASH_PART1_START_BLOCK (0x100)
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#define FLASH_PART1_NUM_BLOCKS (224) // 16k+16k+16k+64k=112k
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#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
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static bool flash_is_initialised = false;
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static bool flash_cache_dirty;
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static uint32_t flash_cache_sector_id;
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static uint32_t flash_cache_sector_start;
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static uint32_t flash_cache_sector_size;
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static uint32_t flash_tick_counter_last_write;
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static void flash_cache_flush(void) {
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if (flash_cache_dirty) {
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// sync the cache RAM buffer by writing it to the flash page
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flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4);
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flash_cache_dirty = false;
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// indicate a clean cache with LED off
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led_state(PYB_LED_R1, 0);
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}
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}
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static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) {
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uint32_t flash_sector_start;
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uint32_t flash_sector_size;
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uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size);
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if (flash_cache_sector_id != flash_sector_id) {
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flash_cache_flush();
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memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size);
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flash_cache_sector_id = flash_sector_id;
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flash_cache_sector_start = flash_sector_start;
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flash_cache_sector_size = flash_sector_size;
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}
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flash_cache_dirty = true;
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// indicate a dirty cache with LED on
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led_state(PYB_LED_R1, 1);
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return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start;
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}
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static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) {
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uint32_t flash_sector_start;
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uint32_t flash_sector_size;
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uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size);
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if (flash_cache_sector_id == flash_sector_id) {
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// in cache, copy from there
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return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start;
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}
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// not in cache, copy straight from flash
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return (uint8_t*)flash_addr;
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}
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void storage_init(void) {
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if (!flash_is_initialised) {
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flash_cache_dirty = false;
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flash_cache_sector_id = 0;
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flash_is_initialised = true;
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flash_tick_counter_last_write = 0;
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}
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}
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uint32_t storage_get_block_size(void) {
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return FLASH_BLOCK_SIZE;
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}
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uint32_t storage_get_block_count(void) {
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return FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS;
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}
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bool storage_needs_flush(void) {
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// wait 2 seconds after last write to flush
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return flash_cache_dirty && sys_tick_has_passed(flash_tick_counter_last_write, 2000);
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}
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void storage_flush(void) {
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flash_cache_flush();
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}
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static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) {
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buf[0] = boot;
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if (num_blocks == 0) {
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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} else {
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buf[1] = 0xff;
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buf[2] = 0xff;
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buf[3] = 0xff;
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}
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buf[4] = type;
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if (num_blocks == 0) {
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buf[5] = 0;
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buf[6] = 0;
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buf[7] = 0;
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} else {
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buf[5] = 0xff;
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buf[6] = 0xff;
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buf[7] = 0xff;
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}
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buf[8] = start_block;
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buf[9] = start_block >> 8;
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buf[10] = start_block >> 16;
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buf[11] = start_block >> 24;
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buf[12] = num_blocks;
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buf[13] = num_blocks >> 8;
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buf[14] = num_blocks >> 16;
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buf[15] = num_blocks >> 24;
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}
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bool storage_read_block(uint8_t *dest, uint32_t block) {
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//printf("RD %u\n", block);
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if (block == 0) {
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// fake the MBR so we can decide on our own partition table
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for (int i = 0; i < 446; i++) {
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dest[i] = 0;
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}
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build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, FLASH_PART1_NUM_BLOCKS);
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build_partition(dest + 462, 0, 0, 0, 0);
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build_partition(dest + 478, 0, 0, 0, 0);
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build_partition(dest + 494, 0, 0, 0, 0);
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dest[510] = 0x55;
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dest[511] = 0xaa;
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return true;
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} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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// non-MBR block, get data from flash memory, possibly via cache
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uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
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uint8_t *src = flash_cache_get_addr_for_read(flash_addr);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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return true;
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} else {
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// bad block number
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return false;
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}
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}
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bool storage_write_block(const uint8_t *src, uint32_t block) {
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//printf("WR %u\n", block);
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if (block == 0) {
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// can't write MBR, but pretend we did
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return true;
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} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
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// non-MBR block, copy to cache
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uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
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uint8_t *dest = flash_cache_get_addr_for_write(flash_addr);
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memcpy(dest, src, FLASH_BLOCK_SIZE);
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flash_tick_counter_last_write = HAL_GetTick();
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return true;
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} else {
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// bad block number
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return false;
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}
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}
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9
stmhal/storage.h
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9
stmhal/storage.h
Normal file
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#define FLASH_BLOCK_SIZE (512)
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void storage_init(void);
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uint32_t storage_get_block_size(void);
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uint32_t storage_get_block_count(void);
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bool storage_needs_flush(void);
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void storage_flush(void);
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bool storage_read_block(uint8_t *dest, uint32_t block);
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bool storage_write_block(const uint8_t *src, uint32_t block);
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