diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index cb65a9cd63..95b5379d59 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -209,6 +209,7 @@ jobs: - "clue_nrf52840_express" - "cp32-m4" - "cp_sapling_m0" + - "cp_sapling_m0_revb" - "cp_sapling_m0_spiflash" - "datalore_ip_m4" - "datum_distance" diff --git a/devices/ble_hci/common-hal/_bleio/PacketBuffer.c b/devices/ble_hci/common-hal/_bleio/PacketBuffer.c index cb14f4044b..a282cdce46 100644 --- a/devices/ble_hci/common-hal/_bleio/PacketBuffer.c +++ b/devices/ble_hci/common-hal/_bleio/PacketBuffer.c @@ -245,8 +245,8 @@ mp_int_t common_hal_bleio_packet_buffer_get_outgoing_packet_length(bleio_packet_ bleio_connection_internal_t *connection = bleio_conn_handle_to_connection(self->conn_handle); if (connection) { return MIN(MIN(common_hal_bleio_connection_get_max_packet_length(connection), - self->max_packet_size), - self->characteristic->max_length); + self->max_packet_size), + self->characteristic->max_length); } } // There's no current connection, so we don't know the MTU, and diff --git a/docs/design_guide.rst b/docs/design_guide.rst index 1bac4df61b..04a2cc874f 100644 --- a/docs/design_guide.rst +++ b/docs/design_guide.rst @@ -238,11 +238,34 @@ Module description After the license comment:: """ - `` - + `` ================================================= - + + + + * Author(s): + + Implementation Notes + -------------------- + + + **Hardware:** + + * Adafruit `Device Description + `_ (Product ID: ) + + **Software and Dependencies:** + + * Adafruit CircuitPython firmware for the supported boards: + https://circuitpython.org/downloads + * Adafruit's Bus Device library: + https://github.com/adafruit/Adafruit_CircuitPython_BusDevice + * Adafruit's Register library: + https://github.com/adafruit/Adafruit_CircuitPython_Register + """ + Class description ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -269,6 +292,58 @@ Renders as: :param ~busio.I2C i2c_bus: The I2C bus the DS3231 is connected to. :param int address: The I2C address of the device. Defaults to :const:`0x40` + +Documenting Parameters +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Although there are different ways to document class and functions definitions in Python, +the following is the prevalent method of documenting parameters +for CircuitPython libraries. When documenting class parameters you should use the +following structure: + +.. code-block:: sh + + :param param_type param_name: Parameter_description + + +param_type +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +The type of the parameter. This could be among other `int`, `float`, `str` `bool`, etc. +To document an object in the CircuitPython domain, you need to include a ``~`` before the +definition as shown in the following example: + +.. code-block:: sh + + :param ~busio.I2C i2c_bus: The I2C bus the DS3231 is connected to. + + +To include references to CircuitPython modules, cookiecutter creates an entry in the +intersphinx_mapping section in the ``conf.py`` file located within the ``docs`` directory. +To add different types outside CircuitPython you need to include them in the intersphinx_mapping:: + + + intersphinx_mapping = { + "python": ("https://docs.python.org/3.4", None), + "BusDevice":("https://circuitpython.readthedocs.io/projects/busdevice/en/latest/", None,), + "CircuitPython": ("https://circuitpython.readthedocs.io/en/latest/", None), + } + +The intersphinx_mapping above includes references to Python, BusDevice and CircuitPython +Documentation + + +param_name +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Parameter name used in the class or method definition + + +Parameter_description +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Parameter description. When the parameter defaults to a particular value, it is good +practice to include the default:: + + :param int pitch: Pitch value for the servo. Defaults to :const:`4500` + + Attributes ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -383,6 +458,14 @@ Renders as: :param float degrees: Degrees to turn right +Documentation References to other Libraries +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +When you need to make references to documentation in other libraries you should refer the class using single +backticks ``:class:`~adafruit_motor.servo.Servo```. You must also add the reference in the ``conf.py`` file in the +``intersphinx_mapping section`` by adding a new entry:: + + "adafruit_motor": ("https://circuitpython.readthedocs.io/projects/motor/en/latest/", None,), + Use BusDevice -------------------------------------------------------------------------------- diff --git a/locale/ID.po b/locale/ID.po index 9507fb0b22..ac07d1544d 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -6,7 +6,7 @@ msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-01-04 12:55-0600\n" -"PO-Revision-Date: 2021-04-07 12:23+0000\n" +"PO-Revision-Date: 2021-04-28 16:11+0000\n" "Last-Translator: Reza Almanda \n" "Language-Team: LANGUAGE \n" "Language: ID\n" @@ -14,7 +14,7 @@ msgstr "" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=1; plural=0;\n" -"X-Generator: Weblate 4.6-dev\n" +"X-Generator: Weblate 4.7-dev\n" #: main.c msgid "" @@ -698,6 +698,7 @@ msgstr "" "digunakan" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1307,7 +1308,8 @@ msgstr "Fase tidak valid" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Pin tidak valid" @@ -1662,11 +1664,11 @@ msgstr "Hanya 8 atau 16 bit mono dengan " #: ports/esp32s2/common-hal/wifi/__init__.c msgid "Only IPv4 addresses supported" -msgstr "" +msgstr "Hanya alamat IPv4 yang didukung" #: ports/esp32s2/common-hal/socketpool/SocketPool.c msgid "Only IPv4 sockets supported" -msgstr "" +msgstr "Hanysa socket IPv4 yang didukung" #: shared-module/displayio/OnDiskBitmap.c #, c-format @@ -1690,6 +1692,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" @@ -1707,15 +1710,15 @@ msgstr "" #: ports/esp32s2/bindings/espidf/__init__.c ports/esp32s2/esp_error.c msgid "Operation timed out" -msgstr "" +msgstr "Waktu habis" #: ports/esp32s2/bindings/espidf/__init__.c ports/esp32s2/esp_error.c msgid "Out of memory" -msgstr "" +msgstr "Kehabisan memori" #: ports/esp32s2/common-hal/socketpool/SocketPool.c msgid "Out of sockets" -msgstr "" +msgstr "Kehabisan socket" #: ports/raspberrypi/bindings/rp2pio/StateMachine.c msgid "Out-buffer elements must be <= 4 bytes long" @@ -1761,7 +1764,7 @@ msgstr "ParallelBus belum didukung" #: ports/esp32s2/common-hal/audiobusio/__init__.c msgid "Peripheral in use" -msgstr "" +msgstr "Periferal sedang digunakan" #: py/moduerrno.c msgid "Permission denied" @@ -1773,7 +1776,7 @@ msgstr "" #: ports/raspberrypi/common-hal/rp2pio/StateMachine.c msgid "Pin count too large" -msgstr "" +msgstr "Jumlah pin terlalu besar" #: ports/atmel-samd/common-hal/analogio/AnalogIn.c #: ports/cxd56/common-hal/analogio/AnalogIn.c @@ -1815,7 +1818,7 @@ msgstr "" #: ports/raspberrypi/common-hal/rotaryio/IncrementalEncoder.c msgid "Pins must be sequential" -msgstr "" +msgstr "Pin harus berurutan" #: ports/raspberrypi/common-hal/audiopwmio/PWMAudioOut.c msgid "Pins must share PWM slice" @@ -4239,11 +4242,11 @@ msgstr "" #: ports/esp32s2/common-hal/wifi/Radio.c msgid "wifi is not enabled" -msgstr "" +msgstr "wifi tidak diaktifkan" #: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" -msgstr "" +msgstr "jendela harus <= interval" #: extmod/ulab/code/numpy/numerical/numerical.c msgid "wrong axis index" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 975197391c..e115bab770 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -681,6 +681,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1285,7 +1286,8 @@ msgstr "" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "" @@ -1663,6 +1665,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/cs.po b/locale/cs.po index dab2eb901a..5c1d1d77ba 100644 --- a/locale/cs.po +++ b/locale/cs.po @@ -684,6 +684,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1288,7 +1289,8 @@ msgstr "" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "" @@ -1666,6 +1668,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po index d8d3727bb6..e71d79d94f 100644 --- a/locale/de_DE.po +++ b/locale/de_DE.po @@ -694,6 +694,7 @@ msgstr "" "Die Frequenz eines bereits verwendeten Timers kann nicht variiert werden" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "Kann nicht auf Flanke wecken, nur auf Level." @@ -1308,7 +1309,8 @@ msgstr "Ungültige Phase" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Ungültiger Pin" @@ -1693,6 +1695,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/el.po b/locale/el.po index c2a73c577a..de02ad0ca2 100644 --- a/locale/el.po +++ b/locale/el.po @@ -681,6 +681,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1285,7 +1286,8 @@ msgstr "" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "" @@ -1663,6 +1665,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/en_GB.po b/locale/en_GB.po index 2f1b10a1f3..d8ddf8f91f 100644 --- a/locale/en_GB.po +++ b/locale/en_GB.po @@ -692,6 +692,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Cannot vary frequency on a timer that is already in use" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "Cannot wake on pin edge. Only level." @@ -1302,7 +1303,8 @@ msgstr "Invalid phase" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Invalid pin" @@ -1684,6 +1686,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "Only one TouchAlarm can be set in deep sleep." #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "Only one alarm.time alarm can be set." diff --git a/locale/es.po b/locale/es.po index 3dfe2adc7b..61ec78ce0f 100644 --- a/locale/es.po +++ b/locale/es.po @@ -8,7 +8,7 @@ msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-01-04 12:55-0600\n" -"PO-Revision-Date: 2021-04-25 18:43+0000\n" +"PO-Revision-Date: 2021-04-28 16:11+0000\n" "Last-Translator: Alvaro Figueroa \n" "Language-Team: \n" "Language: es\n" @@ -701,6 +701,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "No puede variar la frecuencia en un temporizador que ya está en uso" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "No puede despertar en pin edge, solo en nivel." @@ -1319,7 +1320,8 @@ msgstr "Fase inválida" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Pin inválido" @@ -1707,6 +1709,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "Solamente una TouchAlarm puede ser configurada durante deep sleep." #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "Solamente una alarm.time puede ser configurada." @@ -3164,11 +3167,11 @@ msgstr "identificador redefinido como nonlocal" #: py/persistentcode.c msgid "incompatible .mpy file" -msgstr "" +msgstr "archivo .mpy incompatible" #: py/persistentcode.c msgid "incompatible native .mpy architecture" -msgstr "" +msgstr "arquitectura nativa de .mpy incompatible" #: py/objstr.c msgid "incomplete format" @@ -3291,7 +3294,7 @@ msgstr "el intervalo debe ser der rango %s-%s" #: py/compile.c msgid "invalid architecture" -msgstr "" +msgstr "arquitectura inválida" #: lib/netutils/netutils.c msgid "invalid arguments" diff --git a/locale/fil.po b/locale/fil.po index f5727a9da3..511b273934 100644 --- a/locale/fil.po +++ b/locale/fil.po @@ -688,6 +688,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1300,7 +1301,8 @@ msgstr "Mali ang phase" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Mali ang pin" @@ -1681,6 +1683,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/fr.po b/locale/fr.po index 4b314c155d..fee1a85a25 100644 --- a/locale/fr.po +++ b/locale/fr.po @@ -8,7 +8,7 @@ msgstr "" "Project-Id-Version: 0.1\n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-01-04 12:55-0600\n" -"PO-Revision-Date: 2021-04-24 14:29+0000\n" +"PO-Revision-Date: 2021-04-28 16:11+0000\n" "Last-Translator: Hugo Dahl \n" "Language: fr\n" "MIME-Version: 1.0\n" @@ -707,6 +707,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Impossible de faire varier la fréquence sur un minuteur déjà utilisée" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "Ne peut reveillé sur le board de broche. Seuleument à niveau." @@ -1331,7 +1332,8 @@ msgstr "Phase invalide" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Broche invalide" @@ -1717,6 +1719,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "Seulement une TouchAlarm peu être réglée en someil profond." #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "Seulement une alarme alarm.time peut être réglée." @@ -3187,11 +3190,11 @@ msgstr "identifiant redéfini comme nonlocal" #: py/persistentcode.c msgid "incompatible .mpy file" -msgstr "" +msgstr "Fichier .mpy incompatible" #: py/persistentcode.c msgid "incompatible native .mpy architecture" -msgstr "" +msgstr "architecture native .mpy incompatible" #: py/objstr.c msgid "incomplete format" @@ -3315,7 +3318,7 @@ msgstr "interval doit être dans la portée %s-%s" #: py/compile.c msgid "invalid architecture" -msgstr "" +msgstr "architecture invalide" #: lib/netutils/netutils.c msgid "invalid arguments" diff --git a/locale/hi.po b/locale/hi.po index 4d23454770..4a4539ba2c 100644 --- a/locale/hi.po +++ b/locale/hi.po @@ -681,6 +681,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1285,7 +1286,8 @@ msgstr "" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "" @@ -1663,6 +1665,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/it_IT.po b/locale/it_IT.po index e39ad7594f..f641552686 100644 --- a/locale/it_IT.po +++ b/locale/it_IT.po @@ -698,6 +698,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1311,7 +1312,8 @@ msgstr "Fase non valida" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Pin non valido" @@ -1695,6 +1697,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/ja.po b/locale/ja.po index 5df538a05d..c057a9d8a7 100644 --- a/locale/ja.po +++ b/locale/ja.po @@ -690,6 +690,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "使用中のタイマー上では周波数を変えられません" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1298,7 +1299,8 @@ msgstr "不正なphase" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "不正なピン" @@ -1678,6 +1680,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/ko.po b/locale/ko.po index 06edd419c2..5add85aed8 100644 --- a/locale/ko.po +++ b/locale/ko.po @@ -684,6 +684,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1288,7 +1289,8 @@ msgstr "단계가 잘못되었습니다" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "핀이 잘못되었습니다" @@ -1666,6 +1668,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/nl.po b/locale/nl.po index 57ff2337b8..3a450d2112 100644 --- a/locale/nl.po +++ b/locale/nl.po @@ -688,6 +688,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Kan de frequentie van een timer die al in gebruik is niet variëren" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1299,7 +1300,8 @@ msgstr "Ongeldige fase" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Ongeldige pin" @@ -1683,6 +1685,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "Slechts één alarm.time alarm kan worden ingesteld." diff --git a/locale/pl.po b/locale/pl.po index 984ed10275..1062baf66a 100644 --- a/locale/pl.po +++ b/locale/pl.po @@ -688,6 +688,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Nie można zmieniać częstotliwości timera, który jest już używany" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "" @@ -1298,7 +1299,8 @@ msgstr "Zła faza" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Zła nóżka" @@ -1676,6 +1678,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "" #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "" diff --git a/locale/pt_BR.po b/locale/pt_BR.po index cfe04562a0..afde2984c1 100644 --- a/locale/pt_BR.po +++ b/locale/pt_BR.po @@ -6,7 +6,7 @@ msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-01-04 12:55-0600\n" -"PO-Revision-Date: 2021-04-25 18:43+0000\n" +"PO-Revision-Date: 2021-04-28 16:11+0000\n" "Last-Translator: Wellington Terumi Uemura \n" "Language-Team: \n" "Language: pt_BR\n" @@ -705,6 +705,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Não é possível variar a frequência em um timer que já esteja em uso" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "Não é possível acordar (wake) no pino edge. Nível apenas." @@ -1322,7 +1323,8 @@ msgstr "Fase Inválida" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Pino inválido" @@ -1707,6 +1709,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "Apenas um TouchAlarm pode ser colocado em deep sleep." #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "Apenas um alarme alarm.time pode ser definido." @@ -3173,11 +3176,11 @@ msgstr "o identificador foi redefinido como não-local" #: py/persistentcode.c msgid "incompatible .mpy file" -msgstr "" +msgstr "arquivo .mpy incompatível" #: py/persistentcode.c msgid "incompatible native .mpy architecture" -msgstr "" +msgstr "arquivo .mpy com arquitetura nativa incompatível" #: py/objstr.c msgid "incomplete format" @@ -3301,7 +3304,7 @@ msgstr "o intervalo deve estar entre %s-%s" #: py/compile.c msgid "invalid architecture" -msgstr "" +msgstr "arquitetura inválida" #: lib/netutils/netutils.c msgid "invalid arguments" diff --git a/locale/sv.po b/locale/sv.po index afa32f410a..0423871517 100644 --- a/locale/sv.po +++ b/locale/sv.po @@ -6,7 +6,7 @@ msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-01-04 12:55-0600\n" -"PO-Revision-Date: 2021-04-24 14:29+0000\n" +"PO-Revision-Date: 2021-04-28 16:11+0000\n" "Last-Translator: Jonny Bergdahl \n" "Language-Team: LANGUAGE \n" "Language: sv\n" @@ -694,6 +694,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Det går inte att ändra frekvensen på en timer som redan används" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "Kan inte vakna på nivåskift, enbart nivå." @@ -1306,7 +1307,8 @@ msgstr "Ogiltig fas" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Ogiltig pinne" @@ -1690,6 +1692,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "Endast ett TouchAlarm kan ställas in för djupsömn." #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "Endast ett alarm.time kan ställas in." @@ -3139,11 +3142,11 @@ msgstr "identifieraren omdefinierad som icke-lokal" #: py/persistentcode.c msgid "incompatible .mpy file" -msgstr "" +msgstr "inkompatibel .mpy-fil" #: py/persistentcode.c msgid "incompatible native .mpy architecture" -msgstr "" +msgstr "inkompatibel nativ .mpy-arkitektur" #: py/objstr.c msgid "incomplete format" @@ -3266,7 +3269,7 @@ msgstr "interval måste vara i intervallet %s-%s" #: py/compile.c msgid "invalid architecture" -msgstr "" +msgstr "ogiltig arkitektur" #: lib/netutils/netutils.c msgid "invalid arguments" diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po index 49bf62a3a6..7c7db58dcd 100644 --- a/locale/zh_Latn_pinyin.po +++ b/locale/zh_Latn_pinyin.po @@ -695,6 +695,7 @@ msgid "Cannot vary frequency on a timer that is already in use" msgstr "Wúfǎ gēnggǎi yǐ zài shǐyòng de jìshí qì shàng de pínlǜ" #: ports/esp32s2/common-hal/alarm/pin/PinAlarm.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c msgid "Cannot wake on pin edge. Only level." msgstr "wú fǎ zài yǐn jiǎo biān yuán huàn xǐng. jǐn jí bié." @@ -1308,7 +1309,8 @@ msgstr "Jiēduàn wúxiào" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c #: ports/esp32s2/common-hal/alarm/touch/TouchAlarm.c -#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c +#: ports/nrf/common-hal/alarm/pin/PinAlarm.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "Wúxiào de yǐn jiǎo" @@ -1692,6 +1694,7 @@ msgid "Only one TouchAlarm can be set in deep sleep." msgstr "zhǐ yǒu yí gè chù mō bì kě yǐ shè zhì zài shēn dù shuì mián." #: ports/esp32s2/common-hal/alarm/time/TimeAlarm.c +#: ports/nrf/common-hal/alarm/time/TimeAlarm.c msgid "Only one alarm.time alarm can be set." msgstr "zhǐ néng shè zhì yí gè bào jǐng." diff --git a/main.c b/main.c index c30c2f960d..cd80ad0fa6 100755 --- a/main.c +++ b/main.c @@ -427,6 +427,7 @@ STATIC bool run_code_py(safe_mode_t safe_mode) { // it may also return due to another interrupt, that's why we check // for deep sleep alarms above. If it wasn't a deep sleep alarm, // then we'll idle here again. + #if CIRCUITPY_ALARM common_hal_alarm_pretending_deep_sleep(); #else diff --git a/mpy-cross/main.c b/mpy-cross/main.c index 786f0635e3..f2b5c5090c 100644 --- a/mpy-cross/main.c +++ b/mpy-cross/main.c @@ -76,22 +76,22 @@ STATIC int compile_and_save(const char *file, const char *output_file, const cha STATIC int usage(char **argv) { printf( -"usage: %s [] [-X ] \n" -"Options:\n" -"--version : show version information\n" -"-o : output file for compiled bytecode (defaults to input with .mpy extension)\n" -"-s : source filename to embed in the compiled bytecode (defaults to input file)\n" -"-v : verbose (trace various operations); can be multiple\n" -"-O[N] : apply bytecode optimizations of level N\n" -"\n" -"Target specific options:\n" -"-msmall-int-bits=number : set the maximum bits used to encode a small-int\n" -"-mno-unicode : don't support unicode in compiled strings\n" -"-mcache-lookup-bc : cache map lookups in the bytecode\n" -"-march= : set architecture for native emitter; x86, x64, armv6, armv7m, xtensa\n" -"\n" -"Implementation specific options:\n", argv[0] -); + "usage: %s [] [-X ] \n" + "Options:\n" + "--version : show version information\n" + "-o : output file for compiled bytecode (defaults to input with .mpy extension)\n" + "-s : source filename to embed in the compiled bytecode (defaults to input file)\n" + "-v : verbose (trace various operations); can be multiple\n" + "-O[N] : apply bytecode optimizations of level N\n" + "\n" + "Target specific options:\n" + "-msmall-int-bits=number : set the maximum bits used to encode a small-int\n" + "-mno-unicode : don't support unicode in compiled strings\n" + "-mcache-lookup-bc : cache map lookups in the bytecode\n" + "-march= : set architecture for native emitter; x86, x64, armv6, armv7m, xtensa\n" + "\n" + "Implementation specific options:\n", argv[0] + ); int impl_opts_cnt = 0; printf( " emit={bytecode,native,viper} -- set the default code emitter\n" diff --git a/ports/atmel-samd/boards/adafruit_slide_trinkey_m0/pins.c b/ports/atmel-samd/boards/adafruit_slide_trinkey_m0/pins.c index c48c69206a..238610ddc2 100644 --- a/ports/atmel-samd/boards/adafruit_slide_trinkey_m0/pins.c +++ b/ports/atmel-samd/boards/adafruit_slide_trinkey_m0/pins.c @@ -1,7 +1,7 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - //{ MP_ROM_QSTR(MP_QSTR_TOUCH), MP_ROM_PTR(&pin_PA07) }, + // { MP_ROM_QSTR(MP_QSTR_TOUCH), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_POTENTIOMETER), MP_ROM_PTR(&pin_PA07) }, }; diff --git a/ports/atmel-samd/boards/cp_sapling_m0_revb/board.c b/ports/atmel-samd/boards/cp_sapling_m0_revb/board.c new file mode 100644 index 0000000000..cde441b3d9 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_revb/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/cp_sapling_m0_revb/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0_revb/mpconfigboard.h new file mode 100644 index 0000000000..2299f69998 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_revb/mpconfigboard.h @@ -0,0 +1,55 @@ +#define MICROPY_HW_BOARD_NAME "CP Sapling M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA15) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA23 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SS (&pin_PA22) +#define DEFAULT_SPI_BUS_SCK (&pin_PA19) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) +#define DEFAULT_SPI_BUS_MISO (&pin_PA17) + +#define DEFAULT_UART_BUS_RX (&pin_PA00) +#define DEFAULT_UART_BUX_TX (&pin_PA01) diff --git a/ports/atmel-samd/boards/cp_sapling_m0_revb/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0_revb/mpconfigboard.mk new file mode 100644 index 0000000000..173327a3af --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_revb/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x1209 +USB_PID = 0x4DDF +USB_PRODUCT = "CP Sapling Rev B" +USB_MANUFACTURER = "Oak Development Technologies" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_FULL_BUILD = 0 + +SUPEROPT_GC = 0 +SUPEROPT_VM = 0 diff --git a/ports/atmel-samd/boards/cp_sapling_m0_revb/pins.c b/ports/atmel-samd/boards/cp_sapling_m0_revb/pins.c new file mode 100644 index 0000000000..b88b6869ef --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_revb/pins.c @@ -0,0 +1,54 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, + + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA00) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_uart), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h index 27ea6c72ba..a5c81feaae 100644 --- a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h @@ -27,6 +27,17 @@ #define DEFAULT_UART_BUS_RX (&pin_PA11) #define DEFAULT_UART_BUS_TX (&pin_PA10) +// Other some pins that do not appear in the pinout & are not used internally +// this list is not (yet) exhaustive +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB12 1 + // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/snekboard/mpconfigboard.h b/ports/atmel-samd/boards/snekboard/mpconfigboard.h index bea90a0fae..0c9f274c06 100644 --- a/ports/atmel-samd/boards/snekboard/mpconfigboard.h +++ b/ports/atmel-samd/boards/snekboard/mpconfigboard.h @@ -23,6 +23,21 @@ #define DEFAULT_UART_BUS_RX (&pin_PB08) /* ANALOG 1 */ #define DEFAULT_UART_BUS_TX (&pin_PB09) /* ANALOG 2 */ +// Other some pins that do not appear in the pinout & are not used internally +// this list is not (yet) exhaustive +#define IGNORE_PIN_PA01 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB00 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB12 1 + // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/common-hal/audioio/AudioOut.c b/ports/atmel-samd/common-hal/audioio/AudioOut.c index 34b718dca8..5c1a02634b 100644 --- a/ports/atmel-samd/common-hal/audioio/AudioOut.c +++ b/ports/atmel-samd/common-hal/audioio/AudioOut.c @@ -57,7 +57,7 @@ #ifdef SAMD21 static void ramp_value(uint16_t start, uint16_t end) { start = DAC->DATA.reg; - int32_t diff = (int32_t) end - start; + int32_t diff = (int32_t)end - start; int32_t step = 49; int32_t steps = diff / step; if (diff < 0) { @@ -76,7 +76,7 @@ static void ramp_value(uint16_t start, uint16_t end) { #ifdef SAM_D5X_E5X static void ramp_value(uint16_t start, uint16_t end) { - int32_t diff = (int32_t) end - start; + int32_t diff = (int32_t)end - start; int32_t step = 49; int32_t steps = diff / step; if (diff < 0) { @@ -102,10 +102,12 @@ void audioout_reset(void) { return; #endif #ifdef SAMD21 - while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {} + while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) { + } #endif #ifdef SAM_D5X_E5X - while (DAC->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) {} + while (DAC->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) { + } #endif if (DAC->CTRLA.bit.ENABLE) { ramp_value(0x8000, 0); @@ -116,8 +118,8 @@ void audioout_reset(void) { } // Caller validates that pins are free. -void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, - const mcu_pin_obj_t* left_channel, const mcu_pin_obj_t* right_channel, uint16_t quiescent_value) { +void common_hal_audioio_audioout_construct(audioio_audioout_obj_t *self, + const mcu_pin_obj_t *left_channel, const mcu_pin_obj_t *right_channel, uint16_t quiescent_value) { #ifdef SAM_D5X_E5X bool dac_clock_enabled = hri_mclk_get_APBDMASK_DAC_bit(MCLK); #endif @@ -174,7 +176,8 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, _gclk_enable_channel(DAC_GCLK_ID, CONF_GCLK_DAC_SRC); DAC->CTRLA.bit.SWRST = 1; - while (DAC->CTRLA.bit.SWRST == 1) {} + while (DAC->CTRLA.bit.SWRST == 1) { + } // Make sure there are no outstanding access errors. (Reading DATA can cause this.) #ifdef SAM_D5X_E5X PAC->INTFLAGD.reg = PAC_INTFLAGD_DAC; @@ -191,15 +194,15 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI; // We disable the voltage pump because we always run at 3.3v. DAC->CTRLB.reg = DAC_CTRLB_REFSEL_AVCC | - DAC_CTRLB_LEFTADJ | - DAC_CTRLB_EOEN | - DAC_CTRLB_VPD; + DAC_CTRLB_LEFTADJ | + DAC_CTRLB_EOEN | + DAC_CTRLB_VPD; #endif #ifdef SAM_D5X_E5X DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI0; DAC->DACCTRL[0].reg = DAC_DACCTRL_CCTRL_CC12M | - DAC_DACCTRL_ENABLE | - DAC_DACCTRL_LEFTADJ; + DAC_DACCTRL_ENABLE | + DAC_DACCTRL_LEFTADJ; DAC->CTRLB.reg = DAC_CTRLB_REFSEL_VREFPU; #endif } @@ -207,8 +210,8 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, if (channel1_enabled) { DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI1; DAC->DACCTRL[1].reg = DAC_DACCTRL_CCTRL_CC12M | - DAC_DACCTRL_ENABLE | - DAC_DACCTRL_LEFTADJ; + DAC_DACCTRL_ENABLE | + DAC_DACCTRL_LEFTADJ; DAC->CTRLB.reg = DAC_CTRLB_REFSEL_VREFPU; } #endif @@ -216,12 +219,16 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, // Re-enable the DAC DAC->CTRLA.bit.ENABLE = 1; #ifdef SAMD21 - while (DAC->STATUS.bit.SYNCBUSY == 1) {} + while (DAC->STATUS.bit.SYNCBUSY == 1) { + } #endif #ifdef SAM_D5X_E5X - while (DAC->SYNCBUSY.bit.ENABLE == 1) {} - while (channel0_enabled && DAC->STATUS.bit.READY0 == 0) {} - while (channel1_enabled && DAC->STATUS.bit.READY1 == 0) {} + while (DAC->SYNCBUSY.bit.ENABLE == 1) { + } + while (channel0_enabled && DAC->STATUS.bit.READY0 == 0) { + } + while (channel1_enabled && DAC->STATUS.bit.READY1 == 0) { + } #endif // Use a timer to coordinate when DAC conversions occur. @@ -302,11 +309,11 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, // Leave the DMA setup to playback. } -bool common_hal_audioio_audioout_deinited(audioio_audioout_obj_t* self) { +bool common_hal_audioio_audioout_deinited(audioio_audioout_obj_t *self) { return self->left_channel == NULL; } -void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { +void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t *self) { if (common_hal_audioio_audioout_deinited(self)) { return; } @@ -320,10 +327,12 @@ void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { DAC->CTRLA.bit.ENABLE = 0; #ifdef SAMD21 - while (DAC->STATUS.bit.SYNCBUSY == 1) {} + while (DAC->STATUS.bit.SYNCBUSY == 1) { + } #endif #ifdef SAM_D5X_E5X - while (DAC->SYNCBUSY.bit.ENABLE == 1) {} + while (DAC->SYNCBUSY.bit.ENABLE == 1) { + } #endif disable_event_channel(self->tc_to_dac_event_channel); @@ -338,7 +347,7 @@ void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { #endif } -static void set_timer_frequency(Tc* timer, uint32_t frequency) { +static void set_timer_frequency(Tc *timer, uint32_t frequency) { uint32_t system_clock = 48000000; uint32_t new_top; uint8_t new_divisor; @@ -359,8 +368,8 @@ static void set_timer_frequency(Tc* timer, uint32_t frequency) { tc_wait_for_sync(timer); } -void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, - mp_obj_t sample, bool loop) { +void common_hal_audioio_audioout_play(audioio_audioout_obj_t *self, + mp_obj_t sample, bool loop) { if (common_hal_audioio_audioout_get_playing(self)) { common_hal_audioio_audioout_stop(self); } @@ -377,40 +386,40 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, } #ifdef SAMD21 result = audio_dma_setup_playback(&self->left_dma, sample, loop, true, 0, - false /* output unsigned */, - (uint32_t) &DAC->DATABUF.reg, - DAC_DMAC_ID_EMPTY); + false /* output unsigned */, + (uint32_t)&DAC->DATABUF.reg, + DAC_DMAC_ID_EMPTY); #endif #ifdef SAM_D5X_E5X - uint32_t left_channel_reg = (uint32_t) &DAC->DATABUF[0].reg; + uint32_t left_channel_reg = (uint32_t)&DAC->DATABUF[0].reg; uint8_t tc_trig_id = TC0_DMAC_ID_OVF + 3 * self->tc_index; uint8_t left_channel_trigger = tc_trig_id; uint32_t right_channel_reg = 0; uint8_t right_channel_trigger = tc_trig_id; if (self->left_channel == &pin_PA05) { - left_channel_reg = (uint32_t) &DAC->DATABUF[1].reg; + left_channel_reg = (uint32_t)&DAC->DATABUF[1].reg; } else if (self->right_channel == &pin_PA05) { - right_channel_reg = (uint32_t) &DAC->DATABUF[1].reg; + right_channel_reg = (uint32_t)&DAC->DATABUF[1].reg; } if (self->right_channel == &pin_PA02) { - right_channel_reg = (uint32_t) &DAC->DATABUF[0].reg; + right_channel_reg = (uint32_t)&DAC->DATABUF[0].reg; } - if(right_channel_reg == left_channel_reg + 2 && audiosample_bits_per_sample(sample) == 16) { + if (right_channel_reg == left_channel_reg + 2 && audiosample_bits_per_sample(sample) == 16) { result = audio_dma_setup_playback(&self->left_dma, sample, loop, false, 0, - false /* output unsigned */, - left_channel_reg, - left_channel_trigger); + false /* output unsigned */, + left_channel_reg, + left_channel_trigger); } else { result = audio_dma_setup_playback(&self->left_dma, sample, loop, true, 0, - false /* output unsigned */, - left_channel_reg, - left_channel_trigger); + false /* output unsigned */, + left_channel_reg, + left_channel_trigger); if (right_channel_reg != 0 && result == AUDIO_DMA_OK) { result = audio_dma_setup_playback(&self->right_dma, sample, loop, true, 1, - false /* output unsigned */, - right_channel_reg, - right_channel_trigger); + false /* output unsigned */, + right_channel_reg, + right_channel_trigger); } } #endif @@ -425,21 +434,22 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, mp_raise_RuntimeError(translate("Unable to allocate buffers for signed conversion")); } } - Tc* timer = tc_insts[self->tc_index]; + Tc *timer = tc_insts[self->tc_index]; set_timer_frequency(timer, audiosample_sample_rate(sample)); timer->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; - while (timer->COUNT16.STATUS.bit.STOP == 1) {} + while (timer->COUNT16.STATUS.bit.STOP == 1) { + } self->playing = true; } -void common_hal_audioio_audioout_pause(audioio_audioout_obj_t* self) { +void common_hal_audioio_audioout_pause(audioio_audioout_obj_t *self) { audio_dma_pause(&self->left_dma); #ifdef SAM_D5X_E5X audio_dma_pause(&self->right_dma); #endif } -void common_hal_audioio_audioout_resume(audioio_audioout_obj_t* self) { +void common_hal_audioio_audioout_resume(audioio_audioout_obj_t *self) { // Clear any overrun/underrun errors #ifdef SAMD21 DAC->INTFLAG.reg = DAC_INTFLAG_UNDERRUN; @@ -454,12 +464,12 @@ void common_hal_audioio_audioout_resume(audioio_audioout_obj_t* self) { #endif } -bool common_hal_audioio_audioout_get_paused(audioio_audioout_obj_t* self) { +bool common_hal_audioio_audioout_get_paused(audioio_audioout_obj_t *self) { return audio_dma_get_paused(&self->left_dma); } -void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self) { - Tc* timer = tc_insts[self->tc_index]; +void common_hal_audioio_audioout_stop(audioio_audioout_obj_t *self) { + Tc *timer = tc_insts[self->tc_index]; timer->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; audio_dma_stop(&self->left_dma); #ifdef SAM_D5X_E5X @@ -470,7 +480,7 @@ void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self) { ramp_value(self->quiescent_value, self->quiescent_value); } -bool common_hal_audioio_audioout_get_playing(audioio_audioout_obj_t* self) { +bool common_hal_audioio_audioout_get_playing(audioio_audioout_obj_t *self) { bool now_playing = audio_dma_get_playing(&self->left_dma); if (self->playing && !now_playing) { common_hal_audioio_audioout_stop(self); diff --git a/ports/atmel-samd/common-hal/busio/I2C.c b/ports/atmel-samd/common-hal/busio/I2C.c index 2551f7bf17..f7b8807976 100644 --- a/ports/atmel-samd/common-hal/busio/I2C.c +++ b/ports/atmel-samd/common-hal/busio/I2C.c @@ -41,8 +41,8 @@ // Number of times to try to send packet if failed. #define ATTEMPTS 2 -Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, - uint8_t *sercom_index, uint32_t *sda_pinmux, uint32_t *scl_pinmux) { +Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, + uint8_t *sercom_index, uint32_t *sda_pinmux, uint32_t *scl_pinmux) { *sda_pinmux = 0; *scl_pinmux = 0; for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) { @@ -50,7 +50,7 @@ Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, if (*sercom_index >= SERCOM_INST_NUM) { continue; } - Sercom* potential_sercom = sercom_insts[*sercom_index]; + Sercom *potential_sercom = sercom_insts[*sercom_index]; if (potential_sercom->I2CM.CTRLA.bit.ENABLE != 0 || sda->sercom[i].pad != 0) { continue; @@ -68,15 +68,15 @@ Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, } void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, - const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency, uint32_t timeout) { + const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { uint8_t sercom_index; uint32_t sda_pinmux, scl_pinmux; - Sercom* sercom = samd_i2c_get_sercom(scl, sda, &sercom_index, &sda_pinmux, &scl_pinmux); + Sercom *sercom = samd_i2c_get_sercom(scl, sda, &sercom_index, &sda_pinmux, &scl_pinmux); if (sercom == NULL) { mp_raise_ValueError(translate("Invalid pins")); } -#if CIRCUITPY_REQUIRE_I2C_PULLUPS + #if CIRCUITPY_REQUIRE_I2C_PULLUPS // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) gpio_set_pin_function(sda->number, GPIO_PIN_FUNCTION_OFF); gpio_set_pin_function(scl->number, GPIO_PIN_FUNCTION_OFF); @@ -99,7 +99,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, reset_pin_number(scl->number); mp_raise_RuntimeError(translate("No pull up found on SDA or SCL; check your wiring")); } -#endif + #endif gpio_set_pin_function(sda->number, sda_pinmux); gpio_set_pin_function(scl->number, scl_pinmux); @@ -164,10 +164,10 @@ bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { bool grabbed_lock = false; CRITICAL_SECTION_ENTER() - if (!self->has_lock) { - grabbed_lock = true; - self->has_lock = true; - } + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } CRITICAL_SECTION_LEAVE(); return grabbed_lock; } @@ -181,7 +181,7 @@ void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { } uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, - const uint8_t *data, size_t len, bool transmit_stop_bit) { + const uint8_t *data, size_t len, bool transmit_stop_bit) { uint16_t attempts = ATTEMPTS; int32_t status; @@ -189,8 +189,8 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, struct _i2c_m_msg msg; msg.addr = addr; msg.len = len; - msg.flags = transmit_stop_bit ? I2C_M_STOP : 0; - msg.buffer = (uint8_t *) data; + msg.flags = transmit_stop_bit ? I2C_M_STOP : 0; + msg.buffer = (uint8_t *)data; status = _i2c_m_sync_transfer(&self->i2c_desc.device, &msg); // Give up after ATTEMPTS tries. @@ -207,16 +207,16 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, } uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, - uint8_t *data, size_t len) { + uint8_t *data, size_t len) { uint16_t attempts = ATTEMPTS; int32_t status; do { struct _i2c_m_msg msg; - msg.addr = addr; - msg.len = len; - msg.flags = I2C_M_STOP | I2C_M_RD; - msg.buffer = data; + msg.addr = addr; + msg.len = len; + msg.flags = I2C_M_STOP | I2C_M_RD; + msg.buffer = data; status = _i2c_m_sync_transfer(&self->i2c_desc.device, &msg); // Give up after ATTEMPTS tries. diff --git a/ports/atmel-samd/common-hal/busio/I2C.h b/ports/atmel-samd/common-hal/busio/I2C.h index 6bec6e8047..74a1147fc7 100644 --- a/ports/atmel-samd/common-hal/busio/I2C.h +++ b/ports/atmel-samd/common-hal/busio/I2C.h @@ -41,7 +41,7 @@ typedef struct { uint8_t sda_pin; } busio_i2c_obj_t; -extern Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, - uint8_t *sercom_index, uint32_t *sda_pinmux, uint32_t *scl_pinmux); +extern Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, + uint8_t *sercom_index, uint32_t *sda_pinmux, uint32_t *scl_pinmux); #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/atmel-samd/common-hal/busio/SPI.c b/ports/atmel-samd/common-hal/busio/SPI.c index 9646f9cf1e..7b4034d156 100644 --- a/ports/atmel-samd/common-hal/busio/SPI.c +++ b/ports/atmel-samd/common-hal/busio/SPI.c @@ -43,7 +43,7 @@ bool never_reset_sercoms[SERCOM_INST_NUM]; -void never_reset_sercom(Sercom* sercom) { +void never_reset_sercom(Sercom *sercom) { // Reset all SERCOMs except the ones being used by on-board devices. Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; for (int i = 0; i < SERCOM_INST_NUM; i++) { @@ -54,7 +54,7 @@ void never_reset_sercom(Sercom* sercom) { } } -void allow_reset_sercom(Sercom* sercom) { +void allow_reset_sercom(Sercom *sercom) { // Reset all SERCOMs except the ones being used by on-board devices. Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; for (int i = 0; i < SERCOM_INST_NUM; i++) { @@ -72,11 +72,11 @@ void reset_sercoms(void) { if (never_reset_sercoms[i]) { continue; } - #ifdef MICROPY_HW_APA102_SERCOM + #ifdef MICROPY_HW_APA102_SERCOM if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) { continue; } - #endif + #endif // SWRST is same for all modes of SERCOMs. sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1; } @@ -84,9 +84,9 @@ void reset_sercoms(void) { void common_hal_busio_spi_construct(busio_spi_obj_t *self, - const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, - const mcu_pin_obj_t * miso) { - Sercom* sercom = NULL; + const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, + const mcu_pin_obj_t *miso) { + Sercom *sercom = NULL; uint8_t sercom_index; uint32_t clock_pinmux = 0; bool mosi_none = mosi == NULL; @@ -121,16 +121,16 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if (sercom_index >= SERCOM_INST_NUM) { continue; } - Sercom* potential_sercom = sercom_insts[sercom_index]; + Sercom *potential_sercom = sercom_insts[sercom_index]; if ( - #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102 + #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102 (potential_sercom->SPI.CTRLA.bit.ENABLE != 0 && potential_sercom != status_apa102.spi_desc.dev.prvt && !apa102_sck_in_use) - #else + #else potential_sercom->SPI.CTRLA.bit.ENABLE != 0 - #endif - ) { + #endif + ) { continue; } clock_pinmux = PINMUX(clock->number, (i == 0) ? MUX_C : MUX_D); @@ -172,7 +172,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if (sercom != NULL) { break; } - } + } } if (sercom == NULL) { mp_raise_ValueError(translate("Invalid pins")); @@ -259,10 +259,10 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { } bool common_hal_busio_spi_configure(busio_spi_obj_t *self, - uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { uint8_t baud_reg_value = samd_peripherals_spi_baudrate_to_baud_reg_value(baudrate); - void * hw = self->spi_desc.dev.prvt; + void *hw = self->spi_desc.dev.prvt; // If the settings are already what we want then don't reset them. if (hri_sercomspi_get_CTRLA_CPHA_bit(hw) == phase && hri_sercomspi_get_CTRLA_CPOL_bit(hw) == polarity && @@ -290,10 +290,10 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { bool grabbed_lock = false; CRITICAL_SECTION_ENTER() - if (!self->has_lock) { - grabbed_lock = true; - self->has_lock = true; - } + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } CRITICAL_SECTION_LEAVE(); return grabbed_lock; } @@ -307,7 +307,7 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { } bool common_hal_busio_spi_write(busio_spi_obj_t *self, - const uint8_t *data, size_t len) { + const uint8_t *data, size_t len) { if (len == 0) { return true; } @@ -323,7 +323,7 @@ bool common_hal_busio_spi_write(busio_spi_obj_t *self, } bool common_hal_busio_spi_read(busio_spi_obj_t *self, - uint8_t *data, size_t len, uint8_t write_value) { + uint8_t *data, size_t len, uint8_t write_value) { if (len == 0) { return true; } @@ -350,7 +350,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou status = sercom_dma_transfer(self->spi_desc.dev.prvt, data_out, data_in, len); } else { struct spi_xfer xfer; - xfer.txbuf = (uint8_t*) data_out; + xfer.txbuf = (uint8_t *)data_out; xfer.rxbuf = data_in; xfer.size = len; status = spi_m_sync_transfer(&self->spi_desc, &xfer); @@ -358,16 +358,16 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou return status >= 0; // Status is number of chars read or an error code < 0. } -uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t *self) { return samd_peripherals_spi_baud_reg_value_to_baudrate(hri_sercomspi_read_BAUD_reg(self->spi_desc.dev.prvt)); } -uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { - void * hw = self->spi_desc.dev.prvt; +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t *self) { + void *hw = self->spi_desc.dev.prvt; return hri_sercomspi_get_CTRLA_CPHA_bit(hw); } -uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { - void * hw = self->spi_desc.dev.prvt; +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t *self) { + void *hw = self->spi_desc.dev.prvt; return hri_sercomspi_get_CTRLA_CPOL_bit(hw); } diff --git a/ports/atmel-samd/common-hal/busio/SPI.h b/ports/atmel-samd/common-hal/busio/SPI.h index a1c0e15179..27bbfdeb3a 100644 --- a/ports/atmel-samd/common-hal/busio/SPI.h +++ b/ports/atmel-samd/common-hal/busio/SPI.h @@ -43,7 +43,7 @@ typedef struct { } busio_spi_obj_t; void reset_sercoms(void); -void never_reset_sercom(Sercom* sercom); +void never_reset_sercom(Sercom *sercom); #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c index 9557c3b5f1..cd8263bc56 100644 --- a/ports/atmel-samd/common-hal/busio/UART.c +++ b/ports/atmel-samd/common-hal/busio/UART.c @@ -55,14 +55,14 @@ static void usart_async_rxc_callback(const struct usart_async_descriptor *const } void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, - const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, - const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + const mcu_pin_obj_t *tx, const mcu_pin_obj_t *rx, + const mcu_pin_obj_t *rts, const mcu_pin_obj_t *cts, + const mcu_pin_obj_t *rs485_dir, bool rs485_invert, uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, - mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, + mp_float_t timeout, uint16_t receiver_buffer_size, byte *receiver_buffer, bool sigint_enabled) { - Sercom* sercom = NULL; + Sercom *sercom = NULL; uint8_t sercom_index = 255; // Unset index uint32_t rx_pinmux = 0; uint8_t rx_pad = 255; // Unset pad @@ -88,29 +88,29 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, self->timeout_ms = timeout * 1000; // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) { - Sercom* potential_sercom = NULL; + Sercom *potential_sercom = NULL; if (have_tx) { sercom_index = tx->sercom[i].index; if (sercom_index >= SERCOM_INST_NUM) { continue; } potential_sercom = sercom_insts[sercom_index]; -#ifdef SAMD21 - if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || + #ifdef SAMD21 + if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || !(tx->sercom[i].pad == 0 || tx->sercom[i].pad == 2)) { continue; } -#endif -#ifdef SAM_D5X_E5X - if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || + #endif + #ifdef SAM_D5X_E5X + if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || !(tx->sercom[i].pad == 0)) { continue; } -#endif + #endif tx_pinmux = PINMUX(tx->number, (i == 0) ? MUX_C : MUX_D); tx_pad = tx->sercom[i].pad; if (rx == NULL) { @@ -158,7 +158,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, // self->buffer, so do it manually. (However, as long as internal // pointers like this are NOT moved, allocating the buffer // in the long-lived pool is not strictly necessary) - self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, true); + self->buffer = (uint8_t *)gc_alloc(self->buffer_length * sizeof(uint8_t), false, true); if (self->buffer == NULL) { common_hal_busio_uart_deinit(self); mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), self->buffer_length * sizeof(uint8_t)); @@ -191,24 +191,24 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, // Doing a group mask and set of the registers saves 60 bytes over setting the bitfields individually. sercom->USART.CTRLA.reg &= ~(SERCOM_USART_CTRLA_TXPO_Msk | - SERCOM_USART_CTRLA_RXPO_Msk | - SERCOM_USART_CTRLA_FORM_Msk); + SERCOM_USART_CTRLA_RXPO_Msk | + SERCOM_USART_CTRLA_FORM_Msk); sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(tx_pad / 2) | - SERCOM_USART_CTRLA_RXPO(rx_pad) | - (parity == BUSIO_UART_PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1)); + SERCOM_USART_CTRLA_RXPO(rx_pad) | + (parity == BUSIO_UART_PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1)); // Enable tx and/or rx based on whether the pins were specified. // CHSIZE is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that. sercom->USART.CTRLB.reg &= ~(SERCOM_USART_CTRLB_TXEN | - SERCOM_USART_CTRLB_RXEN | - SERCOM_USART_CTRLB_PMODE | - SERCOM_USART_CTRLB_SBMODE | - SERCOM_USART_CTRLB_CHSIZE_Msk); + SERCOM_USART_CTRLB_RXEN | + SERCOM_USART_CTRLB_PMODE | + SERCOM_USART_CTRLB_SBMODE | + SERCOM_USART_CTRLB_CHSIZE_Msk); sercom->USART.CTRLB.reg |= (have_tx ? SERCOM_USART_CTRLB_TXEN : 0) | - (have_rx ? SERCOM_USART_CTRLB_RXEN : 0) | - (parity == BUSIO_UART_PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) | - (stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0) | - SERCOM_USART_CTRLB_CHSIZE(bits % 8); + (have_rx ? SERCOM_USART_CTRLB_RXEN : 0) | + (parity == BUSIO_UART_PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) | + (stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0) | + SERCOM_USART_CTRLB_CHSIZE(bits % 8); // Set baud rate common_hal_busio_uart_set_baudrate(self, baudrate); @@ -227,7 +227,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, gpio_set_pin_direction(tx->number, GPIO_DIRECTION_OUT); gpio_set_pin_pull_mode(tx->number, GPIO_PULL_OFF); gpio_set_pin_function(tx->number, tx_pinmux); - self->tx_pin = tx->number; + self->tx_pin = tx->number; claim_pin(tx); } else { self->tx_pin = NO_PIN; @@ -237,7 +237,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, gpio_set_pin_direction(rx->number, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(rx->number, GPIO_PULL_OFF); gpio_set_pin_function(rx->number, rx_pinmux); - self->rx_pin = rx->number; + self->rx_pin = rx->number; claim_pin(rx); } else { self->rx_pin = NO_PIN; @@ -255,7 +255,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { return; } // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; usart_async_disable(usart_desc_p); usart_async_deinit(usart_desc_p); reset_pin_number(self->rx_pin); @@ -271,7 +271,7 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t } // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; if (len == 0) { // Nothing to read. @@ -328,7 +328,7 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, } // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; struct io_descriptor *io; usart_async_get_io_descriptor(usart_desc_p, &io); @@ -359,21 +359,21 @@ uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; usart_async_set_baud_rate(usart_desc_p, - // Samples and ARITHMETIC vs FRACTIONAL must correspond to USART_SAMPR in - // hpl_sercom_config.h. - _usart_async_calculate_baud_rate(baudrate, // e.g. 9600 baud - PROTOTYPE_SERCOM_USART_ASYNC_CLOCK_FREQUENCY, - 16, // samples - USART_BAUDRATE_ASYNCH_ARITHMETIC, - 0 // fraction - not used for ARITHMETIC - )); + // Samples and ARITHMETIC vs FRACTIONAL must correspond to USART_SAMPR in + // hpl_sercom_config.h. + _usart_async_calculate_baud_rate(baudrate, // e.g. 9600 baud + PROTOTYPE_SERCOM_USART_ASYNC_CLOCK_FREQUENCY, + 16, // samples + USART_BAUDRATE_ASYNCH_ARITHMETIC, + 0 // fraction - not used for ARITHMETIC + )); self->baudrate = baudrate; } mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { - return (mp_float_t) (self->timeout_ms / 1000.0f); + return (mp_float_t)(self->timeout_ms / 1000.0f); } void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { @@ -382,7 +382,7 @@ void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeou uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; struct usart_async_status async_status; usart_async_get_status(usart_desc_p, &async_status); return async_status.rxcnt; @@ -390,7 +390,7 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; usart_async_flush_rx_buffer(usart_desc_p); } @@ -401,7 +401,7 @@ bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { return false; } // This assignment is only here because the usart_async routines take a *const argument. - struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_descriptor *const usart_desc_p = (struct usart_async_descriptor *const)&self->usart_desc; struct usart_async_status async_status; usart_async_get_status(usart_desc_p, &async_status); return !(async_status.flags & USART_ASYNC_STATUS_BUSY); diff --git a/ports/atmel-samd/common-hal/busio/UART.h b/ports/atmel-samd/common-hal/busio/UART.h index f94df040f8..c95fbf1556 100644 --- a/ports/atmel-samd/common-hal/busio/UART.h +++ b/ports/atmel-samd/common-hal/busio/UART.h @@ -43,7 +43,7 @@ typedef struct { uint32_t baudrate; uint32_t timeout_ms; uint32_t buffer_length; - uint8_t* buffer; + uint8_t *buffer; } busio_uart_obj_t; #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_UART_H diff --git a/ports/atmel-samd/common-hal/canio/CAN.c b/ports/atmel-samd/common-hal/canio/CAN.c index 76599a9a7b..2ad292195d 100644 --- a/ports/atmel-samd/common-hal/canio/CAN.c +++ b/ports/atmel-samd/common-hal/canio/CAN.c @@ -40,15 +40,14 @@ #include "genhdr/candata.h" -STATIC Can * const can_insts[] = CAN_INSTS; +STATIC Can *const can_insts[] = CAN_INSTS; STATIC canio_can_obj_t *can_objs[MP_ARRAY_SIZE(can_insts)]; // This must be placed in the first 64kB of RAM STATIC COMPILER_SECTION(".canram") canio_can_state_t can_state[MP_ARRAY_SIZE(can_insts)]; -void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) -{ +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) { mcu_pin_function_t *tx_function = mcu_find_pin_function(can_tx, tx, -1, MP_QSTR_tx); int instance = tx_function->instance; @@ -56,7 +55,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc const uint32_t can_frequency = CONF_CAN0_FREQUENCY; -#define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) +#define DIV_ROUND(a, b) (((a) + (b) / 2) / (b)) #define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) uint32_t clocks_per_bit = DIV_ROUND(can_frequency, baudrate); @@ -97,7 +96,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc NVIC_ClearPendingIRQ(CAN0_IRQn); NVIC_EnableIRQ(CAN0_IRQn); hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); -#ifdef CAN1_GCLK_ID + #ifdef CAN1_GCLK_ID } else if (instance == 1) { hri_mclk_set_AHBMASK_CAN1_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, CAN1_GCLK_ID, CONF_GCLK_CAN1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); @@ -106,7 +105,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc NVIC_ClearPendingIRQ(CAN1_IRQn); NVIC_EnableIRQ(CAN1_IRQn); hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); -#endif + #endif } self->hw->CCCR.bit.FDOE = 0; // neither FD nor Bit Rate Switch enabled @@ -237,12 +236,12 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc NVIC_DisableIRQ(CAN0_IRQn); NVIC_ClearPendingIRQ(CAN0_IRQn); NVIC_EnableIRQ(CAN0_IRQn); -#ifdef CAN1_GCLK_ID + #ifdef CAN1_GCLK_ID } else if (instance == 1) { NVIC_DisableIRQ(CAN1_IRQn); NVIC_ClearPendingIRQ(CAN1_IRQn); NVIC_EnableIRQ(CAN1_IRQn); -#endif + #endif } hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); @@ -255,23 +254,19 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc can_objs[instance] = self; } -bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) -{ +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) { return self->loopback; } -int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) -{ +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) { return self->baudrate; } -int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) -{ +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) { return self->hw->ECR.bit.TEC; } -int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) -{ +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) { return self->hw->ECR.bit.REC; } @@ -313,11 +308,11 @@ static void maybe_auto_restart(canio_can_obj_t *self) { } } -void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) -{ +void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) { maybe_auto_restart(self); - canio_message_obj_t *message = message_in;; + canio_message_obj_t *message = message_in; + ; // We have just one dedicated TX buffer, use it! canio_can_tx_buffer_t *ent = &self->state->tx_buffer[0]; @@ -365,8 +360,7 @@ void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { } } -void common_hal_canio_can_deinit(canio_can_obj_t *self) -{ +void common_hal_canio_can_deinit(canio_can_obj_t *self) { if (self->hw) { hri_can_set_CCCR_INIT_bit(self->hw); self->hw = 0; @@ -384,11 +378,11 @@ void common_hal_canio_can_deinit(canio_can_obj_t *self) void common_hal_canio_reset(void) { memset(can_state, 0, sizeof(can_state)); - for (size_t i=0; iextended) { continue; } @@ -89,13 +89,13 @@ STATIC size_t num_filters_needed(size_t nmatch, canio_match_obj_t **matches, boo STATIC size_t num_filters_available(canio_can_obj_t *can, bool extended) { size_t available = 0; if (extended) { - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { + for (size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { if (!extended_filter_in_use(&can->state->extended_rx_filter[i])) { available++; } } } else { - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { + for (size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { if (!standard_filter_in_use(&can->state->standard_rx_filter[i])) { available++; } @@ -119,13 +119,13 @@ STATIC void clear_filters(canio_listener_obj_t *self) { prevent_config_change(can); // For each filter entry, if it pointed at this FIFO set it to DISABLE - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { + for (size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { int val = CAN_XIDFE_0_EFEC_STF0M_Val + fifo; if (can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC == val) { can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC = CAN_XIDFE_0_EFEC_DISABLE_Val; } } - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { + for (size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { int val = CAN_SIDFE_0_SFEC_STF1M_Val + fifo; if (can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC == val) { can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC = CAN_SIDFE_0_SFEC_DISABLE_Val; @@ -212,7 +212,7 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** // step 1: single id standard matches // we have to gather up pairs and stuff them in a single filter entry - for(size_t i = 0; iextended) { continue; @@ -230,13 +230,13 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** } // step 1.5. odd single id standard match if (first_id != NO_ID) { - install_standard_filter(standard, first_id, first_id, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); - standard = next_standard_filter(self, standard); - first_id = NO_ID; + install_standard_filter(standard, first_id, first_id, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + standard = next_standard_filter(self, standard); + first_id = NO_ID; } // step 2: standard mask filter - for(size_t i = 0; iextended) { continue; @@ -250,7 +250,7 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** // step 3: single id extended matches // we have to gather up pairs and stuff them in a single filter entry - for(size_t i = 0; iextended) { continue; @@ -268,13 +268,13 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** } // step 3.5. odd single id standard match if (first_id != NO_ID) { - install_extended_filter(extended, first_id, first_id, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); - extended = next_extended_filter(self, extended); - first_id = NO_ID; + install_extended_filter(extended, first_id, first_id, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + extended = next_extended_filter(self, extended); + first_id = NO_ID; } // step 4: extended mask filters - for(size_t i = 0; iextended) { continue; @@ -294,13 +294,13 @@ void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_o if (!can->fifo0_in_use) { self->fifo_idx = 0; self->fifo = can->state->rx0_fifo; - self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF0C; + self->hw = (canio_rxfifo_reg_t *)&can->hw->RXF0C; can->hw->IR.reg = CAN_IR_RF0N | CAN_IR_RF0W | CAN_IR_RF0F | CAN_IR_RF0L; can->fifo0_in_use = true; } else if (!can->fifo1_in_use) { self->fifo_idx = 1; self->fifo = can->state->rx1_fifo; - self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF1C; + self->hw = (canio_rxfifo_reg_t *)&can->hw->RXF1C; can->fifo1_in_use = true; can->hw->IR.reg = CAN_IR_RF1N | CAN_IR_RF1W | CAN_IR_RF1F | CAN_IR_RF1L; } else { diff --git a/ports/atmel-samd/common-hal/canio/Listener.h b/ports/atmel-samd/common-hal/canio/Listener.h index 237dca870d..be19bd84fb 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.h +++ b/ports/atmel-samd/common-hal/canio/Listener.h @@ -30,9 +30,9 @@ #include "shared-module/canio/Match.h" typedef struct { - __IO CAN_RXF0C_Type RXFC; /**< \brief (R/W 32) Rx FIFO n Configuration */ - __I CAN_RXF0S_Type RXFS; /**< \brief (R/ 32) Rx FIFO n Status */ - __IO CAN_RXF0A_Type RXFA; /**< \brief (R/W 32) Rx FIFO n Acknowledge */ + __IO CAN_RXF0C_Type RXFC; /**< \brief (R/W 32) Rx FIFO n Configuration */ + __I CAN_RXF0S_Type RXFS; /**< \brief (R/ 32) Rx FIFO n Status */ + __IO CAN_RXF0A_Type RXFA; /**< \brief (R/W 32) Rx FIFO n Acknowledge */ } canio_rxfifo_reg_t; typedef struct canio_listener_obj { diff --git a/ports/atmel-samd/common-hal/countio/Counter.c b/ports/atmel-samd/common-hal/countio/Counter.c index d2e3fae630..4531a4ed8c 100644 --- a/ports/atmel-samd/common-hal/countio/Counter.c +++ b/ports/atmel-samd/common-hal/countio/Counter.c @@ -8,8 +8,8 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -void common_hal_countio_counter_construct(countio_counter_obj_t* self, - const mcu_pin_obj_t* pin_a) { +void common_hal_countio_counter_construct(countio_counter_obj_t *self, + const mcu_pin_obj_t *pin_a) { if (!pin_a->has_extint) { mp_raise_RuntimeError(translate("Pin must support hardware interrupts")); } @@ -31,7 +31,7 @@ void common_hal_countio_counter_construct(countio_counter_obj_t* self, gpio_set_pin_function(self->pin_a, GPIO_PIN_FUNCTION_A); gpio_set_pin_pull_mode(self->pin_a, GPIO_PULL_UP); - set_eic_channel_data(self->eic_channel_a, (void*) self); + set_eic_channel_data(self->eic_channel_a, (void *)self); self->count = 0; @@ -44,11 +44,11 @@ void common_hal_countio_counter_construct(countio_counter_obj_t* self, } -bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) { +bool common_hal_countio_counter_deinited(countio_counter_obj_t *self) { return self->pin_a == NO_PIN; } -void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { +void common_hal_countio_counter_deinit(countio_counter_obj_t *self) { if (common_hal_countio_counter_deinited(self)) { return; } @@ -62,21 +62,21 @@ void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { } -mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) { +mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t *self) { return self->count; } -void common_hal_countio_counter_set_count(countio_counter_obj_t* self, - mp_int_t new_count) { +void common_hal_countio_counter_set_count(countio_counter_obj_t *self, + mp_int_t new_count) { self->count = new_count; } -void common_hal_countio_counter_reset(countio_counter_obj_t* self){ - self->count = 0; +void common_hal_countio_counter_reset(countio_counter_obj_t *self) { + self->count = 0; } void counter_interrupt_handler(uint8_t channel) { - countio_counter_obj_t* self = get_eic_channel_data(channel); + countio_counter_obj_t *self = get_eic_channel_data(channel); self->count += 1; diff --git a/ports/atmel-samd/common-hal/countio/Counter.h b/ports/atmel-samd/common-hal/countio/Counter.h index 724c734152..8af22253f9 100644 --- a/ports/atmel-samd/common-hal/countio/Counter.h +++ b/ports/atmel-samd/common-hal/countio/Counter.h @@ -9,7 +9,7 @@ typedef struct { mp_obj_base_t base; uint8_t pin_a; - uint8_t eic_channel_a:4; + uint8_t eic_channel_a : 4; mp_int_t count; } countio_counter_obj_t; diff --git a/ports/atmel-samd/common-hal/countio/__init__.c b/ports/atmel-samd/common-hal/countio/__init__.c index b95b20d153..d47de33e53 100644 --- a/ports/atmel-samd/common-hal/countio/__init__.c +++ b/ports/atmel-samd/common-hal/countio/__init__.c @@ -1 +1 @@ -//No countio module functions +// No countio module functions diff --git a/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c b/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c index e37769c157..40637bef4b 100644 --- a/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +++ b/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c @@ -37,7 +37,7 @@ #include "supervisor/shared/translate.h" digitalinout_result_t common_hal_digitalio_digitalinout_construct( - digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { + digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { claim_pin(pin); self->pin = pin; self->output = false; @@ -50,15 +50,15 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct( } void common_hal_digitalio_digitalinout_never_reset( - digitalio_digitalinout_obj_t *self) { + digitalio_digitalinout_obj_t *self) { never_reset_pin_number(self->pin->number); } -bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { return self->pin == NULL; } -void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { if (common_hal_digitalio_digitalinout_deinited(self)) { return; } @@ -67,15 +67,15 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self } void common_hal_digitalio_digitalinout_switch_to_input( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { self->output = false; // This also sets direction to input. common_hal_digitalio_digitalinout_set_pull(self, pull); } digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( - digitalio_digitalinout_obj_t* self, bool value, - digitalio_drive_mode_t drive_mode) { + digitalio_digitalinout_obj_t *self, bool value, + digitalio_drive_mode_t drive_mode) { const uint8_t pin = self->pin->number; gpio_set_pin_pull_mode(pin, GPIO_PULL_OFF); // Turn on "strong" pin driving (more current available). See DRVSTR doc in datasheet. @@ -90,12 +90,12 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( } digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( - digitalio_digitalinout_obj_t* self) { + digitalio_digitalinout_obj_t *self) { return self->output ? DIRECTION_OUTPUT : DIRECTION_INPUT; } void common_hal_digitalio_digitalinout_set_value( - digitalio_digitalinout_obj_t* self, bool value) { + digitalio_digitalinout_obj_t *self, bool value) { const uint8_t pin = self->pin->number; const uint8_t port = GPIO_PORT(pin); const uint32_t pin_mask = 1U << GPIO_PIN(pin); @@ -116,7 +116,7 @@ void common_hal_digitalio_digitalinout_set_value( } bool common_hal_digitalio_digitalinout_get_value( - digitalio_digitalinout_obj_t* self) { + digitalio_digitalinout_obj_t *self) { const uint8_t pin = self->pin->number; if (!self->output) { return gpio_get_pin_level(pin); @@ -130,8 +130,8 @@ bool common_hal_digitalio_digitalinout_get_value( } digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( - digitalio_digitalinout_obj_t* self, - digitalio_drive_mode_t drive_mode) { + digitalio_digitalinout_obj_t *self, + digitalio_drive_mode_t drive_mode) { bool value = common_hal_digitalio_digitalinout_get_value(self); self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; // True is implemented differently between modes so reset the value to make @@ -143,7 +143,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( } digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( - digitalio_digitalinout_obj_t* self) { + digitalio_digitalinout_obj_t *self) { if (self->open_drain) { return DRIVE_MODE_OPEN_DRAIN; } else { @@ -152,7 +152,7 @@ digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( } void common_hal_digitalio_digitalinout_set_pull( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { enum gpio_pull_mode asf_pull = GPIO_PULL_OFF; switch (pull) { case PULL_UP: @@ -171,7 +171,7 @@ void common_hal_digitalio_digitalinout_set_pull( } digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( - digitalio_digitalinout_obj_t* self) { + digitalio_digitalinout_obj_t *self) { uint32_t pin = self->pin->number; if (self->output) { mp_raise_AttributeError(translate("Cannot get pull while in output mode")); @@ -179,7 +179,8 @@ digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( } else { if (hri_port_get_PINCFG_PULLEN_bit(PORT, GPIO_PORT(pin), GPIO_PIN(pin)) == 0) { return PULL_NONE; - } if (hri_port_get_OUT_reg(PORT, GPIO_PORT(pin), 1U << GPIO_PIN(pin)) > 0) { + } + if (hri_port_get_OUT_reg(PORT, GPIO_PORT(pin), 1U << GPIO_PIN(pin)) > 0) { return PULL_UP; } else { return PULL_DOWN; diff --git a/ports/atmel-samd/common-hal/digitalio/DigitalInOut.h b/ports/atmel-samd/common-hal/digitalio/DigitalInOut.h index 4b443d9bce..3e8817e282 100644 --- a/ports/atmel-samd/common-hal/digitalio/DigitalInOut.h +++ b/ports/atmel-samd/common-hal/digitalio/DigitalInOut.h @@ -32,7 +32,7 @@ typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t * pin; + const mcu_pin_obj_t *pin; bool output; bool open_drain; } digitalio_digitalinout_obj_t; diff --git a/ports/atmel-samd/common-hal/displayio/ParallelBus.h b/ports/atmel-samd/common-hal/displayio/ParallelBus.h index 630bec351b..ee19caddf6 100644 --- a/ports/atmel-samd/common-hal/displayio/ParallelBus.h +++ b/ports/atmel-samd/common-hal/displayio/ParallelBus.h @@ -31,14 +31,14 @@ typedef struct { mp_obj_base_t base; - uint8_t* bus; + uint8_t *bus; digitalio_digitalinout_obj_t command; digitalio_digitalinout_obj_t chip_select; digitalio_digitalinout_obj_t reset; digitalio_digitalinout_obj_t write; digitalio_digitalinout_obj_t read; uint8_t data0_pin; - PortGroup* write_group; + PortGroup *write_group; uint32_t write_mask; } displayio_parallelbus_obj_t; diff --git a/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c b/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c index 53cbe854fd..961fde8439 100644 --- a/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c +++ b/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c @@ -36,8 +36,8 @@ #include "peripherals/samd/sercom.h" void common_hal_i2cperipheral_i2c_peripheral_construct(i2cperipheral_i2c_peripheral_obj_t *self, - const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, - uint8_t *addresses, unsigned int num_addresses, bool smbus) { + const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, + uint8_t *addresses, unsigned int num_addresses, bool smbus) { uint8_t sercom_index; uint32_t sda_pinmux, scl_pinmux; Sercom *sercom = samd_i2c_get_sercom(scl, sda, &sercom_index, &sda_pinmux, &scl_pinmux); @@ -58,12 +58,13 @@ void common_hal_i2cperipheral_i2c_peripheral_construct(i2cperipheral_i2c_periphe samd_peripherals_sercom_clock_init(sercom, sercom_index); -#ifdef SAM_D5X_E5X + #ifdef SAM_D5X_E5X sercom->I2CS.CTRLC.bit.SDASETUP = 0x08; -#endif + #endif sercom->I2CS.CTRLA.bit.SWRST = 1; - while (sercom->I2CS.CTRLA.bit.SWRST || sercom->I2CS.SYNCBUSY.bit.SWRST) {} + while (sercom->I2CS.CTRLA.bit.SWRST || sercom->I2CS.SYNCBUSY.bit.SWRST) { + } sercom->I2CS.CTRLB.bit.AACKEN = 0; // Automatic acknowledge is disabled. @@ -134,8 +135,7 @@ static int i2c_peripheral_check_error(i2cperipheral_i2c_peripheral_obj_t *self, return -err; } -int common_hal_i2cperipheral_i2c_peripheral_is_addressed(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t *address, bool *is_read, bool *is_restart) -{ +int common_hal_i2cperipheral_i2c_peripheral_is_addressed(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t *address, bool *is_read, bool *is_restart) { int err = i2c_peripheral_check_error(self, false); if (err) { return err; diff --git a/ports/atmel-samd/common-hal/imagecapture/ParallelImageCapture.c b/ports/atmel-samd/common-hal/imagecapture/ParallelImageCapture.c index 074c2b6d23..2a01057b7f 100644 --- a/ports/atmel-samd/common-hal/imagecapture/ParallelImageCapture.c +++ b/ports/atmel-samd/common-hal/imagecapture/ParallelImageCapture.c @@ -54,14 +54,12 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle const mcu_pin_obj_t *data_clock, const mcu_pin_obj_t *vertical_sync, const mcu_pin_obj_t *horizontal_reference, - int data_count) -{ + int data_count) { if (data0->number != PIN_PCC_D0) { mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_data0); } // The peripheral supports 8, 10, 12, or 14 data bits, but the code only supports 8 at present - if (data_count != 8) - { + if (data_count != 8) { mp_raise_ValueError_varg(translate("Invalid data_count %d"), data_count); } if (vertical_sync && vertical_sync->number != PIN_PCC_DEN1) { @@ -74,7 +72,7 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_data_clock); } // technically, 0 was validated as free already but check again - for (int i=0; inumber + i)) { mp_raise_ValueError_varg(translate("data pin #%d in use"), i); } @@ -87,8 +85,8 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle // Accumulate 4 bytes into RHR register (two 16-bit pixels) PCC->MR.reg = PCC_MR_CID(0x1) | // Clear on falling DEN1 (VSYNC) - PCC_MR_ISIZE(0x0) | // Input data bus is 8 bits - PCC_MR_DSIZE(0x2); // "4 data" at a time (accumulate in RHR) + PCC_MR_ISIZE(0x0) | // Input data bus is 8 bits + PCC_MR_DSIZE(0x2); // "4 data" at a time (accumulate in RHR) PCC->MR.bit.PCEN = 1; // Enable PCC @@ -100,62 +98,59 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle gpio_set_pin_direction(PIN_PCC_CLK, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(PIN_PCC_CLK, GPIO_PULL_OFF); gpio_set_pin_function(PIN_PCC_CLK, GPIO_PIN_FUNCTION_PCC); - //claim_pin_number(PIN_PCC_CLK); + // claim_pin_number(PIN_PCC_CLK); if (vertical_sync) { gpio_set_pin_direction(PIN_PCC_DEN1, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(PIN_PCC_DEN1, GPIO_PULL_OFF); gpio_set_pin_function(PIN_PCC_DEN1, GPIO_PIN_FUNCTION_PCC); // VSYNC - //claim_pin_number(PIN_PCC_DEN1); + // claim_pin_number(PIN_PCC_DEN1); } if (horizontal_reference) { gpio_set_pin_direction(PIN_PCC_DEN2, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(PIN_PCC_DEN2, GPIO_PULL_OFF); gpio_set_pin_function(PIN_PCC_DEN2, GPIO_PIN_FUNCTION_PCC); // HSYNC - //claim_pin_number(PIN_PCC_DEN2); + // claim_pin_number(PIN_PCC_DEN2); } - for (int i=0; ivertical_sync); reset_pin_number(self->horizontal_reference); reset_pin_number(PIN_PCC_CLK); - for (int i=0; idata_count; i++) { + for (int i = 0; i < self->data_count; i++) { reset_pin_number(PIN_PCC_D0 + i); } self->data_count = 0; } -bool common_hal_imagecapture_parallelimagecapture_deinited(imagecapture_parallelimagecapture_obj_t *self) -{ +bool common_hal_imagecapture_parallelimagecapture_deinited(imagecapture_parallelimagecapture_obj_t *self) { return self->data_count == 0; } -static void setup_dma(DmacDescriptor* descriptor, size_t count, uint32_t *buffer) { +static void setup_dma(DmacDescriptor *descriptor, size_t count, uint32_t *buffer) { descriptor->BTCTRL.reg = DMAC_BTCTRL_VALID | - DMAC_BTCTRL_BLOCKACT_NOACT | - DMAC_BTCTRL_EVOSEL_BLOCK | - DMAC_BTCTRL_DSTINC | - DMAC_BTCTRL_BEATSIZE_WORD; + DMAC_BTCTRL_BLOCKACT_NOACT | + DMAC_BTCTRL_EVOSEL_BLOCK | + DMAC_BTCTRL_DSTINC | + DMAC_BTCTRL_BEATSIZE_WORD; descriptor->BTCNT.reg = count; - descriptor->DSTADDR.reg = (uint32_t)buffer + 4*count; + descriptor->DSTADDR.reg = (uint32_t)buffer + 4 * count; descriptor->SRCADDR.reg = (uint32_t)&PCC->RHR.reg; descriptor->DESCADDR.reg = 0; } #include -void common_hal_imagecapture_parallelimagecapture_capture(imagecapture_parallelimagecapture_obj_t *self, void *buffer, size_t bufsize) -{ +void common_hal_imagecapture_parallelimagecapture_capture(imagecapture_parallelimagecapture_obj_t *self, void *buffer, size_t bufsize) { uint8_t dma_channel = dma_allocate_channel(); @@ -171,8 +166,7 @@ void common_hal_imagecapture_parallelimagecapture_capture(imagecapture_paralleli const volatile uint32_t *vsync_reg = &PORT->Group[(self->vertical_sync / 32)].IN.reg; uint32_t vsync_bit = 1 << (self->vertical_sync % 32); - while (*vsync_reg & vsync_bit) - { + while (*vsync_reg & vsync_bit) { // Wait for VSYNC low (frame end) RUN_BACKGROUND_TASKS; diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.h b/ports/atmel-samd/common-hal/microcontroller/Pin.h index 59302713af..6e313acfd3 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.h +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.h @@ -44,7 +44,7 @@ void reset_all_pins(void); // need to store a full pointer. void reset_pin_number(uint8_t pin_number); void never_reset_pin_number(uint8_t pin_number); -void claim_pin(const mcu_pin_obj_t* pin); +void claim_pin(const mcu_pin_obj_t *pin); bool pin_number_is_free(uint8_t pin_number); typedef struct { diff --git a/ports/atmel-samd/common-hal/microcontroller/Processor.c b/ports/atmel-samd/common-hal/microcontroller/Processor.c index 8c288a352e..2985cf5a67 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Processor.c +++ b/ports/atmel-samd/common-hal/microcontroller/Processor.c @@ -83,11 +83,11 @@ STATIC float convert_dec_to_frac(uint8_t val) { float float_val = (float)val; if (val < 10) { - return (float_val/10.0); + return float_val / 10.0; } else if (val < 100) { - return (float_val/100.0); + return float_val / 100.0; } else { - return (float_val/1000.0); + return float_val / 1000.0; } } @@ -134,17 +134,17 @@ STATIC float calculate_temperature(uint16_t raw_value) { tempR = room_temp_val_int + convert_dec_to_frac(room_temp_val_dec); tempH = hot_temp_val_int + convert_dec_to_frac(hot_temp_val_dec); - INT1VR = 1 - ((float)room_int1v_val/INT1V_DIVIDER_1000); - INT1VH = 1 - ((float)hot_int1v_val/INT1V_DIVIDER_1000); + INT1VR = 1 - ((float)room_int1v_val / INT1V_DIVIDER_1000); + INT1VH = 1 - ((float)hot_int1v_val / INT1V_DIVIDER_1000); - VADCR = ((float)ADCR * INT1VR)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; - VADCH = ((float)ADCH * INT1VH)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + VADCR = ((float)ADCR * INT1VR) / ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + VADCH = ((float)ADCH * INT1VH) / ADC_12BIT_FULL_SCALE_VALUE_FLOAT; float VADC; /* Voltage calculation using ADC result for Coarse Temp calculation */ float VADCM; /* Voltage calculation using ADC result for Fine Temp calculation. */ float INT1VM; /* Voltage calculation for reality INT1V value during the ADC conversion */ - VADC = ((float)raw_value * INT1V_VALUE_FLOAT)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + VADC = ((float)raw_value * INT1V_VALUE_FLOAT) / ADC_12BIT_FULL_SCALE_VALUE_FLOAT; // Hopefully compiler will remove common subepxressions here. @@ -152,15 +152,15 @@ STATIC float calculate_temperature(uint16_t raw_value) { // 1b as mentioned in data sheet section "Temperature Sensor Characteristics" // of Electrical Characteristics. (adapted from ASF sample code). // Coarse Temp Calculation by assume INT1V=1V for this ADC conversion - float coarse_temp = tempR + (((tempH - tempR)/(VADCH - VADCR)) * (VADC - VADCR)); + float coarse_temp = tempR + (((tempH - tempR) / (VADCH - VADCR)) * (VADC - VADCR)); // Calculation to find the real INT1V value during the ADC conversion - INT1VM = INT1VR + (((INT1VH - INT1VR) * (coarse_temp - tempR))/(tempH - tempR)); + INT1VM = INT1VR + (((INT1VH - INT1VR) * (coarse_temp - tempR)) / (tempH - tempR)); - VADCM = ((float)raw_value * INT1VM)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + VADCM = ((float)raw_value * INT1VM) / ADC_12BIT_FULL_SCALE_VALUE_FLOAT; // Fine Temp Calculation by replace INT1V=1V by INT1V = INT1Vm for ADC conversion - float fine_temp = tempR + (((tempH - tempR)/(VADCH - VADCR)) * (VADCM - VADCR)); + float fine_temp = tempR + (((tempH - tempR) / (VADCH - VADCR)) * (VADCM - VADCR)); return fine_temp; } @@ -183,17 +183,17 @@ STATIC float calculate_temperature(uint16_t TP, uint16_t TC) { uint16_t VCH = (*(uint32_t *)FUSES_HOT_ADC_VAL_CTAT_ADDR & FUSES_HOT_ADC_VAL_CTAT_Msk) >> FUSES_HOT_ADC_VAL_CTAT_Pos; // From SAMD51 datasheet: section 45.6.3.1 (page 1327). - return (TL*VPH*TC - VPL*TH*TC - TL*VCH*TP + TH*VCL*TP) / (VCL*TP - VCH*TP - VPL*TC + VPH*TC); + return (TL * VPH * TC - VPL * TH * TC - TL * VCH * TP + TH * VCL * TP) / (VCL * TP - VCH * TP - VPL * TC + VPH * TC); } #endif // SAMD51 float common_hal_mcu_processor_get_temperature(void) { struct adc_sync_descriptor adc; - static Adc* adc_insts[] = ADC_INSTS; + static Adc *adc_insts[] = ADC_INSTS; samd_peripherals_adc_setup(&adc, adc_insts[0]); -#ifdef SAMD21 + #ifdef SAMD21 // The parameters chosen here are from the temperature example in: // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf // That note also recommends in general: @@ -205,9 +205,9 @@ float common_hal_mcu_processor_get_temperature(void) { // Channel arg is ignored. adc_sync_enable_channel(&adc, IGNORED_CHANNEL); adc_sync_set_inputs(&adc, - ADC_INPUTCTRL_MUXPOS_TEMP_Val, // pos_input - ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - IGNORED_CHANNEL); // channel (ignored) + ADC_INPUTCTRL_MUXPOS_TEMP_Val, // pos_input + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored) hri_adc_write_CTRLB_PRESCALER_bf(adc.device.hw, ADC_CTRLB_PRESCALER_DIV32_Val); hri_adc_write_SAMPCTRL_SAMPLEN_bf(adc.device.hw, ADC_TEMP_SAMPLE_LENGTH); @@ -227,14 +227,14 @@ float common_hal_mcu_processor_get_temperature(void) { // Empirical observation shows the first reading is quite different than subsequent ones. // Channel arg is ignored. - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &value), 2); - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &value), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&value), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&value), 2); adc_sync_deinit(&adc); return calculate_temperature(value); -#endif // SAMD21 + #endif // SAMD21 -#ifdef SAM_D5X_E5X + #ifdef SAM_D5X_E5X adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); // Using INTVCC0 as the reference voltage. // INTVCC1 seems to read a little high. @@ -250,48 +250,48 @@ float common_hal_mcu_processor_get_temperature(void) { // Channel arg is ignored. adc_sync_enable_channel(&adc, IGNORED_CHANNEL); adc_sync_set_inputs(&adc, - ADC_INPUTCTRL_MUXPOS_PTAT_Val, // pos_input - ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - IGNORED_CHANNEL); // channel (ignored) + ADC_INPUTCTRL_MUXPOS_PTAT_Val, // pos_input + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored) // Read both temperature sensors. volatile uint16_t ptat; volatile uint16_t ctat; // Read twice for stability (necessary?). - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ptat), 2); - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ptat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&ptat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&ptat), 2); adc_sync_set_inputs(&adc, - ADC_INPUTCTRL_MUXPOS_CTAT_Val, // pos_input - ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - IGNORED_CHANNEL); // channel (ignored) + ADC_INPUTCTRL_MUXPOS_CTAT_Val, // pos_input + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored) - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ctat), 2); - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ctat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&ctat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&ctat), 2); // Turn off temp sensor. hri_supc_clear_VREF_TSEN_bit(SUPC); adc_sync_deinit(&adc); return calculate_temperature(ptat, ctat); -#endif // SAMD51 + #endif // SAMD51 } float common_hal_mcu_processor_get_voltage(void) { -#if MICROCONTROLLER_VOLTAGE_DISABLE + #if MICROCONTROLLER_VOLTAGE_DISABLE return NAN; -#else + #else struct adc_sync_descriptor adc; - static Adc* adc_insts[] = ADC_INSTS; + static Adc *adc_insts[] = ADC_INSTS; samd_peripherals_adc_setup(&adc, adc_insts[0]); -#ifdef SAMD21 + #ifdef SAMD21 adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INT1V_Val); -#endif + #endif -#ifdef SAM_D5X_E5X + #ifdef SAM_D5X_E5X hri_supc_set_VREF_SEL_bf(SUPC, SUPC_VREF_SEL_1V0_Val); hri_supc_set_VREF_VREFOE_bit(SUPC); @@ -302,14 +302,14 @@ float common_hal_mcu_processor_get_voltage(void) { // startup time. There is no synchronization bit to check. // See https://community.atmel.com/forum/samd51-using-intref-adc-voltage-reference mp_hal_delay_ms(1); -#endif + #endif adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); // Channel arg is ignored. adc_sync_set_inputs(&adc, - ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val, // IOVCC/4 (nominal 3.3V/4) - ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input - IGNORED_CHANNEL); // channel (ignored). + ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val, // IOVCC/4 (nominal 3.3V/4) + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored). adc_sync_enable_channel(&adc, IGNORED_CHANNEL); volatile uint16_t reading; @@ -320,13 +320,13 @@ float common_hal_mcu_processor_get_voltage(void) { // "Discard the first conversion result whenever there is a change in ADC configuration // like voltage reference / ADC channel change" // Empirical observation shows the first reading is quite different than subsequent ones. - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &reading), 2); - adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &reading), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&reading), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t *)&reading), 2); adc_sync_deinit(&adc); // Multiply by 4 to compensate for SCALEDIOVCC division by 4. return (reading / 4095.0f) * 4.0f; -#endif + #endif } uint32_t common_hal_mcu_processor_get_frequency(void) { @@ -336,16 +336,16 @@ uint32_t common_hal_mcu_processor_get_frequency(void) { void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { #ifdef SAMD21 - uint32_t* id_addresses[4] = {(uint32_t *) 0x0080A00C, (uint32_t *) 0x0080A040, - (uint32_t *) 0x0080A044, (uint32_t *) 0x0080A048}; + uint32_t *id_addresses[4] = {(uint32_t *)0x0080A00C, (uint32_t *)0x0080A040, + (uint32_t *)0x0080A044, (uint32_t *)0x0080A048}; #endif #ifdef SAM_D5X_E5X - uint32_t* id_addresses[4] = {(uint32_t *) 0x008061FC, (uint32_t *) 0x00806010, - (uint32_t *) 0x00806014, (uint32_t *) 0x00806018}; + uint32_t *id_addresses[4] = {(uint32_t *)0x008061FC, (uint32_t *)0x00806010, + (uint32_t *)0x00806014, (uint32_t *)0x00806018}; #endif - for (int i=0; i<4; i++) { - for (int k=0; k<4; k++) { + for (int i = 0; i < 4; i++) { + for (int k = 0; k < 4; k++) { raw_id[4 * i + k] = (*(id_addresses[i]) >> k * 8) & 0xff; } } diff --git a/ports/atmel-samd/common-hal/microcontroller/__init__.c b/ports/atmel-samd/common-hal/microcontroller/__init__.c index e14e66c571..751f4dcab7 100644 --- a/ports/atmel-samd/common-hal/microcontroller/__init__.c +++ b/ports/atmel-samd/common-hal/microcontroller/__init__.c @@ -99,314 +99,314 @@ const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { .type = &nvm_bytearray_type, }, .len = CIRCUITPY_INTERNAL_NVM_SIZE, - .start_address = (uint8_t*) (CIRCUITPY_INTERNAL_NVM_START_ADDR) + .start_address = (uint8_t *)(CIRCUITPY_INTERNAL_NVM_START_ADDR) }; #endif // This maps MCU pin names to pin objects. STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { -#if defined(PIN_PA00) && !defined(IGNORE_PIN_PA00) + #if defined(PIN_PA00) && !defined(IGNORE_PIN_PA00) { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, -#endif -#if defined(PIN_PA01) && !defined(IGNORE_PIN_PA01) + #endif + #if defined(PIN_PA01) && !defined(IGNORE_PIN_PA01) { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, -#endif -#if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02) + #endif + #if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02) { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, -#endif -#if defined(PIN_PA03) && !defined(IGNORE_PIN_PA03) + #endif + #if defined(PIN_PA03) && !defined(IGNORE_PIN_PA03) { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, -#endif -#if defined(PIN_PA04) && !defined(IGNORE_PIN_PA04) + #endif + #if defined(PIN_PA04) && !defined(IGNORE_PIN_PA04) { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, -#endif -#if defined(PIN_PA05) && !defined(IGNORE_PIN_PA05) + #endif + #if defined(PIN_PA05) && !defined(IGNORE_PIN_PA05) { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, -#endif -#if defined(PIN_PA06) && !defined(IGNORE_PIN_PA06) + #endif + #if defined(PIN_PA06) && !defined(IGNORE_PIN_PA06) { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, -#endif -#if defined(PIN_PA07) && !defined(IGNORE_PIN_PA07) + #endif + #if defined(PIN_PA07) && !defined(IGNORE_PIN_PA07) { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, -#endif -#if defined(PIN_PA08) && !defined(IGNORE_PIN_PA08) + #endif + #if defined(PIN_PA08) && !defined(IGNORE_PIN_PA08) { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, -#endif -#if defined(PIN_PA09) && !defined(IGNORE_PIN_PA09) + #endif + #if defined(PIN_PA09) && !defined(IGNORE_PIN_PA09) { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, -#endif -#if defined(PIN_PA10) && !defined(IGNORE_PIN_PA10) + #endif + #if defined(PIN_PA10) && !defined(IGNORE_PIN_PA10) { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, -#endif -#if defined(PIN_PA11) && !defined(IGNORE_PIN_PA11) + #endif + #if defined(PIN_PA11) && !defined(IGNORE_PIN_PA11) { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, -#endif -#if defined(PIN_PA12) && !defined(IGNORE_PIN_PA12) + #endif + #if defined(PIN_PA12) && !defined(IGNORE_PIN_PA12) { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, -#endif -#if defined(PIN_PA13) && !defined(IGNORE_PIN_PA13) + #endif + #if defined(PIN_PA13) && !defined(IGNORE_PIN_PA13) { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, -#endif -#if defined(PIN_PA14) && !defined(IGNORE_PIN_PA14) + #endif + #if defined(PIN_PA14) && !defined(IGNORE_PIN_PA14) { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, -#endif -#if defined(PIN_PA15) && !defined(IGNORE_PIN_PA15) + #endif + #if defined(PIN_PA15) && !defined(IGNORE_PIN_PA15) { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, -#endif -#if defined(PIN_PA16) && !defined(IGNORE_PIN_PA16) + #endif + #if defined(PIN_PA16) && !defined(IGNORE_PIN_PA16) { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_PA16) }, -#endif -#if defined(PIN_PA17) && !defined(IGNORE_PIN_PA17) + #endif + #if defined(PIN_PA17) && !defined(IGNORE_PIN_PA17) { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_PA17) }, -#endif -#if defined(PIN_PA18) && !defined(IGNORE_PIN_PA18) + #endif + #if defined(PIN_PA18) && !defined(IGNORE_PIN_PA18) { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_PA18) }, -#endif -#if defined(PIN_PA19) && !defined(IGNORE_PIN_PA19) + #endif + #if defined(PIN_PA19) && !defined(IGNORE_PIN_PA19) { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_PA19) }, -#endif -#if defined(PIN_PA20) && !defined(IGNORE_PIN_PA20) + #endif + #if defined(PIN_PA20) && !defined(IGNORE_PIN_PA20) { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_PA20) }, -#endif -#if defined(PIN_PA21) && !defined(IGNORE_PIN_PA21) + #endif + #if defined(PIN_PA21) && !defined(IGNORE_PIN_PA21) { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_PA21) }, -#endif -#if defined(PIN_PA22) && !defined(IGNORE_PIN_PA22) + #endif + #if defined(PIN_PA22) && !defined(IGNORE_PIN_PA22) { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_PA22) }, -#endif -#if defined(PIN_PA23) && !defined(IGNORE_PIN_PA23) + #endif + #if defined(PIN_PA23) && !defined(IGNORE_PIN_PA23) { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_PA23) }, -#endif -#if defined(PIN_PA24) && !defined(IGNORE_PIN_PA24) + #endif + #if defined(PIN_PA24) && !defined(IGNORE_PIN_PA24) { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_PA24) }, -#endif -#if defined(PIN_PA25) && !defined(IGNORE_PIN_PA25) + #endif + #if defined(PIN_PA25) && !defined(IGNORE_PIN_PA25) { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_PA25) }, -#endif -#if defined(PIN_PA27) && !defined(IGNORE_PIN_PA27) + #endif + #if defined(PIN_PA27) && !defined(IGNORE_PIN_PA27) { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_PA27) }, -#endif -#if defined(PIN_PA28) && !defined(IGNORE_PIN_PA28) + #endif + #if defined(PIN_PA28) && !defined(IGNORE_PIN_PA28) { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_PA28) }, -#endif -#if defined(PIN_PA30) && !defined(IGNORE_PIN_PA30) + #endif + #if defined(PIN_PA30) && !defined(IGNORE_PIN_PA30) { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_PA30) }, -#endif -#if defined(PIN_PA31) && !defined(IGNORE_PIN_PA31) + #endif + #if defined(PIN_PA31) && !defined(IGNORE_PIN_PA31) { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_PA31) }, -#endif + #endif -#if defined(PIN_PB00) && !defined(IGNORE_PIN_PB00) + #if defined(PIN_PB00) && !defined(IGNORE_PIN_PB00) { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, -#endif -#if defined(PIN_PB01) && !defined(IGNORE_PIN_PB01) + #endif + #if defined(PIN_PB01) && !defined(IGNORE_PIN_PB01) { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, -#endif -#if defined(PIN_PB02) && !defined(IGNORE_PIN_PB02) + #endif + #if defined(PIN_PB02) && !defined(IGNORE_PIN_PB02) { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, -#endif -#if defined(PIN_PB03) && !defined(IGNORE_PIN_PB03) + #endif + #if defined(PIN_PB03) && !defined(IGNORE_PIN_PB03) { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, -#endif -#if defined(PIN_PB04) && !defined(IGNORE_PIN_PB04) + #endif + #if defined(PIN_PB04) && !defined(IGNORE_PIN_PB04) { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, -#endif -#if defined(PIN_PB05) && !defined(IGNORE_PIN_PB05) + #endif + #if defined(PIN_PB05) && !defined(IGNORE_PIN_PB05) { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, -#endif -#if defined(PIN_PB06) && !defined(IGNORE_PIN_PB06) + #endif + #if defined(PIN_PB06) && !defined(IGNORE_PIN_PB06) { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, -#endif -#if defined(PIN_PB07) && !defined(IGNORE_PIN_PB07) + #endif + #if defined(PIN_PB07) && !defined(IGNORE_PIN_PB07) { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, -#endif -#if defined(PIN_PB08) && !defined(IGNORE_PIN_PB08) + #endif + #if defined(PIN_PB08) && !defined(IGNORE_PIN_PB08) { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, -#endif -#if defined(PIN_PB09) && !defined(IGNORE_PIN_PB09) + #endif + #if defined(PIN_PB09) && !defined(IGNORE_PIN_PB09) { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, -#endif -#if defined(PIN_PB10) && !defined(IGNORE_PIN_PB10) + #endif + #if defined(PIN_PB10) && !defined(IGNORE_PIN_PB10) { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, -#endif -#if defined(PIN_PB11) && !defined(IGNORE_PIN_PB11) + #endif + #if defined(PIN_PB11) && !defined(IGNORE_PIN_PB11) { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, -#endif -#if defined(PIN_PB12) && !defined(IGNORE_PIN_PB12) + #endif + #if defined(PIN_PB12) && !defined(IGNORE_PIN_PB12) { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, -#endif -#if defined(PIN_PB13) && !defined(IGNORE_PIN_PB13) + #endif + #if defined(PIN_PB13) && !defined(IGNORE_PIN_PB13) { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, -#endif -#if defined(PIN_PB14) && !defined(IGNORE_PIN_PB14) + #endif + #if defined(PIN_PB14) && !defined(IGNORE_PIN_PB14) { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, -#endif -#if defined(PIN_PB15) && !defined(IGNORE_PIN_PB15) + #endif + #if defined(PIN_PB15) && !defined(IGNORE_PIN_PB15) { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, -#endif -#if defined(PIN_PB16) && !defined(IGNORE_PIN_PB16) + #endif + #if defined(PIN_PB16) && !defined(IGNORE_PIN_PB16) { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, -#endif -#if defined(PIN_PB17) && !defined(IGNORE_PIN_PB17) + #endif + #if defined(PIN_PB17) && !defined(IGNORE_PIN_PB17) { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, -#endif -#if defined(PIN_PB18) && !defined(IGNORE_PIN_PB18) + #endif + #if defined(PIN_PB18) && !defined(IGNORE_PIN_PB18) { MP_ROM_QSTR(MP_QSTR_PB18), MP_ROM_PTR(&pin_PB18) }, -#endif -#if defined(PIN_PB19) && !defined(IGNORE_PIN_PB19) + #endif + #if defined(PIN_PB19) && !defined(IGNORE_PIN_PB19) { MP_ROM_QSTR(MP_QSTR_PB19), MP_ROM_PTR(&pin_PB19) }, -#endif -#if defined(PIN_PB20) && !defined(IGNORE_PIN_PB20) + #endif + #if defined(PIN_PB20) && !defined(IGNORE_PIN_PB20) { MP_ROM_QSTR(MP_QSTR_PB20), MP_ROM_PTR(&pin_PB20) }, -#endif -#if defined(PIN_PB21) && !defined(IGNORE_PIN_PB21) + #endif + #if defined(PIN_PB21) && !defined(IGNORE_PIN_PB21) { MP_ROM_QSTR(MP_QSTR_PB21), MP_ROM_PTR(&pin_PB21) }, -#endif -#if defined(PIN_PB22) && !defined(IGNORE_PIN_PB22) + #endif + #if defined(PIN_PB22) && !defined(IGNORE_PIN_PB22) { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, -#endif -#if defined(PIN_PB23) && !defined(IGNORE_PIN_PB23) + #endif + #if defined(PIN_PB23) && !defined(IGNORE_PIN_PB23) { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, -#endif -#if defined(PIN_PB24) && !defined(IGNORE_PIN_PB24) + #endif + #if defined(PIN_PB24) && !defined(IGNORE_PIN_PB24) { MP_ROM_QSTR(MP_QSTR_PB24), MP_ROM_PTR(&pin_PB24) }, -#endif -#if defined(PIN_PB25) && !defined(IGNORE_PIN_PB25) + #endif + #if defined(PIN_PB25) && !defined(IGNORE_PIN_PB25) { MP_ROM_QSTR(MP_QSTR_PB25), MP_ROM_PTR(&pin_PB25) }, -#endif -#if defined(PIN_PB26) && !defined(IGNORE_PIN_PB26) + #endif + #if defined(PIN_PB26) && !defined(IGNORE_PIN_PB26) { MP_ROM_QSTR(MP_QSTR_PB26), MP_ROM_PTR(&pin_PB26) }, -#endif -#if defined(PIN_PB27) && !defined(IGNORE_PIN_PB27) + #endif + #if defined(PIN_PB27) && !defined(IGNORE_PIN_PB27) { MP_ROM_QSTR(MP_QSTR_PB27), MP_ROM_PTR(&pin_PB27) }, -#endif -#if defined(PIN_PB28) && !defined(IGNORE_PIN_PB28) + #endif + #if defined(PIN_PB28) && !defined(IGNORE_PIN_PB28) { MP_ROM_QSTR(MP_QSTR_PB28), MP_ROM_PTR(&pin_PB28) }, -#endif -#if defined(PIN_PB29) && !defined(IGNORE_PIN_PB29) + #endif + #if defined(PIN_PB29) && !defined(IGNORE_PIN_PB29) { MP_ROM_QSTR(MP_QSTR_PB29), MP_ROM_PTR(&pin_PB29) }, -#endif -#if defined(PIN_PB30) && !defined(IGNORE_PIN_PB30) + #endif + #if defined(PIN_PB30) && !defined(IGNORE_PIN_PB30) { MP_ROM_QSTR(MP_QSTR_PB30), MP_ROM_PTR(&pin_PB30) }, -#endif -#if defined(PIN_PB31) && !defined(IGNORE_PIN_PB31) + #endif + #if defined(PIN_PB31) && !defined(IGNORE_PIN_PB31) { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_PB31) }, -#endif + #endif -#if defined(PIN_PC00) && !defined(IGNORE_PIN_PC00) + #if defined(PIN_PC00) && !defined(IGNORE_PIN_PC00) { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, -#endif -#if defined(PIN_PC01) && !defined(IGNORE_PIN_PC01) + #endif + #if defined(PIN_PC01) && !defined(IGNORE_PIN_PC01) { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, -#endif -#if defined(PIN_PC02) && !defined(IGNORE_PIN_PC02) + #endif + #if defined(PIN_PC02) && !defined(IGNORE_PIN_PC02) { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, -#endif -#if defined(PIN_PC03) && !defined(IGNORE_PIN_PC03) + #endif + #if defined(PIN_PC03) && !defined(IGNORE_PIN_PC03) { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, -#endif -#if defined(PIN_PC04) && !defined(IGNORE_PIN_PC04) + #endif + #if defined(PIN_PC04) && !defined(IGNORE_PIN_PC04) { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, -#endif -#if defined(PIN_PC05) && !defined(IGNORE_PIN_PC05) + #endif + #if defined(PIN_PC05) && !defined(IGNORE_PIN_PC05) { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, -#endif -#if defined(PIN_PC06) && !defined(IGNORE_PIN_PC06) + #endif + #if defined(PIN_PC06) && !defined(IGNORE_PIN_PC06) { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, -#endif -#if defined(PIN_PC07) && !defined(IGNORE_PIN_PC07) + #endif + #if defined(PIN_PC07) && !defined(IGNORE_PIN_PC07) { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, -#endif -#if defined(PIN_PC10) && !defined(IGNORE_PIN_PC10) + #endif + #if defined(PIN_PC10) && !defined(IGNORE_PIN_PC10) { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, -#endif -#if defined(PIN_PC11) && !defined(IGNORE_PIN_PC11) + #endif + #if defined(PIN_PC11) && !defined(IGNORE_PIN_PC11) { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, -#endif -#if defined(PIN_PC12) && !defined(IGNORE_PIN_PC12) + #endif + #if defined(PIN_PC12) && !defined(IGNORE_PIN_PC12) { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, -#endif -#if defined(PIN_PC13) && !defined(IGNORE_PIN_PC13) + #endif + #if defined(PIN_PC13) && !defined(IGNORE_PIN_PC13) { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, -#endif -#if defined(PIN_PC14) && !defined(IGNORE_PIN_PC14) + #endif + #if defined(PIN_PC14) && !defined(IGNORE_PIN_PC14) { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, -#endif -#if defined(PIN_PC15) && !defined(IGNORE_PIN_PC15) + #endif + #if defined(PIN_PC15) && !defined(IGNORE_PIN_PC15) { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, -#endif -#if defined(PIN_PC16) && !defined(IGNORE_PIN_PC16) + #endif + #if defined(PIN_PC16) && !defined(IGNORE_PIN_PC16) { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_PC16) }, -#endif -#if defined(PIN_PC17) && !defined(IGNORE_PIN_PC17) + #endif + #if defined(PIN_PC17) && !defined(IGNORE_PIN_PC17) { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_PC17) }, -#endif -#if defined(PIN_PC18) && !defined(IGNORE_PIN_PC18) + #endif + #if defined(PIN_PC18) && !defined(IGNORE_PIN_PC18) { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_PC18) }, -#endif -#if defined(PIN_PC19) && !defined(IGNORE_PIN_PC19) + #endif + #if defined(PIN_PC19) && !defined(IGNORE_PIN_PC19) { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_PC19) }, -#endif -#if defined(PIN_PC20) && !defined(IGNORE_PIN_PC20) + #endif + #if defined(PIN_PC20) && !defined(IGNORE_PIN_PC20) { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_PC20) }, -#endif -#if defined(PIN_PC21) && !defined(IGNORE_PIN_PC21) + #endif + #if defined(PIN_PC21) && !defined(IGNORE_PIN_PC21) { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_PC21) }, -#endif -#if defined(PIN_PC22) && !defined(IGNORE_PIN_PC22) + #endif + #if defined(PIN_PC22) && !defined(IGNORE_PIN_PC22) { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, -#endif -#if defined(PIN_PC23) && !defined(IGNORE_PIN_PC23) + #endif + #if defined(PIN_PC23) && !defined(IGNORE_PIN_PC23) { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) }, -#endif -#if defined(PIN_PC24) && !defined(IGNORE_PIN_PC24) + #endif + #if defined(PIN_PC24) && !defined(IGNORE_PIN_PC24) { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_PC24) }, -#endif -#if defined(PIN_PC25) && !defined(IGNORE_PIN_PC25) + #endif + #if defined(PIN_PC25) && !defined(IGNORE_PIN_PC25) { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_PC25) }, -#endif -#if defined(PIN_PC26) && !defined(IGNORE_PIN_PC26) + #endif + #if defined(PIN_PC26) && !defined(IGNORE_PIN_PC26) { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_PC26) }, -#endif -#if defined(PIN_PC27) && !defined(IGNORE_PIN_PC27) + #endif + #if defined(PIN_PC27) && !defined(IGNORE_PIN_PC27) { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_PC27) }, -#endif -#if defined(PIN_PC28) && !defined(IGNORE_PIN_PC28) + #endif + #if defined(PIN_PC28) && !defined(IGNORE_PIN_PC28) { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_PC28) }, -#endif -#if defined(PIN_PC30) && !defined(IGNORE_PIN_PC30) + #endif + #if defined(PIN_PC30) && !defined(IGNORE_PIN_PC30) { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) }, -#endif -#if defined(PIN_PC31) && !defined(IGNORE_PIN_PC31) + #endif + #if defined(PIN_PC31) && !defined(IGNORE_PIN_PC31) { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) }, -#endif + #endif -#if defined(PIN_PD00) && !defined(IGNORE_PIN_PD00) + #if defined(PIN_PD00) && !defined(IGNORE_PIN_PD00) { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, -#endif -#if defined(PIN_PD01) && !defined(IGNORE_PIN_PD01) + #endif + #if defined(PIN_PD01) && !defined(IGNORE_PIN_PD01) { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, -#endif -#if defined(PIN_PD08) && !defined(IGNORE_PIN_PD08) + #endif + #if defined(PIN_PD08) && !defined(IGNORE_PIN_PD08) { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, -#endif -#if defined(PIN_PD09) && !defined(IGNORE_PIN_PD09) + #endif + #if defined(PIN_PD09) && !defined(IGNORE_PIN_PD09) { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, -#endif -#if defined(PIN_PD10) && !defined(IGNORE_PIN_PD10) + #endif + #if defined(PIN_PD10) && !defined(IGNORE_PIN_PD10) { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, -#endif -#if defined(PIN_PD11) && !defined(IGNORE_PIN_PD11) + #endif + #if defined(PIN_PD11) && !defined(IGNORE_PIN_PD11) { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, -#endif -#if defined(PIN_PD12) && !defined(IGNORE_PIN_PD12) + #endif + #if defined(PIN_PD12) && !defined(IGNORE_PIN_PD12) { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, -#endif -#if defined(PIN_PD20) && !defined(IGNORE_PIN_PD20) + #endif + #if defined(PIN_PD20) && !defined(IGNORE_PIN_PD20) { MP_ROM_QSTR(MP_QSTR_PD20), MP_ROM_PTR(&pin_PD20) }, -#endif -#if defined(PIN_PD21) && !defined(IGNORE_PIN_PD21) + #endif + #if defined(PIN_PD21) && !defined(IGNORE_PIN_PD21) { MP_ROM_QSTR(MP_QSTR_PD21), MP_ROM_PTR(&pin_PD21) }, -#endif + #endif }; MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c index 6f2090b983..4677437f90 100644 --- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c +++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c @@ -44,71 +44,72 @@ __attribute__((naked,noinline,aligned(16))) static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMask, - const uint8_t *ptr, int numBytes); + const uint8_t *ptr, int numBytes); static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMask, - const uint8_t *ptr, int numBytes) { - asm volatile(" push {r4, r5, r6, lr};" - " add r3, r2, r3;" - "loopLoad:" - " ldrb r5, [r2, #0];" // r5 := *ptr - " add r2, #1;" // ptr++ - " movs r4, #128;" // r4-mask, 0x80 - "loopBit:" - " str r1, [r0, #4];" // set - #ifdef SAMD21 - " movs r6, #3; d2: sub r6, #1; bne d2;" // delay 3 - #endif - #ifdef SAM_D5X_E5X - " movs r6, #3; d2: subs r6, #1; bne d2;" // delay 3 - #endif - " tst r4, r5;" // mask&r5 - " bne skipclr;" - " str r1, [r0, #0];" // clr - "skipclr:" - #ifdef SAMD21 - " movs r6, #6; d0: sub r6, #1; bne d0;" // delay 6 - #endif - #ifdef SAM_D5X_E5X - " movs r6, #6; d0: subs r6, #1; bne d0;" // delay 6 - #endif - " str r1, [r0, #0];" // clr (possibly again, doesn't matter) - #ifdef SAMD21 - " asr r4, r4, #1;" // mask >>= 1 - #endif - #ifdef SAM_D5X_E5X - " asrs r4, r4, #1;" // mask >>= 1 - #endif - " beq nextbyte;" - " uxtb r4, r4;" - #ifdef SAMD21 - " movs r6, #2; d1: sub r6, #1; bne d1;" // delay 2 - #endif - #ifdef SAM_D5X_E5X - " movs r6, #2; d1: subs r6, #1; bne d1;" // delay 2 - #endif - " b loopBit;" - "nextbyte:" - " cmp r2, r3;" - " bcs neopixel_stop;" - " b loopLoad;" - "neopixel_stop:" - " pop {r4, r5, r6, pc};" - ""); + const uint8_t *ptr, int numBytes) { + asm volatile (" push {r4, r5, r6, lr};" + " add r3, r2, r3;" + "loopLoad:" + " ldrb r5, [r2, #0];" // r5 := *ptr + " add r2, #1;" // ptr++ + " movs r4, #128;" // r4-mask, 0x80 + "loopBit:" + " str r1, [r0, #4];" // set + #ifdef SAMD21 + " movs r6, #3; d2: sub r6, #1; bne d2;" // delay 3 + #endif + #ifdef SAM_D5X_E5X + " movs r6, #3; d2: subs r6, #1; bne d2;" // delay 3 + #endif + " tst r4, r5;" // mask&r5 + " bne skipclr;" + " str r1, [r0, #0];" // clr + "skipclr:" + #ifdef SAMD21 + " movs r6, #6; d0: sub r6, #1; bne d0;" // delay 6 + #endif + #ifdef SAM_D5X_E5X + " movs r6, #6; d0: subs r6, #1; bne d0;" // delay 6 + #endif + " str r1, [r0, #0];" // clr (possibly again, doesn't matter) + #ifdef SAMD21 + " asr r4, r4, #1;" // mask >>= 1 + #endif + #ifdef SAM_D5X_E5X + " asrs r4, r4, #1;" // mask >>= 1 + #endif + " beq nextbyte;" + " uxtb r4, r4;" + #ifdef SAMD21 + " movs r6, #2; d1: sub r6, #1; bne d1;" // delay 2 + #endif + #ifdef SAM_D5X_E5X + " movs r6, #2; d1: subs r6, #1; bne d1;" // delay 2 + #endif + " b loopBit;" + "nextbyte:" + " cmp r2, r3;" + " bcs neopixel_stop;" + " b loopLoad;" + "neopixel_stop:" + " pop {r4, r5, r6, pc};" + ""); } uint64_t next_start_raw_ticks = 0; -void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { +void common_hal_neopixel_write(const digitalio_digitalinout_obj_t *digitalinout, uint8_t *pixels, uint32_t numBytes) { // This is adapted directly from the Adafruit NeoPixel library SAMD21G18A code: // https://github.com/adafruit/Adafruit_NeoPixel/blob/master/Adafruit_NeoPixel.cpp // and the asm version from https://github.com/microsoft/uf2-samdx1/blob/master/inc/neopixel.h - uint32_t pinMask; - PortGroup* port; + uint32_t pinMask; + PortGroup *port; // Wait to make sure we don't append onto the last transmission. This should only be a tick or // two. - while (port_get_raw_ticks(NULL) < next_start_raw_ticks) {} + while (port_get_raw_ticks(NULL) < next_start_raw_ticks) { + } // Turn off interrupts of any kind during timing-sensitive code. mp_hal_disable_all_interrupts(); @@ -136,8 +137,8 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, #endif uint32_t pin = digitalinout->pin->number; - port = &PORT->Group[GPIO_PORT(pin)]; // Convert GPIO # to port register - pinMask = (1UL << (pin % 32)); // From port_pin_set_output_level ASF code. + port = &PORT->Group[GPIO_PORT(pin)]; // Convert GPIO # to port register + pinMask = (1UL << (pin % 32)); // From port_pin_set_output_level ASF code. volatile uint32_t *clr = &(port->OUTCLR.reg); neopixel_send_buffer_core(clr, pinMask, pixels, numBytes); diff --git a/ports/atmel-samd/common-hal/nvm/ByteArray.c b/ports/atmel-samd/common-hal/nvm/ByteArray.c index ac896a9d52..9d711d3413 100644 --- a/ports/atmel-samd/common-hal/nvm/ByteArray.c +++ b/ports/atmel-samd/common-hal/nvm/ByteArray.c @@ -38,18 +38,18 @@ uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { } bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, - uint32_t start_index, uint8_t* values, uint32_t len) { + uint32_t start_index, uint8_t *values, uint32_t len) { // We don't use features that use any advanced NVMCTRL features so we can fake the descriptor // whenever we need it instead of storing it long term. struct flash_descriptor desc; desc.dev.hw = NVMCTRL; - bool status = flash_write(&desc, (uint32_t) self->start_address + start_index, values, len) == ERR_NONE; + bool status = flash_write(&desc, (uint32_t)self->start_address + start_index, values, len) == ERR_NONE; assert_heap_ok(); return status; } // NVM memory is memory mapped so reading it is easy. void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, - uint32_t start_index, uint32_t len, uint8_t* values) { + uint32_t start_index, uint32_t len, uint8_t *values) { memcpy(values, self->start_address + start_index, len); } diff --git a/ports/atmel-samd/common-hal/nvm/ByteArray.h b/ports/atmel-samd/common-hal/nvm/ByteArray.h index f6a816cb9d..28c6d0e510 100644 --- a/ports/atmel-samd/common-hal/nvm/ByteArray.h +++ b/ports/atmel-samd/common-hal/nvm/ByteArray.h @@ -31,7 +31,7 @@ typedef struct { mp_obj_base_t base; - uint8_t* start_address; + uint8_t *start_address; uint32_t len; } nvm_bytearray_obj_t; diff --git a/ports/atmel-samd/common-hal/os/__init__.c b/ports/atmel-samd/common-hal/os/__init__.c index c151b105a8..6c554bff30 100644 --- a/ports/atmel-samd/common-hal/os/__init__.c +++ b/ports/atmel-samd/common-hal/os/__init__.c @@ -60,13 +60,13 @@ STATIC MP_DEFINE_ATTRTUPLE( (mp_obj_t)&os_uname_info_release_obj, (mp_obj_t)&os_uname_info_version_obj, (mp_obj_t)&os_uname_info_machine_obj -); + ); mp_obj_t common_hal_os_uname(void) { return (mp_obj_t)&os_uname_info_obj; } -bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { +bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { #ifdef SAM_D5X_E5X hri_mclk_set_APBCMASK_TRNG_bit(MCLK); struct rand_sync_desc random; diff --git a/ports/atmel-samd/common-hal/ps2io/Ps2.c b/ports/atmel-samd/common-hal/ps2io/Ps2.c index 2579142ad0..f07cadf417 100644 --- a/ports/atmel-samd/common-hal/ps2io/Ps2.c +++ b/ports/atmel-samd/common-hal/ps2io/Ps2.c @@ -63,18 +63,18 @@ #define ERROR_TX_RTS 0x1000 #define ERROR_TX_NORESP 0x2000 -static void ps2_set_config(ps2io_ps2_obj_t* self) { +static void ps2_set_config(ps2io_ps2_obj_t *self) { uint32_t sense_setting = EIC_CONFIG_SENSE0_FALL_Val; set_eic_handler(self->channel, EIC_HANDLER_PS2); turn_on_eic_channel(self->channel, sense_setting); } -static void disable_interrupt(ps2io_ps2_obj_t* self) { +static void disable_interrupt(ps2io_ps2_obj_t *self) { uint32_t mask = 1 << self->channel; EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; } -static void resume_interrupt(ps2io_ps2_obj_t* self) { +static void resume_interrupt(ps2io_ps2_obj_t *self) { disable_interrupt(self); self->state = STATE_IDLE; @@ -86,14 +86,14 @@ static void resume_interrupt(ps2io_ps2_obj_t* self) { ps2_set_config(self); } -static void clk_hi(ps2io_ps2_obj_t* self) { +static void clk_hi(ps2io_ps2_obj_t *self) { // External pull-up // Must set pull after setting direction. gpio_set_pin_direction(self->clk_pin, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(self->clk_pin, GPIO_PULL_OFF); } -static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) { +static bool wait_clk_lo(ps2io_ps2_obj_t *self, uint32_t us) { clk_hi(self); common_hal_mcu_delay_us(1); while (gpio_get_pin_level(self->clk_pin) && us) { @@ -103,7 +103,7 @@ static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) { return us; } -static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) { +static bool wait_clk_hi(ps2io_ps2_obj_t *self, uint32_t us) { clk_hi(self); common_hal_mcu_delay_us(1); while (!gpio_get_pin_level(self->clk_pin) && us) { @@ -113,19 +113,19 @@ static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) { return us; } -static void clk_lo(ps2io_ps2_obj_t* self) { +static void clk_lo(ps2io_ps2_obj_t *self) { gpio_set_pin_pull_mode(self->clk_pin, GPIO_PULL_OFF); gpio_set_pin_direction(self->clk_pin, GPIO_DIRECTION_OUT); gpio_set_pin_level(self->clk_pin, 0); } -static void data_hi(ps2io_ps2_obj_t* self) { +static void data_hi(ps2io_ps2_obj_t *self) { // External pull-up gpio_set_pin_direction(self->data_pin, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(self->data_pin, GPIO_PULL_OFF); } -static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) { +static bool wait_data_lo(ps2io_ps2_obj_t *self, uint32_t us) { data_hi(self); common_hal_mcu_delay_us(1); while (gpio_get_pin_level(self->data_pin) && us) { @@ -135,7 +135,7 @@ static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) { return us; } -static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) { +static bool wait_data_hi(ps2io_ps2_obj_t *self, uint32_t us) { data_hi(self); common_hal_mcu_delay_us(1); while (!gpio_get_pin_level(self->data_pin) && us) { @@ -145,18 +145,18 @@ static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) { return us; } -static void data_lo(ps2io_ps2_obj_t* self) { +static void data_lo(ps2io_ps2_obj_t *self) { gpio_set_pin_pull_mode(self->data_pin, GPIO_PULL_OFF); gpio_set_pin_direction(self->data_pin, GPIO_DIRECTION_OUT); gpio_set_pin_level(self->data_pin, 0); } -static void idle(ps2io_ps2_obj_t* self) { +static void idle(ps2io_ps2_obj_t *self) { clk_hi(self); data_hi(self); } -static void inhibit(ps2io_ps2_obj_t* self) { +static void inhibit(ps2io_ps2_obj_t *self) { clk_lo(self); data_hi(self); } @@ -169,7 +169,7 @@ void ps2_interrupt_handler(uint8_t channel) { // Grab the current time first. uint64_t current_tick = port_get_raw_ticks(NULL); - ps2io_ps2_obj_t* self = get_eic_channel_data(channel); + ps2io_ps2_obj_t *self = get_eic_channel_data(channel); int data_bit = gpio_get_pin_level(self->data_pin) ? 1 : 0; // test for timeout @@ -192,7 +192,7 @@ void ps2_interrupt_handler(uint8_t channel) { // start bit should be 0 self->last_errors |= ERROR_STARTBIT; self->state = STATE_RECV_ERR; - } else { + } else { self->state = STATE_RECV; } @@ -220,7 +220,7 @@ void ps2_interrupt_handler(uint8_t channel) { } else if (self->state == STATE_RECV_STOP) { ++self->bitcount; - if (! data_bit) { + if (!data_bit) { self->last_errors |= ERROR_STOPBIT; } else if (self->waiting_cmd_response) { self->cmd_response = self->bits; @@ -242,8 +242,8 @@ void ps2_interrupt_handler(uint8_t channel) { } } -void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, - const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) { +void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t *self, + const mcu_pin_obj_t *data_pin, const mcu_pin_obj_t *clk_pin) { if (!clk_pin->has_extint) { mp_raise_RuntimeError(translate("No hardware support on clk pin")); } @@ -263,7 +263,7 @@ void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, self->bufposw = 0; self->waiting_cmd_response = false; - set_eic_channel_data(clk_pin->extint_channel, (void*) self); + set_eic_channel_data(clk_pin->extint_channel, (void *)self); // Check to see if the EIC is enabled and start it up if its not.' if (eic_get_enable() == 0) { @@ -282,11 +282,11 @@ void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, ps2_set_config(self); } -bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) { +bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t *self) { return self->clk_pin == NO_PIN; } -void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { +void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t *self) { if (common_hal_ps2io_ps2_deinited(self)) { return; } @@ -298,17 +298,16 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { self->data_pin = NO_PIN; } -uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) { +uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t *self) { return self->bufcount; } -bool common_hal_ps2io_ps2_get_paused(ps2io_ps2_obj_t* self) { +bool common_hal_ps2io_ps2_get_paused(ps2io_ps2_obj_t *self) { uint32_t mask = 1 << self->channel; return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; } -int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self) -{ +int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t *self) { common_hal_mcu_disable_interrupts(); if (self->bufcount <= 0) { common_hal_mcu_enable_interrupts(); @@ -321,8 +320,7 @@ int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self) return b; } -uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) -{ +uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t *self) { common_hal_mcu_disable_interrupts(); uint16_t errors = self->last_errors; self->last_errors = 0; @@ -333,8 +331,7 @@ uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) // Based upon TMK implementation of PS/2 protocol // https://github.com/tmk/tmk_keyboard/blob/master/tmk_core/protocol/ps2_interrupt.c -int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) -{ +int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t *self, uint8_t b) { disable_interrupt(self); inhibit(self); delay_us(100); diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 20c79642a3..49cef92478 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -54,16 +54,20 @@ volatile static uint32_t overflow_count = 0; volatile static uint32_t start_overflow = 0; void pulsein_timer_interrupt_handler(uint8_t index) { - if (index != pulsein_tc_index) return; + if (index != pulsein_tc_index) { + return; + } overflow_count++; - Tc* tc = tc_insts[index]; - if (!tc->COUNT16.INTFLAG.bit.OVF) return; + Tc *tc = tc_insts[index]; + if (!tc->COUNT16.INTFLAG.bit.OVF) { + return; + } // Clear the interrupt bit. tc->COUNT16.INTFLAG.reg = TC_INTFLAG_OVF; } -static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { +static void pulsein_set_config(pulseio_pulsein_obj_t *self, bool first_edge) { uint32_t sense_setting; if (!first_edge) { sense_setting = EIC_CONFIG_SENSE0_BOTH_Val; @@ -83,16 +87,17 @@ void pulsein_interrupt_handler(uint8_t channel) { common_hal_mcu_disable_interrupts(); // Grab the current time first. uint32_t current_overflow = overflow_count; - Tc* tc = tc_insts[pulsein_tc_index]; + Tc *tc = tc_insts[pulsein_tc_index]; #ifdef SAM_D5X_E5X tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC; while (tc->COUNT16.SYNCBUSY.bit.COUNT == 1 || - tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_READSYNC_Val) {} + tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_READSYNC_Val) { + } #endif uint32_t current_count = tc->COUNT16.COUNT.reg; - pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); - if (self->len == 0 ) { + pulseio_pulsein_obj_t *self = get_eic_channel_data(channel); + if (self->len == 0) { start_overflow = overflow_count; } if (self->first_edge) { @@ -114,7 +119,7 @@ void pulsein_interrupt_handler(uint8_t channel) { if (total_diff < duration) { duration = total_diff; } - //check if the input is taking too long, 15 timer overflows is approx 1 second + // check if the input is taking too long, 15 timer overflows is approx 1 second if (current_overflow - start_overflow > 15) { self->errored_too_fast = true; common_hal_pulseio_pulsein_pause(self); @@ -136,16 +141,16 @@ void pulsein_interrupt_handler(uint8_t channel) { } void pulsein_reset() { -#ifdef SAMD21 + #ifdef SAMD21 rtc_end_pulse(); -#endif + #endif refcount = 0; pulsein_tc_index = 0xff; overflow_count = 0; } -void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, - const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t *self, + const mcu_pin_obj_t *pin, uint16_t maxlen, bool idle_state) { if (!pin->has_extint) { mp_raise_RuntimeError(translate("No hardware support on pin")); } @@ -153,7 +158,7 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, mp_raise_RuntimeError(translate("EXTINT channel already in use")); } - self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); + self->buffer = (uint16_t *)m_malloc(maxlen * sizeof(uint16_t), false); if (self->buffer == NULL) { mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); } @@ -196,8 +201,8 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, #ifdef SAMD21 tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | - TC_CTRLA_PRESCALER_DIV16 | - TC_CTRLA_WAVEGEN_NFRQ; + TC_CTRLA_PRESCALER_DIV16 | + TC_CTRLA_WAVEGEN_NFRQ; #endif #ifdef SAM_D5X_E5X tc_reset(tc); @@ -220,7 +225,7 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, self->last_overflow = overflow_count; self->last_count = 0; - set_eic_channel_data(pin->extint_channel, (void*) self); + set_eic_channel_data(pin->extint_channel, (void *)self); // Check to see if the EIC is enabled and start it up if its not.' if (eic_get_enable() == 0) { @@ -235,23 +240,23 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, // Set config will enable the EIC. pulsein_set_config(self, true); -#ifdef SAMD21 + #ifdef SAMD21 rtc_start_pulse(); -#endif + #endif } -bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t *self) { return self->pin == NO_PIN; } -void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t *self) { if (common_hal_pulseio_pulsein_deinited(self)) { return; } -#ifdef SAMD21 + #ifdef SAMD21 rtc_end_pulse(); -#endif + #endif set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); turn_off_eic_channel(self->channel); reset_pin_number(self->pin); @@ -264,13 +269,13 @@ void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { self->pin = NO_PIN; } -void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t *self) { uint32_t mask = 1 << self->channel; EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; } -void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, - uint16_t trigger_duration) { +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t *self, + uint16_t trigger_duration) { // Make sure we're paused. common_hal_pulseio_pulsein_pause(self); @@ -297,20 +302,20 @@ void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, pulsein_set_config(self, true); } -void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t *self) { common_hal_mcu_disable_interrupts(); self->start = 0; self->len = 0; common_hal_mcu_enable_interrupts(); } -uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t *self) { if (self->len == 0) { mp_raise_IndexError_varg(translate("pop from empty %q"), MP_QSTR_PulseIn); } if (self->errored_too_fast) { - self->errored_too_fast = 0; - mp_raise_RuntimeError(translate("Input taking too long")); + self->errored_too_fast = 0; + mp_raise_RuntimeError(translate("Input taking too long")); } common_hal_mcu_disable_interrupts(); uint16_t value = self->buffer[self->start]; @@ -320,21 +325,21 @@ uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { return value; } -uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t *self) { return self->maxlen; } -uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t *self) { return self->len; } -bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t *self) { uint32_t mask = 1 << self->channel; return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; } -uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, - int16_t index) { +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t *self, + int16_t index) { common_hal_mcu_disable_interrupts(); if (index < 0) { index += self->len; diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.h b/ports/atmel-samd/common-hal/pulseio/PulseIn.h index e8fed8e5a0..81780aa130 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.h +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.h @@ -35,7 +35,7 @@ typedef struct { mp_obj_base_t base; uint8_t channel; uint8_t pin; - uint16_t* buffer; + uint16_t *buffer; uint16_t maxlen; bool idle_state; volatile uint16_t start; diff --git a/ports/atmel-samd/common-hal/pulseio/PulseOut.c b/ports/atmel-samd/common-hal/pulseio/PulseOut.c index ebfd4e7b1a..56b5f036ed 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseOut.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseOut.c @@ -51,11 +51,11 @@ static volatile uint16_t pulse_index = 0; static uint16_t pulse_length; static volatile uint32_t current_compare = 0; -static void turn_on(__IO PORT_PINCFG_Type * pincfg) { +static void turn_on(__IO PORT_PINCFG_Type *pincfg) { pincfg->reg = PORT_PINCFG_PMUXEN; } -static void turn_off(__IO PORT_PINCFG_Type * pincfg) { +static void turn_off(__IO PORT_PINCFG_Type *pincfg) { pincfg->reg = PORT_PINCFG_RESETVALUE; } @@ -71,7 +71,7 @@ void pulse_finish(void) { return; } current_compare = (current_compare + pulse_buffer[pulse_index] * 3 / 4) & 0xffff; - Tc* tc = tc_insts[pulseout_tc_index]; + Tc *tc = tc_insts[pulseout_tc_index]; tc->COUNT16.CC[0].reg = current_compare; if (pulse_index % 2 == 0) { turn_on(active_pincfg); @@ -79,9 +79,13 @@ void pulse_finish(void) { } void pulseout_interrupt_handler(uint8_t index) { - if (index != pulseout_tc_index) return; - Tc* tc = tc_insts[index]; - if (!tc->COUNT16.INTFLAG.bit.MC0) return; + if (index != pulseout_tc_index) { + return; + } + Tc *tc = tc_insts[index]; + if (!tc->COUNT16.INTFLAG.bit.MC0) { + return; + } pulse_finish(); @@ -93,16 +97,16 @@ void pulseout_reset() { refcount = 0; pulseout_tc_index = 0xff; active_pincfg = NULL; -#ifdef SAMD21 + #ifdef SAMD21 rtc_end_pulse(); -#endif + #endif } -void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, - const pwmio_pwmout_obj_t* carrier, - const mcu_pin_obj_t* pin, - uint32_t frequency, - uint16_t duty_cycle) { +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t *self, + const pwmio_pwmout_obj_t *carrier, + const mcu_pin_obj_t *pin, + uint32_t frequency, + uint16_t duty_cycle) { if (!carrier || pin || frequency) { mp_raise_NotImplementedError(translate("Port does not accept pins or frequency. Construct and pass a PWMOut Carrier instead")); } @@ -136,8 +140,8 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, #ifdef SAMD21 tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | - TC_CTRLA_PRESCALER_DIV64 | - TC_CTRLA_WAVEGEN_NFRQ; + TC_CTRLA_PRESCALER_DIV64 | + TC_CTRLA_WAVEGEN_NFRQ; #endif #ifdef SAM_D5X_E5X tc_reset(tc); @@ -162,17 +166,17 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, // Turn off the pinmux which should connect the port output. turn_off(self->pincfg); -#ifdef SAMD21 + #ifdef SAMD21 rtc_start_pulse(); -#endif + #endif } -bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t *self) { return self->pin == NO_PIN; } -void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t *self) { if (common_hal_pulseio_pulseout_deinited(self)) { return; } @@ -187,12 +191,12 @@ void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { pulseout_tc_index = 0xff; } self->pin = NO_PIN; -#ifdef SAMD21 + #ifdef SAMD21 rtc_end_pulse(); -#endif + #endif } -void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t *self, uint16_t *pulses, uint16_t length) { if (active_pincfg != NULL) { mp_raise_RuntimeError(translate("Another send is already active")); } @@ -202,7 +206,7 @@ void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pu pulse_length = length; current_compare = pulses[0] * 3 / 4; - Tc* tc = tc_insts[pulseout_tc_index]; + Tc *tc = tc_insts[pulseout_tc_index]; tc->COUNT16.CC[0].reg = current_compare; // Clear our interrupt in case it was set earlier @@ -212,7 +216,7 @@ void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pu turn_on(active_pincfg); tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; - while(pulse_index < length) { + while (pulse_index < length) { // Do other things while we wait. The interrupts will handle sending the // signal. RUN_BACKGROUND_TASKS; diff --git a/ports/atmel-samd/common-hal/pwmio/PWMOut.c b/ports/atmel-samd/common-hal/pwmio/PWMOut.c index c46145d7d7..815f1a7fe0 100644 --- a/ports/atmel-samd/common-hal/pwmio/PWMOut.c +++ b/ports/atmel-samd/common-hal/pwmio/PWMOut.c @@ -42,8 +42,8 @@ #undef ENABLE -# define _TCC_SIZE(unused, n) TCC ## n ## _SIZE, -# define TCC_SIZES { REPEAT_MACRO(_TCC_SIZE, 0, TCC_INST_NUM) } +#define _TCC_SIZE(unused, n) TCC##n##_SIZE, +#define TCC_SIZES { REPEAT_MACRO(_TCC_SIZE, 0, TCC_INST_NUM) } static const uint8_t tcc_sizes[TCC_INST_NUM] = TCC_SIZES; static uint32_t tcc_periods[TCC_INST_NUM]; @@ -126,38 +126,38 @@ void pwmout_reset(void) { } } -static uint8_t tcc_channel(const pin_timer_t* t) { +static uint8_t tcc_channel(const pin_timer_t *t) { // For the SAMD51 this hardcodes the use of OTMX == 0x0, the output matrix mapping, which uses // SAMD21-style modulo mapping. return t->wave_output % tcc_cc_num[t->index]; } -bool channel_ok(const pin_timer_t* t) { +bool channel_ok(const pin_timer_t *t) { uint8_t channel_bit = 1 << tcc_channel(t); return (!t->is_tc && ((tcc_channels[t->index] & channel_bit) == 0)) || - t->is_tc; + t->is_tc; } -pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, - const mcu_pin_obj_t* pin, - uint16_t duty, - uint32_t frequency, - bool variable_frequency) { +pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self, + const mcu_pin_obj_t *pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { self->pin = pin; self->variable_frequency = variable_frequency; self->duty_cycle = duty; if (pin->timer[0].index >= TC_INST_NUM && pin->timer[1].index >= TCC_INST_NUM -#ifdef SAM_D5X_E5X + #ifdef SAM_D5X_E5X && pin->timer[2].index >= TCC_INST_NUM -#endif + #endif ) { return PWMOUT_INVALID_PIN; } uint32_t system_clock = common_hal_mcu_processor_get_frequency(); - if (frequency == 0 || frequency > system_clock/2) { + if (frequency == 0 || frequency > system_clock / 2) { return PWMOUT_INVALID_FREQUENCY; } @@ -165,7 +165,7 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, // First see if a tcc is already going with the frequency we want and our // channel is unused. tc's don't have enough channels to share. - const pin_timer_t* timer = NULL; + const pin_timer_t *timer = NULL; uint8_t mux_position = 0; if (!variable_frequency) { for (uint8_t i = 0; i < TCC_INST_NUM && timer == NULL; i++) { @@ -173,11 +173,11 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, continue; } for (uint8_t j = 0; j < NUM_TIMERS_PER_PIN && timer == NULL; j++) { - const pin_timer_t* t = &pin->timer[j]; + const pin_timer_t *t = &pin->timer[j]; if (t->index != i || t->is_tc || t->index >= TCC_INST_NUM) { continue; } - Tcc* tcc = tcc_insts[t->index]; + Tcc *tcc = tcc_insts[t->index]; if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) { timer = t; mux_position = j; @@ -202,20 +202,20 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, start = 0; } for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) { - const pin_timer_t* t = &pin->timer[i]; + const pin_timer_t *t = &pin->timer[i]; if ((!t->is_tc && t->index >= TCC_INST_NUM) || (t->is_tc && t->index >= TC_INST_NUM)) { continue; } if (t->is_tc) { found = true; - Tc* tc = tc_insts[t->index]; + Tc *tc = tc_insts[t->index]; if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) { timer = t; mux_position = i; } } else { - Tcc* tcc = tcc_insts[t->index]; + Tcc *tcc = tcc_insts[t->index]; if (tcc->CTRLA.bit.ENABLE == 0 && channel_ok(t)) { timer = t; mux_position = i; @@ -253,11 +253,11 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, if (timer->is_tc) { tc_periods[timer->index] = top; - Tc* tc = tc_insts[timer->index]; + Tc *tc = tc_insts[timer->index]; #ifdef SAMD21 tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | - TC_CTRLA_PRESCALER(divisor) | - TC_CTRLA_WAVEGEN_MPWM; + TC_CTRLA_PRESCALER(divisor) | + TC_CTRLA_WAVEGEN_MPWM; tc->COUNT16.CC[0].reg = top; #endif #ifdef SAM_D5X_E5X @@ -275,7 +275,7 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, tc_set_enable(tc, true); } else { tcc_periods[timer->index] = top; - Tcc* tcc = tcc_insts[timer->index]; + Tcc *tcc = tcc_insts[timer->index]; tcc_set_enable(tcc, false); tcc->CTRLA.bit.PRESCALER = divisor; tcc->PER.bit.PER = top; @@ -300,17 +300,17 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t* self, return PWMOUT_OK; } -bool common_hal_pwmio_pwmout_deinited(pwmio_pwmout_obj_t* self) { +bool common_hal_pwmio_pwmout_deinited(pwmio_pwmout_obj_t *self) { return self->pin == NULL; } -void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t* self) { +void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t *self) { if (common_hal_pwmio_pwmout_deinited(self)) { return; } - const pin_timer_t* t = self->timer; + const pin_timer_t *t = self->timer; if (t->is_tc) { - Tc* tc = tc_insts[t->index]; + Tc *tc = tc_insts[t->index]; tc_set_enable(tc, false); tc->COUNT16.CTRLA.bit.SWRST = true; tc_wait_for_sync(tc); @@ -319,7 +319,7 @@ void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t* self) { tcc_channels[t->index] &= ~(1 << tcc_channel(t)); if (tcc_refcount[t->index] == 0) { target_tcc_frequencies[t->index] = 0; - Tcc* tcc = tcc_insts[t->index]; + Tcc *tcc = tcc_insts[t->index]; tcc_set_enable(tcc, false); tcc->CTRLA.bit.SWRST = true; while (tcc->SYNCBUSY.bit.SWRST != 0) { @@ -331,7 +331,7 @@ void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t* self) { self->pin = NULL; } -extern void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t* self, uint16_t duty) { +extern void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t *self, uint16_t duty) { // Store the unadjusted duty cycle. It turns out the the process of adjusting and calculating // the duty cycle here and reading it back is lossy - the value will decay over time. // Track it here so that if frequency is changed we can use this value to recalculate the @@ -339,27 +339,29 @@ extern void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t* self, uin // See https://github.com/adafruit/circuitpython/issues/2086 for more details self->duty_cycle = duty; - const pin_timer_t* t = self->timer; + const pin_timer_t *t = self->timer; if (t->is_tc) { uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; #ifdef SAMD21 tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty; #endif #ifdef SAM_D5X_E5X - Tc* tc = tc_insts[t->index]; - while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} + Tc *tc = tc_insts[t->index]; + while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) { + } tc->COUNT16.CCBUF[1].reg = adjusted_duty; #endif } else { - uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff; + uint32_t adjusted_duty = ((uint64_t)tcc_periods[t->index]) * duty / 0xffff; uint8_t channel = tcc_channel(t); - Tcc* tcc = tcc_insts[t->index]; + Tcc *tcc = tcc_insts[t->index]; // Write into the CC buffer register, which will be transferred to the // CC register on an UPDATE (when period is finished). // Do clock domain syncing as necessary. - while (tcc->SYNCBUSY.reg != 0) {} + while (tcc->SYNCBUSY.reg != 0) { + } // Lock out double-buffering while updating the CCB value. tcc->CTRLBSET.bit.LUPD = 1; @@ -373,19 +375,20 @@ extern void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t* self, uin } } -uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t* self) { - const pin_timer_t* t = self->timer; +uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t *self) { + const pin_timer_t *t = self->timer; if (t->is_tc) { - Tc* tc = tc_insts[t->index]; + Tc *tc = tc_insts[t->index]; tc_wait_for_sync(tc); uint16_t cv = tc->COUNT16.CC[t->wave_output].reg; return cv * 0xffff / tc_periods[t->index]; } else { - Tcc* tcc = tcc_insts[t->index]; + Tcc *tcc = tcc_insts[t->index]; uint8_t channel = tcc_channel(t); uint32_t cv = 0; - while (tcc->SYNCBUSY.bit.CTRLB) {} + while (tcc->SYNCBUSY.bit.CTRLB) { + } #ifdef SAMD21 // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied @@ -404,20 +407,20 @@ uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t* self) { } #endif - uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / tcc_periods[t->index]; + uint32_t duty_cycle = ((uint64_t)cv) * 0xffff / tcc_periods[t->index]; return duty_cycle; } } -void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t* self, - uint32_t frequency) { +void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t *self, + uint32_t frequency) { uint32_t system_clock = common_hal_mcu_processor_get_frequency(); - if (frequency == 0 || frequency > system_clock/2) { + if (frequency == 0 || frequency > system_clock / 2) { mp_raise_ValueError(translate("Invalid PWM frequency")); } - const pin_timer_t* t = self->timer; + const pin_timer_t *t = self->timer; uint8_t resolution; if (t->is_tc) { resolution = 16; @@ -434,7 +437,7 @@ void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t* self, } } if (t->is_tc) { - Tc* tc = tc_insts[t->index]; + Tc *tc = tc_insts[t->index]; uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; if (new_divisor != old_divisor) { tc_set_enable(tc, false); @@ -446,18 +449,20 @@ void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t* self, tc->COUNT16.CC[0].reg = new_top; #endif #ifdef SAM_D5X_E5X - while (tc->COUNT16.SYNCBUSY.reg != 0) {} + while (tc->COUNT16.SYNCBUSY.reg != 0) { + } tc->COUNT16.CCBUF[0].reg = new_top; #endif } else { - Tcc* tcc = tcc_insts[t->index]; + Tcc *tcc = tcc_insts[t->index]; uint8_t old_divisor = tcc->CTRLA.bit.PRESCALER; if (new_divisor != old_divisor) { tcc_set_enable(tcc, false); tcc->CTRLA.bit.PRESCALER = new_divisor; tcc_set_enable(tcc, true); } - while (tcc->SYNCBUSY.reg != 0) {} + while (tcc->SYNCBUSY.reg != 0) { + } tcc_periods[t->index] = new_top; #ifdef SAMD21 tcc->PERB.bit.PERB = new_top; @@ -470,9 +475,9 @@ void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t* self, common_hal_pwmio_pwmout_set_duty_cycle(self, self->duty_cycle); } -uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t* self) { +uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t *self) { uint32_t system_clock = common_hal_mcu_processor_get_frequency(); - const pin_timer_t* t = self->timer; + const pin_timer_t *t = self->timer; uint8_t divisor; uint32_t top; if (t->is_tc) { @@ -485,6 +490,6 @@ uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t* self) { return (system_clock / prescaler[divisor]) / (top + 1); } -bool common_hal_pwmio_pwmout_get_variable_frequency(pwmio_pwmout_obj_t* self) { +bool common_hal_pwmio_pwmout_get_variable_frequency(pwmio_pwmout_obj_t *self) { return self->variable_frequency; } diff --git a/ports/atmel-samd/common-hal/pwmio/PWMOut.h b/ports/atmel-samd/common-hal/pwmio/PWMOut.h index 1f5e62bae0..1915991b54 100644 --- a/ports/atmel-samd/common-hal/pwmio/PWMOut.h +++ b/ports/atmel-samd/common-hal/pwmio/PWMOut.h @@ -34,7 +34,7 @@ typedef struct { mp_obj_base_t base; const mcu_pin_obj_t *pin; - const pin_timer_t* timer; + const pin_timer_t *timer; bool variable_frequency; uint16_t duty_cycle; } pwmio_pwmout_obj_t; diff --git a/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.c b/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.c index 6daf20aeaa..aa0bd78275 100644 --- a/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.c +++ b/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.c @@ -40,7 +40,7 @@ void *common_hal_rgbmatrix_timer_allocate(rgbmatrix_rgbmatrix_obj_t *self) { return tc_insts[timer_index]; } -static uint8_t tc_index_from_ptr(void* ptr) { +static uint8_t tc_index_from_ptr(void *ptr) { for (uint8_t i = TC_INST_NUM; i > 0; i--) { if (tc_insts[i] == ptr) { return i; @@ -49,7 +49,7 @@ static uint8_t tc_index_from_ptr(void* ptr) { return 0xff; } -void common_hal_rgbmatrix_timer_enable(void* ptr) { +void common_hal_rgbmatrix_timer_enable(void *ptr) { uint8_t timer_index = tc_index_from_ptr(ptr); if (timer_index == 0xff) { return; @@ -58,7 +58,7 @@ void common_hal_rgbmatrix_timer_enable(void* ptr) { turn_on_clocks(true, timer_index, 1); } -void common_hal_rgbmatrix_timer_disable(void* ptr) { +void common_hal_rgbmatrix_timer_disable(void *ptr) { uint8_t timer_index = tc_index_from_ptr(ptr); if (timer_index == 0xff) { return; @@ -67,7 +67,7 @@ void common_hal_rgbmatrix_timer_disable(void* ptr) { tc_set_enable(ptr, false); } -void common_hal_rgbmatrix_timer_free(void* ptr) { +void common_hal_rgbmatrix_timer_free(void *ptr) { uint8_t timer_index = tc_index_from_ptr(ptr); if (timer_index == 0xff) { return; diff --git a/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.h b/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.h index 2378cf1735..d14cd9b083 100644 --- a/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.h +++ b/ports/atmel-samd/common-hal/rgbmatrix/RGBMatrix.h @@ -30,8 +30,8 @@ #include "shared-module/rgbmatrix/RGBMatrix.h" void *common_hal_rgbmatrix_timer_allocate(rgbmatrix_rgbmatrix_obj_t *self); -void common_hal_rgbmatrix_timer_enable(void*); -void common_hal_rgbmatrix_timer_disable(void*); -void common_hal_rgbmatrix_timer_free(void*); +void common_hal_rgbmatrix_timer_enable(void *); +void common_hal_rgbmatrix_timer_disable(void *); +void common_hal_rgbmatrix_timer_free(void *); #endif diff --git a/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c b/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c index 4b74b438ff..2a30142ab3 100644 --- a/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +++ b/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c @@ -34,8 +34,8 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencoder_obj_t* self, - const mcu_pin_obj_t* pin_a, const mcu_pin_obj_t* pin_b) { +void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencoder_obj_t *self, + const mcu_pin_obj_t *pin_a, const mcu_pin_obj_t *pin_b) { if (!pin_a->has_extint || !pin_b->has_extint) { mp_raise_RuntimeError(translate("Both pins must support hardware interrupts")); } @@ -63,15 +63,15 @@ void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencode gpio_set_pin_function(self->pin_b, GPIO_PIN_FUNCTION_A); gpio_set_pin_pull_mode(self->pin_b, GPIO_PULL_UP); - set_eic_channel_data(self->eic_channel_a, (void*) self); - set_eic_channel_data(self->eic_channel_b, (void*) self); + set_eic_channel_data(self->eic_channel_a, (void *)self); + set_eic_channel_data(self->eic_channel_b, (void *)self); self->position = 0; self->quarter_count = 0; shared_module_softencoder_state_init(self, - ((uint8_t) gpio_get_pin_level(self->pin_a) << 1) | - (uint8_t) gpio_get_pin_level(self->pin_b)); + ((uint8_t)gpio_get_pin_level(self->pin_a) << 1) | + (uint8_t)gpio_get_pin_level(self->pin_b)); claim_pin(pin_a); claim_pin(pin_b); @@ -83,11 +83,11 @@ void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencode turn_on_eic_channel(self->eic_channel_b, EIC_CONFIG_SENSE0_BOTH_Val); } -bool common_hal_rotaryio_incrementalencoder_deinited(rotaryio_incrementalencoder_obj_t* self) { +bool common_hal_rotaryio_incrementalencoder_deinited(rotaryio_incrementalencoder_obj_t *self) { return self->pin_a == NO_PIN; } -void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_obj_t* self) { +void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_obj_t *self) { if (common_hal_rotaryio_incrementalencoder_deinited(self)) { return; } @@ -106,11 +106,11 @@ void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_o } void incrementalencoder_interrupt_handler(uint8_t channel) { - rotaryio_incrementalencoder_obj_t* self = get_eic_channel_data(channel); + rotaryio_incrementalencoder_obj_t *self = get_eic_channel_data(channel); uint8_t new_state = - ((uint8_t) gpio_get_pin_level(self->pin_a) << 1) | - (uint8_t) gpio_get_pin_level(self->pin_b); + ((uint8_t)gpio_get_pin_level(self->pin_a) << 1) | + (uint8_t)gpio_get_pin_level(self->pin_b); shared_module_softencoder_state_update(self, new_state); } diff --git a/ports/atmel-samd/common-hal/rtc/RTC.c b/ports/atmel-samd/common-hal/rtc/RTC.c index 3473165db2..3517f31aa5 100644 --- a/ports/atmel-samd/common-hal/rtc/RTC.c +++ b/ports/atmel-samd/common-hal/rtc/RTC.c @@ -51,7 +51,7 @@ void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { uint64_t ticks_s = port_get_raw_ticks(NULL) / 1024; uint32_t epoch_s = timeutils_seconds_since_2000( tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec - ); + ); rtc_offset = epoch_s - ticks_s; } @@ -68,11 +68,11 @@ int common_hal_rtc_get_calibration(void) { void common_hal_rtc_set_calibration(int calibration) { if (calibration > 127 || calibration < -127) { -#if CIRCUITPY_FULL_BUILD + #if CIRCUITPY_FULL_BUILD mp_raise_ValueError(translate("calibration value out of range +/-127")); -#else + #else mp_raise_ValueError(translate("calibration is out of range")); -#endif + #endif } hri_rtcmode0_write_FREQCORR_SIGN_bit(RTC, calibration < 0 ? 0 : 1); diff --git a/ports/atmel-samd/common-hal/sdioio/SDCard.c b/ports/atmel-samd/common-hal/sdioio/SDCard.c index 14c6f29de1..9c8c1abf39 100644 --- a/ports/atmel-samd/common-hal/sdioio/SDCard.c +++ b/ports/atmel-samd/common-hal/sdioio/SDCard.c @@ -58,8 +58,8 @@ static Sdhc *sdhc_insts[] = SDHC_INSTS; void common_hal_sdioio_sdcard_construct(sdioio_sdcard_obj_t *self, - const mcu_pin_obj_t * clock, const mcu_pin_obj_t * command, - uint8_t num_data, mcu_pin_obj_t ** data, uint32_t frequency) { + const mcu_pin_obj_t *clock, const mcu_pin_obj_t *command, + uint8_t num_data, mcu_pin_obj_t **data, uint32_t frequency) { /* SD breakout as assembled ("*" = minimum viable set) @@ -84,7 +84,7 @@ CLK PA21 PCC_D? (D32) BROWN int instance = functions[0]->instance; functions[1] = mcu_find_pin_function(sdio_ck, clock, instance, MP_QSTR_clock); functions[2] = mcu_find_pin_function(sdio_dat0, data[0], instance, MP_QSTR_data0); - if(num_data == 4) { + if (num_data == 4) { functions[3] = mcu_find_pin_function(sdio_dat1, data[1], instance, MP_QSTR_data1); functions[4] = mcu_find_pin_function(sdio_dat2, data[2], instance, MP_QSTR_data2); functions[5] = mcu_find_pin_function(sdio_dat3, data[3], instance, MP_QSTR_data3); @@ -94,8 +94,8 @@ CLK PA21 PCC_D? (D32) BROWN self->command_pin = common_hal_mcu_pin_number(functions[0]->obj); self->clock_pin = common_hal_mcu_pin_number(functions[1]->obj); - for(int i=0; idata_pins[i] = common_hal_mcu_pin_number(function->obj); } else { @@ -103,7 +103,7 @@ CLK PA21 PCC_D? (D32) BROWN } } - for(size_t i=0; iobj) { break; } @@ -121,16 +121,16 @@ CLK PA21 PCC_D? (D32) BROWN self->num_data = num_data; self->frequency = frequency; - if(instance == 0) { + if (instance == 0) { hri_mclk_set_AHBMASK_SDHC0_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC0_GCLK_ID, CONF_GCLK_SDHC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC0_GCLK_ID_SLOW, CONF_GCLK_SDHC0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); -#ifdef SDHC1_GCLK_ID + #ifdef SDHC1_GCLK_ID } else { hri_mclk_set_AHBMASK_SDHC1_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID, CONF_GCLK_SDHC1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID_SLOW, CONF_GCLK_SDHC1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); -#endif + #endif } DEBUG_PRINT("instance %d @%p\n", instance, sdhc_insts[instance]); @@ -139,7 +139,7 @@ CLK PA21 PCC_D? (D32) BROWN sd_mmc_err_t result = SD_MMC_INIT_ONGOING; - for (int i=0; result == SD_MMC_INIT_ONGOING && i<100; i++) { + for (int i = 0; result == SD_MMC_INIT_ONGOING && i < 100; i++) { result = sd_mmc_check(0); DEBUG_PRINT("sd_mmc_check(0) -> %d\n", result); } @@ -182,9 +182,9 @@ STATIC void wait_write_complete(sdioio_sdcard_obj_t *self) { } STATIC void debug_print_state(sdioio_sdcard_obj_t *self, const char *what, sd_mmc_err_t r) { -#if DEBUG_SDIO + #if DEBUG_SDIO DEBUG_PRINT("%s: %d\n", what, r); -#endif + #endif } int common_hal_sdioio_sdcard_writeblocks(sdioio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *bufinfo) { diff --git a/ports/atmel-samd/common-hal/sdioio/SDCard.h b/ports/atmel-samd/common-hal/sdioio/SDCard.h index 2baba38f0d..1ab89fedda 100644 --- a/ports/atmel-samd/common-hal/sdioio/SDCard.h +++ b/ports/atmel-samd/common-hal/sdioio/SDCard.h @@ -33,7 +33,7 @@ typedef struct { struct mci_sync_desc IO_BUS; uint32_t frequency; uint32_t capacity; - uint8_t num_data:3, state_programming:1, has_lock:1; + uint8_t num_data : 3, state_programming : 1, has_lock : 1; uint8_t command_pin; uint8_t clock_pin; uint8_t data_pins[4]; diff --git a/ports/atmel-samd/common-hal/supervisor/Runtime.c b/ports/atmel-samd/common-hal/supervisor/Runtime.c old mode 100755 new mode 100644 index 974f26cec1..f827651781 --- a/ports/atmel-samd/common-hal/supervisor/Runtime.c +++ b/ports/atmel-samd/common-hal/supervisor/Runtime.c @@ -29,9 +29,9 @@ #include "supervisor/serial.h" bool common_hal_supervisor_runtime_get_serial_connected(void) { - return (bool) serial_connected(); + return (bool)serial_connected(); } bool common_hal_supervisor_runtime_get_serial_bytes_available(void) { - return (bool) serial_bytes_available(); + return (bool)serial_bytes_available(); } diff --git a/ports/atmel-samd/common-hal/touchio/TouchIn.c b/ports/atmel-samd/common-hal/touchio/TouchIn.c index b2fcc6cdef..89979b620f 100644 --- a/ports/atmel-samd/common-hal/touchio/TouchIn.c +++ b/ports/atmel-samd/common-hal/touchio/TouchIn.c @@ -57,15 +57,15 @@ static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { return adafruit_ptc_get_conversion_result(PTC); } -void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, - const mcu_pin_obj_t *pin) { +void common_hal_touchio_touchin_construct(touchio_touchin_obj_t *self, + const mcu_pin_obj_t *pin) { if (!pin->has_touch) { mp_raise_ValueError(translate("Invalid pin")); } claim_pin(pin); // Turn on the PTC if its not in use. We won't turn it off until reset. - if ((( Ptc *) PTC)->CTRLA.bit.ENABLE == 0) { + if (((Ptc *)PTC)->CTRLA.bit.ENABLE == 0) { // We run the PTC at 8mhz so divide the 48mhz clock by 6. uint8_t gclk = find_free_gclk(6); if (gclk > GCLK_GEN_NUM) { @@ -95,11 +95,11 @@ void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, self->threshold = get_raw_reading(self) + 100; } -bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t* self) { +bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t *self) { return self->config.pin == NO_PIN; } -void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) { +void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t *self) { // TODO(tannewt): Reset the PTC. if (common_hal_touchio_touchin_deinited(self)) { return; @@ -111,13 +111,15 @@ void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) { } void touchin_reset() { - Ptc* ptc = ((Ptc *) PTC); + Ptc *ptc = ((Ptc *)PTC); if (ptc->CTRLA.bit.ENABLE == 1) { ptc->CTRLA.bit.ENABLE = 0; - while (ptc->CTRLA.bit.ENABLE == 1) {} + while (ptc->CTRLA.bit.ENABLE == 1) { + } ptc->CTRLA.bit.SWRESET = 1; - while (ptc->CTRLA.bit.SWRESET == 1) {} + while (ptc->CTRLA.bit.SWRESET == 1) { + } } } diff --git a/ports/atmel-samd/sd_mmc/sd_mmc.c b/ports/atmel-samd/sd_mmc/sd_mmc.c index 5ea9d830e9..de5a3cfe17 100644 --- a/ports/atmel-samd/sd_mmc/sd_mmc.c +++ b/ports/atmel-samd/sd_mmc/sd_mmc.c @@ -72,7 +72,7 @@ #define driver mci #else #error No MCI or HSMCI interfaces are defined for SD MMC stack. \ - CONF_SD_MMC_MEM_CNT must be added in board.h file. + CONF_SD_MMC_MEM_CNT must be added in board.h file. #endif #if CONF_MCI_OS_SUPPORT @@ -119,28 +119,28 @@ /** This SD MMC stack supports only the high voltage */ #define SD_MMC_VOLTAGE_SUPPORT \ - (OCR_VDD_27_28 | OCR_VDD_28_29 | OCR_VDD_29_30 | OCR_VDD_30_31 | OCR_VDD_31_32 | OCR_VDD_32_33) + (OCR_VDD_27_28 | OCR_VDD_28_29 | OCR_VDD_29_30 | OCR_VDD_30_31 | OCR_VDD_31_32 | OCR_VDD_32_33) /** SD/MMC card states */ enum card_state { - SD_MMC_CARD_STATE_READY = 0, /**< Ready to use */ - SD_MMC_CARD_STATE_DEBOUNCE = 1, /**< Debounce on going */ - SD_MMC_CARD_STATE_INIT = 2, /**< Initialization on going */ - SD_MMC_CARD_STATE_UNUSABLE = 3, /**< Unusable card */ - SD_MMC_CARD_STATE_NO_CARD = 4 /**< No SD/MMC card inserted */ + SD_MMC_CARD_STATE_READY = 0, /**< Ready to use */ + SD_MMC_CARD_STATE_DEBOUNCE = 1, /**< Debounce on going */ + SD_MMC_CARD_STATE_INIT = 2, /**< Initialization on going */ + SD_MMC_CARD_STATE_UNUSABLE = 3, /**< Unusable card */ + SD_MMC_CARD_STATE_NO_CARD = 4 /**< No SD/MMC card inserted */ }; /** SD/MMC card information structure */ struct sd_mmc_card { - uint32_t clock; /**< Card access clock */ - uint32_t capacity; /**< Card capacity in KBytes */ - uint16_t rca; /**< Relative card address */ - enum card_state state; /**< Card state */ - card_type_t type; /**< Card type */ - card_version_t version; /**< Card version */ - uint8_t bus_width; /**< Number of DATA lin on bus (MCI only) */ - uint8_t csd[CSD_REG_BSIZE]; /**< CSD register */ - uint8_t high_speed; /**< High speed card (1) */ + uint32_t clock; /**< Card access clock */ + uint32_t capacity; /**< Card capacity in KBytes */ + uint16_t rca; /**< Relative card address */ + enum card_state state; /**< Card state */ + card_type_t type; /**< Card type */ + card_version_t version; /**< Card version */ + uint8_t bus_width; /**< Number of DATA lin on bus (MCI only) */ + uint8_t csd[CSD_REG_BSIZE]; /**< CSD register */ + uint8_t high_speed; /**< High speed card (1) */ }; /** Card detect pin */ @@ -192,7 +192,7 @@ static bool sd_mmc_cmd13(void); #if (CONF_SDIO_SUPPORT == 1) static bool sdio_cmd52(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t rd_after_wr, uint8_t *io_data); static bool sdio_cmd53(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t inc_addr, uint32_t size, - bool access_block); + bool access_block); #endif static bool sd_acmd6(void); static bool sd_acmd51(void); @@ -228,34 +228,33 @@ static bool sd_mmc_mci_install_mmc(void); * * \return true if success, otherwise false */ -static bool mmc_mci_op_cond(void) -{ - uint32_t retry, resp; +static bool mmc_mci_op_cond(void) { + uint32_t retry, resp; - /* - * Timeout 1s = 400KHz / ((6+6)*8) cylces = 4200 retry - * 6 = cmd byte size - * 6 = response byte size - */ - retry = 4200; - do { - if (!driver_send_cmd(sd_mmc_hal, MMC_MCI_CMD1_SEND_OP_COND, SD_MMC_VOLTAGE_SUPPORT | OCR_ACCESS_MODE_SECTOR)) { - return false; - } - /* Check busy flag */ - resp = driver_get_response(sd_mmc_hal); - if (resp & OCR_POWER_UP_BUSY) { - /* Check OCR value */ - if ((resp & OCR_ACCESS_MODE_MASK) == OCR_ACCESS_MODE_SECTOR) { - sd_mmc_card->type |= CARD_TYPE_HC; - } - break; - } - if (retry-- == 0) { - return false; - } - } while (1); - return true; + /* + * Timeout 1s = 400KHz / ((6+6)*8) cylces = 4200 retry + * 6 = cmd byte size + * 6 = response byte size + */ + retry = 4200; + do { + if (!driver_send_cmd(sd_mmc_hal, MMC_MCI_CMD1_SEND_OP_COND, SD_MMC_VOLTAGE_SUPPORT | OCR_ACCESS_MODE_SECTOR)) { + return false; + } + /* Check busy flag */ + resp = driver_get_response(sd_mmc_hal); + if (resp & OCR_POWER_UP_BUSY) { + /* Check OCR value */ + if ((resp & OCR_ACCESS_MODE_MASK) == OCR_ACCESS_MODE_SECTOR) { + sd_mmc_card->type |= CARD_TYPE_HC; + } + break; + } + if (retry-- == 0) { + return false; + } + } while (1); + return true; } #endif @@ -268,47 +267,46 @@ static bool mmc_mci_op_cond(void) * * \return true if success, otherwise false */ -static bool sd_mci_op_cond(uint8_t v2) -{ - uint32_t arg, retry, resp; +static bool sd_mci_op_cond(uint8_t v2) { + uint32_t arg, retry, resp; - /* - * Timeout 1s = 400KHz / ((6+6+6+6)*8) cylces = 2100 retry - * 6 = cmd byte size - * 6 = response byte size - * 6 = cmd byte size - * 6 = response byte size - */ - retry = 2100; - do { - /* CMD55 - Indicate to the card that the next command is an - * application specific command rather than a standard command.*/ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, 0)) { - return false; - } + /* + * Timeout 1s = 400KHz / ((6+6+6+6)*8) cylces = 2100 retry + * 6 = cmd byte size + * 6 = response byte size + * 6 = cmd byte size + * 6 = response byte size + */ + retry = 2100; + do { + /* CMD55 - Indicate to the card that the next command is an + * application specific command rather than a standard command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, 0)) { + return false; + } - /* (ACMD41) Sends host OCR register */ - arg = SD_MMC_VOLTAGE_SUPPORT; - if (v2) { - arg |= SD_ACMD41_HCS; - } - /* Check response */ - if (!driver_send_cmd(sd_mmc_hal, SD_MCI_ACMD41_SD_SEND_OP_COND, arg)) { - return false; - } - resp = driver_get_response(sd_mmc_hal); - if (resp & OCR_POWER_UP_BUSY) { - /* Card is ready */ - if ((resp & OCR_CCS) != 0) { - sd_mmc_card->type |= CARD_TYPE_HC; - } - break; - } - if (retry-- == 0) { - return false; - } - } while (1); - return true; + /* (ACMD41) Sends host OCR register */ + arg = SD_MMC_VOLTAGE_SUPPORT; + if (v2) { + arg |= SD_ACMD41_HCS; + } + /* Check response */ + if (!driver_send_cmd(sd_mmc_hal, SD_MCI_ACMD41_SD_SEND_OP_COND, arg)) { + return false; + } + resp = driver_get_response(sd_mmc_hal); + if (resp & OCR_POWER_UP_BUSY) { + /* Card is ready */ + if ((resp & OCR_CCS) != 0) { + sd_mmc_card->type |= CARD_TYPE_HC; + } + break; + } + if (retry-- == 0) { + return false; + } + } while (1); + return true; } #if (CONF_SDIO_SUPPORT == 1) @@ -321,46 +319,45 @@ static bool sd_mci_op_cond(uint8_t v2) * * \return true if success, otherwise false */ -static bool sdio_op_cond(void) -{ - uint32_t resp; +static bool sdio_op_cond(void) { + uint32_t resp; - /* CMD5 - SDIO send operation condition (OCR) command. */ - if (!driver_send_cmd(sd_mmc_hal, SDIO_CMD5_SEND_OP_COND, 0)) { - return true; /* No error but card type not updated */ - } - resp = driver_get_response(sd_mmc_hal); - if ((resp & OCR_SDIO_NF) == 0) { - return true; /* No error but card type not updated */ - } + /* CMD5 - SDIO send operation condition (OCR) command. */ + if (!driver_send_cmd(sd_mmc_hal, SDIO_CMD5_SEND_OP_COND, 0)) { + return true; /* No error but card type not updated */ + } + resp = driver_get_response(sd_mmc_hal); + if ((resp & OCR_SDIO_NF) == 0) { + return true; /* No error but card type not updated */ + } - /* - * Wait card ready - * Timeout 1s = 400KHz / ((6+4)*8) cylces = 5000 retry - * 6 = cmd byte size - * 4(SPI) 6(MCI) = response byte size - */ - uint32_t cmd5_retry = 5000; - while (1) { - /* CMD5 - SDIO send operation condition (OCR) command.*/ - if (!driver_send_cmd(sd_mmc_hal, SDIO_CMD5_SEND_OP_COND, resp & SD_MMC_VOLTAGE_SUPPORT)) { - return false; - } - resp = driver_get_response(sd_mmc_hal); - if ((resp & OCR_POWER_UP_BUSY) == OCR_POWER_UP_BUSY) { - break; - } - if (cmd5_retry-- == 0) { - return false; - } - } - /* Update card type at the end of busy */ - if ((resp & OCR_SDIO_MP) > 0) { - sd_mmc_card->type = CARD_TYPE_SD_COMBO; - } else { - sd_mmc_card->type = CARD_TYPE_SDIO; - } - return true; /* No error and card type updated with SDIO type */ + /* + * Wait card ready + * Timeout 1s = 400KHz / ((6+4)*8) cylces = 5000 retry + * 6 = cmd byte size + * 4(SPI) 6(MCI) = response byte size + */ + uint32_t cmd5_retry = 5000; + while (1) { + /* CMD5 - SDIO send operation condition (OCR) command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDIO_CMD5_SEND_OP_COND, resp & SD_MMC_VOLTAGE_SUPPORT)) { + return false; + } + resp = driver_get_response(sd_mmc_hal); + if ((resp & OCR_POWER_UP_BUSY) == OCR_POWER_UP_BUSY) { + break; + } + if (cmd5_retry-- == 0) { + return false; + } + } + /* Update card type at the end of busy */ + if ((resp & OCR_SDIO_MP) > 0) { + sd_mmc_card->type = CARD_TYPE_SD_COMBO; + } else { + sd_mmc_card->type = CARD_TYPE_SDIO; + } + return true; /* No error and card type updated with SDIO type */ } /** @@ -373,75 +370,74 @@ static bool sdio_op_cond(void) * * \return true if success, otherwise false */ -static bool sdio_get_max_speed(void) -{ - uint32_t addr_new, addr_old; - uint8_t buf[6]; - uint32_t unit; - uint32_t mul; - uint8_t tplfe_max_tran_speed, i; - uint8_t addr_cis[4]; +static bool sdio_get_max_speed(void) { + uint32_t addr_new, addr_old; + uint8_t buf[6]; + uint32_t unit; + uint32_t mul; + uint8_t tplfe_max_tran_speed, i; + uint8_t addr_cis[4]; - /* Read CIS area address in CCCR area */ - addr_old = SDIO_CCCR_CIS_PTR; - for (i = 0; i < 4; i++) { - sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_old, 0, &addr_cis[i]); - addr_old++; - } - addr_old = addr_cis[0] + (addr_cis[1] << 8) + (addr_cis[2] << 16) + (addr_cis[3] << 24); - addr_new = addr_old; + /* Read CIS area address in CCCR area */ + addr_old = SDIO_CCCR_CIS_PTR; + for (i = 0; i < 4; i++) { + sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_old, 0, &addr_cis[i]); + addr_old++; + } + addr_old = addr_cis[0] + (addr_cis[1] << 8) + (addr_cis[2] << 16) + (addr_cis[3] << 24); + addr_new = addr_old; - while (1) { - /* Read a sample of CIA area */ - for (i = 0; i < 3; i++) { - sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_new, 0, &buf[i]); - addr_new++; - } - if (buf[0] == SDIO_CISTPL_END) { - return false; /* Tuple error */ - } - if (buf[0] == SDIO_CISTPL_FUNCE && buf[2] == 0x00) { - break; /* Fun0 tuple found */ - } - if (buf[1] == 0) { - return false; /* Tuple error */ - } - /* Next address */ - addr_new += buf[1] - 1; - if (addr_new > (addr_old + 256)) { - return false; /* Outoff CIS area */ - } - } + while (1) { + /* Read a sample of CIA area */ + for (i = 0; i < 3; i++) { + sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_new, 0, &buf[i]); + addr_new++; + } + if (buf[0] == SDIO_CISTPL_END) { + return false; /* Tuple error */ + } + if (buf[0] == SDIO_CISTPL_FUNCE && buf[2] == 0x00) { + break; /* Fun0 tuple found */ + } + if (buf[1] == 0) { + return false; /* Tuple error */ + } + /* Next address */ + addr_new += buf[1] - 1; + if (addr_new > (addr_old + 256)) { + return false; /* Outoff CIS area */ + } + } - /* Read all Fun0 tuple fields: fn0_blk_siz & max_tran_speed */ - addr_new -= 3; - for (i = 0; i < 6; i++) { - sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_new, 0, &buf[i]); - addr_new++; - } + /* Read all Fun0 tuple fields: fn0_blk_siz & max_tran_speed */ + addr_new -= 3; + for (i = 0; i < 6; i++) { + sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_new, 0, &buf[i]); + addr_new++; + } - tplfe_max_tran_speed = buf[5]; - if (tplfe_max_tran_speed > 0x32) { - /* Error on SDIO register, the high speed is not activated - * and the clock can not be more than 25MHz. - * This error is present on specific SDIO card - * (H&D wireless card - HDG104 WiFi SIP). - */ - tplfe_max_tran_speed = 0x32; /* 25Mhz */ - } + tplfe_max_tran_speed = buf[5]; + if (tplfe_max_tran_speed > 0x32) { + /* Error on SDIO register, the high speed is not activated + * and the clock can not be more than 25MHz. + * This error is present on specific SDIO card + * (H&D wireless card - HDG104 WiFi SIP). + */ + tplfe_max_tran_speed = 0x32; /* 25Mhz */ + } - /* Decode transfer speed in Hz.*/ - unit = sd_mmc_trans_units[tplfe_max_tran_speed & 0x7]; - mul = sd_trans_multipliers[(tplfe_max_tran_speed >> 3) & 0xF]; - sd_mmc_card->clock = unit * mul * 1000; - /** - * Note: A combo card shall be a Full-Speed SDIO card - * which supports upto 25MHz. - * A SDIO card alone can be: - * - a Low-Speed SDIO card which supports 400Khz minimum - * - a Full-Speed SDIO card which supports upto 25MHz - */ - return true; + /* Decode transfer speed in Hz.*/ + unit = sd_mmc_trans_units[tplfe_max_tran_speed & 0x7]; + mul = sd_trans_multipliers[(tplfe_max_tran_speed >> 3) & 0xF]; + sd_mmc_card->clock = unit * mul * 1000; + /** + * Note: A combo card shall be a Full-Speed SDIO card + * which supports upto 25MHz. + * A SDIO card alone can be: + * - a Low-Speed SDIO card which supports 400Khz minimum + * - a Full-Speed SDIO card which supports upto 25MHz + */ + return true; } /** @@ -451,31 +447,30 @@ static bool sdio_get_max_speed(void) * * \return true if success, otherwise false */ -static bool sdio_cmd52_set_bus_width(void) -{ - /** - * A SD memory card always supports bus 4bit - * A SD COMBO card always supports bus 4bit - * A SDIO Full-Speed alone always supports 4bit - * A SDIO Low-Speed alone can supports 4bit (Optional) - */ - uint8_t u8_value; +static bool sdio_cmd52_set_bus_width(void) { + /** + * A SD memory card always supports bus 4bit + * A SD COMBO card always supports bus 4bit + * A SDIO Full-Speed alone always supports 4bit + * A SDIO Low-Speed alone can supports 4bit (Optional) + */ + uint8_t u8_value; - /* Check 4bit support in 4BLS of "Card Capability" register */ - if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, SDIO_CCCR_CAP, 0, &u8_value)) { - return false; - } - if ((u8_value & SDIO_CAP_4BLS) != SDIO_CAP_4BLS) { - /* No supported, it is not a protocol error */ - return true; - } - /* HS mode possible, then enable */ - u8_value = SDIO_BUSWIDTH_4B; - if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_BUS_CTRL, 1, &u8_value)) { - return false; - } - sd_mmc_card->bus_width = 4; - return true; + /* Check 4bit support in 4BLS of "Card Capability" register */ + if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, SDIO_CCCR_CAP, 0, &u8_value)) { + return false; + } + if ((u8_value & SDIO_CAP_4BLS) != SDIO_CAP_4BLS) { + /* No supported, it is not a protocol error */ + return true; + } + /* HS mode possible, then enable */ + u8_value = SDIO_BUSWIDTH_4B; + if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_BUS_CTRL, 1, &u8_value)) { + return false; + } + sd_mmc_card->bus_width = 4; + return true; } /** @@ -486,44 +481,39 @@ static bool sdio_cmd52_set_bus_width(void) * * \return true if success, otherwise false */ -static bool sdio_cmd52_set_high_speed(void) -{ - uint8_t u8_value; +static bool sdio_cmd52_set_high_speed(void) { + uint8_t u8_value; - /* Check CIA.HS */ - if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, SDIO_CCCR_HS, 0, &u8_value)) { - return false; - } - if ((u8_value & SDIO_SHS) != SDIO_SHS) { - /* No supported, it is not a protocol error */ - return true; - } - /* HS mode possible, then enable */ - u8_value = SDIO_EHS; - if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_HS, 1, &u8_value)) { - return false; - } - sd_mmc_card->high_speed = 1; - sd_mmc_card->clock *= 2; - return true; + /* Check CIA.HS */ + if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, SDIO_CCCR_HS, 0, &u8_value)) { + return false; + } + if ((u8_value & SDIO_SHS) != SDIO_SHS) { + /* No supported, it is not a protocol error */ + return true; + } + /* HS mode possible, then enable */ + u8_value = SDIO_EHS; + if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_HS, 1, &u8_value)) { + return false; + } + sd_mmc_card->high_speed = 1; + sd_mmc_card->clock *= 2; + return true; } #else -static bool sdio_op_cond(void) -{ - return true; /* No error but card type not updated */ +static bool sdio_op_cond(void) { + return true; /* No error but card type not updated */ } -static bool sdio_get_max_speed(void) -{ - return false; +static bool sdio_get_max_speed(void) { + return false; } -static bool sdio_cmd52_set_bus_width(void) -{ - return false; +static bool sdio_cmd52_set_bus_width(void) { + return false; } -static bool sdio_cmd52_set_high_speed(void) -{ - return false; +static bool sdio_cmd52_set_high_speed(void) { + return false; } #endif @@ -536,43 +526,42 @@ static bool sdio_cmd52_set_high_speed(void) * * \return true if success, otherwise false */ -static bool sd_cm6_set_high_speed(void) -{ - uint8_t switch_status[SD_SW_STATUS_BSIZE] = {0}; +static bool sd_cm6_set_high_speed(void) { + uint8_t switch_status[SD_SW_STATUS_BSIZE] = {0}; - if (!driver_adtc_start(sd_mmc_hal, - SD_CMD6_SWITCH_FUNC, - SD_CMD6_MODE_SWITCH | SD_CMD6_GRP6_NO_INFLUENCE | SD_CMD6_GRP5_NO_INFLUENCE - | SD_CMD6_GRP4_NO_INFLUENCE | SD_CMD6_GRP3_NO_INFLUENCE | SD_CMD6_GRP2_DEFAULT - | SD_CMD6_GRP1_HIGH_SPEED, - SD_SW_STATUS_BSIZE, - 1, - true)) { - return false; - } - if (!driver_start_read_blocks(sd_mmc_hal, switch_status, 1)) { - return false; - } - if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { - return false; - } + if (!driver_adtc_start(sd_mmc_hal, + SD_CMD6_SWITCH_FUNC, + SD_CMD6_MODE_SWITCH | SD_CMD6_GRP6_NO_INFLUENCE | SD_CMD6_GRP5_NO_INFLUENCE + | SD_CMD6_GRP4_NO_INFLUENCE | SD_CMD6_GRP3_NO_INFLUENCE | SD_CMD6_GRP2_DEFAULT + | SD_CMD6_GRP1_HIGH_SPEED, + SD_SW_STATUS_BSIZE, + 1, + true)) { + return false; + } + if (!driver_start_read_blocks(sd_mmc_hal, switch_status, 1)) { + return false; + } + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + return false; + } - if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { - return false; - } - if (SD_SW_STATUS_FUN_GRP1_RC(switch_status) == SD_SW_STATUS_FUN_GRP_RC_ERROR) { - /* No supported, it is not a protocol error */ - return true; - } - if (SD_SW_STATUS_FUN_GRP1_BUSY(switch_status)) { - return false; - } - /* CMD6 function switching period is within 8 clocks - * after the end bit of status data.*/ - driver_send_clock(sd_mmc_hal); - sd_mmc_card->high_speed = 1; - sd_mmc_card->clock *= 2; - return true; + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { + return false; + } + if (SD_SW_STATUS_FUN_GRP1_RC(switch_status) == SD_SW_STATUS_FUN_GRP_RC_ERROR) { + /* No supported, it is not a protocol error */ + return true; + } + if (SD_SW_STATUS_FUN_GRP1_BUSY(switch_status)) { + return false; + } + /* CMD6 function switching period is within 8 clocks + * after the end bit of status data.*/ + driver_send_clock(sd_mmc_hal); + sd_mmc_card->high_speed = 1; + sd_mmc_card->clock *= 2; + return true; } #if CONF_MMC_SUPPORT @@ -587,30 +576,29 @@ static bool sd_cm6_set_high_speed(void) * * \return true if success, otherwise false */ -static bool mmc_cmd6_set_bus_width(uint8_t bus_width) -{ - uint32_t arg; +static bool mmc_cmd6_set_bus_width(uint8_t bus_width) { + uint32_t arg; - switch (bus_width) { - case 8: - arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_8BIT; - break; - case 4: - arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_4BIT; - break; - default: - arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_1BIT; - break; - } - if (!driver_send_cmd(sd_mmc_hal, MMC_CMD6_SWITCH, arg)) { - return false; - } - if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { - /* No supported, it is not a protocol error */ - return false; - } - sd_mmc_card->bus_width = bus_width; - return true; + switch (bus_width) { + case 8: + arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_8BIT; + break; + case 4: + arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_4BIT; + break; + default: + arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_1BIT; + break; + } + if (!driver_send_cmd(sd_mmc_hal, MMC_CMD6_SWITCH, arg)) { + return false; + } + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { + /* No supported, it is not a protocol error */ + return false; + } + sd_mmc_card->bus_width = bus_width; + return true; } /** @@ -622,20 +610,19 @@ static bool mmc_cmd6_set_bus_width(uint8_t bus_width) * * \return true if success, otherwise false */ -static bool mmc_cmd6_set_high_speed(void) -{ - if (!driver_send_cmd(sd_mmc_hal, - MMC_CMD6_SWITCH, - MMC_CMD6_ACCESS_WRITE_BYTE | MMC_CMD6_INDEX_HS_TIMING | MMC_CMD6_VALUE_HS_TIMING_ENABLE)) { - return false; - } - if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { - /* No supported, it is not a protocol error */ - return false; - } - sd_mmc_card->high_speed = 1; - sd_mmc_card->clock = 52000000lu; - return true; +static bool mmc_cmd6_set_high_speed(void) { + if (!driver_send_cmd(sd_mmc_hal, + MMC_CMD6_SWITCH, + MMC_CMD6_ACCESS_WRITE_BYTE | MMC_CMD6_INDEX_HS_TIMING | MMC_CMD6_VALUE_HS_TIMING_ENABLE)) { + return false; + } + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { + /* No supported, it is not a protocol error */ + return false; + } + sd_mmc_card->high_speed = 1; + sd_mmc_card->clock = 52000000lu; + return true; } #endif @@ -652,26 +639,25 @@ static bool mmc_cmd6_set_high_speed(void) * \return true if success, otherwise false * with a update of \ref sd_mmc_err. */ -static bool sd_cmd8(uint8_t *v2) -{ - uint32_t resp; +static bool sd_cmd8(uint8_t *v2) { + uint32_t resp; - *v2 = 0; - /* Test for SD version 2 */ - if (!driver_send_cmd(sd_mmc_hal, SD_CMD8_SEND_IF_COND, SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) { - return true; /* It is not a V2 */ - } - /* Check R7 response */ - resp = driver_get_response(sd_mmc_hal); - if (resp == 0xFFFFFFFF) { - /* No compliance R7 value */ - return true; /* It is not a V2 */ - } - if ((resp & (SD_CMD8_MASK_PATTERN | SD_CMD8_MASK_VOLTAGE)) != (SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) { - return false; - } - *v2 = 1; - return true; + *v2 = 0; + /* Test for SD version 2 */ + if (!driver_send_cmd(sd_mmc_hal, SD_CMD8_SEND_IF_COND, SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) { + return true; /* It is not a V2 */ + } + /* Check R7 response */ + resp = driver_get_response(sd_mmc_hal); + if (resp == 0xFFFFFFFF) { + /* No compliance R7 value */ + return true; /* It is not a V2 */ + } + if ((resp & (SD_CMD8_MASK_PATTERN | SD_CMD8_MASK_VOLTAGE)) != (SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) { + return false; + } + *v2 = 1; + return true; } #if CONF_MMC_SUPPORT @@ -683,43 +669,42 @@ static bool sd_cmd8(uint8_t *v2) * * \return true if success, otherwise false */ -static bool mmc_cmd8(uint8_t *b_authorize_high_speed) -{ - uint16_t i; - uint32_t ext_csd; - uint32_t sec_count; +static bool mmc_cmd8(uint8_t *b_authorize_high_speed) { + uint16_t i; + uint32_t ext_csd; + uint32_t sec_count; - if (!driver_adtc_start(sd_mmc_hal, MMC_CMD8_SEND_EXT_CSD, 0, EXT_CSD_BSIZE, 1, false)) { - return false; - } - /* Read and decode Extended Extended CSD - * Note: The read access is done in byte to avoid a buffer - * of EXT_CSD_BSIZE Byte in stack.*/ + if (!driver_adtc_start(sd_mmc_hal, MMC_CMD8_SEND_EXT_CSD, 0, EXT_CSD_BSIZE, 1, false)) { + return false; + } + /* Read and decode Extended Extended CSD + * Note: The read access is done in byte to avoid a buffer + * of EXT_CSD_BSIZE Byte in stack.*/ - /* Read card type */ - for (i = 0; i < (EXT_CSD_CARD_TYPE_INDEX + 4) / 4; i++) { - if (!driver_read_word(sd_mmc_hal, &ext_csd)) { - return false; - } - } - *b_authorize_high_speed = (ext_csd >> ((EXT_CSD_CARD_TYPE_INDEX % 4) * 8)) & MMC_CTYPE_52MHZ; + /* Read card type */ + for (i = 0; i < (EXT_CSD_CARD_TYPE_INDEX + 4) / 4; i++) { + if (!driver_read_word(sd_mmc_hal, &ext_csd)) { + return false; + } + } + *b_authorize_high_speed = (ext_csd >> ((EXT_CSD_CARD_TYPE_INDEX % 4) * 8)) & MMC_CTYPE_52MHZ; - if (MMC_CSD_C_SIZE(sd_mmc_card->csd) == 0xFFF) { - /* For high capacity SD/MMC card, - * memory capacity = SEC_COUNT * 512 byte */ - for (; i < (EXT_CSD_SEC_COUNT_INDEX + 4) / 4; i++) { - if (!driver_read_word(sd_mmc_hal, &sec_count)) { - return false; - } - } - sd_mmc_card->capacity = sec_count / 2; - } - for (; i < EXT_CSD_BSIZE / 4; i++) { - if (!driver_read_word(sd_mmc_hal, &sec_count)) { - return false; - } - } - return true; + if (MMC_CSD_C_SIZE(sd_mmc_card->csd) == 0xFFF) { + /* For high capacity SD/MMC card, + * memory capacity = SEC_COUNT * 512 byte */ + for (; i < (EXT_CSD_SEC_COUNT_INDEX + 4) / 4; i++) { + if (!driver_read_word(sd_mmc_hal, &sec_count)) { + return false; + } + } + sd_mmc_card->capacity = sec_count / 2; + } + for (; i < EXT_CSD_BSIZE / 4; i++) { + if (!driver_read_word(sd_mmc_hal, &sec_count)) { + return false; + } + } + return true; } #endif @@ -730,111 +715,108 @@ static bool mmc_cmd8(uint8_t *b_authorize_high_speed) * * \return true if success, otherwise false */ -static bool sd_mmc_cmd9_mci(void) -{ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD9_SEND_CSD, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - driver_get_response_128(sd_mmc_hal, sd_mmc_card->csd); - return true; +static bool sd_mmc_cmd9_mci(void) { + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD9_SEND_CSD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + driver_get_response_128(sd_mmc_hal, sd_mmc_card->csd); + return true; } #if CONF_MMC_SUPPORT /** * \brief Decodes MMC CSD register */ -static void mmc_decode_csd(void) -{ - uint32_t unit; - uint32_t mul; - uint32_t tran_speed; +static void mmc_decode_csd(void) { + uint32_t unit; + uint32_t mul; + uint32_t tran_speed; - /* Get MMC System Specification version supported by the card */ - switch (MMC_CSD_SPEC_VERS(sd_mmc_card->csd)) { - default: - case 0: - sd_mmc_card->version = CARD_VER_MMC_1_2; - break; + /* Get MMC System Specification version supported by the card */ + switch (MMC_CSD_SPEC_VERS(sd_mmc_card->csd)) { + default: + case 0: + sd_mmc_card->version = CARD_VER_MMC_1_2; + break; - case 1: - sd_mmc_card->version = CARD_VER_MMC_1_4; - break; + case 1: + sd_mmc_card->version = CARD_VER_MMC_1_4; + break; - case 2: - sd_mmc_card->version = CARD_VER_MMC_2_2; - break; + case 2: + sd_mmc_card->version = CARD_VER_MMC_2_2; + break; - case 3: - sd_mmc_card->version = CARD_VER_MMC_3; - break; + case 3: + sd_mmc_card->version = CARD_VER_MMC_3; + break; - case 4: - sd_mmc_card->version = CARD_VER_MMC_4; - break; - } + case 4: + sd_mmc_card->version = CARD_VER_MMC_4; + break; + } - /* Get MMC memory max transfer speed in Hz.*/ - tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd); - unit = sd_mmc_trans_units[tran_speed & 0x7]; - mul = mmc_trans_multipliers[(tran_speed >> 3) & 0xF]; - sd_mmc_card->clock = unit * mul * 1000; + /* Get MMC memory max transfer speed in Hz.*/ + tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd); + unit = sd_mmc_trans_units[tran_speed & 0x7]; + mul = mmc_trans_multipliers[(tran_speed >> 3) & 0xF]; + sd_mmc_card->clock = unit * mul * 1000; - /* - * Get card capacity. - * ---------------------------------------------------- - * For normal SD/MMC card: - * memory capacity = BLOCKNR * BLOCK_LEN - * Where - * BLOCKNR = (C_SIZE+1) * MULT - * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8) - * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12) - * ---------------------------------------------------- - * For high capacity SD/MMC card: - * memory capacity = SEC_COUNT * 512 byte - */ - if (MMC_CSD_C_SIZE(sd_mmc_card->csd) != 0xFFF) { - uint32_t blocknr - = ((MMC_CSD_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (MMC_CSD_C_SIZE_MULT(sd_mmc_card->csd) + 2))); - sd_mmc_card->capacity = blocknr * (1 << MMC_CSD_READ_BL_LEN(sd_mmc_card->csd)) / 1024; - } + /* + * Get card capacity. + * ---------------------------------------------------- + * For normal SD/MMC card: + * memory capacity = BLOCKNR * BLOCK_LEN + * Where + * BLOCKNR = (C_SIZE+1) * MULT + * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8) + * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12) + * ---------------------------------------------------- + * For high capacity SD/MMC card: + * memory capacity = SEC_COUNT * 512 byte + */ + if (MMC_CSD_C_SIZE(sd_mmc_card->csd) != 0xFFF) { + uint32_t blocknr + = ((MMC_CSD_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (MMC_CSD_C_SIZE_MULT(sd_mmc_card->csd) + 2))); + sd_mmc_card->capacity = blocknr * (1 << MMC_CSD_READ_BL_LEN(sd_mmc_card->csd)) / 1024; + } } #endif /** * \brief Decodes SD CSD register */ -static void sd_decode_csd(void) -{ - uint32_t unit; - uint32_t mul; - uint32_t tran_speed; +static void sd_decode_csd(void) { + uint32_t unit; + uint32_t mul; + uint32_t tran_speed; - /* Get SD memory maximum transfer speed in Hz. */ - tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd); - unit = sd_mmc_trans_units[tran_speed & 0x7]; - mul = sd_trans_multipliers[(tran_speed >> 3) & 0xF]; - sd_mmc_card->clock = unit * mul * 1000; + /* Get SD memory maximum transfer speed in Hz. */ + tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd); + unit = sd_mmc_trans_units[tran_speed & 0x7]; + mul = sd_trans_multipliers[(tran_speed >> 3) & 0xF]; + sd_mmc_card->clock = unit * mul * 1000; - /* - * Get card capacity. - * ---------------------------------------------------- - * For normal SD/MMC card: - * memory capacity = BLOCKNR * BLOCK_LEN - * Where - * BLOCKNR = (C_SIZE+1) * MULT - * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8) - * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12) - * ---------------------------------------------------- - * For high capacity SD card: - * memory capacity = (C_SIZE+1) * 512K byte - */ - if (CSD_STRUCTURE_VERSION(sd_mmc_card->csd) >= SD_CSD_VER_2_0) { - sd_mmc_card->capacity = (SD_CSD_2_0_C_SIZE(sd_mmc_card->csd) + 1) * 512; - } else { - uint32_t blocknr - = ((SD_CSD_1_0_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (SD_CSD_1_0_C_SIZE_MULT(sd_mmc_card->csd) + 2))); - sd_mmc_card->capacity = blocknr * (1 << SD_CSD_1_0_READ_BL_LEN(sd_mmc_card->csd)) / 1024; - } + /* + * Get card capacity. + * ---------------------------------------------------- + * For normal SD/MMC card: + * memory capacity = BLOCKNR * BLOCK_LEN + * Where + * BLOCKNR = (C_SIZE+1) * MULT + * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8) + * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12) + * ---------------------------------------------------- + * For high capacity SD card: + * memory capacity = (C_SIZE+1) * 512K byte + */ + if (CSD_STRUCTURE_VERSION(sd_mmc_card->csd) >= SD_CSD_VER_2_0) { + sd_mmc_card->capacity = (SD_CSD_2_0_C_SIZE(sd_mmc_card->csd) + 1) * 512; + } else { + uint32_t blocknr + = ((SD_CSD_1_0_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (SD_CSD_1_0_C_SIZE_MULT(sd_mmc_card->csd) + 2))); + sd_mmc_card->capacity = blocknr * (1 << SD_CSD_1_0_READ_BL_LEN(sd_mmc_card->csd)) / 1024; + } } /** @@ -843,30 +825,29 @@ static void sd_decode_csd(void) * * \return true if success, otherwise false */ -static bool sd_mmc_cmd13(void) -{ - uint32_t nec_timeout; +static bool sd_mmc_cmd13(void) { + uint32_t nec_timeout; - /* Wait for data ready status. - * Nec timing: 0 to unlimited - * However a timeout is used. - * 200 000 * 8 cycles - */ - nec_timeout = 200000; - do { - if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD13_SEND_STATUS, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - /* Check busy flag */ - if (driver_get_response(sd_mmc_hal) & CARD_STATUS_READY_FOR_DATA) { - break; - } - if (nec_timeout-- == 0) { - return false; - } - } while (1); + /* Wait for data ready status. + * Nec timing: 0 to unlimited + * However a timeout is used. + * 200 000 * 8 cycles + */ + nec_timeout = 200000; + do { + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD13_SEND_STATUS, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* Check busy flag */ + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_READY_FOR_DATA) { + break; + } + if (nec_timeout-- == 0) { + return false; + } + } while (1); - return true; + return true; } #if (CONF_SDIO_SUPPORT == 1) @@ -881,19 +862,18 @@ static bool sd_mmc_cmd13(void) * * \return true if success, otherwise false */ -static bool sdio_cmd52(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t rd_after_wr, uint8_t *io_data) -{ - ASSERT(io_data != NULL); - if (!driver_send_cmd(sd_mmc_hal, - SDIO_CMD52_IO_RW_DIRECT, - ((uint32_t)*io_data << SDIO_CMD52_WR_DATA) | ((uint32_t)rw_flag << SDIO_CMD52_RW_FLAG) - | ((uint32_t)func_nb << SDIO_CMD52_FUNCTION_NUM) - | ((uint32_t)rd_after_wr << SDIO_CMD52_RAW_FLAG) - | ((uint32_t)reg_addr << SDIO_CMD52_REG_ADRR))) { - return false; - } - *io_data = driver_get_response(sd_mmc_hal) & 0xFF; - return true; +static bool sdio_cmd52(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t rd_after_wr, uint8_t *io_data) { + ASSERT(io_data != NULL); + if (!driver_send_cmd(sd_mmc_hal, + SDIO_CMD52_IO_RW_DIRECT, + ((uint32_t)*io_data << SDIO_CMD52_WR_DATA) | ((uint32_t)rw_flag << SDIO_CMD52_RW_FLAG) + | ((uint32_t)func_nb << SDIO_CMD52_FUNCTION_NUM) + | ((uint32_t)rd_after_wr << SDIO_CMD52_RAW_FLAG) + | ((uint32_t)reg_addr << SDIO_CMD52_REG_ADRR))) { + return false; + } + *io_data = driver_get_response(sd_mmc_hal) & 0xFF; + return true; } /** @@ -912,20 +892,19 @@ static bool sdio_cmd52(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint * \return true if success, otherwise false */ static bool sdio_cmd53(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t inc_addr, uint32_t size, - bool access_block) -{ - ASSERT(size != 0); - ASSERT(size <= 512); + bool access_block) { + ASSERT(size != 0); + ASSERT(size <= 512); - return driver_adtc_start( - sd_mmc_hal, - (rw_flag == SDIO_CMD53_READ_FLAG) ? SDIO_CMD53_IO_R_BYTE_EXTENDED : SDIO_CMD53_IO_W_BYTE_EXTENDED, - ((size % 512) << SDIO_CMD53_COUNT) | ((uint32_t)reg_addr << SDIO_CMD53_REG_ADDR) - | ((uint32_t)inc_addr << SDIO_CMD53_OP_CODE) | ((uint32_t)0 << SDIO_CMD53_BLOCK_MODE) - | ((uint32_t)func_nb << SDIO_CMD53_FUNCTION_NUM) | ((uint32_t)rw_flag << SDIO_CMD53_RW_FLAG), - size, - 1, - access_block); + return driver_adtc_start( + sd_mmc_hal, + (rw_flag == SDIO_CMD53_READ_FLAG) ? SDIO_CMD53_IO_R_BYTE_EXTENDED : SDIO_CMD53_IO_W_BYTE_EXTENDED, + ((size % 512) << SDIO_CMD53_COUNT) | ((uint32_t)reg_addr << SDIO_CMD53_REG_ADDR) + | ((uint32_t)inc_addr << SDIO_CMD53_OP_CODE) | ((uint32_t)0 << SDIO_CMD53_BLOCK_MODE) + | ((uint32_t)func_nb << SDIO_CMD53_FUNCTION_NUM) | ((uint32_t)rw_flag << SDIO_CMD53_RW_FLAG), + size, + 1, + access_block); } #endif @@ -934,19 +913,18 @@ static bool sdio_cmd53(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint * * \return true if success, otherwise false */ -static bool sd_acmd6(void) -{ - /* CMD55 - Indicate to the card that the next command is an - * application specific command rather than a standard command.*/ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - /* 10b = 4 bits bus */ - if (!driver_send_cmd(sd_mmc_hal, SD_ACMD6_SET_BUS_WIDTH, 0x2)) { - return false; - } - sd_mmc_card->bus_width = 4; - return true; +static bool sd_acmd6(void) { + /* CMD55 - Indicate to the card that the next command is an + * application specific command rather than a standard command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* 10b = 4 bits bus */ + if (!driver_send_cmd(sd_mmc_hal, SD_ACMD6_SET_BUS_WIDTH, 0x2)) { + return false; + } + sd_mmc_card->bus_width = 4; + return true; } /** @@ -960,48 +938,47 @@ static bool sd_acmd6(void) * * \return true if success, otherwise false */ -static bool sd_acmd51(void) -{ - uint8_t scr[SD_SCR_REG_BSIZE]; +static bool sd_acmd51(void) { + uint8_t scr[SD_SCR_REG_BSIZE]; - /* CMD55 - Indicate to the card that the next command is an - * application specific command rather than a standard command.*/ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - if (!driver_adtc_start(sd_mmc_hal, SD_ACMD51_SEND_SCR, 0, SD_SCR_REG_BSIZE, 1, true)) { - return false; - } - if (!driver_start_read_blocks(sd_mmc_hal, scr, 1)) { - return false; - } - if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { - return false; - } + /* CMD55 - Indicate to the card that the next command is an + * application specific command rather than a standard command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + if (!driver_adtc_start(sd_mmc_hal, SD_ACMD51_SEND_SCR, 0, SD_SCR_REG_BSIZE, 1, true)) { + return false; + } + if (!driver_start_read_blocks(sd_mmc_hal, scr, 1)) { + return false; + } + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + return false; + } - /* Get SD Memory Card - Spec. Version */ - switch (SD_SCR_SD_SPEC(scr)) { - case SD_SCR_SD_SPEC_1_0_01: - sd_mmc_card->version = CARD_VER_SD_1_0; - break; + /* Get SD Memory Card - Spec. Version */ + switch (SD_SCR_SD_SPEC(scr)) { + case SD_SCR_SD_SPEC_1_0_01: + sd_mmc_card->version = CARD_VER_SD_1_0; + break; - case SD_SCR_SD_SPEC_1_10: - sd_mmc_card->version = CARD_VER_SD_1_10; - break; + case SD_SCR_SD_SPEC_1_10: + sd_mmc_card->version = CARD_VER_SD_1_10; + break; - case SD_SCR_SD_SPEC_2_00: - if (SD_SCR_SD_SPEC3(scr) == SD_SCR_SD_SPEC_3_00) { - sd_mmc_card->version = CARD_VER_SD_3_0; - } else { - sd_mmc_card->version = CARD_VER_SD_2_0; - } - break; + case SD_SCR_SD_SPEC_2_00: + if (SD_SCR_SD_SPEC3(scr) == SD_SCR_SD_SPEC_3_00) { + sd_mmc_card->version = CARD_VER_SD_3_0; + } else { + sd_mmc_card->version = CARD_VER_SD_2_0; + } + break; - default: - sd_mmc_card->version = CARD_VER_SD_1_0; - break; - } - return true; + default: + sd_mmc_card->version = CARD_VER_SD_1_0; + break; + } + return true; } /** @@ -1015,82 +992,79 @@ static bool sd_acmd51(void) * \retval SD_MMC_INIT_ONGOING Card initialization requested * \retval SD_MMC_OK Card present */ -static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot) -{ - if (slot >= CONF_SD_MMC_MEM_CNT) { - return SD_MMC_ERR_SLOT; - } +static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot) { + if (slot >= CONF_SD_MMC_MEM_CNT) { + return SD_MMC_ERR_SLOT; + } - if (_cd && _cd[slot].pin != -1) { - /** Card Detect pins */ - if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) { - if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) { - SD_MMC_STOP_TIMEOUT(); - } - sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD; - return SD_MMC_ERR_NO_CARD; - } - if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) { - /* A card plug on going, but this is not initialized */ - sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_DEBOUNCE; - /* Debounce + Power On Setup */ - SD_MMC_START_TIMEOUT(); - return SD_MMC_ERR_NO_CARD; - } - if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) { - if (!SD_MMC_IS_TIMEOUT()) { - /* Debounce on going */ - return SD_MMC_ERR_NO_CARD; - } - /* Card is not initialized */ - sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT; - /* Set 1-bit bus width and low clock for initialization */ - sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT; - sd_mmc_cards[slot].bus_width = 1; - sd_mmc_cards[slot].high_speed = 0; - } - if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) { - return SD_MMC_ERR_UNUSABLE; - } - } else { - /* No pin card detection, then always try to install it */ - if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) - || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) { - /* Card is not initialized */ - sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT; - /* Set 1-bit bus width and low clock for initialization */ - sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT; - sd_mmc_cards[slot].bus_width = 1; - sd_mmc_cards[slot].high_speed = 0; - } - } + if (_cd && _cd[slot].pin != -1) { + /** Card Detect pins */ + if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) { + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) { + SD_MMC_STOP_TIMEOUT(); + } + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD; + return SD_MMC_ERR_NO_CARD; + } + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) { + /* A card plug on going, but this is not initialized */ + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_DEBOUNCE; + /* Debounce + Power On Setup */ + SD_MMC_START_TIMEOUT(); + return SD_MMC_ERR_NO_CARD; + } + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) { + if (!SD_MMC_IS_TIMEOUT()) { + /* Debounce on going */ + return SD_MMC_ERR_NO_CARD; + } + /* Card is not initialized */ + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT; + /* Set 1-bit bus width and low clock for initialization */ + sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT; + sd_mmc_cards[slot].bus_width = 1; + sd_mmc_cards[slot].high_speed = 0; + } + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) { + return SD_MMC_ERR_UNUSABLE; + } + } else { + /* No pin card detection, then always try to install it */ + if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) + || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) { + /* Card is not initialized */ + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT; + /* Set 1-bit bus width and low clock for initialization */ + sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT; + sd_mmc_cards[slot].bus_width = 1; + sd_mmc_cards[slot].high_speed = 0; + } + } - ASSERT(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0)); + ASSERT(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0)); - /* Initialize interface */ - sd_mmc_slot_sel = slot; - sd_mmc_card = &sd_mmc_cards[slot]; - sd_mmc_configure_slot(); - return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK; + /* Initialize interface */ + sd_mmc_slot_sel = slot; + sd_mmc_card = &sd_mmc_cards[slot]; + sd_mmc_configure_slot(); + return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK; } /** * \brief Configures the driver with the selected card configuration */ -static void sd_mmc_configure_slot(void) -{ - driver_select_device( - sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed); +static void sd_mmc_configure_slot(void) { + driver_select_device( + sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed); } /** * \brief Deselect the current card slot */ -static void sd_mmc_deselect_slot(void) -{ - if (sd_mmc_slot_sel < CONF_SD_MMC_MEM_CNT) { - driver_deselect_device(sd_mmc_hal, sd_mmc_slot_sel); - } +static void sd_mmc_deselect_slot(void) { + if (sd_mmc_slot_sel < CONF_SD_MMC_MEM_CNT) { + driver_deselect_device(sd_mmc_hal, sd_mmc_slot_sel); + } } /** @@ -1103,126 +1077,125 @@ static void sd_mmc_deselect_slot(void) * * \return true if success, otherwise false */ -static bool sd_mmc_mci_card_init(void) -{ - uint8_t v2 = 0; -#if (CONF_SDIO_SUPPORT == 1) - uint8_t data = 0x08; -#endif +static bool sd_mmc_mci_card_init(void) { + uint8_t v2 = 0; + #if (CONF_SDIO_SUPPORT == 1) + uint8_t data = 0x08; + #endif - /* In first, try to install SD/SDIO card */ - sd_mmc_card->type = CARD_TYPE_SD; - sd_mmc_card->version = CARD_VER_UNKNOWN; - sd_mmc_card->rca = 0; + /* In first, try to install SD/SDIO card */ + sd_mmc_card->type = CARD_TYPE_SD; + sd_mmc_card->version = CARD_VER_UNKNOWN; + sd_mmc_card->rca = 0; - /* Card need of 74 cycles clock minimum to start */ - driver_send_clock(sd_mmc_hal); + /* Card need of 74 cycles clock minimum to start */ + driver_send_clock(sd_mmc_hal); -#if (CONF_SDIO_SUPPORT == 1) - /* CMD52 Reset SDIO */ - sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_IOA, 0, &data); -#endif + #if (CONF_SDIO_SUPPORT == 1) + /* CMD52 Reset SDIO */ + sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_IOA, 0, &data); + #endif - /* CMD0 - Reset all cards to idle state.*/ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD0_GO_IDLE_STATE, 0)) { - return false; - } - if (!sd_cmd8(&v2)) { - return false; - } - /* Try to get the SDIO card's operating condition */ - if (!sdio_op_cond()) { - return false; - } + /* CMD0 - Reset all cards to idle state.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD0_GO_IDLE_STATE, 0)) { + return false; + } + if (!sd_cmd8(&v2)) { + return false; + } + /* Try to get the SDIO card's operating condition */ + if (!sdio_op_cond()) { + return false; + } - if (sd_mmc_card->type & CARD_TYPE_SD) { - /* Try to get the SD card's operating condition */ - if (!sd_mci_op_cond(v2)) { - /* It is not a SD card */ -#if CONF_MMC_SUPPORT - sd_mmc_card->type = CARD_TYPE_MMC; - return sd_mmc_mci_install_mmc(); -#else - sd_mmc_card->type = CARD_TYPE_UNKNOWN; - return false; -#endif - } - } + if (sd_mmc_card->type & CARD_TYPE_SD) { + /* Try to get the SD card's operating condition */ + if (!sd_mci_op_cond(v2)) { + /* It is not a SD card */ + #if CONF_MMC_SUPPORT + sd_mmc_card->type = CARD_TYPE_MMC; + return sd_mmc_mci_install_mmc(); + #else + sd_mmc_card->type = CARD_TYPE_UNKNOWN; + return false; + #endif + } + } - if (sd_mmc_card->type & CARD_TYPE_SD) { - /* SD MEMORY, Put the Card in Identify Mode - * Note: The CID is not used in this stack */ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD2_ALL_SEND_CID, 0)) { - return false; - } - } - /* Ask the card to publish a new relative address (RCA).*/ - if (!driver_send_cmd(sd_mmc_hal, SD_CMD3_SEND_RELATIVE_ADDR, 0)) { - return false; - } - sd_mmc_card->rca = (driver_get_response(sd_mmc_hal) >> 16) & 0xFFFF; + if (sd_mmc_card->type & CARD_TYPE_SD) { + /* SD MEMORY, Put the Card in Identify Mode + * Note: The CID is not used in this stack */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD2_ALL_SEND_CID, 0)) { + return false; + } + } + /* Ask the card to publish a new relative address (RCA).*/ + if (!driver_send_cmd(sd_mmc_hal, SD_CMD3_SEND_RELATIVE_ADDR, 0)) { + return false; + } + sd_mmc_card->rca = (driver_get_response(sd_mmc_hal) >> 16) & 0xFFFF; - /* SD MEMORY, Get the Card-Specific Data */ - if (sd_mmc_card->type & CARD_TYPE_SD) { - if (!sd_mmc_cmd9_mci()) { - return false; - } - sd_decode_csd(); - } - /* Select the and put it into Transfer Mode */ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD7_SELECT_CARD_CMD, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - /* SD MEMORY, Read the SCR to get card version */ - if (sd_mmc_card->type & CARD_TYPE_SD) { - if (!sd_acmd51()) { - return false; - } - } - if (IS_SDIO()) { - if (!sdio_get_max_speed()) { - return false; - } - } - if ((4 <= driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel))) { - /* TRY to enable 4-bit mode */ - if (IS_SDIO()) { - if (!sdio_cmd52_set_bus_width()) { - return false; - } - } - if (sd_mmc_card->type & CARD_TYPE_SD) { - if (!sd_acmd6()) { - return false; - } - } - /* Switch to selected bus mode */ - sd_mmc_configure_slot(); - } - if (driver_is_high_speed_capable(sd_mmc_hal)) { - /* TRY to enable High-Speed Mode */ - if (IS_SDIO()) { - if (!sdio_cmd52_set_high_speed()) { - return false; - } - } - if (sd_mmc_card->type & CARD_TYPE_SD) { - if (sd_mmc_card->version > CARD_VER_SD_1_0) { - if (!sd_cm6_set_high_speed()) { - return false; - } - } - } - /* Valid new configuration */ - sd_mmc_configure_slot(); - } - /* SD MEMORY, Set default block size */ - if (sd_mmc_card->type & CARD_TYPE_SD) { - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) { - return false; - } - } - return true; + /* SD MEMORY, Get the Card-Specific Data */ + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!sd_mmc_cmd9_mci()) { + return false; + } + sd_decode_csd(); + } + /* Select the and put it into Transfer Mode */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD7_SELECT_CARD_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* SD MEMORY, Read the SCR to get card version */ + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!sd_acmd51()) { + return false; + } + } + if (IS_SDIO()) { + if (!sdio_get_max_speed()) { + return false; + } + } + if ((4 <= driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel))) { + /* TRY to enable 4-bit mode */ + if (IS_SDIO()) { + if (!sdio_cmd52_set_bus_width()) { + return false; + } + } + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!sd_acmd6()) { + return false; + } + } + /* Switch to selected bus mode */ + sd_mmc_configure_slot(); + } + if (driver_is_high_speed_capable(sd_mmc_hal)) { + /* TRY to enable High-Speed Mode */ + if (IS_SDIO()) { + if (!sdio_cmd52_set_high_speed()) { + return false; + } + } + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (sd_mmc_card->version > CARD_VER_SD_1_0) { + if (!sd_cm6_set_high_speed()) { + return false; + } + } + } + /* Valid new configuration */ + sd_mmc_configure_slot(); + } + /* SD MEMORY, Set default block size */ + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) { + return false; + } + } + return true; } #if CONF_MMC_SUPPORT @@ -1236,435 +1209,417 @@ static bool sd_mmc_mci_card_init(void) * * \return true if success, otherwise false */ -static bool sd_mmc_mci_install_mmc(void) -{ - uint8_t b_authorize_high_speed; +static bool sd_mmc_mci_install_mmc(void) { + uint8_t b_authorize_high_speed; - /* CMD0 - Reset all cards to idle state. */ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD0_GO_IDLE_STATE, 0)) { - return false; - } + /* CMD0 - Reset all cards to idle state. */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD0_GO_IDLE_STATE, 0)) { + return false; + } - if (!mmc_mci_op_cond()) { - return false; - } + if (!mmc_mci_op_cond()) { + return false; + } - /* Put the Card in Identify Mode - * Note: The CID is not used in this stack*/ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD2_ALL_SEND_CID, 0)) { - return false; - } - /* Assign relative address to the card.*/ - sd_mmc_card->rca = 1; - if (!driver_send_cmd(sd_mmc_hal, MMC_CMD3_SET_RELATIVE_ADDR, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - /* Get the Card-Specific Data */ - if (!sd_mmc_cmd9_mci()) { - return false; - } - mmc_decode_csd(); - /* Select the and put it into Transfer Mode */ - if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD7_SELECT_CARD_CMD, (uint32_t)sd_mmc_card->rca << 16)) { - return false; - } - if (sd_mmc_card->version >= CARD_VER_MMC_4) { - /* For MMC 4.0 Higher version - * Get EXT_CSD */ - if (!mmc_cmd8(&b_authorize_high_speed)) { - return false; - } - if (4 <= driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel)) { - /* Enable more bus width */ - if (!mmc_cmd6_set_bus_width(driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel))) { - return false; - } - /* Reinitialize the slot with the bus width */ - sd_mmc_configure_slot(); - } - if (driver_is_high_speed_capable(sd_mmc_hal) && b_authorize_high_speed) { - /* Enable HS */ - if (!mmc_cmd6_set_high_speed()) { - return false; - } - /* Reinitialize the slot with the new speed */ - sd_mmc_configure_slot(); - } - } else { - /* Reinitialize the slot with the new speed */ - sd_mmc_configure_slot(); - } + /* Put the Card in Identify Mode + * Note: The CID is not used in this stack*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD2_ALL_SEND_CID, 0)) { + return false; + } + /* Assign relative address to the card.*/ + sd_mmc_card->rca = 1; + if (!driver_send_cmd(sd_mmc_hal, MMC_CMD3_SET_RELATIVE_ADDR, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* Get the Card-Specific Data */ + if (!sd_mmc_cmd9_mci()) { + return false; + } + mmc_decode_csd(); + /* Select the and put it into Transfer Mode */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD7_SELECT_CARD_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + if (sd_mmc_card->version >= CARD_VER_MMC_4) { + /* For MMC 4.0 Higher version + * Get EXT_CSD */ + if (!mmc_cmd8(&b_authorize_high_speed)) { + return false; + } + if (4 <= driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel)) { + /* Enable more bus width */ + if (!mmc_cmd6_set_bus_width(driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel))) { + return false; + } + /* Reinitialize the slot with the bus width */ + sd_mmc_configure_slot(); + } + if (driver_is_high_speed_capable(sd_mmc_hal) && b_authorize_high_speed) { + /* Enable HS */ + if (!mmc_cmd6_set_high_speed()) { + return false; + } + /* Reinitialize the slot with the new speed */ + sd_mmc_configure_slot(); + } + } else { + /* Reinitialize the slot with the new speed */ + sd_mmc_configure_slot(); + } - uint8_t retry = 10; - while (retry--) { - /* Retry is a WORKAROUND for no compliance card (Atmel Internal ref. MMC19): - * These cards seem not ready immediatly - * after the end of busy of mmc_cmd6_set_high_speed()*/ + uint8_t retry = 10; + while (retry--) { + /* Retry is a WORKAROUND for no compliance card (Atmel Internal ref. MMC19): + * These cards seem not ready immediatly + * after the end of busy of mmc_cmd6_set_high_speed()*/ - /* Set default block size */ - if (driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) { - return true; - } - } - return false; + /* Set default block size */ + if (driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) { + return true; + } + } + return false; } #endif /*--------------------- PUBLIC FUNCTIONS ----------------------------*/ -void sd_mmc_init(void *hal, sd_mmc_detect_t *card_detects, sd_mmc_detect_t *wp_detects) -{ - /* GPIO will be used to detect card and write protect. - * The related clocks and pinmux must be configurated in good - * condition. */ +void sd_mmc_init(void *hal, sd_mmc_detect_t *card_detects, sd_mmc_detect_t *wp_detects) { + /* GPIO will be used to detect card and write protect. + * The related clocks and pinmux must be configurated in good + * condition. */ - for (uint8_t slot = 0; slot < CONF_SD_MMC_MEM_CNT; slot++) { - sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD; - } - sd_mmc_slot_sel = 0xFF; /* No slot configurated */ - sd_mmc_hal = hal; - _cd = card_detects; - _wp = wp_detects; + for (uint8_t slot = 0; slot < CONF_SD_MMC_MEM_CNT; slot++) { + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD; + } + sd_mmc_slot_sel = 0xFF; /* No slot configurated */ + sd_mmc_hal = hal; + _cd = card_detects; + _wp = wp_detects; } -uint8_t sd_mmc_nb_slot(void) -{ - return CONF_SD_MMC_MEM_CNT; +uint8_t sd_mmc_nb_slot(void) { + return CONF_SD_MMC_MEM_CNT; } -sd_mmc_err_t sd_mmc_check(uint8_t slot) -{ - sd_mmc_err_t sd_mmc_err; +sd_mmc_err_t sd_mmc_check(uint8_t slot) { + sd_mmc_err_t sd_mmc_err; - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_INIT_ONGOING) { - sd_mmc_deselect_slot(); - return sd_mmc_err; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_INIT_ONGOING) { + sd_mmc_deselect_slot(); + return sd_mmc_err; + } - /* Initialization of the card requested */ - if (sd_mmc_mci_card_init()) { - sd_mmc_card->state = SD_MMC_CARD_STATE_READY; - sd_mmc_deselect_slot(); - /* To notify that the card has been just initialized - * It is necessary for USB Device MSC */ - return SD_MMC_INIT_ONGOING; - } - sd_mmc_card->state = SD_MMC_CARD_STATE_UNUSABLE; - sd_mmc_deselect_slot(); - return SD_MMC_ERR_UNUSABLE; + /* Initialization of the card requested */ + if (sd_mmc_mci_card_init()) { + sd_mmc_card->state = SD_MMC_CARD_STATE_READY; + sd_mmc_deselect_slot(); + /* To notify that the card has been just initialized + * It is necessary for USB Device MSC */ + return SD_MMC_INIT_ONGOING; + } + sd_mmc_card->state = SD_MMC_CARD_STATE_UNUSABLE; + sd_mmc_deselect_slot(); + return SD_MMC_ERR_UNUSABLE; } -card_type_t sd_mmc_get_type(uint8_t slot) -{ - if (SD_MMC_OK != sd_mmc_select_slot(slot)) { - return CARD_TYPE_UNKNOWN; - } - sd_mmc_deselect_slot(); - return sd_mmc_card->type; +card_type_t sd_mmc_get_type(uint8_t slot) { + if (SD_MMC_OK != sd_mmc_select_slot(slot)) { + return CARD_TYPE_UNKNOWN; + } + sd_mmc_deselect_slot(); + return sd_mmc_card->type; } -card_version_t sd_mmc_get_version(uint8_t slot) -{ - if (SD_MMC_OK != sd_mmc_select_slot(slot)) { - return CARD_VER_UNKNOWN; - } - sd_mmc_deselect_slot(); - return sd_mmc_card->version; +card_version_t sd_mmc_get_version(uint8_t slot) { + if (SD_MMC_OK != sd_mmc_select_slot(slot)) { + return CARD_VER_UNKNOWN; + } + sd_mmc_deselect_slot(); + return sd_mmc_card->version; } -uint32_t sd_mmc_get_capacity(uint8_t slot) -{ - if (SD_MMC_OK != sd_mmc_select_slot(slot)) { - return 0; - } - sd_mmc_deselect_slot(); - return sd_mmc_card->capacity; +uint32_t sd_mmc_get_capacity(uint8_t slot) { + if (SD_MMC_OK != sd_mmc_select_slot(slot)) { + return 0; + } + sd_mmc_deselect_slot(); + return sd_mmc_card->capacity; } -bool sd_mmc_is_write_protected(uint8_t slot) -{ - /* No detection, always writable */ - if (!_wp || _wp[slot].pin == -1) { - return false; - } - /* Write Protect Detect */ - if (gpio_get_pin_level(_wp[slot].pin) == _wp[slot].val) { - return true; - } - return false; +bool sd_mmc_is_write_protected(uint8_t slot) { + /* No detection, always writable */ + if (!_wp || _wp[slot].pin == -1) { + return false; + } + /* Write Protect Detect */ + if (gpio_get_pin_level(_wp[slot].pin) == _wp[slot].val) { + return true; + } + return false; } -sd_mmc_err_t sd_mmc_init_read_blocks(uint8_t slot, uint32_t start, uint16_t nb_block) -{ - sd_mmc_err_t sd_mmc_err; - uint32_t cmd, arg, resp; +sd_mmc_err_t sd_mmc_init_read_blocks(uint8_t slot, uint32_t start, uint16_t nb_block) { + sd_mmc_err_t sd_mmc_err; + uint32_t cmd, arg, resp; - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_OK) { - return sd_mmc_err; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } - /* Wait for data ready status */ - if (!sd_mmc_cmd13()) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + /* Wait for data ready status */ + if (!sd_mmc_cmd13()) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - if (nb_block > 1) { - cmd = SDMMC_CMD18_READ_MULTIPLE_BLOCK; - } else { - cmd = SDMMC_CMD17_READ_SINGLE_BLOCK; - } - /* - * SDSC Card (CCS=0) uses byte unit address, - * SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit). - */ - if (sd_mmc_card->type & CARD_TYPE_HC) { - arg = start; - } else { - arg = (start * SD_MMC_BLOCK_SIZE); - } + if (nb_block > 1) { + cmd = SDMMC_CMD18_READ_MULTIPLE_BLOCK; + } else { + cmd = SDMMC_CMD17_READ_SINGLE_BLOCK; + } + /* + * SDSC Card (CCS=0) uses byte unit address, + * SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit). + */ + if (sd_mmc_card->type & CARD_TYPE_HC) { + arg = start; + } else { + arg = (start * SD_MMC_BLOCK_SIZE); + } - if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - /* Check response */ - resp = driver_get_response(sd_mmc_hal); - if (resp & CARD_STATUS_ERR_RD_WR) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + /* Check response */ + resp = driver_get_response(sd_mmc_hal); + if (resp & CARD_STATUS_ERR_RD_WR) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - sd_mmc_nb_block_remaining = nb_block; - sd_mmc_nb_block_to_tranfer = nb_block; - return SD_MMC_OK; + sd_mmc_nb_block_remaining = nb_block; + sd_mmc_nb_block_to_tranfer = nb_block; + return SD_MMC_OK; } -sd_mmc_err_t sd_mmc_start_read_blocks(void *dest, uint16_t nb_block) -{ - ASSERT(sd_mmc_nb_block_remaining >= nb_block); +sd_mmc_err_t sd_mmc_start_read_blocks(void *dest, uint16_t nb_block) { + ASSERT(sd_mmc_nb_block_remaining >= nb_block); - if (!driver_start_read_blocks(sd_mmc_hal, dest, nb_block)) { - sd_mmc_nb_block_remaining = 0; - return SD_MMC_ERR_COMM; - } - sd_mmc_nb_block_remaining -= nb_block; - return SD_MMC_OK; + if (!driver_start_read_blocks(sd_mmc_hal, dest, nb_block)) { + sd_mmc_nb_block_remaining = 0; + return SD_MMC_ERR_COMM; + } + sd_mmc_nb_block_remaining -= nb_block; + return SD_MMC_OK; } -sd_mmc_err_t sd_mmc_wait_end_of_read_blocks(bool abort) -{ - if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { - return SD_MMC_ERR_COMM; - } - if (abort) { - sd_mmc_nb_block_remaining = 0; - } else if (sd_mmc_nb_block_remaining) { - return SD_MMC_OK; - } +sd_mmc_err_t sd_mmc_wait_end_of_read_blocks(bool abort) { + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + return SD_MMC_ERR_COMM; + } + if (abort) { + sd_mmc_nb_block_remaining = 0; + } else if (sd_mmc_nb_block_remaining) { + return SD_MMC_OK; + } - /* All blocks are transfered then stop read operation */ - if (sd_mmc_nb_block_to_tranfer == 1) { - /* Single block transfer, then nothing to do */ - sd_mmc_deselect_slot(); - return SD_MMC_OK; - } - /* WORKAROUND for no compliance card (Atmel Internal ref. !MMC7 !SD19): - * The errors on this command must be ignored - * and one retry can be necessary in SPI mode for no compliance card.*/ - if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) { - driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0); - } - sd_mmc_deselect_slot(); - return SD_MMC_OK; + /* All blocks are transfered then stop read operation */ + if (sd_mmc_nb_block_to_tranfer == 1) { + /* Single block transfer, then nothing to do */ + sd_mmc_deselect_slot(); + return SD_MMC_OK; + } + /* WORKAROUND for no compliance card (Atmel Internal ref. !MMC7 !SD19): + * The errors on this command must be ignored + * and one retry can be necessary in SPI mode for no compliance card.*/ + if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) { + driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0); + } + sd_mmc_deselect_slot(); + return SD_MMC_OK; } -sd_mmc_err_t sd_mmc_init_write_blocks(uint8_t slot, uint32_t start, uint16_t nb_block) -{ - sd_mmc_err_t sd_mmc_err; - uint32_t cmd, arg, resp; +sd_mmc_err_t sd_mmc_init_write_blocks(uint8_t slot, uint32_t start, uint16_t nb_block) { + sd_mmc_err_t sd_mmc_err; + uint32_t cmd, arg, resp; - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_OK) { - return sd_mmc_err; - } - if (sd_mmc_is_write_protected(slot)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_WP; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + if (sd_mmc_is_write_protected(slot)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_WP; + } - if (nb_block > 1) { - cmd = SDMMC_CMD25_WRITE_MULTIPLE_BLOCK; - } else { - cmd = SDMMC_CMD24_WRITE_BLOCK; - } - /* - * SDSC Card (CCS=0) uses byte unit address, - * SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit). - */ - if (sd_mmc_card->type & CARD_TYPE_HC) { - arg = start; - } else { - arg = (start * SD_MMC_BLOCK_SIZE); - } - if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - /* Check response */ - resp = driver_get_response(sd_mmc_hal); - if (resp & CARD_STATUS_ERR_RD_WR) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + if (nb_block > 1) { + cmd = SDMMC_CMD25_WRITE_MULTIPLE_BLOCK; + } else { + cmd = SDMMC_CMD24_WRITE_BLOCK; + } + /* + * SDSC Card (CCS=0) uses byte unit address, + * SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit). + */ + if (sd_mmc_card->type & CARD_TYPE_HC) { + arg = start; + } else { + arg = (start * SD_MMC_BLOCK_SIZE); + } + if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + /* Check response */ + resp = driver_get_response(sd_mmc_hal); + if (resp & CARD_STATUS_ERR_RD_WR) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - sd_mmc_nb_block_remaining = nb_block; - sd_mmc_nb_block_to_tranfer = nb_block; - return SD_MMC_OK; + sd_mmc_nb_block_remaining = nb_block; + sd_mmc_nb_block_to_tranfer = nb_block; + return SD_MMC_OK; } -sd_mmc_err_t sd_mmc_start_write_blocks(const void *src, uint16_t nb_block) -{ - ASSERT(sd_mmc_nb_block_remaining >= nb_block); - if (!driver_start_write_blocks(sd_mmc_hal, src, nb_block)) { - sd_mmc_nb_block_remaining = 0; - return SD_MMC_ERR_COMM; - } - sd_mmc_nb_block_remaining -= nb_block; - return SD_MMC_OK; +sd_mmc_err_t sd_mmc_start_write_blocks(const void *src, uint16_t nb_block) { + ASSERT(sd_mmc_nb_block_remaining >= nb_block); + if (!driver_start_write_blocks(sd_mmc_hal, src, nb_block)) { + sd_mmc_nb_block_remaining = 0; + return SD_MMC_ERR_COMM; + } + sd_mmc_nb_block_remaining -= nb_block; + return SD_MMC_OK; } -sd_mmc_err_t sd_mmc_wait_end_of_write_blocks(bool abort) -{ - if (!driver_wait_end_of_write_blocks(sd_mmc_hal)) { - return SD_MMC_ERR_COMM; - } - if (abort) { - sd_mmc_nb_block_remaining = 0; - } else if (sd_mmc_nb_block_remaining) { - return SD_MMC_OK; - } +sd_mmc_err_t sd_mmc_wait_end_of_write_blocks(bool abort) { + if (!driver_wait_end_of_write_blocks(sd_mmc_hal)) { + return SD_MMC_ERR_COMM; + } + if (abort) { + sd_mmc_nb_block_remaining = 0; + } else if (sd_mmc_nb_block_remaining) { + return SD_MMC_OK; + } - /* All blocks are transfered then stop write operation */ - if (sd_mmc_nb_block_to_tranfer == 1) { - /* Single block transfer, then nothing to do */ - sd_mmc_deselect_slot(); - return SD_MMC_OK; - } + /* All blocks are transfered then stop write operation */ + if (sd_mmc_nb_block_to_tranfer == 1) { + /* Single block transfer, then nothing to do */ + sd_mmc_deselect_slot(); + return SD_MMC_OK; + } - /* Note: SPI multiblock writes terminate using a special - * token, not a STOP_TRANSMISSION request.*/ - if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + /* Note: SPI multiblock writes terminate using a special + * token, not a STOP_TRANSMISSION request.*/ + if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - sd_mmc_deselect_slot(); - return SD_MMC_OK; + sd_mmc_deselect_slot(); + return SD_MMC_OK; } #if (CONF_SDIO_SUPPORT == 1) -sd_mmc_err_t sdio_read_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t *dest) -{ - sd_mmc_err_t sd_mmc_err; +sd_mmc_err_t sdio_read_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t *dest) { + sd_mmc_err_t sd_mmc_err; - if (dest == NULL) { - return SD_MMC_ERR_PARAM; - } + if (dest == NULL) { + return SD_MMC_ERR_PARAM; + } - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_OK) { - return sd_mmc_err; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } - if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, func_num, addr, 0, dest)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - sd_mmc_deselect_slot(); - return SD_MMC_OK; + if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, func_num, addr, 0, dest)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + sd_mmc_deselect_slot(); + return SD_MMC_OK; } -sd_mmc_err_t sdio_write_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t data) -{ - sd_mmc_err_t sd_mmc_err; +sd_mmc_err_t sdio_write_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t data) { + sd_mmc_err_t sd_mmc_err; - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_OK) { - return sd_mmc_err; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } - if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, func_num, addr, 0, &data)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, func_num, addr, 0, &data)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - sd_mmc_deselect_slot(); - return SD_MMC_OK; + sd_mmc_deselect_slot(); + return SD_MMC_OK; } sd_mmc_err_t sdio_read_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *dest, - uint16_t size) -{ - sd_mmc_err_t sd_mmc_err; + uint16_t size) { + sd_mmc_err_t sd_mmc_err; - if ((size == 0) || (size > 512)) { - return SD_MMC_ERR_PARAM; - } + if ((size == 0) || (size > 512)) { + return SD_MMC_ERR_PARAM; + } - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_OK) { - return sd_mmc_err; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } - if (!sdio_cmd53(SDIO_CMD53_READ_FLAG, func_num, addr, inc_addr, size, true)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - if (!driver_start_read_blocks(sd_mmc_hal, dest, 1)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + if (!sdio_cmd53(SDIO_CMD53_READ_FLAG, func_num, addr, inc_addr, size, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_start_read_blocks(sd_mmc_hal, dest, 1)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - sd_mmc_deselect_slot(); - return SD_MMC_OK; + sd_mmc_deselect_slot(); + return SD_MMC_OK; } sd_mmc_err_t sdio_write_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *src, - uint16_t size) -{ - sd_mmc_err_t sd_mmc_err; + uint16_t size) { + sd_mmc_err_t sd_mmc_err; - if ((size == 0) || (size > 512)) { - return SD_MMC_ERR_PARAM; - } + if ((size == 0) || (size > 512)) { + return SD_MMC_ERR_PARAM; + } - sd_mmc_err = sd_mmc_select_slot(slot); - if (sd_mmc_err != SD_MMC_OK) { - return sd_mmc_err; - } + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } - if (!sdio_cmd53(SDIO_CMD53_WRITE_FLAG, func_num, addr, inc_addr, size, true)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - if (!driver_start_write_blocks(sd_mmc_hal, src, 1)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } - if (!driver_wait_end_of_write_blocks(sd_mmc_hal)) { - sd_mmc_deselect_slot(); - return SD_MMC_ERR_COMM; - } + if (!sdio_cmd53(SDIO_CMD53_WRITE_FLAG, func_num, addr, inc_addr, size, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_start_write_blocks(sd_mmc_hal, src, 1)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_wait_end_of_write_blocks(sd_mmc_hal)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } - sd_mmc_deselect_slot(); - return SD_MMC_OK; + sd_mmc_deselect_slot(); + return SD_MMC_OK; } #endif diff --git a/ports/atmel-samd/sd_mmc/sd_mmc.h b/ports/atmel-samd/sd_mmc/sd_mmc.h index 1437e5efd5..e51bf17e80 100644 --- a/ports/atmel-samd/sd_mmc/sd_mmc.h +++ b/ports/atmel-samd/sd_mmc/sd_mmc.h @@ -104,8 +104,8 @@ typedef uint8_t card_version_t; /**< Type of card version */ /** Card detect setting */ typedef struct sd_mmc_detect { - int16_t pin; /**< Detection pin, -1 if no such pin */ - uint16_t val; /**< Detection value */ + int16_t pin; /**< Detection pin, -1 if no such pin */ + uint16_t val; /**< Detection value */ } sd_mmc_detect_t; /** This SD MMC stack uses the maximum block size autorized (512 bytes) */ @@ -281,7 +281,7 @@ sd_mmc_err_t sdio_write_direct(uint8_t slot, uint8_t func_num, uint32_t addr, ui * otherwise return an error code (\ref sd_mmc_err_t). */ sd_mmc_err_t sdio_read_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *dest, - uint16_t size); + uint16_t size); /** * \brief Write bytes to SDIO using RW_EXTENDED command. @@ -298,7 +298,7 @@ sd_mmc_err_t sdio_read_extended(uint8_t slot, uint8_t func_num, uint32_t addr, u * otherwise return an error code (\ref sd_mmc_err_t). */ sd_mmc_err_t sdio_write_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *src, - uint16_t size); + uint16_t size); #endif /* SDIO_SUPPORT_ENABLE */ /** @} */ diff --git a/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h b/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h index 0516e4fd10..9b4d8e8e74 100644 --- a/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h +++ b/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h @@ -97,43 +97,43 @@ extern "C" { * @{ */ -//! Value to define a SD/MMC/SDIO command +// ! Value to define a SD/MMC/SDIO command typedef uint32_t sdmmc_cmd_def_t; -//! \name Flags used to define a SD/MMC/SDIO command -//! @{ +// ! \name Flags used to define a SD/MMC/SDIO command +// ! @{ #define SDMMC_CMD_GET_INDEX(cmd) (cmd & 0x3F) -//! Have response (MCI only) +// ! Have response (MCI only) #define SDMMC_RESP_PRESENT (1lu << 8) -//! 8 bit response (SPI only) +// ! 8 bit response (SPI only) #define SDMMC_RESP_8 (1lu << 9) -//! 32 bit response (SPI only) +// ! 32 bit response (SPI only) #define SDMMC_RESP_32 (1lu << 10) -//! 136 bit response (MCI only) +// ! 136 bit response (MCI only) #define SDMMC_RESP_136 (1lu << 11) -//! Expect valid crc (MCI only) +// ! Expect valid crc (MCI only) #define SDMMC_RESP_CRC (1lu << 12) -//! Card may send busy +// ! Card may send busy #define SDMMC_RESP_BUSY (1lu << 13) // Open drain for a braodcast command (bc) // or to enter in inactive state (MCI only) #define SDMMC_CMD_OPENDRAIN (1lu << 14) -//! To signal a data write operation +// ! To signal a data write operation #define SDMMC_CMD_WRITE (1lu << 15) -//! To signal a SDIO tranfer in multi byte mode +// ! To signal a SDIO tranfer in multi byte mode #define SDMMC_CMD_SDIO_BYTE (1lu << 16) -//! To signal a SDIO tranfer in block mode +// ! To signal a SDIO tranfer in block mode #define SDMMC_CMD_SDIO_BLOCK (1lu << 17) -//! To signal a data transfer in stream mode +// ! To signal a data transfer in stream mode #define SDMMC_CMD_STREAM (1lu << 18) -//! To signal a data transfer in single block mode +// ! To signal a data transfer in single block mode #define SDMMC_CMD_SINGLE_BLOCK (1lu << 19) -//! To signal a data transfer in multi block mode +// ! To signal a data transfer in multi block mode #define SDMMC_CMD_MULTI_BLOCK (1lu << 20) -//! @} +// ! @} -//! \name Set of flags to define a reponse type -//! @{ +// ! \name Set of flags to define a reponse type +// ! @{ #define SDMMC_CMD_NO_RESP (0) #define SDMMC_CMD_R1 (SDMMC_RESP_PRESENT | SDMMC_RESP_CRC) #define SDMMC_CMD_R1B (SDMMC_RESP_PRESENT | SDMMC_RESP_CRC | SDMMC_RESP_BUSY) @@ -143,14 +143,14 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDMMC_CMD_R5 (SDMMC_RESP_PRESENT | SDMMC_RESP_8 | SDMMC_RESP_CRC) #define SDMMC_CMD_R6 (SDMMC_RESP_PRESENT | SDMMC_RESP_CRC) #define SDMMC_CMD_R7 (SDMMC_RESP_PRESENT | SDMMC_RESP_32 | SDMMC_RESP_CRC) -//! @} +// ! @} -//! \name SD/MMC/SDIO command definitions -//! SDMMC_CMDx are include in SD and MMC norms -//! MMC_CMDx are include in MMC norms only -//! SD_CMDx are include in SD norms only -//! SDIO_CMDx are include in SDIO norms only -//! @{ +// ! \name SD/MMC/SDIO command definitions +// ! SDMMC_CMDx are include in SD and MMC norms +// ! MMC_CMDx are include in MMC norms only +// ! SD_CMDx are include in SD norms only +// ! SDIO_CMDx are include in SDIO norms only +// ! @{ /* * --- Basic commands and read-stream command (class 0 and class 1) --- @@ -351,21 +351,21 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_CMD53_IO_W_BYTE_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BYTE | SDMMC_CMD_WRITE) #define SDIO_CMD53_IO_R_BLOCK_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BLOCK) #define SDIO_CMD53_IO_W_BLOCK_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BLOCK | SDMMC_CMD_WRITE) -//! @} -//! @} +// ! @} +// ! @} -//! \name Macros for command argument definition -//! @{ +// ! \name Macros for command argument definition +// ! @{ -//! \name MMC CMD6 argument structure -//! @{ -//! [31:26] Set to 0 -//! [25:24] Access +// ! \name MMC CMD6 argument structure +// ! @{ +// ! [31:26] Set to 0 +// ! [25:24] Access #define MMC_CMD6_ACCESS_COMMAND_SET (0lu << 24) #define MMC_CMD6_ACCESS_SET_BITS (1lu << 24) #define MMC_CMD6_ACCESS_CLEAR_BITS (2lu << 24) #define MMC_CMD6_ACCESS_WRITE_BYTE (3lu << 24) -//! [23:16] Index for Mode Segment +// ! [23:16] Index for Mode Segment #define MMC_CMD6_INDEX_CMD_SET (EXT_CSD_CMD_SET_INDEX << 16) #define MMC_CMD6_INDEX_CMD_SET_REV (EXT_CSD_CMD_SET_REV_INDEX << 16) #define MMC_CMD6_INDEX_POWER_CLASS (EXT_CSD_POWER_CLASS_INDEX << 16) @@ -375,61 +375,61 @@ typedef uint32_t sdmmc_cmd_def_t; #define MMC_CMD6_INDEX_BOOT_CONFIG (EXT_CSD_BOOT_CONFIG_INDEX << 16) #define MMC_CMD6_INDEX_BOOT_BUS_WIDTH (EXT_CSD_BOOT_BUS_WIDTH_INDEX << 16) #define MMC_CMD6_INDEX_ERASE_GROUP_DEF (EXT_CSD_ERASE_GROUP_DEF_INDEX << 16) -//! [15:8] Value +// ! [15:8] Value #define MMC_CMD6_VALUE_BUS_WIDTH_1BIT (0x0lu << 8) #define MMC_CMD6_VALUE_BUS_WIDTH_4BIT (0x1lu << 8) #define MMC_CMD6_VALUE_BUS_WIDTH_8BIT (0x2lu << 8) #define MMC_CMD6_VALUE_HS_TIMING_ENABLE (0x1lu << 8) #define MMC_CMD6_VALUE_HS_TIMING_DISABLE (0x0lu << 8) -//! [7:3] Set to 0 -//! [2:0] Cmd Set -//! @} +// ! [7:3] Set to 0 +// ! [2:0] Cmd Set +// ! @} -//! \name SD CMD6 argument structure -//! @{ -//! CMD6 arg[ 3: 0] function group 1, access mode +// ! \name SD CMD6 argument structure +// ! @{ +// ! CMD6 arg[ 3: 0] function group 1, access mode #define SD_CMD6_GRP1_HIGH_SPEED (0x1lu << 0) #define SD_CMD6_GRP1_DEFAULT (0x0lu << 0) -//! CMD6 arg[ 7: 4] function group 2, command system +// ! CMD6 arg[ 7: 4] function group 2, command system #define SD_CMD6_GRP2_NO_INFLUENCE (0xFlu << 4) #define SD_CMD6_GRP2_DEFAULT (0x0lu << 4) -//! CMD6 arg[11: 8] function group 3, 0xF or 0x0 +// ! CMD6 arg[11: 8] function group 3, 0xF or 0x0 #define SD_CMD6_GRP3_NO_INFLUENCE (0xFlu << 8) #define SD_CMD6_GRP3_DEFAULT (0x0lu << 8) -//! CMD6 arg[15:12] function group 4, 0xF or 0x0 +// ! CMD6 arg[15:12] function group 4, 0xF or 0x0 #define SD_CMD6_GRP4_NO_INFLUENCE (0xFlu << 12) #define SD_CMD6_GRP4_DEFAULT (0x0lu << 12) -//! CMD6 arg[19:16] function group 5, 0xF or 0x0 +// ! CMD6 arg[19:16] function group 5, 0xF or 0x0 #define SD_CMD6_GRP5_NO_INFLUENCE (0xFlu << 16) #define SD_CMD6_GRP5_DEFAULT (0x0lu << 16) -//! CMD6 arg[23:20] function group 6, 0xF or 0x0 +// ! CMD6 arg[23:20] function group 6, 0xF or 0x0 #define SD_CMD6_GRP6_NO_INFLUENCE (0xFlu << 20) #define SD_CMD6_GRP6_DEFAULT (0x0lu << 20) -//! CMD6 arg[30:24] reserved 0 -//! CMD6 arg[31 ] Mode, 0: Check, 1: Switch +// ! CMD6 arg[30:24] reserved 0 +// ! CMD6 arg[31 ] Mode, 0: Check, 1: Switch #define SD_CMD6_MODE_CHECK (0lu << 31) #define SD_CMD6_MODE_SWITCH (1lu << 31) -//! @} +// ! @} -//! \name SD CMD8 argument structure -//! @{ +// ! \name SD CMD8 argument structure +// ! @{ #define SD_CMD8_PATTERN 0xAA #define SD_CMD8_MASK_PATTERN 0xFF #define SD_CMD8_HIGH_VOLTAGE 0x100 #define SD_CMD8_MASK_VOLTAGE 0xF00 -//! @} +// ! @} -//! \name SD ACMD41 arguments -//! @{ -#define SD_ACMD41_HCS (1lu << 30) //!< (SD) Host Capacity Support - //! @} -//! @} +// ! \name SD ACMD41 arguments +// ! @{ +#define SD_ACMD41_HCS (1lu << 30) // !< (SD) Host Capacity Support + // ! @} +// ! @} -//! \name SDIO definitions -//! @{ +// ! \name SDIO definitions +// ! @{ -//! \name SDIO state (in R5) -//! @{ +// ! \name SDIO state (in R5) +// ! @{ #define SDIO_R5_COM_CRC_ERROR (1lu << 15) /**< CRC check error */ #define SDIO_R5_ILLEGAL_COMMAND (1lu << 14) /**< Illegal command */ #define SDIO_R5_STATE (3lu << 12) /**< SDIO R5 state mask */ @@ -440,11 +440,11 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_R5_ERROR (1lu << 11) /**< General error */ #define SDIO_R5_FUNC_NUM (1lu << 9) /**< Invalid function number */ #define SDIO_R5_OUT_OF_RANGE (1lu << 8) /**< Argument out of range */ -#define SDIO_R5_STATUS_ERR (SDIO_R5_ERROR | SDIO_R5_FUNC_NUM | SDIO_R5_OUT_OF_RANGE) //!< Errro status bits mask - //! @} +#define SDIO_R5_STATUS_ERR (SDIO_R5_ERROR | SDIO_R5_FUNC_NUM | SDIO_R5_OUT_OF_RANGE) // !< Errro status bits mask + // ! @} -//! \name SDIO state (in R6) -//! @{ +// ! \name SDIO state (in R6) +// ! @{ /** The CRC check of the previous command failed. */ #define SDIO_R6_COM_CRC_ERROR (1lu << 15) /** Command not legal for the card state. */ @@ -453,30 +453,30 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_R6_ERROR (1lu << 13) /** Status bits mask for SDIO R6 */ #define SDIO_STATUS_R6 (SDIO_R6_COM_CRC_ERROR | SDIO_R6_ILLEGAL_COMMAND | SDIO_R6_ERROR) -//! @} +// ! @} -//! \name SDIO CMD52 argument bit offset -//! @{ -//! CMD52 arg[ 7: 0] Write data or stuff bits +// ! \name SDIO CMD52 argument bit offset +// ! @{ +// ! CMD52 arg[ 7: 0] Write data or stuff bits #define SDIO_CMD52_WR_DATA 0 -//! CMD52 arg[ 8] Reserved +// ! CMD52 arg[ 8] Reserved #define SDIO_CMD52_STUFF0 8 -//! CMD52 arg[25: 9] Register address +// ! CMD52 arg[25: 9] Register address #define SDIO_CMD52_REG_ADRR 9 -//! CMD52 arg[ 26] Reserved +// ! CMD52 arg[ 26] Reserved #define SDIO_CMD52_STUFF1 26 -//! CMD52 arg[ 27] Read after Write flag +// ! CMD52 arg[ 27] Read after Write flag #define SDIO_CMD52_RAW_FLAG 27 -//! CMD52 arg[30:28] Number of the function +// ! CMD52 arg[30:28] Number of the function #define SDIO_CMD52_FUNCTION_NUM 28 -//! CMD52 arg[ 31] Direction, 1:write, 0:read. +// ! CMD52 arg[ 31] Direction, 1:write, 0:read. #define SDIO_CMD52_RW_FLAG 31 #define SDIO_CMD52_READ_FLAG 0 #define SDIO_CMD52_WRITE_FLAG 1 -//! @} +// ! @} -//! \name SDIO CMD53 argument structure -//! @{ +// ! \name SDIO CMD53 argument structure +// ! @{ /** * [ 8: 0] Byte mode: number of bytes to transfer, * 0 cause 512 bytes transfer. @@ -484,22 +484,22 @@ typedef uint32_t sdmmc_cmd_def_t; * 0 set count to infinite. */ #define SDIO_CMD53_COUNT 0 -//! CMD53 arg[25: 9] Start Address I/O register +// ! CMD53 arg[25: 9] Start Address I/O register #define SDIO_CMD53_REG_ADDR 9 -//! CMD53 arg[ 26] 1:Incrementing address, 0: fixed +// ! CMD53 arg[ 26] 1:Incrementing address, 0: fixed #define SDIO_CMD53_OP_CODE 26 -//! CMD53 arg[ 27] (Optional) 1:block mode +// ! CMD53 arg[ 27] (Optional) 1:block mode #define SDIO_CMD53_BLOCK_MODE 27 -//! CMD53 arg[30:28] Number of the function +// ! CMD53 arg[30:28] Number of the function #define SDIO_CMD53_FUNCTION_NUM 28 -//! CMD53 arg[ 31] Direction, 1:WR, 0:RD +// ! CMD53 arg[ 31] Direction, 1:WR, 0:RD #define SDIO_CMD53_RW_FLAG 31 #define SDIO_CMD53_READ_FLAG 0 #define SDIO_CMD53_WRITE_FLAG 1 -//! @} +// ! @} -//! \name SDIO Functions -//! @{ +// ! \name SDIO Functions +// ! @{ #define SDIO_CIA 0 /**< SDIO Function 0 (CIA) */ #define SDIO_FN0 0 /**< SDIO Function 0 */ #define SDIO_FN1 1 /**< SDIO Function 1 */ @@ -509,10 +509,10 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_FN5 5 /**< SDIO Function 5 */ #define SDIO_FN6 6 /**< SDIO Function 6 */ #define SDIO_FN7 7 /**< SDIO Function 7 */ - //! @} +// ! @} -//! \name SDIO Card Common Control Registers (CCCR) -//! @{ +// ! \name SDIO Card Common Control Registers (CCCR) +// ! @{ #define SDIO_CCCR_SDIO_REV 0x00 /**< CCCR/SDIO revision (RO) */ #define SDIO_CCCR_REV (0xFlu << 0) /**< CCCR/FBR Version */ #define SDIO_CCCR_REV_1_00 (0x0lu << 0) /**< CCCR/FBR Version 1.00 */ @@ -652,10 +652,10 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_CCCR_HS 0x13 /**< High-Speed */ #define SDIO_SHS (0x1lu << 0) /**< Support High-Speed (RO) */ #define SDIO_EHS (0x1lu << 1) /**< Enable High-Speed (R/W) */ - //! @} +// ! @} -//! \name SDIO Function Basic Registers (FBR) -//! @{ +// ! \name SDIO Function Basic Registers (FBR) +// ! @{ #define SDIO_FBR_ADDR(fn, x) (0x100 * (fn) + (x)) #define SDIO_FBR_CSA_IF 0x0 /**< CSA and function interface code (RO) */ #define SDIO_IFC (0xFUL << 0) /**< Standard SDIO Fun Interface Code */ @@ -679,10 +679,10 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_FBR_CSA_PTR 0xC /**< Address pointer to CSA (3B, LSB first) (R/W) */ #define SDIO_FBR_CSA_DATA 0xF /**< Read/Write fifo to CSA (R/W) */ #define SDIO_FBR_BLK_SIZ 0x10 /**< Block size (2B, LSB first) (R/W) */ - //! @} +// ! @} -//! \name SDIO Card Metaformat -//! @{ +// ! \name SDIO Card Metaformat +// ! @{ /** Null tuple (PCMCIA 3.1.9) */ #define SDIO_CISTPL_NULL 0x00 /** Device tuple (PCMCIA 3.2.2) */ @@ -705,38 +705,37 @@ typedef uint32_t sdmmc_cmd_def_t; #define SDIO_CISTPL_SDIO_EXT 0x92 /** The End-of-chain Tuple (PCMCIA 3.1.2) */ #define SDIO_CISTPL_END 0xFF -//! @} +// ! @} -//! @} +// ! @} -//! \name CSD, OCR, SCR, Switch status, extend CSD definitions -//! @{ +// ! \name CSD, OCR, SCR, Switch status, extend CSD definitions +// ! @{ /** * \brief Macro function to extract a bits field from a large SD MMC register * Used by : CSD, SCR, Switch status */ -static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint16_t pos, uint8_t size) -{ - uint32_t value; - value = reg[((reg_size - pos + 7) / 8) - 1] >> (pos % 8); - if (((pos % 8) + size) > 8) { - value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 2] << (8 - (pos % 8)); - } - if (((pos % 8) + size) > 16) { - value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (16 - (pos % 8)); - } - if (((pos % 8) + size) > 24) { - value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (24 - (pos % 8)); - } - value &= ((uint32_t)1 << size) - 1; - return value; +static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint16_t pos, uint8_t size) { + uint32_t value; + value = reg[((reg_size - pos + 7) / 8) - 1] >> (pos % 8); + if (((pos % 8) + size) > 8) { + value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 2] << (8 - (pos % 8)); + } + if (((pos % 8) + size) > 16) { + value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (16 - (pos % 8)); + } + if (((pos % 8) + size) > 24) { + value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (24 - (pos % 8)); + } + value &= ((uint32_t)1 << size) - 1; + return value; } - //! \name CSD Fields - //! @{ -#define CSD_REG_BIT_SIZE 128 //!< 128 bits -#define CSD_REG_BSIZE (CSD_REG_BIT_SIZE / 8) //!< 16 bytes +// ! \name CSD Fields +// ! @{ +#define CSD_REG_BIT_SIZE 128 // !< 128 bits +#define CSD_REG_BSIZE (CSD_REG_BIT_SIZE / 8) // !< 16 bytes #define CSD_STRUCTURE(csd, pos, size) SDMMC_UNSTUFF_BITS(csd, CSD_REG_BIT_SIZE, pos, size) #define CSD_STRUCTURE_VERSION(csd) CSD_STRUCTURE(csd, 126, 2) #define SD_CSD_VER_1_0 0 @@ -753,10 +752,10 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define MMC_CSD_C_SIZE_MULT(csd) CSD_STRUCTURE(csd, 47, 3) #define MMC_CSD_READ_BL_LEN(csd) CSD_STRUCTURE(csd, 80, 4) #define MMC_CSD_SPEC_VERS(csd) CSD_STRUCTURE(csd, 122, 4) - //! @} +// ! @} - //! \name OCR Register Fields - //! @{ +// ! \name OCR Register Fields +// ! @{ #define OCR_REG_BSIZE (32 / 8) /**< 32 bits, 4 bytes */ #define OCR_VDD_170_195 (1lu << 7) #define OCR_VDD_20_21 (1lu << 8) @@ -783,12 +782,12 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define OCR_ACCESS_MODE_SECTOR (2lu << 29) /**< (MMC) Sector access mode */ #define OCR_CCS (1lu << 30) /**< (SD) Card Capacity Status */ #define OCR_POWER_UP_BUSY (1lu << 31) /**< Card power up status bit */ - //! @} +// ! @} - //! \name SD SCR Register Fields - //! @{ -#define SD_SCR_REG_BIT_SIZE 64 //!< 64 bits -#define SD_SCR_REG_BSIZE (SD_SCR_REG_BIT_SIZE / 8) //!< 8 bytes +// ! \name SD SCR Register Fields +// ! @{ +#define SD_SCR_REG_BIT_SIZE 64 // !< 64 bits +#define SD_SCR_REG_BSIZE (SD_SCR_REG_BIT_SIZE / 8) // !< 8 bytes #define SD_SCR_STRUCTURE(scr, pos, size) SDMMC_UNSTUFF_BITS(scr, SD_SCR_REG_BIT_SIZE, pos, size) #define SD_SCR_SCR_STRUCTURE(scr) SD_SCR_STRUCTURE(scr, 60, 4) #define SD_SCR_SCR_STRUCTURE_1_0 0 @@ -810,14 +809,14 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define SD_SCR_SD_SPEC_3_00 1 #define SD_SCR_SD_EX_SECURITY(scr) SD_SCR_STRUCTURE(scr, 43, 4) #define SD_SCR_SD_CMD_SUPPORT(scr) SD_SCR_STRUCTURE(scr, 32, 2) - //! @} +// ! @} - //! \name SD Switch Status Fields - //! @{ -#define SD_SW_STATUS_BIT_SIZE 512 //!< 512 bits -#define SD_SW_STATUS_BSIZE (SD_SW_STATUS_BIT_SIZE / 8) //!< 64 bytes +// ! \name SD Switch Status Fields +// ! @{ +#define SD_SW_STATUS_BIT_SIZE 512 // !< 512 bits +#define SD_SW_STATUS_BSIZE (SD_SW_STATUS_BIT_SIZE / 8) // !< 64 bytes #define SD_SW_STATUS_STRUCTURE(sd_sw_status, pos, size) \ - SDMMC_UNSTUFF_BITS(sd_sw_status, SD_SW_STATUS_BIT_SIZE, pos, size) + SDMMC_UNSTUFF_BITS(sd_sw_status, SD_SW_STATUS_BIT_SIZE, pos, size) #define SD_SW_STATUS_MAX_CURRENT_CONSUMPTION(status) SD_SW_STATUS_STRUCTURE(status, 496, 16) #define SD_SW_STATUS_FUN_GRP6_INFO(status) SD_SW_STATUS_STRUCTURE(status, 480, 16) #define SD_SW_STATUS_FUN_GRP5_INFO(status) SD_SW_STATUS_STRUCTURE(status, 464, 16) @@ -839,10 +838,10 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define SD_SW_STATUS_FUN_GRP3_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 304, 16) #define SD_SW_STATUS_FUN_GRP2_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 288, 16) #define SD_SW_STATUS_FUN_GRP1_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 272, 16) - //! @} +// ! @} - //! \name Card Status Fields - //! @{ +// ! \name Card Status Fields +// ! @{ #define CARD_STATUS_APP_CMD (1lu << 5) #define CARD_STATUS_SWITCH_ERROR (1lu << 7) #define CARD_STATUS_READY_FOR_DATA (1lu << 8) @@ -876,17 +875,17 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define CARD_STATUS_ADDR_OUT_OF_RANGE (1lu << 31) #define CARD_STATUS_ERR_RD_WR \ - (CARD_STATUS_ADDR_OUT_OF_RANGE | CARD_STATUS_ADDRESS_MISALIGN | CARD_STATUS_BLOCK_LEN_ERROR \ - | CARD_STATUS_WP_VIOLATION | CARD_STATUS_ILLEGAL_COMMAND | CARD_STATUS_CC_ERROR | CARD_STATUS_ERROR) - //! @} + (CARD_STATUS_ADDR_OUT_OF_RANGE | CARD_STATUS_ADDRESS_MISALIGN | CARD_STATUS_BLOCK_LEN_ERROR \ + | CARD_STATUS_WP_VIOLATION | CARD_STATUS_ILLEGAL_COMMAND | CARD_STATUS_CC_ERROR | CARD_STATUS_ERROR) +// ! @} - //! \name SD Status Field - //! @{ +// ! \name SD Status Field +// ! @{ #define SD_STATUS_BSIZE (512 / 8) /**< 512 bits, 64bytes */ - //! @} +// ! @} - //! \name MMC Extended CSD Register Field - //! @{ +// ! \name MMC Extended CSD Register Field +// ! @{ #define EXT_CSD_BSIZE 512 /**< 512 bytes. */ /* Below belongs to Properties Segment */ #define EXT_CSD_S_CMD_SET_INDEX 504lu @@ -928,18 +927,18 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define EXT_CSD_BOOT_CONFIG_INDEX 179lu #define EXT_CSD_BOOT_BUS_WIDTH_INDEX 177lu #define EXT_CSD_ERASE_GROUP_DEF_INDEX 175lu - //! @} -//! @} +// ! @} +// ! @} -//! \name Definition for SPI mode only -//! @{ +// ! \name Definition for SPI mode only +// ! @{ -//! SPI commands start with a start bit "0" and a transmit bit "1" +// ! SPI commands start with a start bit "0" and a transmit bit "1" #define SPI_CMD_ENCODE(x) (0x40 | (x & 0x3F)) -//! \name Register R1 definition for SPI mode -//! The R1 register is always send after a command. -//! @{ +// ! \name Register R1 definition for SPI mode +// ! The R1 register is always send after a command. +// ! @{ #define R1_SPI_IDLE (1lu << 0) #define R1_SPI_ERASE_RESET (1lu << 1) #define R1_SPI_ILLEGAL_COMMAND (1lu << 2) @@ -949,11 +948,11 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define R1_SPI_PARAMETER (1lu << 6) // R1 bit 7 is always zero, reuse this bit for error #define R1_SPI_ERROR (1lu << 7) -//! @} +// ! @} -//! \name Register R2 definition for SPI mode -//! The R2 register can be send after R1 register. -//! @{ +// ! \name Register R2 definition for SPI mode +// ! The R2 register can be send after R1 register. +// ! @{ #define R2_SPI_CARD_LOCKED (1lu << 0) #define R2_SPI_WP_ERASE_SKIP (1lu << 1) #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP @@ -964,35 +963,35 @@ static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint1 #define R2_SPI_ERASE_PARAM (1lu << 6) #define R2_SPI_OUT_OF_RANGE (1lu << 7) #define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE -//! @} +// ! @} -//! \name Control Tokens in SPI Mode -//! @{ -//! \name Tokens used for a read operation -//! @{ +// ! \name Control Tokens in SPI Mode +// ! @{ +// ! \name Tokens used for a read operation +// ! @{ #define SPI_TOKEN_SINGLE_MULTI_READ 0xFE -#define SPI_TOKEN_DATA_ERROR_VALID(token) (((token)&0xF0) == 0) +#define SPI_TOKEN_DATA_ERROR_VALID(token) (((token) & 0xF0) == 0) #define SPI_TOKEN_DATA_ERROR_ERRORS (0x0F) #define SPI_TOKEN_DATA_ERROR_ERROR (1lu << 0) #define SPI_TOKEN_DATA_ERROR_CC_ERROR (1lu << 1) #define SPI_TOKEN_DATA_ERROR_ECC_ERROR (1lu << 2) #define SPI_TOKEN_DATA_ERROR_OUT_RANGE (1lu << 3) - //! @} - //! \name Tokens used for a write operation - //! @{ +// ! @} +// ! \name Tokens used for a write operation +// ! @{ #define SPI_TOKEN_SINGLE_WRITE 0xFE #define SPI_TOKEN_MULTI_WRITE 0xFC #define SPI_TOKEN_STOP_TRAN 0xFD #define SPI_TOKEN_DATA_RESP_VALID(token) ((((token) & (1 << 4)) == 0) && (((token) & (1 << 0)) == 1)) -#define SPI_TOKEN_DATA_RESP_CODE(token) ((token)&0x1E) +#define SPI_TOKEN_DATA_RESP_CODE(token) ((token) & 0x1E) #define SPI_TOKEN_DATA_RESP_ACCEPTED (2lu << 1) #define SPI_TOKEN_DATA_RESP_CRC_ERR (5lu << 1) #define SPI_TOKEN_DATA_RESP_WRITE_ERR (6lu << 1) - //! @} - //! @} - //! @} +// ! @} +// ! @} +// ! @} - //! @} end of sd_mmc_protocol +// ! @} end of sd_mmc_protocol #ifdef __cplusplus } diff --git a/ports/atmel-samd/supervisor/internal_flash.c b/ports/atmel-samd/supervisor/internal_flash.c index 4c7ca0dc76..98d7892c9f 100644 --- a/ports/atmel-samd/supervisor/internal_flash.c +++ b/ports/atmel-samd/supervisor/internal_flash.c @@ -58,12 +58,12 @@ static struct flash_descriptor supervisor_flash_desc; void supervisor_flash_init(void) { // Activity LED for flash writes. #ifdef MICROPY_HW_LED_MSC - struct port_config pin_conf; - port_get_config_defaults(&pin_conf); + struct port_config pin_conf; + port_get_config_defaults(&pin_conf); - pin_conf.direction = PORT_PIN_DIR_OUTPUT; - port_pin_set_config(MICROPY_HW_LED_MSC, &pin_conf); - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); + pin_conf.direction = PORT_PIN_DIR_OUTPUT; + port_pin_set_config(MICROPY_HW_LED_MSC, &pin_conf); + port_pin_set_output_level(MICROPY_HW_LED_MSC, false); #endif #ifdef SAM_D5X_E5X @@ -115,7 +115,7 @@ bool supervisor_flash_read_block(uint8_t *dest, uint32_t block) { bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { #ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, true); + port_pin_set_output_level(MICROPY_HW_LED_MSC, true); #endif temp_status_color(ACTIVE_WRITE); // non-MBR block, copy to cache @@ -126,8 +126,8 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { } int32_t error_code; error_code = flash_erase(&supervisor_flash_desc, - dest, - FILESYSTEM_BLOCK_SIZE / flash_get_page_size(&supervisor_flash_desc)); + dest, + FILESYSTEM_BLOCK_SIZE / flash_get_page_size(&supervisor_flash_desc)); if (error_code != ERR_NONE) { return false; } @@ -138,7 +138,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { } clear_temp_status(); #ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); + port_pin_set_output_level(MICROPY_HW_LED_MSC, false); #endif return true; } diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 2137c47559..15112f5ba7 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -97,9 +97,13 @@ volatile bool hold_interrupt = false; #ifdef SAMD21 static void rtc_set_continuous(bool continuous) { - while (RTC->MODE0.STATUS.bit.SYNCBUSY); + while (RTC->MODE0.STATUS.bit.SYNCBUSY) { + ; + } RTC->MODE0.READREQ.reg = (continuous ? RTC_READREQ_RCONT : 0) | 0x0010; - while (RTC->MODE0.STATUS.bit.SYNCBUSY); + while (RTC->MODE0.STATUS.bit.SYNCBUSY) { + ; + } } void rtc_start_pulse(void) { @@ -132,8 +136,8 @@ static void save_usb_clock_calibration(void) { // save the new value if its different enough. SYSCTRL->DFLLSYNC.bit.READREQ = 1; uint16_t saved_calibration = 0x1ff; - if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { - saved_calibration = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; + if (strcmp((char *)CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { + saved_calibration = ((uint16_t *)CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; } while (SYSCTRL->PCLKSR.bit.DFLLRDY == 0) { // TODO(tannewt): Run the mass storage stuff if this takes a while. @@ -142,7 +146,7 @@ static void save_usb_clock_calibration(void) { if (abs(current_calibration - saved_calibration) > 10) { // Copy the full internal config page to memory. uint8_t page_buffer[NVMCTRL_ROW_SIZE]; - memcpy(page_buffer, (uint8_t*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, NVMCTRL_ROW_SIZE); + memcpy(page_buffer, (uint8_t *)CIRCUITPY_INTERNAL_CONFIG_START_ADDR, NVMCTRL_ROW_SIZE); // Modify it. memcpy(page_buffer, "CIRCUITPYTHON1", 15); @@ -155,31 +159,33 @@ static void save_usb_clock_calibration(void) { // whenever we need it instead of storing it long term. struct flash_descriptor desc; desc.dev.hw = NVMCTRL; - flash_write(&desc, (uint32_t) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, page_buffer, NVMCTRL_ROW_SIZE); + flash_write(&desc, (uint32_t)CIRCUITPY_INTERNAL_CONFIG_START_ADDR, page_buffer, NVMCTRL_ROW_SIZE); } } #endif static void rtc_init(void) { -#ifdef SAMD21 + #ifdef SAMD21 _gclk_enable_channel(RTC_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK2_Val); RTC->MODE0.CTRL.bit.SWRST = true; - while (RTC->MODE0.CTRL.bit.SWRST != 0) {} + while (RTC->MODE0.CTRL.bit.SWRST != 0) { + } RTC->MODE0.CTRL.reg = RTC_MODE0_CTRL_ENABLE | - RTC_MODE0_CTRL_MODE_COUNT32 | - RTC_MODE0_CTRL_PRESCALER_DIV2; -#endif -#ifdef SAM_D5X_E5X + RTC_MODE0_CTRL_MODE_COUNT32 | + RTC_MODE0_CTRL_PRESCALER_DIV2; + #endif + #ifdef SAM_D5X_E5X hri_mclk_set_APBAMASK_RTC_bit(MCLK); RTC->MODE0.CTRLA.bit.SWRST = true; - while (RTC->MODE0.SYNCBUSY.bit.SWRST != 0) {} + while (RTC->MODE0.SYNCBUSY.bit.SWRST != 0) { + } RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_ENABLE | - RTC_MODE0_CTRLA_MODE_COUNT32 | - RTC_MODE0_CTRLA_PRESCALER_DIV2 | - RTC_MODE0_CTRLA_COUNTSYNC; -#endif + RTC_MODE0_CTRLA_MODE_COUNT32 | + RTC_MODE0_CTRLA_PRESCALER_DIV2 | + RTC_MODE0_CTRLA_COUNTSYNC; + #endif RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_OVF; @@ -201,14 +207,14 @@ static void rtc_init(void) { #endif NVIC_ClearPendingIRQ(RTC_IRQn); NVIC_EnableIRQ(RTC_IRQn); -#if CIRCUITPY_RTC + #if CIRCUITPY_RTC rtc_reset(); -#endif + #endif } safe_mode_t port_init(void) { -#if defined(SAMD21) + #if defined(SAMD21) // Set brownout detection. // Disable while changing level. @@ -217,17 +223,17 @@ safe_mode_t port_init(void) { SYSCTRL->BOD33.bit.ENABLE = 1; #ifdef ENABLE_MICRO_TRACE_BUFFER - REG_MTB_POSITION = ((uint32_t) (mtb - REG_MTB_BASE)) & 0xFFFFFFF8; - REG_MTB_FLOW = (((uint32_t) mtb - REG_MTB_BASE) + TRACE_BUFFER_SIZE_BYTES) & 0xFFFFFFF8; - REG_MTB_MASTER = 0x80000000 + (TRACE_BUFFER_MAGNITUDE_PACKETS - 1); + REG_MTB_POSITION = ((uint32_t)(mtb - REG_MTB_BASE)) & 0xFFFFFFF8; + REG_MTB_FLOW = (((uint32_t)mtb - REG_MTB_BASE) + TRACE_BUFFER_SIZE_BYTES) & 0xFFFFFFF8; + REG_MTB_MASTER = 0x80000000 + (TRACE_BUFFER_MAGNITUDE_PACKETS - 1); #else - // Triple check that the MTB is off. Switching between debug and non-debug - // builds can leave it set over reset and wreak havok as a result. - REG_MTB_MASTER = 0x00000000 + 6; + // Triple check that the MTB is off. Switching between debug and non-debug + // builds can leave it set over reset and wreak havok as a result. + REG_MTB_MASTER = 0x00000000 + 6; + #endif #endif -#endif -#if defined(SAM_D5X_E5X) + #if defined(SAM_D5X_E5X) // Set brownout detection. // Disable while changing level. SUPC->BOD33.bit.ENABLE = 0; @@ -240,7 +246,7 @@ safe_mode_t port_init(void) { // Leaving this code here disabled, // because it was hard enough to figure out, and maybe there's // a mistake that could make it work in the future. -#if 0 + #if 0 // Designate QSPI memory mapped region as not cachable. // Turn off MPU in case it is on. @@ -252,15 +258,15 @@ safe_mode_t port_init(void) { MPU->RBAR = QSPI_AHB; MPU->RASR = 0b011 << MPU_RASR_AP_Pos | // full read/write access for privileged and user mode - 0b000 << MPU_RASR_TEX_Pos | // caching not allowed, strongly ordered - 1 << MPU_RASR_S_Pos | // sharable - 0 << MPU_RASR_C_Pos | // not cachable - 0 << MPU_RASR_B_Pos | // not bufferable - 0b10111 << MPU_RASR_SIZE_Pos | // 16MB region size - 1 << MPU_RASR_ENABLE_Pos // enable this region - ; + 0b000 << MPU_RASR_TEX_Pos | // caching not allowed, strongly ordered + 1 << MPU_RASR_S_Pos | // sharable + 0 << MPU_RASR_C_Pos | // not cachable + 0 << MPU_RASR_B_Pos | // not bufferable + 0b10111 << MPU_RASR_SIZE_Pos | // 16MB region size + 1 << MPU_RASR_ENABLE_Pos // enable this region + ; // Turn off regions 1-7. - for (uint32_t i = 1; i < 8; i ++) { + for (uint32_t i = 1; i < 8; i++) { MPU->RNR = i; MPU->RBAR = 0; MPU->RASR = 0; @@ -270,28 +276,28 @@ safe_mode_t port_init(void) { // map for all privileged access, so we don't have to set up other regions // besides QSPI. MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk; -#endif + #endif samd_peripherals_enable_cache(); -#endif + #endif -#ifdef SAMD21 + #ifdef SAMD21 hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2); _pm_init(); -#endif + #endif -#if CALIBRATE_CRYSTALLESS + #if CALIBRATE_CRYSTALLESS uint32_t fine = DEFAULT_DFLL48M_FINE_CALIBRATION; // The fine calibration data is stored in an NVM page after the text and data storage but before // the optional file system. The first 16 bytes are the identifier for the section. - if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { - fine = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; + if (strcmp((char *)CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { + fine = ((uint16_t *)CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; } clock_init(BOARD_HAS_CRYSTAL, fine); -#else + #else // Use a default fine value clock_init(BOARD_HAS_CRYSTAL, DEFAULT_DFLL48M_FINE_CALIBRATION); -#endif + #endif rtc_init(); @@ -319,48 +325,48 @@ safe_mode_t port_init(void) { } void reset_port(void) { -#if CIRCUITPY_BUSIO + #if CIRCUITPY_BUSIO reset_sercoms(); -#endif -#if CIRCUITPY_AUDIOIO + #endif + #if CIRCUITPY_AUDIOIO audio_dma_reset(); audioout_reset(); -#endif -#if CIRCUITPY_AUDIOBUSIO - //pdmin_reset(); -#endif -#if CIRCUITPY_AUDIOBUSIO_I2SOUT + #endif + #if CIRCUITPY_AUDIOBUSIO + // pdmin_reset(); + #endif + #if CIRCUITPY_AUDIOBUSIO_I2SOUT i2sout_reset(); -#endif + #endif -#if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE + #if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE touchin_reset(); -#endif + #endif eic_reset(); -#if CIRCUITPY_PULSEIO + #if CIRCUITPY_PULSEIO pulsein_reset(); pulseout_reset(); -#endif -#if CIRCUITPY_PWMIO + #endif + #if CIRCUITPY_PWMIO pwmout_reset(); -#endif + #endif -#if CIRCUITPY_ANALOGIO + #if CIRCUITPY_ANALOGIO analogin_reset(); analogout_reset(); -#endif + #endif reset_gclks(); -#if CIRCUITPY_GAMEPAD + #if CIRCUITPY_GAMEPAD gamepad_reset(); -#endif -#if CIRCUITPY_GAMEPADSHIFT + #endif + #if CIRCUITPY_GAMEPADSHIFT gamepadshift_reset(); -#endif -#if CIRCUITPY_PEW + #endif + #if CIRCUITPY_PEW pew_reset(); -#endif + #endif reset_event_system(); @@ -375,11 +381,11 @@ void reset_port(void) { // gpio_set_pin_function(PIN_PB15, GPIO_PIN_FUNCTION_M); // GCLK1, D6 // #endif -#if CALIBRATE_CRYSTALLESS + #if CALIBRATE_CRYSTALLESS if (tud_cdc_connected()) { save_usb_clock_calibration(); } -#endif + #endif } void reset_to_bootloader(void) { @@ -413,10 +419,10 @@ uint32_t *port_heap_get_top(void) { // Place the word to save 8k from the end of RAM so we and the bootloader don't clobber it. #ifdef SAMD21 -uint32_t* safe_word = (uint32_t*) (HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000); +uint32_t *safe_word = (uint32_t *)(HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000); #endif #ifdef SAM_D5X_E5X -uint32_t* safe_word = (uint32_t*) (HSRAM_ADDR + HSRAM_SIZE - 0x2000); +uint32_t *safe_word = (uint32_t *)(HSRAM_ADDR + HSRAM_SIZE - 0x2000); #endif void port_set_saved_word(uint32_t value) { @@ -434,14 +440,16 @@ static volatile uint64_t overflowed_ticks = 0; static volatile bool _ticks_enabled = false; #endif -static uint32_t _get_count(uint64_t* overflow_count) { +static uint32_t _get_count(uint64_t *overflow_count) { #ifdef SAM_D5X_E5X - while ((RTC->MODE0.SYNCBUSY.reg & (RTC_MODE0_SYNCBUSY_COUNTSYNC | RTC_MODE0_SYNCBUSY_COUNT)) != 0) {} + while ((RTC->MODE0.SYNCBUSY.reg & (RTC_MODE0_SYNCBUSY_COUNTSYNC | RTC_MODE0_SYNCBUSY_COUNT)) != 0) { + } #endif #ifdef SAMD21 // Request a read so we don't stall the bus later. See section 14.3.1.5 Read Request RTC->MODE0.READREQ.reg = RTC_READREQ_RREQ | 0x0010; - while (RTC->MODE0.STATUS.bit.SYNCBUSY != 0) {} + while (RTC->MODE0.STATUS.bit.SYNCBUSY != 0) { + } #endif // Disable interrupts so we can grab the count and the overflow. common_hal_mcu_disable_interrupts(); @@ -460,11 +468,11 @@ static void _port_interrupt_after_ticks(uint32_t ticks) { // We'll interrupt sooner with an overflow. return; } -#ifdef SAMD21 + #ifdef SAMD21 if (hold_interrupt) { return; } -#endif + #endif RTC->MODE0.COMP[0].reg = current_ticks + (ticks << 4); RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0; RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0; @@ -476,7 +484,7 @@ void RTC_Handler(void) { RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_OVF; // Our RTC is 32 bits and we're clocking it at 16.384khz which is 16 (2 ** 4) subticks per // tick. - overflowed_ticks += (1L<< (32 - 4)); + overflowed_ticks += (1L << (32 - 4)); #ifdef SAM_D5X_E5X } else if (intflag & RTC_MODE0_INTFLAG_PER2) { RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_PER2; @@ -502,7 +510,7 @@ void RTC_Handler(void) { } } -uint64_t port_get_raw_ticks(uint8_t* subticks) { +uint64_t port_get_raw_ticks(uint8_t *subticks) { uint64_t overflow_count; uint32_t current_ticks = _get_count(&overflow_count); if (subticks != NULL) { @@ -551,9 +559,9 @@ void port_interrupt_after_ticks(uint32_t ticks) { void port_idle_until_interrupt(void) { #ifdef SAM_D5X_E5X // Clear the FPU interrupt because it can prevent us from sleeping. - if (__get_FPSCR() & ~(0x9f)) { - __set_FPSCR(__get_FPSCR() & ~(0x9f)); - (void) __get_FPSCR(); + if (__get_FPSCR() & ~(0x9f)) { + __set_FPSCR(__get_FPSCR() & ~(0x9f)); + (void)__get_FPSCR(); } #endif common_hal_mcu_disable_interrupts(); @@ -567,16 +575,15 @@ void port_idle_until_interrupt(void) { /** * \brief Default interrupt handler for unused IRQs. */ -__attribute__((used)) void HardFault_Handler(void) -{ -#ifdef ENABLE_MICRO_TRACE_BUFFER +__attribute__((used)) void HardFault_Handler(void) { + #ifdef ENABLE_MICRO_TRACE_BUFFER // Turn off the micro trace buffer so we don't fill it up in the infinite // loop below. REG_MTB_MASTER = 0x00000000 + 6; -#endif + #endif reset_into_safe_mode(HARD_CRASH); while (true) { - asm("nop;"); + asm ("nop;"); } } diff --git a/ports/atmel-samd/supervisor/qspi_flash.c b/ports/atmel-samd/supervisor/qspi_flash.c index aaed2a0eee..e59c2ee4a6 100644 --- a/ports/atmel-samd/supervisor/qspi_flash.c +++ b/ports/atmel-samd/supervisor/qspi_flash.c @@ -43,40 +43,44 @@ bool spi_flash_command(uint8_t command) { QSPI->INSTRCTRL.bit.INSTR = command; QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READ | - QSPI_INSTRFRAME_INSTREN; + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READ | + QSPI_INSTRFRAME_INSTREN; QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - while( !QSPI->INTFLAG.bit.INSTREND ); + while (!QSPI->INTFLAG.bit.INSTREND) { + ; + } QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; return true; } -bool spi_flash_read_command(uint8_t command, uint8_t* response, uint32_t length) { +bool spi_flash_read_command(uint8_t command, uint8_t *response, uint32_t length) { samd_peripherals_disable_and_clear_cache(); QSPI->INSTRCTRL.bit.INSTR = command; QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READ | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_DATAEN; + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READ | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_DATAEN; // Dummy read of INSTRFRAME needed to synchronize. // See Instruction Transmission Flow Diagram, figure 37.9, page 995 // and Example 4, page 998, section 37.6.8.5. - (volatile uint32_t) QSPI->INSTRFRAME.reg; + (volatile uint32_t)QSPI->INSTRFRAME.reg; - memcpy(response, (uint8_t *) QSPI_AHB, length); + memcpy(response, (uint8_t *)QSPI_AHB, length); QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - while( !QSPI->INTFLAG.bit.INSTREND ); + while (!QSPI->INTFLAG.bit.INSTREND) { + ; + } QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; @@ -85,29 +89,31 @@ bool spi_flash_read_command(uint8_t command, uint8_t* response, uint32_t length) return true; } -bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t length) { +bool spi_flash_write_command(uint8_t command, uint8_t *data, uint32_t length) { samd_peripherals_disable_and_clear_cache(); QSPI->INSTRCTRL.bit.INSTR = command; QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_WRITE | - QSPI_INSTRFRAME_INSTREN | - (data != NULL ? QSPI_INSTRFRAME_DATAEN : 0); + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_WRITE | + QSPI_INSTRFRAME_INSTREN | + (data != NULL ? QSPI_INSTRFRAME_DATAEN : 0); // Dummy read of INSTRFRAME needed to synchronize. // See Instruction Transmission Flow Diagram, figure 37.9, page 995 // and Example 4, page 998, section 37.6.8.5. - (volatile uint32_t) QSPI->INSTRFRAME.reg; + (volatile uint32_t)QSPI->INSTRFRAME.reg; if (data != NULL) { - memcpy((uint8_t *) QSPI_AHB, data, length); + memcpy((uint8_t *)QSPI_AHB, data, length); } QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - while( !QSPI->INTFLAG.bit.INSTREND ); + while (!QSPI->INTFLAG.bit.INSTREND) { + ; + } QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; @@ -121,40 +127,44 @@ bool spi_flash_sector_command(uint8_t command, uint32_t address) { QSPI->INSTRADDR.bit.ADDR = address; QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_WRITE | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN; + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_WRITE | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN; QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - while( !QSPI->INTFLAG.bit.INSTREND ); + while (!QSPI->INTFLAG.bit.INSTREND) { + ; + } QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; return true; } -bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) { +bool spi_flash_write_data(uint32_t address, uint8_t *data, uint32_t length) { samd_peripherals_disable_and_clear_cache(); QSPI->INSTRCTRL.bit.INSTR = CMD_PAGE_PROGRAM; uint32_t mode = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI; QSPI->INSTRFRAME.reg = mode | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_WRITEMEMORY | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN | - QSPI_INSTRFRAME_DATAEN; + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_WRITEMEMORY | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN | + QSPI_INSTRFRAME_DATAEN; - memcpy(((uint8_t *) QSPI_AHB) + address, data, length); + memcpy(((uint8_t *)QSPI_AHB) + address, data, length); // TODO(tannewt): Fix DMA and enable it. // qspi_dma_write(address, data, length); QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - while( !QSPI->INTFLAG.bit.INSTREND ); + while (!QSPI->INTFLAG.bit.INSTREND) { + ; + } QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; @@ -163,7 +173,7 @@ bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) { return true; } -bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) { +bool spi_flash_read_data(uint32_t address, uint8_t *data, uint32_t length) { samd_peripherals_disable_and_clear_cache(); #ifdef EXTERNAL_FLASH_QSPI_SINGLE @@ -179,29 +189,31 @@ bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) { #ifdef EXTERNAL_FLASH_QSPI_SINGLE QSPI->INSTRFRAME.reg = mode | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READMEMORY | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN | - QSPI_INSTRFRAME_DATAEN | - QSPI_INSTRFRAME_DUMMYLEN(0); + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READMEMORY | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN | + QSPI_INSTRFRAME_DATAEN | + QSPI_INSTRFRAME_DUMMYLEN(0); #else QSPI->INSTRFRAME.reg = mode | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READMEMORY | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN | - QSPI_INSTRFRAME_DATAEN | - QSPI_INSTRFRAME_DUMMYLEN(8); + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READMEMORY | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN | + QSPI_INSTRFRAME_DATAEN | + QSPI_INSTRFRAME_DUMMYLEN(8); #endif - memcpy(data, ((uint8_t *) QSPI_AHB) + address, length); + memcpy(data, ((uint8_t *)QSPI_AHB) + address, length); // TODO(tannewt): Fix DMA and enable it. // qspi_dma_read(address, data, length); QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - while( !QSPI->INTFLAG.bit.INSTREND ); + while (!QSPI->INTFLAG.bit.INSTREND) { + ; + } QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; @@ -224,8 +236,8 @@ void spi_flash_init(void) { // Super fast, may be unreliable when Saleae is connected to high speed lines. QSPI->BAUD.bit.BAUD = 2; QSPI->CTRLB.reg = QSPI_CTRLB_MODE_MEMORY | // Serial memory mode (map to QSPI_AHB) - QSPI_CTRLB_DATALEN_8BITS | - QSPI_CTRLB_CSMODE_LASTXFER; + QSPI_CTRLB_DATALEN_8BITS | + QSPI_CTRLB_CSMODE_LASTXFER; QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE; @@ -238,7 +250,7 @@ void spi_flash_init(void) { } } -void spi_flash_init_device(const external_flash_device* device) { +void spi_flash_init_device(const external_flash_device *device) { check_quad_enable(device); // TODO(tannewt): Adjust the speed for the found device. diff --git a/ports/atmel-samd/supervisor/usb.c b/ports/atmel-samd/supervisor/usb.c index ea940f8988..2a4c2d4f78 100644 --- a/ports/atmel-samd/supervisor/usb.c +++ b/ports/atmel-samd/supervisor/usb.c @@ -68,19 +68,19 @@ void USB_Handler(void) { #endif #ifdef SAM_D5X_E5X -void USB_0_Handler (void) { +void USB_0_Handler(void) { usb_irq_handler(); } -void USB_1_Handler (void) { +void USB_1_Handler(void) { usb_irq_handler(); } -void USB_2_Handler (void) { +void USB_2_Handler(void) { usb_irq_handler(); } -void USB_3_Handler (void) { +void USB_3_Handler(void) { usb_irq_handler(); } #endif diff --git a/ports/esp32s2/boards/adafruit_funhouse/board.c b/ports/esp32s2/boards/adafruit_funhouse/board.c index 3ca5c5d64f..d371c5fa1f 100644 --- a/ports/esp32s2/boards/adafruit_funhouse/board.c +++ b/ports/esp32s2/boards/adafruit_funhouse/board.c @@ -55,16 +55,16 @@ void board_init(void) { common_hal_never_reset_pin(&pin_GPIO20); // Debug UART -#ifdef DEBUG + #ifdef DEBUG common_hal_never_reset_pin(&pin_GPIO37); common_hal_never_reset_pin(&pin_GPIO38); -#endif /* DEBUG */ + #endif /* DEBUG */ - busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + busio_spi_obj_t *spi = &displays[0].fourwire_bus.inline_bus; common_hal_busio_spi_construct(spi, &pin_GPIO36, &pin_GPIO35, NULL); common_hal_busio_spi_never_reset(spi); - displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + displayio_fourwire_obj_t *bus = &displays[0].fourwire_bus; bus->base.type = &displayio_fourwire_type; common_hal_displayio_fourwire_construct(bus, spi, @@ -78,7 +78,7 @@ void board_init(void) { // workaround as board_init() is called before reset_port() in main.c pwmout_reset(); - displayio_display_obj_t* display = &displays[0].display; + displayio_display_obj_t *display = &displays[0].display; display->base.type = &displayio_display_type; common_hal_displayio_display_construct( display, diff --git a/ports/esp32s2/boards/adafruit_funhouse/mpconfigboard.h b/ports/esp32s2/boards/adafruit_funhouse/mpconfigboard.h index 99cb0982c9..2e6486c372 100644 --- a/ports/esp32s2/boards/adafruit_funhouse/mpconfigboard.h +++ b/ports/esp32s2/boards/adafruit_funhouse/mpconfigboard.h @@ -24,7 +24,7 @@ * THE SOFTWARE. */ -//Micropython setup +// Micropython setup #define MICROPY_HW_BOARD_NAME "Adafruit FunHome" #define MICROPY_HW_MCU_NAME "ESP32S2" diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h index ecfa1d78b3..4d3e8c0972 100644 --- a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h +++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h @@ -39,7 +39,3 @@ #define DEFAULT_I2C_BUS_SCL (&pin_GPIO34) #define DEFAULT_I2C_BUS_SDA (&pin_GPIO33) - -#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36) -#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35) -#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37) diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c index ff44d9edb6..f0bc69be09 100644 --- a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c +++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c @@ -18,6 +18,9 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_EPD_RESET), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_EPD_DC), MP_ROM_PTR(&pin_GPIO7) }, { MP_ROM_QSTR(MP_QSTR_EPD_CS), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_EPD_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_EPD_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_EPD_MISO), MP_ROM_PTR(&pin_GPIO37) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) }, { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) }, @@ -40,18 +43,12 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO34) }, - { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].epaper_display)}, diff --git a/ports/esp32s2/boards/artisense_rd00/board.c b/ports/esp32s2/boards/artisense_rd00/board.c index fb3e458cf4..2b18dd7592 100644 --- a/ports/esp32s2/boards/artisense_rd00/board.c +++ b/ports/esp32s2/boards/artisense_rd00/board.c @@ -34,10 +34,10 @@ void board_init(void) { common_hal_never_reset_pin(&pin_GPIO20); // Debug UART -#ifdef DEBUG + #ifdef DEBUG common_hal_never_reset_pin(&pin_GPIO43); common_hal_never_reset_pin(&pin_GPIO44); -#endif /* DEBUG */ + #endif /* DEBUG */ // Crystal common_hal_never_reset_pin(&pin_GPIO15); diff --git a/ports/esp32s2/boards/artisense_rd00/mpconfigboard.h b/ports/esp32s2/boards/artisense_rd00/mpconfigboard.h index e9ff39dbbd..0ee8c48ab8 100644 --- a/ports/esp32s2/boards/artisense_rd00/mpconfigboard.h +++ b/ports/esp32s2/boards/artisense_rd00/mpconfigboard.h @@ -24,9 +24,9 @@ * THE SOFTWARE. */ -//Micropython setup +// Micropython setup -//Same setup as the Saola board but with no Neopixel on board +// Same setup as the Saola board but with no Neopixel on board #define MICROPY_HW_BOARD_NAME "Artisense Reference Design RD00" #define MICROPY_HW_MCU_NAME "ESP32S2" diff --git a/ports/esp32s2/boards/atmegazero_esp32s2/board.c b/ports/esp32s2/boards/atmegazero_esp32s2/board.c index d8fd3a0a2b..a0e399b1ef 100644 --- a/ports/esp32s2/boards/atmegazero_esp32s2/board.c +++ b/ports/esp32s2/boards/atmegazero_esp32s2/board.c @@ -34,10 +34,10 @@ void board_init(void) { common_hal_never_reset_pin(&pin_GPIO20); // Debug UART -#ifdef DEBUG + #ifdef DEBUG common_hal_never_reset_pin(&pin_GPIO43); common_hal_never_reset_pin(&pin_GPIO44); -#endif /* DEBUG */ + #endif /* DEBUG */ // SPI Flash and RAM common_hal_never_reset_pin(&pin_GPIO26); diff --git a/ports/esp32s2/boards/atmegazero_esp32s2/mpconfigboard.h b/ports/esp32s2/boards/atmegazero_esp32s2/mpconfigboard.h index 3ef4e7eede..18fa67d245 100644 --- a/ports/esp32s2/boards/atmegazero_esp32s2/mpconfigboard.h +++ b/ports/esp32s2/boards/atmegazero_esp32s2/mpconfigboard.h @@ -24,7 +24,7 @@ * THE SOFTWARE. */ -//Micropython setup +// Micropython setup #define MICROPY_HW_BOARD_NAME "ATMegaZero ESP32-S2" #define MICROPY_HW_MCU_NAME "ESP32S2" diff --git a/ports/esp32s2/common-hal/wifi/Network.c b/ports/esp32s2/common-hal/wifi/Network.c index 49507df0d5..db99f264b6 100644 --- a/ports/esp32s2/common-hal/wifi/Network.c +++ b/ports/esp32s2/common-hal/wifi/Network.c @@ -24,11 +24,11 @@ * THE SOFTWARE. */ -#include "shared-bindings/wifi/Network.h" - #include -#include "py/obj.h" +#include "py/enum.h" +#include "shared-bindings/wifi/Network.h" +#include "shared-bindings/wifi/AuthMode.h" mp_obj_t common_hal_wifi_network_get_ssid(wifi_network_obj_t *self) { const char *cstr = (const char *)self->record.ssid; @@ -56,35 +56,42 @@ mp_obj_t common_hal_wifi_network_get_country(wifi_network_obj_t *self) { } mp_obj_t common_hal_wifi_network_get_authmode(wifi_network_obj_t *self) { - const char *authmode = ""; + uint8_t authmode_mask = 0; switch (self->record.authmode) { case WIFI_AUTH_OPEN: - authmode = "OPEN"; + authmode_mask = (1 << AUTHMODE_OPEN); break; case WIFI_AUTH_WEP: - authmode = "WEP"; + authmode_mask = (1 << AUTHMODE_WEP); break; case WIFI_AUTH_WPA_PSK: - authmode = "WPA_PSK"; + authmode_mask = (1 << AUTHMODE_WPA) | (1 << AUTHMODE_PSK); break; case WIFI_AUTH_WPA2_PSK: - authmode = "WPA2_PSK"; + authmode_mask = (1 << AUTHMODE_WPA2) | (1 << AUTHMODE_PSK); break; case WIFI_AUTH_WPA_WPA2_PSK: - authmode = "WPA_WPA2_PSK"; + authmode_mask = (1 << AUTHMODE_WPA) | (1 << AUTHMODE_WPA2) | (1 << AUTHMODE_PSK); break; case WIFI_AUTH_WPA2_ENTERPRISE: - authmode = "WPA2_ENTERPRISE"; + authmode_mask = (1 << AUTHMODE_WPA2) | (1 << AUTHMODE_ENTERPRISE); break; case WIFI_AUTH_WPA3_PSK: - authmode = "WPA3_PSK"; + authmode_mask = (1 << AUTHMODE_WPA3) | (1 << AUTHMODE_PSK); break; case WIFI_AUTH_WPA2_WPA3_PSK: - authmode = "WPA2_WPA3_PSK"; + authmode_mask = (1 << AUTHMODE_WPA2) | (1 << AUTHMODE_WPA3) | (1 << AUTHMODE_PSK); break; default: - authmode = "UNKNOWN"; break; } - return mp_obj_new_str(authmode, strlen(authmode)); + mp_obj_t authmode_list = mp_obj_new_list(0, NULL); + if (authmode_mask != 0) { + for (uint8_t i = 0; i < 8; i++) { + if ((authmode_mask >> i) & 1) { + mp_obj_list_append(authmode_list, cp_enum_find(&wifi_authmode_type, i)); + } + } + } + return authmode_list; } diff --git a/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c b/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c index 458fee6412..d48bda7cd1 100644 --- a/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c +++ b/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c @@ -150,11 +150,11 @@ void pwmout_reset(void) { #define PWM_SRC_CLK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk) static int calculate_pulse_count(uint32_t frequency, uint8_t *prescaler) { - if (frequency > PWM_SRC_CLK_FREQ/2) { + if (frequency > PWM_SRC_CLK_FREQ / 2) { return 0; } - for(int shift = 0; shift<8; shift++) { - int pulse_count = PWM_SRC_CLK_FREQ/(1<= 65535) { continue; } @@ -270,7 +270,7 @@ void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t *self, uint16_t d if (duty == 65535) { self->duty_scaled = self->pulse_count + 1; } else { - self->duty_scaled = ((uint32_t)duty * self->pulse_count + self->pulse_count/2) / 65535; + self->duty_scaled = ((uint32_t)duty * self->pulse_count + self->pulse_count / 2) / 65535; } switch (self->pwm->channel) { case kPWM_PwmX: @@ -292,7 +292,7 @@ uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t *self) { if (self->duty_cycle == 65535) { return 65535; } - return ((uint32_t)self->duty_scaled * 65535 + 65535/2) / self->pulse_count; + return ((uint32_t)self->duty_scaled * 65535 + 65535 / 2) / self->pulse_count; } void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t *self, @@ -319,7 +319,7 @@ void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t *self, } uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t *self) { - return PWM_SRC_CLK_FREQ/self->pulse_count/(1 << self->prescaler); + return PWM_SRC_CLK_FREQ / self->pulse_count / (1 << self->prescaler); } bool common_hal_pwmio_pwmout_get_variable_frequency(pwmio_pwmout_obj_t *self) { diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h index 1b808b0b18..c77497a775 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h @@ -49,8 +49,8 @@ typedef struct { typedef struct { PWM_Type *pwm; - pwm_submodule_t submodule:4; - pwm_channels_t channel:4; + pwm_submodule_t submodule : 4; + pwm_channels_t channel : 4; uint8_t mux_mode; uint8_t input_idx; uint32_t input_reg; @@ -59,9 +59,9 @@ typedef struct { #define PWM_PIN(p_pwm, p_submodule, p_channel, p_iomuxc, p_pin) \ PWM_PIN_(p_pwm, p_submodule, p_channel, p_iomuxc, p_pin) - //----------------------------------------------------------// - // supplied by the expansion of p_iomuxc into multiple args // -#define PWM_PIN_(p_pwm, p_submodule, p_channel, p_mux_reg, p_mux_mode, p_input_reg, p_input_idx, p_config_reg, p_pin)\ +// ----------------------------------------------------------// +// supplied by the expansion of p_iomuxc into multiple args // +#define PWM_PIN_(p_pwm, p_submodule, p_channel, p_mux_reg, p_mux_mode, p_input_reg, p_input_idx, p_config_reg, p_pin) \ { \ .pwm = p_pwm, \ .submodule = p_submodule, \ diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile index dea373cd12..091bd7599b 100755 --- a/ports/nrf/Makefile +++ b/ports/nrf/Makefile @@ -94,6 +94,11 @@ else CFLAGS += -flto -flto-partition=none endif +ifeq ($(NRF_DEBUG_PRINT), 1) + CFLAGS += -DNRF_DEBUG_PRINT=1 + SRC_SUPERVISOR += supervisor/debug_uart.c +endif + # option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk CFLAGS += $(OPTIMIZATION_FLAGS) diff --git a/ports/nrf/boards/pca10100/mpconfigboard.mk b/ports/nrf/boards/pca10100/mpconfigboard.mk index 74080a1ed9..dd59eb96c9 100644 --- a/ports/nrf/boards/pca10100/mpconfigboard.mk +++ b/ports/nrf/boards/pca10100/mpconfigboard.mk @@ -7,6 +7,7 @@ MCU_CHIP = nrf52833 INTERNAL_FLASH_FILESYSTEM = 1 +CIRCUITPY_ALARM = 0 CIRCUITPY_AUDIOMP3 = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_BITMAPTOOLS = 0 diff --git a/ports/nrf/boards/simmel/mpconfigboard.mk b/ports/nrf/boards/simmel/mpconfigboard.mk index 71d64bd670..e235fd1051 100644 --- a/ports/nrf/boards/simmel/mpconfigboard.mk +++ b/ports/nrf/boards/simmel/mpconfigboard.mk @@ -10,6 +10,7 @@ MCU_CHIP = nrf52833 INTERNAL_FLASH_FILESYSTEM = 1 +CIRCUITPY_ALARM = 0 CIRCUITPY_AESIO = 1 CIRCUITPY_AUDIOMP3 = 0 CIRCUITPY_BITMAPTOOLS = 0 @@ -24,6 +25,8 @@ CIRCUITPY_MSGPACK = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NVM = 0 CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_PULSEIO = 0 +CIRCUITPY_PWMIO = 1 CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 1 diff --git a/ports/nrf/common-hal/_bleio/PacketBuffer.c b/ports/nrf/common-hal/_bleio/PacketBuffer.c index 260e20514b..c3e8e43b3f 100644 --- a/ports/nrf/common-hal/_bleio/PacketBuffer.c +++ b/ports/nrf/common-hal/_bleio/PacketBuffer.c @@ -401,8 +401,8 @@ mp_int_t common_hal_bleio_packet_buffer_get_outgoing_packet_length(bleio_packet_ bleio_connection_internal_t *connection = bleio_conn_handle_to_connection(self->conn_handle); if (connection) { return MIN(MIN(common_hal_bleio_connection_get_max_packet_length(connection), - self->max_packet_size), - self->characteristic->max_length); + self->max_packet_size), + self->characteristic->max_length); } } // There's no current connection, so we don't know the MTU, and @@ -418,7 +418,7 @@ mp_int_t common_hal_bleio_packet_buffer_get_outgoing_packet_length(bleio_packet_ bleio_connection_internal_t *connection = bleio_conn_handle_to_connection(self->conn_handle); if (connection) { return MIN(common_hal_bleio_connection_get_max_packet_length(connection), - self->max_packet_size); + self->max_packet_size); } } } diff --git a/ports/nrf/common-hal/alarm/SleepMemory.c b/ports/nrf/common-hal/alarm/SleepMemory.c new file mode 100644 index 0000000000..4c7e5af847 --- /dev/null +++ b/ports/nrf/common-hal/alarm/SleepMemory.c @@ -0,0 +1,118 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "py/runtime.h" +#include "common-hal/alarm/__init__.h" +#include "common-hal/alarm/SleepMemory.h" +#include "nrf_power.h" + +#ifdef NRF_DEBUG_PRINT +extern void dbg_dump_RAMreg(void); +#include "supervisor/serial.h" // dbg_printf() +#endif + +__attribute__((section(".uninitialized"))) static uint8_t _sleepmem[SLEEP_MEMORY_LENGTH]; +__attribute__((section(".uninitialized"))) uint8_t sleepmem_wakeup_event; +__attribute__((section(".uninitialized"))) uint8_t sleepmem_wakeup_pin; +__attribute__((section(".uninitialized"))) static uint32_t _sleepmem_magicnum; +#define SLEEP_MEMORY_DATA_GUARD 0xad0000af +#define SLEEP_MEMORY_DATA_GUARD_MASK 0xff0000ff + +static int is_sleep_memory_valid(void) { + if ((_sleepmem_magicnum & SLEEP_MEMORY_DATA_GUARD_MASK) + == SLEEP_MEMORY_DATA_GUARD) { + return 1; + } + return 0; +} + +void set_memory_retention(void) { + // set RAM[n].POWER register for RAM retention + // nRF52840 has RAM[0..7].Section[0..1] and RAM[8].Section[0..5] + // nRF52833 has RAM[0..7].Section[0..1] and RAM[8].Section[0,1] + for (int block = 0; block <= 7; ++block) { + nrf_power_rampower_mask_on(NRF_POWER, block, + NRF_POWER_RAMPOWER_S0RETENTION_MASK | + NRF_POWER_RAMPOWER_S1RETENTION_MASK); + }; + #ifdef NRF52840 + nrf_power_rampower_mask_on(NRF_POWER, 8, + NRF_POWER_RAMPOWER_S0RETENTION_MASK | + NRF_POWER_RAMPOWER_S1RETENTION_MASK | + NRF_POWER_RAMPOWER_S2RETENTION_MASK | + NRF_POWER_RAMPOWER_S3RETENTION_MASK | + NRF_POWER_RAMPOWER_S4RETENTION_MASK | + NRF_POWER_RAMPOWER_S5RETENTION_MASK); + #endif + #ifdef NRF52833 + nrf_power_rampower_mask_on(NRF_POWER, 8, + NRF_POWER_RAMPOWER_S0RETENTION_MASK | + NRF_POWER_RAMPOWER_S1RETENTION_MASK); + #endif +} + +static void initialize_sleep_memory(void) { + memset((uint8_t *)_sleepmem, 0, SLEEP_MEMORY_LENGTH); + sleepmem_wakeup_event = 0; + sleepmem_wakeup_pin = 0; + + set_memory_retention(); + #ifdef NRF_DEBUG_PRINT + // dbg_dump_RAMreg(); + #endif + + _sleepmem_magicnum = SLEEP_MEMORY_DATA_GUARD; +} + +void alarm_sleep_memory_reset(void) { + if (!is_sleep_memory_valid()) { + initialize_sleep_memory(); + #ifdef NRF_DEBUG_PRINT + dbg_printf("sleep memory initialized\r\n"); + #endif + } +} + +uint32_t common_hal_alarm_sleep_memory_get_length(alarm_sleep_memory_obj_t *self) { + return sizeof(_sleepmem); +} + +bool common_hal_alarm_sleep_memory_set_bytes(alarm_sleep_memory_obj_t *self, uint32_t start_index, const uint8_t *values, uint32_t len) { + if (start_index + len > sizeof(_sleepmem)) { + return false; + } + + memcpy((uint8_t *)(_sleepmem + start_index), values, len); + return true; +} + +void common_hal_alarm_sleep_memory_get_bytes(alarm_sleep_memory_obj_t *self, uint32_t start_index, uint8_t *values, uint32_t len) { + if (start_index + len > sizeof(_sleepmem)) { + return; + } + memcpy(values, (uint8_t *)(_sleepmem + start_index), len); +} diff --git a/ports/nrf/common-hal/alarm/SleepMemory.h b/ports/nrf/common-hal/alarm/SleepMemory.h new file mode 100644 index 0000000000..8fd702ea83 --- /dev/null +++ b/ports/nrf/common-hal/alarm/SleepMemory.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_ALARM_SLEEPMEMORY_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_ALARM_SLEEPMEMORY_H + +#include "py/obj.h" + +#define SLEEP_MEMORY_LENGTH (256) + +typedef struct { + mp_obj_base_t base; +} alarm_sleep_memory_obj_t; + +extern void set_memory_retention(void); +extern void alarm_sleep_memory_reset(void); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_ALARM_SLEEPMEMORY_H diff --git a/ports/nrf/common-hal/alarm/__init__.c b/ports/nrf/common-hal/alarm/__init__.c new file mode 100644 index 0000000000..4a0fdeb8a0 --- /dev/null +++ b/ports/nrf/common-hal/alarm/__init__.c @@ -0,0 +1,347 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/gc.h" +#include "py/obj.h" +#include "py/objtuple.h" +#include "py/runtime.h" +#include +#include + +#include "shared-bindings/alarm/__init__.h" +#include "shared-bindings/alarm/SleepMemory.h" +#include "shared-bindings/alarm/pin/PinAlarm.h" +#include "shared-bindings/alarm/time/TimeAlarm.h" +#include "shared-bindings/alarm/touch/TouchAlarm.h" +#include "shared-bindings/time/__init__.h" + +#include "supervisor/port.h" +#include "supervisor/serial.h" // serial_connected() +#ifdef NRF_DEBUG_PRINT +#include "supervisor/serial.h" // dbg_printf() +extern int dbg_check_RTCprescaler(void); +#endif +#include "supervisor/qspi_flash.h" + +#include "nrf.h" +#include "nrf_power.h" +#include "nrfx.h" +#include "nrfx_gpiote.h" + +// Singleton instance of SleepMemory. +const alarm_sleep_memory_obj_t alarm_sleep_memory_obj = { + .base = { + .type = &alarm_sleep_memory_type, + }, +}; + +void alarm_reset(void) { + alarm_sleep_memory_reset(); + alarm_pin_pinalarm_reset(); + alarm_time_timealarm_reset(); + alarm_touch_touchalarm_reset(); +} + +extern uint32_t reset_reason_saved; +STATIC nrf_sleep_source_t _get_wakeup_cause(void) { + if (alarm_pin_pinalarm_woke_us_up()) { + return NRF_SLEEP_WAKEUP_GPIO; + } + if (alarm_time_timealarm_woke_us_up()) { + return NRF_SLEEP_WAKEUP_TIMER; + } + if (alarm_touch_touchalarm_woke_us_up()) { + return NRF_SLEEP_WAKEUP_TOUCHPAD; + } + if (reset_reason_saved & NRF_POWER_RESETREAS_RESETPIN_MASK) { + return NRF_SLEEP_WAKEUP_RESETPIN; + } else if (reset_reason_saved & NRF_POWER_RESETREAS_OFF_MASK) { + return NRF_SLEEP_WAKEUP_GPIO; + } else if (reset_reason_saved & NRF_POWER_RESETREAS_VBUS_MASK) { + return NRF_SLEEP_WAKEUP_VBUS; + } + return NRF_SLEEP_WAKEUP_UNDEFINED; +} + +#ifdef NRF_DEBUG_PRINT +static const char *cause_str[] = { + "UNDEFINED", + "GPIO", + "TIMER", + "TOUCHPAD", + "VBUS", + "RESETPIN", +}; +void print_wakeup_cause(nrf_sleep_source_t cause) { + if (cause >= 0 && cause < NRF_SLEEP_WAKEUP_ZZZ) { + dbg_printf("wakeup cause = NRF_SLEEP_WAKEUP_%s\r\n", + cause_str[(int)cause]); + } +} +#endif + +bool common_hal_alarm_woken_from_sleep(void) { + nrf_sleep_source_t cause = _get_wakeup_cause(); + #ifdef NRF_DEBUG_PRINT + if (cause != NRF_SLEEP_WAKEUP_UNDEFINED) { + // print_wakeup_cause(cause); + } + #endif + return cause == NRF_SLEEP_WAKEUP_GPIO || cause == NRF_SLEEP_WAKEUP_TIMER + || cause == NRF_SLEEP_WAKEUP_TOUCHPAD; +} + +STATIC mp_obj_t _get_wake_alarm(size_t n_alarms, const mp_obj_t *alarms) { + nrf_sleep_source_t cause = _get_wakeup_cause(); + switch (cause) { + case NRF_SLEEP_WAKEUP_TIMER: { + return alarm_time_timealarm_get_wakeup_alarm(n_alarms, alarms); + } + case NRF_SLEEP_WAKEUP_TOUCHPAD: { + return alarm_touch_touchalarm_get_wakeup_alarm(n_alarms, alarms); + } + case NRF_SLEEP_WAKEUP_GPIO: { + return alarm_pin_pinalarm_get_wakeup_alarm(n_alarms, alarms); + } + default: + break; + } + return mp_const_none; +} + +mp_obj_t common_hal_alarm_get_wake_alarm(void) { + mp_obj_t obj = _get_wake_alarm(0, NULL); + return obj; +} + +// Set up light sleep or deep sleep alarms. +STATIC void _setup_sleep_alarms(bool deep_sleep, size_t n_alarms, const mp_obj_t *alarms) { + alarm_pin_pinalarm_set_alarms(deep_sleep, n_alarms, alarms); + alarm_time_timealarm_set_alarms(deep_sleep, n_alarms, alarms); + alarm_touch_touchalarm_set_alarm(deep_sleep, n_alarms, alarms); +} + +// TODO: this handles all possible types of wakeup, which is redundant with main. +// revise to extract all parts essential to enabling sleep wakeup, but leave the +// alarm/non-alarm sorting to the existing main loop. +void system_on_idle_until_alarm(int64_t timediff_ms, uint32_t prescaler) { + bool have_timeout = false; + uint64_t start_tick = 0, end_tick = 0; + int64_t tickdiff; + + #if defined(MICROPY_QSPI_CS) + qspi_flash_enter_sleep(); + #endif + + if (timediff_ms != -1) { + have_timeout = true; + #if 0 + int64_t now = common_hal_time_monotonic_ms(); + dbg_printf("now_ms=%ld timediff_ms=%ld\r\n", (long)now, (long)timediff_ms); + #endif + if (timediff_ms < 0) { + timediff_ms = 0; + } + if (prescaler == 0) { + // 1 tick = 1/1024 sec = 1000/1024 ms + // -> 1 ms = 1024/1000 ticks + tickdiff = (mp_uint_t)(timediff_ms * 1024 / 1000); // ms -> ticks + } else { + // 1 tick = prescaler/1024 sec = prescaler*1000/1024 ms + // -> 1ms = 1024/(1000*prescaler) ticks + tickdiff = (mp_uint_t)(timediff_ms * 1024 / (1000 * prescaler)); + } + start_tick = port_get_raw_ticks(NULL); + end_tick = start_tick + tickdiff; + } + #if 0 + dbg_printf("start_tick=%ld end_tick=%ld have_timeout=%c\r\n", (long)start_tick, (long)end_tick, have_timeout ? 'T' : 'F'); + #endif + + int64_t remaining; + sleepmem_wakeup_event = SLEEPMEM_WAKEUP_BY_NONE; + sleepmem_wakeup_pin = WAKEUP_PIN_UNDEF; + + #ifdef NRF_DEBUG_PRINT + int ct = 40; + char reason = '?'; +#define WAKEUP_REASON(x) reason = (x) + #else +#define WAKEUP_REASON(x) + #endif + + while (1) { + if (mp_hal_is_interrupted()) { + WAKEUP_REASON('I'); + break; + } + if (serial_connected() && serial_bytes_available()) { + WAKEUP_REASON('S'); + break; + } + RUN_BACKGROUND_TASKS; + if (common_hal_alarm_woken_from_sleep()) { + WAKEUP_REASON('W'); + break; + } + if (have_timeout) { + remaining = end_tick - port_get_raw_ticks(NULL); + // We break a bit early so we don't risk setting the alarm before the time when we call + // sleep. + if (remaining < 1) { + WAKEUP_REASON('t'); + break; + } + port_interrupt_after_ticks(remaining); + } + // Idle until an interrupt happens. + port_idle_until_interrupt(); + #ifdef NRF_DEBUG_PRINT + if (ct > 0) { + dbg_printf("_"); + --ct; + } + #endif + if (have_timeout) { + remaining = end_tick - port_get_raw_ticks(NULL); + if (remaining <= 0) { + sleepmem_wakeup_event = SLEEPMEM_WAKEUP_BY_TIMER; + WAKEUP_REASON('T'); + break; + } + } + } + #ifdef NRF_DEBUG_PRINT + dbg_printf("%c\r\n", reason); + #endif + + #if defined(MICROPY_QSPI_CS) + qspi_flash_exit_sleep(); + #endif + + #ifdef NRF_DEBUG_PRINT + tickdiff = port_get_raw_ticks(NULL) - start_tick; + double sec; + if (prescaler == 0) { + sec = (double)tickdiff / 1024; + } else { + sec = (double)(tickdiff * prescaler) / 1024; + } + dbg_printf("lapse %6.1f sec\r\n", sec); + #endif +} + +mp_obj_t common_hal_alarm_light_sleep_until_alarms(size_t n_alarms, const mp_obj_t *alarms) { + mp_obj_t wake_alarm; + alarm_time_timealarm_clear_wakeup_time(); + _setup_sleep_alarms(false, n_alarms, alarms); + + #ifdef NRF_DEBUG_PRINT + dbg_printf("\r\nlight sleep..."); + #endif + + int64_t timediff_ms = alarm_time_timealarm_get_wakeup_timediff_ms(); + system_on_idle_until_alarm(timediff_ms, 0); + + if (mp_hal_is_interrupted()) { + wake_alarm = mp_const_none; + } else { + wake_alarm = _get_wake_alarm(n_alarms, alarms); + } + alarm_reset(); + return wake_alarm; +} + +void common_hal_alarm_set_deep_sleep_alarms(size_t n_alarms, const mp_obj_t *alarms) { + alarm_time_timealarm_clear_wakeup_time(); + _setup_sleep_alarms(true, n_alarms, alarms); +} + +#define PRESCALER_VALUE_IN_DEEP_SLEEP (1024) + +void NORETURN common_hal_alarm_enter_deep_sleep(void) { + alarm_pin_pinalarm_prepare_for_deep_sleep(); + alarm_time_timealarm_prepare_for_deep_sleep(); + + #ifdef NRF_DEBUG_PRINT + dbg_printf("\r\ndeep sleep..."); + #endif + int64_t timediff_ms = alarm_time_timealarm_get_wakeup_timediff_ms(); + tick_set_prescaler(PRESCALER_VALUE_IN_DEEP_SLEEP - 1); + #ifdef NRF_DEBUG_PRINT + dbg_check_RTCprescaler(); // XXX + #endif + system_on_idle_until_alarm(timediff_ms, PRESCALER_VALUE_IN_DEEP_SLEEP); + + #ifdef NRF_DEBUG_PRINT + dbg_printf("RESET...\r\n\r\n"); + #endif + + reset_cpu(); + + // should not reach here.. + while (1) { + ; + } +} + +// old version deep sleep code that was used in common_hal_alarm_enter_deep_sleep() +// for anyone who might want true System OFF sleep .. +#if 0 +void OLD_go_system_off(void) { + sleepmem_wakeup_event = SLEEPMEM_WAKEUP_BY_NONE; + sleepmem_wakeup_pin = WAKEUP_PIN_UNDEF; + uint8_t sd_enabled; + sd_softdevice_is_enabled(&sd_enabled); + set_memory_retention(); + dbg_printf("OLD go system off.. %d\r\n", sd_enabled); + if (sd_enabled) { + sd_power_system_off(); + } else { + NRF_POWER->SYSTEMOFF = 1; + } +} +#endif + +void common_hal_alarm_pretending_deep_sleep(void) { + alarm_pin_pinalarm_prepare_for_deep_sleep(); + alarm_time_timealarm_prepare_for_deep_sleep(); + + #ifdef NRF_DEBUG_PRINT + dbg_printf("\r\npretending to deep sleep..."); + #endif + + int64_t timediff_ms = alarm_time_timealarm_get_wakeup_timediff_ms(); + system_on_idle_until_alarm(timediff_ms, 0); + + alarm_reset(); +} + +void common_hal_alarm_gc_collect(void) { + gc_collect_ptr(shared_alarm_get_wake_alarm()); +} diff --git a/ports/nrf/common-hal/alarm/__init__.h b/ports/nrf/common-hal/alarm/__init__.h new file mode 100644 index 0000000000..47051dbd72 --- /dev/null +++ b/ports/nrf/common-hal/alarm/__init__.h @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries. + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_ALARM__INIT__H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_ALARM__INIT__H + +#include "common-hal/alarm/SleepMemory.h" + +typedef enum { + NRF_SLEEP_WAKEUP_UNDEFINED, + NRF_SLEEP_WAKEUP_GPIO, + NRF_SLEEP_WAKEUP_TIMER, + NRF_SLEEP_WAKEUP_TOUCHPAD, + NRF_SLEEP_WAKEUP_VBUS, + NRF_SLEEP_WAKEUP_RESETPIN, + NRF_SLEEP_WAKEUP_ZZZ +} nrf_sleep_source_t; + +extern const alarm_sleep_memory_obj_t alarm_sleep_memory_obj; + +enum { + SLEEPMEM_WAKEUP_BY_NONE = 0, + SLEEPMEM_WAKEUP_BY_PIN = 1, + SLEEPMEM_WAKEUP_BY_TIMER = 2, +}; +#define WAKEUP_PIN_UNDEF 0xFF +extern uint8_t sleepmem_wakeup_event; +extern uint8_t sleepmem_wakeup_pin; + +extern void alarm_reset(void); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_ALARM__INIT__H diff --git a/ports/nrf/common-hal/alarm/pin/PinAlarm.c b/ports/nrf/common-hal/alarm/pin/PinAlarm.c new file mode 100644 index 0000000000..cf602e8202 --- /dev/null +++ b/ports/nrf/common-hal/alarm/pin/PinAlarm.c @@ -0,0 +1,238 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include +#include + +#include "shared-bindings/alarm/pin/PinAlarm.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "common-hal/alarm/__init__.h" + +#include "nrfx.h" +#include "nrf_gpio.h" +#include "nrfx_gpiote.h" +#include "nrf_soc.h" +#include + +#include "supervisor/serial.h" // dbg_print + +#define WPIN_UNUSED 0xFF +volatile char _pinhandler_gpiote_count; +static bool pins_configured = false; + +extern uint32_t reset_reason_saved; +extern void dbg_dump_GPIOregs(void); + +void common_hal_alarm_pin_pinalarm_construct(alarm_pin_pinalarm_obj_t *self, mcu_pin_obj_t *pin, bool value, bool edge, bool pull) { + if (edge) { + mp_raise_ValueError(translate("Cannot wake on pin edge. Only level.")); + } + if (pin->number >= NUMBER_OF_PINS) { + mp_raise_ValueError(translate("Invalid pin")); + } + self->pin = pin; + self->value = value; + self->pull = pull; +} + +mcu_pin_obj_t *common_hal_alarm_pin_pinalarm_get_pin(alarm_pin_pinalarm_obj_t *self) { + return self->pin; +} + +bool common_hal_alarm_pin_pinalarm_get_value(alarm_pin_pinalarm_obj_t *self) { + return self->value; +} + +bool common_hal_alarm_pin_pinalarm_get_edge(alarm_pin_pinalarm_obj_t *self) { + return false; +} + +bool common_hal_alarm_pin_pinalarm_get_pull(alarm_pin_pinalarm_obj_t *self) { + return self->pull; +} + + +static void pinalarm_gpiote_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { + ++_pinhandler_gpiote_count; + sleepmem_wakeup_event = SLEEPMEM_WAKEUP_BY_PIN; + sleepmem_wakeup_pin = pin & 0xFF; +} + +bool alarm_pin_pinalarm_woke_us_up(void) { + return sleepmem_wakeup_event == SLEEPMEM_WAKEUP_BY_PIN && + sleepmem_wakeup_pin != WAKEUP_PIN_UNDEF; +} + +mp_obj_t alarm_pin_pinalarm_get_wakeup_alarm(size_t n_alarms, const mp_obj_t *alarms) { + // First, check to see if we match any given alarms. + for (size_t i = 0; i < n_alarms; i++) { + if (!mp_obj_is_type(alarms[i], &alarm_pin_pinalarm_type)) { + continue; + } + alarm_pin_pinalarm_obj_t *alarm = MP_OBJ_TO_PTR(alarms[i]); + if (alarm->pin->number == sleepmem_wakeup_pin) { + return alarms[i]; + } + } + alarm_pin_pinalarm_obj_t *alarm = m_new_obj(alarm_pin_pinalarm_obj_t); + alarm->base.type = &alarm_pin_pinalarm_type; + alarm->pin = NULL; + // Map the pin number back to a pin object. + for (size_t i = 0; i < mcu_pin_globals.map.used; i++) { + const mcu_pin_obj_t *pin_obj = MP_OBJ_TO_PTR(mcu_pin_globals.map.table[i].value); + if ((size_t)pin_obj->number == sleepmem_wakeup_pin) { + alarm->pin = mcu_pin_globals.map.table[i].value; + break; + } + } + return alarm; +} + +// These must be static because we need to configure pulls later, right before +// deep sleep. +static uint64_t high_alarms = 0; +static uint64_t low_alarms = 0; +static uint64_t pull_pins = 0; + +void alarm_pin_pinalarm_reset(void) { + for (size_t i = 0; i < 64; i++) { + uint64_t mask = 1ull << i; + bool high = (high_alarms & mask) != 0; + bool low = (low_alarms & mask) != 0; + if (!(high || low)) { + continue; + } + reset_pin_number(i); + nrfx_gpiote_in_event_disable((nrfx_gpiote_pin_t)i); + nrfx_gpiote_in_uninit((nrfx_gpiote_pin_t)i); + } + + high_alarms = 0; + low_alarms = 0; + pull_pins = 0; +} + +static void configure_pins_for_sleep(void) { + nrfx_err_t err; + if (nrfx_gpiote_is_init()) { + nrfx_gpiote_uninit(); + } + err = nrfx_gpiote_init(NRFX_GPIOTE_CONFIG_IRQ_PRIORITY); + assert(err == NRFX_SUCCESS); + (void)err; // to suppress unused warning + + _pinhandler_gpiote_count = 0; + + nrfx_gpiote_in_config_t cfg = { + .sense = NRF_GPIOTE_POLARITY_TOGGLE, + .pull = NRF_GPIO_PIN_PULLUP, + .is_watcher = false, + .hi_accuracy = true, + .skip_gpio_setup = false + }; + for (size_t i = 0; i < 64; ++i) { + uint64_t mask = 1ull << i; + if (((high_alarms & mask) == 0) && ((low_alarms & mask) == 0)) { + continue; + } + if (((high_alarms & mask) != 0) && ((low_alarms & mask) == 0)) { + cfg.sense = NRF_GPIOTE_POLARITY_LOTOHI; + cfg.pull = ((pull_pins & mask) != 0) ? + NRF_GPIO_PIN_PULLDOWN : NRF_GPIO_PIN_NOPULL; + } else + if (((high_alarms & mask) == 0) && ((low_alarms & mask) != 0)) { + cfg.sense = NRF_GPIOTE_POLARITY_HITOLO; + cfg.pull = ((pull_pins & mask) != 0) ? + NRF_GPIO_PIN_PULLUP : NRF_GPIO_PIN_NOPULL; + } else { + cfg.sense = NRF_GPIOTE_POLARITY_TOGGLE; + cfg.pull = NRF_GPIO_PIN_NOPULL; + } + err = nrfx_gpiote_in_init((nrfx_gpiote_pin_t)i, &cfg, + pinalarm_gpiote_handler); + assert(err == NRFX_SUCCESS); + nrfx_gpiote_in_event_enable((nrfx_gpiote_pin_t)i, true); + if (((high_alarms & mask) != 0) && ((low_alarms & mask) == 0)) { + nrf_gpio_cfg_sense_set((uint32_t)i, NRF_GPIO_PIN_SENSE_HIGH); + } + if (((high_alarms & mask) == 0) && ((low_alarms & mask) != 0)) { + nrf_gpio_cfg_sense_set((uint32_t)i, NRF_GPIO_PIN_SENSE_LOW); + } + } +} + +void alarm_pin_pinalarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_obj_t *alarms) { + // Bitmask of wake up settings. + size_t high_count = 0; + size_t low_count = 0; + int pin_number = -1; + + for (size_t i = 0; i < n_alarms; i++) { + if (!mp_obj_is_type(alarms[i], &alarm_pin_pinalarm_type)) { + continue; + } + alarm_pin_pinalarm_obj_t *alarm = MP_OBJ_TO_PTR(alarms[i]); + + pin_number = alarm->pin->number; + // dbg_printf("alarm_pin_pinalarm_set_alarms(pin#=%d, val=%d, pull=%d)\r\n", pin_number, alarm->value, alarm->pull); + if (alarm->value) { + high_alarms |= 1ull << pin_number; + high_count++; + } else { + low_alarms |= 1ull << pin_number; + low_count++; + } + if (alarm->pull) { + pull_pins |= 1ull << pin_number; + } + } + if (pin_number != -1) { + if (!deep_sleep) { + configure_pins_for_sleep(); + } else { + // we don't setup gpio HW here but do them in + // alarm_pin_pinalarm_prepare_for_deep_sleep() below + reset_reason_saved = 0; + pins_configured = false; + } + } else { + // dbg_printf("alarm_pin_pinalarm_set_alarms() no valid pins\r\n"); + } +} + +void alarm_pin_pinalarm_prepare_for_deep_sleep(void) { + if (!pins_configured) { + configure_pins_for_sleep(); + pins_configured = true; + #ifdef NRF_DEBUG_PRINT + // dbg_dump_GPIOregs(); + #endif + } +} diff --git a/ports/nrf/common-hal/alarm/pin/PinAlarm.h b/ports/nrf/common-hal/alarm/pin/PinAlarm.h new file mode 100644 index 0000000000..69684386fa --- /dev/null +++ b/ports/nrf/common-hal/alarm/pin/PinAlarm.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/objtuple.h" + +typedef struct { + mp_obj_base_t base; + mcu_pin_obj_t *pin; + bool value; + bool pull; +} alarm_pin_pinalarm_obj_t; + +void alarm_pin_pinalarm_reset(void); +void alarm_pin_pinalarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_obj_t *alarms); +void alarm_pin_pinalarm_prepare_for_deep_sleep(void); +mp_obj_t alarm_pin_pinalarm_get_wakeup_alarm(size_t n_alarms, const mp_obj_t *alarms); +bool alarm_pin_pinalarm_woke_us_up(void); diff --git a/ports/nrf/common-hal/alarm/time/TimeAlarm.c b/ports/nrf/common-hal/alarm/time/TimeAlarm.c new file mode 100644 index 0000000000..1d30065529 --- /dev/null +++ b/ports/nrf/common-hal/alarm/time/TimeAlarm.c @@ -0,0 +1,102 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include + +#include "common-hal/alarm/__init__.h" +#include "shared-bindings/alarm/time/TimeAlarm.h" +#include "shared-bindings/time/__init__.h" + +void common_hal_alarm_time_timealarm_construct(alarm_time_timealarm_obj_t *self, mp_float_t monotonic_time) { + self->monotonic_time = monotonic_time; +} + +mp_float_t common_hal_alarm_time_timealarm_get_monotonic_time(alarm_time_timealarm_obj_t *self) { + return self->monotonic_time; +} + +mp_obj_t alarm_time_timealarm_get_wakeup_alarm(size_t n_alarms, const mp_obj_t *alarms) { + // First, check to see if we match + for (size_t i = 0; i < n_alarms; i++) { + if (mp_obj_is_type(alarms[i], &alarm_time_timealarm_type)) { + return alarms[i]; + } + } + alarm_time_timealarm_obj_t *timer = m_new_obj(alarm_time_timealarm_obj_t); + timer->base.type = &alarm_time_timealarm_type; + // TODO: Set monotonic_time based on the RTC state. + timer->monotonic_time = 0.0f; + return timer; +} + +bool alarm_time_timealarm_woke_us_up(void) { + return sleepmem_wakeup_event == SLEEPMEM_WAKEUP_BY_TIMER; +} + +int64_t wakeup_time_saved = 0; + +int64_t alarm_time_timealarm_get_wakeup_timediff_ms(void) { + if (wakeup_time_saved == 0) { + return -1; + } + return wakeup_time_saved - common_hal_time_monotonic_ms(); +} + +void alarm_time_timealarm_clear_wakeup_time(void) { + wakeup_time_saved = 0; +} + +void alarm_time_timealarm_reset(void) { + port_disable_interrupt_after_ticks_ch(1); + wakeup_time_saved = 0; +} + +void alarm_time_timealarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_obj_t *alarms) { + bool timealarm_set = false; + alarm_time_timealarm_obj_t *timealarm = MP_OBJ_NULL; + wakeup_time_saved = 0; + + for (size_t i = 0; i < n_alarms; i++) { + if (!mp_obj_is_type(alarms[i], &alarm_time_timealarm_type)) { + continue; + } + if (timealarm_set) { + mp_raise_ValueError(translate("Only one alarm.time alarm can be set.")); + } + timealarm = MP_OBJ_TO_PTR(alarms[i]); + timealarm_set = true; + } + if (!timealarm_set) { + return; + } + + wakeup_time_saved = (int64_t)(timealarm->monotonic_time * 1000.0f); +} + +void alarm_time_timealarm_prepare_for_deep_sleep(void) { +} diff --git a/ports/nrf/common-hal/alarm/time/TimeAlarm.h b/ports/nrf/common-hal/alarm/time/TimeAlarm.h new file mode 100644 index 0000000000..2f65764e19 --- /dev/null +++ b/ports/nrf/common-hal/alarm/time/TimeAlarm.h @@ -0,0 +1,50 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Junji Sakai + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + mp_float_t monotonic_time; // values compatible with time.monotonic_time() +} alarm_time_timealarm_obj_t; + +extern volatile int rtc_woke_up_counter; +extern void port_disable_interrupt_after_ticks_ch(uint32_t channel); +extern void port_interrupt_after_ticks_ch(uint32_t channel, uint32_t ticks); + +// Find the alarm object that caused us to wake up or create an equivalent one. +mp_obj_t alarm_time_timealarm_get_wakeup_alarm(size_t n_alarms, const mp_obj_t *alarms); +// Check for the wake up alarm from pretend deep sleep. +bool alarm_time_timealarm_woke_us_up(void); +void alarm_time_timealarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_obj_t *alarms); +void alarm_time_timealarm_reset(void); + +extern void alarm_time_timealarm_prepare_for_deep_sleep(void); +extern int64_t alarm_time_timealarm_get_wakeup_timediff_ms(void); +extern void alarm_time_timealarm_clear_wakeup_time(void); +extern void dbg_dump_RTCreg(void); +extern void tick_set_prescaler(uint32_t prescaler_val); diff --git a/ports/nrf/common-hal/alarm/touch/TouchAlarm.c b/ports/nrf/common-hal/alarm/touch/TouchAlarm.c new file mode 100644 index 0000000000..2d7ee89bd3 --- /dev/null +++ b/ports/nrf/common-hal/alarm/touch/TouchAlarm.c @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "shared-bindings/alarm/touch/TouchAlarm.h" +#include "shared-bindings/microcontroller/__init__.h" + +// static volatile bool woke_up = false; + +void common_hal_alarm_touch_touchalarm_construct(alarm_touch_touchalarm_obj_t *self, const mcu_pin_obj_t *pin) { + mp_raise_NotImplementedError(NULL); + (void)pin; +} + +mp_obj_t alarm_touch_touchalarm_get_wakeup_alarm(const size_t n_alarms, const mp_obj_t *alarms) { + return mp_const_none; +} + +void alarm_touch_touchalarm_set_alarm(const bool deep_sleep, const size_t n_alarms, const mp_obj_t *alarms) { +} + +void alarm_touch_touchalarm_prepare_for_deep_sleep(void) { +} + +bool alarm_touch_touchalarm_woke_us_up(void) { + return false; +} + +void alarm_touch_touchalarm_reset(void) { +} diff --git a/ports/nrf/common-hal/alarm/touch/TouchAlarm.h b/ports/nrf/common-hal/alarm/touch/TouchAlarm.h new file mode 100644 index 0000000000..755a3977ad --- /dev/null +++ b/ports/nrf/common-hal/alarm/touch/TouchAlarm.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_COMMON_HAL_ALARM_TOUCH_TOUCHALARM_H +#define MICROPY_INCLUDED_COMMON_HAL_ALARM_TOUCH_TOUCHALARM_H + +#include "py/obj.h" +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} alarm_touch_touchalarm_obj_t; + +// Find the alarm object that caused us to wake up or create an equivalent one. +mp_obj_t alarm_touch_touchalarm_get_wakeup_alarm(const size_t n_alarms, const mp_obj_t *alarms); +// Check for the wake up alarm from pretend deep sleep. +void alarm_touch_touchalarm_set_alarm(const bool deep_sleep, const size_t n_alarms, const mp_obj_t *alarms); +void alarm_touch_touchalarm_prepare_for_deep_sleep(void); +bool alarm_touch_touchalarm_woke_us_up(void); +void alarm_touch_touchalarm_reset(void); + +#endif // MICROPY_INCLUDED_COMMON_HAL_ALARM_TOUCH_TOUCHALARM_H diff --git a/ports/nrf/common-hal/countio/Counter.c b/ports/nrf/common-hal/countio/Counter.c index 94fadae7c3..e863f5475a 100644 --- a/ports/nrf/common-hal/countio/Counter.c +++ b/ports/nrf/common-hal/countio/Counter.c @@ -13,8 +13,8 @@ static void _intr_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { self->count += 1; } -void common_hal_countio_counter_construct(countio_counter_obj_t* self, - const mcu_pin_obj_t* pin_a) { +void common_hal_countio_counter_construct(countio_counter_obj_t *self, + const mcu_pin_obj_t *pin_a) { self->pin_a = pin_a->number; _countio_objs[self->pin_a] = self; @@ -36,11 +36,11 @@ void common_hal_countio_counter_construct(countio_counter_obj_t* self, } -bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) { +bool common_hal_countio_counter_deinited(countio_counter_obj_t *self) { return self->pin_a == NO_PIN; } -void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { +void common_hal_countio_counter_deinit(countio_counter_obj_t *self) { if (common_hal_countio_counter_deinited(self)) { return; } @@ -52,15 +52,15 @@ void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { self->pin_a = NO_PIN; } -mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) { +mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t *self) { return self->count; } -void common_hal_countio_counter_set_count(countio_counter_obj_t* self, - mp_int_t new_count) { +void common_hal_countio_counter_set_count(countio_counter_obj_t *self, + mp_int_t new_count) { self->count = new_count; } -void common_hal_countio_counter_reset(countio_counter_obj_t* self){ - self->count = 0; +void common_hal_countio_counter_reset(countio_counter_obj_t *self) { + self->count = 0; } diff --git a/ports/nrf/common-hal/countio/__init__.c b/ports/nrf/common-hal/countio/__init__.c index b95b20d153..d47de33e53 100644 --- a/ports/nrf/common-hal/countio/__init__.c +++ b/ports/nrf/common-hal/countio/__init__.c @@ -1 +1 @@ -//No countio module functions +// No countio module functions diff --git a/ports/nrf/common-hal/microcontroller/Processor.c b/ports/nrf/common-hal/microcontroller/Processor.c index b31c4c12d7..f59fc54972 100644 --- a/ports/nrf/common-hal/microcontroller/Processor.c +++ b/ports/nrf/common-hal/microcontroller/Processor.c @@ -127,5 +127,20 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { } mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) { - return RESET_REASON_UNKNOWN; + mcu_reset_reason_t r = RESET_REASON_UNKNOWN; + if (reset_reason_saved == 0) { + r = RESET_REASON_POWER_ON; + } else if (reset_reason_saved & POWER_RESETREAS_RESETPIN_Msk) { + r = RESET_REASON_RESET_PIN; + } else if (reset_reason_saved & POWER_RESETREAS_DOG_Msk) { + r = RESET_REASON_WATCHDOG; + } else if (reset_reason_saved & POWER_RESETREAS_SREQ_Msk) { + r = RESET_REASON_SOFTWARE; + } else if ((reset_reason_saved & POWER_RESETREAS_OFF_Msk) || + (reset_reason_saved & POWER_RESETREAS_LPCOMP_Msk) || + (reset_reason_saved & POWER_RESETREAS_NFC_Msk) || + (reset_reason_saved & POWER_RESETREAS_VBUS_Msk)) { + r = RESET_REASON_DEEP_SLEEP_ALARM; + } + return r; } diff --git a/ports/nrf/common-hal/microcontroller/Processor.h b/ports/nrf/common-hal/microcontroller/Processor.h index 4049c165fb..1abbe1e4eb 100644 --- a/ports/nrf/common-hal/microcontroller/Processor.h +++ b/ports/nrf/common-hal/microcontroller/Processor.h @@ -36,4 +36,6 @@ typedef struct { // Stores no state currently. } mcu_processor_obj_t; +extern uint32_t reset_reason_saved; + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c index 8b46c3bd79..bc5851ccd4 100644 --- a/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c +++ b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c @@ -42,8 +42,8 @@ static void _intr_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { } uint8_t new_state = - ((uint8_t) nrf_gpio_pin_read(self->pin_a) << 1) | - (uint8_t) nrf_gpio_pin_read(self->pin_b); + ((uint8_t)nrf_gpio_pin_read(self->pin_a) << 1) | + (uint8_t)nrf_gpio_pin_read(self->pin_b); shared_module_softencoder_state_update(self, new_state); } diff --git a/ports/nrf/mpconfigport.mk b/ports/nrf/mpconfigport.mk index f349b3665f..bf02321410 100644 --- a/ports/nrf/mpconfigport.mk +++ b/ports/nrf/mpconfigport.mk @@ -46,6 +46,9 @@ CIRCUITPY_FRAMEBUFFERIO ?= 1 CIRCUITPY_COUNTIO ?= 1 CIRCUITPY_WATCHDOG ?= 1 +# Sleep and Wakeup +CIRCUITPY_ALARM ?= 1 + # nRF52840-specific ifeq ($(MCU_CHIP),nrf52840) diff --git a/ports/nrf/nrfx_config.h b/ports/nrf/nrfx_config.h index 2c31263c58..912349556e 100644 --- a/ports/nrf/nrfx_config.h +++ b/ports/nrf/nrfx_config.h @@ -116,7 +116,7 @@ // GPIO interrupt #define NRFX_GPIOTE_ENABLED 1 -#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 2 #define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 // NVM controller diff --git a/ports/nrf/supervisor/debug_uart.c b/ports/nrf/supervisor/debug_uart.c new file mode 100644 index 0000000000..f5a9b1f47d --- /dev/null +++ b/ports/nrf/supervisor/debug_uart.c @@ -0,0 +1,241 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Jun2Sak + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#ifdef NRF_DEBUG_PRINT + +#define DEBUG_UART_TXPIN 26 +#define DEBUG_UART_RXPIN 15 + +#include "nrfx.h" +#include "nrf_uart.h" +#include "nrf_gpio.h" +#include "nrf_rtc.h" +#include "nrfx_uarte.h" +#include "nrfx_rtc.h" +#include "supervisor/serial.h" // dbg_printf() +#include "shared-bindings/microcontroller/Processor.h" +#include "common-hal/alarm/__init__.h" + +extern const nrfx_rtc_t rtc_instance; // port.c +extern uint32_t reset_reason_saved; + +const nrfx_uarte_t _dbg_uart_inst = NRFX_UARTE_INSTANCE(1); +static int _dbg_uart_initialized = 0; +#define DBG_PBUF_LEN 80 +static char _dbg_pbuf[DBG_PBUF_LEN + 1]; + +void _debug_uart_uninit(void) { + nrf_gpio_cfg(DEBUG_UART_TXPIN, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + nrfx_uarte_uninit(&_dbg_uart_inst); +} + +void _debug_uart_init(void) { + // if (_dbg_uart_initialized) return; + nrfx_uarte_config_t config = { + .pseltxd = DEBUG_UART_TXPIN, + .pselrxd = DEBUG_UART_RXPIN, + .pselcts = NRF_UARTE_PSEL_DISCONNECTED, + .pselrts = NRF_UARTE_PSEL_DISCONNECTED, + .p_context = NULL, + .baudrate = NRF_UART_BAUDRATE_115200, + .interrupt_priority = 7, + .hal_cfg = { + .hwfc = NRF_UARTE_HWFC_DISABLED, + .parity = NRF_UARTE_PARITY_EXCLUDED + } + }; + nrfx_uarte_init(&_dbg_uart_inst, &config, NULL); + // drive config + nrf_gpio_cfg(config.pseltxd, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_PULLUP, // orig=NOPULL + NRF_GPIO_PIN_H0H1, // orig=S0S1 + NRF_GPIO_PIN_NOSENSE); + _dbg_uart_initialized = 1; + return; +} + +void _debug_print_substr(const char *text, uint32_t length) { + char *data = (char *)text; + int siz; + while (length != 0) { + if (length <= DBG_PBUF_LEN) { + siz = length; + } else { + siz = DBG_PBUF_LEN; + } + memcpy(_dbg_pbuf, data, siz); + _dbg_pbuf[siz] = 0; + nrfx_uarte_tx(&_dbg_uart_inst, (uint8_t const *)_dbg_pbuf, siz); + data += siz; + length -= siz; + } +} + +void _debug_uart_deinit(void) { + nrfx_uarte_uninit(&_dbg_uart_inst); +} + +int dbg_printf(const char *fmt, ...) { + va_list ap; + va_start(ap, fmt); + int ret = vprintf(fmt, ap); + va_end(ap); + return ret; +} + +void dbg_dump_RTCreg(void) { + dbg_printf("\r\nRTC2\r\n"); + NRF_RTC_Type *r = rtc_instance.p_reg; + dbg_printf("PRESCALER=%08X, ", (int)r->PRESCALER); + dbg_printf("COUNTER=%08X ", (int)r->COUNTER); + dbg_printf("INTENSET=%08X ", (int)r->INTENSET); + dbg_printf("EVTENSET=%08X\r\n", (int)r->EVTENSET); + dbg_printf("EVENTS_COMPARE[0..3]=%X,%X,%X,%X ", (int)r->EVENTS_COMPARE[0], (int)r->EVENTS_COMPARE[1], (int)r->EVENTS_COMPARE[2], (int)r->EVENTS_COMPARE[3]); + dbg_printf("CC[0..3]=%08X,%08X,%08X,%08X\r\n", (int)r->CC[0], (int)r->CC[1], (int)r->CC[2], (int)r->CC[3]); +} + +int dbg_check_RTCprescaler(void) { + NRF_RTC_Type *r = rtc_instance.p_reg; + if ((int)r->PRESCALER == 0) { + dbg_printf("****** PRESCALER == 0\r\n"); + return -1; + } + return 0; +} + +void dbg_dump_RAMreg(void) { + int i; + for (i = 0; i <= 8; ++i) { + dbg_printf(" RAM%d:%08X", i, (int)(NRF_POWER->RAM[i].POWER)); + if (i == 4) { + dbg_printf("\r\n"); + } + } + dbg_printf("\r\n"); +} + +void dbg_dump_GPIOregs(void) { + int i, port, col; + + NRF_GPIO_Type *gpio[] = { NRF_P0, NRF_P1 }; + const char cnf_pull_chr[] = "-D*U"; // pull down, pull up + const char cnf_sense_chr[] = "-?HL"; // sense high, sense low + for (port = 0, col = 0; port <= 1; ++port) { + for (i = 0; i < 32; ++i) { + uint32_t cnf = gpio[port]->PIN_CNF[i]; + if (cnf != 0x0002) { // changed from default value + dbg_printf("[%d_%02d]:%c%c%c%d%c ", port, i, + (cnf & 1) ? 'O' : 'I', // output, input + (cnf & 2) ? 'd' : 'c', // disconnected, connected + cnf_pull_chr[(cnf >> 2) & 3], + (int)((cnf >> 8) & 7), // drive config 0-7 + cnf_sense_chr[(cnf >> 16) & 3]); + if (++col >= 6) { + dbg_printf("\r\n"); + col = 0; + } + } + } + } + if (col > 0) { + dbg_printf("\r\n"); + } + + dbg_printf("GPIOTE\r\n"); + NRF_GPIOTE_Type const *reg = NRF_GPIOTE; + const char config_mode_chr[] = "-E-T"; // event, task + const char config_pol_chr[] = "-HLT"; // low-to-Hi, hi-to-Low, Toggle + const char config_outinit_chr[] = "01"; // initial value is 0 or 1 + for (i = 0, col = 0; i < 8; ++i) { + uint32_t conf = reg->CONFIG[i]; + if (conf != 0) { // changed from default value + dbg_printf("CONFIG[%d]:%d_%02d,%c%c%c ", i, + (int)((conf >> 13) & 1), (int)((conf >> 8) & 0x1F), + config_mode_chr[conf & 3], + config_pol_chr[(conf >> 16) & 3], + (conf & 3) == 3 ? + config_outinit_chr[(conf >> 20) & 1] : '-'); + if (++col >= 4) { + dbg_printf("\r\n"); + col = 0; + } + } + } + if (col > 0) { + dbg_printf("\r\n"); + } + for (i = 0; i < 8; ++i) { + dbg_printf("EVENTS_IN[%d]:%X ", i, (int)(reg->EVENTS_IN[i])); + if ((i & 3) == 3) { + dbg_printf("\r\n"); + } + } + dbg_printf("EVENTS_PORT:%X INTENSET:%08X\r\n", + (int)(reg->EVENTS_PORT), (int)(reg->INTENSET)); +} + +void dbg_dumpQSPIreg(void) { + uint32_t r; + dbg_printf("QSPI\r\n"); + r = NRF_QSPI->IFCONFIG0; + dbg_printf("IFCONFIG0 READ=%ld write=%ld ADDR=%ld DPM=%ld PPSIZE=%ld\r\n", + r & 7, (r >> 3) & 7, (r >> 6) & 1, (r >> 7) & 1, (r >> 12) & 1); + r = NRF_QSPI->IFCONFIG1; + dbg_printf("IFCONFIG1 SCKDELAY=%ld SPIMODE=%ld SCKFREQ=%ld\r\n", + r & 0xFF, (r >> 25) & 1, (r >> 28) & 0xF); + r = NRF_QSPI->STATUS; + dbg_printf("STATUS DPM=%ld READY=%ld SREG=0x%02lX\r\n", + (r >> 2) & 1, (r >> 3) & 1, (r >> 24) & 0xFF); + r = NRF_QSPI->DPMDUR; + dbg_printf("DPMDUR ENTER=%ld EXIT=%ld\r\n", r & 0xFFFF, (r >> 16) & 0xFFFF); +} + +void dbg_dump_reset_reason(void) { + int reset_reason = (int)common_hal_mcu_processor_get_reset_reason(); + const char *rr_str[] = { + "POWER_ON", "BROWNOUT", "SOFTWARE", "DEEPSLEEPALARM", + "RESET_PIN", "WATCHDOG", "UNKNOWN" + }; + dbg_printf("reset_reason=%s\r\n", rr_str[reset_reason]); +} + +#else /*!NRF_DEBUG_PRINT*/ +int dbg_printf(const char *fmt, ...) { + return 0; +} +#endif /*!NRF_DEBUG_PRINT*/ diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index 9a2acd5cab..26ee3b20dc 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2021 Junji Sakai * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -51,6 +52,7 @@ #include "common-hal/rtc/RTC.h" #include "common-hal/neopixel_write/__init__.h" #include "common-hal/watchdog/WatchDogTimer.h" +#include "common-hal/alarm/__init__.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/rtc/__init__.h" @@ -73,9 +75,14 @@ static void power_warning_handler(void) { reset_into_safe_mode(BROWNOUT); } +#ifdef NRF_DEBUG_PRINT +extern void _debug_uart_init(void); +#endif + +uint32_t reset_reason_saved = 0; const nrfx_rtc_t rtc_instance = NRFX_RTC_INSTANCE(2); -const nrfx_rtc_config_t rtc_config = { +nrfx_rtc_config_t rtc_config = { .prescaler = RTC_FREQ_TO_PRESCALER(0x8000), .reliable = 0, .tick_latency = 0, @@ -100,6 +107,12 @@ void rtc_handler(nrfx_rtc_int_type_t int_type) { supervisor_tick(); } else if (int_type == NRFX_RTC_INT_COMPARE0) { nrfx_rtc_cc_set(&rtc_instance, 0, 0, false); + } else if (int_type == NRFX_RTC_INT_COMPARE1) { + // used in light sleep + #if CIRCUITPY_ALARM + sleepmem_wakeup_event = SLEEPMEM_WAKEUP_BY_TIMER; + #endif + nrfx_rtc_cc_set(&rtc_instance, 1, 0, false); } } @@ -124,6 +137,22 @@ void tick_init(void) { } } +void tick_uninit(void) { + nrfx_rtc_counter_clear(&rtc_instance); + nrfx_rtc_disable(&rtc_instance); + nrfx_rtc_uninit(&rtc_instance); +} + +void tick_set_prescaler(uint32_t prescaler_val) { + tick_uninit(); + // update of prescaler value sometimes fails if we skip this delay.. + NRFX_DELAY_US(1000); + uint16_t prescaler_saved = rtc_config.prescaler; + rtc_config.prescaler = prescaler_val; + tick_init(); + rtc_config.prescaler = prescaler_saved; +} + safe_mode_t port_init(void) { nrf_peripherals_clocks_init(); @@ -153,11 +182,21 @@ safe_mode_t port_init(void) { analogin_init(); #endif + reset_reason_saved = NRF_POWER->RESETREAS; + // clear all RESET reason bits + NRF_POWER->RESETREAS = reset_reason_saved; + // clear wakeup event/pin when reset by reset-pin + if (reset_reason_saved & NRF_POWER_RESETREAS_RESETPIN_MASK) { + #if CIRCUITPY_ALARM + sleepmem_wakeup_event = SLEEPMEM_WAKEUP_BY_NONE; + #endif + } + // If the board was reset by the WatchDogTimer, we may // need to boot into safe mode. Reset the RESETREAS bit // for the WatchDogTimer so we don't encounter this the // next time we reboot. - if (NRF_POWER->RESETREAS & POWER_RESETREAS_DOG_Msk) { + if (reset_reason_saved & POWER_RESETREAS_DOG_Msk) { NRF_POWER->RESETREAS = POWER_RESETREAS_DOG_Msk; uint32_t usb_reg = NRF_POWER->USBREGSTATUS; @@ -219,6 +258,10 @@ void reset_port(void) { #endif reset_all_pins(); + + #ifdef NRF_DEBUG_PRINT + _debug_uart_init(); + #endif } void reset_to_bootloader(void) { @@ -295,7 +338,7 @@ void port_disable_tick(void) { nrfx_rtc_tick_disable(&rtc_instance); } -void port_interrupt_after_ticks(uint32_t ticks) { +void port_interrupt_after_ticks_ch(uint32_t channel, uint32_t ticks) { uint32_t current_ticks = nrfx_rtc_counter_get(&rtc_instance); uint32_t diff = 3; if (ticks > diff) { @@ -304,7 +347,15 @@ void port_interrupt_after_ticks(uint32_t ticks) { if (diff > 0xffffff) { diff = 0xffffff; } - nrfx_rtc_cc_set(&rtc_instance, 0, current_ticks + diff, true); + nrfx_rtc_cc_set(&rtc_instance, channel, current_ticks + diff, true); +} + +void port_disable_interrupt_after_ticks_ch(uint32_t channel) { + nrfx_rtc_cc_disable(&rtc_instance, channel); +} + +void port_interrupt_after_ticks(uint32_t ticks) { + port_interrupt_after_ticks_ch(0, ticks); } void port_idle_until_interrupt(void) { @@ -355,3 +406,9 @@ void HardFault_Handler(void) { asm ("nop;"); } } + +#if CIRCUITPY_ALARM +// in case boards/xxx/board.c does not provide board_deinit() +MP_WEAK void board_deinit(void) { +} +#endif diff --git a/ports/nrf/supervisor/qspi_flash.c b/ports/nrf/supervisor/qspi_flash.c index 1386af7c44..cb380e6156 100644 --- a/ports/nrf/supervisor/qspi_flash.c +++ b/ports/nrf/supervisor/qspi_flash.c @@ -37,6 +37,31 @@ #include "supervisor/shared/external_flash/common_commands.h" #include "supervisor/shared/external_flash/qspi_flash.h" +#ifdef NRF_DEBUG_PRINT +#include "supervisor/serial.h" // dbg_printf() +#endif + +#ifdef QSPI_FLASH_POWERDOWN +// Parameters for external QSPI Flash power-down +// for W25Q128FV, +// tDP (nCS high to Power-down mode) = 3us +// tRES (nCS high to Standby mode) = 3us +// sck_delay = max(tDP, tRES) / 62.5ns = 48 -> 50 (w/ margin) +#define DUR_DPM_ENTER 1 // tDP in (256*62.5ns) units +#define DUR_DPM_EXIT 1 // tRES in (256*62.5ns) units +#define SCK_DELAY 50 // max(tDP, tRES) in (62.5ns) units +// wait necessary just after DPM enter/exit (cut and try) +#define WAIT_AFTER_DPM_ENTER 10 // usec +#define WAIT_AFTER_DPM_EXIT 50 // usec + +static int sck_delay_saved = 0; +#endif + +#ifdef NRF_DEBUG_PRINT +extern void dbg_dumpQSPIreg(void); +#else +#define dbg_dumpQSPIreg(...) +#endif // When USB is disconnected, disable QSPI in sleep mode to save energy void qspi_disable(void) { @@ -188,7 +213,11 @@ void spi_flash_init(void) { .readoc = NRF_QSPI_READOC_FASTREAD, .writeoc = NRF_QSPI_WRITEOC_PP, .addrmode = NRF_QSPI_ADDRMODE_24BIT, + #ifdef QSPI_FLASH_POWERDOWN + .dpmconfig = true + #else .dpmconfig = false + #endif }, .phy_if = { .sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2MHz and speed up once we know what we're talking to. @@ -213,6 +242,13 @@ void spi_flash_init(void) { // No callback for blocking API nrfx_qspi_init(&qspi_cfg, NULL, NULL); + + #ifdef QSPI_FLASH_POWERDOWN + // If pin-reset while flash is in power-down mode, + // the flash cannot accept any commands. Send CMD_WAKE to release it. + spi_flash_write_command(CMD_WAKE, NULL, 0); + NRFX_DELAY_US(WAIT_AFTER_DPM_EXIT); + #endif } void spi_flash_init_device(const external_flash_device *device) { @@ -236,3 +272,61 @@ void spi_flash_init_device(const external_flash_device *device) { NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_SCKFREQ_Msk; NRF_QSPI->IFCONFIG1 |= sckfreq << QSPI_IFCONFIG1_SCKFREQ_Pos; } + +void qspi_flash_enter_sleep(void) { + #ifdef QSPI_FLASH_POWERDOWN + uint32_t r; + NRF_QSPI->DPMDUR = + ((DUR_DPM_ENTER & 0xFFFF) << 16) | (DUR_DPM_EXIT & 0xFFFF); + // set sck_delay tempolarily + r = NRF_QSPI->IFCONFIG1; + sck_delay_saved = (r & QSPI_IFCONFIG1_SCKDELAY_Msk) + >> QSPI_IFCONFIG1_SCKDELAY_Pos; + NRF_QSPI->IFCONFIG1 + = (NRF_QSPI->IFCONFIG1 & ~QSPI_IFCONFIG1_SCKDELAY_Msk) + | (SCK_DELAY << QSPI_IFCONFIG1_SCKDELAY_Pos); + + // enabling IFCONFIG0.DPMENABLE here won't work. + // -> do it in spi_flash_init() + // NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_DPMENABLE_Msk; + // dbg_dumpQSPIreg(); + + // enter deep power-down mode (DPM) + NRF_QSPI->IFCONFIG1 |= QSPI_IFCONFIG1_DPMEN_Msk; + NRFX_DELAY_US(WAIT_AFTER_DPM_ENTER); + if (!(NRF_QSPI->STATUS & QSPI_STATUS_DPM_Msk)) { + #ifdef NRF_DEBUG_PRINT + dbg_printf("qspi flash: DPM failed\r\n"); + #endif + } + #endif + + qspi_disable(); + // dbg_dumpQSPIreg(); +} + +void qspi_flash_exit_sleep(void) { + qspi_enable(); + + #ifdef QSPI_FLASH_POWERDOWN + if (NRF_QSPI->STATUS & QSPI_STATUS_DPM_Msk) { + // exit deep power-down mode + NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_DPMEN_Msk; + NRFX_DELAY_US(WAIT_AFTER_DPM_EXIT); + + if (NRF_QSPI->STATUS & QSPI_STATUS_DPM_Msk) { + #ifdef NRF_DEBUG_PRINT + dbg_printf("qspi flash: exiting DPM failed\r\n"); + #endif + } + // restore sck_delay + if (sck_delay_saved == 0) { + sck_delay_saved = 10; // default + } + NRF_QSPI->IFCONFIG1 + = (NRF_QSPI->IFCONFIG1 & ~QSPI_IFCONFIG1_SCKDELAY_Msk) + | (sck_delay_saved << QSPI_IFCONFIG1_SCKDELAY_Pos); + } + // dbg_dumpQSPIreg(); + #endif +} diff --git a/ports/nrf/supervisor/qspi_flash.h b/ports/nrf/supervisor/qspi_flash.h new file mode 100644 index 0000000000..527f3cec39 --- /dev/null +++ b/ports/nrf/supervisor/qspi_flash.h @@ -0,0 +1,2 @@ +extern void qspi_flash_enter_sleep(void); +extern void qspi_flash_exit_sleep(void); diff --git a/ports/raspberrypi/boards/adafruit_itsybitsy_rp2040/pins.c b/ports/raspberrypi/boards/adafruit_itsybitsy_rp2040/pins.c index 5c83bf3d74..bc8ace4654 100644 --- a/ports/raspberrypi/boards/adafruit_itsybitsy_rp2040/pins.c +++ b/ports/raspberrypi/boards/adafruit_itsybitsy_rp2040/pins.c @@ -23,18 +23,19 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO5) }, { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO14) }, { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO16) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO13) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, diff --git a/ports/raspberrypi/boards/sparkfun_micromod_rp2040/pins.c b/ports/raspberrypi/boards/sparkfun_micromod_rp2040/pins.c index 5414dd3e2b..90069a7e6f 100644 --- a/ports/raspberrypi/boards/sparkfun_micromod_rp2040/pins.c +++ b/ports/raspberrypi/boards/sparkfun_micromod_rp2040/pins.c @@ -37,7 +37,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_BUS10), MP_ROM_PTR(&pin_GPIO25) }, // BUS10 alias { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_GPIO25) }, // ADC_DP alias { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_GPIO25) }, // CAM_VSYNC alias - // NC - G11 + // NC - G11 // PWM pins (PWM0,PWM1) { MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_GPIO13) }, // GPIO13 - PWM0 diff --git a/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/mpconfigboard.h b/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/mpconfigboard.h index 6c307ec890..a4a162062a 100644 --- a/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/mpconfigboard.h +++ b/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/mpconfigboard.h @@ -1,14 +1,14 @@ #define MICROPY_HW_BOARD_NAME "SparkFun Thing Plus - RP2040" #define MICROPY_HW_MCU_NAME "rp2040" -#define MICROPY_HW_NEOPIXEL (&pin_GPIO8) - -#define DEFAULT_I2C_BUS_SCL (&pin_GPIO7) -#define DEFAULT_I2C_BUS_SDA (&pin_GPIO6) - -#define DEFAULT_SPI_BUS_SCK (&pin_GPIO14) -#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO15) -#define DEFAULT_SPI_BUS_MISO (&pin_GPIO12) - -#define DEFAULT_UART_BUS_RX (&pin_GPIO1) #define DEFAULT_UART_BUS_TX (&pin_GPIO0) +#define DEFAULT_UART_BUS_RX (&pin_GPIO1) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO2) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO3) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO4) + +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO6) +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO7) + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO8) diff --git a/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/pins.c b/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/pins.c index 8f63a9bdf2..a27a6c6550 100644 --- a/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/pins.c +++ b/ports/raspberrypi/boards/sparkfun_thing_plus_rp2040/pins.c @@ -1,37 +1,63 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, - { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO24) }, - { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO25) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO14) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO15) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO12) }, - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO1) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO1) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO0) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO0) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO2) }, - + // Left side breakouts, top-to-bottom, as labeled + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO6) }, + + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO7) }, // GPIO7 & GPIO23 are shorted together { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO7) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO3) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) }, - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO25) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO22) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO16) }, + + // Right side breakouts, top-to-bottom, as labeled { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO9)}, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO0) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO1) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO4) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO3) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO2) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, + { MP_ROM_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_GPIO29) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_GPIO28) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO27) }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO28) }, + + // SD Card + { MP_ROM_QSTR(MP_QSTR_SD_SCK), MP_ROM_PTR(&pin_GPIO14)}, + { MP_ROM_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_GPIO15)}, + { MP_ROM_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_GPIO12)}, + { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO9)}, + + // Others + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO25) }, // on-board LED (separate/additional from neopixel) + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/raspberrypi/common-hal/busio/I2C.c b/ports/raspberrypi/common-hal/busio/I2C.c index 0190959f87..a72675d6b6 100644 --- a/ports/raspberrypi/common-hal/busio/I2C.c +++ b/ports/raspberrypi/common-hal/busio/I2C.c @@ -162,7 +162,7 @@ void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { } uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, - const uint8_t *data, size_t len, bool transmit_stop_bit) { + const uint8_t *data, size_t len, bool transmit_stop_bit) { if (len == 0) { // The RP2040 I2C peripheral will not perform 0 byte writes. // So use bitbangio.I2C to do the write. diff --git a/ports/raspberrypi/common-hal/imagecapture/ParallelImageCapture.c b/ports/raspberrypi/common-hal/imagecapture/ParallelImageCapture.c index 2c91a2fa16..2a175470ee 100644 --- a/ports/raspberrypi/common-hal/imagecapture/ParallelImageCapture.c +++ b/ports/raspberrypi/common-hal/imagecapture/ParallelImageCapture.c @@ -44,7 +44,7 @@ // Define this to (1), and you can scope the instruction-pointer of the state machine on D26..28 (note the weird encoding though!) #define DEBUG_STATE_MACHINE (0) #if DEBUG_STATE_MACHINE -#define SIDE(x) ((x)<<8) +#define SIDE(x) ((x) << 8) #else #define SIDE(x) (0) #endif @@ -61,10 +61,10 @@ /* 0 */ pio_encode_wait_gpio(0, vsync) | _0, \ /* 1 */ pio_encode_wait_gpio(1, vsync) | _1, \ /* .wrap_target */ \ -/* 2 */ pio_encode_wait_gpio(1, href) | _2, \ -/* 3 */ pio_encode_wait_gpio(1, pclk) | _3, \ +/* 2 */ pio_encode_wait_gpio(1, href) | _2, \ +/* 3 */ pio_encode_wait_gpio(1, pclk) | _3, \ /* 4 */ pio_encode_in(pio_pins, width) | _4, \ -/* 5 */ pio_encode_wait_gpio(0, pclk) | _5, \ +/* 5 */ pio_encode_wait_gpio(0, pclk) | _5, \ /* .wrap */ \ } @@ -73,8 +73,7 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle const mcu_pin_obj_t *data_clock, const mcu_pin_obj_t *vertical_sync, const mcu_pin_obj_t *horizontal_reference, - int data_count) -{ + int data_count) { uint16_t imagecapture_code[] = IMAGECAPTURE_CODE(data_count, data_clock->number, vertical_sync->number, horizontal_reference->number); @@ -86,12 +85,12 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle data0, data_count, // in pins 0, 0, // in pulls NULL, 0, 0, 0, // set pins -#if DEBUG_STATE_MACHINE + #if DEBUG_STATE_MACHINE &pin_GPIO26, 3, 7, 7, // sideset pins -#else + #else NULL, 0, 0, 0, // sideset pins -#endif - (1<number) | (1<number) | (1<number), // wait gpio pins + #endif + (1 << vertical_sync->number) | (1 << horizontal_reference->number) | (1 << data_clock->number), // wait gpio pins true, // exclusive pin use false, 32, false, // out settings false, // wait for txstall @@ -103,21 +102,18 @@ void common_hal_imagecapture_parallelimagecapture_construct(imagecapture_paralle rp2pio_statemachine_set_wrap(&self->state_machine, 2, 5); } -void common_hal_imagecapture_parallelimagecapture_deinit(imagecapture_parallelimagecapture_obj_t *self) -{ +void common_hal_imagecapture_parallelimagecapture_deinit(imagecapture_parallelimagecapture_obj_t *self) { if (common_hal_imagecapture_parallelimagecapture_deinited(self)) { return; } return common_hal_rp2pio_statemachine_deinit(&self->state_machine); } -bool common_hal_imagecapture_parallelimagecapture_deinited(imagecapture_parallelimagecapture_obj_t *self) -{ +bool common_hal_imagecapture_parallelimagecapture_deinited(imagecapture_parallelimagecapture_obj_t *self) { return common_hal_rp2pio_statemachine_deinited(&self->state_machine); } -void common_hal_imagecapture_parallelimagecapture_capture(imagecapture_parallelimagecapture_obj_t *self, void *buffer, size_t bufsize) -{ +void common_hal_imagecapture_parallelimagecapture_capture(imagecapture_parallelimagecapture_obj_t *self, void *buffer, size_t bufsize) { PIO pio = self->state_machine.pio; uint sm = self->state_machine.state_machine; uint8_t offset = rp2pio_statemachine_program_offset(&self->state_machine); diff --git a/ports/raspberrypi/common-hal/pulseio/PulseIn.c b/ports/raspberrypi/common-hal/pulseio/PulseIn.c index 8d04981b6c..78f05d5d63 100644 --- a/ports/raspberrypi/common-hal/pulseio/PulseIn.c +++ b/ports/raspberrypi/common-hal/pulseio/PulseIn.c @@ -135,15 +135,22 @@ void common_hal_pulseio_pulsein_interrupt() { result = level_count; last_level = level; level_count = 1; - // Pulses that are londger than MAX_PULSE will return MAX_PULSE - if (result > MAX_PULSE ) { - result = MAX_PULSE; - } + // Pulses that are londger than MAX_PULSE will return MAX_PULSE + if (result > MAX_PULSE) { + result = MAX_PULSE; + } // ignore pulses that are too short if (result <= MAX_PULSE && result > MIN_PULSE) { - self->buffer[buf_index] = (uint16_t) result; - buf_index++; - self->len++; + self->buffer[buf_index] = (uint16_t)result; + if (self->len < self->maxlen) { + self->len++; + } + if (buf_index < self->maxlen) { + buf_index++; + } else { + self->start = 0; + buf_index = 0; + } } } } diff --git a/ports/raspberrypi/common-hal/rp2pio/StateMachine.c b/ports/raspberrypi/common-hal/rp2pio/StateMachine.c index 21ec09c42c..ab70a27fcd 100644 --- a/ports/raspberrypi/common-hal/rp2pio/StateMachine.c +++ b/ports/raspberrypi/common-hal/rp2pio/StateMachine.c @@ -813,5 +813,5 @@ void rp2pio_statemachine_set_wrap(rp2pio_statemachine_obj_t *self, uint wrap_tar uint8_t sm = self->state_machine; uint8_t offset = rp2pio_statemachine_program_offset(self); - pio_sm_set_wrap(self->pio, sm, offset+wrap_target, offset+wrap); + pio_sm_set_wrap(self->pio, sm, offset + wrap_target, offset + wrap); } diff --git a/ports/stm/common-hal/audiopwmio/PWMAudioOut.c b/ports/stm/common-hal/audiopwmio/PWMAudioOut.c index e5c478e632..d7df155932 100644 --- a/ports/stm/common-hal/audiopwmio/PWMAudioOut.c +++ b/ports/stm/common-hal/audiopwmio/PWMAudioOut.c @@ -37,12 +37,12 @@ STATIC audiopwmio_pwmaudioout_obj_t *active_audio = NULL; STATIC void set_pin(uint8_t channel, GPIO_PinState state) { HAL_GPIO_WritePin(pin_port(active_audio->pin[channel]->port), - pin_mask(active_audio->pin[channel]->number), state); + pin_mask(active_audio->pin[channel]->number), state); } STATIC void toggle_pin(uint8_t channel) { HAL_GPIO_TogglePin(pin_port(active_audio->pin[channel]->port), - pin_mask(active_audio->pin[channel]->number)); + pin_mask(active_audio->pin[channel]->number)); } STATIC void set_drive_mode(const mcu_pin_obj_t *pin, uint32_t mode) { @@ -93,10 +93,10 @@ STATIC bool fill_buffers(audiopwmio_pwmaudioout_obj_t *self) { } uint32_t num_samples = buffer_length / self->bytes_per_sample / self->sample_channel_count; - int16_t *buffer16 = (int16_t*)buffer; + int16_t *buffer16 = (int16_t *)buffer; while (num_samples--) { - for (int8_t channel=0; channel < effective_channels; channel++) { + for (int8_t channel = 0; channel < effective_channels; channel++) { int16_t val; if (self->bytes_per_sample == 1) { val = *buffer++ << 8; @@ -121,7 +121,7 @@ STATIC bool fill_buffers(audiopwmio_pwmaudioout_obj_t *self) { if (self->len[channel] > 1) { self->buffer[channel][self->buffer_length[channel]++] = self->len[channel]; if (replicate) { - self->buffer[1-channel][self->buffer_length[1-channel]++] = self->len[channel]; + self->buffer[1 - channel][self->buffer_length[1 - channel]++] = self->len[channel]; } self->len[channel] = 0; } @@ -131,14 +131,14 @@ STATIC bool fill_buffers(audiopwmio_pwmaudioout_obj_t *self) { } } } while (get_buffer_result == GET_BUFFER_MORE_DATA && - (!self->buffer_length[0] || (self->pin[1] && !self->buffer_length[1]))); + (!self->buffer_length[0] || (self->pin[1] && !self->buffer_length[1]))); if (get_buffer_result == GET_BUFFER_DONE) { // It's the final countdown - for (int8_t channel=0; channel < effective_channels; channel++) { + for (int8_t channel = 0; channel < effective_channels; channel++) { self->buffer[channel][self->buffer_length[channel]++] = self->len[channel]; if (replicate) { - self->buffer[1-channel][self->buffer_length[1-channel]++] = self->len[channel]; + self->buffer[1 - channel][self->buffer_length[1 - channel]++] = self->len[channel]; } } @@ -163,10 +163,8 @@ STATIC void move_to_beginning(uint16_t *buffer, uint16_t *buffer_length, uint16_ STATIC void pwmaudioout_event_handler(void) { // Detect TIM Update event - if (__HAL_TIM_GET_FLAG(&tim_handle, TIM_FLAG_UPDATE) != RESET) - { - if (__HAL_TIM_GET_IT_SOURCE(&tim_handle, TIM_IT_UPDATE) != RESET) - { + if (__HAL_TIM_GET_FLAG(&tim_handle, TIM_FLAG_UPDATE) != RESET) { + if (__HAL_TIM_GET_IT_SOURCE(&tim_handle, TIM_IT_UPDATE) != RESET) { __HAL_TIM_CLEAR_IT(&tim_handle, TIM_IT_UPDATE); if (!active_audio || active_audio->paused) { __HAL_TIM_DISABLE_IT(&tim_handle, TIM_IT_UPDATE); @@ -221,7 +219,7 @@ void audiopwmout_reset() { // Caller validates that pins are free. void common_hal_audiopwmio_pwmaudioout_construct(audiopwmio_pwmaudioout_obj_t *self, - const mcu_pin_obj_t *left_channel, const mcu_pin_obj_t *right_channel, uint16_t quiescent_value) { + const mcu_pin_obj_t *left_channel, const mcu_pin_obj_t *right_channel, uint16_t quiescent_value) { // Set up the pin(s) for output self->pin[0] = left_channel; @@ -306,7 +304,7 @@ void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t *self, // Calculate period (TODO: supersample to 1 MHz?) TIM_TypeDef *tim_instance = stm_peripherals_find_timer(); uint32_t source = stm_peripherals_timer_get_source_freq(tim_instance); - uint32_t prescaler = source/sample_rate; + uint32_t prescaler = source / sample_rate; // Activate timer active_audio = self; @@ -314,7 +312,7 @@ void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t *self, stm_peripherals_timer_preinit(tim_instance, 4, pwmaudioout_event_handler); tim_handle.Instance = tim_instance; - tim_handle.Init.Period = 100; //immediately replaced. + tim_handle.Init.Period = 100; // immediately replaced. tim_handle.Init.Prescaler = prescaler - 1; tim_handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; tim_handle.Init.CounterMode = TIM_COUNTERMODE_UP; diff --git a/ports/stm/common-hal/pwmio/PWMOut.c b/ports/stm/common-hal/pwmio/PWMOut.c index beb6e44aa4..17ef82a060 100644 --- a/ports/stm/common-hal/pwmio/PWMOut.c +++ b/ports/stm/common-hal/pwmio/PWMOut.c @@ -183,7 +183,7 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self, } } - //Channel/PWM init + // Channel/PWM init self->chan_handle.OCMode = TIM_OCMODE_PWM1; self->chan_handle.Pulse = timer_get_internal_duty(duty, period); self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH; diff --git a/ports/unix/coverage-frzmpy/frzmpy1.py b/ports/unix/coverage-frzmpy/frzmpy1.py index 8ad0f15730..83231c81a5 100644 --- a/ports/unix/coverage-frzmpy/frzmpy1.py +++ b/ports/unix/coverage-frzmpy/frzmpy1.py @@ -1 +1 @@ -print('frzmpy1') +print("frzmpy1") diff --git a/ports/unix/coverage-frzmpy/frzmpy_pkg1/__init__.py b/ports/unix/coverage-frzmpy/frzmpy_pkg1/__init__.py index 8c023afeba..a0f0a6e540 100644 --- a/ports/unix/coverage-frzmpy/frzmpy_pkg1/__init__.py +++ b/ports/unix/coverage-frzmpy/frzmpy_pkg1/__init__.py @@ -1,3 +1,3 @@ # test frozen package with __init__.py -print('frzmpy_pkg1.__init__') +print("frzmpy_pkg1.__init__") x = 1 diff --git a/ports/unix/coverage-frzmpy/frzmpy_pkg2/mod.py b/ports/unix/coverage-frzmpy/frzmpy_pkg2/mod.py index a66b505bf6..bd5419a0a7 100644 --- a/ports/unix/coverage-frzmpy/frzmpy_pkg2/mod.py +++ b/ports/unix/coverage-frzmpy/frzmpy_pkg2/mod.py @@ -1,4 +1,6 @@ # test frozen package without __init__.py -print('frzmpy_pkg2.mod') +print("frzmpy_pkg2.mod") + + class Foo: x = 1 diff --git a/ports/unix/coverage-frzstr/frzstr1.py b/ports/unix/coverage-frzstr/frzstr1.py index 6e88ac38d2..cf4b98d338 100644 --- a/ports/unix/coverage-frzstr/frzstr1.py +++ b/ports/unix/coverage-frzstr/frzstr1.py @@ -1 +1 @@ -print('frzstr1') +print("frzstr1") diff --git a/ports/unix/coverage-frzstr/frzstr_pkg1/__init__.py b/ports/unix/coverage-frzstr/frzstr_pkg1/__init__.py index 1d1df9417e..748abb6ce9 100644 --- a/ports/unix/coverage-frzstr/frzstr_pkg1/__init__.py +++ b/ports/unix/coverage-frzstr/frzstr_pkg1/__init__.py @@ -1,3 +1,3 @@ # test frozen package with __init__.py -print('frzstr_pkg1.__init__') +print("frzstr_pkg1.__init__") x = 1 diff --git a/ports/unix/coverage-frzstr/frzstr_pkg2/mod.py b/ports/unix/coverage-frzstr/frzstr_pkg2/mod.py index bafb5978b0..9e256d9ea7 100644 --- a/ports/unix/coverage-frzstr/frzstr_pkg2/mod.py +++ b/ports/unix/coverage-frzstr/frzstr_pkg2/mod.py @@ -1,4 +1,6 @@ # test frozen package without __init__.py -print('frzstr_pkg2.mod') +print("frzstr_pkg2.mod") + + class Foo: x = 1 diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index a080f916f4..41f8d71abd 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -451,6 +451,7 @@ $(filter $(SRC_PATTERNS), \ msgpack/__init__.c \ msgpack/ExtType.c \ supervisor/RunReason.c \ + wifi/AuthMode.c \ ) SRC_BINDINGS_ENUMS += \ diff --git a/py/makemoduledefs.py b/py/makemoduledefs.py index e20bff1eb0..aa2e5077ca 100644 --- a/py/makemoduledefs.py +++ b/py/makemoduledefs.py @@ -61,7 +61,7 @@ def generate_module_table_header(modules): # Print header file for all external modules. mod_defs = [] print("// Automatically generated by makemoduledefs.py.\n") - print("#include \"py/mpconfig.h\"") + print('#include "py/mpconfig.h"') for module_name, obj_module, enabled_define in modules: mod_def = "MODULE_DEF_{}".format(module_name.upper()) mod_defs.append(mod_def) diff --git a/py/makeqstrdata.py b/py/makeqstrdata.py index 40942ed106..0f4717f0b6 100644 --- a/py/makeqstrdata.py +++ b/py/makeqstrdata.py @@ -631,6 +631,7 @@ def parse_input_headers(infiles): return qcfgs, qstrs, i18ns + def escape_bytes(qstr): if all(32 <= ord(c) <= 126 and c != "\\" and c != '"' for c in qstr): # qstr is all printable ASCII so render it as-is (for easier debugging) @@ -640,6 +641,7 @@ def escape_bytes(qstr): qbytes = bytes_cons(qstr, "utf8") return "".join(("\\x%02x" % b) for b in qbytes) + def make_bytes(cfg_bytes_len, cfg_bytes_hash, qstr): qbytes = bytes_cons(qstr, "utf8") qlen = len(qbytes) @@ -715,7 +717,6 @@ def print_qstr_enums(qstrs): print("QENUM(MP_QSTR_%s)" % (ident,)) - if __name__ == "__main__": import argparse diff --git a/py/makeversionhdr.py b/py/makeversionhdr.py index 1ab15ecd95..41e5956542 100644 --- a/py/makeversionhdr.py +++ b/py/makeversionhdr.py @@ -65,7 +65,6 @@ def get_version_info_from_git(): return git_tag, git_hash, ver - def get_version_info_from_docs_conf(): with open(os.path.join(os.path.dirname(sys.argv[0]), "..", "conf.py")) as f: for line in f: diff --git a/py/objgenerator.c b/py/objgenerator.c index 518944e26b..33300b36b5 100644 --- a/py/objgenerator.c +++ b/py/objgenerator.c @@ -62,10 +62,10 @@ STATIC mp_obj_t native_gen_wrap_call(mp_obj_t self_in, size_t n_args, size_t n_k mp_obj_fun_bc_t *self_fun = (mp_obj_fun_bc_t *)self->fun; // Determine start of prelude, and extract n_state from it -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wcast-align" + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" uintptr_t prelude_offset = ((uintptr_t *)self_fun->bytecode)[0]; -#pragma GCC diagnostic pop + #pragma GCC diagnostic pop size_t n_state = mp_decode_uint_value(self_fun->bytecode + prelude_offset); size_t n_exc_stack = 0; @@ -85,10 +85,10 @@ STATIC mp_obj_t native_gen_wrap_call(mp_obj_t self_in, size_t n_args, size_t n_k o->code_state.exc_sp = NULL; // Prepare the generator instance for execution -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wcast-align" + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" uintptr_t start_offset = ((uintptr_t *)self_fun->bytecode)[1]; -#pragma GCC diagnostic pop + #pragma GCC diagnostic pop o->code_state.ip = MICROPY_MAKE_POINTER_CALLABLE((void *)(self_fun->bytecode + start_offset)); return MP_OBJ_FROM_PTR(o); diff --git a/py/objtype.c b/py/objtype.c index 42c616b75e..4a30bf3e29 100644 --- a/py/objtype.c +++ b/py/objtype.c @@ -854,7 +854,8 @@ STATIC mp_obj_t instance_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value } mp_obj_class_lookup(&lookup, self->base.type); if (member[0] == MP_OBJ_SENTINEL) { - mp_obj_t ret = mp_obj_subscr(self->subobj[0], index, value); + mp_obj_type_t *subobj_type = mp_obj_get_type(self->subobj[0]); + mp_obj_t ret = subobj_type->subscr(self_in, index, value); // May have called port specific C code. Make sure it didn't mess up the heap. assert_heap_ok(); return ret; diff --git a/py/persistentcode.c b/py/persistentcode.c index 13447e931f..175ad0a930 100644 --- a/py/persistentcode.c +++ b/py/persistentcode.c @@ -189,13 +189,13 @@ STATIC void extract_prelude(const byte **ip, const byte **ip2, bytecode_prelude_ #if MICROPY_EMIT_THUMB STATIC void asm_thumb_rewrite_mov(uint8_t *pc, uint16_t val) { -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wcast-align" + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" // high part *(uint16_t *)pc = (*(uint16_t *)pc & 0xfbf0) | (val >> 1 & 0x0400) | (val >> 12); // low part *(uint16_t *)(pc + 2) = (*(uint16_t *)(pc + 2) & 0x0f00) | (val << 4 & 0x7000) | (val & 0x00ff); -#pragma GCC diagnostic pop + #pragma GCC diagnostic pop } #endif diff --git a/py/qstr.c b/py/qstr.c index a10adc578a..e56498984b 100644 --- a/py/qstr.c +++ b/py/qstr.c @@ -77,13 +77,13 @@ mp_uint_t qstr_compute_hash(const byte *data, size_t len) { } const qstr_attr_t mp_qstr_const_attr[] = { - #ifndef NO_QSTR + #ifndef NO_QSTR #define QDEF(id, hash, len, str) { hash, len }, #define TRANSLATION(id, length, compressed ...) - #include "genhdr/qstrdefs.generated.h" + #include "genhdr/qstrdefs.generated.h" #undef TRANSLATION #undef QDEF - #endif + #endif }; const qstr_pool_t mp_qstr_const_pool = { diff --git a/py/vm.c b/py/vm.c index 17ac860e6e..e51c2e2165 100644 --- a/py/vm.c +++ b/py/vm.c @@ -127,11 +127,21 @@ mp_vm_return_kind_t PLACE_IN_ITCM(mp_execute_bytecode)(mp_code_state_t * code_st #endif #if MICROPY_OPT_COMPUTED_GOTO #include "py/vmentrytable.h" + #if MICROPY_OPT_COMPUTED_GOTO_SAVE_SPACE + #define ONE_TRUE_DISPATCH() one_true_dispatch : do { \ + TRACE(ip); \ + MARK_EXC_IP_GLOBAL(); \ + goto *(void *)((char *) && entry_MP_BC_LOAD_CONST_FALSE + entry_table[*ip++]); \ +} while (0) + #define DISPATCH() do { goto one_true_dispatch; } while (0) + #else + #define ONE_TRUE_DISPATCH() DISPATCH() #define DISPATCH() do { \ TRACE(ip); \ MARK_EXC_IP_GLOBAL(); \ goto *entry_table[*ip++]; \ } while (0) + #endif #define DISPATCH_WITH_PEND_EXC_CHECK() goto pending_exception_check #define ENTRY(op) entry_##op #define ENTRY_DEFAULT entry_default @@ -197,7 +207,7 @@ mp_vm_return_kind_t PLACE_IN_ITCM(mp_execute_bytecode)(mp_code_state_t * code_st for (;;) { dispatch_loop: #if MICROPY_OPT_COMPUTED_GOTO - DISPATCH(); + ONE_TRUE_DISPATCH(); #else TRACE(ip); MARK_EXC_IP_GLOBAL(); diff --git a/shared-bindings/alarm/__init__.c b/shared-bindings/alarm/__init__.c index 74ec765ef4..4252175522 100644 --- a/shared-bindings/alarm/__init__.c +++ b/shared-bindings/alarm/__init__.c @@ -244,6 +244,7 @@ const mp_obj_module_t alarm_module = { }; extern void port_idle_until_interrupt(void); + MP_WEAK void common_hal_alarm_pretending_deep_sleep(void) { port_idle_until_interrupt(); } diff --git a/shared-bindings/displayio/Bitmap.c b/shared-bindings/displayio/Bitmap.c index 058b8db670..37dbd89667 100644 --- a/shared-bindings/displayio/Bitmap.c +++ b/shared-bindings/displayio/Bitmap.c @@ -49,7 +49,7 @@ //| but the `displayio.Bitmap.dirty` method must be used to inform //| displayio when a bitmap was modified through the buffer interface. //| -//| `bitmaptools.arrayblit` can also be useful to omve data efficiently +//| `bitmaptools.arrayblit` can also be useful to move data efficiently //| into a Bitmap. //| """ //| diff --git a/shared-bindings/wifi/AuthMode.c b/shared-bindings/wifi/AuthMode.c new file mode 100644 index 0000000000..528fcd4143 --- /dev/null +++ b/shared-bindings/wifi/AuthMode.c @@ -0,0 +1,76 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/enum.h" + +#include "shared-bindings/wifi/AuthMode.h" + +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, OPEN, AUTHMODE_OPEN); +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, WEP, AUTHMODE_WEP); +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, WPA, AUTHMODE_WPA); +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, WPA2, AUTHMODE_WPA2); +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, WPA3, AUTHMODE_WPA3); +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, PSK, AUTHMODE_PSK); +MAKE_ENUM_VALUE(wifi_authmode_type, authmode, ENTERPRISE, AUTHMODE_ENTERPRISE); + +//| class AuthMode: +//| """The authentication protocols used by WiFi.""" +//| +//| OPEN: object +//| """Open network. No authentication required.""" +//| +//| WEP: object +//| """Wired Equivalent Privacy.""" +//| +//| WPA: object +//| """Wireless Protected Access.""" +//| +//| WPA2: object +//| """Wireless Protected Access 2.""" +//| +//| WPA3: object +//| """Wireless Protected Access 3.""" +//| +//| PSK: object +//| """Pre-shared Key. (password)""" +//| +//| ENTERPRISE: object +//| """Each user has a unique credential.""" +//| +MAKE_ENUM_MAP(wifi_authmode) { + MAKE_ENUM_MAP_ENTRY(authmode, OPEN), + MAKE_ENUM_MAP_ENTRY(authmode, WEP), + MAKE_ENUM_MAP_ENTRY(authmode, WPA), + MAKE_ENUM_MAP_ENTRY(authmode, WPA2), + MAKE_ENUM_MAP_ENTRY(authmode, WPA3), + MAKE_ENUM_MAP_ENTRY(authmode, PSK), + MAKE_ENUM_MAP_ENTRY(authmode, ENTERPRISE), +}; +STATIC MP_DEFINE_CONST_DICT(wifi_authmode_locals_dict, wifi_authmode_locals_table); + +MAKE_PRINTER(wifi, wifi_authmode); + +MAKE_ENUM_TYPE(wifi, AuthMode, wifi_authmode); diff --git a/shared-bindings/wifi/AuthMode.h b/shared-bindings/wifi/AuthMode.h new file mode 100644 index 0000000000..f7056ea97c --- /dev/null +++ b/shared-bindings/wifi/AuthMode.h @@ -0,0 +1,42 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_WIFI_AUTHMODE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_WIFI_AUTHMODE_H + +typedef enum { + AUTHMODE_OPEN, + AUTHMODE_WEP, + AUTHMODE_WPA, + AUTHMODE_WPA2, + AUTHMODE_WPA3, + AUTHMODE_PSK, + AUTHMODE_ENTERPRISE +} wifi_authmode_t; + +extern const mp_obj_type_t wifi_authmode_type; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_WIFI_AUTHMODE_H diff --git a/supervisor/serial.h b/supervisor/serial.h index e85231c6c7..391a874e48 100644 --- a/supervisor/serial.h +++ b/supervisor/serial.h @@ -29,6 +29,7 @@ #include #include +#include #include "py/mpconfig.h" @@ -47,4 +48,7 @@ char serial_read(void); bool serial_bytes_available(void); bool serial_connected(void); +// XXX used in nrf52-sleep debug +int dbg_printf(const char *fmt, ...) __attribute__((format(printf, 1, 2))); + #endif // MICROPY_INCLUDED_SUPERVISOR_SERIAL_H diff --git a/supervisor/shared/external_flash/spi_flash.c b/supervisor/shared/external_flash/spi_flash.c index 4f7d5f6d3a..9444e303a1 100644 --- a/supervisor/shared/external_flash/spi_flash.c +++ b/supervisor/shared/external_flash/spi_flash.c @@ -56,7 +56,7 @@ static void flash_disable(void) { common_hal_busio_spi_unlock(&supervisor_flash_spi_bus); } -static bool transfer(uint8_t* command, uint32_t command_length, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) { +static bool transfer(uint8_t *command, uint32_t command_length, uint8_t *data_in, uint8_t *data_out, uint32_t data_length) { if (!flash_enable()) { return false; } diff --git a/supervisor/shared/serial.c b/supervisor/shared/serial.c index bd2bf4ba22..beb2541a15 100644 --- a/supervisor/shared/serial.c +++ b/supervisor/shared/serial.c @@ -37,6 +37,12 @@ #include "tusb.h" +#ifdef NRF_DEBUG_PRINT +// XXX these functions are in nrf/supervisor/debug_uart.c +extern void _debug_uart_init(void); +extern void _debug_print_substr(const char *text, uint32_t length); +#endif + /* * Note: DEBUG_UART currently only works on STM32, * enabling on another platform will cause a crash. @@ -64,10 +70,17 @@ void serial_early_init(void) { buf_array, true); common_hal_busio_uart_never_reset(&debug_uart); #endif + + #ifdef NRF_DEBUG_PRINT + _debug_uart_init(); + #endif } void serial_init(void) { usb_init(); + #ifdef NRF_DEBUG_PRINT + _debug_uart_init(); + #endif } bool serial_connected(void) { @@ -146,8 +159,14 @@ void serial_write_substring(const char *text, uint32_t length) { #if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) int uart_errcode; + common_hal_busio_uart_write(&debug_uart, (const uint8_t *)text, length, &uart_errcode); #endif + + #ifdef NRF_DEBUG_PRINT + _debug_print_substr(text, length); + #endif + } void serial_write(const char *text) { diff --git a/supervisor/shared/workflow.h b/supervisor/shared/workflow.h index 2596dd2c45..b3c817fb8b 100644 --- a/supervisor/shared/workflow.h +++ b/supervisor/shared/workflow.h @@ -27,4 +27,3 @@ #pragma once extern bool supervisor_workflow_connecting(void); -extern bool supervisor_workflow_active(void); diff --git a/supervisor/stub/serial.c b/supervisor/stub/serial.c index 6ca14fcfde..7d00ae1dc3 100644 --- a/supervisor/stub/serial.c +++ b/supervisor/stub/serial.c @@ -53,3 +53,7 @@ void serial_write(const char *text) { void supervisor_workflow_reset(void) { } + +bool supervisor_workflow_active(void) { + return false; +} diff --git a/supervisor/workflow.h b/supervisor/workflow.h index 27d063503a..31900392cd 100755 --- a/supervisor/workflow.h +++ b/supervisor/workflow.h @@ -29,4 +29,4 @@ void supervisor_workflow_reset(void); // True when the user could be actively iterating on their code. -bool workflow_active(void); +bool supervisor_workflow_active(void); diff --git a/tools/build_board_info.py b/tools/build_board_info.py index 66ca48a02d..f44cf54821 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -65,26 +65,28 @@ extension_by_board = { "meowbit_v121": UF2, } -language_allow_list = set([ - "ID", - "de_DE", - "en_GB", - "en_US", - "en_x_pirate", - "es", - "fil", - "fr", - "it_IT", - "ja", - "nl", - "pl", - "pt_BR", - "sv", - "zh_Latn_pinyin", -]) +language_allow_list = set( + [ + "ID", + "de_DE", + "en_GB", + "en_US", + "en_x_pirate", + "es", + "fil", + "fr", + "it_IT", + "ja", + "nl", + "pl", + "pt_BR", + "sv", + "zh_Latn_pinyin", + ] +) -def get_languages(list_all = False): +def get_languages(list_all=False): languages = set() for f in os.scandir("../locale"): if f.name.endswith(".po"): diff --git a/tools/build_release_files.py b/tools/build_release_files.py index 68aa45f0a0..3fe714e393 100755 --- a/tools/build_release_files.py +++ b/tools/build_release_files.py @@ -90,8 +90,10 @@ for board in build_boards: for alias in board_info["aliases"] + [board]: bin_directory = "../bin/{alias}/{language}".format(alias=alias, language=language) os.makedirs(bin_directory, exist_ok=True) - final_filename = "adafruit-circuitpython-{alias}-{language}-{version}.{extension}".format( - alias=alias, language=language, version=version, extension=extension + final_filename = ( + "adafruit-circuitpython-{alias}-{language}-{version}.{extension}".format( + alias=alias, language=language, version=version, extension=extension + ) ) final_filename = os.path.join(bin_directory, final_filename) try: diff --git a/tools/codeformat.py b/tools/codeformat.py index 58c5a8e39f..58e2113459 100644 --- a/tools/codeformat.py +++ b/tools/codeformat.py @@ -32,6 +32,7 @@ import itertools import os import pathlib import re +import sys import subprocess # Relative to top-level repo dir. @@ -68,6 +69,45 @@ EXCLUSIONS = [ "tests/basics/*.py", ] +# None of the standard Python path matching routines implement the matching +# we want, which is most like git's "pathspec" version of globs. +# In particular, we want "**/" to match all directories. +# This routine is sufficient to work with the patterns we have, but +# subtle cases like character classes that contain meta-characters +# are not covered +def git_glob_to_regex(pat): + def transform(m): + m = m.group(0) + if m == "*": + return "[^/]*" + if m == "**/": + return "(.*/)?" + if m == "?": + return "[^/]" + if m == ".": + return r"\." + return m + + result = [transform(part) for part in re.finditer(r"(\*\*/|[*?.]|[^*?.]+)", pat)] + return "(^" + "".join(result) + "$)" + + +# Create a single, complicated regular expression that matches exactly the +# files we want, accounting for the PATHS as well as the EXCLUSIONS. +path_re = ( + "" + # First a negative lookahead assertion that it doesn't match + # any of the EXCLUSIONS + + "(?!" + + "|".join(git_glob_to_regex(pat) for pat in EXCLUSIONS) + + ")" + # Then a positive match for any of the PATHS + + "(?:" + + "|".join(git_glob_to_regex(pat) for pat in PATHS) + + ")" +) +path_rx = re.compile(path_re) + # Path to repo top-level dir. TOP = os.path.abspath(os.path.join(os.path.dirname(__file__), "..")) @@ -76,15 +116,15 @@ UNCRUSTIFY_CFG = os.path.join(TOP, "tools/uncrustify.cfg") C_EXTS = (".c", ".h") PY_EXTS = (".py",) +# Transform a filename argument relative to the current directory into one +# relative to the TOP directory, which is what we need when checking against +# path_rx. +def relative_filename(arg): + return str(pathlib.Path(arg).resolve().relative_to(TOP)) -def list_files(args, paths, exclusions=None, prefix=""): - files = set() - args = [os.path.join(prefix, arg) for arg in args] - for pattern in paths: - files.update(arg for arg in args if pathlib.Path(arg).match(pattern)) - for pattern in exclusions or []: - files.difference_update(fnmatch.filter(files, os.path.join(prefix, pattern))) - return sorted(files) + +def list_files(args): + return sorted(arg for arg in args if path_rx.match(relative_filename(arg))) def fixup_c(filename): @@ -135,19 +175,25 @@ def fixup_c(filename): def main(): - cmd_parser = argparse.ArgumentParser(description="Auto-format C and Python files -- to be used via pre-commit only.") + cmd_parser = argparse.ArgumentParser( + description="Auto-format C and Python files -- to be used via pre-commit only." + ) cmd_parser.add_argument("-c", action="store_true", help="Format C code only") cmd_parser.add_argument("-p", action="store_true", help="Format Python code only") cmd_parser.add_argument("-v", action="store_true", help="Enable verbose output") + cmd_parser.add_argument("--dry-run", action="store_true", help="Print, don't act") cmd_parser.add_argument("files", nargs="+", help="Run on specific globs") args = cmd_parser.parse_args() + if args.dry_run: + print(" ".join(sys.argv)) + # Setting only one of -c or -p disables the other. If both or neither are set, then do both. format_c = args.c or not args.p format_py = args.p or not args.c # Expand the arguments passed on the command line, subject to the PATHS and EXCLUSIONS - files = list_files(args.files, PATHS, EXCLUSIONS, TOP) + files = list_files(args.files) # Extract files matching a specific language. def lang_files(exts): @@ -161,7 +207,10 @@ def main(): file_args = list(itertools.islice(files, N)) if not file_args: break - subprocess.call(cmd + file_args) + if args.dry_run: + print(" ".join(cmd + file_args)) + else: + subprocess.call(cmd + file_args) # Format C files with uncrustify. if format_c: diff --git a/tools/gen_usb_descriptor.py b/tools/gen_usb_descriptor.py index 1fad2fbeb3..121bce6a0e 100644 --- a/tools/gen_usb_descriptor.py +++ b/tools/gen_usb_descriptor.py @@ -619,7 +619,6 @@ configuration = standard.ConfigurationDescriptor( # bit 7 is always 1 and 0-4 are always 0 # Turn off remote wakeup until we handle it in CircuitPython. bmAttributes=0x80, - ) descriptor_list.insert(0, configuration) diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py index 5c3a6af32d..622a96014d 100755 --- a/tools/mpy-tool.py +++ b/tools/mpy-tool.py @@ -805,7 +805,6 @@ def read_raw_code(f, qstr_win): ) - def read_mpy(filename): with open(filename, "rb") as f: header = bytes_cons(f.read(4)) @@ -823,7 +822,6 @@ def read_mpy(filename): return read_raw_code(f, qstr_win) - def dump_mpy(raw_codes): for rc in raw_codes: rc.dump() @@ -896,10 +894,10 @@ def freeze_mpy(base_qstrs, raw_codes): qstr_size = {"metadata": 0, "data": 0} for _, _, qstr in new: qbytes = qstrutil.bytes_cons(qstr, "utf8") - print(" {%d, %d}," % ( - qstrutil.compute_hash(qbytes, config.MICROPY_QSTR_BYTES_IN_HASH), - len(qbytes) - )) + print( + " {%d, %d}," + % (qstrutil.compute_hash(qbytes, config.MICROPY_QSTR_BYTES_IN_HASH), len(qbytes)) + ) qstr_size["metadata"] += ( config.MICROPY_QSTR_BYTES_IN_LEN + config.MICROPY_QSTR_BYTES_IN_HASH ) @@ -919,7 +917,7 @@ def freeze_mpy(base_qstrs, raw_codes): print(" (qstr_attr_t *)mp_qstr_frozen_const_attr,") print(" {") for _, _, qstr in new: - print(" \"%s\"," % qstrutil.escape_bytes(qstr)) + print(' "%s",' % qstrutil.escape_bytes(qstr)) print(" },") print("};")