GPIO and GPIOTE reg dump for debug.
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@ -88,7 +88,6 @@ int dbg_printf(const char *fmt, ...) {
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return ret;
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}
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void dbg_dump_RTCreg(void) {
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dbg_printf("\r\nRTC2\r\n");
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NRF_RTC_Type *r = rtc_instance.p_reg;
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@ -110,6 +109,60 @@ void dbg_dump_RAMreg(void) {
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dbg_printf("\r\n");
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}
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void dbg_dump_GPIOregs(void) {
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int i, port, col;
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NRF_GPIO_Type *gpio[] = { NRF_P0, NRF_P1 };
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const char cnf_pull_chr[] = "-D*U"; // pull down, pull up
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const char cnf_sense_chr[] = "-?HL"; // sense high, sense low
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for(port=0, col=0; port<=1; ++port) {
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for(i=0; i<32; ++i) {
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uint32_t cnf = gpio[port]->PIN_CNF[i];
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if (cnf != 0x0002) { // changed from default value
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dbg_printf("[%d_%02d]:%c%c%c%d%c ", port, i,
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(cnf & 1) ? 'O' : 'I', // output, input
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(cnf & 2) ? 'd' : 'c', // disconnected, connected
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cnf_pull_chr[(cnf >> 2) & 3],
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(int)((cnf >> 8) & 7), // drive config 0-7
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cnf_sense_chr[(cnf >> 16) & 3]);
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if (++col >= 6) {
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dbg_printf("\r\n");
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col = 0;
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}
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}
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}
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}
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if (col > 0) dbg_printf("\r\n");
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dbg_printf("GPIOTE\r\n");
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NRF_GPIOTE_Type const *reg = NRF_GPIOTE;
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const char config_mode_chr[] = "-E-T"; // event, task
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const char config_pol_chr[] = "-HLT"; // low-to-Hi, hi-to-Low, Toggle
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const char config_outinit_chr[] = "01"; // initial value is 0 or 1
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for(i=0, col=0; i<8; ++i) {
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uint32_t conf = reg->CONFIG[i];
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if (conf != 0) { // changed from default value
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dbg_printf("CONFIG[%d]:%d_%02d,%c%c%c ", i,
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(int)((conf >> 13) & 1), (int)((conf >> 8) & 0x1F),
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config_mode_chr[conf & 3],
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config_pol_chr[(conf >> 16) & 3],
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(conf & 3) == 3 ?
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config_outinit_chr[(conf >> 20) & 1] : '-');
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if (++col >= 4) {
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dbg_printf("\r\n");
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col = 0;
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}
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}
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}
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if (col > 0) dbg_printf("\r\n");
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for(i=0; i<8; ++i) {
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dbg_printf("EVENTS_IN[%d]:%X ", i, (int)(reg->EVENTS_IN[i]));
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if ((i & 3) == 3) dbg_printf("\r\n");
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}
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dbg_printf("EVENTS_PORT:%X INTENSET:%08X\r\n",
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(int)(reg->EVENTS_PORT), (int)(reg->INTENSET));
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}
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void dbg_dump_reset_reason(void) {
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int reset_reason = (int)common_hal_mcu_processor_get_reset_reason();
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const char* rr_str[] = {
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