From 9b1170a65dc96fdbc3c8b0693068491e841bc504 Mon Sep 17 00:00:00 2001 From: Sebastian Plamauer Date: Sun, 16 Oct 2016 18:19:08 +0200 Subject: [PATCH] [atmel-samd] add adalogger board definitions --- .../boards/feather_m0_adalogger/conf_access.h | 115 +++++++++++++ .../boards/feather_m0_adalogger/conf_board.h | 14 ++ .../boards/feather_m0_adalogger/conf_usb.h | 150 +++++++++++++++++ atmel-samd/boards/feather_m0_adalogger/init.c | 20 +++ .../feather_m0_adalogger/mpconfigboard.h | 7 + .../feather_m0_adalogger/mpconfigboard.mk | 3 + atmel-samd/boards/feather_m0_adalogger/pins.c | 155 ++++++++++++++++++ atmel-samd/boards/feather_m0_adalogger/pins.h | 28 ++++ 8 files changed, 492 insertions(+) create mode 100644 atmel-samd/boards/feather_m0_adalogger/conf_access.h create mode 100644 atmel-samd/boards/feather_m0_adalogger/conf_board.h create mode 100644 atmel-samd/boards/feather_m0_adalogger/conf_usb.h create mode 100644 atmel-samd/boards/feather_m0_adalogger/init.c create mode 100644 atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h create mode 100644 atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk create mode 100644 atmel-samd/boards/feather_m0_adalogger/pins.c create mode 100644 atmel-samd/boards/feather_m0_adalogger/pins.h diff --git a/atmel-samd/boards/feather_m0_adalogger/conf_access.h b/atmel-samd/boards/feather_m0_adalogger/conf_access.h new file mode 100644 index 0000000000..8cf104e69c --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/conf_access.h @@ -0,0 +1,115 @@ +/** + * \file + * + * \brief Memory access control configuration file. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef _CONF_ACCESS_H_ +#define _CONF_ACCESS_H_ + +#include "compiler.h" +#include "board.h" + + +/*! \name Activation of Logical Unit Numbers + */ +//! @{ +#define LUN_0 ENABLE //!< On-Chip Virtual Memory. +#define LUN_1 DISABLE //!< AT45DBX Data Flash. +#define LUN_2 DISABLE //!< SD/MMC Card over SPI. +#define LUN_3 DISABLE //!< SD/MMC Card over MCI Slot 0. +#define LUN_4 DISABLE +#define LUN_5 DISABLE +#define LUN_6 DISABLE +#define LUN_7 DISABLE +#define LUN_USB DISABLE //!< Host Mass-Storage Memory. +//! @} + +/*! \name LUN 0 Definitions + */ +//! @{ +#define LUN_0_INCLUDE "rom_fs.h" +#define Lun_0_test_unit_ready rom_fs_test_unit_ready +#define Lun_0_read_capacity rom_fs_read_capacity +#define Lun_0_unload NULL /* Can not be unloaded */ +#define Lun_0_wr_protect rom_fs_wr_protect +#define Lun_0_removal rom_fs_removal +#define Lun_0_usb_read_10 rom_fs_usb_read_10 +#define Lun_0_usb_write_10 rom_fs_usb_write_10 +#define LUN_0_NAME "\"On-Chip ROM\"" +//! @} + +#define MEM_USB LUN_USB + +/*! \name Actions Associated with Memory Accesses + * + * Write here the action to associate with each memory access. + * + * \warning Be careful not to waste time in order not to disturb the functions. + */ +//! @{ +#define memory_start_read_action(nb_sectors) +#define memory_stop_read_action() +#define memory_start_write_action(nb_sectors) +#define memory_stop_write_action() +//! @} + +/*! \name Activation of Interface Features + */ +//! @{ +#define ACCESS_USB true //!< MEM <-> USB interface. +#define ACCESS_MEM_TO_RAM false //!< MEM <-> RAM interface. +#define ACCESS_STREAM false //!< Streaming MEM <-> MEM interface. +#define ACCESS_STREAM_RECORD false //!< Streaming MEM <-> MEM interface in record mode. +#define ACCESS_MEM_TO_MEM false //!< MEM <-> MEM interface. +#define ACCESS_CODEC false //!< Codec interface. +//! @} + +/*! \name Specific Options for Access Control + */ +//! @{ +#define GLOBAL_WR_PROTECT false //!< Management of a global write protection. +//! @} + + +#endif // _CONF_ACCESS_H_ diff --git a/atmel-samd/boards/feather_m0_adalogger/conf_board.h b/atmel-samd/boards/feather_m0_adalogger/conf_board.h new file mode 100644 index 0000000000..7b88c97fc2 --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/conf_board.h @@ -0,0 +1,14 @@ +/** + * \file + * + * \brief User board configuration template + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_BOARD_H +#define CONF_BOARD_H + +#endif // CONF_BOARD_H diff --git a/atmel-samd/boards/feather_m0_adalogger/conf_usb.h b/atmel-samd/boards/feather_m0_adalogger/conf_usb.h new file mode 100644 index 0000000000..fa832a3e27 --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/conf_usb.h @@ -0,0 +1,150 @@ + +#include +#include + +#ifndef CONF_USB_H_INCLUDED +#define CONF_USB_H_INCLUDED + +#define USB_DEVICE_MAJOR_VERSION 1 +#define USB_DEVICE_MINOR_VERSION 0 +#define USB_DEVICE_POWER 100 // Consumption on Vbus line (mA) +#define USB_DEVICE_ATTR \ + (USB_CONFIG_ATTR_BUS_POWERED) +// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_SELF_POWERED) +// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_BUS_POWERED) + +//! USB Device string definitions (Optional) +#ifndef USB_DEVICE_MANUFACTURE_NAME +# define USB_DEVICE_MANUFACTURE_NAME "Adafruit Industries" +#endif + +#ifndef USB_DEVICE_PRODUCT_NAME +# define USB_DEVICE_PRODUCT_NAME "Feather M0 Adalogger" +#endif + +#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number +#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 32 +extern char serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH]; + +//! Control endpoint size +#define USB_DEVICE_EP_CTRL_SIZE 64 + +//! Two interfaces for this device (CDC COM + CDC DATA + MSC) +#define USB_DEVICE_NB_INTERFACE 3 + +// (3 | USB_EP_DIR_IN) // CDC Notify endpoint +// (4 | USB_EP_DIR_IN) // CDC TX +// (5 | USB_EP_DIR_OUT) // CDC RX +// (1 | USB_EP_DIR_IN) // MSC IN +// (2 | USB_EP_DIR_OUT) // MSC OUT +#define USB_DEVICE_MAX_EP 5 + +#define UDI_CDC_PORT_NB 1 +#define UDI_CDC_ENABLE_EXT(port) mp_cdc_enable(port) +extern bool mp_cdc_enable(uint8_t port); +#define UDI_CDC_DISABLE_EXT(port) mp_cdc_disable(port) +extern void mp_cdc_disable(uint8_t port); +#define UDI_CDC_LOW_RATE + +#define UDI_CDC_DEFAULT_RATE 115200 +#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1 +#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE +#define UDI_CDC_DEFAULT_DATABITS 8 + +#define UDI_CDC_RX_NOTIFY(port) usb_rx_notify() +void usb_rx_notify(void); +#define UDI_CDC_SET_CODING_EXT(port,cfg) +#define UDI_CDC_SET_DTR_EXT(port,set) +#define UDI_CDC_SET_RTS_EXT(port,set) + +/** + * USB CDC low level configuration + * In standalone these configurations are defined by the CDC module. + * For composite device, these configuration must be defined here + * @{ + */ +//! Endpoint numbers definition + +#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint +#define UDI_CDC_DATA_EP_IN_0 (4 | USB_EP_DIR_IN) // TX +#define UDI_CDC_DATA_EP_OUT_0 (5 | USB_EP_DIR_OUT) // RX + +//! Interface numbers +#define UDI_CDC_COMM_IFACE_NUMBER_0 0 +#define UDI_CDC_DATA_IFACE_NUMBER_0 1 + +/** + * Configuration of MSC interface + * @{ + */ +//! Vendor name and Product version of MSC interface +#define UDI_MSC_GLOBAL_VENDOR_ID \ + 'A', 'T', 'M', 'E', 'L', ' ', ' ', ' ' +#define UDI_MSC_GLOBAL_PRODUCT_VERSION \ + '1', '.', '0', '0' + +//! Interface callback definition +#define UDI_MSC_ENABLE_EXT() mp_msc_enable() +extern bool mp_msc_enable(); +#define UDI_MSC_DISABLE_EXT() mp_msc_disable() +extern void mp_msc_disable(); + +//! Enable id string of interface to add an extra USB string +#define UDI_MSC_STRING_ID 5 + +/** + * USB MSC low level configuration + * In standalone these configurations are defined by the MSC module. + * For composite device, these configuration must be defined here + * @{ + */ +//! Endpoint numbers definition +#define UDI_MSC_EP_IN (1 | USB_EP_DIR_IN) +#define UDI_MSC_EP_OUT (2 | USB_EP_DIR_OUT) + +//! Interface number +#define UDI_MSC_IFACE_NUMBER 2 + +/** + * Description of Composite Device + * @{ + */ +//! USB Interfaces descriptor structure +#define UDI_COMPOSITE_DESC_T \ + usb_iad_desc_t udi_cdc_iad; \ + udi_cdc_comm_desc_t udi_cdc_comm; \ + udi_cdc_data_desc_t udi_cdc_data; \ + udi_msc_desc_t udi_msc + +//! USB Interfaces descriptor value for Full Speed +#define UDI_COMPOSITE_DESC_FS \ + .udi_cdc_iad = UDI_CDC_IAD_DESC_0, \ + .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ + .udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \ + .udi_msc = UDI_MSC_DESC_FS + +//! USB Interfaces descriptor value for High Speed +#define UDI_COMPOSITE_DESC_HS \ + .udi_cdc_iad = UDI_CDC_IAD_DESC_0, \ + .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ + .udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \ + .udi_msc = UDI_MSC_DESC_HS + +//! USB Interface APIs +#define UDI_COMPOSITE_API \ + &udi_api_cdc_comm, \ + &udi_api_cdc_data, \ + &udi_api_msc +//@} + +/** + * USB Device Driver Configuration + * @{ + */ +//@} + +//! The includes of classes and other headers must be done at the end of this file to avoid compile error +#include "udi_cdc.h" +#include "udi_msc.h" + +#endif diff --git a/atmel-samd/boards/feather_m0_adalogger/init.c b/atmel-samd/boards/feather_m0_adalogger/init.c new file mode 100644 index 0000000000..88608c0fbe --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/init.c @@ -0,0 +1,20 @@ +/** + * \file + * + * \brief User board initialization template + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include "board.h" +#include "conf_board.h" + +void board_init(void) +{ + /* This function is meant to contain board-specific initialization code + * for, e.g., the I/O pins. The initialization can rely on application- + * specific board configuration, found in conf_board.h. + */ +} diff --git a/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h b/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h new file mode 100644 index 0000000000..e6029a4b9e --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h @@ -0,0 +1,7 @@ +// LEDs +#define MICROPY_HW_LED1 PIN_PA17 // red +// #define UART_REPL +#define USB_REPL + +#define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Adalogger" +#define MICROPY_HW_MCU_NAME "samd21g18" diff --git a/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk b/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk new file mode 100644 index 0000000000..d7f5c739bb --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk @@ -0,0 +1,3 @@ +LD_FILE = boards/samd21x18-bootloader.ld +USB_VID = 0x239A +USB_PID = 0x8015 diff --git a/atmel-samd/boards/feather_m0_adalogger/pins.c b/atmel-samd/boards/feather_m0_adalogger/pins.c new file mode 100644 index 0000000000..b5521d81b9 --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/pins.c @@ -0,0 +1,155 @@ +#include "pins.h" +#include "asf/sam0/drivers/system/system.h" + +PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0, NO_TIMER, NO_TIMER, NO_SERCOM, \ + NO_SERCOM); +PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2, + TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0), + NO_TIMER, + SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0), + NO_SERCOM); +PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3, + TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1), + NO_TIMER, + SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1), + NO_SERCOM); +PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4, + TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0), + NO_TIMER, + SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0), + NO_SERCOM); +PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5, + TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1), + NO_TIMER, + SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1), + NO_SERCOM); +PIN(PA08, false, NO_ADC_INPUT, + NO_TIMER, + NO_TIMER, + NO_SERCOM, + NO_SERCOM); +PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10, + NO_TIMER, + NO_TIMER, + SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0), + NO_SERCOM); +PIN(PB11, false, NO_ADC_INPUT, + TIMER(TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1), + TIMER(0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5), + SERCOM(SERCOM4, 3, PINMUX_PB11D_SERCOM4_PAD3), + NO_SERCOM); +PIN(PB10, false, NO_ADC_INPUT, + TIMER(TC5, 0, 0, 0, PIN_PB10E_TC5_WO0, MUX_PB10E_TC5_WO0), + TIMER(0, TCC0, 0, 4, PIN_PB10F_TCC0_WO4, MUX_PB10F_TCC0_WO4), + SERCOM(SERCOM4, 2, PINMUX_PB10D_SERCOM4_PAD2), + NO_SERCOM); +PIN(PA12, false, NO_ADC_INPUT, + TIMER(0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0), + TIMER(0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6), + SERCOM(SERCOM2, 0, PINMUX_PA12C_SERCOM2_PAD0), + SERCOM(SERCOM4, 0, PINMUX_PA12D_SERCOM4_PAD0)); +PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19, + TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1), + TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3), + SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3), + SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3)); +PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18, + TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0), + TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2), + SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2), + SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2)); +PIN(PA22, false, NO_ADC_INPUT, + TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0), + TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4), + SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0), + SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0)); +PIN(PA23, false, NO_ADC_INPUT, + TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1), + TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5), + SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1), + SERCOM(SERCOM5, 1, PINMUX_PA23C_SERCOM3_PAD1)); +PIN(PA15, false, NO_ADC_INPUT, + TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1), + TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5), + SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3), + SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3)); +PIN(PA20, false, NO_ADC_INPUT, + TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6), + NO_TIMER, + SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2), + SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2)); +PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7, + TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1), + NO_TIMER, + SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3), + NO_SERCOM); +PIN(PA18, false, NO_ADC_INPUT, + TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0), + TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2), + SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2), + SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2)); +PIN(PA16, false, NO_ADC_INPUT, + TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0), + TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6), + SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0), + SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0)); +PIN(PA19, false, NO_ADC_INPUT, + TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1), + TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3), + SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3), + SERCOM(SERCOM3, 3, PINMUX_PA19C_SERCOM1_PAD3)); +PIN(PA17, false, NO_ADC_INPUT, + TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1), + TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7), + SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1), + SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1)); + +STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA08 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB11), (mp_obj_t)&pin_PB11 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB10), (mp_obj_t)&pin_PB10 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA12), (mp_obj_t)&pin_PA12 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 }, +}; +MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table); + +STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), (mp_obj_t)&pin_PB08 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), (mp_obj_t)&pin_PB09 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), (mp_obj_t)&pin_PA04 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), (mp_obj_t)&pin_PA05 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD), (mp_obj_t)&pin_PA08 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), (mp_obj_t)&pin_PB02 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), (mp_obj_t)&pin_PB11 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), (mp_obj_t)&pin_PB10 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), (mp_obj_t)&pin_PA12 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_0RX), (mp_obj_t)&pin_PA11 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_1TX), (mp_obj_t)&pin_PA10 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), (mp_obj_t)&pin_PA22 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), (mp_obj_t)&pin_PA23 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), (mp_obj_t)&pin_PA15 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), (mp_obj_t)&pin_PA20 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), (mp_obj_t)&pin_PA07 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), (mp_obj_t)&pin_PA18 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), (mp_obj_t)&pin_PA16 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), (mp_obj_t)&pin_PA19 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), (mp_obj_t)&pin_PA17 }, +}; +MP_DEFINE_CONST_DICT(pin_board_pins_locals_dict, pin_board_pins_locals_dict_table); diff --git a/atmel-samd/boards/feather_m0_adalogger/pins.h b/atmel-samd/boards/feather_m0_adalogger/pins.h new file mode 100644 index 0000000000..7e499686fe --- /dev/null +++ b/atmel-samd/boards/feather_m0_adalogger/pins.h @@ -0,0 +1,28 @@ + +#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_ADALOGGER_PINS_H__ +#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_ADALOGGER_PINS_H__ + +#include "modmachine_pin.h" + +extern const pin_obj_t pin_PA02; +extern const pin_obj_t pin_PB08; +extern const pin_obj_t pin_PB09; +extern const pin_obj_t pin_PA04; +extern const pin_obj_t pin_PA05; +extern const pin_obj_t pin_PB02; +extern const pin_obj_t pin_PB11; +extern const pin_obj_t pin_PB10; +extern const pin_obj_t pin_PB21; +extern const pin_obj_t pin_PA11; +extern const pin_obj_t pin_PA10; +extern const pin_obj_t pin_PA22; +extern const pin_obj_t pin_PA23; +extern const pin_obj_t pin_PA15; +extern const pin_obj_t pin_PA20; +extern const pin_obj_t pin_PA07; +extern const pin_obj_t pin_PA18; +extern const pin_obj_t pin_PA16; +extern const pin_obj_t pin_PA19; +extern const pin_obj_t pin_PA17; + +#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BASIC_PINS_H__