[atmel-samd] add adalogger board definitions
This commit is contained in:
Sebastian Plamauer
parent
cb99ae5032
commit
9b1170a65d
115
atmel-samd/boards/feather_m0_adalogger/conf_access.h
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115
atmel-samd/boards/feather_m0_adalogger/conf_access.h
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/**
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* \file
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*
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* \brief Memory access control configuration file.
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*
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* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef _CONF_ACCESS_H_
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#define _CONF_ACCESS_H_
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#include "compiler.h"
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#include "board.h"
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/*! \name Activation of Logical Unit Numbers
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*/
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//! @{
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#define LUN_0 ENABLE //!< On-Chip Virtual Memory.
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#define LUN_1 DISABLE //!< AT45DBX Data Flash.
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#define LUN_2 DISABLE //!< SD/MMC Card over SPI.
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#define LUN_3 DISABLE //!< SD/MMC Card over MCI Slot 0.
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#define LUN_4 DISABLE
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#define LUN_5 DISABLE
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#define LUN_6 DISABLE
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#define LUN_7 DISABLE
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#define LUN_USB DISABLE //!< Host Mass-Storage Memory.
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//! @}
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/*! \name LUN 0 Definitions
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*/
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//! @{
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#define LUN_0_INCLUDE "rom_fs.h"
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#define Lun_0_test_unit_ready rom_fs_test_unit_ready
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#define Lun_0_read_capacity rom_fs_read_capacity
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#define Lun_0_unload NULL /* Can not be unloaded */
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#define Lun_0_wr_protect rom_fs_wr_protect
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#define Lun_0_removal rom_fs_removal
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#define Lun_0_usb_read_10 rom_fs_usb_read_10
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#define Lun_0_usb_write_10 rom_fs_usb_write_10
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#define LUN_0_NAME "\"On-Chip ROM\""
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//! @}
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#define MEM_USB LUN_USB
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/*! \name Actions Associated with Memory Accesses
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*
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* Write here the action to associate with each memory access.
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*
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* \warning Be careful not to waste time in order not to disturb the functions.
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*/
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//! @{
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#define memory_start_read_action(nb_sectors)
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#define memory_stop_read_action()
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#define memory_start_write_action(nb_sectors)
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#define memory_stop_write_action()
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//! @}
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/*! \name Activation of Interface Features
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*/
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//! @{
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#define ACCESS_USB true //!< MEM <-> USB interface.
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#define ACCESS_MEM_TO_RAM false //!< MEM <-> RAM interface.
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#define ACCESS_STREAM false //!< Streaming MEM <-> MEM interface.
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#define ACCESS_STREAM_RECORD false //!< Streaming MEM <-> MEM interface in record mode.
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#define ACCESS_MEM_TO_MEM false //!< MEM <-> MEM interface.
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#define ACCESS_CODEC false //!< Codec interface.
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//! @}
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/*! \name Specific Options for Access Control
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*/
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//! @{
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#define GLOBAL_WR_PROTECT false //!< Management of a global write protection.
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//! @}
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#endif // _CONF_ACCESS_H_
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14
atmel-samd/boards/feather_m0_adalogger/conf_board.h
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atmel-samd/boards/feather_m0_adalogger/conf_board.h
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/**
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* \file
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*
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* \brief User board configuration template
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef CONF_BOARD_H
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#define CONF_BOARD_H
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#endif // CONF_BOARD_H
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150
atmel-samd/boards/feather_m0_adalogger/conf_usb.h
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150
atmel-samd/boards/feather_m0_adalogger/conf_usb.h
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#include <stdbool.h>
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#include <stdint.h>
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#ifndef CONF_USB_H_INCLUDED
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#define CONF_USB_H_INCLUDED
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#define USB_DEVICE_MAJOR_VERSION 1
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#define USB_DEVICE_MINOR_VERSION 0
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#define USB_DEVICE_POWER 100 // Consumption on Vbus line (mA)
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#define USB_DEVICE_ATTR \
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(USB_CONFIG_ATTR_BUS_POWERED)
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// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_SELF_POWERED)
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// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_BUS_POWERED)
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//! USB Device string definitions (Optional)
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#ifndef USB_DEVICE_MANUFACTURE_NAME
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# define USB_DEVICE_MANUFACTURE_NAME "Adafruit Industries"
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#endif
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#ifndef USB_DEVICE_PRODUCT_NAME
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# define USB_DEVICE_PRODUCT_NAME "Feather M0 Adalogger"
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#endif
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#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
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#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 32
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extern char serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
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//! Control endpoint size
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#define USB_DEVICE_EP_CTRL_SIZE 64
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//! Two interfaces for this device (CDC COM + CDC DATA + MSC)
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#define USB_DEVICE_NB_INTERFACE 3
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// (3 | USB_EP_DIR_IN) // CDC Notify endpoint
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// (4 | USB_EP_DIR_IN) // CDC TX
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// (5 | USB_EP_DIR_OUT) // CDC RX
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// (1 | USB_EP_DIR_IN) // MSC IN
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// (2 | USB_EP_DIR_OUT) // MSC OUT
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#define USB_DEVICE_MAX_EP 5
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#define UDI_CDC_PORT_NB 1
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#define UDI_CDC_ENABLE_EXT(port) mp_cdc_enable(port)
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extern bool mp_cdc_enable(uint8_t port);
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#define UDI_CDC_DISABLE_EXT(port) mp_cdc_disable(port)
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extern void mp_cdc_disable(uint8_t port);
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#define UDI_CDC_LOW_RATE
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#define UDI_CDC_DEFAULT_RATE 115200
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#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
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#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
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#define UDI_CDC_DEFAULT_DATABITS 8
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#define UDI_CDC_RX_NOTIFY(port) usb_rx_notify()
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void usb_rx_notify(void);
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#define UDI_CDC_SET_CODING_EXT(port,cfg)
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#define UDI_CDC_SET_DTR_EXT(port,set)
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#define UDI_CDC_SET_RTS_EXT(port,set)
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/**
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* USB CDC low level configuration
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* In standalone these configurations are defined by the CDC module.
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* For composite device, these configuration must be defined here
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* @{
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*/
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//! Endpoint numbers definition
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#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
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#define UDI_CDC_DATA_EP_IN_0 (4 | USB_EP_DIR_IN) // TX
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#define UDI_CDC_DATA_EP_OUT_0 (5 | USB_EP_DIR_OUT) // RX
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//! Interface numbers
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#define UDI_CDC_COMM_IFACE_NUMBER_0 0
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#define UDI_CDC_DATA_IFACE_NUMBER_0 1
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/**
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* Configuration of MSC interface
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* @{
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*/
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//! Vendor name and Product version of MSC interface
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#define UDI_MSC_GLOBAL_VENDOR_ID \
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'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
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#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
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'1', '.', '0', '0'
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//! Interface callback definition
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#define UDI_MSC_ENABLE_EXT() mp_msc_enable()
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extern bool mp_msc_enable();
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#define UDI_MSC_DISABLE_EXT() mp_msc_disable()
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extern void mp_msc_disable();
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//! Enable id string of interface to add an extra USB string
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#define UDI_MSC_STRING_ID 5
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/**
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* USB MSC low level configuration
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* In standalone these configurations are defined by the MSC module.
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* For composite device, these configuration must be defined here
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* @{
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*/
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//! Endpoint numbers definition
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#define UDI_MSC_EP_IN (1 | USB_EP_DIR_IN)
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#define UDI_MSC_EP_OUT (2 | USB_EP_DIR_OUT)
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//! Interface number
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#define UDI_MSC_IFACE_NUMBER 2
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/**
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* Description of Composite Device
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* @{
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*/
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//! USB Interfaces descriptor structure
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#define UDI_COMPOSITE_DESC_T \
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usb_iad_desc_t udi_cdc_iad; \
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udi_cdc_comm_desc_t udi_cdc_comm; \
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udi_cdc_data_desc_t udi_cdc_data; \
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udi_msc_desc_t udi_msc
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//! USB Interfaces descriptor value for Full Speed
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#define UDI_COMPOSITE_DESC_FS \
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.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
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.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
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.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
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.udi_msc = UDI_MSC_DESC_FS
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//! USB Interfaces descriptor value for High Speed
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#define UDI_COMPOSITE_DESC_HS \
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.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
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.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
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.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
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.udi_msc = UDI_MSC_DESC_HS
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//! USB Interface APIs
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#define UDI_COMPOSITE_API \
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&udi_api_cdc_comm, \
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&udi_api_cdc_data, \
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&udi_api_msc
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//@}
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/**
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* USB Device Driver Configuration
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* @{
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*/
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//@}
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//! The includes of classes and other headers must be done at the end of this file to avoid compile error
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#include "udi_cdc.h"
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#include "udi_msc.h"
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#endif
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20
atmel-samd/boards/feather_m0_adalogger/init.c
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atmel-samd/boards/feather_m0_adalogger/init.c
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/**
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* \file
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*
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* \brief User board initialization template
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#include "board.h"
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#include "conf_board.h"
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void board_init(void)
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{
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/* This function is meant to contain board-specific initialization code
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* for, e.g., the I/O pins. The initialization can rely on application-
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* specific board configuration, found in conf_board.h.
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*/
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}
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7
atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h
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7
atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h
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// LEDs
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#define MICROPY_HW_LED1 PIN_PA17 // red
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// #define UART_REPL
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#define USB_REPL
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#define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Adalogger"
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#define MICROPY_HW_MCU_NAME "samd21g18"
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3
atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk
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3
atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk
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@ -0,0 +1,3 @@
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LD_FILE = boards/samd21x18-bootloader.ld
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USB_VID = 0x239A
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USB_PID = 0x8015
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155
atmel-samd/boards/feather_m0_adalogger/pins.c
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155
atmel-samd/boards/feather_m0_adalogger/pins.c
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#include "pins.h"
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#include "asf/sam0/drivers/system/system.h"
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PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0, NO_TIMER, NO_TIMER, NO_SERCOM, \
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NO_SERCOM);
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PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2,
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TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0),
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NO_TIMER,
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SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0),
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NO_SERCOM);
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PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3,
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TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1),
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NO_TIMER,
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SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1),
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NO_SERCOM);
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PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4,
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TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0),
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NO_TIMER,
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SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0),
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NO_SERCOM);
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PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5,
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TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1),
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NO_TIMER,
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SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1),
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NO_SERCOM);
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PIN(PA08, false, NO_ADC_INPUT,
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NO_TIMER,
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NO_TIMER,
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NO_SERCOM,
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NO_SERCOM);
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PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10,
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NO_TIMER,
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NO_TIMER,
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SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0),
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NO_SERCOM);
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PIN(PB11, false, NO_ADC_INPUT,
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TIMER(TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1),
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TIMER(0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5),
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SERCOM(SERCOM4, 3, PINMUX_PB11D_SERCOM4_PAD3),
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NO_SERCOM);
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PIN(PB10, false, NO_ADC_INPUT,
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TIMER(TC5, 0, 0, 0, PIN_PB10E_TC5_WO0, MUX_PB10E_TC5_WO0),
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TIMER(0, TCC0, 0, 4, PIN_PB10F_TCC0_WO4, MUX_PB10F_TCC0_WO4),
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SERCOM(SERCOM4, 2, PINMUX_PB10D_SERCOM4_PAD2),
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NO_SERCOM);
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PIN(PA12, false, NO_ADC_INPUT,
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TIMER(0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0),
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TIMER(0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6),
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SERCOM(SERCOM2, 0, PINMUX_PA12C_SERCOM2_PAD0),
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SERCOM(SERCOM4, 0, PINMUX_PA12D_SERCOM4_PAD0));
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PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19,
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TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1),
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TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3),
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SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3),
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SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3));
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PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18,
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TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0),
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TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2),
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SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2),
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SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2));
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PIN(PA22, false, NO_ADC_INPUT,
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TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0),
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TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4),
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SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0),
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SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0));
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PIN(PA23, false, NO_ADC_INPUT,
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TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
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TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PA23C_SERCOM3_PAD1));
|
||||
PIN(PA15, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3));
|
||||
PIN(PA20, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2));
|
||||
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PA18, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2),
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2));
|
||||
PIN(PA16, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6),
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0));
|
||||
PIN(PA19, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3),
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA19C_SERCOM1_PAD3));
|
||||
PIN(PA17, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7),
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1));
|
||||
|
||||
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB11), (mp_obj_t)&pin_PB11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB10), (mp_obj_t)&pin_PB10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA12), (mp_obj_t)&pin_PA12 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);
|
||||
|
||||
STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A1), (mp_obj_t)&pin_PB08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A2), (mp_obj_t)&pin_PB09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A3), (mp_obj_t)&pin_PA04 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A4), (mp_obj_t)&pin_PA05 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD), (mp_obj_t)&pin_PA08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A5), (mp_obj_t)&pin_PB02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCK), (mp_obj_t)&pin_PB11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), (mp_obj_t)&pin_PB10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MISO), (mp_obj_t)&pin_PA12 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_0RX), (mp_obj_t)&pin_PA11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_1TX), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), (mp_obj_t)&pin_PA22 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), (mp_obj_t)&pin_PA23 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), (mp_obj_t)&pin_PA15 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D6), (mp_obj_t)&pin_PA20 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), (mp_obj_t)&pin_PA07 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D10), (mp_obj_t)&pin_PA18 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D11), (mp_obj_t)&pin_PA16 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D12), (mp_obj_t)&pin_PA19 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D13), (mp_obj_t)&pin_PA17 },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_board_pins_locals_dict, pin_board_pins_locals_dict_table);
|
||||
28
atmel-samd/boards/feather_m0_adalogger/pins.h
Normal file
28
atmel-samd/boards/feather_m0_adalogger/pins.h
Normal file
@ -0,0 +1,28 @@
|
||||
|
||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_ADALOGGER_PINS_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_ADALOGGER_PINS_H__
|
||||
|
||||
#include "modmachine_pin.h"
|
||||
|
||||
extern const pin_obj_t pin_PA02;
|
||||
extern const pin_obj_t pin_PB08;
|
||||
extern const pin_obj_t pin_PB09;
|
||||
extern const pin_obj_t pin_PA04;
|
||||
extern const pin_obj_t pin_PA05;
|
||||
extern const pin_obj_t pin_PB02;
|
||||
extern const pin_obj_t pin_PB11;
|
||||
extern const pin_obj_t pin_PB10;
|
||||
extern const pin_obj_t pin_PB21;
|
||||
extern const pin_obj_t pin_PA11;
|
||||
extern const pin_obj_t pin_PA10;
|
||||
extern const pin_obj_t pin_PA22;
|
||||
extern const pin_obj_t pin_PA23;
|
||||
extern const pin_obj_t pin_PA15;
|
||||
extern const pin_obj_t pin_PA20;
|
||||
extern const pin_obj_t pin_PA07;
|
||||
extern const pin_obj_t pin_PA18;
|
||||
extern const pin_obj_t pin_PA16;
|
||||
extern const pin_obj_t pin_PA19;
|
||||
extern const pin_obj_t pin_PA17;
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BASIC_PINS_H__
|
||||
Loading…
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Reference in New Issue
Block a user