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renesas-ra: Support changing baudrate for UART.

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* Use R_SCI_UART_BaudCalculate() of fsp/src/r_sci_uart/r_sci_uart.c
* Support UART.init(baudrate)

Signed-off-by: Takeo Takahashi <takeo.takahashi.xv@renesas.com>
This commit is contained in:
Takeo Takahashi 2023-06-01 17:56:28 +09:00 committed by Damien George
parent 713a45124b
commit 92c7532d8e
3 changed files with 50 additions and 16 deletions
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4
ports/renesas-ra/Makefile
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@ -359,8 +359,12 @@ HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/bsp/mcu/all/,\
HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/,\ HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/,\
r_ioport/r_ioport.c \ r_ioport/r_ioport.c \
r_sci_uart/r_sci_uart.c \
) )
CFLAGS_FSP = -Wno-unused-variable -Wno-unused-function
$(BUILD)/lib/fsp/ra/fsp/src/r_sci_uart/r_sci_uart.o: CFLAGS += $(CFLAGS_FSP)
ifeq ($(USE_FSP_LPM), 1) ifeq ($(USE_FSP_LPM), 1)
CFLAGS += -DUSE_FSP_LPM CFLAGS += -DUSE_FSP_LPM
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_lpm/r_lpm.c HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_lpm/r_lpm.c

25
ports/renesas-ra/fsp_cfg/r_sci_uart_cfg.h Normal file
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@ -0,0 +1,25 @@
#ifndef R_SCI_UART_CFG_H_
#define R_SCI_UART_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define SCI_UART_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define SCI_UART_CFG_FIFO_SUPPORT (0)
#define SCI_UART_CFG_DTC_SUPPORTED (0)
#define SCI_UART_CFG_FLOW_CONTROL_SUPPORT (0)
#define SCI_UART_CFG_RS485_SUPPORT (0)
/*
* Disable r_sci_uart.c's interrupt handlers by defining followings
* because the renesas-ra has own interrupt handlers for SCI and
* symbol conflict happens.
*/
#define SCI_UART_CFG_TX_ENABLE (0)
#define SCI_UART_CFG_RX_ENABLE (0)
#ifdef __cplusplus
}
#endif
#endif /* R_SCI_UART_CFG_H_ */

37
ports/renesas-ra/ra/ra_sci.c
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@ -28,6 +28,7 @@
#include "ra_int.h" #include "ra_int.h"
#include "ra_utils.h" #include "ra_utils.h"
#include "ra_sci.h" #include "ra_sci.h"
#include "r_sci_uart.h"
#if !defined(RA_PRI_UART) #if !defined(RA_PRI_UART)
#define RA_PRI_UART (1) #define RA_PRI_UART (1)
@ -1100,20 +1101,24 @@ static void ra_sci_fifo_init(uint32_t ch) {
void ra_sci_set_baud(uint32_t ch, uint32_t baud) { void ra_sci_set_baud(uint32_t ch, uint32_t baud) {
uint32_t idx = ch_to_idx[ch]; uint32_t idx = ch_to_idx[ch];
R_SCI0_Type *sci_reg = sci_regs[idx]; R_SCI0_Type *sci_reg = sci_regs[idx];
// Only works for 115200 bps baud_setting_t baud_setting;
// ToDo: support other bps
if (baud == 0) { // baudrate_modulation=1(enabled), baudrate_max_err=5%(general value for FSP example).
/* ABCS=1 */ if (R_SCI_UART_BaudCalculate(baud, 1, 5000, &baud_setting) == FSP_SUCCESS) {
sci_reg->SMR_b.CKS = 0; /* PCLKA */ // Disable transmitter and receiver.
sci_reg->BRR = (uint8_t)((int)PCLK / SCI_DEF_BAUD / 16 - 1); uint8_t scr = sci_reg->SCR;
} else if (baud > 19200) { sci_reg->SCR = scr & ~(0xF0);
/* ABCS=1 */
sci_reg->SMR_b.CKS = 0; /* PCLKA */ // Change baudrate
sci_reg->BRR = (uint8_t)((int)PCLK / baud / 16 - 1); sci_reg->BRR = baud_setting.brr;
} else { // Update CKS(b1:b0)
/* ABCS=1 */ sci_reg->SMR_b.CKS = (uint8_t)(0x03U & baud_setting.cks);
sci_reg->SMR_b.CKS = 2; /* PCLKA/16 */ sci_reg->MDDR = baud_setting.mddr;
sci_reg->BRR = (uint8_t)((int)PCLK / baud / 256 - 1); // Update BGDM(b6)/ABCS(b4)/ABCSE(b3)/BRME(b2) bits
sci_reg->SEMR = (uint8_t)((sci_reg->SEMR & ~(0x5cU)) | (baud_setting.semr_baudrate_bits & 0x5cU));
// Restore SCR
sci_reg->SCR = scr;
} }
} }
@ -1131,8 +1136,8 @@ void ra_sci_init_with_flow(uint32_t ch, uint32_t tx_pin, uint32_t rx_pin, uint32
sci_cb[idx] = 0; sci_cb[idx] = 0;
ra_sci_init_flag[idx]++; ra_sci_init_flag[idx]++;
} else { } else {
ra_sci_init_flag[idx]++; ra_sci_irq_disable(ch);
return; ra_sci_module_stop(ch);
} }
ra_sci_module_start(ch); ra_sci_module_start(ch);
ra_sci_tx_set_pin(tx_pin); ra_sci_tx_set_pin(tx_pin);