Merge pull request #6181 from tannewt/c3_serial_jtag

Add USB to Serial/JTAG support for REPL
This commit is contained in:
Scott Shawcroft 2022-03-23 14:20:23 -07:00 committed by GitHub
commit 8ebab7625e
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
27 changed files with 950 additions and 190 deletions

View File

@ -262,6 +262,11 @@ SRC_C += \
endif
endif
ifeq ($(IDF_TARGET),esp32c3)
SRC_C += \
supervisor/usb_serial_jtag.c
endif
$(BUILD)/i2s_lcd_esp32s2_driver.o: CFLAGS += -Wno-sign-compare
ifneq ($(CIRCUITPY_USB),0)

View File

@ -0,0 +1,49 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
* Copyright (c) 2021 skieast/Bruce Segal
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "shared-bindings/microcontroller/Pin.h"
#include "supervisor/board.h"
#include "components/driver/include/driver/gpio.h"
#include "soc/usb_serial_jtag_struct.h"
void board_init(void) {
}
bool board_requests_safe_mode(void) {
return false;
}
bool espressif_board_reset_pin_number(gpio_num_t pin_number) {
return false;
}
void reset_board(void) {
}
void board_deinit(void) {
}

View File

@ -0,0 +1,50 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
* Copyright (c) 2021 skieast/Bruce Segal
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
// Board setup
#define MICROPY_HW_BOARD_NAME "Adafruit QT Py ESP32C3"
#define MICROPY_HW_MCU_NAME "ESP32-C3FN4"
// Status LED
#define MICROPY_HW_NEOPIXEL (&pin_GPIO2)
#define CIRCUITPY_BOARD_I2C (1)
#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO6, .sda = &pin_GPIO5}}
#define CIRCUITPY_BOARD_SPI (1)
#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO10, .mosi = &pin_GPIO7, .miso = &pin_GPIO8}}
#define CIRCUITPY_BOARD_UART (1)
#define CIRCUITPY_BOARD_UART_PIN {{.tx = &pin_GPIO21, .rx = &pin_GPIO20}}
// For entering safe mode
#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO9)
// Explanation of how a user got into safe mode
#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
#define CIRCUITPY_ESP_USB_SERIAL_JTAG (1)

View File

@ -0,0 +1,10 @@
CIRCUITPY_CREATOR_ID = 0x0000239A
CIRCUITPY_CREATION_ID = 0x00010001
IDF_TARGET = esp32c3
INTERNAL_FLASH_FILESYSTEM = 1
CIRCUITPY_ESP_FLASH_MODE=dio
CIRCUITPY_ESP_FLASH_FREQ=80m
CIRCUITPY_ESP_FLASH_SIZE=4MB

View File

@ -0,0 +1,85 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
* Copyright (c) 2021 skieast/Bruce Segal
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "shared-bindings/board/__init__.h"
#include "shared-bindings/board/__init__.h"
CIRCUITPY_BOARD_BUS_SINGLETON(stemma_i2c, i2c, 1)
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO9) },
{ MP_ROM_QSTR(MP_QSTR_BOOT0), MP_ROM_PTR(&pin_GPIO9) },
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO9) },
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO3) },
{ MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO3) },
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO1) },
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO1) },
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO6) },
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) },
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO6) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO21) },
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO21) },
{ MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO21) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO20) },
{ MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO20) },
{ MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO20) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO10) },
{ MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO10) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO8) },
{ MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO8) },
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO2) },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

View File

@ -0,0 +1,62 @@
# Automatically generated file. DO NOT EDIT.
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
# Bootloader config
#
CONFIG_BOOTLOADER_LOG_LEVEL_NONE=y
# CONFIG_BOOTLOADER_LOG_LEVEL_INFO is not set
CONFIG_BOOTLOADER_LOG_LEVEL=0
# end of Bootloader config
#
# Serial flasher config
#
# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
# end of Serial flasher config
#
# Partition Table
#
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-4MB-no-uf2.csv"
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-4MB-no-uf2.csv"
# end of Partition Table
#
# Compiler options
#
# CONFIG_COMPILER_SAVE_RESTORE_LIBCALLS is not set
# end of Compiler options
#
# Component config
#
#
# ESP System Settings
#
# CONFIG_ESP_SYSTEM_USE_EH_FRAME is not set
CONFIG_ESP_CONSOLE_SECONDARY_NONE=y
# CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG is not set
# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
# end of ESP System Settings
#
# LWIP
#
CONFIG_LWIP_LOCAL_HOSTNAME="Adafruit-QTPy-ESP32C3"
# end of LWIP
#
# SPI Flash driver
#
# CONFIG_SPI_FLASH_AUTO_SUSPEND is not set
# end of SPI Flash driver
# end of Component config
#
# Deprecated options for backward compatibility
#
# CONFIG_LOG_BOOTLOADER_LEVEL_INFO is not set
CONFIG_LOG_BOOTLOADER_LEVEL=0
# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set
# end of Deprecated options for backward compatibility

View File

@ -1,3 +1,9 @@
#
# Component config
#
#
# ESP32S3-Specific
#
CONFIG_ESP32S3_SPIRAM_SUPPORT=y
#
# SPI RAM config
@ -9,12 +15,10 @@ CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
CONFIG_SPIRAM_SIZE=2097152
# end of SPI RAM config
CONFIG_DEFAULT_PSRAM_CLK_IO=30
#
# PSRAM Clock and CS IO for ESP32S3
#
CONFIG_DEFAULT_PSRAM_CLK_IO=30
CONFIG_DEFAULT_PSRAM_CS_IO=26
# end of PSRAM Clock and CS IO for ESP32S3
@ -30,8 +34,14 @@ CONFIG_SPIRAM_USE_MEMMAP=y
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
# CONFIG_SPIRAM_USE_MALLOC is not set
CONFIG_SPIRAM_MEMTEST=y
# end of SPI RAM config
# end of ESP32S3-Specific
#
# LWIP
#
CONFIG_LWIP_LOCAL_HOSTNAME="espressif-esp32s3"
# end of LWIP
# end of Component config

View File

@ -78,6 +78,11 @@ STATIC void _reset_pin(gpio_num_t pin_number) {
if (11 <= pin_number && pin_number <= 17) {
return;
}
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
if (pin_number == 18 || pin_number == 19) {
return;
}
#endif
#endif
// Give the board a chance to reset the pin in a particular way.

View File

@ -10,9 +10,9 @@ CONFIG_ESPTOOLPY_FLASHSIZE="8MB"
CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
# end of Serial flasher config
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB.csv"
#
# Partition Table
#
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB.csv"
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB.csv"
# end of Partition Table

View File

@ -1,24 +1,24 @@
#
# Component config
#
#
# Bluetooth
#
CONFIG_BT_ENABLED=y
# end of Bluetooth
CONFIG_BT_CTRL_MODE_EFF=1
#
# Bluetooth controller
#
CONFIG_BT_CTRL_MODE_EFF=1
CONFIG_BT_CTRL_BLE_MAX_ACT=10
CONFIG_BT_CTRL_BLE_MAX_ACT_EFF=10
CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB=0
CONFIG_BT_CTRL_PINNED_TO_CORE_0=y
# CONFIG_BT_CTRL_PINNED_TO_CORE_1 is not set
CONFIG_BT_CTRL_PINNED_TO_CORE=0
CONFIG_BT_CTRL_HCI_MODE_VHCI=y
# CONFIG_BT_CTRL_HCI_MODE_UART_H4 is not set
CONFIG_BT_CTRL_HCI_TL=1
CONFIG_BT_CTRL_ADV_DUP_FILT_MAX=30
# CONFIG_BT_CTRL_HW_CCA is not set
CONFIG_BT_CTRL_HW_CCA_VAL=20
CONFIG_BT_CTRL_HW_CCA_EFF=0
CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG=y
# CONFIG_BT_CTRL_CE_LENGTH_TYPE_CE is not set
@ -54,12 +54,12 @@ CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD=20
# CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EN is not set
CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS=y
CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF=0
# end of Bluetooth controller
#
# MODEM SLEEP Options
#
# CONFIG_BT_CTRL_MODEM_SLEEP is not set
#
# Bluetooth controller
#
# end of MODEM SLEEP Options
CONFIG_BT_CTRL_SLEEP_MODE_EFF=0
CONFIG_BT_CTRL_SLEEP_CLOCK_EFF=0
CONFIG_BT_CTRL_HCI_TL_EFF=1
@ -67,17 +67,12 @@ CONFIG_BT_CTRL_HCI_TL_EFF=1
# end of Bluetooth controller
# CONFIG_BT_BLUEDROID_ENABLED is not set
#
# Bluetooth
#
CONFIG_BT_NIMBLE_ENABLED=y
# CONFIG_BT_CONTROLLER_ONLY is not set
# end of Bluetooth
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y
#
# NimBLE Options
#
CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y
# CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set
# CONFIG_BT_NIMBLE_LOG_LEVEL_NONE is not set
# CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR is not set
@ -89,9 +84,6 @@ CONFIG_BT_NIMBLE_MAX_CONNECTIONS=3
CONFIG_BT_NIMBLE_MAX_BONDS=3
CONFIG_BT_NIMBLE_MAX_CCCDS=8
CONFIG_BT_NIMBLE_L2CAP_COC_MAX_NUM=0
# CONFIG_BT_NIMBLE_PINNED_TO_CORE_0 is not set
CONFIG_BT_NIMBLE_PINNED_TO_CORE_1=y
CONFIG_BT_NIMBLE_PINNED_TO_CORE=1
CONFIG_BT_NIMBLE_TASK_STACK_SIZE=4096
CONFIG_BT_NIMBLE_ROLE_CENTRAL=y
CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y
@ -129,10 +121,14 @@ CONFIG_BT_NIMBLE_MAX_PERIODIC_SYNCS=1
CONFIG_BT_NIMBLE_USE_ESP_TIMER=y
# end of NimBLE Options
# CONFIG_BLUEDROID_ENABLED is not set
# end of Bluetooth
# end of Component config
#
# Deprecated options for backward compatibility
#
# CONFIG_BLUEDROID_ENABLED is not set
CONFIG_NIMBLE_ENABLED=y
CONFIG_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y
# CONFIG_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set
@ -140,9 +136,6 @@ CONFIG_NIMBLE_MAX_CONNECTIONS=3
CONFIG_NIMBLE_MAX_BONDS=3
CONFIG_NIMBLE_MAX_CCCDS=8
CONFIG_NIMBLE_L2CAP_COC_MAX_NUM=0
CONFIG_NIMBLE_PINNED_TO_CORE_0=y
# CONFIG_NIMBLE_PINNED_TO_CORE_1 is not set
CONFIG_NIMBLE_PINNED_TO_CORE=0
CONFIG_NIMBLE_TASK_STACK_SIZE=4096
CONFIG_NIMBLE_ROLE_CENTRAL=y
CONFIG_NIMBLE_ROLE_PERIPHERAL=y

View File

@ -1,23 +1,38 @@
#
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
CONFIG_IDF_TARGET_ARCH_RISCV=y
CONFIG_IDF_TARGET="esp32c3"
CONFIG_IDF_TARGET_ESP32C3=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0005
# end of Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
# SDK tool configuration
#
CONFIG_SDK_TOOLPREFIX="riscv32-esp-elf-"
# end of SDK tool configuration
#
# Bootloader config
#
CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x0
# end of Bootloader config
# CONFIG_ESP32C3_DEFAULT_CPU_FREQ_80 is not set
#
# Component config
#
#
# Bluetooth
#
CONFIG_BT_SOC_SUPPORT_5_0=y
#
# NimBLE Options
#
CONFIG_BT_NIMBLE_PINNED_TO_CORE=0
# end of NimBLE Options
# end of Bluetooth
#
# ESP32C3-Specific
#
# CONFIG_ESP32C3_DEFAULT_CPU_FREQ_80 is not set
CONFIG_ESP32C3_DEFAULT_CPU_FREQ_160=y
CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ=160
# CONFIG_ESP32C3_REV_MIN_0 is not set
@ -26,7 +41,6 @@ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ=160
CONFIG_ESP32C3_REV_MIN_3=y
CONFIG_ESP32C3_REV_MIN=3
CONFIG_ESP32C3_DEBUG_OCDAWARE=y
# CONFIG_ESP32C3_DEBUG_STUBS_ENABLE is not set
CONFIG_ESP32C3_BROWNOUT_DET=y
CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7=y
# CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_6 is not set
@ -44,24 +58,31 @@ CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
# CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
# CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
# CONFIG_ESP32C3_NO_BLOBS is not set
# end of ESP32C3-Specific
# CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO is not set
#
# Hardware Settings
#
#
# MAC Config
#
# CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO is not set
CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR=y
CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=4
# end of MAC Config
CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y
#
# Sleep Config
#
CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y
CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
# end of Sleep Config
# end of Hardware Settings
#
# ESP System Settings
#
CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y
#
# Memory protection
@ -76,10 +97,13 @@ CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE=512
CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set
CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
# end of ESP System Settings
#
# Wi-Fi
#
CONFIG_ESP32_WIFI_ENABLED=y
CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y
CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4
CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8
# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
@ -97,37 +121,35 @@ CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
CONFIG_ESP32_WIFI_IRAM_OPT=y
CONFIG_ESP32_WIFI_RX_IRAM_OPT=y
# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
# CONFIG_ESP_WIFI_EXTERNAL_COEXIST_ENABLE is not set
# end of Wi-Fi
CONFIG_FREERTOS_UNICORE=y
#
# FreeRTOS
#
CONFIG_FREERTOS_UNICORE=y
CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y
# end of FreeRTOS
CONFIG_TOOLPREFIX="riscv32-esp-elf-"
# end of Component config
#
# Deprecated options for backward compatibility
#
CONFIG_TOOLPREFIX="riscv32-esp-elf-"
# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
CONFIG_ESP32_APPTRACE_DEST_NONE=y
CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
CONFIG_NIMBLE_PINNED_TO_CORE=0
CONFIG_ESP_SYSTEM_PD_FLASH=y
CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND=y
CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP32_PHY_MAX_TX_POWER=20
# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set
# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set
CONFIG_ESP32S2_PANIC_SILENT_REBOOT=y
# CONFIG_ESP32S2_PANIC_GDBSTUB is not set
CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
CONFIG_ESP32H2_MEMPROT_FEATURE=y
CONFIG_ESP32H2_MEMPROT_FEATURE_LOCK=y
# CONFIG_EXTERNAL_COEX_ENABLE is not set
# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y

View File

@ -1,38 +1,47 @@
#
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
CONFIG_IDF_TARGET_ARCH_XTENSA=y
CONFIG_IDF_TARGET="esp32s3"
CONFIG_IDF_TARGET_ESP32S3=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0009
# end of Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
# LWIP sdkconfig.defaults override
# SDK tool configuration
#
CONFIG_LWIP_MAX_SOCKETS=8
# end of LWIP sdkconfig.defaults override
CONFIG_SDK_TOOLPREFIX="xtensa-esp32s3-elf-"
# end of SDK tool configuration
#
# Bootloader config
#
CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x0
# end of Bootloader config
#
# Component config
#
#
# Bluetooth
#
CONFIG_BT_SOC_SUPPORT_5_0=y
#
# NimBLE Options
#
# CONFIG_BT_NIMBLE_PINNED_TO_CORE_0 is not set
CONFIG_BT_NIMBLE_PINNED_TO_CORE_1=y
CONFIG_BT_NIMBLE_PINNED_TO_CORE=1
# end of NimBLE Options
# end of Bluetooth
#
# ESP32S3-Specific
#
# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80 is not set
# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160 is not set
CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240=y
CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ=240
# end of ESP32S3-Specific
CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB=y
#
# Cache config
#
CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB=y
# CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB is not set
CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE=0x4000
# CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS is not set
@ -60,7 +69,6 @@ CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE=32
CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM=0x0
# CONFIG_ESP32S3_ULP_COPROC_ENABLED is not set
CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM=0
# CONFIG_ESP32S3_DEBUG_STUBS_ENABLE is not set
CONFIG_ESP32S3_BROWNOUT_DET=y
CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7=y
# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6 is not set
@ -80,9 +88,13 @@ CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y
# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY=2000
# CONFIG_ESP32S3_NO_BLOBS is not set
# CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
# CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
# end of ESP32S3-Specific
#
# Hardware Settings
#
#
# MAC Config
#
@ -91,17 +103,34 @@ CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR=y
CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES=4
# end of MAC Config
#
# Sleep Config
#
CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
# end of Sleep Config
# end of Hardware Settings
#
# PHY
#
CONFIG_ESP_PHY_ENABLE_USB=y
# end of PHY
#
# ESP System Settings
#
# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 is not set
CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1=y
# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set
CONFIG_ESP_MAIN_TASK_AFFINITY=0x1
# end of ESP System Settings
#
# Wi-Fi
#
CONFIG_ESP32_WIFI_ENABLED=y
CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y
CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4
CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8
# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
@ -125,7 +154,14 @@ CONFIG_ESP32_WIFI_RX_IRAM_OPT=y
# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
# end of Wi-Fi
#
# FreeRTOS
#
# CONFIG_FREERTOS_UNICORE is not set
# end of FreeRTOS
# end of Component config
#
# Deprecated options for backward compatibility
#
@ -133,12 +169,16 @@ CONFIG_TOOLPREFIX="xtensa-esp32s3-elf-"
# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
CONFIG_ESP32_APPTRACE_DEST_NONE=y
CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
# CONFIG_NIMBLE_PINNED_TO_CORE_0 is not set
CONFIG_NIMBLE_PINNED_TO_CORE_1=y
CONFIG_NIMBLE_PINNED_TO_CORE=1
CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND=y
CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP32_PHY_MAX_TX_POWER=20
CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y

View File

@ -7,10 +7,10 @@ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
# end of Bootloader config
# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set
#
# Compiler options
#
# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
# CONFIG_COMPILER_OPTIMIZATION_PERF is not set
# CONFIG_COMPILER_OPTIMIZATION_NONE is not set
@ -21,22 +21,28 @@ CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=1
# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set
# end of Compiler options
#
# Component config
#
#
# ESP32S3-Specific
#
CONFIG_ESP32S3_DEBUG_OCDAWARE=y
# end of ESP32S3-Specific
#
# Common ESP-related
#
# CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set
# end of Common ESP-related
# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
#
# ESP System Settings
#
# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set
CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=y
# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
# end of ESP System Settings
# CONFIG_ESP_CONSOLE_UART_DEFAULT is not set
# CONFIG_ESP_CONSOLE_USB_CDC is not set
# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set
@ -46,6 +52,8 @@ CONFIG_ESP_CONSOLE_NONE=y
CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG=y
CONFIG_ESP_CONSOLE_MULTIPLE_UART=y
CONFIG_ESP_CONSOLE_UART_NUM=-1
# end of ESP System Settings
#
# FreeRTOS
#
@ -56,16 +64,23 @@ CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
CONFIG_FREERTOS_DEBUG_OCDAWARE=y
# end of FreeRTOS
CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y
#
# Hardware Abstraction Layer (HAL) and Low Level (LL)
#
CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y
# CONFIG_HAL_ASSERTION_DISABLE is not set
# CONFIG_HAL_ASSERTION_SILIENT is not set
CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=1
# end of Hardware Abstraction Layer (HAL) and Low Level (LL)
#
# LWIP
#
CONFIG_LWIP_ESP_LWIP_ASSERT=y
# end of LWIP
# end of Component config
#
# Deprecated options for backward compatibility
#

View File

@ -1,10 +1,10 @@
#
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
CONFIG_IDF_CMAKE=y
# end of Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
# SDK tool configuration
#
# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set
# end of SDK tool configuration
#
# Build type
#
@ -15,20 +15,20 @@ CONFIG_APP_BUILD_BOOTLOADER=y
CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
# end of Build type
CONFIG_APP_COMPILE_TIME_DATE=y
#
# Application manager
#
CONFIG_APP_COMPILE_TIME_DATE=y
# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set
# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set
# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set
CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
# end of Application manager
# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
#
# Bootloader config
#
# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y
@ -51,29 +51,29 @@ CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
# end of Bootloader config
CONFIG_SECURE_BOOT_SUPPORTS_RSA=y
#
# Security features
#
CONFIG_SECURE_BOOT_SUPPORTS_RSA=y
CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE=y
# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set
# CONFIG_SECURE_BOOT is not set
# CONFIG_SECURE_FLASH_ENC_ENABLED is not set
# end of Security features
CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y
#
# Boot ROM Behavior
#
CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y
# CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set
# CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set
# CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set
# end of Boot ROM Behavior
CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
#
# Serial flasher config
#
CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
# CONFIG_ESPTOOLPY_NO_STUB is not set
# CONFIG_ESPTOOLPY_OCT_FLASH is not set
# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
@ -105,10 +105,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200
CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
# end of Serial flasher config
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
#
# Partition Table
#
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
# CONFIG_PARTITION_TABLE_TWO_OTA is not set
CONFIG_PARTITION_TABLE_CUSTOM=y
@ -116,10 +116,10 @@ CONFIG_PARTITION_TABLE_OFFSET=0x8000
CONFIG_PARTITION_TABLE_MD5=y
# end of Partition Table
CONFIG_COMPILER_HIDE_PATHS_MACROS=y
#
# Compiler options
#
CONFIG_COMPILER_HIDE_PATHS_MACROS=y
# CONFIG_COMPILER_CXX_EXCEPTIONS is not set
# CONFIG_COMPILER_CXX_RTTI is not set
CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
@ -131,22 +131,34 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
# CONFIG_COMPILER_DUMP_RTL_FILES is not set
# end of Compiler options
# CONFIG_APPTRACE_DEST_JTAG is not set
#
# Component config
#
#
# Application Level Tracing
#
# CONFIG_APPTRACE_DEST_JTAG is not set
CONFIG_APPTRACE_DEST_NONE=y
CONFIG_APPTRACE_LOCK_ENABLE=y
# end of Application Level Tracing
# CONFIG_ADC_FORCE_XPD_FSM is not set
# CONFIG_BLE_MESH is not set
#
# Driver configurations
#
#
# ADC configuration
#
# CONFIG_ADC_FORCE_XPD_FSM is not set
CONFIG_ADC_DISABLE_DAC=y
# end of ADC configuration
#
# MCPWM configuration
#
# CONFIG_MCPWM_ISR_IN_IRAM is not set
# end of MCPWM configuration
#
# SPI configuration
#
@ -156,32 +168,39 @@ CONFIG_SPI_MASTER_ISR_IN_IRAM=y
CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
# end of SPI configuration
#
# TWAI configuration
#
# CONFIG_TWAI_ISR_IN_IRAM is not set
# end of TWAI configuration
#
# UART configuration
#
# CONFIG_UART_ISR_IN_IRAM is not set
# end of UART configuration
# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
#
# GDMA Configuration
#
# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
# CONFIG_GDMA_ISR_IRAM_SAFE is not set
# end of GDMA Configuration
# CONFIG_EFUSE_CUSTOM_TABLE is not set
# end of Driver configurations
#
# eFuse Bit Manager
#
# CONFIG_EFUSE_CUSTOM_TABLE is not set
# CONFIG_EFUSE_VIRTUAL is not set
CONFIG_EFUSE_MAX_BLK_LEN=256
# end of eFuse Bit Manager
CONFIG_ESP_TLS_USING_MBEDTLS=y
#
# ESP-TLS
#
CONFIG_ESP_TLS_USING_MBEDTLS=y
CONFIG_ESP_TLS_USE_DS_PERIPHERAL=y
CONFIG_ESP_TLS_SERVER=y
# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set
@ -190,80 +209,89 @@ CONFIG_ESP_TLS_SERVER=y
# CONFIG_ESP_TLS_INSECURE is not set
# end of ESP-TLS
# CONFIG_ETH_USE_SPI_ETHERNET is not set
#
# Ethernet
#
# CONFIG_ETH_USE_SPI_ETHERNET is not set
# CONFIG_ETH_USE_OPENETH is not set
# end of Ethernet
# CONFIG_ESP_EVENT_LOOP_PROFILING is not set
#
# Event Loop Library
#
# CONFIG_ESP_EVENT_LOOP_PROFILING is not set
CONFIG_ESP_EVENT_POST_FROM_ISR=y
CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y
# end of Event Loop Library
CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
#
# Hardware Settings
#
#
# MAC Config
#
CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y
CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y
CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
# end of MAC Config
CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
#
# Sleep Config
#
CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
# CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND is not set
# CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set
# end of Sleep Config
CONFIG_ESP_IPC_TASK_STACK_SIZE=1536
#
# RTC Clock Config
#
CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB=y
# end of RTC Clock Config
# end of Hardware Settings
#
# IPC (Inter-Processor Call)
#
CONFIG_ESP_IPC_TASK_STACK_SIZE=1536
CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y
CONFIG_ESP_IPC_ISR_ENABLE=y
# end of IPC (Inter-Processor Call)
CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
#
# ESP NETIF Adapter
#
CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
CONFIG_ESP_NETIF_TCPIP_LWIP=y
# CONFIG_ESP_NETIF_LOOPBACK is not set
# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set
# end of ESP NETIF Adapter
CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y
#
# PHY
#
CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y
# CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set
CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP_PHY_MAX_TX_POWER=20
# end of PHY
# CONFIG_PM_ENABLE is not set
#
# Power Management
#
# CONFIG_PM_ENABLE is not set
CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y
CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP=y
# end of Power Management
# CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set
#
# ESP System Settings
#
# CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set
CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y
CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
# end of ESP System Settings
CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192
@ -273,7 +301,10 @@ CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
CONFIG_ESP_INT_WDT_CHECK_CPU1=y
# CONFIG_ESP_TASK_WDT is not set
# CONFIG_ESP_PANIC_HANDLER_IRAM is not set
# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
# end of ESP System Settings
#
# High resolution timer (esp_timer)
#
@ -286,10 +317,10 @@ CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1
CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
# end of High resolution timer (esp_timer)
# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
#
# Wi-Fi
#
# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
# CONFIG_ESP_WIFI_FTM_ENABLE is not set
# CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set
# CONFIG_ESP_WIFI_GCMP_SUPPORT is not set
@ -297,18 +328,18 @@ CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y
# end of Wi-Fi
# CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set
#
# Core dump
#
# CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set
# CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set
CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y
# end of Core dump
CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
#
# FreeRTOS
#
CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y
CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y
# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set
@ -339,10 +370,10 @@ CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y
# CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH is not set
# end of FreeRTOS
CONFIG_HEAP_POISONING_DISABLED=y
#
# Heap memory debugging
#
CONFIG_HEAP_POISONING_DISABLED=y
# CONFIG_HEAP_POISONING_LIGHT is not set
# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set
CONFIG_HEAP_TRACING_OFF=y
@ -351,10 +382,10 @@ CONFIG_HEAP_TRACING_OFF=y
# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
# end of Heap memory debugging
# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
#
# Log output
#
# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set
# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
@ -370,16 +401,16 @@ CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
# end of Log output
# CONFIG_LWIP_NETIF_API is not set
#
# LWIP
#
# CONFIG_LWIP_NETIF_API is not set
# CONFIG_LWIP_TCPIP_CORE_LOCKING is not set
CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
# CONFIG_LWIP_L2_TO_L3_COPY is not set
# CONFIG_LWIP_IRAM_OPTIMIZATION is not set
CONFIG_LWIP_TIMERS_ONDEMAND=y
CONFIG_LWIP_MAX_SOCKETS=4
CONFIG_LWIP_MAX_SOCKETS=8
# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
# CONFIG_LWIP_SO_LINGER is not set
CONFIG_LWIP_SO_REUSE=y
@ -401,12 +432,10 @@ CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y
# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
CONFIG_LWIP_DHCP_OPTIONS_LEN=68
# end of LWIP
CONFIG_LWIP_DHCPS=y
#
# DHCP server
#
CONFIG_LWIP_DHCPS=y
CONFIG_LWIP_DHCPS_LEASE_UNIT=60
CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
# end of DHCP server
@ -442,17 +471,17 @@ CONFIG_LWIP_TCP_OVERSIZE_MSS=y
CONFIG_LWIP_TCP_RTO_TIME=3000
# end of TCP
CONFIG_LWIP_MAX_UDP_PCBS=16
#
# UDP
#
CONFIG_LWIP_MAX_UDP_PCBS=16
CONFIG_LWIP_UDP_RECVMBOX_SIZE=6
# end of UDP
# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set
#
# Checksums
#
# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set
# CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set
CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y
# end of Checksums
@ -474,7 +503,12 @@ CONFIG_LWIP_ICMP=y
# CONFIG_LWIP_BROADCAST_PING is not set
# end of ICMP
#
# LWIP RAW API
#
CONFIG_LWIP_MAX_RAW_PCBS=16
# end of LWIP RAW API
#
# SNTP
#
@ -483,10 +517,10 @@ CONFIG_LWIP_SNTP_MAX_SERVERS=1
CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
# end of SNTP
# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set
#
# Hooks
#
# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set
CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y
# CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set
CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y
@ -501,6 +535,8 @@ CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
# end of Hooks
# CONFIG_LWIP_DEBUG is not set
# end of LWIP
#
# mbedTLS
#
@ -511,12 +547,27 @@ CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=2048
# CONFIG_MBEDTLS_DEBUG is not set
# end of mbedTLS
#
# mbedTLS v2.28.x related
#
# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
CONFIG_MBEDTLS_ECDH_LEGACY_CONTEXT=y
# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
#
# DTLS-based configurations
#
# CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID is not set
# CONFIG_MBEDTLS_SSL_DTLS_SRTP is not set
# end of DTLS-based configurations
# end of mbedTLS v2.28.x related
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
#
# Certificate Bundle
#
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL is not set
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE=y
@ -524,8 +575,8 @@ CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE=y
CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE_PATH="certificates/nina-fw/data/roots.pem"
# end of Certificate Bundle
# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
# CONFIG_MBEDTLS_CMAC_C is not set
CONFIG_MBEDTLS_ECP_RESTARTABLE=y
CONFIG_MBEDTLS_CMAC_C=y
CONFIG_MBEDTLS_HARDWARE_AES=y
CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
CONFIG_MBEDTLS_HARDWARE_MPI=y
@ -622,6 +673,25 @@ CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
# CONFIG_MBEDTLS_THREADING_C is not set
# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set
# CONFIG_MBEDTLS_SECURITY_RISKS is not set
# end of mbedTLS
#
# mDNS
#
CONFIG_MDNS_MAX_SERVICES=10
CONFIG_MDNS_TASK_PRIORITY=1
CONFIG_MDNS_TASK_STACK_SIZE=4096
# CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set
CONFIG_MDNS_TASK_AFFINITY_CPU0=y
# CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set
CONFIG_MDNS_TASK_AFFINITY=0x0
CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000
# CONFIG_MDNS_STRICT_MODE is not set
CONFIG_MDNS_TIMER_PERIOD_MS=100
# CONFIG_MDNS_NETWORKING_SOCKET is not set
CONFIG_MDNS_MULTIPLE_INSTANCE=y
# end of mDNS
#
# Newlib
#
@ -634,7 +704,12 @@ CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
# CONFIG_NEWLIB_NANO_FORMAT is not set
# end of Newlib
#
# OpenThread
#
# CONFIG_OPENTHREAD_ENABLED is not set
# end of OpenThread
#
# PThreads
#
@ -648,10 +723,10 @@ CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# end of PThreads
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
#
# SPI Flash driver
#
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
# CONFIG_SPI_FLASH_ROM_IMPL is not set
@ -666,20 +741,21 @@ CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=4096
# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set
# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set
# end of SPI Flash driver
CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
#
# Auto-detect flash chips
#
CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP=y
# end of Auto-detect flash chips
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
# end of SPI Flash driver
#
# Virtual file system
#
@ -688,19 +764,19 @@ CONFIG_VFS_SUPPORT_DIR=y
CONFIG_VFS_SUPPORT_SELECT=y
CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y
CONFIG_VFS_SUPPORT_TERMIOS=y
# end of Virtual file system
CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1
#
# Host File System I/O (Semihosting)
#
CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1
CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
# end of Host File System I/O (Semihosting)
CONFIG_WPA_MBEDTLS_CRYPTO=y
# end of Virtual file system
#
# Supplicant
#
CONFIG_WPA_MBEDTLS_CRYPTO=y
# CONFIG_WPA_WAPI_PSK is not set
# CONFIG_WPA_SUITE_B_192 is not set
# CONFIG_WPA_DEBUG_PRINT is not set
@ -709,7 +785,14 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y
# CONFIG_WPA_11KV_SUPPORT is not set
# end of Supplicant
# end of Component config
#
# Compatibility options
#
# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set
# end of Compatibility options
#
# Deprecated options for backward compatibility
#

View File

@ -82,4 +82,10 @@
#define CIRCUITPY_I2C_ALLOW_INTERNAL_PULL_UP (0)
#endif
// Define to (1) in mpconfigboard.h if the board uses the internal USB to
// Serial/JTAG to connect do USB.
#ifndef CIRCUITPY_ESP_USB_SERIAL_JTAG
#define CIRCUITPY_ESP_USB_SERIAL_JTAG (0)
#endif
#endif // MICROPY_INCLUDED_ESPRESSIF_MPCONFIGPORT_H

View File

@ -34,15 +34,17 @@ CIRCUITPY_ESPIDF ?= 1
CIRCUITPY_MODULE ?= none
ifeq ($(IDF_TARGET),esp32c3)
CIRCUITPY_AESIO = 0
CIRCUITPY_ALARM = 0
CIRCUITPY_AUDIOBUSIO = 0
CIRCUITPY_BLEIO = 1
CIRCUITPY_BLEIO_HCI = 0
CIRCUITPY_COUNTIO = 0
CIRCUITPY_DUALBANK = 0
CIRCUITPY_FREQUENCYIO = 0
CIRCUITPY_IMAGECAPTURE = 0
CIRCUITPY_MDNS = 0
CIRCUITPY_PARALLELDISPLAY = 0
CIRCUITPY_PS2IO = 0
CIRCUITPY_ROTARYIO = 0
CIRCUITPY_TOUCHIO ?= 1
CIRCUITPY_TOUCHIO_USE_NATIVE = 0

View File

@ -0,0 +1,73 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2022 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "py/mpconfig.h"
#include "supervisor/serial.h"
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
#include "supervisor/usb_serial_jtag.h"
#endif
void port_serial_init(void) {
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
usb_serial_jtag_init();
#endif
}
bool port_serial_connected(void) {
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
if (usb_serial_jtag_connected()) {
return true;
}
#endif
return false;
}
char port_serial_read(void) {
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
if (usb_serial_jtag_bytes_available() > 0) {
return usb_serial_jtag_read_char();
}
#endif
return -1;
}
bool port_serial_bytes_available(void) {
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
if (usb_serial_jtag_bytes_available()) {
return true;
}
#endif
return false;
}
void port_serial_write_substring(const char *text, uint32_t length) {
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
usb_serial_jtag_write(text, length);
#endif
}

View File

@ -0,0 +1,111 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 Patrick Van Oosterwijck
* Copyright (c) 2022 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "py/ringbuf.h"
#include "py/runtime.h"
#include "py/mphal.h"
#include "usb_serial_jtag.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_intr_alloc.h"
#include "soc/periph_defs.h"
#include "supervisor/esp_port.h"
#define USB_SERIAL_JTAG_BUF_SIZE (64)
STATIC ringbuf_t ringbuf;
STATIC uint8_t buf[128];
STATIC bool connected;
static void usb_serial_jtag_isr_handler(void *arg) {
uint32_t flags = usb_serial_jtag_ll_get_intsts_mask();
if (flags & USB_SERIAL_JTAG_INTR_SOF) {
usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_INTR_SOF);
}
if (flags & USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT) {
usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT);
size_t req_len = ringbuf_num_empty(&ringbuf);
if (req_len > USB_SERIAL_JTAG_BUF_SIZE) {
req_len = USB_SERIAL_JTAG_BUF_SIZE;
}
uint8_t rx_buf[USB_SERIAL_JTAG_BUF_SIZE];
size_t len = usb_serial_jtag_ll_read_rxfifo(rx_buf, req_len);
for (size_t i = 0; i < len; ++i) {
if (rx_buf[i] == mp_interrupt_char) {
mp_sched_keyboard_interrupt();
} else {
ringbuf_put(&ringbuf, rx_buf[i]);
}
}
vTaskNotifyGiveFromISR(circuitpython_task, NULL);
}
}
void usb_serial_jtag_init(void) {
ringbuf_init(&ringbuf, buf, sizeof(buf));
usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_INTR_SOF | USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT);
usb_serial_jtag_ll_ena_intr_mask(USB_SERIAL_JTAG_INTR_SOF | USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT);
ESP_ERROR_CHECK(esp_intr_alloc(ETS_USB_SERIAL_JTAG_INTR_SOURCE, ESP_INTR_FLAG_LEVEL1,
usb_serial_jtag_isr_handler, NULL, NULL));
}
bool usb_serial_jtag_connected(void) {
// Make connected sticky. Otherwise we'll be disconnected every time the SOF
// index is 0. (It's only ~15 bits so it wraps around frequently.)
if (connected) {
return true;
}
connected = USB_SERIAL_JTAG.fram_num.sof_frame_index > 0;
return connected;
}
char usb_serial_jtag_read_char(void) {
if (ringbuf_num_filled(&ringbuf) == 0) {
return -1;
}
return ringbuf_get(&ringbuf);
}
bool usb_serial_jtag_bytes_available(void) {
return ringbuf_num_filled(&ringbuf);
}
void usb_serial_jtag_write(const char *text, uint32_t length) {
if (USB_SERIAL_JTAG.fram_num.sof_frame_index > 0) {
size_t total_written = 0;
uint32_t start_time = supervisor_ticks_ms32();
// Time out after 5 milliseconds in case usb isn't actually reading CDC.
while (total_written < length && start_time - supervisor_ticks_ms32() < 5) {
total_written += usb_serial_jtag_ll_write_txfifo((const uint8_t *)(text + total_written), length - total_written);
RUN_BACKGROUND_TASKS;
}
usb_serial_jtag_ll_txfifo_flush();
}
}

View File

@ -0,0 +1,33 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2022 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
void usb_serial_jtag_init(void);
bool usb_serial_jtag_connected(void);
char usb_serial_jtag_read_char(void);
bool usb_serial_jtag_bytes_available(void);
void usb_serial_jtag_write(const char *text, uint32_t length);

View File

@ -5,6 +5,7 @@
#
# SPDX-License-Identifier: MIT
import csv
import os
import re
import sys
@ -13,27 +14,70 @@ from elftools.elf.elffile import ELFFile
print()
internal_memory = [
# Name, Start, Length
("RTC Fast Memory", (0x3FF9_E000, 0x4007_0000), 8 * 1024),
("RTC Slow Memory", (0x5000_0000,), 8 * 1024),
("Internal SRAM 0", (0x3FFB_0000, 0x4002_0000), 32 * 1024),
("Internal SRAM 1", (0x3FFB_8000, 0x4002_8000), 288 * 1024),
]
def partition_size(arg):
if "4MB" in arg:
return 1408 * 1024
else:
return 2048 * 1024
internal_memory = {
"esp32s2": [
# Name, Start, Length
("RTC Fast Memory", (0x3FF9_E000, 0x4007_0000), 8 * 1024),
("RTC Slow Memory", (0x5000_0000,), 8 * 1024),
("Internal SRAM 0", (0x3FFB_0000, 0x4002_0000), 32 * 1024),
("Internal SRAM 1", (0x3FFB_8000, 0x4002_8000), 288 * 1024),
],
"esp32s3": [
# Name, Start, Length
("RTC Fast Memory", (0x600F_E000,), 8 * 1024),
("RTC Slow Memory", (0x5000_0000,), 8 * 1024),
("Internal SRAM 0", (0x4037_0000,), 32 * 1024),
("Internal SRAM 1", (0x3FC8_0000, 0x4037_8000), 416 * 1024),
("Internal SRAM 2", (0x3FCF_0000,), 64 * 1024),
],
"esp32c3": [
# Name, Start, Length
("RTC Fast Memory", (0x5000_0000,), 8 * 1024),
("Internal SRAM 0", (0x4037_C000,), 16 * 1024),
("Internal SRAM 1", (0x3FC8_0000, 0x4038_0000), 384 * 1024),
],
}
def align(n, m):
return m * ((n + m - 1) // m)
regions = dict((name, 0) for name, _, _ in internal_memory)
def find_region(start_address):
for name, starts, length in internal_memory[target]:
for mem_start in starts:
mem_end = mem_start + length
if mem_start <= start_address < mem_end:
return (name, mem_start + length)
target = None
# This file is the sdkconfig
with open(sys.argv[2], "r") as f:
for line in f:
line = line.strip()
if line.startswith("CONFIG_IDF_TARGET="):
target = line.split('"')[1]
elif line.startswith("CONFIG_PARTITION_TABLE_FILENAME"):
partitions_file = line.split('"')[1]
with open(partitions_file, "r") as f:
ota = None
app = None
for partition in csv.reader(f):
if partition[0][0] == "#":
continue
subtype = partition[2].strip()
if subtype == "factory":
app = partition[4].strip()
elif subtype == "ota_0":
ota = partition[4].strip()
size = app if ota is None else ota
if size[-1] not in ("k", "K"):
raise RuntimeError("Unhandled partition size suffix")
firmware_region = int(size[:-1]) * 1024
regions = dict((name, 0) for name, _, _ in internal_memory[target])
# This file is the elf
with open(sys.argv[1], "rb") as stream:
@ -44,19 +88,20 @@ with open(sys.argv[1], "rb") as stream:
offset = section["sh_offset"]
if not size or not start:
continue
for name, starts, length in internal_memory:
for mem_start in starts:
mem_end = mem_start + length
if start >= mem_start and start < mem_end:
regions[name] = max(regions.get(name, 0), size)
# print("# putting %s in %s (start=0x%x, size=%d)" % (section.name, name, start, size))
# This file is the sdkconfig
with open(sys.argv[2], "r") as f:
for line in f:
line = line.strip()
if line.startswith("CONFIG_PARTITION_TABLE_FILENAME"):
firmware_region = int(partition_size(line.split("=")[-1]))
# This handles sections that span two memory regions, not more than that.
# print(start, size, offset, section.name)
region = find_region(start)
if region is None:
continue
name, region_end = region
region_size = min(size, region_end - start)
regions[name] += region_size
# print("# putting %s in %s (start=0x%x, size=%d)" % (section.name, name, start, region_size))
if region_size < size:
name, _ = find_region(region_end)
remaining_size = size - region_size
regions[name] += remaining_size
# print("# putting %s in %s (start=0x%x, size=%d)" % (section.name, name, region_end, remaining_size))
# This file is the bin
used_flash = os.stat(sys.argv[3]).st_size
@ -67,7 +112,7 @@ print(
used_flash, free_flash, firmware_region, firmware_region / 1024
)
)
for name, mem_start, length in internal_memory:
for name, mem_start, length in internal_memory[target]:
if name in regions:
print(
"{:7} bytes used, {:7} bytes free in '{}' out of {} bytes ({}kB).".format(

View File

@ -3,6 +3,7 @@
import pathlib
import click
import copy
OPT_SETTINGS = [
"CONFIG_ESP_ERR_TO_NAME_LOOKUP",
@ -50,6 +51,9 @@ TARGET_SETTINGS = [
"ESP_SLEEP_GPIO_RESET_WORKAROUND",
"CONFIG_ESP_PHY_ENABLE_USB",
"CONFIG_BT_SOC_SUPPORT_5_0",
"CONFIG_NIMBLE_PINNED_TO_CORE",
"CONFIG_BT_NIMBLE_PINNED_TO_CORE",
"CONFIG_BT_CTRL_PINNED_TO_CORE",
]
BOARD_SETTINGS = [
@ -83,17 +87,18 @@ def matches_group(line, group):
def add_group(lines, last_group, current_group):
# TODO: Properly handle nested groups
if last_group != current_group[-1]:
if last_group:
lines.append("# end of " + last_group)
if not current_group or last_group != current_group:
while last_group and last_group[-1] not in current_group:
lines.append("# end of " + last_group[-1])
lines.append("")
return None
if current_group:
last_group.pop()
for category in current_group:
if last_group and category in last_group:
continue
lines.append("#")
lines.append("# " + current_group[-1])
lines.append("# " + category)
lines.append("#")
return current_group[-1]
return copy.copy(current_group)
return last_group
@ -107,7 +112,8 @@ def add_group(lines, last_group, current_group):
help="Updates the sdkconfigs outside of the board directory.",
)
def update(debug, board, update_all):
"""Simple program that greets NAME for a total of COUNT times."""
"""Updates related sdkconfig files based on the build directory version that
was likely modified by menuconfig."""
board_make = pathlib.Path(f"boards/{board}/mpconfigboard.mk")
for line in board_make.read_text().split("\n"):
@ -147,7 +153,16 @@ def update(debug, board, update_all):
last_default_group = None
current_group = []
for line in input_config.read_text().split("\n"):
if line.startswith("# ") and "CONFIG_" not in line and len(line) > 3:
# Normalize the deprecated section labels.
if line == "# End of deprecated options":
line = "# end of Deprecated options for backward compatibility"
if (
line.startswith("# ")
and "CONFIG_" not in line
and "DO NOT EDIT" not in line
and "Project Configuration" not in line
and len(line) > 3
):
if line.startswith("# end of"):
current_group.pop()
else:

View File

@ -33,6 +33,8 @@
#include "fsl_clock.h"
#include "fsl_lpuart.h"
// TODO: Switch this to using DEBUG_UART.
// static LPUART_Type *uart_instance = LPUART1; // evk
static LPUART_Type *uart_instance = LPUART4; // feather 1011
// static LPUART_Type *uart_instance = LPUART2; // feather 1062
@ -52,7 +54,7 @@ static uint32_t UartSrcFreq(void) {
return freq;
}
void serial_init(void) {
void port_serial_init(void) {
lpuart_config_t config;
LPUART_GetDefaultConfig(&config);
@ -63,11 +65,11 @@ void serial_init(void) {
LPUART_Init(uart_instance, &config, UartSrcFreq());
}
bool serial_connected(void) {
bool port_serial_connected(void) {
return true;
}
char serial_read(void) {
char port_serial_read(void) {
uint8_t data;
LPUART_ReadBlocking(uart_instance, &data, sizeof(data));
@ -75,15 +77,11 @@ char serial_read(void) {
return data;
}
bool serial_bytes_available(void) {
bool port_serial_bytes_available(void) {
return LPUART_GetStatusFlags(uart_instance) & kLPUART_RxDataRegFullFlag;
}
void serial_write(const char *text) {
LPUART_WriteBlocking(uart_instance, (uint8_t *)text, strlen(text));
}
void serial_write_substring(const char *text, uint32_t len) {
void port_serial_write_substring(const char *text, uint32_t len) {
if (len == 0) {
return;
}

View File

@ -28,12 +28,16 @@
#include "py/mphal.h"
#include <string.h>
#include "supervisor/serial.h"
#if CPY_STM32F4
#include "stm32f4xx_hal.h"
#include "stm32f4/gpio.h"
// TODO: Switch this to using DEBUG_UART.
UART_HandleTypeDef huart2;
#endif
void serial_init(void) {
void port_serial_init(void) {
#if CPY_STM32F4
huart2.Instance = USART2;
huart2.Init.BaudRate = 115200;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
@ -45,29 +49,33 @@ void serial_init(void) {
if (HAL_UART_Init(&huart2) == HAL_OK) {
stm32f4_peripherals_status_led(1,1);
}
#endif
}
bool serial_connected(void) {
bool port_serial_connected(void) {
return true;
}
char serial_read(void) {
char port_serial_read(void) {
#if CPY_STM32F4
uint8_t data;
HAL_UART_Receive(&huart2, &data, 1,500);
return data;
#else
return -1;
#endif
}
bool serial_bytes_available(void) {
bool port_serial_bytes_available(void) {
#if CPY_STM32F4
return __HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE);
#else
return false;
#endif
}
void serial_write(const char *text) {
serial_write_substring(text, strlen(text));
}
void serial_write_substring(const char *text, uint32_t len) {
if (len == 0) {
return;
}
void port_serial_write_substring(const char *text, uint32_t len) {
#if CPY_STM32F4
HAL_UART_Transmit(&huart2, (uint8_t *)text, len, 5000);
#endif
}

View File

@ -39,6 +39,7 @@
extern vstr_t *boot_output;
#endif
void serial_early_init(void);
void serial_init(void);
void serial_write(const char *text);
@ -48,6 +49,14 @@ char serial_read(void);
bool serial_bytes_available(void);
bool serial_connected(void);
// These have no-op versions that are weak and the port can override. They work
// in tandem with the cross-port mechanics like USB and BLE.
void port_serial_init(void);
bool port_serial_connected(void);
char port_serial_read(void);
bool port_serial_bytes_available(void);
void port_serial_write_substring(const char *text, uint32_t length);
int debug_uart_printf(const char *fmt, ...) __attribute__((format(printf, 1, 2)));
#endif // MICROPY_INCLUDED_SUPERVISOR_SERIAL_H

View File

@ -88,6 +88,26 @@ int debug_uart_printf(const char *fmt, ...) {
#endif
}
MP_WEAK void port_serial_init(void) {
}
MP_WEAK bool port_serial_connected(void) {
return false;
}
MP_WEAK char port_serial_read(void) {
return -1;
}
MP_WEAK bool port_serial_bytes_available(void) {
return false;
}
MP_WEAK void port_serial_write_substring(const char *text, uint32_t length) {
(void)text;
(void)length;
}
void serial_early_init(void) {
#if defined(CIRCUITPY_DEBUG_UART_TX) || defined(CIRCUITPY_DEBUG_UART_RX)
debug_uart.base.type = &busio_uart_type;
@ -115,7 +135,7 @@ void serial_early_init(void) {
}
void serial_init(void) {
// USB serial is set up separately.
port_serial_init();
}
bool serial_connected(void) {
@ -144,6 +164,10 @@ bool serial_connected(void) {
return true;
}
#endif
if (port_serial_connected()) {
return true;
}
return false;
}
@ -179,6 +203,10 @@ char serial_read(void) {
#if CIRCUITPY_USB
return (char)tud_cdc_read_char();
#endif
if (port_serial_bytes_available() > 0) {
return port_serial_read();
}
return -1;
}
@ -211,6 +239,10 @@ bool serial_bytes_available(void) {
return true;
}
#endif
if (port_serial_bytes_available() > 0) {
return true;
}
return false;
}
@ -256,6 +288,8 @@ void serial_write_substring(const char *text, uint32_t length) {
usb_background();
}
#endif
port_serial_write_substring(text, length);
}
void serial_write(const char *text) {

View File

@ -10,11 +10,13 @@ SRC_SUPERVISOR = \
supervisor/shared/micropython.c \
supervisor/shared/reload.c \
supervisor/shared/safe_mode.c \
supervisor/shared/serial.c \
supervisor/shared/stack.c \
supervisor/shared/status_leds.c \
supervisor/shared/tick.c \
supervisor/shared/traceback.c \
supervisor/shared/translate.c
supervisor/shared/translate.c \
supervisor/shared/workflow.c
ifeq ($(DISABLE_FILESYSTEM),1)
SRC_SUPERVISOR += supervisor/stub/filesystem.c
@ -76,23 +78,17 @@ $(BUILD)/supervisor/shared/external_flash/external_flash.o: $(HEADER_BUILD)/devi
endif
ifeq ($(CIRCUITPY_USB),0)
ifeq ($(wildcard supervisor/serial.c),)
SRC_SUPERVISOR += supervisor/shared/serial.c \
supervisor/shared/workflow.c \
ifneq ($(wildcard supervisor/serial.c),)
SRC_SUPERVISOR += supervisor/serial.c
endif
else
SRC_SUPERVISOR += supervisor/serial.c
endif
else
ifeq ($(CIRCUITPY_USB),1)
SRC_SUPERVISOR += \
lib/tinyusb/src/class/cdc/cdc_device.c \
lib/tinyusb/src/common/tusb_fifo.c \
lib/tinyusb/src/device/usbd.c \
lib/tinyusb/src/device/usbd_control.c \
lib/tinyusb/src/tusb.c \
supervisor/shared/serial.c \
supervisor/shared/workflow.c \
supervisor/usb.c \
supervisor/shared/usb/usb_desc.c \
supervisor/shared/usb/usb.c \

View File

@ -69,6 +69,7 @@ extension_by_board = {
# stm32
"meowbit_v121": UF2,
# esp32c3
"adafruit_qtpy_esp32c3": BIN,
"ai_thinker_esp32-c3s": BIN,
"ai_thinker_esp32-c3s-2m": BIN,
"espressif_esp32c3_devkitm_1_n4": BIN,