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upgrade nrfx API to v2

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This commit is contained in:
hathach 2019-12-17 21:39:52 +07:00
parent 20f7fbc6f5
commit 894cad2e17
13 changed files with 78 additions and 72 deletions
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2
ports/nrf/Makefile
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@ -138,6 +138,7 @@ SRC_NRFX = $(addprefix nrfx/,\
drivers/src/nrfx_uarte.c \ drivers/src/nrfx_uarte.c \
drivers/src/nrfx_gpiote.c \ drivers/src/nrfx_gpiote.c \
drivers/src/nrfx_rtc.c \ drivers/src/nrfx_rtc.c \
drivers/src/nrfx_nvmc.c \
) )
ifdef EXTERNAL_FLASH_DEVICES ifdef EXTERNAL_FLASH_DEVICES
@ -167,7 +168,6 @@ SRC_C += \
lib/utils/pyexec.c \ lib/utils/pyexec.c \
lib/utils/stdout_helpers.c \ lib/utils/stdout_helpers.c \
lib/utils/sys_stdio_mphal.c \ lib/utils/sys_stdio_mphal.c \
nrfx/hal/nrf_nvmc.c \
nrfx/mdk/system_$(MCU_SUB_VARIANT).c \ nrfx/mdk/system_$(MCU_SUB_VARIANT).c \
peripherals/nrf/cache.c \ peripherals/nrf/cache.c \
peripherals/nrf/clocks.c \ peripherals/nrf/clocks.c \

51
ports/nrf/common-hal/analogio/AnalogIn.c
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@ -36,12 +36,12 @@
void analogin_init(void) { void analogin_init(void) {
// Calibrate the ADC once, on startup. // Calibrate the ADC once, on startup.
nrf_saadc_enable(); nrf_saadc_enable(NRF_SAADC);
nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE);
nrf_saadc_task_trigger(NRF_SAADC_TASK_CALIBRATEOFFSET); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_CALIBRATEOFFSET);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_CALIBRATEDONE) == 0) { } while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE) == 0) { }
nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE);
nrf_saadc_disable(); nrf_saadc_disable(NRF_SAADC);
} }
void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const mcu_pin_obj_t *pin) { void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const mcu_pin_obj_t *pin) {
@ -81,34 +81,33 @@ uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) {
.reference = NRF_SAADC_REFERENCE_VDD4, .reference = NRF_SAADC_REFERENCE_VDD4,
.acq_time = NRF_SAADC_ACQTIME_3US, .acq_time = NRF_SAADC_ACQTIME_3US,
.mode = NRF_SAADC_MODE_SINGLE_ENDED, .mode = NRF_SAADC_MODE_SINGLE_ENDED,
.burst = NRF_SAADC_BURST_DISABLED, .burst = NRF_SAADC_BURST_DISABLED
.pin_p = self->pin->adc_channel,
.pin_n = self->pin->adc_channel,
}; };
nrf_saadc_resolution_set(NRF_SAADC_RESOLUTION_14BIT); nrf_saadc_resolution_set(NRF_SAADC, NRF_SAADC_RESOLUTION_14BIT);
nrf_saadc_oversample_set(NRF_SAADC_OVERSAMPLE_DISABLED); nrf_saadc_oversample_set(NRF_SAADC, NRF_SAADC_OVERSAMPLE_DISABLED);
nrf_saadc_enable(); nrf_saadc_enable(NRF_SAADC);
for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; i++) for (uint32_t i = 0; i < SAADC_CH_NUM; i++)
nrf_saadc_channel_input_set(i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); nrf_saadc_channel_input_set(NRF_SAADC, i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
nrf_saadc_channel_init(CHANNEL_NO, &config); nrf_saadc_channel_init(NRF_SAADC, CHANNEL_NO, &config);
nrf_saadc_buffer_init(&value, 1); nrf_saadc_channel_input_set(NRF_SAADC, CHANNEL_NO, self->pin->adc_channel, self->pin->adc_channel);
nrf_saadc_buffer_init(NRF_SAADC, &value, 1);
nrf_saadc_task_trigger(NRF_SAADC_TASK_START); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_START);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED) == 0); while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STARTED) == 0);
nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STARTED);
nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_SAMPLE);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_END) == 0); while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_END) == 0);
nrf_saadc_event_clear(NRF_SAADC_EVENT_END); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_END);
nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_STOP);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED) == 0); while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STOPPED) == 0);
nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STOPPED);
nrf_saadc_disable(); nrf_saadc_disable(NRF_SAADC);
if (value < 0) if (value < 0)
value = 0; value = 0;

12
ports/nrf/common-hal/busio/I2C.c
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@ -133,9 +133,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *
mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); mp_raise_RuntimeError(translate("SDA or SCL needs a pull up"));
} }
nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG; nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG(scl->number, sda->number);
config.scl = scl->number;
config.sda = sda->number;
// change freq. only if it's less than the default 400K // change freq. only if it's less than the default 400K
if (frequency < 100000) { if (frequency < 100000) {
config.frequency = NRF_TWIM_FREQ_100K; config.frequency = NRF_TWIM_FREQ_100K;
@ -248,8 +247,10 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const u
// break into MAX_XFER_LEN transaction // break into MAX_XFER_LEN transaction
while ( len ) { while ( len ) {
const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN); const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN);
nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_TX(addr, (uint8_t*) data, xact_len);
uint32_t const flags = (stopBit ? 0 : NRFX_TWIM_FLAG_TX_NO_STOP);
if ( NRFX_SUCCESS != (err = nrfx_twim_tx(&self->twim_peripheral->twim, addr, data, xact_len, !stopBit)) ) { if ( NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, flags)) ) {
break; break;
} }
@ -274,8 +275,9 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t
// break into MAX_XFER_LEN transaction // break into MAX_XFER_LEN transaction
while ( len ) { while ( len ) {
const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN); const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN);
nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_RX(addr, data, xact_len);
if ( NRFX_SUCCESS != (err = nrfx_twim_rx(&self->twim_peripheral->twim, addr, data, xact_len)) ) { if ( NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, 0)) ) {
break; break;
} }

3
ports/nrf/common-hal/busio/SPI.c
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@ -135,7 +135,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *
mp_raise_ValueError(translate("All SPI peripherals are in use")); mp_raise_ValueError(translate("All SPI peripherals are in use"));
} }
nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG; nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG(NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED,
NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED);
config.frequency = NRF_SPIM_FREQ_8M; config.frequency = NRF_SPIM_FREQ_8M;
config.sck_pin = clock->number; config.sck_pin = clock->number;

8
ports/nrf/common-hal/busio/UART.c
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@ -163,10 +163,12 @@ void common_hal_busio_uart_construct (busio_uart_obj_t *self,
.pselcts = NRF_UARTE_PSEL_DISCONNECTED, .pselcts = NRF_UARTE_PSEL_DISCONNECTED,
.pselrts = NRF_UARTE_PSEL_DISCONNECTED, .pselrts = NRF_UARTE_PSEL_DISCONNECTED,
.p_context = self, .p_context = self,
.hwfc = NRF_UARTE_HWFC_DISABLED,
.parity = (parity == PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED,
.baudrate = get_nrf_baud(baudrate), .baudrate = get_nrf_baud(baudrate),
.interrupt_priority = 7 .interrupt_priority = 7,
.hal_cfg = {
.hwfc = NRF_UARTE_HWFC_DISABLED,
.parity = (parity == PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED
}
}; };
nrfx_uarte_uninit(self->uarte); nrfx_uarte_uninit(self->uarte);

39
ports/nrf/common-hal/microcontroller/Processor.c
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@ -75,35 +75,34 @@ float common_hal_mcu_processor_get_voltage(void) {
.reference = NRF_SAADC_REFERENCE_INTERNAL, .reference = NRF_SAADC_REFERENCE_INTERNAL,
.acq_time = NRF_SAADC_ACQTIME_10US, .acq_time = NRF_SAADC_ACQTIME_10US,
.mode = NRF_SAADC_MODE_SINGLE_ENDED, .mode = NRF_SAADC_MODE_SINGLE_ENDED,
.burst = NRF_SAADC_BURST_DISABLED, .burst = NRF_SAADC_BURST_DISABLED
.pin_p = NRF_SAADC_INPUT_VDD,
.pin_n = NRF_SAADC_INPUT_VDD,
}; };
nrf_saadc_resolution_set(NRF_SAADC_RESOLUTION_14BIT); nrf_saadc_resolution_set(NRF_SAADC, NRF_SAADC_RESOLUTION_14BIT);
nrf_saadc_oversample_set(NRF_SAADC_OVERSAMPLE_DISABLED); nrf_saadc_oversample_set(NRF_SAADC, NRF_SAADC_OVERSAMPLE_DISABLED);
nrf_saadc_enable(); nrf_saadc_enable(NRF_SAADC);
for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; i++) { for (uint32_t i = 0; i < SAADC_CH_NUM; i++) {
nrf_saadc_channel_input_set(i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); nrf_saadc_channel_input_set(NRF_SAADC, i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
} }
nrf_saadc_channel_init(0, &config); nrf_saadc_channel_init(NRF_SAADC, 0, &config);
nrf_saadc_buffer_init(&value, 1); nrf_saadc_channel_input_set(NRF_SAADC, 0, NRF_SAADC_INPUT_VDD, NRF_SAADC_INPUT_VDD);
nrf_saadc_buffer_init(NRF_SAADC, &value, 1);
nrf_saadc_task_trigger(NRF_SAADC_TASK_START); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_START);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED) == 0) { } while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STARTED) == 0) { }
nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STARTED);
nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_SAMPLE);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_END) == 0) { } while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_END) == 0) { }
nrf_saadc_event_clear(NRF_SAADC_EVENT_END); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_END);
nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_STOP);
while (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED) == 0) { } while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STOPPED) == 0) { }
nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STOPPED);
nrf_saadc_disable(); nrf_saadc_disable(NRF_SAADC);
if (value < 0) { if (value < 0) {
value = 0; value = 0;

12
ports/nrf/common-hal/os/__init__.c
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@ -70,17 +70,17 @@ bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) {
return NRF_SUCCESS == sd_rand_application_vector_get(buffer, length); return NRF_SUCCESS == sd_rand_application_vector_get(buffer, length);
#endif #endif
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
nrf_rng_task_trigger(NRF_RNG_TASK_START); nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_START);
for (uint32_t i = 0; i < length; i++) { for (uint32_t i = 0; i < length; i++) {
while (nrf_rng_event_get(NRF_RNG_EVENT_VALRDY) == 0); while (nrf_rng_event_check(NRF_RNG, NRF_RNG_EVENT_VALRDY) == 0);
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY);
buffer[i] = nrf_rng_random_value_get(); buffer[i] = nrf_rng_random_value_get(NRF_RNG);
} }
nrf_rng_task_trigger(NRF_RNG_TASK_STOP); nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_STOP);
return true; return true;
} }

2
ports/nrf/common-hal/pulseio/PulseIn.c
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@ -112,7 +112,7 @@ void pulsein_reset(void) {
if ( nrfx_gpiote_is_init() ) { if ( nrfx_gpiote_is_init() ) {
nrfx_gpiote_uninit(); nrfx_gpiote_uninit();
} }
nrfx_gpiote_init(); nrfx_gpiote_init(NRFX_GPIOTE_CONFIG_IRQ_PRIORITY);
memset(_objs, 0, sizeof(_objs)); memset(_objs, 0, sizeof(_objs));
} }

4
ports/nrf/common-hal/rtc/RTC.c
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@ -59,8 +59,8 @@ void rtc_handler(nrfx_rtc_int_type_t int_type) {
} }
void rtc_init(void) { void rtc_init(void) {
if (!nrf_clock_lf_is_running()) { if (!nrf_clock_lf_is_running(NRF_CLOCK)) {
nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTART);
} }
nrfx_rtc_counter_clear(&rtc_instance); nrfx_rtc_counter_clear(&rtc_instance);
nrfx_rtc_init(&rtc_instance, &rtc_config, rtc_handler); nrfx_rtc_init(&rtc_instance, &rtc_config, rtc_handler);

2
ports/nrf/nrfx

@ -1 +1 @@
Subproject commit 3d268263be2390ab760f75a3da72689ef13031a4 Subproject commit 8efb27e97abe8e2a1d2b63908f510c8dca304a5d

5
ports/nrf/nrfx_config.h
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@ -3,7 +3,7 @@
// Power // Power
#define NRFX_POWER_ENABLED 1 #define NRFX_POWER_ENABLED 1
#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7 #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7
// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH. // NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH.
// It doesn't work with the SoftDevice. // It doesn't work with the SoftDevice.
@ -116,4 +116,7 @@
#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 #define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 #define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7
// NVM controller
#define NRFX_NVMC_ENABLED 1
#endif // NRFX_CONFIG_H__ #endif // NRFX_CONFIG_H__

4
ports/nrf/peripherals/nrf/nrf52840/power.c
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@ -25,7 +25,7 @@
*/ */
#include "nrfx.h" #include "nrfx.h"
#include "nrf_nvmc.h" #include "nrfx_nvmc.h"
void nrf_peripherals_power_init(void) { void nrf_peripherals_power_init(void) {
// Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff // Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff
@ -33,7 +33,7 @@ void nrf_peripherals_power_init(void) {
// This matters only when "high voltage mode" is enabled, which is true on the PCA10059, // This matters only when "high voltage mode" is enabled, which is true on the PCA10059,
// and might be true on other boards. // and might be true on other boards.
if (NRF_UICR->REGOUT0 == 0xffffffff) { if (NRF_UICR->REGOUT0 == 0xffffffff) {
nrf_nvmc_write_word((uint32_t) &NRF_UICR->REGOUT0, UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos); nrfx_nvmc_word_write((uint32_t) &NRF_UICR->REGOUT0, UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos);
// Must reset to make enable change. // Must reset to make enable change.
NVIC_SystemReset(); NVIC_SystemReset();
} }

6
ports/nrf/peripherals/nrf/nvm.c
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@ -30,7 +30,7 @@
#include <stdio.h> #include <stdio.h>
#include <string.h> #include <string.h>
#include "nrf_nvmc.h" #include "nrfx_nvmc.h"
#define FLASH_PAGE_SIZE (4096) #define FLASH_PAGE_SIZE (4096)
@ -90,7 +90,7 @@ bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data) {
} }
#endif #endif
nrf_nvmc_page_erase(page_addr); nrfx_nvmc_page_erase(page_addr);
nrf_nvmc_write_bytes(page_addr, data, FLASH_PAGE_SIZE); nrfx_nvmc_bytes_write(page_addr, data, FLASH_PAGE_SIZE);
return true; return true;
} }