Merge remote-tracking branch 'origin/main'

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Hosted Weblate 2022-10-07 14:32:26 +02:00
commit 89260c5bfc
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5 changed files with 23 additions and 17 deletions

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@ -23,7 +23,8 @@
MEMORY MEMORY
{ {
FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 1788k FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 1532k
/* Followed by: 4kB of NVRAM and at least 512kB of CIRCUITPY */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k
SCRATCH_X (rwx) : ORIGIN = 0x20040000, LENGTH = 4k SCRATCH_X (rwx) : ORIGIN = 0x20040000, LENGTH = 4k
SCRATCH_Y (rwx) : ORIGIN = 0x20041000, LENGTH = 4k SCRATCH_Y (rwx) : ORIGIN = 0x20041000, LENGTH = 4k

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@ -21,4 +21,4 @@ CIRCUITPY_WIFI = 1
CFLAGS += -DCYW43_PIN_WL_HOST_WAKE=24 -DCYW43_PIN_WL_REG_ON=23 -DCYW43_WL_GPIO_COUNT=3 -DCYW43_WL_GPIO_LED_PIN=0 CFLAGS += -DCYW43_PIN_WL_HOST_WAKE=24 -DCYW43_PIN_WL_REG_ON=23 -DCYW43_WL_GPIO_COUNT=3 -DCYW43_WL_GPIO_LED_PIN=0
# Must be accompanied by a linker script change # Must be accompanied by a linker script change
CFLAGS += -DRESERVED_FLASH='(1792 * 1024)' CFLAGS += -DCIRCUITPY_FIRMWARE_SIZE='(1536 * 1024)'

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@ -24,6 +24,7 @@
MEMORY MEMORY
{ {
FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 1020k FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 1020k
/* Followed by: 4kB of NVRAM and at least 1024kB of CIRCUITPY */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k
SCRATCH_X (rwx) : ORIGIN = 0x20040000, LENGTH = 4k SCRATCH_X (rwx) : ORIGIN = 0x20040000, LENGTH = 4k
SCRATCH_Y (rwx) : ORIGIN = 0x20041000, LENGTH = 4k SCRATCH_Y (rwx) : ORIGIN = 0x20041000, LENGTH = 4k

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@ -31,9 +31,17 @@
#define MICROPY_PY_SYS_PLATFORM "RP2040" #define MICROPY_PY_SYS_PLATFORM "RP2040"
#define CIRCUITPY_INTERNAL_NVM_SIZE (4 * 1024) // Setting a non-default value also requires a non-default link.ld
#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x100FF000) #ifndef CIRCUITPY_FIRMWARE_SIZE
#define CIRCUITPY_FIRMWARE_SIZE (1020 * 1024)
#endif
#define CIRCUITPY_INTERNAL_NVM_SIZE (4 * 1024)
// This is the XIP address
#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x10000000 + CIRCUITPY_FIRMWARE_SIZE)
// This is the flash linear address
#define CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR (CIRCUITPY_FIRMWARE_SIZE + CIRCUITPY_INTERNAL_NVM_SIZE)
#define CIRCUITPY_DEFAULT_STACK_SIZE (24 * 1024) #define CIRCUITPY_DEFAULT_STACK_SIZE (24 * 1024)
#define MICROPY_USE_INTERNAL_PRINTF (1) #define MICROPY_USE_INTERNAL_PRINTF (1)

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@ -46,10 +46,6 @@
#include "src/rp2_common/hardware_flash/include/hardware/flash.h" #include "src/rp2_common/hardware_flash/include/hardware/flash.h"
#include "src/common/pico_binary_info/include/pico/binary_info.h" #include "src/common/pico_binary_info/include/pico/binary_info.h"
#if !defined(RESERVED_FLASH)
#define RESERVED_FLASH (1 * 1024 * 1024)
#endif
#if !defined(TOTAL_FLASH_MINIMUM) #if !defined(TOTAL_FLASH_MINIMUM)
#define TOTAL_FLASH_MINIMUM (2 * 1024 * 1024) #define TOTAL_FLASH_MINIMUM (2 * 1024 * 1024)
#endif #endif
@ -65,8 +61,8 @@ void supervisor_flash_init(void) {
bi_decl_if_func_used(bi_block_device( bi_decl_if_func_used(bi_block_device(
BINARY_INFO_MAKE_TAG('C', 'P'), BINARY_INFO_MAKE_TAG('C', 'P'),
"CircuitPython", "CircuitPython",
RESERVED_FLASH, CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR,
TOTAL_FLASH_MINIMUM - RESERVED_FLASH, // This is a minimum. We can't set it dynamically. TOTAL_FLASH_MINIMUM - CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR, // This is a minimum. We can't set it dynamically.
NULL, NULL,
BINARY_INFO_BLOCK_DEV_FLAG_READ | BINARY_INFO_BLOCK_DEV_FLAG_READ |
BINARY_INFO_BLOCK_DEV_FLAG_WRITE | BINARY_INFO_BLOCK_DEV_FLAG_WRITE |
@ -92,7 +88,7 @@ uint32_t supervisor_flash_get_block_size(void) {
} }
uint32_t supervisor_flash_get_block_count(void) { uint32_t supervisor_flash_get_block_count(void) {
return (_flash_size - RESERVED_FLASH) / FILESYSTEM_BLOCK_SIZE; return (_flash_size - CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR) / FILESYSTEM_BLOCK_SIZE;
} }
void port_internal_flash_flush(void) { void port_internal_flash_flush(void) {
@ -100,15 +96,15 @@ void port_internal_flash_flush(void) {
return; return;
} }
common_hal_mcu_disable_interrupts(); common_hal_mcu_disable_interrupts();
flash_range_erase(RESERVED_FLASH + _cache_lba, SECTOR_SIZE); flash_range_erase(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + _cache_lba, SECTOR_SIZE);
flash_range_program(RESERVED_FLASH + _cache_lba, _cache, SECTOR_SIZE); flash_range_program(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + _cache_lba, _cache, SECTOR_SIZE);
common_hal_mcu_enable_interrupts(); common_hal_mcu_enable_interrupts();
_cache_lba = NO_CACHE; _cache_lba = NO_CACHE;
} }
mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) {
memcpy(dest, memcpy(dest,
(void *)(XIP_BASE + RESERVED_FLASH + block * FILESYSTEM_BLOCK_SIZE), (void *)(XIP_BASE + CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + block * FILESYSTEM_BLOCK_SIZE),
num_blocks * FILESYSTEM_BLOCK_SIZE); num_blocks * FILESYSTEM_BLOCK_SIZE);
return 0; return 0;
} }
@ -123,7 +119,7 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32
if (_cache_lba != block_address) { if (_cache_lba != block_address) {
memcpy(_cache, memcpy(_cache,
(void *)(XIP_BASE + RESERVED_FLASH + sector_offset), (void *)(XIP_BASE + CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + sector_offset),
SECTOR_SIZE); SECTOR_SIZE);
_cache_lba = sector_offset; _cache_lba = sector_offset;
} }
@ -139,8 +135,8 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32
} }
// Make sure we don't have an interrupt while we do flash operations. // Make sure we don't have an interrupt while we do flash operations.
common_hal_mcu_disable_interrupts(); common_hal_mcu_disable_interrupts();
flash_range_erase(RESERVED_FLASH + sector_offset, SECTOR_SIZE); flash_range_erase(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + sector_offset, SECTOR_SIZE);
flash_range_program(RESERVED_FLASH + sector_offset, _cache, SECTOR_SIZE); flash_range_program(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + sector_offset, _cache, SECTOR_SIZE);
common_hal_mcu_enable_interrupts(); common_hal_mcu_enable_interrupts();
} }