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Merge pull request #8357 from eightycc/memorymap 

Add memorymap support to RP2 port
This commit is contained in:
Scott Shawcroft 2023-09-08 11:28:11 -07:00 committed by GitHub
parent 5f51853d44 0e0941d6fd
commit 885dbec599
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
9 changed files with 257 additions and 29 deletions
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17
locale/circuitpython.pot
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@ -462,9 +462,14 @@ msgstr ""
#: ports/espressif/common-hal/memorymap/AddressRange.c
#: ports/nrf/common-hal/memorymap/AddressRange.c
#: ports/raspberrypi/common-hal/memorymap/AddressRange.c
msgid "Address range not allowed"
msgstr ""
#: shared-bindings/memorymap/AddressRange.c
msgid "Address range wraps around"
msgstr ""
#: ports/espressif/common-hal/canio/CAN.c
msgid "All CAN peripherals are in use"
msgstr ""
@ -2136,6 +2141,10 @@ msgstr ""
msgid "UUID value is not str, int or byte buffer"
msgstr ""
#: ports/raspberrypi/common-hal/memorymap/AddressRange.c
msgid "Unable to access unaligned IO register"
msgstr ""
#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c
#: ports/atmel-samd/common-hal/audioio/AudioOut.c
#: ports/raspberrypi/common-hal/audiobusio/I2SOut.c
@ -2189,14 +2198,14 @@ msgstr ""
msgid "Unable to start mDNS query"
msgstr ""
#: shared-bindings/memorymap/AddressRange.c
msgid "Unable to write to address."
msgstr ""
#: shared-bindings/nvm/ByteArray.c
msgid "Unable to write to nvm."
msgstr ""
#: ports/raspberrypi/common-hal/memorymap/AddressRange.c
msgid "Unable to write to read-only memory"
msgstr ""
#: shared-bindings/alarm/SleepMemory.c
msgid "Unable to write to sleep_memory."
msgstr ""

4
ports/espressif/common-hal/memorymap/AddressRange.c
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@ -66,7 +66,7 @@ size_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange
return self->len;
}
bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
size_t start_index, uint8_t *values, size_t len) {
uint8_t *address = self->start_address + start_index;
#pragma GCC diagnostic push
@ -83,8 +83,6 @@ bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_ob
memcpy(address, values, len);
}
#pragma GCC diagnostic pop
return true;
}
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,

10
ports/nrf/common-hal/memorymap/AddressRange.c
View File

@ -90,13 +90,13 @@ void common_hal_memorymap_addressrange_construct(memorymap_addressrange_obj_t *s
self->len = length;
}
uint32_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange_obj_t *self) {
size_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange_obj_t *self) {
return self->len;
}
bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
uint32_t start_index, uint8_t *values, uint32_t len) {
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
size_t start_index, uint8_t *values, size_t len) {
uint8_t *address = self->start_address + start_index;
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-align"
@ -112,12 +112,10 @@ bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_ob
memcpy(address, values, len);
}
#pragma GCC diagnostic pop
return true;
}
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,
uint32_t start_index, uint32_t len, uint8_t *values) {
size_t start_index, size_t len, uint8_t *values) {
uint8_t *address = self->start_address + start_index;
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-align"

136
ports/raspberrypi/common-hal/memorymap/AddressRange.c Normal file
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@ -0,0 +1,136 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 microDev
* Copyright (c) 2023 Bob Abeles
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <string.h>
#include "shared-bindings/memorymap/AddressRange.h"
#include "py/runtime.h"
#include "hardware/regs/addressmap.h"
// RP2 address map ranges, must be arranged in order by ascending start address
addressmap_rp2_range_t rp2_ranges[] = {
{(uint8_t *)ROM_BASE, 0x00004000, ROM}, // boot ROM
{(uint8_t *)XIP_BASE, 0x00100000, XIP}, // XIP normal cache operation
{(uint8_t *)XIP_NOALLOC_BASE, 0x00100000, XIP}, // XIP check for hit, no update on miss
{(uint8_t *)XIP_NOCACHE_BASE, 0x00100000, XIP}, // XIP don't check for hit, no update on miss
{(uint8_t *)XIP_NOCACHE_NOALLOC_BASE, 0x00100000, XIP}, // XIP bypass cache completely
{(uint8_t *)XIP_CTRL_BASE, 0x00004000, IO}, // XIP control registers
{(uint8_t *)XIP_SRAM_BASE, 0x00004000, SRAM}, // XIP SRAM 16KB XIP cache
{(uint8_t *)XIP_SSI_BASE, 0x00004000, IO}, // XIP SSI registers
{(uint8_t *)SRAM_BASE, 0x00042000, SRAM}, // SRAM 256KB striped plus 16KB contiguous
{(uint8_t *)SRAM0_BASE, 0x00040000, SRAM}, // SRAM0 to SRAM3 256KB non-striped
{(uint8_t *)SYSINFO_BASE, 0x00070000, IO}, // APB peripherals
{(uint8_t *)DMA_BASE, 0x00004000, IO}, // DMA registers
{(uint8_t *)USBCTRL_DPRAM_BASE, 0x00001000, SRAM}, // USB DPSRAM 4KB
{(uint8_t *)USBCTRL_REGS_BASE, 0x00004000, IO}, // USB registers
{(uint8_t *)PIO0_BASE, 0x00004000, IO}, // PIO0 registers
{(uint8_t *)PIO1_BASE, 0x00004000, IO}, // PIO1 registers
{(uint8_t *)SIO_BASE, 0x00001000, IO}, // SIO registers, no aliases
{(uint8_t *)PPB_BASE, 0x00004000, IO} // PPB registers
};
void common_hal_memorymap_addressrange_construct(memorymap_addressrange_obj_t *self,
uint8_t *start_address, size_t length) {
for (size_t i = 0; i < MP_ARRAY_SIZE(rp2_ranges); i++) {
if (start_address <= rp2_ranges[i].start_address) {
uint8_t *range_end_address = rp2_ranges[i].start_address + rp2_ranges[i].len - 1;
uint8_t *end_address = start_address + length - 1;
if (start_address > range_end_address || end_address > range_end_address) {
break;
}
self->start_address = start_address;
self->len = length;
self->type = rp2_ranges[i].type;
return;
}
}
mp_raise_ValueError(translate("Address range not allowed"));
}
size_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange_obj_t *self) {
return self->len;
}
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
size_t start_index, uint8_t *values, size_t len) {
uint8_t *dest_addr = self->start_address + start_index;
switch (self->type) {
case SRAM:
// Writes to SRAM may be arbitrary length and alignment. We use memcpy() which
// may optimize aligned writes depending on CIRCUITPY_FULL_BUILD of the CP build.
memcpy(dest_addr, values, len);
break;
case IO:
if ((size_t)dest_addr & 0x03 || len & 0x03) {
// Unaligned access or unaligned length not supported by RP2 for IO registers
mp_raise_RuntimeError(translate("Unable to access unaligned IO register"));
} else {
// Aligned access and length, use 32-bit writes
uint32_t *dest_addr32 = (uint32_t *)dest_addr;
size_t access_count = len >> 2;
for (size_t i = 0; i < access_count; i++) {
*dest_addr32++ = ((uint32_t *)values)[i];
}
}
break;
case XIP:
case ROM:
// XIP and ROM are read-only
mp_raise_RuntimeError(translate("Unable to write to read-only memory"));
break;
}
}
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,
size_t start_index, size_t len, uint8_t *values) {
uint8_t *src_addr = self->start_address + start_index;
switch (self->type) {
case SRAM:
case XIP:
case ROM:
// Reads from these sources may be arbitrary length and alignment. We use memcpy()
// which may optimize aligned writes depending on CIRCUITPY_FULL_BUILD of the CP build.
memcpy(values, src_addr, len);
break;
case IO:
if ((size_t)src_addr & 0x03 || len & 0x03) {
// Unaligned access or unaligned length not supported by RP2 for IO registers
mp_raise_RuntimeError(translate("Unable to access unaligned IO register"));
} else {
// Aligned access and length, use 32-bit reads
uint32_t *src_addr32 = (uint32_t *)src_addr;
size_t access_count = len >> 2;
for (size_t i = 0; i < access_count; i++) {
((uint32_t *)values)[i] = *src_addr32++;
}
}
break;
}
}

49
ports/raspberrypi/common-hal/memorymap/AddressRange.h Normal file
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@ -0,0 +1,49 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 microDev
* Copyright (c) 2023 Bob Abeles
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_MEMORYMAP_ADDRESSRANGE_H
#define MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_MEMORYMAP_ADDRESSRANGE_H
#include "py/obj.h"
// depending on the section memory type, different access methods and rules apply
typedef enum { SRAM, ROM, XIP, IO } memorymap_rp2_section_t;
typedef struct {
mp_obj_base_t base;
uint8_t *start_address;
size_t len;
memorymap_rp2_section_t type;
} memorymap_addressrange_obj_t;
typedef struct {
uint8_t *start_address;
size_t len;
memorymap_rp2_section_t type;
} addressmap_rp2_range_t;
#endif // MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_MEMORYMAP_ADDRESSRANGE_H

1
ports/raspberrypi/common-hal/memorymap/__init__.c Normal file
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@ -0,0 +1 @@
// No memorymap module functions.

1
ports/raspberrypi/mpconfigport.mk
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@ -15,6 +15,7 @@ CIRCUITPY_FULL_BUILD ?= 1
CIRCUITPY_AUDIOMP3 ?= 1
CIRCUITPY_BITOPS ?= 1
CIRCUITPY_IMAGECAPTURE ?= 1
CIRCUITPY_MEMORYMAP ?= 1
CIRCUITPY_PWMIO ?= 1
CIRCUITPY_RGBMATRIX ?= $(CIRCUITPY_DISPLAYIO)
CIRCUITPY_ROTARYIO ?= 1

60
shared-bindings/memorymap/AddressRange.c
View File

@ -47,6 +47,32 @@
//| import memorymap
//| rtc_slow_mem = memorymap.AddressRange(start=0x50000000, length=0x2000)
//| rtc_slow_mem[0:3] = b"\xcc\x10\x00"
//|
//| Example I/O register usage on RP2040::
//|
//| import binascii
//| import board
//| import digitalio
//| import memorymap
//|
//| def rp2040_set_pad_drive(p, d):
//| pads_bank0 = memorymap.AddressRange(start=0x4001C000, length=0x4000)
//| pad_ctrl = int.from_bytes(pads_bank0[p*4+4:p*4+8], "little")
//| # Pad control register is updated using an MP-safe atomic XOR
//| pad_ctrl ^= (d << 4)
//| pad_ctrl &= 0x00000030
//| pads_bank0[p*4+0x3004:p*4+0x3008] = pad_ctrl.to_bytes(4, "little")
//|
//| def rp2040_get_pad_drive(p):
//| pads_bank0 = memorymap.AddressRange(start=0x4001C000, length=0x4000)
//| pad_ctrl = int.from_bytes(pads_bank0[p*4+4:p*4+8], "little")
//| return (pad_ctrl >> 4) & 0x3
//|
//| # set GPIO16 pad drive strength to 12 mA
//| rp2040_set_pad_drive(16, 3)
//|
//| # print GPIO16 pad drive strength
//| print(rp2040_get_pad_drive(16))
//| """
//| def __init__(self, *, start, length) -> None:
@ -57,17 +83,29 @@
STATIC mp_obj_t memorymap_addressrange_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
enum { ARG_start, ARG_length };
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_start, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_start, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ },
{ MP_QSTR_length, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT },
};
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
size_t start =
mp_arg_validate_int_min(args[ARG_start].u_int, 0, MP_QSTR_start);
// Argument start is a pointer into the address map, so we validate it here because a
// signed int argument will overflow if it is in the upper half of the map.
size_t start;
if (mp_obj_is_small_int(args[ARG_start].u_obj)) {
start = MP_OBJ_SMALL_INT_VALUE(args[ARG_start].u_obj);
} else if (mp_obj_is_type(args[ARG_start].u_obj, &mp_type_int)) {
start = mp_obj_int_get_uint_checked(args[ARG_start].u_obj);
} else {
mp_obj_t arg = mp_unary_op(MP_UNARY_OP_INT, args[ARG_start].u_obj);
start = mp_obj_int_get_uint_checked(arg);
}
size_t length =
mp_arg_validate_int_min(args[ARG_length].u_int, 1, MP_QSTR_length);
// Check for address range wrap here as this can break port-specific code due to size_t overflow.
if (start + length - 1 < start) {
mp_raise_ValueError(translate("Address range wraps around"));
}
memorymap_addressrange_obj_t *self = mp_obj_malloc(memorymap_addressrange_obj_t, &memorymap_addressrange_type);
@ -104,7 +142,8 @@ STATIC MP_DEFINE_CONST_DICT(memorymap_addressrange_locals_dict, memorymap_addres
//| def __getitem__(self, index: int) -> int:
//| """Returns the value(s) at the given index.
//|
//| 1, 2, 4 and 8 byte aligned reads will be done in one transaction.
//| 1, 2, 4 and 8 byte aligned reads will be done in one transaction
//| when possible.
//| All others may use multiple transactions."""
//| ...
//| @overload
@ -113,7 +152,8 @@ STATIC MP_DEFINE_CONST_DICT(memorymap_addressrange_locals_dict, memorymap_addres
//| def __setitem__(self, index: int, value: int) -> None:
//| """Set the value(s) at the given index.
//|
//| 1, 2, 4 and 8 byte aligned writes will be done in one transaction.
//| 1, 2, 4 and 8 byte aligned writes will be done in one transaction
//| when possible.
//| All others may use multiple transactions."""
//| ...
//|
@ -154,9 +194,7 @@ STATIC mp_obj_t memorymap_addressrange_subscr(mp_obj_t self_in, mp_obj_t index_i
mp_raise_NotImplementedError(translate("array/bytes required on right side"));
}
if (!common_hal_memorymap_addressrange_set_bytes(self, slice.start, src_items, src_len)) {
mp_raise_RuntimeError(translate("Unable to write to address."));
}
common_hal_memorymap_addressrange_set_bytes(self, slice.start, src_items, src_len);
return mp_const_none;
#else
return MP_OBJ_NULL; // op not supported
@ -184,9 +222,7 @@ STATIC mp_obj_t memorymap_addressrange_subscr(mp_obj_t self_in, mp_obj_t index_i
mp_arg_validate_int_range(byte_value, 0, 255, MP_QSTR_bytes);
uint8_t short_value = byte_value;
if (!common_hal_memorymap_addressrange_set_bytes(self, index, &short_value, 1)) {
mp_raise_RuntimeError(translate("Unable to write to address."));
}
common_hal_memorymap_addressrange_set_bytes(self, index, &short_value, 1);
return mp_const_none;
}
}

8
shared-bindings/memorymap/AddressRange.h
View File

@ -33,14 +33,14 @@ extern const mp_obj_type_t memorymap_addressrange_type;
void common_hal_memorymap_addressrange_construct(memorymap_addressrange_obj_t *self, uint8_t *start_address, size_t length);
uint32_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange_obj_t *self);
size_t common_hal_memorymap_addressrange_get_length(const memorymap_addressrange_obj_t *self);
bool common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
uint32_t start_index, uint8_t *values, uint32_t len);
void common_hal_memorymap_addressrange_set_bytes(const memorymap_addressrange_obj_t *self,
size_t start_index, uint8_t *values, size_t len);
// len and values are intentionally swapped to signify values is an output and
// also leverage the compiler to validate uses are expected.
void common_hal_memorymap_addressrange_get_bytes(const memorymap_addressrange_obj_t *self,
uint32_t start_index, uint32_t len, uint8_t *values);
size_t start_index, size_t len, uint8_t *values);
#endif // MICROPY_INCLUDED_SHARED_BINDINGS_MEMORYMAP_ADDRESSRANGE_H