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stmhal: Add support for the STM32F429I-DISCO kit by STMicro.

This commit is contained in:
Tobias Badertscher 2015-11-24 14:35:24 +01:00 committed by Damien George
parent f32020ef3d
commit 8844d031e4
11 changed files with 995 additions and 12 deletions
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50
stmhal/boards/STM32F429DISC/mpconfigboard.h Normal file
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#define MICROPY_HW_BOARD_NAME "F429I-DISCO"
#define MICROPY_HW_MCU_NAME "STM32F429"
#define MICROPY_HW_HAS_SWITCH (1)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (1)
#define MICROPY_HW_ENABLE_RTC (1)
#define MICROPY_HW_ENABLE_TIMER (1)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_SPI1 (0)
#define MICROPY_HW_ENABLE_SPI2 (0)
#define MICROPY_HW_ENABLE_SPI3 (0)
#define MICROPY_HW_ENABLE_CAN (1)
// HSE is 8MHz
#define MICROPY_HW_CLK_PLLM (8)
#define MICROPY_HW_CLK_PLLN (336)
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
#define MICROPY_HW_CLK_PLLQ (7)
// UART config
#define MICROPY_HW_UART1_PORT (GPIOA)
#define MICROPY_HW_UART1_PINS (GPIO_PIN_9 | GPIO_PIN_10)
#define MICROPY_HW_UART2_PORT (GPIOD)
#define MICROPY_HW_UART2_PINS (GPIO_PIN_8 | GPIO_PIN_9)
// I2C busses
#define MICROPY_HW_I2C1_SCL (pin_A8)
#define MICROPY_HW_I2C1_SDA (pin_C9)
// USRSW is pulled low. Pressing the button makes the input go high.
#define MICROPY_HW_USRSW_PIN (pin_A0)
#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
#define MICROPY_HW_USRSW_PRESSED (1)
// LEDs
#define MICROPY_HW_LED1 (pin_G14) // red
#define MICROPY_HW_LED2 (pin_G13) // green
#define MICROPY_HW_LED_OTYPE (GPIO_MODE_OUTPUT_PP)
#define MICROPY_HW_LED_ON(pin) (pin->gpio->BSRRL = pin->pin_mask)
#define MICROPY_HW_LED_OFF(pin) (pin->gpio->BSRRH = pin->pin_mask)
// USB config
#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_B13)
#define MICROPY_HW_USB_OTG_ID_PIN (pin_B12)

4
stmhal/boards/STM32F429DISC/mpconfigboard.mk Normal file
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MCU_SERIES = f4
CMSIS_MCU = STM32F429xx
AF_FILE = boards/stm32f429_af.csv
LD_FILE = boards/stm32f429.ld

117
stmhal/boards/STM32F429DISC/pins.csv Normal file
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@ -0,0 +1,117 @@
PF4,PF4
PF5,PF5
PF2,PF2
PF3,PF3
PF0,PF0
PF1,PF1
PC14,PC14
PC15,PC15
PE6,PE6
PC13,PC13
PE4,PE4
PE5,PE5
PE2,PE2
PE3,PE3
PE0,PE0
PE1,PE1
PB8,PB8
PB9,PB9
PB6,PB6
PB7,PB7
PB4,PB4
PB5,PB5
PG15,PG15
PB3,PB3
PG13,PG13
PG14,PG14
PG11,PG11
PG12,PG12
PG9,PG9
PG10,PG10
PD7,PD7
PD6,PD6
PD5,PD5
PD4,PD4
PD3,PD3
PD2,PD2
PD1,PD1
PD0,PD0
PC12,PC12
PC11,PC11
PC10,PC10
PA15,PA15
PA14,PA14
PA13,PA13
PA12,PA12
PA11,PA11
PA10,PA10
PA9,PA9
PA8,PA8
PC9,PC9
PC8,PC8
PC7,PC7
PC6,PC6
PG8,PG8
PG7,PG7
PG6,PG6
PG5,PG5
PG4,PG4
PF6,PF6
PF8,PF8
PF7,PF7
PF10,PF10
PF9,PF9
PH1,PH1
PH0,PH0
PC1,PC1
PC0,PC0
PC3,PC3
PC2,PC2
PA1,PA1
PA0,PA0
PA3,PA3
PA2,PA2
PA5,PA5
PA4,PA4
PA7,PA7
PA6,PA6
PC5,PC5
PC4,PC4
PB1,PB1
PB0,PB0
PB2,PB2
PF12,PF12
PF11,PF11
PF14,PF14
PF13,PF13
PG0,PG0
PF15,PF15
PE7,PE7
PG1,PG1
PE9,PE9
PE8,PE8
PE11,PE11
PE10,PE10
PE13,PE13
PE12,PE12
PE15,PE15
PE14,PE14
PB11,PB11
PB10,PB10
PB13,PB13
PB12,PB12
PB15,PB15
PB14,PB14
PD9,PD9
PD8,PD8
PD11,PD11
PD10,PD10
PD13,PD13
PD12,PD12
PD15,PD15
PD14,PD14
PG3,PG3
PG2,PG2
SW,PA0
LED_GREEN,PG13
LED_RED,PG14
1 PF4 PF4
2 PF5 PF5
3 PF2 PF2
4 PF3 PF3
5 PF0 PF0
6 PF1 PF1
7 PC14 PC14
8 PC15 PC15
9 PE6 PE6
10 PC13 PC13
11 PE4 PE4
12 PE5 PE5
13 PE2 PE2
14 PE3 PE3
15 PE0 PE0
16 PE1 PE1
17 PB8 PB8
18 PB9 PB9
19 PB6 PB6
20 PB7 PB7
21 PB4 PB4
22 PB5 PB5
23 PG15 PG15
24 PB3 PB3
25 PG13 PG13
26 PG14 PG14
27 PG11 PG11
28 PG12 PG12
29 PG9 PG9
30 PG10 PG10
31 PD7 PD7
32 PD6 PD6
33 PD5 PD5
34 PD4 PD4
35 PD3 PD3
36 PD2 PD2
37 PD1 PD1
38 PD0 PD0
39 PC12 PC12
40 PC11 PC11
41 PC10 PC10
42 PA15 PA15
43 PA14 PA14
44 PA13 PA13
45 PA12 PA12
46 PA11 PA11
47 PA10 PA10
48 PA9 PA9
49 PA8 PA8
50 PC9 PC9
51 PC8 PC8
52 PC7 PC7
53 PC6 PC6
54 PG8 PG8
55 PG7 PG7
56 PG6 PG6
57 PG5 PG5
58 PG4 PG4
59 PF6 PF6
60 PF8 PF8
61 PF7 PF7
62 PF10 PF10
63 PF9 PF9
64 PH1 PH1
65 PH0 PH0
66 PC1 PC1
67 PC0 PC0
68 PC3 PC3
69 PC2 PC2
70 PA1 PA1
71 PA0 PA0
72 PA3 PA3
73 PA2 PA2
74 PA5 PA5
75 PA4 PA4
76 PA7 PA7
77 PA6 PA6
78 PC5 PC5
79 PC4 PC4
80 PB1 PB1
81 PB0 PB0
82 PB2 PB2
83 PF12 PF12
84 PF11 PF11
85 PF14 PF14
86 PF13 PF13
87 PG0 PG0
88 PF15 PF15
89 PE7 PE7
90 PG1 PG1
91 PE9 PE9
92 PE8 PE8
93 PE11 PE11
94 PE10 PE10
95 PE13 PE13
96 PE12 PE12
97 PE15 PE15
98 PE14 PE14
99 PB11 PB11
100 PB10 PB10
101 PB13 PB13
102 PB12 PB12
103 PB15 PB15
104 PB14 PB14
105 PD9 PD9
106 PD8 PD8
107 PD11 PD11
108 PD10 PD10
109 PD13 PD13
110 PD12 PD12
111 PD15 PD15
112 PD14 PD14
113 PG3 PG3
114 PG2 PG2
115 SW PA0
116 LED_GREEN PG13
117 LED_RED PG14

407
stmhal/boards/STM32F429DISC/stm32f4xx_hal_conf.h Normal file
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/**
******************************************************************************
* @file stm32f4xx_hal_conf.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-June-2014
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H
#define __STM32F4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
#define USE_USB_HS_IN_FS
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_CAN_MODULE_ENABLED
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/* #define HAL_DCMI_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
#define HAL_FLASH_MODULE_ENABLED
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
/* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_PCD_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)40000)
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
#define INSTRUCTION_CACHE_ENABLE 1
#define DATA_CACHE_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1 */
/* ################## Ethernet peripheral configuration ##################### */
/* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2
#define MAC_ADDR1 0
#define MAC_ADDR2 0
#define MAC_ADDR3 0
#define MAC_ADDR4 0
#define MAC_ADDR5 0
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* DP83848 PHY Address*/
#define DP83848_PHY_ADDRESS 0x01
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FF)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
#define PHY_READ_TO ((uint32_t)0x0000FFFF)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */
#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */
#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */
#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

130
stmhal/boards/stm32f429.ld Normal file
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/*
GNU linker script for STM32F429i-Discovery kit with external 8MByte SDRam
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x0200000 /* entire flash, 2048 KiB */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 0x0004000 /* sector 0, 16 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x0088000 /* sectors 5,6,7,8, 4*128KiB = 512 KiB (could increase it more) */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x0030000 /* 192 KiB */
SDRAM(xrw) : ORIGIN = 0xC0000000, LENGTH = 0x0800000 /* 8 MByte */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM) - 1;
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x2001c000; /* tunable */
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/*
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} >FLASH
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
*/
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
_ram_start = .; /* create a global symbol at ram start for garbage collector */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
_heap_start = .; /* define a global symbol at heap start */
. = . + _minimum_heap_size;
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
/* Remove information from the standard libraries */
/*
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
*/
.ARM.attributes 0 : { *(.ARM.attributes) }
}

170
stmhal/boards/stm32f429_af.csv Normal file
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Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS,
PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,
PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1
PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2
PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3
PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4
PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5
PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6
PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7
PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT,
PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT,
PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT,
PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT,
PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT,
PortA,PA13,JTMS-SWDIO,,,,,,,,,,,,,,,EVENTOUT,
PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT,
PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT,
PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8
PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9
PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT,
PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT,
PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT,
PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT,
PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT,
PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT,
PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT,
PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT,
PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT,
PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT,
PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT,
PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT,
PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT,
PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10
PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11
PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12
PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13
PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14
PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15
PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT,
PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT,
PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT,
PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT,
PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT,
PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT,
PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT,
PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,
PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,
PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,
PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT,
PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT,
PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT,
PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,
PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT,
PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT,
PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,
PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,
PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT,
PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT,
PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT,
PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT,
PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,
PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT,
PortE,PE0,,,TIM4_ETR,,,,,,UART8_Rx,,,,FMC_NBL0,DCMI_D2,,EVENTOUT,
PortE,PE1,,,,,,,,,UART8_Tx,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
PortE,PE7,,TIM1_ETR,,,,,,,UART7_Rx,,,,FMC_D4,,,EVENTOUT,
PortE,PE8,,TIM1_CH1N,,,,,,,UART7_Tx,,,,FMC_D5,,,EVENTOUT,
PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT,
PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT,
PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,FMC_D8,,LCD_G3,EVENTOUT,
PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,FMC_D9,,LCD_B4,EVENTOUT,
PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,FMC_D10,,LCD_DE,EVENTOUT,
PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,FMC_D11,,LCD_CLK,EVENTOUT,
PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT,
PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,
PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,
PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_Rx,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4
PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_Tx,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5
PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6
PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7
PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8
PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT,
PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,
PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT,
PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT,
PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT,
PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT,
PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT,
PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT,
PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT,
PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT,
PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT,
PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT,
PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT,
PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT,
PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT,
PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT,
PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT,
PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT,
PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT,
PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT,
PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT,
PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,
PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,
PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT,
PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT,
PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT,
PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT,
PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,,
PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,,
PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT,
PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT,
PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT,
PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT,
PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT,
PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT,
PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT,
PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT,
PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT,
PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT,
PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT,
PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT,
PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT,
PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT,
PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT,
PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT,
PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT,
PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT,
PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT,
PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT,
PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT,
PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT,
PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT,
PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT,
PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT,
PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT,
PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT,
PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT,
PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT,
PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT,
PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT,
PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT,
PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT,
PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT,
PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT,
PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT,
PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT,
PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT,
PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT,
PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT,
PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT,
PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT,
PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT,
PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT,
PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT,
PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT,
PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT,
PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT,
1 Port AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF15
2 SYS TIM1/2 TIM3/4/5 TIM8/9/10/11 I2C1/2/3 SPI1/2/3/4/5/6 SPI2/3/SAI1 SPI3/USART1/2/3 USART6/UART4/5/7/8 CAN1/2/TIM12/13/14/LCD OTG2_HS/OTG1_FS ETH FMC/SDIO/OTG2_FS DCMI LCD SYS
3 PortA PA0 TIM2_CH1/TIM2_ETR TIM5_CH1 TIM8_ETR USART2_CTS UART4_TX ETH_MII_CRS EVENTOUT
4 PortA PA1 TIM2_CH2 TIM5_CH2 USART2_RTS UART4_RX ETH_MII_RX_CLK/ETH_RMII_REF_CLK EVENTOUT ADC123_IN1
5 PortA PA2 TIM2_CH3 TIM5_CH3 TIM9_CH1 USART2_TX ETH_MDIO EVENTOUT ADC123_IN2
6 PortA PA3 TIM2_CH4 TIM5_CH4 TIM9_CH2 USART2_RX OTG_HS_ULPI_D0 ETH_MII_COL LCD_B5 EVENTOUT ADC123_IN3
7 PortA PA4 SPI1_NSS SPI3_NSS/I2S3_WS USART2_CK OTG_HS_SOF DCMI_HSYNC LCD_VSYNC EVENTOUT ADC12_IN4
8 PortA PA5 TIM2_CH1/TIM2_ETR TIM8_CH1N SPI1_SCK OTG_HS_ULPI_CK EVENTOUT ADC12_IN5
9 PortA PA6 TIM1_BKIN TIM3_CH1 TIM8_BKIN SPI1_MISO TIM13_CH1 DCMI_PIXCLK LCD_G2 EVENTOUT ADC12_IN6
10 PortA PA7 TIM1_CH1N TIM3_CH2 TIM8_CH1N SPI1_MOSI TIM14_CH1 ETH_MII_RX_DV/ETH_RMII_CRS_DV EVENTOUT ADC12_IN7
11 PortA PA8 MCO1 TIM1_CH1 I2C3_SCL USART1_CK OTG_FS_SOF LCD_R6 EVENTOUT
12 PortA PA9 TIM1_CH2 I2C3_SMBA USART1_TX DCMI_D0 EVENTOUT
13 PortA PA10 TIM1_CH3 USART1_RX OTG_FS_ID DCMI_D1 EVENTOUT
14 PortA PA11 TIM1_CH4 USART1_CTS CAN1_RX OTG_FS_DM LCD_R4 EVENTOUT
15 PortA PA12 TIM1_ETR USART1_RTS CAN1_TX OTG_FS_DP LCD_R5 EVENTOUT
16 PortA PA13 JTMS-SWDIO EVENTOUT
17 PortA PA14 JTCK-SWCLK EVENTOUT
18 PortA PA15 JTDI TIM2_CH1/TIM2_ETR SPI1_NSS SPI3_NSS/I2S3_WS EVENTOUT
19 PortB PB0 TIM1_CH2N TIM3_CH3 TIM8_CH2N LCD_R3 OTG_HS_ULPI_D1 ETH_MII_RXD2 EVENTOUT ADC12_IN8
20 PortB PB1 TIM1_CH3N TIM3_CH4 TIM8_CH3N LCD_R6 OTG_HS_ULPI_D2 ETH_MII_RXD3 EVENTOUT ADC12_IN9
21 PortB PB2 EVENTOUT
22 PortB PB3 JTDO/TRACESWO TIM2_CH2 SPI1_SCK SPI3_SCK/I2S3_CK EVENTOUT
23 PortB PB4 NJTRST TIM3_CH1 SPI1_MISO SPI3_MISO I2S3ext_SD EVENTOUT
24 PortB PB5 TIM3_CH2 I2C1_SMBA SPI1_MOSI SPI3_MOSI/I2S3_SD CAN2_RX OTG_HS_ULPI_D7 ETH_PPS_OUT FMC_SDCKE1 DCMI_D10 EVENTOUT
25 PortB PB6 TIM4_CH1 I2C1_SCL USART1_TX CAN2_TX FMC_SDNE1 DCMI_D5 EVENTOUT
26 PortB PB7 TIM4_CH2 I2C1_SDA USART1_RX FMC_NL DCMI_VSYNC EVENTOUT
27 PortB PB8 TIM4_CH3 TIM10_CH1 I2C1_SCL CAN1_RX ETH_MII_TXD3 SDIO_D4 DCMI_D6 LCD_B6 EVENTOUT
28 PortB PB9 TIM4_CH4 TIM11_CH1 I2C1_SDA SPI2_NSS/I2S2_WS CAN1_TX SDIO_D5 DCMI_D7 LCD_B7 EVENTOUT
29 PortB PB10 TIM2_CH3 I2C2_SCL SPI2_SCK/I2S2_CK USART3_TX OTG_HS_ULPI_D3 ETH_MII_RX_ER LCD_G4 EVENTOUT
30 PortB PB11 TIM2_CH4 I2C2_SDA USART3_RX OTG_HS_ULPI_D4 ETH_MII_TX_EN/ETH_RMII_TX_EN LCD_G5 EVENTOUT
31 PortB PB12 TIM1_BKIN I2C2_SMBA SPI2_NSS/I2S2_WS USART3_CK CAN2_RX OTG_HS_ULPI_D5 ETH_MII_TXD0/ETH_RMII_TXD0 OTG_HS_ID EVENTOUT
32 PortB PB13 TIM1_CH1N SPI2_SCK/I2S2_CK USART3_CTS CAN2_TX OTG_HS_ULPI_D6 ETH_MII_TXD1/ETH_RMII_TXD1 EVENTOUT
33 PortB PB14 TIM1_CH2N TIM8_CH2N SPI2_MISO I2S2ext_SD USART3_RTS TIM12_CH1 OTG_HS_DM EVENTOUT
34 PortB PB15 RTC_REFIN TIM1_CH3N TIM8_CH3N SPI2_MOSI/I2S2_SD TIM12_CH2 OTG_HS_DP EVENTOUT
35 PortC PC0 OTG_HS_ULPI_STP FMC_SDNWE EVENTOUT ADC123_IN10
36 PortC PC1 ETH_MDC EVENTOUT ADC123_IN11
37 PortC PC2 SPI2_MISO I2S2ext_SD OTG_HS_ULPI_DIR ETH_MII_TXD2 FMC_SDNE0 EVENTOUT ADC123_IN12
38 PortC PC3 SPI2_MOSI/I2S2_SD OTG_HS_ULPI_NXT ETH_MII_TX_CLK FMC_SDCKE0 EVENTOUT ADC123_IN13
39 PortC PC4 ETH_MII_RXD0/ETH_RMII_RXD0 EVENTOUT ADC12_IN14
40 PortC PC5 ETH_MII_RXD1/ETH_RMII_RXD1 EVENTOUT ADC12_IN15
41 PortC PC6 TIM3_CH1 TIM8_CH1 I2S2_MCK USART6_TX SDIO_D6 DCMI_D0 LCD_HSYNC EVENTOUT
42 PortC PC7 TIM3_CH2 TIM8_CH2 I2S3_MCK USART6_RX SDIO_D7 DCMI_D1 LCD_G6 EVENTOUT
43 PortC PC8 TIM3_CH3 TIM8_CH3 USART6_CK SDIO_D0 DCMI_D2 EVENTOUT
44 PortC PC9 MCO2 TIM3_CH4 TIM8_CH4 I2C3_SDA I2S_CKIN SDIO_D1 DCMI_D3 EVENTOUT
45 PortC PC10 SPI3_SCK/I2S3_CK USART3_TX UART4_TX SDIO_D2 DCMI_D8 LCD_R2 EVENTOUT
46 PortC PC11 I2S3ext_SD SPI3_MISO USART3_RX UART4_RX SDIO_D3 DCMI_D4 EVENTOUT
47 PortC PC12 SPI3_MOSI/I2S3_SD USART3_CK UART5_TX SDIO_CK DCMI_D9 EVENTOUT
48 PortC PC13 EVENTOUT
49 PortC PC14 EVENTOUT
50 PortC PC15 EVENTOUT
51 PortD PD0 CAN1_RX FMC_D2 EVENTOUT
52 PortD PD1 CAN1_TX FMC_D3 EVENTOUT
53 PortD PD2 TIM3_ETR UART5_RX SDIO_CMD DCMI_D11 EVENTOUT
54 PortD PD3 SPI2_SCK/I2S2_CK USART2_CTS FMC_CLK DCMI_D5 LCD_G7 EVENTOUT
55 PortD PD4 USART2_RTS FMC_NOE EVENTOUT
56 PortD PD5 USART2_TX FMC_NWE EVENTOUT
57 PortD PD6 SPI3_MOSI/I2S3_SD SAI1_SD_A USART2_RX FMC_NWAIT DCMI_D10 LCD_B2 EVENTOUT
58 PortD PD7 USART2_CK FMC_NE1/FMC_NCE2 EVENTOUT
59 PortD PD8 USART3_TX FMC_D13 EVENTOUT
60 PortD PD9 USART3_RX FMC_D14 EVENTOUT
61 PortD PD10 USART3_CK FMC_D15 LCD_B3 EVENTOUT
62 PortD PD11 USART3_CTS FMC_A16 EVENTOUT
63 PortD PD12 TIM4_CH1 USART3_RTS FMC_A17 EVENTOUT
64 PortD PD13 TIM4_CH2 FMC_A18 EVENTOUT
65 PortD PD14 TIM4_CH3 FMC_D0 EVENTOUT
66 PortD PD15 TIM4_CH4 FMC_D1 EVENTOUT
67 PortE PE0 TIM4_ETR UART8_Rx FMC_NBL0 DCMI_D2 EVENTOUT
68 PortE PE1 UART8_Tx FMC_NBL1 DCMI_D3 EVENTOUT
69 PortE PE2 TRACECLK SPI4_SCK SAI1_MCLK_A ETH_MII_TXD3 FMC_A23 EVENTOUT
70 PortE PE3 TRACED0 SAI1_SD_B FMC_A19 EVENTOUT
71 PortE PE4 TRACED1 SPI4_NSS SAI1_FS_A FMC_A20 DCMI_D4 LCD_B0 EVENTOUT
72 PortE PE5 TRACED2 TIM9_CH1 SPI4_MISO SAI1_SCK_A FMC_A21 DCMI_D6 LCD_G0 EVENTOUT
73 PortE PE6 TRACED3 TIM9_CH2 SPI4_MOSI SAI1_SD_A FMC_A22 DCMI_D7 LCD_G1 EVENTOUT
74 PortE PE7 TIM1_ETR UART7_Rx FMC_D4 EVENTOUT
75 PortE PE8 TIM1_CH1N UART7_Tx FMC_D5 EVENTOUT
76 PortE PE9 TIM1_CH1 FMC_D6 EVENTOUT
77 PortE PE10 TIM1_CH2N FMC_D7 EVENTOUT
78 PortE PE11 TIM1_CH2 SPI4_NSS FMC_D8 LCD_G3 EVENTOUT
79 PortE PE12 TIM1_CH3N SPI4_SCK FMC_D9 LCD_B4 EVENTOUT
80 PortE PE13 TIM1_CH3 SPI4_MISO FMC_D10 LCD_DE EVENTOUT
81 PortE PE14 TIM1_CH4 SPI4_MOSI FMC_D11 LCD_CLK EVENTOUT
82 PortE PE15 TIM1_BKIN FMC_D12 LCD_R7 EVENTOUT
83 PortF PF0 I2C2_SDA FMC_A0 EVENTOUT
84 PortF PF1 I2C2_SCL FMC_A1 EVENTOUT
85 PortF PF2 I2C2_SMBA FMC_A2 EVENTOUT
86 PortF PF3 FMC_A3 EVENTOUT ADC3_IN9
87 PortF PF4 FMC_A4 EVENTOUT ADC3_IN14
88 PortF PF5 FMC_A5 EVENTOUT ADC3_IN15
89 PortF PF6 TIM10_CH1 SPI5_NSS SAI1_SD_B UART7_Rx FMC_NIORD EVENTOUT ADC3_IN4
90 PortF PF7 TIM11_CH1 SPI5_SCK SAI1_MCLK_B UART7_Tx FMC_NREG EVENTOUT ADC3_IN5
91 PortF PF8 SPI5_MISO SAI1_SCK_B TIM13_CH1 FMC_NIOWR EVENTOUT ADC3_IN6
92 PortF PF9 SPI5_MOSI SAI1_FS_B TIM14_CH1 FMC_CD EVENTOUT ADC3_IN7
93 PortF PF10 FMC_INTR DCMI_D11 LCD_DE EVENTOUT ADC3_IN8
94 PortF PF11 SPI5_MOSI FMC_SDNRAS DCMI_D12 EVENTOUT
95 PortF PF12 FMC_A6 EVENTOUT
96 PortF PF13 FMC_A7 EVENTOUT
97 PortF PF14 FMC_A8 EVENTOUT
98 PortF PF15 FMC_A9 EVENTOUT
99 PortG PG0 FMC_A10 EVENTOUT
100 PortG PG1 FMC_A11 EVENTOUT
101 PortG PG2 FMC_A12 EVENTOUT
102 PortG PG3 FMC_A13 EVENTOUT
103 PortG PG4 FMC_A14/FMC_BA0 EVENTOUT
104 PortG PG5 FMC_A15/FMC_BA1 EVENTOUT
105 PortG PG6 FMC_INT2 DCMI_D12 LCD_R7 EVENTOUT
106 PortG PG7 USART6_CK FMC_INT3 DCMI_D13 LCD_CLK EVENTOUT
107 PortG PG8 SPI6_NSS USART6_RTS ETH_PPS_OUT FMC_SDCLK EVENTOUT
108 PortG PG9 USART6_RX FMC_NE2/FMC_NCE3 DCMI_VSYNC(1) EVENTOUT
109 PortG PG10 LCD_G3 FMC_NCE4_1/FMC_NE3 DCMI_D2 LCD_B2 EVENTOUT
110 PortG PG11 ETH_MII_TX_EN/ETH_RMII_TX_EN FMC_NCE4_2 DCMI_D3 LCD_B3 EVENTOUT
111 PortG PG12 SPI6_MISO USART6_RTS LCD_B4 FMC_NE4 LCD_B1 EVENTOUT
112 PortG PG13 SPI6_SCK USART6_CTS ETH_MII_TXD0/ETH_RMII_TXD0 FMC_A24 EVENTOUT
113 PortG PG14 SPI6_MOSI USART6_TX ETH_MII_TXD1/ETH_RMII_TXD1 FMC_A25 EVENTOUT
114 PortG PG15 USART6_CTS FMC_SDNCAS DCMI_D13 EVENTOUT
115 PortH PH0 EVENTOUT
116 PortH PH1 EVENTOUT
117 PortH PH2 ETH_MII_CRS FMC_SDCKE0 LCD_R0 EVENTOUT
118 PortH PH3 ETH_MII_COL FMC_SDNE0 LCD_R1 EVENTOUT
119 PortH PH4 I2C2_SCL OTG_HS_ULPI_NXT EVENTOUT
120 PortH PH5 I2C2_SDA SPI5_NSS FMC_SDNWE EVENTOUT
121 PortH PH6 I2C2_SMBA SPI5_SCK TIM12_CH1 FMC_SDNE1 DCMI_D8
122 PortH PH7 I2C3_SCL SPI5_MISO ETH_MII_RXD3 FMC_SDCKE1 DCMI_D9
123 PortH PH8 I2C3_SDA FMC_D16 DCMI_HSYNC LCD_R2 EVENTOUT
124 PortH PH9 I2C3_SMBA TIM12_CH2 FMC_D17 DCMI_D0 LCD_R3 EVENTOUT
125 PortH PH10 TIM5_CH1 FMC_D18 DCMI_D1 LCD_R4 EVENTOUT
126 PortH PH11 TIM5_CH2 FMC_D19 DCMI_D2 LCD_R5 EVENTOUT
127 PortH PH12 TIM5_CH3 FMC_D20 DCMI_D3 LCD_R6 EVENTOUT
128 PortH PH13 TIM8_CH1N CAN1_TX FMC_D21 LCD_G2 EVENTOUT
129 PortH PH14 TIM8_CH2N FMC_D22 DCMI_D4 LCD_G3 EVENTOUT
130 PortH PH15 TIM8_CH3N FMC_D23 DCMI_D11 LCD_G4 EVENTOUT
131 PortI PI0 TIM5_CH4 SPI2_NSS/I2S2_WS FMC_D24 DCMI_D13 LCD_G5 EVENTOUT
132 PortI PI1 SPI2_SCK/I2S2_CK FMC_D25 DCMI_D8 LCD_G6 EVENTOUT
133 PortI PI2 TIM8_CH4 SPI2_MISO I2S2ext_SD FMC_D26 DCMI_D9 LCD_G7 EVENTOUT
134 PortI PI3 TIM8_ETR SPI2_MOSI/I2S2_SD FMC_D27 DCMI_D10 EVENTOUT
135 PortI PI4 TIM8_BKIN FMC_NBL2 DCMI_D5 LCD_B4 EVENTOUT
136 PortI PI5 TIM8_CH1 FMC_NBL3 DCMI_VSYNC LCD_B5 EVENTOUT
137 PortI PI6 TIM8_CH2 FMC_D28 DCMI_D6 LCD_B6 EVENTOUT
138 PortI PI7 TIM8_CH3 FMC_D29 DCMI_D7 LCD_B7 EVENTOUT
139 PortI PI8 EVENTOUT
140 PortI PI9 CAN1_RX FMC_D30 LCD_VSYNC EVENTOUT
141 PortI PI10 ETH_MII_RX_ER FMC_D31 LCD_HSYNC EVENTOUT
142 PortI PI11 OTG_HS_ULPI_DIR EVENTOUT
143 PortI PI12 LCD_HSYNC EVENTOUT
144 PortI PI13 LCD_VSYNC EVENTOUT
145 PortI PI14 LCD_CLK EVENTOUT
146 PortI PI15 LCD_R0 EVENTOUT
147 PortJ PJ0 LCD_R1 EVENTOUT
148 PortJ PJ1 LCD_R2 EVENTOUT
149 PortJ PJ2 LCD_R3 EVENTOUT
150 PortJ PJ3 LCD_R4 EVENTOUT
151 PortJ PJ4 LCD_R5 EVENTOUT
152 PortJ PJ5 LCD_R6 EVENTOUT
153 PortJ PJ6 LCD_R7 EVENTOUT
154 PortJ PJ7 LCD_G0 EVENTOUT
155 PortJ PJ8 LCD_G1 EVENTOUT
156 PortJ PJ9 LCD_G2 EVENTOUT
157 PortJ PJ10 LCD_G3 EVENTOUT
158 PortJ PJ11 LCD_G4 EVENTOUT
159 PortJ PJ12 LCD_B0 EVENTOUT
160 PortJ PJ13 LCD_B1 EVENTOUT
161 PortJ PJ14 LCD_B2 EVENTOUT
162 PortJ PJ15 LCD_B3 EVENTOUT
163 PortK PK0 LCD_G5 EVENTOUT
164 PortK PK1 LCD_G6 EVENTOUT
165 PortK PK2 LCD_G7 EVENTOUT
166 PortK PK3 LCD_B4 EVENTOUT
167 PortK PK4 LCD_B5 EVENTOUT
168 PortK PK5 LCD_B6 EVENTOUT
169 PortK PK6 LCD_B7 EVENTOUT
170 PortK PK7 LCD_DE EVENTOUT

36
stmhal/flash.c
View File

@ -27,6 +27,8 @@
#include STM32_HAL_H
#include "flash.h"
#include "mpconfigport.h"
#include "py/misc.h"
#if defined(MCU_SERIES_F7)
@ -63,12 +65,28 @@
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */
#if !defined(FLASH_SECTOR_12)
#define ADDR_FLASH_END ((uint32_t)0x08100000) /* 1 Mbytes total */
#else
#define ADDR_FLASH_SECTOR_12 ((uint32_t)0x08100000) /* Base @ of Sector 12, 16 Kbytes */
#define ADDR_FLASH_SECTOR_13 ((uint32_t)0x08104000) /* Base @ of Sector 13, 16 Kbytes */
#define ADDR_FLASH_SECTOR_14 ((uint32_t)0x08108000) /* Base @ of Sector 14, 16 Kbytes */
#define ADDR_FLASH_SECTOR_15 ((uint32_t)0x0810C000) /* Base @ of Sector 15, 16 Kbytes */
#define ADDR_FLASH_SECTOR_16 ((uint32_t)0x08110000) /* Base @ of Sector 16, 64 Kbytes */
#define ADDR_FLASH_SECTOR_17 ((uint32_t)0x08120000) /* Base @ of Sector 17, 128 Kbytes */
#define ADDR_FLASH_SECTOR_18 ((uint32_t)0x08140000) /* Base @ of Sector 18, 128 Kbytes */
#define ADDR_FLASH_SECTOR_19 ((uint32_t)0x08160000) /* Base @ of Sector 19, 128 Kbytes */
#define ADDR_FLASH_SECTOR_20 ((uint32_t)0x08180000) /* Base @ of Sector 20, 128 Kbytes */
#define ADDR_FLASH_SECTOR_21 ((uint32_t)0x081A0000) /* Base @ of Sector 21, 128 Kbytes */
#define ADDR_FLASH_SECTOR_22 ((uint32_t)0x081C0000) /* Base @ of Sector 22, 128 Kbytes */
#define ADDR_FLASH_SECTOR_23 ((uint32_t)0x081E0000) /* Base @ of Sector 23, 128 Kbytes */
#define ADDR_FLASH_END ((uint32_t)0x08200000) /* 2 Mbytes total */
#endif
#endif
#endif // MCU_SERIES_F7
static const uint32_t flash_info_table[26] = {
static const uint32_t flash_info_table[] = {
ADDR_FLASH_SECTOR_0, FLASH_SECTOR_0,
ADDR_FLASH_SECTOR_1, FLASH_SECTOR_1,
ADDR_FLASH_SECTOR_2, FLASH_SECTOR_2,
@ -83,12 +101,26 @@ static const uint32_t flash_info_table[26] = {
ADDR_FLASH_SECTOR_10, FLASH_SECTOR_10,
ADDR_FLASH_SECTOR_11, FLASH_SECTOR_11,
#endif
#if defined(FLASH_SECTOR_12)
ADDR_FLASH_SECTOR_12, FLASH_SECTOR_12,
ADDR_FLASH_SECTOR_13, FLASH_SECTOR_13,
ADDR_FLASH_SECTOR_14, FLASH_SECTOR_14,
ADDR_FLASH_SECTOR_15, FLASH_SECTOR_15,
ADDR_FLASH_SECTOR_16, FLASH_SECTOR_16,
ADDR_FLASH_SECTOR_17, FLASH_SECTOR_17,
ADDR_FLASH_SECTOR_18, FLASH_SECTOR_18,
ADDR_FLASH_SECTOR_19, FLASH_SECTOR_19,
ADDR_FLASH_SECTOR_20, FLASH_SECTOR_20,
ADDR_FLASH_SECTOR_21, FLASH_SECTOR_21,
ADDR_FLASH_SECTOR_22, FLASH_SECTOR_22,
ADDR_FLASH_SECTOR_23, FLASH_SECTOR_23,
#endif
ADDR_FLASH_END, 0,
};
uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) {
if (addr >= flash_info_table[0]) {
for (int i = 0; i < 24; i += 2) {
for (int i = 0; i < MP_ARRAY_SIZE(flash_info_table) - 2; i += 2) {
if (addr < flash_info_table[i + 2]) {
if (start_addr != NULL) {
*start_addr = flash_info_table[i];

4
stmhal/stm32_it.c
View File

@ -301,7 +301,7 @@ void SysTick_Handler(void) {
#if defined(USE_USB_FS)
#define OTG_XX_IRQHandler OTG_FS_IRQHandler
#define OTG_XX_WKUP_IRQHandler OTG_FS_WKUP_IRQHandler
#elif defined(USE_USB_HS)
#elif defined(USE_USB_HS) || defined(USE_USB_HS_IN_FS)
#define OTG_XX_IRQHandler OTG_HS_IRQHandler
#define OTG_XX_WKUP_IRQHandler OTG_HS_WKUP_IRQHandler
#endif
@ -352,7 +352,7 @@ void OTG_XX_WKUP_IRQHandler(void) {
#ifdef USE_USB_FS
/* Clear EXTI pending Bit*/
__HAL_USB_FS_EXTI_CLEAR_FLAG();
#elif defined(USE_USB_HS)
#elif defined(USE_USB_HS) || defined(USE_USB_HS_IN_FS)
/* Clear EXTI pending Bit*/
__HAL_USB_HS_EXTI_CLEAR_FLAG();
#endif

2
stmhal/stm32_it.h
View File

@ -74,6 +74,6 @@ void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef USE_USB_FS
void OTG_FS_IRQHandler(void);
#elif defined(USE_USB_HS)
#elif defined(USE_USB_HS) || defined(USE_USB_HS_IN_FS)
void OTG_HS_IRQHandler(void);
#endif

7
stmhal/storage.c
View File

@ -56,6 +56,13 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
#define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k
#elif defined(STM32F429xx)
#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM
#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k
#elif defined(STM32F746xx)
// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.

80
stmhal/usbd_conf.c
View File

@ -96,10 +96,52 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
}
#if defined(USE_USB_HS)
else if(hpcd->Instance == USB_OTG_HS)
{
#if defined(USE_USB_HS_IN_FS)
/* Configure USB FS GPIOs */
__GPIOB_CLK_ENABLE();
/* Configure DM DP Pins */
GPIO_InitStruct.Pin = (GPIO_PIN_14 | GPIO_PIN_15);
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
#if defined(MICROPY_HW_USB_VBUS_DETECT_PIN)
/* Configure VBUS Pin */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
#endif
#if defined(MICROPY_HW_USB_OTG_ID_PIN)
/* Configure ID pin */
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
#endif
/*
* Enable calling WFI and correct
* function of the embedded USB_FS_IN_HS phy
*/
__OTGHSULPI_CLK_SLEEP_DISABLE();
__OTGHS_CLK_SLEEP_ENABLE();
/* Enable USB HS Clocks */
__USB_OTG_HS_CLK_ENABLE();
#elif defined(USE_USB_HS)
/* Configure USB HS GPIOs */
__GPIOA_CLK_ENABLE();
__GPIOB_CLK_ENABLE();
__GPIOC_CLK_ENABLE();
@ -154,6 +196,7 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
/* Enable USB HS Clocks */
__USB_OTG_HS_CLK_ENABLE();
__USB_OTG_HS_ULPI_CLK_ENABLE();
#endif
/* Set USBHS Interrupt to the lowest priority */
HAL_NVIC_SetPriority(OTG_HS_IRQn, IRQ_PRI_OTG_HS, IRQ_SUBPRI_OTG_HS);
@ -161,7 +204,6 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
/* Enable USBHS Interrupt */
HAL_NVIC_EnableIRQ(OTG_HS_IRQn);
}
#endif
}
/**
* @brief DeInitializes the PCD MSP.
@ -176,7 +218,7 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
__USB_OTG_FS_CLK_DISABLE();
__SYSCFG_CLK_DISABLE();
}
#if defined(USE_USB_HS)
#if defined(USE_USB_HS) || defined(USE_USB_HS_IN_FS)
else if(hpcd->Instance == USB_OTG_HS)
{
/* Disable USB FS Clocks */
@ -335,7 +377,7 @@ void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
*/
USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev)
{
#ifdef USE_USB_FS
#if defined(USE_USB_FS)
/*Set LL Driver parameters */
pcd_handle.Instance = USB_OTG_FS;
pcd_handle.Init.dev_endpoints = 4;
@ -362,10 +404,34 @@ USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev)
HAL_PCD_SetTxFiFo(&pcd_handle, 1, 0x40);
HAL_PCD_SetTxFiFo(&pcd_handle, 2, 0x20);
HAL_PCD_SetTxFiFo(&pcd_handle, 3, 0x40);
#elif defined(USE_USB_HS_IN_FS)
/*Set LL Driver parameters */
pcd_handle.Instance = USB_OTG_HS;
pcd_handle.Init.dev_endpoints = 4;
pcd_handle.Init.use_dedicated_ep1 = 0;
pcd_handle.Init.ep0_mps = 0x40;
pcd_handle.Init.dma_enable = 0;
pcd_handle.Init.low_power_enable = 0;
pcd_handle.Init.phy_itface = PCD_PHY_EMBEDDED;
pcd_handle.Init.Sof_enable = 0;
pcd_handle.Init.speed = PCD_SPEED_HIGH_IN_FULL;
#if !defined(MICROPY_HW_USB_VBUS_DETECT_PIN)
pcd_handle.Init.vbus_sensing_enable = 0; // No VBUS Sensing on USB0
#else
pcd_handle.Init.vbus_sensing_enable = 1;
#endif
/* Link The driver to the stack */
pcd_handle.pData = pdev;
pdev->pData = &pcd_handle;
/*Initialize LL Driver */
HAL_PCD_Init(&pcd_handle);
#endif
#ifdef USE_USB_HS
HAL_PCD_SetRxFiFo(&pcd_handle, 0x80);
HAL_PCD_SetTxFiFo(&pcd_handle, 0, 0x20);
HAL_PCD_SetTxFiFo(&pcd_handle, 1, 0x40);
HAL_PCD_SetTxFiFo(&pcd_handle, 2, 0x20);
HAL_PCD_SetTxFiFo(&pcd_handle, 3, 0x40);
#elif defined(USE_USB_HS)
/*Set LL Driver parameters */
pcd_handle.Instance = USB_OTG_HS;
pcd_handle.Init.dev_endpoints = 6;