stm32/i2cslave: Fix ordering of event callbacks in slave IRQ handler.
It's possible (at least on F4 MCU's) to have RXNE and STOPF set at the same time during a call to the slave IRQ handler. In such cases RXNE should be handled before STOPF so that all bytes are processed before i2c_slave_process_rx_end() is called.
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@ -44,6 +44,12 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
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uint32_t sr2 = i2c->SR2;
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i2c_slave_process_addr_match((sr2 >> I2C_SR2_TRA_Pos) & 1);
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}
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if (sr1 & I2C_SR1_TXE) {
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i2c->DR = i2c_slave_process_tx_byte();
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}
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if (sr1 & I2C_SR1_RXNE) {
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i2c_slave_process_rx_byte(i2c->DR);
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}
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if (sr1 & I2C_SR1_STOPF) {
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// STOPF only set at end of RX mode (in TX mode AF is set on NACK)
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// Read of SR1, write CR1 needed to clear STOPF bit
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@ -52,12 +58,6 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
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i2c_slave_process_rx_end();
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i2c->CR1 |= I2C_CR1_ACK;
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}
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if (sr1 & I2C_SR1_TXE) {
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i2c->DR = i2c_slave_process_tx_byte();
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}
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if (sr1 & I2C_SR1_RXNE) {
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i2c_slave_process_rx_byte(i2c->DR);
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}
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}
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#elif defined(STM32F7)
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@ -79,6 +79,12 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
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i2c->ICR = I2C_ICR_ADDRCF;
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i2c_slave_process_addr_match(0);
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}
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if (isr & I2C_ISR_TXIS) {
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i2c->TXDR = i2c_slave_process_tx_byte();
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}
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if (isr & I2C_ISR_RXNE) {
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i2c_slave_process_rx_byte(i2c->RXDR);
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}
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if (isr & I2C_ISR_STOPF) {
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// STOPF only set for STOP condition, not a repeated START
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i2c->ICR = I2C_ICR_STOPCF;
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@ -90,12 +96,6 @@ void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) {
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}
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i2c->OAR1 |= I2C_OAR1_OA1EN;
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}
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if (isr & I2C_ISR_TXIS) {
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i2c->TXDR = i2c_slave_process_tx_byte();
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}
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if (isr & I2C_ISR_RXNE) {
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i2c_slave_process_rx_byte(i2c->RXDR);
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}
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}
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#endif
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