Updates for Makerfabs TFT 7" touch dotclock panel

This commit is contained in:
RetiredWizard 2023-11-16 20:44:00 -05:00
parent 64f6db113d
commit 7bcb95ad4d
3 changed files with 46 additions and 15 deletions

View File

@ -1,5 +1,5 @@
USB_VID = 0x239A
USB_PID = 0x814A
USB_VID = 0x303A
USB_PID = 0x81BF
USB_PRODUCT = "MakerFabs-ESP32-S3-Parallel-TFT-With-Touch-7inch"
USB_MANUFACTURER = "MakerFabs"
@ -14,3 +14,13 @@ CIRCUITPY_ESP_PSRAM_MODE = opi
CIRCUITPY_ESP_PSRAM_FREQ = 80m
CIRCUITPY_DOTCLOCKFRAMEBUFFER = 1
# To build with USB disabled allowing access to I2S pins
#CIRCUITPY_CREATOR_ID = 0x000C303A
#CIRCUITPY_CREATION_ID = 0x00A30001
#CIRCUITPY_USB=0
#CIRCUITPY_BUILD_EXTENSIONS = bin,uf2
#UF2_BOOTLOADER = 1
#CIRCUITPY_WIFI=1
#CIRCUITPY_WEB_WORKFLOW=1
#OPTIMIZATION_FLAGS = -Os

View File

@ -67,20 +67,43 @@ STATIC const mp_rom_map_elem_t timings800_table[] = {
};
MP_DEFINE_CONST_DICT(timings800_dict, timings800_table);
STATIC const mp_rom_map_elem_t timings1024_table[] = {
{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(10000000) }, // nominal 16MHz, but display is unstable/tears at that frequency
{ MP_ROM_QSTR(MP_QSTR_width), MP_ROM_INT(1024) },
{ MP_ROM_QSTR(MP_QSTR_height), MP_ROM_INT(600) },
{ MP_ROM_QSTR(MP_QSTR_hsync_pulse_width), MP_ROM_INT(30) },
{ MP_ROM_QSTR(MP_QSTR_hsync_front_porch), MP_ROM_INT(210) },
{ MP_ROM_QSTR(MP_QSTR_hsync_back_porch), MP_ROM_INT(16) },
{ MP_ROM_QSTR(MP_QSTR_hsync_idle_low), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_vsync_pulse_width), MP_ROM_INT(13) },
{ MP_ROM_QSTR(MP_QSTR_vsync_front_porch), MP_ROM_INT(22) },
{ MP_ROM_QSTR(MP_QSTR_vsync_back_porch), MP_ROM_INT(10) },
{ MP_ROM_QSTR(MP_QSTR_vsync_idle_low), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_de_idle_high), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_pclk_active_high), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_pclk_idle_high), MP_ROM_FALSE },
};
MP_DEFINE_CONST_DICT(timings1024_dict, timings1024_table);
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
{ MP_ROM_QSTR(MP_QSTR_TFT_PINS), MP_ROM_PTR(&tft_pins_dict) },
{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS), MP_ROM_PTR(&timings800_dict) },
{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS800), MP_ROM_PTR(&timings800_dict) },
{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS1024), MP_ROM_PTR(&timings1024_dict) },
{ MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_GPIO10) },
// GPIO pins available on Mabee connector port (also shared with I2S & USB D+/D-)
{ MP_ROM_QSTR(MP_QSTR_GPIO20), MP_ROM_PTR(&pin_GPIO20) },
{ MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
// I2S pins are shared with USB D+/D-, these are only useful if USB is disabled
#if CIRCUITPY_USB == 0
{ MP_ROM_QSTR(MP_QSTR_I2S_BIT_CLOCK), MP_ROM_PTR(&pin_GPIO20) },
{ MP_ROM_QSTR(MP_QSTR_I2S_WORD_SELECT), MP_ROM_PTR(&pin_GPIO2) },
{ MP_ROM_QSTR(MP_QSTR_I2S_DATA), MP_ROM_PTR(&pin_GPIO19) },
#endif
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
@ -89,16 +112,16 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO17) },
{ MP_ROM_QSTR(MP_QSTR_TOUCH_RESET), MP_ROM_PTR(&pin_GPIO38) },
{ MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_GPIO11) },
{ MP_ROM_QSTR(MP_QSTR_SDIO_D0), MP_ROM_PTR(&pin_GPIO13) },
{ MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_GPIO12) },
// IO10 <> SD_CS is cut at factory (non-placed resistor position R34) and pulled up.
// Permanent SDIO 1-bit mode?
// Until SDIO 1-bit mode is support on Espressif ports these pins aren't useful
// { MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_GPIO11) },
// { MP_ROM_QSTR(MP_QSTR_SDIO_D0), MP_ROM_PTR(&pin_GPIO13) },
// { MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_GPIO12) },
// boot mode button can be used in SW as well
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO1) },
// IO10 <> SD_CS is cut at factory (non-placed resistor position R34) and pulled up.
// Permanent SDIO 1-bit mode?
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

View File

@ -173,12 +173,15 @@ static const uint64_t pin_mask_reset_forbidden =
GPIO_SEL_23 |
GPIO_SEL_24 |
#endif
#endif // ESP32C6
#endif // ESP32H2
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)
// Never ever reset pins used to communicate with SPI flash and PSRAM.
#if CIRCUITPY_USB
// Never ever reset USB pins.
GPIO_SEL_19 | // USB D-
GPIO_SEL_20 | // USB D+
#endif
// Never ever reset pins used to communicate with SPI flash and PSRAM.
#if defined(CONFIG_ESP32_SPIRAM_SUPPORT) || defined(CONFIG_ESP32S2_SPIRAM_SUPPORT) || defined(CONFIG_ESP32S3_SPIRAM_SUPPORT)
// Note ESP32-C3 does not have SPIRAM support.
// Board uses PSRAM, and needs another chip select.
@ -198,11 +201,6 @@ static const uint64_t pin_mask_reset_forbidden =
GPIO_SEL_36 | // SPIIO7
GPIO_SEL_37 | // SPIDQS
#endif
#if CIRCUITPY_USB
// Never ever reset USB pins.
GPIO_SEL_19 | // USB D-
GPIO_SEL_20 | // USB D+
#endif
#if defined(CONFIG_ESP_CONSOLE_UART_DEFAULT) && CONFIG_ESP_CONSOLE_UART_DEFAULT && CONFIG_ESP_CONSOLE_UART_NUM == 0
// Don't reset/use the IDF UART console.
GPIO_SEL_43 | // UART TX