Updates for Makerfabs TFT 7" touch dotclock panel
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@ -1,5 +1,5 @@
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USB_VID = 0x239A
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USB_PID = 0x814A
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USB_VID = 0x303A
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USB_PID = 0x81BF
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USB_PRODUCT = "MakerFabs-ESP32-S3-Parallel-TFT-With-Touch-7inch"
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USB_MANUFACTURER = "MakerFabs"
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@ -14,3 +14,13 @@ CIRCUITPY_ESP_PSRAM_MODE = opi
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CIRCUITPY_ESP_PSRAM_FREQ = 80m
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CIRCUITPY_DOTCLOCKFRAMEBUFFER = 1
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# To build with USB disabled allowing access to I2S pins
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#CIRCUITPY_CREATOR_ID = 0x000C303A
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#CIRCUITPY_CREATION_ID = 0x00A30001
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#CIRCUITPY_USB=0
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#CIRCUITPY_BUILD_EXTENSIONS = bin,uf2
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#UF2_BOOTLOADER = 1
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#CIRCUITPY_WIFI=1
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#CIRCUITPY_WEB_WORKFLOW=1
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#OPTIMIZATION_FLAGS = -Os
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@ -67,20 +67,43 @@ STATIC const mp_rom_map_elem_t timings800_table[] = {
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};
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MP_DEFINE_CONST_DICT(timings800_dict, timings800_table);
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STATIC const mp_rom_map_elem_t timings1024_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(10000000) }, // nominal 16MHz, but display is unstable/tears at that frequency
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{ MP_ROM_QSTR(MP_QSTR_width), MP_ROM_INT(1024) },
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{ MP_ROM_QSTR(MP_QSTR_height), MP_ROM_INT(600) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_pulse_width), MP_ROM_INT(30) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_front_porch), MP_ROM_INT(210) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_back_porch), MP_ROM_INT(16) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_idle_low), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_vsync_pulse_width), MP_ROM_INT(13) },
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{ MP_ROM_QSTR(MP_QSTR_vsync_front_porch), MP_ROM_INT(22) },
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{ MP_ROM_QSTR(MP_QSTR_vsync_back_porch), MP_ROM_INT(10) },
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{ MP_ROM_QSTR(MP_QSTR_vsync_idle_low), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_de_idle_high), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_pclk_active_high), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_pclk_idle_high), MP_ROM_FALSE },
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};
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MP_DEFINE_CONST_DICT(timings1024_dict, timings1024_table);
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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{ MP_ROM_QSTR(MP_QSTR_TFT_PINS), MP_ROM_PTR(&tft_pins_dict) },
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{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS), MP_ROM_PTR(&timings800_dict) },
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{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS800), MP_ROM_PTR(&timings800_dict) },
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{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS1024), MP_ROM_PTR(&timings1024_dict) },
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{ MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_GPIO10) },
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// GPIO pins available on Mabee connector port (also shared with I2S & USB D+/D-)
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{ MP_ROM_QSTR(MP_QSTR_GPIO20), MP_ROM_PTR(&pin_GPIO20) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
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// I2S pins are shared with USB D+/D-, these are only useful if USB is disabled
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#if CIRCUITPY_USB == 0
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{ MP_ROM_QSTR(MP_QSTR_I2S_BIT_CLOCK), MP_ROM_PTR(&pin_GPIO20) },
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{ MP_ROM_QSTR(MP_QSTR_I2S_WORD_SELECT), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_I2S_DATA), MP_ROM_PTR(&pin_GPIO19) },
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#endif
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
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@ -89,16 +112,16 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_TOUCH_RESET), MP_ROM_PTR(&pin_GPIO38) },
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{ MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_GPIO11) },
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{ MP_ROM_QSTR(MP_QSTR_SDIO_D0), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_GPIO12) },
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// IO10 <> SD_CS is cut at factory (non-placed resistor position R34) and pulled up.
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// Permanent SDIO 1-bit mode?
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// Until SDIO 1-bit mode is support on Espressif ports these pins aren't useful
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// { MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_GPIO11) },
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// { MP_ROM_QSTR(MP_QSTR_SDIO_D0), MP_ROM_PTR(&pin_GPIO13) },
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// { MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_GPIO12) },
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// boot mode button can be used in SW as well
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{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO1) },
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// IO10 <> SD_CS is cut at factory (non-placed resistor position R34) and pulled up.
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// Permanent SDIO 1-bit mode?
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{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
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@ -173,12 +173,15 @@ static const uint64_t pin_mask_reset_forbidden =
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GPIO_SEL_23 |
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GPIO_SEL_24 |
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#endif
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#endif // ESP32C6
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#endif // ESP32H2
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#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)
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// Never ever reset pins used to communicate with SPI flash and PSRAM.
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#if CIRCUITPY_USB
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// Never ever reset USB pins.
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GPIO_SEL_19 | // USB D-
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GPIO_SEL_20 | // USB D+
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#endif
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// Never ever reset pins used to communicate with SPI flash and PSRAM.
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#if defined(CONFIG_ESP32_SPIRAM_SUPPORT) || defined(CONFIG_ESP32S2_SPIRAM_SUPPORT) || defined(CONFIG_ESP32S3_SPIRAM_SUPPORT)
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// Note ESP32-C3 does not have SPIRAM support.
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// Board uses PSRAM, and needs another chip select.
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@ -198,11 +201,6 @@ static const uint64_t pin_mask_reset_forbidden =
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GPIO_SEL_36 | // SPIIO7
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GPIO_SEL_37 | // SPIDQS
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#endif
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#if CIRCUITPY_USB
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// Never ever reset USB pins.
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GPIO_SEL_19 | // USB D-
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GPIO_SEL_20 | // USB D+
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#endif
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#if defined(CONFIG_ESP_CONSOLE_UART_DEFAULT) && CONFIG_ESP_CONSOLE_UART_DEFAULT && CONFIG_ESP_CONSOLE_UART_NUM == 0
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// Don't reset/use the IDF UART console.
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GPIO_SEL_43 | // UART TX
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