add Adafruit Metro M7 1011 SD
This commit is contained in:
Dan Halbert
parent
5dc2b168d7
commit
77b3a0570e
64
ports/mimxrt10xx/boards/adafruit_metro_m7_1011_sd/board.c
Normal file
64
ports/mimxrt10xx/boards/adafruit_metro_m7_1011_sd/board.c
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
|
||||
* Copyright (c) 2019 Artur Pacholec
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "supervisor/board.h"
|
||||
#include "shared-bindings/microcontroller/Pin.h"
|
||||
|
||||
// These pins should never ever be reset; doing so could interfere with basic operation.
|
||||
// Used in common-hal/microcontroller/Pin.c
|
||||
const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
|
||||
// SWD Pins
|
||||
&pin_GPIO_AD_13,// SWDIO
|
||||
&pin_GPIO_AD_12,// SWCLK
|
||||
|
||||
// FLEX flash
|
||||
&pin_GPIO_SD_12,
|
||||
&pin_GPIO_SD_11,
|
||||
&pin_GPIO_SD_10,
|
||||
&pin_GPIO_SD_09,
|
||||
&pin_GPIO_SD_08,
|
||||
&pin_GPIO_SD_07,
|
||||
&pin_GPIO_SD_06,
|
||||
NULL, // Must end in NULL.
|
||||
};
|
||||
|
||||
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
|
||||
|
||||
bool mimxrt10xx_board_reset_pin_number(const mcu_pin_obj_t *pin) {
|
||||
#if CIRCUITPY_SWO_TRACE
|
||||
if (pin == &pin_GPIO_AD_09) {
|
||||
IOMUXC_SetPinMux( /* Add these lines*/
|
||||
IOMUXC_GPIO_AD_09_ARM_TRACE_SWO,
|
||||
0U);
|
||||
IOMUXC_SetPinConfig( /* Add these lines*/
|
||||
IOMUXC_GPIO_AD_09_ARM_TRACE_SWO,
|
||||
0x00F9U);
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
return false;
|
||||
}
|
||||
153
ports/mimxrt10xx/boards/adafruit_metro_m7_1011_sd/flash_config.c
Normal file
153
ports/mimxrt10xx/boards/adafruit_metro_m7_1011_sd/flash_config.c
Normal file
@ -0,0 +1,153 @@
|
||||
/*
|
||||
* Copyright 2017 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "boards/flash_config.h"
|
||||
|
||||
#include "xip/fsl_flexspi_nor_boot.h"
|
||||
|
||||
// Config for W25Q32JV with QSPI routed. (compatible with GD25Q32)
|
||||
__attribute__((section(".boot_hdr.conf")))
|
||||
const flexspi_nor_config_t qspiflash_config = {
|
||||
.pageSize = 256u,
|
||||
.sectorSize = 4u * 1024u,
|
||||
.ipcmdSerialClkFreq = kFLEXSPISerialClk_133MHz,
|
||||
.blockSize = 0x00010000,
|
||||
.isUniformBlockSize = false,
|
||||
.memConfig =
|
||||
{
|
||||
.tag = FLEXSPI_CFG_BLK_TAG,
|
||||
.version = FLEXSPI_CFG_BLK_VERSION,
|
||||
.readSampleClkSrc = kFLEXSPIReadSampleClk_LoopbackFromSckPad,
|
||||
.csHoldTime = 3u,
|
||||
.csSetupTime = 3u,
|
||||
|
||||
.busyOffset = 0u, // Status bit 0 indicates busy.
|
||||
.busyBitPolarity = 0u, // Busy when the bit is 1.
|
||||
|
||||
.deviceModeCfgEnable = 1u,
|
||||
.deviceModeType = kDeviceConfigCmdType_QuadEnable,
|
||||
.deviceModeSeq = {
|
||||
.seqId = 4u,
|
||||
.seqNum = 1u,
|
||||
},
|
||||
.deviceModeArg = 0x0200,
|
||||
.configCmdEnable = 1u,
|
||||
.configModeType[0] = kDeviceConfigCmdType_Generic,
|
||||
.configCmdSeqs[0] = {
|
||||
.seqId = 2u,
|
||||
.seqNum = 1u,
|
||||
},
|
||||
.deviceType = kFLEXSPIDeviceType_SerialNOR,
|
||||
.sflashPadType = kSerialFlash_4Pads,
|
||||
.serialClkFreq = kFLEXSPISerialClk_133MHz,
|
||||
.sflashA1Size = FLASH_SIZE,
|
||||
.lookupTable =
|
||||
{
|
||||
// FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
|
||||
// The high 16 bits is command 1 and the low are command 0.
|
||||
// Within a command, the top 6 bits are the opcode, the next two are the number
|
||||
// of pads and then last byte is the operand. The operand's meaning changes
|
||||
// per opcode.
|
||||
|
||||
// Indices with ROM should always have the same function because the ROM
|
||||
// bootloader uses it.
|
||||
|
||||
// 0: ROM: Read LUTs
|
||||
// Quad version
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */,
|
||||
RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */),
|
||||
FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */,
|
||||
READ_SDR, FLEXSPI_4PAD, 0x04),
|
||||
// Single fast read version, good for debugging.
|
||||
// FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */,
|
||||
// RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
|
||||
// FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */,
|
||||
// READ_SDR, FLEXSPI_1PAD, 0x04),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 1: ROM: Read status
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */,
|
||||
READ_SDR, FLEXSPI_1PAD, 0x02),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 2: Empty
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35 /* the command to send */,
|
||||
DUMMY_SDR, FLEXSPI_1PAD, 8),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 3: ROM: Write Enable
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */,
|
||||
STOP, FLEXSPI_1PAD, 0x00),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 4: Config: Write Status
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */,
|
||||
WRITE_SDR, FLEXSPI_1PAD, 0x02),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 5: ROM: Erase Sector
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */,
|
||||
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 6: Empty
|
||||
EMPTY_SEQUENCE,
|
||||
|
||||
// 7: Empty
|
||||
EMPTY_SEQUENCE,
|
||||
|
||||
// 8: Block Erase
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */,
|
||||
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 9: ROM: Page program
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */,
|
||||
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
|
||||
|
||||
FSL_ROM_FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */,
|
||||
STOP, FLEXSPI_1PAD, 0),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 10: Empty
|
||||
EMPTY_SEQUENCE,
|
||||
|
||||
// 11: ROM: Chip erase
|
||||
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */,
|
||||
STOP, FLEXSPI_1PAD, 0),
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS,
|
||||
TWO_EMPTY_STEPS),
|
||||
|
||||
// 12: Empty
|
||||
EMPTY_SEQUENCE,
|
||||
|
||||
// 13: ROM: Read SFDP
|
||||
EMPTY_SEQUENCE,
|
||||
|
||||
// 14: ROM: Restore no cmd
|
||||
EMPTY_SEQUENCE,
|
||||
|
||||
// 15: ROM: Dummy
|
||||
EMPTY_SEQUENCE
|
||||
},
|
||||
},
|
||||
};
|
||||
@ -0,0 +1,20 @@
|
||||
#define MICROPY_HW_BOARD_NAME "Metro MIMXRT1011"
|
||||
#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A"
|
||||
|
||||
#define MICROPY_HW_NEOPIXEL (&pin_GPIO_00)
|
||||
|
||||
// If you change this, then make sure to update the linker scripts as well to
|
||||
// make sure you don't overwrite code
|
||||
#define CIRCUITPY_INTERNAL_NVM_SIZE 0
|
||||
|
||||
#define BOARD_FLASH_SIZE (8 * 1024 * 1024)
|
||||
|
||||
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02)
|
||||
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01)
|
||||
|
||||
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06)
|
||||
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04)
|
||||
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03)
|
||||
|
||||
#define DEFAULT_UART_BUS_RX (&pin_GPIO_09)
|
||||
#define DEFAULT_UART_BUS_TX (&pin_GPIO_10)
|
||||
@ -0,0 +1,8 @@
|
||||
USB_VID = 0x239A
|
||||
USB_PID = 0x8142
|
||||
USB_PRODUCT = "Metro M7 iMX RT1011 SD"
|
||||
USB_MANUFACTURER = "Adafruit"
|
||||
|
||||
CHIP_VARIANT = MIMXRT1011DAE5A
|
||||
CHIP_FAMILY = MIMXRT1011
|
||||
FLASH = W25Q64JV
|
||||
60
ports/mimxrt10xx/boards/adafruit_metro_m7_1011_sd/pins.c
Normal file
60
ports/mimxrt10xx/boards/adafruit_metro_m7_1011_sd/pins.c
Normal file
@ -0,0 +1,60 @@
|
||||
#include "shared-bindings/board/__init__.h"
|
||||
|
||||
#include "supervisor/board.h"
|
||||
|
||||
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
|
||||
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
|
||||
|
||||
// Analog
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_02) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_01) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_00) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_05) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_10) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_08) },
|
||||
|
||||
// Digital
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_13) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_12) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_SD_00) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_SD_01) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_SD_02) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_11) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_08) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_07) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_06) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_05) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_04) },
|
||||
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_LED),MP_ROM_PTR(&pin_GPIO_03) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_GPIO_03) },
|
||||
|
||||
// SD control
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_CD), MP_ROM_PTR(&pin_GPIO_AD_11) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO_AD_14) },
|
||||
|
||||
// SPI
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) },
|
||||
|
||||
// I2C
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) },
|
||||
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_00) },
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_WORD_SELECT), MP_ROM_PTR(&pin_GPIO_06) }, // D10
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_BIT_CLOCK), MP_ROM_PTR(&pin_GPIO_07) }, // D9
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_DATA), MP_ROM_PTR(&pin_GPIO_04) }, // D12
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
||||
@ -1,6 +1,6 @@
|
||||
USB_VID = 0x239A
|
||||
USB_PID = 0x80E2
|
||||
USB_PRODUCT = "Metro M7 iMX RT1011"
|
||||
USB_PRODUCT = "Metro M7 iMX RT1011 AirLift"
|
||||
USB_MANUFACTURER = "Adafruit"
|
||||
|
||||
CHIP_VARIANT = MIMXRT1011DAE5A
|
||||
|
||||
@ -58,8 +58,13 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_WORD_SELECT), MP_ROM_PTR(&pin_GPIO_06) }, // D10
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_WSEL), MP_ROM_PTR(&pin_GPIO_06) }, // D10
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_BIT_CLOCK), MP_ROM_PTR(&pin_GPIO_07) }, // D9
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_BCLK), MP_ROM_PTR(&pin_GPIO_07) }, // D9
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_DATA), MP_ROM_PTR(&pin_GPIO_04) }, // D12
|
||||
{ MP_ROM_QSTR(MP_QSTR_I2S_DOUT), MP_ROM_PTR(&pin_GPIO_04) }, // D12
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user