From 755b86e38bef1d3adf05f146e47b9499385313b9 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 18 Jul 2019 17:17:46 -0400 Subject: [PATCH] Deinit-capable USB on 411 --- ports/stm32f4/Makefile | 26 +- ports/stm32f4/boards/STM32F411VETx_FLASH.ld | 189 ++++++++ .../boards/nucleo_f411re/stm32f4xx_hal_conf.h | 439 ------------------ ports/stm32f4/boards/nucleo_f412zg/board.c | 38 -- .../boards/nucleo_f412zg/mpconfigboard.h | 38 -- .../boards/nucleo_f412zg/mpconfigboard.mk | 11 - .../board.c | 0 .../mpconfigboard.h | 2 +- .../mpconfigboard.mk | 2 +- ports/stm32f4/boards/stm32f411_disco/pins.c | 90 ++++ .../stm32f4xx_hal_conf.h | 10 +- .../stm32f411_disco/stm32f4xx_hal_msp.c | 427 +++++++++++++++++ .../boards/stm32f411_disco/stm32f4xx_it.c | 217 +++++++++ .../boards/stm32f411_disco/stm32f4xx_it.h | 70 +++ ports/stm32f4/mpconfigport.mk | 6 +- ports/stm32f4/supervisor/port.c | 355 +++++--------- ports/stm32f4/supervisor/port_412.c | 328 +++++++++++++ ports/stm32f4/supervisor/usb.c | 21 +- supervisor/supervisor.mk | 2 +- 19 files changed, 1486 insertions(+), 785 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F411VETx_FLASH.ld delete mode 100644 ports/stm32f4/boards/nucleo_f411re/stm32f4xx_hal_conf.h delete mode 100644 ports/stm32f4/boards/nucleo_f412zg/board.c delete mode 100644 ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.h delete mode 100644 ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.mk rename ports/stm32f4/boards/{nucleo_f411re => stm32f411_disco}/board.c (100%) rename ports/stm32f4/boards/{nucleo_f411re => stm32f411_disco}/mpconfigboard.h (95%) rename ports/stm32f4/boards/{nucleo_f411re => stm32f411_disco}/mpconfigboard.mk (83%) create mode 100644 ports/stm32f4/boards/stm32f411_disco/pins.c rename ports/stm32f4/boards/{nucleo_f412zg => stm32f411_disco}/stm32f4xx_hal_conf.h (98%) create mode 100644 ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_msp.c create mode 100644 ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.c create mode 100644 ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.h create mode 100644 ports/stm32f4/supervisor/port_412.c diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index c41c277e64..c96b3201ab 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -88,17 +88,15 @@ else endif # C defines -C_DEFS = \ --DUSE_FULL_LL_DRIVER \ --DUSE_HAL_DRIVER \ --DSTM32F412Zx \ +#C_DEFS = \ +#-DUSE_FULL_LL_DRIVER \ +#-DUSE_HAL_DRIVER \ +#-DSTM32F412Zx \ # C defines -#C_DEFS = \ -#-DUSE_HAL_DRIVER \ -#-DSTM32F411xE \ -#-DUSE_HAL_DRIVER \ -#-DSTM32F411xE +C_DEFS = \ + -DUSE_HAL_DRIVER \ + -DSTM32F411xE \ #TODO: Add ASM Flags? -Werror CFLAGS += $(INC) -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) @@ -142,7 +140,6 @@ CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD ###################################### SRC_STM32 = \ - boards/$(BOARD)/stm32f4xx_it.c \ boards/$(BOARD)/stm32f4xx_hal_msp.c \ stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c \ stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c \ @@ -179,7 +176,6 @@ SRC_STM32 = \ stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \ system_stm32f4xx.c - SRC_C += \ background.c \ fatfs_port.c \ @@ -198,15 +194,15 @@ SRC_C += \ lib/utils/pyexec.c \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ - peripherals/stm32f4/stm32f412zg/pins.c \ supervisor/shared/memory.c \ - #lib/tinyusb/src/portable/st/stm32f4/dcd_stm32f4.c + lib/tinyusb/src/portable/st/stm32f4/dcd_stm32f4.c -# +# peripherals/stm32f4/stm32f412zg/pins.c \ SRC_S = \ supervisor/cpu.s \ - boards/startup_stm32f412zx.s + boards/startup_stm32f411xe.s +# boards/startup_stm32f412zx.s # boards/startup_stm32f411xe.s #boards/startup_stm32f412zx.s diff --git a/ports/stm32f4/boards/STM32F411VETx_FLASH.ld b/ports/stm32f4/boards/STM32F411VETx_FLASH.ld new file mode 100644 index 0000000000..a3c3594a94 --- /dev/null +++ b/ports/stm32f4/boards/STM32F411VETx_FLASH.ld @@ -0,0 +1,189 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : Auto-generated by Ac6 System Workbench +** +** Abstract : Linker script for STM32F411VETx series +** 512Kbytes FLASH and 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2014 Ac6

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of Ac6 nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20020000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/nucleo_f411re/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/nucleo_f411re/stm32f4xx_hal_conf.h deleted file mode 100644 index 1cceba898b..0000000000 --- a/ports/stm32f4/boards/nucleo_f411re/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,439 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf_template.h - * @author MCD Application Team - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32f4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED - - /* #define HAL_ADC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_MMC_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_FMPI2C_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_EXTI_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_EXTI_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature.*/ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define INSTRUCTION_CACHE_ENABLE 1U -#define DATA_CACHE_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848_PHY_ADDRESS Address*/ -#define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) - -#define PHY_READ_TO ((uint32_t)0x0000FFFFU) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ -#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 0U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_EXTI_MODULE_ENABLED - #include "stm32f4xx_hal_exti.h" -#endif /* HAL_EXTI_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED - #include "stm32f4xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f4xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_FMPI2C_MODULE_ENABLED - #include "stm32f4xx_hal_fmpi2c.h" -#endif /* HAL_FMPI2C_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f4xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/boards/nucleo_f412zg/board.c b/ports/stm32f4/boards/nucleo_f412zg/board.c deleted file mode 100644 index 4421970eef..0000000000 --- a/ports/stm32f4/boards/nucleo_f412zg/board.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.h b/ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.h deleted file mode 100644 index c029f8f754..0000000000 --- a/ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * Copyright (c) 2018 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//Micropython setup - -#define MICROPY_HW_BOARD_NAME "NUCLEO-F412ZG" -#define MICROPY_HW_MCU_NAME "STM32F412xGS" - -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (0x4000) - -#define CIRCUITPY_INTERNAL_NVM_SIZE (4096) -#define AUTORESET_DELAY_MS 500 -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) \ No newline at end of file diff --git a/ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.mk b/ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.mk deleted file mode 100644 index 791c5c5511..0000000000 --- a/ports/stm32f4/boards/nucleo_f412zg/mpconfigboard.mk +++ /dev/null @@ -1,11 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x802A -USB_PRODUCT = "A glorious potato" -USB_MANUFACTURER = "Adafruit Industries LLC" - -MCU_SERIES = f4 -CMSIS_MCU = STM32F412xG -LD_FILE = boards/STM32F412ZGTx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 - diff --git a/ports/stm32f4/boards/nucleo_f411re/board.c b/ports/stm32f4/boards/stm32f411_disco/board.c similarity index 100% rename from ports/stm32f4/boards/nucleo_f411re/board.c rename to ports/stm32f4/boards/stm32f411_disco/board.c diff --git a/ports/stm32f4/boards/nucleo_f411re/mpconfigboard.h b/ports/stm32f4/boards/stm32f411_disco/mpconfigboard.h similarity index 95% rename from ports/stm32f4/boards/nucleo_f411re/mpconfigboard.h rename to ports/stm32f4/boards/stm32f411_disco/mpconfigboard.h index 90efaad19b..6754432823 100644 --- a/ports/stm32f4/boards/nucleo_f411re/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f411_disco/mpconfigboard.h @@ -27,7 +27,7 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "NUCLEO-F411RE" +#define MICROPY_HW_BOARD_NAME "STM32F411E_DISCO" #define MICROPY_HW_MCU_NAME "STM32F411xE" #define FLASH_SIZE (0x7D000) diff --git a/ports/stm32f4/boards/nucleo_f411re/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411_disco/mpconfigboard.mk similarity index 83% rename from ports/stm32f4/boards/nucleo_f411re/mpconfigboard.mk rename to ports/stm32f4/boards/stm32f411_disco/mpconfigboard.mk index 56f436117f..0c24fe292a 100644 --- a/ports/stm32f4/boards/nucleo_f411re/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411_disco/mpconfigboard.mk @@ -5,7 +5,7 @@ USB_MANUFACTURER = "Adafruit Industries LLC" MCU_SERIES = f4 CMSIS_MCU = STM32F411xE -LD_FILE = boards/stm32f411.ld +LD_FILE = boards/STM32F411VETx_FLASH.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 diff --git a/ports/stm32f4/boards/stm32f411_disco/pins.c b/ports/stm32f4/boards/stm32f411_disco/pins.c new file mode 100644 index 0000000000..e3a4b5ed60 --- /dev/null +++ b/ports/stm32f4/boards/stm32f411_disco/pins.c @@ -0,0 +1,90 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_PF02), MP_ROM_PTR(&pin_PF02) }, + { MP_ROM_QSTR(MP_QSTR_PF03), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_PF10), MP_ROM_PTR(&pin_PF10) }, + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PF11), MP_ROM_PTR(&pin_PF11) }, + { MP_ROM_QSTR(MP_QSTR_PF13), MP_ROM_PTR(&pin_PF13) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PG02), MP_ROM_PTR(&pin_PG02) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PG09), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_PG10), MP_ROM_PTR(&pin_PG10) }, + { MP_ROM_QSTR(MP_QSTR_PG11), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_PG12), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_PG13), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_PG14), MP_ROM_PTR(&pin_PG14) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PG10) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PF10) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PF04) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PG14) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC05) }, //alt PB09, see F401ZG-DISCO manual + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB00) }, //alt PB10, see F401ZG-DISCO manual + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PE03) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/nucleo_f412zg/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_conf.h similarity index 98% rename from ports/stm32f4/boards/nucleo_f412zg/stm32f4xx_hal_conf.h rename to ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_conf.h index 67343d525a..4b6ba3d036 100644 --- a/ports/stm32f4/boards/nucleo_f412zg/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_conf.h @@ -51,8 +51,8 @@ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ /* #define HAL_HASH_MODULE_ENABLED */ -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED /* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_RNG_MODULE_ENABLED */ @@ -60,14 +60,14 @@ /* #define HAL_SAI_MODULE_ENABLED */ /* #define HAL_SD_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED +/* #define HAL_UART_MODULE_ENABLED */ /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -//#define HAL_PCD_MODULE_ENABLED +#define HAL_PCD_MODULE_ENABLED /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ /* #define HAL_QSPI_MODULE_ENABLED */ diff --git a/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_msp.c b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_msp.c new file mode 100644 index 0000000000..4989f9889b --- /dev/null +++ b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_hal_msp.c @@ -0,0 +1,427 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32f4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "stm32f4xx_hal.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ +#define DATA_Ready_Pin GPIO_PIN_2 +#define DATA_Ready_GPIO_Port GPIOE +#define CS_I2C_SPI_Pin GPIO_PIN_3 +#define CS_I2C_SPI_GPIO_Port GPIOE +#define INT1_Pin GPIO_PIN_4 +#define INT1_GPIO_Port GPIOE +#define INT2_Pin GPIO_PIN_5 +#define INT2_GPIO_Port GPIOE +#define PC14_OSC32_IN_Pin GPIO_PIN_14 +#define PC14_OSC32_IN_GPIO_Port GPIOC +#define PC15_OSC32_OUT_Pin GPIO_PIN_15 +#define PC15_OSC32_OUT_GPIO_Port GPIOC +#define PH0_OSC_IN_Pin GPIO_PIN_0 +#define PH0_OSC_IN_GPIO_Port GPIOH +#define PH1_OSC_OUT_Pin GPIO_PIN_1 +#define PH1_OSC_OUT_GPIO_Port GPIOH +#define OTG_FS_PowerSwitchOn_Pin GPIO_PIN_0 +#define OTG_FS_PowerSwitchOn_GPIO_Port GPIOC +#define PDM_OUT_Pin GPIO_PIN_3 +#define PDM_OUT_GPIO_Port GPIOC +#define I2S3_WS_Pin GPIO_PIN_4 +#define I2S3_WS_GPIO_Port GPIOA +#define SPI1_SCK_Pin GPIO_PIN_5 +#define SPI1_SCK_GPIO_Port GPIOA +#define SPI1_MISO_Pin GPIO_PIN_6 +#define SPI1_MISO_GPIO_Port GPIOA +#define SPI1_MOSI_Pin GPIO_PIN_7 +#define SPI1_MOSI_GPIO_Port GPIOA +#define CLK_IN_Pin GPIO_PIN_10 +#define CLK_IN_GPIO_Port GPIOB +#define LD4_Pin GPIO_PIN_12 +#define LD4_GPIO_Port GPIOD +#define LD3_Pin GPIO_PIN_13 +#define LD3_GPIO_Port GPIOD +#define LD5_Pin GPIO_PIN_14 +#define LD5_GPIO_Port GPIOD +#define LD6_Pin GPIO_PIN_15 +#define LD6_GPIO_Port GPIOD +#define I2S3_MCK_Pin GPIO_PIN_7 +#define I2S3_MCK_GPIO_Port GPIOC +#define VBUS_FS_Pin GPIO_PIN_9 +#define VBUS_FS_GPIO_Port GPIOA +#define OTG_FS_ID_Pin GPIO_PIN_10 +#define OTG_FS_ID_GPIO_Port GPIOA +#define OTG_FS_DM_Pin GPIO_PIN_11 +#define OTG_FS_DM_GPIO_Port GPIOA +#define OTG_FS_DP_Pin GPIO_PIN_12 +#define OTG_FS_DP_GPIO_Port GPIOA +#define SWDIO_Pin GPIO_PIN_13 +#define SWDIO_GPIO_Port GPIOA +#define SWCLK_Pin GPIO_PIN_14 +#define SWCLK_GPIO_Port GPIOA +#define I2S3_SCK_Pin GPIO_PIN_10 +#define I2S3_SCK_GPIO_Port GPIOC +#define I2S3_SD_Pin GPIO_PIN_12 +#define I2S3_SD_GPIO_Port GPIOC +#define Audio_RST_Pin GPIO_PIN_4 +#define Audio_RST_GPIO_Port GPIOD +#define OTG_FS_OverCurrent_Pin GPIO_PIN_5 +#define OTG_FS_OverCurrent_GPIO_Port GPIOD +#define SWO_Pin GPIO_PIN_3 +#define SWO_GPIO_Port GPIOB +#define Audio_SCL_Pin GPIO_PIN_6 +#define Audio_SCL_GPIO_Port GPIOB +#define Audio_SDA_Pin GPIO_PIN_9 +#define Audio_SDA_GPIO_Port GPIOB +#define MEMS_INT2_Pin GPIO_PIN_1 +#define MEMS_INT2_GPIO_Port GPIOE + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief I2C MSP Initialization +* This function configures the hardware resources used in this example +* @param hi2c: I2C handle pointer +* @retval None +*/ +void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hi2c->Instance==I2C1) + { + /* USER CODE BEGIN I2C1_MspInit 0 */ + + /* USER CODE END I2C1_MspInit 0 */ + + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**I2C1 GPIO Configuration + PB6 ------> I2C1_SCL + PB9 ------> I2C1_SDA + */ + GPIO_InitStruct.Pin = Audio_SCL_Pin|Audio_SDA_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_I2C1_CLK_ENABLE(); + /* USER CODE BEGIN I2C1_MspInit 1 */ + + /* USER CODE END I2C1_MspInit 1 */ + } + +} + +/** +* @brief I2C MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hi2c: I2C handle pointer +* @retval None +*/ +void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) +{ + if(hi2c->Instance==I2C1) + { + /* USER CODE BEGIN I2C1_MspDeInit 0 */ + + /* USER CODE END I2C1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_I2C1_CLK_DISABLE(); + + /**I2C1 GPIO Configuration + PB6 ------> I2C1_SCL + PB9 ------> I2C1_SDA + */ + HAL_GPIO_DeInit(GPIOB, Audio_SCL_Pin|Audio_SDA_Pin); + + /* USER CODE BEGIN I2C1_MspDeInit 1 */ + + /* USER CODE END I2C1_MspDeInit 1 */ + } + +} + +/** +* @brief I2S MSP Initialization +* This function configures the hardware resources used in this example +* @param hi2s: I2S handle pointer +* @retval None +*/ +void HAL_I2S_MspInit(I2S_HandleTypeDef* hi2s) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hi2s->Instance==SPI2) + { + /* USER CODE BEGIN SPI2_MspInit 0 */ + + /* USER CODE END SPI2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI2_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**I2S2 GPIO Configuration + PC2 ------> I2S2_ext_SD + PC3 ------> I2S2_SD + PB10 ------> I2S2_CK + PB12 ------> I2S2_WS + */ + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF6_I2S2ext; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = PDM_OUT_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + HAL_GPIO_Init(PDM_OUT_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = CLK_IN_Pin|GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI2_MspInit 1 */ + + /* USER CODE END SPI2_MspInit 1 */ + } + else if(hi2s->Instance==SPI3) + { + /* USER CODE BEGIN SPI3_MspInit 0 */ + + /* USER CODE END SPI3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI3_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**I2S3 GPIO Configuration + PA4 ------> I2S3_WS + PC7 ------> I2S3_MCK + PC10 ------> I2S3_CK + PC12 ------> I2S3_SD + */ + GPIO_InitStruct.Pin = I2S3_WS_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; + HAL_GPIO_Init(I2S3_WS_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = I2S3_MCK_Pin|I2S3_SCK_Pin|I2S3_SD_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI3_MspInit 1 */ + + /* USER CODE END SPI3_MspInit 1 */ + } + +} + +/** +* @brief I2S MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hi2s: I2S handle pointer +* @retval None +*/ +void HAL_I2S_MspDeInit(I2S_HandleTypeDef* hi2s) +{ + if(hi2s->Instance==SPI2) + { + /* USER CODE BEGIN SPI2_MspDeInit 0 */ + + /* USER CODE END SPI2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI2_CLK_DISABLE(); + + /**I2S2 GPIO Configuration + PC2 ------> I2S2_ext_SD + PC3 ------> I2S2_SD + PB10 ------> I2S2_CK + PB12 ------> I2S2_WS + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|PDM_OUT_Pin); + + HAL_GPIO_DeInit(GPIOB, CLK_IN_Pin|GPIO_PIN_12); + + /* USER CODE BEGIN SPI2_MspDeInit 1 */ + + /* USER CODE END SPI2_MspDeInit 1 */ + } + else if(hi2s->Instance==SPI3) + { + /* USER CODE BEGIN SPI3_MspDeInit 0 */ + + /* USER CODE END SPI3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI3_CLK_DISABLE(); + + /**I2S3 GPIO Configuration + PA4 ------> I2S3_WS + PC7 ------> I2S3_MCK + PC10 ------> I2S3_CK + PC12 ------> I2S3_SD + */ + HAL_GPIO_DeInit(I2S3_WS_GPIO_Port, I2S3_WS_Pin); + + HAL_GPIO_DeInit(GPIOC, I2S3_MCK_Pin|I2S3_SCK_Pin|I2S3_SD_Pin); + + /* USER CODE BEGIN SPI3_MspDeInit 1 */ + + /* USER CODE END SPI3_MspDeInit 1 */ + } + +} + +/** +* @brief SPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = SPI1_SCK_Pin|SPI1_MISO_Pin|SPI1_MOSI_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + } + +} + +/** +* @brief SPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) +{ + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, SPI1_SCK_Pin|SPI1_MISO_Pin|SPI1_MOSI_Pin); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.c b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.c new file mode 100644 index 0000000000..cb86910e25 --- /dev/null +++ b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.c @@ -0,0 +1,217 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32f4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ +extern PCD_HandleTypeDef hpcd_USB_OTG_FS; +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Pre-fetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32F4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f4xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles USB On The Go FS global interrupt. + */ +void OTG_FS_IRQHandler(void) +{ + /* USER CODE BEGIN OTG_FS_IRQn 0 */ + + /* USER CODE END OTG_FS_IRQn 0 */ + HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); + /* USER CODE BEGIN OTG_FS_IRQn 1 */ + + /* USER CODE END OTG_FS_IRQn 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.h b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.h new file mode 100644 index 0000000000..feee38a396 --- /dev/null +++ b/ports/stm32f4/boards/stm32f411_disco/stm32f4xx_it.h @@ -0,0 +1,70 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_IT_H +#define __STM32F4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void OTG_FS_IRQHandler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/mpconfigport.mk b/ports/stm32f4/mpconfigport.mk index de8cec321e..aec0996be5 100644 --- a/ports/stm32f4/mpconfigport.mk +++ b/ports/stm32f4/mpconfigport.mk @@ -34,16 +34,16 @@ CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_BLEIO = 0 -CIRCUITPY_BOARD = 1 +CIRCUITPY_BOARD = 0 CIRCUITPY_BUSIO = 0 -CIRCUITPY_DIGITALIO = 1 +CIRCUITPY_DIGITALIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_GAMEPAD = 0 CIRCUITPY_GAMEPADSHIFT = 0 CIRCUITPY_I2CSLAVE = 0 CIRCUITPY_MATH = 0 -CIRCUITPY_MICROCONTROLLER = 1 +CIRCUITPY_MICROCONTROLLER = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NETWORK = 0 CIRCUITPY_NVM = 0 diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index 4615aa5e2b..8a106c4776 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -32,175 +32,74 @@ //#include "shared-bindings/rtc/__init__.h" #include "stm32f4xx_hal.h" - -#define LED3_Pin GPIO_PIN_2 -#define LED3_GPIO_Port GPIOE -#define LED4_Pin GPIO_PIN_3 -#define LED4_GPIO_Port GPIOE -#define DFSDM_DATIN3_Pin GPIO_PIN_4 -#define DFSDM_DATIN3_GPIO_Port GPIOE -#define A0_Pin GPIO_PIN_0 -#define A0_GPIO_Port GPIOF -#define LCD_BLCTRL_Pin GPIO_PIN_5 -#define LCD_BLCTRL_GPIO_Port GPIOF -#define QSPI_BK1_IO3_Pin GPIO_PIN_6 -#define QSPI_BK1_IO3_GPIO_Port GPIOF -#define QSPI_BK1_IO2_Pin GPIO_PIN_7 -#define QSPI_BK1_IO2_GPIO_Port GPIOF -#define QSPI_BK1_IO0_Pin GPIO_PIN_8 -#define QSPI_BK1_IO0_GPIO_Port GPIOF -#define QSPI_BK1_IO1_Pin GPIO_PIN_9 -#define QSPI_BK1_IO1_GPIO_Port GPIOF -#define STLK_MCO_Pin GPIO_PIN_0 -#define STLK_MCO_GPIO_Port GPIOH -#define DFSDM_CKOUT_Pin GPIO_PIN_2 -#define DFSDM_CKOUT_GPIO_Port GPIOC -#define JOY_SEL_Pin GPIO_PIN_0 -#define JOY_SEL_GPIO_Port GPIOA -#define STLINK_RX_Pin GPIO_PIN_2 -#define STLINK_RX_GPIO_Port GPIOA -#define STLINK_TX_Pin GPIO_PIN_3 -#define STLINK_TX_GPIO_Port GPIOA -#define CODEC_I2S3_WS_Pin GPIO_PIN_4 -#define CODEC_I2S3_WS_GPIO_Port GPIOA -#define DFSDM_DATIN0_Pin GPIO_PIN_1 -#define DFSDM_DATIN0_GPIO_Port GPIOB -#define QSPI_CLK_Pin GPIO_PIN_2 -#define QSPI_CLK_GPIO_Port GPIOB -#define EXT_RESET_Pin GPIO_PIN_11 -#define EXT_RESET_GPIO_Port GPIOF -#define CTP_RST_Pin GPIO_PIN_12 -#define CTP_RST_GPIO_Port GPIOF -#define JOY_RIGHT_Pin GPIO_PIN_14 -#define JOY_RIGHT_GPIO_Port GPIOF -#define JOY_LEFT_Pin GPIO_PIN_15 -#define JOY_LEFT_GPIO_Port GPIOF -#define JOY_UP_Pin GPIO_PIN_0 -#define JOY_UP_GPIO_Port GPIOG -#define JOY_DOWN_Pin GPIO_PIN_1 -#define JOY_DOWN_GPIO_Port GPIOG -#define D4_Pin GPIO_PIN_7 -#define D4_GPIO_Port GPIOE -#define D5_Pin GPIO_PIN_8 -#define D5_GPIO_Port GPIOE -#define D6_Pin GPIO_PIN_9 -#define D6_GPIO_Port GPIOE -#define D7_Pin GPIO_PIN_10 -#define D7_GPIO_Port GPIOE -#define D8_Pin GPIO_PIN_11 -#define D8_GPIO_Port GPIOE -#define D9_Pin GPIO_PIN_12 -#define D9_GPIO_Port GPIOE -#define D10_Pin GPIO_PIN_13 -#define D10_GPIO_Port GPIOE -#define D11_Pin GPIO_PIN_14 -#define D11_GPIO_Port GPIOE -#define D12_Pin GPIO_PIN_15 -#define D12_GPIO_Port GPIOE -#define I2C2_SCL_Pin GPIO_PIN_10 -#define I2C2_SCL_GPIO_Port GPIOB -#define M2_CKIN_Pin GPIO_PIN_11 -#define M2_CKIN_GPIO_Port GPIOB -#define CODEC_I2S3_SCK_Pin GPIO_PIN_12 -#define CODEC_I2S3_SCK_GPIO_Port GPIOB -#define D13_Pin GPIO_PIN_8 -#define D13_GPIO_Port GPIOD -#define D14_Pin GPIO_PIN_9 -#define D14_GPIO_Port GPIOD -#define D15_Pin GPIO_PIN_10 -#define D15_GPIO_Port GPIOD -#define LCD_RESET_Pin GPIO_PIN_11 -#define LCD_RESET_GPIO_Port GPIOD -#define D0_Pin GPIO_PIN_14 -#define D0_GPIO_Port GPIOD -#define D1_Pin GPIO_PIN_15 -#define D1_GPIO_Port GPIOD -#define CODEC_INT_Pin GPIO_PIN_2 -#define CODEC_INT_GPIO_Port GPIOG -#define LCD_TE_Pin GPIO_PIN_4 -#define LCD_TE_GPIO_Port GPIOG -#define CTP_INT_Pin GPIO_PIN_5 -#define CTP_INT_GPIO_Port GPIOG -#define QSPI_BK1_NCS_Pin GPIO_PIN_6 -#define QSPI_BK1_NCS_GPIO_Port GPIOG -#define USB_OTGFS_OVRCR_Pin GPIO_PIN_7 -#define USB_OTGFS_OVRCR_GPIO_Port GPIOG -#define USB_OTGFS_PPWR_EN_Pin GPIO_PIN_8 -#define USB_OTGFS_PPWR_EN_GPIO_Port GPIOG -#define CODEC_I2S3_MCK_Pin GPIO_PIN_7 -#define CODEC_I2S3_MCK_GPIO_Port GPIOC -#define uSD_D0_Pin GPIO_PIN_8 -#define uSD_D0_GPIO_Port GPIOC -#define uSD_D1_Pin GPIO_PIN_9 -#define uSD_D1_GPIO_Port GPIOC -#define M2_CKINA8_Pin GPIO_PIN_8 -#define M2_CKINA8_GPIO_Port GPIOA -#define USB_OTGFS_VBUS_Pin GPIO_PIN_9 -#define USB_OTGFS_VBUS_GPIO_Port GPIOA -#define USB_OTGFS_ID_Pin GPIO_PIN_10 -#define USB_OTGFS_ID_GPIO_Port GPIOA -#define USB_OTGFS_DM_Pin GPIO_PIN_11 -#define USB_OTGFS_DM_GPIO_Port GPIOA -#define USB_OTGFS_DP_Pin GPIO_PIN_12 -#define USB_OTGFS_DP_GPIO_Port GPIOA +#define DATA_Ready_Pin GPIO_PIN_2 +#define DATA_Ready_GPIO_Port GPIOE +#define CS_I2C_SPI_Pin GPIO_PIN_3 +#define CS_I2C_SPI_GPIO_Port GPIOE +#define INT1_Pin GPIO_PIN_4 +#define INT1_GPIO_Port GPIOE +#define INT2_Pin GPIO_PIN_5 +#define INT2_GPIO_Port GPIOE +#define PC14_OSC32_IN_Pin GPIO_PIN_14 +#define PC14_OSC32_IN_GPIO_Port GPIOC +#define PC15_OSC32_OUT_Pin GPIO_PIN_15 +#define PC15_OSC32_OUT_GPIO_Port GPIOC +#define PH0_OSC_IN_Pin GPIO_PIN_0 +#define PH0_OSC_IN_GPIO_Port GPIOH +#define PH1_OSC_OUT_Pin GPIO_PIN_1 +#define PH1_OSC_OUT_GPIO_Port GPIOH +#define OTG_FS_PowerSwitchOn_Pin GPIO_PIN_0 +#define OTG_FS_PowerSwitchOn_GPIO_Port GPIOC +#define PDM_OUT_Pin GPIO_PIN_3 +#define PDM_OUT_GPIO_Port GPIOC +#define I2S3_WS_Pin GPIO_PIN_4 +#define I2S3_WS_GPIO_Port GPIOA +#define SPI1_SCK_Pin GPIO_PIN_5 +#define SPI1_SCK_GPIO_Port GPIOA +#define SPI1_MISO_Pin GPIO_PIN_6 +#define SPI1_MISO_GPIO_Port GPIOA +#define SPI1_MOSI_Pin GPIO_PIN_7 +#define SPI1_MOSI_GPIO_Port GPIOA +#define CLK_IN_Pin GPIO_PIN_10 +#define CLK_IN_GPIO_Port GPIOB +#define LD4_Pin GPIO_PIN_12 +#define LD4_GPIO_Port GPIOD +#define LD3_Pin GPIO_PIN_13 +#define LD3_GPIO_Port GPIOD +#define LD5_Pin GPIO_PIN_14 +#define LD5_GPIO_Port GPIOD +#define LD6_Pin GPIO_PIN_15 +#define LD6_GPIO_Port GPIOD +#define I2S3_MCK_Pin GPIO_PIN_7 +#define I2S3_MCK_GPIO_Port GPIOC +#define VBUS_FS_Pin GPIO_PIN_9 +#define VBUS_FS_GPIO_Port GPIOA +#define OTG_FS_ID_Pin GPIO_PIN_10 +#define OTG_FS_ID_GPIO_Port GPIOA +#define OTG_FS_DM_Pin GPIO_PIN_11 +#define OTG_FS_DM_GPIO_Port GPIOA +#define OTG_FS_DP_Pin GPIO_PIN_12 +#define OTG_FS_DP_GPIO_Port GPIOA #define SWDIO_Pin GPIO_PIN_13 #define SWDIO_GPIO_Port GPIOA #define SWCLK_Pin GPIO_PIN_14 #define SWCLK_GPIO_Port GPIOA -#define uSD_D2_Pin GPIO_PIN_10 -#define uSD_D2_GPIO_Port GPIOC -#define uSD_D3_Pin GPIO_PIN_11 -#define uSD_D3_GPIO_Port GPIOC -#define uSD_CLK_Pin GPIO_PIN_12 -#define uSD_CLK_GPIO_Port GPIOC -#define D2_Pin GPIO_PIN_0 -#define D2_GPIO_Port GPIOD -#define D3_Pin GPIO_PIN_1 -#define D3_GPIO_Port GPIOD -#define uSD_CMD_Pin GPIO_PIN_2 -#define uSD_CMD_GPIO_Port GPIOD -#define uSD_DETECT_Pin GPIO_PIN_3 -#define uSD_DETECT_GPIO_Port GPIOD -#define FMC_NOE_Pin GPIO_PIN_4 -#define FMC_NOE_GPIO_Port GPIOD -#define FMC_NWE_Pin GPIO_PIN_5 -#define FMC_NWE_GPIO_Port GPIOD -#define FMC_NE1_Pin GPIO_PIN_7 -#define FMC_NE1_GPIO_Port GPIOD +#define I2S3_SCK_Pin GPIO_PIN_10 +#define I2S3_SCK_GPIO_Port GPIOC +#define I2S3_SD_Pin GPIO_PIN_12 +#define I2S3_SD_GPIO_Port GPIOC +#define Audio_RST_Pin GPIO_PIN_4 +#define Audio_RST_GPIO_Port GPIOD +#define OTG_FS_OverCurrent_Pin GPIO_PIN_5 +#define OTG_FS_OverCurrent_GPIO_Port GPIOD #define SWO_Pin GPIO_PIN_3 #define SWO_GPIO_Port GPIOB -#define CODEC_I2S3ext_SD_Pin GPIO_PIN_4 -#define CODEC_I2S3ext_SD_GPIO_Port GPIOB -#define CODEC_I2S3_SD_Pin GPIO_PIN_5 -#define CODEC_I2S3_SD_GPIO_Port GPIOB -#define I2C1_SCL_Pin GPIO_PIN_6 -#define I2C1_SCL_GPIO_Port GPIOB -#define I2C1_SDA_Pin GPIO_PIN_7 -#define I2C1_SDA_GPIO_Port GPIOB -#define I2C2_SDA_Pin GPIO_PIN_9 -#define I2C2_SDA_GPIO_Port GPIOB -#define LED1_Pin GPIO_PIN_0 -#define LED1_GPIO_Port GPIOE -#define LED2_Pin GPIO_PIN_1 -#define LED2_GPIO_Port GPIOE - -UART_HandleTypeDef huart2; - -/* -#include "shared-module/gamepad/__init__.h" -#include "common-hal/microcontroller/Pin.h" -#include "common-hal/bleio/__init__.h" -#include "common-hal/busio/I2C.h" -#include "common-hal/busio/SPI.h" -#include "common-hal/busio/UART.h" -#include "common-hal/pulseio/PWMOut.h" -#include "common-hal/pulseio/PulseOut.h" -#include "common-hal/pulseio/PulseIn.h" -#include "common-hal/rtc/RTC.h" - -*/ - -//#include "shared-bindings/rtc/__init__.h" +#define Audio_SCL_Pin GPIO_PIN_6 +#define Audio_SCL_GPIO_Port GPIOB +#define Audio_SDA_Pin GPIO_PIN_9 +#define Audio_SDA_GPIO_Port GPIOB +#define MEMS_INT2_Pin GPIO_PIN_1 +#define MEMS_INT2_GPIO_Port GPIOE static void power_warning_handler(void) { reset_into_safe_mode(BROWNOUT); @@ -209,7 +108,7 @@ static void power_warning_handler(void) { safe_mode_t port_init(void) { HAL_Init(); - //System clock init + //sys clock RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; @@ -219,17 +118,14 @@ safe_mode_t port_init(void) { __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); /** Initializes the CPU, AHB and APB busses clocks */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; - RCC_OscInitStruct.PLL.PLLN = 72; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 3; - RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLN = 192; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 8; HAL_RCC_OscConfig(&RCC_OscInitStruct); /** Initializes the CPU, AHB and APB busses clocks */ @@ -237,88 +133,87 @@ safe_mode_t port_init(void) { |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); - - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S_APB1|RCC_PERIPHCLK_SDIO - |RCC_PERIPHCLK_CLK48; - PeriphClkInitStruct.PLLI2S.PLLI2SN = 50; - PeriphClkInitStruct.PLLI2S.PLLI2SM = 4; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S; + PeriphClkInitStruct.PLLI2S.PLLI2SN = 200; + PeriphClkInitStruct.PLLI2S.PLLI2SM = 5; PeriphClkInitStruct.PLLI2S.PLLI2SR = 2; - PeriphClkInitStruct.PLLI2S.PLLI2SQ = 2; - PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ; - PeriphClkInitStruct.SdioClockSelection = RCC_SDIOCLKSOURCE_CLK48; - PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC; - PeriphClkInitStruct.I2sApb1ClockSelection = RCC_I2SAPB1CLKSOURCE_PLLI2S; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); - - //GPIO Init + //GPIO setup GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOG_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); + /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOE, LED3_Pin|LED4_Pin|LED1_Pin|LED2_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(OTG_FS_PowerSwitchOn_GPIO_Port, OTG_FS_PowerSwitchOn_Pin, GPIO_PIN_SET); + /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOF, LCD_BLCTRL_Pin|EXT_RESET_Pin|CTP_RST_Pin, GPIO_PIN_RESET); - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(LCD_RESET_GPIO_Port, LCD_RESET_Pin, GPIO_PIN_RESET); - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(USB_OTGFS_PPWR_EN_GPIO_Port, USB_OTGFS_PPWR_EN_Pin, GPIO_PIN_SET); - /*Configure GPIO pins : LED3_Pin LED4_Pin LED1_Pin LED2_Pin */ - GPIO_InitStruct.Pin = LED3_Pin|LED4_Pin|LED1_Pin|LED2_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + HAL_GPIO_WritePin(GPIOD, LD4_Pin|LD3_Pin|LD5_Pin|LD6_Pin + |Audio_RST_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : DATA_Ready_Pin */ + GPIO_InitStruct.Pin = DATA_Ready_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(DATA_Ready_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : CS_I2C_SPI_Pin */ + GPIO_InitStruct.Pin = CS_I2C_SPI_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(CS_I2C_SPI_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : INT1_Pin INT2_Pin MEMS_INT2_Pin */ + GPIO_InitStruct.Pin = INT1_Pin|INT2_Pin|MEMS_INT2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - /*Configure GPIO pin : USB_OTGFS_PPWR_EN_Pin */ - GPIO_InitStruct.Pin = USB_OTGFS_PPWR_EN_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + + /*Configure GPIO pin : OTG_FS_PowerSwitchOn_Pin */ + GPIO_InitStruct.Pin = OTG_FS_PowerSwitchOn_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(USB_OTGFS_PPWR_EN_GPIO_Port, &GPIO_InitStruct); + HAL_GPIO_Init(OTG_FS_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : PA0 */ + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pins : LD4_Pin LD3_Pin LD5_Pin LD6_Pin + Audio_RST_Pin */ + GPIO_InitStruct.Pin = LD4_Pin|LD3_Pin|LD5_Pin|LD6_Pin + |Audio_RST_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /*Configure GPIO pin : OTG_FS_OverCurrent_Pin */ + GPIO_InitStruct.Pin = OTG_FS_OverCurrent_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(OTG_FS_OverCurrent_GPIO_Port, &GPIO_InitStruct); //Status LED chain - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0, GPIO_PIN_RESET); //LED 1 - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_1, GPIO_PIN_SET); //LED 2 - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_SET); //LED 3 - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_SET); //LED 4 - - //Status LED chain - // HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET); - // HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET); - // HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_SET); - // HAL_GPIO_WritePin(LED4_GPIO_Port, LED4_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, LD4_Pin, GPIO_PIN_RESET); //LED 1 + HAL_GPIO_WritePin(GPIOD, LD3_Pin, GPIO_PIN_SET); //LED 2 + HAL_GPIO_WritePin(GPIOD, LD5_Pin, GPIO_PIN_SET); //LED 3 + HAL_GPIO_WritePin(GPIOD, LD6_Pin, GPIO_PIN_SET); //LED 4 tick_init(); - //UART testing - // huart2.Instance = USART2; - // huart2.Init.BaudRate = 115200; - // huart2.Init.WordLength = UART_WORDLENGTH_8B; - // huart2.Init.StopBits = UART_STOPBITS_1; - // huart2.Init.Parity = UART_PARITY_NONE; - // huart2.Init.Mode = UART_MODE_TX_RX; - // huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - // huart2.Init.OverSampling = UART_OVERSAMPLING_16; - // if (HAL_UART_Init(&huart2) == HAL_OK) - // { - // HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); - // } - - // HAL_UART_Transmit(&huart2, (uint8_t*)"helloworld", 10, 5000); - // HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_RESET); - - board_init(); return NO_SAFE_MODE; diff --git a/ports/stm32f4/supervisor/port_412.c b/ports/stm32f4/supervisor/port_412.c new file mode 100644 index 0000000000..0a0e08fdf7 --- /dev/null +++ b/ports/stm32f4/supervisor/port_412.c @@ -0,0 +1,328 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "supervisor/port.h" +#include "boards/board.h" + +#include "tick.h" +//#include "shared-bindings/rtc/__init__.h" + +#include "stm32f4xx_hal.h" + +#define LED3_Pin GPIO_PIN_2 +#define LED3_GPIO_Port GPIOE +#define LED4_Pin GPIO_PIN_3 +#define LED4_GPIO_Port GPIOE +#define DFSDM_DATIN3_Pin GPIO_PIN_4 +#define DFSDM_DATIN3_GPIO_Port GPIOE +#define A0_Pin GPIO_PIN_0 +#define A0_GPIO_Port GPIOF +#define LCD_BLCTRL_Pin GPIO_PIN_5 +#define LCD_BLCTRL_GPIO_Port GPIOF +#define QSPI_BK1_IO3_Pin GPIO_PIN_6 +#define QSPI_BK1_IO3_GPIO_Port GPIOF +#define QSPI_BK1_IO2_Pin GPIO_PIN_7 +#define QSPI_BK1_IO2_GPIO_Port GPIOF +#define QSPI_BK1_IO0_Pin GPIO_PIN_8 +#define QSPI_BK1_IO0_GPIO_Port GPIOF +#define QSPI_BK1_IO1_Pin GPIO_PIN_9 +#define QSPI_BK1_IO1_GPIO_Port GPIOF +#define STLK_MCO_Pin GPIO_PIN_0 +#define STLK_MCO_GPIO_Port GPIOH +#define DFSDM_CKOUT_Pin GPIO_PIN_2 +#define DFSDM_CKOUT_GPIO_Port GPIOC +#define JOY_SEL_Pin GPIO_PIN_0 +#define JOY_SEL_GPIO_Port GPIOA +#define STLINK_RX_Pin GPIO_PIN_2 +#define STLINK_RX_GPIO_Port GPIOA +#define STLINK_TX_Pin GPIO_PIN_3 +#define STLINK_TX_GPIO_Port GPIOA +#define CODEC_I2S3_WS_Pin GPIO_PIN_4 +#define CODEC_I2S3_WS_GPIO_Port GPIOA +#define DFSDM_DATIN0_Pin GPIO_PIN_1 +#define DFSDM_DATIN0_GPIO_Port GPIOB +#define QSPI_CLK_Pin GPIO_PIN_2 +#define QSPI_CLK_GPIO_Port GPIOB +#define EXT_RESET_Pin GPIO_PIN_11 +#define EXT_RESET_GPIO_Port GPIOF +#define CTP_RST_Pin GPIO_PIN_12 +#define CTP_RST_GPIO_Port GPIOF +#define JOY_RIGHT_Pin GPIO_PIN_14 +#define JOY_RIGHT_GPIO_Port GPIOF +#define JOY_LEFT_Pin GPIO_PIN_15 +#define JOY_LEFT_GPIO_Port GPIOF +#define JOY_UP_Pin GPIO_PIN_0 +#define JOY_UP_GPIO_Port GPIOG +#define JOY_DOWN_Pin GPIO_PIN_1 +#define JOY_DOWN_GPIO_Port GPIOG +#define D4_Pin GPIO_PIN_7 +#define D4_GPIO_Port GPIOE +#define D5_Pin GPIO_PIN_8 +#define D5_GPIO_Port GPIOE +#define D6_Pin GPIO_PIN_9 +#define D6_GPIO_Port GPIOE +#define D7_Pin GPIO_PIN_10 +#define D7_GPIO_Port GPIOE +#define D8_Pin GPIO_PIN_11 +#define D8_GPIO_Port GPIOE +#define D9_Pin GPIO_PIN_12 +#define D9_GPIO_Port GPIOE +#define D10_Pin GPIO_PIN_13 +#define D10_GPIO_Port GPIOE +#define D11_Pin GPIO_PIN_14 +#define D11_GPIO_Port GPIOE +#define D12_Pin GPIO_PIN_15 +#define D12_GPIO_Port GPIOE +#define I2C2_SCL_Pin GPIO_PIN_10 +#define I2C2_SCL_GPIO_Port GPIOB +#define M2_CKIN_Pin GPIO_PIN_11 +#define M2_CKIN_GPIO_Port GPIOB +#define CODEC_I2S3_SCK_Pin GPIO_PIN_12 +#define CODEC_I2S3_SCK_GPIO_Port GPIOB +#define D13_Pin GPIO_PIN_8 +#define D13_GPIO_Port GPIOD +#define D14_Pin GPIO_PIN_9 +#define D14_GPIO_Port GPIOD +#define D15_Pin GPIO_PIN_10 +#define D15_GPIO_Port GPIOD +#define LCD_RESET_Pin GPIO_PIN_11 +#define LCD_RESET_GPIO_Port GPIOD +#define D0_Pin GPIO_PIN_14 +#define D0_GPIO_Port GPIOD +#define D1_Pin GPIO_PIN_15 +#define D1_GPIO_Port GPIOD +#define CODEC_INT_Pin GPIO_PIN_2 +#define CODEC_INT_GPIO_Port GPIOG +#define LCD_TE_Pin GPIO_PIN_4 +#define LCD_TE_GPIO_Port GPIOG +#define CTP_INT_Pin GPIO_PIN_5 +#define CTP_INT_GPIO_Port GPIOG +#define QSPI_BK1_NCS_Pin GPIO_PIN_6 +#define QSPI_BK1_NCS_GPIO_Port GPIOG +#define USB_OTGFS_OVRCR_Pin GPIO_PIN_7 +#define USB_OTGFS_OVRCR_GPIO_Port GPIOG +#define USB_OTGFS_PPWR_EN_Pin GPIO_PIN_8 +#define USB_OTGFS_PPWR_EN_GPIO_Port GPIOG +#define CODEC_I2S3_MCK_Pin GPIO_PIN_7 +#define CODEC_I2S3_MCK_GPIO_Port GPIOC +#define uSD_D0_Pin GPIO_PIN_8 +#define uSD_D0_GPIO_Port GPIOC +#define uSD_D1_Pin GPIO_PIN_9 +#define uSD_D1_GPIO_Port GPIOC +#define M2_CKINA8_Pin GPIO_PIN_8 +#define M2_CKINA8_GPIO_Port GPIOA +#define USB_OTGFS_VBUS_Pin GPIO_PIN_9 +#define USB_OTGFS_VBUS_GPIO_Port GPIOA +#define USB_OTGFS_ID_Pin GPIO_PIN_10 +#define USB_OTGFS_ID_GPIO_Port GPIOA +#define USB_OTGFS_DM_Pin GPIO_PIN_11 +#define USB_OTGFS_DM_GPIO_Port GPIOA +#define USB_OTGFS_DP_Pin GPIO_PIN_12 +#define USB_OTGFS_DP_GPIO_Port GPIOA +#define SWDIO_Pin GPIO_PIN_13 +#define SWDIO_GPIO_Port GPIOA +#define SWCLK_Pin GPIO_PIN_14 +#define SWCLK_GPIO_Port GPIOA +#define uSD_D2_Pin GPIO_PIN_10 +#define uSD_D2_GPIO_Port GPIOC +#define uSD_D3_Pin GPIO_PIN_11 +#define uSD_D3_GPIO_Port GPIOC +#define uSD_CLK_Pin GPIO_PIN_12 +#define uSD_CLK_GPIO_Port GPIOC +#define D2_Pin GPIO_PIN_0 +#define D2_GPIO_Port GPIOD +#define D3_Pin GPIO_PIN_1 +#define D3_GPIO_Port GPIOD +#define uSD_CMD_Pin GPIO_PIN_2 +#define uSD_CMD_GPIO_Port GPIOD +#define uSD_DETECT_Pin GPIO_PIN_3 +#define uSD_DETECT_GPIO_Port GPIOD +#define FMC_NOE_Pin GPIO_PIN_4 +#define FMC_NOE_GPIO_Port GPIOD +#define FMC_NWE_Pin GPIO_PIN_5 +#define FMC_NWE_GPIO_Port GPIOD +#define FMC_NE1_Pin GPIO_PIN_7 +#define FMC_NE1_GPIO_Port GPIOD +#define SWO_Pin GPIO_PIN_3 +#define SWO_GPIO_Port GPIOB +#define CODEC_I2S3ext_SD_Pin GPIO_PIN_4 +#define CODEC_I2S3ext_SD_GPIO_Port GPIOB +#define CODEC_I2S3_SD_Pin GPIO_PIN_5 +#define CODEC_I2S3_SD_GPIO_Port GPIOB +#define I2C1_SCL_Pin GPIO_PIN_6 +#define I2C1_SCL_GPIO_Port GPIOB +#define I2C1_SDA_Pin GPIO_PIN_7 +#define I2C1_SDA_GPIO_Port GPIOB +#define I2C2_SDA_Pin GPIO_PIN_9 +#define I2C2_SDA_GPIO_Port GPIOB +#define LED1_Pin GPIO_PIN_0 +#define LED1_GPIO_Port GPIOE +#define LED2_Pin GPIO_PIN_1 +#define LED2_GPIO_Port GPIOE + +UART_HandleTypeDef huart2; + +/* +#include "shared-module/gamepad/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/bleio/__init__.h" +#include "common-hal/busio/I2C.h" +#include "common-hal/busio/SPI.h" +#include "common-hal/busio/UART.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PulseIn.h" +#include "common-hal/rtc/RTC.h" + +*/ + +//#include "shared-bindings/rtc/__init__.h" + +static void power_warning_handler(void) { + reset_into_safe_mode(BROWNOUT); +} + +safe_mode_t port_init(void) { + HAL_Init(); + + //System clock init + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 72; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 3; + RCC_OscInitStruct.PLL.PLLR = 2; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S_APB1|RCC_PERIPHCLK_SDIO + |RCC_PERIPHCLK_CLK48; + PeriphClkInitStruct.PLLI2S.PLLI2SN = 50; + PeriphClkInitStruct.PLLI2S.PLLI2SM = 4; + PeriphClkInitStruct.PLLI2S.PLLI2SR = 2; + PeriphClkInitStruct.PLLI2S.PLLI2SQ = 2; + PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ; + PeriphClkInitStruct.SdioClockSelection = RCC_SDIOCLKSOURCE_CLK48; + PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC; + PeriphClkInitStruct.I2sApb1ClockSelection = RCC_I2SAPB1CLKSOURCE_PLLI2S; + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); + + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); + + //GPIO Init + GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOE, LED3_Pin|LED4_Pin|LED1_Pin|LED2_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOF, LCD_BLCTRL_Pin|EXT_RESET_Pin|CTP_RST_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LCD_RESET_GPIO_Port, LCD_RESET_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(USB_OTGFS_PPWR_EN_GPIO_Port, USB_OTGFS_PPWR_EN_Pin, GPIO_PIN_SET); + /*Configure GPIO pins : LED3_Pin LED4_Pin LED1_Pin LED2_Pin */ + GPIO_InitStruct.Pin = LED3_Pin|LED4_Pin|LED1_Pin|LED2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + /*Configure GPIO pin : USB_OTGFS_PPWR_EN_Pin */ + GPIO_InitStruct.Pin = USB_OTGFS_PPWR_EN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(USB_OTGFS_PPWR_EN_GPIO_Port, &GPIO_InitStruct); + + //Status LED chain + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0, GPIO_PIN_RESET); //LED 1 + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_1, GPIO_PIN_SET); //LED 2 + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_SET); //LED 3 + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_SET); //LED 4 + + tick_init(); + // HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_RESET); + + board_init(); + + return NO_SAFE_MODE; +} + +void reset_port(void) { + +} + +void reset_to_bootloader(void) { + +} + +void reset_cpu(void) { + +} + +extern uint32_t _ebss; +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} + +// void HardFault_Handler(void) { + +// } diff --git a/ports/stm32f4/supervisor/usb.c b/ports/stm32f4/supervisor/usb.c index 09429a15b2..9135235238 100644 --- a/ports/stm32f4/supervisor/usb.c +++ b/ports/stm32f4/supervisor/usb.c @@ -42,24 +42,39 @@ void init_usb_hardware(void) { + // HAL_GPIO_WritePin(GPIOE, GPIO_PIN_1, GPIO_PIN_RESET); //LED 2 GPIO_InitTypeDef GPIO_InitStruct = {0}; - __HAL_RCC_GPIOA_CLK_ENABLE(); - /**USB_OTG_FS GPIO Configuration + /**USB_OTG_FS GPIO Configuration PA10 ------> USB_OTG_FS_ID PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ - GPIO_InitStruct.Pin = USB_OTGFS_ID_Pin|USB_OTGFS_DM_Pin|USB_OTGFS_DP_Pin; + GPIO_InitStruct.Pin = USB_OTGFS_VBUS_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USB_OTGFS_VBUS_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = USB_OTGFS_DM_Pin|USB_OTGFS_DP_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + //TinyUSB suggestion + GPIO_InitStruct.Pin = USB_OTGFS_ID_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); /* Peripheral interrupt init */ HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); HAL_NVIC_EnableIRQ(OTG_FS_IRQn); + + //HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET); //LED 3 } diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index 5490bf0594..11f0adbf9a 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -51,7 +51,7 @@ else SRC_SUPERVISOR += supervisor/internal_flash.c endif -USB=FALSE +USB=TRUE ifeq ($(USB),FALSE) ifeq ($(wildcard supervisor/serial.c),) SRC_SUPERVISOR += supervisor/stub/serial.c