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stm32/sdio: Don't change any DMA2 settings on H7 MCUs.

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DMA2 clock and registers should be left in their current state in the H7
build.
This commit is contained in:
iabdalkader 2020-10-02 21:23:09 +02:00 committed by Damien George
parent 1dc64359da
commit 7497d891a7
1 changed files with 6 additions and 0 deletions
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6
ports/stm32/sdio.c
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@ -76,7 +76,9 @@ void sdio_init(uint32_t irq_pri) {
#endif #endif
mp_hal_delay_us(10); mp_hal_delay_us(10);
#if defined(STM32F7)
__HAL_RCC_DMA2_CLK_ENABLE(); // enable DMA2 peripheral __HAL_RCC_DMA2_CLK_ENABLE(); // enable DMA2 peripheral
#endif
NVIC_SetPriority(SDMMC1_IRQn, irq_pri); NVIC_SetPriority(SDMMC1_IRQn, irq_pri);
@ -216,7 +218,9 @@ int sdio_transfer(uint32_t cmd, uint32_t arg, uint32_t *resp) {
} }
#endif #endif
#if defined(STM32F7)
DMA2_Stream3->CR = 0; // ensure DMA is reset DMA2_Stream3->CR = 0; // ensure DMA is reset
#endif
SDMMC1->ICR = SDMMC_STATIC_FLAGS; // clear interrupts SDMMC1->ICR = SDMMC_STATIC_FLAGS; // clear interrupts
SDMMC1->ARG = arg; SDMMC1->ARG = arg;
SDMMC1->CMD = cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN; SDMMC1->CMD = cmd | SDMMC_CMD_WAITRESP_0 | SDMMC_CMD_CPSMEN;
@ -296,7 +300,9 @@ int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t le
SDMMC1->DTIMER = 0x2000000; // about 700ms running at 48MHz SDMMC1->DTIMER = 0x2000000; // about 700ms running at 48MHz
SDMMC1->DLEN = (len + block_size - 1) & ~(block_size - 1); SDMMC1->DLEN = (len + block_size - 1) & ~(block_size - 1);
#if defined(STM32F7)
DMA2_Stream3->CR = 0; DMA2_Stream3->CR = 0;
#endif
if (dma) { if (dma) {
// prepare DMA so it's ready when the DPSM starts its transfer // prepare DMA so it's ready when the DPSM starts its transfer